diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-05-16 06:16:03 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-07-01 09:15:46 -0400 |
commit | 9862ba17b7b6866cbee90547ff1f58d055c13f97 (patch) | |
tree | 88b467e0fa3c0225cf068513b33cf2a30a639f44 | |
parent | 409ec8db46dc60e5da7169b6bac6b294513d386a (diff) |
dmaengine: PL08x: extract function to to generate cctl values
Extract the functionality from dma_slave_config to generate the cctl
values for a given bus width and burst size. This allows us to use
this elsewhere in the driver, namely the prepare functions.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r-- | drivers/dma/amba-pl08x.c | 53 |
1 files changed, 32 insertions, 21 deletions
diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c index bd51a44746b..fde801f787c 100644 --- a/drivers/dma/amba-pl08x.c +++ b/drivers/dma/amba-pl08x.c | |||
@@ -1207,14 +1207,40 @@ static u32 pl08x_burst(u32 maxburst) | |||
1207 | return burst_sizes[i].reg; | 1207 | return burst_sizes[i].reg; |
1208 | } | 1208 | } |
1209 | 1209 | ||
1210 | static u32 pl08x_get_cctl(struct pl08x_dma_chan *plchan, | ||
1211 | enum dma_slave_buswidth addr_width, u32 maxburst) | ||
1212 | { | ||
1213 | u32 width, burst, cctl = 0; | ||
1214 | |||
1215 | width = pl08x_width(addr_width); | ||
1216 | if (width == ~0) | ||
1217 | return ~0; | ||
1218 | |||
1219 | cctl |= width << PL080_CONTROL_SWIDTH_SHIFT; | ||
1220 | cctl |= width << PL080_CONTROL_DWIDTH_SHIFT; | ||
1221 | |||
1222 | /* | ||
1223 | * If this channel will only request single transfers, set this | ||
1224 | * down to ONE element. Also select one element if no maxburst | ||
1225 | * is specified. | ||
1226 | */ | ||
1227 | if (plchan->cd->single) | ||
1228 | maxburst = 1; | ||
1229 | |||
1230 | burst = pl08x_burst(maxburst); | ||
1231 | cctl |= burst << PL080_CONTROL_SB_SIZE_SHIFT; | ||
1232 | cctl |= burst << PL080_CONTROL_DB_SIZE_SHIFT; | ||
1233 | |||
1234 | return pl08x_cctl(cctl); | ||
1235 | } | ||
1236 | |||
1210 | static int dma_set_runtime_config(struct dma_chan *chan, | 1237 | static int dma_set_runtime_config(struct dma_chan *chan, |
1211 | struct dma_slave_config *config) | 1238 | struct dma_slave_config *config) |
1212 | { | 1239 | { |
1213 | struct pl08x_dma_chan *plchan = to_pl08x_chan(chan); | 1240 | struct pl08x_dma_chan *plchan = to_pl08x_chan(chan); |
1214 | struct pl08x_driver_data *pl08x = plchan->host; | 1241 | struct pl08x_driver_data *pl08x = plchan->host; |
1215 | enum dma_slave_buswidth addr_width; | 1242 | enum dma_slave_buswidth addr_width; |
1216 | u32 width, burst, maxburst; | 1243 | u32 maxburst, cctl = 0; |
1217 | u32 cctl = 0; | ||
1218 | 1244 | ||
1219 | if (!plchan->slave) | 1245 | if (!plchan->slave) |
1220 | return -EINVAL; | 1246 | return -EINVAL; |
@@ -1233,8 +1259,8 @@ static int dma_set_runtime_config(struct dma_chan *chan, | |||
1233 | return -EINVAL; | 1259 | return -EINVAL; |
1234 | } | 1260 | } |
1235 | 1261 | ||
1236 | width = pl08x_width(addr_width); | 1262 | cctl = pl08x_get_cctl(plchan, addr_width, maxburst); |
1237 | if (width == ~0) { | 1263 | if (cctl == ~0) { |
1238 | dev_err(&pl08x->adev->dev, | 1264 | dev_err(&pl08x->adev->dev, |
1239 | "bad runtime_config: alien address width\n"); | 1265 | "bad runtime_config: alien address width\n"); |
1240 | return -EINVAL; | 1266 | return -EINVAL; |
@@ -1242,25 +1268,10 @@ static int dma_set_runtime_config(struct dma_chan *chan, | |||
1242 | 1268 | ||
1243 | plchan->cfg = *config; | 1269 | plchan->cfg = *config; |
1244 | 1270 | ||
1245 | cctl |= width << PL080_CONTROL_SWIDTH_SHIFT; | ||
1246 | cctl |= width << PL080_CONTROL_DWIDTH_SHIFT; | ||
1247 | |||
1248 | /* | ||
1249 | * If this channel will only request single transfers, set this | ||
1250 | * down to ONE element. Also select one element if no maxburst | ||
1251 | * is specified. | ||
1252 | */ | ||
1253 | if (plchan->cd->single) | ||
1254 | maxburst = 1; | ||
1255 | |||
1256 | burst = pl08x_burst(maxburst); | ||
1257 | cctl |= burst << PL080_CONTROL_SB_SIZE_SHIFT; | ||
1258 | cctl |= burst << PL080_CONTROL_DB_SIZE_SHIFT; | ||
1259 | |||
1260 | if (plchan->runtime_direction == DMA_DEV_TO_MEM) { | 1271 | if (plchan->runtime_direction == DMA_DEV_TO_MEM) { |
1261 | plchan->src_cctl = pl08x_cctl(cctl); | 1272 | plchan->src_cctl = cctl; |
1262 | } else { | 1273 | } else { |
1263 | plchan->dst_cctl = pl08x_cctl(cctl); | 1274 | plchan->dst_cctl = cctl; |
1264 | } | 1275 | } |
1265 | 1276 | ||
1266 | dev_dbg(&pl08x->adev->dev, | 1277 | dev_dbg(&pl08x->adev->dev, |