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authorLarry Finger <Larry.Finger@lwfinger.net>2011-08-23 20:00:42 -0400
committerLarry Finger <Larry.Finger@lwfinger.net>2011-08-23 20:00:42 -0400
commit94a799425eee8225a1e3fbe5f473d2ef04002577 (patch)
treee4d188ca8f652c6b61859472fe9de05ef8ae33b3
parent8cfcabf80c875aff5f3dad1ffdf48096f5be1f7f (diff)
From: wlanfae <wlanfae@realtek.com>
[PATCH 1/8] rtl8192e: Import new version of driver from realtek Signed-off-by: wlanfae <wlanfae@realtek.com> Signed-off-by: Mike McCormack <mikem@ring3k.org> Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> ---
Diffstat
-rw-r--r--drivers/staging/rtl8192e/Makefile68
-rw-r--r--drivers/staging/rtl8192e/dot11d.c216
-rw-r--r--drivers/staging/rtl8192e/dot11d.h113
-rw-r--r--drivers/staging/rtl8192e/ieee80211/dot11d.c218
-rw-r--r--drivers/staging/rtl8192e/ieee80211/dot11d.h102
-rw-r--r--drivers/staging/rtl8192e/ieee80211/ieee80211.h2636
-rw-r--r--drivers/staging/rtl8192e/ieee80211/ieee80211_module.c352
-rw-r--r--drivers/staging/rtl8192e/ieee80211/ieee80211_rx.c2676
-rw-r--r--drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c3278
-rw-r--r--drivers/staging/rtl8192e/ieee80211/rtl819x_BAProc.c676
-rw-r--r--drivers/staging/rtl8192e/ieee80211/rtl819x_HTProc.c1732
-rw-r--r--drivers/staging/rtl8192e/ieee80211/rtl819x_Qos.h582
-rw-r--r--drivers/staging/rtl8192e/ieee80211/rtl819x_TSProc.c627
-rw-r--r--drivers/staging/rtl8192e/internal.h129
-rw-r--r--drivers/staging/rtl8192e/kmap_types.h20
-rw-r--r--drivers/staging/rtl8192e/license339
-rw-r--r--drivers/staging/rtl8192e/r8190P_def.h415
-rw-r--r--drivers/staging/rtl8192e/r8190P_hwimg.c4538
-rw-r--r--drivers/staging/rtl8192e/r8190P_hwimg.h51
-rw-r--r--drivers/staging/rtl8192e/r8190P_rtl8256.c366
-rw-r--r--drivers/staging/rtl8192e/r8190P_rtl8256.h34
-rw-r--r--drivers/staging/rtl8192e/r8192E_cmdpkt.c478
-rw-r--r--drivers/staging/rtl8192e/r8192E_cmdpkt.h163
-rw-r--r--drivers/staging/rtl8192e/r8192E_core.c.porig5039
-rw-r--r--drivers/staging/rtl8192e/r8192E_core.c.rej5036
-rw-r--r--drivers/staging/rtl8192e/r8192E_dev.c2670
-rw-r--r--drivers/staging/rtl8192e/r8192E_dev.h56
-rw-r--r--drivers/staging/rtl8192e/r8192E_firmware.c396
-rw-r--r--drivers/staging/rtl8192e/r8192E_firmware.h73
-rw-r--r--drivers/staging/rtl8192e/r8192E_hw.h496
-rw-r--r--drivers/staging/rtl8192e/r8192E_hwimg.c3337
-rw-r--r--drivers/staging/rtl8192e/r8192E_hwimg.h51
-rw-r--r--drivers/staging/rtl8192e/r8192E_phy.c1963
-rw-r--r--drivers/staging/rtl8192e/r8192E_phy.h164
-rw-r--r--drivers/staging/rtl8192e/r8192E_phyreg.h852
-rw-r--r--drivers/staging/rtl8192e/readme160
-rw-r--r--drivers/staging/rtl8192e/rtl819x_BA.h (renamed from drivers/staging/rtl8192e/ieee80211/rtl819x_BA.h)31
-rw-r--r--drivers/staging/rtl8192e/rtl819x_BAProc.c618
-rw-r--r--drivers/staging/rtl8192e/rtl819x_HT.h (renamed from drivers/staging/rtl8192e/ieee80211/rtl819x_HT.h)254
-rw-r--r--drivers/staging/rtl8192e/rtl819x_HTProc.c1531
-rw-r--r--drivers/staging/rtl8192e/rtl819x_Qos.h422
-rw-r--r--drivers/staging/rtl8192e/rtl819x_TS.h (renamed from drivers/staging/rtl8192e/ieee80211/rtl819x_TS.h)31
-rw-r--r--drivers/staging/rtl8192e/rtl819x_TSProc.c647
-rw-r--r--drivers/staging/rtl8192e/rtl_cam.c379
-rw-r--r--drivers/staging/rtl8192e/rtl_cam.h44
-rw-r--r--drivers/staging/rtl8192e/rtl_core.c4084
-rw-r--r--drivers/staging/rtl8192e/rtl_core.h1190
-rw-r--r--drivers/staging/rtl8192e/rtl_crypto.h (renamed from drivers/staging/rtl8192e/ieee80211/rtl_crypto.h)19
-rw-r--r--drivers/staging/rtl8192e/rtl_debug.c1339
-rw-r--r--drivers/staging/rtl8192e/rtl_debug.h319
-rw-r--r--drivers/staging/rtl8192e/rtl_dm.c4854
-rw-r--r--drivers/staging/rtl8192e/rtl_dm.h331
-rw-r--r--drivers/staging/rtl8192e/rtl_eeprom.c141
-rw-r--r--drivers/staging/rtl8192e/rtl_eeprom.h29
-rw-r--r--drivers/staging/rtl8192e/rtl_ethtool.c59
-rw-r--r--drivers/staging/rtl8192e/rtl_pci.c444
-rw-r--r--drivers/staging/rtl8192e/rtl_pci.h104
-rw-r--r--drivers/staging/rtl8192e/rtl_pm.c168
-rw-r--r--drivers/staging/rtl8192e/rtl_pm.h39
-rw-r--r--drivers/staging/rtl8192e/rtl_ps.c649
-rw-r--r--drivers/staging/rtl8192e/rtl_ps.h64
-rw-r--r--drivers/staging/rtl8192e/rtl_wx.c1509
-rw-r--r--drivers/staging/rtl8192e/rtl_wx.h31
-rw-r--r--drivers/staging/rtl8192e/rtllib.h3452
-rw-r--r--drivers/staging/rtl8192e/rtllib_crypt.c (renamed from drivers/staging/rtl8192e/ieee80211/ieee80211_crypt.c)87
-rw-r--r--drivers/staging/rtl8192e/rtllib_crypt.h (renamed from drivers/staging/rtl8192e/ieee80211/ieee80211_crypt.h)36
-rw-r--r--drivers/staging/rtl8192e/rtllib_crypt_ccmp.c (renamed from drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_ccmp.c)192
-rw-r--r--drivers/staging/rtl8192e/rtllib_crypt_tkip.c (renamed from drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_tkip.c)419
-rw-r--r--drivers/staging/rtl8192e/rtllib_crypt_wep.c (renamed from drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_wep.c)119
-rw-r--r--drivers/staging/rtl8192e/rtllib_endianfree.h156
-rw-r--r--drivers/staging/rtl8192e/rtllib_module.c374
-rw-r--r--drivers/staging/rtl8192e/rtllib_rx.c4234
-rw-r--r--drivers/staging/rtl8192e/rtllib_softmac.c4150
-rw-r--r--drivers/staging/rtl8192e/rtllib_softmac_wx.c (renamed from drivers/staging/rtl8192e/ieee80211/ieee80211_softmac_wx.c)316
-rw-r--r--drivers/staging/rtl8192e/rtllib_tx.c (renamed from drivers/staging/rtl8192e/ieee80211/ieee80211_tx.c)712
-rw-r--r--drivers/staging/rtl8192e/rtllib_wx.c (renamed from drivers/staging/rtl8192e/ieee80211/ieee80211_wx.c)441
76 files changed, 59867 insertions, 14253 deletions
diff --git a/drivers/staging/rtl8192e/Makefile b/drivers/staging/rtl8192e/Makefile
index 6e410674359..7cf7a52875e 100644
--- a/drivers/staging/rtl8192e/Makefile
+++ b/drivers/staging/rtl8192e/Makefile
@@ -1,38 +1,46 @@
1NIC_SELECT = RTL8192E 1NIC_SELECT = RTL8192E
2 2
3ccflags-y := -DRTL8192E 3ccflags-y += -DRTL8192E
4ccflags-y += -std=gnu89 4ccflags-y += -DEEPROM_OLD_FORMAT_SUPPORT=1
5ccflags-y += -O2 5ccflags-y += -DUSE_FW_SOURCE_IMG_FILE
6ccflags-y += -DTHOMAS_TURBO 6ccflags-y += -DENABLE_GPIO_RADIO_CTL
7ccflags-y += -DCONFIG_PM_RTL
8ccflags-y += -DCONFIG_PM
9ccflags-y += -DENABLE_DOT11D
10ccflags-y += -DHAVE_NET_DEVICE_OPS
7ccflags-y += -DENABLE_DOT11D 11ccflags-y += -DENABLE_DOT11D
8
9ccflags-y += -DENABLE_IPS
10ccflags-y += -DENABLE_LPS
11 12
12r8192e_pci-objs := \ 13r8192e_pci-objs := \
13 r8192E_core.o \ 14 rtl_core.o \
14 r8180_93cx6.o \ 15 rtl_eeprom.o \
15 r8192E_wx.o \ 16 rtl_ps.o \
16 r8190_rtl8256.o \ 17 rtl_wx.o \
17 r819xE_phy.o \ 18 rtl_cam.o \
18 r819xE_firmware.o \ 19 rtl_dm.o \
19 r819xE_cmdpkt.o \ 20 rtl_pm.o \
20 r8192E_dm.o \ 21 rtl_pci.o \
21 r8192_pm.o \ 22 rtl_debug.o \
22 ieee80211/ieee80211_rx.o \ 23 rtl_ethtool.o \
23 ieee80211/ieee80211_softmac.o \ 24 r8192E_dev.o \
24 ieee80211/ieee80211_tx.o \ 25 r8192E_phy.o \
25 ieee80211/ieee80211_wx.o \ 26 r8192E_firmware.o \
26 ieee80211/ieee80211_module.o \ 27 r8192E_cmdpkt.o \
27 ieee80211/ieee80211_softmac_wx.o \ 28 r8192E_hwimg.o \
28 ieee80211/rtl819x_HTProc.o \ 29 r8190P_rtl8256.o \
29 ieee80211/rtl819x_TSProc.o \ 30 rtllib_rx.o \
30 ieee80211/rtl819x_BAProc.o \ 31 rtllib_softmac.o \
31 ieee80211/dot11d.o \ 32 rtllib_tx.o \
32 ieee80211/ieee80211_crypt.o \ 33 rtllib_wx.o \
33 ieee80211/ieee80211_crypt_tkip.o \ 34 rtllib_module.o \
34 ieee80211/ieee80211_crypt_ccmp.o \ 35 rtllib_softmac_wx.o \
35 ieee80211/ieee80211_crypt_wep.o 36 rtl819x_HTProc.o \
37 rtl819x_TSProc.o \
38 rtl819x_BAProc.o \
39 dot11d.o \
40 rtllib_crypt.o \
41 rtllib_crypt_tkip.o \
42 rtllib_crypt_ccmp.o \
43 rtllib_crypt_wep.o
36 44
37obj-$(CONFIG_RTL8192E) += r8192e_pci.o 45obj-$(CONFIG_RTL8192E) += r8192e_pci.o
38 46
diff --git a/drivers/staging/rtl8192e/dot11d.c b/drivers/staging/rtl8192e/dot11d.c
new file mode 100644
index 00000000000..ee0381e0a81
--- /dev/null
+++ b/drivers/staging/rtl8192e/dot11d.c
@@ -0,0 +1,216 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/
19#include "dot11d.h"
20
21struct channel_list {
22 u8 Channel[32];
23 u8 Len;
24};
25
26static struct channel_list ChannelPlan[] = {
27 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64,
28 149, 153, 157, 161, 165}, 24},
29 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11}, 11},
30 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56,
31 60, 64}, 21},
32 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13},
33 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13},
34 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 40, 44, 48, 52,
35 56, 60, 64}, 22},
36 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 40, 44, 48, 52,
37 56, 60, 64}, 22},
38 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13},
39 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 40, 44, 48, 52,
40 56, 60, 64}, 22},
41 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 40, 44, 48, 52,
42 56, 60, 64}, 22},
43 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14}, 14},
44 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13},
45 {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52,
46 56, 60, 64}, 21}
47};
48
49void Dot11d_Init(struct rtllib_device *ieee)
50{
51 struct rt_dot11d_info *pDot11dInfo = GET_DOT11D_INFO(ieee);
52 pDot11dInfo->bEnabled = false;
53
54 pDot11dInfo->State = DOT11D_STATE_NONE;
55 pDot11dInfo->CountryIeLen = 0;
56 memset(pDot11dInfo->channel_map, 0, MAX_CHANNEL_NUMBER+1);
57 memset(pDot11dInfo->MaxTxPwrDbmList, 0xFF, MAX_CHANNEL_NUMBER+1);
58 RESET_CIE_WATCHDOG(ieee);
59
60}
61
62void Dot11d_Channelmap(u8 channel_plan, struct rtllib_device *ieee)
63{
64 int i, max_chan = 14, min_chan = 1;
65
66 ieee->bGlobalDomain = false;
67
68 if (ChannelPlan[channel_plan].Len != 0) {
69 memset(GET_DOT11D_INFO(ieee)->channel_map, 0,
70 sizeof(GET_DOT11D_INFO(ieee)->channel_map));
71 for (i = 0; i < ChannelPlan[channel_plan].Len; i++) {
72 if (ChannelPlan[channel_plan].Channel[i] < min_chan ||
73 ChannelPlan[channel_plan].Channel[i] > max_chan)
74 break;
75 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan
76 [channel_plan].Channel[i]] = 1;
77 }
78 }
79
80 switch (channel_plan) {
81 case COUNTRY_CODE_GLOBAL_DOMAIN:
82 ieee->bGlobalDomain = true;
83 for (i = 12; i <= 14; i++)
84 GET_DOT11D_INFO(ieee)->channel_map[i] = 2;
85 ieee->IbssStartChnl = 10;
86 ieee->ibss_maxjoin_chal = 11;
87 break;
88
89 case COUNTRY_CODE_WORLD_WIDE_13:
90 for (i = 12; i <= 13; i++)
91 GET_DOT11D_INFO(ieee)->channel_map[i] = 2;
92 ieee->IbssStartChnl = 10;
93 ieee->ibss_maxjoin_chal = 11;
94 break;
95
96 default:
97 ieee->IbssStartChnl = 1;
98 ieee->ibss_maxjoin_chal = 14;
99 break;
100 }
101}
102
103
104void Dot11d_Reset(struct rtllib_device *ieee)
105{
106 struct rt_dot11d_info *pDot11dInfo = GET_DOT11D_INFO(ieee);
107 u32 i;
108
109 memset(pDot11dInfo->channel_map, 0, MAX_CHANNEL_NUMBER+1);
110 memset(pDot11dInfo->MaxTxPwrDbmList, 0xFF, MAX_CHANNEL_NUMBER+1);
111 for (i = 1; i <= 11; i++)
112 (pDot11dInfo->channel_map)[i] = 1;
113 for (i = 12; i <= 14; i++)
114 (pDot11dInfo->channel_map)[i] = 2;
115 pDot11dInfo->State = DOT11D_STATE_NONE;
116 pDot11dInfo->CountryIeLen = 0;
117 RESET_CIE_WATCHDOG(ieee);
118}
119
120void Dot11d_UpdateCountryIe(struct rtllib_device *dev, u8 *pTaddr,
121 u16 CoutryIeLen, u8 *pCoutryIe)
122{
123 struct rt_dot11d_info *pDot11dInfo = GET_DOT11D_INFO(dev);
124 u8 i, j, NumTriples, MaxChnlNum;
125 struct chnl_txpow_triple *pTriple;
126
127 memset(pDot11dInfo->channel_map, 0, MAX_CHANNEL_NUMBER+1);
128 memset(pDot11dInfo->MaxTxPwrDbmList, 0xFF, MAX_CHANNEL_NUMBER+1);
129 MaxChnlNum = 0;
130 NumTriples = (CoutryIeLen - 3) / 3;
131 pTriple = (struct chnl_txpow_triple *)(pCoutryIe + 3);
132 for (i = 0; i < NumTriples; i++) {
133 if (MaxChnlNum >= pTriple->FirstChnl) {
134 printk(KERN_INFO "Dot11d_UpdateCountryIe(): Invalid"
135 " country IE, skip it........1\n");
136 return;
137 }
138 if (MAX_CHANNEL_NUMBER < (pTriple->FirstChnl +
139 pTriple->NumChnls)) {
140 printk(KERN_INFO "Dot11d_UpdateCountryIe(): Invalid "
141 "country IE, skip it........2\n");
142 return;
143 }
144
145 for (j = 0 ; j < pTriple->NumChnls; j++) {
146 pDot11dInfo->channel_map[pTriple->FirstChnl + j] = 1;
147 pDot11dInfo->MaxTxPwrDbmList[pTriple->FirstChnl + j] =
148 pTriple->MaxTxPowerInDbm;
149 MaxChnlNum = pTriple->FirstChnl + j;
150 }
151
152 pTriple = (struct chnl_txpow_triple *)((u8*)pTriple + 3);
153 }
154
155 UPDATE_CIE_SRC(dev, pTaddr);
156
157 pDot11dInfo->CountryIeLen = CoutryIeLen;
158 memcpy(pDot11dInfo->CountryIeBuf, pCoutryIe, CoutryIeLen);
159 pDot11dInfo->State = DOT11D_STATE_LEARNED;
160}
161
162u8 DOT11D_GetMaxTxPwrInDbm(struct rtllib_device *dev, u8 Channel)
163{
164 struct rt_dot11d_info *pDot11dInfo = GET_DOT11D_INFO(dev);
165 u8 MaxTxPwrInDbm = 255;
166
167 if (MAX_CHANNEL_NUMBER < Channel) {
168 printk(KERN_INFO "DOT11D_GetMaxTxPwrInDbm(): Invalid "
169 "Channel\n");
170 return MaxTxPwrInDbm;
171 }
172 if (pDot11dInfo->channel_map[Channel])
173 MaxTxPwrInDbm = pDot11dInfo->MaxTxPwrDbmList[Channel];
174
175 return MaxTxPwrInDbm;
176}
177
178void DOT11D_ScanComplete(struct rtllib_device *dev)
179{
180 struct rt_dot11d_info *pDot11dInfo = GET_DOT11D_INFO(dev);
181
182 switch (pDot11dInfo->State) {
183 case DOT11D_STATE_LEARNED:
184 pDot11dInfo->State = DOT11D_STATE_DONE;
185 break;
186 case DOT11D_STATE_DONE:
187 Dot11d_Reset(dev);
188 break;
189 case DOT11D_STATE_NONE:
190 break;
191 }
192}
193
194int ToLegalChannel(struct rtllib_device *dev, u8 channel)
195{
196 struct rt_dot11d_info *pDot11dInfo = GET_DOT11D_INFO(dev);
197 u8 default_chn = 0;
198 u32 i;
199
200 for (i = 1; i <= MAX_CHANNEL_NUMBER; i++) {
201 if (pDot11dInfo->channel_map[i] > 0) {
202 default_chn = i;
203 break;
204 }
205 }
206
207 if (MAX_CHANNEL_NUMBER < channel) {
208 printk(KERN_ERR "%s(): Invalid Channel\n", __func__);
209 return default_chn;
210 }
211
212 if (pDot11dInfo->channel_map[channel] > 0)
213 return channel;
214
215 return default_chn;
216}
diff --git a/drivers/staging/rtl8192e/dot11d.h b/drivers/staging/rtl8192e/dot11d.h
index 8e644614f21..032f7004a7f 100644
--- a/drivers/staging/rtl8192e/dot11d.h
+++ b/drivers/staging/rtl8192e/dot11d.h
@@ -1,24 +1,42 @@
1#ifndef INC_DOT11D_H 1/******************************************************************************
2#define INC_DOT11D_H 2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 3 *
4#ifdef ENABLE_DOT11D 4 * This program is distributed in the hope that it will be useful, but WITHOUT
5#include "ieee80211.h" 5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7struct _CHNL_TXPOWER_TRIPLE { 7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/
19#ifndef __INC_DOT11D_H
20#define __INC_DOT11D_H
21
22#include "rtllib.h"
23
24
25
26struct chnl_txpow_triple {
8 u8 FirstChnl; 27 u8 FirstChnl;
9 u8 NumChnls; 28 u8 NumChnls;
10 u8 MaxTxPowerInDbm; 29 u8 MaxTxPowerInDbm;
11}; 30};
12 31
13enum _DOT11D_STATE { 32enum dot11d_state {
14 DOT11D_STATE_NONE = 0, 33 DOT11D_STATE_NONE = 0,
15 DOT11D_STATE_LEARNED, 34 DOT11D_STATE_LEARNED,
16 DOT11D_STATE_DONE, 35 DOT11D_STATE_DONE,
17}; 36};
18 37
19/** 38/**
20 * struct _RT_DOT11D_INFO 39 * struct rt_dot11d_info * @CountryIeLen: value greater than 0 if @CountryIeBuf contains
21 * @CountryIeLen: value greater than 0 if @CountryIeBuf contains
22 * valid country information element. 40 * valid country information element.
23 * @chanell_map: holds channel values 41 * @chanell_map: holds channel values
24 * 0 - invalid, 42 * 0 - invalid,
@@ -27,18 +45,19 @@ enum _DOT11D_STATE {
27 * @CountryIeSrcAddr - Source AP of the country IE 45 * @CountryIeSrcAddr - Source AP of the country IE
28 */ 46 */
29 47
30struct _RT_DOT11D_INFO { 48struct rt_dot11d_info {
49
31 bool bEnabled; 50 bool bEnabled;
32 51
33 u16 CountryIeLen; 52 u16 CountryIeLen;
34 u8 CountryIeBuf[MAX_IE_LEN]; 53 u8 CountryIeBuf[MAX_IE_LEN];
35 u8 CountryIeSrcAddr[6]; 54 u8 CountryIeSrcAddr[6];
36 u8 CountryIeWatchdog; 55 u8 CountryIeWatchdog;
37 56
38 u8 channel_map[MAX_CHANNEL_NUMBER+1]; 57 u8 channel_map[MAX_CHANNEL_NUMBER+1];
39 u8 MaxTxPwrDbmList[MAX_CHANNEL_NUMBER+1]; 58 u8 MaxTxPwrDbmList[MAX_CHANNEL_NUMBER+1];
40 59
41 DOT11D_STATE State; 60 enum dot11d_state State;
42}; 61};
43 62
44static inline void cpMacAddr(unsigned char *des, unsigned char *src) 63static inline void cpMacAddr(unsigned char *des, unsigned char *src)
@@ -46,49 +65,41 @@ static inline void cpMacAddr(unsigned char *des, unsigned char *src)
46 memcpy(des, src, 6); 65 memcpy(des, src, 6);
47} 66}
48 67
49#define GET_DOT11D_INFO(__pIeeeDev) ((PRT_DOT11D_INFO) \ 68#define GET_DOT11D_INFO(__pIeeeDev) \
50 ((__pIeeeDev)->pDot11dInfo)) 69 ((struct rt_dot11d_info *)((__pIeeeDev)->pDot11dInfo))
51 70
52#define IS_DOT11D_ENABLE(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->bEnabled) 71#define IS_DOT11D_ENABLE(__pIeeeDev) \
53#define IS_COUNTRY_IE_VALID(__pIeeeDev) \ 72 (GET_DOT11D_INFO(__pIeeeDev)->bEnabled)
54 (GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen > 0) 73#define IS_COUNTRY_IE_VALID(__pIeeeDev) \
74 (GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen > 0)
55 75
56#define IS_EQUAL_CIE_SRC(__pIeeeDev, __pTa) \ 76#define IS_EQUAL_CIE_SRC(__pIeeeDev, __pTa) \
57 eqMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa) 77 eqMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa)
58 78#define UPDATE_CIE_SRC(__pIeeeDev, __pTa) \
59#define UPDATE_CIE_SRC(__pIeeeDev, __pTa) \ 79 cpMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa)
60 cpMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa)
61 80
62#define IS_COUNTRY_IE_CHANGED(__pIeeeDev, __Ie) \ 81#define IS_COUNTRY_IE_CHANGED(__pIeeeDev, __Ie) \
63 (((__Ie).Length == 0 || (__Ie).Length != \ 82 (((__Ie).Length == 0 || (__Ie).Length != \
64 GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen) ? FALSE : \ 83 GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen) ? \
65 (!memcmp(GET_DOT11D_INFO(__pIeeeDev)->CountryIeBuf, \ 84 false : (!memcmp(GET_DOT11D_INFO(__pIeeeDev)->CountryIeBuf, \
66 (__Ie).Octet, (__Ie).Length))) 85 (__Ie).Octet, (__Ie).Length)))
67 86
68#define CIE_WATCHDOG_TH 1 87#define CIE_WATCHDOG_TH 1
69#define GET_CIE_WATCHDOG(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)-> \ 88#define GET_CIE_WATCHDOG(__pIeeeDev) \
70 CountryIeWatchdog) 89 (GET_DOT11D_INFO(__pIeeeDev)->CountryIeWatchdog)
71#define RESET_CIE_WATCHDOG(__pIeeeDev) GET_CIE_WATCHDOG(__pIeeeDev) = 0 90#define RESET_CIE_WATCHDOG(__pIeeeDev) GET_CIE_WATCHDOG(__pIeeeDev) = 0
72#define UPDATE_CIE_WATCHDOG(__pIeeeDev) (++GET_CIE_WATCHDOG(__pIeeeDev)) 91#define UPDATE_CIE_WATCHDOG(__pIeeeDev) (++GET_CIE_WATCHDOG(__pIeeeDev))
73 92
74#define IS_DOT11D_STATE_DONE(__pIeeeDev) \ 93#define IS_DOT11D_STATE_DONE(__pIeeeDev) \
75 (GET_DOT11D_INFO(__pIeeeDev)->State == DOT11D_STATE_DONE) 94 (GET_DOT11D_INFO(__pIeeeDev)->State == DOT11D_STATE_DONE)
76
77
78void Dot11d_Init(struct ieee80211_device *dev);
79
80void Dot11d_Reset(struct ieee80211_device *dev);
81
82void Dot11d_UpdateCountryIe(struct ieee80211_device *dev, u8 *pTaddr,
83 u16 CoutryIeLen, u8 *pCoutryIe);
84
85u8 DOT11D_GetMaxTxPwrInDbm(struct ieee80211_device *dev, u8 channel);
86
87void DOT11D_ScanComplete(struct ieee80211_device *dev);
88
89int IsLegalChannel(struct ieee80211_device *dev, u8 channel);
90 95
91int ToLegalChannel(struct ieee80211_device *dev, u8 channel); 96void Dot11d_Init(struct rtllib_device *dev);
97void Dot11d_Channelmap(u8 channel_plan, struct rtllib_device *ieee);
98void Dot11d_Reset(struct rtllib_device *dev);
99void Dot11d_UpdateCountryIe(struct rtllib_device *dev, u8 *pTaddr,
100 u16 CoutryIeLen, u8 *pCoutryIe);
101u8 DOT11D_GetMaxTxPwrInDbm(struct rtllib_device *dev, u8 Channel);
102void DOT11D_ScanComplete(struct rtllib_device *dev);
103int ToLegalChannel(struct rtllib_device *dev, u8 channel);
92 104
93#endif /* ENABLE_DOT11D */ 105#endif
94#endif /* INC_DOT11D_H */
diff --git a/drivers/staging/rtl8192e/ieee80211/dot11d.c b/drivers/staging/rtl8192e/ieee80211/dot11d.c
deleted file mode 100644
index 98e46487dc0..00000000000
--- a/drivers/staging/rtl8192e/ieee80211/dot11d.c
+++ /dev/null
@@ -1,218 +0,0 @@
1#ifdef ENABLE_DOT11D
2//-----------------------------------------------------------------------------
3// File:
4// Dot11d.c
5//
6// Description:
7// Implement 802.11d.
8//
9//-----------------------------------------------------------------------------
10
11#include "dot11d.h"
12
13void
14Dot11d_Init(struct ieee80211_device *ieee)
15{
16 PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(ieee);
17
18 pDot11dInfo->bEnabled = 0;
19
20 pDot11dInfo->State = DOT11D_STATE_NONE;
21 pDot11dInfo->CountryIeLen = 0;
22 memset(pDot11dInfo->channel_map, 0, MAX_CHANNEL_NUMBER+1);
23 memset(pDot11dInfo->MaxTxPwrDbmList, 0xFF, MAX_CHANNEL_NUMBER+1);
24 RESET_CIE_WATCHDOG(ieee);
25
26 printk("Dot11d_Init()\n");
27}
28
29//
30// Description:
31// Reset to the state as we are just entering a regulatory domain.
32//
33void
34Dot11d_Reset(struct ieee80211_device *ieee)
35{
36 u32 i;
37 PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(ieee);
38#if 0
39 if(!pDot11dInfo->bEnabled)
40 return;
41#endif
42 // Clear old channel map
43 memset(pDot11dInfo->channel_map, 0, MAX_CHANNEL_NUMBER+1);
44 memset(pDot11dInfo->MaxTxPwrDbmList, 0xFF, MAX_CHANNEL_NUMBER+1);
45 // Set new channel map
46 for (i=1; i<=11; i++) {
47 (pDot11dInfo->channel_map)[i] = 1;
48 }
49 for (i=12; i<=14; i++) {
50 (pDot11dInfo->channel_map)[i] = 2;
51 }
52
53 pDot11dInfo->State = DOT11D_STATE_NONE;
54 pDot11dInfo->CountryIeLen = 0;
55 RESET_CIE_WATCHDOG(ieee);
56}
57
58//
59// Description:
60// Update country IE from Beacon or Probe Resopnse
61// and configure PHY for operation in the regulatory domain.
62//
63// TODO:
64// Configure Tx power.
65//
66// Assumption:
67// 1. IS_DOT11D_ENABLE() is TRUE.
68// 2. Input IE is an valid one.
69//
70void
71Dot11d_UpdateCountryIe(
72 struct ieee80211_device *dev,
73 u8 * pTaddr,
74 u16 CoutryIeLen,
75 u8 * pCoutryIe
76 )
77{
78 PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);
79 u8 i, j, NumTriples, MaxChnlNum;
80 PCHNL_TXPOWER_TRIPLE pTriple;
81
82 memset(pDot11dInfo->channel_map, 0, MAX_CHANNEL_NUMBER+1);
83 memset(pDot11dInfo->MaxTxPwrDbmList, 0xFF, MAX_CHANNEL_NUMBER+1);
84 MaxChnlNum = 0;
85 NumTriples = (CoutryIeLen - 3) / 3; // skip 3-byte country string.
86 pTriple = (PCHNL_TXPOWER_TRIPLE)(pCoutryIe + 3);
87 for(i = 0; i < NumTriples; i++)
88 {
89 if(MaxChnlNum >= pTriple->FirstChnl)
90 { // It is not in a monotonically increasing order, so stop processing.
91 printk("Dot11d_UpdateCountryIe(): Invalid country IE, skip it........1\n");
92 return;
93 }
94 if(MAX_CHANNEL_NUMBER < (pTriple->FirstChnl + pTriple->NumChnls))
95 { // It is not a valid set of channel id, so stop processing.
96 printk("Dot11d_UpdateCountryIe(): Invalid country IE, skip it........2\n");
97 return;
98 }
99
100 for(j = 0 ; j < pTriple->NumChnls; j++)
101 {
102 pDot11dInfo->channel_map[pTriple->FirstChnl + j] = 1;
103 pDot11dInfo->MaxTxPwrDbmList[pTriple->FirstChnl + j] = pTriple->MaxTxPowerInDbm;
104 MaxChnlNum = pTriple->FirstChnl + j;
105 }
106
107 pTriple = (PCHNL_TXPOWER_TRIPLE)((u8*)pTriple + 3);
108 }
109#if 1
110 printk("Channel List:");
111 for(i=1; i<= MAX_CHANNEL_NUMBER; i++)
112 if(pDot11dInfo->channel_map[i] > 0)
113 printk(" %d", i);
114 printk("\n");
115#endif
116
117 UPDATE_CIE_SRC(dev, pTaddr);
118
119 pDot11dInfo->CountryIeLen = CoutryIeLen;
120 memcpy(pDot11dInfo->CountryIeBuf, pCoutryIe,CoutryIeLen);
121 pDot11dInfo->State = DOT11D_STATE_LEARNED;
122}
123
124
125u8
126DOT11D_GetMaxTxPwrInDbm(
127 struct ieee80211_device *dev,
128 u8 Channel
129 )
130{
131 PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);
132 u8 MaxTxPwrInDbm = 255;
133
134 if(MAX_CHANNEL_NUMBER < Channel)
135 {
136 printk("DOT11D_GetMaxTxPwrInDbm(): Invalid Channel\n");
137 return MaxTxPwrInDbm;
138 }
139 if(pDot11dInfo->channel_map[Channel])
140 {
141 MaxTxPwrInDbm = pDot11dInfo->MaxTxPwrDbmList[Channel];
142 }
143
144 return MaxTxPwrInDbm;
145}
146
147
148void
149DOT11D_ScanComplete(
150 struct ieee80211_device * dev
151 )
152{
153 PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);
154
155 switch(pDot11dInfo->State)
156 {
157 case DOT11D_STATE_LEARNED:
158 pDot11dInfo->State = DOT11D_STATE_DONE;
159 break;
160
161 case DOT11D_STATE_DONE:
162 if( GET_CIE_WATCHDOG(dev) == 0 )
163 { // Reset country IE if previous one is gone.
164 Dot11d_Reset(dev);
165 }
166 break;
167 case DOT11D_STATE_NONE:
168 break;
169 }
170}
171
172int IsLegalChannel(
173 struct ieee80211_device * dev,
174 u8 channel
175)
176{
177 PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);
178
179 if(MAX_CHANNEL_NUMBER < channel)
180 {
181 printk("IsLegalChannel(): Invalid Channel\n");
182 return 0;
183 }
184 if(pDot11dInfo->channel_map[channel] > 0)
185 return 1;
186 return 0;
187}
188
189int ToLegalChannel(
190 struct ieee80211_device * dev,
191 u8 channel
192)
193{
194 PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);
195 u8 default_chn = 0;
196 u32 i = 0;
197
198 for (i=1; i<= MAX_CHANNEL_NUMBER; i++)
199 {
200 if(pDot11dInfo->channel_map[i] > 0)
201 {
202 default_chn = i;
203 break;
204 }
205 }
206
207 if(MAX_CHANNEL_NUMBER < channel)
208 {
209 printk("IsLegalChannel(): Invalid Channel\n");
210 return default_chn;
211 }
212
213 if(pDot11dInfo->channel_map[channel] > 0)
214 return channel;
215
216 return default_chn;
217}
218#endif
diff --git a/drivers/staging/rtl8192e/ieee80211/dot11d.h b/drivers/staging/rtl8192e/ieee80211/dot11d.h
deleted file mode 100644
index 15b7a4ba37b..00000000000
--- a/drivers/staging/rtl8192e/ieee80211/dot11d.h
+++ /dev/null
@@ -1,102 +0,0 @@
1#ifndef __INC_DOT11D_H
2#define __INC_DOT11D_H
3
4#ifdef ENABLE_DOT11D
5#include "ieee80211.h"
6
7//#define ENABLE_DOT11D
8
9//#define DOT11D_MAX_CHNL_NUM 83
10
11typedef struct _CHNL_TXPOWER_TRIPLE {
12 u8 FirstChnl;
13 u8 NumChnls;
14 u8 MaxTxPowerInDbm;
15}CHNL_TXPOWER_TRIPLE, *PCHNL_TXPOWER_TRIPLE;
16
17typedef enum _DOT11D_STATE {
18 DOT11D_STATE_NONE = 0,
19 DOT11D_STATE_LEARNED,
20 DOT11D_STATE_DONE,
21}DOT11D_STATE;
22
23typedef struct _RT_DOT11D_INFO {
24 //DECLARE_RT_OBJECT(RT_DOT11D_INFO);
25
26 bool bEnabled; // dot11MultiDomainCapabilityEnabled
27
28 u16 CountryIeLen; // > 0 if CountryIeBuf[] contains valid country information element.
29 u8 CountryIeBuf[MAX_IE_LEN];
30 u8 CountryIeSrcAddr[6]; // Source AP of the country IE.
31 u8 CountryIeWatchdog;
32
33 u8 channel_map[MAX_CHANNEL_NUMBER+1]; //!!!Value 0: Invalid, 1: Valid (active scan), 2: Valid (passive scan)
34 //u8 ChnlListLen; // #Bytes valid in ChnlList[].
35 //u8 ChnlList[DOT11D_MAX_CHNL_NUM];
36 u8 MaxTxPwrDbmList[MAX_CHANNEL_NUMBER+1];
37
38 DOT11D_STATE State;
39}RT_DOT11D_INFO, *PRT_DOT11D_INFO;
40#define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
41#define cpMacAddr(des,src) ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5])
42#define GET_DOT11D_INFO(__pIeeeDev) ((PRT_DOT11D_INFO)((__pIeeeDev)->pDot11dInfo))
43
44#define IS_DOT11D_ENABLE(__pIeeeDev) GET_DOT11D_INFO(__pIeeeDev)->bEnabled
45#define IS_COUNTRY_IE_VALID(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen > 0)
46
47#define IS_EQUAL_CIE_SRC(__pIeeeDev, __pTa) eqMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa)
48#define UPDATE_CIE_SRC(__pIeeeDev, __pTa) cpMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa)
49
50#define IS_COUNTRY_IE_CHANGED(__pIeeeDev, __Ie) \
51 (((__Ie).Length == 0 || (__Ie).Length != GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen) ? \
52 FALSE : \
53 (!memcmp(GET_DOT11D_INFO(__pIeeeDev)->CountryIeBuf, (__Ie).Octet, (__Ie).Length)))
54
55#define CIE_WATCHDOG_TH 1
56#define GET_CIE_WATCHDOG(__pIeeeDev) GET_DOT11D_INFO(__pIeeeDev)->CountryIeWatchdog
57#define RESET_CIE_WATCHDOG(__pIeeeDev) GET_CIE_WATCHDOG(__pIeeeDev) = 0
58#define UPDATE_CIE_WATCHDOG(__pIeeeDev) ++GET_CIE_WATCHDOG(__pIeeeDev)
59
60#define IS_DOT11D_STATE_DONE(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->State == DOT11D_STATE_DONE)
61
62
63void
64Dot11d_Init(
65 struct ieee80211_device *dev
66 );
67
68void
69Dot11d_Reset(
70 struct ieee80211_device *dev
71 );
72
73void
74Dot11d_UpdateCountryIe(
75 struct ieee80211_device *dev,
76 u8 * pTaddr,
77 u16 CoutryIeLen,
78 u8 * pCoutryIe
79 );
80
81u8
82DOT11D_GetMaxTxPwrInDbm(
83 struct ieee80211_device *dev,
84 u8 Channel
85 );
86
87void
88DOT11D_ScanComplete(
89 struct ieee80211_device * dev
90 );
91
92int IsLegalChannel(
93 struct ieee80211_device * dev,
94 u8 channel
95);
96
97int ToLegalChannel(
98 struct ieee80211_device * dev,
99 u8 channel
100);
101#endif //ENABLE_DOT11D
102#endif // #ifndef __INC_DOT11D_H
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211.h b/drivers/staging/rtl8192e/ieee80211/ieee80211.h
deleted file mode 100644
index 6d7963e5b6a..00000000000
--- a/drivers/staging/rtl8192e/ieee80211/ieee80211.h
+++ /dev/null
@@ -1,2636 +0,0 @@
1/*
2 * Merged with mainline ieee80211.h in Aug 2004. Original ieee802_11
3 * remains copyright by the original authors
4 *
5 * Portions of the merged code are based on Host AP (software wireless
6 * LAN access point) driver for Intersil Prism2/2.5/3.
7 *
8 * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
9 * <jkmaline@cc.hut.fi>
10 * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
11 *
12 * Adaption to a generic IEEE 802.11 stack by James Ketrenos
13 * <jketreno@linux.intel.com>
14 * Copyright (c) 2004, Intel Corporation
15 *
16 * Modified for Realtek's wi-fi cards by Andrea Merello
17 * <andreamrl@tiscali.it>
18 *
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License version 2 as
21 * published by the Free Software Foundation. See README and COPYING for
22 * more details.
23 */
24#ifndef IEEE80211_H
25#define IEEE80211_H
26#include <linux/if_ether.h> /* ETH_ALEN */
27#include <linux/kernel.h> /* ARRAY_SIZE */
28#include <linux/module.h>
29#include <linux/jiffies.h>
30#include <linux/timer.h>
31#include <linux/sched.h>
32#include <linux/semaphore.h>
33#include <linux/interrupt.h>
34
35#include <linux/delay.h>
36#include <linux/wireless.h>
37
38#include "rtl819x_HT.h"
39#include "rtl819x_BA.h"
40#include "rtl819x_TS.h"
41
42#ifndef IW_MODE_MONITOR
43#define IW_MODE_MONITOR 6
44#endif
45
46#ifndef IWEVCUSTOM
47#define IWEVCUSTOM 0x8c02
48#endif
49
50#ifndef container_of
51/**
52 * container_of - cast a member of a structure out to the containing structure
53 *
54 * @ptr: the pointer to the member.
55 * @type: the type of the container struct this is embedded in.
56 * @member: the name of the member within the struct.
57 *
58 */
59#define container_of(ptr, type, member) ({ \
60 const typeof( ((type *)0)->member ) *__mptr = (ptr); \
61 (type *)( (char *)__mptr - offsetof(type,member) );})
62#endif
63
64#define KEY_TYPE_NA 0x0
65#define KEY_TYPE_WEP40 0x1
66#define KEY_TYPE_TKIP 0x2
67#define KEY_TYPE_CCMP 0x4
68#define KEY_TYPE_WEP104 0x5
69
70/* added for rtl819x tx procedure */
71#define MAX_QUEUE_SIZE 0x10
72
73//
74// 8190 queue mapping
75//
76#define BK_QUEUE 0
77#define BE_QUEUE 1
78#define VI_QUEUE 2
79#define VO_QUEUE 3
80#define HCCA_QUEUE 4
81#define TXCMD_QUEUE 5
82#define MGNT_QUEUE 6
83#define HIGH_QUEUE 7
84#define BEACON_QUEUE 8
85
86#define LOW_QUEUE BE_QUEUE
87#define NORMAL_QUEUE MGNT_QUEUE
88
89//added by amy for ps
90#define SWRF_TIMEOUT 50
91
92//added by amy for LEAP related
93#define IE_CISCO_FLAG_POSITION 0x08 // Flag byte: byte 8, numbered from 0.
94#define SUPPORT_CKIP_MIC 0x08 // bit3
95#define SUPPORT_CKIP_PK 0x10 // bit4
96/* defined for skb cb field */
97/* At most 28 byte */
98typedef struct cb_desc {
99 /* Tx Desc Related flags (8-9) */
100 u8 bLastIniPkt:1;
101 u8 bCmdOrInit:1;
102 u8 bFirstSeg:1;
103 u8 bLastSeg:1;
104 u8 bEncrypt:1;
105 u8 bTxDisableRateFallBack:1;
106 u8 bTxUseDriverAssingedRate:1;
107 u8 bHwSec:1; //indicate whether use Hw security. WB
108
109 u8 reserved1;
110
111 /* Tx Firmware Relaged flags (10-11)*/
112 u8 bCTSEnable:1;
113 u8 bRTSEnable:1;
114 u8 bUseShortGI:1;
115 u8 bUseShortPreamble:1;
116 u8 bTxEnableFwCalcDur:1;
117 u8 bAMPDUEnable:1;
118 u8 bRTSSTBC:1;
119 u8 RTSSC:1;
120
121 u8 bRTSBW:1;
122 u8 bPacketBW:1;
123 u8 bRTSUseShortPreamble:1;
124 u8 bRTSUseShortGI:1;
125 u8 bMulticast:1;
126 u8 bBroadcast:1;
127 //u8 reserved2:2;
128 u8 drv_agg_enable:1;
129 u8 reserved2:1;
130
131 /* Tx Desc related element(12-19) */
132 u8 rata_index;
133 u8 queue_index;
134 //u8 reserved3;
135 //u8 reserved4;
136 u16 txbuf_size;
137 //u8 reserved5;
138 u8 RATRIndex;
139 u8 reserved6;
140 u8 reserved7;
141 u8 reserved8;
142
143 /* Tx firmware related element(20-27) */
144 u8 data_rate;
145 u8 rts_rate;
146 u8 ampdu_factor;
147 u8 ampdu_density;
148 //u8 reserved9;
149 //u8 reserved10;
150 //u8 reserved11;
151 u8 DrvAggrNum;
152 u16 pkt_size;
153 u8 reserved12;
154
155 u8 bdhcp;
156}cb_desc, *pcb_desc;
157
158/*--------------------------Define -------------------------------------------*/
159#define MGN_1M 0x02
160#define MGN_2M 0x04
161#define MGN_5_5M 0x0b
162#define MGN_11M 0x16
163
164#define MGN_6M 0x0c
165#define MGN_9M 0x12
166#define MGN_12M 0x18
167#define MGN_18M 0x24
168#define MGN_24M 0x30
169#define MGN_36M 0x48
170#define MGN_48M 0x60
171#define MGN_54M 0x6c
172
173#define MGN_MCS0 0x80
174#define MGN_MCS1 0x81
175#define MGN_MCS2 0x82
176#define MGN_MCS3 0x83
177#define MGN_MCS4 0x84
178#define MGN_MCS5 0x85
179#define MGN_MCS6 0x86
180#define MGN_MCS7 0x87
181#define MGN_MCS8 0x88
182#define MGN_MCS9 0x89
183#define MGN_MCS10 0x8a
184#define MGN_MCS11 0x8b
185#define MGN_MCS12 0x8c
186#define MGN_MCS13 0x8d
187#define MGN_MCS14 0x8e
188#define MGN_MCS15 0x8f
189
190//----------------------------------------------------------------------------
191// 802.11 Management frame Reason Code field
192//----------------------------------------------------------------------------
193enum _ReasonCode{
194 unspec_reason = 0x1,
195 auth_not_valid = 0x2,
196 deauth_lv_ss = 0x3,
197 inactivity = 0x4,
198 ap_overload = 0x5,
199 class2_err = 0x6,
200 class3_err = 0x7,
201 disas_lv_ss = 0x8,
202 asoc_not_auth = 0x9,
203
204 //----MIC_CHECK
205 mic_failure = 0xe,
206 //----END MIC_CHECK
207
208 // Reason code defined in 802.11i D10.0 p.28.
209 invalid_IE = 0x0d,
210 four_way_tmout = 0x0f,
211 two_way_tmout = 0x10,
212 IE_dismatch = 0x11,
213 invalid_Gcipher = 0x12,
214 invalid_Pcipher = 0x13,
215 invalid_AKMP = 0x14,
216 unsup_RSNIEver = 0x15,
217 invalid_RSNIE = 0x16,
218 auth_802_1x_fail= 0x17,
219 ciper_reject = 0x18,
220
221 // Reason code defined in 7.3.1.7, 802.1e D13.0, p.42. Added by Annie, 2005-11-15.
222 QoS_unspec = 0x20, // 32
223 QAP_bandwidth = 0x21, // 33
224 poor_condition = 0x22, // 34
225 no_facility = 0x23, // 35
226 // Where is 36???
227 req_declined = 0x25, // 37
228 invalid_param = 0x26, // 38
229 req_not_honored= 0x27, // 39
230 TS_not_created = 0x2F, // 47
231 DL_not_allowed = 0x30, // 48
232 dest_not_exist = 0x31, // 49
233 dest_not_QSTA = 0x32, // 50
234};
235
236
237
238#define aSifsTime (((priv->ieee80211->current_network.mode == IEEE_A)||(priv->ieee80211->current_network.mode == IEEE_N_24G)||(priv->ieee80211->current_network.mode == IEEE_N_5G))? 16 : 10)
239
240#define MGMT_QUEUE_NUM 5
241
242#define IEEE_CMD_SET_WPA_PARAM 1
243#define IEEE_CMD_SET_WPA_IE 2
244#define IEEE_CMD_SET_ENCRYPTION 3
245#define IEEE_CMD_MLME 4
246
247#define IEEE_PARAM_WPA_ENABLED 1
248#define IEEE_PARAM_TKIP_COUNTERMEASURES 2
249#define IEEE_PARAM_DROP_UNENCRYPTED 3
250#define IEEE_PARAM_PRIVACY_INVOKED 4
251#define IEEE_PARAM_AUTH_ALGS 5
252#define IEEE_PARAM_IEEE_802_1X 6
253//It should consistent with the driver_XXX.c
254// David, 2006.9.26
255#define IEEE_PARAM_WPAX_SELECT 7
256//Added for notify the encryption type selection
257// David, 2006.9.26
258#define IEEE_PROTO_WPA 1
259#define IEEE_PROTO_RSN 2
260//Added for notify the encryption type selection
261// David, 2006.9.26
262#define IEEE_WPAX_USEGROUP 0
263#define IEEE_WPAX_WEP40 1
264#define IEEE_WPAX_TKIP 2
265#define IEEE_WPAX_WRAP 3
266#define IEEE_WPAX_CCMP 4
267#define IEEE_WPAX_WEP104 5
268
269#define IEEE_KEY_MGMT_IEEE8021X 1
270#define IEEE_KEY_MGMT_PSK 2
271
272#define IEEE_MLME_STA_DEAUTH 1
273#define IEEE_MLME_STA_DISASSOC 2
274
275
276#define IEEE_CRYPT_ERR_UNKNOWN_ALG 2
277#define IEEE_CRYPT_ERR_UNKNOWN_ADDR 3
278#define IEEE_CRYPT_ERR_CRYPT_INIT_FAILED 4
279#define IEEE_CRYPT_ERR_KEY_SET_FAILED 5
280#define IEEE_CRYPT_ERR_TX_KEY_SET_FAILED 6
281#define IEEE_CRYPT_ERR_CARD_CONF_FAILED 7
282
283
284#define IEEE_CRYPT_ALG_NAME_LEN 16
285
286#define MAX_IE_LEN 0xff
287
288// added for kernel conflict
289#define ieee80211_crypt_deinit_entries ieee80211_crypt_deinit_entries_rsl
290#define ieee80211_crypt_deinit_handler ieee80211_crypt_deinit_handler_rsl
291#define ieee80211_crypt_delayed_deinit ieee80211_crypt_delayed_deinit_rsl
292#define ieee80211_register_crypto_ops ieee80211_register_crypto_ops_rsl
293#define ieee80211_unregister_crypto_ops ieee80211_unregister_crypto_ops_rsl
294#define ieee80211_get_crypto_ops ieee80211_get_crypto_ops_rsl
295
296#define ieee80211_ccmp_null ieee80211_ccmp_null_rsl
297
298#define ieee80211_tkip_null ieee80211_tkip_null_rsl
299
300#define ieee80211_wep_null ieee80211_wep_null_rsl
301
302#define free_ieee80211 free_ieee80211_rsl
303#define alloc_ieee80211 alloc_ieee80211_rsl
304
305#define ieee80211_rx ieee80211_rx_rsl
306#define ieee80211_rx_mgt ieee80211_rx_mgt_rsl
307
308#define ieee80211_get_beacon ieee80211_get_beacon_rsl
309#define ieee80211_rtl_wake_queue ieee80211_rtl_wake_queue_rsl
310#define ieee80211_rtl_stop_queue ieee80211_rtl_stop_queue_rsl
311#define ieee80211_reset_queue ieee80211_reset_queue_rsl
312#define ieee80211_softmac_stop_protocol ieee80211_softmac_stop_protocol_rsl
313#define ieee80211_softmac_start_protocol ieee80211_softmac_start_protocol_rsl
314#define ieee80211_is_shortslot ieee80211_is_shortslot_rsl
315#define ieee80211_is_54g ieee80211_is_54g_rsl
316#define ieee80211_wpa_supplicant_ioctl ieee80211_wpa_supplicant_ioctl_rsl
317#define ieee80211_ps_tx_ack ieee80211_ps_tx_ack_rsl
318#define ieee80211_softmac_xmit ieee80211_softmac_xmit_rsl
319#define ieee80211_stop_send_beacons ieee80211_stop_send_beacons_rsl
320#define notify_wx_assoc_event notify_wx_assoc_event_rsl
321#define SendDisassociation SendDisassociation_rsl
322#define ieee80211_disassociate ieee80211_disassociate_rsl
323#define ieee80211_start_send_beacons ieee80211_start_send_beacons_rsl
324#define ieee80211_stop_scan ieee80211_stop_scan_rsl
325#define ieee80211_send_probe_requests ieee80211_send_probe_requests_rsl
326#define ieee80211_softmac_scan_syncro ieee80211_softmac_scan_syncro_rsl
327#define ieee80211_start_scan_syncro ieee80211_start_scan_syncro_rsl
328
329#define ieee80211_wx_get_essid ieee80211_wx_get_essid_rsl
330#define ieee80211_wx_set_essid ieee80211_wx_set_essid_rsl
331#define ieee80211_wx_set_rate ieee80211_wx_set_rate_rsl
332#define ieee80211_wx_get_rate ieee80211_wx_get_rate_rsl
333#define ieee80211_wx_set_wap ieee80211_wx_set_wap_rsl
334#define ieee80211_wx_get_wap ieee80211_wx_get_wap_rsl
335#define ieee80211_wx_set_mode ieee80211_wx_set_mode_rsl
336#define ieee80211_wx_get_mode ieee80211_wx_get_mode_rsl
337#define ieee80211_wx_set_scan ieee80211_wx_set_scan_rsl
338#define ieee80211_wx_get_freq ieee80211_wx_get_freq_rsl
339#define ieee80211_wx_set_freq ieee80211_wx_set_freq_rsl
340#define ieee80211_wx_set_rawtx ieee80211_wx_set_rawtx_rsl
341#define ieee80211_wx_get_name ieee80211_wx_get_name_rsl
342#define ieee80211_wx_set_power ieee80211_wx_set_power_rsl
343#define ieee80211_wx_get_power ieee80211_wx_get_power_rsl
344#define ieee80211_wlan_frequencies ieee80211_wlan_frequencies_rsl
345#define ieee80211_wx_set_rts ieee80211_wx_set_rts_rsl
346#define ieee80211_wx_get_rts ieee80211_wx_get_rts_rsl
347
348#define ieee80211_txb_free ieee80211_txb_free_rsl
349
350#define ieee80211_wx_set_gen_ie ieee80211_wx_set_gen_ie_rsl
351#define ieee80211_wx_get_scan ieee80211_wx_get_scan_rsl
352#define ieee80211_wx_set_encode ieee80211_wx_set_encode_rsl
353#define ieee80211_wx_get_encode ieee80211_wx_get_encode_rsl
354#define ieee80211_wx_set_mlme ieee80211_wx_set_mlme_rsl
355#define ieee80211_wx_set_auth ieee80211_wx_set_auth_rsl
356#define ieee80211_wx_set_encode_ext ieee80211_wx_set_encode_ext_rsl
357#define ieee80211_wx_get_encode_ext ieee80211_wx_get_encode_ext_rsl
358
359
360typedef struct ieee_param {
361 u32 cmd;
362 u8 sta_addr[ETH_ALEN];
363 union {
364 struct {
365 u8 name;
366 u32 value;
367 } wpa_param;
368 struct {
369 u32 len;
370 u8 reserved[32];
371 u8 data[0];
372 } wpa_ie;
373 struct{
374 int command;
375 int reason_code;
376 } mlme;
377 struct {
378 u8 alg[IEEE_CRYPT_ALG_NAME_LEN];
379 u8 set_tx;
380 u32 err;
381 u8 idx;
382 u8 seq[8]; /* sequence counter (set: RX, get: TX) */
383 u16 key_len;
384 u8 key[0];
385 } crypt;
386 } u;
387}ieee_param;
388
389
390// linux under 2.6.9 release may not support it, so modify it for common use
391#define MSECS(t) msecs_to_jiffies(t)
392#define msleep_interruptible_rsl msleep_interruptible
393
394#define IEEE80211_DATA_LEN 2304
395/* Maximum size for the MA-UNITDATA primitive, 802.11 standard section
396 6.2.1.1.2.
397
398 The figure in section 7.1.2 suggests a body size of up to 2312
399 bytes is allowed, which is a bit confusing, I suspect this
400 represents the 2304 bytes of real data, plus a possible 8 bytes of
401 WEP IV and ICV. (this interpretation suggested by Ramiro Barreiro) */
402#define IEEE80211_1ADDR_LEN 10
403#define IEEE80211_2ADDR_LEN 16
404#define IEEE80211_3ADDR_LEN 24
405#define IEEE80211_4ADDR_LEN 30
406#define IEEE80211_FCS_LEN 4
407#define IEEE80211_HLEN (IEEE80211_4ADDR_LEN)
408#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN)
409#define IEEE80211_MGMT_HDR_LEN 24
410#define IEEE80211_DATA_HDR3_LEN 24
411#define IEEE80211_DATA_HDR4_LEN 30
412
413#define MIN_FRAG_THRESHOLD 256U
414#define MAX_FRAG_THRESHOLD 2346U
415
416
417/* Frame control field constants */
418#define IEEE80211_FCTL_VERS 0x0003
419#define IEEE80211_FCTL_FTYPE 0x000c
420#define IEEE80211_FCTL_STYPE 0x00f0
421#define IEEE80211_FCTL_FRAMETYPE 0x00fc
422#define IEEE80211_FCTL_TODS 0x0100
423#define IEEE80211_FCTL_FROMDS 0x0200
424#define IEEE80211_FCTL_DSTODS 0x0300 //added by david
425#define IEEE80211_FCTL_MOREFRAGS 0x0400
426#define IEEE80211_FCTL_RETRY 0x0800
427#define IEEE80211_FCTL_PM 0x1000
428#define IEEE80211_FCTL_MOREDATA 0x2000
429#define IEEE80211_FCTL_WEP 0x4000
430#define IEEE80211_FCTL_ORDER 0x8000
431
432#define IEEE80211_FTYPE_MGMT 0x0000
433#define IEEE80211_FTYPE_CTL 0x0004
434#define IEEE80211_FTYPE_DATA 0x0008
435
436/* management */
437#define IEEE80211_STYPE_ASSOC_REQ 0x0000
438#define IEEE80211_STYPE_ASSOC_RESP 0x0010
439#define IEEE80211_STYPE_REASSOC_REQ 0x0020
440#define IEEE80211_STYPE_REASSOC_RESP 0x0030
441#define IEEE80211_STYPE_PROBE_REQ 0x0040
442#define IEEE80211_STYPE_PROBE_RESP 0x0050
443#define IEEE80211_STYPE_BEACON 0x0080
444#define IEEE80211_STYPE_ATIM 0x0090
445#define IEEE80211_STYPE_DISASSOC 0x00A0
446#define IEEE80211_STYPE_AUTH 0x00B0
447#define IEEE80211_STYPE_DEAUTH 0x00C0
448#define IEEE80211_STYPE_MANAGE_ACT 0x00D0
449
450/* control */
451#define IEEE80211_STYPE_PSPOLL 0x00A0
452#define IEEE80211_STYPE_RTS 0x00B0
453#define IEEE80211_STYPE_CTS 0x00C0
454#define IEEE80211_STYPE_ACK 0x00D0
455#define IEEE80211_STYPE_CFEND 0x00E0
456#define IEEE80211_STYPE_CFENDACK 0x00F0
457#define IEEE80211_STYPE_BLOCKACK 0x0094
458
459/* data */
460#define IEEE80211_STYPE_DATA 0x0000
461#define IEEE80211_STYPE_DATA_CFACK 0x0010
462#define IEEE80211_STYPE_DATA_CFPOLL 0x0020
463#define IEEE80211_STYPE_DATA_CFACKPOLL 0x0030
464#define IEEE80211_STYPE_NULLFUNC 0x0040
465#define IEEE80211_STYPE_CFACK 0x0050
466#define IEEE80211_STYPE_CFPOLL 0x0060
467#define IEEE80211_STYPE_CFACKPOLL 0x0070
468#define IEEE80211_STYPE_QOS_DATA 0x0080 //added for WMM 2006/8/2
469#define IEEE80211_STYPE_QOS_NULL 0x00C0
470
471#define IEEE80211_SCTL_FRAG 0x000F
472#define IEEE80211_SCTL_SEQ 0xFFF0
473
474/* QOS control */
475#define IEEE80211_QCTL_TID 0x000F
476
477#define FC_QOS_BIT BIT7
478#define IsDataFrame(pdu) ( ((pdu[0] & 0x0C)==0x08) ? true : false )
479#define IsLegacyDataFrame(pdu) (IsDataFrame(pdu) && (!(pdu[0]&FC_QOS_BIT)) )
480//added by wb. Is this right?
481#define IsQoSDataFrame(pframe) ((*(u16*)pframe&(IEEE80211_STYPE_QOS_DATA|IEEE80211_FTYPE_DATA)) == (IEEE80211_STYPE_QOS_DATA|IEEE80211_FTYPE_DATA))
482#define Frame_Order(pframe) (*(u16*)pframe&IEEE80211_FCTL_ORDER)
483#define SN_LESS(a, b) (((a-b)&0x800)!=0)
484#define SN_EQUAL(a, b) (a == b)
485#define MAX_DEV_ADDR_SIZE 8
486typedef enum _ACT_CATEGORY{
487 ACT_CAT_QOS = 1,
488 ACT_CAT_DLS = 2,
489 ACT_CAT_BA = 3,
490 ACT_CAT_HT = 7,
491 ACT_CAT_WMM = 17,
492} ACT_CATEGORY, *PACT_CATEGORY;
493
494typedef enum _TS_ACTION{
495 ACT_ADDTSREQ = 0,
496 ACT_ADDTSRSP = 1,
497 ACT_DELTS = 2,
498 ACT_SCHEDULE = 3,
499} TS_ACTION, *PTS_ACTION;
500
501typedef enum _BA_ACTION{
502 ACT_ADDBAREQ = 0,
503 ACT_ADDBARSP = 1,
504 ACT_DELBA = 2,
505} BA_ACTION, *PBA_ACTION;
506
507typedef enum _InitialGainOpType{
508 IG_Backup=0,
509 IG_Restore,
510 IG_Max
511}InitialGainOpType;
512
513/* debug macros */
514#define CONFIG_IEEE80211_DEBUG
515#ifdef CONFIG_IEEE80211_DEBUG
516extern u32 ieee80211_debug_level;
517#define IEEE80211_DEBUG(level, fmt, args...) \
518do { if (ieee80211_debug_level & (level)) \
519 printk(KERN_DEBUG "ieee80211: " fmt, ## args); } while (0)
520//wb added to debug out data buf
521//if you want print DATA buffer related BA, please set ieee80211_debug_level to DATA|BA
522#define IEEE80211_DEBUG_DATA(level, data, datalen) \
523 do{ if ((ieee80211_debug_level & (level)) == (level)) \
524 { \
525 int i; \
526 u8* pdata = (u8*) data; \
527 printk(KERN_DEBUG "ieee80211: %s()\n", __FUNCTION__); \
528 for(i=0; i<(int)(datalen); i++) \
529 { \
530 printk("%2x ", pdata[i]); \
531 if ((i+1)%16 == 0) printk("\n"); \
532 } \
533 printk("\n"); \
534 } \
535 } while (0)
536#else
537#define IEEE80211_DEBUG(level, fmt, args...) do {} while (0)
538#define IEEE80211_DEBUG_DATA(level, data, datalen) do {} while(0)
539#endif /* CONFIG_IEEE80211_DEBUG */
540
541/* debug macros not dependent on CONFIG_IEEE80211_DEBUG */
542
543/*
544 * To use the debug system;
545 *
546 * If you are defining a new debug classification, simply add it to the #define
547 * list here in the form of:
548 *
549 * #define IEEE80211_DL_xxxx VALUE
550 *
551 * shifting value to the left one bit from the previous entry. xxxx should be
552 * the name of the classification (for example, WEP)
553 *
554 * You then need to either add a IEEE80211_xxxx_DEBUG() macro definition for your
555 * classification, or use IEEE80211_DEBUG(IEEE80211_DL_xxxx, ...) whenever you want
556 * to send output to that classification.
557 *
558 * To add your debug level to the list of levels seen when you perform
559 *
560 * % cat /proc/net/ipw/debug_level
561 *
562 * you simply need to add your entry to the ipw_debug_levels array.
563 *
564 * If you do not see debug_level in /proc/net/ipw then you do not have
565 * CONFIG_IEEE80211_DEBUG defined in your kernel configuration
566 *
567 */
568
569#define IEEE80211_DL_INFO (1<<0)
570#define IEEE80211_DL_WX (1<<1)
571#define IEEE80211_DL_SCAN (1<<2)
572#define IEEE80211_DL_STATE (1<<3)
573#define IEEE80211_DL_MGMT (1<<4)
574#define IEEE80211_DL_FRAG (1<<5)
575#define IEEE80211_DL_EAP (1<<6)
576#define IEEE80211_DL_DROP (1<<7)
577
578#define IEEE80211_DL_TX (1<<8)
579#define IEEE80211_DL_RX (1<<9)
580
581#define IEEE80211_DL_HT (1<<10) //HT
582#define IEEE80211_DL_BA (1<<11) //ba
583#define IEEE80211_DL_TS (1<<12) //TS
584#define IEEE80211_DL_QOS (1<<13)
585#define IEEE80211_DL_REORDER (1<<14)
586#define IEEE80211_DL_IOT (1<<15)
587#define IEEE80211_DL_IPS (1<<16)
588#define IEEE80211_DL_TRACE (1<<29) //trace function, need to user net_ratelimit() together in order not to print too much to the screen
589#define IEEE80211_DL_DATA (1<<30) //use this flag to control whether print data buf out.
590#define IEEE80211_DL_ERR (1<<31) //always open
591#define IEEE80211_ERROR(f, a...) printk(KERN_ERR "ieee80211: " f, ## a)
592#define IEEE80211_WARNING(f, a...) printk(KERN_WARNING "ieee80211: " f, ## a)
593#define IEEE80211_DEBUG_INFO(f, a...) IEEE80211_DEBUG(IEEE80211_DL_INFO, f, ## a)
594
595#define IEEE80211_DEBUG_WX(f, a...) IEEE80211_DEBUG(IEEE80211_DL_WX, f, ## a)
596#define IEEE80211_DEBUG_SCAN(f, a...) IEEE80211_DEBUG(IEEE80211_DL_SCAN, f, ## a)
597#define IEEE80211_DEBUG_STATE(f, a...) IEEE80211_DEBUG(IEEE80211_DL_STATE, f, ## a)
598#define IEEE80211_DEBUG_MGMT(f, a...) IEEE80211_DEBUG(IEEE80211_DL_MGMT, f, ## a)
599#define IEEE80211_DEBUG_FRAG(f, a...) IEEE80211_DEBUG(IEEE80211_DL_FRAG, f, ## a)
600#define IEEE80211_DEBUG_EAP(f, a...) IEEE80211_DEBUG(IEEE80211_DL_EAP, f, ## a)
601#define IEEE80211_DEBUG_DROP(f, a...) IEEE80211_DEBUG(IEEE80211_DL_DROP, f, ## a)
602#define IEEE80211_DEBUG_TX(f, a...) IEEE80211_DEBUG(IEEE80211_DL_TX, f, ## a)
603#define IEEE80211_DEBUG_RX(f, a...) IEEE80211_DEBUG(IEEE80211_DL_RX, f, ## a)
604#define IEEE80211_DEBUG_QOS(f, a...) IEEE80211_DEBUG(IEEE80211_DL_QOS, f, ## a)
605
606#ifdef CONFIG_IEEE80211_DEBUG
607/* Added by Annie, 2005-11-22. */
608#define MAX_STR_LEN 64
609/* I want to see ASCII 33 to 126 only. Otherwise, I print '?'. Annie, 2005-11-22.*/
610#define PRINTABLE(_ch) (_ch>'!' && _ch<'~')
611#define IEEE80211_PRINT_STR(_Comp, _TitleString, _Ptr, _Len) \
612 if((_Comp) & level) \
613 { \
614 int __i; \
615 u8 buffer[MAX_STR_LEN]; \
616 int length = (_Len<MAX_STR_LEN)? _Len : (MAX_STR_LEN-1) ; \
617 memset(buffer, 0, MAX_STR_LEN); \
618 memcpy(buffer, (u8 *)_Ptr, length ); \
619 for( __i=0; __i<MAX_STR_LEN; __i++ ) \
620 { \
621 if( !PRINTABLE(buffer[__i]) ) buffer[__i] = '?'; \
622 } \
623 buffer[length] = '\0'; \
624 printk("Rtl819x: "); \
625 printk(_TitleString); \
626 printk(": %d, <%s>\n", _Len, buffer); \
627 }
628#else
629#define IEEE80211_PRINT_STR(_Comp, _TitleString, _Ptr, _Len) do {} while (0)
630#endif
631
632#include <linux/netdevice.h>
633#include <linux/if_arp.h> /* ARPHRD_ETHER */
634
635#ifndef WIRELESS_SPY
636#define WIRELESS_SPY // enable iwspy support
637#endif
638#include <net/iw_handler.h> // new driver API
639
640#ifndef ETH_P_PAE
641#define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */
642#endif /* ETH_P_PAE */
643
644#define ETH_P_PREAUTH 0x88C7 /* IEEE 802.11i pre-authentication */
645
646#ifndef ETH_P_80211_RAW
647#define ETH_P_80211_RAW (ETH_P_ECONET + 1)
648#endif
649
650/* IEEE 802.11 defines */
651
652#define P80211_OUI_LEN 3
653
654struct ieee80211_snap_hdr {
655
656 u8 dsap; /* always 0xAA */
657 u8 ssap; /* always 0xAA */
658 u8 ctrl; /* always 0x03 */
659 u8 oui[P80211_OUI_LEN]; /* organizational universal id */
660
661} __attribute__ ((packed));
662
663#define SNAP_SIZE sizeof(struct ieee80211_snap_hdr)
664
665#define WLAN_FC_GET_VERS(fc) ((fc) & IEEE80211_FCTL_VERS)
666#define WLAN_FC_GET_TYPE(fc) ((fc) & IEEE80211_FCTL_FTYPE)
667#define WLAN_FC_GET_STYPE(fc) ((fc) & IEEE80211_FCTL_STYPE)
668#define WLAN_FC_MORE_DATA(fc) ((fc) & IEEE80211_FCTL_MOREDATA)
669
670
671#define WLAN_FC_GET_FRAMETYPE(fc) ((fc) & IEEE80211_FCTL_FRAMETYPE)
672#define WLAN_GET_SEQ_FRAG(seq) ((seq) & IEEE80211_SCTL_FRAG)
673#define WLAN_GET_SEQ_SEQ(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4)
674
675/* Authentication algorithms */
676#define WLAN_AUTH_OPEN 0
677#define WLAN_AUTH_SHARED_KEY 1
678#define WLAN_AUTH_LEAP 2
679
680#define WLAN_AUTH_CHALLENGE_LEN 128
681
682#define WLAN_CAPABILITY_BSS (1<<0)
683#define WLAN_CAPABILITY_IBSS (1<<1)
684#define WLAN_CAPABILITY_CF_POLLABLE (1<<2)
685#define WLAN_CAPABILITY_CF_POLL_REQUEST (1<<3)
686#define WLAN_CAPABILITY_PRIVACY (1<<4)
687#define WLAN_CAPABILITY_SHORT_PREAMBLE (1<<5)
688#define WLAN_CAPABILITY_PBCC (1<<6)
689#define WLAN_CAPABILITY_CHANNEL_AGILITY (1<<7)
690#define WLAN_CAPABILITY_SPECTRUM_MGMT (1<<8)
691#define WLAN_CAPABILITY_QOS (1<<9)
692#define WLAN_CAPABILITY_SHORT_SLOT (1<<10)
693#define WLAN_CAPABILITY_DSSS_OFDM (1<<13)
694
695/* 802.11g ERP information element */
696#define WLAN_ERP_NON_ERP_PRESENT (1<<0)
697#define WLAN_ERP_USE_PROTECTION (1<<1)
698#define WLAN_ERP_BARKER_PREAMBLE (1<<2)
699
700/* Status codes */
701enum ieee80211_statuscode {
702 WLAN_STATUS_SUCCESS = 0,
703 WLAN_STATUS_UNSPECIFIED_FAILURE = 1,
704 WLAN_STATUS_CAPS_UNSUPPORTED = 10,
705 WLAN_STATUS_REASSOC_NO_ASSOC = 11,
706 WLAN_STATUS_ASSOC_DENIED_UNSPEC = 12,
707 WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG = 13,
708 WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION = 14,
709 WLAN_STATUS_CHALLENGE_FAIL = 15,
710 WLAN_STATUS_AUTH_TIMEOUT = 16,
711 WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA = 17,
712 WLAN_STATUS_ASSOC_DENIED_RATES = 18,
713 /* 802.11b */
714 WLAN_STATUS_ASSOC_DENIED_NOSHORTPREAMBLE = 19,
715 WLAN_STATUS_ASSOC_DENIED_NOPBCC = 20,
716 WLAN_STATUS_ASSOC_DENIED_NOAGILITY = 21,
717 /* 802.11h */
718 WLAN_STATUS_ASSOC_DENIED_NOSPECTRUM = 22,
719 WLAN_STATUS_ASSOC_REJECTED_BAD_POWER = 23,
720 WLAN_STATUS_ASSOC_REJECTED_BAD_SUPP_CHAN = 24,
721 /* 802.11g */
722 WLAN_STATUS_ASSOC_DENIED_NOSHORTTIME = 25,
723 WLAN_STATUS_ASSOC_DENIED_NODSSSOFDM = 26,
724 /* 802.11i */
725 WLAN_STATUS_INVALID_IE = 40,
726 WLAN_STATUS_INVALID_GROUP_CIPHER = 41,
727 WLAN_STATUS_INVALID_PAIRWISE_CIPHER = 42,
728 WLAN_STATUS_INVALID_AKMP = 43,
729 WLAN_STATUS_UNSUPP_RSN_VERSION = 44,
730 WLAN_STATUS_INVALID_RSN_IE_CAP = 45,
731 WLAN_STATUS_CIPHER_SUITE_REJECTED = 46,
732};
733
734/* Reason codes */
735enum ieee80211_reasoncode {
736 WLAN_REASON_UNSPECIFIED = 1,
737 WLAN_REASON_PREV_AUTH_NOT_VALID = 2,
738 WLAN_REASON_DEAUTH_LEAVING = 3,
739 WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY = 4,
740 WLAN_REASON_DISASSOC_AP_BUSY = 5,
741 WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA = 6,
742 WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA = 7,
743 WLAN_REASON_DISASSOC_STA_HAS_LEFT = 8,
744 WLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH = 9,
745 /* 802.11h */
746 WLAN_REASON_DISASSOC_BAD_POWER = 10,
747 WLAN_REASON_DISASSOC_BAD_SUPP_CHAN = 11,
748 /* 802.11i */
749 WLAN_REASON_INVALID_IE = 13,
750 WLAN_REASON_MIC_FAILURE = 14,
751 WLAN_REASON_4WAY_HANDSHAKE_TIMEOUT = 15,
752 WLAN_REASON_GROUP_KEY_HANDSHAKE_TIMEOUT = 16,
753 WLAN_REASON_IE_DIFFERENT = 17,
754 WLAN_REASON_INVALID_GROUP_CIPHER = 18,
755 WLAN_REASON_INVALID_PAIRWISE_CIPHER = 19,
756 WLAN_REASON_INVALID_AKMP = 20,
757 WLAN_REASON_UNSUPP_RSN_VERSION = 21,
758 WLAN_REASON_INVALID_RSN_IE_CAP = 22,
759 WLAN_REASON_IEEE8021X_FAILED = 23,
760 WLAN_REASON_CIPHER_SUITE_REJECTED = 24,
761};
762
763#define IEEE80211_STATMASK_SIGNAL (1<<0)
764#define IEEE80211_STATMASK_RSSI (1<<1)
765#define IEEE80211_STATMASK_NOISE (1<<2)
766#define IEEE80211_STATMASK_RATE (1<<3)
767#define IEEE80211_STATMASK_WEMASK 0x7
768
769#define IEEE80211_CCK_MODULATION (1<<0)
770#define IEEE80211_OFDM_MODULATION (1<<1)
771
772#define IEEE80211_24GHZ_BAND (1<<0)
773#define IEEE80211_52GHZ_BAND (1<<1)
774
775#define IEEE80211_CCK_RATE_LEN 4
776#define IEEE80211_CCK_RATE_1MB 0x02
777#define IEEE80211_CCK_RATE_2MB 0x04
778#define IEEE80211_CCK_RATE_5MB 0x0B
779#define IEEE80211_CCK_RATE_11MB 0x16
780#define IEEE80211_OFDM_RATE_LEN 8
781#define IEEE80211_OFDM_RATE_6MB 0x0C
782#define IEEE80211_OFDM_RATE_9MB 0x12
783#define IEEE80211_OFDM_RATE_12MB 0x18
784#define IEEE80211_OFDM_RATE_18MB 0x24
785#define IEEE80211_OFDM_RATE_24MB 0x30
786#define IEEE80211_OFDM_RATE_36MB 0x48
787#define IEEE80211_OFDM_RATE_48MB 0x60
788#define IEEE80211_OFDM_RATE_54MB 0x6C
789#define IEEE80211_BASIC_RATE_MASK 0x80
790
791#define IEEE80211_CCK_RATE_1MB_MASK (1<<0)
792#define IEEE80211_CCK_RATE_2MB_MASK (1<<1)
793#define IEEE80211_CCK_RATE_5MB_MASK (1<<2)
794#define IEEE80211_CCK_RATE_11MB_MASK (1<<3)
795#define IEEE80211_OFDM_RATE_6MB_MASK (1<<4)
796#define IEEE80211_OFDM_RATE_9MB_MASK (1<<5)
797#define IEEE80211_OFDM_RATE_12MB_MASK (1<<6)
798#define IEEE80211_OFDM_RATE_18MB_MASK (1<<7)
799#define IEEE80211_OFDM_RATE_24MB_MASK (1<<8)
800#define IEEE80211_OFDM_RATE_36MB_MASK (1<<9)
801#define IEEE80211_OFDM_RATE_48MB_MASK (1<<10)
802#define IEEE80211_OFDM_RATE_54MB_MASK (1<<11)
803
804#define IEEE80211_CCK_RATES_MASK 0x0000000F
805#define IEEE80211_CCK_BASIC_RATES_MASK (IEEE80211_CCK_RATE_1MB_MASK | \
806 IEEE80211_CCK_RATE_2MB_MASK)
807#define IEEE80211_CCK_DEFAULT_RATES_MASK (IEEE80211_CCK_BASIC_RATES_MASK | \
808 IEEE80211_CCK_RATE_5MB_MASK | \
809 IEEE80211_CCK_RATE_11MB_MASK)
810
811#define IEEE80211_OFDM_RATES_MASK 0x00000FF0
812#define IEEE80211_OFDM_BASIC_RATES_MASK (IEEE80211_OFDM_RATE_6MB_MASK | \
813 IEEE80211_OFDM_RATE_12MB_MASK | \
814 IEEE80211_OFDM_RATE_24MB_MASK)
815#define IEEE80211_OFDM_DEFAULT_RATES_MASK (IEEE80211_OFDM_BASIC_RATES_MASK | \
816 IEEE80211_OFDM_RATE_9MB_MASK | \
817 IEEE80211_OFDM_RATE_18MB_MASK | \
818 IEEE80211_OFDM_RATE_36MB_MASK | \
819 IEEE80211_OFDM_RATE_48MB_MASK | \
820 IEEE80211_OFDM_RATE_54MB_MASK)
821#define IEEE80211_DEFAULT_RATES_MASK (IEEE80211_OFDM_DEFAULT_RATES_MASK | \
822 IEEE80211_CCK_DEFAULT_RATES_MASK)
823
824#define IEEE80211_NUM_OFDM_RATES 8
825#define IEEE80211_NUM_CCK_RATES 4
826#define IEEE80211_OFDM_SHIFT_MASK_A 4
827
828
829/* this is stolen and modified from the madwifi driver*/
830#define IEEE80211_FC0_TYPE_MASK 0x0c
831#define IEEE80211_FC0_TYPE_DATA 0x08
832#define IEEE80211_FC0_SUBTYPE_MASK 0xB0
833#define IEEE80211_FC0_SUBTYPE_QOS 0x80
834
835#define IEEE80211_QOS_HAS_SEQ(fc) \
836 (((fc) & (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == \
837 (IEEE80211_FC0_TYPE_DATA | IEEE80211_FC0_SUBTYPE_QOS))
838
839/* this is stolen from ipw2200 driver */
840#define IEEE_IBSS_MAC_HASH_SIZE 31
841struct ieee_ibss_seq {
842 u8 mac[ETH_ALEN];
843 u16 seq_num[17];
844 u16 frag_num[17];
845 unsigned long packet_time[17];
846 struct list_head list;
847};
848
849/* NOTE: This data is for statistical purposes; not all hardware provides this
850 * information for frames received. Not setting these will not cause
851 * any adverse affects. */
852struct ieee80211_rx_stats {
853 u32 mac_time[2];
854 s8 rssi;
855 u8 signal;
856 u8 noise;
857 u16 rate; /* in 100 kbps */
858 u8 received_channel;
859 u8 control;
860 u8 mask;
861 u8 freq;
862 u16 len;
863 u64 tsf;
864 u32 beacon_time;
865 u8 nic_type;
866 u16 Length;
867 u8 SignalQuality; // in 0-100 index.
868 s32 RecvSignalPower; // Real power in dBm for this packet, no beautification and aggregation.
869 s8 RxPower; // in dBm Translate from PWdB
870 u8 SignalStrength; // in 0-100 index.
871 u16 bHwError:1;
872 u16 bCRC:1;
873 u16 bICV:1;
874 u16 bShortPreamble:1;
875 u16 Antenna:1; //for rtl8185
876 u16 Decrypted:1; //for rtl8185, rtl8187
877 u16 Wakeup:1; //for rtl8185
878 u16 Reserved0:1; //for rtl8185
879 u8 AGC;
880 u32 TimeStampLow;
881 u32 TimeStampHigh;
882 bool bShift;
883 bool bIsQosData; // Added by Annie, 2005-12-22.
884 u8 UserPriority;
885
886 //1!!!!!!!!!!!!!!!!!!!!!!!!!!!
887 //1Attention Please!!!<11n or 8190 specific code should be put below this line>
888 //1!!!!!!!!!!!!!!!!!!!!!!!!!!!
889
890 u8 RxDrvInfoSize;
891 u8 RxBufShift;
892 bool bIsAMPDU;
893 bool bFirstMPDU;
894 bool bContainHTC;
895 u32 RxPWDBAll;
896 u8 RxMIMOSignalStrength[4]; // in 0~100 index
897 s8 RxMIMOSignalQuality[2];
898 bool bPacketMatchBSSID;
899 bool bIsCCK;
900 bool bPacketToSelf;
901 u8* virtual_address;
902 bool bPacketBeacon; //cosa add for rssi
903 bool bToSelfBA; //cosa add for rssi
904 char cck_adc_pwdb[4]; //cosa add for rx path selection
905};
906
907/* IEEE 802.11 requires that STA supports concurrent reception of at least
908 * three fragmented frames. This define can be increased to support more
909 * concurrent frames, but it should be noted that each entry can consume about
910 * 2 kB of RAM and increasing cache size will slow down frame reassembly. */
911#define IEEE80211_FRAG_CACHE_LEN 4
912
913struct ieee80211_frag_entry {
914 unsigned long first_frag_time;
915 unsigned int seq;
916 unsigned int last_frag;
917 struct sk_buff *skb;
918 u8 src_addr[ETH_ALEN];
919 u8 dst_addr[ETH_ALEN];
920};
921
922struct ieee80211_stats {
923 unsigned int tx_unicast_frames;
924 unsigned int tx_multicast_frames;
925 unsigned int tx_fragments;
926 unsigned int tx_unicast_octets;
927 unsigned int tx_multicast_octets;
928 unsigned int tx_deferred_transmissions;
929 unsigned int tx_single_retry_frames;
930 unsigned int tx_multiple_retry_frames;
931 unsigned int tx_retry_limit_exceeded;
932 unsigned int tx_discards;
933 unsigned int rx_unicast_frames;
934 unsigned int rx_multicast_frames;
935 unsigned int rx_fragments;
936 unsigned int rx_unicast_octets;
937 unsigned int rx_multicast_octets;
938 unsigned int rx_fcs_errors;
939 unsigned int rx_discards_no_buffer;
940 unsigned int tx_discards_wrong_sa;
941 unsigned int rx_discards_undecryptable;
942 unsigned int rx_message_in_msg_fragments;
943 unsigned int rx_message_in_bad_msg_fragments;
944};
945
946struct ieee80211_device;
947
948#include "ieee80211_crypt.h"
949
950#define SEC_KEY_1 (1<<0)
951#define SEC_KEY_2 (1<<1)
952#define SEC_KEY_3 (1<<2)
953#define SEC_KEY_4 (1<<3)
954#define SEC_ACTIVE_KEY (1<<4)
955#define SEC_AUTH_MODE (1<<5)
956#define SEC_UNICAST_GROUP (1<<6)
957#define SEC_LEVEL (1<<7)
958#define SEC_ENABLED (1<<8)
959#define SEC_ENCRYPT (1<<9)
960
961#define SEC_LEVEL_0 0 /* None */
962#define SEC_LEVEL_1 1 /* WEP 40 and 104 bit */
963#define SEC_LEVEL_2 2 /* Level 1 + TKIP */
964#define SEC_LEVEL_2_CKIP 3 /* Level 1 + CKIP */
965#define SEC_LEVEL_3 4 /* Level 2 + CCMP */
966
967#define SEC_ALG_NONE 0
968#define SEC_ALG_WEP 1
969#define SEC_ALG_TKIP 2
970#define SEC_ALG_CCMP 4
971
972#define WEP_KEYS 4
973#define WEP_KEY_LEN 13
974#define SCM_KEY_LEN 32
975#define SCM_TEMPORAL_KEY_LENGTH 16
976
977struct ieee80211_security {
978 u16 active_key:2,
979 enabled:1,
980 auth_mode:2,
981 auth_algo:4,
982 unicast_uses_group:1,
983 encrypt:1;
984 u8 key_sizes[WEP_KEYS];
985 u8 keys[WEP_KEYS][SCM_KEY_LEN];
986 u8 level;
987 u16 flags;
988} __attribute__ ((packed));
989
990
991/*
992 802.11 data frame from AP
993 ,-------------------------------------------------------------------.
994Bytes | 2 | 2 | 6 | 6 | 6 | 2 | 0..2312 | 4 |
995 |------|------|---------|---------|---------|------|---------|------|
996Desc. | ctrl | dura | DA/RA | TA | SA | Sequ | frame | fcs |
997 | | tion | (BSSID) | | | ence | data | |
998 `-------------------------------------------------------------------'
999Total: 28-2340 bytes
1000*/
1001
1002/* Management Frame Information Element Types */
1003enum ieee80211_mfie {
1004 MFIE_TYPE_SSID = 0,
1005 MFIE_TYPE_RATES = 1,
1006 MFIE_TYPE_FH_SET = 2,
1007 MFIE_TYPE_DS_SET = 3,
1008 MFIE_TYPE_CF_SET = 4,
1009 MFIE_TYPE_TIM = 5,
1010 MFIE_TYPE_IBSS_SET = 6,
1011 MFIE_TYPE_COUNTRY = 7,
1012 MFIE_TYPE_HOP_PARAMS = 8,
1013 MFIE_TYPE_HOP_TABLE = 9,
1014 MFIE_TYPE_REQUEST = 10,
1015 MFIE_TYPE_CHALLENGE = 16,
1016 MFIE_TYPE_POWER_CONSTRAINT = 32,
1017 MFIE_TYPE_POWER_CAPABILITY = 33,
1018 MFIE_TYPE_TPC_REQUEST = 34,
1019 MFIE_TYPE_TPC_REPORT = 35,
1020 MFIE_TYPE_SUPP_CHANNELS = 36,
1021 MFIE_TYPE_CSA = 37,
1022 MFIE_TYPE_MEASURE_REQUEST = 38,
1023 MFIE_TYPE_MEASURE_REPORT = 39,
1024 MFIE_TYPE_QUIET = 40,
1025 MFIE_TYPE_IBSS_DFS = 41,
1026 MFIE_TYPE_ERP = 42,
1027 MFIE_TYPE_RSN = 48,
1028 MFIE_TYPE_RATES_EX = 50,
1029 MFIE_TYPE_HT_CAP= 45,
1030 MFIE_TYPE_HT_INFO= 61,
1031 MFIE_TYPE_AIRONET=133,
1032 MFIE_TYPE_GENERIC = 221,
1033 MFIE_TYPE_QOS_PARAMETER = 222,
1034};
1035
1036/* Minimal header; can be used for passing 802.11 frames with sufficient
1037 * information to determine what type of underlying data type is actually
1038 * stored in the data. */
1039 struct ieee80211_pspoll_hdr {
1040 __le16 frame_ctl;
1041 __le16 aid;
1042 u8 bssid[ETH_ALEN];
1043 u8 ta[ETH_ALEN];
1044 //u8 payload[0];
1045} __attribute__ ((packed));
1046
1047struct ieee80211_hdr {
1048 __le16 frame_ctl;
1049 __le16 duration_id;
1050 u8 payload[0];
1051} __attribute__ ((packed));
1052
1053struct ieee80211_hdr_1addr {
1054 __le16 frame_ctl;
1055 __le16 duration_id;
1056 u8 addr1[ETH_ALEN];
1057 u8 payload[0];
1058} __attribute__ ((packed));
1059
1060struct ieee80211_hdr_2addr {
1061 __le16 frame_ctl;
1062 __le16 duration_id;
1063 u8 addr1[ETH_ALEN];
1064 u8 addr2[ETH_ALEN];
1065 u8 payload[0];
1066} __attribute__ ((packed));
1067
1068struct ieee80211_hdr_3addr {
1069 __le16 frame_ctl;
1070 __le16 duration_id;
1071 u8 addr1[ETH_ALEN];
1072 u8 addr2[ETH_ALEN];
1073 u8 addr3[ETH_ALEN];
1074 __le16 seq_ctl;
1075 u8 payload[0];
1076} __attribute__ ((packed));
1077
1078struct ieee80211_hdr_4addr {
1079 __le16 frame_ctl;
1080 __le16 duration_id;
1081 u8 addr1[ETH_ALEN];
1082 u8 addr2[ETH_ALEN];
1083 u8 addr3[ETH_ALEN];
1084 __le16 seq_ctl;
1085 u8 addr4[ETH_ALEN];
1086 u8 payload[0];
1087} __attribute__ ((packed));
1088
1089struct ieee80211_hdr_3addrqos {
1090 __le16 frame_ctl;
1091 __le16 duration_id;
1092 u8 addr1[ETH_ALEN];
1093 u8 addr2[ETH_ALEN];
1094 u8 addr3[ETH_ALEN];
1095 __le16 seq_ctl;
1096 u8 payload[0];
1097 __le16 qos_ctl;
1098} __attribute__ ((packed));
1099
1100struct ieee80211_hdr_4addrqos {
1101 __le16 frame_ctl;
1102 __le16 duration_id;
1103 u8 addr1[ETH_ALEN];
1104 u8 addr2[ETH_ALEN];
1105 u8 addr3[ETH_ALEN];
1106 __le16 seq_ctl;
1107 u8 addr4[ETH_ALEN];
1108 u8 payload[0];
1109 __le16 qos_ctl;
1110} __attribute__ ((packed));
1111
1112struct ieee80211_info_element {
1113 u8 id;
1114 u8 len;
1115 u8 data[0];
1116} __attribute__ ((packed));
1117
1118struct ieee80211_authentication {
1119 struct ieee80211_hdr_3addr header;
1120 __le16 algorithm;
1121 __le16 transaction;
1122 __le16 status;
1123 /*challenge*/
1124 struct ieee80211_info_element info_element[0];
1125} __attribute__ ((packed));
1126
1127struct ieee80211_disassoc {
1128 struct ieee80211_hdr_3addr header;
1129 __le16 reason;
1130} __attribute__ ((packed));
1131
1132struct ieee80211_probe_request {
1133 struct ieee80211_hdr_3addr header;
1134 /* SSID, supported rates */
1135 struct ieee80211_info_element info_element[0];
1136} __attribute__ ((packed));
1137
1138struct ieee80211_probe_response {
1139 struct ieee80211_hdr_3addr header;
1140 u32 time_stamp[2];
1141 __le16 beacon_interval;
1142 __le16 capability;
1143 /* SSID, supported rates, FH params, DS params,
1144 * CF params, IBSS params, TIM (if beacon), RSN */
1145 struct ieee80211_info_element info_element[0];
1146} __attribute__ ((packed));
1147
1148/* Alias beacon for probe_response */
1149#define ieee80211_beacon ieee80211_probe_response
1150
1151struct ieee80211_assoc_request_frame {
1152 struct ieee80211_hdr_3addr header;
1153 __le16 capability;
1154 __le16 listen_interval;
1155 /* SSID, supported rates, RSN */
1156 struct ieee80211_info_element info_element[0];
1157} __attribute__ ((packed));
1158
1159struct ieee80211_reassoc_request_frame {
1160 struct ieee80211_hdr_3addr header;
1161 __le16 capability;
1162 __le16 listen_interval;
1163 u8 current_ap[ETH_ALEN];
1164 /* SSID, supported rates, RSN */
1165 struct ieee80211_info_element info_element[0];
1166} __attribute__ ((packed));
1167
1168struct ieee80211_assoc_response_frame {
1169 struct ieee80211_hdr_3addr header;
1170 __le16 capability;
1171 __le16 status;
1172 __le16 aid;
1173 struct ieee80211_info_element info_element[0]; /* supported rates */
1174} __attribute__ ((packed));
1175
1176struct ieee80211_txb {
1177 u8 nr_frags;
1178 u8 encrypted;
1179 u8 queue_index;
1180 u8 rts_included;
1181 u16 reserved;
1182 __le16 frag_size;
1183 __le16 payload_size;
1184 struct sk_buff *fragments[0];
1185};
1186
1187#define MAX_TX_AGG_COUNT 16
1188struct ieee80211_drv_agg_txb {
1189 u8 nr_drv_agg_frames;
1190 struct sk_buff *tx_agg_frames[MAX_TX_AGG_COUNT];
1191}__attribute__((packed));
1192
1193#define MAX_SUBFRAME_COUNT 64
1194struct ieee80211_rxb {
1195 u8 nr_subframes;
1196 struct sk_buff *subframes[MAX_SUBFRAME_COUNT];
1197 u8 dst[ETH_ALEN];
1198 u8 src[ETH_ALEN];
1199}__attribute__((packed));
1200
1201typedef union _frameqos {
1202 u16 shortdata;
1203 u8 chardata[2];
1204 struct {
1205 u16 tid:4;
1206 u16 eosp:1;
1207 u16 ack_policy:2;
1208 u16 reserved:1;
1209 u16 txop:8;
1210 }field;
1211}frameqos,*pframeqos;
1212
1213/* SWEEP TABLE ENTRIES NUMBER*/
1214#define MAX_SWEEP_TAB_ENTRIES 42
1215#define MAX_SWEEP_TAB_ENTRIES_PER_PACKET 7
1216/* MAX_RATES_LENGTH needs to be 12. The spec says 8, and many APs
1217 * only use 8, and then use extended rates for the remaining supported
1218 * rates. Other APs, however, stick all of their supported rates on the
1219 * main rates information element... */
1220#define MAX_RATES_LENGTH ((u8)12)
1221#define MAX_RATES_EX_LENGTH ((u8)16)
1222#define MAX_NETWORK_COUNT 128
1223
1224#define MAX_CHANNEL_NUMBER 161
1225#define IEEE80211_SOFTMAC_SCAN_TIME 100
1226//(HZ / 2)
1227#define IEEE80211_SOFTMAC_ASSOC_RETRY_TIME (HZ * 2)
1228
1229#define CRC_LENGTH 4U
1230
1231#define MAX_WPA_IE_LEN 64
1232
1233#define NETWORK_EMPTY_ESSID (1<<0)
1234#define NETWORK_HAS_OFDM (1<<1)
1235#define NETWORK_HAS_CCK (1<<2)
1236
1237/* QoS structure */
1238#define NETWORK_HAS_QOS_PARAMETERS (1<<3)
1239#define NETWORK_HAS_QOS_INFORMATION (1<<4)
1240#define NETWORK_HAS_QOS_MASK (NETWORK_HAS_QOS_PARAMETERS | \
1241 NETWORK_HAS_QOS_INFORMATION)
1242/* 802.11h */
1243#define NETWORK_HAS_POWER_CONSTRAINT (1<<5)
1244#define NETWORK_HAS_CSA (1<<6)
1245#define NETWORK_HAS_QUIET (1<<7)
1246#define NETWORK_HAS_IBSS_DFS (1<<8)
1247#define NETWORK_HAS_TPC_REPORT (1<<9)
1248
1249#define NETWORK_HAS_ERP_VALUE (1<<10)
1250
1251#define QOS_QUEUE_NUM 4
1252#define QOS_OUI_LEN 3
1253#define QOS_OUI_TYPE 2
1254#define QOS_ELEMENT_ID 221
1255#define QOS_OUI_INFO_SUB_TYPE 0
1256#define QOS_OUI_PARAM_SUB_TYPE 1
1257#define QOS_VERSION_1 1
1258#define QOS_AIFSN_MIN_VALUE 2
1259
1260struct ieee80211_qos_information_element {
1261 u8 elementID;
1262 u8 length;
1263 u8 qui[QOS_OUI_LEN];
1264 u8 qui_type;
1265 u8 qui_subtype;
1266 u8 version;
1267 u8 ac_info;
1268} __attribute__ ((packed));
1269
1270struct ieee80211_qos_ac_parameter {
1271 u8 aci_aifsn;
1272 u8 ecw_min_max;
1273 __le16 tx_op_limit;
1274} __attribute__ ((packed));
1275
1276struct ieee80211_qos_parameter_info {
1277 struct ieee80211_qos_information_element info_element;
1278 u8 reserved;
1279 struct ieee80211_qos_ac_parameter ac_params_record[QOS_QUEUE_NUM];
1280} __attribute__ ((packed));
1281
1282struct ieee80211_qos_parameters {
1283 __le16 cw_min[QOS_QUEUE_NUM];
1284 __le16 cw_max[QOS_QUEUE_NUM];
1285 u8 aifs[QOS_QUEUE_NUM];
1286 u8 flag[QOS_QUEUE_NUM];
1287 __le16 tx_op_limit[QOS_QUEUE_NUM];
1288} __attribute__ ((packed));
1289
1290struct ieee80211_qos_data {
1291 struct ieee80211_qos_parameters parameters;
1292 int active;
1293 int supported;
1294 u8 param_count;
1295 u8 old_param_count;
1296};
1297
1298struct ieee80211_tim_parameters {
1299 u8 tim_count;
1300 u8 tim_period;
1301} __attribute__ ((packed));
1302
1303//#else
1304struct ieee80211_wmm_ac_param {
1305 u8 ac_aci_acm_aifsn;
1306 u8 ac_ecwmin_ecwmax;
1307 u16 ac_txop_limit;
1308};
1309
1310struct ieee80211_wmm_ts_info {
1311 u8 ac_dir_tid;
1312 u8 ac_up_psb;
1313 u8 reserved;
1314} __attribute__ ((packed));
1315
1316struct ieee80211_wmm_tspec_elem {
1317 struct ieee80211_wmm_ts_info ts_info;
1318 u16 norm_msdu_size;
1319 u16 max_msdu_size;
1320 u32 min_serv_inter;
1321 u32 max_serv_inter;
1322 u32 inact_inter;
1323 u32 suspen_inter;
1324 u32 serv_start_time;
1325 u32 min_data_rate;
1326 u32 mean_data_rate;
1327 u32 peak_data_rate;
1328 u32 max_burst_size;
1329 u32 delay_bound;
1330 u32 min_phy_rate;
1331 u16 surp_band_allow;
1332 u16 medium_time;
1333}__attribute__((packed));
1334
1335enum eap_type {
1336 EAP_PACKET = 0,
1337 EAPOL_START,
1338 EAPOL_LOGOFF,
1339 EAPOL_KEY,
1340 EAPOL_ENCAP_ASF_ALERT
1341};
1342
1343static const char *eap_types[] = {
1344 [EAP_PACKET] = "EAP-Packet",
1345 [EAPOL_START] = "EAPOL-Start",
1346 [EAPOL_LOGOFF] = "EAPOL-Logoff",
1347 [EAPOL_KEY] = "EAPOL-Key",
1348 [EAPOL_ENCAP_ASF_ALERT] = "EAPOL-Encap-ASF-Alert"
1349};
1350
1351static inline const char *eap_get_type(int type)
1352{
1353 return ((u32)type >= ARRAY_SIZE(eap_types)) ? "Unknown" : eap_types[type];
1354}
1355//added by amy for reorder
1356static inline u8 Frame_QoSTID(u8* buf)
1357{
1358 struct ieee80211_hdr_3addr *hdr;
1359 u16 fc;
1360 hdr = (struct ieee80211_hdr_3addr *)buf;
1361 fc = le16_to_cpu(hdr->frame_ctl);
1362 return (u8)((frameqos*)(buf + (((fc & IEEE80211_FCTL_TODS)&&(fc & IEEE80211_FCTL_FROMDS))? 30 : 24)))->field.tid;
1363}
1364
1365//added by amy for reorder
1366
1367struct eapol {
1368 u8 snap[6];
1369 u16 ethertype;
1370 u8 version;
1371 u8 type;
1372 u16 length;
1373} __attribute__ ((packed));
1374
1375struct ieee80211_softmac_stats{
1376 unsigned int rx_ass_ok;
1377 unsigned int rx_ass_err;
1378 unsigned int rx_probe_rq;
1379 unsigned int tx_probe_rs;
1380 unsigned int tx_beacons;
1381 unsigned int rx_auth_rq;
1382 unsigned int rx_auth_rs_ok;
1383 unsigned int rx_auth_rs_err;
1384 unsigned int tx_auth_rq;
1385 unsigned int no_auth_rs;
1386 unsigned int no_ass_rs;
1387 unsigned int tx_ass_rq;
1388 unsigned int rx_ass_rq;
1389 unsigned int tx_probe_rq;
1390 unsigned int reassoc;
1391 unsigned int swtxstop;
1392 unsigned int swtxawake;
1393 unsigned char CurrentShowTxate;
1394 unsigned char last_packet_rate;
1395 unsigned int txretrycount;
1396};
1397
1398#define BEACON_PROBE_SSID_ID_POSITION 12
1399
1400struct ieee80211_info_element_hdr {
1401 u8 id;
1402 u8 len;
1403} __attribute__ ((packed));
1404
1405/*
1406 * These are the data types that can make up management packets
1407 *
1408 u16 auth_algorithm;
1409 u16 auth_sequence;
1410 u16 beacon_interval;
1411 u16 capability;
1412 u8 current_ap[ETH_ALEN];
1413 u16 listen_interval;
1414 struct {
1415 u16 association_id:14, reserved:2;
1416 } __attribute__ ((packed));
1417 u32 time_stamp[2];
1418 u16 reason;
1419 u16 status;
1420*/
1421
1422#define IEEE80211_DEFAULT_TX_ESSID "Penguin"
1423#define IEEE80211_DEFAULT_BASIC_RATE 2 //1Mbps
1424
1425enum {WMM_all_frame, WMM_two_frame, WMM_four_frame, WMM_six_frame};
1426#define MAX_SP_Len (WMM_all_frame << 4)
1427#define IEEE80211_QOS_TID 0x0f
1428#define QOS_CTL_NOTCONTAIN_ACK (0x01 << 5)
1429
1430#define IEEE80211_DTIM_MBCAST 4
1431#define IEEE80211_DTIM_UCAST 2
1432#define IEEE80211_DTIM_VALID 1
1433#define IEEE80211_DTIM_INVALID 0
1434
1435#define IEEE80211_PS_DISABLED 0
1436#define IEEE80211_PS_UNICAST IEEE80211_DTIM_UCAST
1437#define IEEE80211_PS_MBCAST IEEE80211_DTIM_MBCAST
1438
1439//added by David for QoS 2006/6/30
1440//#define WMM_Hang_8187
1441#ifdef WMM_Hang_8187
1442#undef WMM_Hang_8187
1443#endif
1444
1445#define WME_AC_BK 0x00
1446#define WME_AC_BE 0x01
1447#define WME_AC_VI 0x02
1448#define WME_AC_VO 0x03
1449#define WME_ACI_MASK 0x03
1450#define WME_AIFSN_MASK 0x03
1451#define WME_AC_PRAM_LEN 16
1452
1453#define MAX_RECEIVE_BUFFER_SIZE 9100
1454
1455//UP Mapping to AC, using in MgntQuery_SequenceNumber() and maybe for DSCP
1456#define UP2AC(up) ( \
1457 ((up) < 1) ? WME_AC_BE : \
1458 ((up) < 3) ? WME_AC_BK : \
1459 ((up) < 4) ? WME_AC_BE : \
1460 ((up) < 6) ? WME_AC_VI : \
1461 WME_AC_VO)
1462
1463//AC Mapping to UP, using in Tx part for selecting the corresponding TX queue
1464#define AC2UP(_ac) ( \
1465 ((_ac) == WME_AC_VO) ? 6 : \
1466 ((_ac) == WME_AC_VI) ? 5 : \
1467 ((_ac) == WME_AC_BK) ? 1 : \
1468 0)
1469
1470#define ETHER_ADDR_LEN 6 /* length of an Ethernet address */
1471#define ETHERNET_HEADER_SIZE 14 /* length of two Ethernet address plus ether type*/
1472
1473struct ether_header {
1474 u8 ether_dhost[ETHER_ADDR_LEN];
1475 u8 ether_shost[ETHER_ADDR_LEN];
1476 u16 ether_type;
1477} __attribute__((packed));
1478
1479#ifndef ETHERTYPE_PAE
1480#define ETHERTYPE_PAE 0x888e /* EAPOL PAE/802.1x */
1481#endif
1482#ifndef ETHERTYPE_IP
1483#define ETHERTYPE_IP 0x0800 /* IP protocol */
1484#endif
1485
1486typedef struct _bss_ht{
1487
1488 bool support_ht;
1489
1490 // HT related elements
1491 u8 ht_cap_buf[32];
1492 u16 ht_cap_len;
1493 u8 ht_info_buf[32];
1494 u16 ht_info_len;
1495
1496 HT_SPEC_VER ht_spec_ver;
1497
1498 bool aggregation;
1499 bool long_slot_time;
1500}bss_ht, *pbss_ht;
1501
1502typedef enum _erp_t{
1503 ERP_NonERPpresent = 0x01,
1504 ERP_UseProtection = 0x02,
1505 ERP_BarkerPreambleMode = 0x04,
1506} erp_t;
1507
1508
1509struct ieee80211_network {
1510 /* These entries are used to identify a unique network */
1511 u8 bssid[ETH_ALEN];
1512 u8 channel;
1513 /* Ensure null-terminated for any debug msgs */
1514 u8 ssid[IW_ESSID_MAX_SIZE + 1];
1515 u8 ssid_len;
1516 struct ieee80211_qos_data qos_data;
1517
1518 //added by amy for LEAP
1519 bool bWithAironetIE;
1520 bool bCkipSupported;
1521 bool bCcxRmEnable;
1522 u16 CcxRmState[2];
1523 // CCXv4 S59, MBSSID.
1524 bool bMBssidValid;
1525 u8 MBssidMask;
1526 u8 MBssid[6];
1527 // CCX 2 S38, WLAN Device Version Number element. Annie, 2006-08-20.
1528 bool bWithCcxVerNum;
1529 u8 BssCcxVerNumber;
1530 /* These are network statistics */
1531 struct ieee80211_rx_stats stats;
1532 u16 capability;
1533 u8 rates[MAX_RATES_LENGTH];
1534 u8 rates_len;
1535 u8 rates_ex[MAX_RATES_EX_LENGTH];
1536 u8 rates_ex_len;
1537 unsigned long last_scanned;
1538 u8 mode;
1539 u32 flags;
1540 u32 last_associate;
1541 u32 time_stamp[2];
1542 u16 beacon_interval;
1543 u16 listen_interval;
1544 u16 atim_window;
1545 u8 erp_value;
1546 u8 wpa_ie[MAX_WPA_IE_LEN];
1547 size_t wpa_ie_len;
1548 u8 rsn_ie[MAX_WPA_IE_LEN];
1549 size_t rsn_ie_len;
1550
1551 struct ieee80211_tim_parameters tim;
1552 u8 dtim_period;
1553 u8 dtim_data;
1554 u32 last_dtim_sta_time[2];
1555
1556 //appeded for QoS
1557 u8 wmm_info;
1558 struct ieee80211_wmm_ac_param wmm_param[4];
1559 u8 QoS_Enable;
1560#ifdef THOMAS_TURBO
1561 u8 Turbo_Enable;//enable turbo mode, added by thomas
1562#endif
1563#ifdef ENABLE_DOT11D
1564 u16 CountryIeLen;
1565 u8 CountryIeBuf[MAX_IE_LEN];
1566#endif
1567 // HT Related, by amy, 2008.04.29
1568 BSS_HT bssht;
1569 // Add to handle broadcom AP management frame CCK rate.
1570 bool broadcom_cap_exist;
1571 bool ralink_cap_exist;
1572 bool atheros_cap_exist;
1573 bool cisco_cap_exist;
1574 bool marvell_cap_exist;
1575 bool unknown_cap_exist;
1576// u8 berp_info;
1577 bool berp_info_valid;
1578 bool buseprotection;
1579 //put at the end of the structure.
1580 struct list_head list;
1581};
1582
1583enum ieee80211_state {
1584
1585 /* the card is not linked at all */
1586 IEEE80211_NOLINK = 0,
1587
1588 /* IEEE80211_ASSOCIATING* are for BSS client mode
1589 * the driver shall not perform RX filtering unless
1590 * the state is LINKED.
1591 * The driver shall just check for the state LINKED and
1592 * defaults to NOLINK for ALL the other states (including
1593 * LINKED_SCANNING)
1594 */
1595
1596 /* the association procedure will start (wq scheduling)*/
1597 IEEE80211_ASSOCIATING,
1598 IEEE80211_ASSOCIATING_RETRY,
1599
1600 /* the association procedure is sending AUTH request*/
1601 IEEE80211_ASSOCIATING_AUTHENTICATING,
1602
1603 /* the association procedure has successfully authentcated
1604 * and is sending association request
1605 */
1606 IEEE80211_ASSOCIATING_AUTHENTICATED,
1607
1608 /* the link is ok. the card associated to a BSS or linked
1609 * to a ibss cell or acting as an AP and creating the bss
1610 */
1611 IEEE80211_LINKED,
1612
1613 /* same as LINKED, but the driver shall apply RX filter
1614 * rules as we are in NO_LINK mode. As the card is still
1615 * logically linked, but it is doing a syncro site survey
1616 * then it will be back to LINKED state.
1617 */
1618 IEEE80211_LINKED_SCANNING,
1619
1620};
1621
1622#define DEFAULT_MAX_SCAN_AGE (15 * HZ)
1623#define DEFAULT_FTS 2346
1624
1625#define CFG_IEEE80211_RESERVE_FCS (1<<0)
1626#define CFG_IEEE80211_COMPUTE_FCS (1<<1)
1627#define CFG_IEEE80211_RTS (1<<2)
1628
1629#define IEEE80211_24GHZ_MIN_CHANNEL 1
1630#define IEEE80211_24GHZ_MAX_CHANNEL 14
1631#define IEEE80211_24GHZ_CHANNELS (IEEE80211_24GHZ_MAX_CHANNEL - \
1632 IEEE80211_24GHZ_MIN_CHANNEL + 1)
1633
1634#define IEEE80211_52GHZ_MIN_CHANNEL 34
1635#define IEEE80211_52GHZ_MAX_CHANNEL 165
1636#define IEEE80211_52GHZ_CHANNELS (IEEE80211_52GHZ_MAX_CHANNEL - \
1637 IEEE80211_52GHZ_MIN_CHANNEL + 1)
1638
1639typedef struct tx_pending_t{
1640 int frag;
1641 struct ieee80211_txb *txb;
1642}tx_pending_t;
1643
1644typedef struct _bandwidth_autoswitch
1645{
1646 long threshold_20Mhzto40Mhz;
1647 long threshold_40Mhzto20Mhz;
1648 bool bforced_tx20Mhz;
1649 bool bautoswitch_enable;
1650}bandwidth_autoswitch,*pbandwidth_autoswitch;
1651
1652
1653//added by amy for order
1654
1655#define REORDER_WIN_SIZE 128
1656#define REORDER_ENTRY_NUM 128
1657typedef struct _RX_REORDER_ENTRY
1658{
1659 struct list_head List;
1660 u16 SeqNum;
1661 struct ieee80211_rxb* prxb;
1662} RX_REORDER_ENTRY, *PRX_REORDER_ENTRY;
1663//added by amy for order
1664typedef enum _Fsync_State{
1665 Default_Fsync,
1666 HW_Fsync,
1667 SW_Fsync
1668}Fsync_State;
1669
1670typedef struct _IbssParms{
1671 u16 atimWin;
1672}IbssParms, *PIbssParms;
1673#define MAX_NUM_RATES 264 // Max num of support rates element: 8, Max num of ext. support rate: 255. 061122, by rcnjko.
1674
1675#ifdef ENABLE_DOT11D
1676typedef enum
1677{
1678 COUNTRY_CODE_FCC = 0,
1679 COUNTRY_CODE_IC = 1,
1680 COUNTRY_CODE_ETSI = 2,
1681 COUNTRY_CODE_SPAIN = 3,
1682 COUNTRY_CODE_FRANCE = 4,
1683 COUNTRY_CODE_MKK = 5,
1684 COUNTRY_CODE_MKK1 = 6,
1685 COUNTRY_CODE_ISRAEL = 7,
1686 COUNTRY_CODE_TELEC,
1687 COUNTRY_CODE_MIC,
1688 COUNTRY_CODE_GLOBAL_DOMAIN
1689}country_code_type_t;
1690#endif
1691
1692#define RT_MAX_LD_SLOT_NUM 10
1693typedef struct _RT_LINK_DETECT_T{
1694
1695 u32 NumRecvBcnInPeriod;
1696 u32 NumRecvDataInPeriod;
1697
1698 u32 RxBcnNum[RT_MAX_LD_SLOT_NUM]; // number of Rx beacon / CheckForHang_period to determine link status
1699 u32 RxDataNum[RT_MAX_LD_SLOT_NUM]; // number of Rx data / CheckForHang_period to determine link status
1700 u16 SlotNum; // number of CheckForHang period to determine link status
1701 u16 SlotIndex;
1702
1703 u32 NumTxOkInPeriod;
1704 u32 NumRxOkInPeriod;
1705 u32 NumRxUnicastOkInPeriod;
1706 bool bBusyTraffic;
1707}RT_LINK_DETECT_T, *PRT_LINK_DETECT_T;
1708
1709//added by amy 090330
1710typedef enum _HW_VARIABLES{
1711 HW_VAR_ETHER_ADDR,
1712 HW_VAR_MULTICAST_REG,
1713 HW_VAR_BASIC_RATE,
1714 HW_VAR_BSSID,
1715 HW_VAR_MEDIA_STATUS,
1716 HW_VAR_SECURITY_CONF,
1717 HW_VAR_BEACON_INTERVAL,
1718 HW_VAR_ATIM_WINDOW,
1719 HW_VAR_LISTEN_INTERVAL,
1720 HW_VAR_CS_COUNTER,
1721 HW_VAR_DEFAULTKEY0,
1722 HW_VAR_DEFAULTKEY1,
1723 HW_VAR_DEFAULTKEY2,
1724 HW_VAR_DEFAULTKEY3,
1725 HW_VAR_SIFS,
1726 HW_VAR_DIFS,
1727 HW_VAR_EIFS,
1728 HW_VAR_SLOT_TIME,
1729 HW_VAR_ACK_PREAMBLE,
1730 HW_VAR_CW_CONFIG,
1731 HW_VAR_CW_VALUES,
1732 HW_VAR_RATE_FALLBACK_CONTROL,
1733 HW_VAR_CONTENTION_WINDOW,
1734 HW_VAR_RETRY_COUNT,
1735 HW_VAR_TR_SWITCH,
1736 HW_VAR_COMMAND, // For Command Register, Annie, 2006-04-07.
1737 HW_VAR_WPA_CONFIG, //2004/08/23, kcwu, for 8187 Security config
1738 HW_VAR_AMPDU_MIN_SPACE, // The spacing between sub-frame. Roger, 2008.07.04.
1739 HW_VAR_SHORTGI_DENSITY, // The density for shortGI. Roger, 2008.07.04.
1740 HW_VAR_AMPDU_FACTOR,
1741 HW_VAR_MCS_RATE_AVAILABLE,
1742 HW_VAR_AC_PARAM, // For AC Parameters, 2005.12.01, by rcnjko.
1743 HW_VAR_ACM_CTRL, // For ACM Control, Annie, 2005-12-13.
1744 HW_VAR_DIS_Req_Qsize, // For DIS_Reg_Qsize, Joseph
1745 HW_VAR_CCX_CHNL_LOAD, // For CCX 2 channel load request, 2006.05.04.
1746 HW_VAR_CCX_NOISE_HISTOGRAM, // For CCX 2 noise histogram request, 2006.05.04.
1747 HW_VAR_CCX_CLM_NHM, // For CCX 2 parallel channel load request and noise histogram request, 2006.05.12.
1748 HW_VAR_TxOPLimit, // For turbo mode related settings, added by Roger, 2006.12.07
1749 HW_VAR_TURBO_MODE, // For turbo mode related settings, added by Roger, 2006.12.15.
1750 HW_VAR_RF_STATE, // For change or query RF power state, 061214, rcnjko.
1751 HW_VAR_RF_OFF_BY_HW, // For UI to query if external HW signal disable RF, 061229, rcnjko.
1752 HW_VAR_BUS_SPEED, // In unit of bps. 2006.07.03, by rcnjko.
1753 HW_VAR_SET_DEV_POWER, // Set to low power, added by LanHsin, 2007.
1754
1755 //1!!!!!!!!!!!!!!!!!!!!!!!!!!!
1756 //1Attention Please!!!<11n or 8190 specific code should be put below this line>
1757 //1!!!!!!!!!!!!!!!!!!!!!!!!!!!
1758 HW_VAR_RCR, //for RCR, David 2006,05,11
1759 HW_VAR_RATR_0,
1760 HW_VAR_RRSR,
1761 HW_VAR_CPU_RST,
1762 HW_VAR_CHECK_BSSID,
1763 HW_VAR_LBK_MODE, // Set lookback mode, 2008.06.11. added by Roger.
1764 // Set HW related setting for 11N AES bug.
1765 HW_VAR_AES_11N_FIX,
1766 // Set Usb Rx Aggregation
1767 HW_VAR_USB_RX_AGGR,
1768 HW_VAR_USER_CONTROL_TURBO_MODE,
1769 HW_VAR_RETRY_LIMIT,
1770#ifndef _RTL8192_EXT_PATCH_
1771 HW_VAR_INIT_TX_RATE, //Get Current Tx rate register. 2008.12.10. Added by tynli
1772#endif
1773 HW_VAR_TX_RATE_REG, //Get Current Tx rate register. 2008.12.10. Added by tynli
1774 HW_VAR_EFUSE_USAGE, //Get current EFUSE utilization. 2008.12.19. Added by Roger.
1775 HW_VAR_EFUSE_BYTES,
1776 HW_VAR_AUTOLOAD_STATUS, //Get current autoload status, 0: autoload success, 1: autoload fail. 2008.12.19. Added by Roger.
1777 HW_VAR_RF_2R_DISABLE, // 2R disable
1778 HW_VAR_SET_RPWM,
1779 HW_VAR_H2C_FW_PWRMODE, // For setting FW related H2C cmd structure. by tynli. 2009.2.18
1780 HW_VAR_H2C_FW_JOINBSSRPT, // For setting FW related H2C cmd structure. by tynli. 2009.2.18
1781 HW_VAR_1X1_RECV_COMBINE, // For 1T2R but only 1SS, Add by hpfan 2009.04.16 hpfan
1782 HW_VAR_STOP_SEND_BEACON,
1783 HW_VAR_TSF_TIMER, // Read from TSF register to get the current TSF timer, by Bruce, 2009-07-22.
1784 HW_VAR_IO_CMD,
1785 HW_VAR_HANDLE_FW_C2H, //Added by tynli. For handling FW C2H command. 2009.10.07.
1786 HW_VAR_DL_FW_RSVD_PAGE, //Added by tynli. Download the packets that FW will use to RSVD page. 2009.10.14.
1787 HW_VAR_AID, //Added by tynli.
1788 HW_VAR_HW_SEQ_ENABLE, //Added by tynli. 2009.10.20.
1789 HW_VAR_UPDATE_TSF, //Added by tynli. 2009.10.22. For Hw count TBTT time.
1790 HW_VAR_BCN_VALID, //Added by tynli.
1791 HW_VAR_FWLPS_RF_ON //Added by tynli. 2009.11.09. For checking if Fw finishs RF on sequence.
1792}HW_VARIABLES;
1793
1794#define RT_CHECK_FOR_HANG_PERIOD 2
1795
1796struct ieee80211_device {
1797 struct net_device *dev;
1798 struct ieee80211_security sec;
1799
1800 bool need_sw_enc;
1801#ifdef ENABLE_LPS
1802 bool bAwakePktSent;
1803 u8 LPSDelayCnt;
1804 bool bIsAggregateFrame;
1805 bool polling;
1806 void (*LeisurePSLeave)(struct ieee80211_device *ieee);
1807#endif
1808
1809#ifdef ENABLE_IPS
1810 bool proto_stoppping;
1811 bool wx_set_enc;
1812 struct semaphore ips_sem;
1813 struct work_struct ips_leave_wq;
1814 void (*ieee80211_ips_leave_wq) (struct ieee80211_device *ieee);
1815 void (*ieee80211_ips_leave)(struct ieee80211_device *ieee);
1816#endif
1817 void (*SetHwRegHandler)(struct ieee80211_device *ieee, u8 variable, u8 *val);
1818 u8 (*rtllib_ap_sec_type)(struct ieee80211_device *ieee);
1819
1820 //hw security related
1821 u8 hwsec_active; //hw security active.
1822 bool is_silent_reset;
1823 bool is_roaming;
1824 bool ieee_up;
1825 bool bSupportRemoteWakeUp;
1826 bool actscanning;
1827 bool beinretry;
1828 bool is_set_key;
1829 //11n spec related I wonder if These info structure need to be moved out of ieee80211_device
1830
1831 //11n HT below
1832 PRT_HIGH_THROUGHPUT pHTInfo;
1833 spinlock_t bw_spinlock;
1834
1835 spinlock_t reorder_spinlock;
1836 // for HT operation rate set. we use this one for HT data rate to separate different descriptors
1837 //the way fill this is the same as in the IE
1838 u8 Regdot11HTOperationalRateSet[16]; //use RATR format
1839 u8 dot11HTOperationalRateSet[16]; //use RATR format
1840 u8 RegHTSuppRateSet[16];
1841 u8 HTCurrentOperaRate;
1842 u8 HTHighestOperaRate;
1843 //wb added for rate operation mode to firmware
1844 u8 bTxDisableRateFallBack;
1845 u8 bTxUseDriverAssingedRate;
1846 atomic_t atm_chnlop;
1847 atomic_t atm_swbw;
1848
1849 // 802.11e and WMM Traffic Stream Info (TX)
1850 struct list_head Tx_TS_Admit_List;
1851 struct list_head Tx_TS_Pending_List;
1852 struct list_head Tx_TS_Unused_List;
1853 TX_TS_RECORD TxTsRecord[TOTAL_TS_NUM];
1854 // 802.11e and WMM Traffic Stream Info (RX)
1855 struct list_head Rx_TS_Admit_List;
1856 struct list_head Rx_TS_Pending_List;
1857 struct list_head Rx_TS_Unused_List;
1858 RX_TS_RECORD RxTsRecord[TOTAL_TS_NUM];
1859 RX_REORDER_ENTRY RxReorderEntry[128];
1860 struct list_head RxReorder_Unused_List;
1861 u8 ForcedPriority; // Force per-packet priority 1~7. (default: 0, not to force it.)
1862
1863
1864 /* Bookkeeping structures */
1865 struct net_device_stats stats;
1866 struct ieee80211_stats ieee_stats;
1867 struct ieee80211_softmac_stats softmac_stats;
1868
1869 /* Probe / Beacon management */
1870 struct list_head network_free_list;
1871 struct list_head network_list;
1872 struct ieee80211_network *networks;
1873 int scans;
1874 int scan_age;
1875
1876 int iw_mode; /* operating mode (IW_MODE_*) */
1877 struct iw_spy_data spy_data;
1878
1879 spinlock_t lock;
1880 spinlock_t wpax_suitlist_lock;
1881
1882 int tx_headroom; /* Set to size of any additional room needed at front
1883 * of allocated Tx SKBs */
1884 u32 config;
1885
1886 /* WEP and other encryption related settings at the device level */
1887 int open_wep; /* Set to 1 to allow unencrypted frames */
1888 int auth_mode;
1889 int reset_on_keychange; /* Set to 1 if the HW needs to be reset on
1890 * WEP key changes */
1891
1892 /* If the host performs {en,de}cryption, then set to 1 */
1893 int host_encrypt;
1894 int host_encrypt_msdu;
1895 int host_decrypt;
1896 /* host performs multicast decryption */
1897 int host_mc_decrypt;
1898
1899 /* host should strip IV and ICV from protected frames */
1900 /* meaningful only when hardware decryption is being used */
1901 int host_strip_iv_icv;
1902
1903 int host_open_frag;
1904 int host_build_iv;
1905 int ieee802_1x; /* is IEEE 802.1X used */
1906
1907 /* WPA data */
1908 bool bHalfWirelessN24GMode;
1909 int wpa_enabled;
1910 int drop_unencrypted;
1911 int tkip_countermeasures;
1912 int privacy_invoked;
1913 size_t wpa_ie_len;
1914 u8 *wpa_ie;
1915 u8 ap_mac_addr[6];
1916 u16 pairwise_key_type;
1917 u16 group_key_type;
1918 struct list_head crypt_deinit_list;
1919 struct ieee80211_crypt_data *crypt[WEP_KEYS];
1920 int tx_keyidx; /* default TX key index (crypt[tx_keyidx]) */
1921 struct timer_list crypt_deinit_timer;
1922 int crypt_quiesced;
1923
1924 int bcrx_sta_key; /* use individual keys to override default keys even
1925 * with RX of broad/multicast frames */
1926
1927 /* Fragmentation structures */
1928 // each streaming contain a entry
1929 struct ieee80211_frag_entry frag_cache[17][IEEE80211_FRAG_CACHE_LEN];
1930 unsigned int frag_next_idx[17];
1931 u16 fts; /* Fragmentation Threshold */
1932#define DEFAULT_RTS_THRESHOLD 2346U
1933#define MIN_RTS_THRESHOLD 1
1934#define MAX_RTS_THRESHOLD 2346U
1935 u16 rts; /* RTS threshold */
1936
1937 /* Association info */
1938 u8 bssid[ETH_ALEN];
1939
1940 /* This stores infos for the current network.
1941 * Either the network we are associated in INFRASTRUCTURE
1942 * or the network that we are creating in MASTER mode.
1943 * ad-hoc is a mixture ;-).
1944 * Note that in infrastructure mode, even when not associated,
1945 * fields bssid and essid may be valid (if wpa_set and essid_set
1946 * are true) as thy carry the value set by the user via iwconfig
1947 */
1948 struct ieee80211_network current_network;
1949
1950 enum ieee80211_state state;
1951
1952 int short_slot;
1953 int reg_mode;
1954 int mode; /* A, B, G */
1955 int modulation; /* CCK, OFDM */
1956 int freq_band; /* 2.4Ghz, 5.2Ghz, Mixed */
1957 int abg_true; /* ABG flag */
1958
1959 /* used for forcing the ibss workqueue to terminate
1960 * without wait for the syncro scan to terminate
1961 */
1962 short sync_scan_hurryup;
1963
1964 int perfect_rssi;
1965 int worst_rssi;
1966
1967 u16 prev_seq_ctl; /* used to drop duplicate frames */
1968
1969 /* map of allowed channels. 0 is dummy */
1970 // FIXME: remember to default to a basic channel plan depending of the PHY type
1971#ifdef ENABLE_DOT11D
1972 void* pDot11dInfo;
1973 bool bGlobalDomain;
1974#else
1975 int channel_map[MAX_CHANNEL_NUMBER+1];
1976#endif
1977 int rate; /* current rate */
1978 int basic_rate;
1979 //FIXME: pleace callback, see if redundant with softmac_features
1980 short active_scan;
1981
1982 /* this contains flags for selectively enable softmac support */
1983 u16 softmac_features;
1984
1985 /* if the sequence control field is not filled by HW */
1986 u16 seq_ctrl[5];
1987
1988 /* association procedure transaction sequence number */
1989 u16 associate_seq;
1990
1991 /* AID for RTXed association responses */
1992 u16 assoc_id;
1993
1994 /* power save mode related*/
1995 u8 ack_tx_to_ieee;
1996 short ps;
1997 short sta_sleep;
1998 int ps_timeout;
1999 int ps_period;
2000 struct tasklet_struct ps_task;
2001 u32 ps_th;
2002 u32 ps_tl;
2003
2004 short raw_tx;
2005 /* used if IEEE_SOFTMAC_TX_QUEUE is set */
2006 short queue_stop;
2007 short scanning;
2008 short proto_started;
2009
2010 struct semaphore wx_sem;
2011 struct semaphore scan_sem;
2012
2013 spinlock_t mgmt_tx_lock;
2014 spinlock_t beacon_lock;
2015
2016 short beacon_txing;
2017
2018 short wap_set;
2019 short ssid_set;
2020
2021 u8 wpax_type_set; //{added by David, 2006.9.28}
2022 u32 wpax_type_notify; //{added by David, 2006.9.26}
2023
2024 /* QoS related flag */
2025 char init_wmmparam_flag;
2026 /* set on initialization */
2027 u8 qos_support;
2028
2029 /* for discarding duplicated packets in IBSS */
2030 struct list_head ibss_mac_hash[IEEE_IBSS_MAC_HASH_SIZE];
2031
2032 /* for discarding duplicated packets in BSS */
2033 u16 last_rxseq_num[17]; /* rx seq previous per-tid */
2034 u16 last_rxfrag_num[17];/* tx frag previous per-tid */
2035 unsigned long last_packet_time[17];
2036
2037 /* for PS mode */
2038 unsigned long last_rx_ps_time;
2039 u8 LPSAwakeIntvl;
2040 u8 RegMaxLPSAwakeIntvl;
2041
2042 /* used if IEEE_SOFTMAC_SINGLE_QUEUE is set */
2043 struct sk_buff *mgmt_queue_ring[MGMT_QUEUE_NUM];
2044 int mgmt_queue_head;
2045 int mgmt_queue_tail;
2046#define IEEE80211_QUEUE_LIMIT 128
2047 u8 AsocRetryCount;
2048 unsigned int hw_header;
2049 struct sk_buff_head skb_waitQ[MAX_QUEUE_SIZE];
2050 struct sk_buff_head skb_aggQ[MAX_QUEUE_SIZE];
2051 struct sk_buff_head skb_drv_aggQ[MAX_QUEUE_SIZE];
2052 u32 sta_edca_param[4];
2053 bool aggregation;
2054 // Enable/Disable Rx immediate BA capability.
2055 bool enable_rx_imm_BA;
2056 bool bibsscoordinator;
2057
2058 //+by amy for DM ,080515
2059 //Dynamic Tx power for near/far range enable/Disable , by amy , 2008-05-15
2060 bool bdynamic_txpower_enable;
2061
2062 bool bCTSToSelfEnable;
2063 u8 CTSToSelfTH;
2064
2065 u32 fsync_time_interval;
2066 u32 fsync_rate_bitmap;
2067 u8 fsync_rssi_threshold;
2068 bool bfsync_enable;
2069
2070 u8 fsync_multiple_timeinterval; // FsyncMultipleTimeInterval * FsyncTimeInterval
2071 u32 fsync_firstdiff_ratethreshold; // low threshold
2072 u32 fsync_seconddiff_ratethreshold; // decrease threshold
2073 Fsync_State fsync_state;
2074 bool bis_any_nonbepkts;
2075 //20Mhz 40Mhz AutoSwitch Threshold
2076 bandwidth_autoswitch bandwidth_auto_switch;
2077 //for txpower tracking
2078 bool FwRWRF;
2079
2080 //added by amy for AP roaming
2081 RT_LINK_DETECT_T LinkDetectInfo;
2082
2083 /* used if IEEE_SOFTMAC_TX_QUEUE is set */
2084 struct tx_pending_t tx_pending;
2085
2086 /* used if IEEE_SOFTMAC_ASSOCIATE is set */
2087 struct timer_list associate_timer;
2088
2089 /* used if IEEE_SOFTMAC_BEACONS is set */
2090 struct timer_list beacon_timer;
2091 struct work_struct associate_complete_wq;
2092 struct work_struct associate_procedure_wq;
2093 struct delayed_work softmac_scan_wq;
2094 struct delayed_work associate_retry_wq;
2095 struct delayed_work start_ibss_wq;
2096 struct delayed_work hw_wakeup_wq;
2097
2098 struct work_struct wx_sync_scan_wq;
2099 struct workqueue_struct *wq;
2100
2101 /* Callback functions */
2102 void (*set_security)(struct ieee80211_device *ieee,
2103 struct ieee80211_security *sec);
2104
2105 /* Used to TX data frame by using txb structs.
2106 * this is not used if in the softmac_features
2107 * is set the flag IEEE_SOFTMAC_TX_QUEUE
2108 */
2109 int (*hard_start_xmit)(struct ieee80211_txb *txb,
2110 struct ieee80211_device *ieee);
2111
2112 int (*reset_port)(struct ieee80211_device *ieee);
2113 int (*is_queue_full) (struct ieee80211_device *ieee, int pri);
2114
2115 int (*handle_management) (struct ieee80211_device *ieee,
2116 struct ieee80211_network * network, u16 type);
2117 int (*is_qos_active) (struct ieee80211_device *ieee, struct sk_buff *skb);
2118
2119 /* Softmac-generated frames (mamagement) are TXed via this
2120 * callback if the flag IEEE_SOFTMAC_SINGLE_QUEUE is
2121 * not set. As some cards may have different HW queues that
2122 * one might want to use for data and management frames
2123 * the option to have two callbacks might be useful.
2124 * This function can't sleep.
2125 */
2126 int (*softmac_hard_start_xmit)(struct sk_buff *skb,
2127 struct ieee80211_device *ieee80211);
2128
2129 /* used instead of hard_start_xmit (not softmac_hard_start_xmit)
2130 * if the IEEE_SOFTMAC_TX_QUEUE feature is used to TX data
2131 * frames. I the option IEEE_SOFTMAC_SINGLE_QUEUE is also set
2132 * then also management frames are sent via this callback.
2133 * This function can't sleep.
2134 */
2135 void (*softmac_data_hard_start_xmit)(struct sk_buff *skb,
2136 struct ieee80211_device *ieee80211, int rate);
2137
2138 /* stops the HW queue for DATA frames. Useful to avoid
2139 * waste time to TX data frame when we are reassociating
2140 * This function can sleep.
2141 */
2142 void (*data_hard_stop)(struct ieee80211_device *ieee80211);
2143
2144 /* OK this is complementar to data_poll_hard_stop */
2145 void (*data_hard_resume)(struct ieee80211_device *ieee80211);
2146
2147 /* ask to the driver to retune the radio .
2148 * This function can sleep. the driver should ensure
2149 * the radio has been swithced before return.
2150 */
2151 void (*set_chan)(struct ieee80211_device *ieee80211, short ch);
2152
2153 /* These are not used if the ieee stack takes care of
2154 * scanning (IEEE_SOFTMAC_SCAN feature set).
2155 * In this case only the set_chan is used.
2156 *
2157 * The syncro version is similar to the start_scan but
2158 * does not return until all channels has been scanned.
2159 * this is called in user context and should sleep,
2160 * it is called in a work_queue when swithcing to ad-hoc mode
2161 * or in behalf of iwlist scan when the card is associated
2162 * and root user ask for a scan.
2163 * the function stop_scan should stop both the syncro and
2164 * background scanning and can sleep.
2165 * The function start_scan should initiate the background
2166 * scanning and can't sleep.
2167 */
2168 void (*scan_syncro)(struct ieee80211_device *ieee80211);
2169 void (*start_scan)(struct ieee80211_device *ieee80211);
2170 void (*stop_scan)(struct ieee80211_device *ieee80211);
2171
2172 /* indicate the driver that the link state is changed
2173 * for example it may indicate the card is associated now.
2174 * Driver might be interested in this to apply RX filter
2175 * rules or simply light the LINK led
2176 */
2177 void (*link_change)(struct ieee80211_device *ieee80211);
2178
2179 /* these two function indicates to the HW when to start
2180 * and stop to send beacons. This is used when the
2181 * IEEE_SOFTMAC_BEACONS is not set. For now the
2182 * stop_send_bacons is NOT guaranteed to be called only
2183 * after start_send_beacons.
2184 */
2185 void (*start_send_beacons) (struct ieee80211_device *dev);
2186 void (*stop_send_beacons) (struct ieee80211_device *dev);
2187
2188 /* power save mode related */
2189 void (*sta_wake_up) (struct ieee80211_device *ieee80211);
2190 void (*enter_sleep_state) (struct ieee80211_device *ieee80211, u32 th, u32 tl);
2191 short (*ps_is_queue_empty) (struct ieee80211_device *ieee80211);
2192 int (*handle_beacon) (struct ieee80211_device *ieee80211, struct ieee80211_beacon *beacon, struct ieee80211_network *network);
2193 int (*handle_assoc_response) (struct ieee80211_device *ieee80211, struct ieee80211_assoc_response_frame *resp, struct ieee80211_network *network);
2194
2195 /* check whether Tx hw resouce available */
2196 short (*check_nic_enough_desc)(struct ieee80211_device *ieee80211, int queue_index);
2197 //added by wb for HT related
2198 void (*SetBWModeHandler)(struct ieee80211_device *ieee80211, HT_CHANNEL_WIDTH Bandwidth, HT_EXTCHNL_OFFSET Offset);
2199 bool (*GetNmodeSupportBySecCfg)(struct ieee80211_device *ieee80211);
2200 void (*SetWirelessMode)(struct ieee80211_device *ieee80211, u8 wireless_mode);
2201 bool (*GetHalfNmodeSupportByAPsHandler)(struct ieee80211_device *ieee80211);
2202 void (*InitialGainHandler)(struct ieee80211_device *ieee80211, u8 Operation);
2203
2204 /* This must be the last item so that it points to the data
2205 * allocated beyond this structure by alloc_ieee80211 */
2206 u8 priv[0];
2207};
2208
2209#define RT_RF_OFF_LEVL_ASPM BIT0 // PCI ASPM
2210#define RT_RF_OFF_LEVL_CLK_REQ BIT1 // PCI clock request
2211#define RT_RF_OFF_LEVL_PCI_D3 BIT2 // PCI D3 mode
2212#define RT_RF_OFF_LEVL_HALT_NIC BIT3 // NIC halt, re-initialize hw parameters
2213#define RT_RF_OFF_LEVL_FREE_FW BIT4 // FW free, re-download the FW
2214#define RT_RF_OFF_LEVL_FW_32K BIT5 // FW in 32k
2215#define RT_RF_PS_LEVEL_ALWAYS_ASPM BIT6 // Always enable ASPM and Clock Req in initialization.
2216#define RT_RF_LPS_DISALBE_2R BIT30 // When LPS is on, disable 2R if no packet is received or transmittd.
2217#define RT_RF_LPS_LEVEL_ASPM BIT31 // LPS with ASPM
2218#define RT_IN_PS_LEVEL(pPSC, _PS_FLAG) ((pPSC->CurPsLevel & _PS_FLAG) ? true : false)
2219#define RT_CLEAR_PS_LEVEL(pPSC, _PS_FLAG) (pPSC->CurPsLevel &= (~(_PS_FLAG)))
2220#define RT_SET_PS_LEVEL(pPSC, _PS_FLAG) (pPSC->CurPsLevel |= _PS_FLAG)
2221
2222#define IEEE_A (1<<0)
2223#define IEEE_B (1<<1)
2224#define IEEE_G (1<<2)
2225#define IEEE_N_24G (1<<4)
2226#define IEEE_N_5G (1<<5)
2227#define IEEE_MODE_MASK (IEEE_A|IEEE_B|IEEE_G)
2228
2229/* Generate a 802.11 header */
2230
2231/* Uses the channel change callback directly
2232 * instead of [start/stop] scan callbacks
2233 */
2234#define IEEE_SOFTMAC_SCAN (1<<2)
2235
2236/* Perform authentication and association handshake */
2237#define IEEE_SOFTMAC_ASSOCIATE (1<<3)
2238
2239/* Generate probe requests */
2240#define IEEE_SOFTMAC_PROBERQ (1<<4)
2241
2242/* Generate respones to probe requests */
2243#define IEEE_SOFTMAC_PROBERS (1<<5)
2244
2245/* The ieee802.11 stack will manages the netif queue
2246 * wake/stop for the driver, taking care of 802.11
2247 * fragmentation. See softmac.c for details. */
2248#define IEEE_SOFTMAC_TX_QUEUE (1<<7)
2249
2250/* Uses only the softmac_data_hard_start_xmit
2251 * even for TX management frames.
2252 */
2253#define IEEE_SOFTMAC_SINGLE_QUEUE (1<<8)
2254
2255/* Generate beacons. The stack will enqueue beacons
2256 * to the card
2257 */
2258#define IEEE_SOFTMAC_BEACONS (1<<6)
2259
2260static inline void *ieee80211_priv(struct net_device *dev)
2261{
2262 return ((struct ieee80211_device *)netdev_priv(dev))->priv;
2263}
2264
2265extern inline int ieee80211_is_empty_essid(const char *essid, int essid_len)
2266{
2267 /* Single white space is for Linksys APs */
2268 if (essid_len == 1 && essid[0] == ' ')
2269 return 1;
2270
2271 /* Otherwise, if the entire essid is 0, we assume it is hidden */
2272 while (essid_len) {
2273 essid_len--;
2274 if (essid[essid_len] != '\0')
2275 return 0;
2276 }
2277
2278 return 1;
2279}
2280
2281extern inline int ieee80211_is_valid_mode(struct ieee80211_device *ieee, int mode)
2282{
2283 /*
2284 * It is possible for both access points and our device to support
2285 * combinations of modes, so as long as there is one valid combination
2286 * of ap/device supported modes, then return success
2287 *
2288 */
2289 if ((mode & IEEE_A) &&
2290 (ieee->modulation & IEEE80211_OFDM_MODULATION) &&
2291 (ieee->freq_band & IEEE80211_52GHZ_BAND))
2292 return 1;
2293
2294 if ((mode & IEEE_G) &&
2295 (ieee->modulation & IEEE80211_OFDM_MODULATION) &&
2296 (ieee->freq_band & IEEE80211_24GHZ_BAND))
2297 return 1;
2298
2299 if ((mode & IEEE_B) &&
2300 (ieee->modulation & IEEE80211_CCK_MODULATION) &&
2301 (ieee->freq_band & IEEE80211_24GHZ_BAND))
2302 return 1;
2303
2304 return 0;
2305}
2306
2307extern inline int ieee80211_get_hdrlen(u16 fc)
2308{
2309 int hdrlen = IEEE80211_3ADDR_LEN;
2310
2311 switch (WLAN_FC_GET_TYPE(fc)) {
2312 case IEEE80211_FTYPE_DATA:
2313 if ((fc & IEEE80211_FCTL_FROMDS) && (fc & IEEE80211_FCTL_TODS))
2314 hdrlen = IEEE80211_4ADDR_LEN; /* Addr4 */
2315 if(IEEE80211_QOS_HAS_SEQ(fc))
2316 hdrlen += 2; /* QOS ctrl*/
2317 break;
2318 case IEEE80211_FTYPE_CTL:
2319 switch (WLAN_FC_GET_STYPE(fc)) {
2320 case IEEE80211_STYPE_CTS:
2321 case IEEE80211_STYPE_ACK:
2322 hdrlen = IEEE80211_1ADDR_LEN;
2323 break;
2324 default:
2325 hdrlen = IEEE80211_2ADDR_LEN;
2326 break;
2327 }
2328 break;
2329 }
2330
2331 return hdrlen;
2332}
2333
2334static inline u8 *ieee80211_get_payload(struct ieee80211_hdr *hdr)
2335{
2336 switch (ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_ctl))) {
2337 case IEEE80211_1ADDR_LEN:
2338 return ((struct ieee80211_hdr_1addr *)hdr)->payload;
2339 case IEEE80211_2ADDR_LEN:
2340 return ((struct ieee80211_hdr_2addr *)hdr)->payload;
2341 case IEEE80211_3ADDR_LEN:
2342 return ((struct ieee80211_hdr_3addr *)hdr)->payload;
2343 case IEEE80211_4ADDR_LEN:
2344 return ((struct ieee80211_hdr_4addr *)hdr)->payload;
2345 }
2346 return NULL;
2347}
2348
2349static inline int ieee80211_is_ofdm_rate(u8 rate)
2350{
2351 switch (rate & ~IEEE80211_BASIC_RATE_MASK) {
2352 case IEEE80211_OFDM_RATE_6MB:
2353 case IEEE80211_OFDM_RATE_9MB:
2354 case IEEE80211_OFDM_RATE_12MB:
2355 case IEEE80211_OFDM_RATE_18MB:
2356 case IEEE80211_OFDM_RATE_24MB:
2357 case IEEE80211_OFDM_RATE_36MB:
2358 case IEEE80211_OFDM_RATE_48MB:
2359 case IEEE80211_OFDM_RATE_54MB:
2360 return 1;
2361 }
2362 return 0;
2363}
2364
2365static inline int ieee80211_is_cck_rate(u8 rate)
2366{
2367 switch (rate & ~IEEE80211_BASIC_RATE_MASK) {
2368 case IEEE80211_CCK_RATE_1MB:
2369 case IEEE80211_CCK_RATE_2MB:
2370 case IEEE80211_CCK_RATE_5MB:
2371 case IEEE80211_CCK_RATE_11MB:
2372 return 1;
2373 }
2374 return 0;
2375}
2376
2377
2378/* ieee80211.c */
2379void free_ieee80211(struct net_device *dev);
2380struct net_device *alloc_ieee80211(int sizeof_priv);
2381
2382int ieee80211_set_encryption(struct ieee80211_device *ieee);
2383
2384/* ieee80211_tx.c */
2385
2386int ieee80211_encrypt_fragment(
2387 struct ieee80211_device *ieee,
2388 struct sk_buff *frag,
2389 int hdr_len);
2390
2391int ieee80211_rtl_xmit(struct sk_buff *skb,
2392 struct net_device *dev);
2393void ieee80211_txb_free(struct ieee80211_txb *);
2394
2395
2396/* ieee80211_rx.c */
2397int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
2398 struct ieee80211_rx_stats *rx_stats);
2399void ieee80211_rx_mgt(struct ieee80211_device *ieee,
2400 struct ieee80211_hdr_4addr *header,
2401 struct ieee80211_rx_stats *stats);
2402
2403/* ieee80211_wx.c */
2404int ieee80211_wx_get_scan(struct ieee80211_device *ieee,
2405 struct iw_request_info *info,
2406 union iwreq_data *wrqu, char *key);
2407int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
2408 struct iw_request_info *info,
2409 union iwreq_data *wrqu, char *key);
2410int ieee80211_wx_get_encode(struct ieee80211_device *ieee,
2411 struct iw_request_info *info,
2412 union iwreq_data *wrqu, char *key);
2413int ieee80211_wx_get_encode_ext(struct ieee80211_device *ieee,
2414 struct iw_request_info *info,
2415 union iwreq_data* wrqu, char *extra);
2416int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,
2417 struct iw_request_info *info,
2418 union iwreq_data* wrqu, char *extra);
2419int ieee80211_wx_set_auth(struct ieee80211_device *ieee,
2420 struct iw_request_info *info,
2421 struct iw_param *data, char *extra);
2422int ieee80211_wx_set_mlme(struct ieee80211_device *ieee,
2423 struct iw_request_info *info,
2424 union iwreq_data *wrqu, char *extra);
2425int ieee80211_wx_set_gen_ie(struct ieee80211_device *ieee, u8 *ie, size_t len);
2426
2427/* ieee80211_softmac.c */
2428short ieee80211_is_54g(struct ieee80211_network net);
2429short ieee80211_is_shortslot(struct ieee80211_network net);
2430int ieee80211_rx_frame_softmac(struct ieee80211_device *ieee, struct sk_buff *skb,
2431 struct ieee80211_rx_stats *rx_stats, u16 type,
2432 u16 stype);
2433void ieee80211_softmac_new_net(struct ieee80211_device *ieee, struct ieee80211_network *net);
2434
2435void SendDisassociation(struct ieee80211_device *ieee, u8* asSta, u8 asRsn);
2436void ieee80211_softmac_xmit(struct ieee80211_txb *txb, struct ieee80211_device *ieee);
2437
2438void ieee80211_stop_send_beacons(struct ieee80211_device *ieee);
2439void notify_wx_assoc_event(struct ieee80211_device *ieee);
2440void ieee80211_softmac_check_all_nets(struct ieee80211_device *ieee);
2441void ieee80211_start_bss(struct ieee80211_device *ieee);
2442void ieee80211_start_master_bss(struct ieee80211_device *ieee);
2443void ieee80211_start_ibss(struct ieee80211_device *ieee);
2444void ieee80211_softmac_init(struct ieee80211_device *ieee);
2445void ieee80211_softmac_free(struct ieee80211_device *ieee);
2446void ieee80211_associate_abort(struct ieee80211_device *ieee);
2447void ieee80211_disassociate(struct ieee80211_device *ieee);
2448void ieee80211_stop_scan(struct ieee80211_device *ieee);
2449void ieee80211_start_scan_syncro(struct ieee80211_device *ieee);
2450void ieee80211_check_all_nets(struct ieee80211_device *ieee);
2451void ieee80211_start_protocol(struct ieee80211_device *ieee);
2452void ieee80211_stop_protocol(struct ieee80211_device *ieee,u8 shutdown);
2453void ieee80211_softmac_start_protocol(struct ieee80211_device *ieee);
2454void ieee80211_softmac_stop_protocol(struct ieee80211_device *ieee,u8 shutdown);
2455void ieee80211_reset_queue(struct ieee80211_device *ieee);
2456void ieee80211_rtl_wake_queue(struct ieee80211_device *ieee);
2457void ieee80211_rtl_stop_queue(struct ieee80211_device *ieee);
2458struct sk_buff *ieee80211_get_beacon(struct ieee80211_device *ieee);
2459void ieee80211_start_send_beacons(struct ieee80211_device *ieee);
2460void ieee80211_stop_send_beacons(struct ieee80211_device *ieee);
2461int ieee80211_wpa_supplicant_ioctl(struct ieee80211_device *ieee, struct iw_point *p);
2462void notify_wx_assoc_event(struct ieee80211_device *ieee);
2463void ieee80211_ps_tx_ack(struct ieee80211_device *ieee, short success);
2464
2465void softmac_mgmt_xmit(struct sk_buff *skb, struct ieee80211_device *ieee);
2466
2467/* ieee80211_crypt_ccmp&tkip&wep.c */
2468void ieee80211_tkip_null(void);
2469void ieee80211_wep_null(void);
2470void ieee80211_ccmp_null(void);
2471
2472/* ieee80211_softmac_wx.c */
2473
2474int ieee80211_wx_get_wap(struct ieee80211_device *ieee,
2475 struct iw_request_info *info,
2476 union iwreq_data *wrqu, char *ext);
2477
2478int ieee80211_wx_set_wap(struct ieee80211_device *ieee,
2479 struct iw_request_info *info,
2480 union iwreq_data *awrq,
2481 char *extra);
2482
2483int ieee80211_wx_get_essid(struct ieee80211_device *ieee, struct iw_request_info *a,union iwreq_data *wrqu,char *b);
2484
2485int ieee80211_wx_set_rate(struct ieee80211_device *ieee,
2486 struct iw_request_info *info,
2487 union iwreq_data *wrqu, char *extra);
2488
2489int ieee80211_wx_get_rate(struct ieee80211_device *ieee,
2490 struct iw_request_info *info,
2491 union iwreq_data *wrqu, char *extra);
2492
2493int ieee80211_wx_set_mode(struct ieee80211_device *ieee, struct iw_request_info *a,
2494 union iwreq_data *wrqu, char *b);
2495
2496int ieee80211_wx_set_scan(struct ieee80211_device *ieee, struct iw_request_info *a,
2497 union iwreq_data *wrqu, char *b);
2498
2499int ieee80211_wx_set_essid(struct ieee80211_device *ieee,
2500 struct iw_request_info *a,
2501 union iwreq_data *wrqu, char *extra);
2502
2503int ieee80211_wx_get_mode(struct ieee80211_device *ieee, struct iw_request_info *a,
2504 union iwreq_data *wrqu, char *b);
2505
2506int ieee80211_wx_set_freq(struct ieee80211_device *ieee, struct iw_request_info *a,
2507 union iwreq_data *wrqu, char *b);
2508
2509int ieee80211_wx_get_freq(struct ieee80211_device *ieee, struct iw_request_info *a,
2510 union iwreq_data *wrqu, char *b);
2511
2512void ieee80211_wx_sync_scan_wq(struct work_struct *work);
2513
2514int ieee80211_wx_set_rawtx(struct ieee80211_device *ieee,
2515 struct iw_request_info *info,
2516 union iwreq_data *wrqu, char *extra);
2517
2518int ieee80211_wx_get_name(struct ieee80211_device *ieee,
2519 struct iw_request_info *info,
2520 union iwreq_data *wrqu, char *extra);
2521
2522int ieee80211_wx_set_power(struct ieee80211_device *ieee,
2523 struct iw_request_info *info,
2524 union iwreq_data *wrqu, char *extra);
2525
2526int ieee80211_wx_get_power(struct ieee80211_device *ieee,
2527 struct iw_request_info *info,
2528 union iwreq_data *wrqu, char *extra);
2529
2530int ieee80211_wx_set_rts(struct ieee80211_device *ieee,
2531 struct iw_request_info *info,
2532 union iwreq_data *wrqu, char *extra);
2533
2534int ieee80211_wx_get_rts(struct ieee80211_device *ieee,
2535 struct iw_request_info *info,
2536 union iwreq_data *wrqu, char *extra);
2537//HT
2538#define MAX_RECEIVE_BUFFER_SIZE 9100
2539void HTDebugHTCapability(u8 *CapIE, u8 *TitleString );
2540void HTDebugHTInfo(u8 *InfoIE, u8 *TitleString);
2541
2542void HTSetConnectBwMode(struct ieee80211_device *ieee, HT_CHANNEL_WIDTH Bandwidth, HT_EXTCHNL_OFFSET Offset);
2543void HTUpdateDefaultSetting(struct ieee80211_device *ieee);
2544void HTConstructCapabilityElement(struct ieee80211_device *ieee, u8 *posHTCap, u8 *len, u8 isEncrypt);
2545void HTConstructInfoElement(struct ieee80211_device *ieee, u8 *posHTInfo, u8 *len, u8 isEncrypt);
2546void HTConstructRT2RTAggElement(struct ieee80211_device *ieee, u8 *posRT2RTAgg, u8 *len);
2547void HTOnAssocRsp(struct ieee80211_device *ieee);
2548void HTInitializeHTInfo(struct ieee80211_device *ieee);
2549void HTInitializeBssDesc(PBSS_HT pBssHT);
2550void HTResetSelfAndSavePeerSetting(struct ieee80211_device *ieee, struct ieee80211_network *pNetwork);
2551void HTUpdateSelfAndPeerSetting(struct ieee80211_device *ieee, struct ieee80211_network *pNetwork);
2552u8 HTGetHighestMCSRate(struct ieee80211_device *ieee, u8 *pMCSRateSet, u8 *pMCSFilter);
2553extern u8 MCS_FILTER_ALL[];
2554extern u16 MCS_DATA_RATE[2][2][77] ;
2555
2556u8 HTCCheck(struct ieee80211_device *ieee, u8 *pFrame);
2557void HTResetIOTSetting(PRT_HIGH_THROUGHPUT pHTInfo);
2558bool IsHTHalfNmodeAPs(struct ieee80211_device *ieee);
2559u16 HTHalfMcsToDataRate(struct ieee80211_device *ieee, u8 nMcsRate);
2560u16 HTMcsToDataRate( struct ieee80211_device *ieee, u8 nMcsRate);
2561u16 TxCountToDataRate( struct ieee80211_device *ieee, u8 nDataRate);
2562int ieee80211_rx_ADDBAReq( struct ieee80211_device *ieee, struct sk_buff *skb);
2563int ieee80211_rx_ADDBARsp( struct ieee80211_device *ieee, struct sk_buff *skb);
2564int ieee80211_rx_DELBA(struct ieee80211_device *ieee, struct sk_buff *skb);
2565void TsInitAddBA( struct ieee80211_device *ieee, PTX_TS_RECORD pTS, u8 Policy, u8 bOverwritePending);
2566void TsInitDelBA( struct ieee80211_device *ieee, PTS_COMMON_INFO pTsCommonInfo, TR_SELECT TxRxSelect);
2567void BaSetupTimeOut(unsigned long data);
2568void TxBaInactTimeout(unsigned long data);
2569void RxBaInactTimeout(unsigned long data);
2570void ResetBaEntry( PBA_RECORD pBA);
2571//function in TS.c
2572bool GetTs(
2573 struct ieee80211_device* ieee,
2574 PTS_COMMON_INFO *ppTS,
2575 u8* Addr,
2576 u8 TID,
2577 TR_SELECT TxRxSelect, //Rx:1, Tx:0
2578 bool bAddNewTs
2579 );
2580void TSInitialize(struct ieee80211_device *ieee);
2581void TsStartAddBaProcess(struct ieee80211_device *ieee, PTX_TS_RECORD pTxTS);
2582void RemovePeerTS(struct ieee80211_device *ieee, u8 *Addr);
2583void RemoveAllTS(struct ieee80211_device *ieee);
2584void ieee80211_softmac_scan_syncro(struct ieee80211_device *ieee);
2585
2586extern const long ieee80211_wlan_frequencies[];
2587
2588extern inline void ieee80211_increment_scans(struct ieee80211_device *ieee)
2589{
2590 ieee->scans++;
2591}
2592
2593extern inline int ieee80211_get_scans(struct ieee80211_device *ieee)
2594{
2595 return ieee->scans;
2596}
2597
2598static inline const char *escape_essid(const char *essid, u8 essid_len) {
2599 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
2600 const char *s = essid;
2601 char *d = escaped;
2602
2603 if (ieee80211_is_empty_essid(essid, essid_len)) {
2604 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
2605 return escaped;
2606 }
2607
2608 essid_len = min(essid_len, (u8)IW_ESSID_MAX_SIZE);
2609 while (essid_len--) {
2610 if (*s == '\0') {
2611 *d++ = '\\';
2612 *d++ = '0';
2613 s++;
2614 } else {
2615 *d++ = *s++;
2616 }
2617 }
2618 *d = '\0';
2619 return escaped;
2620}
2621
2622/* For the function is more related to hardware setting, it's better to use the
2623 * ieee handler to refer to it.
2624 */
2625int ieee80211_data_xmit(struct sk_buff *skb, struct net_device *dev);
2626int ieee80211_parse_info_param(struct ieee80211_device *ieee,
2627 struct ieee80211_info_element *info_element,
2628 u16 length,
2629 struct ieee80211_network *network,
2630 struct ieee80211_rx_stats *stats);
2631
2632void ieee80211_indicate_packets(struct ieee80211_device *ieee, struct ieee80211_rxb** prxbIndicateArray,u8 index);
2633void ieee80211_sta_ps_send_null_frame(struct ieee80211_device *ieee, short pwr);
2634void ieee80211_sta_ps_send_pspoll_frame(struct ieee80211_device *ieee);
2635#define RT_ASOC_RETRY_LIMIT 5
2636#endif /* IEEE80211_H */
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_module.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_module.c
deleted file mode 100644
index 37a65ff4b12..00000000000
--- a/drivers/staging/rtl8192e/ieee80211/ieee80211_module.c
+++ /dev/null
@@ -1,352 +0,0 @@
1/*******************************************************************************
2
3 Copyright(c) 2004 Intel Corporation. All rights reserved.
4
5 Portions of this file are based on the WEP enablement code provided by the
6 Host AP project hostap-drivers v0.1.3
7 Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
8 <jkmaline@cc.hut.fi>
9 Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
10
11 This program is free software; you can redistribute it and/or modify it
12 under the terms of version 2 of the GNU General Public License as
13 published by the Free Software Foundation.
14
15 This program is distributed in the hope that it will be useful, but WITHOUT
16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
17 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
18 more details.
19
20 You should have received a copy of the GNU General Public License along with
21 this program; if not, write to the Free Software Foundation, Inc., 59
22 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23
24 The full GNU General Public License is included in this distribution in the
25 file called LICENSE.
26
27 Contact Information:
28 James P. Ketrenos <ipw2100-admin@linux.intel.com>
29 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30
31*******************************************************************************/
32
33#include <linux/compiler.h>
34#include <linux/errno.h>
35#include <linux/if_arp.h>
36#include <linux/in6.h>
37#include <linux/in.h>
38#include <linux/ip.h>
39#include <linux/kernel.h>
40#include <linux/module.h>
41#include <linux/netdevice.h>
42#include <linux/pci.h>
43#include <linux/proc_fs.h>
44#include <linux/skbuff.h>
45#include <linux/slab.h>
46#include <linux/tcp.h>
47#include <linux/types.h>
48#include <linux/wireless.h>
49#include <linux/etherdevice.h>
50#include <asm/uaccess.h>
51#include <net/arp.h>
52
53#include "ieee80211.h"
54
55MODULE_DESCRIPTION("802.11 data/management/control stack");
56MODULE_AUTHOR("Copyright (C) 2004 Intel Corporation <jketreno@linux.intel.com>");
57MODULE_LICENSE("GPL");
58
59#define DRV_NAME "ieee80211"
60
61static inline int ieee80211_networks_allocate(struct ieee80211_device *ieee)
62{
63 if (ieee->networks)
64 return 0;
65
66 ieee->networks = kcalloc(
67 MAX_NETWORK_COUNT, sizeof(struct ieee80211_network),
68 GFP_KERNEL);
69 if (!ieee->networks) {
70 printk(KERN_WARNING "%s: Out of memory allocating beacons\n",
71 ieee->dev->name);
72 return -ENOMEM;
73 }
74
75 return 0;
76}
77
78static inline void ieee80211_networks_free(struct ieee80211_device *ieee)
79{
80 if (!ieee->networks)
81 return;
82 kfree(ieee->networks);
83 ieee->networks = NULL;
84}
85
86static inline void ieee80211_networks_initialize(struct ieee80211_device *ieee)
87{
88 int i;
89
90 INIT_LIST_HEAD(&ieee->network_free_list);
91 INIT_LIST_HEAD(&ieee->network_list);
92 for (i = 0; i < MAX_NETWORK_COUNT; i++)
93 list_add_tail(&ieee->networks[i].list, &ieee->network_free_list);
94}
95
96
97struct net_device *alloc_ieee80211(int sizeof_priv)
98{
99 struct ieee80211_device *ieee;
100 struct net_device *dev;
101 int i, err;
102
103 IEEE80211_DEBUG_INFO("Initializing...\n");
104
105 dev = alloc_etherdev(sizeof(struct ieee80211_device) + sizeof_priv);
106 if (!dev) {
107 IEEE80211_ERROR("Unable to network device.\n");
108 goto failed;
109 }
110
111 ieee = netdev_priv(dev);
112
113 memset(ieee, 0, sizeof(struct ieee80211_device) + sizeof_priv);
114 ieee->dev = dev;
115
116 err = ieee80211_networks_allocate(ieee);
117 if (err) {
118 IEEE80211_ERROR("Unable to allocate beacon storage: %d\n",
119 err);
120 goto failed;
121 }
122 ieee80211_networks_initialize(ieee);
123
124
125 /* Default fragmentation threshold is maximum payload size */
126 ieee->fts = DEFAULT_FTS;
127 ieee->scan_age = DEFAULT_MAX_SCAN_AGE;
128 ieee->open_wep = 1;
129
130 /* Default to enabling full open WEP with host based encrypt/decrypt */
131 ieee->host_encrypt = 1;
132 ieee->host_decrypt = 1;
133 ieee->ieee802_1x = 1; /* Default to supporting 802.1x */
134
135 INIT_LIST_HEAD(&ieee->crypt_deinit_list);
136 init_timer(&ieee->crypt_deinit_timer);
137 ieee->crypt_deinit_timer.data = (unsigned long)ieee;
138 ieee->crypt_deinit_timer.function = ieee80211_crypt_deinit_handler;
139
140 spin_lock_init(&ieee->lock);
141 spin_lock_init(&ieee->wpax_suitlist_lock);
142 spin_lock_init(&ieee->bw_spinlock);
143 spin_lock_init(&ieee->reorder_spinlock);
144
145 /* added by WB */
146 atomic_set(&(ieee->atm_chnlop), 0);
147 atomic_set(&(ieee->atm_swbw), 0);
148
149 ieee->wpax_type_set = 0;
150 ieee->wpa_enabled = 0;
151 ieee->tkip_countermeasures = 0;
152 ieee->drop_unencrypted = 0;
153 ieee->privacy_invoked = 0;
154 ieee->ieee802_1x = 1;
155 ieee->raw_tx = 0;
156 /* ieee->hwsec_support = 1; default support hw security: use module_param instead */
157 ieee->hwsec_active = 0; /* disable hwsec, switch it on when necessary */
158
159 ieee80211_softmac_init(ieee);
160
161 ieee->pHTInfo = kzalloc(sizeof(RT_HIGH_THROUGHPUT), GFP_KERNEL);
162 if (ieee->pHTInfo == NULL)
163 {
164 IEEE80211_DEBUG(IEEE80211_DL_ERR, "can't alloc memory for HTInfo\n");
165 return NULL;
166 }
167 HTUpdateDefaultSetting(ieee);
168 HTInitializeHTInfo(ieee); /* may move to other place */
169 TSInitialize(ieee);
170 for (i = 0; i < IEEE_IBSS_MAC_HASH_SIZE; i++)
171 INIT_LIST_HEAD(&ieee->ibss_mac_hash[i]);
172
173 for (i = 0; i < 17; i++) {
174 ieee->last_rxseq_num[i] = -1;
175 ieee->last_rxfrag_num[i] = -1;
176 ieee->last_packet_time[i] = 0;
177 }
178
179 /* Functions to load crypt module automatically */
180 ieee80211_tkip_null();
181 ieee80211_wep_null();
182 ieee80211_ccmp_null();
183
184 return dev;
185
186failed:
187 if (dev)
188 free_netdev(dev);
189 return NULL;
190}
191
192
193void free_ieee80211(struct net_device *dev)
194{
195 struct ieee80211_device *ieee = netdev_priv(dev);
196 int i;
197 kfree(ieee->pHTInfo);
198 ieee->pHTInfo = NULL;
199 RemoveAllTS(ieee);
200 ieee80211_softmac_free(ieee);
201 del_timer_sync(&ieee->crypt_deinit_timer);
202 ieee80211_crypt_deinit_entries(ieee, 1);
203
204 for (i = 0; i < WEP_KEYS; i++) {
205 struct ieee80211_crypt_data *crypt = ieee->crypt[i];
206 if (crypt) {
207 if (crypt->ops)
208 crypt->ops->deinit(crypt->priv);
209 kfree(crypt);
210 ieee->crypt[i] = NULL;
211 }
212 }
213
214 ieee80211_networks_free(ieee);
215 free_netdev(dev);
216}
217
218#ifdef CONFIG_IEEE80211_DEBUG
219
220u32 ieee80211_debug_level = 0;
221static int debug =
222 /* IEEE80211_DL_INFO | */
223 /* IEEE80211_DL_WX | */
224 /* IEEE80211_DL_SCAN | */
225 /* IEEE80211_DL_STATE | */
226 /* IEEE80211_DL_MGMT | */
227 /* IEEE80211_DL_FRAG | */
228 /* IEEE80211_DL_EAP | */
229 /* IEEE80211_DL_DROP | */
230 /* IEEE80211_DL_TX | */
231 /* IEEE80211_DL_RX | */
232 /* IEEE80211_DL_QOS | */
233 /* IEEE80211_DL_HT | */
234 /* IEEE80211_DL_TS | */
235 /* IEEE80211_DL_BA | */
236 /* IEEE80211_DL_REORDER | */
237 /* IEEE80211_DL_TRACE | */
238 /* IEEE80211_DL_DATA | */
239 IEEE80211_DL_ERR /* always open this flag to show error out */
240 ;
241struct proc_dir_entry *ieee80211_proc = NULL;
242
243static int show_debug_level(char *page, char **start, off_t offset,
244 int count, int *eof, void *data)
245{
246 return snprintf(page, count, "0x%08X\n", ieee80211_debug_level);
247}
248
249static int store_debug_level(struct file *file, const char *buffer,
250 unsigned long count, void *data)
251{
252 char buf[] = "0x00000000";
253 unsigned long len = min(sizeof(buf) - 1, (u32)count);
254 char *p = (char *)buf;
255 unsigned long val;
256
257 if (copy_from_user(buf, buffer, len))
258 return count;
259 buf[len] = 0;
260 if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
261 p++;
262 if (p[0] == 'x' || p[0] == 'X')
263 p++;
264 val = simple_strtoul(p, &p, 16);
265 } else
266 val = simple_strtoul(p, &p, 10);
267 if (p == buf)
268 printk(KERN_INFO DRV_NAME
269 ": %s is not in hex or decimal form.\n", buf);
270 else
271 ieee80211_debug_level = val;
272
273 return strnlen(buf, count);
274}
275
276extern int ieee80211_crypto_init(void);
277extern void ieee80211_crypto_deinit(void);
278extern int ieee80211_crypto_tkip_init(void);
279extern void ieee80211_crypto_tkip_exit(void);
280extern int ieee80211_crypto_ccmp_init(void);
281extern void ieee80211_crypto_ccmp_exit(void);
282extern int ieee80211_crypto_wep_init(void);
283extern void ieee80211_crypto_wep_exit(void);
284
285int __init ieee80211_rtl_init(void)
286{
287 struct proc_dir_entry *e;
288 int retval;
289
290 retval = ieee80211_crypto_init();
291 if (retval)
292 return retval;
293 retval = ieee80211_crypto_tkip_init();
294 if (retval) {
295 ieee80211_crypto_deinit();
296 return retval;
297 }
298 retval = ieee80211_crypto_ccmp_init();
299 if (retval) {
300 ieee80211_crypto_tkip_exit();
301 ieee80211_crypto_deinit();
302 return retval;
303 }
304 retval = ieee80211_crypto_wep_init();
305 if (retval) {
306 ieee80211_crypto_ccmp_exit();
307 ieee80211_crypto_tkip_exit();
308 ieee80211_crypto_deinit();
309 return retval;
310 }
311
312 ieee80211_debug_level = debug;
313 ieee80211_proc = proc_mkdir(DRV_NAME, init_net.proc_net);
314 if (ieee80211_proc == NULL) {
315 IEEE80211_ERROR("Unable to create " DRV_NAME
316 " proc directory\n");
317 return -EIO;
318 }
319 e = create_proc_entry("debug_level", S_IFREG | S_IRUGO | S_IWUSR,
320 ieee80211_proc);
321 if (!e) {
322 remove_proc_entry(DRV_NAME, init_net.proc_net);
323 ieee80211_proc = NULL;
324 return -EIO;
325 }
326 e->read_proc = show_debug_level;
327 e->write_proc = store_debug_level;
328 e->data = NULL;
329
330 return 0;
331}
332
333void __exit ieee80211_rtl_exit(void)
334{
335 if (ieee80211_proc) {
336 remove_proc_entry("debug_level", ieee80211_proc);
337 remove_proc_entry(DRV_NAME, init_net.proc_net);
338 ieee80211_proc = NULL;
339 }
340 ieee80211_crypto_wep_exit();
341 ieee80211_crypto_ccmp_exit();
342 ieee80211_crypto_tkip_exit();
343 ieee80211_crypto_deinit();
344}
345
346#include <linux/moduleparam.h>
347module_param(debug, int, 0444);
348MODULE_PARM_DESC(debug, "debug output mask");
349
350
351#endif
352
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_rx.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_rx.c
deleted file mode 100644
index 022086d2a3f..00000000000
--- a/drivers/staging/rtl8192e/ieee80211/ieee80211_rx.c
+++ /dev/null
@@ -1,2676 +0,0 @@
1/*
2 * Original code based Host AP (software wireless LAN access point) driver
3 * for Intersil Prism2/2.5/3 - hostap.o module, common routines
4 *
5 * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
6 * <jkmaline@cc.hut.fi>
7 * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
8 * Copyright (c) 2004, Intel Corporation
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation. See README and COPYING for
13 * more details.
14 ******************************************************************************
15
16 Few modifications for Realtek's Wi-Fi drivers by
17 Andrea Merello <andreamrl@tiscali.it>
18
19 A special thanks goes to Realtek for their support !
20
21******************************************************************************/
22
23
24#include <linux/compiler.h>
25#include <linux/errno.h>
26#include <linux/if_arp.h>
27#include <linux/in6.h>
28#include <linux/in.h>
29#include <linux/ip.h>
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/netdevice.h>
33#include <linux/pci.h>
34#include <linux/proc_fs.h>
35#include <linux/skbuff.h>
36#include <linux/slab.h>
37#include <linux/tcp.h>
38#include <linux/types.h>
39#include <linux/wireless.h>
40#include <linux/etherdevice.h>
41#include <asm/uaccess.h>
42#include <linux/ctype.h>
43
44#include "ieee80211.h"
45#ifdef ENABLE_DOT11D
46#include "dot11d.h"
47#endif
48static inline void ieee80211_monitor_rx(struct ieee80211_device *ieee,
49 struct sk_buff *skb,
50 struct ieee80211_rx_stats *rx_stats)
51{
52 struct ieee80211_hdr_4addr *hdr = (struct ieee80211_hdr_4addr *)skb->data;
53 u16 fc = le16_to_cpu(hdr->frame_ctl);
54
55 skb->dev = ieee->dev;
56 skb_reset_mac_header(skb);
57
58 skb_pull(skb, ieee80211_get_hdrlen(fc));
59 skb->pkt_type = PACKET_OTHERHOST;
60 skb->protocol = __constant_htons(ETH_P_80211_RAW);
61 memset(skb->cb, 0, sizeof(skb->cb));
62 netif_rx(skb);
63}
64
65
66/* Called only as a tasklet (software IRQ) */
67static struct ieee80211_frag_entry *
68ieee80211_frag_cache_find(struct ieee80211_device *ieee, unsigned int seq,
69 unsigned int frag, u8 tid,u8 *src, u8 *dst)
70{
71 struct ieee80211_frag_entry *entry;
72 int i;
73
74 for (i = 0; i < IEEE80211_FRAG_CACHE_LEN; i++) {
75 entry = &ieee->frag_cache[tid][i];
76 if (entry->skb != NULL &&
77 time_after(jiffies, entry->first_frag_time + 2 * HZ)) {
78 IEEE80211_DEBUG_FRAG(
79 "expiring fragment cache entry "
80 "seq=%u last_frag=%u\n",
81 entry->seq, entry->last_frag);
82 dev_kfree_skb_any(entry->skb);
83 entry->skb = NULL;
84 }
85
86 if (entry->skb != NULL && entry->seq == seq &&
87 (entry->last_frag + 1 == frag || frag == -1) &&
88 memcmp(entry->src_addr, src, ETH_ALEN) == 0 &&
89 memcmp(entry->dst_addr, dst, ETH_ALEN) == 0)
90 return entry;
91 }
92
93 return NULL;
94}
95
96/* Called only as a tasklet (software IRQ) */
97static struct sk_buff *
98ieee80211_frag_cache_get(struct ieee80211_device *ieee,
99 struct ieee80211_hdr_4addr *hdr)
100{
101 struct sk_buff *skb = NULL;
102 u16 fc = le16_to_cpu(hdr->frame_ctl);
103 u16 sc = le16_to_cpu(hdr->seq_ctl);
104 unsigned int frag = WLAN_GET_SEQ_FRAG(sc);
105 unsigned int seq = WLAN_GET_SEQ_SEQ(sc);
106 struct ieee80211_frag_entry *entry;
107 struct ieee80211_hdr_3addrqos *hdr_3addrqos;
108 struct ieee80211_hdr_4addrqos *hdr_4addrqos;
109 u8 tid;
110
111 if (((fc & IEEE80211_FCTL_DSTODS) == IEEE80211_FCTL_DSTODS)&&IEEE80211_QOS_HAS_SEQ(fc)) {
112 hdr_4addrqos = (struct ieee80211_hdr_4addrqos *)hdr;
113 tid = le16_to_cpu(hdr_4addrqos->qos_ctl) & IEEE80211_QCTL_TID;
114 tid = UP2AC(tid);
115 tid ++;
116 } else if (IEEE80211_QOS_HAS_SEQ(fc)) {
117 hdr_3addrqos = (struct ieee80211_hdr_3addrqos *)hdr;
118 tid = le16_to_cpu(hdr_3addrqos->qos_ctl) & IEEE80211_QCTL_TID;
119 tid = UP2AC(tid);
120 tid ++;
121 } else {
122 tid = 0;
123 }
124
125 if (frag == 0) {
126 /* Reserve enough space to fit maximum frame length */
127 skb = dev_alloc_skb(ieee->dev->mtu +
128 sizeof(struct ieee80211_hdr_4addr) +
129 8 /* LLC */ +
130 2 /* alignment */ +
131 8 /* WEP */ +
132 ETH_ALEN /* WDS */ +
133 (IEEE80211_QOS_HAS_SEQ(fc)?2:0) /* QOS Control */);
134 if (skb == NULL)
135 return NULL;
136
137 entry = &ieee->frag_cache[tid][ieee->frag_next_idx[tid]];
138 ieee->frag_next_idx[tid]++;
139 if (ieee->frag_next_idx[tid] >= IEEE80211_FRAG_CACHE_LEN)
140 ieee->frag_next_idx[tid] = 0;
141
142 if (entry->skb != NULL)
143 dev_kfree_skb_any(entry->skb);
144
145 entry->first_frag_time = jiffies;
146 entry->seq = seq;
147 entry->last_frag = frag;
148 entry->skb = skb;
149 memcpy(entry->src_addr, hdr->addr2, ETH_ALEN);
150 memcpy(entry->dst_addr, hdr->addr1, ETH_ALEN);
151 } else {
152 /* received a fragment of a frame for which the head fragment
153 * should have already been received */
154 entry = ieee80211_frag_cache_find(ieee, seq, frag, tid,hdr->addr2,
155 hdr->addr1);
156 if (entry != NULL) {
157 entry->last_frag = frag;
158 skb = entry->skb;
159 }
160 }
161
162 return skb;
163}
164
165
166/* Called only as a tasklet (software IRQ) */
167static int ieee80211_frag_cache_invalidate(struct ieee80211_device *ieee,
168 struct ieee80211_hdr_4addr *hdr)
169{
170 u16 fc = le16_to_cpu(hdr->frame_ctl);
171 u16 sc = le16_to_cpu(hdr->seq_ctl);
172 unsigned int seq = WLAN_GET_SEQ_SEQ(sc);
173 struct ieee80211_frag_entry *entry;
174 struct ieee80211_hdr_3addrqos *hdr_3addrqos;
175 struct ieee80211_hdr_4addrqos *hdr_4addrqos;
176 u8 tid;
177
178 if(((fc & IEEE80211_FCTL_DSTODS) == IEEE80211_FCTL_DSTODS)&&IEEE80211_QOS_HAS_SEQ(fc)) {
179 hdr_4addrqos = (struct ieee80211_hdr_4addrqos *)hdr;
180 tid = le16_to_cpu(hdr_4addrqos->qos_ctl) & IEEE80211_QCTL_TID;
181 tid = UP2AC(tid);
182 tid ++;
183 } else if (IEEE80211_QOS_HAS_SEQ(fc)) {
184 hdr_3addrqos = (struct ieee80211_hdr_3addrqos *)hdr;
185 tid = le16_to_cpu(hdr_3addrqos->qos_ctl) & IEEE80211_QCTL_TID;
186 tid = UP2AC(tid);
187 tid ++;
188 } else {
189 tid = 0;
190 }
191
192 entry = ieee80211_frag_cache_find(ieee, seq, -1, tid,hdr->addr2,
193 hdr->addr1);
194
195 if (entry == NULL) {
196 IEEE80211_DEBUG_FRAG(
197 "could not invalidate fragment cache "
198 "entry (seq=%u)\n", seq);
199 return -1;
200 }
201
202 entry->skb = NULL;
203 return 0;
204}
205
206
207
208/* ieee80211_rx_frame_mgtmt
209 *
210 * Responsible for handling management control frames
211 *
212 * Called by ieee80211_rx */
213static inline int
214ieee80211_rx_frame_mgmt(struct ieee80211_device *ieee, struct sk_buff *skb,
215 struct ieee80211_rx_stats *rx_stats, u16 type,
216 u16 stype)
217{
218 /* On the struct stats definition there is written that
219 * this is not mandatory.... but seems that the probe
220 * response parser uses it
221 */
222 struct ieee80211_hdr_3addr * hdr = (struct ieee80211_hdr_3addr *)skb->data;
223
224 rx_stats->len = skb->len;
225 ieee80211_rx_mgt(ieee,(struct ieee80211_hdr_4addr *)skb->data,rx_stats);
226 if ((memcmp(hdr->addr1, ieee->dev->dev_addr, ETH_ALEN)))//use ADDR1 to perform address matching for Management frames
227 {
228 dev_kfree_skb_any(skb);
229 return 0;
230 }
231
232 ieee80211_rx_frame_softmac(ieee, skb, rx_stats, type, stype);
233
234 dev_kfree_skb_any(skb);
235
236 return 0;
237
238 #ifdef NOT_YET
239 if (ieee->iw_mode == IW_MODE_MASTER) {
240 printk(KERN_DEBUG "%s: Master mode not yet suppported.\n",
241 ieee->dev->name);
242 return 0;
243 }
244
245 if (ieee->hostapd && type == IEEE80211_TYPE_MGMT) {
246 if (stype == WLAN_FC_STYPE_BEACON &&
247 ieee->iw_mode == IW_MODE_MASTER) {
248 struct sk_buff *skb2;
249 /* Process beacon frames also in kernel driver to
250 * update STA(AP) table statistics */
251 skb2 = skb_clone(skb, GFP_ATOMIC);
252 if (skb2)
253 hostap_rx(skb2->dev, skb2, rx_stats);
254 }
255
256 /* send management frames to the user space daemon for
257 * processing */
258 ieee->apdevstats.rx_packets++;
259 ieee->apdevstats.rx_bytes += skb->len;
260 prism2_rx_80211(ieee->apdev, skb, rx_stats, PRISM2_RX_MGMT);
261 return 0;
262 }
263
264 if (ieee->iw_mode == IW_MODE_MASTER) {
265 if (type != WLAN_FC_TYPE_MGMT && type != WLAN_FC_TYPE_CTRL) {
266 printk(KERN_DEBUG "%s: unknown management frame "
267 "(type=0x%02x, stype=0x%02x) dropped\n",
268 skb->dev->name, type, stype);
269 return -1;
270 }
271
272 hostap_rx(skb->dev, skb, rx_stats);
273 return 0;
274 }
275
276 printk(KERN_DEBUG "%s: hostap_rx_frame_mgmt: management frame "
277 "received in non-Host AP mode\n", skb->dev->name);
278 return -1;
279 #endif
280}
281
282
283
284/* See IEEE 802.1H for LLC/SNAP encapsulation/decapsulation */
285/* Ethernet-II snap header (RFC1042 for most EtherTypes) */
286static unsigned char rfc1042_header[] =
287{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 };
288/* Bridge-Tunnel header (for EtherTypes ETH_P_AARP and ETH_P_IPX) */
289static unsigned char bridge_tunnel_header[] =
290{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0xf8 };
291/* No encapsulation header if EtherType < 0x600 (=length) */
292
293/* Called by ieee80211_rx_frame_decrypt */
294static int ieee80211_is_eapol_frame(struct ieee80211_device *ieee,
295 struct sk_buff *skb, size_t hdrlen)
296{
297 struct net_device *dev = ieee->dev;
298 u16 fc, ethertype;
299 struct ieee80211_hdr_4addr *hdr;
300 u8 *pos;
301
302 if (skb->len < 24)
303 return 0;
304
305 if (ieee->hwsec_active)
306 {
307 cb_desc *tcb_desc = (cb_desc *)(skb->cb+ MAX_DEV_ADDR_SIZE);
308 tcb_desc->bHwSec = 1;
309
310 if(ieee->need_sw_enc)
311 tcb_desc->bHwSec = 0;
312 }
313
314 hdr = (struct ieee80211_hdr_4addr *) skb->data;
315 fc = le16_to_cpu(hdr->frame_ctl);
316
317 /* check that the frame is unicast frame to us */
318 if ((fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) ==
319 IEEE80211_FCTL_TODS &&
320 memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN) == 0 &&
321 memcmp(hdr->addr3, dev->dev_addr, ETH_ALEN) == 0) {
322 /* ToDS frame with own addr BSSID and DA */
323 } else if ((fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) ==
324 IEEE80211_FCTL_FROMDS &&
325 memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN) == 0) {
326 /* FromDS frame with own addr as DA */
327 } else
328 return 0;
329
330 if (skb->len < 24 + 8)
331 return 0;
332
333 /* check for port access entity Ethernet type */
334 pos = skb->data + hdrlen;
335 ethertype = (pos[6] << 8) | pos[7];
336 if (ethertype == ETH_P_PAE)
337 return 1;
338
339 return 0;
340}
341
342/* Called only as a tasklet (software IRQ), by ieee80211_rx */
343static inline int
344ieee80211_rx_frame_decrypt(struct ieee80211_device* ieee, struct sk_buff *skb,
345 struct ieee80211_crypt_data *crypt)
346{
347 struct ieee80211_hdr_4addr *hdr;
348 int res, hdrlen;
349
350 if (crypt == NULL || crypt->ops->decrypt_mpdu == NULL)
351 return 0;
352
353 if (ieee->hwsec_active)
354 {
355 cb_desc *tcb_desc = (cb_desc *)(skb->cb+ MAX_DEV_ADDR_SIZE);
356 tcb_desc->bHwSec = 1;
357 }
358
359 hdr = (struct ieee80211_hdr_4addr *) skb->data;
360 hdrlen = ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_ctl));
361
362#ifdef CONFIG_IEEE80211_CRYPT_TKIP
363 if (ieee->tkip_countermeasures &&
364 strcmp(crypt->ops->name, "TKIP") == 0) {
365 if (net_ratelimit()) {
366 printk(KERN_DEBUG "%s: TKIP countermeasures: dropped "
367 "received packet from %pM\n",
368 ieee->dev->name, hdr->addr2);
369 }
370 return -1;
371 }
372#endif
373
374 atomic_inc(&crypt->refcnt);
375 res = crypt->ops->decrypt_mpdu(skb, hdrlen, crypt->priv);
376 atomic_dec(&crypt->refcnt);
377 if (res < 0) {
378 IEEE80211_DEBUG_DROP(
379 "decryption failed (SA=%pM"
380 ") res=%d\n", hdr->addr2, res);
381 if (res == -2)
382 IEEE80211_DEBUG_DROP("Decryption failed ICV "
383 "mismatch (key %d)\n",
384 skb->data[hdrlen + 3] >> 6);
385 ieee->ieee_stats.rx_discards_undecryptable++;
386 return -1;
387 }
388
389 return res;
390}
391
392
393/* Called only as a tasklet (software IRQ), by ieee80211_rx */
394static inline int
395ieee80211_rx_frame_decrypt_msdu(struct ieee80211_device* ieee, struct sk_buff *skb,
396 int keyidx, struct ieee80211_crypt_data *crypt)
397{
398 struct ieee80211_hdr_4addr *hdr;
399 int res, hdrlen;
400
401 if (crypt == NULL || crypt->ops->decrypt_msdu == NULL)
402 return 0;
403 if (ieee->hwsec_active)
404 {
405 cb_desc *tcb_desc = (cb_desc *)(skb->cb+ MAX_DEV_ADDR_SIZE);
406 tcb_desc->bHwSec = 1;
407
408 if(ieee->need_sw_enc)
409 tcb_desc->bHwSec = 0;
410
411 }
412
413 hdr = (struct ieee80211_hdr_4addr *) skb->data;
414 hdrlen = ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_ctl));
415
416 atomic_inc(&crypt->refcnt);
417 res = crypt->ops->decrypt_msdu(skb, keyidx, hdrlen, crypt->priv);
418 atomic_dec(&crypt->refcnt);
419 if (res < 0) {
420 printk(KERN_DEBUG "%s: MSDU decryption/MIC verification failed"
421 " (SA=%pM keyidx=%d)\n",
422 ieee->dev->name, hdr->addr2, keyidx);
423 return -1;
424 }
425
426 return 0;
427}
428
429
430/* this function is stolen from ipw2200 driver*/
431#define IEEE_PACKET_RETRY_TIME (5*HZ)
432static int is_duplicate_packet(struct ieee80211_device *ieee,
433 struct ieee80211_hdr_4addr *header)
434{
435 u16 fc = le16_to_cpu(header->frame_ctl);
436 u16 sc = le16_to_cpu(header->seq_ctl);
437 u16 seq = WLAN_GET_SEQ_SEQ(sc);
438 u16 frag = WLAN_GET_SEQ_FRAG(sc);
439 u16 *last_seq, *last_frag;
440 unsigned long *last_time;
441 struct ieee80211_hdr_3addrqos *hdr_3addrqos;
442 struct ieee80211_hdr_4addrqos *hdr_4addrqos;
443 u8 tid;
444
445
446 //TO2DS and QoS
447 if(((fc & IEEE80211_FCTL_DSTODS) == IEEE80211_FCTL_DSTODS)&&IEEE80211_QOS_HAS_SEQ(fc)) {
448 hdr_4addrqos = (struct ieee80211_hdr_4addrqos *)header;
449 tid = le16_to_cpu(hdr_4addrqos->qos_ctl) & IEEE80211_QCTL_TID;
450 tid = UP2AC(tid);
451 tid ++;
452 } else if(IEEE80211_QOS_HAS_SEQ(fc)) { //QoS
453 hdr_3addrqos = (struct ieee80211_hdr_3addrqos*)header;
454 tid = le16_to_cpu(hdr_3addrqos->qos_ctl) & IEEE80211_QCTL_TID;
455 tid = UP2AC(tid);
456 tid ++;
457 } else { // no QoS
458 tid = 0;
459 }
460
461 switch (ieee->iw_mode) {
462 case IW_MODE_ADHOC:
463 {
464 struct list_head *p;
465 struct ieee_ibss_seq *entry = NULL;
466 u8 *mac = header->addr2;
467 int index = mac[5] % IEEE_IBSS_MAC_HASH_SIZE;
468
469 list_for_each(p, &ieee->ibss_mac_hash[index]) {
470 entry = list_entry(p, struct ieee_ibss_seq, list);
471 if (!memcmp(entry->mac, mac, ETH_ALEN))
472 break;
473 }
474
475 if (p == &ieee->ibss_mac_hash[index]) {
476 entry = kmalloc(sizeof(struct ieee_ibss_seq), GFP_ATOMIC);
477 if (!entry) {
478 printk(KERN_WARNING "Cannot malloc new mac entry\n");
479 return 0;
480 }
481 memcpy(entry->mac, mac, ETH_ALEN);
482 entry->seq_num[tid] = seq;
483 entry->frag_num[tid] = frag;
484 entry->packet_time[tid] = jiffies;
485 list_add(&entry->list, &ieee->ibss_mac_hash[index]);
486 return 0;
487 }
488 last_seq = &entry->seq_num[tid];
489 last_frag = &entry->frag_num[tid];
490 last_time = &entry->packet_time[tid];
491 break;
492 }
493
494 case IW_MODE_INFRA:
495 last_seq = &ieee->last_rxseq_num[tid];
496 last_frag = &ieee->last_rxfrag_num[tid];
497 last_time = &ieee->last_packet_time[tid];
498
499 break;
500 default:
501 return 0;
502 }
503
504 if ((*last_seq == seq) &&
505 time_after(*last_time + IEEE_PACKET_RETRY_TIME, jiffies)) {
506 if (*last_frag == frag){
507 goto drop;
508
509 }
510 if (*last_frag + 1 != frag)
511 /* out-of-order fragment */
512 goto drop;
513 } else
514 *last_seq = seq;
515
516 *last_frag = frag;
517 *last_time = jiffies;
518 return 0;
519
520drop:
521 return 1;
522}
523bool
524AddReorderEntry(
525 PRX_TS_RECORD pTS,
526 PRX_REORDER_ENTRY pReorderEntry
527 )
528{
529 struct list_head *pList = &pTS->RxPendingPktList;
530
531 while(pList->next != &pTS->RxPendingPktList)
532 {
533 if( SN_LESS(pReorderEntry->SeqNum, ((PRX_REORDER_ENTRY)list_entry(pList->next,RX_REORDER_ENTRY,List))->SeqNum) )
534 {
535 pList = pList->next;
536 }
537 else if( SN_EQUAL(pReorderEntry->SeqNum, ((PRX_REORDER_ENTRY)list_entry(pList->next,RX_REORDER_ENTRY,List))->SeqNum) )
538 {
539 return false;
540 }
541 else
542 {
543 break;
544 }
545 }
546
547 pReorderEntry->List.next = pList->next;
548 pReorderEntry->List.next->prev = &pReorderEntry->List;
549 pReorderEntry->List.prev = pList;
550 pList->next = &pReorderEntry->List;
551
552 return true;
553}
554
555void ieee80211_indicate_packets(struct ieee80211_device *ieee, struct ieee80211_rxb** prxbIndicateArray,u8 index)
556{
557 u8 i = 0 , j=0;
558 u16 ethertype;
559
560 for(j = 0; j<index; j++)
561 {
562//added by amy for reorder
563 struct ieee80211_rxb* prxb = prxbIndicateArray[j];
564 for(i = 0; i<prxb->nr_subframes; i++) {
565 struct sk_buff *sub_skb = prxb->subframes[i];
566
567 /* convert hdr + possible LLC headers into Ethernet header */
568 ethertype = (sub_skb->data[6] << 8) | sub_skb->data[7];
569 if (sub_skb->len >= 8 &&
570 ((memcmp(sub_skb->data, rfc1042_header, SNAP_SIZE) == 0 &&
571 ethertype != ETH_P_AARP && ethertype != ETH_P_IPX) ||
572 memcmp(sub_skb->data, bridge_tunnel_header, SNAP_SIZE) == 0)) {
573 /* remove RFC1042 or Bridge-Tunnel encapsulation and
574 * replace EtherType */
575 skb_pull(sub_skb, SNAP_SIZE);
576 memcpy(skb_push(sub_skb, ETH_ALEN), prxb->src, ETH_ALEN);
577 memcpy(skb_push(sub_skb, ETH_ALEN), prxb->dst, ETH_ALEN);
578 } else {
579 u16 len;
580 /* Leave Ethernet header part of hdr and full payload */
581 len = htons(sub_skb->len);
582 memcpy(skb_push(sub_skb, 2), &len, 2);
583 memcpy(skb_push(sub_skb, ETH_ALEN), prxb->src, ETH_ALEN);
584 memcpy(skb_push(sub_skb, ETH_ALEN), prxb->dst, ETH_ALEN);
585 }
586
587 /* Indicat the packets to upper layer */
588 if (sub_skb) {
589 sub_skb->protocol = eth_type_trans(sub_skb, ieee->dev);
590 memset(sub_skb->cb, 0, sizeof(sub_skb->cb));
591 sub_skb->dev = ieee->dev;
592 sub_skb->ip_summed = CHECKSUM_NONE; /* 802.11 crc not sufficient */
593 ieee->last_rx_ps_time = jiffies;
594 netif_rx(sub_skb);
595 }
596 }
597 kfree(prxb);
598 prxb = NULL;
599 }
600}
601
602
603void RxReorderIndicatePacket( struct ieee80211_device *ieee,
604 struct ieee80211_rxb* prxb,
605 PRX_TS_RECORD pTS,
606 u16 SeqNum)
607{
608 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
609 PRX_REORDER_ENTRY pReorderEntry = NULL;
610 struct ieee80211_rxb* prxbIndicateArray[REORDER_WIN_SIZE];
611 u8 WinSize = pHTInfo->RxReorderWinSize;
612 u16 WinEnd = (pTS->RxIndicateSeq + WinSize -1)%4096;
613 u8 index = 0;
614 bool bMatchWinStart = false, bPktInBuf = false;
615 IEEE80211_DEBUG(IEEE80211_DL_REORDER,"%s(): Seq is %d,pTS->RxIndicateSeq is %d, WinSize is %d\n",__FUNCTION__,SeqNum,pTS->RxIndicateSeq,WinSize);
616
617 /* Rx Reorder initialize condition.*/
618 if(pTS->RxIndicateSeq == 0xffff) {
619 pTS->RxIndicateSeq = SeqNum;
620 }
621
622 /* Drop out the packet which SeqNum is smaller than WinStart */
623 if(SN_LESS(SeqNum, pTS->RxIndicateSeq)) {
624 IEEE80211_DEBUG(IEEE80211_DL_REORDER,"Packet Drop! IndicateSeq: %d, NewSeq: %d\n",
625 pTS->RxIndicateSeq, SeqNum);
626 pHTInfo->RxReorderDropCounter++;
627 {
628 int i;
629 for(i =0; i < prxb->nr_subframes; i++) {
630 dev_kfree_skb(prxb->subframes[i]);
631 }
632 kfree(prxb);
633 prxb = NULL;
634 }
635 return;
636 }
637
638 /*
639 * Sliding window manipulation. Conditions includes:
640 * 1. Incoming SeqNum is equal to WinStart =>Window shift 1
641 * 2. Incoming SeqNum is larger than the WinEnd => Window shift N
642 */
643 if(SN_EQUAL(SeqNum, pTS->RxIndicateSeq)) {
644 pTS->RxIndicateSeq = (pTS->RxIndicateSeq + 1) % 4096;
645 bMatchWinStart = true;
646 } else if(SN_LESS(WinEnd, SeqNum)) {
647 if(SeqNum >= (WinSize - 1)) {
648 pTS->RxIndicateSeq = SeqNum + 1 -WinSize;
649 } else {
650 pTS->RxIndicateSeq = 4095 - (WinSize - (SeqNum +1)) + 1;
651 }
652 IEEE80211_DEBUG(IEEE80211_DL_REORDER, "Window Shift! IndicateSeq: %d, NewSeq: %d\n",pTS->RxIndicateSeq, SeqNum);
653 }
654
655 /*
656 * Indication process.
657 * After Packet dropping and Sliding Window shifting as above, we can now just indicate the packets
658 * with the SeqNum smaller than latest WinStart and buffer other packets.
659 */
660 /* For Rx Reorder condition:
661 * 1. All packets with SeqNum smaller than WinStart => Indicate
662 * 2. All packets with SeqNum larger than or equal to WinStart => Buffer it.
663 */
664 if(bMatchWinStart) {
665 /* Current packet is going to be indicated.*/
666 IEEE80211_DEBUG(IEEE80211_DL_REORDER, "Packets indication!! IndicateSeq: %d, NewSeq: %d\n",\
667 pTS->RxIndicateSeq, SeqNum);
668 prxbIndicateArray[0] = prxb;
669 index = 1;
670 } else {
671 /* Current packet is going to be inserted into pending list.*/
672 if(!list_empty(&ieee->RxReorder_Unused_List)) {
673 pReorderEntry = (PRX_REORDER_ENTRY)list_entry(ieee->RxReorder_Unused_List.next,RX_REORDER_ENTRY,List);
674 list_del_init(&pReorderEntry->List);
675
676 /* Make a reorder entry and insert into a the packet list.*/
677 pReorderEntry->SeqNum = SeqNum;
678 pReorderEntry->prxb = prxb;
679
680 if(!AddReorderEntry(pTS, pReorderEntry)) {
681 IEEE80211_DEBUG(IEEE80211_DL_REORDER, "%s(): Duplicate packet is dropped!! IndicateSeq: %d, NewSeq: %d\n",
682 __FUNCTION__, pTS->RxIndicateSeq, SeqNum);
683 list_add_tail(&pReorderEntry->List,&ieee->RxReorder_Unused_List);
684 {
685 int i;
686 for(i =0; i < prxb->nr_subframes; i++) {
687 dev_kfree_skb(prxb->subframes[i]);
688 }
689 kfree(prxb);
690 prxb = NULL;
691 }
692 } else {
693 IEEE80211_DEBUG(IEEE80211_DL_REORDER,
694 "Pkt insert into buffer!! IndicateSeq: %d, NewSeq: %d\n",pTS->RxIndicateSeq, SeqNum);
695 }
696 }
697 else {
698 /*
699 * Packets are dropped if there is not enough reorder entries.
700 * This part shall be modified!! We can just indicate all the
701 * packets in buffer and get reorder entries.
702 */
703 IEEE80211_DEBUG(IEEE80211_DL_ERR, "RxReorderIndicatePacket(): There is no reorder entry!! Packet is dropped!!\n");
704 {
705 int i;
706 for(i =0; i < prxb->nr_subframes; i++) {
707 dev_kfree_skb(prxb->subframes[i]);
708 }
709 kfree(prxb);
710 prxb = NULL;
711 }
712 }
713 }
714
715 /* Check if there is any packet need indicate.*/
716 while(!list_empty(&pTS->RxPendingPktList)) {
717 IEEE80211_DEBUG(IEEE80211_DL_REORDER,"%s(): start RREORDER indicate\n",__FUNCTION__);
718#if 1
719 pReorderEntry = (PRX_REORDER_ENTRY)list_entry(pTS->RxPendingPktList.prev,RX_REORDER_ENTRY,List);
720 if( SN_LESS(pReorderEntry->SeqNum, pTS->RxIndicateSeq) ||
721 SN_EQUAL(pReorderEntry->SeqNum, pTS->RxIndicateSeq))
722 {
723 /* This protect buffer from overflow. */
724 if(index >= REORDER_WIN_SIZE) {
725 IEEE80211_DEBUG(IEEE80211_DL_ERR, "RxReorderIndicatePacket(): Buffer overflow!! \n");
726 bPktInBuf = true;
727 break;
728 }
729
730 list_del_init(&pReorderEntry->List);
731
732 if(SN_EQUAL(pReorderEntry->SeqNum, pTS->RxIndicateSeq))
733 pTS->RxIndicateSeq = (pTS->RxIndicateSeq + 1) % 4096;
734
735 IEEE80211_DEBUG(IEEE80211_DL_REORDER,"Packets indication!! IndicateSeq: %d, NewSeq: %d\n",pTS->RxIndicateSeq, SeqNum);
736 prxbIndicateArray[index] = pReorderEntry->prxb;
737 index++;
738
739 list_add_tail(&pReorderEntry->List,&ieee->RxReorder_Unused_List);
740 } else {
741 bPktInBuf = true;
742 break;
743 }
744#endif
745 }
746
747 /* Handling pending timer. Set this timer to prevent from long time Rx buffering.*/
748 if(index>0) {
749 // Cancel previous pending timer.
750 if (timer_pending(&pTS->RxPktPendingTimer))
751 del_timer_sync(&pTS->RxPktPendingTimer);
752 pTS->RxTimeoutIndicateSeq = 0xffff;
753
754 // Indicate packets
755 if(index>REORDER_WIN_SIZE){
756 IEEE80211_DEBUG(IEEE80211_DL_ERR, "RxReorderIndicatePacket(): Rx Reorer buffer full!! \n");
757 return;
758 }
759 ieee80211_indicate_packets(ieee, prxbIndicateArray, index);
760 bPktInBuf = false;
761 }
762
763 if(bPktInBuf && pTS->RxTimeoutIndicateSeq==0xffff) {
764 // Set new pending timer.
765 IEEE80211_DEBUG(IEEE80211_DL_REORDER,"%s(): SET rx timeout timer\n", __FUNCTION__);
766 pTS->RxTimeoutIndicateSeq = pTS->RxIndicateSeq;
767
768 mod_timer(&pTS->RxPktPendingTimer, jiffies + MSECS(pHTInfo->RxReorderPendingTime));
769 }
770}
771
772u8 parse_subframe(struct ieee80211_device* ieee,struct sk_buff *skb,
773 struct ieee80211_rx_stats *rx_stats,
774 struct ieee80211_rxb *rxb,u8* src,u8* dst)
775{
776 struct ieee80211_hdr_3addr *hdr = (struct ieee80211_hdr_3addr* )skb->data;
777 u16 fc = le16_to_cpu(hdr->frame_ctl);
778
779 u16 LLCOffset= sizeof(struct ieee80211_hdr_3addr);
780 u16 ChkLength;
781 bool bIsAggregateFrame = false;
782 u16 nSubframe_Length;
783 u8 nPadding_Length = 0;
784 u16 SeqNum=0;
785
786 struct sk_buff *sub_skb;
787 u8 *data_ptr;
788 /* just for debug purpose */
789 SeqNum = WLAN_GET_SEQ_SEQ(le16_to_cpu(hdr->seq_ctl));
790
791 if((IEEE80211_QOS_HAS_SEQ(fc))&&\
792 (((frameqos *)(skb->data + IEEE80211_3ADDR_LEN))->field.reserved)) {
793 bIsAggregateFrame = true;
794 }
795
796 if(IEEE80211_QOS_HAS_SEQ(fc)) {
797 LLCOffset += 2;
798 }
799
800 if(rx_stats->bContainHTC) {
801 LLCOffset += sHTCLng;
802 }
803 // Null packet, don't indicate it to upper layer
804 ChkLength = LLCOffset;/* + (Frame_WEP(frame)!=0 ?Adapter->MgntInfo.SecurityInfo.EncryptionHeadOverhead:0);*/
805
806 if( skb->len <= ChkLength ) {
807 return 0;
808 }
809
810 skb_pull(skb, LLCOffset);
811 ieee->bIsAggregateFrame = bIsAggregateFrame;//added by amy for Leisure PS
812
813 if(!bIsAggregateFrame) {
814 rxb->nr_subframes = 1;
815#ifdef JOHN_NOCPY
816 rxb->subframes[0] = skb;
817#else
818 rxb->subframes[0] = skb_copy(skb, GFP_ATOMIC);
819#endif
820
821 memcpy(rxb->src,src,ETH_ALEN);
822 memcpy(rxb->dst,dst,ETH_ALEN);
823 //IEEE80211_DEBUG_DATA(IEEE80211_DL_RX,skb->data,skb->len);
824 return 1;
825 } else {
826 rxb->nr_subframes = 0;
827 memcpy(rxb->src,src,ETH_ALEN);
828 memcpy(rxb->dst,dst,ETH_ALEN);
829 while(skb->len > ETHERNET_HEADER_SIZE) {
830 /* Offset 12 denote 2 mac address */
831 nSubframe_Length = *((u16*)(skb->data + 12));
832 //==m==>change the length order
833 nSubframe_Length = (nSubframe_Length>>8) + (nSubframe_Length<<8);
834
835 if(skb->len<(ETHERNET_HEADER_SIZE + nSubframe_Length)) {
836 printk("%s: A-MSDU parse error!! pRfd->nTotalSubframe : %d\n",\
837 __FUNCTION__,rxb->nr_subframes);
838 printk("%s: A-MSDU parse error!! Subframe Length: %d\n",__FUNCTION__, nSubframe_Length);
839 printk("nRemain_Length is %d and nSubframe_Length is : %d\n",skb->len,nSubframe_Length);
840 printk("The Packet SeqNum is %d\n",SeqNum);
841 return 0;
842 }
843
844 /* move the data point to data content */
845 skb_pull(skb, ETHERNET_HEADER_SIZE);
846
847#ifdef JOHN_NOCPY
848 sub_skb = skb_clone(skb, GFP_ATOMIC);
849 sub_skb->len = nSubframe_Length;
850 sub_skb->tail = sub_skb->data + nSubframe_Length;
851#else
852 /* Allocate new skb for releasing to upper layer */
853 sub_skb = dev_alloc_skb(nSubframe_Length + 12);
854 skb_reserve(sub_skb, 12);
855 data_ptr = (u8 *)skb_put(sub_skb, nSubframe_Length);
856 memcpy(data_ptr,skb->data,nSubframe_Length);
857#endif
858 rxb->subframes[rxb->nr_subframes++] = sub_skb;
859 if(rxb->nr_subframes >= MAX_SUBFRAME_COUNT) {
860 IEEE80211_DEBUG_RX("ParseSubframe(): Too many Subframes! Packets dropped!\n");
861 break;
862 }
863 skb_pull(skb,nSubframe_Length);
864
865 if(skb->len != 0) {
866 nPadding_Length = 4 - ((nSubframe_Length + ETHERNET_HEADER_SIZE) % 4);
867 if(nPadding_Length == 4) {
868 nPadding_Length = 0;
869 }
870
871 if(skb->len < nPadding_Length) {
872 return 0;
873 }
874
875 skb_pull(skb,nPadding_Length);
876 }
877 }
878#ifdef JOHN_NOCPY
879 dev_kfree_skb(skb);
880#endif
881 return rxb->nr_subframes;
882 }
883}
884
885/* All received frames are sent to this function. @skb contains the frame in
886 * IEEE 802.11 format, i.e., in the format it was sent over air.
887 * This function is called only as a tasklet (software IRQ). */
888int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
889 struct ieee80211_rx_stats *rx_stats)
890{
891 struct net_device *dev = ieee->dev;
892 struct ieee80211_hdr_4addr *hdr;
893
894 size_t hdrlen;
895 u16 fc, type, stype, sc;
896 struct net_device_stats *stats;
897 unsigned int frag;
898 u8 *payload;
899 u16 ethertype;
900 //added by amy for reorder
901 u8 TID = 0;
902 u16 SeqNum = 0;
903 PRX_TS_RECORD pTS = NULL;
904 bool unicast_packet = false;
905 //added by amy for reorder
906#ifdef NOT_YET
907 struct net_device *wds = NULL;
908 struct sk_buff *skb2 = NULL;
909 struct net_device *wds = NULL;
910 int frame_authorized = 0;
911 int from_assoc_ap = 0;
912 void *sta = NULL;
913#endif
914 u8 dst[ETH_ALEN];
915 u8 src[ETH_ALEN];
916 u8 bssid[ETH_ALEN];
917 struct ieee80211_crypt_data *crypt = NULL;
918 int keyidx = 0;
919
920 int i;
921 struct ieee80211_rxb* rxb = NULL;
922 // cheat the the hdr type
923 hdr = (struct ieee80211_hdr_4addr *)skb->data;
924 stats = &ieee->stats;
925
926 if (skb->len < 10) {
927 printk(KERN_INFO "%s: SKB length < 10\n",
928 dev->name);
929 goto rx_dropped;
930 }
931
932 fc = le16_to_cpu(hdr->frame_ctl);
933 type = WLAN_FC_GET_TYPE(fc);
934 stype = WLAN_FC_GET_STYPE(fc);
935 sc = le16_to_cpu(hdr->seq_ctl);
936
937 frag = WLAN_GET_SEQ_FRAG(sc);
938 hdrlen = ieee80211_get_hdrlen(fc);
939
940 if(HTCCheck(ieee, skb->data))
941 {
942 if(net_ratelimit())
943 printk("find HTCControl\n");
944 hdrlen += 4;
945 rx_stats->bContainHTC = 1;
946 }
947
948#ifdef NOT_YET
949#if WIRELESS_EXT > 15
950 /* Put this code here so that we avoid duplicating it in all
951 * Rx paths. - Jean II */
952#ifdef IW_WIRELESS_SPY /* defined in iw_handler.h */
953 /* If spy monitoring on */
954 if (iface->spy_data.spy_number > 0) {
955 struct iw_quality wstats;
956 wstats.level = rx_stats->rssi;
957 wstats.noise = rx_stats->noise;
958 wstats.updated = 6; /* No qual value */
959 /* Update spy records */
960 wireless_spy_update(dev, hdr->addr2, &wstats);
961 }
962#endif /* IW_WIRELESS_SPY */
963#endif /* WIRELESS_EXT > 15 */
964 hostap_update_rx_stats(local->ap, hdr, rx_stats);
965#endif
966
967#if WIRELESS_EXT > 15
968 if (ieee->iw_mode == IW_MODE_MONITOR) {
969 ieee80211_monitor_rx(ieee, skb, rx_stats);
970 stats->rx_packets++;
971 stats->rx_bytes += skb->len;
972 return 1;
973 }
974#endif
975 if (ieee->host_decrypt) {
976 int idx = 0;
977 if (skb->len >= hdrlen + 3)
978 idx = skb->data[hdrlen + 3] >> 6;
979 crypt = ieee->crypt[idx];
980#ifdef NOT_YET
981 sta = NULL;
982
983 /* Use station specific key to override default keys if the
984 * receiver address is a unicast address ("individual RA"). If
985 * bcrx_sta_key parameter is set, station specific key is used
986 * even with broad/multicast targets (this is against IEEE
987 * 802.11, but makes it easier to use different keys with
988 * stations that do not support WEP key mapping). */
989
990 if (!(hdr->addr1[0] & 0x01) || local->bcrx_sta_key)
991 (void) hostap_handle_sta_crypto(local, hdr, &crypt,
992 &sta);
993#endif
994
995 /* allow NULL decrypt to indicate an station specific override
996 * for default encryption */
997 if (crypt && (crypt->ops == NULL ||
998 crypt->ops->decrypt_mpdu == NULL))
999 crypt = NULL;
1000
1001 if (!crypt && (fc & IEEE80211_FCTL_WEP)) {
1002 /* This seems to be triggered by some (multicast?)
1003 * frames from other than current BSS, so just drop the
1004 * frames silently instead of filling system log with
1005 * these reports. */
1006 IEEE80211_DEBUG_DROP("Decryption failed (not set)"
1007 " (SA=%pM)\n",
1008 hdr->addr2);
1009 ieee->ieee_stats.rx_discards_undecryptable++;
1010 goto rx_dropped;
1011 }
1012 }
1013
1014 if (skb->len < IEEE80211_DATA_HDR3_LEN)
1015 goto rx_dropped;
1016
1017 // if QoS enabled, should check the sequence for each of the AC
1018 if( (ieee->pHTInfo->bCurRxReorderEnable == false) || !ieee->current_network.qos_data.active|| !IsDataFrame(skb->data) || IsLegacyDataFrame(skb->data)){
1019 if (is_duplicate_packet(ieee, hdr))
1020 goto rx_dropped;
1021
1022 }
1023 else
1024 {
1025 PRX_TS_RECORD pRxTS = NULL;
1026
1027 if(GetTs(
1028 ieee,
1029 (PTS_COMMON_INFO*) &pRxTS,
1030 hdr->addr2,
1031 (u8)Frame_QoSTID((u8*)(skb->data)),
1032 RX_DIR,
1033 true))
1034 {
1035
1036 if( (fc & (1<<11)) &&
1037 (frag == pRxTS->RxLastFragNum) &&
1038 (WLAN_GET_SEQ_SEQ(sc) == pRxTS->RxLastSeqNum) )
1039 {
1040 goto rx_dropped;
1041 }
1042 else
1043 {
1044 pRxTS->RxLastFragNum = frag;
1045 pRxTS->RxLastSeqNum = WLAN_GET_SEQ_SEQ(sc);
1046 }
1047 }
1048 else
1049 {
1050 IEEE80211_DEBUG(IEEE80211_DL_ERR, "%s(): No TS!! Skip the check!!\n",__FUNCTION__);
1051 goto rx_dropped;
1052 }
1053 }
1054
1055 if (type == IEEE80211_FTYPE_MGMT) {
1056
1057 if (ieee80211_rx_frame_mgmt(ieee, skb, rx_stats, type, stype))
1058 goto rx_dropped;
1059 else
1060 goto rx_exit;
1061 }
1062
1063 /* Data frame - extract src/dst addresses */
1064 switch (fc & (IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS)) {
1065 case IEEE80211_FCTL_FROMDS:
1066 memcpy(dst, hdr->addr1, ETH_ALEN);
1067 memcpy(src, hdr->addr3, ETH_ALEN);
1068 memcpy(bssid, hdr->addr2, ETH_ALEN);
1069 break;
1070 case IEEE80211_FCTL_TODS:
1071 memcpy(dst, hdr->addr3, ETH_ALEN);
1072 memcpy(src, hdr->addr2, ETH_ALEN);
1073 memcpy(bssid, hdr->addr1, ETH_ALEN);
1074 break;
1075 case IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS:
1076 if (skb->len < IEEE80211_DATA_HDR4_LEN)
1077 goto rx_dropped;
1078 memcpy(dst, hdr->addr3, ETH_ALEN);
1079 memcpy(src, hdr->addr4, ETH_ALEN);
1080 memcpy(bssid, ieee->current_network.bssid, ETH_ALEN);
1081 break;
1082 case 0:
1083 memcpy(dst, hdr->addr1, ETH_ALEN);
1084 memcpy(src, hdr->addr2, ETH_ALEN);
1085 memcpy(bssid, hdr->addr3, ETH_ALEN);
1086 break;
1087 }
1088
1089#ifdef NOT_YET
1090 if (hostap_rx_frame_wds(ieee, hdr, fc, &wds))
1091 goto rx_dropped;
1092 if (wds) {
1093 skb->dev = dev = wds;
1094 stats = hostap_get_stats(dev);
1095 }
1096
1097 if (ieee->iw_mode == IW_MODE_MASTER && !wds &&
1098 (fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) == IEEE80211_FCTL_FROMDS &&
1099 ieee->stadev &&
1100 memcmp(hdr->addr2, ieee->assoc_ap_addr, ETH_ALEN) == 0) {
1101 /* Frame from BSSID of the AP for which we are a client */
1102 skb->dev = dev = ieee->stadev;
1103 stats = hostap_get_stats(dev);
1104 from_assoc_ap = 1;
1105 }
1106#endif
1107
1108 dev->last_rx = jiffies;
1109
1110#ifdef NOT_YET
1111 if ((ieee->iw_mode == IW_MODE_MASTER ||
1112 ieee->iw_mode == IW_MODE_REPEAT) &&
1113 !from_assoc_ap) {
1114 switch (hostap_handle_sta_rx(ieee, dev, skb, rx_stats,
1115 wds != NULL)) {
1116 case AP_RX_CONTINUE_NOT_AUTHORIZED:
1117 frame_authorized = 0;
1118 break;
1119 case AP_RX_CONTINUE:
1120 frame_authorized = 1;
1121 break;
1122 case AP_RX_DROP:
1123 goto rx_dropped;
1124 case AP_RX_EXIT:
1125 goto rx_exit;
1126 }
1127 }
1128#endif
1129 /* Nullfunc frames may have PS-bit set, so they must be passed to
1130 * hostap_handle_sta_rx() before being dropped here. */
1131 if (stype != IEEE80211_STYPE_DATA &&
1132 stype != IEEE80211_STYPE_DATA_CFACK &&
1133 stype != IEEE80211_STYPE_DATA_CFPOLL &&
1134 stype != IEEE80211_STYPE_DATA_CFACKPOLL&&
1135 stype != IEEE80211_STYPE_QOS_DATA//add by David,2006.8.4
1136 ) {
1137 if (stype != IEEE80211_STYPE_NULLFUNC)
1138 IEEE80211_DEBUG_DROP(
1139 "RX: dropped data frame "
1140 "with no data (type=0x%02x, "
1141 "subtype=0x%02x, len=%d)\n",
1142 type, stype, skb->len);
1143 goto rx_dropped;
1144 }
1145 if (memcmp(bssid, ieee->current_network.bssid, ETH_ALEN))
1146 goto rx_dropped;
1147
1148#ifdef ENABLE_LPS
1149 if ((ieee->iw_mode == IW_MODE_INFRA) && (ieee->sta_sleep == 1)
1150 && (ieee->polling)) {
1151 if (WLAN_FC_MORE_DATA(fc)) {
1152 /* more data bit is set, let's request a new frame from the AP */
1153 ieee80211_sta_ps_send_pspoll_frame(ieee);
1154 } else {
1155 ieee->polling = false;
1156 }
1157 }
1158#endif
1159
1160 ieee->need_sw_enc = 0;
1161
1162 if((!rx_stats->Decrypted)){
1163 ieee->need_sw_enc = 1;
1164 }
1165
1166 /* skb: hdr + (possibly fragmented, possibly encrypted) payload */
1167
1168 if (ieee->host_decrypt && (fc & IEEE80211_FCTL_WEP) &&
1169 (keyidx = ieee80211_rx_frame_decrypt(ieee, skb, crypt)) < 0)
1170 {
1171 printk("decrypt frame error\n");
1172 goto rx_dropped;
1173 }
1174
1175
1176 hdr = (struct ieee80211_hdr_4addr *) skb->data;
1177
1178 /* skb: hdr + (possibly fragmented) plaintext payload */
1179 // PR: FIXME: hostap has additional conditions in the "if" below:
1180 // ieee->host_decrypt && (fc & IEEE80211_FCTL_WEP) &&
1181 if ((frag != 0 || (fc & IEEE80211_FCTL_MOREFRAGS))) {
1182 int flen;
1183 struct sk_buff *frag_skb = ieee80211_frag_cache_get(ieee, hdr);
1184 IEEE80211_DEBUG_FRAG("Rx Fragment received (%u)\n", frag);
1185
1186 if (!frag_skb) {
1187 IEEE80211_DEBUG(IEEE80211_DL_RX | IEEE80211_DL_FRAG,
1188 "Rx cannot get skb from fragment "
1189 "cache (morefrag=%d seq=%u frag=%u)\n",
1190 (fc & IEEE80211_FCTL_MOREFRAGS) != 0,
1191 WLAN_GET_SEQ_SEQ(sc), frag);
1192 goto rx_dropped;
1193 }
1194 flen = skb->len;
1195 if (frag != 0)
1196 flen -= hdrlen;
1197
1198 if (frag_skb->tail + flen > frag_skb->end) {
1199 printk(KERN_WARNING "%s: host decrypted and "
1200 "reassembled frame did not fit skb\n",
1201 dev->name);
1202 ieee80211_frag_cache_invalidate(ieee, hdr);
1203 goto rx_dropped;
1204 }
1205
1206 if (frag == 0) {
1207 /* copy first fragment (including full headers) into
1208 * beginning of the fragment cache skb */
1209 memcpy(skb_put(frag_skb, flen), skb->data, flen);
1210 } else {
1211 /* append frame payload to the end of the fragment
1212 * cache skb */
1213 memcpy(skb_put(frag_skb, flen), skb->data + hdrlen,
1214 flen);
1215 }
1216 dev_kfree_skb_any(skb);
1217 skb = NULL;
1218
1219 if (fc & IEEE80211_FCTL_MOREFRAGS) {
1220 /* more fragments expected - leave the skb in fragment
1221 * cache for now; it will be delivered to upper layers
1222 * after all fragments have been received */
1223 goto rx_exit;
1224 }
1225
1226 /* this was the last fragment and the frame will be
1227 * delivered, so remove skb from fragment cache */
1228 skb = frag_skb;
1229 hdr = (struct ieee80211_hdr_4addr *) skb->data;
1230 ieee80211_frag_cache_invalidate(ieee, hdr);
1231 }
1232
1233 /* skb: hdr + (possible reassembled) full MSDU payload; possibly still
1234 * encrypted/authenticated */
1235 if (ieee->host_decrypt && (fc & IEEE80211_FCTL_WEP) &&
1236 ieee80211_rx_frame_decrypt_msdu(ieee, skb, keyidx, crypt))
1237 {
1238 printk("==>decrypt msdu error\n");
1239 goto rx_dropped;
1240 }
1241
1242 //added by amy for AP roaming
1243 ieee->LinkDetectInfo.NumRecvDataInPeriod++;
1244 ieee->LinkDetectInfo.NumRxOkInPeriod++;
1245
1246 hdr = (struct ieee80211_hdr_4addr *) skb->data;
1247 if((!is_multicast_ether_addr(hdr->addr1)) && (!is_broadcast_ether_addr(hdr->addr1)))
1248 unicast_packet = true;
1249
1250 if (crypt && !(fc & IEEE80211_FCTL_WEP) && !ieee->open_wep) {
1251 if (/*ieee->ieee802_1x &&*/
1252 ieee80211_is_eapol_frame(ieee, skb, hdrlen)) {
1253
1254#ifdef CONFIG_IEEE80211_DEBUG
1255 /* pass unencrypted EAPOL frames even if encryption is
1256 * configured */
1257 struct eapol *eap = (struct eapol *)(skb->data +
1258 24);
1259 IEEE80211_DEBUG_EAP("RX: IEEE 802.1X EAPOL frame: %s\n",
1260 eap_get_type(eap->type));
1261#endif
1262 } else {
1263 IEEE80211_DEBUG_DROP(
1264 "encryption configured, but RX "
1265 "frame not encrypted (SA=%pM)\n",
1266 hdr->addr2);
1267 goto rx_dropped;
1268 }
1269 }
1270
1271#ifdef CONFIG_IEEE80211_DEBUG
1272 if (crypt && !(fc & IEEE80211_FCTL_WEP) &&
1273 ieee80211_is_eapol_frame(ieee, skb, hdrlen)) {
1274 struct eapol *eap = (struct eapol *)(skb->data +
1275 24);
1276 IEEE80211_DEBUG_EAP("RX: IEEE 802.1X EAPOL frame: %s\n",
1277 eap_get_type(eap->type));
1278 }
1279#endif
1280
1281 if (crypt && !(fc & IEEE80211_FCTL_WEP) && !ieee->open_wep &&
1282 !ieee80211_is_eapol_frame(ieee, skb, hdrlen)) {
1283 IEEE80211_DEBUG_DROP(
1284 "dropped unencrypted RX data "
1285 "frame from %pM"
1286 " (drop_unencrypted=1)\n",
1287 hdr->addr2);
1288 goto rx_dropped;
1289 }
1290//added by amy for reorder
1291 if(ieee->current_network.qos_data.active && IsQoSDataFrame(skb->data)
1292 && !is_multicast_ether_addr(hdr->addr1) && !is_broadcast_ether_addr(hdr->addr1))
1293 {
1294 TID = Frame_QoSTID(skb->data);
1295 SeqNum = WLAN_GET_SEQ_SEQ(sc);
1296 GetTs(ieee,(PTS_COMMON_INFO*) &pTS,hdr->addr2,TID,RX_DIR,true);
1297 if(TID !=0 && TID !=3)
1298 {
1299 ieee->bis_any_nonbepkts = true;
1300 }
1301 }
1302
1303//added by amy for reorder
1304 /* skb: hdr + (possible reassembled) full plaintext payload */
1305 payload = skb->data + hdrlen;
1306
1307 rxb = kmalloc(sizeof(struct ieee80211_rxb), GFP_ATOMIC);
1308 if(rxb == NULL)
1309 {
1310 IEEE80211_DEBUG(IEEE80211_DL_ERR,"%s(): kmalloc rxb error\n",__FUNCTION__);
1311 goto rx_dropped;
1312 }
1313 /* to parse amsdu packets */
1314 /* qos data packets & reserved bit is 1 */
1315 if(parse_subframe(ieee, skb,rx_stats,rxb,src,dst) == 0) {
1316 /* only to free rxb, and not submit the packets to upper layer */
1317 for(i =0; i < rxb->nr_subframes; i++) {
1318 dev_kfree_skb(rxb->subframes[i]);
1319 }
1320 kfree(rxb);
1321 rxb = NULL;
1322 goto rx_dropped;
1323 }
1324
1325#ifdef ENABLE_LPS
1326 if(unicast_packet)
1327 {
1328 if (type == IEEE80211_FTYPE_DATA)
1329 {
1330
1331 if(ieee->bIsAggregateFrame)
1332 ieee->LinkDetectInfo.NumRxUnicastOkInPeriod+=rxb->nr_subframes;
1333 else
1334 ieee->LinkDetectInfo.NumRxUnicastOkInPeriod++;
1335
1336 // 2009.03.03 Leave DC mode immediately when detect high traffic
1337 if((ieee->state == IEEE80211_LINKED) /*&& !MgntInitAdapterInProgress(pMgntInfo)*/)
1338 {
1339 if( ((ieee->LinkDetectInfo.NumRxUnicastOkInPeriod +ieee->LinkDetectInfo.NumTxOkInPeriod) > 8 ) ||
1340 (ieee->LinkDetectInfo.NumRxUnicastOkInPeriod > 2) )
1341 {
1342 if(ieee->LeisurePSLeave)
1343 ieee->LeisurePSLeave(ieee);
1344 }
1345 }
1346 }
1347 }
1348#endif
1349
1350 ieee->last_rx_ps_time = jiffies;
1351//added by amy for reorder
1352 if(ieee->pHTInfo->bCurRxReorderEnable == false ||pTS == NULL){
1353//added by amy for reorder
1354 for(i = 0; i<rxb->nr_subframes; i++) {
1355 struct sk_buff *sub_skb = rxb->subframes[i];
1356
1357 if (sub_skb) {
1358 /* convert hdr + possible LLC headers into Ethernet header */
1359 ethertype = (sub_skb->data[6] << 8) | sub_skb->data[7];
1360 if (sub_skb->len >= 8 &&
1361 ((memcmp(sub_skb->data, rfc1042_header, SNAP_SIZE) == 0 &&
1362 ethertype != ETH_P_AARP && ethertype != ETH_P_IPX) ||
1363 memcmp(sub_skb->data, bridge_tunnel_header, SNAP_SIZE) == 0)) {
1364 /* remove RFC1042 or Bridge-Tunnel encapsulation and
1365 * replace EtherType */
1366 skb_pull(sub_skb, SNAP_SIZE);
1367 memcpy(skb_push(sub_skb, ETH_ALEN), src, ETH_ALEN);
1368 memcpy(skb_push(sub_skb, ETH_ALEN), dst, ETH_ALEN);
1369 } else {
1370 u16 len;
1371 /* Leave Ethernet header part of hdr and full payload */
1372 len = htons(sub_skb->len);
1373 memcpy(skb_push(sub_skb, 2), &len, 2);
1374 memcpy(skb_push(sub_skb, ETH_ALEN), src, ETH_ALEN);
1375 memcpy(skb_push(sub_skb, ETH_ALEN), dst, ETH_ALEN);
1376 }
1377
1378 stats->rx_packets++;
1379 stats->rx_bytes += sub_skb->len;
1380 if(is_multicast_ether_addr(dst)) {
1381 stats->multicast++;
1382 }
1383
1384 /* Indicat the packets to upper layer */
1385 sub_skb->protocol = eth_type_trans(sub_skb, dev);
1386 memset(sub_skb->cb, 0, sizeof(sub_skb->cb));
1387 sub_skb->dev = dev;
1388 sub_skb->ip_summed = CHECKSUM_NONE; /* 802.11 crc not sufficient */
1389 netif_rx(sub_skb);
1390 }
1391 }
1392 kfree(rxb);
1393 rxb = NULL;
1394
1395 }
1396 else
1397 {
1398 IEEE80211_DEBUG(IEEE80211_DL_REORDER,"%s(): REORDER ENABLE AND PTS not NULL, and we will enter RxReorderIndicatePacket()\n",__FUNCTION__);
1399 RxReorderIndicatePacket(ieee, rxb, pTS, SeqNum);
1400 }
1401#ifndef JOHN_NOCPY
1402 dev_kfree_skb(skb);
1403#endif
1404
1405 rx_exit:
1406#ifdef NOT_YET
1407 if (sta)
1408 hostap_handle_sta_release(sta);
1409#endif
1410 return 1;
1411
1412 rx_dropped:
1413 kfree(rxb);
1414 rxb = NULL;
1415 stats->rx_dropped++;
1416
1417 /* Returning 0 indicates to caller that we have not handled the SKB--
1418 * so it is still allocated and can be used again by underlying
1419 * hardware as a DMA target */
1420 return 0;
1421}
1422
1423#define MGMT_FRAME_FIXED_PART_LENGTH 0x24
1424
1425static u8 qos_oui[QOS_OUI_LEN] = { 0x00, 0x50, 0xF2 };
1426
1427/*
1428* Make the structure we read from the beacon packet to have
1429* the right values
1430*/
1431static int ieee80211_verify_qos_info(struct ieee80211_qos_information_element
1432 *info_element, int sub_type)
1433{
1434
1435 if (info_element->qui_subtype != sub_type)
1436 return -1;
1437 if (memcmp(info_element->qui, qos_oui, QOS_OUI_LEN))
1438 return -1;
1439 if (info_element->qui_type != QOS_OUI_TYPE)
1440 return -1;
1441 if (info_element->version != QOS_VERSION_1)
1442 return -1;
1443
1444 return 0;
1445}
1446
1447
1448/*
1449 * Parse a QoS parameter element
1450 */
1451static int ieee80211_read_qos_param_element(struct ieee80211_qos_parameter_info
1452 *element_param, struct ieee80211_info_element
1453 *info_element)
1454{
1455 int ret = 0;
1456 u16 size = sizeof(struct ieee80211_qos_parameter_info) - 2;
1457
1458 if ((info_element == NULL) || (element_param == NULL))
1459 return -1;
1460
1461 if (info_element->id == QOS_ELEMENT_ID && info_element->len == size) {
1462 memcpy(element_param->info_element.qui, info_element->data,
1463 info_element->len);
1464 element_param->info_element.elementID = info_element->id;
1465 element_param->info_element.length = info_element->len;
1466 } else
1467 ret = -1;
1468 if (ret == 0)
1469 ret = ieee80211_verify_qos_info(&element_param->info_element,
1470 QOS_OUI_PARAM_SUB_TYPE);
1471 return ret;
1472}
1473
1474/*
1475 * Parse a QoS information element
1476 */
1477static int ieee80211_read_qos_info_element(struct
1478 ieee80211_qos_information_element
1479 *element_info, struct ieee80211_info_element
1480 *info_element)
1481{
1482 int ret = 0;
1483 u16 size = sizeof(struct ieee80211_qos_information_element) - 2;
1484
1485 if (element_info == NULL)
1486 return -1;
1487 if (info_element == NULL)
1488 return -1;
1489
1490 if ((info_element->id == QOS_ELEMENT_ID) && (info_element->len == size)) {
1491 memcpy(element_info->qui, info_element->data,
1492 info_element->len);
1493 element_info->elementID = info_element->id;
1494 element_info->length = info_element->len;
1495 } else
1496 ret = -1;
1497
1498 if (ret == 0)
1499 ret = ieee80211_verify_qos_info(element_info,
1500 QOS_OUI_INFO_SUB_TYPE);
1501 return ret;
1502}
1503
1504
1505/*
1506 * Write QoS parameters from the ac parameters.
1507 */
1508static int ieee80211_qos_convert_ac_to_parameters(struct
1509 ieee80211_qos_parameter_info
1510 *param_elm, struct
1511 ieee80211_qos_parameters
1512 *qos_param)
1513{
1514 int rc = 0;
1515 int i;
1516 struct ieee80211_qos_ac_parameter *ac_params;
1517 u8 aci;
1518
1519 for (i = 0; i < QOS_QUEUE_NUM; i++) {
1520 ac_params = &(param_elm->ac_params_record[i]);
1521
1522 aci = (ac_params->aci_aifsn & 0x60) >> 5;
1523
1524 if(aci >= QOS_QUEUE_NUM)
1525 continue;
1526 qos_param->aifs[aci] = (ac_params->aci_aifsn) & 0x0f;
1527
1528 /* WMM spec P.11: The minimum value for AIFSN shall be 2 */
1529 qos_param->aifs[aci] = (qos_param->aifs[aci] < 2) ? 2:qos_param->aifs[aci];
1530
1531 qos_param->cw_min[aci] = ac_params->ecw_min_max & 0x0F;
1532
1533 qos_param->cw_max[aci] = (ac_params->ecw_min_max & 0xF0) >> 4;
1534
1535 qos_param->flag[aci] =
1536 (ac_params->aci_aifsn & 0x10) ? 0x01 : 0x00;
1537 qos_param->tx_op_limit[aci] = le16_to_cpu(ac_params->tx_op_limit);
1538 }
1539 return rc;
1540}
1541
1542/*
1543 * we have a generic data element which it may contain QoS information or
1544 * parameters element. check the information element length to decide
1545 * which type to read
1546 */
1547static int ieee80211_parse_qos_info_param_IE(struct ieee80211_info_element
1548 *info_element,
1549 struct ieee80211_network *network)
1550{
1551 int rc = 0;
1552 struct ieee80211_qos_parameters *qos_param = NULL;
1553 struct ieee80211_qos_information_element qos_info_element;
1554
1555 rc = ieee80211_read_qos_info_element(&qos_info_element, info_element);
1556
1557 if (rc == 0) {
1558 network->qos_data.param_count = qos_info_element.ac_info & 0x0F;
1559 network->flags |= NETWORK_HAS_QOS_INFORMATION;
1560 } else {
1561 struct ieee80211_qos_parameter_info param_element;
1562
1563 rc = ieee80211_read_qos_param_element(&param_element,
1564 info_element);
1565 if (rc == 0) {
1566 qos_param = &(network->qos_data.parameters);
1567 ieee80211_qos_convert_ac_to_parameters(&param_element,
1568 qos_param);
1569 network->flags |= NETWORK_HAS_QOS_PARAMETERS;
1570 network->qos_data.param_count =
1571 param_element.info_element.ac_info & 0x0F;
1572 }
1573 }
1574
1575 if (rc == 0) {
1576 IEEE80211_DEBUG_QOS("QoS is supported\n");
1577 network->qos_data.supported = 1;
1578 }
1579 return rc;
1580}
1581
1582#ifdef CONFIG_IEEE80211_DEBUG
1583#define MFIE_STRING(x) case MFIE_TYPE_ ##x: return #x
1584
1585static const char *get_info_element_string(u16 id)
1586{
1587 switch (id) {
1588 MFIE_STRING(SSID);
1589 MFIE_STRING(RATES);
1590 MFIE_STRING(FH_SET);
1591 MFIE_STRING(DS_SET);
1592 MFIE_STRING(CF_SET);
1593 MFIE_STRING(TIM);
1594 MFIE_STRING(IBSS_SET);
1595 MFIE_STRING(COUNTRY);
1596 MFIE_STRING(HOP_PARAMS);
1597 MFIE_STRING(HOP_TABLE);
1598 MFIE_STRING(REQUEST);
1599 MFIE_STRING(CHALLENGE);
1600 MFIE_STRING(POWER_CONSTRAINT);
1601 MFIE_STRING(POWER_CAPABILITY);
1602 MFIE_STRING(TPC_REQUEST);
1603 MFIE_STRING(TPC_REPORT);
1604 MFIE_STRING(SUPP_CHANNELS);
1605 MFIE_STRING(CSA);
1606 MFIE_STRING(MEASURE_REQUEST);
1607 MFIE_STRING(MEASURE_REPORT);
1608 MFIE_STRING(QUIET);
1609 MFIE_STRING(IBSS_DFS);
1610 // MFIE_STRING(ERP_INFO);
1611 MFIE_STRING(RSN);
1612 MFIE_STRING(RATES_EX);
1613 MFIE_STRING(GENERIC);
1614 MFIE_STRING(QOS_PARAMETER);
1615 default:
1616 return "UNKNOWN";
1617 }
1618}
1619#endif
1620
1621#ifdef ENABLE_DOT11D
1622static inline void ieee80211_extract_country_ie(
1623 struct ieee80211_device *ieee,
1624 struct ieee80211_info_element *info_element,
1625 struct ieee80211_network *network,
1626 u8 * addr2
1627)
1628{
1629 if(IS_DOT11D_ENABLE(ieee))
1630 {
1631 if(info_element->len!= 0)
1632 {
1633 memcpy(network->CountryIeBuf, info_element->data, info_element->len);
1634 network->CountryIeLen = info_element->len;
1635
1636 if(!IS_COUNTRY_IE_VALID(ieee))
1637 {
1638 Dot11d_UpdateCountryIe(ieee, addr2, info_element->len, info_element->data);
1639 }
1640 }
1641
1642 //
1643 // 070305, rcnjko: I update country IE watch dog here because
1644 // some AP (e.g. Cisco 1242) don't include country IE in their
1645 // probe response frame.
1646 //
1647 if(IS_EQUAL_CIE_SRC(ieee, addr2) )
1648 {
1649 UPDATE_CIE_WATCHDOG(ieee);
1650 }
1651 }
1652
1653}
1654#endif
1655
1656int ieee80211_parse_info_param(struct ieee80211_device *ieee,
1657 struct ieee80211_info_element *info_element,
1658 u16 length,
1659 struct ieee80211_network *network,
1660 struct ieee80211_rx_stats *stats)
1661{
1662 u8 i;
1663 short offset;
1664 u16 tmp_htcap_len=0;
1665 u16 tmp_htinfo_len=0;
1666 u16 ht_realtek_agg_len=0;
1667 u8 ht_realtek_agg_buf[MAX_IE_LEN];
1668#ifdef CONFIG_IEEE80211_DEBUG
1669 char rates_str[64];
1670 char *p;
1671#endif
1672
1673 while (length >= sizeof(*info_element)) {
1674 if (sizeof(*info_element) + info_element->len > length) {
1675 IEEE80211_DEBUG_MGMT("Info elem: parse failed: "
1676 "info_element->len + 2 > left : "
1677 "info_element->len+2=%zd left=%d, id=%d.\n",
1678 info_element->len +
1679 sizeof(*info_element),
1680 length, info_element->id);
1681 /* We stop processing but don't return an error here
1682 * because some misbehaviour APs break this rule. ie.
1683 * Orinoco AP1000. */
1684 break;
1685 }
1686
1687 switch (info_element->id) {
1688 case MFIE_TYPE_SSID:
1689 if (ieee80211_is_empty_essid(info_element->data,
1690 info_element->len)) {
1691 network->flags |= NETWORK_EMPTY_ESSID;
1692 break;
1693 }
1694
1695 network->ssid_len = min(info_element->len,
1696 (u8) IW_ESSID_MAX_SIZE);
1697 memcpy(network->ssid, info_element->data, network->ssid_len);
1698 if (network->ssid_len < IW_ESSID_MAX_SIZE)
1699 memset(network->ssid + network->ssid_len, 0,
1700 IW_ESSID_MAX_SIZE - network->ssid_len);
1701
1702 IEEE80211_DEBUG_MGMT("MFIE_TYPE_SSID: '%s' len=%d.\n",
1703 network->ssid, network->ssid_len);
1704 break;
1705
1706 case MFIE_TYPE_RATES:
1707#ifdef CONFIG_IEEE80211_DEBUG
1708 p = rates_str;
1709#endif
1710 network->rates_len = min(info_element->len,
1711 MAX_RATES_LENGTH);
1712 for (i = 0; i < network->rates_len; i++) {
1713 network->rates[i] = info_element->data[i];
1714#ifdef CONFIG_IEEE80211_DEBUG
1715 p += snprintf(p, sizeof(rates_str) -
1716 (p - rates_str), "%02X ",
1717 network->rates[i]);
1718#endif
1719 if (ieee80211_is_ofdm_rate
1720 (info_element->data[i])) {
1721 network->flags |= NETWORK_HAS_OFDM;
1722 if (info_element->data[i] &
1723 IEEE80211_BASIC_RATE_MASK)
1724 network->flags &=
1725 ~NETWORK_HAS_CCK;
1726 }
1727 }
1728
1729 IEEE80211_DEBUG_MGMT("MFIE_TYPE_RATES: '%s' (%d)\n",
1730 rates_str, network->rates_len);
1731 break;
1732
1733 case MFIE_TYPE_RATES_EX:
1734#ifdef CONFIG_IEEE80211_DEBUG
1735 p = rates_str;
1736#endif
1737 network->rates_ex_len = min(info_element->len,
1738 MAX_RATES_EX_LENGTH);
1739 for (i = 0; i < network->rates_ex_len; i++) {
1740 network->rates_ex[i] = info_element->data[i];
1741#ifdef CONFIG_IEEE80211_DEBUG
1742 p += snprintf(p, sizeof(rates_str) -
1743 (p - rates_str), "%02X ",
1744 network->rates[i]);
1745#endif
1746 if (ieee80211_is_ofdm_rate
1747 (info_element->data[i])) {
1748 network->flags |= NETWORK_HAS_OFDM;
1749 if (info_element->data[i] &
1750 IEEE80211_BASIC_RATE_MASK)
1751 network->flags &=
1752 ~NETWORK_HAS_CCK;
1753 }
1754 }
1755
1756 IEEE80211_DEBUG_MGMT("MFIE_TYPE_RATES_EX: '%s' (%d)\n",
1757 rates_str, network->rates_ex_len);
1758 break;
1759
1760 case MFIE_TYPE_DS_SET:
1761 IEEE80211_DEBUG_MGMT("MFIE_TYPE_DS_SET: %d\n",
1762 info_element->data[0]);
1763 network->channel = info_element->data[0];
1764 break;
1765
1766 case MFIE_TYPE_FH_SET:
1767 IEEE80211_DEBUG_MGMT("MFIE_TYPE_FH_SET: ignored\n");
1768 break;
1769
1770 case MFIE_TYPE_CF_SET:
1771 IEEE80211_DEBUG_MGMT("MFIE_TYPE_CF_SET: ignored\n");
1772 break;
1773
1774 case MFIE_TYPE_TIM:
1775 if(info_element->len < 4)
1776 break;
1777
1778 network->tim.tim_count = info_element->data[0];
1779 network->tim.tim_period = info_element->data[1];
1780
1781 network->dtim_period = info_element->data[1];
1782 if(ieee->state != IEEE80211_LINKED)
1783 break;
1784 //we use jiffies for legacy Power save
1785 network->last_dtim_sta_time[0] = jiffies;
1786 network->last_dtim_sta_time[1] = stats->mac_time[1];
1787
1788 network->dtim_data = IEEE80211_DTIM_VALID;
1789
1790 if(info_element->data[0] != 0)
1791 break;
1792
1793 if(info_element->data[2] & 1)
1794 network->dtim_data |= IEEE80211_DTIM_MBCAST;
1795
1796 offset = (info_element->data[2] >> 1)*2;
1797
1798 if(ieee->assoc_id < 8*offset ||
1799 ieee->assoc_id > 8*(offset + info_element->len -3))
1800
1801 break;
1802
1803 offset = (ieee->assoc_id / 8) - offset;// + ((aid % 8)? 0 : 1) ;
1804
1805 if(info_element->data[3+offset] & (1<<(ieee->assoc_id%8)))
1806 network->dtim_data |= IEEE80211_DTIM_UCAST;
1807
1808 break;
1809
1810 case MFIE_TYPE_ERP:
1811 network->erp_value = info_element->data[0];
1812 network->flags |= NETWORK_HAS_ERP_VALUE;
1813 IEEE80211_DEBUG_MGMT("MFIE_TYPE_ERP_SET: %d\n",
1814 network->erp_value);
1815 break;
1816 case MFIE_TYPE_IBSS_SET:
1817 network->atim_window = info_element->data[0];
1818 IEEE80211_DEBUG_MGMT("MFIE_TYPE_IBSS_SET: %d\n",
1819 network->atim_window);
1820 break;
1821
1822 case MFIE_TYPE_CHALLENGE:
1823 IEEE80211_DEBUG_MGMT("MFIE_TYPE_CHALLENGE: ignored\n");
1824 break;
1825
1826 case MFIE_TYPE_GENERIC:
1827 IEEE80211_DEBUG_MGMT("MFIE_TYPE_GENERIC: %d bytes\n",
1828 info_element->len);
1829 if (!ieee80211_parse_qos_info_param_IE(info_element,
1830 network))
1831 break;
1832
1833 if (info_element->len >= 4 &&
1834 info_element->data[0] == 0x00 &&
1835 info_element->data[1] == 0x50 &&
1836 info_element->data[2] == 0xf2 &&
1837 info_element->data[3] == 0x01) {
1838 network->wpa_ie_len = min(info_element->len + 2,
1839 MAX_WPA_IE_LEN);
1840 memcpy(network->wpa_ie, info_element,
1841 network->wpa_ie_len);
1842 break;
1843 }
1844
1845#ifdef THOMAS_TURBO
1846 if (info_element->len == 7 &&
1847 info_element->data[0] == 0x00 &&
1848 info_element->data[1] == 0xe0 &&
1849 info_element->data[2] == 0x4c &&
1850 info_element->data[3] == 0x01 &&
1851 info_element->data[4] == 0x02) {
1852 network->Turbo_Enable = 1;
1853 }
1854#endif
1855
1856 //for HTcap and HTinfo parameters
1857 if(tmp_htcap_len == 0){
1858 if(info_element->len >= 4 &&
1859 info_element->data[0] == 0x00 &&
1860 info_element->data[1] == 0x90 &&
1861 info_element->data[2] == 0x4c &&
1862 info_element->data[3] == 0x033){
1863
1864 tmp_htcap_len = min(info_element->len,(u8)MAX_IE_LEN);
1865 if(tmp_htcap_len != 0){
1866 network->bssht.bdHTSpecVer = HT_SPEC_VER_EWC;
1867 network->bssht.bdHTCapLen = tmp_htcap_len > sizeof(network->bssht.bdHTCapBuf)?\
1868 sizeof(network->bssht.bdHTCapBuf):tmp_htcap_len;
1869 memcpy(network->bssht.bdHTCapBuf,info_element->data,network->bssht.bdHTCapLen);
1870 }
1871 }
1872 if(tmp_htcap_len != 0)
1873 network->bssht.bdSupportHT = true;
1874 else
1875 network->bssht.bdSupportHT = false;
1876 }
1877
1878
1879 if(tmp_htinfo_len == 0){
1880 if(info_element->len >= 4 &&
1881 info_element->data[0] == 0x00 &&
1882 info_element->data[1] == 0x90 &&
1883 info_element->data[2] == 0x4c &&
1884 info_element->data[3] == 0x034){
1885
1886 tmp_htinfo_len = min(info_element->len,(u8)MAX_IE_LEN);
1887 if(tmp_htinfo_len != 0){
1888 network->bssht.bdHTSpecVer = HT_SPEC_VER_EWC;
1889 if(tmp_htinfo_len){
1890 network->bssht.bdHTInfoLen = tmp_htinfo_len > sizeof(network->bssht.bdHTInfoBuf)?\
1891 sizeof(network->bssht.bdHTInfoBuf):tmp_htinfo_len;
1892 memcpy(network->bssht.bdHTInfoBuf,info_element->data,network->bssht.bdHTInfoLen);
1893 }
1894
1895 }
1896
1897 }
1898 }
1899
1900 if(ieee->aggregation){
1901 if(network->bssht.bdSupportHT){
1902 if(info_element->len >= 4 &&
1903 info_element->data[0] == 0x00 &&
1904 info_element->data[1] == 0xe0 &&
1905 info_element->data[2] == 0x4c &&
1906 info_element->data[3] == 0x02){
1907
1908 ht_realtek_agg_len = min(info_element->len,(u8)MAX_IE_LEN);
1909 memcpy(ht_realtek_agg_buf,info_element->data,info_element->len);
1910
1911 }
1912 if(ht_realtek_agg_len >= 5){
1913 network->bssht.bdRT2RTAggregation = true;
1914
1915 if((ht_realtek_agg_buf[4] == 1) && (ht_realtek_agg_buf[5] & 0x02))
1916 network->bssht.bdRT2RTLongSlotTime = true;
1917 }
1918 }
1919
1920 }
1921
1922 if((info_element->len >= 3 &&
1923 info_element->data[0] == 0x00 &&
1924 info_element->data[1] == 0x05 &&
1925 info_element->data[2] == 0xb5) ||
1926 (info_element->len >= 3 &&
1927 info_element->data[0] == 0x00 &&
1928 info_element->data[1] == 0x0a &&
1929 info_element->data[2] == 0xf7) ||
1930 (info_element->len >= 3 &&
1931 info_element->data[0] == 0x00 &&
1932 info_element->data[1] == 0x10 &&
1933 info_element->data[2] == 0x18)){
1934
1935 network->broadcom_cap_exist = true;
1936
1937 }
1938
1939 if(info_element->len >= 3 &&
1940 info_element->data[0] == 0x00 &&
1941 info_element->data[1] == 0x0c &&
1942 info_element->data[2] == 0x43)
1943 {
1944 network->ralink_cap_exist = true;
1945 }
1946 else
1947 network->ralink_cap_exist = false;
1948 //added by amy for atheros AP
1949 if((info_element->len >= 3 &&
1950 info_element->data[0] == 0x00 &&
1951 info_element->data[1] == 0x03 &&
1952 info_element->data[2] == 0x7f) ||
1953 (info_element->len >= 3 &&
1954 info_element->data[0] == 0x00 &&
1955 info_element->data[1] == 0x13 &&
1956 info_element->data[2] == 0x74))
1957 {
1958 network->atheros_cap_exist = true;
1959 }
1960 else
1961 network->atheros_cap_exist = false;
1962
1963 if ((info_element->len >= 3 &&
1964 info_element->data[0] == 0x00 &&
1965 info_element->data[1] == 0x50 &&
1966 info_element->data[2] == 0x43) )
1967 {
1968 network->marvell_cap_exist = true;
1969 }
1970
1971
1972 if(info_element->len >= 3 &&
1973 info_element->data[0] == 0x00 &&
1974 info_element->data[1] == 0x40 &&
1975 info_element->data[2] == 0x96)
1976 {
1977 network->cisco_cap_exist = true;
1978 }
1979 else
1980 network->cisco_cap_exist = false;
1981 //added by amy for LEAP of cisco
1982 if(info_element->len > 4 &&
1983 info_element->data[0] == 0x00 &&
1984 info_element->data[1] == 0x40 &&
1985 info_element->data[2] == 0x96 &&
1986 info_element->data[3] == 0x01)
1987 {
1988 if(info_element->len == 6)
1989 {
1990 memcpy(network->CcxRmState, &info_element[4], 2);
1991 if(network->CcxRmState[0] != 0)
1992 {
1993 network->bCcxRmEnable = true;
1994 }
1995 else
1996 network->bCcxRmEnable = false;
1997 //
1998 // CCXv4 Table 59-1 MBSSID Masks.
1999 //
2000 network->MBssidMask = network->CcxRmState[1] & 0x07;
2001 if(network->MBssidMask != 0)
2002 {
2003 network->bMBssidValid = true;
2004 network->MBssidMask = 0xff << (network->MBssidMask);
2005 cpMacAddr(network->MBssid, network->bssid);
2006 network->MBssid[5] &= network->MBssidMask;
2007 }
2008 else
2009 {
2010 network->bMBssidValid = false;
2011 }
2012 }
2013 else
2014 {
2015 network->bCcxRmEnable = false;
2016 }
2017 }
2018 if(info_element->len > 4 &&
2019 info_element->data[0] == 0x00 &&
2020 info_element->data[1] == 0x40 &&
2021 info_element->data[2] == 0x96 &&
2022 info_element->data[3] == 0x03)
2023 {
2024 if(info_element->len == 5)
2025 {
2026 network->bWithCcxVerNum = true;
2027 network->BssCcxVerNumber = info_element->data[4];
2028 }
2029 else
2030 {
2031 network->bWithCcxVerNum = false;
2032 network->BssCcxVerNumber = 0;
2033 }
2034 }
2035 break;
2036
2037 case MFIE_TYPE_RSN:
2038 IEEE80211_DEBUG_MGMT("MFIE_TYPE_RSN: %d bytes\n",
2039 info_element->len);
2040 network->rsn_ie_len = min(info_element->len + 2,
2041 MAX_WPA_IE_LEN);
2042 memcpy(network->rsn_ie, info_element,
2043 network->rsn_ie_len);
2044 break;
2045
2046 //HT related element.
2047 case MFIE_TYPE_HT_CAP:
2048 IEEE80211_DEBUG_SCAN("MFIE_TYPE_HT_CAP: %d bytes\n",
2049 info_element->len);
2050 tmp_htcap_len = min(info_element->len,(u8)MAX_IE_LEN);
2051 if(tmp_htcap_len != 0){
2052 network->bssht.bdHTSpecVer = HT_SPEC_VER_EWC;
2053 network->bssht.bdHTCapLen = tmp_htcap_len > sizeof(network->bssht.bdHTCapBuf)?\
2054 sizeof(network->bssht.bdHTCapBuf):tmp_htcap_len;
2055 memcpy(network->bssht.bdHTCapBuf,info_element->data,network->bssht.bdHTCapLen);
2056
2057 //If peer is HT, but not WMM, call QosSetLegacyWMMParamWithHT()
2058 // windows driver will update WMM parameters each beacon received once connected
2059 // Linux driver is a bit different.
2060 network->bssht.bdSupportHT = true;
2061 }
2062 else
2063 network->bssht.bdSupportHT = false;
2064 break;
2065
2066
2067 case MFIE_TYPE_HT_INFO:
2068 IEEE80211_DEBUG_SCAN("MFIE_TYPE_HT_INFO: %d bytes\n",
2069 info_element->len);
2070 tmp_htinfo_len = min(info_element->len,(u8)MAX_IE_LEN);
2071 if(tmp_htinfo_len){
2072 network->bssht.bdHTSpecVer = HT_SPEC_VER_IEEE;
2073 network->bssht.bdHTInfoLen = tmp_htinfo_len > sizeof(network->bssht.bdHTInfoBuf)?\
2074 sizeof(network->bssht.bdHTInfoBuf):tmp_htinfo_len;
2075 memcpy(network->bssht.bdHTInfoBuf,info_element->data,network->bssht.bdHTInfoLen);
2076 }
2077 break;
2078
2079 case MFIE_TYPE_AIRONET:
2080 IEEE80211_DEBUG_SCAN("MFIE_TYPE_AIRONET: %d bytes\n",
2081 info_element->len);
2082 if(info_element->len >IE_CISCO_FLAG_POSITION)
2083 {
2084 network->bWithAironetIE = true;
2085
2086 // CCX 1 spec v1.13, A01.1 CKIP Negotiation (page23):
2087 // "A Cisco access point advertises support for CKIP in beacon and probe response packets,
2088 // by adding an Aironet element and setting one or both of the CKIP negotiation bits."
2089 if( (info_element->data[IE_CISCO_FLAG_POSITION]&SUPPORT_CKIP_MIC) ||
2090 (info_element->data[IE_CISCO_FLAG_POSITION]&SUPPORT_CKIP_PK) )
2091 {
2092 network->bCkipSupported = true;
2093 }
2094 else
2095 {
2096 network->bCkipSupported = false;
2097 }
2098 }
2099 else
2100 {
2101 network->bWithAironetIE = false;
2102 network->bCkipSupported = false;
2103 }
2104 break;
2105 case MFIE_TYPE_QOS_PARAMETER:
2106 printk(KERN_ERR
2107 "QoS Error need to parse QOS_PARAMETER IE\n");
2108 break;
2109
2110#ifdef ENABLE_DOT11D
2111 case MFIE_TYPE_COUNTRY:
2112 IEEE80211_DEBUG_SCAN("MFIE_TYPE_COUNTRY: %d bytes\n",
2113 info_element->len);
2114 ieee80211_extract_country_ie(ieee, info_element, network, network->bssid);//addr2 is same as addr3 when from an AP
2115 break;
2116#endif
2117
2118 default:
2119 IEEE80211_DEBUG_MGMT
2120 ("Unsupported info element: %s (%d)\n",
2121 get_info_element_string(info_element->id),
2122 info_element->id);
2123 break;
2124 }
2125
2126 length -= sizeof(*info_element) + info_element->len;
2127 info_element =
2128 (struct ieee80211_info_element *)&info_element->
2129 data[info_element->len];
2130 }
2131
2132 if(!network->atheros_cap_exist && !network->broadcom_cap_exist &&
2133 !network->cisco_cap_exist && !network->ralink_cap_exist && !network->bssht.bdRT2RTAggregation &&
2134 !network->marvell_cap_exist)
2135 {
2136 network->unknown_cap_exist = true;
2137 }
2138 else
2139 {
2140 network->unknown_cap_exist = false;
2141 }
2142 return 0;
2143}
2144
2145static inline u8 ieee80211_SignalStrengthTranslate(
2146 u8 CurrSS
2147 )
2148{
2149 u8 RetSS;
2150
2151 // Step 1. Scale mapping.
2152 if(CurrSS >= 71 && CurrSS <= 100)
2153 {
2154 RetSS = 90 + ((CurrSS - 70) / 3);
2155 }
2156 else if(CurrSS >= 41 && CurrSS <= 70)
2157 {
2158 RetSS = 78 + ((CurrSS - 40) / 3);
2159 }
2160 else if(CurrSS >= 31 && CurrSS <= 40)
2161 {
2162 RetSS = 66 + (CurrSS - 30);
2163 }
2164 else if(CurrSS >= 21 && CurrSS <= 30)
2165 {
2166 RetSS = 54 + (CurrSS - 20);
2167 }
2168 else if(CurrSS >= 5 && CurrSS <= 20)
2169 {
2170 RetSS = 42 + (((CurrSS - 5) * 2) / 3);
2171 }
2172 else if(CurrSS == 4)
2173 {
2174 RetSS = 36;
2175 }
2176 else if(CurrSS == 3)
2177 {
2178 RetSS = 27;
2179 }
2180 else if(CurrSS == 2)
2181 {
2182 RetSS = 18;
2183 }
2184 else if(CurrSS == 1)
2185 {
2186 RetSS = 9;
2187 }
2188 else
2189 {
2190 RetSS = CurrSS;
2191 }
2192
2193 return RetSS;
2194}
2195
2196long ieee80211_translate_todbm(u8 signal_strength_index )// 0-100 index.
2197{
2198 long signal_power; // in dBm.
2199
2200 // Translate to dBm (x=0.5y-95).
2201 signal_power = (long)((signal_strength_index + 1) >> 1);
2202 signal_power -= 95;
2203
2204 return signal_power;
2205}
2206
2207static inline int ieee80211_network_init(
2208 struct ieee80211_device *ieee,
2209 struct ieee80211_probe_response *beacon,
2210 struct ieee80211_network *network,
2211 struct ieee80211_rx_stats *stats)
2212{
2213 network->qos_data.active = 0;
2214 network->qos_data.supported = 0;
2215 network->qos_data.param_count = 0;
2216 network->qos_data.old_param_count = 0;
2217
2218 /* Pull out fixed field data */
2219 memcpy(network->bssid, beacon->header.addr3, ETH_ALEN);
2220 network->capability = le16_to_cpu(beacon->capability);
2221 network->last_scanned = jiffies;
2222 network->time_stamp[0] = le32_to_cpu(beacon->time_stamp[0]);
2223 network->time_stamp[1] = le32_to_cpu(beacon->time_stamp[1]);
2224 network->beacon_interval = le32_to_cpu(beacon->beacon_interval);
2225 /* Where to pull this? beacon->listen_interval;*/
2226 network->listen_interval = 0x0A;
2227 network->rates_len = network->rates_ex_len = 0;
2228 network->last_associate = 0;
2229 network->ssid_len = 0;
2230 network->flags = 0;
2231 network->atim_window = 0;
2232 network->erp_value = (network->capability & WLAN_CAPABILITY_IBSS) ?
2233 0x3 : 0x0;
2234 network->berp_info_valid = false;
2235 network->broadcom_cap_exist = false;
2236 network->ralink_cap_exist = false;
2237 network->atheros_cap_exist = false;
2238 network->marvell_cap_exist = false;
2239 network->cisco_cap_exist = false;
2240 network->unknown_cap_exist = false;
2241#ifdef THOMAS_TURBO
2242 network->Turbo_Enable = 0;
2243#endif
2244#ifdef ENABLE_DOT11D
2245 network->CountryIeLen = 0;
2246 memset(network->CountryIeBuf, 0, MAX_IE_LEN);
2247#endif
2248//Initialize HT parameters
2249 HTInitializeBssDesc(&network->bssht);
2250 if (stats->freq == IEEE80211_52GHZ_BAND) {
2251 /* for A band (No DS info) */
2252 network->channel = stats->received_channel;
2253 } else
2254 network->flags |= NETWORK_HAS_CCK;
2255
2256 network->wpa_ie_len = 0;
2257 network->rsn_ie_len = 0;
2258
2259 if (ieee80211_parse_info_param
2260 (ieee,beacon->info_element, stats->len - sizeof(*beacon), network, stats))
2261 return 1;
2262
2263 network->mode = 0;
2264 if (stats->freq == IEEE80211_52GHZ_BAND)
2265 network->mode = IEEE_A;
2266 else {
2267 if (network->flags & NETWORK_HAS_OFDM)
2268 network->mode |= IEEE_G;
2269 if (network->flags & NETWORK_HAS_CCK)
2270 network->mode |= IEEE_B;
2271 }
2272
2273 if (network->mode == 0) {
2274 IEEE80211_DEBUG_SCAN("Filtered out '%s (%pM)' "
2275 "network.\n",
2276 escape_essid(network->ssid,
2277 network->ssid_len),
2278 network->bssid);
2279 return 1;
2280 }
2281
2282 if(network->bssht.bdSupportHT){
2283 if(network->mode == IEEE_A)
2284 network->mode = IEEE_N_5G;
2285 else if(network->mode & (IEEE_G | IEEE_B))
2286 network->mode = IEEE_N_24G;
2287 }
2288 if (ieee80211_is_empty_essid(network->ssid, network->ssid_len))
2289 network->flags |= NETWORK_EMPTY_ESSID;
2290
2291 stats->signal = 30 + (stats->SignalStrength * 70) / 100;
2292 stats->noise = ieee80211_translate_todbm((u8)(100-stats->signal)) -25;
2293
2294 memcpy(&network->stats, stats, sizeof(network->stats));
2295
2296 return 0;
2297}
2298
2299static inline int is_same_network(struct ieee80211_network *src,
2300 struct ieee80211_network *dst, struct ieee80211_device* ieee)
2301{
2302 /* A network is only a duplicate if the channel, BSSID, ESSID
2303 * and the capability field (in particular IBSS and BSS) all match.
2304 * We treat all <hidden> with the same BSSID and channel
2305 * as one network */
2306 return (((src->ssid_len == dst->ssid_len) || (ieee->iw_mode == IW_MODE_INFRA)) &&
2307 (src->channel == dst->channel) &&
2308 !memcmp(src->bssid, dst->bssid, ETH_ALEN) &&
2309 (!memcmp(src->ssid, dst->ssid, src->ssid_len) || (ieee->iw_mode == IW_MODE_INFRA)) &&
2310 ((src->capability & WLAN_CAPABILITY_IBSS) ==
2311 (dst->capability & WLAN_CAPABILITY_IBSS)) &&
2312 ((src->capability & WLAN_CAPABILITY_BSS) ==
2313 (dst->capability & WLAN_CAPABILITY_BSS)));
2314}
2315
2316static inline void update_network(struct ieee80211_network *dst,
2317 struct ieee80211_network *src)
2318{
2319 int qos_active;
2320 u8 old_param;
2321
2322 memcpy(&dst->stats, &src->stats, sizeof(struct ieee80211_rx_stats));
2323 dst->capability = src->capability;
2324 memcpy(dst->rates, src->rates, src->rates_len);
2325 dst->rates_len = src->rates_len;
2326 memcpy(dst->rates_ex, src->rates_ex, src->rates_ex_len);
2327 dst->rates_ex_len = src->rates_ex_len;
2328 if(src->ssid_len > 0)
2329 {
2330 memset(dst->ssid, 0, dst->ssid_len);
2331 dst->ssid_len = src->ssid_len;
2332 memcpy(dst->ssid, src->ssid, src->ssid_len);
2333 }
2334 dst->mode = src->mode;
2335 dst->flags = src->flags;
2336 dst->time_stamp[0] = src->time_stamp[0];
2337 dst->time_stamp[1] = src->time_stamp[1];
2338 if (src->flags & NETWORK_HAS_ERP_VALUE)
2339 {
2340 dst->erp_value = src->erp_value;
2341 dst->berp_info_valid = src->berp_info_valid = true;
2342 }
2343 dst->beacon_interval = src->beacon_interval;
2344 dst->listen_interval = src->listen_interval;
2345 dst->atim_window = src->atim_window;
2346 dst->dtim_period = src->dtim_period;
2347 dst->dtim_data = src->dtim_data;
2348 dst->last_dtim_sta_time[0] = src->last_dtim_sta_time[0];
2349 dst->last_dtim_sta_time[1] = src->last_dtim_sta_time[1];
2350 memcpy(&dst->tim, &src->tim, sizeof(struct ieee80211_tim_parameters));
2351
2352 dst->bssht.bdSupportHT = src->bssht.bdSupportHT;
2353 dst->bssht.bdRT2RTAggregation = src->bssht.bdRT2RTAggregation;
2354 dst->bssht.bdHTCapLen= src->bssht.bdHTCapLen;
2355 memcpy(dst->bssht.bdHTCapBuf,src->bssht.bdHTCapBuf,src->bssht.bdHTCapLen);
2356 dst->bssht.bdHTInfoLen= src->bssht.bdHTInfoLen;
2357 memcpy(dst->bssht.bdHTInfoBuf,src->bssht.bdHTInfoBuf,src->bssht.bdHTInfoLen);
2358 dst->bssht.bdHTSpecVer = src->bssht.bdHTSpecVer;
2359 dst->bssht.bdRT2RTLongSlotTime = src->bssht.bdRT2RTLongSlotTime;
2360 dst->broadcom_cap_exist = src->broadcom_cap_exist;
2361 dst->ralink_cap_exist = src->ralink_cap_exist;
2362 dst->atheros_cap_exist = src->atheros_cap_exist;
2363 dst->marvell_cap_exist = src->marvell_cap_exist;
2364 dst->cisco_cap_exist = src->cisco_cap_exist;
2365 dst->unknown_cap_exist = src->unknown_cap_exist;
2366 memcpy(dst->wpa_ie, src->wpa_ie, src->wpa_ie_len);
2367 dst->wpa_ie_len = src->wpa_ie_len;
2368 memcpy(dst->rsn_ie, src->rsn_ie, src->rsn_ie_len);
2369 dst->rsn_ie_len = src->rsn_ie_len;
2370
2371 dst->last_scanned = jiffies;
2372 /* qos related parameters */
2373 qos_active = dst->qos_data.active;
2374 old_param = dst->qos_data.param_count;
2375 if(dst->flags & NETWORK_HAS_QOS_MASK){
2376 //not update QOS paramter in beacon, as most AP will set all these parameter to 0.//WB
2377 }
2378 else {
2379 dst->qos_data.supported = src->qos_data.supported;
2380 dst->qos_data.param_count = src->qos_data.param_count;
2381 }
2382
2383 if(dst->qos_data.supported == 1) {
2384 dst->QoS_Enable = 1;
2385 if(dst->ssid_len)
2386 IEEE80211_DEBUG_QOS
2387 ("QoS the network %s is QoS supported\n",
2388 dst->ssid);
2389 else
2390 IEEE80211_DEBUG_QOS
2391 ("QoS the network is QoS supported\n");
2392 }
2393 dst->qos_data.active = qos_active;
2394 dst->qos_data.old_param_count = old_param;
2395
2396 /* dst->last_associate is not overwritten */
2397 dst->wmm_info = src->wmm_info; //sure to exist in beacon or probe response frame.
2398 if(src->wmm_param[0].ac_aci_acm_aifsn|| \
2399 src->wmm_param[1].ac_aci_acm_aifsn|| \
2400 src->wmm_param[2].ac_aci_acm_aifsn|| \
2401 src->wmm_param[3].ac_aci_acm_aifsn) {
2402 memcpy(dst->wmm_param, src->wmm_param, WME_AC_PRAM_LEN);
2403 }
2404#ifdef THOMAS_TURBO
2405 dst->Turbo_Enable = src->Turbo_Enable;
2406#endif
2407
2408#ifdef ENABLE_DOT11D
2409 dst->CountryIeLen = src->CountryIeLen;
2410 memcpy(dst->CountryIeBuf, src->CountryIeBuf, src->CountryIeLen);
2411#endif
2412
2413 //added by amy for LEAP
2414 dst->bWithAironetIE = src->bWithAironetIE;
2415 dst->bCkipSupported = src->bCkipSupported;
2416 memcpy(dst->CcxRmState,src->CcxRmState,2);
2417 dst->bCcxRmEnable = src->bCcxRmEnable;
2418 dst->MBssidMask = src->MBssidMask;
2419 dst->bMBssidValid = src->bMBssidValid;
2420 memcpy(dst->MBssid,src->MBssid,6);
2421 dst->bWithCcxVerNum = src->bWithCcxVerNum;
2422 dst->BssCcxVerNumber = src->BssCcxVerNumber;
2423
2424}
2425
2426static inline int is_beacon(__le16 fc)
2427{
2428 return (WLAN_FC_GET_STYPE(le16_to_cpu(fc)) == IEEE80211_STYPE_BEACON);
2429}
2430
2431static inline void ieee80211_process_probe_response(
2432 struct ieee80211_device *ieee,
2433 struct ieee80211_probe_response *beacon,
2434 struct ieee80211_rx_stats *stats)
2435{
2436 struct ieee80211_network network;
2437 struct ieee80211_network *target;
2438 struct ieee80211_network *oldest = NULL;
2439#ifdef CONFIG_IEEE80211_DEBUG
2440 struct ieee80211_info_element *info_element = &beacon->info_element[0];
2441#endif
2442 unsigned long flags;
2443 short renew;
2444
2445 memset(&network, 0, sizeof(struct ieee80211_network));
2446 IEEE80211_DEBUG_SCAN(
2447 "'%s' (%pM): %c%c%c%c %c%c%c%c-%c%c%c%c %c%c%c%c\n",
2448 escape_essid(info_element->data, info_element->len),
2449 beacon->header.addr3,
2450 (beacon->capability & (1<<0xf)) ? '1' : '0',
2451 (beacon->capability & (1<<0xe)) ? '1' : '0',
2452 (beacon->capability & (1<<0xd)) ? '1' : '0',
2453 (beacon->capability & (1<<0xc)) ? '1' : '0',
2454 (beacon->capability & (1<<0xb)) ? '1' : '0',
2455 (beacon->capability & (1<<0xa)) ? '1' : '0',
2456 (beacon->capability & (1<<0x9)) ? '1' : '0',
2457 (beacon->capability & (1<<0x8)) ? '1' : '0',
2458 (beacon->capability & (1<<0x7)) ? '1' : '0',
2459 (beacon->capability & (1<<0x6)) ? '1' : '0',
2460 (beacon->capability & (1<<0x5)) ? '1' : '0',
2461 (beacon->capability & (1<<0x4)) ? '1' : '0',
2462 (beacon->capability & (1<<0x3)) ? '1' : '0',
2463 (beacon->capability & (1<<0x2)) ? '1' : '0',
2464 (beacon->capability & (1<<0x1)) ? '1' : '0',
2465 (beacon->capability & (1<<0x0)) ? '1' : '0');
2466
2467 if (ieee80211_network_init(ieee, beacon, &network, stats)) {
2468 IEEE80211_DEBUG_SCAN("Dropped '%s' (%pM) via %s.\n",
2469 escape_essid(info_element->data,
2470 info_element->len),
2471 beacon->header.addr3,
2472 WLAN_FC_GET_STYPE(beacon->header.frame_ctl) ==
2473 IEEE80211_STYPE_PROBE_RESP ?
2474 "PROBE RESPONSE" : "BEACON");
2475 return;
2476 }
2477
2478#ifdef ENABLE_DOT11D
2479 // For Asus EeePc request,
2480 // (1) if wireless adapter receive get any 802.11d country code in AP beacon,
2481 // wireless adapter should follow the country code.
2482 // (2) If there is no any country code in beacon,
2483 // then wireless adapter should do active scan from ch1~11 and
2484 // passive scan from ch12~14
2485
2486 if( !IsLegalChannel(ieee, network.channel) )
2487 return;
2488 if(ieee->bGlobalDomain)
2489 {
2490 if (WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == IEEE80211_STYPE_PROBE_RESP)
2491 {
2492 // Case 1: Country code
2493 if(IS_COUNTRY_IE_VALID(ieee) )
2494 {
2495 if( !IsLegalChannel(ieee, network.channel) )
2496 {
2497 printk("GetScanInfo(): For Country code, filter probe response at channel(%d).\n", network.channel);
2498 return;
2499 }
2500 }
2501 // Case 2: No any country code.
2502 else
2503 {
2504 // Filter over channel ch12~14
2505 if(network.channel > 11)
2506 {
2507 printk("GetScanInfo(): For Global Domain, filter probe response at channel(%d).\n", network.channel);
2508 return;
2509 }
2510 }
2511 }
2512 else
2513 {
2514 // Case 1: Country code
2515 if(IS_COUNTRY_IE_VALID(ieee) )
2516 {
2517 if( !IsLegalChannel(ieee, network.channel) )
2518 {
2519 printk("GetScanInfo(): For Country code, filter beacon at channel(%d).\n",network.channel);
2520 return;
2521 }
2522 }
2523 // Case 2: No any country code.
2524 else
2525 {
2526 // Filter over channel ch12~14
2527 if(network.channel > 14)
2528 {
2529 printk("GetScanInfo(): For Global Domain, filter beacon at channel(%d).\n",network.channel);
2530 return;
2531 }
2532 }
2533 }
2534 }
2535#endif
2536
2537 /* The network parsed correctly -- so now we scan our known networks
2538 * to see if we can find it in our list.
2539 *
2540 * NOTE: This search is definitely not optimized. Once its doing
2541 * the "right thing" we'll optimize it for efficiency if
2542 * necessary */
2543
2544 /* Search for this entry in the list and update it if it is
2545 * already there. */
2546
2547 spin_lock_irqsave(&ieee->lock, flags);
2548
2549 if(is_same_network(&ieee->current_network, &network, ieee)) {
2550 update_network(&ieee->current_network, &network);
2551 if((ieee->current_network.mode == IEEE_N_24G || ieee->current_network.mode == IEEE_G)
2552 && ieee->current_network.berp_info_valid){
2553 if(ieee->current_network.erp_value& ERP_UseProtection)
2554 ieee->current_network.buseprotection = true;
2555 else
2556 ieee->current_network.buseprotection = false;
2557 }
2558 if(is_beacon(beacon->header.frame_ctl))
2559 {
2560 if(ieee->state == IEEE80211_LINKED)
2561 ieee->LinkDetectInfo.NumRecvBcnInPeriod++;
2562 }
2563 else //hidden AP
2564 network.flags = (~NETWORK_EMPTY_ESSID & network.flags)|(NETWORK_EMPTY_ESSID & ieee->current_network.flags);
2565 }
2566
2567 list_for_each_entry(target, &ieee->network_list, list) {
2568 if (is_same_network(target, &network, ieee))
2569 break;
2570 if ((oldest == NULL) ||
2571 (target->last_scanned < oldest->last_scanned))
2572 oldest = target;
2573 }
2574
2575 /* If we didn't find a match, then get a new network slot to initialize
2576 * with this beacon's information */
2577 if (&target->list == &ieee->network_list) {
2578 if (list_empty(&ieee->network_free_list)) {
2579 /* If there are no more slots, expire the oldest */
2580 list_del(&oldest->list);
2581 target = oldest;
2582 IEEE80211_DEBUG_SCAN("Expired '%s' (%pM) from "
2583 "network list.\n",
2584 escape_essid(target->ssid,
2585 target->ssid_len),
2586 target->bssid);
2587 } else {
2588 /* Otherwise just pull from the free list */
2589 target = list_entry(ieee->network_free_list.next,
2590 struct ieee80211_network, list);
2591 list_del(ieee->network_free_list.next);
2592 }
2593
2594
2595#ifdef CONFIG_IEEE80211_DEBUG
2596 IEEE80211_DEBUG_SCAN("Adding '%s' (%pM) via %s.\n",
2597 escape_essid(network.ssid,
2598 network.ssid_len),
2599 network.bssid,
2600 WLAN_FC_GET_STYPE(beacon->header.frame_ctl) ==
2601 IEEE80211_STYPE_PROBE_RESP ?
2602 "PROBE RESPONSE" : "BEACON");
2603#endif
2604 memcpy(target, &network, sizeof(*target));
2605 list_add_tail(&target->list, &ieee->network_list);
2606 } else {
2607 IEEE80211_DEBUG_SCAN("Updating '%s' (%pM) via %s.\n",
2608 escape_essid(target->ssid,
2609 target->ssid_len),
2610 target->bssid,
2611 WLAN_FC_GET_STYPE(beacon->header.frame_ctl) ==
2612 IEEE80211_STYPE_PROBE_RESP ?
2613 "PROBE RESPONSE" : "BEACON");
2614
2615 /* we have an entry and we are going to update it. But this entry may
2616 * be already expired. In this case we do the same as we found a new
2617 * net and call the new_net handler
2618 */
2619 renew = !time_after(target->last_scanned + ieee->scan_age, jiffies);
2620 //YJ,add,080819,for hidden ap
2621 if(is_beacon(beacon->header.frame_ctl) == 0)
2622 network.flags = (~NETWORK_EMPTY_ESSID & network.flags)|(NETWORK_EMPTY_ESSID & target->flags);
2623 if(((network.flags & NETWORK_EMPTY_ESSID) == NETWORK_EMPTY_ESSID) \
2624 && (((network.ssid_len > 0) && (strncmp(target->ssid, network.ssid, network.ssid_len)))\
2625 ||((ieee->current_network.ssid_len == network.ssid_len)&&(strncmp(ieee->current_network.ssid, network.ssid, network.ssid_len) == 0)&&(ieee->state == IEEE80211_NOLINK))))
2626 renew = 1;
2627 //YJ,add,080819,for hidden ap,end
2628
2629 update_network(target, &network);
2630 }
2631
2632 spin_unlock_irqrestore(&ieee->lock, flags);
2633 if (is_beacon(beacon->header.frame_ctl)&&is_same_network(&ieee->current_network, &network, ieee)&&\
2634 (ieee->state == IEEE80211_LINKED)) {
2635 if(ieee->handle_beacon != NULL) {
2636 ieee->handle_beacon(ieee, beacon, &ieee->current_network);
2637 }
2638 }
2639}
2640
2641void ieee80211_rx_mgt(struct ieee80211_device *ieee,
2642 struct ieee80211_hdr_4addr *header,
2643 struct ieee80211_rx_stats *stats)
2644{
2645 if(WLAN_FC_GET_STYPE(header->frame_ctl) != IEEE80211_STYPE_PROBE_RESP &&
2646 WLAN_FC_GET_STYPE(header->frame_ctl) != IEEE80211_STYPE_BEACON)
2647 ieee->last_rx_ps_time = jiffies;
2648
2649 switch (WLAN_FC_GET_STYPE(header->frame_ctl)) {
2650
2651 case IEEE80211_STYPE_BEACON:
2652 IEEE80211_DEBUG_MGMT("received BEACON (%d)\n",
2653 WLAN_FC_GET_STYPE(header->frame_ctl));
2654 IEEE80211_DEBUG_SCAN("Beacon\n");
2655 ieee80211_process_probe_response(
2656 ieee, (struct ieee80211_probe_response *)header, stats);
2657
2658 if(ieee->sta_sleep || (ieee->ps != IEEE80211_PS_DISABLED &&
2659 ieee->iw_mode == IW_MODE_INFRA &&
2660 ieee->state == IEEE80211_LINKED))
2661 {
2662 tasklet_schedule(&ieee->ps_task);
2663 }
2664
2665 break;
2666
2667 case IEEE80211_STYPE_PROBE_RESP:
2668 IEEE80211_DEBUG_MGMT("received PROBE RESPONSE (%d)\n",
2669 WLAN_FC_GET_STYPE(header->frame_ctl));
2670 IEEE80211_DEBUG_SCAN("Probe response\n");
2671 ieee80211_process_probe_response(
2672 ieee, (struct ieee80211_probe_response *)header, stats);
2673 break;
2674
2675 }
2676}
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c
deleted file mode 100644
index 60e9a09d933..00000000000
--- a/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c
+++ /dev/null
@@ -1,3278 +0,0 @@
1/* IEEE 802.11 SoftMAC layer
2 * Copyright (c) 2005 Andrea Merello <andreamrl@tiscali.it>
3 *
4 * Mostly extracted from the rtl8180-sa2400 driver for the
5 * in-kernel generic ieee802.11 stack.
6 *
7 * Few lines might be stolen from other part of the ieee80211
8 * stack. Copyright who own it's copyright
9 *
10 * WPA code stolen from the ipw2200 driver.
11 * Copyright who own it's copyright.
12 *
13 * released under the GPL
14 */
15
16
17#include "ieee80211.h"
18
19#include <linux/random.h>
20#include <linux/delay.h>
21#include <linux/slab.h>
22#include <asm/uaccess.h>
23#ifdef ENABLE_DOT11D
24#include "dot11d.h"
25#endif
26
27u8 rsn_authen_cipher_suite[16][4] = {
28 {0x00,0x0F,0xAC,0x00}, //Use group key, //Reserved
29 {0x00,0x0F,0xAC,0x01}, //WEP-40 //RSNA default
30 {0x00,0x0F,0xAC,0x02}, //TKIP //NONE //{used just as default}
31 {0x00,0x0F,0xAC,0x03}, //WRAP-historical
32 {0x00,0x0F,0xAC,0x04}, //CCMP
33 {0x00,0x0F,0xAC,0x05}, //WEP-104
34};
35
36short ieee80211_is_54g(struct ieee80211_network net)
37{
38 return ((net.rates_ex_len > 0) || (net.rates_len > 4));
39}
40
41short ieee80211_is_shortslot(struct ieee80211_network net)
42{
43 return (net.capability & WLAN_CAPABILITY_SHORT_SLOT);
44}
45
46/* returns the total length needed for pleacing the RATE MFIE
47 * tag and the EXTENDED RATE MFIE tag if needed.
48 * It encludes two bytes per tag for the tag itself and its len
49 */
50unsigned int ieee80211_MFIE_rate_len(struct ieee80211_device *ieee)
51{
52 unsigned int rate_len = 0;
53
54 if (ieee->modulation & IEEE80211_CCK_MODULATION)
55 rate_len = IEEE80211_CCK_RATE_LEN + 2;
56
57 if (ieee->modulation & IEEE80211_OFDM_MODULATION)
58
59 rate_len += IEEE80211_OFDM_RATE_LEN + 2;
60
61 return rate_len;
62}
63
64/* pleace the MFIE rate, tag to the memory (double) poined.
65 * Then it updates the pointer so that
66 * it points after the new MFIE tag added.
67 */
68void ieee80211_MFIE_Brate(struct ieee80211_device *ieee, u8 **tag_p)
69{
70 u8 *tag = *tag_p;
71
72 if (ieee->modulation & IEEE80211_CCK_MODULATION){
73 *tag++ = MFIE_TYPE_RATES;
74 *tag++ = 4;
75 *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_1MB;
76 *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_2MB;
77 *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_5MB;
78 *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_11MB;
79 }
80
81 /* We may add an option for custom rates that specific HW might support */
82 *tag_p = tag;
83}
84
85void ieee80211_MFIE_Grate(struct ieee80211_device *ieee, u8 **tag_p)
86{
87 u8 *tag = *tag_p;
88
89 if (ieee->modulation & IEEE80211_OFDM_MODULATION){
90
91 *tag++ = MFIE_TYPE_RATES_EX;
92 *tag++ = 8;
93 *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_6MB;
94 *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_9MB;
95 *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_12MB;
96 *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_18MB;
97 *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_24MB;
98 *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_36MB;
99 *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_48MB;
100 *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_54MB;
101
102 }
103
104 /* We may add an option for custom rates that specific HW might support */
105 *tag_p = tag;
106}
107
108
109void ieee80211_WMM_Info(struct ieee80211_device *ieee, u8 **tag_p) {
110 u8 *tag = *tag_p;
111
112 *tag++ = MFIE_TYPE_GENERIC; //0
113 *tag++ = 7;
114 *tag++ = 0x00;
115 *tag++ = 0x50;
116 *tag++ = 0xf2;
117 *tag++ = 0x02;//5
118 *tag++ = 0x00;
119 *tag++ = 0x01;
120#ifdef SUPPORT_USPD
121 if(ieee->current_network.wmm_info & 0x80) {
122 *tag++ = 0x0f|MAX_SP_Len;
123 } else {
124 *tag++ = MAX_SP_Len;
125 }
126#else
127 *tag++ = MAX_SP_Len;
128#endif
129 *tag_p = tag;
130}
131
132#ifdef THOMAS_TURBO
133void ieee80211_TURBO_Info(struct ieee80211_device *ieee, u8 **tag_p) {
134 u8 *tag = *tag_p;
135
136 *tag++ = MFIE_TYPE_GENERIC; //0
137 *tag++ = 7;
138 *tag++ = 0x00;
139 *tag++ = 0xe0;
140 *tag++ = 0x4c;
141 *tag++ = 0x01;//5
142 *tag++ = 0x02;
143 *tag++ = 0x11;
144 *tag++ = 0x00;
145
146 *tag_p = tag;
147 printk(KERN_ALERT "This is enable turbo mode IE process\n");
148}
149#endif
150
151void enqueue_mgmt(struct ieee80211_device *ieee, struct sk_buff *skb)
152{
153 int nh;
154 nh = (ieee->mgmt_queue_head +1) % MGMT_QUEUE_NUM;
155
156/*
157 * if the queue is full but we have newer frames then
158 * just overwrites the oldest.
159 *
160 * if (nh == ieee->mgmt_queue_tail)
161 * return -1;
162 */
163 ieee->mgmt_queue_head = nh;
164 ieee->mgmt_queue_ring[nh] = skb;
165}
166
167struct sk_buff *dequeue_mgmt(struct ieee80211_device *ieee)
168{
169 struct sk_buff *ret;
170
171 if(ieee->mgmt_queue_tail == ieee->mgmt_queue_head)
172 return NULL;
173
174 ret = ieee->mgmt_queue_ring[ieee->mgmt_queue_tail];
175
176 ieee->mgmt_queue_tail =
177 (ieee->mgmt_queue_tail+1) % MGMT_QUEUE_NUM;
178
179 return ret;
180}
181
182void init_mgmt_queue(struct ieee80211_device *ieee)
183{
184 ieee->mgmt_queue_tail = ieee->mgmt_queue_head = 0;
185}
186
187u8 MgntQuery_MgntFrameTxRate(struct ieee80211_device *ieee)
188{
189 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
190 u8 rate;
191
192 // 2008/01/25 MH For broadcom, MGNT frame set as OFDM 6M.
193 if(pHTInfo->IOTAction & HT_IOT_ACT_MGNT_USE_CCK_6M)
194 rate = 0x0c;
195 else
196 rate = ieee->basic_rate & 0x7f;
197
198 if(rate == 0){
199 // 2005.01.26, by rcnjko.
200 if(ieee->mode == IEEE_A||
201 ieee->mode== IEEE_N_5G||
202 (ieee->mode== IEEE_N_24G&&!pHTInfo->bCurSuppCCK))
203 rate = 0x0c;
204 else
205 rate = 0x02;
206 }
207
208 return rate;
209}
210
211
212void ieee80211_sta_wakeup(struct ieee80211_device *ieee, short nl);
213
214inline void softmac_mgmt_xmit(struct sk_buff *skb, struct ieee80211_device *ieee)
215{
216 unsigned long flags;
217 short single = ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE;
218 struct ieee80211_hdr_3addr *header=
219 (struct ieee80211_hdr_3addr *) skb->data;
220
221 cb_desc *tcb_desc = (cb_desc *)(skb->cb + 8);
222 spin_lock_irqsave(&ieee->lock, flags);
223
224 /* called with 2nd param 0, no mgmt lock required */
225 ieee80211_sta_wakeup(ieee,0);
226
227 tcb_desc->queue_index = MGNT_QUEUE;
228 tcb_desc->data_rate = MgntQuery_MgntFrameTxRate(ieee);
229 tcb_desc->RATRIndex = 7;
230 tcb_desc->bTxDisableRateFallBack = 1;
231 tcb_desc->bTxUseDriverAssingedRate = 1;
232
233 if(single){
234 if(ieee->queue_stop){
235 enqueue_mgmt(ieee,skb);
236 }else{
237 header->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0]<<4);
238
239 if (ieee->seq_ctrl[0] == 0xFFF)
240 ieee->seq_ctrl[0] = 0;
241 else
242 ieee->seq_ctrl[0]++;
243
244 /* avoid watchdog triggers */
245 ieee->softmac_data_hard_start_xmit(skb, ieee, ieee->basic_rate);
246 }
247
248 spin_unlock_irqrestore(&ieee->lock, flags);
249 }else{
250 spin_unlock_irqrestore(&ieee->lock, flags);
251 spin_lock(&ieee->mgmt_tx_lock);
252
253 header->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
254
255 if (ieee->seq_ctrl[0] == 0xFFF)
256 ieee->seq_ctrl[0] = 0;
257 else
258 ieee->seq_ctrl[0]++;
259
260 /* check wether the managed packet queued greater than 5 */
261 if(!ieee->check_nic_enough_desc(ieee, tcb_desc->queue_index)||
262 (skb_queue_len(&ieee->skb_waitQ[tcb_desc->queue_index]) != 0)||
263 (ieee->queue_stop) ) {
264 /* insert the skb packet to the management queue */
265 /* as for the completion function, it does not need
266 * to check it any more.
267 * */
268 skb_queue_tail(&ieee->skb_waitQ[tcb_desc->queue_index], skb);
269 } else {
270 ieee->softmac_hard_start_xmit(skb, ieee);
271 }
272 spin_unlock(&ieee->mgmt_tx_lock);
273 }
274}
275
276inline void softmac_ps_mgmt_xmit(struct sk_buff *skb, struct ieee80211_device *ieee)
277{
278
279 short single = ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE;
280 struct ieee80211_hdr_3addr *header =
281 (struct ieee80211_hdr_3addr *) skb->data;
282 cb_desc *tcb_desc = (cb_desc *)(skb->cb + 8);
283
284 tcb_desc->queue_index = MGNT_QUEUE;
285 tcb_desc->data_rate = MgntQuery_MgntFrameTxRate(ieee);
286 tcb_desc->RATRIndex = 7;
287 tcb_desc->bTxDisableRateFallBack = 1;
288 tcb_desc->bTxUseDriverAssingedRate = 1;
289 if(single){
290
291 header->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
292
293 if (ieee->seq_ctrl[0] == 0xFFF)
294 ieee->seq_ctrl[0] = 0;
295 else
296 ieee->seq_ctrl[0]++;
297
298 /* avoid watchdog triggers */
299 ieee->softmac_data_hard_start_xmit(skb, ieee, ieee->basic_rate);
300
301 }else{
302
303 header->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
304
305 if (ieee->seq_ctrl[0] == 0xFFF)
306 ieee->seq_ctrl[0] = 0;
307 else
308 ieee->seq_ctrl[0]++;
309
310 ieee->softmac_hard_start_xmit(skb, ieee);
311
312 }
313}
314
315inline struct sk_buff *ieee80211_probe_req(struct ieee80211_device *ieee)
316{
317 unsigned int len,rate_len;
318 u8 *tag;
319 struct sk_buff *skb;
320 struct ieee80211_probe_request *req;
321
322 len = ieee->current_network.ssid_len;
323
324 rate_len = ieee80211_MFIE_rate_len(ieee);
325
326 skb = dev_alloc_skb(sizeof(struct ieee80211_probe_request) +
327 2 + len + rate_len + ieee->tx_headroom);
328 if (!skb)
329 return NULL;
330
331 skb_reserve(skb, ieee->tx_headroom);
332
333 req = (struct ieee80211_probe_request *) skb_put(skb,sizeof(struct ieee80211_probe_request));
334 req->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
335 req->header.duration_id = 0; //FIXME: is this OK ?
336
337 memset(req->header.addr1, 0xff, ETH_ALEN);
338 memcpy(req->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
339 memset(req->header.addr3, 0xff, ETH_ALEN);
340
341 tag = (u8 *) skb_put(skb,len+2+rate_len);
342
343 *tag++ = MFIE_TYPE_SSID;
344 *tag++ = len;
345 memcpy(tag, ieee->current_network.ssid, len);
346 tag += len;
347
348 ieee80211_MFIE_Brate(ieee,&tag);
349 ieee80211_MFIE_Grate(ieee,&tag);
350 return skb;
351}
352
353struct sk_buff *ieee80211_get_beacon_(struct ieee80211_device *ieee);
354void ieee80211_send_beacon(struct ieee80211_device *ieee)
355{
356 struct sk_buff *skb;
357 if(!ieee->ieee_up)
358 return;
359
360 skb = ieee80211_get_beacon_(ieee);
361
362 if (skb){
363 softmac_mgmt_xmit(skb, ieee);
364 ieee->softmac_stats.tx_beacons++;
365 }
366
367 if(ieee->beacon_txing && ieee->ieee_up){
368 mod_timer(&ieee->beacon_timer,jiffies+(MSECS(ieee->current_network.beacon_interval-5)));
369 }
370}
371
372
373void ieee80211_send_beacon_cb(unsigned long _ieee)
374{
375 struct ieee80211_device *ieee =
376 (struct ieee80211_device *) _ieee;
377 unsigned long flags;
378
379 spin_lock_irqsave(&ieee->beacon_lock, flags);
380 ieee80211_send_beacon(ieee);
381 spin_unlock_irqrestore(&ieee->beacon_lock, flags);
382}
383
384
385void ieee80211_send_probe(struct ieee80211_device *ieee)
386{
387 struct sk_buff *skb;
388
389 skb = ieee80211_probe_req(ieee);
390 if (skb){
391 softmac_mgmt_xmit(skb, ieee);
392 ieee->softmac_stats.tx_probe_rq++;
393 }
394}
395
396void ieee80211_send_probe_requests(struct ieee80211_device *ieee)
397{
398 if (ieee->active_scan && (ieee->softmac_features & IEEE_SOFTMAC_PROBERQ)){
399 ieee80211_send_probe(ieee);
400 ieee80211_send_probe(ieee);
401 }
402}
403
404/* this performs syncro scan blocking the caller until all channels
405 * in the allowed channel map has been checked.
406 */
407void ieee80211_softmac_scan_syncro(struct ieee80211_device *ieee)
408{
409 short ch = 0;
410#ifdef ENABLE_DOT11D
411 u8 channel_map[MAX_CHANNEL_NUMBER+1];
412 memcpy(channel_map, GET_DOT11D_INFO(ieee)->channel_map, MAX_CHANNEL_NUMBER+1);
413#endif
414 down(&ieee->scan_sem);
415
416 while(1)
417 {
418
419 do{
420 ch++;
421 if (ch > MAX_CHANNEL_NUMBER)
422 goto out; /* scan completed */
423#ifdef ENABLE_DOT11D
424 }while(!channel_map[ch]);
425#else
426 }while(!ieee->channel_map[ch]);
427#endif
428
429 /* this function can be called in two situations
430 * 1- We have switched to ad-hoc mode and we are
431 * performing a complete syncro scan before conclude
432 * there are no interesting cell and to create a
433 * new one. In this case the link state is
434 * IEEE80211_NOLINK until we found an interesting cell.
435 * If so the ieee8021_new_net, called by the RX path
436 * will set the state to IEEE80211_LINKED, so we stop
437 * scanning
438 * 2- We are linked and the root uses run iwlist scan.
439 * So we switch to IEEE80211_LINKED_SCANNING to remember
440 * that we are still logically linked (not interested in
441 * new network events, despite for updating the net list,
442 * but we are temporarly 'unlinked' as the driver shall
443 * not filter RX frames and the channel is changing.
444 * So the only situation in witch are interested is to check
445 * if the state become LINKED because of the #1 situation
446 */
447
448 if (ieee->state == IEEE80211_LINKED)
449 goto out;
450 ieee->set_chan(ieee, ch);
451#ifdef ENABLE_DOT11D
452 if(channel_map[ch] == 1)
453#endif
454 ieee80211_send_probe_requests(ieee);
455
456 /* this prevent excessive time wait when we
457 * need to wait for a syncro scan to end..
458 */
459 if(ieee->state < IEEE80211_LINKED)
460 ;
461 else
462 if (ieee->sync_scan_hurryup)
463 goto out;
464
465
466 msleep_interruptible_rsl(IEEE80211_SOFTMAC_SCAN_TIME);
467
468 }
469out:
470 if(ieee->state < IEEE80211_LINKED){
471 ieee->actscanning = false;
472 up(&ieee->scan_sem);
473 }
474 else{
475 ieee->sync_scan_hurryup = 0;
476#ifdef ENABLE_DOT11D
477 if(IS_DOT11D_ENABLE(ieee))
478 DOT11D_ScanComplete(ieee);
479#endif
480 up(&ieee->scan_sem);
481}
482}
483
484
485void ieee80211_softmac_scan_wq(struct work_struct *work)
486{
487 struct delayed_work *dwork = container_of(work, struct delayed_work, work);
488 struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, softmac_scan_wq);
489 static short watchdog = 0;
490 u8 last_channel = ieee->current_network.channel;
491#ifdef ENABLE_DOT11D
492 u8 channel_map[MAX_CHANNEL_NUMBER+1];
493 memcpy(channel_map, GET_DOT11D_INFO(ieee)->channel_map, MAX_CHANNEL_NUMBER+1);
494#endif
495 if(!ieee->ieee_up)
496 return;
497 down(&ieee->scan_sem);
498 do{
499 ieee->current_network.channel =
500 (ieee->current_network.channel + 1) % MAX_CHANNEL_NUMBER;
501 if (watchdog++ > MAX_CHANNEL_NUMBER) {
502 /* if current channel is not in channel map, set to default channel. */
503#ifdef ENABLE_DOT11D
504 if (!channel_map[ieee->current_network.channel]) {
505#else
506 if (!ieee->channel_map[ieee->current_network.channel]) {
507#endif
508 ieee->current_network.channel = 6;
509 goto out; /* no good chans */
510 }
511 }
512#ifdef ENABLE_DOT11D
513 }while(!channel_map[ieee->current_network.channel]);
514#else
515 }while(!ieee->channel_map[ieee->current_network.channel]);
516#endif
517 if (ieee->scanning == 0 )
518 goto out;
519 ieee->set_chan(ieee, ieee->current_network.channel);
520#ifdef ENABLE_DOT11D
521 if(channel_map[ieee->current_network.channel] == 1)
522#endif
523 ieee80211_send_probe_requests(ieee);
524
525
526 queue_delayed_work(ieee->wq, &ieee->softmac_scan_wq, IEEE80211_SOFTMAC_SCAN_TIME);
527
528 up(&ieee->scan_sem);
529 return;
530out:
531#ifdef ENABLE_DOT11D
532 if(IS_DOT11D_ENABLE(ieee))
533 DOT11D_ScanComplete(ieee);
534#endif
535 ieee->current_network.channel = last_channel;
536 ieee->actscanning = false;
537 watchdog = 0;
538 ieee->scanning = 0;
539 up(&ieee->scan_sem);
540}
541
542void ieee80211_beacons_start(struct ieee80211_device *ieee)
543{
544 unsigned long flags;
545 spin_lock_irqsave(&ieee->beacon_lock,flags);
546
547 ieee->beacon_txing = 1;
548 ieee80211_send_beacon(ieee);
549
550 spin_unlock_irqrestore(&ieee->beacon_lock,flags);
551}
552
553void ieee80211_beacons_stop(struct ieee80211_device *ieee)
554{
555 unsigned long flags;
556
557 spin_lock_irqsave(&ieee->beacon_lock,flags);
558
559 ieee->beacon_txing = 0;
560 del_timer_sync(&ieee->beacon_timer);
561
562 spin_unlock_irqrestore(&ieee->beacon_lock,flags);
563
564}
565
566
567void ieee80211_stop_send_beacons(struct ieee80211_device *ieee)
568{
569 if(ieee->stop_send_beacons)
570 ieee->stop_send_beacons(ieee);
571 if (ieee->softmac_features & IEEE_SOFTMAC_BEACONS)
572 ieee80211_beacons_stop(ieee);
573}
574
575
576void ieee80211_start_send_beacons(struct ieee80211_device *ieee)
577{
578 if(ieee->start_send_beacons)
579 ieee->start_send_beacons(ieee);
580 if(ieee->softmac_features & IEEE_SOFTMAC_BEACONS)
581 ieee80211_beacons_start(ieee);
582}
583
584
585void ieee80211_softmac_stop_scan(struct ieee80211_device *ieee)
586{
587 down(&ieee->scan_sem);
588
589 if (ieee->scanning == 1){
590 ieee->scanning = 0;
591
592 cancel_delayed_work(&ieee->softmac_scan_wq);
593 }
594
595 up(&ieee->scan_sem);
596}
597
598void ieee80211_stop_scan(struct ieee80211_device *ieee)
599{
600 if (ieee->softmac_features & IEEE_SOFTMAC_SCAN)
601 ieee80211_softmac_stop_scan(ieee);
602 else
603 ieee->stop_scan(ieee);
604}
605
606/* called with ieee->lock held */
607void ieee80211_rtl_start_scan(struct ieee80211_device *ieee)
608{
609#ifdef ENABLE_IPS
610 if(ieee->ieee80211_ips_leave_wq != NULL)
611 ieee->ieee80211_ips_leave_wq(ieee);
612#endif
613
614#ifdef ENABLE_DOT11D
615 if(IS_DOT11D_ENABLE(ieee) )
616 {
617 if(IS_COUNTRY_IE_VALID(ieee))
618 {
619 RESET_CIE_WATCHDOG(ieee);
620 }
621 }
622#endif
623 if (ieee->softmac_features & IEEE_SOFTMAC_SCAN){
624 if (ieee->scanning == 0){
625 ieee->scanning = 1;
626 queue_delayed_work(ieee->wq, &ieee->softmac_scan_wq, 0);
627 }
628 }else
629 ieee->start_scan(ieee);
630
631}
632
633/* called with wx_sem held */
634void ieee80211_start_scan_syncro(struct ieee80211_device *ieee)
635{
636#ifdef ENABLE_DOT11D
637 if(IS_DOT11D_ENABLE(ieee) )
638 {
639 if(IS_COUNTRY_IE_VALID(ieee))
640 {
641 RESET_CIE_WATCHDOG(ieee);
642 }
643 }
644#endif
645 ieee->sync_scan_hurryup = 0;
646 if (ieee->softmac_features & IEEE_SOFTMAC_SCAN)
647 ieee80211_softmac_scan_syncro(ieee);
648 else
649 ieee->scan_syncro(ieee);
650
651}
652
653inline struct sk_buff *ieee80211_authentication_req(struct ieee80211_network *beacon,
654 struct ieee80211_device *ieee, int challengelen)
655{
656 struct sk_buff *skb;
657 struct ieee80211_authentication *auth;
658 int len = sizeof(struct ieee80211_authentication) + challengelen + ieee->tx_headroom;
659
660
661 skb = dev_alloc_skb(len);
662 if (!skb) return NULL;
663
664 skb_reserve(skb, ieee->tx_headroom);
665 auth = (struct ieee80211_authentication *)
666 skb_put(skb, sizeof(struct ieee80211_authentication));
667
668 auth->header.frame_ctl = IEEE80211_STYPE_AUTH;
669 if (challengelen) auth->header.frame_ctl |= IEEE80211_FCTL_WEP;
670
671 auth->header.duration_id = 0x013a; //FIXME
672
673 memcpy(auth->header.addr1, beacon->bssid, ETH_ALEN);
674 memcpy(auth->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
675 memcpy(auth->header.addr3, beacon->bssid, ETH_ALEN);
676
677 if(ieee->auth_mode == 0)
678 auth->algorithm = WLAN_AUTH_OPEN;
679 else if(ieee->auth_mode == 1)
680 auth->algorithm = WLAN_AUTH_SHARED_KEY;
681 else if(ieee->auth_mode == 2)
682 auth->algorithm = WLAN_AUTH_OPEN;//0x80;
683 printk("=================>%s():auth->algorithm is %d\n",__FUNCTION__,auth->algorithm);
684 auth->transaction = cpu_to_le16(ieee->associate_seq);
685 ieee->associate_seq++;
686
687 auth->status = cpu_to_le16(WLAN_STATUS_SUCCESS);
688
689 return skb;
690
691}
692
693
694static struct sk_buff* ieee80211_probe_resp(struct ieee80211_device *ieee, u8 *dest)
695{
696 u8 *tag;
697 int beacon_size;
698 struct ieee80211_probe_response *beacon_buf;
699 struct sk_buff *skb = NULL;
700 int encrypt;
701 int atim_len,erp_len;
702 struct ieee80211_crypt_data* crypt;
703
704 char *ssid = ieee->current_network.ssid;
705 int ssid_len = ieee->current_network.ssid_len;
706 int rate_len = ieee->current_network.rates_len+2;
707 int rate_ex_len = ieee->current_network.rates_ex_len;
708 int wpa_ie_len = ieee->wpa_ie_len;
709 u8 erpinfo_content = 0;
710
711 u8* tmp_ht_cap_buf;
712 u8 tmp_ht_cap_len=0;
713 u8* tmp_ht_info_buf;
714 u8 tmp_ht_info_len=0;
715 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
716 u8* tmp_generic_ie_buf=NULL;
717 u8 tmp_generic_ie_len=0;
718
719 if(rate_ex_len > 0) rate_ex_len+=2;
720
721 if(ieee->current_network.capability & WLAN_CAPABILITY_IBSS)
722 atim_len = 4;
723 else
724 atim_len = 0;
725
726 if(ieee80211_is_54g(ieee->current_network))
727 erp_len = 3;
728 else
729 erp_len = 0;
730
731 crypt = ieee->crypt[ieee->tx_keyidx];
732
733
734 encrypt = ieee->host_encrypt && crypt && crypt->ops &&
735 ((0 == strcmp(crypt->ops->name, "WEP") || wpa_ie_len));
736 //HT ralated element
737
738 tmp_ht_cap_buf =(u8*) &(ieee->pHTInfo->SelfHTCap);
739 tmp_ht_cap_len = sizeof(ieee->pHTInfo->SelfHTCap);
740 tmp_ht_info_buf =(u8*) &(ieee->pHTInfo->SelfHTInfo);
741 tmp_ht_info_len = sizeof(ieee->pHTInfo->SelfHTInfo);
742 HTConstructCapabilityElement(ieee, tmp_ht_cap_buf, &tmp_ht_cap_len,encrypt);
743 HTConstructInfoElement(ieee,tmp_ht_info_buf,&tmp_ht_info_len, encrypt);
744
745
746 if(pHTInfo->bRegRT2RTAggregation)
747 {
748 tmp_generic_ie_buf = ieee->pHTInfo->szRT2RTAggBuffer;
749 tmp_generic_ie_len = sizeof(ieee->pHTInfo->szRT2RTAggBuffer);
750 HTConstructRT2RTAggElement(ieee, tmp_generic_ie_buf, &tmp_generic_ie_len);
751 }
752
753 beacon_size = sizeof(struct ieee80211_probe_response)+2+
754 ssid_len
755 +3 //channel
756 +rate_len
757 +rate_ex_len
758 +atim_len
759 +erp_len
760 +wpa_ie_len
761 +ieee->tx_headroom;
762 skb = dev_alloc_skb(beacon_size);
763 if (!skb)
764 return NULL;
765 skb_reserve(skb, ieee->tx_headroom);
766 beacon_buf = (struct ieee80211_probe_response*) skb_put(skb, (beacon_size - ieee->tx_headroom));
767 memcpy (beacon_buf->header.addr1, dest,ETH_ALEN);
768 memcpy (beacon_buf->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
769 memcpy (beacon_buf->header.addr3, ieee->current_network.bssid, ETH_ALEN);
770
771 beacon_buf->header.duration_id = 0; //FIXME
772 beacon_buf->beacon_interval =
773 cpu_to_le16(ieee->current_network.beacon_interval);
774 beacon_buf->capability =
775 cpu_to_le16(ieee->current_network.capability & WLAN_CAPABILITY_IBSS);
776 beacon_buf->capability |=
777 cpu_to_le16(ieee->current_network.capability & WLAN_CAPABILITY_SHORT_PREAMBLE); //add short preamble here
778
779 if(ieee->short_slot && (ieee->current_network.capability & WLAN_CAPABILITY_SHORT_SLOT))
780 beacon_buf->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_SLOT);
781
782 crypt = ieee->crypt[ieee->tx_keyidx];
783 if (encrypt)
784 beacon_buf->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
785
786
787 beacon_buf->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_PROBE_RESP);
788 beacon_buf->info_element[0].id = MFIE_TYPE_SSID;
789 beacon_buf->info_element[0].len = ssid_len;
790
791 tag = (u8*) beacon_buf->info_element[0].data;
792
793 memcpy(tag, ssid, ssid_len);
794
795 tag += ssid_len;
796
797 *(tag++) = MFIE_TYPE_RATES;
798 *(tag++) = rate_len-2;
799 memcpy(tag,ieee->current_network.rates,rate_len-2);
800 tag+=rate_len-2;
801
802 *(tag++) = MFIE_TYPE_DS_SET;
803 *(tag++) = 1;
804 *(tag++) = ieee->current_network.channel;
805
806 if(atim_len){
807 u16 val16;
808 *(tag++) = MFIE_TYPE_IBSS_SET;
809 *(tag++) = 2;
810 val16 = cpu_to_le16(ieee->current_network.atim_window);
811 memcpy((u8 *)tag, (u8 *)&val16, 2);
812 tag+=2;
813 }
814
815 if(erp_len){
816 *(tag++) = MFIE_TYPE_ERP;
817 *(tag++) = 1;
818 *(tag++) = erpinfo_content;
819 }
820 if(rate_ex_len){
821 *(tag++) = MFIE_TYPE_RATES_EX;
822 *(tag++) = rate_ex_len-2;
823 memcpy(tag,ieee->current_network.rates_ex,rate_ex_len-2);
824 tag+=rate_ex_len-2;
825 }
826
827 if (wpa_ie_len)
828 {
829 if (ieee->iw_mode == IW_MODE_ADHOC)
830 {//as Windows will set pairwise key same as the group key which is not allowed in Linux, so set this for IOT issue. WB 2008.07.07
831 memcpy(&ieee->wpa_ie[14], &ieee->wpa_ie[8], 4);
832 }
833 memcpy(tag, ieee->wpa_ie, ieee->wpa_ie_len);
834 tag += wpa_ie_len;
835 }
836
837 return skb;
838}
839
840
841struct sk_buff* ieee80211_assoc_resp(struct ieee80211_device *ieee, u8 *dest)
842{
843 struct sk_buff *skb;
844 u8* tag;
845
846 struct ieee80211_crypt_data* crypt;
847 struct ieee80211_assoc_response_frame *assoc;
848 short encrypt;
849
850 unsigned int rate_len = ieee80211_MFIE_rate_len(ieee);
851 int len = sizeof(struct ieee80211_assoc_response_frame) + rate_len + ieee->tx_headroom;
852
853 skb = dev_alloc_skb(len);
854
855 if (!skb)
856 return NULL;
857
858 skb_reserve(skb, ieee->tx_headroom);
859
860 assoc = (struct ieee80211_assoc_response_frame *)
861 skb_put(skb,sizeof(struct ieee80211_assoc_response_frame));
862
863 assoc->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP);
864 memcpy(assoc->header.addr1, dest,ETH_ALEN);
865 memcpy(assoc->header.addr3, ieee->dev->dev_addr, ETH_ALEN);
866 memcpy(assoc->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
867 assoc->capability = cpu_to_le16(ieee->iw_mode == IW_MODE_MASTER ?
868 WLAN_CAPABILITY_BSS : WLAN_CAPABILITY_IBSS);
869
870
871 if(ieee->short_slot)
872 assoc->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_SLOT);
873
874 if (ieee->host_encrypt)
875 crypt = ieee->crypt[ieee->tx_keyidx];
876 else crypt = NULL;
877
878 encrypt = ( crypt && crypt->ops);
879
880 if (encrypt)
881 assoc->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
882
883 assoc->status = 0;
884 assoc->aid = cpu_to_le16(ieee->assoc_id);
885 if (ieee->assoc_id == 0x2007) ieee->assoc_id=0;
886 else ieee->assoc_id++;
887
888 tag = (u8*) skb_put(skb, rate_len);
889
890 ieee80211_MFIE_Brate(ieee, &tag);
891 ieee80211_MFIE_Grate(ieee, &tag);
892
893 return skb;
894}
895
896struct sk_buff* ieee80211_auth_resp(struct ieee80211_device *ieee,int status, u8 *dest)
897{
898 struct sk_buff *skb;
899 struct ieee80211_authentication *auth;
900 int len = ieee->tx_headroom + sizeof(struct ieee80211_authentication)+1;
901
902 skb = dev_alloc_skb(len);
903
904 if (!skb)
905 return NULL;
906
907 skb->len = sizeof(struct ieee80211_authentication);
908
909 auth = (struct ieee80211_authentication *)skb->data;
910
911 auth->status = cpu_to_le16(status);
912 auth->transaction = cpu_to_le16(2);
913 auth->algorithm = cpu_to_le16(WLAN_AUTH_OPEN);
914
915 memcpy(auth->header.addr3, ieee->dev->dev_addr, ETH_ALEN);
916 memcpy(auth->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
917 memcpy(auth->header.addr1, dest, ETH_ALEN);
918 auth->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_AUTH);
919 return skb;
920
921
922}
923
924struct sk_buff* ieee80211_null_func(struct ieee80211_device *ieee,short pwr)
925{
926 struct sk_buff *skb;
927 struct ieee80211_hdr_3addr* hdr;
928
929 skb = dev_alloc_skb(sizeof(struct ieee80211_hdr_3addr));
930
931 if (!skb)
932 return NULL;
933
934 hdr = (struct ieee80211_hdr_3addr*)skb_put(skb,sizeof(struct ieee80211_hdr_3addr));
935
936 memcpy(hdr->addr1, ieee->current_network.bssid, ETH_ALEN);
937 memcpy(hdr->addr2, ieee->dev->dev_addr, ETH_ALEN);
938 memcpy(hdr->addr3, ieee->current_network.bssid, ETH_ALEN);
939
940 hdr->frame_ctl = cpu_to_le16(IEEE80211_FTYPE_DATA |
941 IEEE80211_STYPE_NULLFUNC | IEEE80211_FCTL_TODS |
942 (pwr ? IEEE80211_FCTL_PM:0));
943
944 return skb;
945
946
947}
948
949struct sk_buff* ieee80211_pspoll_func(struct ieee80211_device *ieee)
950{
951 struct sk_buff *skb;
952 struct ieee80211_pspoll_hdr* hdr;
953
954#ifdef USB_USE_ALIGNMENT
955 u32 Tmpaddr=0;
956 int alignment=0;
957 skb = dev_alloc_skb(sizeof(struct ieee80211_pspoll_hdr) + ieee->tx_headroom + USB_512B_ALIGNMENT_SIZE);
958#else
959 skb = dev_alloc_skb(sizeof(struct ieee80211_pspoll_hdr)+ieee->tx_headroom);
960#endif
961 if (!skb)
962 return NULL;
963
964#ifdef USB_USE_ALIGNMENT
965 Tmpaddr = (u32)skb->data;
966 alignment = Tmpaddr & 0x1ff;
967 skb_reserve(skb,(USB_512B_ALIGNMENT_SIZE - alignment));
968#endif
969 skb_reserve(skb, ieee->tx_headroom);
970
971 hdr = (struct ieee80211_pspoll_hdr*)skb_put(skb,sizeof(struct ieee80211_pspoll_hdr));
972
973 memcpy(hdr->bssid, ieee->current_network.bssid, ETH_ALEN);
974 memcpy(hdr->ta, ieee->dev->dev_addr, ETH_ALEN);
975
976 hdr->aid = cpu_to_le16(ieee->assoc_id | 0xc000);
977 hdr->frame_ctl = cpu_to_le16(IEEE80211_FTYPE_CTL |IEEE80211_STYPE_PSPOLL | IEEE80211_FCTL_PM);
978
979 return skb;
980
981}
982
983
984void ieee80211_resp_to_assoc_rq(struct ieee80211_device *ieee, u8* dest)
985{
986 struct sk_buff *buf = ieee80211_assoc_resp(ieee, dest);
987
988 if (buf)
989 softmac_mgmt_xmit(buf, ieee);
990}
991
992
993void ieee80211_resp_to_auth(struct ieee80211_device *ieee, int s, u8* dest)
994{
995 struct sk_buff *buf = ieee80211_auth_resp(ieee, s, dest);
996
997 if (buf)
998 softmac_mgmt_xmit(buf, ieee);
999}
1000
1001
1002void ieee80211_resp_to_probe(struct ieee80211_device *ieee, u8 *dest)
1003{
1004
1005
1006 struct sk_buff *buf = ieee80211_probe_resp(ieee, dest);
1007 if (buf)
1008 softmac_mgmt_xmit(buf, ieee);
1009}
1010
1011
1012inline struct sk_buff *ieee80211_association_req(struct ieee80211_network *beacon,struct ieee80211_device *ieee)
1013{
1014 struct sk_buff *skb;
1015 struct ieee80211_assoc_request_frame *hdr;
1016 u8 *tag;
1017 u8* ht_cap_buf = NULL;
1018 u8 ht_cap_len=0;
1019 u8* realtek_ie_buf=NULL;
1020 u8 realtek_ie_len=0;
1021 int wpa_ie_len= ieee->wpa_ie_len;
1022 unsigned int ckip_ie_len=0;
1023 unsigned int ccxrm_ie_len=0;
1024 unsigned int cxvernum_ie_len=0;
1025 struct ieee80211_crypt_data* crypt;
1026 int encrypt;
1027
1028 unsigned int rate_len = ieee80211_MFIE_rate_len(ieee);
1029 unsigned int wmm_info_len = beacon->qos_data.supported?9:0;
1030#ifdef THOMAS_TURBO
1031 unsigned int turbo_info_len = beacon->Turbo_Enable?9:0;
1032#endif
1033
1034 int len = 0;
1035
1036 crypt = ieee->crypt[ieee->tx_keyidx];
1037 encrypt = ieee->host_encrypt && crypt && crypt->ops && ((0 == strcmp(crypt->ops->name,"WEP") || wpa_ie_len));
1038
1039 //Include High Throuput capability && Realtek proprietary
1040 if(ieee->pHTInfo->bCurrentHTSupport&&ieee->pHTInfo->bEnableHT)
1041 {
1042 ht_cap_buf = (u8*)&(ieee->pHTInfo->SelfHTCap);
1043 ht_cap_len = sizeof(ieee->pHTInfo->SelfHTCap);
1044 HTConstructCapabilityElement(ieee, ht_cap_buf, &ht_cap_len, encrypt);
1045 if(ieee->pHTInfo->bCurrentRT2RTAggregation)
1046 {
1047 realtek_ie_buf = ieee->pHTInfo->szRT2RTAggBuffer;
1048 realtek_ie_len = sizeof( ieee->pHTInfo->szRT2RTAggBuffer);
1049 HTConstructRT2RTAggElement(ieee, realtek_ie_buf, &realtek_ie_len);
1050
1051 }
1052 }
1053 if(ieee->qos_support){
1054 wmm_info_len = beacon->qos_data.supported?9:0;
1055 }
1056
1057
1058 if(beacon->bCkipSupported)
1059 {
1060 ckip_ie_len = 30+2;
1061 }
1062 if(beacon->bCcxRmEnable)
1063 {
1064 ccxrm_ie_len = 6+2;
1065 }
1066 if( beacon->BssCcxVerNumber >= 2 )
1067 {
1068 cxvernum_ie_len = 5+2;
1069 }
1070#ifdef THOMAS_TURBO
1071 len = sizeof(struct ieee80211_assoc_request_frame)+ 2
1072 + beacon->ssid_len//essid tagged val
1073 + rate_len//rates tagged val
1074 + wpa_ie_len
1075 + wmm_info_len
1076 + turbo_info_len
1077 + ht_cap_len
1078 + realtek_ie_len
1079 + ckip_ie_len
1080 + ccxrm_ie_len
1081 + cxvernum_ie_len
1082 + ieee->tx_headroom;
1083#else
1084 len = sizeof(struct ieee80211_assoc_request_frame)+ 2
1085 + beacon->ssid_len//essid tagged val
1086 + rate_len//rates tagged val
1087 + wpa_ie_len
1088 + wmm_info_len
1089 + ht_cap_len
1090 + realtek_ie_len
1091 + ckip_ie_len
1092 + ccxrm_ie_len
1093 + cxvernum_ie_len
1094 + ieee->tx_headroom;
1095#endif
1096
1097 skb = dev_alloc_skb(len);
1098
1099 if (!skb)
1100 return NULL;
1101
1102 skb_reserve(skb, ieee->tx_headroom);
1103
1104 hdr = (struct ieee80211_assoc_request_frame *)
1105 skb_put(skb, sizeof(struct ieee80211_assoc_request_frame)+2);
1106
1107
1108 hdr->header.frame_ctl = IEEE80211_STYPE_ASSOC_REQ;
1109 hdr->header.duration_id= 37; //FIXME
1110 memcpy(hdr->header.addr1, beacon->bssid, ETH_ALEN);
1111 memcpy(hdr->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
1112 memcpy(hdr->header.addr3, beacon->bssid, ETH_ALEN);
1113
1114 memcpy(ieee->ap_mac_addr, beacon->bssid, ETH_ALEN);//for HW security, John
1115
1116 hdr->capability = cpu_to_le16(WLAN_CAPABILITY_BSS);
1117 if (beacon->capability & WLAN_CAPABILITY_PRIVACY )
1118 hdr->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
1119
1120 if (beacon->capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
1121 hdr->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_PREAMBLE); //add short_preamble here
1122
1123 if(ieee->short_slot)
1124 hdr->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_SLOT);
1125 if (wmm_info_len) //QOS
1126 hdr->capability |= cpu_to_le16(WLAN_CAPABILITY_QOS);
1127
1128 hdr->listen_interval = 0xa; //FIXME
1129
1130 hdr->info_element[0].id = MFIE_TYPE_SSID;
1131
1132 hdr->info_element[0].len = beacon->ssid_len;
1133 tag = skb_put(skb, beacon->ssid_len);
1134 memcpy(tag, beacon->ssid, beacon->ssid_len);
1135
1136 tag = skb_put(skb, rate_len);
1137
1138 ieee80211_MFIE_Brate(ieee, &tag);
1139 ieee80211_MFIE_Grate(ieee, &tag);
1140 // For CCX 1 S13, CKIP. Added by Annie, 2006-08-14.
1141 if( beacon->bCkipSupported )
1142 {
1143 static u8 AironetIeOui[] = {0x00, 0x01, 0x66}; // "4500-client"
1144 u8 CcxAironetBuf[30];
1145 OCTET_STRING osCcxAironetIE;
1146
1147 memset(CcxAironetBuf, 0,30);
1148 osCcxAironetIE.Octet = CcxAironetBuf;
1149 osCcxAironetIE.Length = sizeof(CcxAironetBuf);
1150 //
1151 // Ref. CCX test plan v3.61, 3.2.3.1 step 13.
1152 // We want to make the device type as "4500-client". 060926, by CCW.
1153 //
1154 memcpy(osCcxAironetIE.Octet, AironetIeOui, sizeof(AironetIeOui));
1155
1156 // CCX1 spec V1.13, A01.1 CKIP Negotiation (page23):
1157 // "The CKIP negotiation is started with the associate request from the client to the access point,
1158 // containing an Aironet element with both the MIC and KP bits set."
1159 osCcxAironetIE.Octet[IE_CISCO_FLAG_POSITION] |= (SUPPORT_CKIP_PK|SUPPORT_CKIP_MIC) ;
1160 tag = skb_put(skb, ckip_ie_len);
1161 *tag++ = MFIE_TYPE_AIRONET;
1162 *tag++ = osCcxAironetIE.Length;
1163 memcpy(tag,osCcxAironetIE.Octet,osCcxAironetIE.Length);
1164 tag += osCcxAironetIE.Length;
1165 }
1166
1167 if(beacon->bCcxRmEnable)
1168 {
1169 static u8 CcxRmCapBuf[] = {0x00, 0x40, 0x96, 0x01, 0x01, 0x00};
1170 OCTET_STRING osCcxRmCap;
1171
1172 osCcxRmCap.Octet = CcxRmCapBuf;
1173 osCcxRmCap.Length = sizeof(CcxRmCapBuf);
1174 tag = skb_put(skb,ccxrm_ie_len);
1175 *tag++ = MFIE_TYPE_GENERIC;
1176 *tag++ = osCcxRmCap.Length;
1177 memcpy(tag,osCcxRmCap.Octet,osCcxRmCap.Length);
1178 tag += osCcxRmCap.Length;
1179 }
1180
1181 if( beacon->BssCcxVerNumber >= 2 )
1182 {
1183 u8 CcxVerNumBuf[] = {0x00, 0x40, 0x96, 0x03, 0x00};
1184 OCTET_STRING osCcxVerNum;
1185 CcxVerNumBuf[4] = beacon->BssCcxVerNumber;
1186 osCcxVerNum.Octet = CcxVerNumBuf;
1187 osCcxVerNum.Length = sizeof(CcxVerNumBuf);
1188 tag = skb_put(skb,cxvernum_ie_len);
1189 *tag++ = MFIE_TYPE_GENERIC;
1190 *tag++ = osCcxVerNum.Length;
1191 memcpy(tag,osCcxVerNum.Octet,osCcxVerNum.Length);
1192 tag += osCcxVerNum.Length;
1193 }
1194 //HT cap element
1195 if(ieee->pHTInfo->bCurrentHTSupport&&ieee->pHTInfo->bEnableHT){
1196 if(ieee->pHTInfo->ePeerHTSpecVer != HT_SPEC_VER_EWC)
1197 {
1198 tag = skb_put(skb, ht_cap_len);
1199 *tag++ = MFIE_TYPE_HT_CAP;
1200 *tag++ = ht_cap_len - 2;
1201 memcpy(tag, ht_cap_buf,ht_cap_len -2);
1202 tag += ht_cap_len -2;
1203 }
1204 }
1205
1206
1207 //choose what wpa_supplicant gives to associate.
1208 tag = skb_put(skb, wpa_ie_len);
1209 if (wpa_ie_len){
1210 memcpy(tag, ieee->wpa_ie, ieee->wpa_ie_len);
1211 }
1212
1213 tag = skb_put(skb,wmm_info_len);
1214 if(wmm_info_len) {
1215 ieee80211_WMM_Info(ieee, &tag);
1216 }
1217#ifdef THOMAS_TURBO
1218 tag = skb_put(skb,turbo_info_len);
1219 if(turbo_info_len) {
1220 ieee80211_TURBO_Info(ieee, &tag);
1221 }
1222#endif
1223
1224 if(ieee->pHTInfo->bCurrentHTSupport&&ieee->pHTInfo->bEnableHT){
1225 if(ieee->pHTInfo->ePeerHTSpecVer == HT_SPEC_VER_EWC)
1226 {
1227 tag = skb_put(skb, ht_cap_len);
1228 *tag++ = MFIE_TYPE_GENERIC;
1229 *tag++ = ht_cap_len - 2;
1230 memcpy(tag, ht_cap_buf,ht_cap_len - 2);
1231 tag += ht_cap_len -2;
1232 }
1233
1234 if(ieee->pHTInfo->bCurrentRT2RTAggregation){
1235 tag = skb_put(skb, realtek_ie_len);
1236 *tag++ = MFIE_TYPE_GENERIC;
1237 *tag++ = realtek_ie_len - 2;
1238 memcpy(tag, realtek_ie_buf,realtek_ie_len -2 );
1239 }
1240 }
1241 return skb;
1242}
1243
1244void ieee80211_associate_abort(struct ieee80211_device *ieee)
1245{
1246
1247 unsigned long flags;
1248 spin_lock_irqsave(&ieee->lock, flags);
1249
1250 ieee->associate_seq++;
1251
1252 /* don't scan, and avoid to have the RX path possibily
1253 * try again to associate. Even do not react to AUTH or
1254 * ASSOC response. Just wait for the retry wq to be scheduled.
1255 * Here we will check if there are good nets to associate
1256 * with, so we retry or just get back to NO_LINK and scanning
1257 */
1258 if (ieee->state == IEEE80211_ASSOCIATING_AUTHENTICATING){
1259 IEEE80211_DEBUG_MGMT("Authentication failed\n");
1260 ieee->softmac_stats.no_auth_rs++;
1261 }else{
1262 IEEE80211_DEBUG_MGMT("Association failed\n");
1263 ieee->softmac_stats.no_ass_rs++;
1264 }
1265
1266 ieee->state = IEEE80211_ASSOCIATING_RETRY;
1267
1268 queue_delayed_work(ieee->wq, &ieee->associate_retry_wq, \
1269 IEEE80211_SOFTMAC_ASSOC_RETRY_TIME);
1270 spin_unlock_irqrestore(&ieee->lock, flags);
1271}
1272
1273void ieee80211_associate_abort_cb(unsigned long dev)
1274{
1275 ieee80211_associate_abort((struct ieee80211_device *) dev);
1276}
1277
1278
1279void ieee80211_associate_step1(struct ieee80211_device *ieee)
1280{
1281 struct ieee80211_network *beacon = &ieee->current_network;
1282 struct sk_buff *skb;
1283
1284 IEEE80211_DEBUG_MGMT("Stopping scan\n");
1285
1286 ieee->softmac_stats.tx_auth_rq++;
1287 skb=ieee80211_authentication_req(beacon, ieee, 0);
1288
1289 if (!skb)
1290 ieee80211_associate_abort(ieee);
1291 else{
1292 ieee->state = IEEE80211_ASSOCIATING_AUTHENTICATING ;
1293 IEEE80211_DEBUG_MGMT("Sending authentication request\n");
1294 softmac_mgmt_xmit(skb, ieee);
1295 //BUGON when you try to add_timer twice, using mod_timer may be better, john0709
1296 if(!timer_pending(&ieee->associate_timer)){
1297 ieee->associate_timer.expires = jiffies + (HZ / 2);
1298 add_timer(&ieee->associate_timer);
1299 }
1300 }
1301}
1302
1303void ieee80211_rtl_auth_challenge(struct ieee80211_device *ieee, u8 *challenge, int chlen)
1304{
1305 u8 *c;
1306 struct sk_buff *skb;
1307 struct ieee80211_network *beacon = &ieee->current_network;
1308
1309 ieee->associate_seq++;
1310 ieee->softmac_stats.tx_auth_rq++;
1311
1312 skb = ieee80211_authentication_req(beacon, ieee, chlen+2);
1313 if (!skb)
1314 ieee80211_associate_abort(ieee);
1315 else{
1316 c = skb_put(skb, chlen+2);
1317 *(c++) = MFIE_TYPE_CHALLENGE;
1318 *(c++) = chlen;
1319 memcpy(c, challenge, chlen);
1320
1321 IEEE80211_DEBUG_MGMT("Sending authentication challenge response\n");
1322
1323 ieee80211_encrypt_fragment(ieee, skb, sizeof(struct ieee80211_hdr_3addr ));
1324
1325 softmac_mgmt_xmit(skb, ieee);
1326 mod_timer(&ieee->associate_timer, jiffies + (HZ/2));
1327 }
1328 kfree(challenge);
1329}
1330
1331void ieee80211_associate_step2(struct ieee80211_device *ieee)
1332{
1333 struct sk_buff* skb;
1334 struct ieee80211_network *beacon = &ieee->current_network;
1335
1336 del_timer_sync(&ieee->associate_timer);
1337
1338 IEEE80211_DEBUG_MGMT("Sending association request\n");
1339
1340 ieee->softmac_stats.tx_ass_rq++;
1341 skb=ieee80211_association_req(beacon, ieee);
1342 if (!skb)
1343 ieee80211_associate_abort(ieee);
1344 else{
1345 softmac_mgmt_xmit(skb, ieee);
1346 mod_timer(&ieee->associate_timer, jiffies + (HZ/2));
1347 }
1348}
1349void ieee80211_associate_complete_wq(struct work_struct *work)
1350{
1351 struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, associate_complete_wq);
1352 printk(KERN_INFO "Associated successfully\n");
1353 ieee->is_roaming = false;
1354 if(ieee80211_is_54g(ieee->current_network) &&
1355 (ieee->modulation & IEEE80211_OFDM_MODULATION)){
1356
1357 ieee->rate = 108;
1358 printk(KERN_INFO"Using G rates:%d\n", ieee->rate);
1359 }else{
1360 ieee->rate = 22;
1361 printk(KERN_INFO"Using B rates:%d\n", ieee->rate);
1362 }
1363 if (ieee->pHTInfo->bCurrentHTSupport&&ieee->pHTInfo->bEnableHT)
1364 {
1365 printk("Successfully associated, ht enabled\n");
1366 HTOnAssocRsp(ieee);
1367 }
1368 else
1369 {
1370 printk("Successfully associated, ht not enabled(%d, %d)\n", ieee->pHTInfo->bCurrentHTSupport, ieee->pHTInfo->bEnableHT);
1371 memset(ieee->dot11HTOperationalRateSet, 0, 16);
1372 }
1373 ieee->LinkDetectInfo.SlotNum = 2 * (1 + ieee->current_network.beacon_interval/500);
1374 // To prevent the immediately calling watch_dog after association.
1375 if(ieee->LinkDetectInfo.NumRecvBcnInPeriod==0||ieee->LinkDetectInfo.NumRecvDataInPeriod==0 )
1376 {
1377 ieee->LinkDetectInfo.NumRecvBcnInPeriod = 1;
1378 ieee->LinkDetectInfo.NumRecvDataInPeriod= 1;
1379 }
1380 ieee->link_change(ieee);
1381 if(ieee->is_silent_reset == 0){
1382 printk("============>normal associate\n");
1383 notify_wx_assoc_event(ieee);
1384 }
1385 else if(ieee->is_silent_reset == 1)
1386 {
1387 printk("==================>silent reset associate\n");
1388 ieee->is_silent_reset = 0;
1389 }
1390
1391 if (ieee->data_hard_resume)
1392 ieee->data_hard_resume(ieee);
1393 netif_carrier_on(ieee->dev);
1394}
1395
1396void ieee80211_associate_complete(struct ieee80211_device *ieee)
1397{
1398 del_timer_sync(&ieee->associate_timer);
1399
1400 ieee->state = IEEE80211_LINKED;
1401 queue_work(ieee->wq, &ieee->associate_complete_wq);
1402}
1403
1404void ieee80211_associate_procedure_wq(struct work_struct *work)
1405{
1406 struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, associate_procedure_wq);
1407 ieee->sync_scan_hurryup = 1;
1408#ifdef ENABLE_IPS
1409 if(ieee->ieee80211_ips_leave != NULL)
1410 ieee->ieee80211_ips_leave(ieee);
1411#endif
1412
1413 down(&ieee->wx_sem);
1414
1415 if (ieee->data_hard_stop)
1416 ieee->data_hard_stop(ieee);
1417
1418 ieee80211_stop_scan(ieee);
1419 printk("===>%s(), chan:%d\n", __FUNCTION__, ieee->current_network.channel);
1420 HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, HT_EXTCHNL_OFFSET_NO_EXT);
1421
1422 ieee->associate_seq = 1;
1423 ieee80211_associate_step1(ieee);
1424
1425 up(&ieee->wx_sem);
1426}
1427
1428inline void ieee80211_softmac_new_net(struct ieee80211_device *ieee, struct ieee80211_network *net)
1429{
1430 u8 tmp_ssid[IW_ESSID_MAX_SIZE+1];
1431 int tmp_ssid_len = 0;
1432
1433 short apset,ssidset,ssidbroad,apmatch,ssidmatch;
1434
1435 /* we are interested in new new only if we are not associated
1436 * and we are not associating / authenticating
1437 */
1438 if (ieee->state != IEEE80211_NOLINK)
1439 return;
1440
1441 if ((ieee->iw_mode == IW_MODE_INFRA) && !(net->capability & WLAN_CAPABILITY_BSS))
1442 return;
1443
1444 if ((ieee->iw_mode == IW_MODE_ADHOC) && !(net->capability & WLAN_CAPABILITY_IBSS))
1445 return;
1446
1447
1448 if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC){
1449 /* if the user specified the AP MAC, we need also the essid
1450 * This could be obtained by beacons or, if the network does not
1451 * broadcast it, it can be put manually.
1452 */
1453 apset = ieee->wap_set;
1454 ssidset = ieee->ssid_set;
1455 ssidbroad = !(net->ssid_len == 0 || net->ssid[0]== '\0');
1456 apmatch = (memcmp(ieee->current_network.bssid, net->bssid, ETH_ALEN)==0);
1457 ssidmatch = (ieee->current_network.ssid_len == net->ssid_len)&&\
1458 (!strncmp(ieee->current_network.ssid, net->ssid, net->ssid_len));
1459
1460
1461 if ( /* if the user set the AP check if match.
1462 * if the network does not broadcast essid we check the user supplyed ANY essid
1463 * if the network does broadcast and the user does not set essid it is OK
1464 * if the network does broadcast and the user did set essid chech if essid match
1465 */
1466 ( apset && apmatch &&
1467 ((ssidset && ssidbroad && ssidmatch) || (ssidbroad && !ssidset) || (!ssidbroad && ssidset)) ) ||
1468 /* if the ap is not set, check that the user set the bssid
1469 * and the network does bradcast and that those two bssid matches
1470 */
1471 (!apset && ssidset && ssidbroad && ssidmatch)
1472 ){
1473 /* if the essid is hidden replace it with the
1474 * essid provided by the user.
1475 */
1476 if (!ssidbroad){
1477 strncpy(tmp_ssid, ieee->current_network.ssid, IW_ESSID_MAX_SIZE);
1478 tmp_ssid_len = ieee->current_network.ssid_len;
1479 }
1480 memcpy(&ieee->current_network, net, sizeof(struct ieee80211_network));
1481
1482 if (!ssidbroad){
1483 strncpy(ieee->current_network.ssid, tmp_ssid, IW_ESSID_MAX_SIZE);
1484 ieee->current_network.ssid_len = tmp_ssid_len;
1485 }
1486 printk(KERN_INFO"Linking with %s,channel:%d, qos:%d, myHT:%d, networkHT:%d\n",ieee->current_network.ssid,ieee->current_network.channel, ieee->current_network.qos_data.supported, ieee->pHTInfo->bEnableHT, ieee->current_network.bssht.bdSupportHT);
1487
1488 HTResetIOTSetting(ieee->pHTInfo);
1489 if (ieee->iw_mode == IW_MODE_INFRA){
1490 /* Join the network for the first time */
1491 ieee->AsocRetryCount = 0;
1492 //for HT by amy 080514
1493 if((ieee->current_network.qos_data.supported == 1) &&
1494 ieee->current_network.bssht.bdSupportHT)
1495/*WB, 2008.09.09:bCurrentHTSupport and bEnableHT two flags are going to put together to check whether we are in HT now, so needn't to check bEnableHT flags here. That's is to say we will set to HT support whenever joined AP has the ability to support HT. And whether we are in HT or not, please check bCurrentHTSupport&&bEnableHT now please.*/
1496 {
1497 HTResetSelfAndSavePeerSetting(ieee, &(ieee->current_network));
1498 }
1499 else
1500 {
1501 ieee->pHTInfo->bCurrentHTSupport = false;
1502 }
1503
1504 ieee->state = IEEE80211_ASSOCIATING;
1505 queue_work(ieee->wq, &ieee->associate_procedure_wq);
1506 }else{
1507 if(ieee80211_is_54g(ieee->current_network) &&
1508 (ieee->modulation & IEEE80211_OFDM_MODULATION)){
1509 ieee->rate = 108;
1510 ieee->SetWirelessMode(ieee, IEEE_G);
1511 printk(KERN_INFO"Using G rates\n");
1512 }else{
1513 ieee->rate = 22;
1514 ieee->SetWirelessMode(ieee, IEEE_B);
1515 printk(KERN_INFO"Using B rates\n");
1516 }
1517 memset(ieee->dot11HTOperationalRateSet, 0, 16);
1518 ieee->state = IEEE80211_LINKED;
1519 }
1520
1521 }
1522 }
1523
1524}
1525
1526void ieee80211_softmac_check_all_nets(struct ieee80211_device *ieee)
1527{
1528 unsigned long flags;
1529 struct ieee80211_network *target;
1530
1531 spin_lock_irqsave(&ieee->lock, flags);
1532
1533 list_for_each_entry(target, &ieee->network_list, list) {
1534
1535 /* if the state become different that NOLINK means
1536 * we had found what we are searching for
1537 */
1538
1539 if (ieee->state != IEEE80211_NOLINK)
1540 break;
1541
1542 if (ieee->scan_age == 0 || time_after(target->last_scanned + ieee->scan_age, jiffies))
1543 ieee80211_softmac_new_net(ieee, target);
1544 }
1545
1546 spin_unlock_irqrestore(&ieee->lock, flags);
1547
1548}
1549
1550
1551static inline u16 auth_parse(struct sk_buff *skb, u8** challenge, int *chlen)
1552{
1553 struct ieee80211_authentication *a;
1554 u8 *t;
1555 if (skb->len < (sizeof(struct ieee80211_authentication)-sizeof(struct ieee80211_info_element))){
1556 IEEE80211_DEBUG_MGMT("invalid len in auth resp: %d\n",skb->len);
1557 return 0xcafe;
1558 }
1559 *challenge = NULL;
1560 a = (struct ieee80211_authentication*) skb->data;
1561 if(skb->len > (sizeof(struct ieee80211_authentication) +3)){
1562 t = skb->data + sizeof(struct ieee80211_authentication);
1563
1564 if(*(t++) == MFIE_TYPE_CHALLENGE){
1565 *chlen = *(t++);
1566 *challenge = kmemdup(t, *chlen, GFP_ATOMIC);
1567 if (!*challenge)
1568 return -ENOMEM;
1569 }
1570 }
1571
1572 return cpu_to_le16(a->status);
1573
1574}
1575
1576
1577int auth_rq_parse(struct sk_buff *skb,u8* dest)
1578{
1579 struct ieee80211_authentication *a;
1580
1581 if (skb->len < (sizeof(struct ieee80211_authentication)-sizeof(struct ieee80211_info_element))){
1582 IEEE80211_DEBUG_MGMT("invalid len in auth request: %d\n",skb->len);
1583 return -1;
1584 }
1585 a = (struct ieee80211_authentication*) skb->data;
1586
1587 memcpy(dest,a->header.addr2, ETH_ALEN);
1588
1589 if (le16_to_cpu(a->algorithm) != WLAN_AUTH_OPEN)
1590 return WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG;
1591
1592 return WLAN_STATUS_SUCCESS;
1593}
1594
1595static short probe_rq_parse(struct ieee80211_device *ieee, struct sk_buff *skb, u8 *src)
1596{
1597 u8 *tag;
1598 u8 *skbend;
1599 u8 *ssid=NULL;
1600 u8 ssidlen = 0;
1601
1602 struct ieee80211_hdr_3addr *header =
1603 (struct ieee80211_hdr_3addr *) skb->data;
1604
1605 if (skb->len < sizeof (struct ieee80211_hdr_3addr ))
1606 return -1; /* corrupted */
1607
1608 memcpy(src,header->addr2, ETH_ALEN);
1609
1610 skbend = (u8*)skb->data + skb->len;
1611
1612 tag = skb->data + sizeof (struct ieee80211_hdr_3addr );
1613
1614 while (tag+1 < skbend){
1615 if (*tag == 0){
1616 ssid = tag+2;
1617 ssidlen = *(tag+1);
1618 break;
1619 }
1620 tag++; /* point to the len field */
1621 tag = tag + *(tag); /* point to the last data byte of the tag */
1622 tag++; /* point to the next tag */
1623 }
1624
1625 if (ssidlen == 0) return 1;
1626
1627 if (!ssid) return 1; /* ssid not found in tagged param */
1628 return (!strncmp(ssid, ieee->current_network.ssid, ssidlen));
1629
1630}
1631
1632int assoc_rq_parse(struct sk_buff *skb,u8* dest)
1633{
1634 struct ieee80211_assoc_request_frame *a;
1635
1636 if (skb->len < (sizeof(struct ieee80211_assoc_request_frame) -
1637 sizeof(struct ieee80211_info_element))) {
1638
1639 IEEE80211_DEBUG_MGMT("invalid len in auth request:%d \n", skb->len);
1640 return -1;
1641 }
1642
1643 a = (struct ieee80211_assoc_request_frame*) skb->data;
1644
1645 memcpy(dest,a->header.addr2,ETH_ALEN);
1646
1647 return 0;
1648}
1649
1650static inline u16 assoc_parse(struct ieee80211_device *ieee, struct sk_buff *skb, int *aid)
1651{
1652 struct ieee80211_assoc_response_frame *response_head;
1653 u16 status_code;
1654
1655 if (skb->len < sizeof(struct ieee80211_assoc_response_frame)){
1656 IEEE80211_DEBUG_MGMT("invalid len in auth resp: %d\n", skb->len);
1657 return 0xcafe;
1658 }
1659
1660 response_head = (struct ieee80211_assoc_response_frame*) skb->data;
1661 *aid = le16_to_cpu(response_head->aid) & 0x3fff;
1662
1663 status_code = le16_to_cpu(response_head->status);
1664 if((status_code==WLAN_STATUS_ASSOC_DENIED_RATES || \
1665 status_code==WLAN_STATUS_CAPS_UNSUPPORTED)&&
1666 ((ieee->mode == IEEE_G) &&
1667 (ieee->current_network.mode == IEEE_N_24G) &&
1668 (ieee->AsocRetryCount++ < (RT_ASOC_RETRY_LIMIT-1)))) {
1669 ieee->pHTInfo->IOTAction |= HT_IOT_ACT_PURE_N_MODE;
1670 }else {
1671 ieee->AsocRetryCount = 0;
1672 }
1673
1674 return le16_to_cpu(response_head->status);
1675}
1676
1677static inline void
1678ieee80211_rx_probe_rq(struct ieee80211_device *ieee, struct sk_buff *skb)
1679{
1680 u8 dest[ETH_ALEN];
1681
1682 ieee->softmac_stats.rx_probe_rq++;
1683 if (probe_rq_parse(ieee, skb, dest)){
1684 ieee->softmac_stats.tx_probe_rs++;
1685 ieee80211_resp_to_probe(ieee, dest);
1686 }
1687}
1688
1689static inline void
1690ieee80211_rx_auth_rq(struct ieee80211_device *ieee, struct sk_buff *skb)
1691{
1692 u8 dest[ETH_ALEN];
1693 int status;
1694 ieee->softmac_stats.rx_auth_rq++;
1695
1696 status = auth_rq_parse(skb, dest);
1697 if (status != -1) {
1698 ieee80211_resp_to_auth(ieee, status, dest);
1699 }
1700}
1701
1702static inline void
1703ieee80211_rx_assoc_rq(struct ieee80211_device *ieee, struct sk_buff *skb)
1704{
1705 u8 dest[ETH_ALEN];
1706
1707 ieee->softmac_stats.rx_ass_rq++;
1708 if (assoc_rq_parse(skb,dest) != -1){
1709 ieee80211_resp_to_assoc_rq(ieee, dest);
1710 }
1711
1712 printk(KERN_INFO"New client associated: %pM\n", dest);
1713}
1714
1715
1716
1717void ieee80211_sta_ps_send_null_frame(struct ieee80211_device *ieee, short pwr)
1718{
1719
1720 struct sk_buff *buf = ieee80211_null_func(ieee, pwr);
1721
1722 if (buf)
1723 softmac_ps_mgmt_xmit(buf, ieee);
1724
1725}
1726
1727void ieee80211_sta_ps_send_pspoll_frame(struct ieee80211_device *ieee)
1728{
1729
1730 struct sk_buff *buf = ieee80211_pspoll_func(ieee);
1731
1732 if (buf)
1733 softmac_ps_mgmt_xmit(buf, ieee);
1734
1735}
1736
1737short ieee80211_sta_ps_sleep(struct ieee80211_device *ieee, u32 *time_h, u32 *time_l)
1738{
1739 int timeout = ieee->ps_timeout;
1740 u8 dtim;
1741
1742 if(ieee->LPSDelayCnt)
1743 {
1744 ieee->LPSDelayCnt --;
1745 return 0;
1746 }
1747
1748 dtim = ieee->current_network.dtim_data;
1749 if(!(dtim & IEEE80211_DTIM_VALID))
1750 return 0;
1751 timeout = ieee->current_network.beacon_interval; //should we use ps_timeout value or beacon_interval
1752 ieee->current_network.dtim_data = IEEE80211_DTIM_INVALID;
1753 /* there's no need to nofity AP that I find you buffered with broadcast packet */
1754 if(dtim & (IEEE80211_DTIM_UCAST & ieee->ps))
1755 return 2;
1756
1757 if(!time_after(jiffies, ieee->dev->trans_start + MSECS(timeout))){
1758 return 0;
1759 }
1760 if(!time_after(jiffies, ieee->last_rx_ps_time + MSECS(timeout))){
1761 return 0;
1762 }
1763 if((ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE ) &&
1764 (ieee->mgmt_queue_tail != ieee->mgmt_queue_head))
1765 return 0;
1766
1767 if(time_l){
1768 if(ieee->bAwakePktSent == true) {
1769 ieee->LPSAwakeIntvl = 1;//tx wake one beacon
1770 } else {
1771 u8 MaxPeriod = 1;
1772
1773 if(ieee->LPSAwakeIntvl == 0)
1774 ieee->LPSAwakeIntvl = 1;
1775 if(ieee->RegMaxLPSAwakeIntvl == 0) // Default (0x0 - eFastPs, 0xFF -DTIM, 0xNN - 0xNN * BeaconIntvl)
1776 MaxPeriod = 1; // 1 Beacon interval
1777 else if(ieee->RegMaxLPSAwakeIntvl == 0xFF) // DTIM
1778 MaxPeriod = ieee->current_network.dtim_period;
1779 else
1780 MaxPeriod = ieee->RegMaxLPSAwakeIntvl;
1781 ieee->LPSAwakeIntvl = (ieee->LPSAwakeIntvl >= MaxPeriod) ? MaxPeriod : (ieee->LPSAwakeIntvl + 1);
1782 }
1783 {
1784 u8 LPSAwakeIntvl_tmp = 0;
1785 u8 period = ieee->current_network.dtim_period;
1786 u8 count = ieee->current_network.tim.tim_count;
1787 if(count == 0 ) {
1788 if(ieee->LPSAwakeIntvl > period)
1789 LPSAwakeIntvl_tmp = period + (ieee->LPSAwakeIntvl - period) -((ieee->LPSAwakeIntvl-period)%period);
1790 else
1791 LPSAwakeIntvl_tmp = ieee->LPSAwakeIntvl;
1792
1793 } else {
1794 if(ieee->LPSAwakeIntvl > ieee->current_network.tim.tim_count)
1795 LPSAwakeIntvl_tmp = count + (ieee->LPSAwakeIntvl - count) -((ieee->LPSAwakeIntvl-count)%period);
1796 else
1797 LPSAwakeIntvl_tmp = ieee->LPSAwakeIntvl;
1798 }
1799
1800 *time_l = ieee->current_network.last_dtim_sta_time[0]
1801 + MSECS(ieee->current_network.beacon_interval * LPSAwakeIntvl_tmp);
1802 }
1803 }
1804
1805 if(time_h){
1806 *time_h = ieee->current_network.last_dtim_sta_time[1];
1807 if(time_l && *time_l < ieee->current_network.last_dtim_sta_time[0])
1808 *time_h += 1;
1809 }
1810
1811 return 1;
1812
1813
1814}
1815
1816inline void ieee80211_sta_ps(struct ieee80211_device *ieee)
1817{
1818
1819 u32 th,tl;
1820 short sleep;
1821 unsigned long flags;
1822
1823 spin_lock_irqsave(&ieee->lock, flags);
1824
1825 if((ieee->ps == IEEE80211_PS_DISABLED ||
1826 ieee->iw_mode != IW_MODE_INFRA ||
1827 ieee->state != IEEE80211_LINKED)){
1828
1829 // #warning CHECK_LOCK_HERE
1830 printk("=====>%s(): no need to ps,wake up!! ieee->ps is %d,ieee->iw_mode is %d,ieee->state is %d\n",
1831 __FUNCTION__,ieee->ps,ieee->iw_mode,ieee->state);
1832 spin_lock(&ieee->mgmt_tx_lock);
1833
1834 ieee80211_sta_wakeup(ieee, 1);
1835
1836 spin_unlock(&ieee->mgmt_tx_lock);
1837 }
1838
1839 sleep = ieee80211_sta_ps_sleep(ieee,&th, &tl);
1840 /* 2 wake, 1 sleep, 0 do nothing */
1841 if(sleep == 0)//it is not time out or dtim is not valid
1842 {
1843 goto out;
1844 }
1845 if(sleep == 1){
1846 if(ieee->sta_sleep == 1){
1847 ieee->enter_sleep_state(ieee, th, tl);
1848 }
1849
1850 else if(ieee->sta_sleep == 0){
1851 spin_lock(&ieee->mgmt_tx_lock);
1852
1853 if (ieee->ps_is_queue_empty(ieee)) {
1854 ieee->sta_sleep = 2;
1855 ieee->ack_tx_to_ieee = 1;
1856 ieee80211_sta_ps_send_null_frame(ieee,1);
1857 ieee->ps_th = th;
1858 ieee->ps_tl = tl;
1859 }
1860 spin_unlock(&ieee->mgmt_tx_lock);
1861
1862 }
1863
1864 ieee->bAwakePktSent = false;//after null to power save we set it to false. not listen every beacon.
1865
1866 }else if(sleep == 2){
1867 spin_lock(&ieee->mgmt_tx_lock);
1868
1869 ieee80211_sta_wakeup(ieee,1);
1870
1871 spin_unlock(&ieee->mgmt_tx_lock);
1872 }
1873
1874out:
1875 spin_unlock_irqrestore(&ieee->lock, flags);
1876
1877}
1878
1879void ieee80211_sta_wakeup(struct ieee80211_device *ieee, short nl)
1880{
1881 if(ieee->sta_sleep == 0){
1882 if(nl){
1883 if(ieee->pHTInfo->IOTAction & HT_IOT_ACT_NULL_DATA_POWER_SAVING)
1884 {
1885 ieee->ack_tx_to_ieee = 1;
1886 ieee80211_sta_ps_send_null_frame(ieee, 0);
1887 }
1888 else
1889 {
1890 ieee->ack_tx_to_ieee = 1;
1891 ieee80211_sta_ps_send_pspoll_frame(ieee);
1892 }
1893 }
1894 return;
1895
1896 }
1897
1898 if(ieee->sta_sleep == 1)
1899 ieee->sta_wake_up(ieee);
1900 if(nl){
1901
1902 if(ieee->pHTInfo->IOTAction & HT_IOT_ACT_NULL_DATA_POWER_SAVING)
1903 {
1904 ieee->ack_tx_to_ieee = 1;
1905 ieee80211_sta_ps_send_null_frame(ieee, 0);
1906 }
1907 else
1908 {
1909 ieee->ack_tx_to_ieee = 1;
1910 ieee->polling = true;
1911 //ieee80211_sta_ps_send_null_frame(ieee, 0);
1912 ieee80211_sta_ps_send_pspoll_frame(ieee);
1913 }
1914
1915 } else {
1916 ieee->sta_sleep = 0;
1917 ieee->polling = false;
1918 }
1919}
1920
1921void ieee80211_ps_tx_ack(struct ieee80211_device *ieee, short success)
1922{
1923 unsigned long flags;
1924
1925 spin_lock_irqsave(&ieee->lock, flags);
1926
1927 if(ieee->sta_sleep == 2){
1928 /* Null frame with PS bit set */
1929 if(success){
1930 ieee->sta_sleep = 1;
1931 ieee->enter_sleep_state(ieee, ieee->ps_th, ieee->ps_tl);
1932 }
1933 } else {/* 21112005 - tx again null without PS bit if lost */
1934
1935 if((ieee->sta_sleep == 0) && !success){
1936 spin_lock(&ieee->mgmt_tx_lock);
1937 //ieee80211_sta_ps_send_null_frame(ieee, 0);
1938 if(ieee->pHTInfo->IOTAction & HT_IOT_ACT_NULL_DATA_POWER_SAVING)
1939 {
1940 ieee80211_sta_ps_send_null_frame(ieee, 0);
1941 }
1942 else
1943 {
1944 ieee80211_sta_ps_send_pspoll_frame(ieee);
1945 }
1946 spin_unlock(&ieee->mgmt_tx_lock);
1947 }
1948 }
1949 spin_unlock_irqrestore(&ieee->lock, flags);
1950}
1951
1952void ieee80211_process_action(struct ieee80211_device* ieee, struct sk_buff* skb)
1953{
1954 struct ieee80211_hdr* header = (struct ieee80211_hdr*)skb->data;
1955 u8* act = ieee80211_get_payload(header);
1956 u8 tmp = 0;
1957
1958 if (act == NULL)
1959 {
1960 IEEE80211_DEBUG(IEEE80211_DL_ERR, "error to get payload of action frame\n");
1961 return;
1962 }
1963 tmp = *act;
1964 act ++;
1965 switch (tmp)
1966 {
1967 case ACT_CAT_BA:
1968 if (*act == ACT_ADDBAREQ)
1969 ieee80211_rx_ADDBAReq(ieee, skb);
1970 else if (*act == ACT_ADDBARSP)
1971 ieee80211_rx_ADDBARsp(ieee, skb);
1972 else if (*act == ACT_DELBA)
1973 ieee80211_rx_DELBA(ieee, skb);
1974 break;
1975 default:
1976 break;
1977 }
1978 return;
1979
1980}
1981inline int
1982ieee80211_rx_frame_softmac(struct ieee80211_device *ieee, struct sk_buff *skb,
1983 struct ieee80211_rx_stats *rx_stats, u16 type,
1984 u16 stype)
1985{
1986 struct ieee80211_hdr_3addr *header = (struct ieee80211_hdr_3addr *) skb->data;
1987 u16 errcode;
1988 u8* challenge;
1989 int chlen=0;
1990 int aid;
1991 struct ieee80211_assoc_response_frame *assoc_resp;
1992 bool bSupportNmode = true, bHalfSupportNmode = false; //default support N mode, disable halfNmode
1993
1994 if(!ieee->proto_started)
1995 return 0;
1996
1997 switch (WLAN_FC_GET_STYPE(header->frame_ctl)) {
1998
1999 case IEEE80211_STYPE_ASSOC_RESP:
2000 case IEEE80211_STYPE_REASSOC_RESP:
2001
2002 IEEE80211_DEBUG_MGMT("received [RE]ASSOCIATION RESPONSE (%d)\n",
2003 WLAN_FC_GET_STYPE(header->frame_ctl));
2004 if ((ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) &&
2005 ieee->state == IEEE80211_ASSOCIATING_AUTHENTICATED &&
2006 ieee->iw_mode == IW_MODE_INFRA){
2007 struct ieee80211_network network_resp;
2008 struct ieee80211_network *network = &network_resp;
2009
2010 if (0 == (errcode=assoc_parse(ieee,skb, &aid))){
2011 ieee->state=IEEE80211_LINKED;
2012 ieee->assoc_id = aid;
2013 ieee->softmac_stats.rx_ass_ok++;
2014 /* station support qos */
2015 /* Let the register setting defaultly with Legacy station */
2016 if(ieee->qos_support) {
2017 assoc_resp = (struct ieee80211_assoc_response_frame*)skb->data;
2018 memset(network, 0, sizeof(*network));
2019 if (ieee80211_parse_info_param(ieee,assoc_resp->info_element,\
2020 rx_stats->len - sizeof(*assoc_resp),\
2021 network,rx_stats)){
2022 return 1;
2023 }
2024 else
2025 { //filling the PeerHTCap. //maybe not necessary as we can get its info from current_network.
2026 memcpy(ieee->pHTInfo->PeerHTCapBuf, network->bssht.bdHTCapBuf, network->bssht.bdHTCapLen);
2027 memcpy(ieee->pHTInfo->PeerHTInfoBuf, network->bssht.bdHTInfoBuf, network->bssht.bdHTInfoLen);
2028 }
2029 if (ieee->handle_assoc_response != NULL)
2030 ieee->handle_assoc_response(ieee, (struct ieee80211_assoc_response_frame*)header, network);
2031 }
2032 ieee80211_associate_complete(ieee);
2033 } else {
2034 /* aid could not been allocated */
2035 ieee->softmac_stats.rx_ass_err++;
2036 printk(
2037 "Association response status code 0x%x\n",
2038 errcode);
2039 IEEE80211_DEBUG_MGMT(
2040 "Association response status code 0x%x\n",
2041 errcode);
2042 if(ieee->AsocRetryCount < RT_ASOC_RETRY_LIMIT) {
2043 queue_work(ieee->wq, &ieee->associate_procedure_wq);
2044 } else {
2045 ieee80211_associate_abort(ieee);
2046 }
2047 }
2048 }
2049 break;
2050
2051 case IEEE80211_STYPE_ASSOC_REQ:
2052 case IEEE80211_STYPE_REASSOC_REQ:
2053
2054 if ((ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) &&
2055 ieee->iw_mode == IW_MODE_MASTER)
2056
2057 ieee80211_rx_assoc_rq(ieee, skb);
2058 break;
2059
2060 case IEEE80211_STYPE_AUTH:
2061
2062 if (ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE){
2063 if (ieee->state == IEEE80211_ASSOCIATING_AUTHENTICATING &&
2064 ieee->iw_mode == IW_MODE_INFRA){
2065
2066 IEEE80211_DEBUG_MGMT("Received authentication response");
2067
2068 if (0 == (errcode=auth_parse(skb, &challenge, &chlen))){
2069 if(ieee->open_wep || !challenge){
2070 ieee->state = IEEE80211_ASSOCIATING_AUTHENTICATED;
2071 ieee->softmac_stats.rx_auth_rs_ok++;
2072 if(!(ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE))
2073 {
2074 if (!ieee->GetNmodeSupportBySecCfg(ieee))
2075 {
2076 // WEP or TKIP encryption
2077 if(IsHTHalfNmodeAPs(ieee))
2078 {
2079 bSupportNmode = true;
2080 bHalfSupportNmode = true;
2081 }
2082 else
2083 {
2084 bSupportNmode = false;
2085 bHalfSupportNmode = false;
2086 }
2087 printk("==========>to link with AP using SEC(%d, %d)\n", bSupportNmode, bHalfSupportNmode);
2088 }
2089 }
2090 /* Dummy wirless mode setting to avoid encryption issue */
2091 if(bSupportNmode) {
2092 //N mode setting
2093 ieee->SetWirelessMode(ieee,
2094 ieee->current_network.mode);
2095 }else{
2096 //b/g mode setting
2097 /*TODO*/
2098 ieee->SetWirelessMode(ieee, IEEE_G);
2099 }
2100
2101 if (ieee->current_network.mode == IEEE_N_24G && bHalfSupportNmode == true)
2102 {
2103 printk("===============>entern half N mode\n");
2104 ieee->bHalfWirelessN24GMode = true;
2105 }
2106 else
2107 ieee->bHalfWirelessN24GMode = false;
2108
2109 ieee80211_associate_step2(ieee);
2110 }else{
2111 ieee80211_rtl_auth_challenge(ieee, challenge, chlen);
2112 }
2113 }else{
2114 ieee->softmac_stats.rx_auth_rs_err++;
2115 IEEE80211_DEBUG_MGMT("Authentication respose status code 0x%x",errcode);
2116
2117 printk("Authentication respose status code 0x%x",errcode);
2118 ieee80211_associate_abort(ieee);
2119 }
2120
2121 }else if (ieee->iw_mode == IW_MODE_MASTER){
2122 ieee80211_rx_auth_rq(ieee, skb);
2123 }
2124 }
2125 break;
2126
2127 case IEEE80211_STYPE_PROBE_REQ:
2128
2129 if ((ieee->softmac_features & IEEE_SOFTMAC_PROBERS) &&
2130 ((ieee->iw_mode == IW_MODE_ADHOC ||
2131 ieee->iw_mode == IW_MODE_MASTER) &&
2132 ieee->state == IEEE80211_LINKED)){
2133 ieee80211_rx_probe_rq(ieee, skb);
2134 }
2135 break;
2136
2137 case IEEE80211_STYPE_DISASSOC:
2138 case IEEE80211_STYPE_DEAUTH:
2139 /* FIXME for now repeat all the association procedure
2140 * both for disassociation and deauthentication
2141 */
2142 if ((ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) &&
2143 ieee->state == IEEE80211_LINKED &&
2144 ieee->iw_mode == IW_MODE_INFRA){
2145
2146 ieee->state = IEEE80211_ASSOCIATING;
2147 ieee->softmac_stats.reassoc++;
2148 ieee->is_roaming = true;
2149 ieee80211_disassociate(ieee);
2150 RemovePeerTS(ieee, header->addr2);
2151 queue_work(ieee->wq, &ieee->associate_procedure_wq);
2152 }
2153 break;
2154 case IEEE80211_STYPE_MANAGE_ACT:
2155 ieee80211_process_action(ieee,skb);
2156 break;
2157 default:
2158 return -1;
2159 break;
2160 }
2161
2162 return 0;
2163}
2164
2165/* following are for a simpler TX queue management.
2166 * Instead of using netif_[stop/wake]_queue the driver
2167 * will uses these two function (plus a reset one), that
2168 * will internally uses the kernel netif_* and takes
2169 * care of the ieee802.11 fragmentation.
2170 * So the driver receives a fragment per time and might
2171 * call the stop function when it want without take care
2172 * to have enough room to TX an entire packet.
2173 * This might be useful if each fragment need it's own
2174 * descriptor, thus just keep a total free memory > than
2175 * the max fragmentation threshold is not enough.. If the
2176 * ieee802.11 stack passed a TXB struct then you needed
2177 * to keep N free descriptors where
2178 * N = MAX_PACKET_SIZE / MIN_FRAG_TRESHOLD
2179 * In this way you need just one and the 802.11 stack
2180 * will take care of buffering fragments and pass them to
2181 * to the driver later, when it wakes the queue.
2182 */
2183void ieee80211_softmac_xmit(struct ieee80211_txb *txb, struct ieee80211_device *ieee)
2184{
2185
2186 unsigned int queue_index = txb->queue_index;
2187 unsigned long flags;
2188 int i;
2189 cb_desc *tcb_desc = NULL;
2190
2191 spin_lock_irqsave(&ieee->lock,flags);
2192
2193 /* called with 2nd parm 0, no tx mgmt lock required */
2194 ieee80211_sta_wakeup(ieee,0);
2195
2196 /* update the tx status */
2197 tcb_desc = (cb_desc *)(txb->fragments[0]->cb + MAX_DEV_ADDR_SIZE);
2198 if(tcb_desc->bMulticast) {
2199 ieee->stats.multicast++;
2200 }
2201
2202 /* if xmit available, just xmit it immediately, else just insert it to the wait queue */
2203 for(i = 0; i < txb->nr_frags; i++) {
2204#ifdef USB_TX_DRIVER_AGGREGATION_ENABLE
2205 if ((skb_queue_len(&ieee->skb_drv_aggQ[queue_index]) != 0) ||
2206#else
2207 if ((skb_queue_len(&ieee->skb_waitQ[queue_index]) != 0) ||
2208#endif
2209 (!ieee->check_nic_enough_desc(ieee, queue_index))||
2210 (ieee->queue_stop)) {
2211 /* insert the skb packet to the wait queue */
2212 /* as for the completion function, it does not need
2213 * to check it any more.
2214 * */
2215#ifdef USB_TX_DRIVER_AGGREGATION_ENABLE
2216 skb_queue_tail(&ieee->skb_drv_aggQ[queue_index], txb->fragments[i]);
2217#else
2218 skb_queue_tail(&ieee->skb_waitQ[queue_index], txb->fragments[i]);
2219#endif
2220 }else{
2221 ieee->softmac_data_hard_start_xmit(
2222 txb->fragments[i],
2223 ieee, ieee->rate);
2224 }
2225 }
2226
2227 ieee80211_txb_free(txb);
2228
2229 spin_unlock_irqrestore(&ieee->lock,flags);
2230
2231}
2232
2233/* called with ieee->lock acquired */
2234void ieee80211_resume_tx(struct ieee80211_device *ieee)
2235{
2236 int i;
2237 for(i = ieee->tx_pending.frag; i < ieee->tx_pending.txb->nr_frags; i++) {
2238
2239 if (ieee->queue_stop){
2240 ieee->tx_pending.frag = i;
2241 return;
2242 }else{
2243
2244 ieee->softmac_data_hard_start_xmit(
2245 ieee->tx_pending.txb->fragments[i],
2246 ieee, ieee->rate);
2247 ieee->stats.tx_packets++;
2248 }
2249 }
2250
2251
2252 ieee80211_txb_free(ieee->tx_pending.txb);
2253 ieee->tx_pending.txb = NULL;
2254}
2255
2256
2257void ieee80211_reset_queue(struct ieee80211_device *ieee)
2258{
2259 unsigned long flags;
2260
2261 spin_lock_irqsave(&ieee->lock,flags);
2262 init_mgmt_queue(ieee);
2263 if (ieee->tx_pending.txb){
2264 ieee80211_txb_free(ieee->tx_pending.txb);
2265 ieee->tx_pending.txb = NULL;
2266 }
2267 ieee->queue_stop = 0;
2268 spin_unlock_irqrestore(&ieee->lock,flags);
2269
2270}
2271
2272void ieee80211_rtl_wake_queue(struct ieee80211_device *ieee)
2273{
2274
2275 unsigned long flags;
2276 struct sk_buff *skb;
2277 struct ieee80211_hdr_3addr *header;
2278
2279 spin_lock_irqsave(&ieee->lock,flags);
2280 if (! ieee->queue_stop) goto exit;
2281
2282 ieee->queue_stop = 0;
2283
2284 if(ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE){
2285 while (!ieee->queue_stop && (skb = dequeue_mgmt(ieee))){
2286
2287 header = (struct ieee80211_hdr_3addr *) skb->data;
2288
2289 header->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
2290
2291 if (ieee->seq_ctrl[0] == 0xFFF)
2292 ieee->seq_ctrl[0] = 0;
2293 else
2294 ieee->seq_ctrl[0]++;
2295
2296 ieee->softmac_data_hard_start_xmit(skb, ieee, ieee->basic_rate);
2297 }
2298 }
2299 if (!ieee->queue_stop && ieee->tx_pending.txb)
2300 ieee80211_resume_tx(ieee);
2301
2302 if (!ieee->queue_stop && netif_queue_stopped(ieee->dev)){
2303 ieee->softmac_stats.swtxawake++;
2304 netif_wake_queue(ieee->dev);
2305 }
2306
2307exit :
2308 spin_unlock_irqrestore(&ieee->lock,flags);
2309}
2310
2311
2312void ieee80211_rtl_stop_queue(struct ieee80211_device *ieee)
2313{
2314 if (! netif_queue_stopped(ieee->dev)){
2315 netif_stop_queue(ieee->dev);
2316 ieee->softmac_stats.swtxstop++;
2317 }
2318 ieee->queue_stop = 1;
2319}
2320
2321
2322inline void ieee80211_randomize_cell(struct ieee80211_device *ieee)
2323{
2324
2325 get_random_bytes(ieee->current_network.bssid, ETH_ALEN);
2326
2327 /* an IBSS cell address must have the two less significant
2328 * bits of the first byte = 2
2329 */
2330 ieee->current_network.bssid[0] &= ~0x01;
2331 ieee->current_network.bssid[0] |= 0x02;
2332}
2333
2334/* called in user context only */
2335void ieee80211_start_master_bss(struct ieee80211_device *ieee)
2336{
2337 ieee->assoc_id = 1;
2338
2339 if (ieee->current_network.ssid_len == 0){
2340 strncpy(ieee->current_network.ssid,
2341 IEEE80211_DEFAULT_TX_ESSID,
2342 IW_ESSID_MAX_SIZE);
2343
2344 ieee->current_network.ssid_len = strlen(IEEE80211_DEFAULT_TX_ESSID);
2345 ieee->ssid_set = 1;
2346 }
2347
2348 memcpy(ieee->current_network.bssid, ieee->dev->dev_addr, ETH_ALEN);
2349
2350 ieee->set_chan(ieee, ieee->current_network.channel);
2351 ieee->state = IEEE80211_LINKED;
2352 ieee->link_change(ieee);
2353 notify_wx_assoc_event(ieee);
2354
2355 if (ieee->data_hard_resume)
2356 ieee->data_hard_resume(ieee);
2357
2358 netif_carrier_on(ieee->dev);
2359}
2360
2361void ieee80211_start_monitor_mode(struct ieee80211_device *ieee)
2362{
2363 if(ieee->raw_tx){
2364
2365 if (ieee->data_hard_resume)
2366 ieee->data_hard_resume(ieee);
2367
2368 netif_carrier_on(ieee->dev);
2369 }
2370}
2371void ieee80211_start_ibss_wq(struct work_struct *work)
2372{
2373
2374 struct delayed_work *dwork = container_of(work, struct delayed_work, work);
2375 struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, start_ibss_wq);
2376 /* iwconfig mode ad-hoc will schedule this and return
2377 * on the other hand this will block further iwconfig SET
2378 * operations because of the wx_sem hold.
2379 * Anyway some most set operations set a flag to speed-up
2380 * (abort) this wq (when syncro scanning) before sleeping
2381 * on the semaphore
2382 */
2383 if(!ieee->proto_started){
2384 printk("==========oh driver down return\n");
2385 return;
2386 }
2387 down(&ieee->wx_sem);
2388
2389 if (ieee->current_network.ssid_len == 0){
2390 strcpy(ieee->current_network.ssid,IEEE80211_DEFAULT_TX_ESSID);
2391 ieee->current_network.ssid_len = strlen(IEEE80211_DEFAULT_TX_ESSID);
2392 ieee->ssid_set = 1;
2393 }
2394
2395 ieee->state = IEEE80211_NOLINK;
2396 /* check if we have this cell in our network list */
2397 ieee80211_softmac_check_all_nets(ieee);
2398
2399
2400#ifdef ENABLE_DOT11D //if creating an ad-hoc, set its channel to 10 temporarily--this is the requirement for ASUS, not 11D, so disable 11d.
2401 if (ieee->state == IEEE80211_NOLINK)
2402 ieee->current_network.channel = 6;
2403#endif
2404 /* if not then the state is not linked. Maybe the user swithced to
2405 * ad-hoc mode just after being in monitor mode, or just after
2406 * being very few time in managed mode (so the card have had no
2407 * time to scan all the chans..) or we have just run up the iface
2408 * after setting ad-hoc mode. So we have to give another try..
2409 * Here, in ibss mode, should be safe to do this without extra care
2410 * (in bss mode we had to make sure no-one tryed to associate when
2411 * we had just checked the ieee->state and we was going to start the
2412 * scan) beacause in ibss mode the ieee80211_new_net function, when
2413 * finds a good net, just set the ieee->state to IEEE80211_LINKED,
2414 * so, at worst, we waste a bit of time to initiate an unneeded syncro
2415 * scan, that will stop at the first round because it sees the state
2416 * associated.
2417 */
2418 if (ieee->state == IEEE80211_NOLINK)
2419 ieee80211_start_scan_syncro(ieee);
2420
2421 /* the network definitively is not here.. create a new cell */
2422 if (ieee->state == IEEE80211_NOLINK){
2423 printk("creating new IBSS cell\n");
2424 if(!ieee->wap_set)
2425 ieee80211_randomize_cell(ieee);
2426
2427 if(ieee->modulation & IEEE80211_CCK_MODULATION){
2428
2429 ieee->current_network.rates_len = 4;
2430
2431 ieee->current_network.rates[0] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_1MB;
2432 ieee->current_network.rates[1] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_2MB;
2433 ieee->current_network.rates[2] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_5MB;
2434 ieee->current_network.rates[3] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_11MB;
2435
2436 }else
2437 ieee->current_network.rates_len = 0;
2438
2439 if(ieee->modulation & IEEE80211_OFDM_MODULATION){
2440 ieee->current_network.rates_ex_len = 8;
2441
2442 ieee->current_network.rates_ex[0] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_6MB;
2443 ieee->current_network.rates_ex[1] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_9MB;
2444 ieee->current_network.rates_ex[2] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_12MB;
2445 ieee->current_network.rates_ex[3] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_18MB;
2446 ieee->current_network.rates_ex[4] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_24MB;
2447 ieee->current_network.rates_ex[5] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_36MB;
2448 ieee->current_network.rates_ex[6] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_48MB;
2449 ieee->current_network.rates_ex[7] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_54MB;
2450
2451 ieee->rate = 108;
2452 }else{
2453 ieee->current_network.rates_ex_len = 0;
2454 ieee->rate = 22;
2455 }
2456
2457 // By default, WMM function will be disabled in IBSS mode
2458 ieee->current_network.QoS_Enable = 0;
2459 ieee->SetWirelessMode(ieee, IEEE_G);
2460 ieee->current_network.atim_window = 0;
2461 ieee->current_network.capability = WLAN_CAPABILITY_IBSS;
2462 if(ieee->short_slot)
2463 ieee->current_network.capability |= WLAN_CAPABILITY_SHORT_SLOT;
2464
2465 }
2466
2467 ieee->state = IEEE80211_LINKED;
2468
2469 ieee->set_chan(ieee, ieee->current_network.channel);
2470 ieee->link_change(ieee);
2471
2472 notify_wx_assoc_event(ieee);
2473
2474 ieee80211_start_send_beacons(ieee);
2475
2476 if (ieee->data_hard_resume)
2477 ieee->data_hard_resume(ieee);
2478 netif_carrier_on(ieee->dev);
2479
2480 up(&ieee->wx_sem);
2481}
2482
2483inline void ieee80211_start_ibss(struct ieee80211_device *ieee)
2484{
2485 queue_delayed_work(ieee->wq, &ieee->start_ibss_wq, 150);
2486}
2487
2488/* this is called only in user context, with wx_sem held */
2489void ieee80211_start_bss(struct ieee80211_device *ieee)
2490{
2491 unsigned long flags;
2492#ifdef ENABLE_DOT11D
2493 //
2494 // Ref: 802.11d 11.1.3.3
2495 // STA shall not start a BSS unless properly formed Beacon frame including a Country IE.
2496 //
2497 if(IS_DOT11D_ENABLE(ieee) && !IS_COUNTRY_IE_VALID(ieee))
2498 {
2499 if(! ieee->bGlobalDomain)
2500 {
2501 return;
2502 }
2503 }
2504#endif
2505 /* check if we have already found the net we
2506 * are interested in (if any).
2507 * if not (we are disassociated and we are not
2508 * in associating / authenticating phase) start the background scanning.
2509 */
2510 ieee80211_softmac_check_all_nets(ieee);
2511
2512 /* ensure no-one start an associating process (thus setting
2513 * the ieee->state to ieee80211_ASSOCIATING) while we
2514 * have just cheked it and we are going to enable scan.
2515 * The ieee80211_new_net function is always called with
2516 * lock held (from both ieee80211_softmac_check_all_nets and
2517 * the rx path), so we cannot be in the middle of such function
2518 */
2519 spin_lock_irqsave(&ieee->lock, flags);
2520
2521 if (ieee->state == IEEE80211_NOLINK){
2522#ifdef ENABLE_IPS
2523 if(ieee->ieee80211_ips_leave_wq != NULL)
2524 ieee->ieee80211_ips_leave_wq(ieee);
2525#endif
2526 ieee->actscanning = true;
2527 ieee80211_rtl_start_scan(ieee);
2528 }
2529 spin_unlock_irqrestore(&ieee->lock, flags);
2530}
2531
2532/* called only in userspace context */
2533void ieee80211_disassociate(struct ieee80211_device *ieee)
2534{
2535
2536
2537 netif_carrier_off(ieee->dev);
2538 if (ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE)
2539 ieee80211_reset_queue(ieee);
2540
2541 if (ieee->data_hard_stop)
2542 ieee->data_hard_stop(ieee);
2543#ifdef ENABLE_DOT11D
2544 if(IS_DOT11D_ENABLE(ieee))
2545 Dot11d_Reset(ieee);
2546#endif
2547 ieee->is_set_key = false;
2548 ieee->link_change(ieee);
2549 if (ieee->state == IEEE80211_LINKED ||
2550 ieee->state == IEEE80211_ASSOCIATING) {
2551 ieee->state = IEEE80211_NOLINK;
2552 notify_wx_assoc_event(ieee);
2553 }
2554
2555 ieee->state = IEEE80211_NOLINK;
2556
2557}
2558void ieee80211_associate_retry_wq(struct work_struct *work)
2559{
2560 struct delayed_work *dwork = container_of(work, struct delayed_work, work);
2561 struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, associate_retry_wq);
2562 unsigned long flags;
2563
2564 down(&ieee->wx_sem);
2565 if(!ieee->proto_started)
2566 goto exit;
2567
2568 if(ieee->state != IEEE80211_ASSOCIATING_RETRY)
2569 goto exit;
2570
2571 /* until we do not set the state to IEEE80211_NOLINK
2572 * there are no possibility to have someone else trying
2573 * to start an association procdure (we get here with
2574 * ieee->state = IEEE80211_ASSOCIATING).
2575 * When we set the state to IEEE80211_NOLINK it is possible
2576 * that the RX path run an attempt to associate, but
2577 * both ieee80211_softmac_check_all_nets and the
2578 * RX path works with ieee->lock held so there are no
2579 * problems. If we are still disassociated then start a scan.
2580 * the lock here is necessary to ensure no one try to start
2581 * an association procedure when we have just checked the
2582 * state and we are going to start the scan.
2583 */
2584 ieee->beinretry = true;
2585 ieee->state = IEEE80211_NOLINK;
2586
2587 ieee80211_softmac_check_all_nets(ieee);
2588
2589 spin_lock_irqsave(&ieee->lock, flags);
2590
2591 if(ieee->state == IEEE80211_NOLINK)
2592 {
2593 ieee->is_roaming= false;
2594 ieee->actscanning = true;
2595 ieee80211_rtl_start_scan(ieee);
2596 }
2597 spin_unlock_irqrestore(&ieee->lock, flags);
2598
2599 ieee->beinretry = false;
2600exit:
2601 up(&ieee->wx_sem);
2602}
2603
2604struct sk_buff *ieee80211_get_beacon_(struct ieee80211_device *ieee)
2605{
2606 u8 broadcast_addr[] = {0xff,0xff,0xff,0xff,0xff,0xff};
2607
2608 struct sk_buff *skb;
2609 struct ieee80211_probe_response *b;
2610
2611 skb = ieee80211_probe_resp(ieee, broadcast_addr);
2612
2613 if (!skb)
2614 return NULL;
2615
2616 b = (struct ieee80211_probe_response *) skb->data;
2617 b->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_BEACON);
2618
2619 return skb;
2620
2621}
2622
2623struct sk_buff *ieee80211_get_beacon(struct ieee80211_device *ieee)
2624{
2625 struct sk_buff *skb;
2626 struct ieee80211_probe_response *b;
2627
2628 skb = ieee80211_get_beacon_(ieee);
2629 if(!skb)
2630 return NULL;
2631
2632 b = (struct ieee80211_probe_response *) skb->data;
2633 b->header.seq_ctl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
2634
2635 if (ieee->seq_ctrl[0] == 0xFFF)
2636 ieee->seq_ctrl[0] = 0;
2637 else
2638 ieee->seq_ctrl[0]++;
2639
2640 return skb;
2641}
2642
2643void ieee80211_softmac_stop_protocol(struct ieee80211_device *ieee, u8 shutdown)
2644{
2645 ieee->sync_scan_hurryup = 1;
2646 down(&ieee->wx_sem);
2647 ieee80211_stop_protocol(ieee, shutdown);
2648 up(&ieee->wx_sem);
2649}
2650
2651
2652void ieee80211_stop_protocol(struct ieee80211_device *ieee, u8 shutdown)
2653{
2654 if (!ieee->proto_started)
2655 return;
2656
2657 if(shutdown)
2658 ieee->proto_started = 0;
2659 ieee->proto_stoppping = 1;
2660
2661 ieee80211_stop_send_beacons(ieee);
2662 del_timer_sync(&ieee->associate_timer);
2663 cancel_delayed_work(&ieee->associate_retry_wq);
2664 cancel_delayed_work(&ieee->start_ibss_wq);
2665 ieee80211_stop_scan(ieee);
2666
2667 ieee80211_disassociate(ieee);
2668 RemoveAllTS(ieee); //added as we disconnect from the previous BSS, Remove all TS
2669
2670 ieee->proto_stoppping = 0;
2671}
2672
2673void ieee80211_softmac_start_protocol(struct ieee80211_device *ieee)
2674{
2675 ieee->sync_scan_hurryup = 0;
2676 down(&ieee->wx_sem);
2677 ieee80211_start_protocol(ieee);
2678 up(&ieee->wx_sem);
2679}
2680
2681void ieee80211_start_protocol(struct ieee80211_device *ieee)
2682{
2683 short ch = 0;
2684 int i = 0;
2685 if (ieee->proto_started)
2686 return;
2687
2688 ieee->proto_started = 1;
2689
2690 if (ieee->current_network.channel == 0){
2691 do{
2692 ch++;
2693 if (ch > MAX_CHANNEL_NUMBER)
2694 return; /* no channel found */
2695#ifdef ENABLE_DOT11D
2696 }while(!GET_DOT11D_INFO(ieee)->channel_map[ch]);
2697#else
2698 }while(!ieee->channel_map[ch]);
2699#endif
2700 ieee->current_network.channel = ch;
2701 }
2702
2703 if (ieee->current_network.beacon_interval == 0)
2704 ieee->current_network.beacon_interval = 100;
2705
2706 for(i = 0; i < 17; i++) {
2707 ieee->last_rxseq_num[i] = -1;
2708 ieee->last_rxfrag_num[i] = -1;
2709 ieee->last_packet_time[i] = 0;
2710 }
2711
2712 ieee->init_wmmparam_flag = 0;//reinitialize AC_xx_PARAM registers.
2713
2714 ieee->state = IEEE80211_NOLINK;
2715
2716
2717 /* if the user set the MAC of the ad-hoc cell and then
2718 * switch to managed mode, shall we make sure that association
2719 * attempts does not fail just because the user provide the essid
2720 * and the nic is still checking for the AP MAC ??
2721 */
2722 if (ieee->iw_mode == IW_MODE_INFRA)
2723 ieee80211_start_bss(ieee);
2724
2725 else if (ieee->iw_mode == IW_MODE_ADHOC)
2726 ieee80211_start_ibss(ieee);
2727
2728 else if (ieee->iw_mode == IW_MODE_MASTER)
2729 ieee80211_start_master_bss(ieee);
2730
2731 else if(ieee->iw_mode == IW_MODE_MONITOR)
2732 ieee80211_start_monitor_mode(ieee);
2733}
2734
2735
2736#define DRV_NAME "Ieee80211"
2737void ieee80211_softmac_init(struct ieee80211_device *ieee)
2738{
2739 int i;
2740 memset(&ieee->current_network, 0, sizeof(struct ieee80211_network));
2741
2742 ieee->state = IEEE80211_NOLINK;
2743 ieee->sync_scan_hurryup = 0;
2744 for(i = 0; i < 5; i++) {
2745 ieee->seq_ctrl[i] = 0;
2746 }
2747#ifdef ENABLE_DOT11D
2748 ieee->pDot11dInfo = kzalloc(sizeof(RT_DOT11D_INFO), GFP_ATOMIC);
2749 if (!ieee->pDot11dInfo)
2750 IEEE80211_DEBUG(IEEE80211_DL_ERR, "can't alloc memory for DOT11D\n");
2751#endif
2752 //added for AP roaming
2753 ieee->LinkDetectInfo.SlotNum = 2;
2754 ieee->LinkDetectInfo.NumRecvBcnInPeriod=0;
2755 ieee->LinkDetectInfo.NumRecvDataInPeriod=0;
2756
2757 ieee->assoc_id = 0;
2758 ieee->queue_stop = 0;
2759 ieee->scanning = 0;
2760 ieee->softmac_features = 0; //so IEEE2100-like driver are happy
2761 ieee->wap_set = 0;
2762 ieee->ssid_set = 0;
2763 ieee->proto_started = 0;
2764 ieee->basic_rate = IEEE80211_DEFAULT_BASIC_RATE;
2765 ieee->rate = 22;
2766 ieee->ps = IEEE80211_PS_DISABLED;
2767 ieee->sta_sleep = 0;
2768 ieee->Regdot11HTOperationalRateSet[0]= 0xff;//support MCS 0~7
2769 ieee->Regdot11HTOperationalRateSet[1]= 0xff;//support MCS 8~15
2770 ieee->Regdot11HTOperationalRateSet[4]= 0x01;
2771 //added by amy
2772 ieee->actscanning = false;
2773 ieee->beinretry = false;
2774 ieee->is_set_key = false;
2775 init_mgmt_queue(ieee);
2776
2777 ieee->sta_edca_param[0] = 0x0000A403;
2778 ieee->sta_edca_param[1] = 0x0000A427;
2779 ieee->sta_edca_param[2] = 0x005E4342;
2780 ieee->sta_edca_param[3] = 0x002F3262;
2781 ieee->aggregation = true;
2782 ieee->enable_rx_imm_BA = 1;
2783 ieee->tx_pending.txb = NULL;
2784
2785 init_timer(&ieee->associate_timer);
2786 ieee->associate_timer.data = (unsigned long)ieee;
2787 ieee->associate_timer.function = ieee80211_associate_abort_cb;
2788
2789 init_timer(&ieee->beacon_timer);
2790 ieee->beacon_timer.data = (unsigned long) ieee;
2791 ieee->beacon_timer.function = ieee80211_send_beacon_cb;
2792
2793 ieee->wq = create_workqueue(DRV_NAME);
2794
2795 INIT_DELAYED_WORK(&ieee->start_ibss_wq,ieee80211_start_ibss_wq);
2796 INIT_WORK(&ieee->associate_complete_wq, ieee80211_associate_complete_wq);
2797 INIT_WORK(&ieee->associate_procedure_wq, ieee80211_associate_procedure_wq);
2798 INIT_DELAYED_WORK(&ieee->softmac_scan_wq,ieee80211_softmac_scan_wq);
2799 INIT_DELAYED_WORK(&ieee->associate_retry_wq, ieee80211_associate_retry_wq);
2800 INIT_WORK(&ieee->wx_sync_scan_wq,ieee80211_wx_sync_scan_wq);
2801
2802 sema_init(&ieee->wx_sem, 1);
2803 sema_init(&ieee->scan_sem, 1);
2804#ifdef ENABLE_IPS
2805 sema_init(&ieee->ips_sem,1);
2806#endif
2807 spin_lock_init(&ieee->mgmt_tx_lock);
2808 spin_lock_init(&ieee->beacon_lock);
2809
2810 tasklet_init(&ieee->ps_task,
2811 (void(*)(unsigned long)) ieee80211_sta_ps,
2812 (unsigned long)ieee);
2813
2814}
2815
2816void ieee80211_softmac_free(struct ieee80211_device *ieee)
2817{
2818 down(&ieee->wx_sem);
2819#ifdef ENABLE_DOT11D
2820 kfree(ieee->pDot11dInfo);
2821 ieee->pDot11dInfo = NULL;
2822#endif
2823 del_timer_sync(&ieee->associate_timer);
2824
2825 cancel_delayed_work(&ieee->associate_retry_wq);
2826 destroy_workqueue(ieee->wq);
2827
2828 up(&ieee->wx_sem);
2829}
2830
2831/********************************************************
2832 * Start of WPA code. *
2833 * this is stolen from the ipw2200 driver *
2834 ********************************************************/
2835
2836
2837static int ieee80211_wpa_enable(struct ieee80211_device *ieee, int value)
2838{
2839 /* This is called when wpa_supplicant loads and closes the driver
2840 * interface. */
2841 printk("%s WPA\n",value ? "enabling" : "disabling");
2842 ieee->wpa_enabled = value;
2843 return 0;
2844}
2845
2846
2847void ieee80211_wpa_assoc_frame(struct ieee80211_device *ieee, char *wpa_ie, int wpa_ie_len)
2848{
2849 /* make sure WPA is enabled */
2850 ieee80211_wpa_enable(ieee, 1);
2851
2852 ieee80211_disassociate(ieee);
2853}
2854
2855
2856static int ieee80211_wpa_mlme(struct ieee80211_device *ieee, int command, int reason)
2857{
2858
2859 int ret = 0;
2860
2861 switch (command) {
2862 case IEEE_MLME_STA_DEAUTH:
2863 // silently ignore
2864 break;
2865
2866 case IEEE_MLME_STA_DISASSOC:
2867 ieee80211_disassociate(ieee);
2868 break;
2869
2870 default:
2871 printk("Unknown MLME request: %d\n", command);
2872 ret = -EOPNOTSUPP;
2873 }
2874
2875 return ret;
2876}
2877
2878
2879static int ieee80211_wpa_set_wpa_ie(struct ieee80211_device *ieee,
2880 struct ieee_param *param, int plen)
2881{
2882 u8 *buf;
2883
2884 if (param->u.wpa_ie.len > MAX_WPA_IE_LEN ||
2885 (param->u.wpa_ie.len && param->u.wpa_ie.data == NULL))
2886 return -EINVAL;
2887
2888 if (param->u.wpa_ie.len) {
2889 buf = kmemdup(param->u.wpa_ie.data, param->u.wpa_ie.len,
2890 GFP_KERNEL);
2891 if (buf == NULL)
2892 return -ENOMEM;
2893
2894 kfree(ieee->wpa_ie);
2895 ieee->wpa_ie = buf;
2896 ieee->wpa_ie_len = param->u.wpa_ie.len;
2897 } else {
2898 kfree(ieee->wpa_ie);
2899 ieee->wpa_ie = NULL;
2900 ieee->wpa_ie_len = 0;
2901 }
2902
2903 ieee80211_wpa_assoc_frame(ieee, ieee->wpa_ie, ieee->wpa_ie_len);
2904 return 0;
2905}
2906
2907#define AUTH_ALG_OPEN_SYSTEM 0x1
2908#define AUTH_ALG_SHARED_KEY 0x2
2909
2910static int ieee80211_wpa_set_auth_algs(struct ieee80211_device *ieee, int value)
2911{
2912
2913 struct ieee80211_security sec = {
2914 .flags = SEC_AUTH_MODE,
2915 };
2916 int ret = 0;
2917
2918 if (value & AUTH_ALG_SHARED_KEY) {
2919 sec.auth_mode = WLAN_AUTH_SHARED_KEY;
2920 ieee->open_wep = 0;
2921 ieee->auth_mode = 1;
2922 } else if (value & AUTH_ALG_OPEN_SYSTEM){
2923 sec.auth_mode = WLAN_AUTH_OPEN;
2924 ieee->open_wep = 1;
2925 ieee->auth_mode = 0;
2926 }
2927 else if (value & IW_AUTH_ALG_LEAP){
2928 sec.auth_mode = WLAN_AUTH_LEAP;
2929 ieee->open_wep = 1;
2930 ieee->auth_mode = 2;
2931 }
2932
2933
2934 if (ieee->set_security)
2935 ieee->set_security(ieee, &sec);
2936
2937 return ret;
2938}
2939
2940static int ieee80211_wpa_set_param(struct ieee80211_device *ieee, u8 name, u32 value)
2941{
2942 int ret=0;
2943 unsigned long flags;
2944
2945 switch (name) {
2946 case IEEE_PARAM_WPA_ENABLED:
2947 ret = ieee80211_wpa_enable(ieee, value);
2948 break;
2949
2950 case IEEE_PARAM_TKIP_COUNTERMEASURES:
2951 ieee->tkip_countermeasures=value;
2952 break;
2953
2954 case IEEE_PARAM_DROP_UNENCRYPTED: {
2955 /* HACK:
2956 *
2957 * wpa_supplicant calls set_wpa_enabled when the driver
2958 * is loaded and unloaded, regardless of if WPA is being
2959 * used. No other calls are made which can be used to
2960 * determine if encryption will be used or not prior to
2961 * association being expected. If encryption is not being
2962 * used, drop_unencrypted is set to false, else true -- we
2963 * can use this to determine if the CAP_PRIVACY_ON bit should
2964 * be set.
2965 */
2966 struct ieee80211_security sec = {
2967 .flags = SEC_ENABLED,
2968 .enabled = value,
2969 };
2970 ieee->drop_unencrypted = value;
2971 /* We only change SEC_LEVEL for open mode. Others
2972 * are set by ipw_wpa_set_encryption.
2973 */
2974 if (!value) {
2975 sec.flags |= SEC_LEVEL;
2976 sec.level = SEC_LEVEL_0;
2977 }
2978 else {
2979 sec.flags |= SEC_LEVEL;
2980 sec.level = SEC_LEVEL_1;
2981 }
2982 if (ieee->set_security)
2983 ieee->set_security(ieee, &sec);
2984 break;
2985 }
2986
2987 case IEEE_PARAM_PRIVACY_INVOKED:
2988 ieee->privacy_invoked=value;
2989 break;
2990
2991 case IEEE_PARAM_AUTH_ALGS:
2992 ret = ieee80211_wpa_set_auth_algs(ieee, value);
2993 break;
2994
2995 case IEEE_PARAM_IEEE_802_1X:
2996 ieee->ieee802_1x=value;
2997 break;
2998 case IEEE_PARAM_WPAX_SELECT:
2999 // added for WPA2 mixed mode
3000 spin_lock_irqsave(&ieee->wpax_suitlist_lock,flags);
3001 ieee->wpax_type_set = 1;
3002 ieee->wpax_type_notify = value;
3003 spin_unlock_irqrestore(&ieee->wpax_suitlist_lock,flags);
3004 break;
3005
3006 default:
3007 printk("Unknown WPA param: %d\n",name);
3008 ret = -EOPNOTSUPP;
3009 }
3010
3011 return ret;
3012}
3013
3014/* implementation borrowed from hostap driver */
3015
3016static int ieee80211_wpa_set_encryption(struct ieee80211_device *ieee,
3017 struct ieee_param *param, int param_len)
3018{
3019 int ret = 0;
3020
3021 struct ieee80211_crypto_ops *ops;
3022 struct ieee80211_crypt_data **crypt;
3023
3024 struct ieee80211_security sec = {
3025 .flags = 0,
3026 };
3027
3028 param->u.crypt.err = 0;
3029 param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0';
3030
3031 if (param_len !=
3032 (int) ((char *) param->u.crypt.key - (char *) param) +
3033 param->u.crypt.key_len) {
3034 printk("Len mismatch %d, %d\n", param_len,
3035 param->u.crypt.key_len);
3036 return -EINVAL;
3037 }
3038 if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff &&
3039 param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff &&
3040 param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) {
3041 if (param->u.crypt.idx >= WEP_KEYS)
3042 return -EINVAL;
3043 crypt = &ieee->crypt[param->u.crypt.idx];
3044 } else {
3045 return -EINVAL;
3046 }
3047
3048 if (strcmp(param->u.crypt.alg, "none") == 0) {
3049 if (crypt) {
3050 sec.enabled = 0;
3051 // FIXME FIXME
3052 //sec.encrypt = 0;
3053 sec.level = SEC_LEVEL_0;
3054 sec.flags |= SEC_ENABLED | SEC_LEVEL;
3055 ieee80211_crypt_delayed_deinit(ieee, crypt);
3056 }
3057 goto done;
3058 }
3059 sec.enabled = 1;
3060// FIXME FIXME
3061// sec.encrypt = 1;
3062 sec.flags |= SEC_ENABLED;
3063
3064 /* IPW HW cannot build TKIP MIC, host decryption still needed. */
3065 if (!(ieee->host_encrypt || ieee->host_decrypt) &&
3066 strcmp(param->u.crypt.alg, "TKIP"))
3067 goto skip_host_crypt;
3068
3069 ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
3070 if (ops == NULL && strcmp(param->u.crypt.alg, "WEP") == 0)
3071 ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
3072 /* set WEP40 first, it will be modified according to WEP104 or
3073 * WEP40 at other place */
3074 else if (ops == NULL && strcmp(param->u.crypt.alg, "TKIP") == 0)
3075 ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
3076 else if (ops == NULL && strcmp(param->u.crypt.alg, "CCMP") == 0)
3077 ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
3078 if (ops == NULL) {
3079 printk("unknown crypto alg '%s'\n", param->u.crypt.alg);
3080 param->u.crypt.err = IEEE_CRYPT_ERR_UNKNOWN_ALG;
3081 ret = -EINVAL;
3082 goto done;
3083 }
3084
3085 if (*crypt == NULL || (*crypt)->ops != ops) {
3086 struct ieee80211_crypt_data *new_crypt;
3087
3088 ieee80211_crypt_delayed_deinit(ieee, crypt);
3089
3090 new_crypt = kmalloc(sizeof(*new_crypt), GFP_KERNEL);
3091 if (new_crypt == NULL) {
3092 ret = -ENOMEM;
3093 goto done;
3094 }
3095 memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data));
3096 new_crypt->ops = ops;
3097 if (new_crypt->ops)
3098 new_crypt->priv =
3099 new_crypt->ops->init(param->u.crypt.idx);
3100
3101 if (new_crypt->priv == NULL) {
3102 kfree(new_crypt);
3103 param->u.crypt.err = IEEE_CRYPT_ERR_CRYPT_INIT_FAILED;
3104 ret = -EINVAL;
3105 goto done;
3106 }
3107
3108 *crypt = new_crypt;
3109 }
3110
3111 if (param->u.crypt.key_len > 0 && (*crypt)->ops->set_key &&
3112 (*crypt)->ops->set_key(param->u.crypt.key,
3113 param->u.crypt.key_len, param->u.crypt.seq,
3114 (*crypt)->priv) < 0) {
3115 printk("key setting failed\n");
3116 param->u.crypt.err = IEEE_CRYPT_ERR_KEY_SET_FAILED;
3117 ret = -EINVAL;
3118 goto done;
3119 }
3120
3121 skip_host_crypt:
3122 if (param->u.crypt.set_tx) {
3123 ieee->tx_keyidx = param->u.crypt.idx;
3124 sec.active_key = param->u.crypt.idx;
3125 sec.flags |= SEC_ACTIVE_KEY;
3126 } else
3127 sec.flags &= ~SEC_ACTIVE_KEY;
3128
3129 if (param->u.crypt.alg != NULL) {
3130 memcpy(sec.keys[param->u.crypt.idx],
3131 param->u.crypt.key,
3132 param->u.crypt.key_len);
3133 sec.key_sizes[param->u.crypt.idx] = param->u.crypt.key_len;
3134 sec.flags |= (1 << param->u.crypt.idx);
3135
3136 if (strcmp(param->u.crypt.alg, "WEP") == 0) {
3137 sec.flags |= SEC_LEVEL;
3138 sec.level = SEC_LEVEL_1;
3139 } else if (strcmp(param->u.crypt.alg, "TKIP") == 0) {
3140 sec.flags |= SEC_LEVEL;
3141 sec.level = SEC_LEVEL_2;
3142 } else if (strcmp(param->u.crypt.alg, "CCMP") == 0) {
3143 sec.flags |= SEC_LEVEL;
3144 sec.level = SEC_LEVEL_3;
3145 }
3146 }
3147 done:
3148 if (ieee->set_security)
3149 ieee->set_security(ieee, &sec);
3150
3151 /* Do not reset port if card is in Managed mode since resetting will
3152 * generate new IEEE 802.11 authentication which may end up in looping
3153 * with IEEE 802.1X. If your hardware requires a reset after WEP
3154 * configuration (for example... Prism2), implement the reset_port in
3155 * the callbacks structures used to initialize the 802.11 stack. */
3156 if (ieee->reset_on_keychange &&
3157 ieee->iw_mode != IW_MODE_INFRA &&
3158 ieee->reset_port &&
3159 ieee->reset_port(ieee)) {
3160 printk("reset_port failed\n");
3161 param->u.crypt.err = IEEE_CRYPT_ERR_CARD_CONF_FAILED;
3162 return -EINVAL;
3163 }
3164
3165 return ret;
3166}
3167
3168inline struct sk_buff *ieee80211_disassociate_skb(
3169 struct ieee80211_network *beacon,
3170 struct ieee80211_device *ieee,
3171 u8 asRsn)
3172{
3173 struct sk_buff *skb;
3174 struct ieee80211_disassoc *disass;
3175
3176 skb = dev_alloc_skb(sizeof(struct ieee80211_disassoc));
3177 if (!skb)
3178 return NULL;
3179
3180 disass = (struct ieee80211_disassoc *) skb_put(skb,sizeof(struct ieee80211_disassoc));
3181 disass->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_DISASSOC);
3182 disass->header.duration_id = 0;
3183
3184 memcpy(disass->header.addr1, beacon->bssid, ETH_ALEN);
3185 memcpy(disass->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
3186 memcpy(disass->header.addr3, beacon->bssid, ETH_ALEN);
3187
3188 disass->reason = asRsn;
3189 return skb;
3190}
3191
3192
3193void
3194SendDisassociation(
3195 struct ieee80211_device *ieee,
3196 u8* asSta,
3197 u8 asRsn
3198)
3199{
3200 struct ieee80211_network *beacon = &ieee->current_network;
3201 struct sk_buff *skb;
3202 skb = ieee80211_disassociate_skb(beacon,ieee,asRsn);
3203 if (skb){
3204 softmac_mgmt_xmit(skb, ieee);
3205 //dev_kfree_skb_any(skb);//edit by thomas
3206 }
3207}
3208
3209int ieee80211_wpa_supplicant_ioctl(struct ieee80211_device *ieee, struct iw_point *p)
3210{
3211 struct ieee_param *param;
3212 int ret=0;
3213
3214 down(&ieee->wx_sem);
3215 //IEEE_DEBUG_INFO("wpa_supplicant: len=%d\n", p->length);
3216
3217 if (p->length < sizeof(struct ieee_param) || !p->pointer){
3218 ret = -EINVAL;
3219 goto out;
3220 }
3221
3222 param = kmalloc(p->length, GFP_KERNEL);
3223 if (param == NULL){
3224 ret = -ENOMEM;
3225 goto out;
3226 }
3227 if (copy_from_user(param, p->pointer, p->length)) {
3228 kfree(param);
3229 ret = -EFAULT;
3230 goto out;
3231 }
3232
3233 switch (param->cmd) {
3234
3235 case IEEE_CMD_SET_WPA_PARAM:
3236 ret = ieee80211_wpa_set_param(ieee, param->u.wpa_param.name,
3237 param->u.wpa_param.value);
3238 break;
3239
3240 case IEEE_CMD_SET_WPA_IE:
3241 ret = ieee80211_wpa_set_wpa_ie(ieee, param, p->length);
3242 break;
3243
3244 case IEEE_CMD_SET_ENCRYPTION:
3245 ret = ieee80211_wpa_set_encryption(ieee, param, p->length);
3246 break;
3247
3248 case IEEE_CMD_MLME:
3249 ret = ieee80211_wpa_mlme(ieee, param->u.mlme.command,
3250 param->u.mlme.reason_code);
3251 break;
3252
3253 default:
3254 printk("Unknown WPA supplicant request: %d\n",param->cmd);
3255 ret = -EOPNOTSUPP;
3256 break;
3257 }
3258
3259 if (ret == 0 && copy_to_user(p->pointer, param, p->length))
3260 ret = -EFAULT;
3261
3262 kfree(param);
3263out:
3264 up(&ieee->wx_sem);
3265
3266 return ret;
3267}
3268
3269void notify_wx_assoc_event(struct ieee80211_device *ieee)
3270{
3271 union iwreq_data wrqu;
3272 wrqu.ap_addr.sa_family = ARPHRD_ETHER;
3273 if (ieee->state == IEEE80211_LINKED)
3274 memcpy(wrqu.ap_addr.sa_data, ieee->current_network.bssid, ETH_ALEN);
3275 else
3276 memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
3277 wireless_send_event(ieee->dev, SIOCGIWAP, &wrqu, NULL);
3278}
diff --git a/drivers/staging/rtl8192e/ieee80211/rtl819x_BAProc.c b/drivers/staging/rtl8192e/ieee80211/rtl819x_BAProc.c
deleted file mode 100644
index b690cbc5136..00000000000
--- a/drivers/staging/rtl8192e/ieee80211/rtl819x_BAProc.c
+++ /dev/null
@@ -1,676 +0,0 @@
1/*
2 * This file is created to process BA Action Frame. According to 802.11 spec,
3 * there are 3 BA action types at all. And as BA is related to TS, this part
4 * need some struture defined in QOS side code. Also TX RX is going to be
5 * resturctured, so how to send ADDBAREQ ADDBARSP and DELBA packet is still
6 * on consideration. Temporarily use MANAGE QUEUE instead of Normal Queue.
7 */
8#include "ieee80211.h"
9#include "rtl819x_BA.h"
10
11/*
12 * Activate BA entry. And if Time is nozero, start timer.
13 */
14void ActivateBAEntry(struct ieee80211_device* ieee, PBA_RECORD pBA, u16 Time)
15{
16 pBA->bValid = true;
17 if(Time != 0)
18 mod_timer(&pBA->Timer, jiffies + MSECS(Time));
19}
20
21/*
22 * deactivate BA entry, including its timer.
23 */
24void DeActivateBAEntry( struct ieee80211_device* ieee, PBA_RECORD pBA)
25{
26 pBA->bValid = false;
27 del_timer_sync(&pBA->Timer);
28}
29
30/*
31 * deactivete BA entry in Tx Ts, and send DELBA.
32 */
33u8 TxTsDeleteBA( struct ieee80211_device* ieee, PTX_TS_RECORD pTxTs)
34{
35 PBA_RECORD pAdmittedBa = &pTxTs->TxAdmittedBARecord; //These two BA entries must exist in TS structure
36 PBA_RECORD pPendingBa = &pTxTs->TxPendingBARecord;
37 u8 bSendDELBA = false;
38
39 // Delete pending BA
40 if(pPendingBa->bValid)
41 {
42 DeActivateBAEntry(ieee, pPendingBa);
43 bSendDELBA = true;
44 }
45
46 // Delete admitted BA
47 if(pAdmittedBa->bValid)
48 {
49 DeActivateBAEntry(ieee, pAdmittedBa);
50 bSendDELBA = true;
51 }
52
53 return bSendDELBA;
54}
55
56/*
57 * deactivete BA entry in Tx Ts, and send DELBA.
58 */
59u8 RxTsDeleteBA( struct ieee80211_device* ieee, PRX_TS_RECORD pRxTs)
60{
61 PBA_RECORD pBa = &pRxTs->RxAdmittedBARecord;
62 u8 bSendDELBA = false;
63
64 if(pBa->bValid)
65 {
66 DeActivateBAEntry(ieee, pBa);
67 bSendDELBA = true;
68 }
69
70 return bSendDELBA;
71}
72
73/*
74 * reset BA entry
75 */
76void ResetBaEntry( PBA_RECORD pBA)
77{
78 pBA->bValid = false;
79 pBA->BaParamSet.shortData = 0;
80 pBA->BaTimeoutValue = 0;
81 pBA->DialogToken = 0;
82 pBA->BaStartSeqCtrl.ShortData = 0;
83}
84
85/*
86 * construct ADDBAREQ and ADDBARSP frame here together.
87 * return constructed skb to xmit
88 */
89static struct sk_buff* ieee80211_ADDBA(struct ieee80211_device* ieee, u8* Dst, PBA_RECORD pBA, u16 StatusCode, u8 type)
90{
91 struct sk_buff *skb = NULL;
92 struct ieee80211_hdr_3addr* BAReq = NULL;
93 u8* tag = NULL;
94 u16 tmp = 0;
95 u16 len = ieee->tx_headroom + 9;
96 //category(1) + action field(1) + Dialog Token(1) + BA Parameter Set(2) + BA Timeout Value(2) + BA Start SeqCtrl(2)(or StatusCode(2))
97 IEEE80211_DEBUG(IEEE80211_DL_TRACE | IEEE80211_DL_BA, "========>%s(), frame(%d) sentd to:%pM, ieee->dev:%p\n", __FUNCTION__, type, Dst, ieee->dev);
98 if (pBA == NULL||ieee == NULL)
99 {
100 IEEE80211_DEBUG(IEEE80211_DL_ERR, "pBA(%p) is NULL or ieee(%p) is NULL\n", pBA, ieee);
101 return NULL;
102 }
103 skb = dev_alloc_skb(len + sizeof( struct ieee80211_hdr_3addr)); //need to add something others? FIXME
104 if (skb == NULL)
105 {
106 IEEE80211_DEBUG(IEEE80211_DL_ERR, "can't alloc skb for ADDBA_REQ\n");
107 return NULL;
108 }
109
110 memset(skb->data, 0, sizeof( struct ieee80211_hdr_3addr)); //I wonder whether it's necessary. Apparently kernel will not do it when alloc a skb.
111 skb_reserve(skb, ieee->tx_headroom);
112
113 BAReq = ( struct ieee80211_hdr_3addr *) skb_put(skb,sizeof( struct ieee80211_hdr_3addr));
114
115 memcpy(BAReq->addr1, Dst, ETH_ALEN);
116 memcpy(BAReq->addr2, ieee->dev->dev_addr, ETH_ALEN);
117
118 memcpy(BAReq->addr3, ieee->current_network.bssid, ETH_ALEN);
119
120 BAReq->frame_ctl = cpu_to_le16(IEEE80211_STYPE_MANAGE_ACT); //action frame
121
122 //tag += sizeof( struct ieee80211_hdr_3addr); //move to action field
123 tag = (u8*)skb_put(skb, 9);
124 *tag ++= ACT_CAT_BA;
125 *tag ++= type;
126 // Dialog Token
127 *tag ++= pBA->DialogToken;
128
129 if (ACT_ADDBARSP == type)
130 {
131 // Status Code
132 printk("=====>to send ADDBARSP\n");
133 tmp = cpu_to_le16(StatusCode);
134 memcpy(tag, (u8*)&tmp, 2);
135 tag += 2;
136 }
137 // BA Parameter Set
138 tmp = cpu_to_le16(pBA->BaParamSet.shortData);
139 memcpy(tag, (u8*)&tmp, 2);
140 tag += 2;
141 // BA Timeout Value
142 tmp = cpu_to_le16(pBA->BaTimeoutValue);
143 memcpy(tag, (u8*)&tmp, 2);
144 tag += 2;
145
146 if (ACT_ADDBAREQ == type)
147 {
148 // BA Start SeqCtrl
149 memcpy(tag,(u8*)&(pBA->BaStartSeqCtrl), 2);
150 tag += 2;
151 }
152
153 IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA|IEEE80211_DL_BA, skb->data, skb->len);
154 return skb;
155 //return NULL;
156}
157
158/*
159 * construct DELBA frame
160 */
161static struct sk_buff* ieee80211_DELBA(
162 struct ieee80211_device* ieee,
163 u8* dst,
164 PBA_RECORD pBA,
165 TR_SELECT TxRxSelect,
166 u16 ReasonCode
167 )
168{
169 DELBA_PARAM_SET DelbaParamSet;
170 struct sk_buff *skb = NULL;
171 struct ieee80211_hdr_3addr* Delba = NULL;
172 u8* tag = NULL;
173 u16 tmp = 0;
174 //len = head len + DELBA Parameter Set(2) + Reason Code(2)
175 u16 len = 6 + ieee->tx_headroom;
176
177 if (net_ratelimit())
178 IEEE80211_DEBUG(IEEE80211_DL_TRACE | IEEE80211_DL_BA, "========>%s(), ReasonCode(%d) sentd to:%pM\n", __FUNCTION__, ReasonCode, dst);
179
180 memset(&DelbaParamSet, 0, 2);
181
182 DelbaParamSet.field.Initiator = (TxRxSelect==TX_DIR)?1:0;
183 DelbaParamSet.field.TID = pBA->BaParamSet.field.TID;
184
185 skb = dev_alloc_skb(len + sizeof( struct ieee80211_hdr_3addr)); //need to add something others? FIXME
186 if (skb == NULL)
187 {
188 IEEE80211_DEBUG(IEEE80211_DL_ERR, "can't alloc skb for ADDBA_REQ\n");
189 return NULL;
190 }
191// memset(skb->data, 0, len+sizeof( struct ieee80211_hdr_3addr));
192 skb_reserve(skb, ieee->tx_headroom);
193
194 Delba = ( struct ieee80211_hdr_3addr *) skb_put(skb,sizeof( struct ieee80211_hdr_3addr));
195
196 memcpy(Delba->addr1, dst, ETH_ALEN);
197 memcpy(Delba->addr2, ieee->dev->dev_addr, ETH_ALEN);
198 memcpy(Delba->addr3, ieee->current_network.bssid, ETH_ALEN);
199 Delba->frame_ctl = cpu_to_le16(IEEE80211_STYPE_MANAGE_ACT); //action frame
200
201 tag = (u8*)skb_put(skb, 6);
202
203 *tag ++= ACT_CAT_BA;
204 *tag ++= ACT_DELBA;
205
206 // DELBA Parameter Set
207 tmp = cpu_to_le16(DelbaParamSet.shortData);
208 memcpy(tag, (u8*)&tmp, 2);
209 tag += 2;
210 // Reason Code
211 tmp = cpu_to_le16(ReasonCode);
212 memcpy(tag, (u8*)&tmp, 2);
213 tag += 2;
214
215 IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA|IEEE80211_DL_BA, skb->data, skb->len);
216 if (net_ratelimit())
217 IEEE80211_DEBUG(IEEE80211_DL_TRACE | IEEE80211_DL_BA, "<=====%s()\n", __FUNCTION__);
218 return skb;
219}
220
221/*
222 * send ADDBAReq frame out
223 * If any possible, please hide pBA in ieee.
224 * And temporarily use Manage Queue as softmac_mgmt_xmit() usually does
225 */
226void ieee80211_send_ADDBAReq(struct ieee80211_device* ieee, u8* dst, PBA_RECORD pBA)
227{
228 struct sk_buff *skb = NULL;
229 skb = ieee80211_ADDBA(ieee, dst, pBA, 0, ACT_ADDBAREQ); //construct ACT_ADDBAREQ frames so set statuscode zero.
230
231 if (skb)
232 {
233 softmac_mgmt_xmit(skb, ieee);
234 //add statistic needed here.
235 //and skb will be freed in softmac_mgmt_xmit(), so omit all dev_kfree_skb_any() outside softmac_mgmt_xmit()
236 //WB
237 }
238 else
239 {
240 IEEE80211_DEBUG(IEEE80211_DL_ERR, "alloc skb error in function %s()\n", __FUNCTION__);
241 }
242}
243
244/*
245 * send ADDBARSP frame out
246 * If any possible, please hide pBA in ieee.
247 * And temporarily use Manage Queue as softmac_mgmt_xmit() usually does
248 */
249void ieee80211_send_ADDBARsp(struct ieee80211_device* ieee, u8* dst, PBA_RECORD pBA, u16 StatusCode)
250{
251 struct sk_buff *skb = NULL;
252 skb = ieee80211_ADDBA(ieee, dst, pBA, StatusCode, ACT_ADDBARSP); //construct ACT_ADDBARSP frames
253 if (skb)
254 {
255 softmac_mgmt_xmit(skb, ieee);
256 //same above
257 }
258 else
259 {
260 IEEE80211_DEBUG(IEEE80211_DL_ERR, "alloc skb error in function %s()\n", __FUNCTION__);
261 }
262}
263
264/*
265 * send ADDBARSP frame out
266 * If any possible, please hide pBA in ieee.
267 * And temporarily use Manage Queue as softmac_mgmt_xmit() usually does
268 */
269void ieee80211_send_DELBA(struct ieee80211_device* ieee, u8* dst, PBA_RECORD pBA, TR_SELECT TxRxSelect, u16 ReasonCode)
270{
271 struct sk_buff *skb = NULL;
272 skb = ieee80211_DELBA(ieee, dst, pBA, TxRxSelect, ReasonCode); //construct ACT_ADDBARSP frames
273 if (skb)
274 {
275 softmac_mgmt_xmit(skb, ieee);
276 //same above
277 }
278 else
279 {
280 IEEE80211_DEBUG(IEEE80211_DL_ERR, "alloc skb error in function %s()\n", __FUNCTION__);
281 }
282 return ;
283}
284
285int ieee80211_rx_ADDBAReq( struct ieee80211_device* ieee, struct sk_buff *skb)
286{
287 struct ieee80211_hdr_3addr* req = NULL;
288 u16 rc = 0;
289 u8 * dst = NULL, *pDialogToken = NULL, *tag = NULL;
290 PBA_RECORD pBA = NULL;
291 PBA_PARAM_SET pBaParamSet = NULL;
292 u16* pBaTimeoutVal = NULL;
293 PSEQUENCE_CONTROL pBaStartSeqCtrl = NULL;
294 PRX_TS_RECORD pTS = NULL;
295
296 if (skb->len < sizeof( struct ieee80211_hdr_3addr) + 9)
297 {
298 IEEE80211_DEBUG(IEEE80211_DL_ERR, " Invalid skb len in BAREQ(%d / %zu)\n", skb->len, (sizeof( struct ieee80211_hdr_3addr) + 9));
299 return -1;
300 }
301
302 IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA|IEEE80211_DL_BA, skb->data, skb->len);
303
304 req = ( struct ieee80211_hdr_3addr*) skb->data;
305 tag = (u8*)req;
306 dst = (u8*)(&req->addr2[0]);
307 tag += sizeof( struct ieee80211_hdr_3addr);
308 pDialogToken = tag + 2; //category+action
309 pBaParamSet = (PBA_PARAM_SET)(tag + 3); //+DialogToken
310 pBaTimeoutVal = (u16*)(tag + 5);
311 pBaStartSeqCtrl = (PSEQUENCE_CONTROL)(req + 7);
312
313 printk("====================>rx ADDBAREQ from :%pM\n", dst);
314//some other capability is not ready now.
315 if( (ieee->current_network.qos_data.active == 0) ||
316 (ieee->pHTInfo->bCurrentHTSupport == false)) //||
317 // (ieee->pStaQos->bEnableRxImmBA == false) )
318 {
319 rc = ADDBA_STATUS_REFUSED;
320 IEEE80211_DEBUG(IEEE80211_DL_ERR, "Failed to reply on ADDBA_REQ as some capability is not ready(%d, %d)\n", ieee->current_network.qos_data.active, ieee->pHTInfo->bCurrentHTSupport);
321 goto OnADDBAReq_Fail;
322 }
323 // Search for related traffic stream.
324 // If there is no matched TS, reject the ADDBA request.
325 if( !GetTs(
326 ieee,
327 (PTS_COMMON_INFO*)(&pTS),
328 dst,
329 (u8)(pBaParamSet->field.TID),
330 RX_DIR,
331 true) )
332 {
333 rc = ADDBA_STATUS_REFUSED;
334 IEEE80211_DEBUG(IEEE80211_DL_ERR, "can't get TS in %s()\n", __FUNCTION__);
335 goto OnADDBAReq_Fail;
336 }
337 pBA = &pTS->RxAdmittedBARecord;
338 // To Determine the ADDBA Req content
339 // We can do much more check here, including BufferSize, AMSDU_Support, Policy, StartSeqCtrl...
340 // I want to check StartSeqCtrl to make sure when we start aggregation!!!
341 //
342 if(pBaParamSet->field.BAPolicy == BA_POLICY_DELAYED)
343 {
344 rc = ADDBA_STATUS_INVALID_PARAM;
345 IEEE80211_DEBUG(IEEE80211_DL_ERR, "BA Policy is not correct in %s()\n", __FUNCTION__);
346 goto OnADDBAReq_Fail;
347 }
348 // Admit the ADDBA Request
349 //
350 DeActivateBAEntry(ieee, pBA);
351 pBA->DialogToken = *pDialogToken;
352 pBA->BaParamSet = *pBaParamSet;
353 pBA->BaTimeoutValue = *pBaTimeoutVal;
354 pBA->BaStartSeqCtrl = *pBaStartSeqCtrl;
355 //for half N mode we only aggregate 1 frame
356 if (ieee->GetHalfNmodeSupportByAPsHandler(ieee))
357 pBA->BaParamSet.field.BufferSize = 1;
358 else
359 pBA->BaParamSet.field.BufferSize = 32;
360 ActivateBAEntry(ieee, pBA, pBA->BaTimeoutValue);
361 ieee80211_send_ADDBARsp(ieee, dst, pBA, ADDBA_STATUS_SUCCESS);
362
363 // End of procedure.
364 return 0;
365
366OnADDBAReq_Fail:
367 {
368 BA_RECORD BA;
369 BA.BaParamSet = *pBaParamSet;
370 BA.BaTimeoutValue = *pBaTimeoutVal;
371 BA.DialogToken = *pDialogToken;
372 BA.BaParamSet.field.BAPolicy = BA_POLICY_IMMEDIATE;
373 ieee80211_send_ADDBARsp(ieee, dst, &BA, rc);
374 return 0; //we send RSP out.
375 }
376
377}
378
379int ieee80211_rx_ADDBARsp( struct ieee80211_device* ieee, struct sk_buff *skb)
380{
381 struct ieee80211_hdr_3addr* rsp = NULL;
382 PBA_RECORD pPendingBA, pAdmittedBA;
383 PTX_TS_RECORD pTS = NULL;
384 u8* dst = NULL, *pDialogToken = NULL, *tag = NULL;
385 u16* pStatusCode = NULL, *pBaTimeoutVal = NULL;
386 PBA_PARAM_SET pBaParamSet = NULL;
387 u16 ReasonCode;
388
389 if (skb->len < sizeof( struct ieee80211_hdr_3addr) + 9)
390 {
391 IEEE80211_DEBUG(IEEE80211_DL_ERR, " Invalid skb len in BARSP(%d / %zu)\n", skb->len, (sizeof( struct ieee80211_hdr_3addr) + 9));
392 return -1;
393 }
394 rsp = ( struct ieee80211_hdr_3addr*)skb->data;
395 tag = (u8*)rsp;
396 dst = (u8*)(&rsp->addr2[0]);
397 tag += sizeof( struct ieee80211_hdr_3addr);
398 pDialogToken = tag + 2;
399 pStatusCode = (u16*)(tag + 3);
400 pBaParamSet = (PBA_PARAM_SET)(tag + 5);
401 pBaTimeoutVal = (u16*)(tag + 7);
402
403 // Check the capability
404 // Since we can always receive A-MPDU, we just check if it is under HT mode.
405 if( ieee->current_network.qos_data.active == 0 ||
406 ieee->pHTInfo->bCurrentHTSupport == false ||
407 ieee->pHTInfo->bCurrentAMPDUEnable == false )
408 {
409 IEEE80211_DEBUG(IEEE80211_DL_ERR, "reject to ADDBA_RSP as some capability is not ready(%d, %d, %d)\n",ieee->current_network.qos_data.active, ieee->pHTInfo->bCurrentHTSupport, ieee->pHTInfo->bCurrentAMPDUEnable);
410 ReasonCode = DELBA_REASON_UNKNOWN_BA;
411 goto OnADDBARsp_Reject;
412 }
413
414
415 //
416 // Search for related TS.
417 // If there is no TS found, we wil reject ADDBA Rsp by sending DELBA frame.
418 //
419 if (!GetTs(
420 ieee,
421 (PTS_COMMON_INFO*)(&pTS),
422 dst,
423 (u8)(pBaParamSet->field.TID),
424 TX_DIR,
425 false) )
426 {
427 IEEE80211_DEBUG(IEEE80211_DL_ERR, "can't get TS in %s()\n", __FUNCTION__);
428 ReasonCode = DELBA_REASON_UNKNOWN_BA;
429 goto OnADDBARsp_Reject;
430 }
431
432 pTS->bAddBaReqInProgress = false;
433 pPendingBA = &pTS->TxPendingBARecord;
434 pAdmittedBA = &pTS->TxAdmittedBARecord;
435
436
437 //
438 // Check if related BA is waiting for setup.
439 // If not, reject by sending DELBA frame.
440 //
441 if((pAdmittedBA->bValid==true))
442 {
443 // Since BA is already setup, we ignore all other ADDBA Response.
444 IEEE80211_DEBUG(IEEE80211_DL_BA, "OnADDBARsp(): Recv ADDBA Rsp. Drop because already admit it! \n");
445 return -1;
446 }
447 else if((pPendingBA->bValid == false) ||(*pDialogToken != pPendingBA->DialogToken))
448 {
449 IEEE80211_DEBUG(IEEE80211_DL_ERR, "OnADDBARsp(): Recv ADDBA Rsp. BA invalid, DELBA! \n");
450 ReasonCode = DELBA_REASON_UNKNOWN_BA;
451 goto OnADDBARsp_Reject;
452 }
453 else
454 {
455 IEEE80211_DEBUG(IEEE80211_DL_BA, "OnADDBARsp(): Recv ADDBA Rsp. BA is admitted! Status code:%X\n", *pStatusCode);
456 DeActivateBAEntry(ieee, pPendingBA);
457 }
458
459
460 if(*pStatusCode == ADDBA_STATUS_SUCCESS)
461 {
462 //
463 // Determine ADDBA Rsp content here.
464 // We can compare the value of BA parameter set that Peer returned and Self sent.
465 // If it is OK, then admitted. Or we can send DELBA to cancel BA mechanism.
466 //
467 if(pBaParamSet->field.BAPolicy == BA_POLICY_DELAYED)
468 {
469 // Since this is a kind of ADDBA failed, we delay next ADDBA process.
470 pTS->bAddBaReqDelayed = true;
471 DeActivateBAEntry(ieee, pAdmittedBA);
472 ReasonCode = DELBA_REASON_END_BA;
473 goto OnADDBARsp_Reject;
474 }
475
476
477 //
478 // Admitted condition
479 //
480 pAdmittedBA->DialogToken = *pDialogToken;
481 pAdmittedBA->BaTimeoutValue = *pBaTimeoutVal;
482 pAdmittedBA->BaStartSeqCtrl = pPendingBA->BaStartSeqCtrl;
483 pAdmittedBA->BaParamSet = *pBaParamSet;
484 DeActivateBAEntry(ieee, pAdmittedBA);
485 ActivateBAEntry(ieee, pAdmittedBA, *pBaTimeoutVal);
486 }
487 else
488 {
489 // Delay next ADDBA process.
490 pTS->bAddBaReqDelayed = true;
491 }
492
493 // End of procedure
494 return 0;
495
496OnADDBARsp_Reject:
497 {
498 BA_RECORD BA;
499 BA.BaParamSet = *pBaParamSet;
500 ieee80211_send_DELBA(ieee, dst, &BA, TX_DIR, ReasonCode);
501 return 0;
502 }
503
504}
505
506int ieee80211_rx_DELBA(struct ieee80211_device* ieee,struct sk_buff *skb)
507{
508 struct ieee80211_hdr_3addr* delba = NULL;
509 PDELBA_PARAM_SET pDelBaParamSet = NULL;
510 u16* pReasonCode = NULL;
511 u8* dst = NULL;
512
513 if (skb->len < sizeof( struct ieee80211_hdr_3addr) + 6)
514 {
515 IEEE80211_DEBUG(IEEE80211_DL_ERR, " Invalid skb len in DELBA(%d / %zu)\n", skb->len, (sizeof( struct ieee80211_hdr_3addr) + 6));
516 return -1;
517 }
518
519 if(ieee->current_network.qos_data.active == 0 ||
520 ieee->pHTInfo->bCurrentHTSupport == false )
521 {
522 IEEE80211_DEBUG(IEEE80211_DL_ERR, "received DELBA while QOS or HT is not supported(%d, %d)\n",ieee->current_network.qos_data.active, ieee->pHTInfo->bCurrentHTSupport);
523 return -1;
524 }
525
526 IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA|IEEE80211_DL_BA, skb->data, skb->len);
527 delba = ( struct ieee80211_hdr_3addr*)skb->data;
528 dst = (u8*)(&delba->addr2[0]);
529 delba += sizeof( struct ieee80211_hdr_3addr);
530 pDelBaParamSet = (PDELBA_PARAM_SET)(delba+2);
531 pReasonCode = (u16*)(delba+4);
532
533 if(pDelBaParamSet->field.Initiator == 1)
534 {
535 PRX_TS_RECORD pRxTs;
536
537 if( !GetTs(
538 ieee,
539 (PTS_COMMON_INFO*)&pRxTs,
540 dst,
541 (u8)pDelBaParamSet->field.TID,
542 RX_DIR,
543 false) )
544 {
545 IEEE80211_DEBUG(IEEE80211_DL_ERR, "can't get TS for RXTS in %s()\n", __FUNCTION__);
546 return -1;
547 }
548
549 RxTsDeleteBA(ieee, pRxTs);
550 }
551 else
552 {
553 PTX_TS_RECORD pTxTs;
554
555 if(!GetTs(
556 ieee,
557 (PTS_COMMON_INFO*)&pTxTs,
558 dst,
559 (u8)pDelBaParamSet->field.TID,
560 TX_DIR,
561 false) )
562 {
563 IEEE80211_DEBUG(IEEE80211_DL_ERR, "can't get TS for TXTS in %s()\n", __FUNCTION__);
564 return -1;
565 }
566
567 pTxTs->bUsingBa = false;
568 pTxTs->bAddBaReqInProgress = false;
569 pTxTs->bAddBaReqDelayed = false;
570 del_timer_sync(&pTxTs->TsAddBaTimer);
571 //PlatformCancelTimer(Adapter, &pTxTs->TsAddBaTimer);
572 TxTsDeleteBA(ieee, pTxTs);
573 }
574 return 0;
575}
576
577/* ADDBA initiate. This can only be called by TX side. */
578void
579TsInitAddBA(
580 struct ieee80211_device* ieee,
581 PTX_TS_RECORD pTS,
582 u8 Policy,
583 u8 bOverwritePending
584 )
585{
586 PBA_RECORD pBA = &pTS->TxPendingBARecord;
587
588 if(pBA->bValid==true && bOverwritePending==false)
589 return;
590
591 // Set parameters to "Pending" variable set
592 DeActivateBAEntry(ieee, pBA);
593
594 pBA->DialogToken++; // DialogToken: Only keep the latest dialog token
595 pBA->BaParamSet.field.AMSDU_Support = 0; // Do not support A-MSDU with A-MPDU now!!
596 pBA->BaParamSet.field.BAPolicy = Policy; // Policy: Delayed or Immediate
597 pBA->BaParamSet.field.TID = pTS->TsCommonInfo.TSpec.f.TSInfo.field.ucTSID; // TID
598 // BufferSize: This need to be set according to A-MPDU vector
599 pBA->BaParamSet.field.BufferSize = 32; // BufferSize: This need to be set according to A-MPDU vector
600 pBA->BaTimeoutValue = 0; // Timeout value: Set 0 to disable Timer
601 pBA->BaStartSeqCtrl.field.SeqNum = (pTS->TxCurSeq + 3) % 4096; // Block Ack will start after 3 packets later.
602
603 ActivateBAEntry(ieee, pBA, BA_SETUP_TIMEOUT);
604
605 ieee80211_send_ADDBAReq(ieee, pTS->TsCommonInfo.Addr, pBA);
606}
607
608void
609TsInitDelBA( struct ieee80211_device* ieee, PTS_COMMON_INFO pTsCommonInfo, TR_SELECT TxRxSelect)
610{
611
612 if(TxRxSelect == TX_DIR)
613 {
614 PTX_TS_RECORD pTxTs = (PTX_TS_RECORD)pTsCommonInfo;
615
616 if(TxTsDeleteBA(ieee, pTxTs))
617 ieee80211_send_DELBA(
618 ieee,
619 pTsCommonInfo->Addr,
620 (pTxTs->TxAdmittedBARecord.bValid)?(&pTxTs->TxAdmittedBARecord):(&pTxTs->TxPendingBARecord),
621 TxRxSelect,
622 DELBA_REASON_END_BA);
623 }
624 else if(TxRxSelect == RX_DIR)
625 {
626 PRX_TS_RECORD pRxTs = (PRX_TS_RECORD)pTsCommonInfo;
627 if(RxTsDeleteBA(ieee, pRxTs))
628 ieee80211_send_DELBA(
629 ieee,
630 pTsCommonInfo->Addr,
631 &pRxTs->RxAdmittedBARecord,
632 TxRxSelect,
633 DELBA_REASON_END_BA );
634 }
635}
636
637/*
638 * BA setup timer
639 * acturally we send TX_TS_RECORD or RX_TS_RECORD to these timer
640 */
641void BaSetupTimeOut(unsigned long data)
642{
643 PTX_TS_RECORD pTxTs = (PTX_TS_RECORD)data;
644
645 pTxTs->bAddBaReqInProgress = false;
646 pTxTs->bAddBaReqDelayed = true;
647 pTxTs->TxPendingBARecord.bValid = false;
648}
649
650void TxBaInactTimeout(unsigned long data)
651{
652 PTX_TS_RECORD pTxTs = (PTX_TS_RECORD)data;
653 struct ieee80211_device *ieee = container_of(pTxTs, struct ieee80211_device, TxTsRecord[pTxTs->num]);
654 TxTsDeleteBA(ieee, pTxTs);
655 ieee80211_send_DELBA(
656 ieee,
657 pTxTs->TsCommonInfo.Addr,
658 &pTxTs->TxAdmittedBARecord,
659 TX_DIR,
660 DELBA_REASON_TIMEOUT);
661}
662
663void RxBaInactTimeout(unsigned long data)
664{
665 PRX_TS_RECORD pRxTs = (PRX_TS_RECORD)data;
666 struct ieee80211_device *ieee = container_of(pRxTs, struct ieee80211_device, RxTsRecord[pRxTs->num]);
667
668 RxTsDeleteBA(ieee, pRxTs);
669 ieee80211_send_DELBA(
670 ieee,
671 pRxTs->TsCommonInfo.Addr,
672 &pRxTs->RxAdmittedBARecord,
673 RX_DIR,
674 DELBA_REASON_TIMEOUT);
675}
676
diff --git a/drivers/staging/rtl8192e/ieee80211/rtl819x_HTProc.c b/drivers/staging/rtl8192e/ieee80211/rtl819x_HTProc.c
deleted file mode 100644
index f7a9da3ec82..00000000000
--- a/drivers/staging/rtl8192e/ieee80211/rtl819x_HTProc.c
+++ /dev/null
@@ -1,1732 +0,0 @@
1
2//As this function is mainly ported from Windows driver, so leave the name little changed. If any confusion caused, tell me. Created by WB. 2008.05.08
3#include "ieee80211.h"
4#include "rtl819x_HT.h"
5u8 MCS_FILTER_ALL[16] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
6
7u8 MCS_FILTER_1SS[16] = {0xff, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
8
9u16 MCS_DATA_RATE[2][2][77] =
10 { { {13, 26, 39, 52, 78, 104, 117, 130, 26, 52, 78 ,104, 156, 208, 234, 260,
11 39, 78, 117, 234, 312, 351, 390, 52, 104, 156, 208, 312, 416, 468, 520,
12 0, 78, 104, 130, 117, 156, 195, 104, 130, 130, 156, 182, 182, 208, 156, 195,
13 195, 234, 273, 273, 312, 130, 156, 181, 156, 181, 208, 234, 208, 234, 260, 260,
14 286, 195, 234, 273, 234, 273, 312, 351, 312, 351, 390, 390, 429}, // Long GI, 20MHz
15 {14, 29, 43, 58, 87, 116, 130, 144, 29, 58, 87, 116, 173, 231, 260, 289,
16 43, 87, 130, 173, 260, 347, 390, 433, 58, 116, 173, 231, 347, 462, 520, 578,
17 0, 87, 116, 144, 130, 173, 217, 116, 144, 144, 173, 202, 202, 231, 173, 217,
18 217, 260, 303, 303, 347, 144, 173, 202, 173, 202, 231, 260, 231, 260, 289, 289,
19 318, 217, 260, 303, 260, 303, 347, 390, 347, 390, 433, 433, 477} }, // Short GI, 20MHz
20 { {27, 54, 81, 108, 162, 216, 243, 270, 54, 108, 162, 216, 324, 432, 486, 540,
21 81, 162, 243, 324, 486, 648, 729, 810, 108, 216, 324, 432, 648, 864, 972, 1080,
22 12, 162, 216, 270, 243, 324, 405, 216, 270, 270, 324, 378, 378, 432, 324, 405,
23 405, 486, 567, 567, 648, 270, 324, 378, 324, 378, 432, 486, 432, 486, 540, 540,
24 594, 405, 486, 567, 486, 567, 648, 729, 648, 729, 810, 810, 891}, // Long GI, 40MHz
25 {30, 60, 90, 120, 180, 240, 270, 300, 60, 120, 180, 240, 360, 480, 540, 600,
26 90, 180, 270, 360, 540, 720, 810, 900, 120, 240, 360, 480, 720, 960, 1080, 1200,
27 13, 180, 240, 300, 270, 360, 450, 240, 300, 300, 360, 420, 420, 480, 360, 450,
28 450, 540, 630, 630, 720, 300, 360, 420, 360, 420, 480, 540, 480, 540, 600, 600,
29 660, 450, 540, 630, 540, 630, 720, 810, 720, 810, 900, 900, 990} } // Short GI, 40MHz
30 };
31
32static const u8 UNKNOWN_BORADCOM[3] = {0x00, 0x14, 0xbf};
33static const u8 LINKSYSWRT330_LINKSYSWRT300_BROADCOM[3] = {0x00, 0x1a, 0x70};
34static const u8 LINKSYSWRT350_LINKSYSWRT150_BROADCOM[3] = {0x00, 0x1d, 0x7e};
35//static u8 NETGEAR834Bv2_BROADCOM[3] = {0x00, 0x1b, 0x2f};
36static const u8 BELKINF5D8233V1_RALINK[3] = {0x00, 0x17, 0x3f};
37static const u8 BELKINF5D82334V3_RALINK[3] = {0x00, 0x1c, 0xdf};
38static const u8 PCI_RALINK[3] = {0x00, 0x90, 0xcc};
39static const u8 EDIMAX_RALINK[3] = {0x00, 0x0e, 0x2e};
40static const u8 AIRLINK_RALINK[3] = {0x00, 0x18, 0x02};
41static const u8 DLINK_ATHEROS[3] = {0x00, 0x1c, 0xf0};
42static const u8 CISCO_BROADCOM[3] = {0x00, 0x17, 0x94};
43static const u8 LINKSYS_MARVELL_4400N[3] = {0x00, 0x14, 0xa4};
44
45// 2008/04/01 MH For Cisco G mode RX TP We need to change FW duration. Should we put the
46// code in other place??
47//static u8 WIFI_CISCO_G_AP[3] = {0x00, 0x40, 0x96};
48/********************************************************************************************************************
49 *function: This function update default settings in pHTInfo structure
50 * input: PRT_HIGH_THROUGHPUT pHTInfo
51 * output: none
52 * return: none
53 * notice: These value need be modified if any changes.
54 * *****************************************************************************************************************/
55void HTUpdateDefaultSetting(struct ieee80211_device* ieee)
56{
57 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
58
59 // ShortGI support
60 pHTInfo->bRegShortGI20MHz= 1;
61 pHTInfo->bRegShortGI40MHz= 1;
62
63 // 40MHz channel support
64 pHTInfo->bRegBW40MHz = 1;
65
66 // CCK rate support in 40MHz channel
67 if(pHTInfo->bRegBW40MHz)
68 pHTInfo->bRegSuppCCK = 1;
69 else
70 pHTInfo->bRegSuppCCK = true;
71
72 // AMSDU related
73 pHTInfo->nAMSDU_MaxSize = 7935UL;
74 pHTInfo->bAMSDU_Support = 0;
75
76 // AMPDU related
77 pHTInfo->bAMPDUEnable = 1;
78 pHTInfo->AMPDU_Factor = 2; //// 0: 2n13(8K), 1:2n14(16K), 2:2n15(32K), 3:2n16(64k)
79 pHTInfo->MPDU_Density = 0;// 0: No restriction, 1: 1/8usec, 2: 1/4usec, 3: 1/2usec, 4: 1usec, 5: 2usec, 6: 4usec, 7:8usec
80
81 // MIMO Power Save
82 pHTInfo->SelfMimoPs = 3;// 0: Static Mimo Ps, 1: Dynamic Mimo Ps, 3: No Limitation, 2: Reserved(Set to 3 automatically.)
83 if(pHTInfo->SelfMimoPs == 2)
84 pHTInfo->SelfMimoPs = 3;
85 // 8190 only. Assign rate operation mode to firmware
86 ieee->bTxDisableRateFallBack = 0;
87 ieee->bTxUseDriverAssingedRate = 0;
88
89#ifdef TO_DO_LIST
90 // 8190 only. Assign duration operation mode to firmware
91 pMgntInfo->bTxEnableFwCalcDur = (BOOLEAN)pNdisCommon->bRegTxEnableFwCalcDur;
92#endif
93 // 8190 only, Realtek proprietary aggregation mode
94 // Set MPDUDensity=2, 1: Set MPDUDensity=2(32k) for Realtek AP and set MPDUDensity=0(8k) for others
95 pHTInfo->bRegRT2RTAggregation = 1;//0: Set MPDUDensity=2, 1: Set MPDUDensity=2(32k) for Realtek AP and set MPDUDensity=0(8k) for others
96
97 // For Rx Reorder Control
98 pHTInfo->bRegRxReorderEnable = 1;
99 pHTInfo->RxReorderWinSize = 64;
100 pHTInfo->RxReorderPendingTime = 30;
101
102#ifdef USB_TX_DRIVER_AGGREGATION_ENABLE
103 pHTInfo->UsbTxAggrNum = 4;
104#endif
105#ifdef USB_RX_AGGREGATION_SUPPORT
106 pHTInfo->UsbRxFwAggrEn = 1;
107 pHTInfo->UsbRxFwAggrPageNum = 24;
108 pHTInfo->UsbRxFwAggrPacketNum = 8;
109 pHTInfo->UsbRxFwAggrTimeout = 16; ////usb rx FW aggregation timeout threshold.It's in units of 64us
110#endif
111
112
113}
114/********************************************************************************************************************
115 *function: This function print out each field on HT capability IE mainly from (Beacon/ProbeRsp/AssocReq)
116 * input: u8* CapIE //Capability IE to be printed out
117 * u8* TitleString //mainly print out caller function
118 * output: none
119 * return: none
120 * notice: Driver should not print out this message by default.
121 * *****************************************************************************************************************/
122void HTDebugHTCapability(u8* CapIE, u8* TitleString )
123{
124
125 static u8 EWC11NHTCap[] = {0x00, 0x90, 0x4c, 0x33}; // For 11n EWC definition, 2007.07.17, by Emily
126 PHT_CAPABILITY_ELE pCapELE;
127
128 if(!memcmp(CapIE, EWC11NHTCap, sizeof(EWC11NHTCap)))
129 {
130 //EWC IE
131 IEEE80211_DEBUG(IEEE80211_DL_HT, "EWC IE in %s()\n", __FUNCTION__);
132 pCapELE = (PHT_CAPABILITY_ELE)(&CapIE[4]);
133 }else
134 pCapELE = (PHT_CAPABILITY_ELE)(&CapIE[0]);
135
136 IEEE80211_DEBUG(IEEE80211_DL_HT, "<Log HT Capability>. Called by %s\n", TitleString );
137
138 IEEE80211_DEBUG(IEEE80211_DL_HT, "\tSupported Channel Width = %s\n", (pCapELE->ChlWidth)?"20MHz": "20/40MHz");
139 IEEE80211_DEBUG(IEEE80211_DL_HT, "\tSupport Short GI for 20M = %s\n", (pCapELE->ShortGI20Mhz)?"YES": "NO");
140 IEEE80211_DEBUG(IEEE80211_DL_HT, "\tSupport Short GI for 40M = %s\n", (pCapELE->ShortGI40Mhz)?"YES": "NO");
141 IEEE80211_DEBUG(IEEE80211_DL_HT, "\tSupport TX STBC = %s\n", (pCapELE->TxSTBC)?"YES": "NO");
142 IEEE80211_DEBUG(IEEE80211_DL_HT, "\tMax AMSDU Size = %s\n", (pCapELE->MaxAMSDUSize)?"3839": "7935");
143 IEEE80211_DEBUG(IEEE80211_DL_HT, "\tSupport CCK in 20/40 mode = %s\n", (pCapELE->DssCCk)?"YES": "NO");
144 IEEE80211_DEBUG(IEEE80211_DL_HT, "\tMax AMPDU Factor = %d\n", pCapELE->MaxRxAMPDUFactor);
145 IEEE80211_DEBUG(IEEE80211_DL_HT, "\tMPDU Density = %d\n", pCapELE->MPDUDensity);
146 IEEE80211_DEBUG(IEEE80211_DL_HT, "\tMCS Rate Set = [%x][%x][%x][%x][%x]\n", pCapELE->MCS[0],\
147 pCapELE->MCS[1], pCapELE->MCS[2], pCapELE->MCS[3], pCapELE->MCS[4]);
148}
149/********************************************************************************************************************
150 *function: This function print out each field on HT Information IE mainly from (Beacon/ProbeRsp)
151 * input: u8* InfoIE //Capability IE to be printed out
152 * u8* TitleString //mainly print out caller function
153 * output: none
154 * return: none
155 * notice: Driver should not print out this message by default.
156 * *****************************************************************************************************************/
157void HTDebugHTInfo(u8* InfoIE, u8* TitleString)
158{
159
160 static u8 EWC11NHTInfo[] = {0x00, 0x90, 0x4c, 0x34}; // For 11n EWC definition, 2007.07.17, by Emily
161 PHT_INFORMATION_ELE pHTInfoEle;
162
163 if(!memcmp(InfoIE, EWC11NHTInfo, sizeof(EWC11NHTInfo)))
164 {
165 // Not EWC IE
166 IEEE80211_DEBUG(IEEE80211_DL_HT, "EWC IE in %s()\n", __FUNCTION__);
167 pHTInfoEle = (PHT_INFORMATION_ELE)(&InfoIE[4]);
168 }else
169 pHTInfoEle = (PHT_INFORMATION_ELE)(&InfoIE[0]);
170
171
172 IEEE80211_DEBUG(IEEE80211_DL_HT, "<Log HT Information Element>. Called by %s\n", TitleString);
173
174 IEEE80211_DEBUG(IEEE80211_DL_HT, "\tPrimary channel = %d\n", pHTInfoEle->ControlChl);
175 IEEE80211_DEBUG(IEEE80211_DL_HT, "\tSenondary channel =");
176 switch(pHTInfoEle->ExtChlOffset)
177 {
178 case 0:
179 IEEE80211_DEBUG(IEEE80211_DL_HT, "Not Present\n");
180 break;
181 case 1:
182 IEEE80211_DEBUG(IEEE80211_DL_HT, "Upper channel\n");
183 break;
184 case 2:
185 IEEE80211_DEBUG(IEEE80211_DL_HT, "Reserved. Eooro!!!\n");
186 break;
187 case 3:
188 IEEE80211_DEBUG(IEEE80211_DL_HT, "Lower Channel\n");
189 break;
190 }
191 IEEE80211_DEBUG(IEEE80211_DL_HT, "\tRecommended channel width = %s\n", (pHTInfoEle->RecommemdedTxWidth)?"20Mhz": "40Mhz");
192
193 IEEE80211_DEBUG(IEEE80211_DL_HT, "\tOperation mode for protection = ");
194 switch(pHTInfoEle->OptMode)
195 {
196 case 0:
197 IEEE80211_DEBUG(IEEE80211_DL_HT, "No Protection\n");
198 break;
199 case 1:
200 IEEE80211_DEBUG(IEEE80211_DL_HT, "HT non-member protection mode\n");
201 break;
202 case 2:
203 IEEE80211_DEBUG(IEEE80211_DL_HT, "Suggest to open protection\n");
204 break;
205 case 3:
206 IEEE80211_DEBUG(IEEE80211_DL_HT, "HT mixed mode\n");
207 break;
208 }
209
210 IEEE80211_DEBUG(IEEE80211_DL_HT, "\tBasic MCS Rate Set = [%x][%x][%x][%x][%x]\n", pHTInfoEle->BasicMSC[0],\
211 pHTInfoEle->BasicMSC[1], pHTInfoEle->BasicMSC[2], pHTInfoEle->BasicMSC[3], pHTInfoEle->BasicMSC[4]);
212}
213
214/*
215* Return: true if station in half n mode and AP supports 40 bw
216*/
217bool IsHTHalfNmode40Bandwidth(struct ieee80211_device* ieee)
218{
219 bool retValue = false;
220 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
221
222 if(pHTInfo->bCurrentHTSupport == false ) // wireless is n mode
223 retValue = false;
224 else if(pHTInfo->bRegBW40MHz == false) // station supports 40 bw
225 retValue = false;
226 else if (!ieee->GetHalfNmodeSupportByAPsHandler(ieee)) // station in half n mode
227 retValue = false;
228 else if(((PHT_CAPABILITY_ELE)(pHTInfo->PeerHTCapBuf))->ChlWidth) // ap support 40 bw
229 retValue = true;
230 else
231 retValue = false;
232
233 return retValue;
234}
235
236bool IsHTHalfNmodeSGI(struct ieee80211_device* ieee, bool is40MHz)
237{
238 bool retValue = false;
239 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
240
241 if(pHTInfo->bCurrentHTSupport == false ) // wireless is n mode
242 retValue = false;
243 else if (!ieee->GetHalfNmodeSupportByAPsHandler(ieee)) // station in half n mode
244 retValue = false;
245 else if(is40MHz) // ap support 40 bw
246 {
247 if(((PHT_CAPABILITY_ELE)(pHTInfo->PeerHTCapBuf))->ShortGI40Mhz) // ap support 40 bw short GI
248 retValue = true;
249 else
250 retValue = false;
251 }
252 else
253 {
254 if(((PHT_CAPABILITY_ELE)(pHTInfo->PeerHTCapBuf))->ShortGI20Mhz) // ap support 40 bw short GI
255 retValue = true;
256 else
257 retValue = false;
258 }
259
260 return retValue;
261}
262
263u16 HTHalfMcsToDataRate(struct ieee80211_device* ieee, u8 nMcsRate)
264{
265
266 u8 is40MHz;
267 u8 isShortGI;
268
269 is40MHz = (IsHTHalfNmode40Bandwidth(ieee))?1:0;
270 isShortGI = (IsHTHalfNmodeSGI(ieee, is40MHz))? 1:0;
271
272 return MCS_DATA_RATE[is40MHz][isShortGI][(nMcsRate&0x7f)];
273}
274
275
276u16 HTMcsToDataRate( struct ieee80211_device* ieee, u8 nMcsRate)
277{
278 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
279
280 u8 is40MHz = (pHTInfo->bCurBW40MHz)?1:0;
281 u8 isShortGI = (pHTInfo->bCurBW40MHz)?
282 ((pHTInfo->bCurShortGI40MHz)?1:0):
283 ((pHTInfo->bCurShortGI20MHz)?1:0);
284 return MCS_DATA_RATE[is40MHz][isShortGI][(nMcsRate&0x7f)];
285}
286
287/********************************************************************************************************************
288 *function: This function returns current datarate.
289 * input: struct ieee80211_device* ieee
290 * u8 nDataRate
291 * output: none
292 * return: tx rate
293 * notice: quite unsure about how to use this function //wb
294 * *****************************************************************************************************************/
295u16 TxCountToDataRate( struct ieee80211_device* ieee, u8 nDataRate)
296{
297 //PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
298 u16 CCKOFDMRate[12] = {0x02 , 0x04 , 0x0b , 0x16 , 0x0c , 0x12 , 0x18 , 0x24 , 0x30 , 0x48 , 0x60 , 0x6c};
299 u8 is40MHz = 0;
300 u8 isShortGI = 0;
301
302 if(nDataRate < 12)
303 {
304 return CCKOFDMRate[nDataRate];
305 }
306 else
307 {
308 if (nDataRate >= 0x10 && nDataRate <= 0x1f)//if(nDataRate > 11 && nDataRate < 28 )
309 {
310 is40MHz = 0;
311 isShortGI = 0;
312
313 // nDataRate = nDataRate - 12;
314 }
315 else if(nDataRate >=0x20 && nDataRate <= 0x2f ) //(27, 44)
316 {
317 is40MHz = 1;
318 isShortGI = 0;
319
320 //nDataRate = nDataRate - 28;
321 }
322 else if(nDataRate >= 0x30 && nDataRate <= 0x3f ) //(43, 60)
323 {
324 is40MHz = 0;
325 isShortGI = 1;
326
327 //nDataRate = nDataRate - 44;
328 }
329 else if(nDataRate >= 0x40 && nDataRate <= 0x4f ) //(59, 76)
330 {
331 is40MHz = 1;
332 isShortGI = 1;
333
334 //nDataRate = nDataRate - 60;
335 }
336 return MCS_DATA_RATE[is40MHz][isShortGI][nDataRate&0xf];
337 }
338}
339
340
341
342bool IsHTHalfNmodeAPs(struct ieee80211_device* ieee)
343{
344 bool retValue = false;
345 struct ieee80211_network* net = &ieee->current_network;
346#if 0
347 if(ieee->bHalfNMode == false)
348 retValue = false;
349 else
350#endif
351 if((memcmp(net->bssid, BELKINF5D8233V1_RALINK, 3)==0) ||
352 (memcmp(net->bssid, BELKINF5D82334V3_RALINK, 3)==0) ||
353 (memcmp(net->bssid, PCI_RALINK, 3)==0) ||
354 (memcmp(net->bssid, EDIMAX_RALINK, 3)==0) ||
355 (memcmp(net->bssid, AIRLINK_RALINK, 3)==0) ||
356 (net->ralink_cap_exist))
357 retValue = true;
358 else if((memcmp(net->bssid, UNKNOWN_BORADCOM, 3)==0) ||
359 (memcmp(net->bssid, LINKSYSWRT330_LINKSYSWRT300_BROADCOM, 3)==0)||
360 (memcmp(net->bssid, LINKSYSWRT350_LINKSYSWRT150_BROADCOM, 3)==0)||
361 //(memcmp(net->bssid, NETGEAR834Bv2_BROADCOM, 3)==0) ||
362 (net->broadcom_cap_exist))
363 retValue = true;
364 else if(net->bssht.bdRT2RTAggregation)
365 retValue = true;
366 else
367 retValue = false;
368
369 return retValue;
370}
371
372/********************************************************************************************************************
373 *function: This function returns peer IOT.
374 * input: struct ieee80211_device* ieee
375 * output: none
376 * return:
377 * notice:
378 * *****************************************************************************************************************/
379void HTIOTPeerDetermine(struct ieee80211_device* ieee)
380{
381 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
382 struct ieee80211_network* net = &ieee->current_network;
383 if(net->bssht.bdRT2RTAggregation)
384 pHTInfo->IOTPeer = HT_IOT_PEER_REALTEK;
385 else if(net->broadcom_cap_exist){
386 pHTInfo->IOTPeer = HT_IOT_PEER_BROADCOM;
387 }
388 else if((memcmp(net->bssid, UNKNOWN_BORADCOM, 3)==0) ||
389 (memcmp(net->bssid, LINKSYSWRT330_LINKSYSWRT300_BROADCOM, 3)==0)||
390 (memcmp(net->bssid, LINKSYSWRT350_LINKSYSWRT150_BROADCOM, 3)==0)){//||
391 //(memcmp(net->bssid, NETGEAR834Bv2_BROADCOM, 3)==0) ){
392 pHTInfo->IOTPeer = HT_IOT_PEER_BROADCOM;
393 }
394 else if((memcmp(net->bssid, BELKINF5D8233V1_RALINK, 3)==0) ||
395 (memcmp(net->bssid, BELKINF5D82334V3_RALINK, 3)==0) ||
396 (memcmp(net->bssid, PCI_RALINK, 3)==0) ||
397 (memcmp(net->bssid, EDIMAX_RALINK, 3)==0) ||
398 (memcmp(net->bssid, AIRLINK_RALINK, 3)==0) ||
399 net->ralink_cap_exist)
400 pHTInfo->IOTPeer = HT_IOT_PEER_RALINK;
401 else if((net->atheros_cap_exist )|| (memcmp(net->bssid, DLINK_ATHEROS, 3) == 0))
402 pHTInfo->IOTPeer = HT_IOT_PEER_ATHEROS;
403 else if(memcmp(net->bssid, CISCO_BROADCOM, 3)==0)
404 pHTInfo->IOTPeer = HT_IOT_PEER_CISCO;
405 else if ((memcmp(net->bssid, LINKSYS_MARVELL_4400N, 3) == 0) ||
406 net->marvell_cap_exist){
407 pHTInfo->IOTPeer = HT_IOT_PEER_MARVELL;
408 }
409 else
410 pHTInfo->IOTPeer = HT_IOT_PEER_UNKNOWN;
411
412 IEEE80211_DEBUG(IEEE80211_DL_IOT, "Joseph debug!! IOTPEER: %x\n", pHTInfo->IOTPeer);
413}
414/********************************************************************************************************************
415 *function: Check whether driver should declare received rate up to MCS13 only since some chipset is not good
416 * at receiving MCS14~15 frame from some AP.
417 * input: struct ieee80211_device* ieee
418 * u8 * PeerMacAddr
419 * output: none
420 * return: return 1 if driver should declare MCS13 only(otherwise return 0)
421 * *****************************************************************************************************************/
422u8 HTIOTActIsDisableMCS14(struct ieee80211_device* ieee, u8* PeerMacAddr)
423{
424 u8 ret = 0;
425#if 0
426 // Apply for 819u only
427#if (HAL_CODE_BASE==RTL8192 && DEV_BUS_TYPE==USB_INTERFACE)
428 if((memcmp(PeerMacAddr, UNKNOWN_BORADCOM, 3)==0) ||
429 (memcmp(PeerMacAddr, LINKSYSWRT330_LINKSYSWRT300_BROADCOM, 3)==0)
430 )
431 {
432 ret = 1;
433 }
434
435
436 if(pHTInfo->bCurrentRT2RTAggregation)
437 {
438 // The parameter of pHTInfo->bCurrentRT2RTAggregation must be decided previously
439 ret = 1;
440 }
441#endif
442#endif
443 return ret;
444 }
445
446u8 HTIOTActIsForcedCTS2Self(struct ieee80211_device *ieee, struct ieee80211_network *network)
447{
448 u8 retValue = 0;
449 //if(network->marvell_cap_exist)
450 if(ieee->pHTInfo->IOTPeer == HT_IOT_PEER_MARVELL)
451 {
452 retValue = 1;
453 }
454
455 return retValue;
456}
457
458
459/**
460* Function: HTIOTActIsDisableMCS15
461*
462* Overview: Check whether driver should declare capability of receiving MCS15
463*
464* Input:
465* PADAPTER Adapter,
466*
467* Output: None
468* Return: true if driver should disable MCS15
469* 2008.04.15 Emily
470*/
471bool HTIOTActIsDisableMCS15(struct ieee80211_device* ieee)
472{
473 bool retValue = false;
474
475#ifdef TODO
476 // Apply for 819u only
477#if (HAL_CODE_BASE==RTL8192)
478
479#if (DEV_BUS_TYPE == USB_INTERFACE)
480 // Alway disable MCS15 by Jerry Chang's request.by Emily, 2008.04.15
481 retValue = true;
482#elif (DEV_BUS_TYPE == PCI_INTERFACE)
483 // Enable MCS15 if the peer is Cisco AP. by Emily, 2008.05.12
484// if(pBssDesc->bCiscoCapExist)
485// retValue = false;
486// else
487 retValue = false;
488#endif
489#endif
490#endif
491 // Jerry Chang suggest that 8190 1x2 does not need to disable MCS15
492
493 return retValue;
494}
495
496/**
497* Function: HTIOTActIsDisableMCSTwoSpatialStream
498*
499* Overview: Check whether driver should declare capability of receiving All 2 ss packets
500*
501* Input:
502* PADAPTER Adapter,
503*
504* Output: None
505* Return: true if driver should disable all two spatial stream packet
506* 2008.04.21 Emily
507*/
508bool HTIOTActIsDisableMCSTwoSpatialStream(struct ieee80211_device* ieee, u8 *PeerMacAddr)
509{
510 bool retValue = false;
511
512#ifdef TODO
513 // Apply for 819u only
514//#if (HAL_CODE_BASE==RTL8192)
515
516 //This rule only apply to Belkin(Ralink) AP
517 if(IS_UNDER_11N_AES_MODE(Adapter))
518 {
519 if((PlatformCompareMemory(PeerMacAddr, BELKINF5D8233V1_RALINK, 3)==0) ||
520 (PlatformCompareMemory(PeerMacAddr, PCI_RALINK, 3)==0) ||
521 (PlatformCompareMemory(PeerMacAddr, EDIMAX_RALINK, 3)==0))
522 {
523 //Set True to disable this function. Disable by default, Emily, 2008.04.23
524 retValue = false;
525 }
526 }
527
528//#endif
529#endif
530 return retValue;
531}
532
533/********************************************************************************************************************
534 *function: Check whether driver should disable EDCA turbo mode
535 * input: struct ieee80211_device* ieee
536 * u8* PeerMacAddr
537 * output: none
538 * return: return 1 if driver should disable EDCA turbo mode(otherwise return 0)
539 * *****************************************************************************************************************/
540u8 HTIOTActIsDisableEDCATurbo(struct ieee80211_device* ieee, u8* PeerMacAddr)
541{
542 u8 retValue = false; // default enable EDCA Turbo mode.
543 // Set specific EDCA parameter for different AP in DM handler.
544
545 return retValue;
546#if 0
547 if((memcmp(PeerMacAddr, UNKNOWN_BORADCOM, 3)==0)||
548 (memcmp(PeerMacAddr, LINKSYSWRT330_LINKSYSWRT300_BROADCOM, 3)==0)||
549 (memcmp(PeerMacAddr, LINKSYSWRT350_LINKSYSWRT150_BROADCOM, 3)==0)||
550 (memcmp(PeerMacAddr, NETGEAR834Bv2_BROADCOM, 3)==0))
551
552 {
553 retValue = 1; //Linksys disable EDCA turbo mode
554 }
555
556 return retValue;
557#endif
558}
559
560/********************************************************************************************************************
561 *function: Check whether we need to use OFDM to sned MGNT frame for broadcom AP
562 * input: struct ieee80211_network *network //current network we live
563 * output: none
564 * return: return 1 if true
565 * *****************************************************************************************************************/
566u8 HTIOTActIsMgntUseCCK6M(struct ieee80211_network *network)
567{
568 u8 retValue = 0;
569
570 // 2008/01/25 MH Judeg if we need to use OFDM to sned MGNT frame for broadcom AP.
571 // 2008/01/28 MH We must prevent that we select null bssid to link.
572
573 if(network->broadcom_cap_exist)
574 {
575 retValue = 1;
576 }
577
578 return retValue;
579}
580
581u8 HTIOTActIsCCDFsync(u8* PeerMacAddr)
582{
583 u8 retValue = 0;
584 if( (memcmp(PeerMacAddr, UNKNOWN_BORADCOM, 3)==0) ||
585 (memcmp(PeerMacAddr, LINKSYSWRT330_LINKSYSWRT300_BROADCOM, 3)==0) ||
586 (memcmp(PeerMacAddr, LINKSYSWRT350_LINKSYSWRT150_BROADCOM, 3) ==0))
587 {
588 retValue = 1;
589 }
590
591 return retValue;
592}
593
594//
595// Send null data for to tell AP that we are awake.
596//
597bool
598HTIOTActIsNullDataPowerSaving(struct ieee80211_device* ieee,struct ieee80211_network *network)
599{
600 bool retValue = false;
601
602 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
603 {
604 if(pHTInfo->IOTPeer == HT_IOT_PEER_BROADCOM) // ||(pBssDesc->Vender == HT_IOT_PEER_ATHEROS && pBssDesc->SubTypeOfVender == HT_IOT_PEER_ATHEROS_DIR635))
605 return true;
606
607 }
608 return retValue;
609}
610
611void HTResetIOTSetting(
612 PRT_HIGH_THROUGHPUT pHTInfo
613)
614{
615 pHTInfo->IOTAction = 0;
616 pHTInfo->IOTPeer = HT_IOT_PEER_UNKNOWN;
617}
618
619
620/********************************************************************************************************************
621 *function: Construct Capablility Element in Beacon... if HTEnable is turned on
622 * input: struct ieee80211_device* ieee
623 * u8* posHTCap //pointer to store Capability Ele
624 * u8* len //store length of CE
625 * u8 IsEncrypt //whether encrypt, needed further
626 * output: none
627 * return: none
628 * notice: posHTCap can't be null and should be initialized before.
629 * *****************************************************************************************************************/
630void HTConstructCapabilityElement(struct ieee80211_device* ieee, u8* posHTCap, u8* len, u8 IsEncrypt)
631{
632 PRT_HIGH_THROUGHPUT pHT = ieee->pHTInfo;
633 PHT_CAPABILITY_ELE pCapELE = NULL;
634 //u8 bIsDeclareMCS13;
635
636 if ((posHTCap == NULL) || (pHT == NULL))
637 {
638 IEEE80211_DEBUG(IEEE80211_DL_ERR, "posHTCap or pHTInfo can't be null in HTConstructCapabilityElement()\n");
639 return;
640 }
641 memset(posHTCap, 0, *len);
642 if(pHT->ePeerHTSpecVer == HT_SPEC_VER_EWC)
643 {
644 u8 EWC11NHTCap[] = {0x00, 0x90, 0x4c, 0x33}; // For 11n EWC definition, 2007.07.17, by Emily
645 memcpy(posHTCap, EWC11NHTCap, sizeof(EWC11NHTCap));
646 pCapELE = (PHT_CAPABILITY_ELE)&(posHTCap[4]);
647 }else
648 {
649 pCapELE = (PHT_CAPABILITY_ELE)posHTCap;
650 }
651
652
653 //HT capability info
654 pCapELE->AdvCoding = 0; // This feature is not supported now!!
655 if (ieee->GetHalfNmodeSupportByAPsHandler(ieee))
656 {
657 pCapELE->ChlWidth = 0;
658 }
659 else
660 {
661 pCapELE->ChlWidth = (pHT->bRegBW40MHz?1:0);
662 }
663
664// pCapELE->ChlWidth = (pHT->bRegBW40MHz?1:0);
665 pCapELE->MimoPwrSave = pHT->SelfMimoPs;
666 pCapELE->GreenField = 0; // This feature is not supported now!!
667 pCapELE->ShortGI20Mhz = 1; // We can receive Short GI!!
668 pCapELE->ShortGI40Mhz = 1; // We can receive Short GI!!
669 //DbgPrint("TX HT cap/info ele BW=%d SG20=%d SG40=%d\n\r",
670 //pCapELE->ChlWidth, pCapELE->ShortGI20Mhz, pCapELE->ShortGI40Mhz);
671 pCapELE->TxSTBC = 1;
672 pCapELE->RxSTBC = 0;
673 pCapELE->DelayBA = 0; // Do not support now!!
674 pCapELE->MaxAMSDUSize = (MAX_RECEIVE_BUFFER_SIZE>=7935)?1:0;
675 pCapELE->DssCCk = ((pHT->bRegBW40MHz)?(pHT->bRegSuppCCK?1:0):0);
676 pCapELE->PSMP = 0; // Do not support now!!
677 pCapELE->LSigTxopProtect = 0; // Do not support now!!
678
679
680 //MAC HT parameters info
681 // TODO: Nedd to take care of this part
682 IEEE80211_DEBUG(IEEE80211_DL_HT, "TX HT cap/info ele BW=%d MaxAMSDUSize:%d DssCCk:%d\n", pCapELE->ChlWidth, pCapELE->MaxAMSDUSize, pCapELE->DssCCk);
683
684 if( IsEncrypt)
685 {
686 pCapELE->MPDUDensity = 7; // 8us
687 pCapELE->MaxRxAMPDUFactor = 2; // 2 is for 32 K and 3 is 64K
688 }
689 else
690 {
691 pCapELE->MaxRxAMPDUFactor = 3; // 2 is for 32 K and 3 is 64K
692 pCapELE->MPDUDensity = 0; // no density
693 }
694
695 //Supported MCS set
696 memcpy(pCapELE->MCS, ieee->Regdot11HTOperationalRateSet, 16);
697 if(pHT->IOTAction & HT_IOT_ACT_DISABLE_MCS15)
698 pCapELE->MCS[1] &= 0x7f;
699
700 if(pHT->IOTAction & HT_IOT_ACT_DISABLE_MCS14)
701 pCapELE->MCS[1] &= 0xbf;
702
703 if(pHT->IOTAction & HT_IOT_ACT_DISABLE_ALL_2SS)
704 pCapELE->MCS[1] &= 0x00;
705
706 // 2008.06.12
707 // For RTL819X, if pairwisekey = wep/tkip, ap is ralink, we support only MCS0~7.
708 if (ieee->GetHalfNmodeSupportByAPsHandler(ieee))
709 {
710 int i;
711 for(i = 1; i< 16; i++)
712 pCapELE->MCS[i] = 0;
713 }
714
715 //Extended HT Capability Info
716 memset(&pCapELE->ExtHTCapInfo, 0, 2);
717
718
719 //TXBF Capabilities
720 memset(pCapELE->TxBFCap, 0, 4);
721
722 //Antenna Selection Capabilities
723 pCapELE->ASCap = 0;
724//add 2 to give space for element ID and len when construct frames
725 if(pHT->ePeerHTSpecVer == HT_SPEC_VER_EWC)
726 *len = 30 + 2;
727 else
728 *len = 26 + 2;
729}
730/********************************************************************************************************************
731 *function: Construct Information Element in Beacon... if HTEnable is turned on
732 * input: struct ieee80211_device* ieee
733 * u8* posHTCap //pointer to store Information Ele
734 * u8* len //store len of
735 * u8 IsEncrypt //whether encrypt, needed further
736 * output: none
737 * return: none
738 * notice: posHTCap can't be null and be initialized before. only AP and IBSS sta should do this
739 * *****************************************************************************************************************/
740void HTConstructInfoElement(struct ieee80211_device* ieee, u8* posHTInfo, u8* len, u8 IsEncrypt)
741{
742 PRT_HIGH_THROUGHPUT pHT = ieee->pHTInfo;
743 PHT_INFORMATION_ELE pHTInfoEle = (PHT_INFORMATION_ELE)posHTInfo;
744 if ((posHTInfo == NULL) || (pHTInfoEle == NULL))
745 {
746 IEEE80211_DEBUG(IEEE80211_DL_ERR, "posHTInfo or pHTInfoEle can't be null in HTConstructInfoElement()\n");
747 return;
748 }
749
750 memset(posHTInfo, 0, *len);
751 if ( (ieee->iw_mode == IW_MODE_ADHOC) || (ieee->iw_mode == IW_MODE_MASTER)) //ap mode is not currently supported
752 {
753 pHTInfoEle->ControlChl = ieee->current_network.channel;
754 pHTInfoEle->ExtChlOffset = ((pHT->bRegBW40MHz == false)?HT_EXTCHNL_OFFSET_NO_EXT:
755 (ieee->current_network.channel<=6)?
756 HT_EXTCHNL_OFFSET_UPPER:HT_EXTCHNL_OFFSET_LOWER);
757 pHTInfoEle->RecommemdedTxWidth = pHT->bRegBW40MHz;
758 pHTInfoEle->RIFS = 0;
759 pHTInfoEle->PSMPAccessOnly = 0;
760 pHTInfoEle->SrvIntGranularity = 0;
761 pHTInfoEle->OptMode = pHT->CurrentOpMode;
762 pHTInfoEle->NonGFDevPresent = 0;
763 pHTInfoEle->DualBeacon = 0;
764 pHTInfoEle->SecondaryBeacon = 0;
765 pHTInfoEle->LSigTxopProtectFull = 0;
766 pHTInfoEle->PcoActive = 0;
767 pHTInfoEle->PcoPhase = 0;
768
769 memset(pHTInfoEle->BasicMSC, 0, 16);
770
771
772 *len = 22 + 2; //same above
773
774 }
775 else
776 {
777 //STA should not generate High Throughput Information Element
778 *len = 0;
779 }
780}
781
782/*
783 * According to experiment, Realtek AP to STA (based on rtl8190) may achieve best performance
784 * if both STA and AP set limitation of aggregation size to 32K, that is, set AMPDU density to 2
785 * (Ref: IEEE 11n specification). However, if Realtek STA associates to other AP, STA should set
786 * limitation of aggregation size to 8K, otherwise, performance of traffic stream from STA to AP
787 * will be much less than the traffic stream from AP to STA if both of the stream runs concurrently
788 * at the same time.
789 *
790 * Frame Format
791 * Element ID Length OUI Type1 Reserved
792 * 1 byte 1 byte 3 bytes 1 byte 1 byte
793 *
794 * OUI = 0x00, 0xe0, 0x4c,
795 * Type = 0x02
796 * Reserved = 0x00
797 *
798 * 2007.8.21 by Emily
799*/
800/********************************************************************************************************************
801 *function: Construct Information Element in Beacon... in RT2RT condition
802 * input: struct ieee80211_device* ieee
803 * u8* posRT2RTAgg //pointer to store Information Ele
804 * u8* len //store len
805 * output: none
806 * return: none
807 * notice:
808 * *****************************************************************************************************************/
809void HTConstructRT2RTAggElement(struct ieee80211_device* ieee, u8* posRT2RTAgg, u8* len)
810{
811 if (posRT2RTAgg == NULL) {
812 IEEE80211_DEBUG(IEEE80211_DL_ERR, "posRT2RTAgg can't be null in HTConstructRT2RTAggElement()\n");
813 return;
814 }
815 memset(posRT2RTAgg, 0, *len);
816 *posRT2RTAgg++ = 0x00;
817 *posRT2RTAgg++ = 0xe0;
818 *posRT2RTAgg++ = 0x4c;
819 *posRT2RTAgg++ = 0x02;
820 *posRT2RTAgg++ = 0x01;
821 *posRT2RTAgg = 0x10;//*posRT2RTAgg = 0x02;
822
823 if(ieee->bSupportRemoteWakeUp) {
824 *posRT2RTAgg |= 0x08;//RT_HT_CAP_USE_WOW;
825 }
826
827 *len = 6 + 2;
828 return;
829#ifdef TODO
830#if(HAL_CODE_BASE == RTL8192 && DEV_BUS_TYPE == USB_INTERFACE)
831 /*
832 //Emily. If it is required to Ask Realtek AP to send AMPDU during AES mode, enable this
833 section of code.
834 if(IS_UNDER_11N_AES_MODE(Adapter))
835 {
836 posRT2RTAgg->Octet[5] |=RT_HT_CAP_USE_AMPDU;
837 }else
838 {
839 posRT2RTAgg->Octet[5] &= 0xfb;
840 }
841 */
842
843#else
844 // Do Nothing
845#endif
846
847 posRT2RTAgg->Length = 6;
848#endif
849
850
851
852
853}
854
855
856/********************************************************************************************************************
857 *function: Pick the right Rate Adaptive table to use
858 * input: struct ieee80211_device* ieee
859 * u8* pOperateMCS //A pointer to MCS rate bitmap
860 * return: always we return true
861 * notice:
862 * *****************************************************************************************************************/
863u8 HT_PickMCSRate(struct ieee80211_device* ieee, u8* pOperateMCS)
864{
865 u8 i;
866 if (pOperateMCS == NULL)
867 {
868 IEEE80211_DEBUG(IEEE80211_DL_ERR, "pOperateMCS can't be null in HT_PickMCSRate()\n");
869 return false;
870 }
871
872 switch(ieee->mode)
873 {
874 case IEEE_A:
875 case IEEE_B:
876 case IEEE_G:
877 //legacy rate routine handled at selectedrate
878
879 //no MCS rate
880 for(i=0;i<=15;i++){
881 pOperateMCS[i] = 0;
882 }
883 break;
884
885 case IEEE_N_24G: //assume CCK rate ok
886 case IEEE_N_5G:
887 // Legacy part we only use 6, 5.5,2,1 for N_24G and 6 for N_5G.
888 // Legacy part shall be handled at SelectRateSet().
889
890 //HT part
891 // TODO: may be different if we have different number of antenna
892 pOperateMCS[0] &=RATE_ADPT_1SS_MASK; //support MCS 0~7
893 pOperateMCS[1] &=RATE_ADPT_2SS_MASK;
894 pOperateMCS[3] &=RATE_ADPT_MCS32_MASK;
895 break;
896
897 //should never reach here
898 default:
899
900 break;
901
902 }
903
904 return true;
905}
906
907/*
908* Description:
909* This function will get the highest speed rate in input MCS set.
910*
911* /param Adapter Pionter to Adapter entity
912* pMCSRateSet Pointer to MCS rate bitmap
913* pMCSFilter Pointer to MCS rate filter
914*
915* /return Highest MCS rate included in pMCSRateSet and filtered by pMCSFilter.
916*
917*/
918/********************************************************************************************************************
919 *function: This function will get the highest speed rate in input MCS set.
920 * input: struct ieee80211_device* ieee
921 * u8* pMCSRateSet //Pointer to MCS rate bitmap
922 * u8* pMCSFilter //Pointer to MCS rate filter
923 * return: Highest MCS rate included in pMCSRateSet and filtered by pMCSFilter
924 * notice:
925 * *****************************************************************************************************************/
926u8 HTGetHighestMCSRate(struct ieee80211_device* ieee, u8* pMCSRateSet, u8* pMCSFilter)
927{
928 u8 i, j;
929 u8 bitMap;
930 u8 mcsRate = 0;
931 u8 availableMcsRate[16];
932 if (pMCSRateSet == NULL || pMCSFilter == NULL)
933 {
934 IEEE80211_DEBUG(IEEE80211_DL_ERR, "pMCSRateSet or pMCSFilter can't be null in HTGetHighestMCSRate()\n");
935 return false;
936 }
937 for(i=0; i<16; i++)
938 availableMcsRate[i] = pMCSRateSet[i] & pMCSFilter[i];
939
940 for(i = 0; i < 16; i++)
941 {
942 if(availableMcsRate[i] != 0)
943 break;
944 }
945 if(i == 16)
946 return false;
947
948 for(i = 0; i < 16; i++)
949 {
950 if(availableMcsRate[i] != 0)
951 {
952 bitMap = availableMcsRate[i];
953 for(j = 0; j < 8; j++)
954 {
955 if((bitMap%2) != 0)
956 {
957 if(HTMcsToDataRate(ieee, (8*i+j)) > HTMcsToDataRate(ieee, mcsRate))
958 mcsRate = (8*i+j);
959 }
960 bitMap = bitMap>>1;
961 }
962 }
963 }
964 return (mcsRate|0x80);
965}
966
967
968
969/*
970**
971**1.Filter our operation rate set with AP's rate set
972**2.shall reference channel bandwidth, STBC, Antenna number
973**3.generate rate adative table for firmware
974**David 20060906
975**
976** \pHTSupportedCap: the connected STA's supported rate Capability element
977*/
978u8 HTFilterMCSRate( struct ieee80211_device* ieee, u8* pSupportMCS, u8* pOperateMCS)
979{
980
981 u8 i=0;
982
983 // filter out operational rate set not supported by AP, the lenth of it is 16
984 for(i=0;i<=15;i++){
985 pOperateMCS[i] = ieee->Regdot11HTOperationalRateSet[i]&pSupportMCS[i];
986 }
987
988
989 // TODO: adjust our operational rate set according to our channel bandwidth, STBC and Antenna number
990
991 // TODO: fill suggested rate adaptive rate index and give firmware info using Tx command packet
992 // we also shall suggested the first start rate set according to our singal strength
993 HT_PickMCSRate(ieee, pOperateMCS);
994
995 // For RTL819X, if pairwisekey = wep/tkip, we support only MCS0~7.
996 if (ieee->GetHalfNmodeSupportByAPsHandler(ieee))
997 pOperateMCS[1] = 0;
998
999 //
1000 // For RTL819X, we support only MCS0~15.
1001 // And also, we do not know how to use MCS32 now.
1002 //
1003 for(i=2; i<=15; i++)
1004 pOperateMCS[i] = 0;
1005
1006 return true;
1007}
1008void HTSetConnectBwMode(struct ieee80211_device* ieee, HT_CHANNEL_WIDTH Bandwidth, HT_EXTCHNL_OFFSET Offset);
1009void HTOnAssocRsp(struct ieee80211_device *ieee)
1010{
1011 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
1012 PHT_CAPABILITY_ELE pPeerHTCap = NULL;
1013 PHT_INFORMATION_ELE pPeerHTInfo = NULL;
1014 u16 nMaxAMSDUSize = 0;
1015 u8* pMcsFilter = NULL;
1016
1017 static u8 EWC11NHTCap[] = {0x00, 0x90, 0x4c, 0x33}; // For 11n EWC definition, 2007.07.17, by Emily
1018 static u8 EWC11NHTInfo[] = {0x00, 0x90, 0x4c, 0x34}; // For 11n EWC definition, 2007.07.17, by Emily
1019
1020 if( pHTInfo->bCurrentHTSupport == false )
1021 {
1022 IEEE80211_DEBUG(IEEE80211_DL_ERR, "<=== HTOnAssocRsp(): HT_DISABLE\n");
1023 return;
1024 }
1025 IEEE80211_DEBUG(IEEE80211_DL_HT, "===> HTOnAssocRsp_wq(): HT_ENABLE\n");
1026// IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA, pHTInfo->PeerHTCapBuf, sizeof(HT_CAPABILITY_ELE));
1027// IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA, pHTInfo->PeerHTInfoBuf, sizeof(HT_INFORMATION_ELE));
1028
1029// HTDebugHTCapability(pHTInfo->PeerHTCapBuf,"HTOnAssocRsp_wq");
1030// HTDebugHTInfo(pHTInfo->PeerHTInfoBuf,"HTOnAssocRsp_wq");
1031 //
1032 if(!memcmp(pHTInfo->PeerHTCapBuf,EWC11NHTCap, sizeof(EWC11NHTCap)))
1033 pPeerHTCap = (PHT_CAPABILITY_ELE)(&pHTInfo->PeerHTCapBuf[4]);
1034 else
1035 pPeerHTCap = (PHT_CAPABILITY_ELE)(pHTInfo->PeerHTCapBuf);
1036
1037 if(!memcmp(pHTInfo->PeerHTInfoBuf, EWC11NHTInfo, sizeof(EWC11NHTInfo)))
1038 pPeerHTInfo = (PHT_INFORMATION_ELE)(&pHTInfo->PeerHTInfoBuf[4]);
1039 else
1040 pPeerHTInfo = (PHT_INFORMATION_ELE)(pHTInfo->PeerHTInfoBuf);
1041
1042
1043 ////////////////////////////////////////////////////////
1044 // Configurations:
1045 ////////////////////////////////////////////////////////
1046 IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA|IEEE80211_DL_HT, pPeerHTCap, sizeof(HT_CAPABILITY_ELE));
1047// IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA|IEEE80211_DL_HT, pPeerHTInfo, sizeof(HT_INFORMATION_ELE));
1048 // Config Supported Channel Width setting
1049 //
1050 HTSetConnectBwMode(ieee, (HT_CHANNEL_WIDTH)(pPeerHTCap->ChlWidth), (HT_EXTCHNL_OFFSET)(pPeerHTInfo->ExtChlOffset));
1051
1052// if(pHTInfo->bCurBW40MHz == true)
1053 pHTInfo->bCurTxBW40MHz = ((pPeerHTInfo->RecommemdedTxWidth == 1)?true:false);
1054
1055 //
1056 // Update short GI/ long GI setting
1057 //
1058 // TODO:
1059 pHTInfo->bCurShortGI20MHz=
1060 ((pHTInfo->bRegShortGI20MHz)?((pPeerHTCap->ShortGI20Mhz==1)?true:false):false);
1061 pHTInfo->bCurShortGI40MHz=
1062 ((pHTInfo->bRegShortGI40MHz)?((pPeerHTCap->ShortGI40Mhz==1)?true:false):false);
1063
1064 //
1065 // Config TX STBC setting
1066 //
1067 // TODO:
1068
1069 //
1070 // Config DSSS/CCK mode in 40MHz mode
1071 //
1072 // TODO:
1073 pHTInfo->bCurSuppCCK =
1074 ((pHTInfo->bRegSuppCCK)?((pPeerHTCap->DssCCk==1)?true:false):false);
1075
1076
1077 //
1078 // Config and configure A-MSDU setting
1079 //
1080 pHTInfo->bCurrent_AMSDU_Support = pHTInfo->bAMSDU_Support;
1081 if (ieee->rtllib_ap_sec_type &&
1082 (ieee->rtllib_ap_sec_type(ieee)&(SEC_ALG_WEP|SEC_ALG_TKIP))){
1083 if( (pHTInfo->IOTPeer== HT_IOT_PEER_ATHEROS) ||
1084 (pHTInfo->IOTPeer == HT_IOT_PEER_UNKNOWN) )
1085 pHTInfo->bCurrentAMPDUEnable = false;
1086 }
1087
1088
1089 nMaxAMSDUSize = (pPeerHTCap->MaxAMSDUSize==0)?3839:7935;
1090
1091 if(pHTInfo->nAMSDU_MaxSize > nMaxAMSDUSize )
1092 pHTInfo->nCurrent_AMSDU_MaxSize = nMaxAMSDUSize;
1093 else
1094 pHTInfo->nCurrent_AMSDU_MaxSize = pHTInfo->nAMSDU_MaxSize;
1095
1096
1097 //
1098 // Config A-MPDU setting
1099 //
1100 pHTInfo->bCurrentAMPDUEnable = pHTInfo->bAMPDUEnable;
1101
1102 // <1> Decide AMPDU Factor
1103
1104 // By Emily
1105 if(!pHTInfo->bRegRT2RTAggregation)
1106 {
1107 // Decide AMPDU Factor according to protocol handshake
1108 if(pHTInfo->AMPDU_Factor > pPeerHTCap->MaxRxAMPDUFactor)
1109 pHTInfo->CurrentAMPDUFactor = pPeerHTCap->MaxRxAMPDUFactor;
1110 else
1111 pHTInfo->CurrentAMPDUFactor = pHTInfo->AMPDU_Factor;
1112
1113 }else
1114 {
1115 // Set MPDU density to 2 to Realtek AP, and set it to 0 for others
1116 // Replace MPDU factor declared in original association response frame format. 2007.08.20 by Emily
1117#if 0
1118 osTmp= PacketGetElement( asocpdu, EID_Vendor, OUI_SUB_REALTEK_AGG, OUI_SUBTYPE_DONT_CARE);
1119 if(osTmp.Length >= 5) //00:e0:4c:02:00
1120#endif
1121 if (ieee->current_network.bssht.bdRT2RTAggregation)
1122 {
1123 if( ieee->pairwise_key_type != KEY_TYPE_NA)
1124 // Realtek may set 32k in security mode and 64k for others
1125 pHTInfo->CurrentAMPDUFactor = pPeerHTCap->MaxRxAMPDUFactor;
1126 else
1127 pHTInfo->CurrentAMPDUFactor = HT_AGG_SIZE_64K;
1128 }else
1129 {
1130 if(pPeerHTCap->MaxRxAMPDUFactor < HT_AGG_SIZE_32K)
1131 pHTInfo->CurrentAMPDUFactor = pPeerHTCap->MaxRxAMPDUFactor;
1132 else
1133 pHTInfo->CurrentAMPDUFactor = HT_AGG_SIZE_32K;
1134 }
1135 }
1136
1137 // <2> Set AMPDU Minimum MPDU Start Spacing
1138 // 802.11n 3.0 section 9.7d.3
1139#if 1
1140 if(pHTInfo->MPDU_Density > pPeerHTCap->MPDUDensity)
1141 pHTInfo->CurrentMPDUDensity = pHTInfo->MPDU_Density;
1142 else
1143 pHTInfo->CurrentMPDUDensity = pPeerHTCap->MPDUDensity;
1144 if(ieee->pairwise_key_type != KEY_TYPE_NA )
1145 pHTInfo->CurrentMPDUDensity = 7; // 8us
1146#else
1147 if(pHTInfo->MPDU_Density > pPeerHTCap->MPDUDensity)
1148 pHTInfo->CurrentMPDUDensity = pHTInfo->MPDU_Density;
1149 else
1150 pHTInfo->CurrentMPDUDensity = pPeerHTCap->MPDUDensity;
1151#endif
1152 // Force TX AMSDU
1153
1154 // Lanhsin: mark for tmp to avoid deauth by ap from s3
1155 //if(memcmp(pMgntInfo->Bssid, NETGEAR834Bv2_BROADCOM, 3)==0)
1156 if(0)
1157 {
1158
1159 pHTInfo->bCurrentAMPDUEnable = false;
1160 pHTInfo->ForcedAMSDUMode = HT_AGG_FORCE_ENABLE;
1161 pHTInfo->ForcedAMSDUMaxSize = 7935;
1162
1163 pHTInfo->IOTAction |= HT_IOT_ACT_TX_USE_AMSDU_8K;
1164 }
1165
1166 // Rx Reorder Setting
1167 pHTInfo->bCurRxReorderEnable = pHTInfo->bRegRxReorderEnable;
1168
1169 //
1170 // Filter out unsupported HT rate for this AP
1171 // Update RATR table
1172 // This is only for 8190 ,8192 or later product which using firmware to handle rate adaptive mechanism.
1173 //
1174
1175 // Handle Ralink AP bad MCS rate set condition. Joseph.
1176 // This fix the bug of Ralink AP. This may be removed in the future.
1177 if(pPeerHTCap->MCS[0] == 0)
1178 pPeerHTCap->MCS[0] = 0xff;
1179
1180 HTFilterMCSRate(ieee, pPeerHTCap->MCS, ieee->dot11HTOperationalRateSet);
1181
1182 //
1183 // Config MIMO Power Save setting
1184 //
1185 pHTInfo->PeerMimoPs = pPeerHTCap->MimoPwrSave;
1186 if(pHTInfo->PeerMimoPs == MIMO_PS_STATIC)
1187 pMcsFilter = MCS_FILTER_1SS;
1188 else
1189 pMcsFilter = MCS_FILTER_ALL;
1190 //WB add for MCS8 bug
1191// pMcsFilter = MCS_FILTER_1SS;
1192 ieee->HTHighestOperaRate = HTGetHighestMCSRate(ieee, ieee->dot11HTOperationalRateSet, pMcsFilter);
1193 ieee->HTCurrentOperaRate = ieee->HTHighestOperaRate;
1194
1195 //
1196 // Config current operation mode.
1197 //
1198 pHTInfo->CurrentOpMode = pPeerHTInfo->OptMode;
1199
1200
1201
1202}
1203
1204void HTSetConnectBwModeCallback(struct ieee80211_device* ieee);
1205/********************************************************************************************************************
1206 *function: initialize HT info(struct PRT_HIGH_THROUGHPUT)
1207 * input: struct ieee80211_device* ieee
1208 * output: none
1209 * return: none
1210 * notice: This function is called when * (1) MPInitialization Phase * (2) Receiving of Deauthentication from AP
1211********************************************************************************************************************/
1212// TODO: Should this funciton be called when receiving of Disassociation?
1213void HTInitializeHTInfo(struct ieee80211_device* ieee)
1214{
1215 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
1216
1217 //
1218 // These parameters will be reset when receiving deauthentication packet
1219 //
1220 IEEE80211_DEBUG(IEEE80211_DL_HT, "===========>%s()\n", __FUNCTION__);
1221 pHTInfo->bCurrentHTSupport = false;
1222
1223 // 40MHz channel support
1224 pHTInfo->bCurBW40MHz = false;
1225 pHTInfo->bCurTxBW40MHz = false;
1226
1227 // Short GI support
1228 pHTInfo->bCurShortGI20MHz = false;
1229 pHTInfo->bCurShortGI40MHz = false;
1230 pHTInfo->bForcedShortGI = false;
1231
1232 // CCK rate support
1233 // This flag is set to true to support CCK rate by default.
1234 // It will be affected by "pHTInfo->bRegSuppCCK" and AP capabilities only when associate to
1235 // 11N BSS.
1236 pHTInfo->bCurSuppCCK = true;
1237
1238 // AMSDU related
1239 pHTInfo->bCurrent_AMSDU_Support = false;
1240 pHTInfo->nCurrent_AMSDU_MaxSize = pHTInfo->nAMSDU_MaxSize;
1241
1242 // AMPUD related
1243 pHTInfo->CurrentMPDUDensity = pHTInfo->MPDU_Density;
1244 pHTInfo->CurrentAMPDUFactor = pHTInfo->AMPDU_Factor;
1245
1246
1247
1248 // Initialize all of the parameters related to 11n
1249 memset((void*)(&(pHTInfo->SelfHTCap)), 0, sizeof(pHTInfo->SelfHTCap));
1250 memset((void*)(&(pHTInfo->SelfHTInfo)), 0, sizeof(pHTInfo->SelfHTInfo));
1251 memset((void*)(&(pHTInfo->PeerHTCapBuf)), 0, sizeof(pHTInfo->PeerHTCapBuf));
1252 memset((void*)(&(pHTInfo->PeerHTInfoBuf)), 0, sizeof(pHTInfo->PeerHTInfoBuf));
1253
1254 pHTInfo->bSwBwInProgress = false;
1255 pHTInfo->ChnlOp = CHNLOP_NONE;
1256
1257 // Set default IEEE spec for Draft N
1258 pHTInfo->ePeerHTSpecVer = HT_SPEC_VER_IEEE;
1259
1260 // Realtek proprietary aggregation mode
1261 pHTInfo->bCurrentRT2RTAggregation = false;
1262 pHTInfo->bCurrentRT2RTLongSlotTime = false;
1263 pHTInfo->IOTPeer = 0;
1264 pHTInfo->IOTAction = 0;
1265
1266 //MCS rate initialized here
1267 {
1268 u8* RegHTSuppRateSets = &(ieee->RegHTSuppRateSet[0]);
1269 RegHTSuppRateSets[0] = 0xFF; //support MCS 0~7
1270 RegHTSuppRateSets[1] = 0xFF; //support MCS 8~15
1271 RegHTSuppRateSets[4] = 0x01; //support MCS 32
1272 }
1273}
1274/********************************************************************************************************************
1275 *function: initialize Bss HT structure(struct PBSS_HT)
1276 * input: PBSS_HT pBssHT //to be initialized
1277 * output: none
1278 * return: none
1279 * notice: This function is called when initialize network structure
1280********************************************************************************************************************/
1281void HTInitializeBssDesc(PBSS_HT pBssHT)
1282{
1283
1284 pBssHT->bdSupportHT = false;
1285 memset(pBssHT->bdHTCapBuf, 0, sizeof(pBssHT->bdHTCapBuf));
1286 pBssHT->bdHTCapLen = 0;
1287 memset(pBssHT->bdHTInfoBuf, 0, sizeof(pBssHT->bdHTInfoBuf));
1288 pBssHT->bdHTInfoLen = 0;
1289
1290 pBssHT->bdHTSpecVer= HT_SPEC_VER_IEEE;
1291
1292 pBssHT->bdRT2RTAggregation = false;
1293 pBssHT->bdRT2RTLongSlotTime = false;
1294}
1295#if 0
1296//below function has merged into ieee80211_network_init() in ieee80211_rx.c
1297void
1298HTParsingHTCapElement(
1299 IN PADAPTER Adapter,
1300 IN OCTET_STRING HTCapIE,
1301 OUT PRT_WLAN_BSS pBssDesc
1302)
1303{
1304 PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
1305
1306 if( HTCapIE.Length > sizeof(pBssDesc->BssHT.bdHTCapBuf) )
1307 {
1308 RT_TRACE( COMP_HT, DBG_LOUD, ("HTParsingHTCapElement(): HT Capability Element length is too long!\n") );
1309 return;
1310 }
1311
1312 // TODO: Check the correctness of HT Cap
1313 //Print each field in detail. Driver should not print out this message by default
1314 if(!pMgntInfo->mActingAsAp && !pMgntInfo->mAssoc)
1315 HTDebugHTCapability(DBG_TRACE, Adapter, &HTCapIE, (pu8)"HTParsingHTCapElement()");
1316
1317 HTCapIE.Length = HTCapIE.Length > sizeof(pBssDesc->BssHT.bdHTCapBuf)?\
1318 sizeof(pBssDesc->BssHT.bdHTCapBuf):HTCapIE.Length; //prevent from overflow
1319
1320 CopyMem(pBssDesc->BssHT.bdHTCapBuf, HTCapIE.Octet, HTCapIE.Length);
1321 pBssDesc->BssHT.bdHTCapLen = HTCapIE.Length;
1322
1323}
1324
1325
1326void
1327HTParsingHTInfoElement(
1328 PADAPTER Adapter,
1329 OCTET_STRING HTInfoIE,
1330 PRT_WLAN_BSS pBssDesc
1331)
1332{
1333 PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
1334
1335 if( HTInfoIE.Length > sizeof(pBssDesc->BssHT.bdHTInfoBuf))
1336 {
1337 RT_TRACE( COMP_HT, DBG_LOUD, ("HTParsingHTInfoElement(): HT Information Element length is too long!\n") );
1338 return;
1339 }
1340
1341 // TODO: Check the correctness of HT Info
1342 //Print each field in detail. Driver should not print out this message by default
1343 if(!pMgntInfo->mActingAsAp && !pMgntInfo->mAssoc)
1344 HTDebugHTInfo(DBG_TRACE, Adapter, &HTInfoIE, (pu8)"HTParsingHTInfoElement()");
1345
1346 HTInfoIE.Length = HTInfoIE.Length > sizeof(pBssDesc->BssHT.bdHTInfoBuf)?\
1347 sizeof(pBssDesc->BssHT.bdHTInfoBuf):HTInfoIE.Length; //prevent from overflow
1348
1349 CopyMem( pBssDesc->BssHT.bdHTInfoBuf, HTInfoIE.Octet, HTInfoIE.Length);
1350 pBssDesc->BssHT.bdHTInfoLen = HTInfoIE.Length;
1351}
1352
1353/*
1354 * Get HT related information from beacon and save it in BssDesc
1355 *
1356 * (1) Parse HTCap, and HTInfo, and record whether it is 11n AP
1357 * (2) If peer is HT, but not WMM, call QosSetLegacyWMMParamWithHT()
1358 * (3) Check whether peer is Realtek AP (for Realtek proprietary aggregation mode).
1359 * Input:
1360 * PADAPTER Adapter
1361 *
1362 * Output:
1363 * PRT_TCB BssDesc
1364 *
1365*/
1366void HTGetValueFromBeaconOrProbeRsp(
1367 PADAPTER Adapter,
1368 POCTET_STRING pSRCmmpdu,
1369 PRT_WLAN_BSS bssDesc
1370)
1371{
1372 PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
1373 PRT_HIGH_THROUGHPUT pHTInfo = GET_HT_INFO(pMgntInfo);
1374 OCTET_STRING HTCapIE, HTInfoIE, HTRealtekAgg, mmpdu;
1375 OCTET_STRING BroadcomElement, CiscoElement;
1376
1377 mmpdu.Octet = pSRCmmpdu->Octet;
1378 mmpdu.Length = pSRCmmpdu->Length;
1379
1380 //2Note:
1381 // Mark for IOT testing using Linksys WRT350N, This AP does not contain WMM IE when
1382 // it is configured at pure-N mode.
1383 // if(bssDesc->BssQos.bdQoSMode & QOS_WMM)
1384 //
1385
1386 HTInitializeBssDesc (&bssDesc->BssHT);
1387
1388 //2<1> Parse HTCap, and HTInfo
1389 // Get HT Capability IE: (1) Get IEEE Draft N IE or (2) Get EWC IE
1390 HTCapIE = PacketGetElement(mmpdu, EID_HTCapability, OUI_SUB_DONT_CARE, OUI_SUBTYPE_DONT_CARE);
1391 if(HTCapIE.Length == 0)
1392 {
1393 HTCapIE = PacketGetElement(mmpdu, EID_Vendor, OUI_SUB_11N_EWC_HT_CAP, OUI_SUBTYPE_DONT_CARE);
1394 if(HTCapIE.Length != 0)
1395 bssDesc->BssHT.bdHTSpecVer= HT_SPEC_VER_EWC;
1396 }
1397 if(HTCapIE.Length != 0)
1398 HTParsingHTCapElement(Adapter, HTCapIE, bssDesc);
1399
1400 // Get HT Information IE: (1) Get IEEE Draft N IE or (2) Get EWC IE
1401 HTInfoIE = PacketGetElement(mmpdu, EID_HTInfo, OUI_SUB_DONT_CARE, OUI_SUBTYPE_DONT_CARE);
1402 if(HTInfoIE.Length == 0)
1403 {
1404 HTInfoIE = PacketGetElement(mmpdu, EID_Vendor, OUI_SUB_11N_EWC_HT_INFO, OUI_SUBTYPE_DONT_CARE);
1405 if(HTInfoIE.Length != 0)
1406 bssDesc->BssHT.bdHTSpecVer = HT_SPEC_VER_EWC;
1407 }
1408 if(HTInfoIE.Length != 0)
1409 HTParsingHTInfoElement(Adapter, HTInfoIE, bssDesc);
1410
1411 //2<2>If peer is HT, but not WMM, call QosSetLegacyWMMParamWithHT()
1412 if(HTCapIE.Length != 0)
1413 {
1414 bssDesc->BssHT.bdSupportHT = true;
1415 if(bssDesc->BssQos.bdQoSMode == QOS_DISABLE)
1416 QosSetLegacyWMMParamWithHT(Adapter, bssDesc);
1417 }
1418 else
1419 {
1420 bssDesc->BssHT.bdSupportHT = false;
1421 }
1422
1423 //2<3>Check whether the peer is Realtek AP/STA
1424 if(pHTInfo->bRegRT2RTAggregation)
1425 {
1426 if(bssDesc->BssHT.bdSupportHT)
1427 {
1428 HTRealtekAgg = PacketGetElement(mmpdu, EID_Vendor, OUI_SUB_REALTEK_AGG, OUI_SUBTYPE_DONT_CARE);
1429 if(HTRealtekAgg.Length >=5 )
1430 {
1431 bssDesc->BssHT.bdRT2RTAggregation = true;
1432
1433 if((HTRealtekAgg.Octet[4]==1) && (HTRealtekAgg.Octet[5] & 0x02))
1434 bssDesc->BssHT.bdRT2RTLongSlotTime = true;
1435 }
1436 }
1437 }
1438
1439 //
1440 // 2008/01/25 MH Get Broadcom AP IE for manamgent frame CCK rate problem.
1441 // AP can not receive CCK managemtn from from 92E.
1442 //
1443
1444 // Initialize every new bss broadcom cap exist as false..
1445 bssDesc->bBroadcomCapExist= false;
1446
1447 if(HTCapIE.Length != 0 || HTInfoIE.Length != 0)
1448 {
1449 u4Byte Length = 0;
1450
1451 FillOctetString(BroadcomElement, NULL, 0);
1452
1453 BroadcomElement = PacketGetElement( mmpdu, EID_Vendor, OUI_SUB_BROADCOM_IE_1, OUI_SUBTYPE_DONT_CARE);
1454 Length += BroadcomElement.Length;
1455 BroadcomElement = PacketGetElement( mmpdu, EID_Vendor, OUI_SUB_BROADCOM_IE_2, OUI_SUBTYPE_DONT_CARE);
1456 Length += BroadcomElement.Length;
1457 BroadcomElement = PacketGetElement( mmpdu, EID_Vendor, OUI_SUB_BROADCOM_IE_3, OUI_SUBTYPE_DONT_CARE);
1458 Length += BroadcomElement.Length;
1459
1460 if(Length > 0)
1461 bssDesc->bBroadcomCapExist = true;
1462 }
1463
1464
1465 // For Cisco IOT issue
1466 CiscoElement = PacketGetElement( mmpdu, EID_Vendor, OUI_SUB_CISCO_IE, OUI_SUBTYPE_DONT_CARE);
1467 if(CiscoElement.Length != 0){ // 3: 0x00, 0x40, 0x96 ....
1468 bssDesc->bCiscoCapExist = true;
1469 }else{
1470 bssDesc->bCiscoCapExist = false;
1471 }
1472}
1473
1474
1475#endif
1476/********************************************************************************************************************
1477 *function: initialize Bss HT structure(struct PBSS_HT)
1478 * input: struct ieee80211_device *ieee
1479 * struct ieee80211_network *pNetwork //usually current network we are live in
1480 * output: none
1481 * return: none
1482 * notice: This function should ONLY be called before association
1483********************************************************************************************************************/
1484void HTResetSelfAndSavePeerSetting(struct ieee80211_device* ieee, struct ieee80211_network * pNetwork)
1485{
1486 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
1487// u16 nMaxAMSDUSize;
1488// PHT_CAPABILITY_ELE pPeerHTCap = (PHT_CAPABILITY_ELE)pNetwork->bssht.bdHTCapBuf;
1489// PHT_INFORMATION_ELE pPeerHTInfo = (PHT_INFORMATION_ELE)pNetwork->bssht.bdHTInfoBuf;
1490// u8* pMcsFilter;
1491 u8 bIOTAction = 0;
1492
1493 //
1494 // Save Peer Setting before Association
1495 //
1496 IEEE80211_DEBUG(IEEE80211_DL_HT, "==============>%s()\n", __FUNCTION__);
1497 /*unmark bEnableHT flag here is the same reason why unmarked in function ieee80211_softmac_new_net. WB 2008.09.10*/
1498// if( pHTInfo->bEnableHT && pNetwork->bssht.bdSupportHT)
1499 if (pNetwork->bssht.bdSupportHT)
1500 {
1501 pHTInfo->bCurrentHTSupport = true;
1502 pHTInfo->ePeerHTSpecVer = pNetwork->bssht.bdHTSpecVer;
1503
1504 // Save HTCap and HTInfo information Element
1505 if(pNetwork->bssht.bdHTCapLen > 0 && pNetwork->bssht.bdHTCapLen <= sizeof(pHTInfo->PeerHTCapBuf))
1506 memcpy(pHTInfo->PeerHTCapBuf, pNetwork->bssht.bdHTCapBuf, pNetwork->bssht.bdHTCapLen);
1507
1508 if(pNetwork->bssht.bdHTInfoLen > 0 && pNetwork->bssht.bdHTInfoLen <= sizeof(pHTInfo->PeerHTInfoBuf))
1509 memcpy(pHTInfo->PeerHTInfoBuf, pNetwork->bssht.bdHTInfoBuf, pNetwork->bssht.bdHTInfoLen);
1510
1511 // Check whether RT to RT aggregation mode is enabled
1512 if(pHTInfo->bRegRT2RTAggregation)
1513 {
1514 pHTInfo->bCurrentRT2RTAggregation = pNetwork->bssht.bdRT2RTAggregation;
1515 pHTInfo->bCurrentRT2RTLongSlotTime = pNetwork->bssht.bdRT2RTLongSlotTime;
1516 }
1517 else
1518 {
1519 pHTInfo->bCurrentRT2RTAggregation = false;
1520 pHTInfo->bCurrentRT2RTLongSlotTime = false;
1521 }
1522
1523 // Determine the IOT Peer Vendor.
1524 HTIOTPeerDetermine(ieee);
1525
1526 // Decide IOT Action
1527 // Must be called after the parameter of pHTInfo->bCurrentRT2RTAggregation is decided
1528 pHTInfo->IOTAction = 0;
1529 bIOTAction = HTIOTActIsDisableMCS14(ieee, pNetwork->bssid);
1530 if(bIOTAction)
1531 pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_MCS14;
1532 bIOTAction = HTIOTActIsForcedCTS2Self(ieee, pNetwork);
1533 if(bIOTAction)
1534 pHTInfo->IOTAction |= HT_IOT_ACT_FORCED_CTS2SELF;
1535
1536 bIOTAction = HTIOTActIsDisableMCS15(ieee);
1537 if(bIOTAction)
1538 pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_MCS15;
1539
1540 bIOTAction = HTIOTActIsDisableMCSTwoSpatialStream(ieee, pNetwork->bssid);
1541 if(bIOTAction)
1542 pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_ALL_2SS;
1543
1544
1545 bIOTAction = HTIOTActIsDisableEDCATurbo(ieee, pNetwork->bssid);
1546 if(bIOTAction)
1547 pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_EDCA_TURBO;
1548
1549 bIOTAction = HTIOTActIsMgntUseCCK6M(pNetwork);
1550 if(bIOTAction)
1551 pHTInfo->IOTAction |= HT_IOT_ACT_MGNT_USE_CCK_6M;
1552
1553 bIOTAction = HTIOTActIsCCDFsync(pNetwork->bssid);
1554 if(bIOTAction)
1555 pHTInfo->IOTAction |= HT_IOT_ACT_CDD_FSYNC;
1556
1557 bIOTAction = HTIOTActIsNullDataPowerSaving(ieee, pNetwork);
1558 if(bIOTAction)
1559 pHTInfo->IOTAction |= HT_IOT_ACT_NULL_DATA_POWER_SAVING;
1560
1561 }
1562 else
1563 {
1564 pHTInfo->bCurrentHTSupport = false;
1565 pHTInfo->bCurrentRT2RTAggregation = false;
1566 pHTInfo->bCurrentRT2RTLongSlotTime = false;
1567
1568 pHTInfo->IOTAction = 0;
1569 }
1570
1571}
1572
1573void HTUpdateSelfAndPeerSetting(struct ieee80211_device* ieee, struct ieee80211_network * pNetwork)
1574{
1575 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
1576// PHT_CAPABILITY_ELE pPeerHTCap = (PHT_CAPABILITY_ELE)pNetwork->bssht.bdHTCapBuf;
1577 PHT_INFORMATION_ELE pPeerHTInfo = (PHT_INFORMATION_ELE)pNetwork->bssht.bdHTInfoBuf;
1578
1579 if(pHTInfo->bCurrentHTSupport)
1580 {
1581 //
1582 // Config current operation mode.
1583 //
1584 if(pNetwork->bssht.bdHTInfoLen != 0)
1585 pHTInfo->CurrentOpMode = pPeerHTInfo->OptMode;
1586
1587 //
1588 // <TODO: Config according to OBSS non-HT STA present!!>
1589 //
1590 }
1591}
1592
1593void HTUseDefaultSetting(struct ieee80211_device* ieee)
1594{
1595 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
1596// u8 regBwOpMode;
1597
1598 if(pHTInfo->bEnableHT)
1599 {
1600 pHTInfo->bCurrentHTSupport = true;
1601
1602 pHTInfo->bCurSuppCCK = pHTInfo->bRegSuppCCK;
1603
1604 pHTInfo->bCurBW40MHz = pHTInfo->bRegBW40MHz;
1605
1606 pHTInfo->bCurShortGI20MHz= pHTInfo->bRegShortGI20MHz;
1607
1608 pHTInfo->bCurShortGI40MHz= pHTInfo->bRegShortGI40MHz;
1609
1610 pHTInfo->bCurrent_AMSDU_Support = pHTInfo->bAMSDU_Support;
1611
1612 pHTInfo->nCurrent_AMSDU_MaxSize = pHTInfo->nAMSDU_MaxSize;
1613
1614 pHTInfo->bCurrentAMPDUEnable = pHTInfo->bAMPDUEnable;
1615
1616 pHTInfo->CurrentAMPDUFactor = pHTInfo->AMPDU_Factor;
1617
1618 pHTInfo->CurrentMPDUDensity = pHTInfo->CurrentMPDUDensity;
1619
1620 // Set BWOpMode register
1621
1622 //update RATR index0
1623 HTFilterMCSRate(ieee, ieee->Regdot11HTOperationalRateSet, ieee->dot11HTOperationalRateSet);
1624 //function below is not implemented at all. WB
1625#ifdef TODO
1626 Adapter->HalFunc.InitHalRATRTableHandler( Adapter, &pMgntInfo->dot11OperationalRateSet, pMgntInfo->dot11HTOperationalRateSet);
1627#endif
1628 ieee->HTHighestOperaRate = HTGetHighestMCSRate(ieee, ieee->dot11HTOperationalRateSet, MCS_FILTER_ALL);
1629 ieee->HTCurrentOperaRate = ieee->HTHighestOperaRate;
1630
1631 }
1632 else
1633 {
1634 pHTInfo->bCurrentHTSupport = false;
1635 }
1636}
1637/********************************************************************************************************************
1638 *function: check whether HT control field exists
1639 * input: struct ieee80211_device *ieee
1640 * u8* pFrame //coming skb->data
1641 * output: none
1642 * return: return true if HT control field exists(false otherwise)
1643 * notice:
1644********************************************************************************************************************/
1645u8 HTCCheck(struct ieee80211_device* ieee, u8* pFrame)
1646{
1647 if(ieee->pHTInfo->bCurrentHTSupport)
1648 {
1649 if( (IsQoSDataFrame(pFrame) && Frame_Order(pFrame)) == 1)
1650 {
1651 IEEE80211_DEBUG(IEEE80211_DL_HT, "HT CONTROL FILED EXIST!!\n");
1652 return true;
1653 }
1654 }
1655 return false;
1656}
1657
1658//
1659// This function set bandwidth mode in protocol layer.
1660//
1661void HTSetConnectBwMode(struct ieee80211_device* ieee, HT_CHANNEL_WIDTH Bandwidth, HT_EXTCHNL_OFFSET Offset)
1662{
1663 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
1664// u32 flags = 0;
1665
1666 if(pHTInfo->bRegBW40MHz == false)
1667 return;
1668
1669
1670
1671 // To reduce dummy operation
1672// if((pHTInfo->bCurBW40MHz==false && Bandwidth==HT_CHANNEL_WIDTH_20) ||
1673// (pHTInfo->bCurBW40MHz==true && Bandwidth==HT_CHANNEL_WIDTH_20_40 && Offset==pHTInfo->CurSTAExtChnlOffset))
1674// return;
1675
1676// spin_lock_irqsave(&(ieee->bw_spinlock), flags);
1677 if(pHTInfo->bSwBwInProgress) {
1678// spin_unlock_irqrestore(&(ieee->bw_spinlock), flags);
1679 return;
1680 }
1681 //if in half N mode, set to 20M bandwidth please 09.08.2008 WB.
1682 if (Bandwidth==HT_CHANNEL_WIDTH_20_40 && (!ieee->GetHalfNmodeSupportByAPsHandler(ieee)))
1683 {
1684 // Handle Illegal extension channel offset!!
1685 if(ieee->current_network.channel<2 && Offset==HT_EXTCHNL_OFFSET_LOWER)
1686 Offset = HT_EXTCHNL_OFFSET_NO_EXT;
1687 if(Offset==HT_EXTCHNL_OFFSET_UPPER || Offset==HT_EXTCHNL_OFFSET_LOWER) {
1688 pHTInfo->bCurBW40MHz = true;
1689 pHTInfo->CurSTAExtChnlOffset = Offset;
1690 } else {
1691 pHTInfo->bCurBW40MHz = false;
1692 pHTInfo->CurSTAExtChnlOffset = HT_EXTCHNL_OFFSET_NO_EXT;
1693 }
1694 } else {
1695 pHTInfo->bCurBW40MHz = false;
1696 pHTInfo->CurSTAExtChnlOffset = HT_EXTCHNL_OFFSET_NO_EXT;
1697 }
1698
1699 pHTInfo->bSwBwInProgress = true;
1700
1701 // TODO: 2007.7.13 by Emily Wait 2000ms in order to guarantee that switching
1702 // bandwidth is executed after scan is finished. It is a temporal solution
1703 // because software should ganrantee the last operation of switching bandwidth
1704 // is executed properlly.
1705 HTSetConnectBwModeCallback(ieee);
1706
1707// spin_unlock_irqrestore(&(ieee->bw_spinlock), flags);
1708}
1709
1710void HTSetConnectBwModeCallback(struct ieee80211_device* ieee)
1711{
1712 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
1713
1714 IEEE80211_DEBUG(IEEE80211_DL_HT, "======>%s()\n", __FUNCTION__);
1715
1716 if(pHTInfo->bCurBW40MHz)
1717 {
1718 if(pHTInfo->CurSTAExtChnlOffset==HT_EXTCHNL_OFFSET_UPPER)
1719 ieee->set_chan(ieee, ieee->current_network.channel+2);
1720 else if(pHTInfo->CurSTAExtChnlOffset==HT_EXTCHNL_OFFSET_LOWER)
1721 ieee->set_chan(ieee, ieee->current_network.channel-2);
1722 else
1723 ieee->set_chan(ieee, ieee->current_network.channel);
1724
1725 ieee->SetBWModeHandler(ieee, HT_CHANNEL_WIDTH_20_40, pHTInfo->CurSTAExtChnlOffset);
1726 } else {
1727 ieee->set_chan(ieee, ieee->current_network.channel);
1728 ieee->SetBWModeHandler(ieee, HT_CHANNEL_WIDTH_20, HT_EXTCHNL_OFFSET_NO_EXT);
1729 }
1730
1731 pHTInfo->bSwBwInProgress = false;
1732}
diff --git a/drivers/staging/rtl8192e/ieee80211/rtl819x_Qos.h b/drivers/staging/rtl8192e/ieee80211/rtl819x_Qos.h
deleted file mode 100644
index d4565ecc7ab..00000000000
--- a/drivers/staging/rtl8192e/ieee80211/rtl819x_Qos.h
+++ /dev/null
@@ -1,582 +0,0 @@
1#ifndef __INC_QOS_TYPE_H
2#define __INC_QOS_TYPE_H
3
4#define BIT0 0x00000001
5#define BIT1 0x00000002
6#define BIT2 0x00000004
7#define BIT3 0x00000008
8#define BIT4 0x00000010
9#define BIT5 0x00000020
10#define BIT6 0x00000040
11#define BIT7 0x00000080
12#define BIT8 0x00000100
13#define BIT9 0x00000200
14#define BIT10 0x00000400
15#define BIT11 0x00000800
16#define BIT12 0x00001000
17#define BIT13 0x00002000
18#define BIT14 0x00004000
19#define BIT15 0x00008000
20#define BIT16 0x00010000
21#define BIT17 0x00020000
22#define BIT18 0x00040000
23#define BIT19 0x00080000
24#define BIT20 0x00100000
25#define BIT21 0x00200000
26#define BIT22 0x00400000
27#define BIT23 0x00800000
28#define BIT24 0x01000000
29#define BIT25 0x02000000
30#define BIT26 0x04000000
31#define BIT27 0x08000000
32#define BIT28 0x10000000
33#define BIT29 0x20000000
34#define BIT30 0x40000000
35#define BIT31 0x80000000
36
37#define MAX_WMMELE_LENGTH 64
38
39//
40// QoS mode.
41// enum 0, 1, 2, 4: since we can use the OR(|) operation.
42//
43// QOS_MODE is redefined for enum can't be ++, | under C++ compiler, 2006.05.17, by rcnjko.
44//typedef enum _QOS_MODE{
45// QOS_DISABLE = 0,
46// QOS_WMM = 1,
47// QOS_EDCA = 2,
48// QOS_HCCA = 4,
49//}QOS_MODE,*PQOS_MODE;
50//
51typedef u32 QOS_MODE, *PQOS_MODE;
52#define QOS_DISABLE 0
53#define QOS_WMM 1
54#define QOS_WMMSA 2
55#define QOS_EDCA 4
56#define QOS_HCCA 8
57#define QOS_WMM_UAPSD 16 //WMM Power Save, 2006-06-14 Isaiah
58
59#define AC_PARAM_SIZE 4
60#define WMM_PARAM_ELE_BODY_LEN 18
61
62//
63// QoS ACK Policy Field Values
64// Ref: WMM spec 2.1.6: QoS Control Field, p.10.
65//
66typedef enum _ACK_POLICY{
67 eAckPlc0_ACK = 0x00,
68 eAckPlc1_NoACK = 0x01,
69}ACK_POLICY,*PACK_POLICY;
70
71#define WMM_PARAM_ELEMENT_SIZE (8+(4*AC_PARAM_SIZE))
72
73//
74// QoS Control Field
75// Ref:
76// 1. WMM spec 2.1.6: QoS Control Field, p.9.
77// 2. 802.11e/D13.0 7.1.3.5, p.26.
78//
79typedef union _QOS_CTRL_FIELD{
80 u8 charData[2];
81 u16 shortData;
82
83 // WMM spec
84 struct
85 {
86 u8 UP:3;
87 u8 usRsvd1:1;
88 u8 EOSP:1;
89 u8 AckPolicy:2;
90 u8 usRsvd2:1;
91 u8 ucRsvdByte;
92 }WMM;
93
94 // 802.11e: QoS data type frame sent by non-AP QSTAs.
95 struct
96 {
97 u8 TID:4;
98 u8 bIsQsize:1;// 0: BIT[8:15] is TXOP Duration Requested, 1: BIT[8:15] is Queue Size.
99 u8 AckPolicy:2;
100 u8 usRsvd:1;
101 u8 TxopOrQsize; // (BIT4=0)TXOP Duration Requested or (BIT4=1)Queue Size.
102 }BySta;
103
104 // 802.11e: QoS data, QoS Null, and QoS Data+CF-Ack frames sent by HC.
105 struct
106 {
107 u8 TID:4;
108 u8 EOSP:1;
109 u8 AckPolicy:2;
110 u8 usRsvd:1;
111 u8 PSBufState; // QAP PS Buffer State.
112 }ByHc_Data;
113
114 // 802.11e: QoS (+) CF-Poll frames sent by HC.
115 struct
116 {
117 u8 TID:4;
118 u8 EOSP:1;
119 u8 AckPolicy:2;
120 u8 usRsvd:1;
121 u8 TxopLimit; // TXOP Limit.
122 }ByHc_CFP;
123
124}QOS_CTRL_FIELD, *PQOS_CTRL_FIELD;
125
126
127//
128// QoS Info Field
129// Ref:
130// 1. WMM spec 2.2.1: WME Information Element, p.11.
131// 2. 8185 QoS code: QOS_INFO [def. in QoS_mp.h]
132//
133typedef union _QOS_INFO_FIELD{
134 u8 charData;
135
136 struct
137 {
138 u8 ucParameterSetCount:4;
139 u8 ucReserved:4;
140 }WMM;
141
142 struct
143 {
144 //Ref WMM_Specification_1-1.pdf, 2006-06-13 Isaiah
145 u8 ucAC_VO_UAPSD:1;
146 u8 ucAC_VI_UAPSD:1;
147 u8 ucAC_BE_UAPSD:1;
148 u8 ucAC_BK_UAPSD:1;
149 u8 ucReserved1:1;
150 u8 ucMaxSPLen:2;
151 u8 ucReserved2:1;
152
153 }ByWmmPsSta;
154
155 struct
156 {
157 //Ref WMM_Specification_1-1.pdf, 2006-06-13 Isaiah
158 u8 ucParameterSetCount:4;
159 u8 ucReserved:3;
160 u8 ucApUapsd:1;
161 }ByWmmPsAp;
162
163 struct
164 {
165 u8 ucAC3_UAPSD:1;
166 u8 ucAC2_UAPSD:1;
167 u8 ucAC1_UAPSD:1;
168 u8 ucAC0_UAPSD:1;
169 u8 ucQAck:1;
170 u8 ucMaxSPLen:2;
171 u8 ucMoreDataAck:1;
172 } By11eSta;
173
174 struct
175 {
176 u8 ucParameterSetCount:4;
177 u8 ucQAck:1;
178 u8 ucQueueReq:1;
179 u8 ucTXOPReq:1;
180 u8 ucReserved:1;
181 } By11eAp;
182
183 struct
184 {
185 u8 ucReserved1:4;
186 u8 ucQAck:1;
187 u8 ucReserved2:2;
188 u8 ucMoreDataAck:1;
189 } ByWmmsaSta;
190
191 struct
192 {
193 u8 ucReserved1:4;
194 u8 ucQAck:1;
195 u8 ucQueueReq:1;
196 u8 ucTXOPReq:1;
197 u8 ucReserved2:1;
198 } ByWmmsaAp;
199
200 struct
201 {
202 u8 ucAC3_UAPSD:1;
203 u8 ucAC2_UAPSD:1;
204 u8 ucAC1_UAPSD:1;
205 u8 ucAC0_UAPSD:1;
206 u8 ucQAck:1;
207 u8 ucMaxSPLen:2;
208 u8 ucMoreDataAck:1;
209 } ByAllSta;
210
211 struct
212 {
213 u8 ucParameterSetCount:4;
214 u8 ucQAck:1;
215 u8 ucQueueReq:1;
216 u8 ucTXOPReq:1;
217 u8 ucApUapsd:1;
218 } ByAllAp;
219
220}QOS_INFO_FIELD, *PQOS_INFO_FIELD;
221
222//
223// ACI to AC coding.
224// Ref: WMM spec 2.2.2: WME Parameter Element, p.13.
225//
226// AC_CODING is redefined for enum can't be ++, | under C++ compiler, 2006.05.17, by rcnjko.
227//typedef enum _AC_CODING{
228// AC0_BE = 0, // ACI: 0x00 // Best Effort
229// AC1_BK = 1, // ACI: 0x01 // Background
230// AC2_VI = 2, // ACI: 0x10 // Video
231// AC3_VO = 3, // ACI: 0x11 // Voice
232// AC_MAX = 4, // Max: define total number; Should not to be used as a real enum.
233//}AC_CODING,*PAC_CODING;
234//
235typedef u32 AC_CODING;
236#define AC0_BE 0 // ACI: 0x00 // Best Effort
237#define AC1_BK 1 // ACI: 0x01 // Background
238#define AC2_VI 2 // ACI: 0x10 // Video
239#define AC3_VO 3 // ACI: 0x11 // Voice
240#define AC_MAX 4 // Max: define total number; Should not to be used as a real enum.
241
242//
243// ACI/AIFSN Field.
244// Ref: WMM spec 2.2.2: WME Parameter Element, p.12.
245//
246typedef union _ACI_AIFSN{
247 u8 charData;
248
249 struct
250 {
251 u8 AIFSN:4;
252 u8 ACM:1;
253 u8 ACI:2;
254 u8 Reserved:1;
255 }f; // Field
256}ACI_AIFSN, *PACI_AIFSN;
257
258//
259// ECWmin/ECWmax field.
260// Ref: WMM spec 2.2.2: WME Parameter Element, p.13.
261//
262typedef union _ECW{
263 u8 charData;
264 struct
265 {
266 u8 ECWmin:4;
267 u8 ECWmax:4;
268 }f; // Field
269}ECW, *PECW;
270
271//
272// AC Parameters Record Format.
273// Ref: WMM spec 2.2.2: WME Parameter Element, p.12.
274//
275typedef union _AC_PARAM{
276 u32 longData;
277 u8 charData[4];
278
279 struct
280 {
281 ACI_AIFSN AciAifsn;
282 ECW Ecw;
283 u16 TXOPLimit;
284 }f; // Field
285}AC_PARAM, *PAC_PARAM;
286
287
288
289//
290// QoS element subtype
291//
292typedef enum _QOS_ELE_SUBTYPE{
293 QOSELE_TYPE_INFO = 0x00, // 0x00: Information element
294 QOSELE_TYPE_PARAM = 0x01, // 0x01: parameter element
295}QOS_ELE_SUBTYPE,*PQOS_ELE_SUBTYPE;
296
297
298//
299// Direction Field Values.
300// Ref: WMM spec 2.2.11: WME TSPEC Element, p.18.
301//
302typedef enum _DIRECTION_VALUE{
303 DIR_UP = 0, // 0x00 // UpLink
304 DIR_DOWN = 1, // 0x01 // DownLink
305 DIR_DIRECT = 2, // 0x10 // DirectLink
306 DIR_BI_DIR = 3, // 0x11 // Bi-Direction
307}DIRECTION_VALUE,*PDIRECTION_VALUE;
308
309
310//
311// TS Info field in WMM TSPEC Element.
312// Ref:
313// 1. WMM spec 2.2.11: WME TSPEC Element, p.18.
314// 2. 8185 QoS code: QOS_TSINFO [def. in QoS_mp.h]
315//
316typedef union _QOS_TSINFO{
317 u8 charData[3];
318 struct {
319 u8 ucTrafficType:1; //WMM is reserved
320 u8 ucTSID:4;
321 u8 ucDirection:2;
322 u8 ucAccessPolicy:2; //WMM: bit8=0, bit7=1
323 u8 ucAggregation:1; //WMM is reserved
324 u8 ucPSB:1; //WMMSA is APSD
325 u8 ucUP:3;
326 u8 ucTSInfoAckPolicy:2; //WMM is reserved
327 u8 ucSchedule:1; //WMM is reserved
328 u8 ucReserved:7;
329 }field;
330}QOS_TSINFO, *PQOS_TSINFO;
331
332//
333// WMM TSPEC Body.
334// Ref: WMM spec 2.2.11: WME TSPEC Element, p.16.
335//
336typedef union _TSPEC_BODY{
337 u8 charData[55];
338
339 struct
340 {
341 QOS_TSINFO TSInfo; //u8 TSInfo[3];
342 u16 NominalMSDUsize;
343 u16 MaxMSDUsize;
344 u32 MinServiceItv;
345 u32 MaxServiceItv;
346 u32 InactivityItv;
347 u32 SuspenItv;
348 u32 ServiceStartTime;
349 u32 MinDataRate;
350 u32 MeanDataRate;
351 u32 PeakDataRate;
352 u32 MaxBurstSize;
353 u32 DelayBound;
354 u32 MinPhyRate;
355 u16 SurplusBandwidthAllowance;
356 u16 MediumTime;
357 } f; // Field
358}TSPEC_BODY, *PTSPEC_BODY;
359
360
361//
362// WMM TSPEC Element.
363// Ref: WMM spec 2.2.11: WME TSPEC Element, p.16.
364//
365typedef struct _WMM_TSPEC{
366 u8 ID;
367 u8 Length;
368 u8 OUI[3];
369 u8 OUI_Type;
370 u8 OUI_SubType;
371 u8 Version;
372 TSPEC_BODY Body;
373} WMM_TSPEC, *PWMM_TSPEC;
374
375//
376// ACM implementation method.
377// Annie, 2005-12-13.
378//
379typedef enum _ACM_METHOD{
380 eAcmWay0_SwAndHw = 0, // By SW and HW.
381 eAcmWay1_HW = 1, // By HW.
382 eAcmWay2_SW = 2, // By SW.
383}ACM_METHOD,*PACM_METHOD;
384
385
386typedef struct _ACM{
387// u8 RegEnableACM;
388 u64 UsedTime;
389 u64 MediumTime;
390 u8 HwAcmCtl; // TRUE: UsedTime exceed => Do NOT USE this AC. It wll be written to ACM_CONTROL(0xBF BIT 0/1/2 in 8185B).
391}ACM, *PACM;
392
393typedef u8 AC_UAPSD, *PAC_UAPSD;
394
395#define GET_VO_UAPSD(_apsd) ((_apsd) & BIT0)
396#define SET_VO_UAPSD(_apsd) ((_apsd) |= BIT0)
397
398#define GET_VI_UAPSD(_apsd) ((_apsd) & BIT1)
399#define SET_VI_UAPSD(_apsd) ((_apsd) |= BIT1)
400
401#define GET_BK_UAPSD(_apsd) ((_apsd) & BIT2)
402#define SET_BK_UAPSD(_apsd) ((_apsd) |= BIT2)
403
404#define GET_BE_UAPSD(_apsd) ((_apsd) & BIT3)
405#define SET_BE_UAPSD(_apsd) ((_apsd) |= BIT3)
406
407
408//typedef struct _TCLASS{
409// TODO
410//} TCLASS, *PTCLASS;
411typedef union _QOS_TCLAS{
412
413 struct _TYPE_GENERAL{
414 u8 Priority;
415 u8 ClassifierType;
416 u8 Mask;
417 } TYPE_GENERAL;
418
419 struct _TYPE0_ETH{
420 u8 Priority;
421 u8 ClassifierType;
422 u8 Mask;
423 u8 SrcAddr[6];
424 u8 DstAddr[6];
425 u16 Type;
426 } TYPE0_ETH;
427
428 struct _TYPE1_IPV4{
429 u8 Priority;
430 u8 ClassifierType;
431 u8 Mask;
432 u8 Version;
433 u8 SrcIP[4];
434 u8 DstIP[4];
435 u16 SrcPort;
436 u16 DstPort;
437 u8 DSCP;
438 u8 Protocol;
439 u8 Reserved;
440 } TYPE1_IPV4;
441
442 struct _TYPE1_IPV6{
443 u8 Priority;
444 u8 ClassifierType;
445 u8 Mask;
446 u8 Version;
447 u8 SrcIP[16];
448 u8 DstIP[16];
449 u16 SrcPort;
450 u16 DstPort;
451 u8 FlowLabel[3];
452 } TYPE1_IPV6;
453
454 struct _TYPE2_8021Q{
455 u8 Priority;
456 u8 ClassifierType;
457 u8 Mask;
458 u16 TagType;
459 } TYPE2_8021Q;
460} QOS_TCLAS, *PQOS_TCLAS;
461
462//typedef struct _WMM_TSTREAM{
463//
464//- TSPEC
465//- AC (which to mapping)
466//} WMM_TSTREAM, *PWMM_TSTREAM;
467typedef struct _QOS_TSTREAM{
468 u8 AC;
469 WMM_TSPEC TSpec;
470 QOS_TCLAS TClass;
471} QOS_TSTREAM, *PQOS_TSTREAM;
472
473//typedef struct _U_APSD{
474//- TriggerEnable [4]
475//- MaxSPLength
476//- HighestAcBuffered
477//} U_APSD, *PU_APSD;
478
479//joseph TODO:
480// UAPSD function should be implemented by 2 data structure
481// "Qos control field" and "Qos info field"
482//typedef struct _QOS_UAPSD{
483// u8 bTriggerEnable[4];
484// u8 MaxSPLength;
485// u8 HighestBufAC;
486//} QOS_UAPSD, *PQOS_APSD;
487
488//----------------------------------------------------------------------------
489// 802.11 Management frame Status Code field
490//----------------------------------------------------------------------------
491typedef struct _OCTET_STRING{
492 u8 *Octet;
493 u16 Length;
494}OCTET_STRING, *POCTET_STRING;
495
496//
497// STA QoS data.
498// Ref: DOT11_QOS in 8185 code. [def. in QoS_mp.h]
499//
500typedef struct _STA_QOS{
501 //DECLARE_RT_OBJECT(STA_QOS);
502 u8 WMMIEBuf[MAX_WMMELE_LENGTH];
503 u8* WMMIE;
504
505 // Part 1. Self QoS Mode.
506 QOS_MODE QosCapability; //QoS Capability, 2006-06-14 Isaiah
507 QOS_MODE CurrentQosMode;
508
509 // For WMM Power Save Mode :
510 // ACs are trigger/delivery enabled or legacy power save enabled. 2006-06-13 Isaiah
511 AC_UAPSD b4ac_Uapsd; //VoUapsd(bit0), ViUapsd(bit1), BkUapsd(bit2), BeUapsd(bit3),
512 AC_UAPSD Curr4acUapsd;
513 u8 bInServicePeriod;
514 u8 MaxSPLength;
515 int NumBcnBeforeTrigger;
516
517 // Part 2. EDCA Parameter (perAC)
518 u8 * pWMMInfoEle;
519 u8 WMMParamEle[WMM_PARAM_ELEMENT_SIZE];
520 u8 WMMPELength;
521
522 // <Bruce_Note>
523 //2 ToDo: remove the Qos Info Field and replace it by the above WMM Info element.
524 // By Bruce, 2008-01-30.
525 // Part 2. EDCA Parameter (perAC)
526 QOS_INFO_FIELD QosInfoField_STA; // Maintained by STA
527 QOS_INFO_FIELD QosInfoField_AP; // Retrieved from AP
528
529 AC_PARAM CurAcParameters[4];
530
531 // Part 3. ACM
532 ACM acm[4];
533 ACM_METHOD AcmMethod;
534
535 // Part 4. Per TID (Part 5: TCLASS will be described by TStream)
536 QOS_TSTREAM TStream[16];
537 WMM_TSPEC TSpec;
538
539 u32 QBssWirelessMode;
540
541 // No Ack Setting
542 u8 bNoAck;
543
544 // Enable/Disable Rx immediate BA capability.
545 u8 bEnableRxImmBA;
546
547}STA_QOS, *PSTA_QOS;
548
549//
550// BSS QOS data.
551// Ref: BssDscr in 8185 code. [def. in BssDscr.h]
552//
553typedef struct _BSS_QOS{
554 QOS_MODE bdQoSMode;
555
556 u8 bdWMMIEBuf[MAX_WMMELE_LENGTH];
557 u8* bdWMMIE;
558
559 QOS_ELE_SUBTYPE EleSubType;
560
561 u8 * pWMMInfoEle;
562 u8 * pWMMParamEle;
563
564 QOS_INFO_FIELD QosInfoField;
565 AC_PARAM AcParameter[4];
566}BSS_QOS, *PBSS_QOS;
567
568
569//
570// Ref: sQoSCtlLng and QoSCtl definition in 8185 QoS code.
571//#define QoSCtl (( (Adapter->bRegQoS) && (Adapter->dot11QoS.QoSMode &(QOS_EDCA|QOS_HCCA)) ) ?sQoSCtlLng:0)
572//
573#define sQoSCtlLng 2
574#define QOS_CTRL_LEN(_QosMode) ((_QosMode > QOS_DISABLE)? sQoSCtlLng : 0)
575
576
577//Added by joseph
578//UP Mapping to AC, using in MgntQuery_SequenceNumber() and maybe for DSCP
579//#define UP2AC(up) ((up<3)?((up==0)?1:0):(up>>1))
580#define IsACValid(ac) ((ac<=7 )?true:false )
581
582#endif // #ifndef __INC_QOS_TYPE_H
diff --git a/drivers/staging/rtl8192e/ieee80211/rtl819x_TSProc.c b/drivers/staging/rtl8192e/ieee80211/rtl819x_TSProc.c
deleted file mode 100644
index ad6872dcf1c..00000000000
--- a/drivers/staging/rtl8192e/ieee80211/rtl819x_TSProc.c
+++ /dev/null
@@ -1,627 +0,0 @@
1#include "ieee80211.h"
2#include <linux/etherdevice.h>
3#include <linux/slab.h>
4#include "rtl819x_TS.h"
5
6void TsSetupTimeOut(unsigned long data)
7{
8 // Not implement yet
9 // This is used for WMMSA and ACM , that would send ADDTSReq frame.
10}
11
12void TsInactTimeout(unsigned long data)
13{
14 // Not implement yet
15 // This is used for WMMSA and ACM.
16 // This function would be call when TS is no Tx/Rx for some period of time.
17}
18
19/********************************************************************************************************************
20 *function: I still not understand this function, so wait for further implementation
21 * input: unsigned long data //acturally we send TX_TS_RECORD or RX_TS_RECORD to these timer
22 * return: NULL
23 * notice:
24********************************************************************************************************************/
25void RxPktPendingTimeout(unsigned long data)
26{
27 PRX_TS_RECORD pRxTs = (PRX_TS_RECORD)data;
28 struct ieee80211_device *ieee = container_of(pRxTs, struct ieee80211_device, RxTsRecord[pRxTs->num]);
29
30 PRX_REORDER_ENTRY pReorderEntry = NULL;
31
32 //u32 flags = 0;
33 unsigned long flags = 0;
34 struct ieee80211_rxb *stats_IndicateArray[REORDER_WIN_SIZE];
35 u8 index = 0;
36 bool bPktInBuf = false;
37
38
39 spin_lock_irqsave(&(ieee->reorder_spinlock), flags);
40 //PlatformAcquireSpinLock(Adapter, RT_RX_SPINLOCK);
41 IEEE80211_DEBUG(IEEE80211_DL_REORDER,"==================>%s()\n",__FUNCTION__);
42 if(pRxTs->RxTimeoutIndicateSeq != 0xffff)
43 {
44 // Indicate the pending packets sequentially according to SeqNum until meet the gap.
45 while(!list_empty(&pRxTs->RxPendingPktList))
46 {
47 pReorderEntry = (PRX_REORDER_ENTRY)list_entry(pRxTs->RxPendingPktList.prev,RX_REORDER_ENTRY,List);
48 if(index == 0)
49 pRxTs->RxIndicateSeq = pReorderEntry->SeqNum;
50
51 if( SN_LESS(pReorderEntry->SeqNum, pRxTs->RxIndicateSeq) ||
52 SN_EQUAL(pReorderEntry->SeqNum, pRxTs->RxIndicateSeq) )
53 {
54 list_del_init(&pReorderEntry->List);
55
56 if(SN_EQUAL(pReorderEntry->SeqNum, pRxTs->RxIndicateSeq))
57 pRxTs->RxIndicateSeq = (pRxTs->RxIndicateSeq + 1) % 4096;
58
59 IEEE80211_DEBUG(IEEE80211_DL_REORDER,"RxPktPendingTimeout(): IndicateSeq: %d\n", pReorderEntry->SeqNum);
60 stats_IndicateArray[index] = pReorderEntry->prxb;
61 index++;
62
63 list_add_tail(&pReorderEntry->List, &ieee->RxReorder_Unused_List);
64 }
65 else
66 {
67 bPktInBuf = true;
68 break;
69 }
70 }
71 }
72
73 if(index>0)
74 {
75 // Set RxTimeoutIndicateSeq to 0xffff to indicate no pending packets in buffer now.
76 pRxTs->RxTimeoutIndicateSeq = 0xffff;
77
78 // Indicate packets
79 if(index > REORDER_WIN_SIZE){
80 IEEE80211_DEBUG(IEEE80211_DL_ERR, "RxReorderIndicatePacket(): Rx Reorer buffer full!! \n");
81 spin_unlock_irqrestore(&(ieee->reorder_spinlock), flags);
82 return;
83 }
84 ieee80211_indicate_packets(ieee, stats_IndicateArray, index);
85 }
86
87 if(bPktInBuf && (pRxTs->RxTimeoutIndicateSeq==0xffff))
88 {
89 pRxTs->RxTimeoutIndicateSeq = pRxTs->RxIndicateSeq;
90 mod_timer(&pRxTs->RxPktPendingTimer, jiffies + MSECS(ieee->pHTInfo->RxReorderPendingTime));
91 }
92 spin_unlock_irqrestore(&(ieee->reorder_spinlock), flags);
93 //PlatformReleaseSpinLock(Adapter, RT_RX_SPINLOCK);
94}
95
96/********************************************************************************************************************
97 *function: Add BA timer function
98 * input: unsigned long data //acturally we send TX_TS_RECORD or RX_TS_RECORD to these timer
99 * return: NULL
100 * notice:
101********************************************************************************************************************/
102void TsAddBaProcess(unsigned long data)
103{
104 PTX_TS_RECORD pTxTs = (PTX_TS_RECORD)data;
105 u8 num = pTxTs->num;
106 struct ieee80211_device *ieee = container_of(pTxTs, struct ieee80211_device, TxTsRecord[num]);
107
108 TsInitAddBA(ieee, pTxTs, BA_POLICY_IMMEDIATE, false);
109 IEEE80211_DEBUG(IEEE80211_DL_BA, "TsAddBaProcess(): ADDBA Req is started!! \n");
110}
111
112
113void ResetTsCommonInfo(PTS_COMMON_INFO pTsCommonInfo)
114{
115 memset(pTsCommonInfo->Addr, 0, 6);
116 memset(&pTsCommonInfo->TSpec, 0, sizeof(TSPEC_BODY));
117 memset(&pTsCommonInfo->TClass, 0, sizeof(QOS_TCLAS)*TCLAS_NUM);
118 pTsCommonInfo->TClasProc = 0;
119 pTsCommonInfo->TClasNum = 0;
120}
121
122void ResetTxTsEntry(PTX_TS_RECORD pTS)
123{
124 ResetTsCommonInfo(&pTS->TsCommonInfo);
125 pTS->TxCurSeq = 0;
126 pTS->bAddBaReqInProgress = false;
127 pTS->bAddBaReqDelayed = false;
128 pTS->bUsingBa = false;
129 ResetBaEntry(&pTS->TxAdmittedBARecord); //For BA Originator
130 ResetBaEntry(&pTS->TxPendingBARecord);
131}
132
133void ResetRxTsEntry(PRX_TS_RECORD pTS)
134{
135 ResetTsCommonInfo(&pTS->TsCommonInfo);
136 pTS->RxIndicateSeq = 0xffff; // This indicate the RxIndicateSeq is not used now!!
137 pTS->RxTimeoutIndicateSeq = 0xffff; // This indicate the RxTimeoutIndicateSeq is not used now!!
138 ResetBaEntry(&pTS->RxAdmittedBARecord); // For BA Recipient
139}
140
141void TSInitialize(struct ieee80211_device *ieee)
142{
143 PTX_TS_RECORD pTxTS = ieee->TxTsRecord;
144 PRX_TS_RECORD pRxTS = ieee->RxTsRecord;
145 PRX_REORDER_ENTRY pRxReorderEntry = ieee->RxReorderEntry;
146 u8 count = 0;
147 IEEE80211_DEBUG(IEEE80211_DL_TS, "==========>%s()\n", __FUNCTION__);
148 // Initialize Tx TS related info.
149 INIT_LIST_HEAD(&ieee->Tx_TS_Admit_List);
150 INIT_LIST_HEAD(&ieee->Tx_TS_Pending_List);
151 INIT_LIST_HEAD(&ieee->Tx_TS_Unused_List);
152
153 for(count = 0; count < TOTAL_TS_NUM; count++)
154 {
155 //
156 pTxTS->num = count;
157 // The timers for the operation of Traffic Stream and Block Ack.
158 // DLS related timer will be add here in the future!!
159 init_timer(&pTxTS->TsCommonInfo.SetupTimer);
160 pTxTS->TsCommonInfo.SetupTimer.data = (unsigned long)pTxTS;
161 pTxTS->TsCommonInfo.SetupTimer.function = TsSetupTimeOut;
162
163 init_timer(&pTxTS->TsCommonInfo.InactTimer);
164 pTxTS->TsCommonInfo.InactTimer.data = (unsigned long)pTxTS;
165 pTxTS->TsCommonInfo.InactTimer.function = TsInactTimeout;
166
167 init_timer(&pTxTS->TsAddBaTimer);
168 pTxTS->TsAddBaTimer.data = (unsigned long)pTxTS;
169 pTxTS->TsAddBaTimer.function = TsAddBaProcess;
170
171 init_timer(&pTxTS->TxPendingBARecord.Timer);
172 pTxTS->TxPendingBARecord.Timer.data = (unsigned long)pTxTS;
173 pTxTS->TxPendingBARecord.Timer.function = BaSetupTimeOut;
174
175 init_timer(&pTxTS->TxAdmittedBARecord.Timer);
176 pTxTS->TxAdmittedBARecord.Timer.data = (unsigned long)pTxTS;
177 pTxTS->TxAdmittedBARecord.Timer.function = TxBaInactTimeout;
178
179 ResetTxTsEntry(pTxTS);
180 list_add_tail(&pTxTS->TsCommonInfo.List, &ieee->Tx_TS_Unused_List);
181 pTxTS++;
182 }
183
184 // Initialize Rx TS related info.
185 INIT_LIST_HEAD(&ieee->Rx_TS_Admit_List);
186 INIT_LIST_HEAD(&ieee->Rx_TS_Pending_List);
187 INIT_LIST_HEAD(&ieee->Rx_TS_Unused_List);
188 for(count = 0; count < TOTAL_TS_NUM; count++)
189 {
190 pRxTS->num = count;
191 INIT_LIST_HEAD(&pRxTS->RxPendingPktList);
192
193 init_timer(&pRxTS->TsCommonInfo.SetupTimer);
194 pRxTS->TsCommonInfo.SetupTimer.data = (unsigned long)pRxTS;
195 pRxTS->TsCommonInfo.SetupTimer.function = TsSetupTimeOut;
196
197 init_timer(&pRxTS->TsCommonInfo.InactTimer);
198 pRxTS->TsCommonInfo.InactTimer.data = (unsigned long)pRxTS;
199 pRxTS->TsCommonInfo.InactTimer.function = TsInactTimeout;
200
201 init_timer(&pRxTS->RxAdmittedBARecord.Timer);
202 pRxTS->RxAdmittedBARecord.Timer.data = (unsigned long)pRxTS;
203 pRxTS->RxAdmittedBARecord.Timer.function = RxBaInactTimeout;
204
205 init_timer(&pRxTS->RxPktPendingTimer);
206 pRxTS->RxPktPendingTimer.data = (unsigned long)pRxTS;
207 pRxTS->RxPktPendingTimer.function = RxPktPendingTimeout;
208
209 ResetRxTsEntry(pRxTS);
210 list_add_tail(&pRxTS->TsCommonInfo.List, &ieee->Rx_TS_Unused_List);
211 pRxTS++;
212 }
213 // Initialize unused Rx Reorder List.
214 INIT_LIST_HEAD(&ieee->RxReorder_Unused_List);
215//#ifdef TO_DO_LIST
216 for(count = 0; count < REORDER_ENTRY_NUM; count++)
217 {
218 list_add_tail( &pRxReorderEntry->List,&ieee->RxReorder_Unused_List);
219 if(count == (REORDER_ENTRY_NUM-1))
220 break;
221 pRxReorderEntry = &ieee->RxReorderEntry[count+1];
222 }
223//#endif
224
225}
226
227void AdmitTS(struct ieee80211_device *ieee, PTS_COMMON_INFO pTsCommonInfo, u32 InactTime)
228{
229 del_timer_sync(&pTsCommonInfo->SetupTimer);
230 del_timer_sync(&pTsCommonInfo->InactTimer);
231
232 if(InactTime!=0)
233 mod_timer(&pTsCommonInfo->InactTimer, jiffies + MSECS(InactTime));
234}
235
236
237PTS_COMMON_INFO SearchAdmitTRStream(struct ieee80211_device *ieee, u8* Addr, u8 TID, TR_SELECT TxRxSelect)
238{
239 //DIRECTION_VALUE dir;
240 u8 dir;
241 bool search_dir[4] = {0, 0, 0, 0};
242 struct list_head* psearch_list; //FIXME
243 PTS_COMMON_INFO pRet = NULL;
244 if(ieee->iw_mode == IW_MODE_MASTER) //ap mode
245 {
246 if(TxRxSelect == TX_DIR)
247 {
248 search_dir[DIR_DOWN] = true;
249 search_dir[DIR_BI_DIR]= true;
250 }
251 else
252 {
253 search_dir[DIR_UP] = true;
254 search_dir[DIR_BI_DIR]= true;
255 }
256 }
257 else if(ieee->iw_mode == IW_MODE_ADHOC)
258 {
259 if(TxRxSelect == TX_DIR)
260 search_dir[DIR_UP] = true;
261 else
262 search_dir[DIR_DOWN] = true;
263 }
264 else
265 {
266 if(TxRxSelect == TX_DIR)
267 {
268 search_dir[DIR_UP] = true;
269 search_dir[DIR_BI_DIR]= true;
270 search_dir[DIR_DIRECT]= true;
271 }
272 else
273 {
274 search_dir[DIR_DOWN] = true;
275 search_dir[DIR_BI_DIR]= true;
276 search_dir[DIR_DIRECT]= true;
277 }
278 }
279
280 if(TxRxSelect == TX_DIR)
281 psearch_list = &ieee->Tx_TS_Admit_List;
282 else
283 psearch_list = &ieee->Rx_TS_Admit_List;
284
285 //for(dir = DIR_UP; dir <= DIR_BI_DIR; dir++)
286 for(dir = 0; dir <= DIR_BI_DIR; dir++)
287 {
288 if(search_dir[dir] ==false )
289 continue;
290 list_for_each_entry(pRet, psearch_list, List){
291 // IEEE80211_DEBUG(IEEE80211_DL_TS, "ADD:%pM, TID:%d, dir:%d\n", pRet->Addr, pRet->TSpec.f.TSInfo.field.ucTSID, pRet->TSpec.f.TSInfo.field.ucDirection);
292 if (memcmp(pRet->Addr, Addr, 6) == 0)
293 if (pRet->TSpec.f.TSInfo.field.ucTSID == TID)
294 if(pRet->TSpec.f.TSInfo.field.ucDirection == dir)
295 {
296 break;
297 }
298
299 }
300 if(&pRet->List != psearch_list)
301 break;
302 }
303
304 if(&pRet->List != psearch_list){
305 return pRet ;
306 }
307 else
308 return NULL;
309}
310
311void MakeTSEntry(
312 PTS_COMMON_INFO pTsCommonInfo,
313 u8* Addr,
314 PTSPEC_BODY pTSPEC,
315 PQOS_TCLAS pTCLAS,
316 u8 TCLAS_Num,
317 u8 TCLAS_Proc
318 )
319{
320 u8 count;
321
322 if(pTsCommonInfo == NULL)
323 return;
324
325 memcpy(pTsCommonInfo->Addr, Addr, 6);
326
327 if(pTSPEC != NULL)
328 memcpy((u8*)(&(pTsCommonInfo->TSpec)), (u8*)pTSPEC, sizeof(TSPEC_BODY));
329
330 for(count = 0; count < TCLAS_Num; count++)
331 memcpy((u8*)(&(pTsCommonInfo->TClass[count])), (u8*)pTCLAS, sizeof(QOS_TCLAS));
332
333 pTsCommonInfo->TClasProc = TCLAS_Proc;
334 pTsCommonInfo->TClasNum = TCLAS_Num;
335}
336
337
338bool GetTs(
339 struct ieee80211_device* ieee,
340 PTS_COMMON_INFO *ppTS,
341 u8* Addr,
342 u8 TID,
343 TR_SELECT TxRxSelect, //Rx:1, Tx:0
344 bool bAddNewTs
345 )
346{
347 u8 UP = 0;
348 //
349 // We do not build any TS for Broadcast or Multicast stream.
350 // So reject these kinds of search here.
351 //
352 if(is_broadcast_ether_addr(Addr) || is_multicast_ether_addr(Addr))
353 {
354 IEEE80211_DEBUG(IEEE80211_DL_ERR, "get TS for Broadcast or Multicast\n");
355 return false;
356 }
357
358 if (ieee->current_network.qos_data.supported == 0)
359 UP = 0;
360 else
361 {
362 // In WMM case: we use 4 TID only
363 if (!IsACValid(TID))
364 {
365 IEEE80211_DEBUG(IEEE80211_DL_ERR, " in %s(), TID(%d) is not valid\n", __FUNCTION__, TID);
366 return false;
367 }
368
369 switch(TID)
370 {
371 case 0:
372 case 3:
373 UP = 0;
374 break;
375
376 case 1:
377 case 2:
378 UP = 2;
379 break;
380
381 case 4:
382 case 5:
383 UP = 5;
384 break;
385
386 case 6:
387 case 7:
388 UP = 7;
389 break;
390 }
391 }
392
393 *ppTS = SearchAdmitTRStream(
394 ieee,
395 Addr,
396 UP,
397 TxRxSelect);
398 if(*ppTS != NULL)
399 {
400 return true;
401 }
402 else
403 {
404 if(bAddNewTs == false)
405 {
406 IEEE80211_DEBUG(IEEE80211_DL_TS, "add new TS failed(tid:%d)\n", UP);
407 return false;
408 }
409 else
410 {
411 //
412 // Create a new Traffic stream for current Tx/Rx
413 // This is for EDCA and WMM to add a new TS.
414 // For HCCA or WMMSA, TS cannot be addmit without negotiation.
415 //
416 TSPEC_BODY TSpec;
417 PQOS_TSINFO pTSInfo = &TSpec.f.TSInfo;
418 struct list_head* pUnusedList =
419 (TxRxSelect == TX_DIR)?
420 (&ieee->Tx_TS_Unused_List):
421 (&ieee->Rx_TS_Unused_List);
422
423 struct list_head* pAddmitList =
424 (TxRxSelect == TX_DIR)?
425 (&ieee->Tx_TS_Admit_List):
426 (&ieee->Rx_TS_Admit_List);
427
428 DIRECTION_VALUE Dir = (ieee->iw_mode == IW_MODE_MASTER)?
429 ((TxRxSelect==TX_DIR)?DIR_DOWN:DIR_UP):
430 ((TxRxSelect==TX_DIR)?DIR_UP:DIR_DOWN);
431 IEEE80211_DEBUG(IEEE80211_DL_TS, "to add Ts\n");
432 if(!list_empty(pUnusedList))
433 {
434 (*ppTS) = list_entry(pUnusedList->next, TS_COMMON_INFO, List);
435 list_del_init(&(*ppTS)->List);
436 if(TxRxSelect==TX_DIR)
437 {
438 PTX_TS_RECORD tmp = container_of(*ppTS, TX_TS_RECORD, TsCommonInfo);
439 ResetTxTsEntry(tmp);
440 }
441 else{
442 PRX_TS_RECORD tmp = container_of(*ppTS, RX_TS_RECORD, TsCommonInfo);
443 ResetRxTsEntry(tmp);
444 }
445
446 IEEE80211_DEBUG(IEEE80211_DL_TS, "to init current TS, UP:%d, Dir:%d, addr:%pM\n", UP, Dir, Addr);
447 // Prepare TS Info releated field
448 pTSInfo->field.ucTrafficType = 0; // Traffic type: WMM is reserved in this field
449 pTSInfo->field.ucTSID = UP; // TSID
450 pTSInfo->field.ucDirection = Dir; // Direction: if there is DirectLink, this need additional consideration.
451 pTSInfo->field.ucAccessPolicy = 1; // Access policy
452 pTSInfo->field.ucAggregation = 0; // Aggregation
453 pTSInfo->field.ucPSB = 0; // Aggregation
454 pTSInfo->field.ucUP = UP; // User priority
455 pTSInfo->field.ucTSInfoAckPolicy = 0; // Ack policy
456 pTSInfo->field.ucSchedule = 0; // Schedule
457
458 MakeTSEntry(*ppTS, Addr, &TSpec, NULL, 0, 0);
459 AdmitTS(ieee, *ppTS, 0);
460 list_add_tail(&((*ppTS)->List), pAddmitList);
461 // if there is DirectLink, we need to do additional operation here!!
462
463 return true;
464 }
465 else
466 {
467 IEEE80211_DEBUG(IEEE80211_DL_ERR, "in function %s() There is not enough TS record to be used!!", __FUNCTION__);
468 return false;
469 }
470 }
471 }
472}
473
474void RemoveTsEntry(
475 struct ieee80211_device* ieee,
476 PTS_COMMON_INFO pTs,
477 TR_SELECT TxRxSelect
478 )
479{
480 //u32 flags = 0;
481 unsigned long flags = 0;
482 del_timer_sync(&pTs->SetupTimer);
483 del_timer_sync(&pTs->InactTimer);
484 TsInitDelBA(ieee, pTs, TxRxSelect);
485
486 if(TxRxSelect == RX_DIR)
487 {
488//#ifdef TO_DO_LIST
489 PRX_REORDER_ENTRY pRxReorderEntry;
490 PRX_TS_RECORD pRxTS = (PRX_TS_RECORD)pTs;
491 if(timer_pending(&pRxTS->RxPktPendingTimer))
492 del_timer_sync(&pRxTS->RxPktPendingTimer);
493
494 while(!list_empty(&pRxTS->RxPendingPktList))
495 {
496 // PlatformAcquireSpinLock(Adapter, RT_RX_SPINLOCK);
497 spin_lock_irqsave(&(ieee->reorder_spinlock), flags);
498 //pRxReorderEntry = list_entry(&pRxTS->RxPendingPktList.prev,RX_REORDER_ENTRY,List);
499 pRxReorderEntry = (PRX_REORDER_ENTRY)list_entry(pRxTS->RxPendingPktList.prev,RX_REORDER_ENTRY,List);
500 list_del_init(&pRxReorderEntry->List);
501 {
502 int i = 0;
503 struct ieee80211_rxb * prxb = pRxReorderEntry->prxb;
504 if (unlikely(!prxb))
505 {
506 spin_unlock_irqrestore(&(ieee->reorder_spinlock), flags);
507 return;
508 }
509 for(i =0; i < prxb->nr_subframes; i++) {
510 dev_kfree_skb(prxb->subframes[i]);
511 }
512 kfree(prxb);
513 prxb = NULL;
514 }
515 list_add_tail(&pRxReorderEntry->List,&ieee->RxReorder_Unused_List);
516 //PlatformReleaseSpinLock(Adapter, RT_RX_SPINLOCK);
517 spin_unlock_irqrestore(&(ieee->reorder_spinlock), flags);
518 }
519
520//#endif
521 }
522 else
523 {
524 PTX_TS_RECORD pTxTS = (PTX_TS_RECORD)pTs;
525 del_timer_sync(&pTxTS->TsAddBaTimer);
526 }
527}
528
529void RemovePeerTS(struct ieee80211_device* ieee, u8* Addr)
530{
531 PTS_COMMON_INFO pTS, pTmpTS;
532
533 printk("===========>RemovePeerTS,%pM\n", Addr);
534 list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Pending_List, List)
535 {
536 if (memcmp(pTS->Addr, Addr, 6) == 0)
537 {
538 RemoveTsEntry(ieee, pTS, TX_DIR);
539 list_del_init(&pTS->List);
540 list_add_tail(&pTS->List, &ieee->Tx_TS_Unused_List);
541 }
542 }
543
544 list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Admit_List, List)
545 {
546 if (memcmp(pTS->Addr, Addr, 6) == 0)
547 {
548 printk("====>remove Tx_TS_admin_list\n");
549 RemoveTsEntry(ieee, pTS, TX_DIR);
550 list_del_init(&pTS->List);
551 list_add_tail(&pTS->List, &ieee->Tx_TS_Unused_List);
552 }
553 }
554
555 list_for_each_entry_safe(pTS, pTmpTS, &ieee->Rx_TS_Pending_List, List)
556 {
557 if (memcmp(pTS->Addr, Addr, 6) == 0)
558 {
559 RemoveTsEntry(ieee, pTS, RX_DIR);
560 list_del_init(&pTS->List);
561 list_add_tail(&pTS->List, &ieee->Rx_TS_Unused_List);
562 }
563 }
564
565 list_for_each_entry_safe(pTS, pTmpTS, &ieee->Rx_TS_Admit_List, List)
566 {
567 if (memcmp(pTS->Addr, Addr, 6) == 0)
568 {
569 RemoveTsEntry(ieee, pTS, RX_DIR);
570 list_del_init(&pTS->List);
571 list_add_tail(&pTS->List, &ieee->Rx_TS_Unused_List);
572 }
573 }
574}
575
576void RemoveAllTS(struct ieee80211_device* ieee)
577{
578 PTS_COMMON_INFO pTS, pTmpTS;
579
580 list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Pending_List, List)
581 {
582 RemoveTsEntry(ieee, pTS, TX_DIR);
583 list_del_init(&pTS->List);
584 list_add_tail(&pTS->List, &ieee->Tx_TS_Unused_List);
585 }
586
587 list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Admit_List, List)
588 {
589 RemoveTsEntry(ieee, pTS, TX_DIR);
590 list_del_init(&pTS->List);
591 list_add_tail(&pTS->List, &ieee->Tx_TS_Unused_List);
592 }
593
594 list_for_each_entry_safe(pTS, pTmpTS, &ieee->Rx_TS_Pending_List, List)
595 {
596 RemoveTsEntry(ieee, pTS, RX_DIR);
597 list_del_init(&pTS->List);
598 list_add_tail(&pTS->List, &ieee->Rx_TS_Unused_List);
599 }
600
601 list_for_each_entry_safe(pTS, pTmpTS, &ieee->Rx_TS_Admit_List, List)
602 {
603 RemoveTsEntry(ieee, pTS, RX_DIR);
604 list_del_init(&pTS->List);
605 list_add_tail(&pTS->List, &ieee->Rx_TS_Unused_List);
606 }
607}
608
609void TsStartAddBaProcess(struct ieee80211_device* ieee, PTX_TS_RECORD pTxTS)
610{
611 if(pTxTS->bAddBaReqInProgress == false)
612 {
613 pTxTS->bAddBaReqInProgress = true;
614 if(pTxTS->bAddBaReqDelayed)
615 {
616 IEEE80211_DEBUG(IEEE80211_DL_BA, "TsStartAddBaProcess(): Delayed Start ADDBA after 60 sec!!\n");
617 mod_timer(&pTxTS->TsAddBaTimer, jiffies + MSECS(TS_ADDBA_DELAY));
618 }
619 else
620 {
621 IEEE80211_DEBUG(IEEE80211_DL_BA,"TsStartAddBaProcess(): Immediately Start ADDBA now!!\n");
622 mod_timer(&pTxTS->TsAddBaTimer, jiffies+10); //set 10 ticks
623 }
624 }
625 else
626 IEEE80211_DEBUG(IEEE80211_DL_ERR, "%s()==>BA timer is already added\n", __FUNCTION__);
627}
diff --git a/drivers/staging/rtl8192e/internal.h b/drivers/staging/rtl8192e/internal.h
new file mode 100644
index 00000000000..1c39c000e91
--- /dev/null
+++ b/drivers/staging/rtl8192e/internal.h
@@ -0,0 +1,129 @@
1/*
2 * Cryptographic API.
3 *
4 * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the Free
8 * Software Foundation; either version 2 of the License, or (at your option)
9 * any later version.
10 *
11 */
12#ifndef _CRYPTO_INTERNAL_H
13#define _CRYPTO_INTERNAL_H
14
15
16#include <linux/version.h>
17#include "rtl_crypto.h"
18#include <linux/mm.h>
19#include <linux/highmem.h>
20#include <linux/init.h>
21
22#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,12))
23#include <asm/hardirq.h>
24#else
25#include <linux/hardirq.h>
26#include <linux/sched.h>
27#endif
28#include <asm/kmap_types.h>
29
30#ifdef BUILT_IN_CRYPTO
31#ifdef CONFIG_CRYPTO_HMAC
32#undef CONFIG_CRYPTO_HMAC
33#endif
34
35#ifdef CONFIG_KMOD
36#undef CONFIG_KMOD
37#endif
38#endif /* BUILT_IN_CRYPTO */
39
40#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,20))
41#define list_for_each_entry(pos, head, member) \
42 for (pos = list_entry((head)->next, typeof(*pos), member), \
43 prefetch(pos->member.next); \
44 &pos->member != (head); \
45 pos = list_entry(pos->member.next, typeof(*pos), member), \
46 prefetch(pos->member.next))
47
48static inline void cond_resched(void)
49{
50 if (need_resched()) {
51 set_current_state(TASK_RUNNING);
52 schedule();
53 }
54}
55#endif
56
57extern enum km_type crypto_km_types[];
58
59static inline enum km_type crypto_kmap_type(int out)
60{
61 return crypto_km_types[(in_softirq() ? 2 : 0) + out];
62}
63
64static inline void *crypto_kmap(struct page *page, int out)
65{
66 return kmap_atomic(page, crypto_kmap_type(out));
67}
68
69static inline void crypto_kunmap(void *vaddr, int out)
70{
71 kunmap_atomic(vaddr, crypto_kmap_type(out));
72}
73
74static inline void crypto_yield(struct crypto_tfm *tfm)
75{
76 if (!in_softirq())
77 cond_resched();
78}
79
80static inline void *crypto_tfm_ctx(struct crypto_tfm *tfm)
81{
82 return (void *)&tfm[1];
83}
84
85struct crypto_alg *crypto_alg_lookup(const char *name);
86
87#ifdef CONFIG_KMOD
88void crypto_alg_autoload(const char *name);
89struct crypto_alg *crypto_alg_mod_lookup(const char *name);
90#else
91static inline struct crypto_alg *crypto_alg_mod_lookup(const char *name)
92{
93 return crypto_alg_lookup(name);
94}
95#endif
96
97#ifdef CONFIG_CRYPTO_HMAC
98int crypto_alloc_hmac_block(struct crypto_tfm *tfm);
99void crypto_free_hmac_block(struct crypto_tfm *tfm);
100#else
101static inline int crypto_alloc_hmac_block(struct crypto_tfm *tfm)
102{
103 return 0;
104}
105
106static inline void crypto_free_hmac_block(struct crypto_tfm *tfm)
107{ }
108#endif
109
110#ifdef CONFIG_PROC_FS
111void __init crypto_init_proc(void);
112#else
113static inline void crypto_init_proc(void)
114{ }
115#endif
116
117int crypto_init_digest_flags(struct crypto_tfm *tfm, u32 flags);
118int crypto_init_cipher_flags(struct crypto_tfm *tfm, u32 flags);
119int crypto_init_compress_flags(struct crypto_tfm *tfm, u32 flags);
120
121int crypto_init_digest_ops(struct crypto_tfm *tfm);
122int crypto_init_cipher_ops(struct crypto_tfm *tfm);
123int crypto_init_compress_ops(struct crypto_tfm *tfm);
124
125void crypto_exit_digest_ops(struct crypto_tfm *tfm);
126void crypto_exit_cipher_ops(struct crypto_tfm *tfm);
127void crypto_exit_compress_ops(struct crypto_tfm *tfm);
128
129#endif /* _CRYPTO_INTERNAL_H */
diff --git a/drivers/staging/rtl8192e/kmap_types.h b/drivers/staging/rtl8192e/kmap_types.h
new file mode 100644
index 00000000000..de67bb01b5f
--- /dev/null
+++ b/drivers/staging/rtl8192e/kmap_types.h
@@ -0,0 +1,20 @@
1#ifndef __KMAP_TYPES_H
2
3#define __KMAP_TYPES_H
4
5
6enum km_type {
7 KM_BOUNCE_READ,
8 KM_SKB_SUNRPC_DATA,
9 KM_SKB_DATA_SOFTIRQ,
10 KM_USER0,
11 KM_USER1,
12 KM_BH_IRQ,
13 KM_SOFTIRQ0,
14 KM_SOFTIRQ1,
15 KM_TYPE_NR
16};
17
18#define _ASM_KMAP_TYPES_H
19
20#endif
diff --git a/drivers/staging/rtl8192e/license b/drivers/staging/rtl8192e/license
new file mode 100644
index 00000000000..4bea9fa60da
--- /dev/null
+++ b/drivers/staging/rtl8192e/license
@@ -0,0 +1,339 @@
1
2"This software program is licensed subject to the GNU General Public License
3(GPL). Version 2, June 1991, available at
4<http:
5
6GNU General Public License
7
8Version 2, June 1991
9
10Copyright (C) 1989, 1991 Free Software Foundation, Inc.
1159 Temple Place - Suite 330, Boston, MA 02111-1307, USA
12
13Everyone is permitted to copy and distribute verbatim copies of this license
14document, but changing it is not allowed.
15
16Preamble
17
18The licenses for most software are designed to take away your freedom to
19share and change it. By contrast, the GNU General Public License is intended
20to guarantee your freedom to share and change free software--to make sure
21the software is free for all its users. This General Public License applies
22to most of the Free Software Foundation's software and to any other program
23whose authors commit to using it. (Some other Free Software Foundation
24software is covered by the GNU Library General Public License instead.) You
25can apply it to your programs, too.
26
27When we speak of free software, we are referring to freedom, not price. Our
28General Public Licenses are designed to make sure that you have the freedom
29to distribute copies of free software (and charge for this service if you
30wish), that you receive source code or can get it if you want it, that you
31can change the software or use pieces of it in new free programs; and that
32you know you can do these things.
33
34To protect your rights, we need to make restrictions that forbid anyone to
35deny you these rights or to ask you to surrender the rights. These
36restrictions translate to certain responsibilities for you if you distribute
37copies of the software, or if you modify it.
38
39For example, if you distribute copies of such a program, whether gratis or
40for a fee, you must give the recipients all the rights that you have. You
41must make sure that they, too, receive or can get the source code. And you
42must show them these terms so they know their rights.
43
44We protect your rights with two steps: (1) copyright the software, and (2)
45offer you this license which gives you legal permission to copy, distribute
46and/or modify the software.
47
48Also, for each author's protection and ours, we want to make certain that
49everyone understands that there is no warranty for this free software. If
50the software is modified by someone else and passed on, we want its
51recipients to know that what they have is not the original, so that any
52problems introduced by others will not reflect on the original authors'
53reputations.
54
55Finally, any free program is threatened constantly by software patents. We
56wish to avoid the danger that redistributors of a free program will
57individually obtain patent licenses, in effect making the program
58proprietary. To prevent this, we have made it clear that any patent must be
59licensed for everyone's free use or not licensed at all.
60
61The precise terms and conditions for copying, distribution and modification
62follow.
63
64TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
65
660. This License applies to any program or other work which contains a notice
67 placed by the copyright holder saying it may be distributed under the
68 terms of this General Public License. The "Program", below, refers to any
69 such program or work, and a "work based on the Program" means either the
70 Program or any derivative work under copyright law: that is to say, a
71 work containing the Program or a portion of it, either verbatim or with
72 modifications and/or translated into another language. (Hereinafter,
73 translation is included without limitation in the term "modification".)
74 Each licensee is addressed as "you".
75
76 Activities other than copying, distribution and modification are not
77 covered by this License; they are outside its scope. The act of running
78 the Program is not restricted, and the output from the Program is covered
79 only if its contents constitute a work based on the Program (independent
80 of having been made by running the Program). Whether that is true depends
81 on what the Program does.
82
831. You may copy and distribute verbatim copies of the Program's source code
84 as you receive it, in any medium, provided that you conspicuously and
85 appropriately publish on each copy an appropriate copyright notice and
86 disclaimer of warranty; keep intact all the notices that refer to this
87 License and to the absence of any warranty; and give any other recipients
88 of the Program a copy of this License along with the Program.
89
90 You may charge a fee for the physical act of transferring a copy, and you
91 may at your option offer warranty protection in exchange for a fee.
92
932. You may modify your copy or copies of the Program or any portion of it,
94 thus forming a work based on the Program, and copy and distribute such
95 modifications or work under the terms of Section 1 above, provided that
96 you also meet all of these conditions:
97
98 * a) You must cause the modified files to carry prominent notices stating
99 that you changed the files and the date of any change.
100
101 * b) You must cause any work that you distribute or publish, that in
102 whole or in part contains or is derived from the Program or any part
103 thereof, to be licensed as a whole at no charge to all third parties
104 under the terms of this License.
105
106 * c) If the modified program normally reads commands interactively when
107 run, you must cause it, when started running for such interactive
108 use in the most ordinary way, to print or display an announcement
109 including an appropriate copyright notice and a notice that there is
110 no warranty (or else, saying that you provide a warranty) and that
111 users may redistribute the program under these conditions, and
112 telling the user how to view a copy of this License. (Exception: if
113 the Program itself is interactive but does not normally print such
114 an announcement, your work based on the Program is not required to
115 print an announcement.)
116
117 These requirements apply to the modified work as a whole. If identifiable
118 sections of that work are not derived from the Program, and can be
119 reasonably considered independent and separate works in themselves, then
120 this License, and its terms, do not apply to those sections when you
121 distribute them as separate works. But when you distribute the same
122 sections as part of a whole which is a work based on the Program, the
123 distribution of the whole must be on the terms of this License, whose
124 permissions for other licensees extend to the entire whole, and thus to
125 each and every part regardless of who wrote it.
126
127 Thus, it is not the intent of this section to claim rights or contest
128 your rights to work written entirely by you; rather, the intent is to
129 exercise the right to control the distribution of derivative or
130 collective works based on the Program.
131
132 In addition, mere aggregation of another work not based on the Program
133 with the Program (or with a work based on the Program) on a volume of a
134 storage or distribution medium does not bring the other work under the
135 scope of this License.
136
1373. You may copy and distribute the Program (or a work based on it, under
138 Section 2) in object code or executable form under the terms of Sections
139 1 and 2 above provided that you also do one of the following:
140
141 * a) Accompany it with the complete corresponding machine-readable source
142 code, which must be distributed under the terms of Sections 1 and 2
143 above on a medium customarily used for software interchange; or,
144
145 * b) Accompany it with a written offer, valid for at least three years,
146 to give any third party, for a charge no more than your cost of
147 physically performing source distribution, a complete machine-
148 readable copy of the corresponding source code, to be distributed
149 under the terms of Sections 1 and 2 above on a medium customarily
150 used for software interchange; or,
151
152 * c) Accompany it with the information you received as to the offer to
153 distribute corresponding source code. (This alternative is allowed
154 only for noncommercial distribution and only if you received the
155 program in object code or executable form with such an offer, in
156 accord with Subsection b above.)
157
158 The source code for a work means the preferred form of the work for
159 making modifications to it. For an executable work, complete source code
160 means all the source code for all modules it contains, plus any
161 associated interface definition files, plus the scripts used to control
162 compilation and installation of the executable. However, as a special
163 exception, the source code distributed need not include anything that is
164 normally distributed (in either source or binary form) with the major
165 components (compiler, kernel, and so on) of the operating system on which
166 the executable runs, unless that component itself accompanies the
167 executable.
168
169 If distribution of executable or object code is made by offering access
170 to copy from a designated place, then offering equivalent access to copy
171 the source code from the same place counts as distribution of the source
172 code, even though third parties are not compelled to copy the source
173 along with the object code.
174
1754. You may not copy, modify, sublicense, or distribute the Program except as
176 expressly provided under this License. Any attempt otherwise to copy,
177 modify, sublicense or distribute the Program is void, and will
178 automatically terminate your rights under this License. However, parties
179 who have received copies, or rights, from you under this License will not
180 have their licenses terminated so long as such parties remain in full
181 compliance.
182
1835. You are not required to accept this License, since you have not signed
184 it. However, nothing else grants you permission to modify or distribute
185 the Program or its derivative works. These actions are prohibited by law
186 if you do not accept this License. Therefore, by modifying or
187 distributing the Program (or any work based on the Program), you
188 indicate your acceptance of this License to do so, and all its terms and
189 conditions for copying, distributing or modifying the Program or works
190 based on it.
191
1926. Each time you redistribute the Program (or any work based on the
193 Program), the recipient automatically receives a license from the
194 original licensor to copy, distribute or modify the Program subject to
195 these terms and conditions. You may not impose any further restrictions
196 on the recipients' exercise of the rights granted herein. You are not
197 responsible for enforcing compliance by third parties to this License.
198
1997. If, as a consequence of a court judgment or allegation of patent
200 infringement or for any other reason (not limited to patent issues),
201 conditions are imposed on you (whether by court order, agreement or
202 otherwise) that contradict the conditions of this License, they do not
203 excuse you from the conditions of this License. If you cannot distribute
204 so as to satisfy simultaneously your obligations under this License and
205 any other pertinent obligations, then as a consequence you may not
206 distribute the Program at all. For example, if a patent license would
207 not permit royalty-free redistribution of the Program by all those who
208 receive copies directly or indirectly through you, then the only way you
209 could satisfy both it and this License would be to refrain entirely from
210 distribution of the Program.
211
212 If any portion of this section is held invalid or unenforceable under any
213 particular circumstance, the balance of the section is intended to apply
214 and the section as a whole is intended to apply in other circumstances.
215
216 It is not the purpose of this section to induce you to infringe any
217 patents or other property right claims or to contest validity of any
218 such claims; this section has the sole purpose of protecting the
219 integrity of the free software distribution system, which is implemented
220 by public license practices. Many people have made generous contributions
221 to the wide range of software distributed through that system in
222 reliance on consistent application of that system; it is up to the
223 author/donor to decide if he or she is willing to distribute software
224 through any other system and a licensee cannot impose that choice.
225
226 This section is intended to make thoroughly clear what is believed to be
227 a consequence of the rest of this License.
228
2298. If the distribution and/or use of the Program is restricted in certain
230 countries either by patents or by copyrighted interfaces, the original
231 copyright holder who places the Program under this License may add an
232 explicit geographical distribution limitation excluding those countries,
233 so that distribution is permitted only in or among countries not thus
234 excluded. In such case, this License incorporates the limitation as if
235 written in the body of this License.
236
2379. The Free Software Foundation may publish revised and/or new versions of
238 the General Public License from time to time. Such new versions will be
239 similar in spirit to the present version, but may differ in detail to
240 address new problems or concerns.
241
242 Each version is given a distinguishing version number. If the Program
243 specifies a version number of this License which applies to it and "any
244 later version", you have the option of following the terms and
245 conditions either of that version or of any later version published by
246 the Free Software Foundation. If the Program does not specify a version
247 number of this License, you may choose any version ever published by the
248 Free Software Foundation.
249
25010. If you wish to incorporate parts of the Program into other free programs
251 whose distribution conditions are different, write to the author to ask
252 for permission. For software which is copyrighted by the Free Software
253 Foundation, write to the Free Software Foundation; we sometimes make
254 exceptions for this. Our decision will be guided by the two goals of
255 preserving the free status of all derivatives of our free software and
256 of promoting the sharing and reuse of software generally.
257
258 NO WARRANTY
259
26011. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
261 FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
262 OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
263 PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER
264 EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
265 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE
266 ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH
267 YOU. SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL
268 NECESSARY SERVICING, REPAIR OR CORRECTION.
269
27012. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
271 WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
272 REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR
273 DAMAGES, INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL
274 DAMAGES ARISING OUT OF THE USE OR INABILITY TO USE THE PROGRAM
275 (INCLUDING BUT NOT LIMITED TO LOSS OF DATA OR DATA BEING RENDERED
276 INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD PARTIES OR A FAILURE OF
277 THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS), EVEN IF SUCH HOLDER OR
278 OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
279
280END OF TERMS AND CONDITIONS
281
282How to Apply These Terms to Your New Programs
283
284If you develop a new program, and you want it to be of the greatest
285possible use to the public, the best way to achieve this is to make it free
286software which everyone can redistribute and change under these terms.
287
288To do so, attach the following notices to the program. It is safest to
289attach them to the start of each source file to most effectively convey the
290exclusion of warranty; and each file should have at least the "copyright"
291line and a pointer to where the full notice is found.
292
293one line to give the program's name and an idea of what it does.
294Copyright (C) yyyy name of author
295
296This program is free software; you can redistribute it and/or modify it
297under the terms of the GNU General Public License as published by the Free
298Software Foundation; either version 2 of the License, or (at your option)
299any later version.
300
301This program is distributed in the hope that it will be useful, but WITHOUT
302ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
303FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
304more details.
305
306You should have received a copy of the GNU General Public License along with
307this program; if not, write to the Free Software Foundation, Inc., 59
308Temple Place - Suite 330, Boston, MA 02111-1307, USA.
309
310Also add information on how to contact you by electronic and paper mail.
311
312If the program is interactive, make it output a short notice like this when
313it starts in an interactive mode:
314
315Gnomovision version 69, Copyright (C) year name of author Gnomovision comes
316with ABSOLUTELY NO WARRANTY; for details type 'show w'. This is free
317software, and you are welcome to redistribute it under certain conditions;
318type 'show c' for details.
319
320The hypothetical commands 'show w' and 'show c' should show the appropriate
321parts of the General Public License. Of course, the commands you use may be
322called something other than 'show w' and 'show c'; they could even be
323mouse-clicks or menu items--whatever suits your program.
324
325You should also get your employer (if you work as a programmer) or your
326school, if any, to sign a "copyright disclaimer" for the program, if
327necessary. Here is a sample; alter the names:
328
329Yoyodyne, Inc., hereby disclaims all copyright interest in the program
330'Gnomovision' (which makes passes at compilers) written by James Hacker.
331
332signature of Ty Coon, 1 April 1989
333Ty Coon, President of Vice
334
335This General Public License does not permit incorporating your program into
336proprietary programs. If your program is a subroutine library, you may
337consider it more useful to permit linking proprietary applications with the
338library. If this is what you want to do, use the GNU Library General Public
339License instead of this License.
diff --git a/drivers/staging/rtl8192e/r8190P_def.h b/drivers/staging/rtl8192e/r8190P_def.h
new file mode 100644
index 00000000000..52c00a1c14b
--- /dev/null
+++ b/drivers/staging/rtl8192e/r8190P_def.h
@@ -0,0 +1,415 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/
19
20
21#ifndef R8190P_DEF_H
22#define R8190P_DEF_H
23
24#include <linux/types.h>
25
26#define MAX_SILENT_RESET_RX_SLOT_NUM 10
27
28#define RX_MPDU_QUEUE 0
29#define RX_CMD_QUEUE 1
30
31
32typedef enum _rtl819x_loopback{
33 RTL819X_NO_LOOPBACK = 0,
34 RTL819X_MAC_LOOPBACK = 1,
35 RTL819X_DMA_LOOPBACK = 2,
36 RTL819X_CCK_LOOPBACK = 3,
37}rtl819x_loopback_e;
38
39
40#define RESET_DELAY_8185 20
41
42#define RT_IBSS_INT_MASKS (IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER)
43
44#define DESC90_RATE1M 0x00
45#define DESC90_RATE2M 0x01
46#define DESC90_RATE5_5M 0x02
47#define DESC90_RATE11M 0x03
48#define DESC90_RATE6M 0x04
49#define DESC90_RATE9M 0x05
50#define DESC90_RATE12M 0x06
51#define DESC90_RATE18M 0x07
52#define DESC90_RATE24M 0x08
53#define DESC90_RATE36M 0x09
54#define DESC90_RATE48M 0x0a
55#define DESC90_RATE54M 0x0b
56#define DESC90_RATEMCS0 0x00
57#define DESC90_RATEMCS1 0x01
58#define DESC90_RATEMCS2 0x02
59#define DESC90_RATEMCS3 0x03
60#define DESC90_RATEMCS4 0x04
61#define DESC90_RATEMCS5 0x05
62#define DESC90_RATEMCS6 0x06
63#define DESC90_RATEMCS7 0x07
64#define DESC90_RATEMCS8 0x08
65#define DESC90_RATEMCS9 0x09
66#define DESC90_RATEMCS10 0x0a
67#define DESC90_RATEMCS11 0x0b
68#define DESC90_RATEMCS12 0x0c
69#define DESC90_RATEMCS13 0x0d
70#define DESC90_RATEMCS14 0x0e
71#define DESC90_RATEMCS15 0x0f
72#define DESC90_RATEMCS32 0x20
73
74#define SHORT_SLOT_TIME 9
75#define NON_SHORT_SLOT_TIME 20
76
77
78#define MAX_LINES_HWCONFIG_TXT 1000
79#define MAX_BYTES_LINE_HWCONFIG_TXT 128
80
81#define SW_THREE_WIRE 0
82#define HW_THREE_WIRE 2
83
84#define BT_DEMO_BOARD 0
85#define BT_QA_BOARD 1
86#define BT_FPGA 2
87
88#define Rx_Smooth_Factor 20
89
90#define QSLT_BK 0x1
91#define QSLT_BE 0x0
92#define QSLT_VI 0x4
93#define QSLT_VO 0x6
94#define QSLT_BEACON 0x10
95#define QSLT_HIGH 0x11
96#define QSLT_MGNT 0x12
97#define QSLT_CMD 0x13
98
99#define NUM_OF_FIRMWARE_QUEUE 10
100#define NUM_OF_PAGES_IN_FW 0x100
101#define NUM_OF_PAGE_IN_FW_QUEUE_BK 0x007
102#define NUM_OF_PAGE_IN_FW_QUEUE_BE 0x0aa
103#define NUM_OF_PAGE_IN_FW_QUEUE_VI 0x024
104#define NUM_OF_PAGE_IN_FW_QUEUE_VO 0x007
105#define NUM_OF_PAGE_IN_FW_QUEUE_HCCA 0
106#define NUM_OF_PAGE_IN_FW_QUEUE_CMD 0x2
107#define NUM_OF_PAGE_IN_FW_QUEUE_MGNT 0x10
108#define NUM_OF_PAGE_IN_FW_QUEUE_HIGH 0
109#define NUM_OF_PAGE_IN_FW_QUEUE_BCN 0x4
110#define NUM_OF_PAGE_IN_FW_QUEUE_PUB 0xd
111
112#define NUM_OF_PAGE_IN_FW_QUEUE_BK_DTM 0x026
113#define NUM_OF_PAGE_IN_FW_QUEUE_BE_DTM 0x048
114#define NUM_OF_PAGE_IN_FW_QUEUE_VI_DTM 0x048
115#define NUM_OF_PAGE_IN_FW_QUEUE_VO_DTM 0x026
116#define NUM_OF_PAGE_IN_FW_QUEUE_PUB_DTM 0x00
117
118#define APPLIED_RESERVED_QUEUE_IN_FW 0x80000000
119#define RSVD_FW_QUEUE_PAGE_BK_SHIFT 0x00
120#define RSVD_FW_QUEUE_PAGE_BE_SHIFT 0x08
121#define RSVD_FW_QUEUE_PAGE_VI_SHIFT 0x10
122#define RSVD_FW_QUEUE_PAGE_VO_SHIFT 0x18
123#define RSVD_FW_QUEUE_PAGE_MGNT_SHIFT 0x10
124#define RSVD_FW_QUEUE_PAGE_BCN_SHIFT 0x00
125#define RSVD_FW_QUEUE_PAGE_PUB_SHIFT 0x08
126
127#define HAL_PRIME_CHNL_OFFSET_DONT_CARE 0
128#define HAL_PRIME_CHNL_OFFSET_LOWER 1
129#define HAL_PRIME_CHNL_OFFSET_UPPER 2
130
131
132typedef enum _VERSION_8190{
133 VERSION_8190_BD=0x3,
134 VERSION_8190_BE
135}VERSION_8190,*PVERSION_8190;
136
137#define IC_VersionCut_C 0x2
138#define IC_VersionCut_D 0x3
139#define IC_VersionCut_E 0x4
140
141typedef enum tag_Rf_OpType
142{
143 RF_OP_By_SW_3wire = 0,
144 RF_OP_By_FW,
145 RF_OP_MAX
146}RF_OpType_E;
147
148
149typedef enum _POWER_SAVE_MODE
150{
151 POWER_SAVE_MODE_ACTIVE,
152 POWER_SAVE_MODE_SAVE,
153}POWER_SAVE_MODE;
154
155typedef enum _INTERFACE_SELECT_8190PCI{
156 INTF_SEL1_MINICARD = 0,
157 INTF_SEL0_PCIE = 1,
158 INTF_SEL2_RSV = 2,
159 INTF_SEL3_RSV = 3,
160} INTERFACE_SELECT_8190PCI, *PINTERFACE_SELECT_8190PCI;
161
162typedef struct _BB_REGISTER_DEFINITION{
163 u32 rfintfs;
164 u32 rfintfi;
165 u32 rfintfo;
166 u32 rfintfe;
167 u32 rf3wireOffset;
168 u32 rfLSSI_Select;
169 u32 rfTxGainStage;
170 u32 rfHSSIPara1;
171 u32 rfHSSIPara2;
172 u32 rfSwitchControl;
173 u32 rfAGCControl1;
174 u32 rfAGCControl2;
175 u32 rfRxIQImbalance;
176 u32 rfRxAFE;
177 u32 rfTxIQImbalance;
178 u32 rfTxAFE;
179 u32 rfLSSIReadBack;
180 u32 rfLSSIReadBackPi;
181}BB_REGISTER_DEFINITION_T, *PBB_REGISTER_DEFINITION_T;
182
183typedef struct _TX_FWINFO_STRUCUTRE{
184 u8 TxRate:7;
185 u8 CtsEnable:1;
186 u8 RtsRate:7;
187 u8 RtsEnable:1;
188 u8 TxHT:1;
189 u8 Short:1;
190 u8 TxBandwidth:1;
191 u8 TxSubCarrier:2;
192 u8 STBC:2;
193 u8 AllowAggregation:1;
194 u8 RtsHT:1;
195 u8 RtsShort:1;
196 u8 RtsBandwidth:1;
197 u8 RtsSubcarrier:2;
198 u8 RtsSTBC:2;
199 u8 EnableCPUDur:1;
200
201 u32 RxMF:2;
202 u32 RxAMD:3;
203 u32 Reserved1:3;
204 u32 TxAGCOffset:4;
205 u32 TxAGCSign:1;
206 u32 Tx_INFO_RSVD:6;
207 u32 PacketID:13;
208}TX_FWINFO_T;
209
210typedef struct _TX_FWINFO_8190PCI{
211 u8 TxRate:7;
212 u8 CtsEnable:1;
213 u8 RtsRate:7;
214 u8 RtsEnable:1;
215 u8 TxHT:1;
216 u8 Short:1;
217 u8 TxBandwidth:1;
218 u8 TxSubCarrier:2;
219 u8 STBC:2;
220 u8 AllowAggregation:1;
221 u8 RtsHT:1;
222 u8 RtsShort:1;
223 u8 RtsBandwidth:1;
224 u8 RtsSubcarrier:2;
225 u8 RtsSTBC:2;
226 u8 EnableCPUDur:1;
227
228 u32 RxMF:2;
229 u32 RxAMD:3;
230 u32 TxPerPktInfoFeedback:1;
231 u32 Reserved1:2;
232 u32 TxAGCOffset:4;
233 u32 TxAGCSign:1;
234 u32 RAW_TXD:1;
235 u32 Retry_Limit:4;
236 u32 Reserved2:1;
237 u32 PacketID:13;
238
239
240}TX_FWINFO_8190PCI, *PTX_FWINFO_8190PCI;
241
242
243#define TX_DESC_SIZE 32
244
245#define TX_DESC_CMD_SIZE 32
246
247
248#define TX_STATUS_DESC_SIZE 32
249
250#define TX_FWINFO_SIZE 8
251
252
253#define RX_DESC_SIZE 16
254
255#define RX_STATUS_DESC_SIZE 16
256
257#define RX_DRIVER_INFO_SIZE 8
258
259typedef struct _LOG_INTERRUPT_8190
260{
261 u32 nIMR_COMDOK;
262 u32 nIMR_MGNTDOK;
263 u32 nIMR_HIGH;
264 u32 nIMR_VODOK;
265 u32 nIMR_VIDOK;
266 u32 nIMR_BEDOK;
267 u32 nIMR_BKDOK;
268 u32 nIMR_ROK;
269 u32 nIMR_RCOK;
270 u32 nIMR_TBDOK;
271 u32 nIMR_BDOK;
272 u32 nIMR_RXFOVW;
273} LOG_INTERRUPT_8190_T, *PLOG_INTERRUPT_8190_T;
274
275typedef struct _phy_ofdm_rx_status_rxsc_sgien_exintfflag{
276 u8 reserved:4;
277 u8 rxsc:2;
278 u8 sgi_en:1;
279 u8 ex_intf_flag:1;
280}phy_ofdm_rx_status_rxsc_sgien_exintfflag;
281
282typedef struct _phy_ofdm_rx_status_report_819xpci
283{
284 u8 trsw_gain_X[4];
285 u8 pwdb_all;
286 u8 cfosho_X[4];
287 u8 cfotail_X[4];
288 u8 rxevm_X[2];
289 u8 rxsnr_X[4];
290 u8 pdsnr_X[2];
291 u8 csi_current_X[2];
292 u8 csi_target_X[2];
293 u8 sigevm;
294 u8 max_ex_pwr;
295 u8 sgi_en;
296 u8 rxsc_sgien_exflg;
297}phy_sts_ofdm_819xpci_t;
298
299typedef struct _phy_cck_rx_status_report_819xpci
300{
301 u8 adc_pwdb_X[4];
302 u8 sq_rpt;
303 u8 cck_agc_rpt;
304}phy_sts_cck_819xpci_t, phy_sts_cck_8192s_t;
305
306
307#define PHY_RSSI_SLID_WIN_MAX 100
308#define PHY_Beacon_RSSI_SLID_WIN_MAX 10
309
310typedef struct _tx_desc_819x_pci {
311 u16 PktSize;
312 u8 Offset;
313 u8 Reserved1:3;
314 u8 CmdInit:1;
315 u8 LastSeg:1;
316 u8 FirstSeg:1;
317 u8 LINIP:1;
318 u8 OWN:1;
319
320 u8 TxFWInfoSize;
321 u8 RATid:3;
322 u8 DISFB:1;
323 u8 USERATE:1;
324 u8 MOREFRAG:1;
325 u8 NoEnc:1;
326 u8 PIFS:1;
327 u8 QueueSelect:5;
328 u8 NoACM:1;
329 u8 Resv:2;
330 u8 SecCAMID:5;
331 u8 SecDescAssign:1;
332 u8 SecType:2;
333
334 u16 TxBufferSize;
335 u8 PktId:7;
336 u8 Resv1:1;
337 u8 Reserved2;
338
339 u32 TxBuffAddr;
340
341 u32 NextDescAddress;
342
343 u32 Reserved5;
344 u32 Reserved6;
345 u32 Reserved7;
346}tx_desc, *ptx_desc;
347
348
349typedef struct _tx_desc_cmd_819x_pci {
350 u16 PktSize;
351 u8 Reserved1;
352 u8 CmdType:3;
353 u8 CmdInit:1;
354 u8 LastSeg:1;
355 u8 FirstSeg:1;
356 u8 LINIP:1;
357 u8 OWN:1;
358
359 u16 ElementReport;
360 u16 Reserved2;
361
362 u16 TxBufferSize;
363 u16 Reserved3;
364
365 u32 TxBuffAddr;
366 u32 NextDescAddress;
367 u32 Reserved4;
368 u32 Reserved5;
369 u32 Reserved6;
370}tx_desc_cmd, *ptx_desc_cmd;
371
372typedef struct _rx_desc_819x_pci{
373 u16 Length:14;
374 u16 CRC32:1;
375 u16 ICV:1;
376 u8 RxDrvInfoSize;
377 u8 Shift:2;
378 u8 PHYStatus:1;
379 u8 SWDec:1;
380 u8 LastSeg:1;
381 u8 FirstSeg:1;
382 u8 EOR:1;
383 u8 OWN:1;
384
385 u32 Reserved2;
386
387 u32 Reserved3;
388
389 u32 BufferAddress;
390
391}rx_desc, *prx_desc;
392
393
394typedef struct _rx_fwinfo_819x_pci{
395 u16 Reserved1:12;
396 u16 PartAggr:1;
397 u16 FirstAGGR:1;
398 u16 Reserved2:2;
399
400 u8 RxRate:7;
401 u8 RxHT:1;
402
403 u8 BW:1;
404 u8 SPLCP:1;
405 u8 Reserved3:2;
406 u8 PAM:1;
407 u8 Mcast:1;
408 u8 Bcast:1;
409 u8 Reserved4:1;
410
411 u32 TSFL;
412
413}rx_fwinfo, *prx_fwinfo;
414
415#endif
diff --git a/drivers/staging/rtl8192e/r8190P_hwimg.c b/drivers/staging/rtl8192e/r8190P_hwimg.c
new file mode 100644
index 00000000000..d8c575a89de
--- /dev/null
+++ b/drivers/staging/rtl8192e/r8190P_hwimg.c
@@ -0,0 +1,4538 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/
19#ifndef __INC_R819XU_FIRMWARE_IMG_H
20#define __INC_R819XU_FIRMWARE_IMG_H
21/*Created on 2008/ 5/19, 6:38*/
22
23#include "r8190P_hwimg.h"
24
25u8 Rtl8190PciFwBootArray[BootArrayLengthPci] = {
260x10,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x3c,0x08,0xbf,0xc0,0x25,0x08,0x00,0x08,
270x3c,0x09,0xb0,0x03,0xad,0x28,0x00,0x20,0x40,0x80,0x68,0x00,0x00,0x00,0x00,0x00,
280x3c,0x0a,0xd0,0x00,0x40,0x8a,0x60,0x00,0x00,0x00,0x00,0x00,0x3c,0x08,0x80,0x01,
290x25,0x08,0xd8,0xdc,0x24,0x09,0x00,0x01,0x3c,0x01,0x7f,0xff,0x34,0x21,0xff,0xff,
300x01,0x01,0x50,0x24,0x00,0x09,0x48,0x40,0x35,0x29,0x00,0x01,0x01,0x2a,0x10,0x2b,
310x14,0x40,0xff,0xfc,0x00,0x00,0x00,0x00,0x3c,0x0a,0x00,0x00,0x25,0x4a,0x00,0x00,
320x4c,0x8a,0x00,0x00,0x4c,0x89,0x08,0x00,0x00,0x00,0x00,0x00,0x3c,0x08,0x80,0x01,
330x25,0x08,0xd8,0xdc,0x3c,0x01,0x80,0x00,0x01,0x21,0x48,0x25,0x3c,0x0a,0xbf,0xc0,
340x25,0x4a,0x00,0x7c,0x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,0xad,0x00,0x00,0x00,
350x21,0x08,0x00,0x04,0x01,0x09,0x10,0x2b,0x14,0x40,0xff,0xf8,0x00,0x00,0x00,0x00,
360x3c,0x08,0x80,0x01,0x25,0x08,0x7f,0xff,0x24,0x09,0x00,0x01,0x3c,0x01,0x7f,0xff,
370x34,0x21,0xff,0xff,0x01,0x01,0x50,0x24,0x00,0x09,0x48,0x40,0x35,0x29,0x00,0x01,
380x01,0x2a,0x10,0x2b,0x14,0x40,0xff,0xfc,0x00,0x00,0x00,0x00,0x3c,0x0a,0x80,0x01,
390x25,0x4a,0x00,0x00,0x3c,0x01,0x7f,0xff,0x34,0x21,0xff,0xff,0x01,0x41,0x50,0x24,
400x3c,0x09,0x00,0x01,0x35,0x29,0x7f,0xff,0x4c,0x8a,0x20,0x00,0x4c,0x89,0x28,0x00,
410x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x24,0x08,0x04,0x10,
420x00,0x00,0x00,0x00,0x40,0x88,0xa0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
430x3c,0x08,0xbf,0xc0,0x00,0x00,0x00,0x00,0x8d,0x09,0x00,0x00,0x00,0x00,0x00,0x00,
440x3c,0x0a,0xbf,0xc0,0x25,0x4a,0x01,0x20,0x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,
450x3c,0x08,0xb0,0x03,0x8d,0x09,0x00,0x00,0x00,0x00,0x00,0x00,0x35,0x29,0x00,0x10,
460xad,0x09,0x00,0x00,0x00,0x00,0x00,0x00,0x3c,0x08,0x80,0x00,0x25,0x08,0x6b,0x18,
470x01,0x00,0x00,0x08,0x00,0x00,0x00,0x00,};
48
49u8 Rtl8190PciFwMainArray[MainArrayLengthPci] = {
500x40,0x04,0x68,0x00,0x40,0x05,0x70,0x00,0x40,0x06,0x40,0x00,0x0c,0x00,0x1a,0x35,
510x00,0x00,0x00,0x00,0x40,0x1a,0x68,0x00,0x33,0x5b,0x00,0x3c,0x17,0x60,0x00,0x09,
520x00,0x00,0x00,0x00,0x40,0x1b,0x60,0x00,0x00,0x00,0x00,0x00,0x03,0x5b,0xd0,0x24,
530x40,0x1a,0x70,0x00,0x03,0x40,0x00,0x08,0x42,0x00,0x00,0x10,0x00,0x00,0x00,0x00,
540x00,0x00,0x00,0x00,0x3c,0x02,0xff,0xff,0x34,0x42,0xff,0xff,0x8c,0x43,0x00,0x00,
550x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,0x24,0x42,0x00,0xd0,
560xac,0x62,0x00,0x00,0x00,0x00,0x20,0x21,0x27,0x85,0x94,0x50,0x00,0x85,0x18,0x21,
570x24,0x84,0x00,0x01,0x28,0x82,0x00,0x0a,0x14,0x40,0xff,0xfc,0xa0,0x60,0x00,0x00,
580x27,0x82,0x94,0x5a,0x24,0x04,0x00,0x06,0x24,0x84,0xff,0xff,0xa4,0x40,0x00,0x00,
590x04,0x81,0xff,0xfd,0x24,0x42,0x00,0x02,0x24,0x02,0x00,0x03,0xa3,0x82,0x94,0x50,
600x24,0x02,0x00,0x0a,0x24,0x03,0x09,0xc4,0xa3,0x82,0x94,0x52,0x24,0x02,0x00,0x04,
610x24,0x04,0x00,0x01,0x24,0x05,0x00,0x02,0xa7,0x83,0x94,0x66,0xa3,0x82,0x94,0x58,
620x24,0x03,0x04,0x00,0x24,0x02,0x02,0x00,0xaf,0x83,0x94,0x6c,0xa3,0x85,0x94,0x59,
630xa7,0x82,0x94,0x5a,0xa7,0x84,0x94,0x5c,0xaf,0x84,0x94,0x68,0xa3,0x84,0x94,0x51,
640xa3,0x80,0x94,0x53,0xa3,0x80,0x94,0x54,0xa3,0x80,0x94,0x55,0xa3,0x84,0x94,0x56,
650xa3,0x85,0x94,0x57,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,
660x3c,0x02,0x80,0x00,0x24,0x42,0x01,0x7c,0x34,0x63,0x00,0x20,0xac,0x62,0x00,0x00,
670x27,0x84,0x94,0x78,0x00,0x00,0x10,0x21,0x24,0x42,0x00,0x01,0x00,0x02,0x16,0x00,
680x00,0x02,0x16,0x03,0x28,0x43,0x00,0x03,0xac,0x80,0xff,0xfc,0xa0,0x80,0x00,0x00,
690x14,0x60,0xff,0xf9,0x24,0x84,0x00,0x0c,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
700x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,0x24,0x42,0x01,0xc0,
710x3c,0x08,0xb0,0x03,0xac,0x62,0x00,0x00,0x35,0x08,0x00,0x70,0x8d,0x02,0x00,0x00,
720x00,0xa0,0x48,0x21,0x00,0x04,0x26,0x00,0x00,0x02,0x2a,0x43,0x00,0x06,0x36,0x00,
730x00,0x07,0x3e,0x00,0x00,0x02,0x12,0x03,0x29,0x23,0x00,0x03,0x00,0x04,0x56,0x03,
740x00,0x06,0x36,0x03,0x00,0x07,0x3e,0x03,0x30,0x48,0x00,0x01,0x10,0x60,0x00,0x11,
750x30,0xa5,0x00,0x07,0x24,0x02,0x00,0x02,0x00,0x49,0x10,0x23,0x00,0x45,0x10,0x07,
760x30,0x42,0x00,0x01,0x10,0x40,0x00,0x66,0x00,0x00,0x00,0x00,0x8f,0xa2,0x00,0x10,
770x00,0x00,0x00,0x00,0x00,0x02,0x21,0x43,0x11,0x00,0x00,0x10,0x00,0x07,0x20,0x0b,
780x15,0x20,0x00,0x06,0x24,0x02,0x00,0x01,0x3c,0x02,0xb0,0x05,0x34,0x42,0x01,0x20,
790xa4,0x44,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x11,0x22,0x00,0x04,
800x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x05,0x08,0x00,0x00,0x94,0x34,0x42,0x01,0x24,
810x3c,0x02,0xb0,0x05,0x08,0x00,0x00,0x94,0x34,0x42,0x01,0x22,0x15,0x20,0x00,0x54,
820x24,0x02,0x00,0x01,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x74,0x90,0x43,0x00,0x00,
830x00,0x00,0x00,0x00,0xaf,0x83,0x94,0x74,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x70,
840x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x6b,0x00,0x08,0x11,0x60,0x00,0x18,
850x00,0x09,0x28,0x40,0x00,0x00,0x40,0x21,0x27,0x85,0x94,0x70,0x8c,0xa3,0x00,0x00,
860x8c,0xa2,0x00,0x04,0x00,0x00,0x00,0x00,0x00,0x62,0x38,0x23,0x00,0x43,0x10,0x2a,
870x10,0x40,0x00,0x3d,0x00,0x00,0x00,0x00,0xac,0xa7,0x00,0x00,0x25,0x02,0x00,0x01,
880x00,0x02,0x16,0x00,0x00,0x02,0x46,0x03,0x29,0x03,0x00,0x03,0x14,0x60,0xff,0xf3,
890x24,0xa5,0x00,0x0c,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x70,0x90,0x62,0x00,0x00,
900x00,0x00,0x00,0x00,0x00,0x4b,0x10,0x23,0xa0,0x62,0x00,0x00,0x00,0x09,0x28,0x40,
910x00,0xa9,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x94,0x78,0x00,0x0a,0x20,0x0b,
920x00,0x43,0x18,0x21,0x10,0xc0,0x00,0x05,0x00,0x00,0x38,0x21,0x80,0x62,0x00,0x01,
930x00,0x00,0x00,0x00,0x14,0x40,0x00,0x05,0x00,0x00,0x00,0x00,0x80,0x62,0x00,0x00,
940x00,0x00,0x00,0x00,0x14,0x40,0x00,0x03,0x00,0xa9,0x10,0x21,0x24,0x07,0x00,0x01,
950x00,0xa9,0x10,0x21,0x00,0x02,0x30,0x80,0x27,0x82,0x94,0x78,0xa0,0x67,0x00,0x01,
960x00,0xc2,0x38,0x21,0x80,0xe3,0x00,0x01,0x00,0x00,0x00,0x00,0x10,0x60,0x00,0x07,
970x00,0x00,0x00,0x00,0x27,0x83,0x94,0x70,0x00,0xc3,0x18,0x21,0x8c,0x62,0x00,0x00,
980x00,0x00,0x00,0x00,0x00,0x44,0x10,0x21,0xac,0x62,0x00,0x00,0x27,0x85,0x94,0x74,
990x27,0x82,0x94,0x70,0x00,0xc5,0x28,0x21,0x00,0xc2,0x10,0x21,0x8c,0x43,0x00,0x00,
1000x8c,0xa4,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x64,0x18,0x2a,0x14,0x60,0x00,0x03,
1010x24,0x02,0x00,0x01,0x03,0xe0,0x00,0x08,0xa0,0xe2,0x00,0x00,0xa0,0xe0,0x00,0x00,
1020x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x08,0x00,0x00,0xb7,0xac,0xa0,0x00,0x00,
1030x11,0x22,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x7c,
1040x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0xaf,0x83,0x94,0x8c,0x08,0x00,0x00,0xa7,
1050x3c,0x02,0xb0,0x03,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x78,0x90,0x43,0x00,0x00,
1060x00,0x00,0x00,0x00,0xaf,0x83,0x94,0x80,0x08,0x00,0x00,0xa7,0x3c,0x02,0xb0,0x03,
1070x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,0x24,0x42,0x04,0x10,
1080x3c,0x05,0xb0,0x03,0xac,0x62,0x00,0x00,0x34,0xa5,0x00,0x70,0x8c,0xa2,0x00,0x00,
1090x90,0x84,0x00,0x08,0x3c,0x06,0xb0,0x03,0x00,0x02,0x16,0x00,0x2c,0x83,0x00,0x03,
1100x34,0xc6,0x00,0x72,0x24,0x07,0x00,0x01,0x10,0x60,0x00,0x11,0x00,0x02,0x2f,0xc2,
1110x90,0xc2,0x00,0x00,0x00,0x00,0x18,0x21,0x00,0x02,0x16,0x00,0x10,0xa7,0x00,0x09,
1120x00,0x02,0x16,0x03,0x14,0x80,0x00,0x0c,0x30,0x43,0x00,0x03,0x83,0x82,0x94,0x78,
1130x00,0x00,0x00,0x00,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x00,0x02,0x16,0x00,
1140x00,0x02,0x1e,0x03,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x72,0xa0,0x43,0x00,0x00,
1150x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x30,0x45,0x00,0x05,0x10,0x87,0x00,0x04,
1160x30,0x43,0x00,0x06,0x93,0x82,0x94,0x90,0x08,0x00,0x01,0x1f,0x00,0x43,0x10,0x21,
1170x83,0x82,0x94,0x84,0x00,0x00,0x00,0x00,0x00,0x02,0x10,0x40,0x08,0x00,0x01,0x1f,
1180x00,0x45,0x10,0x21,0x10,0x80,0x00,0x05,0x00,0x00,0x18,0x21,0x24,0x63,0x00,0x01,
1190x00,0x64,0x10,0x2b,0x14,0x40,0xff,0xfd,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
1200x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x24,0x42,0x04,0xe4,
1210x3c,0x04,0xb0,0x02,0x34,0x63,0x00,0x20,0xac,0x62,0x00,0x00,0x34,0x84,0x00,0x08,
1220x24,0x02,0x00,0x01,0xaf,0x84,0x94,0xa0,0xa3,0x82,0x94,0xb0,0xa7,0x80,0x94,0xa4,
1230xa7,0x80,0x94,0xa6,0xaf,0x80,0x94,0xa8,0xaf,0x80,0x94,0xac,0x03,0xe0,0x00,0x08,
1240x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,
1250x24,0x42,0x05,0x24,0x3c,0x04,0xb0,0x03,0xac,0x62,0x00,0x00,0x34,0x84,0x00,0xac,
1260x80,0xa2,0x00,0x15,0x8c,0x83,0x00,0x00,0x27,0xbd,0xff,0xf0,0x00,0x43,0x10,0x21,
1270xac,0x82,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x10,0x3c,0x02,0xb0,0x03,
1280x3c,0x03,0x80,0x00,0x34,0x42,0x00,0x20,0x24,0x63,0x05,0x5c,0x27,0xbd,0xff,0xe0,
1290xac,0x43,0x00,0x00,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x18,
1300x8f,0x90,0x94,0xa0,0x0c,0x00,0x02,0x90,0x00,0x80,0x88,0x21,0x14,0x40,0x00,0x2a,
1310x3c,0x02,0x00,0x80,0x16,0x20,0x00,0x02,0x34,0x42,0x02,0x01,0x24,0x02,0x02,0x01,
1320xae,0x02,0x00,0x00,0x97,0x84,0x94,0xa4,0x97,0x82,0x94,0xa6,0x3c,0x03,0xb0,0x02,
1330x00,0x83,0x20,0x21,0x24,0x42,0x00,0x04,0xa7,0x82,0x94,0xa6,0xa4,0x82,0x00,0x00,
1340x8f,0x84,0x94,0xa8,0x8f,0x82,0x94,0xa0,0x93,0x85,0x94,0x52,0x24,0x84,0x00,0x01,
1350x24,0x42,0x00,0x04,0x24,0x03,0x8f,0xff,0x3c,0x07,0xb0,0x06,0x3c,0x06,0xb0,0x03,
1360x00,0x43,0x10,0x24,0x00,0x85,0x28,0x2a,0x34,0xe7,0x80,0x18,0xaf,0x82,0x94,0xa0,
1370xaf,0x84,0x94,0xa8,0x10,0xa0,0x00,0x08,0x34,0xc6,0x01,0x08,0x8f,0x83,0x94,0xac,
1380x8f,0x84,0x94,0x6c,0x8c,0xc2,0x00,0x00,0x00,0x64,0x18,0x21,0x00,0x43,0x10,0x2b,
1390x14,0x40,0x00,0x09,0x00,0x00,0x00,0x00,0x8c,0xe2,0x00,0x00,0x3c,0x03,0x0f,0x00,
1400x3c,0x04,0x04,0x00,0x00,0x43,0x10,0x24,0x10,0x44,0x00,0x03,0x00,0x00,0x00,0x00,
1410x0c,0x00,0x04,0x8e,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x18,0x7b,0xb0,0x00,0xbc,
1420x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x27,0xbd,0xff,0xd8,0x3c,0x02,0xb0,0x03,
1430x3c,0x03,0x80,0x00,0x24,0x63,0x06,0x48,0xaf,0xb0,0x00,0x10,0x34,0x42,0x00,0x20,
1440x8f,0x90,0x94,0xa0,0xac,0x43,0x00,0x00,0xaf,0xb3,0x00,0x1c,0xaf,0xb2,0x00,0x18,
1450xaf,0xb1,0x00,0x14,0xaf,0xbf,0x00,0x20,0x00,0x80,0x88,0x21,0x00,0xa0,0x90,0x21,
1460x0c,0x00,0x02,0x90,0x00,0xc0,0x98,0x21,0x24,0x07,0x8f,0xff,0x14,0x40,0x00,0x19,
1470x26,0x03,0x00,0x04,0x24,0x02,0x0e,0x03,0xae,0x02,0x00,0x00,0x00,0x67,0x80,0x24,
1480x26,0x02,0x00,0x04,0xae,0x11,0x00,0x00,0x00,0x47,0x80,0x24,0x97,0x86,0x94,0xa4,
1490x26,0x03,0x00,0x04,0xae,0x12,0x00,0x00,0x00,0x67,0x80,0x24,0xae,0x13,0x00,0x00,
1500x8f,0x84,0x94,0xa0,0x3c,0x02,0xb0,0x02,0x97,0x85,0x94,0xa6,0x00,0xc2,0x30,0x21,
1510x8f,0x82,0x94,0xa8,0x24,0x84,0x00,0x10,0x24,0xa5,0x00,0x10,0x00,0x87,0x20,0x24,
1520x24,0x42,0x00,0x01,0xa7,0x85,0x94,0xa6,0xaf,0x84,0x94,0xa0,0xaf,0x82,0x94,0xa8,
1530xa4,0xc5,0x00,0x00,0x8f,0xbf,0x00,0x20,0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,
1540x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x28,0x27,0xbd,0xff,0xe8,0xaf,0xbf,0x00,0x10,
1550x94,0x82,0x00,0x04,0x00,0x00,0x00,0x00,0x30,0x42,0xe0,0x00,0x14,0x40,0x00,0x14,
1560x00,0x00,0x00,0x00,0x90,0x82,0x00,0x02,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xfc,
1570x00,0x82,0x28,0x21,0x8c,0xa4,0x00,0x00,0x3c,0x02,0x00,0x70,0x8c,0xa6,0x00,0x08,
1580x00,0x82,0x10,0x21,0x2c,0x43,0x00,0x06,0x10,0x60,0x00,0x09,0x3c,0x03,0x80,0x01,
1590x00,0x02,0x10,0x80,0x24,0x63,0x08,0x94,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,
1600x00,0x00,0x00,0x00,0x00,0x80,0x00,0x08,0x00,0x00,0x00,0x00,0xaf,0x86,0x80,0x14,
1610x8f,0xbf,0x00,0x10,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,
1620x8c,0xa4,0x00,0x00,0x0c,0x00,0x1f,0x4f,0x00,0x00,0x00,0x00,0x08,0x00,0x01,0xdc,
1630x00,0x00,0x00,0x00,0x0c,0x00,0x2c,0x0d,0x00,0xc0,0x20,0x21,0x08,0x00,0x01,0xdc,
1640x00,0x00,0x00,0x00,0x87,0x83,0x88,0x06,0x93,0x82,0x80,0x18,0x00,0x00,0x00,0x00,
1650x10,0x62,0x00,0x08,0x00,0x00,0x00,0x00,0x93,0x83,0x88,0x07,0x24,0x02,0x00,0x01,
1660xa3,0x82,0x80,0x11,0xa3,0x83,0x80,0x19,0xa3,0x83,0x80,0x18,0x03,0xe0,0x00,0x08,
1670x00,0x00,0x00,0x00,0x93,0x82,0x80,0x19,0x00,0x00,0x00,0x00,0x14,0x62,0xff,0xf6,
1680x00,0x00,0x00,0x00,0x08,0x00,0x01,0xf3,0x00,0x00,0x00,0x00,0x30,0x84,0x00,0xff,
1690x14,0x80,0x00,0x2f,0x00,0x00,0x00,0x00,0x8f,0x82,0x80,0x14,0xa3,0x85,0x8b,0xcb,
1700x10,0x40,0x00,0x2b,0x2c,0xa2,0x00,0x04,0x14,0x40,0x00,0x06,0x00,0x05,0x10,0x40,
1710x24,0xa2,0xff,0xfc,0x2c,0x42,0x00,0x08,0x10,0x40,0x00,0x09,0x24,0xa2,0xff,0xf0,
1720x00,0x05,0x10,0x40,0x27,0x84,0x8b,0xd4,0x00,0x44,0x10,0x21,0x94,0x43,0x00,0x00,
1730x00,0x00,0x00,0x00,0x24,0x63,0x00,0x01,0x03,0xe0,0x00,0x08,0xa4,0x43,0x00,0x00,
1740x2c,0x42,0x00,0x10,0x14,0x40,0x00,0x0a,0x00,0x05,0x10,0x40,0x24,0xa2,0xff,0xe0,
1750x2c,0x42,0x00,0x10,0x14,0x40,0x00,0x06,0x00,0x05,0x10,0x40,0x24,0xa2,0xff,0xd0,
1760x2c,0x42,0x00,0x10,0x10,0x40,0x00,0x09,0x24,0xa2,0xff,0xc0,0x00,0x05,0x10,0x40,
1770x27,0x84,0x8b,0xd4,0x00,0x44,0x10,0x21,0x94,0x43,0xff,0xf8,0x00,0x00,0x00,0x00,
1780x24,0x63,0x00,0x01,0x03,0xe0,0x00,0x08,0xa4,0x43,0xff,0xf8,0x2c,0x42,0x00,0x10,
1790x10,0x40,0x00,0x07,0x00,0x05,0x10,0x40,0x27,0x84,0x8b,0xd4,0x00,0x44,0x10,0x21,
1800x94,0x43,0xff,0xf8,0x00,0x00,0x00,0x00,0x24,0x63,0x00,0x01,0xa4,0x43,0xff,0xf8,
1810x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x8f,0x86,0x94,0xa0,0x8f,0x82,0x80,0x14,
1820x27,0xbd,0xff,0xe8,0xaf,0xbf,0x00,0x10,0x10,0x40,0x00,0x2a,0x00,0xc0,0x38,0x21,
1830x24,0x02,0x00,0x07,0x24,0x03,0xff,0x9c,0xa3,0x82,0x8b,0xd3,0xa3,0x83,0x8b,0xd2,
1840x27,0x8a,0x8b,0xd0,0x00,0x00,0x20,0x21,0x24,0x09,0x8f,0xff,0x00,0x04,0x10,0x80,
1850x00,0x4a,0x28,0x21,0x8c,0xa2,0x00,0x00,0x24,0xe3,0x00,0x04,0x24,0x88,0x00,0x01,
1860xac,0xe2,0x00,0x00,0x10,0x80,0x00,0x02,0x00,0x69,0x38,0x24,0xac,0xa0,0x00,0x00,
1870x31,0x04,0x00,0xff,0x2c,0x82,0x00,0x27,0x14,0x40,0xff,0xf5,0x00,0x04,0x10,0x80,
1880x97,0x83,0x94,0xa6,0x97,0x85,0x94,0xa4,0x3c,0x02,0xb0,0x02,0x24,0x63,0x00,0x9c,
1890x00,0xa2,0x28,0x21,0x3c,0x04,0xb0,0x06,0xa7,0x83,0x94,0xa6,0x34,0x84,0x80,0x18,
1900xa4,0xa3,0x00,0x00,0x8c,0x85,0x00,0x00,0x24,0x02,0x8f,0xff,0x24,0xc6,0x00,0x9c,
1910x3c,0x03,0x0f,0x00,0x00,0xc2,0x30,0x24,0x00,0xa3,0x28,0x24,0x3c,0x02,0x04,0x00,
1920xaf,0x86,0x94,0xa0,0x10,0xa2,0x00,0x03,0x00,0x00,0x00,0x00,0x0c,0x00,0x04,0x8e,
1930x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x10,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
1940x27,0xbd,0x00,0x18,0x8f,0x86,0x94,0xa0,0x27,0xbd,0xff,0xc8,0x24,0x02,0x00,0x08,
1950x24,0x03,0x00,0x20,0xaf,0xbf,0x00,0x30,0xa3,0xa2,0x00,0x13,0xa3,0xa3,0x00,0x12,
1960xa7,0xa4,0x00,0x10,0x00,0xc0,0x28,0x21,0x27,0xa9,0x00,0x10,0x00,0x00,0x38,0x21,
1970x24,0x08,0x8f,0xff,0x00,0x07,0x10,0x80,0x00,0x49,0x10,0x21,0x8c,0x44,0x00,0x00,
1980x24,0xe3,0x00,0x01,0x30,0x67,0x00,0xff,0x24,0xa2,0x00,0x04,0x2c,0xe3,0x00,0x08,
1990xac,0xa4,0x00,0x00,0x14,0x60,0xff,0xf7,0x00,0x48,0x28,0x24,0x97,0x83,0x94,0xa6,
2000x97,0x85,0x94,0xa4,0x3c,0x02,0xb0,0x02,0x24,0x63,0x00,0x20,0x00,0xa2,0x28,0x21,
2010x3c,0x04,0xb0,0x06,0xa7,0x83,0x94,0xa6,0x34,0x84,0x80,0x18,0xa4,0xa3,0x00,0x00,
2020x8c,0x85,0x00,0x00,0x24,0x02,0x8f,0xff,0x24,0xc6,0x00,0x20,0x3c,0x03,0x0f,0x00,
2030x00,0xc2,0x30,0x24,0x00,0xa3,0x28,0x24,0x3c,0x02,0x04,0x00,0xaf,0x86,0x94,0xa0,
2040x10,0xa2,0x00,0x03,0x00,0x00,0x00,0x00,0x0c,0x00,0x04,0x8e,0x00,0x00,0x00,0x00,
2050x8f,0xbf,0x00,0x30,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x38,
2060x93,0x82,0x94,0xb0,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x11,0x24,0x06,0x00,0x01,
2070x8f,0x82,0x94,0xa8,0x3c,0x05,0xb0,0x06,0x3c,0x04,0xb0,0x03,0x34,0xa5,0x80,0x18,
2080x34,0x84,0x01,0x08,0x14,0x40,0x00,0x09,0x00,0x00,0x30,0x21,0x97,0x82,0x94,0xa4,
2090x8c,0x84,0x00,0x00,0x3c,0x03,0xb0,0x02,0x00,0x43,0x10,0x21,0xaf,0x84,0x94,0xac,
2100xa7,0x80,0x94,0xa6,0xac,0x40,0x00,0x00,0xac,0x40,0x00,0x04,0x8c,0xa2,0x00,0x00,
2110x03,0xe0,0x00,0x08,0x00,0xc0,0x10,0x21,0x8f,0x86,0x94,0xa0,0x8f,0x82,0x94,0xa8,
2120x27,0xbd,0xff,0xe8,0xaf,0xbf,0x00,0x10,0x00,0xc0,0x40,0x21,0x14,0x40,0x00,0x0a,
2130x00,0x40,0x50,0x21,0x00,0x00,0x38,0x21,0x27,0x89,0x8b,0xa0,0x24,0xe2,0x00,0x01,
2140x00,0x07,0x18,0x80,0x30,0x47,0x00,0xff,0x00,0x69,0x18,0x21,0x2c,0xe2,0x00,0x0a,
2150x14,0x40,0xff,0xfa,0xac,0x60,0x00,0x00,0x3c,0x02,0x00,0x80,0x10,0x82,0x00,0x6f,
2160x00,0x00,0x00,0x00,0x97,0x82,0x8b,0xa6,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,
2170xa7,0x82,0x8b,0xa6,0x90,0xa3,0x00,0x15,0x97,0x82,0x8b,0xa8,0x00,0x03,0x1e,0x00,
2180x00,0x03,0x1e,0x03,0x00,0x43,0x10,0x21,0xa7,0x82,0x8b,0xa8,0x8c,0xa4,0x00,0x20,
2190x3c,0x02,0x00,0x60,0x3c,0x03,0x00,0x20,0x00,0x82,0x20,0x24,0x10,0x83,0x00,0x54,
2200x00,0x00,0x00,0x00,0x14,0x80,0x00,0x47,0x00,0x00,0x00,0x00,0x97,0x82,0x8b,0xac,
2210x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,0xa7,0x82,0x8b,0xac,0x84,0xa3,0x00,0x06,
2220x8f,0x82,0x8b,0xbc,0x00,0x00,0x00,0x00,0x00,0x43,0x10,0x21,0xaf,0x82,0x8b,0xbc,
2230x25,0x42,0x00,0x01,0x28,0x43,0x27,0x10,0xaf,0x82,0x94,0xa8,0x10,0x60,0x00,0x09,
2240x24,0x02,0x00,0x04,0x93,0x83,0x80,0x11,0x24,0x02,0x00,0x01,0x10,0x62,0x00,0x05,
2250x24,0x02,0x00,0x04,0x8f,0xbf,0x00,0x10,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
2260x27,0xbd,0x00,0x18,0x24,0x03,0x00,0x28,0xa3,0x83,0x8b,0xa2,0xa3,0x82,0x8b,0xa3,
2270x90,0xa2,0x00,0x18,0x93,0x83,0x8b,0xcb,0x00,0x00,0x38,0x21,0x00,0x02,0x16,0x00,
2280x00,0x02,0x16,0x03,0xa7,0x82,0x8b,0xb6,0xa3,0x83,0x8b,0xc4,0x27,0x89,0x8b,0xa0,
2290x24,0x05,0x8f,0xff,0x00,0x07,0x10,0x80,0x00,0x49,0x10,0x21,0x8c,0x44,0x00,0x00,
2300x24,0xe3,0x00,0x01,0x30,0x67,0x00,0xff,0x25,0x02,0x00,0x04,0x2c,0xe3,0x00,0x0a,
2310xad,0x04,0x00,0x00,0x14,0x60,0xff,0xf7,0x00,0x45,0x40,0x24,0x97,0x83,0x94,0xa6,
2320x97,0x85,0x94,0xa4,0x3c,0x02,0xb0,0x02,0x24,0x63,0x00,0x28,0x00,0xa2,0x28,0x21,
2330x3c,0x04,0xb0,0x06,0xa7,0x83,0x94,0xa6,0x34,0x84,0x80,0x18,0xa4,0xa3,0x00,0x00,
2340x8c,0x85,0x00,0x00,0x24,0x02,0x8f,0xff,0x24,0xc6,0x00,0x28,0x3c,0x03,0x0f,0x00,
2350x00,0xc2,0x30,0x24,0x00,0xa3,0x28,0x24,0x3c,0x02,0x04,0x00,0xaf,0x86,0x94,0xa0,
2360x10,0xa2,0x00,0x03,0x00,0x00,0x00,0x00,0x0c,0x00,0x04,0x8e,0x00,0x00,0x00,0x00,
2370x0c,0x00,0x02,0x2e,0x00,0x00,0x00,0x00,0xa3,0x80,0x80,0x11,0x08,0x00,0x02,0xdd,
2380x00,0x00,0x00,0x00,0x97,0x82,0x8b,0xae,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,
2390xa7,0x82,0x8b,0xae,0x84,0xa3,0x00,0x06,0x8f,0x82,0x8b,0xc0,0x00,0x00,0x00,0x00,
2400x00,0x43,0x10,0x21,0xaf,0x82,0x8b,0xc0,0x08,0x00,0x02,0xd5,0x25,0x42,0x00,0x01,
2410x97,0x82,0x8b,0xaa,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,0xa7,0x82,0x8b,0xaa,
2420x84,0xa3,0x00,0x06,0x8f,0x82,0x8b,0xb8,0x00,0x00,0x00,0x00,0x00,0x43,0x10,0x21,
2430xaf,0x82,0x8b,0xb8,0x08,0x00,0x02,0xd5,0x25,0x42,0x00,0x01,0x97,0x82,0x8b,0xa4,
2440x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,0xa7,0x82,0x8b,0xa4,0x08,0x00,0x02,0xbd,
2450x00,0x00,0x00,0x00,0x27,0xbd,0xff,0xd0,0xaf,0xbf,0x00,0x28,0x8c,0xa3,0x00,0x20,
2460x8f,0x8a,0x94,0xa0,0x3c,0x02,0x00,0x10,0x00,0x62,0x10,0x24,0x00,0xa0,0x38,0x21,
2470x01,0x40,0x48,0x21,0x10,0x40,0x00,0x3d,0x00,0x80,0x28,0x21,0x8c,0xe4,0x00,0x1c,
2480x34,0xa5,0x12,0x06,0xaf,0xa5,0x00,0x10,0x8c,0x82,0x00,0x08,0x00,0x03,0x1c,0x42,
2490x30,0x63,0x00,0x30,0x00,0x02,0x13,0x02,0x30,0x42,0x00,0x40,0x00,0x43,0x10,0x25,
2500x90,0xe6,0x00,0x10,0x90,0xe4,0x00,0x13,0x94,0xe8,0x00,0x0c,0x94,0xe3,0x00,0x1a,
2510x00,0x02,0x16,0x00,0x90,0xe7,0x00,0x12,0x00,0xa2,0x28,0x25,0x24,0x02,0x12,0x34,
2520xa7,0xa2,0x00,0x1c,0x24,0x02,0x56,0x78,0xaf,0xa5,0x00,0x10,0xa3,0xa6,0x00,0x18,
2530xa3,0xa7,0x00,0x1f,0xa7,0xa3,0x00,0x1a,0xa3,0xa4,0x00,0x19,0xa7,0xa8,0x00,0x20,
2540xa7,0xa2,0x00,0x22,0x00,0x00,0x28,0x21,0x27,0xa7,0x00,0x10,0x24,0x06,0x8f,0xff,
2550x00,0x05,0x10,0x80,0x00,0x47,0x10,0x21,0x8c,0x44,0x00,0x00,0x24,0xa3,0x00,0x01,
2560x30,0x65,0x00,0xff,0x25,0x22,0x00,0x04,0x2c,0xa3,0x00,0x05,0xad,0x24,0x00,0x00,
2570x14,0x60,0xff,0xf7,0x00,0x46,0x48,0x24,0x97,0x83,0x94,0xa6,0x97,0x85,0x94,0xa4,
2580x3c,0x02,0xb0,0x02,0x24,0x63,0x00,0x14,0x00,0xa2,0x28,0x21,0x3c,0x04,0xb0,0x06,
2590xa7,0x83,0x94,0xa6,0x34,0x84,0x80,0x18,0xa4,0xa3,0x00,0x00,0x8c,0x85,0x00,0x00,
2600x24,0x02,0x8f,0xff,0x25,0x46,0x00,0x14,0x3c,0x03,0x0f,0x00,0x00,0xc2,0x50,0x24,
2610x00,0xa3,0x28,0x24,0x3c,0x02,0x04,0x00,0xaf,0x8a,0x94,0xa0,0x10,0xa2,0x00,0x03,
2620x00,0x00,0x00,0x00,0x0c,0x00,0x04,0x8e,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x28,
2630x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x30,0x3c,0x05,0xb0,0x03,
2640x3c,0x02,0x80,0x00,0x27,0xbd,0xff,0xc8,0x00,0x04,0x22,0x00,0x34,0xa5,0x00,0x20,
2650x24,0x42,0x0d,0xdc,0x3c,0x03,0xb0,0x00,0xaf,0xb5,0x00,0x24,0xaf,0xb4,0x00,0x20,
2660xaf,0xb2,0x00,0x18,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x30,0x00,0x83,0x80,0x21,
2670xaf,0xb7,0x00,0x2c,0xaf,0xb6,0x00,0x28,0xaf,0xb3,0x00,0x1c,0xaf,0xb1,0x00,0x14,
2680xac,0xa2,0x00,0x00,0x8e,0x09,0x00,0x00,0x00,0x00,0x90,0x21,0x26,0x10,0x00,0x08,
2690x00,0x09,0xa6,0x02,0x12,0x80,0x00,0x13,0x00,0x00,0xa8,0x21,0x24,0x13,0x00,0x02,
2700x3c,0x16,0x00,0xff,0x3c,0x17,0xff,0x00,0x8e,0x09,0x00,0x00,0x00,0x00,0x00,0x00,
2710x00,0x09,0x12,0x02,0x24,0x42,0x00,0x02,0x31,0x25,0x00,0xff,0x10,0xb3,0x00,0x76,
2720x30,0x51,0x00,0xff,0x24,0x02,0x00,0x03,0x10,0xa2,0x00,0x18,0x00,0x00,0x00,0x00,
2730x02,0x51,0x10,0x21,0x30,0x52,0xff,0xff,0x02,0x54,0x18,0x2b,0x14,0x60,0xff,0xf2,
2740x02,0x11,0x80,0x21,0x12,0xa0,0x00,0x0a,0x3c,0x02,0xb0,0x06,0x34,0x42,0x80,0x18,
2750x8c,0x43,0x00,0x00,0x3c,0x04,0x0f,0x00,0x3c,0x02,0x04,0x00,0x00,0x64,0x18,0x24,
2760x10,0x62,0x00,0x03,0x00,0x00,0x00,0x00,0x0c,0x00,0x04,0x8e,0x00,0x00,0x00,0x00,
2770x8f,0xbf,0x00,0x30,0x7b,0xb6,0x01,0x7c,0x7b,0xb4,0x01,0x3c,0x7b,0xb2,0x00,0xfc,
2780x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x38,0x8e,0x09,0x00,0x04,
2790x24,0x15,0x00,0x01,0x8e,0x06,0x00,0x0c,0x00,0x09,0x11,0x42,0x00,0x09,0x18,0xc2,
2800x30,0x48,0x00,0x03,0x00,0x09,0x14,0x02,0x30,0x6c,0x00,0x03,0x00,0x09,0x26,0x02,
2810x11,0x15,0x00,0x45,0x30,0x43,0x00,0x0f,0x29,0x02,0x00,0x02,0x14,0x40,0x00,0x26,
2820x00,0x00,0x00,0x00,0x11,0x13,0x00,0x0f,0x00,0x00,0x38,0x21,0x00,0x07,0x22,0x02,
2830x30,0x84,0xff,0x00,0x3c,0x03,0x00,0xff,0x00,0x07,0x2e,0x02,0x00,0x07,0x12,0x00,
2840x00,0x43,0x10,0x24,0x00,0xa4,0x28,0x25,0x00,0xa2,0x28,0x25,0x00,0x07,0x1e,0x00,
2850x00,0xa3,0x28,0x25,0x0c,0x00,0x01,0x92,0x01,0x20,0x20,0x21,0x08,0x00,0x03,0x9d,
2860x02,0x51,0x10,0x21,0x11,0x95,0x00,0x0f,0x00,0x00,0x00,0x00,0x11,0x88,0x00,0x07,
2870x00,0x00,0x00,0x00,0x00,0x04,0x10,0x80,0x27,0x83,0x94,0x50,0x00,0x43,0x10,0x21,
2880x8c,0x47,0x00,0x18,0x08,0x00,0x03,0xc4,0x00,0x07,0x22,0x02,0x00,0x04,0x10,0x40,
2890x27,0x83,0x94,0x58,0x00,0x43,0x10,0x21,0x94,0x47,0x00,0x02,0x08,0x00,0x03,0xc4,
2900x00,0x07,0x22,0x02,0x27,0x82,0x94,0x50,0x00,0x82,0x10,0x21,0x90,0x47,0x00,0x00,
2910x08,0x00,0x03,0xc4,0x00,0x07,0x22,0x02,0x15,0x00,0xff,0xdc,0x00,0x00,0x38,0x21,
2920x10,0x75,0x00,0x05,0x00,0x80,0x38,0x21,0x00,0x65,0x18,0x26,0x24,0x82,0x01,0x00,
2930x00,0x00,0x38,0x21,0x00,0x43,0x38,0x0a,0x24,0x02,0x00,0x01,0x11,0x82,0x00,0x0e,
2940x3c,0x02,0xb0,0x03,0x24,0x02,0x00,0x02,0x11,0x82,0x00,0x06,0x00,0x00,0x00,0x00,
2950x3c,0x02,0xb0,0x03,0x00,0xe2,0x10,0x21,0x8c,0x47,0x00,0x00,0x08,0x00,0x03,0xc4,
2960x00,0x07,0x22,0x02,0x3c,0x02,0xb0,0x03,0x00,0xe2,0x10,0x21,0x94,0x43,0x00,0x00,
2970x08,0x00,0x03,0xc3,0x30,0x67,0xff,0xff,0x00,0xe2,0x10,0x21,0x90,0x43,0x00,0x00,
2980x08,0x00,0x03,0xc3,0x30,0x67,0x00,0xff,0x30,0x62,0x00,0x03,0x00,0x02,0x12,0x00,
2990x11,0x95,0x00,0x07,0x00,0x44,0x38,0x21,0x11,0x93,0x00,0x03,0x00,0x00,0x00,0x00,
3000x08,0x00,0x03,0xf5,0x3c,0x02,0xb0,0x0a,0x08,0x00,0x03,0xfa,0x3c,0x02,0xb0,0x0a,
3010x08,0x00,0x03,0xfe,0x3c,0x02,0xb0,0x0a,0x8e,0x09,0x00,0x04,0x8e,0x02,0x00,0x08,
3020x8e,0x03,0x00,0x0c,0x00,0x09,0x41,0x42,0x00,0x02,0x22,0x02,0x00,0x03,0x3a,0x02,
3030x30,0x84,0xff,0x00,0x30,0xe7,0xff,0x00,0x00,0x02,0x5e,0x02,0x00,0x02,0x32,0x00,
3040x00,0x03,0x56,0x02,0x00,0x03,0x2a,0x00,0x01,0x64,0x58,0x25,0x00,0xd6,0x30,0x24,
3050x01,0x47,0x50,0x25,0x00,0x02,0x16,0x00,0x00,0xb6,0x28,0x24,0x00,0x03,0x1e,0x00,
3060x01,0x66,0x58,0x25,0x01,0x45,0x50,0x25,0x00,0x57,0x10,0x24,0x00,0x77,0x18,0x24,
3070x01,0x62,0x38,0x25,0x01,0x43,0x30,0x25,0x00,0x09,0x10,0xc2,0x00,0x09,0x1c,0x02,
3080x31,0x08,0x00,0x03,0x30,0x4c,0x00,0x03,0x30,0x63,0x00,0x0f,0x00,0x09,0x26,0x02,
3090x00,0xe0,0x58,0x21,0x15,0x00,0x00,0x28,0x00,0xc0,0x50,0x21,0x24,0x02,0x00,0x01,
3100x10,0x62,0x00,0x06,0x00,0x80,0x28,0x21,0x24,0x02,0x00,0x03,0x14,0x62,0xff,0x69,
3110x02,0x51,0x10,0x21,0x24,0x85,0x01,0x00,0x24,0x02,0x00,0x01,0x11,0x82,0x00,0x15,
3120x24,0x02,0x00,0x02,0x11,0x82,0x00,0x0a,0x3c,0x03,0xb0,0x03,0x00,0xa3,0x18,0x21,
3130x8c,0x62,0x00,0x00,0x00,0x0a,0x20,0x27,0x01,0x6a,0x28,0x24,0x00,0x44,0x10,0x24,
3140x00,0x45,0x10,0x25,0xac,0x62,0x00,0x00,0x08,0x00,0x03,0x9d,0x02,0x51,0x10,0x21,
3150x00,0xa3,0x18,0x21,0x94,0x62,0x00,0x00,0x00,0x0a,0x20,0x27,0x01,0x6a,0x28,0x24,
3160x00,0x44,0x10,0x24,0x00,0x45,0x10,0x25,0xa4,0x62,0x00,0x00,0x08,0x00,0x03,0x9d,
3170x02,0x51,0x10,0x21,0x3c,0x03,0xb0,0x03,0x00,0xa3,0x18,0x21,0x90,0x62,0x00,0x00,
3180x00,0x0a,0x20,0x27,0x01,0x6a,0x28,0x24,0x00,0x44,0x10,0x24,0x00,0x45,0x10,0x25,
3190x08,0x00,0x03,0x9c,0xa0,0x62,0x00,0x00,0x24,0x02,0x00,0x01,0x11,0x02,0x00,0x21,
3200x00,0x00,0x00,0x00,0x15,0x13,0xff,0x42,0x00,0x00,0x00,0x00,0x11,0x82,0x00,0x17,
3210x00,0x00,0x00,0x00,0x11,0x88,0x00,0x0b,0x00,0x00,0x00,0x00,0x27,0x83,0x94,0x50,
3220x00,0x04,0x20,0x80,0x00,0x83,0x20,0x21,0x8c,0x82,0x00,0x18,0x00,0x06,0x18,0x27,
3230x00,0xe6,0x28,0x24,0x00,0x43,0x10,0x24,0x00,0x45,0x10,0x25,0x08,0x00,0x03,0x9c,
3240xac,0x82,0x00,0x18,0x27,0x83,0x94,0x58,0x00,0x04,0x20,0x40,0x00,0x83,0x20,0x21,
3250x94,0x82,0x00,0x02,0x00,0x06,0x18,0x27,0x00,0xe6,0x28,0x24,0x00,0x43,0x10,0x24,
3260x00,0x45,0x10,0x25,0x08,0x00,0x03,0x9c,0xa4,0x82,0x00,0x02,0x27,0x83,0x94,0x50,
3270x00,0x83,0x18,0x21,0x90,0x62,0x00,0x00,0x00,0x06,0x20,0x27,0x08,0x00,0x04,0x52,
3280x00,0xe6,0x28,0x24,0x30,0x62,0x00,0x07,0x00,0x02,0x12,0x00,0x11,0x88,0x00,0x0f,
3290x00,0x44,0x10,0x21,0x11,0x93,0x00,0x07,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x0a,
3300x00,0x43,0x18,0x21,0x8c,0x62,0x00,0x00,0x00,0x06,0x20,0x27,0x08,0x00,0x04,0x3f,
3310x00,0xe6,0x28,0x24,0x3c,0x03,0xb0,0x0a,0x00,0x43,0x18,0x21,0x94,0x62,0x00,0x00,
3320x00,0x06,0x20,0x27,0x08,0x00,0x04,0x48,0x00,0xe6,0x28,0x24,0x3c,0x03,0xb0,0x0a,
3330x08,0x00,0x04,0x75,0x00,0x43,0x18,0x21,0x97,0x85,0x94,0xa4,0x3c,0x07,0xb0,0x02,
3340x3c,0x04,0xb0,0x03,0x3c,0x02,0x80,0x00,0x00,0xa7,0x28,0x21,0x34,0x84,0x00,0x20,
3350x24,0x42,0x12,0x38,0x24,0x03,0xff,0x80,0xac,0x82,0x00,0x00,0xa0,0xa3,0x00,0x07,
3360x97,0x82,0x94,0xa6,0x97,0x85,0x94,0xa4,0x3c,0x06,0xb0,0x06,0x30,0x42,0xff,0xf8,
3370x24,0x42,0x00,0x10,0x00,0xa2,0x10,0x21,0x30,0x42,0x0f,0xff,0x24,0x44,0x00,0x08,
3380x30,0x84,0x0f,0xff,0x00,0x05,0x28,0xc2,0x3c,0x03,0x00,0x40,0x00,0xa3,0x28,0x25,
3390x00,0x87,0x20,0x21,0x34,0xc6,0x80,0x18,0xac,0xc5,0x00,0x00,0xaf,0x84,0x94,0xa0,
3400xa7,0x82,0x94,0xa4,0xa7,0x80,0x94,0xa6,0xaf,0x80,0x94,0xa8,0x03,0xe0,0x00,0x08,
3410x00,0x00,0x00,0x00,0x30,0xa5,0x00,0xff,0x30,0x84,0x00,0xff,0x24,0x02,0x00,0x01,
3420x00,0xe0,0x48,0x21,0x30,0xc6,0x00,0xff,0x8f,0xa7,0x00,0x10,0x10,0x82,0x00,0x07,
3430x00,0xa0,0x40,0x21,0x24,0x02,0x00,0x03,0x10,0x82,0x00,0x03,0x00,0x00,0x00,0x00,
3440x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x24,0xa8,0x01,0x00,0x3c,0x03,0xb0,0x03,
3450x24,0x02,0x00,0x01,0x00,0x07,0x20,0x27,0x01,0x27,0x28,0x24,0x10,0xc2,0x00,0x14,
3460x01,0x03,0x18,0x21,0x24,0x02,0x00,0x02,0x10,0xc2,0x00,0x09,0x00,0x07,0x50,0x27,
3470x3c,0x03,0xb0,0x03,0x01,0x03,0x18,0x21,0x8c,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
3480x00,0x4a,0x10,0x24,0x00,0x45,0x10,0x25,0x08,0x00,0x04,0xd9,0xac,0x62,0x00,0x00,
3490x3c,0x03,0xb0,0x03,0x01,0x03,0x18,0x21,0x94,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
3500x00,0x4a,0x10,0x24,0x00,0x45,0x10,0x25,0x03,0xe0,0x00,0x08,0xa4,0x62,0x00,0x00,
3510x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x44,0x10,0x24,0x00,0x45,0x10,0x25,
3520xa0,0x62,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x30,0x84,0x00,0x07,
3530x00,0x04,0x22,0x00,0x30,0xa5,0x00,0xff,0x00,0x85,0x28,0x21,0x3c,0x02,0xb0,0x0a,
3540x00,0xa2,0x40,0x21,0x30,0xc6,0x00,0xff,0x24,0x02,0x00,0x01,0x8f,0xa4,0x00,0x10,
3550x10,0xc2,0x00,0x14,0x24,0x02,0x00,0x02,0x00,0x04,0x50,0x27,0x10,0xc2,0x00,0x09,
3560x00,0xe4,0x48,0x24,0x3c,0x03,0xb0,0x0a,0x00,0xa3,0x18,0x21,0x8c,0x62,0x00,0x00,
3570x00,0x00,0x00,0x00,0x00,0x4a,0x10,0x24,0x00,0x49,0x10,0x25,0x03,0xe0,0x00,0x08,
3580xac,0x62,0x00,0x00,0x3c,0x03,0xb0,0x0a,0x00,0xa3,0x18,0x21,0x94,0x62,0x00,0x00,
3590x00,0x00,0x00,0x00,0x00,0x4a,0x10,0x24,0x00,0x49,0x10,0x25,0x03,0xe0,0x00,0x08,
3600xa4,0x62,0x00,0x00,0x91,0x02,0x00,0x00,0x00,0x04,0x18,0x27,0x00,0xe4,0x20,0x24,
3610x00,0x43,0x10,0x24,0x00,0x44,0x10,0x25,0x03,0xe0,0x00,0x08,0xa1,0x02,0x00,0x00,
3620x30,0xa9,0x00,0xff,0x27,0x83,0x94,0x50,0x30,0x85,0x00,0xff,0x24,0x02,0x00,0x01,
3630x00,0x07,0x50,0x27,0x00,0xc7,0x40,0x24,0x11,0x22,0x00,0x17,0x00,0xa3,0x18,0x21,
3640x00,0x05,0x20,0x40,0x27,0x82,0x94,0x50,0x00,0x05,0x28,0x80,0x27,0x83,0x94,0x58,
3650x00,0x83,0x50,0x21,0x00,0xa2,0x20,0x21,0x24,0x02,0x00,0x02,0x00,0x07,0x40,0x27,
3660x11,0x22,0x00,0x07,0x00,0xc7,0x28,0x24,0x8c,0x82,0x00,0x18,0x00,0x00,0x00,0x00,
3670x00,0x48,0x10,0x24,0x00,0x45,0x10,0x25,0x03,0xe0,0x00,0x08,0xac,0x82,0x00,0x18,
3680x95,0x42,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x48,0x10,0x24,0x00,0x45,0x10,0x25,
3690x03,0xe0,0x00,0x08,0xa5,0x42,0x00,0x02,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
3700x00,0x4a,0x10,0x24,0x00,0x48,0x10,0x25,0x03,0xe0,0x00,0x08,0xa0,0x62,0x00,0x00,
3710x00,0x04,0x32,0x02,0x30,0xc6,0xff,0x00,0x00,0x04,0x16,0x02,0x00,0x04,0x1a,0x00,
3720x3c,0x05,0x00,0xff,0x00,0x65,0x18,0x24,0x00,0x46,0x10,0x25,0x00,0x43,0x10,0x25,
3730x00,0x04,0x26,0x00,0x03,0xe0,0x00,0x08,0x00,0x44,0x10,0x25,0x3c,0x02,0xb0,0x02,
3740x34,0x42,0x00,0x08,0x3c,0x03,0xb0,0x02,0xaf,0x82,0x8c,0x78,0xaf,0x83,0x8c,0x7c,
3750xa7,0x80,0x8c,0x80,0xa7,0x80,0x8c,0x82,0xaf,0x80,0x8c,0x84,0x03,0xe0,0x00,0x08,
3760x00,0x00,0x00,0x00,0x27,0xbd,0xff,0xd8,0xaf,0xbf,0x00,0x20,0x94,0x82,0x00,0x04,
3770x3c,0x05,0xff,0x8f,0x00,0x80,0x18,0x21,0x30,0x42,0xe0,0x00,0x14,0x40,0x00,0x0a,
3780x34,0xa5,0xff,0xff,0x90,0x84,0x00,0x02,0x00,0x00,0x00,0x00,0x30,0x84,0x00,0xfc,
3790x00,0x64,0x20,0x21,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xa2,0x10,0x2b,
3800x10,0x40,0x00,0x05,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x20,0x00,0x00,0x00,0x00,
3810x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x28,0x0c,0x00,0x07,0xc9,0x00,0x00,0x00,0x00,
3820x08,0x00,0x05,0x4a,0x00,0x00,0x00,0x00,0x27,0xbd,0xff,0xd8,0xaf,0xb2,0x00,0x18,
3830xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x20,0xaf,0xb3,0x00,0x1c,
3840x8f,0x90,0x94,0xa0,0x0c,0x00,0x31,0x0a,0x00,0x80,0x90,0x21,0x00,0x40,0x88,0x21,
3850x93,0x82,0x82,0x28,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x1b,0x24,0x02,0x00,0x01,
3860xa3,0x82,0x82,0x28,0x24,0x03,0x00,0x05,0x24,0x02,0x00,0x04,0xa3,0x83,0x8c,0x73,
3870xa3,0x82,0x8c,0x72,0xa7,0x80,0x82,0x2a,0x00,0x00,0x28,0x21,0x27,0x86,0x8c,0x70,
3880x00,0x05,0x10,0x80,0x00,0x46,0x10,0x21,0x8c,0x44,0x00,0x00,0x24,0xa3,0x00,0x01,
3890x30,0x65,0xff,0xff,0xae,0x04,0x00,0x00,0x10,0xa0,0xff,0xfa,0x00,0x05,0x10,0x80,
3900x8f,0x83,0x94,0xa0,0x97,0x82,0x94,0xa6,0x24,0x05,0x8f,0xff,0x24,0x63,0x00,0x04,
3910x00,0x65,0x18,0x24,0x26,0x04,0x00,0x04,0x24,0x42,0x00,0x04,0xaf,0x83,0x94,0xa0,
3920xa7,0x82,0x94,0xa6,0x00,0x85,0x80,0x24,0x97,0x84,0x82,0x2a,0x27,0x93,0x80,0x34,
3930x02,0x40,0x28,0x21,0x00,0x93,0x20,0x21,0x0c,0x00,0x31,0x8e,0x02,0x20,0x30,0x21,
3940x97,0x87,0x82,0x2a,0x24,0x02,0x00,0x52,0x00,0xf1,0x18,0x21,0xa7,0x83,0x82,0x2a,
3950x82,0x44,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x82,0x00,0x06,0x00,0x60,0x38,0x21,
3960x8f,0xbf,0x00,0x20,0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,
3970x27,0xbd,0x00,0x28,0x82,0x43,0x00,0x01,0x24,0x02,0x00,0x54,0x14,0x62,0xff,0xf8,
3980x24,0x02,0x00,0x4c,0x82,0x43,0x00,0x02,0x00,0x00,0x00,0x00,0x14,0x62,0xff,0xf4,
3990x00,0x00,0x00,0x00,0x30,0xe6,0xff,0xff,0x10,0xc0,0x00,0x0c,0x00,0x00,0x28,0x21,
4000x02,0x60,0x48,0x21,0x24,0x08,0x8f,0xff,0x00,0xa9,0x10,0x21,0x8c,0x44,0x00,0x00,
4010x24,0xa3,0x00,0x04,0x30,0x65,0xff,0xff,0x26,0x02,0x00,0x04,0x00,0xa6,0x18,0x2b,
4020xae,0x04,0x00,0x00,0x14,0x60,0xff,0xf8,0x00,0x48,0x80,0x24,0x97,0x83,0x94,0xa6,
4030x97,0x85,0x94,0xa4,0x3c,0x02,0xb0,0x02,0x00,0x67,0x18,0x21,0x00,0xa2,0x28,0x21,
4040x3c,0x04,0xb0,0x06,0xa7,0x83,0x94,0xa6,0x34,0x84,0x80,0x18,0xa4,0xa3,0x00,0x00,
4050x8f,0x82,0x94,0xa0,0x8c,0x86,0x00,0x00,0x30,0xe5,0xff,0xff,0x24,0x03,0x8f,0xff,
4060x00,0x45,0x10,0x21,0x3c,0x04,0x0f,0x00,0x00,0x43,0x10,0x24,0x00,0xc4,0x30,0x24,
4070x3c,0x03,0x04,0x00,0xaf,0x82,0x94,0xa0,0x10,0xc3,0xff,0xd1,0x00,0x00,0x00,0x00,
4080x0c,0x00,0x04,0x8e,0x00,0x00,0x00,0x00,0xa3,0x80,0x82,0x28,0x08,0x00,0x05,0x88,
4090x00,0x00,0x00,0x00,0x8f,0x82,0x8c,0x7c,0x97,0x83,0x8c,0x80,0x8f,0x87,0x8c,0x78,
4100x3c,0x06,0xff,0xff,0xac,0x43,0x00,0x00,0x8f,0x82,0x8c,0x7c,0x3c,0x03,0x80,0x00,
4110x24,0xe5,0x00,0x08,0xac,0x43,0x00,0x04,0x8f,0x82,0x8c,0x7c,0x34,0xc6,0x1f,0xff,
4120x3c,0x03,0x00,0x40,0x30,0x42,0x0f,0xff,0x3c,0x04,0xb0,0x06,0x00,0x02,0x10,0xc2,
4130x00,0x43,0x10,0x25,0x00,0xa6,0x28,0x24,0x34,0x84,0x80,0x18,0x27,0xbd,0xff,0xf8,
4140xac,0x82,0x00,0x00,0xaf,0x85,0x8c,0x78,0xaf,0x87,0x8c,0x7c,0xa7,0x80,0x8c,0x80,
4150xa7,0x80,0x8c,0x82,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x08,0x03,0xe0,0x00,0x08,
4160x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
4170x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x27,0xbd,0xff,0xe0,
4180xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0x8f,0x91,0x8c,0x78,
4190x00,0x80,0x80,0x21,0xaf,0xbf,0x00,0x1c,0x0c,0x00,0x06,0x78,0x00,0xa0,0x90,0x21,
4200x97,0x82,0x8c,0x80,0x36,0x10,0x12,0x00,0x26,0x2a,0x00,0x04,0x24,0x4c,0x00,0x14,
4210x2c,0x42,0x04,0x01,0x14,0x40,0x00,0x0a,0x24,0x09,0x8f,0xff,0x8f,0x82,0x80,0x20,
4220x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,0xaf,0x82,0x80,0x20,0x8f,0xbf,0x00,0x1c,
4230x8f,0xb2,0x00,0x18,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,
4240x8e,0x44,0x00,0x1c,0x86,0x47,0x00,0x06,0x97,0x86,0x8c,0x82,0x8c,0x82,0x00,0x08,
4250x00,0x07,0x3c,0x00,0x8f,0x85,0x8c,0x78,0x00,0x02,0x11,0x02,0x30,0x42,0x40,0x00,
4260x02,0x02,0x80,0x25,0xae,0x30,0x00,0x00,0x8c,0x82,0x00,0x04,0x82,0x43,0x00,0x15,
4270x01,0x49,0x88,0x24,0x00,0x02,0x14,0xc2,0x00,0x03,0x1a,0x00,0x00,0x02,0x14,0x00,
4280x00,0x62,0x80,0x25,0xae,0x30,0x00,0x00,0x92,0x43,0x00,0x13,0x92,0x44,0x00,0x10,
4290x96,0x50,0x00,0x1a,0x00,0x03,0x1c,0x00,0x00,0x04,0x26,0x00,0x02,0x03,0x80,0x25,
4300x26,0x22,0x00,0x04,0x00,0x49,0x88,0x24,0x02,0x04,0x80,0x25,0xae,0x30,0x00,0x00,
4310x92,0x42,0x00,0x0f,0x92,0x43,0x00,0x11,0x26,0x24,0x00,0x04,0x00,0x02,0x12,0x00,
4320x00,0x89,0x88,0x24,0x00,0x62,0x80,0x25,0x02,0x07,0x80,0x25,0x26,0x22,0x00,0x04,
4330xae,0x30,0x00,0x00,0x00,0x49,0x88,0x24,0xae,0x20,0x00,0x00,0x8f,0x82,0x80,0x1c,
4340x24,0xc6,0x00,0x01,0x24,0xa5,0x00,0x14,0x30,0xc8,0xff,0xff,0x3c,0x0b,0xb0,0x03,
4350x00,0xa9,0x28,0x24,0x24,0x42,0x00,0x01,0x2d,0x08,0x00,0x0a,0xaf,0x85,0x8c,0x78,
4360xa7,0x8c,0x8c,0x80,0xaf,0x82,0x80,0x1c,0xa7,0x86,0x8c,0x82,0x11,0x00,0x00,0x07,
4370x35,0x6b,0x01,0x08,0x8f,0x82,0x8c,0x84,0x8d,0x63,0x00,0x00,0x24,0x42,0x04,0x00,
4380x00,0x62,0x18,0x2b,0x14,0x60,0xff,0xc1,0x00,0x00,0x00,0x00,0x0c,0x00,0x05,0xbd,
4390x00,0x00,0x00,0x00,0x08,0x00,0x05,0xf3,0x00,0x00,0x00,0x00,0x27,0xbd,0xff,0xe8,
4400xaf,0xbf,0x00,0x10,0x0c,0x00,0x06,0x78,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x10,
4410x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x27,0xbd,0xff,0xe0,
4420xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x1c,
4430x8f,0x90,0x8c,0x78,0x0c,0x00,0x06,0x78,0x00,0x80,0x90,0x21,0x97,0x82,0x8c,0x80,
4440x24,0x11,0x8f,0xff,0x2c,0x42,0x04,0x01,0x14,0x40,0x00,0x06,0x26,0x03,0x00,0x04,
4450x8f,0xbf,0x00,0x1c,0x8f,0xb2,0x00,0x18,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,
4460x27,0xbd,0x00,0x20,0x24,0x02,0x0e,0x03,0xae,0x02,0x00,0x00,0x00,0x71,0x80,0x24,
4470xae,0x00,0x00,0x00,0x8e,0x44,0x00,0x08,0x26,0x02,0x00,0x04,0x0c,0x00,0x06,0x86,
4480x00,0x51,0x80,0x24,0x97,0x86,0x8c,0x82,0x8f,0x83,0x8c,0x78,0xae,0x02,0x00,0x00,
4490x97,0x82,0x8c,0x80,0x24,0xc6,0x00,0x01,0x8e,0x47,0x00,0x0c,0x24,0x63,0x00,0x10,
4500x30,0xc5,0xff,0xff,0x26,0x04,0x00,0x04,0x3c,0x08,0xb0,0x03,0x00,0x71,0x18,0x24,
4510x00,0x91,0x80,0x24,0x24,0x42,0x00,0x10,0x2c,0xa5,0x00,0x0a,0x35,0x08,0x01,0x08,
4520xae,0x07,0x00,0x00,0xaf,0x83,0x8c,0x78,0xa7,0x82,0x8c,0x80,0xa7,0x86,0x8c,0x82,
4530x10,0xa0,0x00,0x07,0x00,0x00,0x00,0x00,0x8f,0x82,0x8c,0x84,0x8d,0x03,0x00,0x00,
4540x24,0x42,0x04,0x00,0x00,0x62,0x18,0x2b,0x14,0x60,0xff,0xd9,0x00,0x00,0x00,0x00,
4550x0c,0x00,0x05,0xbd,0x00,0x00,0x00,0x00,0x08,0x00,0x06,0x4c,0x00,0x00,0x00,0x00,
4560x97,0x82,0x8c,0x82,0x3c,0x03,0xb0,0x03,0x14,0x40,0x00,0x09,0x34,0x63,0x01,0x08,
4570x8c,0x62,0x00,0x00,0x8f,0x83,0x8c,0x7c,0xa7,0x80,0x8c,0x80,0xaf,0x82,0x8c,0x84,
4580xac,0x60,0x00,0x00,0x8f,0x82,0x8c,0x7c,0x00,0x00,0x00,0x00,0xac,0x40,0x00,0x04,
4590x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x04,0x32,0x02,0x30,0xc6,0xff,0x00,
4600x00,0x04,0x16,0x02,0x00,0x04,0x1a,0x00,0x3c,0x05,0x00,0xff,0x00,0x65,0x18,0x24,
4610x00,0x46,0x10,0x25,0x00,0x43,0x10,0x25,0x00,0x04,0x26,0x00,0x03,0xe0,0x00,0x08,
4620x00,0x44,0x10,0x25,0x80,0x82,0x00,0x00,0x90,0x83,0x00,0x00,0x10,0x40,0x00,0x0c,
4630x00,0x80,0x28,0x21,0x24,0x62,0xff,0x9f,0x30,0x42,0x00,0xff,0x2c,0x42,0x00,0x1a,
4640x10,0x40,0x00,0x02,0x24,0x63,0xff,0xe0,0xa0,0xa3,0x00,0x00,0x24,0xa5,0x00,0x01,
4650x90,0xa2,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0xf6,0x00,0x40,0x18,0x21,
4660x03,0xe0,0x00,0x08,0x00,0x80,0x10,0x21,0x80,0x82,0x00,0x00,0x90,0x83,0x00,0x00,
4670x10,0x40,0x00,0x0c,0x00,0x80,0x28,0x21,0x24,0x62,0xff,0xbf,0x30,0x42,0x00,0xff,
4680x2c,0x42,0x00,0x1a,0x10,0x40,0x00,0x02,0x24,0x63,0x00,0x20,0xa0,0xa3,0x00,0x00,
4690x24,0xa5,0x00,0x01,0x90,0xa2,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0xf6,
4700x00,0x40,0x18,0x21,0x03,0xe0,0x00,0x08,0x00,0x80,0x10,0x21,0x27,0xbd,0xff,0xe8,
4710xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,0x24,0x10,0xff,0xff,0x0c,0x00,0x2e,0x4a,
4720x00,0x00,0x00,0x00,0x10,0x50,0xff,0xfd,0x00,0x02,0x16,0x00,0x00,0x02,0x16,0x03,
4730x8f,0xbf,0x00,0x14,0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,
4740x27,0xbd,0xff,0xc8,0xaf,0xb3,0x00,0x1c,0x00,0x00,0x98,0x21,0xaf,0xb1,0x00,0x14,
4750x02,0x65,0x88,0x2b,0xaf,0xb6,0x00,0x28,0xaf,0xb5,0x00,0x24,0xaf,0xb0,0x00,0x10,
4760xaf,0xbf,0x00,0x34,0xaf,0xbe,0x00,0x30,0xaf,0xb7,0x00,0x2c,0xaf,0xb4,0x00,0x20,
4770xaf,0xb2,0x00,0x18,0x00,0xa0,0xb0,0x21,0xaf,0xa4,0x00,0x38,0x00,0xc0,0xa8,0x21,
4780x12,0x20,0x00,0x17,0x00,0x80,0x80,0x21,0x24,0x17,0xff,0xff,0x24,0x1e,0x00,0x0a,
4790x0c,0x00,0x2e,0x4a,0x00,0x00,0x00,0x00,0x10,0x57,0x00,0x0f,0x00,0x02,0x16,0x00,
4800x00,0x02,0x26,0x03,0x10,0x9e,0x00,0x0e,0x24,0x02,0x00,0x0d,0x10,0x82,0x00,0x34,
4810x24,0x02,0x00,0x08,0x10,0x82,0x00,0x25,0x24,0x02,0x00,0x09,0x10,0x82,0x00,0x13,
4820x00,0x00,0x90,0x21,0xa2,0x04,0x00,0x00,0x26,0x73,0x00,0x01,0x16,0xa0,0x00,0x0b,
4830x26,0x10,0x00,0x01,0x02,0x76,0x88,0x2b,0x16,0x20,0xff,0xed,0x00,0x00,0x00,0x00,
4840x7b,0xbe,0x01,0xbc,0x7b,0xb6,0x01,0x7c,0x7b,0xb4,0x01,0x3c,0x7b,0xb2,0x00,0xfc,
4850x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x38,0x0c,0x00,0x2e,0x3d,
4860x02,0x76,0x88,0x2b,0x08,0x00,0x06,0xe6,0x00,0x00,0x00,0x00,0x24,0x14,0x00,0x20,
4870xa2,0x14,0x00,0x00,0x26,0x52,0x00,0x01,0x24,0x04,0x00,0x20,0x26,0x73,0x00,0x01,
4880x16,0xa0,0x00,0x06,0x26,0x10,0x00,0x01,0x2a,0x42,0x00,0x08,0x10,0x40,0xff,0xea,
4890x02,0x76,0x88,0x2b,0x08,0x00,0x06,0xf5,0xa2,0x14,0x00,0x00,0x0c,0x00,0x2e,0x3d,
4900x00,0x00,0x00,0x00,0x08,0x00,0x06,0xfb,0x2a,0x42,0x00,0x08,0x8f,0xa2,0x00,0x38,
4910x00,0x00,0x00,0x00,0x12,0x02,0xff,0xe0,0x00,0x00,0x00,0x00,0x26,0x10,0xff,0xff,
4920x12,0xa0,0xff,0xdc,0x26,0x73,0xff,0xff,0x0c,0x00,0x2e,0x3d,0x24,0x04,0x00,0x08,
4930x0c,0x00,0x2e,0x3d,0x24,0x04,0x00,0x20,0x08,0x00,0x06,0xef,0x24,0x04,0x00,0x08,
4940x08,0x00,0x06,0xe8,0xa2,0x00,0x00,0x00,0x90,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
4950x00,0x02,0x1e,0x00,0x10,0x60,0x00,0x16,0x00,0x00,0x30,0x21,0x24,0x07,0x00,0x20,
4960x00,0x03,0x1e,0x03,0x10,0x67,0x00,0x17,0x00,0x00,0x00,0x00,0x10,0x60,0x00,0x15,
4970x00,0x00,0x00,0x00,0x10,0x67,0x00,0x0b,0x24,0xc6,0x00,0x01,0x10,0x60,0x00,0x0a,
4980x00,0x02,0x1e,0x00,0x24,0x05,0x00,0x20,0x24,0x84,0x00,0x01,0x80,0x83,0x00,0x00,
4990x90,0x82,0x00,0x00,0x10,0x65,0x00,0x03,0x00,0x00,0x00,0x00,0x14,0x60,0xff,0xfa,
5000x00,0x00,0x00,0x00,0x00,0x02,0x1e,0x00,0x14,0x60,0xff,0xed,0x00,0x00,0x00,0x00,
5010x28,0xc3,0x00,0x08,0x24,0x02,0x00,0x07,0x00,0x43,0x30,0x0a,0x03,0xe0,0x00,0x08,
5020x00,0xc0,0x10,0x21,0x24,0x84,0x00,0x01,0x90,0x82,0x00,0x00,0x08,0x00,0x07,0x2a,
5030x00,0x02,0x1e,0x00,0x27,0xbd,0xff,0xe0,0xaf,0xb1,0x00,0x14,0x27,0x91,0x8c,0x88,
5040xaf,0xb0,0x00,0x10,0x24,0x06,0x00,0x20,0x00,0x80,0x80,0x21,0x00,0x00,0x28,0x21,
5050xaf,0xbf,0x00,0x18,0x0c,0x00,0x31,0x84,0x02,0x20,0x20,0x21,0x82,0x02,0x00,0x00,
5060x00,0x00,0x00,0x00,0x10,0x40,0x00,0x1f,0x00,0x00,0x30,0x21,0x02,0x20,0x20,0x21,
5070x24,0x09,0x00,0x20,0x24,0x08,0x00,0x20,0x24,0x07,0x00,0x08,0xac,0x90,0x00,0x00,
5080x82,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x49,0x00,0x0a,0x00,0x00,0x00,0x00,
5090x10,0x40,0x00,0x08,0x24,0x03,0x00,0x20,0x26,0x10,0x00,0x01,0x82,0x02,0x00,0x00,
5100x00,0x00,0x00,0x00,0x10,0x43,0x00,0x03,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0xfa,
5110x00,0x00,0x00,0x00,0xa2,0x00,0x00,0x00,0x26,0x10,0x00,0x01,0x82,0x02,0x00,0x00,
5120x92,0x03,0x00,0x00,0x10,0x48,0x00,0x0c,0x24,0x05,0x00,0x20,0x24,0xc6,0x00,0x01,
5130x10,0xc7,0x00,0x04,0x24,0x84,0x00,0x04,0x00,0x03,0x16,0x00,0x14,0x40,0xff,0xe7,
5140x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x18,0x7b,0xb0,0x00,0xbc,0x27,0x82,0x8c,0x88,
5150x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x26,0x10,0x00,0x01,0x82,0x02,0x00,0x00,
5160x92,0x03,0x00,0x00,0x10,0x45,0xff,0xfc,0x00,0x00,0x00,0x00,0x08,0x00,0x07,0x5c,
5170x24,0xc6,0x00,0x01,0x00,0x80,0x30,0x21,0x90,0x84,0x00,0x00,0x00,0x00,0x38,0x21,
5180x10,0x80,0x00,0x19,0x24,0xc6,0x00,0x01,0x24,0x82,0xff,0xd0,0x30,0x42,0x00,0xff,
5190x2c,0x43,0x00,0x0a,0x14,0x60,0x00,0x0c,0x00,0x07,0x19,0x00,0x24,0x83,0xff,0x9f,
5200x24,0x82,0xff,0xa9,0x24,0x88,0xff,0xc9,0x2c,0x63,0x00,0x06,0x24,0x84,0xff,0xbf,
5210x2c,0x84,0x00,0x06,0x14,0x60,0x00,0x03,0x30,0x42,0x00,0xff,0x10,0x80,0x00,0x0e,
5220x31,0x02,0x00,0xff,0x00,0x07,0x19,0x00,0x00,0x62,0x18,0x21,0x00,0x67,0x10,0x2b,
5230x14,0x40,0x00,0x07,0x00,0x00,0x20,0x21,0x90,0xc4,0x00,0x00,0x00,0x60,0x38,0x21,
5240x14,0x80,0xff,0xe9,0x24,0xc6,0x00,0x01,0xac,0xa7,0x00,0x00,0x24,0x04,0x00,0x01,
5250x03,0xe0,0x00,0x08,0x00,0x80,0x10,0x21,0x08,0x00,0x07,0x8c,0x00,0x00,0x20,0x21,
5260x00,0x00,0x20,0x21,0x27,0x85,0x94,0xc0,0x24,0x82,0x00,0x01,0x00,0x04,0x18,0x80,
5270x30,0x44,0x00,0xff,0x00,0x65,0x18,0x21,0x2c,0x82,0x00,0x0b,0x14,0x40,0xff,0xfa,
5280xac,0x60,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0xaf,0x84,0x8d,0x08,
5290xaf,0x85,0x8d,0x0c,0xaf,0x86,0x8d,0x10,0xaf,0x87,0x8d,0x14,0x03,0xe0,0x00,0x08,
5300x00,0x00,0x00,0x00,0x8f,0x82,0x84,0x98,0x27,0xbd,0xff,0xe8,0xaf,0xbf,0x00,0x10,
5310x2c,0x43,0x00,0x64,0x24,0x42,0x00,0x01,0x27,0x84,0x8c,0xa8,0xaf,0x82,0x84,0x98,
5320x10,0x60,0x00,0x05,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x10,0x00,0x00,0x00,0x00,
5330x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0xaf,0x80,0x84,0x98,0x0c,0x00,0x07,0xf6,
5340x00,0x00,0x00,0x00,0x00,0x40,0x18,0x21,0x28,0x44,0x00,0x08,0x24,0x02,0x00,0x07,
5350x10,0x62,0x00,0x08,0x00,0x00,0x00,0x00,0x14,0x80,0xff,0xf3,0x24,0x02,0x00,0x08,
5360x27,0x84,0x8c,0xa8,0x14,0x62,0xff,0xf0,0x00,0x00,0x00,0x00,0x0c,0x00,0x1a,0x95,
5370x00,0x00,0x00,0x00,0x27,0x84,0x8c,0xa8,0x0c,0x00,0x08,0x54,0x00,0x00,0x00,0x00,
5380x8f,0x83,0x84,0x9c,0x3c,0x04,0x80,0x01,0x00,0x60,0x28,0x21,0x24,0x63,0x00,0x01,
5390xaf,0x83,0x84,0x9c,0x0c,0x00,0x1a,0x82,0x24,0x84,0x04,0x90,0x08,0x00,0x07,0xaa,
5400x00,0x00,0x00,0x00,0x27,0xbd,0xff,0xc0,0xaf,0xbf,0x00,0x38,0x8c,0x85,0x00,0x0c,
5410x8c,0x88,0x00,0x08,0x18,0xa0,0x00,0x0e,0x00,0x00,0x30,0x21,0x24,0x87,0x00,0x08,
5420x27,0xa9,0x00,0x10,0x00,0x06,0x10,0x80,0x00,0x06,0x19,0x00,0x00,0x49,0x10,0x21,
5430x14,0xc0,0x00,0x1f,0x00,0x83,0x18,0x21,0xaf,0xa7,0x00,0x10,0x24,0xc2,0x00,0x01,
5440x30,0x46,0x00,0xff,0x00,0xc5,0x18,0x2a,0x14,0x60,0xff,0xf7,0x00,0x06,0x10,0x80,
5450x29,0x02,0x00,0x0a,0x14,0x40,0x00,0x05,0x00,0x08,0x18,0x40,0x8f,0xbf,0x00,0x38,
5460x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x40,0x00,0x68,0x18,0x21,
5470x27,0x82,0x83,0x94,0x00,0x03,0x18,0xc0,0x00,0x62,0x18,0x21,0x8c,0x62,0x00,0x10,
5480x01,0x00,0x20,0x21,0x00,0x40,0xf8,0x09,0x27,0xa6,0x00,0x10,0x8f,0x83,0x84,0xb0,
5490x3c,0x04,0x80,0x01,0x00,0x60,0x28,0x21,0x24,0x63,0x00,0x01,0xaf,0x83,0x84,0xb0,
5500x0c,0x00,0x1a,0x82,0x24,0x84,0x04,0xa4,0x08,0x00,0x07,0xdf,0x00,0x00,0x00,0x00,
5510x08,0x00,0x07,0xd7,0xac,0x43,0x00,0x00,0x27,0xbd,0xff,0xe0,0xaf,0xb1,0x00,0x14,
5520xaf,0xbf,0x00,0x18,0x00,0x80,0x88,0x21,0x0c,0x00,0x1a,0xb9,0xaf,0xb0,0x00,0x10,
5530x00,0x40,0x20,0x21,0x24,0x02,0xff,0xff,0x10,0x82,0x00,0x1f,0x24,0x03,0x00,0x06,
5540x8f,0x85,0x84,0xc4,0x00,0x00,0x00,0x00,0x14,0xa0,0x00,0x0a,0x24,0x02,0x00,0x08,
5550x24,0x02,0x00,0x02,0x10,0x82,0x00,0x3b,0x28,0x82,0x00,0x03,0x10,0x40,0x00,0x32,
5560x24,0x02,0x00,0x1b,0x24,0x02,0x00,0x01,0x10,0x82,0x00,0x13,0x24,0x03,0x00,0x08,
5570x24,0x02,0x00,0x08,0x10,0x82,0x00,0x23,0x24,0x02,0x00,0x0d,0x10,0x82,0x00,0x18,
5580x02,0x25,0x10,0x21,0x24,0xa3,0x00,0x01,0xa0,0x44,0x00,0x00,0xaf,0x83,0x84,0xc4,
5590x18,0x60,0x00,0x08,0x24,0x02,0x00,0x43,0x82,0x23,0x00,0x00,0x00,0x00,0x00,0x00,
5600x10,0x62,0x00,0x0a,0x00,0x00,0x00,0x00,0x30,0x84,0xff,0xff,0x0c,0x00,0x1a,0xb5,
5610x00,0x00,0x00,0x00,0x24,0x03,0x00,0x06,0x8f,0xbf,0x00,0x18,0x7b,0xb0,0x00,0xbc,
5620x00,0x60,0x10,0x21,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x3c,0x04,0x80,0x01,
5630x0c,0x00,0x1a,0x95,0x24,0x84,0x04,0xb8,0x08,0x00,0x08,0x1e,0x24,0x03,0x00,0x06,
5640xa0,0x40,0x00,0x00,0x24,0xa5,0x00,0x01,0xaf,0x85,0x84,0xc4,0x0c,0x00,0x1a,0xb5,
5650x24,0x04,0x00,0x0d,0x24,0x03,0x00,0x07,0xaf,0x80,0x84,0xc4,0x08,0x00,0x08,0x1e,
5660x00,0x00,0x00,0x00,0x18,0xa0,0xff,0xeb,0x24,0xa5,0xff,0xff,0xaf,0x85,0x84,0xc4,
5670x0c,0x00,0x1a,0xb5,0x24,0x04,0x00,0x08,0x0c,0x00,0x1a,0xb5,0x24,0x04,0x00,0x20,
5680x08,0x00,0x08,0x1b,0x24,0x04,0x00,0x08,0x14,0x82,0xff,0xd2,0x24,0x02,0x00,0x08,
5690x0c,0x00,0x07,0x90,0x00,0x00,0x00,0x00,0x8f,0x85,0x84,0xc4,0x08,0x00,0x08,0x0c,
5700x24,0x04,0x00,0x0d,0x0c,0x00,0x31,0x0a,0x02,0x20,0x20,0x21,0xaf,0x82,0x84,0xc4,
5710x04,0x40,0x00,0x0d,0x00,0x00,0x80,0x21,0x02,0x30,0x10,0x21,0x90,0x44,0x00,0x00,
5720x26,0x10,0x00,0x01,0x00,0x04,0x26,0x00,0x00,0x04,0x26,0x03,0x0c,0x00,0x1a,0xb5,
5730x30,0x84,0xff,0xff,0x8f,0x83,0x84,0xc4,0x00,0x00,0x00,0x00,0x00,0x70,0x18,0x2a,
5740x10,0x60,0xff,0xf6,0x02,0x30,0x10,0x21,0x08,0x00,0x08,0x2e,0x24,0x03,0x00,0x06,
5750x27,0xbd,0xff,0xe8,0xaf,0xbf,0x00,0x10,0x27,0x83,0x8c,0xe8,0x24,0x02,0x00,0x07,
5760x24,0x42,0xff,0xff,0xac,0x60,0x00,0x00,0x04,0x41,0xff,0xfd,0x24,0x63,0x00,0x04,
5770x0c,0x00,0x08,0x66,0x00,0x00,0x00,0x00,0x8f,0x84,0x8c,0xe8,0x27,0x86,0x8c,0xe8,
5780x0c,0x00,0x08,0x83,0x00,0x40,0x28,0x21,0x8f,0xbf,0x00,0x10,0x00,0x00,0x00,0x00,
5790x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x27,0xbd,0xff,0xe0,0x00,0x80,0x28,0x21,
5800x27,0x84,0x8c,0xc8,0xaf,0xb1,0x00,0x14,0xaf,0xbf,0x00,0x18,0x0c,0x00,0x31,0x9b,
5810xaf,0xb0,0x00,0x10,0x8f,0x85,0x83,0x34,0x27,0x84,0x8c,0xc8,0x0c,0x00,0x31,0x5f,
5820x00,0x00,0x88,0x21,0x10,0x40,0x00,0x0c,0x00,0x00,0x00,0x00,0x27,0x90,0x8c,0xe8,
5830x8f,0x85,0x83,0x34,0x00,0x00,0x20,0x21,0xae,0x02,0x00,0x00,0x0c,0x00,0x31,0x5f,
5840x26,0x31,0x00,0x01,0x26,0x10,0x00,0x04,0x10,0x40,0x00,0x03,0x2a,0x23,0x00,0x64,
5850x14,0x60,0xff,0xf7,0x00,0x00,0x00,0x00,0x02,0x20,0x10,0x21,0x8f,0xbf,0x00,0x18,
5860x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x27,0xbd,0xff,0xd0,
5870xaf,0xb6,0x00,0x28,0xaf,0xb5,0x00,0x24,0xaf,0xb4,0x00,0x20,0xaf,0xbf,0x00,0x2c,
5880xaf,0xb3,0x00,0x1c,0xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,
5890x00,0xa0,0xa8,0x21,0x00,0x80,0xa0,0x21,0x00,0xc0,0xb0,0x21,0x10,0xa0,0x00,0x1d,
5900x24,0x02,0x00,0x05,0x3c,0x02,0x80,0x00,0x24,0x43,0x2c,0x80,0x8f,0x82,0x83,0xa4,
5910x00,0x00,0x00,0x00,0x10,0x43,0x00,0x1e,0x00,0x00,0x88,0x21,0x00,0x60,0x98,0x21,
5920x00,0x00,0x90,0x21,0x27,0x90,0x83,0xa4,0x8e,0x05,0xff,0xec,0x02,0x80,0x20,0x21,
5930x0c,0x00,0x31,0xa3,0x26,0x10,0x00,0x18,0x10,0x40,0x00,0x06,0x02,0x51,0x18,0x21,
5940x8e,0x02,0x00,0x00,0x26,0x31,0x00,0x01,0x14,0x53,0xff,0xf7,0x00,0x11,0x90,0x40,
5950x02,0x51,0x18,0x21,0x27,0x82,0x83,0x94,0x00,0x03,0x18,0xc0,0x00,0x62,0x18,0x21,
5960x8c,0x62,0x00,0x10,0x02,0x20,0x20,0x21,0x02,0xa0,0x28,0x21,0x00,0x40,0xf8,0x09,
5970x02,0xc0,0x30,0x21,0x8f,0xbf,0x00,0x2c,0x8f,0xb6,0x00,0x28,0x7b,0xb4,0x01,0x3c,
5980x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x30,
5990x08,0x00,0x08,0xa4,0x00,0x00,0x90,0x21,0x27,0xbd,0xff,0xc0,0xaf,0xb5,0x00,0x34,
6000xaf,0xb3,0x00,0x2c,0xaf,0xb1,0x00,0x24,0xaf,0xbf,0x00,0x38,0xaf,0xb4,0x00,0x30,
6010xaf,0xb2,0x00,0x28,0xaf,0xb0,0x00,0x20,0x00,0xc0,0x98,0x21,0x30,0xa5,0x00,0xff,
6020xac,0xc0,0x00,0x00,0x24,0x15,0x00,0x0a,0x00,0x00,0x88,0x21,0x27,0xa8,0x00,0x10,
6030x00,0x91,0x18,0x21,0x80,0x62,0x00,0x00,0x26,0x27,0x00,0x01,0x10,0x40,0x00,0x0c,
6040x01,0x11,0x30,0x21,0x90,0x63,0x00,0x00,0x30,0xf1,0x00,0xff,0x2e,0x22,0x00,0x0a,
6050x14,0x40,0xff,0xf7,0xa0,0xc3,0x00,0x00,0x8f,0xbf,0x00,0x38,0x7b,0xb4,0x01,0xbc,
6060x7b,0xb2,0x01,0x7c,0x7b,0xb0,0x01,0x3c,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x40,
6070x24,0x02,0x00,0x01,0x10,0xa2,0x00,0x23,0x24,0x02,0x00,0x02,0x10,0xa2,0x00,0x1f,
6080x24,0x02,0x00,0x03,0x10,0xa2,0x00,0x1a,0x00,0x00,0x00,0x00,0x02,0x20,0x90,0x21,
6090x12,0x40,0xff,0xf1,0x00,0x00,0x88,0x21,0x27,0xb4,0x00,0x10,0x02,0x91,0x10,0x21,
6100x90,0x44,0x00,0x00,0x0c,0x00,0x09,0x0a,0x00,0x00,0x00,0x00,0x02,0x51,0x20,0x23,
6110x24,0x84,0xff,0xff,0x30,0x84,0x00,0xff,0x02,0xa0,0x28,0x21,0x0c,0x00,0x08,0xfb,
6120x00,0x40,0x80,0x21,0x02,0x02,0x00,0x18,0x8e,0x63,0x00,0x00,0x26,0x22,0x00,0x01,
6130x30,0x51,0x00,0xff,0x02,0x32,0x20,0x2b,0x00,0x00,0x80,0x12,0x00,0x70,0x18,0x21,
6140x14,0x80,0xff,0xee,0xae,0x63,0x00,0x00,0x08,0x00,0x08,0xce,0x00,0x00,0x00,0x00,
6150x80,0x82,0x00,0x00,0x08,0x00,0x08,0xce,0xae,0x62,0x00,0x00,0x08,0x00,0x08,0xdb,
6160x24,0x15,0x00,0x10,0x08,0x00,0x08,0xdb,0x24,0x15,0x00,0x0a,0x30,0x84,0x00,0xff,
6170x30,0xa5,0x00,0xff,0x24,0x06,0x00,0x01,0x10,0x80,0x00,0x09,0x00,0x00,0x10,0x21,
6180x00,0xc5,0x00,0x18,0x24,0x42,0x00,0x01,0x30,0x42,0x00,0xff,0x00,0x44,0x18,0x2b,
6190x00,0x00,0x30,0x12,0x00,0x00,0x00,0x00,0x14,0x60,0xff,0xfa,0x00,0xc5,0x00,0x18,
6200x03,0xe0,0x00,0x08,0x00,0xc0,0x10,0x21,0x30,0x84,0x00,0xff,0x24,0x83,0xff,0xd0,
6210x30,0x62,0x00,0xff,0x2c,0x42,0x00,0x0a,0x14,0x40,0x00,0x06,0x00,0x00,0x00,0x00,
6220x24,0x82,0xff,0xbf,0x2c,0x42,0x00,0x06,0x14,0x40,0x00,0x02,0x24,0x83,0xff,0xc9,
6230x24,0x83,0xff,0xa9,0x03,0xe0,0x00,0x08,0x00,0x60,0x10,0x21,0x27,0xbd,0xff,0xc8,
6240x24,0x02,0x00,0x01,0xaf,0xbf,0x00,0x30,0xaf,0xb5,0x00,0x2c,0xaf,0xb4,0x00,0x28,
6250xaf,0xb3,0x00,0x24,0xaf,0xb2,0x00,0x20,0xaf,0xb1,0x00,0x1c,0x10,0xa2,0x00,0x3e,
6260xaf,0xb0,0x00,0x18,0x24,0x02,0x00,0x02,0x10,0xa2,0x00,0x08,0x24,0x05,0x00,0x01,
6270x00,0x00,0x10,0x21,0x8f,0xbf,0x00,0x30,0x7b,0xb4,0x01,0x7c,0x7b,0xb2,0x01,0x3c,
6280x7b,0xb0,0x00,0xfc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x38,0x8c,0xc4,0x00,0x04,
6290x0c,0x00,0x08,0xb6,0x27,0xa6,0x00,0x10,0x8f,0xa2,0x00,0x10,0x00,0x00,0x00,0x00,
6300x28,0x42,0x00,0x65,0x14,0x40,0x00,0x06,0x00,0x00,0x00,0x00,0x3c,0x04,0x80,0x01,
6310x0c,0x00,0x1a,0x95,0x24,0x84,0x04,0xbc,0x08,0x00,0x09,0x25,0x24,0x02,0x00,0x01,
6320x3c,0x04,0x80,0x01,0x0c,0x00,0x1a,0x95,0x24,0x84,0x04,0xc8,0x8f,0x83,0x83,0xa4,
6330x3c,0x02,0x80,0x00,0x24,0x42,0x2c,0x80,0x10,0x62,0xff,0xe5,0x00,0x40,0x90,0x21,
6340x3c,0x13,0x80,0x01,0x27,0x95,0x83,0x90,0x3c,0x14,0x80,0x01,0x27,0x90,0x83,0x94,
6350x00,0x00,0x88,0x21,0x8e,0x03,0x00,0x08,0x8f,0xa2,0x00,0x10,0x00,0x00,0x00,0x00,
6360x10,0x62,0x00,0x08,0x26,0x64,0x04,0xd4,0x26,0x10,0x00,0x18,0x8e,0x02,0x00,0x10,
6370x00,0x00,0x00,0x00,0x14,0x52,0xff,0xf7,0x26,0x31,0x00,0x18,0x08,0x00,0x09,0x25,
6380x00,0x00,0x10,0x21,0x0c,0x00,0x1a,0x95,0x00,0x00,0x00,0x00,0x02,0x35,0x10,0x21,
6390x8c,0x44,0x00,0x00,0x0c,0x00,0x1a,0x95,0x00,0x00,0x00,0x00,0x0c,0x00,0x1a,0x95,
6400x26,0x84,0x04,0xd8,0x8e,0x04,0x00,0x00,0x0c,0x00,0x1a,0x95,0x26,0x10,0x00,0x18,
6410x08,0x00,0x09,0x4b,0x00,0x00,0x00,0x00,0x3c,0x04,0x80,0x01,0x0c,0x00,0x1a,0x95,
6420x24,0x84,0x04,0xdc,0x3c,0x04,0x80,0x01,0x0c,0x00,0x1a,0x82,0x24,0x84,0x04,0xec,
6430x24,0x11,0x00,0x05,0x3c,0x12,0x80,0x01,0x27,0x90,0x88,0x0e,0x86,0x05,0x00,0x00,
6440x26,0x44,0x05,0x0c,0x0c,0x00,0x1a,0x82,0x26,0x31,0xff,0xff,0x06,0x21,0xff,0xfb,
6450x26,0x10,0xff,0xfe,0x08,0x00,0x09,0x25,0x00,0x00,0x10,0x21,0x27,0xbd,0xff,0xd0,
6460x28,0xa2,0x00,0x02,0xaf,0xb1,0x00,0x1c,0xaf,0xb0,0x00,0x18,0xaf,0xbf,0x00,0x2c,
6470xaf,0xb4,0x00,0x28,0xaf,0xb3,0x00,0x24,0xaf,0xb2,0x00,0x20,0x00,0xa0,0x80,0x21,
6480x14,0x40,0x00,0x51,0x00,0xc0,0x88,0x21,0x8c,0xc4,0x00,0x04,0x24,0x05,0x00,0x02,
6490x0c,0x00,0x08,0xb6,0x27,0xa6,0x00,0x10,0x24,0x02,0x00,0x02,0x12,0x02,0x00,0x48,
6500x24,0x05,0x00,0x01,0x8e,0x24,0x00,0x08,0x0c,0x00,0x08,0xb6,0x27,0xa6,0x00,0x14,
6510x8f,0xa2,0x00,0x14,0x00,0x00,0x00,0x00,0x30,0x42,0x0f,0xff,0xaf,0xa2,0x00,0x14,
6520x7b,0xa4,0x00,0xbc,0x0c,0x00,0x0a,0x06,0x24,0x06,0x00,0x04,0x24,0x03,0x00,0x04,
6530x10,0x43,0x00,0x2a,0x24,0x04,0x00,0x04,0x8f,0xa2,0x00,0x10,0x3c,0x04,0x80,0x01,
6540x24,0x84,0x05,0x10,0x00,0x02,0x19,0x02,0x00,0x03,0x81,0x00,0x8f,0xa3,0x00,0x14,
6550x00,0x50,0x10,0x23,0x00,0x02,0x10,0x82,0x00,0x62,0x18,0x21,0x0c,0x00,0x1a,0x95,
6560xaf,0xa3,0x00,0x14,0x3c,0x04,0x80,0x01,0x0c,0x00,0x1a,0x95,0x24,0x84,0x05,0x38,
6570x8f,0xa2,0x00,0x14,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x17,0x00,0x00,0x88,0x21,
6580x3c,0x13,0x80,0x01,0x3c,0x12,0x80,0x01,0x3c,0x14,0x80,0x01,0x0c,0x00,0x2e,0xda,
6590x24,0x04,0x27,0x10,0x32,0x23,0x00,0x03,0x02,0x00,0x28,0x21,0x10,0x60,0x00,0x1c,
6600x26,0x64,0x05,0x64,0x8f,0xa2,0x00,0x10,0x00,0x00,0x00,0x00,0x02,0x02,0x10,0x23,
6610x28,0x42,0xff,0xfd,0x10,0x40,0x00,0x10,0x26,0x44,0x05,0x70,0x0c,0x00,0x1a,0x95,
6620x26,0x10,0x00,0x04,0x8f,0xa2,0x00,0x14,0x26,0x31,0x00,0x01,0x02,0x22,0x10,0x2b,
6630x14,0x40,0xff,0xee,0x00,0x00,0x00,0x00,0x00,0x00,0x20,0x21,0x8f,0xbf,0x00,0x2c,
6640x8f,0xb4,0x00,0x28,0x7b,0xb2,0x01,0x3c,0x7b,0xb0,0x00,0xfc,0x00,0x80,0x10,0x21,
6650x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x30,0x8e,0x05,0x00,0x00,0x26,0x84,0x05,0x74,
6660x0c,0x00,0x1a,0x82,0x26,0x10,0x00,0x04,0x08,0x00,0x09,0xb1,0x00,0x00,0x00,0x00,
6670x0c,0x00,0x1a,0x82,0x00,0x00,0x00,0x00,0x08,0x00,0x09,0xa9,0x00,0x00,0x00,0x00,
6680x08,0x00,0x09,0x87,0x24,0x02,0x00,0x01,0x0c,0x00,0x0b,0x2b,0x00,0x00,0x00,0x00,
6690x08,0x00,0x09,0xb7,0x24,0x04,0x00,0x04,0x27,0xbd,0xff,0xd0,0x28,0xa2,0x00,0x03,
6700xaf,0xb1,0x00,0x24,0xaf,0xb0,0x00,0x20,0xaf,0xbf,0x00,0x28,0x00,0xa0,0x88,0x21,
6710x10,0x40,0x00,0x09,0x00,0xc0,0x80,0x21,0x0c,0x00,0x0b,0x2b,0x00,0x00,0x00,0x00,
6720x24,0x04,0x00,0x04,0x8f,0xbf,0x00,0x28,0x7b,0xb0,0x01,0x3c,0x00,0x80,0x10,0x21,
6730x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x30,0x8c,0xc4,0x00,0x04,0x24,0x05,0x00,0x02,
6740x0c,0x00,0x08,0xb6,0x27,0xa6,0x00,0x10,0x8e,0x04,0x00,0x08,0x24,0x05,0x00,0x02,
6750x0c,0x00,0x08,0xb6,0x27,0xa6,0x00,0x14,0x24,0x02,0x00,0x03,0x12,0x22,0x00,0x1b,
6760x24,0x05,0x00,0x01,0x8e,0x04,0x00,0x0c,0x0c,0x00,0x08,0xb6,0x27,0xa6,0x00,0x18,
6770x8f,0xa4,0x00,0x10,0x8f,0xa5,0x00,0x18,0x0c,0x00,0x0a,0x06,0x24,0x06,0x00,0x04,
6780x24,0x03,0x00,0x04,0x10,0x43,0xff,0xe7,0x24,0x04,0x00,0x04,0x8f,0xa2,0x00,0x18,
6790x00,0x00,0x00,0x00,0x10,0x40,0x00,0x0b,0x00,0x00,0x28,0x21,0x8f,0xa2,0x00,0x10,
6800x8f,0xa4,0x00,0x14,0x24,0xa5,0x00,0x01,0xac,0x44,0x00,0x00,0x8f,0xa3,0x00,0x10,
6810x8f,0xa2,0x00,0x18,0x24,0x63,0x00,0x04,0x00,0xa2,0x10,0x2b,0x14,0x40,0xff,0xf7,
6820xaf,0xa3,0x00,0x10,0x08,0x00,0x09,0xd9,0x00,0x00,0x20,0x21,0x24,0x02,0x00,0x01,
6830x08,0x00,0x09,0xec,0xaf,0xa2,0x00,0x18,0x30,0xc6,0x00,0xff,0x00,0xa6,0x00,0x18,
6840x00,0x00,0x28,0x12,0x04,0x81,0x00,0x07,0x00,0x00,0x30,0x21,0x3c,0x02,0x80,0x01,
6850x00,0x85,0x18,0x21,0x34,0x42,0x7f,0xff,0x00,0x43,0x10,0x2b,0x10,0x40,0x00,0x0b,
6860x3c,0x02,0xb0,0x03,0x3c,0x02,0xaf,0xff,0x34,0x42,0xff,0xff,0x00,0x44,0x10,0x2b,
6870x10,0x40,0x00,0x17,0x3c,0x02,0xb0,0x0a,0x00,0x85,0x18,0x21,0x34,0x42,0xff,0xff,
6880x00,0x43,0x10,0x2b,0x14,0x40,0x00,0x12,0x3c,0x02,0xb0,0x03,0x34,0x42,0xff,0xff,
6890x00,0x44,0x10,0x2b,0x10,0x40,0x00,0x06,0x3c,0x02,0xb0,0x07,0x3c,0x02,0xb0,0x04,
6900x34,0x42,0xff,0xff,0x00,0x43,0x10,0x2b,0x10,0x40,0x00,0x09,0x3c,0x02,0xb0,0x07,
6910x34,0x42,0x00,0x3f,0x00,0x44,0x10,0x2b,0x10,0x40,0x00,0x06,0x3c,0x02,0xb0,0x07,
6920x34,0x42,0xff,0xff,0x00,0x43,0x10,0x2b,0x14,0x40,0x00,0x02,0x00,0x00,0x00,0x00,
6930x24,0x06,0x00,0x01,0x14,0xc0,0x00,0x11,0x24,0x02,0x00,0x04,0x3c,0x02,0xb0,0x08,
6940x34,0x42,0x0f,0xff,0x00,0x44,0x10,0x2b,0x14,0x40,0x00,0x08,0x3c,0x02,0x4f,0xf7,
6950x00,0x85,0x20,0x21,0x34,0x42,0xf0,0x00,0x00,0x82,0x20,0x21,0x34,0x03,0xef,0xff,
6960x00,0x64,0x18,0x2b,0x14,0x60,0x00,0x02,0x00,0x00,0x00,0x00,0x24,0x06,0x00,0x02,
6970x10,0xc0,0x00,0x02,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x04,0x03,0xe0,0x00,0x08,
6980x00,0x00,0x00,0x00,0x27,0xbd,0xff,0xe0,0x24,0x02,0x00,0x02,0xaf,0xb0,0x00,0x18,
6990xaf,0xbf,0x00,0x1c,0x10,0xa2,0x00,0x23,0x00,0xc0,0x80,0x21,0x28,0xa2,0x00,0x03,
7000x10,0x40,0x00,0x0c,0x24,0x02,0x00,0x03,0x24,0x02,0x00,0x01,0x10,0xa2,0x00,0x04,
7010x00,0x00,0x18,0x21,0x0c,0x00,0x0b,0x2b,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x21,
7020x8f,0xbf,0x00,0x1c,0x8f,0xb0,0x00,0x18,0x00,0x60,0x10,0x21,0x03,0xe0,0x00,0x08,
7030x27,0xbd,0x00,0x20,0x14,0xa2,0xff,0xf7,0x24,0x05,0x00,0x01,0x8c,0xc4,0x00,0x04,
7040x0c,0x00,0x08,0xb6,0x27,0xa6,0x00,0x10,0x8e,0x04,0x00,0x08,0x24,0x05,0x00,0x02,
7050x0c,0x00,0x08,0xb6,0x27,0xa6,0x00,0x14,0x8f,0xa4,0x00,0x10,0x00,0x00,0x00,0x00,
7060x2c,0x82,0x00,0x0b,0x10,0x40,0xff,0xee,0x24,0x03,0x00,0x04,0x00,0x04,0x10,0x80,
7070x8f,0xa4,0x00,0x14,0x27,0x83,0x94,0xc0,0x00,0x43,0x10,0x21,0x08,0x00,0x0a,0x4f,
7080xac,0x44,0x00,0x00,0x8c,0xc4,0x00,0x04,0x24,0x05,0x00,0x01,0x0c,0x00,0x08,0xb6,
7090x27,0xa6,0x00,0x10,0x8f,0xa5,0x00,0x10,0x27,0x83,0x94,0xc0,0x3c,0x04,0x80,0x01,
7100x00,0x05,0x10,0x80,0x00,0x43,0x10,0x21,0x8c,0x46,0x00,0x00,0x0c,0x00,0x1a,0x82,
7110x24,0x84,0x05,0x7c,0x08,0x00,0x0a,0x50,0x00,0x00,0x18,0x21,0x03,0xe0,0x00,0x08,
7120x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
7130x00,0x00,0x00,0x00,0x27,0xbd,0xff,0xb8,0x28,0xa5,0x00,0x04,0xaf,0xb0,0x00,0x20,
7140xaf,0xbf,0x00,0x40,0xaf,0xb7,0x00,0x3c,0xaf,0xb6,0x00,0x38,0xaf,0xb5,0x00,0x34,
7150xaf,0xb4,0x00,0x30,0xaf,0xb3,0x00,0x2c,0xaf,0xb2,0x00,0x28,0xaf,0xb1,0x00,0x24,
7160x10,0xa0,0x00,0x0b,0x00,0xc0,0x80,0x21,0x0c,0x00,0x0b,0x2b,0x00,0x00,0x00,0x00,
7170x24,0x02,0x00,0x04,0x8f,0xbf,0x00,0x40,0x7b,0xb6,0x01,0xfc,0x7b,0xb4,0x01,0xbc,
7180x7b,0xb2,0x01,0x7c,0x7b,0xb0,0x01,0x3c,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x48,
7190x8c,0xc4,0x00,0x04,0x24,0x05,0x00,0x01,0x0c,0x00,0x08,0xb6,0x27,0xa6,0x00,0x10,
7200x8e,0x04,0x00,0x08,0x24,0x05,0x00,0x01,0x0c,0x00,0x08,0xb6,0x27,0xa6,0x00,0x14,
7210x8e,0x04,0x00,0x0c,0x24,0x05,0x00,0x01,0x0c,0x00,0x08,0xb6,0x27,0xa6,0x00,0x18,
7220x8f,0xa3,0x00,0x18,0x00,0x00,0x00,0x00,0x10,0x60,0x00,0x3a,0x24,0x02,0x00,0x01,
7230x10,0x62,0x00,0x33,0x3c,0x04,0x80,0x01,0x97,0xb0,0x00,0x12,0x8f,0xa2,0x00,0x14,
7240x00,0x00,0x00,0x00,0x02,0x02,0x10,0x2b,0x10,0x40,0xff,0xe2,0x3c,0x15,0x80,0x01,
7250x3c,0x02,0x80,0x01,0x24,0x52,0x05,0xbc,0x3c,0x14,0xb0,0x06,0x24,0x13,0x00,0x01,
7260x3c,0x17,0xb0,0x08,0x3c,0x16,0x80,0x01,0x32,0x02,0x00,0x01,0x02,0x00,0x28,0x21,
7270x10,0x40,0x00,0x1f,0x26,0xa4,0x05,0xb0,0x8f,0xa3,0x00,0x18,0x00,0x10,0x10,0xc0,
7280x00,0x54,0x10,0x21,0x10,0x60,0x00,0x14,0x02,0x40,0x20,0x21,0x00,0x10,0x10,0xc0,
7290x00,0x57,0x10,0x21,0x10,0x73,0x00,0x09,0x26,0xc4,0x05,0xc4,0x8f,0xa2,0x00,0x14,
7300x26,0x03,0x00,0x01,0x30,0x70,0xff,0xff,0x02,0x02,0x10,0x2b,0x14,0x40,0xff,0xee,
7310x00,0x00,0x00,0x00,0x08,0x00,0x0a,0x8d,0x00,0x00,0x00,0x00,0x8c,0x51,0x00,0x00,
7320x00,0x00,0x00,0x00,0x32,0x25,0x00,0xff,0x0c,0x00,0x1a,0x82,0x00,0x00,0x00,0x00,
7330x08,0x00,0x0a,0xbf,0x00,0x00,0x00,0x00,0x8c,0x51,0x00,0x00,0x0c,0x00,0x1a,0x82,
7340x00,0x11,0x2c,0x02,0x32,0x25,0x00,0xff,0x08,0x00,0x0a,0xca,0x02,0x40,0x20,0x21,
7350x0c,0x00,0x1a,0x82,0x00,0x00,0x00,0x00,0x08,0x00,0x0a,0xb6,0x00,0x00,0x00,0x00,
7360x24,0x84,0x05,0x90,0x0c,0x00,0x1a,0x95,0x00,0x00,0x00,0x00,0x08,0x00,0x0a,0xa6,
7370x00,0x00,0x00,0x00,0x3c,0x04,0x80,0x01,0x08,0x00,0x0a,0xd9,0x24,0x84,0x05,0xd0,
7380x00,0xa0,0x10,0x21,0x27,0xbd,0xff,0xd8,0x28,0x42,0x00,0x04,0xaf,0xb0,0x00,0x20,
7390xaf,0xbf,0x00,0x24,0x00,0xc0,0x80,0x21,0x24,0x05,0x00,0x01,0x10,0x40,0x00,0x08,
7400x27,0xa6,0x00,0x10,0x0c,0x00,0x0b,0x2b,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x04,
7410x8f,0xbf,0x00,0x24,0x8f,0xb0,0x00,0x20,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x28,
7420x8e,0x04,0x00,0x04,0x0c,0x00,0x08,0xb6,0x00,0x00,0x00,0x00,0x8e,0x04,0x00,0x08,
7430x24,0x05,0x00,0x01,0x0c,0x00,0x08,0xb6,0x27,0xa6,0x00,0x14,0x8e,0x04,0x00,0x0c,
7440x24,0x05,0x00,0x01,0x0c,0x00,0x08,0xb6,0x27,0xa6,0x00,0x18,0x08,0x00,0x0a,0xec,
7450x24,0x02,0x00,0x01,0x24,0x03,0x00,0x01,0x00,0x65,0x10,0x2a,0x27,0xbd,0xff,0xd8,
7460x00,0xa0,0x40,0x21,0x10,0x40,0x00,0x0b,0x00,0xc0,0x38,0x21,0x00,0x03,0x20,0x80,
7470x00,0x87,0x10,0x21,0x8c,0x45,0x00,0x00,0x24,0x63,0x00,0x01,0x30,0x63,0x00,0xff,
7480x8c,0xa6,0x00,0x00,0x00,0x9d,0x20,0x21,0x00,0x68,0x10,0x2a,0x14,0x40,0xff,0xf7,
7490xac,0x86,0xff,0xfc,0x8f,0xa3,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x60,0x00,0x0b,
7500x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0x62,0x00,0x03,0x00,0x00,0x00,0x00,
7510x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x28,0x93,0xa2,0x00,0x07,0x00,0x00,0x00,0x00,
7520xa3,0x82,0x87,0x6c,0x08,0x00,0x0b,0x14,0x00,0x00,0x00,0x00,0x93,0xa2,0x00,0x07,
7530x00,0x00,0x00,0x00,0xa3,0x82,0x94,0xb0,0x08,0x00,0x0b,0x14,0x00,0x00,0x00,0x00,
7540x27,0xbd,0xff,0xe8,0x3c,0x04,0x80,0x01,0xaf,0xbf,0x00,0x10,0x18,0xa0,0x00,0x03,
7550x24,0x84,0x05,0xf8,0x0c,0x00,0x1a,0x95,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x10,
7560x24,0x02,0x00,0x01,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x27,0xbd,0xff,0xe8,
7570xaf,0xb0,0x00,0x10,0x00,0x80,0x80,0x21,0x3c,0x04,0x80,0x01,0xaf,0xbf,0x00,0x14,
7580x0c,0x00,0x1a,0x95,0x24,0x84,0x06,0x0c,0x00,0x10,0x10,0x40,0x00,0x50,0x10,0x21,
7590x27,0x83,0x83,0x90,0x00,0x02,0x10,0xc0,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x08,
7600x0c,0x00,0x1a,0x95,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x14,0x8f,0xb0,0x00,0x10,
7610x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,
7620x34,0x63,0x00,0x20,0x24,0x42,0x2c,0xf8,0x3c,0x04,0xb0,0x03,0xac,0x62,0x00,0x00,
7630x34,0x84,0x00,0x2c,0x8c,0x86,0x00,0x00,0x3c,0x05,0xb0,0x0a,0x34,0xa5,0x1a,0x00,
7640x00,0x06,0x1a,0x02,0x30,0x63,0x0f,0xff,0x00,0x06,0x25,0x02,0x24,0x02,0xff,0xff,
7650xac,0xa2,0x00,0x00,0xa7,0x83,0xc5,0x4a,0xa7,0x84,0xc5,0x4c,0xa3,0x86,0xc5,0x48,
7660xa7,0x80,0xc5,0x40,0xa7,0x80,0xc5,0x42,0xa7,0x80,0xc5,0x44,0xa7,0x80,0xc5,0x46,
7670x00,0xa0,0x38,0x21,0x24,0x03,0x00,0x01,0x8c,0xe2,0x00,0x00,0x00,0x00,0x00,0x00,
7680x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x0a,0x00,0x8c,0x45,0x00,0x00,
7690x3c,0x04,0xb0,0x0a,0x34,0x84,0x1a,0x00,0xa0,0x45,0x00,0x00,0x24,0x03,0x00,0x01,
7700x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,
7710x34,0x42,0x0a,0x00,0x3c,0x04,0xb0,0x0a,0xa0,0x45,0x00,0x00,0x34,0x84,0x1a,0x00,
7720x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,
7730x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x3c,0x04,0xb0,0x03,0x34,0x63,0x01,0x08,
7740x34,0x84,0x01,0x18,0x8c,0x65,0x00,0x00,0x8c,0x82,0x00,0x00,0xaf,0x85,0xc5,0x50,
7750x30,0x42,0x02,0x00,0x10,0x40,0x00,0x06,0x3c,0x02,0x00,0x0f,0x3c,0x02,0x00,0x4c,
7760x34,0x42,0x4b,0x40,0xaf,0x82,0xc5,0x54,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
7770x08,0x00,0x0b,0x79,0x34,0x42,0x42,0x40,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,
7780x34,0x63,0x00,0x20,0x24,0x42,0x2d,0xf8,0x30,0x84,0x00,0xff,0xac,0x62,0x00,0x00,
7790x14,0x80,0x02,0xb3,0x24,0x02,0x00,0x02,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x1b,0x40,
7800x24,0x02,0xff,0xff,0xac,0x62,0x00,0x00,0x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,
7810x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,
7820x34,0x42,0x0b,0x40,0x8c,0x46,0x00,0x00,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x1b,0x48,
7830x24,0x02,0xff,0xff,0xac,0x62,0x00,0x00,0x00,0x60,0x20,0x21,0x00,0x06,0x54,0x02,
7840x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,
7850x3c,0x02,0xb0,0x0a,0x34,0x42,0x0b,0x48,0x8c,0x46,0x00,0x00,0x3c,0x03,0xb0,0x0a,
7860x34,0x63,0x1b,0x50,0x24,0x02,0xff,0xff,0xac,0x62,0x00,0x00,0x00,0x60,0x20,0x21,
7870x00,0x06,0x64,0x02,0x30,0xcb,0xff,0xff,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
7880x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x0b,0x50,
7890x8c,0x46,0x00,0x00,0x97,0x84,0xc5,0x40,0x97,0x82,0xc5,0x42,0x97,0x83,0xc5,0x46,
7900x01,0x44,0x20,0x23,0x01,0x62,0x10,0x23,0x00,0x82,0x20,0x21,0x97,0x82,0xc5,0x44,
7910x30,0xcd,0xff,0xff,0x01,0xa3,0x18,0x23,0x01,0x82,0x10,0x23,0x00,0x82,0x20,0x21,
7920x93,0x82,0xc5,0x48,0x00,0x83,0x20,0x21,0x30,0x84,0xff,0xff,0x00,0x82,0x10,0x2b,
7930x10,0x40,0x00,0xec,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x18,0xa0,0x24,0x02,0xff,0xff,
7940xac,0x62,0x00,0x00,0x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
7950x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x08,0xa0,
7960x8c,0x46,0x00,0x00,0x24,0x02,0x00,0x20,0x30,0xc8,0x00,0x7f,0x11,0x02,0x00,0x4d,
7970x2d,0x02,0x00,0x21,0x14,0x40,0x00,0x2b,0x24,0x02,0xff,0x80,0x00,0xc2,0x10,0x24,
7980x25,0x08,0xff,0xff,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x08,0xa0,0x00,0x48,0x30,0x25,
7990x3c,0x04,0xb0,0x0a,0xac,0x66,0x00,0x00,0x34,0x84,0x18,0xa0,0x24,0x03,0x00,0x01,
8000x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,
8010x34,0x42,0x08,0xb0,0x3c,0x04,0xb0,0x0a,0xac,0x46,0x00,0x00,0x34,0x84,0x18,0xb0,
8020x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,
8030x3c,0x02,0xb0,0x0a,0x34,0x42,0x08,0xc0,0x3c,0x04,0xb0,0x0a,0xac,0x46,0x00,0x00,
8040x34,0x84,0x18,0xc0,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
8050x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x08,0xd0,0x3c,0x04,0xb0,0x0a,
8060xac,0x46,0x00,0x00,0x34,0x84,0x18,0xd0,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
8070x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x24,0x02,0x00,0x20,0x11,0x02,0x00,0x07,
8080x24,0x02,0xff,0xff,0xa7,0x8a,0xc5,0x40,0xa7,0x8b,0xc5,0x42,0xa7,0x8c,0xc5,0x44,
8090xa7,0x8d,0xc5,0x46,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x0a,
8100x34,0x63,0x14,0x58,0xac,0x62,0x00,0x00,0x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,
8110x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x00,0x00,0x00,0x00,
8120x3c,0x03,0xb0,0x0a,0x34,0x63,0x04,0x58,0x8c,0x69,0x00,0x00,0x3c,0x02,0xff,0xff,
8130x34,0x42,0x3f,0xff,0x01,0x22,0x10,0x24,0x34,0x49,0x80,0x00,0x3c,0x04,0xb0,0x0a,
8140xac,0x69,0x00,0x00,0x34,0x84,0x14,0x58,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
8150x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x00,0x00,0x00,0x00,0x08,0x00,0x0b,0xf9,
8160x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x14,0x58,0x24,0x02,0xff,0xff,
8170xac,0x62,0x00,0x00,0x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
8180x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x04,0x58,
8190x8c,0x49,0x00,0x00,0x3c,0x04,0xb0,0x0a,0x34,0x84,0x14,0x58,0x35,0x29,0x40,0x00,
8200xac,0x49,0x00,0x00,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
8210x14,0x43,0xff,0xfd,0x24,0x02,0xff,0xff,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x14,0xb0,
8220xac,0x62,0x00,0x00,0x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
8230x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x04,0xb0,
8240x8c,0x47,0x00,0x00,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x14,0xb8,0x3c,0x05,0xb0,0x0a,
8250x24,0x02,0xff,0xff,0xac,0x62,0x00,0x00,0x34,0xa5,0x14,0xb8,0x00,0x07,0x1e,0x02,
8260x24,0x04,0x00,0x01,0x8c,0xa2,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x44,0xff,0xfd,
8270x3c,0x02,0xb0,0x0a,0x34,0x42,0x04,0xb8,0x8c,0x47,0x00,0x00,0x00,0x03,0x1a,0x00,
8280x30,0xe2,0x00,0xff,0x00,0x62,0x18,0x25,0x2c,0x62,0x00,0x04,0x10,0x40,0x00,0x3a,
8290x2c,0x62,0x00,0x11,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x14,0x10,0x24,0x02,0xff,0xff,
8300xac,0x62,0x00,0x00,0x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
8310x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x04,0x10,
8320x8c,0x47,0x00,0x00,0x24,0x02,0x00,0x03,0x00,0x07,0x1d,0x82,0x30,0x64,0x00,0x03,
8330x10,0x82,0x00,0x1a,0x3c,0x02,0xff,0x3f,0x3c,0x02,0xff,0xff,0x34,0x42,0x3f,0xff,
8340x3c,0x03,0xb0,0x0a,0x34,0x63,0x04,0x58,0x01,0x22,0x48,0x24,0x3c,0x04,0xb0,0x0a,
8350xac,0x69,0x00,0x00,0x34,0x84,0x14,0x58,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
8360x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x35,0x29,0x80,0x00,
8370x34,0x42,0x04,0x58,0x3c,0x04,0xb0,0x0a,0xac,0x49,0x00,0x00,0x34,0x84,0x14,0x58,
8380x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,
8390x2d,0x02,0x00,0x21,0x08,0x00,0x0b,0xcd,0x00,0x00,0x00,0x00,0x34,0x42,0xff,0xff,
8400x3c,0x03,0x00,0x80,0x00,0xe2,0x10,0x24,0x00,0x43,0x38,0x25,0x3c,0x04,0xb0,0x0a,
8410x3c,0x01,0xb0,0x0a,0xac,0x27,0x04,0x10,0x34,0x84,0x14,0x10,0x24,0x03,0x00,0x01,
8420x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xff,0xff,
8430x08,0x00,0x0c,0x60,0x34,0x42,0x3f,0xff,0x14,0x40,0xff,0xd8,0x3c,0x02,0xff,0xff,
8440x3c,0x03,0xb0,0x0a,0x34,0x63,0x14,0x10,0x24,0x02,0xff,0xff,0xac,0x62,0x00,0x00,
8450x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
8460x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x04,0x10,0x8c,0x47,0x00,0x00,
8470x3c,0x05,0x00,0xc0,0x24,0x03,0x00,0x02,0x00,0xe5,0x10,0x24,0x00,0x02,0x25,0x82,
8480x14,0x83,0xff,0xc6,0x3c,0x02,0xff,0xff,0x3c,0x02,0xff,0x3f,0x34,0x42,0xff,0xff,
8490x00,0xe2,0x10,0x24,0x00,0x45,0x38,0x25,0x3c,0x04,0xb0,0x0a,0x3c,0x01,0xb0,0x0a,
8500xac,0x27,0x04,0x10,0x34,0x84,0x14,0x10,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
8510x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xff,0xff,0x08,0x00,0x0c,0x60,
8520x34,0x42,0x3f,0xff,0x97,0x82,0xc5,0x4c,0x00,0x00,0x00,0x00,0x00,0x44,0x10,0x2b,
8530x10,0x40,0x00,0x74,0x34,0x63,0x18,0xa0,0x24,0x02,0xff,0xff,0xac,0x62,0x00,0x00,
8540x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
8550x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x08,0xa0,0x8c,0x46,0x00,0x00,
8560x00,0x00,0x00,0x00,0x30,0xc8,0x00,0x7f,0x2d,0x02,0x00,0x32,0x10,0x40,0xff,0x3d,
8570x24,0x02,0x00,0x20,0x11,0x02,0x00,0x2b,0x24,0x02,0xff,0x80,0x00,0xc2,0x10,0x24,
8580x25,0x08,0x00,0x02,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x08,0xa0,0x00,0x48,0x30,0x25,
8590x3c,0x04,0xb0,0x0a,0xac,0x66,0x00,0x00,0x34,0x84,0x18,0xa0,0x24,0x03,0x00,0x01,
8600x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,
8610x34,0x42,0x08,0xb0,0x3c,0x04,0xb0,0x0a,0xac,0x46,0x00,0x00,0x34,0x84,0x18,0xb0,
8620x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,
8630x3c,0x02,0xb0,0x0a,0x34,0x42,0x08,0xc0,0x3c,0x04,0xb0,0x0a,0xac,0x46,0x00,0x00,
8640x34,0x84,0x18,0xc0,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
8650x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x08,0xd0,0x3c,0x04,0xb0,0x0a,
8660xac,0x46,0x00,0x00,0x34,0x84,0x18,0xd0,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
8670x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x00,0x00,0x00,0x00,0x08,0x00,0x0b,0xf9,
8680x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x14,0x10,0x24,0x02,0xff,0xff,
8690xac,0x62,0x00,0x00,0x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
8700x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x04,0x10,
8710x8c,0x47,0x00,0x00,0x3c,0x05,0x00,0xc0,0x24,0x03,0x00,0x03,0x00,0xe5,0x10,0x24,
8720x00,0x02,0x25,0x82,0x10,0x83,0x00,0x0d,0x3c,0x02,0xff,0x3f,0x34,0x42,0xff,0xff,
8730x00,0xe2,0x10,0x24,0x00,0x45,0x38,0x25,0x3c,0x04,0xb0,0x0a,0x3c,0x01,0xb0,0x0a,
8740xac,0x27,0x04,0x10,0x34,0x84,0x14,0x10,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
8750x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x0a,
8760x34,0x63,0x14,0x58,0x24,0x02,0xff,0xff,0xac,0x62,0x00,0x00,0x00,0x60,0x20,0x21,
8770x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,
8780x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x04,0x58,0x8c,0x69,0x00,0x00,
8790x3c,0x02,0xff,0xff,0x34,0x42,0x3f,0xff,0x01,0x22,0x48,0x24,0x3c,0x04,0xb0,0x0a,
8800xac,0x69,0x00,0x00,0x34,0x84,0x14,0x58,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
8810x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x24,0x02,0xff,0x80,0x08,0x00,0x0c,0xc0,
8820x00,0xc2,0x10,0x24,0x97,0x82,0xc5,0x4a,0x00,0x00,0x00,0x00,0x00,0x44,0x10,0x2b,
8830x10,0x40,0x00,0x75,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x18,0xa0,0x24,0x02,0xff,0xff,
8840xac,0x62,0x00,0x00,0x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
8850x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x08,0xa0,
8860x8c,0x46,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0xc8,0x00,0x7f,0x2d,0x02,0x00,0x32,
8870x10,0x40,0xfe,0xc4,0x24,0x02,0x00,0x20,0x11,0x02,0x00,0x2b,0x24,0x02,0xff,0x80,
8880x00,0xc2,0x10,0x24,0x25,0x08,0x00,0x01,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x08,0xa0,
8890x00,0x48,0x30,0x25,0x3c,0x04,0xb0,0x0a,0xac,0x66,0x00,0x00,0x34,0x84,0x18,0xa0,
8900x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,
8910x3c,0x02,0xb0,0x0a,0x34,0x42,0x08,0xb0,0x3c,0x04,0xb0,0x0a,0xac,0x46,0x00,0x00,
8920x34,0x84,0x18,0xb0,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
8930x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x08,0xc0,0x3c,0x04,0xb0,0x0a,
8940xac,0x46,0x00,0x00,0x34,0x84,0x18,0xc0,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
8950x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x08,0xd0,
8960x3c,0x04,0xb0,0x0a,0xac,0x46,0x00,0x00,0x34,0x84,0x18,0xd0,0x24,0x03,0x00,0x01,
8970x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x00,0x00,0x00,0x00,
8980x08,0x00,0x0b,0xf9,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x14,0x10,
8990x24,0x02,0xff,0xff,0xac,0x62,0x00,0x00,0x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,
9000x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,
9010x34,0x42,0x04,0x10,0x8c,0x47,0x00,0x00,0x3c,0x05,0x00,0xc0,0x24,0x03,0x00,0x03,
9020x00,0xe5,0x10,0x24,0x00,0x02,0x25,0x82,0x10,0x83,0x00,0x0d,0x3c,0x02,0xff,0x3f,
9030x34,0x42,0xff,0xff,0x00,0xe2,0x10,0x24,0x00,0x45,0x38,0x25,0x3c,0x04,0xb0,0x0a,
9040x3c,0x01,0xb0,0x0a,0xac,0x27,0x04,0x10,0x34,0x84,0x14,0x10,0x24,0x03,0x00,0x01,
9050x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x00,0x00,0x00,0x00,
9060x3c,0x03,0xb0,0x0a,0x34,0x63,0x14,0x58,0x24,0x02,0xff,0xff,0xac,0x62,0x00,0x00,
9070x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
9080x14,0x43,0xff,0xfd,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x04,0x58,
9090x8c,0x69,0x00,0x00,0x3c,0x02,0xff,0xff,0x34,0x42,0x3f,0xff,0x01,0x22,0x48,0x24,
9100x3c,0x04,0xb0,0x0a,0xac,0x69,0x00,0x00,0x34,0x84,0x14,0x58,0x24,0x03,0x00,0x01,
9110x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x24,0x02,0xff,0x80,
9120x08,0x00,0x0d,0x39,0x00,0xc2,0x10,0x24,0x34,0x63,0x18,0xa0,0x24,0x02,0xff,0xff,
9130xac,0x62,0x00,0x00,0x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,
9140x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x08,0xa0,
9150x8c,0x46,0x00,0x00,0x24,0x02,0x00,0x20,0x30,0xc8,0x00,0x7f,0x15,0x02,0xfe,0x51,
9160x24,0x02,0xff,0xff,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x14,0x58,0xac,0x62,0x00,0x00,
9170x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
9180x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x04,0x58,0x8c,0x49,0x00,0x00,
9190x3c,0x04,0xb0,0x0a,0x34,0x84,0x14,0x58,0x35,0x29,0x40,0x00,0xac,0x49,0x00,0x00,
9200x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,
9210x24,0x02,0xff,0xff,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x14,0xb0,0xac,0x62,0x00,0x00,
9220x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
9230x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x04,0xb0,0x8c,0x47,0x00,0x00,
9240x3c,0x03,0xb0,0x0a,0x34,0x63,0x14,0xb8,0x3c,0x05,0xb0,0x0a,0x24,0x02,0xff,0xff,
9250xac,0x62,0x00,0x00,0x34,0xa5,0x14,0xb8,0x00,0x07,0x1e,0x02,0x24,0x04,0x00,0x01,
9260x8c,0xa2,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x44,0xff,0xfd,0x3c,0x02,0xb0,0x0a,
9270x34,0x42,0x04,0xb8,0x8c,0x47,0x00,0x00,0x00,0x03,0x1a,0x00,0x30,0xe2,0x00,0xff,
9280x00,0x62,0x18,0x25,0x2c,0x62,0x00,0x04,0x10,0x40,0x00,0x3a,0x2c,0x62,0x00,0x11,
9290x3c,0x03,0xb0,0x0a,0x34,0x63,0x14,0x10,0x24,0x02,0xff,0xff,0xac,0x62,0x00,0x00,
9300x00,0x60,0x20,0x21,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
9310x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x34,0x42,0x04,0x10,0x8c,0x47,0x00,0x00,
9320x24,0x02,0x00,0x03,0x00,0x07,0x1d,0x82,0x30,0x64,0x00,0x03,0x10,0x82,0x00,0x1a,
9330x3c,0x02,0xff,0x3f,0x3c,0x02,0xff,0xff,0x34,0x42,0x3f,0xff,0x3c,0x03,0xb0,0x0a,
9340x34,0x63,0x04,0x58,0x01,0x22,0x48,0x24,0x3c,0x04,0xb0,0x0a,0xac,0x69,0x00,0x00,
9350x34,0x84,0x14,0x58,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
9360x14,0x43,0xff,0xfd,0x3c,0x02,0xb0,0x0a,0x35,0x29,0x80,0x00,0x34,0x42,0x04,0x58,
9370x3c,0x04,0xb0,0x0a,0xac,0x49,0x00,0x00,0x34,0x84,0x14,0x58,0x24,0x03,0x00,0x01,
9380x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x00,0x00,0x00,0x00,
9390x08,0x00,0x0b,0xf9,0x00,0x00,0x00,0x00,0x34,0x42,0xff,0xff,0x3c,0x03,0x00,0x80,
9400x00,0xe2,0x10,0x24,0x00,0x43,0x38,0x25,0x3c,0x03,0xb0,0x0a,0x3c,0x01,0xb0,0x0a,
9410xac,0x27,0x04,0x10,0x34,0x63,0x14,0x10,0x24,0x04,0x00,0x01,0x8c,0x62,0x00,0x00,
9420x00,0x00,0x00,0x00,0x14,0x44,0xff,0xfd,0x3c,0x02,0xff,0xff,0x08,0x00,0x0d,0xef,
9430x34,0x42,0x3f,0xff,0x14,0x40,0xff,0xd8,0x3c,0x02,0xff,0xff,0x3c,0x03,0xb0,0x0a,
9440x34,0x63,0x14,0x10,0x24,0x02,0xff,0xff,0xac,0x62,0x00,0x00,0x00,0x60,0x20,0x21,
9450x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,
9460x3c,0x02,0xb0,0x0a,0x34,0x42,0x04,0x10,0x8c,0x47,0x00,0x00,0x3c,0x05,0x00,0xc0,
9470x24,0x03,0x00,0x02,0x00,0xe5,0x10,0x24,0x00,0x02,0x25,0x82,0x14,0x83,0xff,0xc6,
9480x3c,0x02,0xff,0xff,0x3c,0x02,0xff,0x3f,0x34,0x42,0xff,0xff,0x00,0xe2,0x10,0x24,
9490x00,0x45,0x38,0x25,0x3c,0x03,0xb0,0x0a,0x3c,0x01,0xb0,0x0a,0xac,0x27,0x04,0x10,
9500x34,0x63,0x14,0x10,0x24,0x04,0x00,0x01,0x8c,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
9510x14,0x44,0xff,0xfd,0x3c,0x02,0xff,0xff,0x08,0x00,0x0d,0xef,0x34,0x42,0x3f,0xff,
9520x10,0x82,0x00,0x03,0x3c,0x03,0xb0,0x0a,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
9530x34,0x63,0x1a,0x00,0x24,0x02,0xff,0xff,0xac,0x62,0x00,0x00,0x00,0x60,0x20,0x21,
9540xa7,0x80,0xc5,0x40,0xa7,0x80,0xc5,0x42,0xa7,0x80,0xc5,0x44,0xa7,0x80,0xc5,0x46,
9550x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,
9560x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x0a,0x34,0x63,0x0a,0x00,0x8c,0x66,0x00,0x00,
9570x3c,0x02,0x08,0x00,0x3c,0x04,0xb0,0x0a,0x00,0xc2,0x10,0x25,0xac,0x62,0x00,0x00,
9580x34,0x84,0x1a,0x00,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
9590x14,0x43,0xff,0xfd,0x3c,0x02,0xf7,0xff,0x3c,0x03,0xb0,0x0a,0x34,0x42,0xff,0xff,
9600x34,0x63,0x0a,0x00,0x00,0xc2,0x10,0x24,0x3c,0x04,0xb0,0x0a,0xac,0x62,0x00,0x00,
9610x34,0x84,0x1a,0x00,0x24,0x03,0x00,0x01,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
9620x14,0x43,0xff,0xfd,0x00,0x00,0x00,0x00,0x08,0x00,0x0e,0x3a,0x00,0x00,0x00,0x00,
9630x30,0x83,0x00,0x03,0x00,0x04,0x20,0x40,0x00,0x83,0x20,0x23,0x3c,0x02,0xb0,0x0a,
9640x00,0x82,0x20,0x21,0x3c,0x06,0x05,0xf5,0xac,0x85,0x00,0x00,0x24,0x07,0x00,0x01,
9650x00,0x00,0x28,0x21,0x34,0xc6,0xe0,0xff,0x8c,0x82,0x10,0x00,0x24,0xa5,0x00,0x01,
9660x10,0x47,0x00,0x03,0x00,0xc5,0x18,0x2b,0x10,0x60,0xff,0xfb,0x00,0x00,0x00,0x00,
9670x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x30,0x83,0x00,0x03,0x00,0x04,0x20,0x40,
9680x3c,0x02,0xb0,0x0a,0x00,0x83,0x20,0x23,0x00,0x82,0x20,0x21,0x3c,0x06,0x05,0xf5,
9690x24,0x02,0xff,0xff,0xac,0x82,0x10,0x00,0x00,0x00,0x28,0x21,0x24,0x07,0x00,0x01,
9700x34,0xc6,0xe0,0xff,0x8c,0x82,0x10,0x00,0x24,0xa5,0x00,0x01,0x10,0x47,0x00,0x03,
9710x00,0xc5,0x18,0x2b,0x10,0x60,0xff,0xfb,0x00,0x00,0x00,0x00,0x8c,0x82,0x00,0x00,
9720x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x05,0xb0,0x03,0x3c,0x02,0x80,0x00,
9730x24,0x42,0x3a,0x28,0x24,0x03,0x00,0x01,0x34,0xa5,0x00,0x20,0x3c,0x06,0xb0,0x03,
9740xac,0xa2,0x00,0x00,0x34,0xc6,0x01,0x04,0xa0,0x83,0x00,0x48,0xa0,0x80,0x00,0x04,
9750xa0,0x80,0x00,0x05,0xa0,0x80,0x00,0x06,0xa0,0x80,0x00,0x07,0xa0,0x80,0x00,0x08,
9760xa0,0x80,0x00,0x09,0xa0,0x80,0x00,0x0a,0xa0,0x80,0x00,0x11,0xa0,0x80,0x00,0x13,
9770xa0,0x80,0x00,0x49,0x94,0xc2,0x00,0x00,0xac,0x80,0x00,0x00,0xa0,0x80,0x00,0x4e,
9780x00,0x02,0x14,0x00,0x00,0x02,0x14,0x03,0x30,0x43,0x00,0xff,0x30,0x42,0xff,0x00,
9790xa4,0x82,0x00,0x44,0xa4,0x83,0x00,0x46,0xac,0x80,0x00,0x24,0xac,0x80,0x00,0x28,
9800xac,0x80,0x00,0x2c,0xac,0x80,0x00,0x30,0xac,0x80,0x00,0x34,0xac,0x80,0x00,0x38,
9810xac,0x80,0x00,0x3c,0x03,0xe0,0x00,0x08,0xac,0x80,0x00,0x40,0x84,0x83,0x00,0x0c,
9820x3c,0x07,0xb0,0x03,0x34,0xe7,0x00,0x20,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,
9830x00,0x02,0x10,0x80,0x27,0x83,0x99,0x44,0x00,0x43,0x10,0x21,0x8c,0x48,0x00,0x18,
9840x3c,0x02,0x80,0x00,0x24,0x42,0x3a,0xbc,0xac,0xe2,0x00,0x00,0x8d,0x03,0x00,0x08,
9850x80,0x82,0x00,0x13,0x00,0x05,0x2c,0x00,0x00,0x03,0x1e,0x02,0x00,0x02,0x12,0x00,
9860x30,0x63,0x00,0x7e,0x00,0x62,0x18,0x21,0x00,0x65,0x18,0x21,0x3c,0x02,0xc0,0x00,
9870x3c,0x05,0xb0,0x05,0x34,0x42,0x04,0x00,0x24,0x63,0x00,0x01,0x3c,0x07,0xb0,0x05,
9880x3c,0x08,0xb0,0x05,0x34,0xa5,0x04,0x20,0xac,0xa3,0x00,0x00,0x00,0xc2,0x30,0x21,
9890x34,0xe7,0x04,0x24,0x35,0x08,0x02,0x28,0x24,0x02,0x00,0x01,0x24,0x03,0x00,0x20,
9900xac,0xe6,0x00,0x00,0xac,0x82,0x00,0x3c,0x03,0xe0,0x00,0x08,0xa1,0x03,0x00,0x00,
9910x27,0xbd,0xff,0xa8,0x00,0x07,0x60,0x80,0x27,0x82,0xbd,0x40,0xaf,0xb7,0x00,0x4c,
9920xaf,0xb6,0x00,0x48,0xaf,0xb4,0x00,0x40,0xaf,0xb3,0x00,0x3c,0xaf,0xbf,0x00,0x54,
9930xaf,0xbe,0x00,0x50,0xaf,0xb5,0x00,0x44,0xaf,0xb2,0x00,0x38,0xaf,0xb1,0x00,0x34,
9940xaf,0xb0,0x00,0x30,0x01,0x82,0x10,0x21,0x8c,0x43,0x00,0x00,0x00,0xe0,0x70,0x21,
9950x3c,0x02,0x80,0x00,0x94,0x71,0x00,0x14,0x3c,0x07,0xb0,0x03,0x34,0xe7,0x00,0x20,
9960x24,0x42,0x3b,0x50,0x3c,0x03,0xb0,0x05,0xac,0xe2,0x00,0x00,0x34,0x63,0x01,0x28,
9970x90,0x67,0x00,0x00,0x00,0x11,0xa0,0xc0,0x02,0x91,0x18,0x21,0x27,0x82,0x99,0x44,
9980x00,0x03,0x18,0x80,0x00,0x62,0x18,0x21,0x00,0x05,0x2c,0x00,0x00,0x07,0x3e,0x00,
9990x28,0xc2,0x00,0x03,0x00,0xc0,0x98,0x21,0x00,0x80,0x78,0x21,0x00,0x05,0xb4,0x03,
10000x8c,0x68,0x00,0x18,0x02,0x80,0x58,0x21,0x10,0x40,0x01,0x79,0x00,0x07,0xbe,0x03,
10010x00,0xd7,0x10,0x07,0x30,0x57,0x00,0x01,0x01,0x71,0x10,0x21,0x27,0x83,0x99,0x48,
10020x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x80,0x4d,0x00,0x06,0x8d,0x03,0x00,0x00,
10030x8d,0x02,0x00,0x04,0x8d,0x0a,0x00,0x08,0x8d,0x03,0x00,0x0c,0xaf,0xa2,0x00,0x1c,
10040x11,0xa0,0x01,0x69,0xaf,0xa3,0x00,0x18,0x27,0x82,0xbd,0x40,0x01,0x82,0x10,0x21,
10050x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,0x90,0x83,0x00,0x16,0x00,0x00,0x00,0x00,
10060x30,0x63,0x00,0x04,0x14,0x60,0x00,0x12,0x00,0x00,0xa8,0x21,0x3c,0x02,0xb0,0x09,
10070x34,0x42,0x01,0x46,0x90,0x43,0x00,0x00,0x2a,0x64,0x00,0x04,0x10,0x80,0x01,0x4e,
10080x30,0x65,0x00,0x01,0x91,0xe2,0x00,0x09,0x00,0x00,0x00,0x00,0x12,0x62,0x00,0x02,
10090x00,0x00,0x00,0x00,0x00,0x00,0x28,0x21,0x14,0xa0,0x00,0x03,0x00,0x00,0x38,0x21,
10100x12,0xe0,0x00,0x03,0x38,0xf5,0x00,0x01,0x24,0x07,0x00,0x01,0x38,0xf5,0x00,0x01,
10110x01,0x71,0x10,0x21,0x00,0x02,0x30,0x80,0x27,0x83,0x99,0x50,0x00,0xc3,0x48,0x21,
10120x91,0x25,0x00,0x00,0x8f,0xa3,0x00,0x1c,0x00,0x00,0x00,0x00,0x00,0x03,0x11,0xc3,
10130x2c,0xa3,0x00,0x04,0x30,0x42,0x00,0x01,0x00,0x03,0xa8,0x0b,0x12,0xa0,0x00,0xd2,
10140xaf,0xa2,0x00,0x20,0x93,0x90,0xc5,0x2a,0x00,0x0a,0x16,0x42,0x30,0x52,0x00,0x3f,
10150x2e,0x06,0x00,0x0c,0x10,0xc0,0x00,0xba,0x00,0xa0,0x20,0x21,0x2c,0xa2,0x00,0x10,
10160x14,0x40,0x00,0x04,0x00,0x90,0x10,0x2b,0x30,0xa2,0x00,0x07,0x24,0x44,0x00,0x04,
10170x00,0x90,0x10,0x2b,0x10,0x40,0x00,0x0b,0x01,0x71,0x10,0x21,0x27,0x85,0xc4,0x5c,
10180x00,0x10,0x10,0x40,0x00,0x50,0x10,0x21,0x00,0x45,0x10,0x21,0x90,0x50,0x00,0x00,
10190x00,0x00,0x00,0x00,0x00,0x90,0x18,0x2b,0x14,0x60,0xff,0xfa,0x00,0x10,0x10,0x40,
10200x01,0x71,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x99,0x48,0x00,0x43,0x10,0x21,
10210x31,0xa4,0x00,0x01,0x10,0x80,0x00,0x9f,0xa0,0x50,0x00,0x07,0x3c,0x04,0xb0,0x05,
10220x34,0x84,0x00,0x08,0x24,0x02,0x00,0x01,0x3c,0x03,0x80,0x00,0xa1,0xe2,0x00,0x4e,
10230xac,0x83,0x00,0x00,0x8c,0x85,0x00,0x00,0x3c,0x02,0x00,0xf0,0x3c,0x03,0x40,0xf0,
10240x34,0x42,0xf0,0x00,0x34,0x63,0xf0,0x00,0x24,0x16,0x00,0x0e,0x24,0x11,0x01,0x06,
10250xac,0x82,0x00,0x00,0xac,0x83,0x00,0x00,0x27,0x82,0xbd,0x40,0x01,0x82,0x10,0x21,
10260x8c,0x43,0x00,0x00,0x24,0x1e,0x00,0x01,0x00,0x11,0xa0,0xc0,0x90,0x62,0x00,0x16,
10270x00,0x00,0x00,0x00,0x34,0x42,0x00,0x04,0xa0,0x62,0x00,0x16,0x8f,0xa5,0x00,0x1c,
10280x00,0x10,0x32,0x00,0x00,0x05,0x13,0x43,0x30,0x47,0x00,0x01,0x8f,0xa2,0x00,0x18,
10290x8f,0xa5,0x00,0x20,0x00,0x02,0x22,0x02,0x00,0x12,0x10,0x40,0x00,0x05,0x19,0xc0,
10300x30,0x84,0x07,0xff,0x00,0x47,0x10,0x21,0x00,0x1e,0x2a,0x80,0x00,0x43,0x10,0x21,
10310x00,0x04,0x24,0x80,0x02,0x25,0x28,0x21,0x00,0xa4,0x28,0x21,0x00,0x46,0x10,0x21,
10320x00,0x16,0x1c,0x00,0x3c,0x04,0xc0,0x00,0x00,0x43,0x30,0x21,0x16,0x60,0x00,0x29,
10330x00,0xa4,0x28,0x21,0x3c,0x02,0xb0,0x05,0x34,0x42,0x04,0x00,0x3c,0x03,0xb0,0x05,
10340x3c,0x04,0xb0,0x05,0xac,0x46,0x00,0x00,0x34,0x63,0x04,0x04,0x34,0x84,0x02,0x28,
10350x24,0x02,0x00,0x01,0xac,0x65,0x00,0x00,0xa0,0x82,0x00,0x00,0x3c,0x02,0xb0,0x09,
10360x34,0x42,0x01,0x46,0x90,0x44,0x00,0x00,0x91,0xe3,0x00,0x09,0x30,0x86,0x00,0x01,
10370x02,0x63,0x18,0x26,0x00,0x03,0x30,0x0b,0x14,0xc0,0x00,0x03,0x00,0x00,0x28,0x21,
10380x12,0xe0,0x00,0x03,0x02,0x91,0x10,0x21,0x24,0x05,0x00,0x01,0x02,0x91,0x10,0x21,
10390x27,0x83,0x99,0x48,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x84,0x48,0x00,0x04,
10400x00,0xa0,0x30,0x21,0x00,0xe0,0x20,0x21,0x02,0x60,0x28,0x21,0x02,0xa0,0x38,0x21,
10410x0c,0x00,0x00,0x70,0xaf,0xa8,0x00,0x10,0x7b,0xbe,0x02,0xbc,0x7b,0xb6,0x02,0x7c,
10420x7b,0xb4,0x02,0x3c,0x7b,0xb2,0x01,0xfc,0x7b,0xb0,0x01,0xbc,0x03,0xe0,0x00,0x08,
10430x27,0xbd,0x00,0x58,0x24,0x02,0x00,0x01,0x12,0x62,0x00,0x3d,0x3c,0x02,0xb0,0x05,
10440x24,0x02,0x00,0x02,0x12,0x62,0x00,0x31,0x3c,0x02,0xb0,0x05,0x24,0x02,0x00,0x03,
10450x12,0x62,0x00,0x25,0x3c,0x02,0xb0,0x05,0x24,0x02,0x00,0x10,0x12,0x62,0x00,0x19,
10460x3c,0x02,0xb0,0x05,0x24,0x02,0x00,0x11,0x12,0x62,0x00,0x0d,0x3c,0x02,0xb0,0x05,
10470x24,0x02,0x00,0x12,0x16,0x62,0xff,0xd1,0x3c,0x02,0xb0,0x05,0x3c,0x03,0xb0,0x05,
10480x34,0x42,0x04,0x20,0x3c,0x04,0xb0,0x05,0x34,0x63,0x04,0x24,0xac,0x46,0x00,0x00,
10490x34,0x84,0x02,0x28,0xac,0x65,0x00,0x00,0x08,0x00,0x0f,0x86,0x24,0x02,0x00,0x20,
10500x34,0x42,0x04,0x40,0x3c,0x03,0xb0,0x05,0x3c,0x04,0xb0,0x05,0xac,0x46,0x00,0x00,
10510x34,0x63,0x04,0x44,0x34,0x84,0x02,0x28,0x24,0x02,0x00,0x40,0x08,0x00,0x0f,0x86,
10520xac,0x65,0x00,0x00,0x34,0x42,0x04,0x28,0x3c,0x03,0xb0,0x05,0x3c,0x04,0xb0,0x05,
10530xac,0x46,0x00,0x00,0x34,0x63,0x04,0x2c,0x34,0x84,0x02,0x28,0x24,0x02,0xff,0x80,
10540x08,0x00,0x0f,0x86,0xac,0x65,0x00,0x00,0x34,0x42,0x04,0x18,0x3c,0x03,0xb0,0x05,
10550x3c,0x04,0xb0,0x05,0xac,0x46,0x00,0x00,0x34,0x63,0x04,0x1c,0x34,0x84,0x02,0x28,
10560x24,0x02,0x00,0x08,0x08,0x00,0x0f,0x86,0xac,0x65,0x00,0x00,0x34,0x42,0x04,0x10,
10570x3c,0x03,0xb0,0x05,0x3c,0x04,0xb0,0x05,0xac,0x46,0x00,0x00,0x34,0x63,0x04,0x14,
10580x34,0x84,0x02,0x28,0x24,0x02,0x00,0x04,0x08,0x00,0x0f,0x86,0xac,0x65,0x00,0x00,
10590x34,0x42,0x04,0x08,0x3c,0x03,0xb0,0x05,0x3c,0x04,0xb0,0x05,0xac,0x46,0x00,0x00,
10600x34,0x63,0x04,0x0c,0x34,0x84,0x02,0x28,0x24,0x02,0x00,0x02,0x08,0x00,0x0f,0x86,
10610xac,0x65,0x00,0x00,0x24,0x16,0x00,0x14,0x08,0x00,0x0f,0x5e,0x24,0x11,0x01,0x02,
10620x30,0xa2,0x00,0x07,0x24,0x44,0x00,0x0c,0x00,0x90,0x18,0x2b,0x10,0x60,0x00,0x0c,
10630x26,0x02,0x00,0x04,0x27,0x85,0xc4,0x5c,0x00,0x10,0x10,0x40,0x00,0x50,0x10,0x21,
10640x00,0x45,0x10,0x21,0x90,0x50,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x90,0x18,0x2b,
10650x14,0x60,0xff,0xfa,0x00,0x10,0x10,0x40,0x2e,0x06,0x00,0x0c,0x26,0x02,0x00,0x04,
10660x08,0x00,0x0f,0x48,0x00,0x46,0x80,0x0a,0x27,0x82,0xbd,0x40,0x01,0x82,0x20,0x21,
10670x8c,0x87,0x00,0x00,0x00,0x00,0x00,0x00,0x90,0xe2,0x00,0x19,0x00,0x00,0x00,0x00,
10680x14,0x40,0x00,0x07,0x00,0x00,0x00,0x00,0x27,0x82,0x99,0x60,0x00,0xc2,0x10,0x21,
10690x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x60,0x00,0x12,0x00,0x00,0x00,0x00,
10700x90,0xe3,0x00,0x16,0x27,0x82,0x99,0x48,0x00,0xc2,0x10,0x21,0x34,0x63,0x00,0x20,
10710x90,0x50,0x00,0x07,0xa0,0xe3,0x00,0x16,0x8c,0x84,0x00,0x00,0x00,0x0a,0x16,0x42,
10720x30,0x52,0x00,0x3f,0x90,0x83,0x00,0x16,0x24,0x16,0x00,0x18,0x24,0x11,0x01,0x03,
10730x30,0x63,0x00,0xfb,0x24,0x1e,0x00,0x01,0x24,0x14,0x08,0x18,0x08,0x00,0x0f,0x67,
10740xa0,0x83,0x00,0x16,0x8d,0x02,0x00,0x04,0x00,0x0a,0x1c,0x42,0x30,0x42,0x00,0x10,
10750x14,0x40,0x00,0x15,0x30,0x72,0x00,0x3f,0x81,0x22,0x00,0x05,0x00,0x00,0x00,0x00,
10760x14,0x40,0x00,0x11,0x30,0x72,0x00,0x3e,0x27,0x83,0x99,0x58,0x00,0xc3,0x18,0x21,
10770x80,0x64,0x00,0x00,0x27,0x83,0xbe,0xb8,0x00,0x04,0x11,0x00,0x00,0x44,0x10,0x23,
10780x00,0x02,0x10,0x80,0x00,0x44,0x10,0x23,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,
10790x90,0x44,0x00,0x05,0x90,0x43,0x00,0x04,0x00,0x00,0x00,0x00,0x00,0x64,0x18,0x24,
10800x30,0x63,0x00,0x01,0x02,0x43,0x90,0x25,0x27,0x85,0xbd,0x40,0x01,0x85,0x28,0x21,
10810x8c,0xa6,0x00,0x00,0x01,0x71,0x10,0x21,0x27,0x83,0x99,0x50,0x90,0xc4,0x00,0x16,
10820x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x30,0x84,0x00,0xdf,0x90,0x50,0x00,0x00,
10830xa0,0xc4,0x00,0x16,0x8c,0xa3,0x00,0x00,0x2d,0xc4,0x00,0x02,0x80,0xde,0x00,0x12,
10840x90,0x62,0x00,0x16,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xfb,0x14,0x80,0x00,0x06,
10850xa0,0x62,0x00,0x16,0x24,0x02,0x00,0x06,0x11,0xc2,0x00,0x03,0x24,0x02,0x00,0x04,
10860x15,0xc2,0xff,0x16,0x00,0x00,0x00,0x00,0x32,0x42,0x00,0x02,0x2e,0x03,0x00,0x0c,
10870x14,0x60,0x00,0x0f,0x00,0x02,0x20,0x2b,0x32,0x02,0x00,0x0f,0x34,0x42,0x00,0x10,
10880x00,0x04,0x19,0x00,0x00,0x43,0x18,0x21,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0xe0,
10890xa0,0x43,0x00,0x00,0x00,0x00,0x20,0x21,0x02,0x00,0x28,0x21,0x0c,0x00,0x01,0xfb,
10900xaf,0xaf,0x00,0x28,0x8f,0xaf,0x00,0x28,0x08,0x00,0x0f,0x67,0x00,0x00,0x00,0x00,
10910x08,0x00,0x10,0x5a,0x32,0x03,0x00,0xff,0x3c,0x03,0xb0,0x05,0x34,0x63,0x02,0x42,
10920x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x0f,0x14,0x40,0xfe,0xb2,
10930x00,0x00,0x00,0x00,0x91,0xe2,0x00,0x09,0x00,0x00,0x00,0x00,0x02,0x62,0x10,0x26,
10940x08,0x00,0x0f,0x1e,0x00,0x02,0x28,0x0b,0x08,0x00,0x0f,0x24,0x00,0x00,0xa8,0x21,
10950x24,0x02,0x00,0x10,0x10,0xc2,0x00,0x08,0x24,0x02,0x00,0x11,0x10,0xc2,0xfe,0x85,
10960x00,0x07,0x17,0x83,0x24,0x02,0x00,0x12,0x14,0xc2,0xfe,0x83,0x00,0x07,0x17,0x43,
10970x08,0x00,0x0e,0xfe,0x30,0x57,0x00,0x01,0x08,0x00,0x0e,0xfe,0x00,0x07,0xbf,0xc2,
10980x00,0x04,0x10,0x40,0x27,0x83,0x86,0x30,0x00,0x43,0x10,0x21,0x00,0x80,0x40,0x21,
10990x94,0x44,0x00,0x00,0x2d,0x07,0x00,0x04,0x24,0xc2,0x00,0x03,0x00,0x47,0x30,0x0a,
11000x00,0x86,0x00,0x18,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,
11010x24,0x42,0x42,0x00,0xac,0x62,0x00,0x00,0x2d,0x06,0x00,0x10,0x00,0x00,0x20,0x12,
11020x00,0x04,0x22,0x42,0x24,0x84,0x00,0x01,0x24,0x83,0x00,0xc0,0x10,0xe0,0x00,0x0b,
11030x24,0x82,0x00,0x60,0x00,0x40,0x20,0x21,0x00,0x65,0x20,0x0a,0x3c,0x03,0xb0,0x03,
11040x34,0x63,0x01,0x00,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,
11050x00,0x44,0x20,0x04,0x03,0xe0,0x00,0x08,0x00,0x80,0x10,0x21,0x24,0x85,0x00,0x28,
11060x24,0x83,0x00,0x24,0x31,0x02,0x00,0x08,0x14,0xc0,0xff,0xf4,0x24,0x84,0x00,0x14,
11070x00,0x60,0x20,0x21,0x08,0x00,0x10,0x97,0x00,0xa2,0x20,0x0b,0x27,0xbd,0xff,0xe0,
11080x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0xaf,0xb0,0x00,0x10,0x24,0x42,0x42,0x9c,
11090x00,0x80,0x80,0x21,0x34,0x63,0x00,0x20,0x3c,0x04,0xb0,0x03,0xaf,0xb2,0x00,0x18,
11100xaf,0xb1,0x00,0x14,0xaf,0xbf,0x00,0x1c,0x83,0xb1,0x00,0x33,0x83,0xa8,0x00,0x37,
11110x34,0x84,0x01,0x10,0xac,0x62,0x00,0x00,0x2e,0x02,0x00,0x10,0x00,0xe0,0x90,0x21,
11120x8c,0x87,0x00,0x00,0x14,0x40,0x00,0x0c,0x2e,0x02,0x00,0x0c,0x3c,0x02,0x00,0x0f,
11130x34,0x42,0xf0,0x00,0x00,0xe2,0x10,0x24,0x14,0x40,0x00,0x37,0x32,0x02,0x00,0x08,
11140x32,0x02,0x00,0x07,0x27,0x83,0x86,0xe0,0x00,0x43,0x10,0x21,0x90,0x50,0x00,0x00,
11150x00,0x00,0x00,0x00,0x2e,0x02,0x00,0x0c,0x14,0x40,0x00,0x03,0x02,0x00,0x20,0x21,
11160x32,0x02,0x00,0x0f,0x24,0x44,0x00,0x0c,0x00,0x87,0x10,0x06,0x30,0x42,0x00,0x01,
11170x14,0x40,0x00,0x07,0x2c,0x82,0x00,0x0c,0x00,0x04,0x10,0x80,0x27,0x83,0xbd,0x90,
11180x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,0x2c,0x82,0x00,0x0c,
11190x14,0x40,0x00,0x05,0x00,0x05,0x10,0x40,0x00,0x46,0x10,0x21,0x00,0x02,0x11,0x00,
11200x00,0x82,0x10,0x21,0x24,0x44,0x00,0x04,0x15,0x00,0x00,0x02,0x24,0x06,0x00,0x20,
11210x24,0x06,0x00,0x0e,0x0c,0x00,0x10,0x80,0x00,0x00,0x00,0x00,0x00,0x40,0x30,0x21,
11220x3c,0x02,0xb0,0x03,0x34,0x42,0x01,0x00,0x90,0x43,0x00,0x00,0x2e,0x04,0x00,0x04,
11230x24,0x02,0x00,0x10,0x24,0x05,0x00,0x0a,0x00,0x44,0x28,0x0a,0x30,0x63,0x00,0x01,
11240x14,0x60,0x00,0x02,0x00,0x05,0x10,0x40,0x00,0xa0,0x10,0x21,0x30,0x45,0x00,0xff,
11250x00,0xc5,0x10,0x21,0x24,0x46,0x00,0x46,0x02,0x26,0x18,0x04,0xa6,0x43,0x00,0x00,
11260x8f,0xbf,0x00,0x1c,0x8f,0xb2,0x00,0x18,0x7b,0xb0,0x00,0xbc,0x00,0xc0,0x10,0x21,
11270x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x10,0x40,0xff,0xcf,0x2e,0x02,0x00,0x0c,
11280x32,0x02,0x00,0x07,0x27,0x83,0x86,0xd8,0x00,0x43,0x10,0x21,0x90,0x44,0x00,0x00,
11290x08,0x00,0x10,0xc5,0x02,0x04,0x80,0x23,0x27,0xbd,0xff,0xb8,0x00,0x05,0x38,0x80,
11300x27,0x82,0xbd,0x40,0xaf,0xbe,0x00,0x40,0xaf,0xb6,0x00,0x38,0xaf,0xb3,0x00,0x2c,
11310xaf,0xbf,0x00,0x44,0xaf,0xb7,0x00,0x3c,0xaf,0xb5,0x00,0x34,0xaf,0xb4,0x00,0x30,
11320xaf,0xb2,0x00,0x28,0xaf,0xb1,0x00,0x24,0xaf,0xb0,0x00,0x20,0x00,0xe2,0x38,0x21,
11330x8c,0xe6,0x00,0x00,0xaf,0xa5,0x00,0x4c,0x3c,0x02,0x80,0x00,0x3c,0x05,0xb0,0x03,
11340x34,0xa5,0x00,0x20,0x24,0x42,0x43,0xf8,0x24,0x03,0x00,0x01,0xac,0xa2,0x00,0x00,
11350xa0,0xc3,0x00,0x12,0x8c,0xe5,0x00,0x00,0x94,0xc3,0x00,0x06,0x90,0xa2,0x00,0x16,
11360xa4,0xc3,0x00,0x14,0x27,0x83,0x99,0x40,0x34,0x42,0x00,0x08,0xa0,0xa2,0x00,0x16,
11370x8c,0xe8,0x00,0x00,0xaf,0xa4,0x00,0x48,0x27,0x82,0x99,0x44,0x95,0x11,0x00,0x14,
11380x00,0x00,0x00,0x00,0x00,0x11,0x98,0xc0,0x02,0x71,0x20,0x21,0x00,0x04,0x20,0x80,
11390x00,0x82,0x10,0x21,0x8c,0x52,0x00,0x18,0x00,0x83,0x18,0x21,0x84,0x75,0x00,0x06,
11400x8e,0x45,0x00,0x08,0x8e,0x46,0x00,0x04,0x8e,0x47,0x00,0x04,0x00,0x05,0x1c,0x82,
11410x00,0x06,0x31,0x42,0x27,0x82,0x99,0x50,0x30,0x63,0x00,0x01,0x30,0xc6,0x00,0x01,
11420x00,0x82,0x20,0x21,0xa5,0x15,0x00,0x1a,0x00,0x05,0x14,0x42,0xaf,0xa3,0x00,0x18,
11430xaf,0xa6,0x00,0x1c,0x30,0xe7,0x00,0x10,0x30,0x56,0x00,0x01,0x80,0x97,0x00,0x06,
11440x14,0xe0,0x00,0x47,0x00,0x05,0xf7,0xc2,0x80,0x82,0x00,0x05,0x00,0x00,0x00,0x00,
11450x14,0x40,0x00,0x44,0x02,0x71,0x10,0x21,0x93,0x90,0xc5,0x29,0x00,0x00,0x00,0x00,
11460x2e,0x02,0x00,0x0c,0x14,0x40,0x00,0x06,0x02,0x00,0x20,0x21,0x00,0x16,0x10,0x40,
11470x00,0x43,0x10,0x21,0x00,0x02,0x11,0x00,0x02,0x02,0x10,0x21,0x24,0x44,0x00,0x04,
11480x02,0x71,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x99,0x50,0x00,0x43,0x10,0x21,
11490x00,0x80,0x80,0x21,0xa0,0x44,0x00,0x03,0xa0,0x44,0x00,0x00,0x02,0x00,0x20,0x21,
11500x02,0xc0,0x28,0x21,0x0c,0x00,0x10,0x80,0x02,0xa0,0x30,0x21,0x02,0x71,0x18,0x21,
11510x00,0x03,0x88,0x80,0x00,0x40,0xa0,0x21,0x27,0x82,0x99,0x60,0x02,0x22,0x10,0x21,
11520x8c,0x44,0x00,0x00,0x26,0xe3,0x00,0x02,0x00,0x03,0x17,0xc2,0x00,0x62,0x18,0x21,
11530x00,0x04,0x25,0xc2,0x00,0x03,0x18,0x43,0x30,0x84,0x00,0x01,0x00,0x03,0x18,0x40,
11540x03,0xc4,0x20,0x24,0x14,0x80,0x00,0x15,0x02,0x43,0x38,0x21,0x3c,0x08,0xb0,0x03,
11550x35,0x08,0x00,0x28,0x8d,0x03,0x00,0x00,0x8f,0xa6,0x00,0x4c,0x8f,0xa4,0x00,0x48,
11560x27,0x82,0x99,0x48,0x02,0x22,0x10,0x21,0x24,0x63,0x00,0x01,0x02,0xa0,0x28,0x21,
11570xa4,0x54,0x00,0x04,0x00,0xc0,0x38,0x21,0x0c,0x00,0x0e,0xd4,0xad,0x03,0x00,0x00,
11580x7b,0xbe,0x02,0x3c,0x7b,0xb6,0x01,0xfc,0x7b,0xb4,0x01,0xbc,0x7b,0xb2,0x01,0x7c,
11590x7b,0xb0,0x01,0x3c,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x48,0x8f,0xa2,0x00,0x1c,
11600x8f,0xa6,0x00,0x18,0x02,0x00,0x20,0x21,0x02,0xc0,0x28,0x21,0xaf,0xa2,0x00,0x10,
11610x0c,0x00,0x10,0xa7,0xaf,0xa0,0x00,0x14,0x08,0x00,0x11,0x63,0x02,0x82,0xa0,0x21,
11620x02,0x71,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x99,0x50,0x00,0x43,0x10,0x21,
11630x90,0x50,0x00,0x00,0x08,0x00,0x11,0x4f,0xa0,0x50,0x00,0x03,0x27,0xbd,0xff,0xb8,
11640xaf,0xb1,0x00,0x24,0x8f,0xb1,0x00,0x5c,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,
11650x34,0x63,0x00,0x20,0x24,0x42,0x46,0x1c,0xaf,0xbe,0x00,0x40,0xaf,0xb7,0x00,0x3c,
11660xaf,0xb6,0x00,0x38,0xaf,0xb5,0x00,0x34,0xaf,0xb4,0x00,0x30,0xaf,0xa5,0x00,0x4c,
11670x8f,0xb5,0x00,0x58,0xaf,0xbf,0x00,0x44,0xaf,0xb3,0x00,0x2c,0xaf,0xb2,0x00,0x28,
11680xaf,0xb0,0x00,0x20,0x00,0xe0,0xb0,0x21,0xac,0x62,0x00,0x00,0x00,0x80,0xf0,0x21,
11690x00,0x00,0xb8,0x21,0x16,0x20,0x00,0x2b,0x00,0x00,0xa0,0x21,0x27,0x85,0xbd,0x40,
11700x00,0x07,0x10,0x80,0x00,0x45,0x10,0x21,0x8c,0x53,0x00,0x00,0x00,0x15,0x18,0x80,
11710x00,0x65,0x18,0x21,0x92,0x62,0x00,0x16,0x8c,0x72,0x00,0x00,0x30,0x42,0x00,0x03,
11720x14,0x40,0x00,0x2d,0x00,0x00,0x00,0x00,0x92,0x42,0x00,0x16,0x00,0x00,0x00,0x00,
11730x30,0x42,0x00,0x03,0x14,0x40,0x00,0x28,0x00,0x00,0x00,0x00,0x8c,0x82,0x00,0x34,
11740x00,0x00,0x00,0x00,0x14,0x40,0x00,0x18,0x02,0x20,0x10,0x21,0x8c,0x82,0x00,0x38,
11750x00,0x00,0x00,0x00,0x14,0x40,0x00,0x14,0x02,0x20,0x10,0x21,0x8c,0x82,0x00,0x3c,
11760x00,0x00,0x00,0x00,0x14,0x40,0x00,0x0f,0x3c,0x03,0xb0,0x09,0x3c,0x05,0xb0,0x05,
11770x34,0x63,0x01,0x44,0x34,0xa5,0x02,0x52,0x94,0x66,0x00,0x00,0x90,0xa2,0x00,0x00,
11780x8f,0xa3,0x00,0x4c,0x00,0x00,0x00,0x00,0x00,0x62,0x10,0x06,0x30,0x42,0x00,0x01,
11790x10,0x40,0x00,0x04,0x30,0xc6,0xff,0xff,0x2c,0xc2,0x00,0x41,0x10,0x40,0x00,0x09,
11800x24,0x05,0x00,0x14,0x02,0x20,0x10,0x21,0x7b,0xbe,0x02,0x3c,0x7b,0xb6,0x01,0xfc,
11810x7b,0xb4,0x01,0xbc,0x7b,0xb2,0x01,0x7c,0x7b,0xb0,0x01,0x3c,0x03,0xe0,0x00,0x08,
11820x27,0xbd,0x00,0x48,0x0c,0x00,0x0e,0xaf,0x24,0x06,0x01,0x07,0x24,0x02,0x00,0x01,
11830x08,0x00,0x11,0xc9,0xa3,0xc2,0x00,0x11,0x10,0xc0,0x00,0x1c,0x24,0x02,0x00,0x01,
11840x10,0xc2,0x00,0x17,0x00,0xc0,0x88,0x21,0x96,0x54,0x00,0x1a,0x02,0xa0,0xb8,0x21,
11850x12,0x20,0xff,0xed,0x02,0x20,0x10,0x21,0x27,0x83,0xbd,0x40,0x00,0x17,0x10,0x80,
11860x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x28,
11870x80,0x86,0x00,0x12,0x8c,0x62,0x00,0x00,0x00,0x14,0x2c,0x00,0x00,0x05,0x2c,0x03,
11880x00,0x46,0x10,0x21,0x8f,0xa6,0x00,0x4c,0x02,0xe0,0x38,0x21,0x03,0xc0,0x20,0x21,
11890x0c,0x00,0x0e,0xd4,0xac,0x62,0x00,0x00,0x08,0x00,0x11,0xc9,0xaf,0xd1,0x00,0x40,
11900x96,0x74,0x00,0x1a,0x08,0x00,0x11,0xdc,0x02,0xc0,0xb8,0x21,0x3c,0x02,0xb0,0x03,
11910x34,0x42,0x01,0x08,0x8c,0x50,0x00,0x00,0x02,0x60,0x20,0x21,0x0c,0x00,0x26,0xb7,
11920x02,0x00,0x28,0x21,0x30,0x42,0x00,0xff,0x02,0x00,0x28,0x21,0x02,0x40,0x20,0x21,
11930x0c,0x00,0x26,0xb7,0xaf,0xa2,0x00,0x18,0x8f,0xa4,0x00,0x18,0x00,0x00,0x00,0x00,
11940x10,0x80,0x00,0xed,0x30,0x50,0x00,0xff,0x12,0x00,0x00,0x18,0x24,0x11,0x00,0x01,
11950x96,0x63,0x00,0x14,0x96,0x44,0x00,0x14,0x27,0x85,0x99,0x40,0x00,0x03,0x10,0xc0,
11960x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x45,0x10,0x21,0x00,0x04,0x18,0xc0,
11970x8c,0x46,0x00,0x08,0x00,0x64,0x18,0x21,0x00,0x03,0x18,0x80,0x00,0x65,0x18,0x21,
11980x00,0x06,0x17,0x02,0x24,0x04,0x00,0xff,0x8c,0x63,0x00,0x08,0x10,0x44,0x00,0xd6,
11990x00,0x03,0x17,0x02,0x10,0x44,0x00,0xd5,0x3c,0x02,0x80,0x00,0x00,0x66,0x18,0x2b,
12000x24,0x11,0x00,0x02,0x24,0x02,0x00,0x01,0x00,0x43,0x88,0x0a,0x24,0x02,0x00,0x01,
12010x12,0x22,0x00,0x5a,0x24,0x02,0x00,0x02,0x16,0x22,0xff,0xbd,0x00,0x00,0x00,0x00,
12020x96,0x49,0x00,0x14,0x27,0x82,0x99,0x44,0x02,0xa0,0xb8,0x21,0x00,0x09,0x50,0xc0,
12030x01,0x49,0x18,0x21,0x00,0x03,0x40,0x80,0x01,0x02,0x10,0x21,0x8c,0x43,0x00,0x18,
12040x00,0x00,0x00,0x00,0x8c,0x65,0x00,0x08,0x8c,0x62,0x00,0x0c,0x8c,0x62,0x00,0x04,
12050x00,0x05,0x24,0x42,0x00,0x05,0x1c,0x82,0x30,0x42,0x00,0x10,0x30,0x66,0x00,0x01,
12060x14,0x40,0x00,0x41,0x30,0x87,0x00,0x01,0x27,0x82,0x99,0x58,0x01,0x02,0x10,0x21,
12070x80,0x44,0x00,0x00,0x27,0x82,0xbe,0xb8,0x00,0x04,0x19,0x00,0x00,0x64,0x18,0x23,
12080x00,0x03,0x18,0x80,0x00,0x64,0x18,0x23,0x00,0x03,0x18,0x80,0x00,0x62,0x10,0x21,
12090x90,0x45,0x00,0x05,0x27,0x84,0xbd,0xe0,0x00,0x64,0x18,0x21,0x90,0x63,0x00,0x00,
12100x10,0xa0,0x00,0x2b,0x2c,0x64,0x00,0x0c,0x14,0x80,0x00,0x04,0x00,0x60,0x10,0x21,
12110x00,0x06,0x11,0x00,0x00,0x62,0x10,0x21,0x24,0x42,0x00,0x24,0x3c,0x01,0xb0,0x03,
12120xa0,0x22,0x00,0xe1,0x14,0x80,0x00,0x06,0x00,0x60,0x28,0x21,0x00,0x07,0x10,0x40,
12130x00,0x46,0x10,0x21,0x00,0x02,0x11,0x00,0x00,0x62,0x10,0x21,0x24,0x45,0x00,0x04,
12140x01,0x49,0x10,0x21,0x27,0x83,0x99,0x50,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,
12150x00,0xa0,0x18,0x21,0xa0,0x45,0x00,0x03,0xa0,0x45,0x00,0x00,0x24,0x02,0x00,0x08,
12160x12,0x02,0x00,0x0b,0x24,0x02,0x00,0x01,0x00,0x60,0x28,0x21,0x02,0x40,0x20,0x21,
12170x0c,0x00,0x27,0x33,0xaf,0xa2,0x00,0x10,0x30,0x54,0xff,0xff,0x92,0x42,0x00,0x16,
12180x00,0x00,0x00,0x00,0x02,0x02,0x10,0x25,0x08,0x00,0x11,0xdc,0xa2,0x42,0x00,0x16,
12190x00,0x60,0x28,0x21,0x02,0x40,0x20,0x21,0x0c,0x00,0x26,0xe4,0xaf,0xa0,0x00,0x10,
12200x08,0x00,0x12,0x5f,0x30,0x54,0xff,0xff,0x08,0x00,0x12,0x47,0x00,0x60,0x10,0x21,
12210x14,0x80,0xff,0xfd,0x00,0x00,0x00,0x00,0x00,0x06,0x11,0x00,0x00,0x62,0x10,0x21,
12220x08,0x00,0x12,0x47,0x24,0x42,0x00,0x04,0x27,0x82,0x99,0x50,0x01,0x02,0x10,0x21,
12230x90,0x43,0x00,0x00,0x08,0x00,0x12,0x57,0xa0,0x43,0x00,0x03,0x96,0x69,0x00,0x14,
12240x02,0xc0,0xb8,0x21,0x24,0x0b,0x00,0x01,0x00,0x09,0x10,0xc0,0x00,0x49,0x18,0x21,
12250x00,0x03,0x40,0x80,0x00,0x40,0x50,0x21,0x27,0x82,0x99,0x44,0x01,0x02,0x10,0x21,
12260x8c,0x43,0x00,0x18,0x00,0x00,0x00,0x00,0x8c,0x65,0x00,0x08,0x8c,0x62,0x00,0x0c,
12270x8c,0x62,0x00,0x04,0x00,0x05,0x24,0x42,0x00,0x05,0x1c,0x82,0x30,0x42,0x00,0x10,
12280x30,0x66,0x00,0x01,0x10,0x40,0x00,0x0d,0x30,0x87,0x00,0x01,0x27,0x82,0x99,0x58,
12290x01,0x02,0x10,0x21,0x80,0x43,0x00,0x00,0x00,0x00,0x58,0x21,0x00,0x03,0x11,0x00,
12300x00,0x43,0x10,0x23,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x23,0x00,0x02,0x10,0x80,
12310x27,0x83,0xbe,0xb0,0x00,0x43,0x10,0x21,0xa0,0x40,0x00,0x04,0x11,0x60,0x00,0x4f,
12320x00,0x00,0x00,0x00,0x01,0x49,0x10,0x21,0x00,0x02,0x20,0x80,0x27,0x85,0x99,0x50,
12330x00,0x85,0x10,0x21,0x80,0x43,0x00,0x05,0x00,0x00,0x00,0x00,0x14,0x60,0x00,0x42,
12340x01,0x49,0x10,0x21,0x27,0x82,0x99,0x58,0x00,0x82,0x10,0x21,0x80,0x44,0x00,0x00,
12350x27,0x82,0xbe,0xb8,0x00,0x04,0x19,0x00,0x00,0x64,0x18,0x23,0x00,0x03,0x18,0x80,
12360x00,0x64,0x18,0x23,0x00,0x03,0x18,0x80,0x00,0x62,0x10,0x21,0x90,0x45,0x00,0x05,
12370x27,0x84,0xbd,0xe0,0x00,0x64,0x18,0x21,0x90,0x63,0x00,0x00,0x10,0xa0,0x00,0x2c,
12380x2c,0x64,0x00,0x0c,0x14,0x80,0x00,0x04,0x00,0x60,0x10,0x21,0x00,0x06,0x11,0x00,
12390x00,0x62,0x10,0x21,0x24,0x42,0x00,0x24,0x3c,0x01,0xb0,0x03,0xa0,0x22,0x00,0xe1,
12400x14,0x80,0x00,0x06,0x00,0x60,0x28,0x21,0x00,0x07,0x10,0x40,0x00,0x46,0x10,0x21,
12410x00,0x02,0x11,0x00,0x00,0x62,0x10,0x21,0x24,0x45,0x00,0x04,0x01,0x49,0x10,0x21,
12420x27,0x83,0x99,0x50,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x00,0xa0,0x18,0x21,
12430xa0,0x45,0x00,0x03,0xa0,0x45,0x00,0x00,0x8f,0xa4,0x00,0x18,0x24,0x02,0x00,0x08,
12440x10,0x82,0x00,0x0c,0x00,0x60,0x28,0x21,0x24,0x02,0x00,0x01,0x02,0x60,0x20,0x21,
12450x0c,0x00,0x27,0x33,0xaf,0xa2,0x00,0x10,0x8f,0xa3,0x00,0x18,0x30,0x54,0xff,0xff,
12460x92,0x62,0x00,0x16,0x00,0x00,0x00,0x00,0x00,0x62,0x10,0x25,0x08,0x00,0x11,0xdc,
12470xa2,0x62,0x00,0x16,0x02,0x60,0x20,0x21,0x0c,0x00,0x26,0xe4,0xaf,0xa0,0x00,0x10,
12480x08,0x00,0x12,0xce,0x00,0x00,0x00,0x00,0x08,0x00,0x12,0xb6,0x00,0x60,0x10,0x21,
12490x14,0x80,0xff,0xfd,0x00,0x00,0x00,0x00,0x00,0x06,0x11,0x00,0x00,0x62,0x10,0x21,
12500x08,0x00,0x12,0xb6,0x24,0x42,0x00,0x04,0x00,0x02,0x10,0x80,0x00,0x45,0x10,0x21,
12510x90,0x43,0x00,0x00,0x08,0x00,0x12,0xc6,0xa0,0x43,0x00,0x03,0x27,0x85,0x99,0x50,
12520x08,0x00,0x12,0xe2,0x01,0x49,0x10,0x21,0x3c,0x02,0x80,0x00,0x00,0x62,0x18,0x26,
12530x08,0x00,0x12,0x17,0x00,0xc2,0x30,0x26,0x12,0x00,0xff,0x2d,0x24,0x02,0x00,0x01,
12540x08,0x00,0x12,0x1c,0x24,0x11,0x00,0x02,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,
12550x27,0xbd,0xff,0xd0,0x24,0x42,0x4b,0xc8,0x34,0x63,0x00,0x20,0x3c,0x05,0xb0,0x05,
12560xaf,0xb3,0x00,0x24,0xaf,0xb2,0x00,0x20,0xaf,0xb1,0x00,0x1c,0xaf,0xbf,0x00,0x28,
12570xaf,0xb0,0x00,0x18,0xac,0x62,0x00,0x00,0x34,0xa5,0x02,0x42,0x90,0xa2,0x00,0x00,
12580x00,0x80,0x90,0x21,0x24,0x11,0x00,0x10,0x30,0x53,0x00,0xff,0x24,0x02,0x00,0x10,
12590x12,0x22,0x00,0xcf,0x00,0x00,0x18,0x21,0x24,0x02,0x00,0x11,0x12,0x22,0x00,0xc1,
12600x24,0x02,0x00,0x12,0x12,0x22,0x00,0xb4,0x00,0x00,0x00,0x00,0x14,0x60,0x00,0xad,
12610xae,0x43,0x00,0x40,0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x2c,0x8c,0x44,0x00,0x00,
12620x3c,0x03,0x00,0x02,0x34,0x63,0x00,0xff,0x00,0x83,0x80,0x24,0x00,0x10,0x14,0x43,
12630x10,0x40,0x00,0x05,0x00,0x00,0x00,0x00,0x8e,0x42,0x00,0x34,0x00,0x00,0x00,0x00,
12640x14,0x40,0x00,0x92,0x00,0x00,0x00,0x00,0x93,0x83,0x94,0x51,0x00,0x00,0x00,0x00,
12650x30,0x62,0x00,0x02,0x10,0x40,0x00,0x04,0x32,0x10,0x00,0xff,0x00,0x10,0x11,0xc3,
12660x14,0x40,0x00,0x86,0x00,0x00,0x00,0x00,0x16,0x00,0x00,0x15,0x02,0x00,0x10,0x21,
12670x26,0x22,0x00,0x01,0x30,0x51,0x00,0xff,0x2e,0x23,0x00,0x13,0x14,0x60,0xff,0xdb,
12680x24,0x03,0x00,0x02,0x12,0x63,0x00,0x73,0x24,0x02,0x00,0x05,0x2a,0x62,0x00,0x03,
12690x10,0x40,0x00,0x58,0x24,0x02,0x00,0x04,0x24,0x02,0x00,0x01,0x12,0x62,0x00,0x4b,
12700x02,0x40,0x20,0x21,0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x2c,0x8c,0x43,0x00,0x00,
12710x00,0x00,0x00,0x00,0x30,0x70,0x00,0xff,0x12,0x00,0x00,0x06,0x02,0x00,0x10,0x21,
12720x8f,0xbf,0x00,0x28,0x7b,0xb2,0x01,0x3c,0x7b,0xb0,0x00,0xfc,0x03,0xe0,0x00,0x08,
12730x27,0xbd,0x00,0x30,0x92,0x46,0x00,0x04,0x8e,0x43,0x00,0x24,0x24,0x02,0x00,0x07,
12740x02,0x40,0x20,0x21,0x00,0x00,0x28,0x21,0x24,0x07,0x00,0x06,0xaf,0xa2,0x00,0x10,
12750x0c,0x00,0x11,0x87,0xaf,0xa3,0x00,0x14,0xae,0x42,0x00,0x24,0x3c,0x02,0xb0,0x05,
12760x8c,0x42,0x02,0x2c,0x00,0x00,0x00,0x00,0x30,0x50,0x00,0xff,0x16,0x00,0xff,0xec,
12770x02,0x00,0x10,0x21,0x92,0x46,0x00,0x05,0x8e,0x43,0x00,0x28,0x24,0x02,0x00,0x05,
12780x02,0x40,0x20,0x21,0x24,0x05,0x00,0x01,0x24,0x07,0x00,0x04,0xaf,0xa2,0x00,0x10,
12790x0c,0x00,0x11,0x87,0xaf,0xa3,0x00,0x14,0xae,0x42,0x00,0x28,0x3c,0x02,0xb0,0x05,
12800x8c,0x42,0x02,0x2c,0x00,0x00,0x00,0x00,0x30,0x50,0x00,0xff,0x16,0x00,0xff,0xdc,
12810x02,0x00,0x10,0x21,0x92,0x46,0x00,0x06,0x8e,0x43,0x00,0x2c,0x24,0x02,0x00,0x03,
12820x02,0x40,0x20,0x21,0x24,0x05,0x00,0x02,0x00,0x00,0x38,0x21,0xaf,0xa2,0x00,0x10,
12830x0c,0x00,0x11,0x87,0xaf,0xa3,0x00,0x14,0xae,0x42,0x00,0x2c,0x3c,0x02,0xb0,0x05,
12840x8c,0x42,0x02,0x2c,0x00,0x00,0x00,0x00,0x30,0x50,0x00,0xff,0x16,0x00,0xff,0xcc,
12850x02,0x00,0x10,0x21,0x92,0x46,0x00,0x07,0x8e,0x43,0x00,0x30,0x24,0x02,0x00,0x02,
12860x02,0x40,0x20,0x21,0x24,0x05,0x00,0x03,0x24,0x07,0x00,0x01,0xaf,0xa2,0x00,0x10,
12870x0c,0x00,0x11,0x87,0xaf,0xa3,0x00,0x14,0xae,0x42,0x00,0x30,0x3c,0x02,0xb0,0x05,
12880x8c,0x42,0x02,0x2c,0x08,0x00,0x13,0x38,0x30,0x42,0x00,0xff,0x92,0x46,0x00,0x04,
12890x8e,0x43,0x00,0x24,0x24,0x02,0x00,0x07,0x00,0x00,0x28,0x21,0x24,0x07,0x00,0x06,
12900xaf,0xa2,0x00,0x10,0x0c,0x00,0x11,0x87,0xaf,0xa3,0x00,0x14,0x08,0x00,0x13,0x31,
12910xae,0x42,0x00,0x24,0x12,0x62,0x00,0x0d,0x24,0x02,0x00,0x03,0x24,0x02,0x00,0x08,
12920x16,0x62,0xff,0xa8,0x02,0x40,0x20,0x21,0x92,0x46,0x00,0x07,0x8e,0x42,0x00,0x30,
12930x24,0x05,0x00,0x03,0x24,0x07,0x00,0x01,0xaf,0xa3,0x00,0x10,0x0c,0x00,0x11,0x87,
12940xaf,0xa2,0x00,0x14,0x08,0x00,0x13,0x31,0xae,0x42,0x00,0x30,0x92,0x46,0x00,0x06,
12950x8e,0x43,0x00,0x2c,0x02,0x40,0x20,0x21,0x24,0x05,0x00,0x02,0x00,0x00,0x38,0x21,
12960xaf,0xa2,0x00,0x10,0x0c,0x00,0x11,0x87,0xaf,0xa3,0x00,0x14,0x08,0x00,0x13,0x31,
12970xae,0x42,0x00,0x2c,0x92,0x46,0x00,0x05,0x8e,0x43,0x00,0x28,0x02,0x40,0x20,0x21,
12980x24,0x05,0x00,0x01,0x24,0x07,0x00,0x04,0xaf,0xa2,0x00,0x10,0x0c,0x00,0x11,0x87,
12990xaf,0xa3,0x00,0x14,0x08,0x00,0x13,0x31,0xae,0x42,0x00,0x28,0x0c,0x00,0x01,0x57,
13000x24,0x04,0x00,0x01,0x08,0x00,0x13,0x22,0x00,0x00,0x00,0x00,0x8f,0x84,0xbd,0x80,
13010xae,0x40,0x00,0x34,0x94,0x85,0x00,0x14,0x0c,0x00,0x23,0x34,0x00,0x00,0x00,0x00,
13020x93,0x83,0x94,0x51,0x00,0x00,0x00,0x00,0x30,0x62,0x00,0x02,0x10,0x40,0xff,0x69,
13030x00,0x00,0x00,0x00,0x0c,0x00,0x01,0x57,0x00,0x00,0x20,0x21,0x08,0x00,0x13,0x1a,
13040x00,0x00,0x00,0x00,0x02,0x40,0x20,0x21,0x0c,0x00,0x10,0xfe,0x02,0x20,0x28,0x21,
13050x08,0x00,0x13,0x0e,0x3c,0x02,0xb0,0x05,0x8e,0x42,0x00,0x3c,0x00,0x00,0x00,0x00,
13060x14,0x40,0xff,0x4a,0x00,0x00,0x00,0x00,0x8f,0x82,0xbd,0x88,0x00,0x00,0x00,0x00,
13070x90,0x42,0x00,0x0a,0x00,0x00,0x00,0x00,0x00,0x02,0x18,0x2b,0x08,0x00,0x13,0x0b,
13080xae,0x43,0x00,0x3c,0x8e,0x42,0x00,0x38,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0x3d,
13090x24,0x02,0x00,0x12,0x8f,0x82,0xbd,0x84,0x00,0x00,0x00,0x00,0x90,0x42,0x00,0x0a,
13100x00,0x00,0x00,0x00,0x00,0x02,0x18,0x2b,0x08,0x00,0x13,0x0b,0xae,0x43,0x00,0x38,
13110x8e,0x42,0x00,0x34,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0x30,0x24,0x02,0x00,0x11,
13120x8f,0x82,0xbd,0x80,0x00,0x00,0x00,0x00,0x90,0x42,0x00,0x0a,0x00,0x00,0x00,0x00,
13130x00,0x02,0x18,0x2b,0x08,0x00,0x13,0x0b,0xae,0x43,0x00,0x34,0x3c,0x03,0xb0,0x03,
13140x3c,0x02,0x80,0x00,0x27,0xbd,0xff,0xe0,0x34,0x63,0x00,0x20,0x24,0x42,0x4f,0x7c,
13150x3c,0x08,0xb0,0x03,0xaf,0xb1,0x00,0x14,0xac,0x62,0x00,0x00,0x35,0x08,0x01,0x00,
13160xaf,0xbf,0x00,0x18,0xaf,0xb0,0x00,0x10,0x91,0x03,0x00,0x00,0x00,0xa0,0x48,0x21,
13170x24,0x11,0x00,0x0a,0x2c,0xa5,0x00,0x04,0x24,0x02,0x00,0x10,0x00,0x45,0x88,0x0a,
13180x30,0x63,0x00,0x01,0x00,0xc0,0x28,0x21,0x14,0x60,0x00,0x02,0x00,0x11,0x40,0x40,
13190x02,0x20,0x40,0x21,0x84,0x83,0x00,0x0c,0x31,0x11,0x00,0xff,0x01,0x20,0x20,0x21,
13200x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x99,0x48,
13210x00,0x43,0x10,0x21,0x84,0x43,0x00,0x04,0x24,0x06,0x00,0x0e,0x10,0xe0,0x00,0x06,
13220x02,0x23,0x80,0x21,0x02,0x00,0x10,0x21,0x8f,0xbf,0x00,0x18,0x7b,0xb0,0x00,0xbc,
13230x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x0c,0x00,0x10,0x80,0x00,0x00,0x00,0x00,
13240x02,0x11,0x18,0x21,0x08,0x00,0x14,0x01,0x00,0x62,0x80,0x21,0x27,0xbd,0xff,0xd0,
13250xaf,0xbf,0x00,0x28,0xaf,0xb4,0x00,0x20,0xaf,0xb3,0x00,0x1c,0xaf,0xb2,0x00,0x18,
13260xaf,0xb5,0x00,0x24,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0x84,0x82,0x00,0x0c,
13270x3c,0x06,0xb0,0x03,0x34,0xc6,0x00,0x20,0x00,0x02,0x18,0xc0,0x00,0x62,0x18,0x21,
13280x00,0x03,0x18,0x80,0x27,0x82,0x99,0x44,0x00,0x62,0x10,0x21,0x8c,0x55,0x00,0x18,
13290x3c,0x02,0x80,0x00,0x24,0x42,0x50,0x2c,0xac,0xc2,0x00,0x00,0x8e,0xb0,0x00,0x08,
13300x27,0x82,0x99,0x48,0x00,0x62,0x18,0x21,0x90,0x71,0x00,0x07,0x00,0x10,0x86,0x43,
13310x32,0x10,0x00,0x01,0x00,0xa0,0x38,0x21,0x02,0x00,0x30,0x21,0x00,0xa0,0x98,0x21,
13320x02,0x20,0x28,0x21,0x0c,0x00,0x13,0xdf,0x00,0x80,0x90,0x21,0x02,0x20,0x20,0x21,
13330x02,0x00,0x28,0x21,0x24,0x06,0x00,0x14,0x0c,0x00,0x10,0x80,0x00,0x40,0xa0,0x21,
13340x86,0x43,0x00,0x0c,0x3c,0x09,0xb0,0x09,0x3c,0x08,0xb0,0x09,0x00,0x03,0x10,0xc0,
13350x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x99,0x50,0x00,0x43,0x10,0x21,
13360x80,0x43,0x00,0x06,0x3c,0x07,0xb0,0x09,0x3c,0x05,0xb0,0x09,0x28,0x62,0x00,0x00,
13370x24,0x64,0x00,0x03,0x00,0x82,0x18,0x0b,0x00,0x03,0x18,0x83,0x3c,0x02,0xb0,0x09,
13380x00,0x03,0x18,0x80,0x34,0x42,0x01,0x02,0x35,0x29,0x01,0x10,0x35,0x08,0x01,0x14,
13390x34,0xe7,0x01,0x20,0x34,0xa5,0x01,0x24,0xa4,0x54,0x00,0x00,0x12,0x60,0x00,0x11,
13400x02,0xa3,0xa8,0x21,0x8e,0xa2,0x00,0x0c,0x8e,0xa3,0x00,0x08,0x00,0x02,0x14,0x00,
13410x00,0x03,0x1c,0x02,0x00,0x43,0x10,0x21,0xad,0x22,0x00,0x00,0x8e,0xa3,0x00,0x0c,
13420x00,0x00,0x00,0x00,0x00,0x03,0x1c,0x02,0xa5,0x03,0x00,0x00,0x8f,0xbf,0x00,0x28,
13430x7b,0xb4,0x01,0x3c,0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,
13440x27,0xbd,0x00,0x30,0x8e,0xa2,0x00,0x04,0x00,0x00,0x00,0x00,0xad,0x22,0x00,0x00,
13450x8e,0xa4,0x00,0x08,0x00,0x00,0x00,0x00,0xa5,0x04,0x00,0x00,0x7a,0xa2,0x00,0x7c,
13460x00,0x00,0x00,0x00,0x00,0x03,0x1c,0x00,0x00,0x02,0x14,0x02,0x00,0x62,0x18,0x21,
13470xac,0xe3,0x00,0x00,0x8e,0xa2,0x00,0x0c,0x00,0x00,0x00,0x00,0x00,0x02,0x14,0x02,
13480x08,0x00,0x14,0x53,0xa4,0xa2,0x00,0x00,0x27,0xbd,0xff,0xe0,0xaf,0xb2,0x00,0x18,
13490xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x1c,0xaf,0xb1,0x00,0x14,0x84,0x82,0x00,0x0c,
13500x00,0x80,0x90,0x21,0x3c,0x05,0xb0,0x03,0x00,0x02,0x20,0xc0,0x00,0x82,0x20,0x21,
13510x00,0x04,0x20,0x80,0x27,0x82,0x99,0x44,0x00,0x82,0x10,0x21,0x8c,0x51,0x00,0x18,
13520x3c,0x02,0x80,0x00,0x34,0xa5,0x00,0x20,0x24,0x42,0x51,0xa8,0x27,0x83,0x99,0x48,
13530xac,0xa2,0x00,0x00,0x00,0x83,0x20,0x21,0x3c,0x02,0xb0,0x03,0x90,0x86,0x00,0x07,
13540x34,0x42,0x01,0x00,0x8e,0x23,0x00,0x08,0x90,0x44,0x00,0x00,0x2c,0xc5,0x00,0x04,
13550x24,0x02,0x00,0x10,0x24,0x10,0x00,0x0a,0x00,0x45,0x80,0x0a,0x00,0x03,0x1e,0x43,
13560x30,0x84,0x00,0x01,0x30,0x65,0x00,0x01,0x14,0x80,0x00,0x02,0x00,0x10,0x10,0x40,
13570x02,0x00,0x10,0x21,0x00,0xc0,0x20,0x21,0x24,0x06,0x00,0x20,0x0c,0x00,0x10,0x80,
13580x30,0x50,0x00,0xff,0x86,0x44,0x00,0x0c,0x27,0x85,0x99,0x50,0x3c,0x06,0xb0,0x09,
13590x00,0x04,0x18,0xc0,0x00,0x64,0x18,0x21,0x00,0x03,0x18,0x80,0x00,0x65,0x18,0x21,
13600x80,0x64,0x00,0x06,0x00,0x50,0x10,0x21,0x34,0xc6,0x01,0x02,0x24,0x85,0x00,0x03,
13610x28,0x83,0x00,0x00,0x00,0xa3,0x20,0x0b,0x00,0x04,0x20,0x83,0x00,0x04,0x20,0x80,
13620xa4,0xc2,0x00,0x00,0x02,0x24,0x20,0x21,0x8c,0x83,0x00,0x04,0x3c,0x02,0xb0,0x09,
13630x34,0x42,0x01,0x10,0xac,0x43,0x00,0x00,0x8c,0x86,0x00,0x08,0x3c,0x02,0xb0,0x09,
13640x34,0x42,0x01,0x14,0xa4,0x46,0x00,0x00,0x8c,0x85,0x00,0x0c,0x8c,0x82,0x00,0x08,
13650x3c,0x06,0xb0,0x09,0x00,0x05,0x2c,0x00,0x00,0x02,0x14,0x02,0x00,0xa2,0x28,0x21,
13660x34,0xc6,0x01,0x20,0xac,0xc5,0x00,0x00,0x8c,0x83,0x00,0x0c,0x3c,0x05,0xb0,0x09,
13670x34,0xa5,0x01,0x24,0x00,0x03,0x1c,0x02,0xa4,0xa3,0x00,0x00,0x92,0x42,0x00,0x0a,
13680x3c,0x03,0xb0,0x09,0x34,0x63,0x01,0x30,0x00,0x02,0x13,0x00,0x24,0x42,0x00,0x04,
13690x30,0x42,0xff,0xff,0xa4,0x62,0x00,0x00,0x86,0x44,0x00,0x0c,0x27,0x83,0x99,0x58,
13700x8f,0xbf,0x00,0x1c,0x00,0x04,0x10,0xc0,0x00,0x44,0x10,0x21,0x00,0x02,0x10,0x80,
13710x00,0x43,0x10,0x21,0x94,0x44,0x00,0x02,0x8f,0xb2,0x00,0x18,0x7b,0xb0,0x00,0xbc,
13720x3c,0x05,0xb0,0x09,0x34,0xa5,0x01,0x32,0xa4,0xa4,0x00,0x00,0x03,0xe0,0x00,0x08,
13730x27,0xbd,0x00,0x20,0x27,0xbd,0xff,0xe0,0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x00,
13740xaf,0xb0,0x00,0x10,0x34,0x42,0x00,0x20,0x00,0xa0,0x80,0x21,0x24,0x63,0x53,0x34,
13750x00,0x05,0x2c,0x43,0xaf,0xb1,0x00,0x14,0xaf,0xbf,0x00,0x18,0xac,0x43,0x00,0x00,
13760x10,0xa0,0x00,0x05,0x00,0x80,0x88,0x21,0x8c,0x82,0x00,0x34,0x00,0x00,0x00,0x00,
13770x14,0x40,0x00,0xb6,0x00,0x00,0x00,0x00,0x32,0x10,0x00,0xff,0x12,0x00,0x00,0x4c,
13780x00,0x00,0x10,0x21,0x24,0x02,0x00,0x08,0x12,0x02,0x00,0xa3,0x2a,0x02,0x00,0x09,
13790x10,0x40,0x00,0x89,0x24,0x02,0x00,0x40,0x24,0x04,0x00,0x02,0x12,0x04,0x00,0x79,
13800x2a,0x02,0x00,0x03,0x10,0x40,0x00,0x69,0x24,0x02,0x00,0x04,0x24,0x02,0x00,0x01,
13810x12,0x02,0x00,0x5a,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x05,0x34,0x42,0x00,0x08,
13820x3c,0x03,0x80,0x00,0xa2,0x20,0x00,0x4e,0xac,0x43,0x00,0x00,0x82,0x24,0x00,0x11,
13830x92,0x27,0x00,0x11,0x10,0x80,0x00,0x4e,0x00,0x00,0x00,0x00,0x92,0x26,0x00,0x0a,
13840x24,0x02,0x00,0x12,0x10,0x46,0x00,0x09,0x30,0xc2,0x00,0xff,0x27,0x83,0xbd,0x40,
13850x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,
13860x94,0x83,0x00,0x14,0x00,0x00,0x00,0x00,0xa6,0x23,0x00,0x0c,0x3c,0x02,0xb0,0x09,
13870x34,0x42,0x00,0x40,0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x03,
13880xa2,0x23,0x00,0x10,0x14,0x60,0x00,0x2b,0x30,0x65,0x00,0x01,0x30,0xc2,0x00,0xff,
13890x27,0x83,0xbd,0x40,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,
13900x82,0x23,0x00,0x12,0x90,0x82,0x00,0x16,0x00,0x00,0x00,0x00,0x00,0x02,0x11,0x42,
13910x30,0x42,0x00,0x01,0x00,0x62,0x18,0x21,0x00,0x03,0x26,0x00,0x14,0x80,0x00,0x18,
13920xa2,0x23,0x00,0x12,0x00,0x07,0x16,0x00,0x14,0x40,0x00,0x11,0x24,0x02,0x00,0x01,
13930x96,0x23,0x00,0x0c,0x27,0x84,0x99,0x50,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,
13940x00,0x02,0x10,0x80,0x00,0x44,0x10,0x21,0x80,0x45,0x00,0x06,0x00,0x03,0x1a,0x00,
13950x3c,0x02,0xb0,0x00,0x00,0x65,0x18,0x21,0x00,0x62,0x18,0x21,0x90,0x64,0x00,0x00,
13960x90,0x62,0x00,0x04,0xa2,0x20,0x00,0x15,0xa3,0x80,0x95,0x14,0x24,0x02,0x00,0x01,
13970x8f,0xbf,0x00,0x18,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,
13980x0c,0x00,0x14,0x6a,0x02,0x20,0x20,0x21,0x92,0x27,0x00,0x11,0x08,0x00,0x15,0x1a,
13990x00,0x07,0x16,0x00,0x0c,0x00,0x14,0x0b,0x02,0x20,0x20,0x21,0x86,0x23,0x00,0x0c,
14000x27,0x84,0x99,0x48,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,
14010x00,0x44,0x20,0x21,0x90,0x85,0x00,0x07,0x27,0x83,0x99,0x50,0x00,0x43,0x10,0x21,
14020xa2,0x25,0x00,0x13,0x90,0x83,0x00,0x07,0x08,0x00,0x15,0x32,0xa0,0x43,0x00,0x02,
14030x92,0x26,0x00,0x0a,0x08,0x00,0x14,0xfb,0x30,0xc2,0x00,0xff,0x8e,0x22,0x00,0x24,
14040x00,0x00,0x00,0x00,0x10,0x50,0x00,0x07,0xa2,0x20,0x00,0x08,0x24,0x02,0x00,0x07,
14050xa2,0x22,0x00,0x0a,0x92,0x22,0x00,0x27,0xae,0x20,0x00,0x24,0x08,0x00,0x14,0xee,
14060xa2,0x22,0x00,0x04,0x08,0x00,0x15,0x4c,0x24,0x02,0x00,0x06,0x16,0x02,0xff,0x9b,
14070x3c,0x02,0xb0,0x05,0x8e,0x23,0x00,0x2c,0x24,0x02,0x00,0x01,0x10,0x62,0x00,0x07,
14080xa2,0x24,0x00,0x08,0x24,0x02,0x00,0x03,0xa2,0x22,0x00,0x0a,0x92,0x22,0x00,0x2f,
14090xae,0x20,0x00,0x2c,0x08,0x00,0x14,0xee,0xa2,0x22,0x00,0x06,0x08,0x00,0x15,0x5b,
14100xa2,0x20,0x00,0x0a,0x8e,0x22,0x00,0x28,0x24,0x03,0x00,0x01,0x24,0x04,0x00,0x01,
14110x10,0x44,0x00,0x07,0xa2,0x23,0x00,0x08,0x24,0x02,0x00,0x05,0xa2,0x22,0x00,0x0a,
14120x92,0x22,0x00,0x2b,0xae,0x20,0x00,0x28,0x08,0x00,0x14,0xee,0xa2,0x22,0x00,0x05,
14130x08,0x00,0x15,0x67,0x24,0x02,0x00,0x04,0x12,0x02,0x00,0x12,0x2a,0x02,0x00,0x41,
14140x10,0x40,0x00,0x09,0x24,0x02,0x00,0x80,0x24,0x02,0x00,0x20,0x16,0x02,0xff,0x7b,
14150x3c,0x02,0xb0,0x05,0x24,0x02,0x00,0x12,0xa2,0x22,0x00,0x0a,0xa2,0x22,0x00,0x08,
14160x08,0x00,0x14,0xee,0xae,0x20,0x00,0x3c,0x16,0x02,0xff,0x74,0x3c,0x02,0xb0,0x05,
14170x24,0x02,0x00,0x10,0xa2,0x22,0x00,0x0a,0xa2,0x22,0x00,0x08,0x08,0x00,0x14,0xee,
14180xae,0x20,0x00,0x34,0x24,0x02,0x00,0x11,0xa2,0x22,0x00,0x0a,0xa2,0x22,0x00,0x08,
14190x08,0x00,0x14,0xee,0xae,0x20,0x00,0x38,0x8e,0x24,0x00,0x30,0x24,0x02,0x00,0x03,
14200x24,0x03,0x00,0x01,0x10,0x83,0x00,0x07,0xa2,0x22,0x00,0x08,0x24,0x02,0x00,0x02,
14210xa2,0x22,0x00,0x0a,0x92,0x22,0x00,0x33,0xae,0x20,0x00,0x30,0x08,0x00,0x14,0xee,
14220xa2,0x22,0x00,0x07,0x08,0x00,0x15,0x8d,0xa2,0x24,0x00,0x0a,0x8f,0x84,0xbd,0x80,
14230xae,0x20,0x00,0x34,0x94,0x85,0x00,0x14,0x0c,0x00,0x23,0x34,0x32,0x10,0x00,0xff,
14240x08,0x00,0x14,0xdf,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,
14250x24,0x42,0x56,0x68,0x34,0x63,0x00,0x20,0xac,0x62,0x00,0x00,0x80,0xa2,0x00,0x15,
14260x3c,0x06,0xb0,0x05,0x10,0x40,0x00,0x0a,0x34,0xc6,0x02,0x54,0x83,0x83,0x95,0x14,
14270x00,0x00,0x00,0x00,0xac,0x83,0x00,0x24,0x8c,0xc2,0x00,0x00,0x00,0x00,0x00,0x00,
14280x00,0x02,0x17,0x42,0x30,0x42,0x00,0x01,0x03,0xe0,0x00,0x08,0xac,0x82,0x00,0x28,
14290x8c,0x82,0x00,0x2c,0x3c,0x06,0xb0,0x05,0x34,0xc6,0x04,0x50,0x00,0x02,0x18,0x43,
14300x30,0x63,0x00,0x01,0x10,0x40,0x00,0x04,0x30,0x45,0x00,0x01,0xac,0x83,0x00,0x28,
14310x03,0xe0,0x00,0x08,0xac,0x85,0x00,0x24,0x90,0xc2,0x00,0x00,0x00,0x00,0x00,0x00,
14320x30,0x42,0x00,0xff,0x30,0x43,0x00,0x02,0x30,0x42,0x00,0x01,0xac,0x83,0x00,0x28,
14330x03,0xe0,0x00,0x08,0xac,0x82,0x00,0x24,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,
14340x27,0xbd,0xff,0xd8,0x34,0x63,0x00,0x20,0x24,0x42,0x56,0xf8,0xac,0x62,0x00,0x00,
14350xaf,0xb1,0x00,0x1c,0xaf,0xbf,0x00,0x20,0xaf,0xb0,0x00,0x18,0x90,0xa6,0x00,0x0a,
14360x27,0x83,0xbd,0x40,0x00,0xa0,0x88,0x21,0x00,0x06,0x10,0x80,0x00,0x43,0x10,0x21,
14370x8c,0x50,0x00,0x00,0x80,0xa5,0x00,0x11,0x92,0x03,0x00,0x12,0x10,0xa0,0x00,0x04,
14380xa2,0x20,0x00,0x15,0x24,0x02,0x00,0x12,0x10,0xc2,0x00,0xda,0x00,0x00,0x00,0x00,
14390x82,0x22,0x00,0x12,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x67,0x00,0x00,0x00,0x00,
14400xa2,0x20,0x00,0x12,0xa2,0x00,0x00,0x19,0x86,0x23,0x00,0x0c,0x00,0x00,0x00,0x00,
14410x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x99,0x60,
14420x00,0x43,0x10,0x21,0xa0,0x40,0x00,0x00,0x92,0x03,0x00,0x16,0x00,0x00,0x00,0x00,
14430x30,0x63,0x00,0xdf,0xa2,0x03,0x00,0x16,0x82,0x02,0x00,0x12,0x00,0x00,0x00,0x00,
14440x14,0x40,0x00,0x20,0x00,0x00,0x00,0x00,0x92,0x23,0x00,0x08,0x00,0x00,0x00,0x00,
14450x14,0x60,0x00,0x45,0x24,0x02,0x00,0x01,0xa2,0x20,0x00,0x04,0x92,0x08,0x00,0x04,
14460x00,0x00,0x00,0x00,0x15,0x00,0x00,0x1e,0x24,0x02,0x00,0x01,0x92,0x07,0x00,0x0a,
14470xa2,0x02,0x00,0x17,0x92,0x02,0x00,0x16,0x30,0xe3,0x00,0xff,0x30,0x42,0x00,0xe4,
14480x10,0x60,0x00,0x03,0xa2,0x02,0x00,0x16,0x34,0x42,0x00,0x01,0xa2,0x02,0x00,0x16,
14490x11,0x00,0x00,0x05,0x00,0x00,0x00,0x00,0x92,0x02,0x00,0x16,0x00,0x00,0x00,0x00,
14500x34,0x42,0x00,0x02,0xa2,0x02,0x00,0x16,0x92,0x02,0x00,0x17,0x00,0x00,0x00,0x00,
14510x10,0x40,0x00,0x08,0x00,0x00,0x00,0x00,0x96,0x02,0x00,0x06,0x00,0x00,0x00,0x00,
14520xa6,0x02,0x00,0x14,0x8f,0xbf,0x00,0x20,0x7b,0xb0,0x00,0xfc,0x03,0xe0,0x00,0x08,
14530x27,0xbd,0x00,0x28,0x96,0x02,0x00,0x00,0x08,0x00,0x16,0x09,0xa6,0x02,0x00,0x14,
14540x92,0x07,0x00,0x0a,0x00,0x00,0x00,0x00,0x14,0xe0,0x00,0x03,0x00,0x00,0x00,0x00,
14550x08,0x00,0x15,0xf5,0xa2,0x00,0x00,0x17,0x96,0x04,0x00,0x00,0x96,0x05,0x00,0x06,
14560x27,0x86,0x99,0x40,0x00,0x04,0x18,0xc0,0x00,0x64,0x18,0x21,0x00,0x05,0x10,0xc0,
14570x00,0x45,0x10,0x21,0x00,0x03,0x18,0x80,0x00,0x66,0x18,0x21,0x00,0x02,0x10,0x80,
14580x00,0x46,0x10,0x21,0x8c,0x66,0x00,0x08,0x8c,0x45,0x00,0x08,0x3c,0x03,0x80,0x00,
14590x00,0xc3,0x20,0x24,0x10,0x80,0x00,0x08,0x00,0xa3,0x10,0x24,0x10,0x40,0x00,0x04,
14600x00,0x00,0x18,0x21,0x10,0x80,0x00,0x02,0x24,0x03,0x00,0x01,0x00,0xa6,0x18,0x2b,
14610x08,0x00,0x15,0xf5,0xa2,0x03,0x00,0x17,0x10,0x40,0xff,0xfd,0x00,0xa6,0x18,0x2b,
14620x08,0x00,0x16,0x29,0x00,0x00,0x00,0x00,0x10,0x62,0x00,0x09,0x24,0x02,0x00,0x02,
14630x10,0x62,0x00,0x05,0x24,0x02,0x00,0x03,0x14,0x62,0xff,0xb8,0x00,0x00,0x00,0x00,
14640x08,0x00,0x15,0xef,0xa2,0x20,0x00,0x07,0x08,0x00,0x15,0xef,0xa2,0x20,0x00,0x06,
14650x08,0x00,0x15,0xef,0xa2,0x20,0x00,0x05,0x82,0x22,0x00,0x10,0x00,0x00,0x00,0x00,
14660x14,0x40,0x00,0x69,0x2c,0x62,0x00,0x02,0x10,0x40,0x00,0x49,0x3c,0x02,0xb0,0x09,
14670x92,0x25,0x00,0x08,0x00,0x00,0x00,0x00,0x30,0xa6,0x00,0xff,0x2c,0xc2,0x00,0x04,
14680x10,0x40,0x00,0x3b,0x2c,0xc2,0x00,0x10,0x3c,0x04,0xb0,0x05,0x34,0x84,0x02,0x29,
14690x90,0x83,0x00,0x00,0x24,0x02,0x00,0x01,0x00,0xc2,0x10,0x04,0x00,0x02,0x10,0x27,
14700x00,0x62,0x18,0x24,0xa0,0x83,0x00,0x00,0x86,0x23,0x00,0x0c,0x96,0x26,0x00,0x0c,
14710x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x28,0x80,0x27,0x83,0x99,0x44,
14720x00,0xa3,0x18,0x21,0x8c,0x64,0x00,0x18,0x00,0x00,0x00,0x00,0x8c,0x82,0x00,0x04,
14730x00,0x00,0x00,0x00,0x30,0x42,0x00,0x10,0x10,0x40,0x00,0x18,0x24,0x07,0x00,0x01,
14740x93,0x82,0x94,0x51,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,0x14,0x40,0x00,0x0a,
14750x24,0x05,0x00,0x24,0x00,0x06,0x2c,0x00,0x00,0x05,0x2c,0x03,0x0c,0x00,0x23,0x34,
14760x02,0x00,0x20,0x21,0x92,0x02,0x00,0x16,0xa2,0x00,0x00,0x12,0x30,0x42,0x00,0xe7,
14770x08,0x00,0x15,0xe6,0xa2,0x02,0x00,0x16,0xf0,0xc5,0x00,0x06,0x00,0x00,0x28,0x12,
14780x27,0x82,0x99,0x40,0x00,0xa2,0x28,0x21,0x0c,0x00,0x01,0x49,0x3c,0x04,0x00,0x80,
14790x96,0x26,0x00,0x0c,0x08,0x00,0x16,0x66,0x00,0x06,0x2c,0x00,0x27,0x83,0x99,0x50,
14800x27,0x82,0x99,0x58,0x00,0xa2,0x10,0x21,0x00,0xa3,0x18,0x21,0x90,0x44,0x00,0x00,
14810x90,0x65,0x00,0x05,0x93,0x82,0x80,0x10,0x00,0x00,0x30,0x21,0x0c,0x00,0x29,0x5e,
14820xaf,0xa2,0x00,0x10,0x96,0x26,0x00,0x0c,0x08,0x00,0x16,0x60,0x00,0x00,0x00,0x00,
14830x14,0x40,0xff,0xcd,0x3c,0x04,0xb0,0x05,0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,
14840x30,0xa5,0x00,0x0f,0x24,0x02,0x00,0x80,0x08,0x00,0x16,0x4f,0x00,0xa2,0x10,0x07,
14850x86,0x26,0x00,0x0c,0x3c,0x03,0xb0,0x09,0x34,0x42,0x01,0x72,0x34,0x63,0x01,0x78,
14860x94,0x47,0x00,0x00,0x8c,0x65,0x00,0x00,0x00,0x06,0x10,0xc0,0x00,0x46,0x10,0x21,
14870x3c,0x04,0xb0,0x09,0xae,0x25,0x00,0x1c,0x34,0x84,0x01,0x7c,0x27,0x83,0x99,0x44,
14880x00,0x02,0x10,0x80,0x8c,0x85,0x00,0x00,0x00,0x43,0x10,0x21,0x8c,0x43,0x00,0x18,
14890xae,0x25,0x00,0x20,0xa6,0x27,0x00,0x18,0x8c,0x66,0x00,0x08,0x02,0x20,0x20,0x21,
14900x0c,0x00,0x16,0xb6,0x00,0x00,0x28,0x21,0x86,0x25,0x00,0x18,0x8e,0x26,0x00,0x1c,
14910x8e,0x27,0x00,0x20,0x02,0x20,0x20,0x21,0x0c,0x00,0x24,0x36,0xaf,0xa2,0x00,0x10,
14920x08,0x00,0x15,0xe6,0xa2,0x02,0x00,0x12,0x92,0x22,0x00,0x08,0x08,0x00,0x15,0xe6,
14930xa2,0x22,0x00,0x09,0xa2,0x20,0x00,0x11,0x80,0x82,0x00,0x50,0x00,0x00,0x00,0x00,
14940x10,0x40,0x00,0x03,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0xd0,0xac,0x40,0x00,0x00,
14950x08,0x00,0x15,0xe6,0xa0,0x80,0x00,0x50,0x94,0x8a,0x00,0x0c,0x24,0x03,0x00,0x24,
14960x00,0x80,0x70,0x21,0x3c,0x02,0x80,0x00,0x3c,0x04,0xb0,0x03,0x24,0x42,0x5a,0xd8,
14970xf1,0x43,0x00,0x06,0x34,0x84,0x00,0x20,0x00,0x00,0x18,0x12,0x00,0xa0,0x68,0x21,
14980xac,0x82,0x00,0x00,0x27,0x85,0x99,0x50,0x27,0x82,0x99,0x4f,0x27,0xbd,0xff,0xf8,
14990x00,0x62,0x60,0x21,0x00,0x65,0x58,0x21,0x00,0x00,0xc0,0x21,0x11,0xa0,0x00,0xcc,
15000x00,0x00,0x78,0x21,0x00,0x0a,0x1c,0x00,0x00,0x03,0x1c,0x03,0x00,0x03,0x10,0xc0,
15010x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x45,0x10,0x21,0x91,0x87,0x00,0x00,
15020x80,0x48,0x00,0x04,0x03,0xa0,0x60,0x21,0x00,0x0a,0x1c,0x00,0x00,0x03,0x1c,0x03,
15030x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x48,0x80,0x27,0x83,0x99,0x44,
15040xa3,0xa7,0x00,0x00,0x01,0x23,0x18,0x21,0x8c,0x64,0x00,0x18,0x25,0x02,0xff,0xff,
15050x00,0x48,0x40,0x0b,0x8c,0x83,0x00,0x04,0x2d,0x05,0x00,0x07,0x24,0x02,0x00,0x06,
15060x30,0x63,0x00,0x08,0x14,0x60,0x00,0x35,0x00,0x45,0x40,0x0a,0x93,0xa7,0x00,0x00,
15070x27,0x82,0x99,0x58,0x01,0x22,0x10,0x21,0x30,0xe3,0x00,0xf0,0x38,0x63,0x00,0x50,
15080x30,0xe5,0x00,0xff,0x00,0x05,0x20,0x2b,0x00,0x03,0x18,0x2b,0x00,0x64,0x18,0x24,
15090x90,0x49,0x00,0x00,0x10,0x60,0x00,0x16,0x30,0xe4,0x00,0x0f,0x24,0x02,0x00,0x04,
15100x10,0xa2,0x00,0x9d,0x00,0x00,0x00,0x00,0x11,0xa0,0x00,0x3a,0x2c,0xa2,0x00,0x0c,
15110x10,0x40,0x00,0x02,0x24,0x84,0x00,0x0c,0x00,0xe0,0x20,0x21,0x30,0x84,0x00,0xff,
15120x00,0x04,0x10,0x40,0x27,0x83,0xc4,0x5c,0x00,0x44,0x10,0x21,0x00,0x43,0x10,0x21,
15130x90,0x47,0x00,0x00,0x00,0x00,0x00,0x00,0x2c,0xe3,0x00,0x0c,0xa3,0xa7,0x00,0x00,
15140x10,0x60,0x00,0x02,0x24,0xe2,0x00,0x04,0x00,0xe0,0x10,0x21,0xa3,0xa2,0x00,0x00,
15150x91,0x65,0x00,0x00,0x91,0x82,0x00,0x00,0x30,0xa3,0x00,0xff,0x00,0x62,0x10,0x2b,
15160x10,0x40,0x00,0x0e,0x2c,0x62,0x00,0x0c,0x14,0x40,0x00,0x03,0x00,0x60,0x20,0x21,
15170x30,0xa2,0x00,0x0f,0x24,0x44,0x00,0x0c,0x00,0x04,0x10,0x40,0x00,0x44,0x20,0x21,
15180x27,0x83,0xc4,0x5c,0x00,0x83,0x18,0x21,0x90,0x62,0x00,0x02,0x00,0x00,0x00,0x00,
15190x10,0x40,0x00,0x05,0x00,0x09,0x11,0x00,0xa1,0x85,0x00,0x00,0x93,0xa2,0x00,0x00,
15200x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x08,0x00,0x49,0x10,0x23,0x00,0x02,0x10,0x80,
15210x00,0x49,0x10,0x23,0x00,0x02,0x10,0x80,0x00,0x44,0x10,0x21,0x27,0x83,0xbd,0xe8,
15220x00,0x43,0x10,0x21,0x90,0x44,0x00,0x00,0x00,0x00,0x00,0x00,0x2c,0x83,0x00,0x0c,
15230x14,0x60,0x00,0x06,0x00,0x80,0x10,0x21,0x00,0x18,0x10,0x40,0x00,0x4f,0x10,0x21,
15240x00,0x02,0x11,0x00,0x00,0x82,0x10,0x21,0x24,0x42,0x00,0x04,0x08,0x00,0x17,0x17,
15250xa1,0x82,0x00,0x00,0x8f,0x8d,0x87,0x70,0x00,0x00,0x00,0x00,0x01,0xa8,0x10,0x21,
15260x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x60,0xff,0xd1,0x00,0x00,0x28,0x21,
15270x00,0x06,0x74,0x82,0x30,0xe2,0x00,0xff,0x2c,0x42,0x00,0x0c,0x14,0x40,0x00,0x03,
15280x00,0xe0,0x10,0x21,0x30,0xe2,0x00,0x0f,0x24,0x42,0x00,0x0c,0x30,0x44,0x00,0xff,
15290xa3,0xa2,0x00,0x00,0x24,0x02,0x00,0x0c,0x10,0x82,0x00,0x0d,0x00,0x09,0x11,0x00,
15300x00,0x49,0x10,0x23,0x00,0x02,0x10,0x80,0x00,0x04,0x18,0x40,0x00,0x49,0x10,0x23,
15310x00,0x64,0x18,0x21,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x27,0x84,0xbd,0xe8,
15320x00,0x44,0x10,0x21,0x90,0x47,0x00,0x00,0x00,0x00,0x00,0x00,0xa3,0xa7,0x00,0x00,
15330x00,0x0a,0x1c,0x00,0x00,0x03,0x1c,0x03,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,
15340x00,0x02,0x10,0x80,0x27,0x83,0x99,0x44,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x18,
15350x00,0x00,0x00,0x00,0x8c,0x83,0x00,0x04,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x10,
15360x14,0x60,0x00,0x33,0x00,0x06,0x14,0x42,0x00,0x09,0x11,0x00,0x00,0x49,0x10,0x23,
15370x00,0x02,0x10,0x80,0x00,0x49,0x10,0x23,0x27,0x83,0xbe,0xb8,0x00,0x02,0x10,0x80,
15380x00,0x43,0x10,0x21,0x90,0x44,0x00,0x04,0x90,0x43,0x00,0x05,0x00,0x00,0x00,0x00,
15390x00,0x64,0xc0,0x24,0x93,0xa7,0x00,0x00,0x00,0x00,0x00,0x00,0x2c,0xe2,0x00,0x0f,
15400x10,0x40,0x00,0x0f,0x31,0xcf,0x00,0x01,0x00,0x0a,0x1c,0x00,0x00,0x03,0x1c,0x03,
15410x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x84,0x99,0x40,
15420x00,0x44,0x10,0x21,0x84,0x43,0x00,0x06,0x00,0x00,0x00,0x00,0x28,0x63,0x06,0x41,
15430x14,0x60,0x00,0x04,0x30,0xe2,0x00,0xff,0x24,0x07,0x00,0x0f,0xa3,0xa7,0x00,0x00,
15440x30,0xe2,0x00,0xff,0x2c,0x42,0x00,0x0c,0x14,0x40,0x00,0x06,0x00,0xe0,0x10,0x21,
15450x00,0x18,0x10,0x40,0x00,0x4f,0x10,0x21,0x00,0x02,0x11,0x00,0x00,0x47,0x10,0x21,
15460x24,0x42,0x00,0x04,0xa3,0xa2,0x00,0x00,0x00,0x40,0x38,0x21,0x01,0xa8,0x10,0x21,
15470x90,0x43,0x00,0x00,0x24,0xa4,0x00,0x01,0x30,0x85,0xff,0xff,0x00,0xa3,0x18,0x2b,
15480x14,0x60,0xff,0xad,0x30,0xe2,0x00,0xff,0x08,0x00,0x17,0x04,0x00,0x00,0x00,0x00,
15490x08,0x00,0x17,0x65,0x30,0x58,0x00,0x01,0x81,0xc2,0x00,0x48,0x00,0x00,0x00,0x00,
15500x10,0x40,0xff,0x73,0x00,0x00,0x00,0x00,0x08,0x00,0x16,0xf2,0x00,0x00,0x00,0x00,
15510x00,0x0a,0x1c,0x00,0x00,0x03,0x1c,0x03,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,
15520x00,0x02,0x10,0x80,0x00,0x45,0x10,0x21,0x80,0x48,0x00,0x05,0x91,0x67,0x00,0x00,
15530x08,0x00,0x16,0xd2,0x03,0xa0,0x58,0x21,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,
15540x34,0x63,0x00,0x20,0x24,0x42,0x5e,0x78,0x03,0xe0,0x00,0x08,0xac,0x62,0x00,0x00,
15550x27,0xbd,0xff,0xc0,0xaf,0xb7,0x00,0x34,0xaf,0xb6,0x00,0x30,0xaf,0xb5,0x00,0x2c,
15560xaf,0xb4,0x00,0x28,0xaf,0xb3,0x00,0x24,0xaf,0xb2,0x00,0x20,0xaf,0xbf,0x00,0x3c,
15570xaf,0xbe,0x00,0x38,0xaf,0xb1,0x00,0x1c,0xaf,0xb0,0x00,0x18,0x84,0x82,0x00,0x0c,
15580x27,0x93,0x99,0x44,0x3c,0x05,0xb0,0x03,0x00,0x02,0x18,0xc0,0x00,0x62,0x18,0x21,
15590x00,0x03,0x18,0x80,0x00,0x73,0x10,0x21,0x8c,0x5e,0x00,0x18,0x3c,0x02,0x80,0x00,
15600x34,0xa5,0x00,0x20,0x24,0x42,0x5e,0x90,0xac,0xa2,0x00,0x00,0x8f,0xd0,0x00,0x08,
15610x27,0x95,0x99,0x50,0x00,0x75,0x18,0x21,0x00,0x00,0x28,0x21,0x02,0x00,0x30,0x21,
15620x90,0x71,0x00,0x00,0x0c,0x00,0x16,0xb6,0x00,0x80,0xb0,0x21,0x00,0x40,0x90,0x21,
15630x00,0x10,0x14,0x42,0x30,0x54,0x00,0x01,0x02,0x40,0x20,0x21,0x00,0x10,0x14,0x82,
15640x02,0x80,0x28,0x21,0x12,0x51,0x00,0x23,0x00,0x10,0xbf,0xc2,0x86,0xc3,0x00,0x0c,
15650x30,0x50,0x00,0x01,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,
15660x00,0x55,0x10,0x21,0xa0,0x52,0x00,0x00,0x86,0xc3,0x00,0x0c,0x00,0x00,0x00,0x00,
15670x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x53,0x30,0x21,
15680x8c,0xc7,0x00,0x18,0x27,0x83,0x99,0x40,0x00,0x43,0x10,0x21,0x8c,0xe3,0x00,0x04,
15690x84,0x46,0x00,0x06,0x00,0x03,0x19,0x42,0x0c,0x00,0x10,0x80,0x30,0x73,0x00,0x01,
15700x00,0x40,0x88,0x21,0x02,0x40,0x20,0x21,0x02,0x80,0x28,0x21,0x16,0xe0,0x00,0x10,
15710x02,0x00,0x30,0x21,0x86,0xc2,0x00,0x0c,0x00,0x00,0x00,0x00,0x00,0x02,0x18,0xc0,
15720x00,0x62,0x18,0x21,0x00,0x03,0x18,0x80,0x27,0x82,0x99,0x48,0x00,0x62,0x18,0x21,
15730xa4,0x71,0x00,0x04,0x7b,0xbe,0x01,0xfc,0x7b,0xb6,0x01,0xbc,0x7b,0xb4,0x01,0x7c,
15740x7b,0xb2,0x01,0x3c,0x7b,0xb0,0x00,0xfc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x40,
15750x86,0xc3,0x00,0x0c,0xaf,0xb3,0x00,0x10,0xaf,0xa0,0x00,0x14,0x00,0x03,0x10,0xc0,
15760x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x55,0x10,0x21,0x80,0x47,0x00,0x06,
15770x00,0x00,0x00,0x00,0x24,0xe7,0x00,0x02,0x00,0x07,0x17,0xc2,0x00,0xe2,0x38,0x21,
15780x00,0x07,0x38,0x43,0x00,0x07,0x38,0x40,0x0c,0x00,0x10,0xa7,0x03,0xc7,0x38,0x21,
15790x08,0x00,0x17,0xe5,0x02,0x22,0x88,0x21,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,
15800x27,0xbd,0xff,0xd0,0x34,0x63,0x00,0x20,0x24,0x42,0x60,0x18,0xaf,0xb2,0x00,0x20,
15810xac,0x62,0x00,0x00,0xaf,0xbf,0x00,0x28,0xaf,0xb3,0x00,0x24,0xaf,0xb1,0x00,0x1c,
15820xaf,0xb0,0x00,0x18,0x3c,0x02,0xb0,0x03,0x90,0x83,0x00,0x0a,0x34,0x42,0x01,0x04,
15830x94,0x45,0x00,0x00,0x00,0x03,0x18,0x80,0x27,0x82,0xbd,0x40,0x00,0x62,0x18,0x21,
15840x30,0xa6,0xff,0xff,0x8c,0x71,0x00,0x00,0x80,0x85,0x00,0x12,0x30,0xc9,0x00,0xff,
15850x00,0x06,0x32,0x02,0xa4,0x86,0x00,0x44,0xa4,0x89,0x00,0x46,0x82,0x22,0x00,0x12,
15860x00,0x80,0x90,0x21,0x10,0xa0,0x00,0x1b,0xa0,0x80,0x00,0x15,0x00,0xc5,0x10,0x2a,
15870x10,0x40,0x00,0x14,0x00,0x00,0x00,0x00,0xa2,0x20,0x00,0x19,0x84,0x83,0x00,0x0c,
15880x00,0x00,0x00,0x00,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,
15890x27,0x83,0x99,0x60,0x00,0x43,0x10,0x21,0xa0,0x40,0x00,0x00,0xa0,0x80,0x00,0x12,
15900x92,0x22,0x00,0x16,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xdf,0xa2,0x22,0x00,0x16,
15910x8f,0xbf,0x00,0x28,0x7b,0xb2,0x01,0x3c,0x7b,0xb0,0x00,0xfc,0x03,0xe0,0x00,0x08,
15920x27,0xbd,0x00,0x30,0x0c,0x00,0x17,0x9e,0x00,0x00,0x00,0x00,0x08,0x00,0x18,0x34,
15930x00,0x00,0x00,0x00,0x28,0x42,0x00,0x02,0x10,0x40,0x01,0x76,0x00,0x00,0x28,0x21,
15940x94,0x87,0x00,0x0c,0x00,0x00,0x00,0x00,0x00,0xe0,0x10,0x21,0x00,0x02,0x14,0x00,
15950x00,0x02,0x14,0x03,0x00,0x07,0x24,0x00,0x00,0x04,0x24,0x03,0x00,0x02,0x18,0xc0,
15960x00,0x62,0x18,0x21,0x00,0x04,0x28,0xc0,0x00,0xa4,0x28,0x21,0x27,0x82,0x99,0x60,
15970x00,0x03,0x18,0x80,0x00,0x62,0x18,0x21,0x00,0x05,0x28,0x80,0x27,0x82,0x99,0x48,
15980x00,0xa2,0x10,0x21,0x8c,0x68,0x00,0x00,0x80,0x44,0x00,0x06,0x27,0x82,0x99,0x50,
15990x00,0x08,0x1d,0x02,0x00,0xa2,0x28,0x21,0x38,0x84,0x00,0x00,0x30,0x63,0x00,0x01,
16000x01,0x24,0x30,0x0b,0x80,0xaa,0x00,0x04,0x80,0xa9,0x00,0x05,0x10,0x60,0x00,0x02,
16010x00,0x08,0x14,0x02,0x30,0x46,0x00,0x0f,0x15,0x20,0x00,0x28,0x01,0x49,0x10,0x21,
16020x15,0x40,0x00,0x11,0x30,0xe3,0xff,0xff,0x92,0x45,0x00,0x08,0x00,0x00,0x00,0x00,
16030x30,0xa8,0x00,0xff,0x2d,0x02,0x00,0x04,0x10,0x40,0x01,0x46,0x2d,0x02,0x00,0x10,
16040x3c,0x04,0xb0,0x05,0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,0x24,0x02,0x00,0x01,
16050x01,0x02,0x10,0x04,0x00,0x62,0x18,0x25,0xa0,0x83,0x00,0x00,0x96,0x47,0x00,0x0c,
16060x00,0x00,0x00,0x00,0x30,0xe3,0xff,0xff,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,
16070x27,0x84,0x99,0x50,0x00,0x02,0x10,0x80,0x00,0x44,0x10,0x21,0x80,0x45,0x00,0x06,
16080x00,0x03,0x1a,0x00,0x3c,0x04,0xb0,0x00,0x00,0x65,0x18,0x21,0x00,0x64,0x20,0x21,
16090x94,0x82,0x00,0x00,0x82,0x43,0x00,0x10,0x00,0x02,0x14,0x00,0x14,0x60,0x00,0x06,
16100x00,0x02,0x3c,0x03,0x30,0xe2,0x00,0x04,0x14,0x40,0x00,0x04,0x01,0x49,0x10,0x21,
16110x34,0xe2,0x08,0x00,0xa4,0x82,0x00,0x00,0x01,0x49,0x10,0x21,0x00,0x02,0x16,0x00,
16120x00,0x02,0x16,0x03,0x00,0x46,0x10,0x2a,0x10,0x40,0x00,0x7c,0x00,0x00,0x00,0x00,
16130x82,0x42,0x00,0x10,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x0e,0x00,0x00,0x00,0x00,
16140x86,0x43,0x00,0x0c,0x25,0x44,0x00,0x01,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,
16150x00,0x02,0x10,0x80,0x27,0x83,0x99,0x50,0x00,0x43,0x10,0x21,0xa0,0x44,0x00,0x04,
16160x92,0x23,0x00,0x16,0x02,0x40,0x20,0x21,0x30,0x63,0x00,0xfb,0x08,0x00,0x18,0x39,
16170xa2,0x23,0x00,0x16,0x86,0x43,0x00,0x0c,0x25,0x24,0x00,0x01,0x00,0x03,0x10,0xc0,
16180x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x99,0x50,0x00,0x43,0x10,0x21,
16190xa0,0x44,0x00,0x05,0x86,0x45,0x00,0x0c,0x0c,0x00,0x26,0xae,0x02,0x20,0x20,0x21,
16200x10,0x40,0x00,0x5a,0x00,0x00,0x00,0x00,0x92,0x45,0x00,0x08,0x00,0x00,0x00,0x00,
16210x30,0xa6,0x00,0xff,0x2c,0xc2,0x00,0x04,0x10,0x40,0x00,0x4c,0x2c,0xc2,0x00,0x10,
16220x3c,0x04,0xb0,0x05,0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,0x24,0x02,0x00,0x01,
16230x00,0xc2,0x10,0x04,0x00,0x02,0x10,0x27,0x00,0x62,0x18,0x24,0xa0,0x83,0x00,0x00,
16240x92,0x45,0x00,0x08,0x00,0x00,0x00,0x00,0x30,0xa5,0x00,0xff,0x14,0xa0,0x00,0x33,
16250x24,0x02,0x00,0x01,0xa2,0x40,0x00,0x04,0x92,0x22,0x00,0x04,0x00,0x00,0x00,0x00,
16260x14,0x40,0x00,0x0c,0x24,0x02,0x00,0x01,0xa2,0x22,0x00,0x17,0x92,0x22,0x00,0x17,
16270x00,0x00,0x00,0x00,0x10,0x40,0x00,0x04,0x00,0x00,0x00,0x00,0x96,0x22,0x00,0x06,
16280x08,0x00,0x18,0x34,0xa6,0x22,0x00,0x14,0x96,0x22,0x00,0x00,0x08,0x00,0x18,0x34,
16290xa6,0x22,0x00,0x14,0x92,0x22,0x00,0x0a,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x03,
16300x00,0x00,0x00,0x00,0x08,0x00,0x18,0xc3,0xa2,0x20,0x00,0x17,0x96,0x24,0x00,0x00,
16310x96,0x25,0x00,0x06,0x27,0x86,0x99,0x40,0x00,0x04,0x18,0xc0,0x00,0x64,0x18,0x21,
16320x00,0x05,0x10,0xc0,0x00,0x45,0x10,0x21,0x00,0x03,0x18,0x80,0x00,0x66,0x18,0x21,
16330x00,0x02,0x10,0x80,0x00,0x46,0x10,0x21,0x8c,0x65,0x00,0x08,0x8c,0x44,0x00,0x08,
16340x3c,0x03,0x80,0x00,0x00,0xa3,0x30,0x24,0x10,0xc0,0x00,0x08,0x00,0x83,0x10,0x24,
16350x10,0x40,0x00,0x04,0x00,0x00,0x18,0x21,0x10,0xc0,0x00,0x02,0x24,0x03,0x00,0x01,
16360x00,0x85,0x18,0x2b,0x08,0x00,0x18,0xc3,0xa2,0x23,0x00,0x17,0x10,0x40,0xff,0xfd,
16370x00,0x85,0x18,0x2b,0x08,0x00,0x18,0xe6,0x00,0x00,0x00,0x00,0x10,0xa2,0x00,0x09,
16380x24,0x02,0x00,0x02,0x10,0xa2,0x00,0x05,0x24,0x02,0x00,0x03,0x14,0xa2,0xff,0xca,
16390x00,0x00,0x00,0x00,0x08,0x00,0x18,0xbe,0xa2,0x40,0x00,0x07,0x08,0x00,0x18,0xbe,
16400xa2,0x40,0x00,0x06,0x08,0x00,0x18,0xbe,0xa2,0x40,0x00,0x05,0x14,0x40,0xff,0xbe,
16410x3c,0x04,0xb0,0x05,0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,0x30,0xa5,0x00,0x0f,
16420x24,0x02,0x00,0x80,0x08,0x00,0x18,0xb5,0x00,0xa2,0x10,0x07,0x0c,0x00,0x17,0xa4,
16430x02,0x40,0x20,0x21,0x08,0x00,0x18,0x34,0x00,0x00,0x00,0x00,0x92,0x45,0x00,0x08,
16440x00,0x00,0x00,0x00,0x30,0xa6,0x00,0xff,0x2c,0xc2,0x00,0x04,0x10,0x40,0x00,0x99,
16450x2c,0xc2,0x00,0x10,0x3c,0x04,0xb0,0x05,0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,
16460x24,0x02,0x00,0x01,0x00,0xc2,0x10,0x04,0x00,0x02,0x10,0x27,0x00,0x62,0x18,0x24,
16470xa0,0x83,0x00,0x00,0x92,0x45,0x00,0x08,0x00,0x00,0x00,0x00,0x30,0xa5,0x00,0xff,
16480x14,0xa0,0x00,0x80,0x24,0x02,0x00,0x01,0xa2,0x40,0x00,0x04,0x86,0x43,0x00,0x0c,
16490x27,0x93,0x99,0x44,0x96,0x47,0x00,0x0c,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,
16500x00,0x02,0x28,0x80,0x00,0xb3,0x18,0x21,0x8c,0x64,0x00,0x18,0x00,0x00,0x00,0x00,
16510x8c,0x82,0x00,0x04,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x10,0x10,0x40,0x00,0x64,
16520x00,0x00,0x30,0x21,0x00,0x07,0x1c,0x00,0x00,0x03,0x1c,0x03,0x00,0x03,0x10,0xc0,
16530x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x53,0x10,0x21,0x8c,0x43,0x00,0x18,
16540x93,0x82,0x94,0x51,0x8c,0x64,0x00,0x04,0x30,0x42,0x00,0x01,0x00,0x04,0x21,0x42,
16550x14,0x40,0x00,0x4d,0x30,0x90,0x00,0x01,0x00,0x07,0x2c,0x00,0x00,0x05,0x2c,0x03,
16560x0c,0x00,0x23,0x34,0x02,0x20,0x20,0x21,0x96,0x26,0x00,0x06,0x12,0x00,0x00,0x14,
16570x30,0xc5,0xff,0xff,0x02,0x60,0x90,0x21,0x00,0x05,0x10,0xc0,0x00,0x45,0x10,0x21,
16580x00,0x02,0x10,0x80,0x00,0x52,0x18,0x21,0x92,0x22,0x00,0x0a,0x00,0x00,0x00,0x00,
16590x10,0x40,0x00,0x0b,0x02,0x20,0x20,0x21,0x8c,0x63,0x00,0x18,0x00,0x00,0x00,0x00,
16600x8c,0x62,0x00,0x04,0x00,0x00,0x00,0x00,0x00,0x02,0x11,0x42,0x0c,0x00,0x23,0x34,
16610x30,0x50,0x00,0x01,0x96,0x26,0x00,0x06,0x16,0x00,0xff,0xef,0x30,0xc5,0xff,0xff,
16620x92,0x22,0x00,0x04,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x0d,0x24,0x02,0x00,0x01,
16630xa2,0x22,0x00,0x17,0x92,0x22,0x00,0x17,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x05,
16640x00,0x00,0x00,0x00,0xa6,0x26,0x00,0x14,0x92,0x22,0x00,0x16,0x08,0x00,0x18,0x33,
16650x30,0x42,0x00,0xc3,0x96,0x22,0x00,0x00,0x08,0x00,0x19,0x5a,0xa6,0x22,0x00,0x14,
16660x92,0x22,0x00,0x0a,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x03,0x00,0x00,0x00,0x00,
16670x08,0x00,0x19,0x55,0xa2,0x20,0x00,0x17,0x96,0x24,0x00,0x00,0x30,0xc5,0xff,0xff,
16680x00,0x05,0x18,0xc0,0x00,0x04,0x10,0xc0,0x00,0x44,0x10,0x21,0x00,0x65,0x18,0x21,
16690x27,0x84,0x99,0x40,0x00,0x02,0x10,0x80,0x00,0x44,0x10,0x21,0x00,0x03,0x18,0x80,
16700x8c,0x45,0x00,0x08,0x00,0x64,0x18,0x21,0x8c,0x64,0x00,0x08,0x3c,0x02,0x80,0x00,
16710x00,0xa2,0x38,0x24,0x10,0xe0,0x00,0x08,0x00,0x82,0x10,0x24,0x10,0x40,0x00,0x04,
16720x00,0x00,0x18,0x21,0x10,0xe0,0x00,0x02,0x24,0x03,0x00,0x01,0x00,0x85,0x18,0x2b,
16730x08,0x00,0x19,0x55,0xa2,0x23,0x00,0x17,0x10,0x40,0xff,0xfd,0x00,0x85,0x18,0x2b,
16740x08,0x00,0x19,0x79,0x00,0x00,0x00,0x00,0x24,0x05,0x00,0x24,0xf0,0xe5,0x00,0x06,
16750x00,0x00,0x28,0x12,0x27,0x82,0x99,0x40,0x00,0xa2,0x28,0x21,0x0c,0x00,0x01,0x49,
16760x00,0x00,0x20,0x21,0x96,0x47,0x00,0x0c,0x08,0x00,0x19,0x37,0x00,0x07,0x2c,0x00,
16770x27,0x83,0x99,0x50,0x27,0x82,0x99,0x58,0x00,0xa2,0x10,0x21,0x00,0xa3,0x18,0x21,
16780x90,0x44,0x00,0x00,0x90,0x65,0x00,0x05,0x93,0x82,0x80,0x10,0x24,0x07,0x00,0x01,
16790x0c,0x00,0x29,0x5e,0xaf,0xa2,0x00,0x10,0x96,0x47,0x00,0x0c,0x08,0x00,0x19,0x2a,
16800x00,0x07,0x1c,0x00,0x10,0xa2,0x00,0x09,0x24,0x02,0x00,0x02,0x10,0xa2,0x00,0x05,
16810x24,0x02,0x00,0x03,0x14,0xa2,0xff,0x7d,0x00,0x00,0x00,0x00,0x08,0x00,0x19,0x1b,
16820xa2,0x40,0x00,0x07,0x08,0x00,0x19,0x1b,0xa2,0x40,0x00,0x06,0x08,0x00,0x19,0x1b,
16830xa2,0x40,0x00,0x05,0x14,0x40,0xff,0x71,0x3c,0x04,0xb0,0x05,0x34,0x84,0x02,0x29,
16840x90,0x83,0x00,0x00,0x30,0xa5,0x00,0x0f,0x24,0x02,0x00,0x80,0x08,0x00,0x19,0x12,
16850x00,0xa2,0x10,0x07,0x14,0x40,0xfe,0xc3,0x3c,0x04,0xb0,0x05,0x34,0x84,0x02,0x29,
16860x90,0x83,0x00,0x00,0x30,0xa5,0x00,0x0f,0x24,0x02,0x00,0x80,0x08,0x00,0x18,0x6d,
16870x00,0xa2,0x10,0x07,0x84,0x83,0x00,0x0c,0x00,0x00,0x00,0x00,0x00,0x03,0x10,0xc0,
16880x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x99,0x44,0x00,0x43,0x10,0x21,
16890x8c,0x47,0x00,0x18,0x00,0x00,0x00,0x00,0x8c,0xe6,0x00,0x08,0x0c,0x00,0x16,0xb6,
16900x00,0x00,0x00,0x00,0x02,0x40,0x20,0x21,0x00,0x00,0x28,0x21,0x00,0x00,0x30,0x21,
16910x00,0x00,0x38,0x21,0x0c,0x00,0x24,0x36,0xaf,0xa2,0x00,0x10,0x00,0x02,0x1e,0x00,
16920x14,0x60,0xfe,0x6b,0xa2,0x22,0x00,0x12,0x92,0x43,0x00,0x08,0x00,0x00,0x00,0x00,
16930x14,0x60,0x00,0x40,0x24,0x02,0x00,0x01,0xa2,0x40,0x00,0x04,0x92,0x28,0x00,0x04,
16940x00,0x00,0x00,0x00,0x15,0x00,0x00,0x19,0x24,0x02,0x00,0x01,0x92,0x27,0x00,0x0a,
16950xa2,0x22,0x00,0x17,0x92,0x22,0x00,0x17,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x10,
16960x00,0x00,0x00,0x00,0x96,0x22,0x00,0x06,0x00,0x00,0x00,0x00,0xa6,0x22,0x00,0x14,
16970x92,0x22,0x00,0x16,0x30,0xe3,0x00,0xff,0x30,0x42,0x00,0xc0,0x10,0x60,0x00,0x03,
16980xa2,0x22,0x00,0x16,0x34,0x42,0x00,0x01,0xa2,0x22,0x00,0x16,0x11,0x00,0xfe,0x50,
16990x00,0x00,0x00,0x00,0x92,0x22,0x00,0x16,0x08,0x00,0x18,0x33,0x34,0x42,0x00,0x02,
17000x96,0x22,0x00,0x00,0x08,0x00,0x19,0xdc,0xa6,0x22,0x00,0x14,0x92,0x27,0x00,0x0a,
17010x00,0x00,0x00,0x00,0x14,0xe0,0x00,0x03,0x00,0x00,0x00,0x00,0x08,0x00,0x19,0xd5,
17020xa2,0x20,0x00,0x17,0x96,0x24,0x00,0x00,0x96,0x25,0x00,0x06,0x27,0x86,0x99,0x40,
17030x00,0x04,0x18,0xc0,0x00,0x64,0x18,0x21,0x00,0x05,0x10,0xc0,0x00,0x45,0x10,0x21,
17040x00,0x03,0x18,0x80,0x00,0x66,0x18,0x21,0x00,0x02,0x10,0x80,0x00,0x46,0x10,0x21,
17050x8c,0x65,0x00,0x08,0x8c,0x44,0x00,0x08,0x3c,0x03,0x80,0x00,0x00,0xa3,0x30,0x24,
17060x10,0xc0,0x00,0x08,0x00,0x83,0x10,0x24,0x10,0x40,0x00,0x04,0x00,0x00,0x18,0x21,
17070x10,0xc0,0x00,0x02,0x24,0x03,0x00,0x01,0x00,0x85,0x18,0x2b,0x08,0x00,0x19,0xd5,
17080xa2,0x23,0x00,0x17,0x10,0x40,0xff,0xfd,0x00,0x85,0x18,0x2b,0x08,0x00,0x1a,0x04,
17090x00,0x00,0x00,0x00,0x10,0x62,0x00,0x09,0x24,0x02,0x00,0x02,0x10,0x62,0x00,0x05,
17100x24,0x02,0x00,0x03,0x14,0x62,0xff,0xbd,0x00,0x00,0x00,0x00,0x08,0x00,0x19,0xcf,
17110xa2,0x40,0x00,0x07,0x08,0x00,0x19,0xcf,0xa2,0x40,0x00,0x06,0x08,0x00,0x19,0xcf,
17120xa2,0x40,0x00,0x05,0x3c,0x02,0x80,0x00,0x00,0x82,0x30,0x24,0x10,0xc0,0x00,0x08,
17130x00,0xa2,0x18,0x24,0x10,0x60,0x00,0x04,0x00,0x00,0x10,0x21,0x10,0xc0,0x00,0x02,
17140x24,0x02,0x00,0x01,0x00,0xa4,0x10,0x2b,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
17150x10,0x60,0xff,0xfd,0x00,0xa4,0x10,0x2b,0x08,0x00,0x1a,0x1f,0x00,0x00,0x00,0x00,
17160x30,0x82,0xff,0xff,0x00,0x02,0x18,0xc0,0x00,0x62,0x18,0x21,0x27,0x84,0x99,0x50,
17170x00,0x03,0x18,0x80,0x00,0x64,0x18,0x21,0x80,0x66,0x00,0x06,0x00,0x02,0x12,0x00,
17180x3c,0x03,0xb0,0x00,0x00,0x46,0x10,0x21,0x00,0x45,0x10,0x21,0x03,0xe0,0x00,0x08,
17190x00,0x43,0x10,0x21,0x27,0xbd,0xff,0xe0,0x30,0x82,0x00,0x7c,0x30,0x84,0xff,0x00,
17200xaf,0xbf,0x00,0x1c,0xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,
17210x14,0x40,0x00,0x41,0x00,0x04,0x22,0x03,0x24,0x02,0x00,0x04,0x3c,0x10,0xb0,0x03,
17220x8e,0x10,0x00,0x00,0x10,0x82,0x00,0x32,0x24,0x02,0x00,0x08,0x10,0x82,0x00,0x03,
17230x32,0x02,0x00,0x20,0x08,0x00,0x1a,0x45,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x17,
17240x3c,0x02,0xb0,0x06,0x34,0x42,0x80,0x24,0x8c,0x43,0x00,0x00,0x00,0x00,0x00,0x00,
17250x30,0x67,0x00,0xff,0x10,0xe0,0x00,0x23,0x00,0x00,0x88,0x21,0x8f,0x85,0x99,0x20,
17260x00,0x40,0x30,0x21,0x94,0xa2,0x00,0x08,0x8c,0xc3,0x00,0x00,0x26,0x31,0x00,0x01,
17270x24,0x42,0x00,0x02,0x30,0x42,0x01,0xff,0x34,0x63,0x01,0x00,0x02,0x27,0x20,0x2a,
17280xa4,0xa2,0x00,0x08,0x14,0x80,0xff,0xf7,0xac,0xc3,0x00,0x00,0x84,0xa3,0x00,0x08,
17290x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x30,0xac,0x43,0x00,0x00,0x27,0x92,0xbd,0x40,
17300x24,0x11,0x00,0x12,0x8e,0x44,0x00,0x00,0x26,0x31,0xff,0xff,0x90,0x82,0x00,0x10,
17310x00,0x00,0x00,0x00,0x10,0x40,0x00,0x03,0x26,0x52,0x00,0x04,0x0c,0x00,0x20,0x9b,
17320x00,0x00,0x00,0x00,0x06,0x21,0xff,0xf7,0x24,0x02,0xff,0xdf,0x02,0x02,0x80,0x24,
17330x3c,0x01,0xb0,0x03,0x0c,0x00,0x1a,0xfd,0xac,0x30,0x00,0x00,0x08,0x00,0x1a,0x45,
17340x00,0x00,0x00,0x00,0x8f,0x85,0x99,0x20,0x08,0x00,0x1a,0x5b,0x00,0x00,0x00,0x00,
17350x24,0x02,0xff,0x95,0x3c,0x03,0xb0,0x03,0x02,0x02,0x80,0x24,0x34,0x63,0x00,0x30,
17360x3c,0x01,0xb0,0x03,0xac,0x30,0x00,0x00,0x0c,0x00,0x1a,0xc6,0xac,0x60,0x00,0x00,
17370x08,0x00,0x1a,0x45,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x50,
17380x08,0x00,0x1a,0x45,0xac,0x46,0x00,0x00,0xaf,0xa7,0x00,0x0c,0xaf,0xa4,0x00,0x00,
17390xaf,0xa5,0x00,0x04,0xaf,0xa6,0x00,0x08,0x27,0xbd,0xfe,0xe8,0x00,0x80,0x28,0x21,
17400x27,0xa6,0x01,0x1c,0x27,0xa4,0x00,0x10,0xaf,0xbf,0x01,0x14,0x0c,0x00,0x2e,0xe2,
17410xaf,0xb0,0x01,0x10,0x00,0x40,0x80,0x21,0x0c,0x00,0x1a,0x95,0x27,0xa4,0x00,0x10,
17420x02,0x00,0x10,0x21,0x8f,0xbf,0x01,0x14,0x8f,0xb0,0x01,0x10,0x03,0xe0,0x00,0x08,
17430x27,0xbd,0x01,0x18,0x93,0x83,0x87,0x6c,0x27,0xbd,0xff,0xe8,0xaf,0xb0,0x00,0x10,
17440xaf,0xbf,0x00,0x14,0x14,0x60,0x00,0x14,0x00,0x80,0x80,0x21,0x80,0x82,0x00,0x00,
17450x90,0x84,0x00,0x00,0x14,0x40,0x00,0x05,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x14,
17460x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x00,0x04,0x26,0x00,
17470x00,0x04,0x26,0x03,0x30,0x84,0xff,0xff,0x0c,0x00,0x1a,0xb5,0x26,0x10,0x00,0x01,
17480x92,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x60,0xff,0xf8,0x00,0x60,0x20,0x21,
17490x08,0x00,0x1a,0x9f,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x14,0x43,0xff,0xef,
17500x00,0x00,0x00,0x00,0x0c,0x00,0x05,0x52,0x00,0x00,0x00,0x00,0x08,0x00,0x1a,0x9f,
17510x00,0x00,0x00,0x00,0x30,0x84,0xff,0xff,0x48,0x84,0x00,0x00,0x03,0xe0,0x00,0x08,
17520x00,0x00,0x00,0x00,0x27,0xbd,0xff,0xe8,0xaf,0xbf,0x00,0x10,0x0c,0x00,0x2e,0x4a,
17530x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x10,0x00,0x02,0x14,0x00,0x00,0x02,0x14,0x03,
17540x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x03,0xe0,0x00,0x08,0x24,0x02,0x00,0x01,
17550x03,0xe0,0x00,0x08,0x24,0x02,0x00,0x01,0x3c,0x0a,0x80,0x00,0x25,0x4a,0x6b,0x18,
17560x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,0x3c,0x08,0x80,0x01,0x25,0x08,0x00,0x00,
17570x3c,0x09,0x80,0x01,0x25,0x29,0x0b,0x90,0x11,0x09,0x00,0x10,0x00,0x00,0x00,0x00,
17580x3c,0x0a,0x80,0x00,0x25,0x4a,0x6b,0x40,0x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,
17590x3c,0x08,0xb0,0x06,0x35,0x08,0x80,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
17600x8d,0x09,0x00,0x00,0x00,0x00,0x00,0x00,0x31,0x29,0x00,0x01,0x00,0x00,0x00,0x00,
17610x24,0x01,0x00,0x01,0x15,0x21,0xff,0xf2,0x00,0x00,0x00,0x00,0x3c,0x0a,0x80,0x00,
17620x25,0x4a,0x6b,0x7c,0x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,0x3c,0x02,0xb0,0x03,
17630x8c,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x34,0x63,0x00,0x40,0x00,0x00,0x00,0x00,
17640xac,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x3c,0x0a,0x80,0x00,0x25,0x4a,0x6b,0xa8,
17650x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,0x3c,0x02,0x80,0x01,0x24,0x42,0x00,0x00,
17660x3c,0x03,0x80,0x01,0x24,0x63,0x0b,0x90,0x3c,0x04,0xb0,0x00,0x8c,0x85,0x00,0x00,
17670x00,0x00,0x00,0x00,0xac,0x45,0x00,0x00,0x24,0x42,0x00,0x04,0x24,0x84,0x00,0x04,
17680x00,0x43,0x08,0x2a,0x14,0x20,0xff,0xf9,0x00,0x00,0x00,0x00,0x0c,0x00,0x1a,0xfd,
17690x00,0x00,0x00,0x00,0x3c,0x0a,0x80,0x00,0x25,0x4a,0x6b,0xf4,0x3c,0x0b,0xb0,0x03,
17700xad,0x6a,0x00,0x20,0x3c,0x02,0x80,0x01,0x24,0x42,0x0b,0x90,0x3c,0x03,0x80,0x01,
17710x24,0x63,0x48,0x64,0xac,0x40,0x00,0x00,0xac,0x40,0x00,0x04,0xac,0x40,0x00,0x08,
17720xac,0x40,0x00,0x0c,0x24,0x42,0x00,0x10,0x00,0x43,0x08,0x2a,0x14,0x20,0xff,0xf9,
17730x00,0x00,0x00,0x00,0x3c,0x0a,0x80,0x00,0x25,0x4a,0x6c,0x34,0x3c,0x0b,0xb0,0x03,
17740xad,0x6a,0x00,0x20,0x3c,0x1c,0x80,0x01,0x27,0x9c,0x7f,0xf0,0x27,0x9d,0x95,0x20,
17750x00,0x00,0x00,0x00,0x27,0x9d,0x99,0x08,0x3c,0x0a,0x80,0x00,0x25,0x4a,0x6c,0x58,
17760x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,0x40,0x80,0x68,0x00,0x40,0x08,0x60,0x00,
17770x00,0x00,0x00,0x00,0x35,0x08,0xff,0x01,0x40,0x88,0x60,0x00,0x00,0x00,0x00,0x00,
17780x0c,0x00,0x1d,0x43,0x00,0x00,0x00,0x00,0x24,0x84,0xf8,0x00,0x30,0x87,0x00,0x03,
17790x00,0x04,0x30,0x40,0x00,0xc7,0x20,0x23,0x3c,0x02,0xb0,0x0a,0x27,0xbd,0xff,0xe0,
17800x24,0x03,0xff,0xff,0x00,0x82,0x20,0x21,0xaf,0xb1,0x00,0x14,0xac,0x83,0x10,0x00,
17810xaf,0xbf,0x00,0x18,0xaf,0xb0,0x00,0x10,0x00,0xa0,0x88,0x21,0x24,0x03,0x00,0x01,
17820x8c,0x82,0x10,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x00,0xc7,0x10,0x23,
17830x3c,0x03,0xb0,0x0a,0x00,0x43,0x10,0x21,0x8c,0x50,0x00,0x00,0x0c,0x00,0x1b,0x7a,
17840x02,0x20,0x20,0x21,0x02,0x11,0x80,0x24,0x00,0x50,0x80,0x06,0x02,0x00,0x10,0x21,
17850x8f,0xbf,0x00,0x18,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,
17860x27,0xbd,0xff,0xd8,0xaf,0xb2,0x00,0x18,0x00,0xa0,0x90,0x21,0x24,0x05,0xff,0xff,
17870xaf,0xb3,0x00,0x1c,0xaf,0xbf,0x00,0x20,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,
17880x00,0xc0,0x98,0x21,0x12,0x45,0x00,0x23,0x24,0x84,0xf8,0x00,0x30,0x83,0x00,0x03,
17890x00,0x04,0x10,0x40,0x00,0x40,0x88,0x21,0x00,0x60,0x20,0x21,0x00,0x43,0x10,0x23,
17900x3c,0x03,0xb0,0x0a,0x00,0x43,0x10,0x21,0xac,0x45,0x10,0x00,0x00,0x40,0x18,0x21,
17910x24,0x05,0x00,0x01,0x8c,0x62,0x10,0x00,0x00,0x00,0x00,0x00,0x14,0x45,0xff,0xfd,
17920x3c,0x02,0xb0,0x0a,0x02,0x24,0x88,0x23,0x02,0x22,0x88,0x21,0x8e,0x30,0x00,0x00,
17930x0c,0x00,0x1b,0x7a,0x02,0x40,0x20,0x21,0x00,0x12,0x18,0x27,0x02,0x03,0x80,0x24,
17940x00,0x53,0x10,0x04,0x02,0x02,0x80,0x25,0xae,0x30,0x00,0x00,0x24,0x03,0x00,0x01,
17950x8e,0x22,0x10,0x00,0x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x00,0x00,0x00,0x00,
17960x8f,0xbf,0x00,0x20,0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,
17970x27,0xbd,0x00,0x28,0x30,0x82,0x00,0x03,0x00,0x04,0x18,0x40,0x00,0x62,0x18,0x23,
17980x3c,0x04,0xb0,0x0a,0x00,0x64,0x18,0x21,0xac,0x66,0x00,0x00,0x24,0x04,0x00,0x01,
17990x8c,0x62,0x10,0x00,0x00,0x00,0x00,0x00,0x14,0x44,0xff,0xfd,0x00,0x00,0x00,0x00,
18000x08,0x00,0x1b,0x68,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x21,0x00,0x64,0x10,0x06,
18010x30,0x42,0x00,0x01,0x14,0x40,0x00,0x05,0x00,0x00,0x00,0x00,0x24,0x63,0x00,0x01,
18020x2c,0x62,0x00,0x20,0x14,0x40,0xff,0xf9,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
18030x00,0x60,0x10,0x21,0x27,0xbd,0xff,0xe0,0x3c,0x03,0xb0,0x05,0xaf,0xb2,0x00,0x18,
18040xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x1c,0x00,0x80,0x90,0x21,
18050x00,0xa0,0x80,0x21,0x00,0xc0,0x88,0x21,0x34,0x63,0x02,0x2e,0x90,0x62,0x00,0x00,
18060x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,0x14,0x40,0xff,0xfc,0x24,0x04,0x08,0x24,
18070x3c,0x05,0x00,0xc0,0x0c,0x00,0x1b,0x40,0x24,0x06,0x00,0x03,0x24,0x04,0x08,0x34,
18080x3c,0x05,0x00,0xc0,0x0c,0x00,0x1b,0x40,0x24,0x06,0x00,0x03,0x3c,0x02,0xc0,0x00,
18090x00,0x10,0x1c,0x00,0x34,0x42,0x04,0x00,0x3c,0x04,0xb0,0x05,0x3c,0x05,0xb0,0x05,
18100x24,0x63,0x16,0x09,0x02,0x22,0x10,0x21,0x34,0x84,0x04,0x20,0x34,0xa5,0x04,0x24,
18110x3c,0x06,0xb0,0x05,0xac,0x83,0x00,0x00,0x24,0x07,0x00,0x01,0xac,0xa2,0x00,0x00,
18120x34,0xc6,0x02,0x28,0x24,0x02,0x00,0x20,0xae,0x47,0x00,0x3c,0x24,0x04,0x08,0x24,
18130xa0,0xc2,0x00,0x00,0x3c,0x05,0x00,0xc0,0xa2,0x47,0x00,0x11,0x0c,0x00,0x1b,0x40,
18140x24,0x06,0x00,0x01,0x24,0x04,0x08,0x34,0x3c,0x05,0x00,0xc0,0x0c,0x00,0x1b,0x40,
18150x24,0x06,0x00,0x01,0x8f,0xbf,0x00,0x1c,0x8f,0xb2,0x00,0x18,0x7b,0xb0,0x00,0xbc,
18160x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x24,0x02,0x00,0x06,0xac,0x82,0x00,0x0c,
18170xa0,0x80,0x00,0x50,0xac,0x80,0x00,0x00,0xac,0x80,0x00,0x04,0xac,0x80,0x00,0x08,
18180xac,0x80,0x00,0x14,0xac,0x80,0x00,0x18,0xac,0x80,0x00,0x1c,0xa4,0x80,0x00,0x20,
18190xac,0x80,0x00,0x24,0xac,0x80,0x00,0x28,0xac,0x80,0x00,0x2c,0xa0,0x80,0x00,0x30,
18200xa0,0x80,0x00,0x31,0xac,0x80,0x00,0x34,0xac,0x80,0x00,0x38,0xa0,0x80,0x00,0x3c,
18210xac,0x82,0x00,0x10,0xa0,0x80,0x00,0x44,0xac,0x80,0x00,0x48,0x03,0xe0,0x00,0x08,
18220xac,0x80,0x00,0x4c,0x3c,0x04,0xb0,0x06,0x34,0x84,0x80,0x00,0x8c,0x83,0x00,0x00,
18230x3c,0x02,0x12,0x00,0x3c,0x05,0xb0,0x03,0x00,0x62,0x18,0x25,0x34,0xa5,0x00,0x8b,
18240x24,0x02,0xff,0x80,0xac,0x83,0x00,0x00,0x03,0xe0,0x00,0x08,0xa0,0xa2,0x00,0x00,
18250x3c,0x04,0xb0,0x03,0x34,0x84,0x00,0x0b,0x24,0x02,0x00,0x22,0x3c,0x05,0xb0,0x01,
18260x3c,0x06,0x45,0x67,0x3c,0x0a,0xb0,0x09,0xa0,0x82,0x00,0x00,0x34,0xa5,0x00,0x04,
18270x34,0xc6,0x89,0xaa,0x35,0x4a,0x00,0x04,0x24,0x02,0x01,0x23,0x3c,0x0b,0xb0,0x09,
18280x3c,0x07,0x01,0x23,0x3c,0x0c,0xb0,0x09,0x3c,0x01,0xb0,0x01,0xac,0x20,0x00,0x00,
18290x27,0xbd,0xff,0xe0,0xac,0xa0,0x00,0x00,0x35,0x6b,0x00,0x08,0x3c,0x01,0xb0,0x09,
18300xac,0x26,0x00,0x00,0x34,0xe7,0x45,0x66,0xa5,0x42,0x00,0x00,0x35,0x8c,0x00,0x0c,
18310x24,0x02,0xcd,0xef,0x3c,0x0d,0xb0,0x09,0x3c,0x08,0xcd,0xef,0x3c,0x0e,0xb0,0x09,
18320xad,0x67,0x00,0x00,0xaf,0xb7,0x00,0x1c,0xa5,0x82,0x00,0x00,0xaf,0xb6,0x00,0x18,
18330xaf,0xb5,0x00,0x14,0xaf,0xb4,0x00,0x10,0xaf,0xb3,0x00,0x0c,0xaf,0xb2,0x00,0x08,
18340xaf,0xb1,0x00,0x04,0xaf,0xb0,0x00,0x00,0x35,0xad,0x00,0x10,0x35,0x08,0x01,0x22,
18350x35,0xce,0x00,0x14,0x24,0x02,0x89,0xab,0x3c,0x0f,0xb0,0x09,0x3c,0x09,0x89,0xab,
18360x3c,0x10,0xb0,0x09,0x3c,0x11,0xb0,0x09,0x3c,0x12,0xb0,0x09,0x3c,0x13,0xb0,0x09,
18370x3c,0x14,0xb0,0x09,0x3c,0x15,0xb0,0x09,0x3c,0x16,0xb0,0x09,0x3c,0x17,0xb0,0x09,
18380xad,0xa8,0x00,0x00,0x24,0x03,0xff,0xff,0xa5,0xc2,0x00,0x00,0x35,0xef,0x00,0x18,
18390x35,0x29,0xcd,0xee,0x36,0x10,0x00,0x1c,0x36,0x31,0x00,0x20,0x36,0x52,0x00,0x24,
18400x36,0x73,0x00,0x28,0x36,0x94,0x00,0x2c,0x36,0xb5,0x00,0x30,0x36,0xd6,0x00,0x34,
18410x36,0xf7,0x00,0x38,0x24,0x02,0x45,0x67,0xad,0xe9,0x00,0x00,0xa6,0x02,0x00,0x00,
18420xae,0x23,0x00,0x00,0x8f,0xb0,0x00,0x00,0xa6,0x43,0x00,0x00,0x8f,0xb1,0x00,0x04,
18430xae,0x63,0x00,0x00,0x8f,0xb2,0x00,0x08,0xa6,0x83,0x00,0x00,0x8f,0xb3,0x00,0x0c,
18440xae,0xa3,0x00,0x00,0x8f,0xb4,0x00,0x10,0xa6,0xc3,0x00,0x00,0x8f,0xb5,0x00,0x14,
18450xae,0xe3,0x00,0x00,0x7b,0xb6,0x00,0xfc,0x3c,0x18,0xb0,0x09,0x37,0x18,0x00,0x3c,
18460xa7,0x03,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x3c,0x03,0xb0,0x03,
18470x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,0x24,0x42,0x70,0xcc,0xac,0x62,0x00,0x00,
18480x8c,0x83,0x00,0x34,0x34,0x02,0xff,0xff,0x00,0x43,0x10,0x2a,0x14,0x40,0x01,0x04,
18490x00,0x80,0x28,0x21,0x8c,0x86,0x00,0x08,0x24,0x02,0x00,0x03,0x10,0xc2,0x00,0xf7,
18500x00,0x00,0x00,0x00,0x8c,0xa2,0x00,0x2c,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x4f,
18510x24,0x02,0x00,0x06,0x3c,0x03,0xb0,0x05,0x34,0x63,0x04,0x50,0x90,0x62,0x00,0x00,
18520x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,0x14,0x40,0x00,0xdd,0xac,0xa2,0x00,0x2c,
18530x24,0x02,0x00,0x01,0x10,0xc2,0x00,0xdc,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,
18540x10,0xc2,0x00,0xca,0x00,0x00,0x00,0x00,0x8c,0xa7,0x00,0x04,0x24,0x02,0x00,0x02,
18550x10,0xe2,0x00,0xc0,0x00,0x00,0x00,0x00,0x8c,0xa2,0x00,0x14,0x00,0x00,0x00,0x00,
18560x14,0x40,0x00,0x09,0x24,0x02,0x00,0x01,0x3c,0x03,0xb0,0x09,0x34,0x63,0x01,0x60,
18570x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,0x10,0x40,0x00,0x05,
18580xac,0xa2,0x00,0x14,0x24,0x02,0x00,0x01,0xac,0xa2,0x00,0x00,0x03,0xe0,0x00,0x08,
18590xac,0xa0,0x00,0x14,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0xd0,0x8c,0x43,0x00,0x00,
18600x00,0x00,0x00,0x00,0x04,0x61,0x00,0x19,0x3c,0x02,0xb0,0x03,0x3c,0x03,0xb0,0x05,
18610x34,0x63,0x02,0x2e,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,
18620x14,0x40,0x00,0x12,0x3c,0x02,0xb0,0x03,0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x42,
18630x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x60,0x00,0x0c,0x3c,0x02,0xb0,0x03,
18640x80,0xa2,0x00,0x50,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x08,0x3c,0x02,0xb0,0x03,
18650x14,0xc0,0x00,0x07,0x34,0x42,0x00,0x3f,0x24,0x02,0x00,0x0e,0x24,0x03,0x00,0x01,
18660xac,0xa2,0x00,0x00,0x03,0xe0,0x00,0x08,0xa0,0xa3,0x00,0x50,0x34,0x42,0x00,0x3f,
18670x90,0x44,0x00,0x00,0x24,0x03,0x00,0x01,0x10,0x64,0x00,0x7f,0x3c,0x03,0xb0,0x05,
18680x80,0xa2,0x00,0x31,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x0a,0x3c,0x02,0xb0,0x06,
18690x34,0x42,0x80,0x18,0x8c,0x43,0x00,0x00,0x3c,0x04,0xf0,0x00,0x3c,0x02,0x80,0x00,
18700x00,0x64,0x18,0x24,0x10,0x62,0x00,0x03,0x24,0x02,0x00,0x09,0x03,0xe0,0x00,0x08,
18710xac,0xa2,0x00,0x00,0x8c,0xa2,0x00,0x40,0x00,0x00,0x00,0x00,0x8c,0x43,0x00,0x00,
18720x00,0x00,0x00,0x00,0x10,0x60,0x00,0x09,0x3c,0x03,0xb0,0x03,0x3c,0x02,0xb0,0x05,
18730x34,0x42,0x02,0x2c,0x8c,0x43,0x00,0x00,0x3c,0x04,0x00,0x02,0x00,0x64,0x18,0x24,
18740x14,0x60,0xff,0xf2,0x24,0x02,0x00,0x10,0x3c,0x03,0xb0,0x03,0x34,0x63,0x02,0x01,
18750x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x80,0x10,0x40,0x00,0x0e,
18760x00,0x00,0x00,0x00,0x8c,0xa3,0x00,0x0c,0x00,0x00,0x00,0x00,0xac,0xa3,0x00,0x10,
18770x3c,0x02,0xb0,0x03,0x90,0x42,0x02,0x01,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x0f,
18780xac,0xa2,0x00,0x0c,0x90,0xa3,0x00,0x0f,0x24,0x02,0x00,0x0d,0x3c,0x01,0xb0,0x03,
18790x08,0x00,0x1c,0x93,0xa0,0x23,0x02,0x01,0x3c,0x02,0xb0,0x09,0x34,0x42,0x01,0x80,
18800x90,0x44,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x1e,0x00,0x00,0x03,0x1e,0x03,
18810x10,0x60,0x00,0x15,0xa0,0xa4,0x00,0x44,0x24,0x02,0x00,0x01,0x10,0x62,0x00,0x0b,
18820x24,0x02,0x00,0x02,0x10,0x62,0x00,0x03,0x24,0x03,0x00,0x0d,0x03,0xe0,0x00,0x08,
18830x00,0x00,0x00,0x00,0x8c,0xa2,0x00,0x0c,0xac,0xa3,0x00,0x00,0x24,0x03,0x00,0x04,
18840xac,0xa2,0x00,0x10,0x03,0xe0,0x00,0x08,0xac,0xa3,0x00,0x0c,0x24,0x02,0x00,0x0d,
18850xac,0xa2,0x00,0x00,0x24,0x03,0x00,0x04,0x24,0x02,0x00,0x06,0xac,0xa3,0x00,0x10,
18860x03,0xe0,0x00,0x08,0xac,0xa2,0x00,0x0c,0x8c,0xa3,0x00,0x38,0x24,0x04,0x00,0x01,
18870x10,0x64,0x00,0x2d,0x24,0x02,0x00,0x02,0x10,0x60,0x00,0x19,0x00,0x00,0x00,0x00,
18880x10,0x62,0x00,0x10,0x24,0x02,0x00,0x04,0x10,0x62,0x00,0x04,0x00,0x00,0x00,0x00,
18890xac,0xa0,0x00,0x38,0x03,0xe0,0x00,0x08,0xac,0xa0,0x00,0x00,0x10,0xe4,0x00,0x07,
18900x24,0x02,0x00,0x03,0x80,0xa2,0x00,0x30,0x00,0x00,0x00,0x00,0x00,0x02,0x18,0x0b,
18910xac,0xa3,0x00,0x00,0x03,0xe0,0x00,0x08,0xac,0xa0,0x00,0x38,0x08,0x00,0x1c,0xe5,
18920xac,0xa2,0x00,0x00,0x10,0xe4,0x00,0x02,0x24,0x02,0x00,0x03,0x24,0x02,0x00,0x0c,
18930xac,0xa2,0x00,0x00,0x24,0x02,0x00,0x04,0x03,0xe0,0x00,0x08,0xac,0xa2,0x00,0x38,
18940x10,0xe4,0x00,0x0e,0x3c,0x03,0xb0,0x06,0x34,0x63,0x80,0x24,0x8c,0x62,0x00,0x00,
18950x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,0x10,0x40,0x00,0x06,0xac,0xa2,0x00,0x18,
18960x24,0x02,0x00,0x02,0xac,0xa2,0x00,0x00,0xac,0xa0,0x00,0x18,0x08,0x00,0x1c,0xee,
18970x24,0x02,0x00,0x01,0x08,0x00,0x1c,0xfb,0xac,0xa0,0x00,0x00,0x24,0x02,0x00,0x03,
18980x08,0x00,0x1c,0xfb,0xac,0xa2,0x00,0x00,0x24,0x03,0x00,0x0b,0xac,0xa2,0x00,0x38,
18990x03,0xe0,0x00,0x08,0xac,0xa3,0x00,0x00,0x34,0x63,0x02,0x2e,0x90,0x62,0x00,0x00,
19000x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,0x14,0x40,0xff,0x7d,0x3c,0x02,0xb0,0x05,
19010x34,0x42,0x02,0x42,0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x60,0xff,0x78,
19020x00,0x00,0x00,0x00,0x10,0xc0,0xff,0x81,0x24,0x02,0x00,0x0e,0x08,0x00,0x1c,0x88,
19030x00,0x00,0x00,0x00,0x80,0xa2,0x00,0x30,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0x3e,
19040x24,0x02,0x00,0x04,0x08,0x00,0x1c,0x93,0x00,0x00,0x00,0x00,0x84,0xa2,0x00,0x20,
19050x00,0x00,0x00,0x00,0x10,0x40,0xff,0x75,0x24,0x02,0x00,0x06,0x3c,0x02,0xb0,0x05,
19060x34,0x42,0x02,0x2e,0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x01,
19070x30,0x63,0x00,0xff,0x00,0x60,0x10,0x21,0x14,0x40,0xff,0x2b,0xa4,0xa3,0x00,0x20,
19080x08,0x00,0x1c,0x93,0x24,0x02,0x00,0x06,0x8c,0xa2,0x00,0x1c,0x00,0x00,0x00,0x00,
19090x14,0x40,0xff,0x66,0x24,0x02,0x00,0x05,0x3c,0x03,0xb0,0x05,0x34,0x63,0x02,0x2c,
19100x8c,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,0x10,0x40,0xff,0x1b,
19110xac,0xa2,0x00,0x1c,0x08,0x00,0x1c,0x93,0x24,0x02,0x00,0x05,0x3c,0x02,0xb0,0x05,
19120x8c,0x42,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x17,0x42,0x30,0x42,0x00,0x01,
19130x14,0x40,0xff,0x56,0x24,0x02,0x00,0x06,0x08,0x00,0x1c,0x41,0x00,0x00,0x00,0x00,
19140x24,0x02,0x00,0x0a,0x03,0xe0,0x00,0x08,0xac,0x82,0x00,0x00,0x27,0xbd,0xff,0xc8,
19150xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0x27,0x91,0x91,0xf8,0x27,0x90,0x8f,0x38,
19160xaf,0xbf,0x00,0x30,0xaf,0xb7,0x00,0x2c,0xaf,0xb6,0x00,0x28,0xaf,0xb5,0x00,0x24,
19170xaf,0xb4,0x00,0x20,0xaf,0xb3,0x00,0x1c,0x0c,0x00,0x2d,0xd7,0xaf,0xb2,0x00,0x18,
19180x0c,0x00,0x07,0x90,0x00,0x00,0x00,0x00,0xaf,0x91,0x95,0x10,0xaf,0x90,0x99,0x20,
19190x48,0x02,0x00,0x00,0x0c,0x00,0x1b,0xd1,0x00,0x00,0x00,0x00,0x0c,0x00,0x1f,0xea,
19200x02,0x00,0x20,0x21,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x3a,0x94,0x43,0x00,0x00,
19210x3a,0x54,0xff,0xff,0xa3,0x83,0x99,0x24,0x0c,0x00,0x00,0x34,0x02,0x80,0xa8,0x21,
19220x0c,0x00,0x1b,0xdc,0x02,0x80,0xb0,0x21,0x27,0x84,0x8d,0x78,0x0c,0x00,0x32,0xfa,
19230x02,0x80,0xb8,0x21,0x93,0x84,0x80,0x10,0x0c,0x00,0x29,0x03,0x00,0x00,0x00,0x00,
19240x0c,0x00,0x0e,0x8a,0x02,0x20,0x20,0x21,0x0c,0x00,0x01,0x39,0x00,0x00,0x00,0x00,
19250x27,0x84,0x8d,0x20,0x0c,0x00,0x1b,0xba,0x00,0x00,0x00,0x00,0x27,0x82,0x92,0x2c,
19260xaf,0x82,0x8d,0x60,0x0c,0x00,0x00,0x5f,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,
19270x34,0x63,0x01,0x08,0x3c,0x04,0xb0,0x09,0x3c,0x05,0xb0,0x09,0x8c,0x66,0x00,0x00,
19280x34,0x84,0x01,0x68,0x24,0x02,0xc8,0x80,0x34,0xa5,0x01,0x40,0x24,0x03,0x00,0x0a,
19290xa4,0x82,0x00,0x00,0xa4,0xa3,0x00,0x00,0x3c,0x04,0xb0,0x03,0x8c,0x82,0x00,0x00,
19300xaf,0x86,0x8d,0x18,0x34,0x42,0x00,0x20,0xac,0x82,0x00,0x00,0x0c,0x00,0x07,0xa1,
19310x00,0x00,0x00,0x00,0x3c,0x04,0xb0,0x05,0x0c,0x00,0x2d,0xef,0x34,0x84,0x00,0x04,
19320x8f,0x83,0x8d,0x20,0x00,0x00,0x00,0x00,0x2c,0x62,0x00,0x11,0x10,0x40,0xff,0xf7,
19330x00,0x03,0x10,0x80,0x3c,0x03,0x80,0x01,0x24,0x63,0x08,0xac,0x00,0x43,0x10,0x21,
19340x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x08,0x00,0x00,0x00,0x00,
19350x27,0x84,0x8d,0x78,0x0c,0x00,0x32,0x2f,0x00,0x00,0x00,0x00,0x27,0x84,0x8d,0x20,
19360x0c,0x00,0x1c,0x33,0x00,0x00,0x00,0x00,0x93,0x83,0x88,0x6d,0x24,0x02,0x00,0x01,
19370x10,0x62,0x00,0x07,0x00,0x00,0x00,0x00,0x8f,0x82,0x8d,0x54,0x00,0x00,0x00,0x00,
19380x24,0x42,0x00,0x01,0xaf,0x82,0x8d,0x54,0x08,0x00,0x1d,0x83,0x00,0x00,0x00,0x00,
19390x27,0x84,0x8d,0x78,0x0c,0x00,0x32,0xae,0x00,0x00,0x00,0x00,0x08,0x00,0x1d,0x9e,
19400x00,0x00,0x00,0x00,0x27,0x84,0x8d,0x78,0x0c,0x00,0x34,0x90,0x00,0x00,0x00,0x00,
19410xa3,0x82,0x8d,0x51,0xaf,0x80,0x8d,0x20,0x08,0x00,0x1d,0x9e,0x00,0x00,0x00,0x00,
19420x27,0x84,0x8f,0x38,0x0c,0x00,0x21,0x26,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,
19430x14,0x40,0x00,0x05,0x3c,0x03,0xb0,0x05,0xaf,0x80,0x8d,0x20,0xaf,0x80,0x8d,0x24,
19440x08,0x00,0x1d,0x9e,0x00,0x00,0x00,0x00,0x34,0x63,0x04,0x50,0x90,0x62,0x00,0x00,
19450x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,0xaf,0x82,0x8d,0x4c,0x14,0x40,0x00,0x1e,
19460x24,0x02,0x00,0x01,0x8f,0x84,0x8d,0x28,0x00,0x00,0x00,0x00,0x10,0x82,0x00,0x1d,
19470x3c,0x03,0xb0,0x09,0x34,0x63,0x01,0x60,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
19480x30,0x42,0x00,0xff,0xaf,0x82,0x8d,0x34,0x14,0x40,0x00,0x13,0x24,0x02,0x00,0x01,
19490x24,0x02,0x00,0x02,0x10,0x82,0x00,0x07,0x3c,0x02,0xb0,0x05,0x24,0x02,0x00,0x01,
19500x24,0x03,0x00,0x03,0xaf,0x82,0x8d,0x24,0xaf,0x83,0x8d,0x20,0x08,0x00,0x1d,0x9e,
19510x00,0x00,0x00,0x00,0x34,0x42,0x02,0x2e,0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,
19520x30,0x63,0x00,0x01,0x30,0x63,0x00,0xff,0x00,0x60,0x10,0x21,0xa7,0x83,0x8d,0x40,
19530x14,0x40,0xff,0xf3,0x24,0x02,0x00,0x01,0xaf,0x82,0x8d,0x24,0x08,0x00,0x1d,0xad,
19540x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x05,0x34,0x63,0x02,0x2c,0x8c,0x62,0x00,0x00,
19550x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,0xaf,0x82,0x8d,0x3c,0x14,0x40,0xff,0xf6,
19560x24,0x02,0x00,0x01,0x08,0x00,0x1d,0xc5,0x3c,0x03,0xb0,0x09,0x27,0x84,0x8f,0x38,
19570x0c,0x00,0x22,0x9f,0x00,0x00,0x00,0x00,0x83,0x82,0x8d,0x50,0x00,0x00,0x00,0x00,
19580x14,0x40,0xff,0xed,0x24,0x02,0x00,0x02,0x3c,0x03,0xb0,0x05,0x34,0x63,0x04,0x50,
19590x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,0xaf,0x82,0x8d,0x4c,
19600x14,0x40,0xff,0xe5,0x24,0x02,0x00,0x02,0x8f,0x84,0x8d,0x28,0x24,0x02,0x00,0x01,
19610x10,0x82,0x00,0x12,0x24,0x02,0x00,0x02,0x10,0x82,0x00,0x05,0x3c,0x02,0xb0,0x05,
19620x24,0x02,0x00,0x02,0xaf,0x82,0x8d,0x24,0x08,0x00,0x1d,0xd2,0x24,0x03,0x00,0x04,
19630x34,0x42,0x02,0x2e,0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x01,
19640x30,0x63,0x00,0xff,0x00,0x60,0x10,0x21,0xa7,0x83,0x8d,0x40,0x14,0x40,0xff,0xf4,
19650x00,0x00,0x00,0x00,0x08,0x00,0x1d,0xde,0x24,0x02,0x00,0x02,0x3c,0x03,0xb0,0x05,
19660x34,0x63,0x02,0x2c,0x8c,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,
19670xaf,0x82,0x8d,0x3c,0x14,0x40,0xff,0xf7,0x00,0x00,0x00,0x00,0x08,0x00,0x1d,0xfe,
19680x24,0x02,0x00,0x02,0x27,0x84,0x91,0xf8,0x0c,0x00,0x12,0xf2,0x00,0x00,0x00,0x00,
19690x8f,0x83,0x8d,0x24,0xaf,0x82,0x8d,0x3c,0x38,0x64,0x00,0x02,0x00,0x04,0x18,0x0a,
19700xaf,0x83,0x8d,0x24,0x14,0x40,0x00,0x1f,0x24,0x02,0x00,0x05,0x8f,0x82,0x92,0x38,
19710xaf,0x80,0x8d,0x20,0x10,0x40,0x00,0x02,0x24,0x04,0x00,0x01,0xaf,0x84,0x8d,0x28,
19720x93,0x82,0x92,0x46,0x00,0x00,0x00,0x00,0x10,0x40,0xff,0x73,0x3c,0x02,0xb0,0x05,
19730x34,0x42,0x00,0x08,0x8c,0x43,0x00,0x00,0x3c,0x04,0x20,0x00,0x00,0x64,0x18,0x24,
19740x10,0x60,0xff,0x6d,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0xa0,0x8c,0x43,0x00,0x00,
19750x3c,0x04,0x80,0x00,0xaf,0x80,0x92,0x20,0x24,0x63,0x00,0x01,0xac,0x43,0x00,0x00,
19760x3c,0x01,0xb0,0x05,0xac,0x24,0x00,0x08,0xaf,0x80,0x92,0x1c,0xaf,0x80,0x92,0x24,
19770xaf,0x80,0x92,0x28,0xaf,0x80,0x92,0x34,0xaf,0x80,0x92,0x2c,0x08,0x00,0x1d,0x9e,
19780x00,0x00,0x00,0x00,0xaf,0x82,0x8d,0x20,0x08,0x00,0x1d,0x9e,0x00,0x00,0x00,0x00,
19790x83,0x82,0x8d,0x70,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x02,0x24,0x02,0x00,0x20,
19800xaf,0x82,0x8d,0x3c,0x8f,0x85,0x8d,0x3c,0x27,0x84,0x91,0xf8,0x0c,0x00,0x14,0xcd,
19810x00,0x00,0x00,0x00,0x00,0x02,0x1e,0x00,0xa3,0x82,0x8d,0x50,0xaf,0x80,0x8d,0x3c,
19820x10,0x60,0xff,0x5c,0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x2e,0x90,0x43,0x00,0x00,
19830x00,0x00,0x00,0x00,0x30,0x63,0x00,0x01,0x30,0x63,0x00,0xff,0x00,0x60,0x10,0x21,
19840xa7,0x83,0x8d,0x40,0x10,0x40,0xff,0xe7,0x24,0x02,0x00,0x06,0x24,0x04,0x00,0x02,
19850xaf,0x84,0x8d,0x28,0x08,0x00,0x1d,0xad,0x00,0x00,0x00,0x00,0x27,0x84,0x8d,0x20,
19860x27,0x85,0x91,0xf8,0x0c,0x00,0x15,0x9a,0x00,0x00,0x00,0x00,0x8f,0x82,0x8d,0x44,
19870xaf,0x80,0x8d,0x4c,0x14,0x40,0x00,0x1a,0x00,0x40,0x18,0x21,0x8f,0x82,0x8d,0x48,
19880x00,0x00,0x00,0x00,0x14,0x40,0x00,0x16,0x24,0x02,0x00,0x02,0x8f,0x83,0x8d,0x28,
19890x00,0x00,0x00,0x00,0x10,0x62,0x00,0x0b,0x24,0x02,0x00,0x01,0x8f,0x83,0x8d,0x24,
19900x00,0x00,0x00,0x00,0x10,0x62,0x00,0x02,0x24,0x02,0x00,0x03,0x24,0x02,0x00,0x06,
19910xaf,0x82,0x8d,0x20,0x24,0x04,0x00,0x03,0xaf,0x84,0x8d,0x28,0x08,0x00,0x1d,0x9e,
19920x00,0x00,0x00,0x00,0x3c,0x02,0x40,0x00,0x34,0x42,0x00,0x14,0x3c,0x01,0xb0,0x05,
19930xac,0x22,0x00,0x00,0xaf,0x80,0x8d,0x20,0x08,0x00,0x1e,0x76,0x24,0x04,0x00,0x03,
19940x10,0x60,0x00,0x10,0x00,0x00,0x00,0x00,0x27,0x84,0x8d,0x20,0x27,0x85,0x91,0xf8,
19950x0c,0x00,0x15,0xbe,0x00,0x00,0x00,0x00,0x8f,0x83,0x8d,0x24,0x24,0x02,0x00,0x01,
19960xa3,0x80,0x8d,0x50,0xaf,0x80,0x8d,0x28,0x10,0x62,0x00,0x02,0x24,0x02,0x00,0x03,
19970x24,0x02,0x00,0x04,0xaf,0x82,0x8d,0x20,0xaf,0x80,0x8d,0x44,0x08,0x00,0x1d,0x9e,
19980x00,0x00,0x00,0x00,0x83,0x82,0x8d,0x70,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x04,
19990x00,0x00,0x00,0x00,0x27,0x84,0x91,0xf8,0x0c,0x00,0x18,0x06,0x00,0x00,0x00,0x00,
20000x8f,0x82,0x8d,0x24,0xa3,0x80,0x8d,0x50,0xaf,0x80,0x8d,0x20,0xaf,0x80,0x8d,0x28,
20010x14,0x40,0x00,0x02,0x24,0x02,0x00,0x02,0xaf,0x82,0x8d,0x24,0xaf,0x80,0x8d,0x48,
20020x08,0x00,0x1d,0x9e,0x00,0x00,0x00,0x00,0x27,0x84,0x8d,0x20,0x27,0x85,0x91,0xf8,
20030x0c,0x00,0x15,0xbe,0x00,0x00,0x00,0x00,0x8f,0x82,0x8d,0x24,0xa3,0x80,0x8d,0x50,
20040xaf,0x80,0x8d,0x20,0xaf,0x80,0x8d,0x28,0x14,0x40,0xfe,0xf3,0x24,0x02,0x00,0x02,
20050xaf,0x82,0x8d,0x24,0x08,0x00,0x1d,0x9e,0x00,0x00,0x00,0x00,0x27,0x84,0x91,0xf8,
20060x0c,0x00,0x18,0x06,0x00,0x00,0x00,0x00,0x08,0x00,0x1e,0xa6,0x00,0x00,0x00,0x00,
20070x27,0x84,0x8d,0x78,0x0c,0x00,0x35,0x26,0x00,0x00,0x00,0x00,0x08,0x00,0x1d,0xac,
20080x00,0x00,0x00,0x00,0x0c,0x00,0x2b,0xc9,0x00,0x00,0x00,0x00,0x0c,0x00,0x32,0xa0,
20090x00,0x00,0x00,0x00,0x0c,0x00,0x1f,0xdc,0x00,0x00,0x00,0x00,0x93,0x83,0xc5,0x58,
20100x00,0x00,0x00,0x00,0x14,0x60,0x00,0x1c,0x3c,0x02,0xb0,0x03,0x34,0x42,0x01,0x08,
20110x8c,0x44,0x00,0x00,0x8f,0x83,0xc5,0x50,0x8f,0x82,0xc5,0x54,0x00,0x83,0x18,0x23,
20120x00,0x43,0x10,0x2b,0x10,0x40,0x00,0x14,0x2e,0xa3,0x00,0x01,0x2e,0x82,0x00,0x01,
20130x00,0x43,0x10,0x25,0x2e,0xc4,0x00,0x01,0x00,0x44,0x10,0x25,0x2e,0xe3,0x00,0x01,
20140x3c,0x05,0xb0,0x03,0x00,0x43,0x10,0x25,0x34,0xa5,0x01,0x18,0x8c,0xa3,0x00,0x00,
20150x14,0x40,0x00,0x02,0x24,0x04,0x00,0x02,0x00,0x00,0x20,0x21,0x0c,0x00,0x0b,0x7e,
20160x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x34,0x42,0x01,0x08,0x8c,0x43,0x00,0x00,
20170x00,0x00,0x00,0x00,0xaf,0x83,0xc5,0x50,0x0c,0x00,0x01,0xe9,0x00,0x00,0x00,0x00,
20180xaf,0x80,0x8d,0x20,0xaf,0x80,0x8d,0x54,0x08,0x00,0x1d,0x83,0x00,0x00,0x00,0x00,
20190x27,0x90,0xbd,0x40,0x24,0x11,0x00,0x12,0x8e,0x04,0x00,0x00,0x00,0x00,0x00,0x00,
20200x90,0x82,0x00,0x10,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x03,0x00,0x00,0x00,0x00,
20210x0c,0x00,0x20,0x9b,0x00,0x00,0x00,0x00,0x26,0x31,0xff,0xff,0x06,0x21,0xff,0xf6,
20220x26,0x10,0x00,0x04,0x08,0x00,0x1d,0xad,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,
20230x34,0x42,0x01,0x08,0x8c,0x44,0x00,0x00,0x8f,0x82,0x8d,0x18,0x00,0x04,0x19,0xc2,
20240x00,0x02,0x11,0xc2,0x10,0x62,0xfe,0xb3,0x3c,0x02,0xb0,0x03,0x34,0x42,0x01,0x02,
20250x90,0x43,0x00,0x00,0x3c,0x12,0xb0,0x05,0xaf,0x84,0x8d,0x18,0x30,0x63,0x00,0xff,
20260x00,0x03,0x11,0x40,0x00,0x43,0x10,0x23,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,
20270x00,0x02,0x99,0x00,0x00,0x00,0x88,0x21,0x36,0x52,0x02,0x2c,0x27,0x90,0xbd,0x40,
20280x8e,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x90,0x83,0x00,0x16,0x00,0x00,0x00,0x00,
20290x30,0x62,0x00,0x03,0x10,0x40,0x00,0x06,0x30,0x62,0x00,0x1c,0x14,0x40,0x00,0x04,
20300x00,0x00,0x00,0x00,0x8f,0x85,0x8d,0x18,0x0c,0x00,0x26,0x58,0x02,0x60,0x30,0x21,
20310x8e,0x42,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,0x14,0x40,0xfe,0x95,
20320x00,0x00,0x00,0x00,0x26,0x31,0x00,0x01,0x2a,0x22,0x00,0x13,0x14,0x40,0xff,0xec,
20330x26,0x10,0x00,0x04,0x08,0x00,0x1d,0xad,0x00,0x00,0x00,0x00,0x8f,0x84,0x8d,0x2c,
20340x27,0x85,0x91,0xf8,0x0c,0x00,0x1f,0x6f,0x00,0x00,0x00,0x00,0x8f,0x83,0x8d,0x2c,
20350x24,0x02,0x00,0x04,0x14,0x62,0xfe,0x87,0x24,0x02,0x00,0x05,0x08,0x00,0x1e,0x41,
20360x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x3f,0x90,0x44,0x00,0x00,
20370x24,0x03,0x00,0x01,0x10,0x64,0x00,0x06,0x3c,0x02,0xb0,0x03,0x27,0x84,0x91,0xf8,
20380x0c,0x00,0x2b,0xf0,0x00,0x00,0x00,0x00,0x08,0x00,0x1d,0xd2,0x24,0x03,0x00,0x05,
20390x34,0x42,0x00,0x14,0x8c,0x44,0x00,0x00,0x0c,0x00,0x2c,0x0d,0x00,0x00,0x00,0x00,
20400x08,0x00,0x1d,0xd2,0x24,0x03,0x00,0x05,0x8f,0x82,0x92,0x2c,0x00,0x00,0x00,0x00,
20410x10,0x40,0x00,0x0d,0x00,0x00,0x00,0x00,0x8f,0x84,0xbd,0x80,0xaf,0x80,0x92,0x2c,
20420x94,0x85,0x00,0x14,0x0c,0x00,0x23,0x34,0x00,0x00,0x00,0x00,0x93,0x82,0x94,0x51,
20430x00,0x00,0x00,0x00,0x30,0x42,0x00,0x02,0x10,0x40,0x00,0x03,0x00,0x00,0x00,0x00,
20440x0c,0x00,0x01,0x57,0x00,0x00,0x20,0x21,0x8f,0x84,0xbd,0x80,0x0c,0x00,0x20,0x9b,
20450x00,0x00,0x00,0x00,0x08,0x00,0x1d,0xad,0x00,0x00,0x00,0x00,0x3c,0x02,0xff,0x90,
20460x27,0xbd,0xff,0xe8,0x00,0x80,0x18,0x21,0x34,0x42,0x00,0x01,0x27,0x84,0x91,0xf8,
20470x10,0x62,0x00,0x05,0xaf,0xbf,0x00,0x10,0x8f,0xbf,0x00,0x10,0x00,0x00,0x00,0x00,
20480x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x0c,0x00,0x0e,0x8a,0x00,0x00,0x00,0x00,
20490x27,0x84,0x8f,0x38,0x0c,0x00,0x1f,0xea,0x00,0x00,0x00,0x00,0x27,0x84,0x8d,0x20,
20500x0c,0x00,0x1b,0xba,0x00,0x00,0x00,0x00,0x08,0x00,0x1f,0x56,0x00,0x00,0x00,0x00,
20510x8f,0x82,0x92,0x38,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x05,0x00,0x00,0x18,0x21,
20520x8f,0x82,0x8d,0x28,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x02,0x00,0x00,0x00,0x00,
20530x24,0x03,0x00,0x01,0x03,0xe0,0x00,0x08,0x00,0x60,0x10,0x21,0x27,0xbd,0xff,0xe0,
20540x3c,0x06,0xb0,0x03,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0x34,0xc6,0x00,0x5f,
20550xaf,0xbf,0x00,0x18,0x90,0xc3,0x00,0x00,0x3c,0x07,0xb0,0x03,0x34,0xe7,0x00,0x5d,
20560x34,0x63,0x00,0x01,0x3c,0x09,0xb0,0x03,0x24,0x02,0x00,0x01,0xa0,0xc3,0x00,0x00,
20570x00,0x80,0x80,0x21,0xa0,0xe2,0x00,0x00,0x00,0xa0,0x88,0x21,0x35,0x29,0x00,0x5e,
20580x00,0xe0,0x40,0x21,0x24,0x04,0x00,0x01,0x91,0x22,0x00,0x00,0x91,0x03,0x00,0x00,
20590x30,0x42,0x00,0x01,0x14,0x83,0x00,0x03,0x30,0x42,0x00,0x01,0x14,0x40,0xff,0xfa,
20600x00,0x00,0x00,0x00,0x24,0x02,0x00,0x04,0x12,0x02,0x00,0x2c,0x24,0x05,0x0f,0x00,
20610x24,0x02,0x00,0x06,0x12,0x02,0x00,0x08,0x24,0x05,0x00,0x0f,0x3c,0x02,0xb0,0x03,
20620x34,0x42,0x02,0x00,0xa0,0x50,0x00,0x00,0x8f,0xbf,0x00,0x18,0x7b,0xb0,0x00,0xbc,
20630x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x24,0x04,0x0c,0x04,0x0c,0x00,0x1b,0x40,
20640x24,0x06,0x00,0x0f,0x24,0x04,0x0d,0x04,0x24,0x05,0x00,0x0f,0x0c,0x00,0x1b,0x40,
20650x24,0x06,0x00,0x0f,0x24,0x04,0x08,0x80,0x24,0x05,0x1e,0x00,0x0c,0x00,0x1b,0x40,
20660x24,0x06,0x00,0x0f,0x24,0x04,0x08,0x8c,0x24,0x05,0x0f,0x00,0x0c,0x00,0x1b,0x40,
20670x24,0x06,0x00,0x0f,0x24,0x04,0x08,0x24,0x3c,0x05,0x00,0x30,0x0c,0x00,0x1b,0x40,
20680x24,0x06,0x00,0x02,0x24,0x04,0x08,0x2c,0x3c,0x05,0x00,0x30,0x0c,0x00,0x1b,0x40,
20690x24,0x06,0x00,0x02,0x24,0x04,0x08,0x34,0x3c,0x05,0x00,0x30,0x0c,0x00,0x1b,0x40,
20700x24,0x06,0x00,0x02,0x24,0x04,0x08,0x3c,0x3c,0x05,0x00,0x30,0x0c,0x00,0x1b,0x40,
20710x24,0x06,0x00,0x02,0x08,0x00,0x1f,0x90,0x3c,0x02,0xb0,0x03,0x24,0x04,0x08,0x8c,
20720x0c,0x00,0x1b,0x40,0x24,0x06,0x00,0x04,0x24,0x04,0x08,0x80,0x24,0x05,0x1e,0x00,
20730x0c,0x00,0x1b,0x40,0x24,0x06,0x00,0x04,0x24,0x04,0x0c,0x04,0x24,0x05,0x00,0x0f,
20740x0c,0x00,0x1b,0x40,0x24,0x06,0x00,0x04,0x24,0x04,0x0d,0x04,0x24,0x05,0x00,0x0f,
20750x0c,0x00,0x1b,0x40,0x24,0x06,0x00,0x04,0x24,0x04,0x08,0x24,0x3c,0x05,0x00,0x30,
20760x0c,0x00,0x1b,0x40,0x24,0x06,0x00,0x03,0x24,0x04,0x08,0x2c,0x3c,0x05,0x00,0x30,
20770x0c,0x00,0x1b,0x40,0x24,0x06,0x00,0x03,0x24,0x04,0x08,0x34,0x3c,0x05,0x00,0x30,
20780x0c,0x00,0x1b,0x40,0x24,0x06,0x00,0x02,0x3c,0x05,0x00,0x30,0x24,0x06,0x00,0x03,
20790x0c,0x00,0x1b,0x40,0x24,0x04,0x08,0x3c,0x02,0x20,0x20,0x21,0x24,0x05,0x00,0x14,
20800x0c,0x00,0x1b,0x85,0x24,0x06,0x01,0x07,0x08,0x00,0x1f,0x90,0x3c,0x02,0xb0,0x03,
20810x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x73,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
20820x30,0x42,0x00,0x02,0x14,0x40,0x00,0x04,0x00,0x00,0x00,0x00,0xa3,0x80,0x87,0x6d,
20830x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0xa3,0x82,0x87,0x6d,
20840x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,
20850x00,0x80,0x70,0x21,0x34,0x63,0x00,0x20,0x24,0x42,0x7f,0xa8,0x3c,0x04,0xb0,0x03,
20860xac,0x62,0x00,0x00,0x34,0x84,0x00,0x30,0xad,0xc0,0x02,0xb8,0x8c,0x83,0x00,0x00,
20870x24,0x02,0x00,0xff,0xa5,0xc0,0x00,0x0a,0x00,0x00,0x30,0x21,0xa7,0x82,0x99,0x30,
20880x27,0x88,0x99,0x40,0xa5,0xc3,0x00,0x08,0x3c,0x07,0xb0,0x08,0x30,0xc2,0xff,0xff,
20890x00,0x02,0x20,0xc0,0x24,0xc3,0x00,0x01,0x00,0x82,0x10,0x21,0x00,0x60,0x30,0x21,
20900x00,0x02,0x10,0x80,0x30,0x63,0xff,0xff,0x00,0x48,0x10,0x21,0x00,0x87,0x20,0x21,
20910x28,0xc5,0x00,0xff,0xac,0x83,0x00,0x00,0x14,0xa0,0xff,0xf4,0xa4,0x43,0x00,0x00,
20920x3c,0x02,0xb0,0x08,0x34,0x03,0xff,0xff,0x25,0xc4,0x00,0x0c,0x24,0x0a,0x00,0x02,
20930x34,0x42,0x07,0xf8,0x3c,0x06,0xb0,0x03,0xa7,0x83,0xbd,0x1c,0xac,0x43,0x00,0x00,
20940xaf,0x84,0xbd,0x40,0x34,0xc6,0x00,0x64,0xa0,0x8a,0x00,0x18,0x94,0xc5,0x00,0x00,
20950x8f,0x82,0xbd,0x40,0x25,0xc4,0x00,0x30,0x24,0x08,0x00,0x03,0x3c,0x03,0xb0,0x03,
20960xa0,0x45,0x00,0x21,0x34,0x63,0x00,0x66,0xaf,0x84,0xbd,0x44,0xa0,0x88,0x00,0x18,
20970x94,0x65,0x00,0x00,0x8f,0x82,0xbd,0x44,0x25,0xc4,0x00,0x54,0x25,0xc7,0x00,0x78,
20980xa0,0x45,0x00,0x21,0xaf,0x84,0xbd,0x48,0xa0,0x88,0x00,0x18,0x94,0x65,0x00,0x00,
20990x8f,0x82,0xbd,0x48,0x25,0xc8,0x00,0x9c,0x24,0x09,0x00,0x01,0xa0,0x45,0x00,0x21,
21000xaf,0x87,0xbd,0x4c,0xa0,0xea,0x00,0x18,0x94,0xc4,0x00,0x00,0x8f,0x82,0xbd,0x4c,
21010x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x62,0xa0,0x44,0x00,0x21,0xaf,0x88,0xbd,0x50,
21020xa1,0x09,0x00,0x18,0x94,0x65,0x00,0x00,0x8f,0x82,0xbd,0x50,0x25,0xc4,0x00,0xc0,
21030x3c,0x06,0xb0,0x03,0xa0,0x45,0x00,0x21,0xaf,0x84,0xbd,0x54,0xa0,0x89,0x00,0x18,
21040x94,0x65,0x00,0x00,0x8f,0x82,0xbd,0x54,0x25,0xc4,0x00,0xe4,0x34,0xc6,0x00,0x60,
21050xa0,0x45,0x00,0x21,0xaf,0x84,0xbd,0x58,0xa0,0x80,0x00,0x18,0x94,0xc5,0x00,0x00,
21060x8f,0x82,0xbd,0x58,0x25,0xc3,0x01,0x08,0x25,0xc7,0x01,0x2c,0xa0,0x45,0x00,0x21,
21070xaf,0x83,0xbd,0x5c,0xa0,0x60,0x00,0x18,0x94,0xc8,0x00,0x00,0x8f,0x82,0xbd,0x5c,
21080x25,0xc4,0x01,0x50,0x25,0xc5,0x01,0x74,0xa0,0x48,0x00,0x21,0x25,0xc6,0x01,0x98,
21090x25,0xc9,0x01,0xbc,0x25,0xca,0x01,0xe0,0x25,0xcb,0x02,0x04,0x25,0xcc,0x02,0x28,
21100x25,0xcd,0x02,0x4c,0x24,0x02,0x00,0x10,0x3c,0x03,0xb0,0x03,0xaf,0x87,0xbd,0x60,
21110x34,0x63,0x00,0x38,0xa0,0xe0,0x00,0x18,0xaf,0x84,0xbd,0x64,0xa0,0x80,0x00,0x18,
21120xaf,0x85,0xbd,0x68,0xa0,0xa0,0x00,0x18,0xaf,0x86,0xbd,0x6c,0xa0,0xc0,0x00,0x18,
21130xaf,0x89,0xbd,0x70,0xa1,0x20,0x00,0x18,0xaf,0x8a,0xbd,0x74,0xa1,0x40,0x00,0x18,
21140xaf,0x8b,0xbd,0x78,0xa1,0x60,0x00,0x18,0xaf,0x8c,0xbd,0x7c,0xa1,0x80,0x00,0x18,
21150xaf,0x8d,0xbd,0x80,0xa1,0xa2,0x00,0x18,0x94,0x64,0x00,0x00,0x8f,0x82,0xbd,0x80,
21160x25,0xc5,0x02,0x70,0x3c,0x03,0xb0,0x03,0xa0,0x44,0x00,0x21,0x24,0x02,0x00,0x11,
21170xaf,0x85,0xbd,0x84,0x34,0x63,0x00,0x6e,0xa0,0xa2,0x00,0x18,0x94,0x64,0x00,0x00,
21180x8f,0x82,0xbd,0x84,0x25,0xc5,0x02,0x94,0x3c,0x03,0xb0,0x03,0xa0,0x44,0x00,0x21,
21190x24,0x02,0x00,0x12,0xaf,0x85,0xbd,0x88,0x34,0x63,0x00,0x6c,0xa0,0xa2,0x00,0x18,
21200x94,0x64,0x00,0x00,0x8f,0x82,0xbd,0x88,0x24,0x05,0xff,0xff,0x24,0x07,0x00,0x01,
21210xa0,0x44,0x00,0x21,0x24,0x06,0x00,0x12,0x27,0x84,0xbd,0x40,0x8c,0x82,0x00,0x00,
21220x24,0xc6,0xff,0xff,0xa0,0x40,0x00,0x04,0x8c,0x83,0x00,0x00,0xa4,0x45,0x00,0x00,
21230xa4,0x45,0x00,0x02,0xa0,0x60,0x00,0x0a,0x8c,0x82,0x00,0x00,0xa4,0x65,0x00,0x06,
21240xa4,0x65,0x00,0x08,0xa0,0x40,0x00,0x10,0x8c,0x83,0x00,0x00,0xa4,0x45,0x00,0x0c,
21250xa4,0x45,0x00,0x0e,0xa0,0x60,0x00,0x12,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
21260xa0,0x40,0x00,0x16,0x8c,0x83,0x00,0x00,0xa4,0x45,0x00,0x14,0xa0,0x67,0x00,0x17,
21270x8c,0x82,0x00,0x00,0x24,0x84,0x00,0x04,0xa0,0x40,0x00,0x20,0x04,0xc1,0xff,0xe7,
21280xac,0x40,0x00,0x1c,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,
21290x3c,0x03,0x80,0x01,0x34,0x42,0x00,0x20,0x24,0x63,0x82,0x6c,0xac,0x43,0x00,0x00,
21300x90,0x82,0x00,0x10,0x00,0x80,0x60,0x21,0x10,0x40,0x00,0x56,0x00,0x00,0x70,0x21,
21310x97,0x82,0x99,0x30,0x94,0x8a,0x00,0x0c,0x27,0x87,0x99,0x40,0x00,0x02,0x40,0xc0,
21320x01,0x02,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x47,0x10,0x21,0x90,0x8b,0x00,0x18,
21330xa4,0x4a,0x00,0x00,0x94,0x83,0x00,0x0e,0x39,0x64,0x00,0x10,0x2c,0x84,0x00,0x01,
21340x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x34,0x85,0x00,0x02,0x39,0x63,0x00,0x11,
21350x00,0x83,0x28,0x0b,0x34,0xa3,0x00,0x08,0x39,0x64,0x00,0x12,0x00,0x02,0x10,0x80,
21360x00,0xa4,0x18,0x0b,0x00,0x47,0x10,0x21,0x94,0x49,0x00,0x04,0x34,0x64,0x00,0x20,
21370x00,0x6b,0x20,0x0b,0x34,0x83,0x00,0x40,0x39,0x62,0x00,0x01,0x00,0x82,0x18,0x0b,
21380x00,0x09,0x30,0xc0,0x34,0x64,0x00,0x80,0x00,0xc9,0x28,0x21,0x39,0x62,0x00,0x02,
21390x00,0x60,0x68,0x21,0x00,0x82,0x68,0x0a,0x00,0x05,0x28,0x80,0x3c,0x02,0xb0,0x08,
21400x00,0xa7,0x28,0x21,0x00,0xc2,0x30,0x21,0x01,0x02,0x40,0x21,0x34,0x03,0xff,0xff,
21410x35,0xa4,0x01,0x00,0x39,0x62,0x00,0x03,0x2d,0x67,0x00,0x13,0xad,0x0a,0x00,0x00,
21420xa4,0xa3,0x00,0x00,0xac,0xc3,0x00,0x00,0xa7,0x89,0x99,0x30,0x10,0xe0,0x00,0x0f,
21430x00,0x82,0x68,0x0a,0x3c,0x03,0x80,0x01,0x00,0x0b,0x10,0x80,0x24,0x63,0x08,0xf0,
21440x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x08,
21450x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x60,0x94,0x62,0x00,0x00,
21460x00,0x00,0x00,0x00,0x00,0x02,0x14,0x00,0x00,0x02,0x74,0x03,0x3c,0x02,0xb0,0x03,
21470x34,0x42,0x00,0x3a,0x94,0x44,0x00,0x00,0x93,0x83,0x99,0x24,0x91,0x82,0x00,0x21,
21480x01,0xc4,0x20,0x21,0x91,0x85,0x00,0x10,0x00,0x04,0x24,0x00,0x00,0x62,0x18,0x21,
21490x00,0x04,0x74,0x03,0x00,0x6e,0x18,0x23,0x00,0x65,0x10,0x2a,0x00,0xa2,0x18,0x0a,
21500x00,0x0d,0x24,0x00,0x3c,0x02,0xb0,0x06,0x24,0x05,0xff,0xff,0x00,0x64,0x18,0x25,
21510x34,0x42,0x80,0x20,0xac,0x43,0x00,0x00,0xa5,0x85,0x00,0x0e,0xa1,0x80,0x00,0x10,
21520xa5,0x85,0x00,0x0c,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,
21530x08,0x00,0x20,0xdf,0x34,0x63,0x00,0x62,0x3c,0x03,0xb0,0x03,0x08,0x00,0x20,0xdf,
21540x34,0x63,0x00,0x64,0x3c,0x03,0xb0,0x03,0x08,0x00,0x20,0xdf,0x34,0x63,0x00,0x66,
21550x3c,0x03,0xb0,0x03,0x08,0x00,0x20,0xdf,0x34,0x63,0x00,0x38,0x3c,0x03,0xb0,0x03,
21560x08,0x00,0x20,0xdf,0x34,0x63,0x00,0x6e,0x3c,0x03,0xb0,0x03,0x08,0x00,0x20,0xdf,
21570x34,0x63,0x00,0x6c,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x01,0x34,0x63,0x00,0x20,
21580x24,0x42,0x84,0x34,0x00,0x05,0x28,0x40,0xac,0x62,0x00,0x00,0x00,0xa6,0x28,0x21,
21590x2c,0xe2,0x00,0x10,0x14,0x80,0x00,0x06,0x00,0x00,0x18,0x21,0x10,0x40,0x00,0x02,
21600x00,0x00,0x00,0x00,0x00,0xe0,0x18,0x21,0x03,0xe0,0x00,0x08,0x00,0x60,0x10,0x21,
21610x24,0x02,0x00,0x20,0x10,0xe2,0x00,0x06,0x2c,0xe4,0x00,0x10,0x24,0xa2,0x00,0x01,
21620x10,0x80,0xff,0xf9,0x00,0x02,0x11,0x00,0x08,0x00,0x21,0x1a,0x00,0x47,0x18,0x21,
21630x08,0x00,0x21,0x1a,0x24,0xa3,0x00,0x50,0x27,0xbd,0xff,0xc8,0xaf,0xb4,0x00,0x20,
21640xaf,0xb3,0x00,0x1c,0xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,0xaf,0xbf,0x00,0x30,
21650xaf,0xb7,0x00,0x2c,0xaf,0xb6,0x00,0x28,0xaf,0xb5,0x00,0x24,0xaf,0xb0,0x00,0x10,
21660x00,0x80,0x90,0x21,0x84,0x84,0x00,0x08,0x3c,0x05,0xb0,0x03,0x3c,0x02,0x80,0x01,
21670x34,0xa5,0x00,0x20,0x24,0x42,0x84,0x98,0x3c,0x03,0xb0,0x06,0x00,0x04,0x20,0x80,
21680xac,0xa2,0x00,0x00,0x00,0x83,0x20,0x21,0x3c,0x06,0xb0,0x06,0x8c,0x82,0x00,0x00,
21690x34,0xc6,0x80,0x24,0x8c,0x88,0x00,0x00,0x8c,0xc4,0x00,0x00,0x96,0x45,0x00,0x08,
21700x30,0x53,0xff,0xff,0x00,0x08,0x44,0x02,0x34,0x84,0x01,0x00,0x3c,0x02,0xb0,0x00,
21710x00,0x08,0x18,0xc0,0x00,0x13,0x3a,0x00,0xac,0xc4,0x00,0x00,0x00,0xe2,0x38,0x21,
21720xae,0x53,0x02,0xb8,0x00,0x68,0x18,0x21,0x24,0xa5,0x00,0x02,0x8c,0xf6,0x00,0x00,
21730x30,0xa5,0x01,0xff,0x8c,0xf5,0x00,0x04,0x27,0x86,0x99,0x40,0x00,0x03,0x18,0x80,
21740x00,0x13,0xa0,0xc0,0xa6,0x45,0x00,0x08,0x00,0x66,0x18,0x21,0x02,0x93,0x10,0x21,
21750x00,0x02,0x48,0x80,0x94,0x65,0x00,0x00,0x01,0x26,0x30,0x21,0x24,0x02,0xff,0xff,
21760x00,0x15,0x1a,0x02,0x27,0x84,0x99,0x50,0xa4,0xc2,0x00,0x02,0x30,0x63,0x00,0x1f,
21770x24,0x02,0x00,0x10,0x01,0x24,0x20,0x21,0xa4,0xc8,0x00,0x04,0x8c,0xf0,0x00,0x08,
21780xa6,0x43,0x00,0x06,0xa6,0x45,0x00,0x0a,0xa0,0x82,0x00,0x06,0x86,0x43,0x00,0x06,
21790x27,0x82,0x99,0x44,0x01,0x22,0x88,0x21,0x24,0x02,0x00,0x13,0x10,0x62,0x00,0xee,
21800xae,0x27,0x00,0x18,0x3c,0x03,0xb0,0x03,0x34,0x63,0x01,0x00,0xa6,0x40,0x00,0x02,
21810x3c,0x02,0xb0,0x03,0x90,0x64,0x00,0x00,0x34,0x42,0x01,0x08,0x8c,0x45,0x00,0x00,
21820x00,0x10,0x1b,0xc2,0x00,0x04,0x20,0x82,0x30,0x63,0x00,0x01,0xac,0xc5,0x00,0x08,
21830x10,0x60,0x00,0xc7,0x30,0x97,0x00,0x01,0x00,0x10,0x16,0x82,0x30,0x46,0x00,0x01,
21840x00,0x10,0x12,0x02,0x00,0x10,0x19,0xc2,0x00,0x10,0x26,0x02,0x00,0x10,0x2e,0x42,
21850x30,0x48,0x00,0x7f,0x24,0x02,0x00,0x01,0x30,0x71,0x00,0x01,0x30,0x84,0x00,0x01,
21860x10,0xc2,0x00,0xb3,0x30,0xa3,0x00,0x01,0x00,0x60,0x28,0x21,0x0c,0x00,0x21,0x0d,
21870x01,0x00,0x38,0x21,0x02,0x93,0x18,0x21,0x00,0x03,0x18,0x80,0x2c,0x46,0x00,0x54,
21880x27,0x85,0x99,0x50,0x27,0x84,0x99,0x48,0x00,0x06,0x10,0x0a,0x00,0x65,0x28,0x21,
21890x26,0x26,0x00,0x02,0x00,0x64,0x18,0x21,0xa0,0xa2,0x00,0x02,0xa0,0x66,0x00,0x06,
21900xa0,0x62,0x00,0x07,0xa0,0xa2,0x00,0x01,0x02,0x93,0x28,0x21,0x00,0x05,0x28,0x80,
21910x27,0x82,0x99,0x44,0x00,0xa2,0x58,0x21,0x8d,0x64,0x00,0x18,0x00,0x10,0x15,0xc2,
21920x30,0x42,0x00,0x01,0x8c,0x83,0x00,0x0c,0x27,0x84,0x99,0x60,0x00,0xa4,0x48,0x21,
21930xa6,0x42,0x00,0x00,0xa6,0x56,0x00,0x04,0x8d,0x26,0x00,0x00,0x00,0x03,0x19,0x42,
21940x3c,0x02,0xff,0xef,0x34,0x42,0xff,0xff,0x30,0x63,0x00,0x01,0x00,0xc2,0x40,0x24,
21950x00,0x03,0x1d,0x00,0x01,0x03,0x40,0x25,0x00,0x08,0x15,0x02,0x00,0x10,0x34,0x42,
21960x00,0x10,0x3c,0x82,0x00,0x15,0x19,0x82,0x00,0x15,0x25,0x82,0x00,0x10,0x2c,0x02,
21970x30,0x42,0x00,0x01,0x30,0xcd,0x00,0x01,0x30,0x6c,0x00,0x01,0x30,0xe6,0x00,0x01,
21980x30,0x8a,0x00,0x03,0x32,0xb1,0x00,0x07,0x30,0xa5,0x00,0x01,0xad,0x28,0x00,0x00,
21990x10,0x40,0x00,0x0b,0x32,0x07,0x00,0x7f,0x8d,0x64,0x00,0x18,0x3c,0x03,0xff,0xf0,
22000x34,0x63,0xff,0xff,0x8c,0x82,0x00,0x0c,0x01,0x03,0x18,0x24,0x00,0x02,0x13,0x82,
22010x30,0x42,0x00,0x0f,0x00,0x02,0x14,0x00,0x00,0x62,0x18,0x25,0xad,0x23,0x00,0x00,
22020x24,0x02,0x00,0x01,0x10,0xc2,0x00,0x6a,0x00,0x00,0x00,0x00,0x15,0x80,0x00,0x03,
22030x00,0x00,0x00,0x00,0x15,0x40,0x00,0x5b,0x24,0x02,0x00,0x01,0x96,0x42,0x00,0x04,
22040x00,0x00,0x00,0x00,0x24,0x42,0x00,0x04,0xa6,0x42,0x00,0x04,0x00,0xa0,0x20,0x21,
22050x0c,0x00,0x21,0x0d,0x01,0xa0,0x28,0x21,0x02,0x93,0x18,0x21,0x00,0x03,0x40,0x80,
22060x2c,0x45,0x00,0x54,0x27,0x84,0x99,0x50,0x01,0x04,0x20,0x21,0x00,0x05,0x10,0x0a,
22070xa0,0x82,0x00,0x00,0xa0,0x80,0x00,0x04,0xa0,0x80,0x00,0x05,0x96,0x43,0x00,0x04,
22080x27,0x82,0x99,0x40,0x01,0x02,0x10,0x21,0xa4,0x43,0x00,0x06,0x27,0x82,0x99,0x44,
22090x92,0x46,0x00,0x01,0x01,0x02,0x10,0x21,0x8c,0x45,0x00,0x18,0x27,0x83,0x99,0x60,
22100x01,0x03,0x18,0x21,0xa0,0x60,0x00,0x00,0xa0,0x86,0x00,0x07,0x94,0xa2,0x00,0x10,
22110x24,0x03,0x00,0x04,0x30,0x42,0x00,0x0f,0x10,0x43,0x00,0x36,0x24,0xa5,0x00,0x10,
22120x94,0xa3,0x00,0x16,0x27,0x87,0x99,0x58,0x01,0x07,0x10,0x21,0xa4,0x43,0x00,0x02,
22130x94,0xa2,0x00,0x04,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,0x14,0x40,0x00,0x24,
22140x02,0x93,0x20,0x21,0x94,0xa2,0x00,0x00,0x24,0x03,0x00,0xa4,0x30,0x42,0x00,0xff,
22150x10,0x43,0x00,0x1f,0x00,0x00,0x00,0x00,0x94,0xa2,0x00,0x00,0x24,0x03,0x00,0x88,
22160x30,0x42,0x00,0x88,0x10,0x43,0x00,0x14,0x02,0x93,0x18,0x21,0x27,0x84,0x99,0x60,
22170x00,0x03,0x18,0x80,0x00,0x64,0x18,0x21,0x8c,0x62,0x00,0x00,0x3c,0x04,0x00,0x80,
22180x00,0x44,0x10,0x25,0xac,0x62,0x00,0x00,0x02,0x93,0x10,0x21,0x00,0x02,0x10,0x80,
22190x00,0x47,0x10,0x21,0xa0,0x51,0x00,0x00,0x8f,0xbf,0x00,0x30,0x7b,0xb6,0x01,0x7c,
22200x7b,0xb4,0x01,0x3c,0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,0x24,0x02,0x00,0x01,
22210x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x38,0x94,0xa2,0x00,0x18,0x00,0x00,0x00,0x00,
22220x30,0x42,0x00,0x60,0x10,0x40,0xff,0xe9,0x02,0x93,0x18,0x21,0x02,0x93,0x20,0x21,
22230x27,0x82,0x99,0x60,0x00,0x04,0x20,0x80,0x00,0x82,0x20,0x21,0x8c,0x83,0x00,0x00,
22240x3c,0x02,0xff,0x7f,0x34,0x42,0xff,0xff,0x00,0x62,0x18,0x24,0x08,0x00,0x22,0x02,
22250xac,0x83,0x00,0x00,0x27,0x87,0x99,0x58,0x01,0x07,0x10,0x21,0x08,0x00,0x21,0xec,
22260xa4,0x40,0x00,0x02,0x11,0x42,0x00,0x07,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x02,
22270x14,0x40,0xff,0xa7,0x00,0xa0,0x20,0x21,0x96,0x42,0x00,0x04,0x08,0x00,0x21,0xca,
22280x24,0x42,0x00,0x0c,0x96,0x42,0x00,0x04,0x08,0x00,0x21,0xca,0x24,0x42,0x00,0x08,
22290x16,0xe6,0xff,0x96,0x3c,0x02,0xff,0xfb,0x8d,0x63,0x00,0x18,0x34,0x42,0xff,0xff,
22300x02,0x02,0x10,0x24,0xac,0x62,0x00,0x08,0x08,0x00,0x21,0xc3,0x00,0x00,0x30,0x21,
22310x16,0xe6,0xff,0x4e,0x00,0x60,0x28,0x21,0x3c,0x02,0xfb,0xff,0x34,0x42,0xff,0xff,
22320x02,0x02,0x10,0x24,0xac,0xe2,0x00,0x08,0x08,0x00,0x21,0x82,0x00,0x00,0x30,0x21,
22330x93,0x87,0xc4,0x54,0x00,0x10,0x1e,0x42,0x00,0x10,0x26,0x82,0x27,0x82,0x99,0x48,
22340x2c,0xe5,0x00,0x0c,0x01,0x22,0x48,0x21,0x30,0x63,0x00,0x01,0x30,0x86,0x00,0x01,
22350x14,0xa0,0x00,0x06,0x00,0xe0,0x40,0x21,0x00,0x03,0x10,0x40,0x00,0x46,0x10,0x21,
22360x00,0x02,0x11,0x00,0x00,0xe2,0x10,0x21,0x24,0x48,0x00,0x04,0x02,0x93,0x10,0x21,
22370x00,0x02,0x10,0x80,0x27,0x84,0x99,0x50,0x27,0x83,0x99,0x48,0x00,0x44,0x20,0x21,
22380x00,0x43,0x10,0x21,0xa1,0x28,0x00,0x07,0xa0,0x40,0x00,0x06,0xa0,0x80,0x00,0x02,
22390x08,0x00,0x21,0x92,0xa0,0x80,0x00,0x01,0x24,0x02,0x00,0x01,0x00,0xe0,0x20,0x21,
22400x0c,0x00,0x01,0xc2,0xa6,0x42,0x00,0x02,0x8e,0x24,0x00,0x18,0x0c,0x00,0x05,0x39,
22410x00,0x00,0x00,0x00,0x08,0x00,0x22,0x06,0x00,0x00,0x00,0x00,0x30,0xa7,0xff,0xff,
22420x00,0x07,0x18,0xc0,0x00,0x67,0x18,0x21,0x3c,0x06,0xb0,0x03,0x3c,0x02,0x80,0x01,
22430x24,0x42,0x89,0x7c,0x27,0x85,0x99,0x50,0x00,0x03,0x18,0x80,0x34,0xc6,0x00,0x20,
22440x00,0x65,0x18,0x21,0xac,0xc2,0x00,0x00,0x80,0x62,0x00,0x07,0x00,0x00,0x00,0x00,
22450x10,0x40,0x00,0x29,0x00,0x80,0x28,0x21,0x90,0x82,0x00,0x16,0x00,0x00,0x00,0x00,
22460x34,0x42,0x00,0x02,0x30,0x43,0x00,0x01,0x14,0x60,0x00,0x02,0xa0,0x82,0x00,0x16,
22470xa0,0x80,0x00,0x17,0x90,0xa2,0x00,0x04,0x3c,0x03,0xb0,0x03,0x27,0x86,0x99,0x40,
22480x14,0x40,0x00,0x06,0x34,0x63,0x00,0x20,0x24,0x02,0x00,0x01,0xa0,0xa2,0x00,0x04,
22490xa4,0xa7,0x00,0x02,0x03,0xe0,0x00,0x08,0xa4,0xa7,0x00,0x00,0x94,0xa4,0x00,0x02,
22500x3c,0x02,0x80,0x01,0x24,0x42,0xa1,0x7c,0xac,0x62,0x00,0x00,0x00,0x04,0x18,0xc0,
22510x00,0x64,0x18,0x21,0x00,0x03,0x18,0x80,0x00,0x66,0x18,0x21,0x94,0x62,0x00,0x04,
22520xa4,0x67,0x00,0x02,0x3c,0x03,0xb0,0x08,0x00,0x02,0x20,0xc0,0x00,0x82,0x10,0x21,
22530x00,0x02,0x10,0x80,0x00,0x46,0x10,0x21,0x00,0x83,0x20,0x21,0xa4,0x47,0x00,0x00,
22540xac,0x87,0x00,0x00,0x90,0xa2,0x00,0x04,0xa4,0xa7,0x00,0x02,0x24,0x42,0x00,0x01,
22550x03,0xe0,0x00,0x08,0xa0,0xa2,0x00,0x04,0x90,0x82,0x00,0x16,0x24,0x85,0x00,0x06,
22560x34,0x42,0x00,0x01,0x30,0x43,0x00,0x02,0x14,0x60,0xff,0xda,0xa0,0x82,0x00,0x16,
22570x24,0x02,0x00,0x01,0x08,0x00,0x22,0x75,0xa0,0x82,0x00,0x17,0x27,0xbd,0xff,0xe8,
22580xaf,0xbf,0x00,0x10,0x00,0x80,0x38,0x21,0x84,0x84,0x00,0x02,0x3c,0x03,0xb0,0x03,
22590x3c,0x02,0x80,0x01,0x3c,0x0a,0xb0,0x06,0x34,0x63,0x00,0x20,0x24,0x42,0x8a,0x7c,
22600x3c,0x0b,0xb0,0x08,0x27,0x89,0x99,0x40,0x34,0x0c,0xff,0xff,0x35,0x4a,0x80,0x20,
22610x10,0x80,0x00,0x30,0xac,0x62,0x00,0x00,0x97,0x82,0x99,0x30,0x94,0xe6,0x02,0xba,
22620x00,0x02,0x18,0xc0,0x00,0x6b,0x28,0x21,0xac,0xa6,0x00,0x00,0x8c,0xe4,0x02,0xb8,
22630x00,0x62,0x18,0x21,0x00,0x03,0x18,0x80,0x00,0x04,0x10,0xc0,0x00,0x44,0x10,0x21,
22640x00,0x02,0x10,0x80,0x00,0x49,0x10,0x21,0x94,0x48,0x00,0x04,0x00,0x69,0x18,0x21,
22650xa4,0x66,0x00,0x00,0x00,0x08,0x28,0xc0,0x00,0xab,0x10,0x21,0xac,0x4c,0x00,0x00,
22660x8c,0xe4,0x02,0xb8,0x27,0x82,0x99,0x44,0x00,0xa8,0x28,0x21,0x00,0x04,0x18,0xc0,
22670x00,0x64,0x18,0x21,0x00,0x03,0x18,0x80,0x00,0x62,0x10,0x21,0x8c,0x46,0x00,0x18,
22680x27,0x84,0x99,0x50,0x00,0x64,0x18,0x21,0x8c,0xc2,0x00,0x00,0x80,0x67,0x00,0x06,
22690x00,0x05,0x28,0x80,0x30,0x42,0xff,0xff,0x00,0x47,0x10,0x21,0x30,0x43,0x00,0xff,
22700x00,0x03,0x18,0x2b,0x00,0x02,0x12,0x02,0x00,0x43,0x10,0x21,0x3c,0x04,0x00,0x04,
22710x00,0xa9,0x28,0x21,0x00,0x44,0x10,0x25,0xa4,0xac,0x00,0x00,0xad,0x42,0x00,0x00,
22720xa7,0x88,0x99,0x30,0x8f,0xbf,0x00,0x10,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
22730x27,0xbd,0x00,0x18,0x84,0xe3,0x00,0x06,0x27,0x82,0xbd,0x40,0x94,0xe5,0x02,0xba,
22740x00,0x03,0x18,0x80,0x00,0x62,0x18,0x21,0x8c,0x64,0x00,0x00,0x0c,0x00,0x22,0x5f,
22750x00,0x00,0x00,0x00,0x08,0x00,0x22,0xd9,0x00,0x00,0x00,0x00,0x94,0x88,0x00,0x00,
22760x00,0x80,0x58,0x21,0x27,0x8a,0x99,0x40,0x00,0x08,0x18,0xc0,0x00,0x68,0x18,0x21,
22770x3c,0x04,0xb0,0x03,0x00,0x03,0x18,0x80,0x3c,0x02,0x80,0x01,0x00,0x6a,0x18,0x21,
22780x34,0x84,0x00,0x20,0x24,0x42,0x8b,0x9c,0x30,0xa5,0xff,0xff,0xac,0x82,0x00,0x00,
22790x94,0x67,0x00,0x02,0x11,0x05,0x00,0x35,0x24,0x04,0x00,0x01,0x91,0x66,0x00,0x04,
22800x00,0x00,0x00,0x00,0x00,0x86,0x10,0x2a,0x10,0x40,0x00,0x10,0x00,0xc0,0x48,0x21,
22810x3c,0x0d,0xb0,0x03,0x01,0x40,0x60,0x21,0x35,0xad,0x00,0x20,0x10,0xe5,0x00,0x0d,
22820x24,0x84,0x00,0x01,0x00,0x07,0x10,0xc0,0x00,0x47,0x10,0x21,0x00,0x02,0x10,0x80,
22830x01,0x20,0x30,0x21,0x00,0x4a,0x10,0x21,0x00,0x86,0x18,0x2a,0x00,0xe0,0x40,0x21,
22840x94,0x47,0x00,0x02,0x14,0x60,0xff,0xf5,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
22850x00,0x00,0x10,0x21,0x00,0x08,0x20,0xc0,0x00,0x88,0x20,0x21,0x24,0xc2,0xff,0xff,
22860x00,0x04,0x20,0x80,0xa1,0x62,0x00,0x04,0x00,0x8c,0x20,0x21,0x94,0x83,0x00,0x04,
22870x00,0x07,0x10,0xc0,0x00,0x47,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x4c,0x10,0x21,
22880x00,0x03,0x28,0xc0,0x94,0x46,0x00,0x02,0x00,0xa3,0x18,0x21,0x00,0x03,0x18,0x80,
22890x00,0x6c,0x18,0x21,0xa4,0x66,0x00,0x00,0xa4,0x86,0x00,0x02,0x95,0x64,0x00,0x02,
22900x3c,0x03,0xb0,0x08,0x3c,0x02,0x80,0x01,0x00,0xa3,0x28,0x21,0x24,0x42,0xa1,0x7c,
22910xad,0xa2,0x00,0x00,0x10,0x87,0x00,0x03,0xac,0xa6,0x00,0x00,0x03,0xe0,0x00,0x08,
22920x24,0x02,0x00,0x01,0x08,0x00,0x23,0x27,0xa5,0x68,0x00,0x02,0x91,0x62,0x00,0x04,
22930xa5,0x67,0x00,0x00,0x24,0x42,0xff,0xff,0x30,0x43,0x00,0xff,0x14,0x60,0xff,0xf7,
22940xa1,0x62,0x00,0x04,0x24,0x02,0xff,0xff,0x08,0x00,0x23,0x27,0xa5,0x62,0x00,0x02,
22950x00,0x05,0x40,0xc0,0x01,0x05,0x30,0x21,0x27,0xbd,0xff,0xd8,0x00,0x06,0x30,0x80,
22960x27,0x82,0x99,0x44,0xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,0xaf,0xbf,0x00,0x20,
22970xaf,0xb3,0x00,0x1c,0xaf,0xb0,0x00,0x10,0x00,0xc2,0x10,0x21,0x8c,0x47,0x00,0x18,
22980x00,0xa0,0x90,0x21,0x3c,0x02,0x80,0x01,0x3c,0x05,0xb0,0x03,0x34,0xa5,0x00,0x20,
22990x24,0x42,0x8c,0xd0,0xac,0xa2,0x00,0x00,0x27,0x83,0x99,0x50,0x00,0xc3,0x30,0x21,
23000x8c,0xe2,0x00,0x00,0x80,0xc5,0x00,0x06,0x00,0x80,0x88,0x21,0x30,0x42,0xff,0xff,
23010x00,0x45,0x10,0x21,0x30,0x43,0x00,0xff,0x10,0x60,0x00,0x02,0x00,0x02,0x12,0x02,
23020x24,0x42,0x00,0x01,0x30,0x53,0x00,0xff,0x01,0x12,0x10,0x21,0x00,0x02,0x10,0x80,
23030x27,0x83,0x99,0x50,0x00,0x43,0x10,0x21,0x80,0x44,0x00,0x07,0x00,0x00,0x00,0x00,
23040x10,0x80,0x00,0x4b,0x26,0x24,0x00,0x06,0x32,0x50,0xff,0xff,0x02,0x20,0x20,0x21,
23050x0c,0x00,0x22,0xe7,0x02,0x00,0x28,0x21,0x92,0x22,0x00,0x10,0x00,0x00,0x00,0x00,
23060x14,0x40,0x00,0x2e,0x3c,0x03,0xb0,0x08,0x3c,0x09,0x80,0x01,0x27,0x88,0x99,0x40,
23070xa6,0x32,0x00,0x0c,0x00,0x10,0x20,0xc0,0x00,0x90,0x20,0x21,0x00,0x04,0x20,0x80,
23080x00,0x88,0x20,0x21,0x94,0x82,0x00,0x04,0x3c,0x03,0xb0,0x08,0x3c,0x07,0xb0,0x03,
23090x00,0x02,0x28,0xc0,0x00,0xa2,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x48,0x10,0x21,
23100x00,0xa3,0x28,0x21,0x25,0x26,0xa1,0x7c,0x34,0x03,0xff,0xff,0x34,0xe7,0x00,0x20,
23110xac,0xe6,0x00,0x00,0xa4,0x83,0x00,0x02,0xa4,0x43,0x00,0x00,0xac,0xa3,0x00,0x00,
23120x92,0x22,0x00,0x10,0x92,0x23,0x00,0x0a,0xa6,0x32,0x00,0x0e,0x02,0x62,0x10,0x21,
23130x14,0x60,0x00,0x05,0xa2,0x22,0x00,0x10,0x92,0x22,0x00,0x16,0x00,0x00,0x00,0x00,
23140x30,0x42,0x00,0xfe,0xa2,0x22,0x00,0x16,0x92,0x22,0x00,0x04,0x00,0x00,0x00,0x00,
23150x14,0x40,0x00,0x05,0x00,0x00,0x00,0x00,0x92,0x22,0x00,0x16,0x00,0x00,0x00,0x00,
23160x30,0x42,0x00,0xfd,0xa2,0x22,0x00,0x16,0x8f,0xbf,0x00,0x20,0x7b,0xb2,0x00,0xfc,
23170x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x28,0x96,0x22,0x00,0x0e,
23180x27,0x88,0x99,0x40,0x00,0x02,0x20,0xc0,0x00,0x82,0x20,0x21,0x00,0x04,0x20,0x80,
23190x00,0x88,0x20,0x21,0x94,0x82,0x00,0x04,0x3c,0x06,0xb0,0x03,0x3c,0x09,0x80,0x01,
23200x00,0x02,0x28,0xc0,0x00,0xa2,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0xa3,0x28,0x21,
23210x00,0x48,0x10,0x21,0x34,0xc6,0x00,0x20,0x25,0x23,0xa1,0x7c,0xac,0xc3,0x00,0x00,
23220xa4,0x50,0x00,0x00,0xac,0xb0,0x00,0x00,0x08,0x00,0x23,0x65,0xa4,0x90,0x00,0x02,
23230x08,0x00,0x23,0x5c,0x32,0x50,0xff,0xff,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x01,
23240x24,0x42,0x8e,0x98,0x34,0x63,0x00,0x20,0xac,0x62,0x00,0x00,0x90,0x82,0x00,0x04,
23250x97,0xaa,0x00,0x12,0x00,0x80,0x60,0x21,0x30,0xa8,0xff,0xff,0x00,0x4a,0x20,0x23,
23260x34,0x09,0xff,0xff,0x30,0xcf,0xff,0xff,0x30,0xee,0xff,0xff,0x11,0x09,0x00,0x73,
23270xa1,0x84,0x00,0x04,0x00,0x0e,0xc0,0xc0,0x00,0x08,0x10,0xc0,0x00,0x48,0x10,0x21,
23280x03,0x0e,0x20,0x21,0x27,0x8d,0x99,0x40,0x00,0x04,0x20,0x80,0x00,0x02,0x10,0x80,
23290x00,0x4d,0x10,0x21,0x00,0x8d,0x20,0x21,0x94,0x86,0x00,0x02,0x94,0x43,0x00,0x04,
23300x3c,0x19,0x80,0x01,0xa4,0x46,0x00,0x02,0x00,0x03,0x28,0xc0,0x00,0xa3,0x18,0x21,
23310x94,0x87,0x00,0x02,0x3c,0x02,0xb0,0x08,0x00,0x03,0x18,0x80,0x00,0xa2,0x28,0x21,
23320x00,0x6d,0x18,0x21,0x27,0x22,0xa1,0x7c,0x3c,0x01,0xb0,0x03,0xac,0x22,0x00,0x20,
23330xa4,0x66,0x00,0x00,0x10,0xe9,0x00,0x57,0xac,0xa6,0x00,0x00,0x01,0xe0,0x30,0x21,
23340x11,0x40,0x00,0x1d,0x00,0x00,0x48,0x21,0x01,0x40,0x38,0x21,0x27,0x8b,0x99,0x44,
23350x27,0x8a,0x99,0x50,0x00,0x06,0x40,0xc0,0x01,0x06,0x18,0x21,0x00,0x03,0x18,0x80,
23360x00,0x6b,0x10,0x21,0x8c,0x44,0x00,0x18,0x00,0x6a,0x18,0x21,0x80,0x65,0x00,0x06,
23370x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0xff,0xff,0x00,0x45,0x10,0x21,
23380x30,0x44,0x00,0xff,0x00,0x02,0x12,0x02,0x01,0x22,0x18,0x21,0x24,0x62,0x00,0x01,
23390x14,0x80,0x00,0x02,0x30,0x49,0x00,0xff,0x30,0x69,0x00,0xff,0x01,0x06,0x10,0x21,
23400x00,0x02,0x10,0x80,0x00,0x4d,0x10,0x21,0x24,0xe7,0xff,0xff,0x94,0x46,0x00,0x02,
23410x14,0xe0,0xff,0xe9,0x00,0x06,0x40,0xc0,0x91,0x82,0x00,0x10,0x00,0x00,0x00,0x00,
23420x14,0x40,0x00,0x20,0x3c,0x06,0xb0,0x03,0xa5,0x8f,0x00,0x0c,0x03,0x0e,0x20,0x21,
23430x00,0x04,0x20,0x80,0x00,0x8d,0x20,0x21,0x94,0x82,0x00,0x04,0x3c,0x03,0xb0,0x08,
23440x3c,0x07,0xb0,0x03,0x00,0x02,0x28,0xc0,0x00,0xa2,0x10,0x21,0x00,0x02,0x10,0x80,
23450x00,0x4d,0x10,0x21,0x00,0xa3,0x28,0x21,0x27,0x26,0xa1,0x7c,0x34,0x03,0xff,0xff,
23460x34,0xe7,0x00,0x20,0xac,0xe6,0x00,0x00,0xa4,0x83,0x00,0x02,0xa4,0x43,0x00,0x00,
23470xac,0xa3,0x00,0x00,0x91,0x82,0x00,0x10,0x91,0x83,0x00,0x04,0xa5,0x8e,0x00,0x0e,
23480x01,0x22,0x10,0x21,0x14,0x60,0x00,0x05,0xa1,0x82,0x00,0x10,0x91,0x82,0x00,0x16,
23490x00,0x00,0x00,0x00,0x30,0x42,0x00,0xfd,0xa1,0x82,0x00,0x16,0x03,0xe0,0x00,0x08,
23500x00,0x00,0x00,0x00,0x95,0x82,0x00,0x0e,0x3c,0x03,0xb0,0x08,0x00,0x02,0x20,0xc0,
23510x00,0x82,0x20,0x21,0x00,0x04,0x20,0x80,0x00,0x8d,0x20,0x21,0x94,0x82,0x00,0x04,
23520x34,0xc6,0x00,0x20,0x27,0x27,0xa1,0x7c,0x00,0x02,0x28,0xc0,0x00,0xa2,0x10,0x21,
23530x00,0x02,0x10,0x80,0x00,0xa3,0x28,0x21,0x00,0x4d,0x10,0x21,0xac,0xc7,0x00,0x00,
23540xa4,0x8f,0x00,0x02,0xa4,0x4f,0x00,0x00,0xac,0xaf,0x00,0x00,0x08,0x00,0x23,0xf4,
23550x03,0x0e,0x20,0x21,0x08,0x00,0x23,0xcf,0xa5,0x88,0x00,0x02,0x00,0x0e,0xc0,0xc0,
23560x03,0x0e,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x8d,0x99,0x40,0x00,0x4d,0x10,0x21,
23570x94,0x43,0x00,0x02,0x30,0x84,0x00,0xff,0x14,0x80,0x00,0x05,0xa5,0x83,0x00,0x00,
23580x24,0x02,0xff,0xff,0x3c,0x19,0x80,0x01,0x08,0x00,0x23,0xcf,0xa5,0x82,0x00,0x02,
23590x08,0x00,0x23,0xcf,0x3c,0x19,0x80,0x01,0x3c,0x08,0xb0,0x03,0x3c,0x02,0x80,0x01,
23600x27,0xbd,0xff,0x78,0x35,0x08,0x00,0x20,0x24,0x42,0x90,0xd8,0xaf,0xb2,0x00,0x68,
23610xaf,0xb1,0x00,0x64,0xaf,0xb0,0x00,0x60,0xad,0x02,0x00,0x00,0xaf,0xbf,0x00,0x84,
23620xaf,0xbe,0x00,0x80,0xaf,0xb7,0x00,0x7c,0xaf,0xb6,0x00,0x78,0xaf,0xb5,0x00,0x74,
23630xaf,0xb4,0x00,0x70,0xaf,0xb3,0x00,0x6c,0xaf,0xa4,0x00,0x88,0x90,0x83,0x00,0x0a,
23640x27,0x82,0xbd,0x40,0xaf,0xa6,0x00,0x90,0x00,0x03,0x18,0x80,0x00,0x62,0x18,0x21,
23650x8c,0x63,0x00,0x00,0xaf,0xa7,0x00,0x94,0x27,0x86,0x99,0x44,0xaf,0xa3,0x00,0x1c,
23660x94,0x63,0x00,0x14,0x30,0xb1,0xff,0xff,0x24,0x08,0x00,0x01,0x00,0x03,0x20,0xc0,
23670xaf,0xa3,0x00,0x18,0x00,0x83,0x18,0x21,0xaf,0xa4,0x00,0x54,0x00,0x03,0x18,0x80,
23680x27,0x84,0x99,0x50,0x00,0x64,0x20,0x21,0x80,0x82,0x00,0x06,0x00,0x66,0x18,0x21,
23690x8c,0x66,0x00,0x18,0x24,0x42,0x00,0x02,0x00,0x02,0x1f,0xc2,0x8c,0xc4,0x00,0x08,
23700x00,0x43,0x10,0x21,0x00,0x02,0x10,0x43,0x00,0x02,0x10,0x40,0x00,0x04,0x2f,0xc2,
23710x00,0x04,0x1c,0x82,0x00,0xc2,0x38,0x21,0x00,0x04,0x24,0x42,0x8f,0xa2,0x00,0x1c,
23720x30,0x63,0x00,0x01,0x30,0x84,0x00,0x01,0xaf,0xa5,0x00,0x3c,0xaf,0xa3,0x00,0x34,
23730xaf,0xa4,0x00,0x38,0xaf,0xa0,0x00,0x40,0xaf,0xa0,0x00,0x44,0xaf,0xa0,0x00,0x50,
23740xaf,0xa8,0x00,0x20,0x80,0x42,0x00,0x12,0x8f,0xb2,0x00,0x18,0xaf,0xa2,0x00,0x28,
23750x8c,0xd0,0x00,0x0c,0x14,0xa0,0x01,0xda,0x00,0x60,0x30,0x21,0x00,0x10,0x10,0x82,
23760x30,0x45,0x00,0x07,0x10,0xa0,0x00,0x11,0xaf,0xa0,0x00,0x30,0x8f,0xa4,0x00,0x98,
23770x27,0x82,0x86,0x30,0x00,0x04,0x18,0x40,0x00,0x62,0x18,0x21,0x24,0xa2,0x00,0x05,
23780x8f,0xa5,0x00,0x20,0x94,0x64,0x00,0x00,0x00,0x45,0x10,0x04,0x00,0x44,0x00,0x1a,
23790x14,0x80,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x07,0x00,0x0d,0x00,0x00,0x10,0x12,
23800x24,0x42,0x00,0x10,0x30,0x42,0xff,0xfc,0xaf,0xa2,0x00,0x30,0x8f,0xa3,0x00,0x18,
23810x8f,0xa4,0x00,0x28,0x34,0x02,0xff,0xff,0xaf,0xa0,0x00,0x2c,0xaf,0xa2,0x00,0x48,
23820xaf,0xa3,0x00,0x4c,0x00,0x60,0xf0,0x21,0x00,0x00,0xb8,0x21,0x18,0x80,0x00,0x4e,
23830xaf,0xa0,0x00,0x24,0x00,0x11,0x89,0x02,0xaf,0xb1,0x00,0x58,0x00,0x80,0xa8,0x21,
23840x00,0x12,0x10,0xc0,0x00,0x52,0x20,0x21,0x00,0x04,0x20,0x80,0x00,0x40,0xa0,0x21,
23850x27,0x82,0x99,0x58,0x00,0x82,0x10,0x21,0x94,0x43,0x00,0x02,0x8f,0xa6,0x00,0x58,
23860x27,0x85,0x99,0x40,0x00,0x03,0x19,0x02,0x00,0x66,0x18,0x23,0x30,0x63,0x0f,0xff,
23870x00,0x85,0x20,0x21,0x28,0x62,0x00,0x20,0x94,0x96,0x00,0x02,0x10,0x40,0x01,0xa1,
23880x28,0x62,0x00,0x40,0x8f,0xa8,0x00,0x90,0x00,0x00,0x00,0x00,0x00,0x68,0x10,0x06,
23890x30,0x43,0x00,0x01,0x24,0x02,0x00,0x01,0x10,0x62,0x01,0x7b,0x3c,0x02,0xb0,0x03,
23900x8f,0xa6,0x00,0x88,0x34,0x42,0x01,0x04,0x84,0xc5,0x00,0x0c,0x02,0x92,0x18,0x21,
23910x94,0x46,0x00,0x00,0x00,0x05,0x20,0xc0,0x00,0x85,0x20,0x21,0x00,0x03,0x18,0x80,
23920x27,0x82,0x99,0x50,0x27,0x85,0x99,0x48,0x00,0x65,0x28,0x21,0x00,0x62,0x18,0x21,
23930x80,0x71,0x00,0x05,0x80,0x73,0x00,0x04,0x8f,0xa3,0x00,0x88,0x30,0xd0,0xff,0xff,
23940x00,0x10,0x3a,0x03,0x32,0x08,0x00,0xff,0x27,0x82,0x99,0x60,0x00,0x04,0x20,0x80,
23950x80,0xa6,0x00,0x06,0x00,0x82,0x20,0x21,0xa4,0x67,0x00,0x44,0xa4,0x68,0x00,0x46,
23960x8c,0x84,0x00,0x00,0x38,0xc6,0x00,0x00,0x01,0x00,0x80,0x21,0x00,0x04,0x15,0x02,
23970x30,0x42,0x00,0x01,0x10,0x40,0x00,0x03,0x00,0xe6,0x80,0x0a,0x00,0x04,0x14,0x02,
23980x30,0x50,0x00,0x0f,0x12,0x20,0x01,0x50,0x02,0x40,0x20,0x21,0x02,0x71,0x10,0x21,
23990x00,0x50,0x10,0x2a,0x14,0x40,0x00,0xed,0x02,0x92,0x10,0x21,0x93,0x82,0x94,0x51,
24000x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,0x14,0x40,0x00,0xe0,0x02,0x92,0x28,0x21,
24010x26,0xe2,0x00,0x01,0x30,0x57,0xff,0xff,0x02,0x40,0xf0,0x21,0x26,0xb5,0xff,0xff,
24020x16,0xa0,0xff,0xb7,0x02,0xc0,0x90,0x21,0x16,0xe0,0x00,0xd0,0x00,0x00,0x00,0x00,
24030x8f,0xa3,0x00,0x98,0x00,0x00,0x00,0x00,0x2c,0x62,0x00,0x10,0x10,0x40,0x00,0x2e,
24040x00,0x00,0x00,0x00,0x8f,0xa4,0x00,0x24,0x00,0x00,0x00,0x00,0x18,0x80,0x00,0x2a,
24050x24,0x03,0x00,0x01,0x8f,0xa5,0x00,0x1c,0x27,0x84,0x99,0x44,0x94,0xb2,0x00,0x14,
24060xa0,0xa3,0x00,0x12,0x8f,0xa6,0x00,0x3c,0x00,0x12,0x10,0xc0,0x00,0x52,0x10,0x21,
24070x00,0x02,0x80,0x80,0x27,0x82,0x99,0x50,0x02,0x02,0x10,0x21,0x80,0x43,0x00,0x06,
24080x02,0x04,0x20,0x21,0x8c,0x85,0x00,0x18,0x24,0x63,0x00,0x02,0x00,0x03,0x17,0xc2,
24090x00,0x62,0x18,0x21,0x00,0x03,0x18,0x43,0x00,0x03,0x18,0x40,0x14,0xc0,0x00,0x0e,
24100x00,0xa3,0x38,0x21,0x27,0x82,0x99,0x40,0x02,0x02,0x10,0x21,0x94,0x43,0x00,0x06,
24110x8f,0xa8,0x00,0x1c,0x24,0x02,0x00,0x01,0xa5,0x03,0x00,0x1a,0x7b,0xbe,0x04,0x3c,
24120x7b,0xb6,0x03,0xfc,0x7b,0xb4,0x03,0xbc,0x7b,0xb2,0x03,0x7c,0x7b,0xb0,0x03,0x3c,
24130x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x88,0x8f,0xa4,0x00,0x98,0x8f,0xa5,0x00,0x38,
24140x8f,0xa6,0x00,0x34,0xaf,0xa0,0x00,0x10,0x0c,0x00,0x10,0xa7,0xaf,0xa0,0x00,0x14,
24150x08,0x00,0x25,0x01,0x00,0x00,0x00,0x00,0x8f,0xa3,0x00,0x44,0x93,0x82,0x87,0x6d,
24160x00,0x00,0x00,0x00,0x10,0x40,0x00,0x61,0x30,0x69,0x00,0x03,0x8f,0xa4,0x00,0x24,
24170x8f,0xa5,0x00,0x28,0x00,0x00,0x00,0x00,0x00,0x85,0x10,0x2a,0x10,0x40,0x00,0x8f,
24180x00,0x00,0x00,0x00,0x8f,0xa6,0x00,0x1c,0x00,0x00,0x00,0x00,0x90,0xc4,0x00,0x04,
24190x00,0x00,0x00,0x00,0x30,0x83,0x00,0xff,0x00,0xa3,0x10,0x2a,0x10,0x40,0x00,0x87,
24200x00,0x00,0x00,0x00,0x8f,0xa8,0x00,0x24,0x00,0x00,0x00,0x00,0x11,0x00,0x00,0x83,
24210x00,0x65,0x10,0x23,0x00,0xa8,0x18,0x23,0x00,0x62,0x10,0x2a,0x14,0x40,0x00,0x7d,
24220x30,0x63,0x00,0xff,0x00,0x85,0x10,0x23,0x30,0x42,0x00,0xff,0xaf,0xa2,0x00,0x50,
24230x8f,0xa2,0x00,0x50,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x73,0x00,0x00,0xa8,0x21,
24240x27,0x8c,0x99,0x40,0x3c,0x0b,0x80,0xff,0x24,0x10,0x00,0x04,0x27,0x91,0x99,0x44,
24250x35,0x6b,0xff,0xff,0x3c,0x0d,0x7f,0x00,0x27,0x8e,0x99,0x50,0x01,0x80,0x78,0x21,
24260x00,0x12,0x30,0xc0,0x00,0xd2,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x4c,0x10,0x21,
24270x94,0x42,0x00,0x06,0x8f,0xa3,0x00,0x2c,0x8f,0xa4,0x00,0x30,0xaf,0xa2,0x00,0x44,
24280x8f,0xa5,0x00,0x44,0x30,0x49,0x00,0x03,0x02,0x09,0x10,0x23,0x30,0x42,0x00,0x03,
24290x00,0xa2,0x10,0x21,0x8f,0xa8,0x00,0x30,0x24,0x42,0x00,0x04,0x30,0x42,0xff,0xff,
24300x00,0x64,0x38,0x21,0x01,0x02,0x28,0x23,0x00,0x62,0x18,0x21,0x00,0x48,0x10,0x2b,
24310x10,0x40,0x00,0x52,0x00,0x00,0x20,0x21,0x30,0xe7,0xff,0xff,0x30,0xa4,0xff,0xff,
24320xaf,0xa7,0x00,0x2c,0x00,0xd2,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x51,0x18,0x21,
24330x8c,0x65,0x00,0x18,0x00,0x04,0x25,0x80,0x00,0x8d,0x20,0x24,0x8c,0xa8,0x00,0x04,
24340x00,0x4e,0x18,0x21,0x00,0x4f,0x50,0x21,0x01,0x0b,0x40,0x24,0x01,0x04,0x40,0x25,
24350xac,0xa8,0x00,0x04,0x8f,0xa4,0x00,0x98,0x8f,0xa2,0x00,0x50,0x26,0xb5,0x00,0x01,
24360xa0,0x64,0x00,0x00,0x8c,0xa4,0x00,0x08,0x00,0x00,0x00,0x00,0x04,0x81,0x00,0x0c,
24370x02,0xa2,0x30,0x2a,0x80,0x62,0x00,0x06,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x02,
24380x00,0x02,0x1f,0xc2,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x43,0x00,0x02,0x10,0x40,
24390x00,0xa2,0x38,0x21,0x8f,0xa5,0x00,0x40,0x00,0x00,0x00,0x00,0xa4,0xe5,0x00,0x00,
24400x95,0x52,0x00,0x02,0x14,0xc0,0xff,0xc7,0x00,0x12,0x30,0xc0,0x8f,0xa4,0x00,0x24,
24410x8f,0xa5,0x00,0x50,0x8f,0xa6,0x00,0x1c,0x8f,0xa3,0x00,0x2c,0x00,0x85,0x80,0x21,
24420xa0,0xd0,0x00,0x12,0x00,0x09,0x10,0x23,0x30,0x42,0x00,0x03,0x8f,0xa8,0x00,0x88,
24430x00,0x62,0x10,0x23,0xa4,0xc2,0x00,0x1a,0x85,0x03,0x00,0x0c,0x00,0x00,0x00,0x00,
24440x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x99,0x44,
24450x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x18,0x00,0x00,0x00,0x00,0x8c,0x83,0x00,0x04,
24460x00,0x00,0x00,0x00,0x30,0x63,0x00,0x10,0x14,0x60,0xff,0x74,0x02,0x00,0x10,0x21,
24470x8f,0xa3,0x00,0x54,0x8f,0xa4,0x00,0x18,0x8f,0xa5,0x00,0x24,0x00,0x64,0x10,0x21,
24480x00,0x02,0x10,0x80,0x27,0x83,0x99,0x58,0x00,0x43,0x10,0x21,0x90,0x44,0x00,0x00,
24490x10,0xa0,0x00,0x03,0x00,0x00,0x30,0x21,0x08,0x00,0x25,0x07,0x02,0x00,0x10,0x21,
24500x93,0x82,0x80,0x10,0x00,0x00,0x28,0x21,0x00,0x00,0x38,0x21,0x0c,0x00,0x29,0x5e,
24510xaf,0xa2,0x00,0x10,0x08,0x00,0x25,0x07,0x02,0x00,0x10,0x21,0x30,0x63,0xff,0xff,
24520x08,0x00,0x25,0x59,0xaf,0xa3,0x00,0x2c,0x8f,0xa8,0x00,0x44,0x08,0x00,0x25,0x7b,
24530x31,0x09,0x00,0x03,0x08,0x00,0x25,0x34,0xaf,0xa3,0x00,0x50,0x8f,0xa6,0x00,0x44,
24540xaf,0xa0,0x00,0x50,0x08,0x00,0x25,0x7b,0x30,0xc9,0x00,0x03,0x8f,0xa5,0x00,0x48,
24550x8f,0xa6,0x00,0x4c,0x8f,0xa4,0x00,0x1c,0x03,0xc0,0x38,0x21,0x0c,0x00,0x23,0xa6,
24560xaf,0xb7,0x00,0x10,0x08,0x00,0x24,0xe4,0x00,0x00,0x00,0x00,0x00,0x05,0x28,0x80,
24570x27,0x82,0x99,0x40,0x00,0xa2,0x28,0x21,0x00,0x00,0x20,0x21,0x0c,0x00,0x01,0x49,
24580x00,0x00,0x00,0x00,0x08,0x00,0x24,0xdd,0x26,0xe2,0x00,0x01,0x00,0x02,0x80,0x80,
24590x27,0x83,0x99,0x50,0x8f,0xa4,0x00,0x1c,0x02,0x03,0x18,0x21,0x26,0x31,0x00,0x01,
24600x02,0x40,0x28,0x21,0x0c,0x00,0x26,0xae,0xa0,0x71,0x00,0x05,0x14,0x40,0xff,0x13,
24610x00,0x00,0x00,0x00,0x16,0xe0,0x00,0x4d,0x03,0xc0,0x38,0x21,0x8f,0xa4,0x00,0x24,
24620x8f,0xa5,0x00,0x20,0x24,0x02,0x00,0x01,0x24,0x84,0x00,0x01,0xaf,0xb2,0x00,0x48,
24630xaf,0xb6,0x00,0x4c,0x02,0xc0,0xf0,0x21,0x10,0xa2,0x00,0x41,0xaf,0xa4,0x00,0x24,
24640x27,0x82,0x99,0x40,0x02,0x02,0x10,0x21,0x94,0x42,0x00,0x06,0x8f,0xa4,0x00,0x30,
24650xaf,0xa0,0x00,0x20,0xaf,0xa2,0x00,0x44,0x30,0x49,0x00,0x03,0x8f,0xa8,0x00,0x44,
24660x00,0x09,0x10,0x23,0x30,0x42,0x00,0x03,0x01,0x02,0x10,0x21,0x24,0x42,0x00,0x04,
24670x30,0x42,0xff,0xff,0x00,0x44,0x18,0x2b,0x10,0x60,0x00,0x2b,0x00,0x00,0x00,0x00,
24680x8f,0xa5,0x00,0x2c,0x00,0x82,0x10,0x23,0x00,0xa4,0x18,0x21,0x30,0x63,0xff,0xff,
24690x30,0x44,0xff,0xff,0xaf,0xa3,0x00,0x2c,0x02,0x92,0x28,0x21,0x00,0x05,0x28,0x80,
24700x27,0x82,0x99,0x44,0x00,0xa2,0x10,0x21,0x8c,0x46,0x00,0x18,0x3c,0x03,0x80,0xff,
24710x3c,0x02,0x7f,0x00,0x8c,0xc8,0x00,0x04,0x00,0x04,0x25,0x80,0x34,0x63,0xff,0xff,
24720x00,0x82,0x20,0x24,0x01,0x03,0x40,0x24,0x01,0x04,0x40,0x25,0xac,0xc8,0x00,0x04,
24730x8f,0xa8,0x00,0x98,0x27,0x82,0x99,0x50,0x00,0xa2,0x10,0x21,0xa0,0x48,0x00,0x00,
24740x8c,0xc4,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x04,0x27,0xc2,0x10,0x80,0xfe,0xdb,
24750xaf,0xa4,0x00,0x3c,0x80,0x42,0x00,0x06,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x02,
24760x00,0x02,0x1f,0xc2,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x43,0x00,0x02,0x10,0x40,
24770x00,0xc2,0x38,0x21,0x8f,0xa2,0x00,0x40,0x00,0x00,0x00,0x00,0xa4,0xe2,0x00,0x00,
24780x08,0x00,0x24,0xe0,0x26,0xb5,0xff,0xff,0x8f,0xa6,0x00,0x2c,0x00,0x00,0x20,0x21,
24790x00,0xc2,0x10,0x21,0x30,0x42,0xff,0xff,0x08,0x00,0x25,0xee,0xaf,0xa2,0x00,0x2c,
24800x8f,0xa6,0x00,0x1c,0x08,0x00,0x25,0xd8,0xa4,0xd2,0x00,0x14,0x8f,0xa5,0x00,0x48,
24810x8f,0xa6,0x00,0x4c,0x8f,0xa4,0x00,0x1c,0x0c,0x00,0x23,0xa6,0xaf,0xb7,0x00,0x10,
24820x08,0x00,0x25,0xcf,0x00,0x00,0xb8,0x21,0x0c,0x00,0x1a,0x28,0x00,0x00,0x28,0x21,
24830x94,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x34,0x63,0x08,0x00,0xa4,0x43,0x00,0x00,
24840x08,0x00,0x24,0xd4,0x02,0x71,0x10,0x21,0x02,0x92,0x18,0x21,0x00,0x03,0x80,0x80,
24850x27,0x82,0x99,0x44,0x02,0x02,0x10,0x21,0x8c,0x44,0x00,0x18,0x00,0x00,0x00,0x00,
24860x8c,0x83,0x00,0x04,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x10,0x10,0x60,0x00,0x09,
24870x24,0x06,0x00,0x01,0x93,0x82,0x94,0x51,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,
24880x10,0x40,0xfe,0xa3,0x3c,0x04,0x00,0x80,0x27,0x85,0x99,0x40,0x08,0x00,0x25,0xbf,
24890x02,0x05,0x28,0x21,0x27,0x83,0x99,0x58,0x27,0x82,0x99,0x50,0x02,0x03,0x18,0x21,
24900x02,0x02,0x10,0x21,0x90,0x64,0x00,0x00,0x90,0x45,0x00,0x05,0x93,0x83,0x80,0x10,
24910x00,0x00,0x38,0x21,0x0c,0x00,0x29,0x5e,0xaf,0xa3,0x00,0x10,0x08,0x00,0x26,0x35,
24920x00,0x00,0x00,0x00,0x10,0x40,0x00,0x04,0x00,0x00,0x00,0x00,0x8f,0xa4,0x00,0x94,
24930x08,0x00,0x24,0xac,0x00,0x64,0x10,0x06,0x08,0x00,0x24,0xad,0x00,0x00,0x18,0x21,
24940x8f,0xa4,0x00,0x98,0x8f,0xa5,0x00,0x38,0xaf,0xa0,0x00,0x10,0x0c,0x00,0x10,0xa7,
24950xaf,0xa8,0x00,0x14,0x30,0x42,0xff,0xff,0x08,0x00,0x24,0x77,0xaf,0xa2,0x00,0x40,
24960x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,0x27,0xbd,0xff,0xe0,0x34,0x42,0x00,0x20,
24970x24,0x63,0x99,0x60,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x18,
24980xac,0x43,0x00,0x00,0x90,0x82,0x00,0x0a,0x00,0x80,0x80,0x21,0x14,0x40,0x00,0x45,
24990x00,0x00,0x88,0x21,0x92,0x02,0x00,0x04,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x3c,
25000x00,0x00,0x00,0x00,0x12,0x20,0x00,0x18,0x00,0x00,0x00,0x00,0x92,0x02,0x00,0x16,
25010x92,0x05,0x00,0x0a,0x30,0x42,0x00,0xfc,0x10,0xa0,0x00,0x03,0xa2,0x02,0x00,0x16,
25020x34,0x42,0x00,0x01,0xa2,0x02,0x00,0x16,0x92,0x04,0x00,0x04,0x00,0x00,0x00,0x00,
25030x30,0x83,0x00,0xff,0x10,0x60,0x00,0x05,0x00,0x00,0x00,0x00,0x92,0x02,0x00,0x16,
25040x00,0x00,0x00,0x00,0x34,0x42,0x00,0x02,0xa2,0x02,0x00,0x16,0x10,0x60,0x00,0x0a,
25050x00,0x00,0x00,0x00,0x14,0xa0,0x00,0x08,0x00,0x00,0x00,0x00,0x96,0x02,0x00,0x00,
25060xa2,0x00,0x00,0x17,0xa6,0x02,0x00,0x14,0x8f,0xbf,0x00,0x18,0x7b,0xb0,0x00,0xbc,
25070x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x14,0x80,0x00,0x05,0x24,0x02,0x00,0x01,
25080x96,0x03,0x00,0x06,0xa2,0x02,0x00,0x17,0x08,0x00,0x26,0x82,0xa6,0x03,0x00,0x14,
25090x96,0x04,0x00,0x00,0x96,0x05,0x00,0x06,0x27,0x86,0x99,0x40,0x00,0x04,0x10,0xc0,
25100x00,0x05,0x18,0xc0,0x00,0x44,0x10,0x21,0x00,0x65,0x18,0x21,0x00,0x02,0x10,0x80,
25110x00,0x03,0x18,0x80,0x00,0x66,0x18,0x21,0x00,0x46,0x10,0x21,0x8c,0x65,0x00,0x08,
25120x8c,0x44,0x00,0x08,0x0c,0x00,0x1a,0x19,0x00,0x00,0x00,0x00,0x30,0x43,0x00,0xff,
25130x10,0x60,0x00,0x04,0xa2,0x02,0x00,0x17,0x96,0x02,0x00,0x06,0x08,0x00,0x26,0x82,
25140xa6,0x02,0x00,0x14,0x96,0x02,0x00,0x00,0x08,0x00,0x26,0x82,0xa6,0x02,0x00,0x14,
25150x96,0x05,0x00,0x00,0x0c,0x00,0x26,0xae,0x02,0x00,0x20,0x21,0x08,0x00,0x26,0x69,
25160x02,0x22,0x88,0x21,0x94,0x85,0x00,0x06,0x0c,0x00,0x26,0xae,0x00,0x00,0x00,0x00,
25170x08,0x00,0x26,0x65,0x00,0x40,0x88,0x21,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x01,
25180x34,0x63,0x00,0x20,0x24,0x42,0x9a,0xb8,0x27,0xbd,0xff,0xf0,0xac,0x62,0x00,0x00,
25190x00,0x00,0x10,0x21,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x10,0x3c,0x03,0xb0,0x03,
25200x3c,0x02,0x80,0x01,0x34,0x63,0x00,0x20,0x24,0x42,0x9a,0xdc,0xac,0x62,0x00,0x00,
25210x90,0x89,0x00,0x0a,0x00,0x80,0x30,0x21,0x11,0x20,0x00,0x05,0x00,0xa0,0x50,0x21,
25220x90,0x82,0x00,0x17,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x1b,0x00,0x00,0x00,0x00,
25230x90,0xc7,0x00,0x04,0x00,0x00,0x00,0x00,0x10,0xe0,0x00,0x1b,0x00,0x00,0x00,0x00,
25240x94,0xc8,0x00,0x00,0x27,0x83,0x99,0x40,0x93,0x85,0x94,0x50,0x00,0x08,0x10,0xc0,
25250x00,0x48,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x08,
25260x00,0xe5,0x28,0x2b,0x10,0xa0,0x00,0x06,0x01,0x44,0x18,0x23,0x8f,0x82,0x94,0x68,
25270x00,0x00,0x00,0x00,0x00,0x43,0x10,0x2b,0x10,0x40,0x00,0x05,0x00,0x00,0x00,0x00,
25280x24,0x03,0x00,0x10,0xa4,0xc8,0x00,0x14,0x03,0xe0,0x00,0x08,0x00,0x60,0x10,0x21,
25290x11,0x20,0x00,0x05,0x00,0x00,0x00,0x00,0x94,0xc2,0x00,0x06,0x24,0x03,0x00,0x08,
25300x08,0x00,0x26,0xda,0xa4,0xc2,0x00,0x14,0x08,0x00,0x26,0xda,0x00,0x00,0x18,0x21,
25310x27,0xbd,0xff,0xc8,0xaf,0xb5,0x00,0x2c,0xaf,0xb4,0x00,0x28,0xaf,0xb3,0x00,0x24,
25320xaf,0xb0,0x00,0x18,0xaf,0xbf,0x00,0x30,0xaf,0xb2,0x00,0x20,0xaf,0xb1,0x00,0x1c,
25330x94,0x91,0x00,0x06,0x00,0x80,0xa0,0x21,0x3c,0x02,0x80,0x01,0x3c,0x04,0xb0,0x03,
25340x00,0x11,0xa8,0xc0,0x34,0x84,0x00,0x20,0x24,0x42,0x9b,0x90,0x02,0xb1,0x48,0x21,
25350xac,0x82,0x00,0x00,0x00,0x09,0x48,0x80,0x24,0x03,0x00,0x01,0x27,0x82,0x99,0x50,
25360xa2,0x83,0x00,0x12,0x01,0x22,0x10,0x21,0x27,0x84,0x99,0x44,0x01,0x24,0x20,0x21,
25370x80,0x48,0x00,0x06,0x8c,0x8a,0x00,0x18,0x27,0x83,0x99,0x60,0x01,0x23,0x48,0x21,
25380x8d,0x24,0x00,0x00,0x25,0x08,0x00,0x02,0x8d,0x42,0x00,0x00,0x8d,0x49,0x00,0x04,
25390x00,0x08,0x17,0xc2,0x8d,0x43,0x00,0x08,0x01,0x02,0x40,0x21,0x00,0x04,0x25,0xc2,
25400x00,0x08,0x40,0x43,0x30,0x84,0x00,0x01,0x00,0x03,0x1f,0xc2,0x00,0x08,0x40,0x40,
25410x00,0xe0,0x80,0x21,0x00,0x64,0x18,0x24,0x00,0x09,0x49,0x42,0x01,0x48,0x10,0x21,
25420x00,0xa0,0x98,0x21,0x00,0xa0,0x20,0x21,0x00,0x40,0x38,0x21,0x02,0x00,0x28,0x21,
25430x14,0x60,0x00,0x19,0x31,0x29,0x00,0x01,0x94,0x42,0x00,0x00,0x02,0xb1,0x88,0x21,
25440x02,0x00,0x28,0x21,0x00,0x11,0x88,0x80,0x27,0x90,0x99,0x40,0x02,0x30,0x80,0x21,
25450x96,0x03,0x00,0x06,0x30,0x52,0xff,0xff,0x02,0x60,0x20,0x21,0x00,0x60,0x30,0x21,
25460xa6,0x83,0x00,0x1a,0x27,0x82,0x99,0x48,0x0c,0x00,0x10,0x80,0x02,0x22,0x88,0x21,
25470x00,0x52,0x10,0x21,0x96,0x03,0x00,0x06,0xa6,0x22,0x00,0x04,0x8f,0xbf,0x00,0x30,
25480x7b,0xb4,0x01,0x7c,0x7b,0xb2,0x01,0x3c,0x7b,0xb0,0x00,0xfc,0x00,0x60,0x10,0x21,
25490x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x38,0xaf,0xa9,0x00,0x10,0x0c,0x00,0x10,0xa7,
25500xaf,0xa0,0x00,0x14,0x08,0x00,0x27,0x18,0x02,0xb1,0x88,0x21,0x27,0xbd,0xff,0xc0,
25510xaf,0xbe,0x00,0x38,0xaf,0xb7,0x00,0x34,0xaf,0xb6,0x00,0x30,0xaf,0xb5,0x00,0x2c,
25520xaf,0xb3,0x00,0x24,0xaf,0xb1,0x00,0x1c,0xaf,0xbf,0x00,0x3c,0xaf,0xb4,0x00,0x28,
25530xaf,0xb2,0x00,0x20,0xaf,0xb0,0x00,0x18,0x94,0x90,0x00,0x00,0x3c,0x08,0xb0,0x03,
25540x35,0x08,0x00,0x20,0x00,0x10,0x10,0xc0,0x00,0x50,0x18,0x21,0x00,0x40,0x88,0x21,
25550x3c,0x02,0x80,0x01,0x00,0x03,0x48,0x80,0x24,0x42,0x9c,0xcc,0x00,0x80,0x98,0x21,
25560x27,0x84,0x99,0x50,0x01,0x24,0x20,0x21,0x93,0xb7,0x00,0x53,0xad,0x02,0x00,0x00,
25570x80,0x83,0x00,0x06,0x27,0x82,0x99,0x44,0x01,0x22,0x10,0x21,0x8c,0x44,0x00,0x18,
25580x24,0x63,0x00,0x02,0x00,0x03,0x17,0xc2,0x8c,0x88,0x00,0x08,0x00,0x62,0x18,0x21,
25590x00,0x03,0x18,0x43,0x00,0x03,0x18,0x40,0xaf,0xa7,0x00,0x4c,0x2c,0xa2,0x00,0x10,
25600x00,0xa0,0xa8,0x21,0x00,0x83,0x50,0x21,0x00,0x08,0x47,0xc2,0x00,0xc0,0x58,0x21,
25610x00,0x00,0xb0,0x21,0x8c,0x92,0x00,0x0c,0x14,0x40,0x00,0x13,0x00,0x00,0xf0,0x21,
25620x92,0x67,0x00,0x04,0x24,0x14,0x00,0x01,0x12,0x87,0x00,0x10,0x02,0x30,0x10,0x21,
25630x27,0x83,0x99,0x58,0x01,0x23,0x18,0x21,0x80,0x64,0x00,0x00,0x27,0x83,0xbe,0xb0,
25640x00,0x04,0x11,0x00,0x00,0x44,0x10,0x23,0x00,0x02,0x10,0x80,0x00,0x44,0x10,0x23,
25650x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x90,0x44,0x00,0x04,0x00,0x00,0x00,0x00,
25660x10,0x80,0x00,0x23,0x00,0x00,0x00,0x00,0x02,0x30,0x10,0x21,0x00,0x02,0x80,0x80,
25670x24,0x04,0x00,0x01,0x27,0x83,0x99,0x60,0xa2,0x64,0x00,0x12,0x02,0x03,0x18,0x21,
25680x8c,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x15,0xc2,0x30,0x42,0x00,0x01,
25690x01,0x02,0x10,0x24,0x14,0x40,0x00,0x0e,0x02,0xa0,0x20,0x21,0x27,0x82,0x99,0x40,
25700x02,0x02,0x10,0x21,0x94,0x43,0x00,0x06,0x00,0x00,0x00,0x00,0xa6,0x63,0x00,0x1a,
25710x94,0x42,0x00,0x06,0x7b,0xbe,0x01,0xfc,0x7b,0xb6,0x01,0xbc,0x7b,0xb4,0x01,0x7c,
25720x7b,0xb2,0x01,0x3c,0x7b,0xb0,0x00,0xfc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x40,
25730x8f,0xa5,0x00,0x4c,0x01,0x60,0x30,0x21,0x01,0x40,0x38,0x21,0xaf,0xa0,0x00,0x10,
25740x0c,0x00,0x10,0xa7,0xaf,0xa0,0x00,0x14,0x08,0x00,0x27,0x7f,0x00,0x00,0x00,0x00,
25750x27,0x83,0x99,0x60,0x01,0x23,0x18,0x21,0x8c,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
25760x00,0x02,0x15,0xc2,0x30,0x42,0x00,0x01,0x01,0x02,0x10,0x24,0x14,0x40,0x00,0xaf,
25770x00,0xa0,0x20,0x21,0x32,0x4f,0x00,0x03,0x00,0x12,0x10,0x82,0x25,0xe3,0x00,0x0d,
25780x30,0x45,0x00,0x07,0x00,0x74,0x78,0x04,0x10,0xa0,0x00,0x0e,0x00,0x00,0x90,0x21,
25790x27,0x82,0x86,0x30,0x00,0x15,0x18,0x40,0x00,0x62,0x18,0x21,0x94,0x64,0x00,0x00,
25800x24,0xa2,0x00,0x05,0x00,0x54,0x10,0x04,0x00,0x44,0x00,0x1a,0x14,0x80,0x00,0x02,
25810x00,0x00,0x00,0x00,0x00,0x07,0x00,0x0d,0x00,0x00,0x10,0x12,0x24,0x42,0x00,0x10,
25820x30,0x52,0xff,0xfc,0x02,0x30,0x10,0x21,0x27,0x83,0x99,0x50,0x00,0x02,0x10,0x80,
25830x00,0x43,0x10,0x21,0x90,0x44,0x00,0x03,0x00,0x00,0x00,0x00,0x30,0x83,0x00,0xff,
25840x2c,0x62,0x00,0x0c,0x14,0x40,0x00,0x04,0x2c,0x62,0x00,0x19,0x30,0x82,0x00,0x0f,
25850x24,0x43,0x00,0x0c,0x2c,0x62,0x00,0x19,0x10,0x40,0x00,0x19,0x24,0x0e,0x00,0x20,
25860x24,0x62,0xff,0xe9,0x2c,0x42,0x00,0x02,0x14,0x40,0x00,0x15,0x24,0x0e,0x00,0x10,
25870x24,0x62,0xff,0xeb,0x2c,0x42,0x00,0x02,0x14,0x40,0x00,0x11,0x24,0x0e,0x00,0x08,
25880x24,0x02,0x00,0x14,0x10,0x62,0x00,0x0e,0x24,0x0e,0x00,0x02,0x24,0x62,0xff,0xef,
25890x2c,0x42,0x00,0x03,0x14,0x40,0x00,0x0a,0x24,0x0e,0x00,0x10,0x24,0x62,0xff,0xf1,
25900x2c,0x42,0x00,0x02,0x14,0x40,0x00,0x06,0x24,0x0e,0x00,0x08,0x24,0x62,0xff,0xf3,
25910x2c,0x42,0x00,0x02,0x24,0x0e,0x00,0x04,0x24,0x03,0x00,0x02,0x00,0x62,0x70,0x0a,
25920x30,0xe2,0x00,0xff,0x00,0x00,0x48,0x21,0x00,0x00,0x68,0x21,0x10,0x40,0x00,0x6d,
25930x00,0x00,0x58,0x21,0x3c,0x14,0x80,0xff,0x27,0x99,0x99,0x40,0x01,0xf2,0xc0,0x23,
25940x36,0x94,0xff,0xff,0x01,0xc9,0x10,0x2a,0x14,0x40,0x00,0x64,0x24,0x03,0x00,0x04,
25950x00,0x10,0x28,0xc0,0x00,0xb0,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x59,0x10,0x21,
25960x94,0x56,0x00,0x06,0x00,0x00,0x00,0x00,0x32,0xcc,0x00,0x03,0x00,0x6c,0x10,0x23,
25970x30,0x42,0x00,0x03,0x02,0xc2,0x10,0x21,0x24,0x42,0x00,0x04,0x30,0x51,0xff,0xff,
25980x02,0x32,0x18,0x2b,0x10,0x60,0x00,0x4d,0x01,0xf1,0x10,0x23,0x02,0x51,0x10,0x23,
25990x01,0x78,0x18,0x2b,0x10,0x60,0x00,0x34,0x30,0x44,0xff,0xff,0x29,0x22,0x00,0x40,
26000x10,0x40,0x00,0x31,0x01,0x72,0x18,0x21,0x25,0x22,0x00,0x01,0x00,0x02,0x16,0x00,
26010x00,0x02,0x4e,0x03,0x00,0xb0,0x10,0x21,0x00,0x02,0x30,0x80,0x27,0x82,0x99,0x44,
26020x30,0x6b,0xff,0xff,0x00,0xc2,0x18,0x21,0x8c,0x67,0x00,0x18,0x00,0x04,0x25,0x80,
26030x3c,0x03,0x7f,0x00,0x8c,0xe2,0x00,0x04,0x00,0x83,0x20,0x24,0x27,0x83,0x99,0x50,
26040x00,0x54,0x10,0x24,0x00,0xc3,0x28,0x21,0x00,0x44,0x10,0x25,0xac,0xe2,0x00,0x04,
26050x16,0xe0,0x00,0x02,0xa0,0xb5,0x00,0x00,0xa0,0xb5,0x00,0x03,0x27,0x84,0x99,0x60,
26060x00,0xc4,0x18,0x21,0x8c,0x62,0x00,0x00,0x8c,0xe8,0x00,0x08,0x00,0x02,0x15,0xc2,
26070x00,0x08,0x47,0xc2,0x30,0x42,0x00,0x01,0x01,0x02,0x10,0x24,0x10,0x40,0x00,0x0a,
26080x00,0x00,0x00,0x00,0x80,0xa2,0x00,0x06,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x02,
26090x00,0x02,0x1f,0xc2,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x43,0x00,0x02,0x10,0x40,
26100x00,0xe2,0x50,0x21,0xa5,0x5e,0x00,0x00,0x92,0x62,0x00,0x04,0x25,0xad,0x00,0x01,
26110x27,0x84,0x99,0x40,0x00,0xc4,0x18,0x21,0x01,0xa2,0x10,0x2a,0x94,0x70,0x00,0x02,
26120x14,0x40,0xff,0xb8,0x00,0x00,0x00,0x00,0x96,0x63,0x00,0x14,0x00,0x0c,0x10,0x23,
26130xa2,0x69,0x00,0x12,0x30,0x42,0x00,0x03,0x01,0x62,0x10,0x23,0x00,0x03,0x80,0xc0,
26140x8f,0xa5,0x00,0x4c,0x30,0x4b,0xff,0xff,0x02,0x03,0x80,0x21,0x27,0x82,0x99,0x48,
26150x00,0x10,0x80,0x80,0xa6,0x6b,0x00,0x1a,0x02,0xa0,0x20,0x21,0x01,0x60,0x30,0x21,
26160x01,0x60,0x88,0x21,0x0c,0x00,0x10,0x80,0x02,0x02,0x80,0x21,0x00,0x5e,0x10,0x21,
26170xa6,0x02,0x00,0x04,0x08,0x00,0x27,0x85,0x02,0x20,0x10,0x21,0x01,0x62,0x10,0x2b,
26180x10,0x40,0xff,0xe9,0x00,0x00,0x20,0x21,0x29,0x22,0x00,0x40,0x10,0x40,0xff,0xe6,
26190x01,0x71,0x18,0x21,0x08,0x00,0x27,0xfb,0x25,0x22,0x00,0x01,0x08,0x00,0x28,0x2a,
26200x32,0xcc,0x00,0x03,0x08,0x00,0x28,0x2a,0x00,0x00,0x60,0x21,0x8f,0xa5,0x00,0x4c,
26210x01,0x40,0x38,0x21,0xaf,0xa0,0x00,0x10,0x0c,0x00,0x10,0xa7,0xaf,0xb4,0x00,0x14,
26220x92,0x67,0x00,0x04,0x08,0x00,0x27,0x9d,0x30,0x5e,0xff,0xff,0x30,0x84,0xff,0xff,
26230x00,0x04,0x30,0xc0,0x00,0xc4,0x20,0x21,0x00,0x04,0x20,0x80,0x27,0x82,0x99,0x40,
26240x3c,0x03,0xb0,0x08,0x30,0xa5,0xff,0xff,0x00,0x82,0x20,0x21,0x00,0xc3,0x30,0x21,
26250xac,0xc5,0x00,0x00,0x03,0xe0,0x00,0x08,0xa4,0x85,0x00,0x00,0x30,0x84,0xff,0xff,
26260x00,0x04,0x30,0xc0,0x00,0xc4,0x30,0x21,0x27,0x88,0x99,0x40,0x00,0x06,0x30,0x80,
26270x00,0xc8,0x30,0x21,0x94,0xc3,0x00,0x04,0x3c,0x02,0xb0,0x08,0x3c,0x07,0xb0,0x03,
26280x00,0x03,0x20,0xc0,0x00,0x83,0x18,0x21,0x00,0x03,0x18,0x80,0x00,0x82,0x20,0x21,
26290x3c,0x02,0x80,0x01,0x30,0xa5,0xff,0xff,0x00,0x68,0x18,0x21,0x34,0xe7,0x00,0x20,
26300x24,0x42,0xa1,0x7c,0xac,0xe2,0x00,0x00,0xa4,0xc5,0x00,0x02,0xa4,0x65,0x00,0x00,
26310x03,0xe0,0x00,0x08,0xac,0x85,0x00,0x00,0x30,0x84,0xff,0xff,0x00,0x04,0x10,0xc0,
26320x00,0x44,0x10,0x21,0x27,0x89,0x99,0x40,0x00,0x02,0x10,0x80,0x00,0x49,0x10,0x21,
26330x97,0x83,0x99,0x30,0x94,0x4a,0x00,0x04,0x3c,0x02,0xb0,0x08,0x00,0x03,0x38,0xc0,
26340x00,0x0a,0x40,0xc0,0x00,0xe3,0x18,0x21,0x01,0x0a,0x28,0x21,0x00,0xe2,0x38,0x21,
26350x01,0x02,0x40,0x21,0x00,0x03,0x18,0x80,0x00,0x05,0x28,0x80,0x3c,0x06,0xb0,0x03,
26360x3c,0x02,0x80,0x01,0x00,0xa9,0x28,0x21,0x00,0x69,0x18,0x21,0x34,0xc6,0x00,0x20,
26370x34,0x09,0xff,0xff,0x24,0x42,0xa1,0xd8,0xac,0xc2,0x00,0x00,0xa4,0x64,0x00,0x00,
26380xac,0xe4,0x00,0x00,0xa4,0xa9,0x00,0x00,0xad,0x09,0x00,0x00,0xa7,0x8a,0x99,0x30,
26390x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x01,
26400x34,0x63,0x00,0x20,0x24,0x42,0xa2,0x58,0x3c,0x04,0xb0,0x03,0xac,0x62,0x00,0x00,
26410x34,0x84,0x01,0x10,0x8c,0x82,0x00,0x00,0x97,0x83,0x87,0x74,0x30,0x42,0xff,0xff,
26420x10,0x62,0x00,0x16,0x24,0x0a,0x00,0x01,0xa7,0x82,0x87,0x74,0xaf,0x80,0xbd,0x90,
26430x00,0x40,0x28,0x21,0x24,0x06,0x00,0x01,0x27,0x84,0xbd,0x94,0x25,0x43,0xff,0xff,
26440x00,0x66,0x10,0x04,0x00,0xa2,0x10,0x24,0x14,0x40,0x00,0x07,0x00,0x00,0x00,0x00,
26450x8c,0x83,0xff,0xfc,0x00,0x00,0x00,0x00,0x00,0x66,0x10,0x04,0x00,0xa2,0x10,0x24,
26460x38,0x42,0x00,0x00,0x01,0x42,0x18,0x0a,0x25,0x4a,0x00,0x01,0x2d,0x42,0x00,0x14,
26470xac,0x83,0x00,0x00,0x14,0x40,0xff,0xf1,0x24,0x84,0x00,0x04,0x3c,0x0b,0xb0,0x03,
26480x00,0x00,0x50,0x21,0x3c,0x0c,0x80,0x00,0x27,0x89,0xbd,0xe0,0x35,0x6b,0x01,0x20,
26490x8d,0x68,0x00,0x00,0x8d,0x23,0x00,0x04,0x01,0x0c,0x10,0x24,0x00,0x02,0x17,0xc2,
26500x11,0x03,0x00,0x37,0xa1,0x22,0x00,0xdc,0xa1,0x20,0x00,0xd5,0xa1,0x20,0x00,0xd6,
26510x01,0x20,0x30,0x21,0x00,0x00,0x38,0x21,0x00,0x00,0x28,0x21,0x01,0x20,0x20,0x21,
26520x00,0xa8,0x10,0x06,0x30,0x42,0x00,0x01,0x10,0xe0,0x00,0x10,0xa0,0x82,0x00,0x0a,
26530x90,0x82,0x00,0x07,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x31,0x24,0xa2,0xff,0xff,
26540xa0,0x82,0x00,0x08,0x90,0x82,0x00,0x0a,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x09,
26550x00,0x00,0x00,0x00,0x90,0x83,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x03,0x10,0x40,
26560x00,0x43,0x10,0x21,0x00,0x46,0x10,0x21,0xa0,0x45,0x00,0x09,0x90,0x82,0x00,0x0a,
26570x00,0x00,0x00,0x00,0x10,0x40,0x00,0x07,0x00,0x00,0x00,0x00,0x14,0xe0,0x00,0x04,
26580x00,0x00,0x00,0x00,0xa0,0xc5,0x00,0xd5,0x24,0x07,0x00,0x01,0xa0,0x85,0x00,0x08,
26590xa0,0xc5,0x00,0xd6,0x24,0xa5,0x00,0x01,0x2c,0xa2,0x00,0x1c,0x14,0x40,0xff,0xe0,
26600x24,0x84,0x00,0x03,0x90,0xc4,0x00,0xd5,0x00,0x00,0x28,0x21,0x00,0xa4,0x10,0x2b,
26610x10,0x40,0x00,0x0b,0x00,0x00,0x00,0x00,0x00,0xc0,0x18,0x21,0xa0,0x64,0x00,0x08,
26620x90,0xc2,0x00,0xd5,0x24,0xa5,0x00,0x01,0xa0,0x62,0x00,0x09,0x90,0xc4,0x00,0xd5,
26630x00,0x00,0x00,0x00,0x00,0xa4,0x10,0x2b,0x14,0x40,0xff,0xf8,0x24,0x63,0x00,0x03,
26640x25,0x4a,0x00,0x01,0x2d,0x42,0x00,0x08,0xad,0x28,0x00,0x04,0x25,0x6b,0x00,0x04,
26650x14,0x40,0xff,0xbf,0x25,0x29,0x00,0xec,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
26660x90,0x82,0x00,0x05,0x08,0x00,0x28,0xd1,0xa0,0x82,0x00,0x08,0x97,0x85,0x94,0x5a,
26670x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x01,0x27,0xbd,0xff,0xe8,0x34,0x63,0x00,0x20,
26680x24,0x42,0xa4,0x0c,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,0xac,0x62,0x00,0x00,
26690x30,0x90,0x00,0xff,0x00,0x05,0x28,0x42,0x00,0x00,0x48,0x21,0x27,0x8f,0xbd,0xe4,
26700x00,0x00,0x50,0x21,0x00,0x00,0x58,0x21,0x27,0x98,0xbe,0xc4,0x27,0x99,0xbe,0xc0,
26710x27,0x8e,0xbe,0xbe,0x27,0x8c,0xbd,0xe8,0x27,0x8d,0xbe,0x40,0x27,0x88,0xbe,0xb8,
26720x00,0x0a,0x18,0x80,0x01,0x6f,0x10,0x21,0xac,0x40,0x00,0x00,0xac,0x45,0x00,0x58,
26730x00,0x6e,0x20,0x21,0x00,0x78,0x10,0x21,0xa1,0x00,0xff,0xfc,0xad,0x00,0x00,0x00,
26740xa1,0x00,0x00,0x04,0xa1,0x00,0x00,0x05,0xad,0x00,0xff,0xf8,0x00,0x79,0x18,0x21,
26750x24,0x06,0x00,0x01,0x24,0xc6,0xff,0xff,0xa0,0x80,0x00,0x00,0xa4,0x60,0x00,0x00,
26760xac,0x40,0x00,0x00,0x24,0x63,0x00,0x02,0x24,0x42,0x00,0x04,0x04,0xc1,0xff,0xf9,
26770x24,0x84,0x00,0x01,0x00,0x0a,0x10,0x80,0x00,0x4d,0x20,0x21,0x00,0x00,0x30,0x21,
26780x00,0x4c,0x18,0x21,0x27,0x87,0x87,0x78,0x8c,0xe2,0x00,0x00,0x24,0xe7,0x00,0x04,
26790xac,0x82,0x00,0x00,0xa0,0x66,0x00,0x00,0xa0,0x66,0x00,0x01,0x24,0xc6,0x00,0x01,
26800x28,0xc2,0x00,0x1c,0xa0,0x60,0x00,0x02,0x24,0x84,0x00,0x04,0x14,0x40,0xff,0xf6,
26810x24,0x63,0x00,0x03,0x25,0x29,0x00,0x01,0x29,0x22,0x00,0x08,0x25,0x4a,0x00,0x3b,
26820x25,0x08,0x00,0xec,0x14,0x40,0xff,0xd6,0x25,0x6b,0x00,0xec,0xa7,0x80,0x87,0x74,
26830x00,0x00,0x48,0x21,0x27,0x83,0xbd,0x90,0xac,0x69,0x00,0x00,0x25,0x29,0x00,0x01,
26840x29,0x22,0x00,0x0c,0x14,0x40,0xff,0xfc,0x24,0x63,0x00,0x04,0x0c,0x00,0x28,0x96,
26850x00,0x00,0x00,0x00,0x2e,0x04,0x00,0x14,0x27,0x83,0xbd,0xe0,0x24,0x09,0x00,0x07,
26860x10,0x80,0x00,0x0a,0x00,0x00,0x00,0x00,0x90,0x62,0x00,0xd5,0x25,0x29,0xff,0xff,
26870xa0,0x62,0x00,0x00,0x05,0x21,0xff,0xfa,0x24,0x63,0x00,0xec,0x8f,0xbf,0x00,0x14,
26880x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x90,0x62,0x00,0xd6,
26890x08,0x00,0x29,0x54,0x25,0x29,0xff,0xff,0x30,0x84,0x00,0xff,0x00,0x04,0x11,0x00,
26900x00,0x44,0x10,0x23,0x00,0x02,0x10,0x80,0x00,0x44,0x10,0x23,0x00,0x02,0x10,0x80,
26910x27,0x83,0xbd,0xe0,0x00,0x43,0x60,0x21,0x3c,0x04,0xb0,0x03,0x3c,0x02,0x80,0x01,
26920x34,0x84,0x00,0x20,0x24,0x42,0xa5,0x78,0x30,0xc6,0x00,0xff,0x93,0xaa,0x00,0x13,
26930x30,0xa5,0x00,0xff,0x30,0xe7,0x00,0xff,0xac,0x82,0x00,0x00,0x10,0xc0,0x00,0xe8,
26940x25,0x8f,0x00,0xd0,0x91,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x24,0x42,0xff,0xfc,
26950x2c,0x43,0x00,0x18,0x10,0x60,0x00,0xc7,0x3c,0x03,0x80,0x01,0x00,0x02,0x10,0x80,
26960x24,0x63,0x09,0x3c,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,
26970x00,0x80,0x00,0x08,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x30,0x14,0x40,0x00,0x1c,
26980x00,0x00,0x00,0x00,0x10,0xa0,0x00,0x17,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
26990x10,0xa2,0x00,0x11,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0x00,0x0c,
27000x00,0x00,0x00,0x00,0x24,0x02,0x00,0x03,0x10,0xa2,0x00,0x06,0x00,0x00,0x00,0x00,
27010x8d,0x82,0x00,0xd0,0x00,0x00,0x00,0x00,0x24,0x42,0xff,0xe0,0x03,0xe0,0x00,0x08,
27020xad,0x82,0x00,0xd0,0x8d,0x82,0x00,0xd0,0x08,0x00,0x29,0x8f,0x24,0x42,0xff,0xe8,
27030x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,0x08,0x00,0x29,0x8f,
27040x24,0x42,0x00,0x01,0x8d,0x82,0x00,0xd0,0x08,0x00,0x29,0x8f,0x24,0x42,0x00,0x02,
27050x10,0xa0,0xff,0xf9,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0x00,0x0a,
27060x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0xe9,0x00,0x00,0x00,0x00,
27070x24,0x02,0x00,0x03,0x10,0xa2,0xff,0xe6,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,
27080x08,0x00,0x29,0x8f,0x24,0x42,0xff,0xd0,0x8d,0x82,0x00,0xd0,0x08,0x00,0x29,0x8f,
27090x24,0x42,0xff,0xfc,0x10,0xa0,0xff,0xeb,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
27100x10,0xa2,0xff,0xe5,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0xe0,
27110x24,0x02,0x00,0x03,0x14,0xa2,0xff,0xdb,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,
27120x08,0x00,0x29,0x8f,0x24,0x42,0xff,0xf8,0x2d,0x42,0x00,0x19,0x14,0x40,0xff,0xc5,
27130x00,0x00,0x00,0x00,0x10,0xa0,0xff,0xdb,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
27140x10,0xa2,0xff,0xd5,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0xd0,
27150x24,0x02,0x00,0x03,0x10,0xa2,0xff,0xf1,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,
27160x08,0x00,0x29,0x8f,0x24,0x42,0xff,0xf0,0x2d,0x42,0x00,0x1b,0x10,0x40,0xff,0xf1,
27170x00,0x00,0x00,0x00,0x10,0xa0,0xff,0xcb,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
27180x10,0xa2,0xff,0xc5,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x14,0xa2,0xff,0xb5,
27190x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,0x08,0x00,0x29,0x8f,0x24,0x42,0xff,0xf4,
27200x2d,0x42,0x00,0x1e,0x10,0x40,0xff,0xe3,0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0xbd,
27210x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0xb5,0x24,0x02,0x00,0x02,
27220x10,0xa2,0xff,0xd6,0x00,0x00,0x00,0x00,0x08,0x00,0x29,0x8a,0x24,0x02,0x00,0x03,
27230x2d,0x42,0x00,0x23,0x10,0x40,0xff,0xd7,0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0xae,
27240x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0xa9,0x24,0x02,0x00,0x02,
27250x14,0xa2,0xff,0xb7,0x00,0x00,0x00,0x00,0x08,0x00,0x29,0xc7,0x00,0x00,0x00,0x00,
27260x2d,0x42,0x00,0x25,0x10,0x40,0xff,0xcb,0x00,0x00,0x00,0x00,0x08,0x00,0x29,0x9c,
27270x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x16,0x14,0x40,0x00,0x0e,0x00,0x00,0x00,0x00,
27280x10,0xa0,0xff,0xa0,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x9a,
27290x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x95,0x24,0x02,0x00,0x03,
27300x14,0xa2,0xff,0xb6,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,0x08,0x00,0x29,0x8f,
27310x24,0x42,0xff,0xfa,0x10,0xa0,0xff,0x93,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
27320x10,0xa2,0xff,0x8d,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x88,
27330x00,0x00,0x00,0x00,0x08,0x00,0x29,0xb7,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x17,
27340x14,0x40,0xff,0xac,0x00,0x00,0x00,0x00,0x08,0x00,0x29,0xf8,0x00,0x00,0x00,0x00,
27350x2d,0x42,0x00,0x19,0x10,0x40,0xff,0xe2,0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0x81,
27360x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x7b,0x00,0x00,0x00,0x00,
27370x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x76,0x24,0x02,0x00,0x03,0x10,0xa2,0xff,0x97,
27380x00,0x00,0x00,0x00,0x08,0x00,0x29,0x8c,0x00,0x00,0x00,0x00,0x08,0x00,0x2a,0x15,
27390x2d,0x42,0x00,0x1b,0x2d,0x42,0x00,0x1e,0x10,0x40,0xff,0xde,0x00,0x00,0x00,0x00,
27400x10,0xa0,0xff,0x70,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x6a,
27410x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x65,0x24,0x02,0x00,0x03,
27420x10,0xa2,0xff,0x96,0x00,0x00,0x00,0x00,0x08,0x00,0x29,0x8c,0x00,0x00,0x00,0x00,
27430x2d,0x42,0x00,0x23,0x14,0x40,0xff,0xf2,0x00,0x00,0x00,0x00,0x08,0x00,0x29,0xbd,
27440x00,0x00,0x00,0x00,0x08,0x00,0x29,0xbb,0x2d,0x42,0x00,0x25,0x08,0x00,0x29,0xf1,
27450x2d,0x42,0x00,0x27,0x10,0xa0,0xff,0x5b,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
27460x10,0xa2,0xff,0x55,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x50,
27470x24,0x02,0x00,0x03,0x14,0xa2,0xff,0x71,0x00,0x00,0x00,0x00,0x08,0x00,0x29,0xaa,
27480x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x27,0x14,0x40,0xff,0xad,0x00,0x00,0x00,0x00,
27490x08,0x00,0x2a,0x3d,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x2a,0x14,0x40,0xff,0xd8,
27500x00,0x00,0x00,0x00,0x08,0x00,0x29,0xad,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x2c,
27510x14,0x40,0xff,0x78,0x00,0x00,0x00,0x00,0x08,0x00,0x29,0x81,0x00,0x00,0x00,0x00,
27520x91,0x86,0x00,0x00,0x91,0x83,0x00,0xd4,0x25,0x8d,0x00,0x5c,0x30,0xc4,0x00,0xff,
27530x00,0x04,0x10,0x40,0x00,0x44,0x10,0x21,0x00,0x04,0x48,0x80,0x01,0x82,0x58,0x21,
27540x01,0x89,0x40,0x21,0x25,0x78,0x00,0x08,0x10,0x60,0x00,0x37,0x25,0x0e,0x00,0x60,
27550x2c,0xa2,0x00,0x03,0x14,0x40,0x00,0x25,0x00,0x00,0x00,0x00,0x91,0x82,0x00,0xdd,
27560x00,0x00,0x00,0x00,0x14,0x40,0x00,0x1e,0x00,0x00,0x00,0x00,0x27,0x87,0x87,0x78,
27570x01,0x27,0x10,0x21,0x8c,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0xad,0x03,0x00,0x60,
27580x91,0x62,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x40,0x30,0x21,0xa1,0x82,0x00,0x00,
27590x30,0xc2,0x00,0xff,0x00,0x02,0x10,0x80,0x00,0x47,0x10,0x21,0x8c,0x43,0x00,0x00,
27600x00,0x00,0x00,0x00,0x00,0x03,0x18,0x42,0xad,0xa3,0x00,0x00,0x91,0x84,0x00,0x00,
27610x8d,0xc5,0x00,0x00,0x00,0x04,0x20,0x80,0x00,0x87,0x10,0x21,0x8c,0x43,0x00,0x00,
27620x00,0x05,0x28,0x40,0x00,0x8c,0x20,0x21,0x00,0x03,0x18,0x80,0x00,0xa3,0x10,0x2b,
27630x00,0x62,0x28,0x0a,0xac,0x85,0x00,0x60,0x03,0xe0,0x00,0x08,0xa1,0x80,0x00,0xd4,
27640x27,0x87,0x87,0x78,0x08,0x00,0x2a,0x74,0xa1,0x80,0x00,0xdd,0x27,0x82,0x87,0xe8,
27650x8d,0x83,0x00,0xd8,0x00,0x82,0x10,0x21,0x90,0x44,0x00,0x00,0x24,0x63,0x00,0x01,
27660x00,0x64,0x20,0x2b,0x14,0x80,0xff,0x02,0xad,0x83,0x00,0xd8,0x8d,0x02,0x00,0x60,
27670xa1,0x80,0x00,0xd4,0x00,0x02,0x1f,0xc2,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x43,
27680x03,0xe0,0x00,0x08,0xad,0x82,0x00,0x5c,0x10,0xe0,0x00,0x1d,0x24,0x83,0xff,0xfc,
27690x2c,0x62,0x00,0x18,0x10,0x40,0x01,0x10,0x00,0x03,0x10,0x80,0x3c,0x03,0x80,0x01,
27700x24,0x63,0x09,0x9c,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,
27710x00,0x80,0x00,0x08,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x30,0x14,0x40,0x00,0x65,
27720x00,0x00,0x00,0x00,0x10,0xa0,0x00,0x60,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
27730x10,0xa2,0x00,0x5a,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0x00,0x08,
27740x00,0x00,0x00,0x00,0x24,0x02,0x00,0x03,0x10,0xa2,0x00,0x51,0x00,0x00,0x00,0x00,
27750x8d,0x82,0x00,0xd0,0x00,0x00,0x00,0x00,0x24,0x42,0xff,0xe0,0xad,0x82,0x00,0xd0,
27760x8d,0xe3,0x00,0x00,0x8d,0xa2,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x43,0x10,0x21,
27770xad,0xa2,0x00,0x00,0xad,0xe0,0x00,0x00,0x8d,0xa3,0x00,0x00,0x8d,0xc4,0x00,0x00,
27780x00,0x00,0x00,0x00,0x00,0x83,0x10,0x2a,0x10,0x40,0x00,0x22,0x00,0x00,0x00,0x00,
27790x93,0x05,0x00,0x01,0x91,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x45,0x00,0x05,
27800x24,0x02,0x00,0x01,0xa1,0x85,0x00,0x00,0xa1,0x82,0x00,0xd4,0x03,0xe0,0x00,0x08,
27810xad,0x80,0x00,0xd8,0x91,0x82,0x00,0xdd,0x24,0x03,0x00,0x01,0x10,0x43,0x00,0x05,
27820x00,0x00,0x00,0x00,0xa1,0x83,0x00,0xd4,0xad,0x80,0x00,0xd8,0x03,0xe0,0x00,0x08,
27830xa1,0x83,0x00,0xdd,0x00,0x04,0x17,0xc2,0x00,0x82,0x10,0x21,0x00,0x02,0x10,0x43,
27840xad,0xa2,0x00,0x00,0x91,0x83,0x00,0x00,0x27,0x82,0x87,0x78,0x8d,0xc5,0x00,0x00,
27850x00,0x03,0x18,0x80,0x00,0x62,0x18,0x21,0x8c,0x64,0x00,0x00,0x00,0x05,0x28,0x40,
27860x00,0x04,0x18,0x80,0x00,0xa3,0x10,0x2b,0x00,0x62,0x28,0x0a,0x08,0x00,0x2a,0x86,
27870xad,0xc5,0x00,0x00,0x97,0x82,0x94,0x5c,0x00,0x00,0x00,0x00,0x00,0x62,0x10,0x2a,
27880x10,0x40,0xfe,0xab,0x00,0x00,0x00,0x00,0x91,0x82,0x00,0xdd,0x00,0x00,0x00,0x00,
27890x14,0x40,0x00,0x15,0x00,0x00,0x00,0x00,0x91,0x83,0x00,0x00,0x27,0x82,0x87,0x78,
27900x00,0x03,0x18,0x80,0x00,0x62,0x10,0x21,0x8c,0x44,0x00,0x00,0x00,0x6c,0x18,0x21,
27910xac,0x64,0x00,0x60,0x93,0x05,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x10,0x80,
27920x01,0x82,0x10,0x21,0x24,0x4e,0x00,0x60,0xa1,0x85,0x00,0x00,0x8d,0xc2,0x00,0x00,
27930x00,0x00,0x00,0x00,0x00,0x02,0x1f,0xc2,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x43,
27940x03,0xe0,0x00,0x08,0xad,0xa2,0x00,0x00,0x08,0x00,0x2a,0xfb,0xa1,0x80,0x00,0xdd,
27950x8d,0x82,0x00,0xd0,0x08,0x00,0x2a,0xb7,0x24,0x42,0xff,0xe8,0x8d,0x82,0x00,0xd0,
27960x08,0x00,0x2a,0xb7,0x24,0x42,0x00,0x01,0x8d,0x82,0x00,0xd0,0x08,0x00,0x2a,0xb7,
27970x24,0x42,0x00,0x02,0x10,0xa0,0xff,0xf9,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
27980x10,0xa2,0x00,0x0a,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0xa0,
27990x00,0x00,0x00,0x00,0x24,0x02,0x00,0x03,0x10,0xa2,0xff,0x9d,0x00,0x00,0x00,0x00,
28000x8d,0x82,0x00,0xd0,0x08,0x00,0x2a,0xb7,0x24,0x42,0xff,0xd0,0x8d,0x82,0x00,0xd0,
28010x08,0x00,0x2a,0xb7,0x24,0x42,0xff,0xfc,0x10,0xa0,0xff,0xeb,0x00,0x00,0x00,0x00,
28020x24,0x02,0x00,0x01,0x10,0xa2,0xff,0xe5,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,
28030x10,0xa2,0xff,0x93,0x24,0x02,0x00,0x03,0x14,0xa2,0xff,0xdd,0x00,0x00,0x00,0x00,
28040x8d,0x82,0x00,0xd0,0x08,0x00,0x2a,0xb7,0x24,0x42,0xff,0xf8,0x2d,0x42,0x00,0x19,
28050x14,0x40,0xff,0x7c,0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0xdb,0x00,0x00,0x00,0x00,
28060x24,0x02,0x00,0x01,0x10,0xa2,0xff,0xd5,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,
28070x10,0xa2,0xff,0x83,0x24,0x02,0x00,0x03,0x10,0xa2,0xff,0xf1,0x00,0x00,0x00,0x00,
28080x8d,0x82,0x00,0xd0,0x08,0x00,0x2a,0xb7,0x24,0x42,0xff,0xf0,0x2d,0x42,0x00,0x1b,
28090x10,0x40,0xff,0xf1,0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0xcb,0x00,0x00,0x00,0x00,
28100x24,0x02,0x00,0x01,0x10,0xa2,0xff,0xc5,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,
28110x14,0xa2,0xff,0x6c,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,0x08,0x00,0x2a,0xb7,
28120x24,0x42,0xff,0xf4,0x2d,0x42,0x00,0x1e,0x10,0x40,0xff,0xe3,0x00,0x00,0x00,0x00,
28130x10,0xa0,0xff,0xbd,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x68,
28140x24,0x02,0x00,0x02,0x10,0xa2,0xff,0xd6,0x00,0x00,0x00,0x00,0x08,0x00,0x2a,0xb2,
28150x24,0x02,0x00,0x03,0x2d,0x42,0x00,0x23,0x10,0x40,0xff,0xd7,0x00,0x00,0x00,0x00,
28160x10,0xa0,0xff,0xae,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x5c,
28170x24,0x02,0x00,0x02,0x14,0xa2,0xff,0xb7,0x00,0x00,0x00,0x00,0x08,0x00,0x2b,0x38,
28180x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x25,0x10,0x40,0xff,0xcb,0x00,0x00,0x00,0x00,
28190x08,0x00,0x2b,0x0d,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x16,0x14,0x40,0x00,0x0e,
28200x00,0x00,0x00,0x00,0x10,0xa0,0xff,0xa0,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
28210x10,0xa2,0xff,0x9a,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x48,
28220x24,0x02,0x00,0x03,0x14,0xa2,0xff,0xb6,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,
28230x08,0x00,0x2a,0xb7,0x24,0x42,0xff,0xfa,0x10,0xa0,0xff,0x93,0x00,0x00,0x00,0x00,
28240x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x8d,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,
28250x10,0xa2,0xff,0x3b,0x00,0x00,0x00,0x00,0x08,0x00,0x2b,0x28,0x00,0x00,0x00,0x00,
28260x2d,0x42,0x00,0x17,0x14,0x40,0xff,0xac,0x00,0x00,0x00,0x00,0x08,0x00,0x2b,0x69,
28270x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x19,0x10,0x40,0xff,0xe2,0x00,0x00,0x00,0x00,
28280x10,0xa0,0xff,0x81,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x7b,
28290x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x29,0x24,0x02,0x00,0x03,
28300x10,0xa2,0xff,0x97,0x00,0x00,0x00,0x00,0x08,0x00,0x2a,0xb4,0x00,0x00,0x00,0x00,
28310x08,0x00,0x2b,0x86,0x2d,0x42,0x00,0x1b,0x2d,0x42,0x00,0x1e,0x10,0x40,0xff,0xde,
28320x00,0x00,0x00,0x00,0x10,0xa0,0xff,0x70,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
28330x10,0xa2,0xff,0x6a,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x18,
28340x24,0x02,0x00,0x03,0x10,0xa2,0xff,0x96,0x00,0x00,0x00,0x00,0x08,0x00,0x2a,0xb4,
28350x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x23,0x14,0x40,0xff,0xf2,0x00,0x00,0x00,0x00,
28360x08,0x00,0x2b,0x2e,0x00,0x00,0x00,0x00,0x08,0x00,0x2b,0x2c,0x2d,0x42,0x00,0x25,
28370x08,0x00,0x2b,0x62,0x2d,0x42,0x00,0x27,0x10,0xa0,0xff,0x5b,0x00,0x00,0x00,0x00,
28380x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x55,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,
28390x10,0xa2,0xff,0x03,0x24,0x02,0x00,0x03,0x14,0xa2,0xff,0x71,0x00,0x00,0x00,0x00,
28400x08,0x00,0x2b,0x1b,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x27,0x14,0x40,0xff,0xad,
28410x00,0x00,0x00,0x00,0x08,0x00,0x2b,0xae,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x2a,
28420x14,0x40,0xff,0xd8,0x00,0x00,0x00,0x00,0x08,0x00,0x2b,0x1e,0x00,0x00,0x00,0x00,
28430x2d,0x42,0x00,0x2c,0x14,0x40,0xff,0x78,0x00,0x00,0x00,0x00,0x08,0x00,0x2a,0xa9,
28440x00,0x00,0x00,0x00,0x27,0xbd,0xff,0xe8,0x3c,0x02,0xb0,0x03,0xaf,0xbf,0x00,0x14,
28450xaf,0xb0,0x00,0x10,0x34,0x42,0x01,0x18,0x3c,0x03,0xb0,0x03,0x8c,0x50,0x00,0x00,
28460x34,0x63,0x01,0x2c,0x90,0x62,0x00,0x00,0x32,0x05,0x00,0x01,0xa3,0x82,0x80,0x10,
28470x14,0xa0,0x00,0x14,0x30,0x44,0x00,0xff,0x32,0x02,0x01,0x00,0x14,0x40,0x00,0x09,
28480x00,0x00,0x00,0x00,0x32,0x02,0x08,0x00,0x10,0x40,0x00,0x02,0x24,0x02,0x00,0x01,
28490xa3,0x82,0xc5,0x58,0x8f,0xbf,0x00,0x14,0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,
28500x27,0xbd,0x00,0x18,0x0c,0x00,0x0b,0x3e,0x00,0x00,0x00,0x00,0x26,0x02,0xff,0x00,
28510xa3,0x80,0xc5,0x58,0x3c,0x01,0xb0,0x03,0xac,0x22,0x01,0x18,0x08,0x00,0x2b,0xda,
28520x32,0x02,0x08,0x00,0x0c,0x00,0x29,0x03,0x00,0x00,0x00,0x00,0x26,0x02,0xff,0xff,
28530x3c,0x01,0xb0,0x03,0xac,0x22,0x01,0x18,0x08,0x00,0x2b,0xd7,0x32,0x02,0x01,0x00,
28540x27,0xbd,0xff,0xe0,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0xd0,0xaf,0xbf,0x00,0x18,
28550x8c,0x43,0x00,0x00,0x3c,0x02,0x00,0x40,0x24,0x07,0x0f,0xff,0x00,0x03,0x33,0x02,
28560x00,0x03,0x2d,0x02,0x00,0x03,0x43,0x02,0x30,0x69,0x0f,0xff,0x00,0x62,0x18,0x24,
28570x30,0xa5,0x00,0x03,0x30,0xc6,0x00,0xff,0x10,0x60,0x00,0x08,0x31,0x08,0x00,0xff,
28580x01,0x00,0x30,0x21,0x0c,0x00,0x2c,0xa6,0xaf,0xa9,0x00,0x10,0x8f,0xbf,0x00,0x18,
28590x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x0c,0x00,0x2c,0xf8,
28600x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0xd4,0x08,0x00,0x2c,0x03,
28610xac,0x62,0x00,0x00,0x27,0xbd,0xff,0xc0,0x3c,0x02,0xb0,0x03,0xaf,0xb6,0x00,0x30,
28620xaf,0xb5,0x00,0x2c,0xaf,0xb1,0x00,0x1c,0xaf,0xb0,0x00,0x18,0xaf,0xbf,0x00,0x3c,
28630xaf,0xbe,0x00,0x38,0xaf,0xb7,0x00,0x34,0xaf,0xb4,0x00,0x28,0xaf,0xb3,0x00,0x24,
28640xaf,0xb2,0x00,0x20,0x34,0x42,0x00,0x3f,0x90,0x43,0x00,0x00,0x00,0x80,0x80,0x21,
28650x00,0x00,0xb0,0x21,0x00,0x00,0x88,0x21,0x10,0x60,0x00,0x7a,0x00,0x00,0xa8,0x21,
28660x3c,0x01,0xb0,0x03,0xa0,0x20,0x00,0x3f,0x3c,0x02,0xb0,0x03,0x34,0x42,0x01,0x47,
28670x90,0x44,0x00,0x00,0x00,0x10,0x1a,0x02,0x3c,0x14,0xfd,0xff,0x30,0x84,0x00,0xff,
28680xa0,0x50,0x00,0x00,0x30,0x73,0x00,0x0f,0xaf,0xa4,0x00,0x10,0x00,0x00,0x90,0x21,
28690x3c,0x17,0x02,0x00,0x36,0x94,0xff,0xff,0x24,0x1e,0x00,0x04,0x0c,0x00,0x0e,0x76,
28700x24,0x04,0x00,0x78,0x00,0x57,0x10,0x25,0x00,0x40,0x28,0x21,0x0c,0x00,0x0e,0x64,
28710x24,0x04,0x00,0x78,0x00,0x00,0x80,0x21,0x0c,0x00,0x2d,0xc0,0x00,0x00,0x00,0x00,
28720x26,0x03,0x00,0x01,0x10,0x40,0x00,0x53,0x30,0x70,0x00,0xff,0x12,0x00,0xff,0xfa,
28730x00,0x00,0x00,0x00,0x0c,0x00,0x0e,0x76,0x24,0x04,0x00,0x78,0x00,0x54,0x10,0x24,
28740x00,0x40,0x28,0x21,0x0c,0x00,0x0e,0x64,0x24,0x04,0x00,0x78,0x24,0x02,0x00,0x01,
28750x12,0x62,0x00,0x44,0x24,0x04,0x00,0xe0,0x12,0x60,0x00,0x42,0x24,0x04,0x00,0xe4,
28760x32,0x22,0x00,0x60,0x32,0x23,0x0c,0x00,0x00,0x03,0x1a,0x02,0x3c,0x05,0x00,0x60,
28770x00,0x02,0x11,0x42,0x02,0x25,0x20,0x24,0x00,0x43,0x10,0x25,0x3c,0x03,0x04,0x00,
28780x02,0x23,0x28,0x24,0x00,0x04,0x24,0x42,0x00,0x44,0x10,0x25,0x00,0x05,0x2d,0x02,
28790x00,0x45,0x88,0x25,0x12,0x20,0x00,0x03,0x26,0xc2,0x00,0x01,0x30,0x56,0x00,0xff,
28800x02,0xb1,0xa8,0x21,0x12,0x5e,0x00,0x2a,0x3c,0x05,0xb0,0x03,0x02,0x45,0x10,0x21,
28810xa0,0x51,0x00,0x34,0x26,0x42,0x00,0x01,0x30,0x52,0x00,0xff,0x2e,0x43,0x00,0x05,
28820x14,0x60,0xff,0xce,0x3c,0x02,0xb0,0x03,0x8f,0xa3,0x00,0x10,0x34,0x42,0x01,0x47,
28830xa0,0x43,0x00,0x00,0x12,0xa0,0x00,0x0e,0x3c,0x02,0xb0,0x03,0x12,0xc0,0x00,0x0d,
28840x34,0x42,0x00,0x3c,0x00,0x15,0x10,0x40,0x00,0x55,0x10,0x21,0x00,0x02,0x10,0xc0,
28850x00,0x55,0x10,0x21,0x00,0x02,0xa8,0x80,0x02,0xb6,0x00,0x1b,0x16,0xc0,0x00,0x02,
28860x00,0x00,0x00,0x00,0x00,0x07,0x00,0x0d,0x00,0x00,0xa8,0x12,0x3c,0x02,0xb0,0x03,
28870x34,0x42,0x00,0x3c,0x3c,0x03,0xb0,0x03,0x3c,0x04,0xb0,0x03,0xa4,0x55,0x00,0x00,
28880x34,0x63,0x00,0x1c,0x34,0x84,0x00,0x1d,0x24,0x02,0x00,0x01,0xa0,0x60,0x00,0x00,
28890xa0,0x82,0x00,0x00,0x7b,0xbe,0x01,0xfc,0x7b,0xb6,0x01,0xbc,0x7b,0xb4,0x01,0x7c,
28900x7b,0xb2,0x01,0x3c,0x7b,0xb0,0x00,0xfc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x40,
28910x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x3e,0xa0,0x51,0x00,0x00,0x08,0x00,0x2c,0x5e,
28920x26,0x42,0x00,0x01,0x0c,0x00,0x0e,0x76,0x00,0x00,0x00,0x00,0x08,0x00,0x2c,0x48,
28930x00,0x40,0x88,0x21,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x3c,0x3c,0x04,0xb0,0x03,
28940x3c,0x05,0xb0,0x03,0xa4,0x60,0x00,0x00,0x34,0x84,0x00,0x1c,0x34,0xa5,0x00,0x1d,
28950x24,0x02,0x00,0x02,0x24,0x03,0x00,0x01,0xa0,0x82,0x00,0x00,0x08,0x00,0x2c,0x7d,
28960xa0,0xa3,0x00,0x00,0x0c,0x00,0x1f,0x64,0x00,0x00,0x00,0x00,0x10,0x40,0xff,0x87,
28970x3c,0x02,0xb0,0x03,0x3c,0x04,0xb0,0x03,0x34,0x42,0x00,0x3c,0x34,0x84,0x00,0x14,
28980x24,0x03,0x00,0x01,0xa4,0x40,0x00,0x00,0x3c,0x01,0xb0,0x03,0xa0,0x23,0x00,0x3f,
28990x08,0x00,0x2c,0x7d,0xac,0x90,0x00,0x00,0x27,0xbd,0xff,0xd8,0xaf,0xb0,0x00,0x10,
29000x30,0xd0,0x00,0xff,0x2e,0x02,0x00,0x2e,0xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,
29010xaf,0xbf,0x00,0x20,0xaf,0xb3,0x00,0x1c,0x30,0xb1,0x00,0xff,0x14,0x40,0x00,0x06,
29020x00,0x80,0x90,0x21,0x8f,0xbf,0x00,0x20,0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,
29030x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x28,0x2e,0x13,0x00,0x10,0x24,0x05,0x00,0x14,
29040x0c,0x00,0x1b,0x85,0x24,0x06,0x01,0x07,0x12,0x60,0x00,0x38,0x02,0x00,0x30,0x21,
29050x8f,0xa2,0x00,0x38,0x30,0xc3,0x00,0x3f,0x3c,0x04,0xb0,0x09,0x00,0x02,0x14,0x00,
29060x00,0x43,0x30,0x25,0x34,0x84,0x01,0x60,0x90,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
29070x14,0x40,0xff,0xfd,0x24,0x02,0x00,0x01,0x12,0x22,0x00,0x2a,0x2a,0x22,0x00,0x02,
29080x14,0x40,0x00,0x24,0x24,0x02,0x00,0x02,0x12,0x22,0x00,0x20,0x24,0x02,0x00,0x03,
29090x12,0x22,0x00,0x19,0x00,0x00,0x00,0x00,0x16,0x60,0xff,0xe2,0x24,0x02,0x00,0x01,
29100x12,0x22,0x00,0x13,0x2a,0x22,0x00,0x02,0x14,0x40,0x00,0x0d,0x24,0x02,0x00,0x02,
29110x12,0x22,0x00,0x09,0x24,0x02,0x00,0x03,0x16,0x22,0xff,0xda,0x00,0x00,0x00,0x00,
29120x24,0x04,0x08,0x4c,0x24,0x05,0xff,0xff,0x0c,0x00,0x1b,0x40,0x3c,0x06,0x0c,0xb8,
29130x08,0x00,0x2c,0xb1,0x00,0x00,0x00,0x00,0x08,0x00,0x2c,0xd9,0x24,0x04,0x08,0x48,
29140x16,0x20,0xff,0xd0,0x00,0x00,0x00,0x00,0x08,0x00,0x2c,0xd9,0x24,0x04,0x08,0x40,
29150x08,0x00,0x2c,0xd9,0x24,0x04,0x08,0x44,0x24,0x04,0x08,0x4c,0x0c,0x00,0x1b,0x40,
29160x24,0x05,0xff,0xff,0x08,0x00,0x2c,0xce,0x00,0x00,0x00,0x00,0x08,0x00,0x2c,0xe7,
29170x24,0x04,0x08,0x48,0x16,0x20,0xff,0xe0,0x00,0x00,0x00,0x00,0x08,0x00,0x2c,0xe7,
29180x24,0x04,0x08,0x40,0x08,0x00,0x2c,0xe7,0x24,0x04,0x08,0x44,0x02,0x40,0x20,0x21,
29190x0c,0x00,0x2d,0x38,0x02,0x20,0x28,0x21,0x08,0x00,0x2c,0xbc,0x00,0x40,0x30,0x21,
29200x27,0xbd,0xff,0xd8,0x2c,0xc2,0x00,0x2e,0xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,
29210xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x20,0xaf,0xb3,0x00,0x1c,0x00,0xc0,0x80,0x21,
29220x30,0xb1,0x00,0xff,0x00,0x80,0x90,0x21,0x14,0x40,0x00,0x07,0x00,0x00,0x18,0x21,
29230x8f,0xbf,0x00,0x20,0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,0x00,0x60,0x10,0x21,
29240x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x28,0x2e,0x13,0x00,0x10,0x24,0x05,0x00,0x14,
29250x0c,0x00,0x1b,0x85,0x24,0x06,0x01,0x07,0x12,0x60,0x00,0x24,0x02,0x00,0x30,0x21,
29260x3c,0x03,0xb0,0x09,0x34,0x63,0x01,0x60,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
29270x14,0x40,0xff,0xfd,0x30,0xc5,0x00,0x3f,0x0c,0x00,0x2d,0x75,0x02,0x20,0x20,0x21,
29280x16,0x60,0x00,0x0a,0x00,0x40,0x80,0x21,0x24,0x02,0x00,0x01,0x12,0x22,0x00,0x15,
29290x2a,0x22,0x00,0x02,0x14,0x40,0x00,0x0f,0x24,0x02,0x00,0x02,0x12,0x22,0x00,0x0b,
29300x24,0x02,0x00,0x03,0x12,0x22,0x00,0x03,0x00,0x00,0x00,0x00,0x08,0x00,0x2d,0x04,
29310x02,0x00,0x18,0x21,0x24,0x04,0x08,0x4c,0x24,0x05,0xff,0xff,0x0c,0x00,0x1b,0x40,
29320x3c,0x06,0x0c,0xb8,0x08,0x00,0x2d,0x04,0x02,0x00,0x18,0x21,0x08,0x00,0x2d,0x26,
29330x24,0x04,0x08,0x48,0x16,0x20,0xff,0xf5,0x00,0x00,0x00,0x00,0x08,0x00,0x2d,0x26,
29340x24,0x04,0x08,0x40,0x08,0x00,0x2d,0x26,0x24,0x04,0x08,0x44,0x02,0x40,0x20,0x21,
29350x0c,0x00,0x2d,0x38,0x02,0x20,0x28,0x21,0x08,0x00,0x2d,0x10,0x00,0x40,0x30,0x21,
29360x27,0xbd,0xff,0xe8,0x2c,0xc2,0x00,0x1f,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,
29370x00,0xc0,0x80,0x21,0x14,0x40,0x00,0x1d,0x30,0xa5,0x00,0xff,0x24,0x02,0x00,0x01,
29380x10,0xa2,0x00,0x18,0x28,0xa2,0x00,0x02,0x14,0x40,0x00,0x12,0x24,0x02,0x00,0x02,
29390x10,0xa2,0x00,0x0e,0x24,0x02,0x00,0x03,0x10,0xa2,0x00,0x07,0x24,0x04,0x08,0x4c,
29400x26,0x10,0xff,0xe2,0x02,0x00,0x10,0x21,0x8f,0xbf,0x00,0x14,0x8f,0xb0,0x00,0x10,
29410x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x24,0x05,0xff,0xff,0x0c,0x00,0x1b,0x40,
29420x3c,0x06,0x0d,0xf8,0x08,0x00,0x2d,0x49,0x26,0x10,0xff,0xe2,0x08,0x00,0x2d,0x4e,
29430x24,0x04,0x08,0x48,0x14,0xa0,0xff,0xf2,0x24,0x04,0x08,0x40,0x08,0x00,0x2d,0x4f,
29440x24,0x05,0xff,0xff,0x08,0x00,0x2d,0x4e,0x24,0x04,0x08,0x44,0x2c,0xc2,0x00,0x10,
29450x14,0x40,0xff,0xec,0x24,0x02,0x00,0x01,0x10,0xa2,0x00,0x14,0x28,0xa2,0x00,0x02,
29460x14,0x40,0x00,0x0e,0x24,0x02,0x00,0x02,0x10,0xa2,0x00,0x0a,0x24,0x02,0x00,0x03,
29470x10,0xa2,0x00,0x03,0x24,0x04,0x08,0x4c,0x08,0x00,0x2d,0x49,0x26,0x10,0xff,0xf1,
29480x24,0x05,0xff,0xff,0x0c,0x00,0x1b,0x40,0x3c,0x06,0x0d,0xb8,0x08,0x00,0x2d,0x49,
29490x26,0x10,0xff,0xf1,0x08,0x00,0x2d,0x68,0x24,0x04,0x08,0x48,0x14,0xa0,0xff,0xf6,
29500x24,0x04,0x08,0x40,0x08,0x00,0x2d,0x69,0x24,0x05,0xff,0xff,0x08,0x00,0x2d,0x68,
29510x24,0x04,0x08,0x44,0x27,0xbd,0xff,0xe8,0x30,0x84,0x00,0xff,0x24,0x02,0x00,0x01,
29520x10,0x82,0x00,0x39,0xaf,0xbf,0x00,0x10,0x28,0x82,0x00,0x02,0x14,0x40,0x00,0x27,
29530x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0x82,0x00,0x17,0x00,0xa0,0x30,0x21,
29540x24,0x02,0x00,0x03,0x10,0x82,0x00,0x05,0x24,0x04,0x08,0x3c,0x8f,0xbf,0x00,0x10,
29550x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x0c,0x00,0x1b,0x40,
29560x3c,0x05,0x3f,0x00,0x24,0x04,0x08,0x3c,0x3c,0x05,0x80,0x00,0x0c,0x00,0x1b,0x40,
29570x00,0x00,0x30,0x21,0x24,0x04,0x08,0x3c,0x3c,0x05,0x80,0x00,0x0c,0x00,0x1b,0x40,
29580x24,0x06,0x00,0x01,0x24,0x04,0x08,0xac,0x0c,0x00,0x1b,0x22,0x24,0x05,0x0f,0xff,
29590x08,0x00,0x2d,0x83,0x00,0x00,0x00,0x00,0x24,0x04,0x08,0x34,0x0c,0x00,0x1b,0x40,
29600x3c,0x05,0x3f,0x00,0x24,0x04,0x08,0x34,0x3c,0x05,0x80,0x00,0x0c,0x00,0x1b,0x40,
29610x00,0x00,0x30,0x21,0x24,0x04,0x08,0x34,0x3c,0x05,0x80,0x00,0x0c,0x00,0x1b,0x40,
29620x24,0x06,0x00,0x01,0x08,0x00,0x2d,0x92,0x24,0x04,0x08,0xa8,0x14,0x80,0xff,0xdf,
29630x00,0xa0,0x30,0x21,0x24,0x04,0x08,0x24,0x0c,0x00,0x1b,0x40,0x3c,0x05,0x3f,0x00,
29640x24,0x04,0x08,0x24,0x3c,0x05,0x80,0x00,0x0c,0x00,0x1b,0x40,0x00,0x00,0x30,0x21,
29650x24,0x04,0x08,0x24,0x3c,0x05,0x80,0x00,0x0c,0x00,0x1b,0x40,0x24,0x06,0x00,0x01,
29660x08,0x00,0x2d,0x92,0x24,0x04,0x08,0xa0,0x00,0xa0,0x30,0x21,0x24,0x04,0x08,0x2c,
29670x0c,0x00,0x1b,0x40,0x3c,0x05,0x3f,0x00,0x24,0x04,0x08,0x2c,0x3c,0x05,0x80,0x00,
29680x0c,0x00,0x1b,0x40,0x00,0x00,0x30,0x21,0x24,0x04,0x08,0x2c,0x3c,0x05,0x80,0x00,
29690x0c,0x00,0x1b,0x40,0x24,0x06,0x00,0x01,0x08,0x00,0x2d,0x92,0x24,0x04,0x08,0xa4,
29700x3c,0x05,0x00,0x14,0x3c,0x02,0xb0,0x05,0x34,0x42,0x04,0x20,0x3c,0x06,0xc0,0x00,
29710x3c,0x03,0xb0,0x05,0x3c,0x04,0xb0,0x05,0x34,0xa5,0x17,0x09,0xac,0x45,0x00,0x00,
29720x34,0xc6,0x05,0x07,0x34,0x63,0x04,0x24,0x34,0x84,0x02,0x28,0x3c,0x07,0xb0,0x05,
29730x24,0x02,0x00,0x20,0xac,0x66,0x00,0x00,0x34,0xe7,0x04,0x50,0xa0,0x82,0x00,0x00,
29740x90,0xe2,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x03,0x10,0x40,0xff,0xfc,
29750x24,0x02,0x00,0x01,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x27,0xbd,0xff,0xe8,
29760xaf,0xbf,0x00,0x10,0x0c,0x00,0x2e,0x85,0x00,0x00,0x00,0x00,0x0c,0x00,0x2e,0x87,
29770x00,0x00,0x00,0x00,0x0c,0x00,0x2e,0xae,0x00,0x00,0x00,0x00,0x3c,0x04,0xb0,0x05,
29780x34,0x84,0x00,0x04,0x0c,0x00,0x2e,0x8e,0x34,0x05,0x9c,0x40,0x8f,0xbf,0x00,0x10,
29790x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x03,0xe0,0x00,0x08,
29800x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
29810x24,0x02,0x00,0x01,0x03,0xe0,0x00,0x08,0x24,0x02,0x00,0x01,0x97,0x82,0x88,0x10,
29820x00,0x00,0x00,0x00,0x2c,0x43,0x00,0x64,0x24,0x42,0x00,0x01,0xa7,0x82,0x88,0x10,
29830x14,0x60,0x00,0x28,0x00,0x80,0x30,0x21,0x8c,0x82,0x00,0x00,0x3c,0x03,0x20,0x00,
29840xa7,0x80,0x88,0x10,0x00,0x43,0x10,0x24,0x10,0x40,0x00,0x22,0x00,0x00,0x00,0x00,
29850x8c,0x82,0x00,0x00,0x3c,0x03,0x80,0x00,0x00,0x43,0x10,0x25,0x97,0x83,0x88,0x04,
29860xac,0x82,0x00,0x00,0x8c,0x85,0x00,0x00,0x24,0x63,0x00,0x01,0x3c,0x02,0x40,0x64,
29870x34,0x42,0x64,0x00,0x00,0x03,0x24,0x00,0x00,0xa2,0x28,0x25,0x00,0x04,0x24,0x03,
29880x24,0x02,0x00,0x64,0xac,0xc5,0x00,0x00,0xa7,0x83,0x88,0x04,0x10,0x82,0x00,0x2b,
29890x00,0x00,0x00,0x00,0x87,0x82,0x88,0x06,0x24,0x03,0x00,0x3c,0x10,0x43,0x00,0x21,
29900x00,0x00,0x00,0x00,0x87,0x82,0x88,0x08,0x00,0x00,0x00,0x00,0x10,0x43,0x00,0x17,
29910x00,0x00,0x00,0x00,0x87,0x83,0x88,0x0a,0x24,0x02,0x00,0x18,0x10,0x62,0x00,0x0d,
29920x00,0x00,0x00,0x00,0x87,0x83,0x88,0x0c,0x24,0x02,0x01,0x6d,0x10,0x62,0x00,0x03,
29930x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x97,0x82,0x88,0x0e,
29940xa7,0x80,0x88,0x0c,0x24,0x42,0x00,0x01,0xa7,0x82,0x88,0x0e,0x08,0x00,0x2e,0x1d,
29950x00,0x00,0x00,0x00,0x97,0x82,0x88,0x0c,0xa7,0x80,0x88,0x0a,0x24,0x42,0x00,0x01,
29960xa7,0x82,0x88,0x0c,0x08,0x00,0x2e,0x19,0x00,0x00,0x00,0x00,0x97,0x82,0x88,0x0a,
29970xa7,0x80,0x88,0x08,0x24,0x42,0x00,0x01,0xa7,0x82,0x88,0x0a,0x08,0x00,0x2e,0x15,
29980x00,0x00,0x00,0x00,0x97,0x82,0x88,0x08,0xa7,0x80,0x88,0x06,0x24,0x42,0x00,0x01,
29990xa7,0x82,0x88,0x08,0x08,0x00,0x2e,0x11,0x00,0x00,0x00,0x00,0x97,0x82,0x88,0x06,
30000xa7,0x80,0x88,0x04,0x24,0x42,0x00,0x01,0xa7,0x82,0x88,0x06,0x08,0x00,0x2e,0x0d,
30010x00,0x00,0x00,0x00,0x00,0x04,0x24,0x00,0x3c,0x03,0xb0,0x07,0x00,0x04,0x24,0x03,
30020x34,0x63,0x00,0x28,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x40,
30030x10,0x40,0xff,0xfc,0x00,0x00,0x00,0x00,0x3c,0x01,0xb0,0x07,0xa0,0x24,0x00,0x00,
30040x03,0xe0,0x00,0x08,0x00,0x00,0x10,0x21,0x3c,0x02,0xb0,0x07,0x34,0x42,0x00,0x28,
30050x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x01,0x10,0x60,0x00,0x06,
30060x24,0x02,0xff,0xff,0x3c,0x02,0xb0,0x07,0x90,0x42,0x00,0x00,0x00,0x00,0x00,0x00,
30070x00,0x02,0x16,0x00,0x00,0x02,0x16,0x03,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
30080x27,0xbd,0xff,0xe0,0xaf,0xb0,0x00,0x10,0x3c,0x10,0x04,0xc4,0x00,0x04,0x11,0x00,
30090x36,0x10,0xb4,0x00,0x02,0x02,0x00,0x1b,0xaf,0xb1,0x00,0x14,0x3c,0x11,0xb0,0x07,
30100x36,0x31,0x00,0x18,0x24,0x04,0x00,0x0a,0xaf,0xbf,0x00,0x18,0x14,0x40,0x00,0x02,
30110x00,0x00,0x00,0x00,0x00,0x07,0x00,0x0d,0x00,0x00,0x80,0x12,0x0c,0x00,0x2e,0xda,
30120x00,0x00,0x00,0x00,0x92,0x22,0x00,0x00,0x24,0x03,0xff,0x80,0x24,0x04,0x00,0x0a,
30130x00,0x43,0x10,0x25,0x0c,0x00,0x2e,0xda,0xa2,0x22,0x00,0x00,0x24,0x04,0x00,0x0a,
30140x3c,0x01,0xb0,0x07,0xa0,0x30,0x00,0x00,0x0c,0x00,0x2e,0xda,0x00,0x10,0x82,0x03,
30150x3c,0x02,0xb0,0x07,0x34,0x42,0x00,0x08,0xa0,0x50,0x00,0x00,0x0c,0x00,0x2e,0xda,
30160x24,0x04,0x00,0x0a,0x92,0x22,0x00,0x00,0x8f,0xbf,0x00,0x18,0x8f,0xb0,0x00,0x10,
30170x30,0x42,0x00,0x7f,0xa2,0x22,0x00,0x00,0x8f,0xb1,0x00,0x14,0x03,0xe0,0x00,0x08,
30180x27,0xbd,0x00,0x20,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
30190x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,
30200x34,0x63,0x00,0x58,0x8c,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x34,0x42,0x07,0xa4,
30210x03,0xe0,0x00,0x08,0xac,0x62,0x00,0x00,0x27,0xbd,0xff,0xf8,0x00,0x80,0x38,0x21,
30220x00,0xa0,0x30,0x21,0x00,0x00,0x18,0x21,0x00,0x63,0x00,0x18,0x00,0x00,0x10,0x12,
30230x00,0xc2,0x10,0x2b,0x14,0x40,0x00,0x05,0x00,0x00,0x00,0x00,0x24,0x63,0x00,0x01,
30240x2c,0x62,0x01,0x00,0x14,0x40,0xff,0xf9,0x00,0x63,0x00,0x18,0x24,0x63,0xff,0xff,
30250x00,0x63,0x00,0x18,0x30,0x63,0x00,0xff,0x8c,0xe4,0x00,0x00,0x00,0x03,0x2a,0x00,
30260x00,0x03,0x1c,0x00,0x00,0x00,0x10,0x12,0x00,0xc2,0x10,0x23,0x30,0x42,0x00,0xff,
30270x00,0x45,0x10,0x21,0x00,0x43,0x10,0x21,0x00,0x82,0x20,0x25,0xac,0xe4,0x00,0x00,
30280x8c,0xe2,0x00,0x00,0x3c,0x03,0x40,0x00,0x00,0x43,0x10,0x25,0xac,0xe2,0x00,0x00,
30290x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x08,0x27,0xbd,0xff,0xe0,0xaf,0xbf,0x00,0x18,
30300xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0x3c,0x04,0xb0,0x03,0x8c,0x82,0x00,0x00,
30310x3c,0x06,0xb0,0x03,0x34,0xc6,0x00,0x08,0x34,0x42,0x40,0x00,0xac,0x82,0x00,0x00,
30320x8c,0x83,0x00,0x00,0x24,0x02,0xcf,0xff,0x3c,0x11,0xb0,0x07,0x00,0x62,0x18,0x24,
30330xac,0x83,0x00,0x00,0x8c,0xc5,0x00,0x00,0x3c,0x02,0x00,0xff,0x24,0x04,0x00,0x0a,
30340x00,0xa2,0x28,0x25,0xac,0xc5,0x00,0x00,0x0c,0x00,0x2e,0xda,0x36,0x31,0x00,0x18,
30350x24,0x02,0xff,0x83,0x3c,0x04,0x00,0x01,0xa2,0x22,0x00,0x00,0x0c,0x00,0x2e,0x58,
30360x34,0x84,0xc2,0x00,0x0c,0x00,0x2e,0xda,0x24,0x04,0x00,0x0a,0x24,0x02,0x00,0x03,
30370xa2,0x22,0x00,0x00,0x24,0x04,0x00,0x0a,0x0c,0x00,0x2e,0xda,0x3c,0x10,0xb0,0x07,
30380x36,0x10,0x00,0x10,0x24,0x02,0x00,0x06,0xa2,0x02,0x00,0x00,0x0c,0x00,0x2e,0xda,
30390x24,0x04,0x00,0x0a,0xa2,0x00,0x00,0x00,0x8f,0xbf,0x00,0x18,0x7b,0xb0,0x00,0xbc,
30400x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x10,0x80,0x00,0x05,0x00,0x00,0x18,0x21,
30410x24,0x63,0x00,0x01,0x00,0x64,0x10,0x2b,0x14,0x40,0xff,0xfd,0x00,0x00,0x00,0x00,
30420x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x27,0xbd,0xff,0xc0,0xaf,0xb5,0x00,0x34,
30430xaf,0xb2,0x00,0x28,0xaf,0xb0,0x00,0x20,0xaf,0xbf,0x00,0x38,0xaf,0xb4,0x00,0x30,
30440xaf,0xb3,0x00,0x2c,0xaf,0xb1,0x00,0x24,0xaf,0xa5,0x00,0x44,0x90,0xa7,0x00,0x00,
30450x00,0x80,0xa8,0x21,0x00,0xc0,0x90,0x21,0x00,0x07,0x1e,0x00,0x10,0x60,0x00,0x0f,
30460x00,0x80,0x80,0x21,0x00,0x03,0x1e,0x03,0x24,0x02,0x00,0x25,0x10,0x62,0x00,0x13,
30470x00,0x00,0x88,0x21,0xa2,0x07,0x00,0x00,0x8f,0xa5,0x00,0x44,0x26,0x10,0x00,0x01,
30480x24,0xa5,0x00,0x01,0xaf,0xa5,0x00,0x44,0x90,0xa7,0x00,0x00,0x00,0x00,0x00,0x00,
30490x00,0x07,0x1e,0x00,0x14,0x60,0xff,0xf3,0x00,0x00,0x00,0x00,0x02,0x15,0x10,0x23,
30500xa2,0x00,0x00,0x00,0x8f,0xbf,0x00,0x38,0x7b,0xb4,0x01,0xbc,0x7b,0xb2,0x01,0x7c,
30510x7b,0xb0,0x01,0x3c,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x40,0x24,0xa5,0x00,0x01,
30520xaf,0xa5,0x00,0x44,0x80,0xa3,0x00,0x00,0x00,0x00,0x00,0x00,0x24,0x63,0xff,0xe0,
30530x2c,0x62,0x00,0x11,0x10,0x40,0x00,0x11,0x00,0xa0,0x38,0x21,0x00,0x03,0x10,0x80,
30540x3c,0x03,0x80,0x01,0x24,0x63,0x09,0xfc,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,
30550x00,0x00,0x00,0x00,0x00,0x80,0x00,0x08,0x00,0x00,0x00,0x00,0x08,0x00,0x2f,0x07,
30560x36,0x31,0x00,0x10,0x08,0x00,0x2f,0x07,0x36,0x31,0x00,0x08,0x08,0x00,0x2f,0x07,
30570x36,0x31,0x00,0x20,0x08,0x00,0x2f,0x07,0x36,0x31,0x00,0x04,0x90,0xe4,0x00,0x00,
30580x3c,0x02,0x80,0x01,0x24,0x42,0x02,0x1c,0x00,0x44,0x10,0x21,0x90,0x43,0x00,0x00,
30590x00,0x00,0x00,0x00,0x30,0x63,0x00,0x04,0x14,0x60,0x00,0xfd,0x24,0x14,0xff,0xff,
30600x00,0x04,0x16,0x00,0x00,0x02,0x16,0x03,0x24,0x03,0x00,0x2a,0x10,0x43,0x00,0xee,
30610x26,0x42,0x00,0x03,0x80,0xa3,0x00,0x00,0x24,0x02,0x00,0x2e,0x10,0x62,0x00,0xcc,
30620x24,0x08,0xff,0xff,0x80,0xa3,0x00,0x00,0x24,0x02,0x00,0x68,0x10,0x62,0x00,0xc4,
30630x24,0x06,0xff,0xff,0x24,0x02,0x00,0x6c,0x10,0x62,0x00,0xc1,0x24,0x02,0x00,0x4c,
30640x10,0x62,0x00,0xbf,0x24,0x02,0x00,0x5a,0x10,0x62,0x00,0xbd,0x00,0x00,0x00,0x00,
30650x80,0xa3,0x00,0x00,0x00,0x00,0x00,0x00,0x24,0x63,0xff,0xdb,0x2c,0x62,0x00,0x54,
30660x10,0x40,0x00,0xaa,0x24,0x09,0x00,0x0a,0x00,0x03,0x10,0x80,0x3c,0x03,0x80,0x01,
30670x24,0x63,0x0a,0x40,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,
30680x00,0x80,0x00,0x08,0x00,0x00,0x00,0x00,0x32,0x22,0x00,0x10,0x14,0x40,0x00,0x09,
30690x24,0x02,0xff,0xfc,0x26,0x94,0xff,0xff,0x1a,0x80,0x00,0x05,0x24,0x02,0x00,0x20,
30700x26,0x94,0xff,0xff,0xa2,0x02,0x00,0x00,0x1e,0x80,0xff,0xfd,0x26,0x10,0x00,0x01,
30710x24,0x02,0xff,0xfc,0x26,0x44,0x00,0x03,0x00,0x82,0x90,0x24,0x92,0x42,0x00,0x03,
30720x26,0x94,0xff,0xff,0x26,0x52,0x00,0x04,0xa2,0x02,0x00,0x00,0x1a,0x80,0x00,0x06,
30730x26,0x10,0x00,0x01,0x24,0x02,0x00,0x20,0x26,0x94,0xff,0xff,0xa2,0x02,0x00,0x00,
30740x1e,0x80,0xff,0xfd,0x26,0x10,0x00,0x01,0x8f,0xa5,0x00,0x44,0x08,0x00,0x2e,0xf9,
30750x24,0xa5,0x00,0x01,0x24,0x02,0x00,0x25,0x08,0x00,0x2e,0xf6,0xa2,0x02,0x00,0x00,
30760x36,0x31,0x00,0x40,0x24,0x09,0x00,0x10,0x24,0x02,0x00,0x4c,0x10,0xc2,0x00,0x2a,
30770x24,0x02,0x00,0x6c,0x10,0xc2,0x00,0x05,0x24,0x02,0x00,0x5a,0x10,0xc2,0x00,0x1f,
30780x24,0x02,0x00,0x68,0x10,0xc2,0x00,0x13,0x24,0x02,0xff,0xfc,0x24,0x02,0xff,0xfc,
30790x26,0x43,0x00,0x03,0x00,0x62,0x90,0x24,0x32,0x22,0x00,0x02,0x8e,0x47,0x00,0x00,
30800x00,0x00,0x30,0x21,0x10,0x40,0x00,0x03,0x26,0x52,0x00,0x04,0x00,0xe0,0x10,0x21,
30810x00,0x02,0x37,0xc3,0x02,0x00,0x20,0x21,0xaf,0xa9,0x00,0x10,0xaf,0xb4,0x00,0x14,
30820xaf,0xa8,0x00,0x18,0x0c,0x00,0x30,0x47,0xaf,0xb1,0x00,0x1c,0x08,0x00,0x2f,0x62,
30830x00,0x40,0x80,0x21,0x26,0x43,0x00,0x03,0x00,0x62,0x90,0x24,0x32,0x22,0x00,0x02,
30840x96,0x47,0x00,0x02,0x00,0x00,0x30,0x21,0x10,0x40,0xff,0xf2,0x26,0x52,0x00,0x04,
30850x00,0x07,0x14,0x00,0x08,0x00,0x2f,0x7c,0x00,0x02,0x3c,0x03,0x26,0x42,0x00,0x03,
30860x24,0x03,0xff,0xfc,0x00,0x43,0x90,0x24,0x8e,0x47,0x00,0x00,0x00,0x00,0x30,0x21,
30870x08,0x00,0x2f,0x7d,0x26,0x52,0x00,0x04,0x26,0x42,0x00,0x07,0x24,0x03,0xff,0xf8,
30880x00,0x43,0x90,0x24,0x8e,0x46,0x00,0x00,0x8e,0x47,0x00,0x04,0x08,0x00,0x2f,0x7d,
30890x26,0x52,0x00,0x08,0x08,0x00,0x2f,0x6a,0x36,0x31,0x00,0x02,0x26,0x44,0x00,0x03,
30900x24,0x02,0xff,0xfc,0x00,0x82,0x90,0x24,0x8e,0x44,0x00,0x00,0x02,0x15,0x10,0x23,
30910x26,0x52,0x00,0x04,0x08,0x00,0x2e,0xf8,0xac,0x82,0x00,0x00,0x08,0x00,0x2f,0x6a,
30920x24,0x09,0x00,0x08,0x24,0x02,0xff,0xff,0x12,0x82,0x00,0x11,0x00,0x00,0x00,0x00,
30930x26,0x43,0x00,0x03,0x24,0x02,0xff,0xfc,0x00,0x62,0x90,0x24,0x8e,0x47,0x00,0x00,
30940x02,0x00,0x20,0x21,0x24,0x02,0x00,0x10,0x00,0x00,0x30,0x21,0xaf,0xa2,0x00,0x10,
30950xaf,0xb4,0x00,0x14,0xaf,0xa8,0x00,0x18,0x0c,0x00,0x30,0x47,0xaf,0xb1,0x00,0x1c,
30960x8f,0xa5,0x00,0x44,0x00,0x40,0x80,0x21,0x08,0x00,0x2e,0xf8,0x26,0x52,0x00,0x04,
30970x24,0x14,0x00,0x08,0x08,0x00,0x2f,0xac,0x36,0x31,0x00,0x01,0x26,0x42,0x00,0x03,
30980x24,0x03,0xff,0xfc,0x00,0x43,0x90,0x24,0x8e,0x53,0x00,0x00,0x00,0x00,0x00,0x00,
30990x12,0x60,0x00,0x23,0x26,0x52,0x00,0x04,0x02,0x60,0x20,0x21,0x0c,0x00,0x31,0x15,
31000x01,0x00,0x28,0x21,0x00,0x40,0x20,0x21,0x32,0x22,0x00,0x10,0x14,0x40,0x00,0x09,
31010x00,0x94,0x10,0x2a,0x10,0x40,0x00,0x07,0x26,0x94,0xff,0xff,0x24,0x03,0x00,0x20,
31020x00,0x94,0x10,0x2a,0xa2,0x03,0x00,0x00,0x26,0x94,0xff,0xff,0x14,0x40,0xff,0xfc,
31030x26,0x10,0x00,0x01,0x18,0x80,0x00,0x07,0x00,0x80,0x18,0x21,0x92,0x62,0x00,0x00,
31040x24,0x63,0xff,0xff,0x26,0x73,0x00,0x01,0xa2,0x02,0x00,0x00,0x14,0x60,0xff,0xfb,
31050x26,0x10,0x00,0x01,0x00,0x94,0x10,0x2a,0x10,0x40,0xff,0x83,0x26,0x94,0xff,0xff,
31060x24,0x03,0x00,0x20,0x00,0x94,0x10,0x2a,0xa2,0x03,0x00,0x00,0x26,0x94,0xff,0xff,
31070x14,0x40,0xff,0xfc,0x26,0x10,0x00,0x01,0x08,0x00,0x2f,0x62,0x00,0x00,0x00,0x00,
31080x3c,0x02,0x80,0x01,0x08,0x00,0x2f,0xc6,0x24,0x53,0x08,0x04,0x24,0x02,0x00,0x25,
31090xa2,0x02,0x00,0x00,0x8f,0xa5,0x00,0x44,0x00,0x00,0x00,0x00,0x80,0xa2,0x00,0x00,
31100x90,0xa3,0x00,0x00,0x10,0x40,0x00,0x03,0x26,0x10,0x00,0x01,0x08,0x00,0x2e,0xf6,
31110xa2,0x03,0x00,0x00,0x24,0xa5,0xff,0xff,0x08,0x00,0x2e,0xf8,0xaf,0xa5,0x00,0x44,
31120x80,0xa6,0x00,0x00,0x24,0xa5,0x00,0x01,0x08,0x00,0x2f,0x3c,0xaf,0xa5,0x00,0x44,
31130x24,0xa5,0x00,0x01,0xaf,0xa5,0x00,0x44,0x90,0xa4,0x00,0x00,0x3c,0x02,0x80,0x01,
31140x24,0x42,0x02,0x1c,0x00,0x44,0x10,0x21,0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,
31150x30,0x63,0x00,0x04,0x14,0x60,0x00,0x0f,0x00,0x04,0x16,0x00,0x00,0x02,0x16,0x03,
31160x24,0x03,0x00,0x2a,0x10,0x43,0x00,0x04,0x26,0x42,0x00,0x03,0x29,0x02,0x00,0x00,
31170x08,0x00,0x2f,0x31,0x00,0x02,0x40,0x0b,0x24,0x03,0xff,0xfc,0x00,0x43,0x90,0x24,
31180x24,0xa5,0x00,0x01,0x8e,0x48,0x00,0x00,0xaf,0xa5,0x00,0x44,0x08,0x00,0x30,0x0b,
31190x26,0x52,0x00,0x04,0x0c,0x00,0x30,0x2b,0x27,0xa4,0x00,0x44,0x8f,0xa5,0x00,0x44,
31200x08,0x00,0x30,0x0b,0x00,0x40,0x40,0x21,0x24,0x03,0xff,0xfc,0x00,0x43,0x90,0x24,
31210x8e,0x54,0x00,0x00,0x24,0xe5,0x00,0x01,0xaf,0xa5,0x00,0x44,0x06,0x81,0xff,0x0d,
31220x26,0x52,0x00,0x04,0x00,0x14,0xa0,0x23,0x08,0x00,0x2f,0x2d,0x36,0x31,0x00,0x10,
31230x0c,0x00,0x30,0x2b,0x27,0xa4,0x00,0x44,0x8f,0xa5,0x00,0x44,0x08,0x00,0x2f,0x2d,
31240x00,0x40,0xa0,0x21,0x08,0x00,0x2f,0x07,0x36,0x31,0x00,0x01,0x8c,0x86,0x00,0x00,
31250x3c,0x02,0x80,0x01,0x00,0x80,0x48,0x21,0x90,0xc3,0x00,0x00,0x24,0x44,0x02,0x1c,
31260x00,0x64,0x18,0x21,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x04,
31270x10,0x40,0x00,0x10,0x00,0x00,0x38,0x21,0x00,0x80,0x40,0x21,0x24,0xc2,0x00,0x01,
31280x80,0xc5,0x00,0x00,0xad,0x22,0x00,0x00,0x90,0x43,0x00,0x00,0x00,0x40,0x30,0x21,
31290x00,0x07,0x10,0x80,0x00,0x68,0x18,0x21,0x90,0x64,0x00,0x00,0x00,0x47,0x10,0x21,
31300x00,0x02,0x10,0x40,0x00,0x45,0x10,0x21,0x30,0x84,0x00,0x04,0x14,0x80,0xff,0xf3,
31310x24,0x47,0xff,0xd0,0x03,0xe0,0x00,0x08,0x00,0xe0,0x10,0x21,0x27,0xbd,0xff,0x98,
31320xaf,0xb2,0x00,0x50,0x8f,0xb2,0x00,0x84,0x3c,0x02,0x80,0x01,0xaf,0xb4,0x00,0x58,
31330x32,0x43,0x00,0x40,0xaf,0xb1,0x00,0x4c,0xaf,0xb0,0x00,0x48,0xaf,0xb7,0x00,0x64,
31340xaf,0xb6,0x00,0x60,0xaf,0xb5,0x00,0x5c,0xaf,0xb3,0x00,0x54,0x00,0x80,0x68,0x21,
31350x00,0xc0,0x70,0x21,0x00,0xe0,0x78,0x21,0x8f,0xb0,0x00,0x78,0x8f,0xb8,0x00,0x7c,
31360x8f,0xb1,0x00,0x80,0x10,0x60,0x00,0x03,0x24,0x54,0x08,0x0c,0x3c,0x02,0x80,0x01,
31370x24,0x54,0x08,0x34,0x32,0x42,0x00,0x10,0x10,0x40,0x00,0x04,0x26,0x02,0xff,0xfe,
31380x24,0x02,0xff,0xfe,0x02,0x42,0x90,0x24,0x26,0x02,0xff,0xfe,0x2c,0x42,0x00,0x23,
31390x10,0x40,0x00,0x5d,0x00,0x00,0x18,0x21,0x32,0x42,0x00,0x01,0x24,0x15,0x00,0x30,
31400x24,0x03,0x00,0x20,0x32,0x44,0x00,0x02,0x00,0x62,0xa8,0x0a,0x10,0x80,0x00,0x07,
31410x00,0x00,0xb8,0x21,0x05,0xc0,0x00,0x96,0x32,0x42,0x00,0x04,0x10,0x40,0x00,0x90,
31420x32,0x42,0x00,0x08,0x24,0x17,0x00,0x2b,0x27,0x18,0xff,0xff,0x32,0x56,0x00,0x20,
31430x12,0xc0,0x00,0x07,0x01,0xcf,0x10,0x25,0x24,0x02,0x00,0x10,0x12,0x02,0x00,0x86,
31440x27,0x03,0xff,0xff,0x3a,0x02,0x00,0x08,0x00,0x62,0xc0,0x0a,0x01,0xcf,0x10,0x25,
31450x14,0x40,0x00,0x55,0x00,0x00,0xc8,0x21,0x24,0x02,0x00,0x30,0x24,0x19,0x00,0x01,
31460xa3,0xa2,0x00,0x00,0x02,0x39,0x10,0x2a,0x03,0x22,0x88,0x0b,0x32,0x43,0x00,0x11,
31470x14,0x60,0x00,0x0a,0x03,0x11,0xc0,0x23,0x03,0x00,0x10,0x21,0x18,0x40,0x00,0x07,
31480x27,0x18,0xff,0xff,0x24,0x03,0x00,0x20,0x03,0x00,0x10,0x21,0xa1,0xa3,0x00,0x00,
31490x27,0x18,0xff,0xff,0x1c,0x40,0xff,0xfc,0x25,0xad,0x00,0x01,0x12,0xe0,0x00,0x03,
31500x00,0x00,0x00,0x00,0xa1,0xb7,0x00,0x00,0x25,0xad,0x00,0x01,0x12,0xc0,0x00,0x07,
31510x32,0x42,0x00,0x10,0x24,0x02,0x00,0x08,0x12,0x02,0x00,0x38,0x24,0x02,0x00,0x10,
31520x12,0x02,0x00,0x30,0x24,0x02,0x00,0x30,0x32,0x42,0x00,0x10,0x14,0x40,0x00,0x0a,
31530x03,0x31,0x10,0x2a,0x03,0x00,0x10,0x21,0x18,0x40,0x00,0x06,0x27,0x18,0xff,0xff,
31540x03,0x00,0x10,0x21,0xa1,0xb5,0x00,0x00,0x27,0x18,0xff,0xff,0x1c,0x40,0xff,0xfc,
31550x25,0xad,0x00,0x01,0x03,0x31,0x10,0x2a,0x10,0x40,0x00,0x07,0x26,0x31,0xff,0xff,
31560x24,0x03,0x00,0x30,0x03,0x31,0x10,0x2a,0xa1,0xa3,0x00,0x00,0x26,0x31,0xff,0xff,
31570x14,0x40,0xff,0xfc,0x25,0xad,0x00,0x01,0x03,0x20,0x10,0x21,0x18,0x40,0x00,0x08,
31580x27,0x39,0xff,0xff,0x03,0xb9,0x10,0x21,0x90,0x43,0x00,0x00,0x03,0x20,0x20,0x21,
31590x27,0x39,0xff,0xff,0xa1,0xa3,0x00,0x00,0x1c,0x80,0xff,0xfa,0x25,0xad,0x00,0x01,
31600x03,0x00,0x10,0x21,0x18,0x40,0x00,0x07,0x27,0x18,0xff,0xff,0x24,0x03,0x00,0x20,
31610x03,0x00,0x10,0x21,0xa1,0xa3,0x00,0x00,0x27,0x18,0xff,0xff,0x1c,0x40,0xff,0xfc,
31620x25,0xad,0x00,0x01,0x01,0xa0,0x18,0x21,0x7b,0xb6,0x03,0x3c,0x7b,0xb4,0x02,0xfc,
31630x7b,0xb2,0x02,0xbc,0x7b,0xb0,0x02,0x7c,0x00,0x60,0x10,0x21,0x03,0xe0,0x00,0x08,
31640x27,0xbd,0x00,0x68,0xa1,0xa2,0x00,0x00,0x92,0x83,0x00,0x21,0x25,0xad,0x00,0x01,
31650xa1,0xa3,0x00,0x00,0x08,0x00,0x30,0x9a,0x25,0xad,0x00,0x01,0x24,0x02,0x00,0x30,
31660x08,0x00,0x30,0xcd,0xa1,0xa2,0x00,0x00,0x01,0xcf,0x10,0x25,0x10,0x40,0xff,0xad,
31670x00,0x00,0x60,0x21,0x00,0x0e,0x18,0x02,0x03,0x3d,0x98,0x21,0x00,0x60,0x20,0x21,
31680x01,0xe0,0x38,0x21,0x10,0x60,0x00,0x04,0x27,0x39,0x00,0x01,0x00,0x70,0x00,0x1b,
31690x00,0x00,0x20,0x12,0x00,0x00,0x18,0x10,0x00,0x80,0x48,0x21,0x00,0xe0,0x30,0x21,
31700x01,0x80,0x70,0x21,0x01,0x80,0x28,0x21,0x10,0x00,0x00,0x06,0x24,0x04,0x00,0x21,
31710x00,0x03,0x08,0x40,0x00,0x03,0x2f,0xc2,0x00,0x22,0x18,0x25,0x00,0x06,0x30,0x40,
31720x00,0x0e,0x70,0x40,0x14,0xa0,0x00,0x02,0x00,0x70,0x10,0x2b,0x14,0x40,0x00,0x03,
31730x24,0x84,0xff,0xff,0x00,0x70,0x18,0x23,0x25,0xce,0x00,0x01,0x14,0x80,0xff,0xf4,
31740x00,0x06,0x17,0xc2,0x02,0x83,0x18,0x21,0x01,0xc0,0x38,0x21,0x00,0x00,0x50,0x21,
31750x00,0x09,0x20,0x00,0x00,0x00,0x28,0x21,0x90,0x66,0x00,0x00,0x00,0x8a,0x70,0x25,
31760x00,0xa7,0x78,0x25,0x01,0xcf,0x10,0x25,0x14,0x40,0xff,0xda,0xa2,0x66,0x00,0x00,
31770x08,0x00,0x30,0x82,0x02,0x39,0x10,0x2a,0x08,0x00,0x30,0x7b,0x27,0x18,0xff,0xfe,
31780x10,0x40,0xff,0x73,0x32,0x56,0x00,0x20,0x08,0x00,0x30,0x72,0x24,0x17,0x00,0x20,
31790x00,0x0f,0x78,0x23,0x00,0x0e,0x70,0x23,0x00,0x0f,0x10,0x2b,0x01,0xc2,0x70,0x23,
31800x08,0x00,0x30,0x72,0x24,0x17,0x00,0x2d,0x80,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
31810x10,0x40,0x00,0x06,0x00,0x80,0x18,0x21,0x24,0x63,0x00,0x01,0x80,0x62,0x00,0x00,
31820x00,0x00,0x00,0x00,0x14,0x40,0xff,0xfc,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
31830x00,0x64,0x10,0x23,0x24,0xa5,0xff,0xff,0x24,0x02,0xff,0xff,0x10,0xa2,0x00,0x0d,
31840x00,0x80,0x18,0x21,0x80,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x09,
31850x00,0x00,0x00,0x00,0x24,0x06,0xff,0xff,0x24,0xa5,0xff,0xff,0x10,0xa6,0x00,0x05,
31860x24,0x63,0x00,0x01,0x80,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0xfa,
31870x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x64,0x10,0x23,0x80,0x82,0x00,0x00,
31880x90,0x88,0x00,0x00,0x10,0x40,0x00,0x17,0x00,0x00,0x48,0x21,0x90,0xa3,0x00,0x00,
31890x00,0xa0,0x30,0x21,0x10,0x60,0x00,0x0b,0x00,0x60,0x38,0x21,0x00,0x08,0x16,0x00,
31900x00,0x02,0x46,0x03,0x00,0x07,0x16,0x00,0x00,0x02,0x16,0x03,0x11,0x02,0x00,0x05,
31910x24,0xc6,0x00,0x01,0x90,0xc3,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x60,0xff,0xf9,
31920x00,0x60,0x38,0x21,0x00,0x03,0x16,0x00,0x10,0x40,0x00,0x06,0x00,0x00,0x00,0x00,
31930x24,0x84,0x00,0x01,0x90,0x82,0x00,0x00,0x25,0x29,0x00,0x01,0x14,0x40,0xff,0xeb,
31940x00,0x40,0x40,0x21,0x03,0xe0,0x00,0x08,0x01,0x20,0x10,0x21,0x80,0x82,0x00,0x00,
31950x90,0x87,0x00,0x00,0x10,0x40,0x00,0x17,0x00,0x00,0x18,0x21,0x90,0xa2,0x00,0x00,
31960x00,0x00,0x00,0x00,0x00,0x02,0x1e,0x00,0x10,0x60,0x00,0x0c,0x00,0xa0,0x30,0x21,
31970x00,0x07,0x16,0x00,0x00,0x02,0x3e,0x03,0x00,0x03,0x16,0x03,0x10,0xe2,0x00,0x0d,
31980x00,0x80,0x18,0x21,0x24,0xc6,0x00,0x01,0x90,0xc2,0x00,0x00,0x00,0x00,0x00,0x00,
31990x00,0x02,0x1e,0x00,0x14,0x60,0xff,0xf9,0x00,0x03,0x16,0x03,0x24,0x84,0x00,0x01,
32000x90,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0xec,0x00,0x40,0x38,0x21,
32010x00,0x00,0x18,0x21,0x03,0xe0,0x00,0x08,0x00,0x60,0x10,0x21,0x27,0xbd,0xff,0xe0,
32020xaf,0xb0,0x00,0x10,0x8f,0x90,0xc5,0x5c,0xaf,0xb1,0x00,0x14,0xaf,0xbf,0x00,0x18,
32030x00,0x84,0x80,0x0b,0x00,0x00,0x30,0x21,0x12,0x00,0x00,0x0a,0x00,0xa0,0x88,0x21,
32040x0c,0x00,0x31,0x27,0x02,0x00,0x20,0x21,0x02,0x02,0x80,0x21,0x82,0x02,0x00,0x00,
32050x02,0x20,0x28,0x21,0x02,0x00,0x20,0x21,0x14,0x40,0x00,0x07,0x00,0x00,0x30,0x21,
32060xaf,0x80,0xc5,0x5c,0x8f,0xbf,0x00,0x18,0x7b,0xb0,0x00,0xbc,0x00,0xc0,0x10,0x21,
32070x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x0c,0x00,0x31,0x43,0x00,0x00,0x00,0x00,
32080x00,0x40,0x18,0x21,0x10,0x40,0x00,0x07,0x02,0x00,0x30,0x21,0x80,0x42,0x00,0x00,
32090x00,0x00,0x00,0x00,0x10,0x40,0x00,0x03,0x00,0x00,0x00,0x00,0xa0,0x60,0x00,0x00,
32100x24,0x63,0x00,0x01,0xaf,0x83,0xc5,0x5c,0x08,0x00,0x31,0x71,0x00,0x00,0x00,0x00,
32110x24,0xc6,0xff,0xff,0x24,0x02,0xff,0xff,0x10,0xc2,0x00,0x05,0x00,0x80,0x18,0x21,
32120x24,0xc6,0xff,0xff,0xa0,0x65,0x00,0x00,0x14,0xc2,0xff,0xfd,0x24,0x63,0x00,0x01,
32130x03,0xe0,0x00,0x08,0x00,0x80,0x10,0x21,0x24,0xc6,0xff,0xff,0x24,0x02,0xff,0xff,
32140x10,0xc2,0x00,0x08,0x00,0x80,0x18,0x21,0x24,0x07,0xff,0xff,0x90,0xa2,0x00,0x00,
32150x24,0xc6,0xff,0xff,0x24,0xa5,0x00,0x01,0xa0,0x62,0x00,0x00,0x14,0xc7,0xff,0xfb,
32160x24,0x63,0x00,0x01,0x03,0xe0,0x00,0x08,0x00,0x80,0x10,0x21,0x00,0x80,0x18,0x21,
32170x90,0xa2,0x00,0x00,0x24,0xa5,0x00,0x01,0xa0,0x82,0x00,0x00,0x14,0x40,0xff,0xfc,
32180x24,0x84,0x00,0x01,0x03,0xe0,0x00,0x08,0x00,0x60,0x10,0x21,0x90,0x83,0x00,0x00,
32190x90,0xa2,0x00,0x00,0x24,0x84,0x00,0x01,0x00,0x62,0x10,0x23,0x00,0x02,0x16,0x00,
32200x00,0x02,0x16,0x03,0x14,0x40,0x00,0x03,0x24,0xa5,0x00,0x01,0x14,0x60,0xff,0xf7,
32210x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
32220x00,0x00,0x10,0x21,0x93,0x85,0x88,0x6d,0x24,0x02,0x00,0x01,0x14,0xa2,0x00,0x53,
32230x00,0x80,0x40,0x21,0x8c,0x89,0x00,0x04,0x3c,0x02,0xb0,0x01,0x01,0x22,0x30,0x21,
32240x8c,0xc3,0x00,0x04,0x3c,0x02,0x01,0x00,0x00,0x62,0x10,0x24,0x10,0x40,0x00,0x4b,
32250x30,0x62,0x00,0x08,0x10,0x45,0x00,0x59,0x00,0x00,0x00,0x00,0x94,0xc2,0x00,0x38,
32260x24,0x03,0x00,0xb4,0x30,0x44,0x00,0xff,0x10,0x83,0x00,0x61,0x24,0x02,0x00,0xc4,
32270x10,0x82,0x00,0x54,0x24,0x02,0x00,0x94,0x10,0x82,0x00,0x45,0x00,0x00,0x00,0x00,
32280x94,0xc2,0x00,0x38,0x00,0x00,0x00,0x00,0x30,0x47,0xff,0xff,0x30,0xe3,0x40,0xff,
32290x24,0x02,0x40,0x88,0x14,0x62,0x00,0x39,0x30,0xe3,0x03,0x00,0x24,0x02,0x03,0x00,
32300x10,0x62,0x00,0x38,0x00,0x00,0x00,0x00,0x94,0xc2,0x00,0x56,0x00,0x00,0x00,0x00,
32310x30,0x47,0xff,0xff,0x30,0xe2,0x00,0x80,0x14,0x40,0x00,0x30,0x3c,0x02,0xb0,0x01,
32320x01,0x22,0x30,0x21,0x94,0xc3,0x00,0x60,0x24,0x02,0x00,0x08,0x14,0x43,0x00,0x3b,
32330x00,0x00,0x00,0x00,0x90,0xc2,0x00,0x62,0x24,0x03,0x00,0x04,0x00,0x02,0x39,0x02,
32340x10,0xe3,0x00,0x15,0x24,0x02,0x00,0x06,0x14,0xe2,0x00,0x34,0x00,0x00,0x00,0x00,
32350x8d,0x05,0x01,0xac,0x94,0xc4,0x00,0x66,0x27,0x82,0x92,0x48,0x00,0x05,0x28,0x80,
32360x30,0x87,0xff,0xff,0x00,0xa2,0x28,0x21,0x00,0x07,0x1a,0x00,0x8c,0xa4,0x00,0x00,
32370x00,0x07,0x12,0x02,0x00,0x43,0x10,0x25,0x24,0x42,0x00,0x5e,0x24,0x03,0xc0,0x00,
32380x30,0x47,0xff,0xff,0x00,0x83,0x20,0x24,0x00,0x87,0x20,0x25,0xac,0xa4,0x00,0x00,
32390x08,0x00,0x32,0x17,0xad,0x07,0x00,0x10,0x8d,0x05,0x01,0xac,0x94,0xc4,0x00,0x64,
32400x27,0x82,0x92,0x48,0x00,0x05,0x28,0x80,0x30,0x87,0xff,0xff,0x00,0xa2,0x28,0x21,
32410x00,0x07,0x1a,0x00,0x8c,0xa4,0x00,0x00,0x00,0x07,0x12,0x02,0x00,0x43,0x10,0x25,
32420x24,0x42,0x00,0x36,0x3c,0x03,0xff,0xff,0x30,0x47,0xff,0xff,0x00,0x83,0x20,0x24,
32430x00,0x87,0x20,0x25,0xac,0xa4,0x00,0x00,0xad,0x07,0x00,0x10,0x03,0xe0,0x00,0x08,
32440x00,0x00,0x00,0x00,0x94,0xc2,0x00,0x50,0x08,0x00,0x31,0xd5,0x30,0x47,0xff,0xff,
32450x8d,0x04,0x01,0xac,0x27,0x83,0x92,0x48,0x00,0x04,0x20,0x80,0x00,0x83,0x20,0x21,
32460x8c,0x82,0x00,0x00,0x3c,0x03,0xff,0xff,0x00,0x43,0x10,0x24,0x34,0x42,0x00,0x2e,
32470xac,0x82,0x00,0x00,0x24,0x03,0x00,0x2e,0xad,0x03,0x00,0x10,0x03,0xe0,0x00,0x08,
32480x00,0x00,0x00,0x00,0x8d,0x04,0x01,0xac,0x27,0x83,0x92,0x48,0x00,0x04,0x20,0x80,
32490x00,0x83,0x20,0x21,0x8c,0x82,0x00,0x00,0x3c,0x03,0xff,0xff,0x00,0x43,0x10,0x24,
32500x34,0x42,0x00,0x0e,0x24,0x03,0x00,0x0e,0x08,0x00,0x32,0x16,0xac,0x82,0x00,0x00,
32510x8d,0x04,0x01,0xac,0x27,0x83,0x92,0x48,0x00,0x04,0x20,0x80,0x00,0x83,0x20,0x21,
32520x8c,0x82,0x00,0x00,0x3c,0x03,0xff,0xff,0x00,0x43,0x10,0x24,0x34,0x42,0x00,0x14,
32530x24,0x03,0x00,0x14,0x08,0x00,0x32,0x16,0xac,0x82,0x00,0x00,0x03,0xe0,0x00,0x08,
32540x00,0x00,0x00,0x00,0x30,0xc6,0x00,0xff,0x00,0x06,0x48,0x40,0x01,0x26,0x10,0x21,
32550x00,0x02,0x10,0x80,0x27,0x8b,0xc5,0x70,0x27,0x83,0xc5,0x76,0x00,0x4b,0x40,0x21,
32560x00,0x43,0x10,0x21,0x94,0x47,0x00,0x00,0x30,0xa2,0x3f,0xff,0x10,0xe2,0x00,0x29,
32570x30,0x8a,0xff,0xff,0x95,0x02,0x00,0x02,0x24,0x03,0x00,0x01,0x00,0x02,0x11,0x82,
32580x30,0x42,0x00,0x01,0x10,0x43,0x00,0x18,0x00,0x00,0x00,0x00,0x01,0x26,0x10,0x21,
32590x00,0x02,0x10,0x80,0x00,0x4b,0x30,0x21,0x94,0xc4,0x00,0x02,0x27,0x83,0xc5,0x76,
32600x27,0x85,0xc5,0x74,0x00,0x45,0x28,0x21,0x30,0x84,0xff,0xdf,0x00,0x43,0x10,0x21,
32610xa4,0xc4,0x00,0x02,0xa4,0x40,0x00,0x00,0xa4,0xa0,0x00,0x00,0x94,0xc3,0x00,0x02,
32620x3c,0x04,0xb0,0x01,0x01,0x44,0x20,0x21,0x30,0x63,0xff,0xbf,0xa4,0xc3,0x00,0x02,
32630xa0,0xc0,0x00,0x00,0x8c,0x82,0x00,0x04,0x24,0x03,0xf0,0xff,0x00,0x43,0x10,0x24,
32640x03,0xe0,0x00,0x08,0xac,0x82,0x00,0x04,0x24,0x02,0xc0,0x00,0x91,0x04,0x00,0x01,
32650x00,0xa2,0x10,0x24,0x00,0x47,0x28,0x25,0x3c,0x03,0xb0,0x01,0x24,0x02,0x00,0x02,
32660x14,0x82,0xff,0xe2,0x01,0x43,0x18,0x21,0xac,0x65,0x00,0x00,0x08,0x00,0x32,0x44,
32670x01,0x26,0x10,0x21,0x08,0x00,0x32,0x44,0x01,0x26,0x10,0x21,0x93,0x83,0x88,0x6d,
32680x24,0x02,0x00,0x01,0x14,0x62,0x00,0x0d,0x3c,0x02,0xb0,0x01,0x8c,0x84,0x00,0x04,
32690x3c,0x06,0xb0,0x09,0x00,0x82,0x20,0x21,0x8c,0x85,0x00,0x08,0x8c,0x83,0x00,0x04,
32700x3c,0x02,0x01,0x00,0x34,0xc6,0x01,0x00,0x00,0x62,0x18,0x24,0x14,0x60,0x00,0x05,
32710x30,0xa5,0x20,0x00,0x24,0x02,0x00,0x06,0xa0,0xc2,0x00,0x00,0x03,0xe0,0x00,0x08,
32720x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x09,0x10,0xa0,0xff,0xfc,0x34,0x63,0x01,0x00,
32730x24,0x02,0x00,0x0e,0x08,0x00,0x32,0x77,0xa0,0x62,0x00,0x00,0x3c,0x02,0xb0,0x01,
32740x30,0xa5,0xff,0xff,0x00,0xa2,0x28,0x21,0x8c,0xa3,0x00,0x00,0x3c,0x02,0x10,0x00,
32750x00,0x80,0x30,0x21,0x00,0x62,0x18,0x24,0x8c,0xa2,0x00,0x04,0x10,0x60,0x00,0x04,
32760x00,0x00,0x00,0x00,0x30,0x42,0x80,0x00,0x10,0x40,0x00,0x13,0x00,0x00,0x00,0x00,
32770x8c,0xc2,0x01,0xa8,0x00,0x00,0x00,0x00,0x24,0x44,0x00,0x01,0x28,0x83,0x00,0x00,
32780x24,0x42,0x00,0x40,0x00,0x83,0x10,0x0a,0x93,0x83,0x88,0x6c,0x00,0x02,0x11,0x83,
32790x00,0x02,0x11,0x80,0x00,0x82,0x20,0x23,0x24,0x63,0xff,0xff,0xac,0xc4,0x01,0xa8,
32800xa3,0x83,0x88,0x6c,0x8c,0xc4,0x01,0xac,0x8c,0xc2,0x01,0xa8,0x00,0x00,0x00,0x00,
32810x00,0x44,0x10,0x26,0x00,0x02,0x10,0x2b,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
32820x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x73,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
32830x30,0x42,0x00,0x01,0x14,0x40,0x00,0x04,0x00,0x00,0x00,0x00,0xa3,0x80,0x88,0x6d,
32840x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0xa3,0x82,0x88,0x6d,
32850x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x8c,0x82,0x00,0x04,0x3c,0x05,0xb0,0x01,
32860x00,0x80,0x50,0x21,0x00,0x45,0x10,0x21,0x8c,0x43,0x00,0x04,0x24,0x02,0x00,0x05,
32870x00,0x03,0x1a,0x02,0x30,0x69,0x00,0x0f,0x11,0x22,0x00,0x0b,0x24,0x02,0x00,0x07,
32880x11,0x22,0x00,0x09,0x24,0x02,0x00,0x0a,0x11,0x22,0x00,0x07,0x24,0x02,0x00,0x0b,
32890x11,0x22,0x00,0x05,0x24,0x02,0x00,0x01,0x93,0x83,0x88,0x6c,0x3c,0x04,0xb0,0x06,
32900x10,0x62,0x00,0x03,0x34,0x84,0x80,0x18,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
32910x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x17,0x02,0x14,0x40,0xff,0xfa,
32920x00,0x00,0x00,0x00,0x8d,0x43,0x01,0xa8,0x27,0x82,0x92,0x48,0x00,0x03,0x18,0x80,
32930x00,0x6a,0x20,0x21,0x8c,0x87,0x00,0xa8,0x00,0x62,0x18,0x21,0x8c,0x68,0x00,0x00,
32940x00,0xe5,0x28,0x21,0x8c,0xa9,0x00,0x00,0x3c,0x02,0xff,0xff,0x27,0x83,0x93,0x48,
32950x01,0x22,0x10,0x24,0x00,0x48,0x10,0x25,0xac,0xa2,0x00,0x00,0x8d,0x44,0x01,0xa8,
32960x00,0x07,0x30,0xc2,0x3c,0x02,0x00,0x80,0x00,0x04,0x20,0x80,0x00,0x83,0x20,0x21,
32970x00,0x06,0x32,0x00,0x8c,0xa9,0x00,0x04,0x00,0xc2,0x30,0x25,0x8c,0x82,0x00,0x00,
32980x3c,0x03,0x80,0x00,0x01,0x22,0x10,0x25,0x00,0x43,0x10,0x25,0xac,0xa2,0x00,0x04,
32990xaf,0x87,0xc5,0x60,0x8c,0xa2,0x00,0x00,0x00,0x00,0x00,0x00,0xaf,0x82,0xc5,0x68,
33000x8c,0xa3,0x00,0x04,0x3c,0x01,0xb0,0x07,0xac,0x26,0x80,0x18,0x8d,0x42,0x01,0xa8,
33010xaf,0x83,0xc5,0x64,0x93,0x85,0x88,0x6c,0x24,0x44,0x00,0x01,0x28,0x83,0x00,0x00,
33020x24,0x42,0x00,0x40,0x00,0x83,0x10,0x0a,0x00,0x02,0x11,0x83,0x00,0x02,0x11,0x80,
33030x24,0xa5,0xff,0xff,0x00,0x82,0x20,0x23,0xad,0x44,0x01,0xa8,0xa3,0x85,0x88,0x6c,
33040x08,0x00,0x32,0xc2,0x00,0x00,0x00,0x00,0x3c,0x05,0xb0,0x03,0x3c,0x02,0x80,0x01,
33050x34,0xa5,0x00,0x20,0x24,0x42,0xcb,0xe8,0xac,0xa2,0x00,0x00,0x24,0x02,0x00,0x02,
33060x24,0x03,0x00,0x20,0xac,0x82,0x00,0x64,0x3c,0x02,0x80,0x01,0xac,0x83,0x00,0x60,
33070xac,0x80,0x00,0x00,0xac,0x80,0x00,0x04,0xac,0x80,0x00,0x08,0xac,0x80,0x00,0x4c,
33080xac,0x80,0x00,0x50,0xac,0x80,0x00,0x54,0xac,0x80,0x00,0x0c,0xac,0x80,0x00,0x58,
33090xa0,0x80,0x00,0x5c,0x24,0x42,0xcc,0xac,0x24,0x83,0x00,0x68,0x24,0x05,0x00,0x0f,
33100x24,0xa5,0xff,0xff,0xac,0x62,0x00,0x00,0x04,0xa1,0xff,0xfd,0x24,0x63,0x00,0x04,
33110x3c,0x02,0x80,0x01,0x24,0x42,0xcd,0xdc,0xac,0x82,0x00,0x78,0x3c,0x03,0x80,0x01,
33120x3c,0x02,0x80,0x01,0x24,0x63,0xcf,0x68,0x24,0x42,0xce,0xd4,0xac,0x83,0x00,0x88,
33130xac,0x82,0x00,0x98,0x3c,0x03,0x80,0x01,0x3c,0x02,0x80,0x01,0x24,0x63,0xd0,0x10,
33140x24,0x42,0xd1,0x28,0xac,0x83,0x00,0xa0,0xac,0x82,0x00,0xa4,0xa0,0x80,0x01,0xba,
33150xac,0x80,0x01,0xa8,0xac,0x80,0x01,0xac,0xac,0x80,0x01,0xb0,0xac,0x80,0x01,0xb4,
33160xa0,0x80,0x01,0xb8,0x03,0xe0,0x00,0x08,0xa0,0x80,0x01,0xb9,0x3c,0x03,0xb0,0x03,
33170x3c,0x02,0x80,0x01,0x34,0x63,0x00,0x20,0x24,0x42,0xcc,0xac,0x03,0xe0,0x00,0x08,
33180xac,0x62,0x00,0x00,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x01,0x27,0xbd,0xff,0xe8,
33190x34,0x63,0x00,0x20,0x24,0x42,0xcc,0xc4,0xaf,0xb0,0x00,0x10,0xac,0x62,0x00,0x00,
33200xaf,0xbf,0x00,0x14,0x8c,0x83,0x00,0x10,0x8f,0x82,0x94,0xe8,0x00,0x80,0x80,0x21,
33210x3c,0x04,0x80,0x01,0x30,0x46,0x00,0x01,0x10,0x60,0x00,0x11,0x24,0x84,0x08,0x64,
33220x8e,0x02,0x00,0x14,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x0d,0x00,0x00,0x00,0x00,
33230x8e,0x05,0x00,0x10,0x8e,0x03,0x00,0x14,0x8e,0x02,0x00,0x04,0x00,0xa3,0x28,0x21,
33240x00,0x45,0x10,0x21,0x30,0x43,0x00,0xff,0x00,0x03,0x18,0x2b,0x00,0x02,0x12,0x02,
33250x00,0x43,0x10,0x21,0x00,0x02,0x12,0x00,0x30,0x42,0x3f,0xff,0xae,0x02,0x00,0x04,
33260x14,0xc0,0x00,0x0a,0x00,0x00,0x00,0x00,0xae,0x00,0x00,0x00,0xae,0x00,0x00,0x4c,
33270xae,0x00,0x00,0x50,0xae,0x00,0x00,0x54,0xae,0x00,0x00,0x0c,0x8f,0xbf,0x00,0x14,
33280x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x8e,0x05,0x00,0x10,
33290x8e,0x07,0x00,0x04,0x8e,0x06,0x00,0x14,0x0c,0x00,0x1a,0x82,0x00,0x00,0x00,0x00,
33300x08,0x00,0x33,0x53,0xae,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x01,
33310x34,0x63,0x00,0x20,0x24,0x42,0xcd,0x88,0xac,0x62,0x00,0x00,0x8c,0x86,0x00,0x04,
33320x3c,0x02,0xb0,0x01,0x24,0x03,0x00,0x01,0x00,0xc2,0x10,0x21,0x8c,0x45,0x00,0x00,
33330xac,0x83,0x00,0x4c,0x00,0x05,0x14,0x02,0x30,0xa3,0x3f,0xff,0x30,0x42,0x00,0xff,
33340xac,0x83,0x00,0x10,0xac,0x82,0x00,0x14,0x8c,0x83,0x00,0x14,0xac,0x85,0x00,0x40,
33350x00,0xc3,0x30,0x21,0x03,0xe0,0x00,0x08,0xac,0x86,0x00,0x08,0x3c,0x02,0xb0,0x03,
33360x3c,0x03,0x80,0x01,0x27,0xbd,0xff,0xe8,0x34,0x42,0x00,0x20,0x24,0x63,0xcd,0xdc,
33370xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,0xac,0x43,0x00,0x00,0x8c,0x82,0x00,0x4c,
33380x00,0x00,0x00,0x00,0x10,0x40,0x00,0x0a,0x00,0x80,0x80,0x21,0xae,0x00,0x00,0x00,
33390xae,0x00,0x00,0x4c,0xae,0x00,0x00,0x50,0xae,0x00,0x00,0x54,0xae,0x00,0x00,0x0c,
33400x8f,0xbf,0x00,0x14,0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,
33410x0c,0x00,0x33,0x62,0x00,0x00,0x00,0x00,0x08,0x00,0x33,0x84,0xae,0x00,0x00,0x00,
33420x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,0x27,0xbd,0xff,0xe8,0x34,0x42,0x00,0x20,
33430x24,0x63,0xce,0x40,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,0xac,0x43,0x00,0x00,
33440x8c,0x82,0x00,0x4c,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x16,0x00,0x80,0x80,0x21,
33450x8e,0x03,0x00,0x08,0x3c,0x02,0xb0,0x01,0x8e,0x04,0x00,0x44,0x00,0x62,0x18,0x21,
33460x90,0x65,0x00,0x00,0x24,0x02,0x00,0x01,0xae,0x02,0x00,0x50,0x30,0xa3,0x00,0xff,
33470x00,0x03,0x10,0x82,0x00,0x04,0x23,0x02,0x30,0x84,0x00,0x0f,0x30,0x42,0x00,0x03,
33480x00,0x03,0x19,0x02,0xae,0x04,0x00,0x34,0xae,0x02,0x00,0x2c,0xae,0x03,0x00,0x30,
33490xa2,0x05,0x00,0x48,0x8f,0xbf,0x00,0x14,0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,
33500x27,0xbd,0x00,0x18,0x0c,0x00,0x33,0x62,0x00,0x00,0x00,0x00,0x08,0x00,0x33,0x9c,
33510x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,0x27,0xbd,0xff,0xe8,
33520x34,0x42,0x00,0x20,0x24,0x63,0xce,0xd4,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,
33530xac,0x43,0x00,0x00,0x8c,0x82,0x00,0x50,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x16,
33540x00,0x80,0x80,0x21,0x92,0x03,0x00,0x44,0x8e,0x02,0x00,0x40,0x83,0x85,0x95,0x14,
33550x92,0x04,0x00,0x41,0x30,0x63,0x00,0x01,0x00,0x02,0x16,0x02,0xae,0x04,0x00,0x14,
33560x00,0x00,0x30,0x21,0xae,0x02,0x00,0x18,0x10,0xa0,0x00,0x04,0xae,0x03,0x00,0x3c,
33570x10,0x60,0x00,0x03,0x24,0x02,0x00,0x01,0x24,0x06,0x00,0x01,0x24,0x02,0x00,0x01,
33580xa3,0x86,0x95,0x14,0x8f,0xbf,0x00,0x14,0xae,0x02,0x00,0x54,0x8f,0xb0,0x00,0x10,
33590x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x0c,0x00,0x33,0x90,0x00,0x00,0x00,0x00,
33600x08,0x00,0x33,0xc1,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,
33610x27,0xbd,0xff,0xe8,0x34,0x42,0x00,0x20,0x24,0x63,0xcf,0x68,0xaf,0xb0,0x00,0x10,
33620xaf,0xbf,0x00,0x14,0xac,0x43,0x00,0x00,0x8c,0x82,0x00,0x50,0x00,0x00,0x00,0x00,
33630x10,0x40,0x00,0x1b,0x00,0x80,0x80,0x21,0x3c,0x02,0xb0,0x03,0x8c,0x42,0x00,0x00,
33640x92,0x04,0x00,0x44,0x8e,0x03,0x00,0x40,0x83,0x86,0x95,0x14,0x92,0x05,0x00,0x41,
33650x30,0x42,0x08,0x00,0x30,0x84,0x00,0x01,0x00,0x02,0x12,0xc2,0x00,0x03,0x1e,0x02,
33660x00,0x82,0x20,0x25,0xae,0x05,0x00,0x14,0x00,0x00,0x38,0x21,0xae,0x03,0x00,0x18,
33670x10,0xc0,0x00,0x04,0xae,0x04,0x00,0x3c,0x10,0x80,0x00,0x03,0x24,0x02,0x00,0x01,
33680x24,0x07,0x00,0x01,0x24,0x02,0x00,0x01,0xa3,0x87,0x95,0x14,0x8f,0xbf,0x00,0x14,
33690xae,0x02,0x00,0x54,0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,
33700x0c,0x00,0x33,0x90,0x00,0x00,0x00,0x00,0x08,0x00,0x33,0xe6,0x00,0x00,0x00,0x00,
33710x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,0x27,0xbd,0xff,0xe8,0x34,0x42,0x00,0x20,
33720x24,0x63,0xd0,0x10,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,0xac,0x43,0x00,0x00,
33730x8c,0x82,0x00,0x54,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x37,0x00,0x80,0x80,0x21,
33740x8e,0x04,0x00,0x04,0x8e,0x03,0x00,0x44,0x3c,0x02,0x80,0x00,0x3c,0x05,0xb0,0x01,
33750x34,0x42,0x00,0x10,0x00,0x85,0x20,0x21,0x00,0x62,0x18,0x25,0xac,0x83,0x00,0x04,
33760x8e,0x02,0x00,0x04,0x8e,0x03,0x01,0xac,0x02,0x00,0x20,0x21,0x00,0x45,0x10,0x21,
33770x8c,0x46,0x00,0x00,0x00,0x03,0x18,0x80,0x27,0x82,0x92,0x48,0x00,0x62,0x18,0x21,
33780xac,0x66,0x00,0x00,0x8e,0x02,0x00,0x04,0x8e,0x03,0x01,0xac,0x00,0x45,0x10,0x21,
33790x8c,0x46,0x00,0x04,0x00,0x03,0x18,0x80,0x27,0x82,0x93,0x48,0x00,0x62,0x18,0x21,
33800x0c,0x00,0x31,0xb1,0xac,0x66,0x00,0x00,0x8e,0x03,0x01,0xac,0x8e,0x07,0x00,0x04,
33810x3c,0x06,0xb0,0x03,0x24,0x65,0x00,0x01,0x28,0xa4,0x00,0x00,0x24,0x62,0x00,0x40,
33820x00,0xa4,0x10,0x0a,0x00,0x02,0x11,0x83,0x00,0x02,0x11,0x80,0x00,0x03,0x18,0x80,
33830x00,0xa2,0x28,0x23,0x00,0x70,0x18,0x21,0xae,0x05,0x01,0xac,0xac,0x67,0x00,0xa8,
33840x34,0xc6,0x00,0x30,0x8c,0xc3,0x00,0x00,0x93,0x82,0x88,0x6c,0x02,0x00,0x20,0x21,
33850x24,0x63,0x00,0x01,0x24,0x42,0x00,0x01,0xac,0xc3,0x00,0x00,0xa3,0x82,0x88,0x6c,
33860x0c,0x00,0x33,0x31,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x14,0x8f,0xb0,0x00,0x10,
33870x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x0c,0x00,0x33,0xda,0x00,0x00,0x00,0x00,
33880x08,0x00,0x34,0x10,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,
33890x27,0xbd,0xff,0xe8,0x34,0x42,0x00,0x20,0x24,0x63,0xd1,0x28,0xaf,0xb0,0x00,0x10,
33900xaf,0xbf,0x00,0x14,0xac,0x43,0x00,0x00,0x8c,0x82,0x00,0x54,0x00,0x00,0x00,0x00,
33910x10,0x40,0x00,0x37,0x00,0x80,0x80,0x21,0x8e,0x04,0x00,0x04,0x8e,0x03,0x00,0x44,
33920x3c,0x02,0x80,0x00,0x3c,0x05,0xb0,0x01,0x34,0x42,0x00,0x10,0x00,0x85,0x20,0x21,
33930x00,0x62,0x18,0x25,0xac,0x83,0x00,0x04,0x8e,0x02,0x00,0x04,0x8e,0x03,0x01,0xac,
33940x02,0x00,0x20,0x21,0x00,0x45,0x10,0x21,0x8c,0x46,0x00,0x00,0x00,0x03,0x18,0x80,
33950x27,0x82,0x92,0x48,0x00,0x62,0x18,0x21,0xac,0x66,0x00,0x00,0x8e,0x02,0x00,0x04,
33960x8e,0x03,0x01,0xac,0x00,0x45,0x10,0x21,0x8c,0x46,0x00,0x04,0x00,0x03,0x18,0x80,
33970x27,0x82,0x93,0x48,0x00,0x62,0x18,0x21,0x0c,0x00,0x31,0xb1,0xac,0x66,0x00,0x00,
33980x8e,0x03,0x01,0xac,0x8e,0x07,0x00,0x04,0x3c,0x06,0xb0,0x03,0x24,0x65,0x00,0x01,
33990x28,0xa4,0x00,0x00,0x24,0x62,0x00,0x40,0x00,0xa4,0x10,0x0a,0x00,0x02,0x11,0x83,
34000x00,0x02,0x11,0x80,0x00,0x03,0x18,0x80,0x00,0xa2,0x28,0x23,0x00,0x70,0x18,0x21,
34010xae,0x05,0x01,0xac,0xac,0x67,0x00,0xa8,0x34,0xc6,0x00,0x30,0x8c,0xc3,0x00,0x00,
34020x93,0x82,0x88,0x6c,0x02,0x00,0x20,0x21,0x24,0x63,0x00,0x01,0x24,0x42,0x00,0x01,
34030xac,0xc3,0x00,0x00,0xa3,0x82,0x88,0x6c,0x0c,0x00,0x33,0x31,0x00,0x00,0x00,0x00,
34040x8f,0xbf,0x00,0x14,0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,
34050x0c,0x00,0x33,0xda,0x00,0x00,0x00,0x00,0x08,0x00,0x34,0x56,0x00,0x00,0x00,0x00,
34060x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,0x34,0x42,0x00,0x20,0x24,0x63,0xd2,0x40,
34070x27,0xbd,0xff,0xe0,0xac,0x43,0x00,0x00,0x3c,0x02,0x80,0x01,0xaf,0xb2,0x00,0x18,
34080xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x1c,0x00,0x80,0x80,0x21,
34090x24,0x52,0xcc,0xac,0x00,0x00,0x88,0x21,0x3c,0x03,0xb0,0x09,0x34,0x63,0x00,0x06,
34100x8e,0x06,0x00,0x04,0x90,0x62,0x00,0x00,0x00,0x06,0x22,0x02,0x00,0x44,0x10,0x23,
34110x24,0x44,0x00,0x40,0x28,0x83,0x00,0x00,0x24,0x42,0x00,0x7f,0x00,0x83,0x10,0x0a,
34120x00,0x02,0x11,0x83,0x00,0x02,0x11,0x80,0x24,0x84,0xff,0xff,0x10,0x44,0x00,0x68,
34130x00,0x00,0x28,0x21,0x3c,0x02,0xb0,0x01,0x00,0xc2,0x10,0x21,0x8c,0x44,0x00,0x04,
34140x3c,0x03,0x7c,0x00,0x34,0x63,0x00,0xf0,0x00,0x83,0x18,0x24,0xae,0x04,0x00,0x44,
34150x8c,0x44,0x00,0x00,0x10,0x60,0x00,0x69,0x00,0x00,0x38,0x21,0x3c,0x09,0xb0,0x03,
34160x3c,0x06,0x7c,0x00,0x35,0x29,0x00,0x99,0x3c,0x0a,0xb0,0x01,0x24,0x08,0x00,0x40,
34170x34,0xc6,0x00,0xf0,0x3c,0x0b,0xff,0xff,0x3c,0x0c,0x28,0x38,0x16,0x20,0x00,0x06,
34180x24,0xa5,0x00,0x01,0x93,0x82,0x88,0xa0,0x24,0x11,0x00,0x01,0x24,0x42,0x00,0x01,
34190xa1,0x22,0x00,0x00,0xa3,0x82,0x88,0xa0,0x8e,0x02,0x00,0x04,0x24,0x07,0x00,0x01,
34200x24,0x42,0x01,0x00,0x30,0x42,0x3f,0xff,0xae,0x02,0x00,0x04,0x00,0x4a,0x10,0x21,
34210x8c,0x43,0x00,0x04,0x00,0x00,0x00,0x00,0xae,0x03,0x00,0x44,0x8c,0x44,0x00,0x00,
34220x10,0xa8,0x00,0x2d,0x00,0x66,0x18,0x24,0x14,0x60,0xff,0xec,0x00,0x8b,0x10,0x24,
34230x14,0x4c,0xff,0xea,0x24,0x02,0x00,0x01,0x10,0xe2,0x00,0x2f,0x3c,0x03,0xb0,0x09,
34240x8e,0x02,0x00,0x44,0x8e,0x04,0x00,0x60,0x00,0x02,0x1e,0x42,0x00,0x02,0x12,0x02,
34250x30,0x42,0x00,0x0f,0x30,0x63,0x00,0x01,0xae,0x02,0x00,0x00,0x10,0x44,0x00,0x1a,
34260xae,0x03,0x00,0x58,0x8e,0x02,0x00,0x64,0x8e,0x04,0x00,0x58,0x00,0x00,0x00,0x00,
34270x10,0x82,0x00,0x05,0x00,0x00,0x00,0x00,0xae,0x00,0x00,0x4c,0xae,0x00,0x00,0x50,
34280xae,0x00,0x00,0x54,0xae,0x00,0x00,0x0c,0x8e,0x03,0x00,0x00,0x00,0x00,0x00,0x00,
34290x00,0x03,0x10,0x80,0x00,0x50,0x10,0x21,0x8c,0x42,0x00,0x68,0x00,0x00,0x00,0x00,
34300x10,0x52,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x40,0xf8,0x09,0x02,0x00,0x20,0x21,
34310x8e,0x04,0x00,0x58,0x8e,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0xae,0x03,0x00,0x60,
34320x08,0x00,0x34,0x9e,0xae,0x04,0x00,0x64,0x8e,0x02,0x00,0x64,0x00,0x00,0x00,0x00,
34330x14,0x62,0xff,0xe5,0x00,0x00,0x00,0x00,0x7a,0x02,0x0d,0x7c,0x8f,0xbf,0x00,0x1c,
34340x8f,0xb2,0x00,0x18,0x7b,0xb0,0x00,0xbc,0x00,0x43,0x10,0x26,0x00,0x02,0x10,0x2b,
34350x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x34,0x63,0x00,0x06,0x8e,0x04,0x00,0x04,
34360x90,0x62,0x00,0x00,0x00,0x04,0x22,0x02,0x00,0x44,0x10,0x23,0x24,0x44,0x00,0x40,
34370x28,0x83,0x00,0x00,0x24,0x42,0x00,0x7f,0x00,0x83,0x10,0x0a,0x00,0x02,0x11,0x83,
34380x00,0x02,0x11,0x80,0x00,0x82,0x20,0x23,0x14,0x87,0xff,0xc5,0x00,0x00,0x00,0x00,
34390x8e,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x2c,0x62,0x00,0x03,0x14,0x40,0x00,0x05,
34400x24,0x02,0x00,0x0d,0x10,0x62,0x00,0x03,0x24,0x02,0x00,0x01,0x08,0x00,0x34,0xfe,
34410xa2,0x02,0x00,0x5c,0x08,0x00,0x34,0xfe,0xa2,0x00,0x00,0x5c,0x3c,0x02,0xff,0xff,
34420x00,0x82,0x10,0x24,0x3c,0x03,0x28,0x38,0x14,0x43,0xff,0x94,0x24,0x02,0x00,0x01,
34430x08,0x00,0x34,0xd6,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,
34440x34,0x42,0x00,0x20,0x24,0x63,0xd4,0x98,0xac,0x43,0x00,0x00,0x8c,0x83,0x01,0xa8,
34450x8c,0x82,0x01,0xac,0x00,0x80,0x40,0x21,0x10,0x62,0x00,0x20,0x00,0x00,0x20,0x21,
34460x93,0x82,0x88,0x6d,0x00,0x03,0x28,0x80,0x3c,0x07,0xb0,0x06,0x00,0xa8,0x18,0x21,
34470x24,0x04,0x00,0x01,0x8c,0x66,0x00,0xa8,0x10,0x44,0x00,0x1c,0x34,0xe7,0x80,0x18,
34480x3c,0x05,0xb0,0x01,0xaf,0x86,0xc5,0x60,0x00,0xc5,0x28,0x21,0x8c,0xa3,0x00,0x00,
34490x00,0x06,0x20,0xc2,0x3c,0x02,0x00,0x80,0x00,0x04,0x22,0x00,0x00,0x82,0x20,0x25,
34500xaf,0x83,0xc5,0x68,0x8c,0xa2,0x00,0x04,0xac,0xe4,0x00,0x00,0x8d,0x03,0x01,0xa8,
34510xaf,0x82,0xc5,0x64,0x24,0x64,0x00,0x01,0x04,0x80,0x00,0x0a,0x00,0x80,0x10,0x21,
34520x00,0x02,0x11,0x83,0x8d,0x03,0x01,0xac,0x00,0x02,0x11,0x80,0x00,0x82,0x10,0x23,
34530x00,0x43,0x18,0x26,0xad,0x02,0x01,0xa8,0x00,0x03,0x20,0x2b,0x03,0xe0,0x00,0x08,
34540x00,0x80,0x10,0x21,0x08,0x00,0x35,0x48,0x24,0x62,0x00,0x40,0x27,0x82,0x92,0x48,
34550x00,0x06,0x20,0xc2,0x00,0x04,0x22,0x00,0x00,0xa2,0x48,0x21,0x3c,0x02,0x00,0x80,
34560x00,0x82,0x58,0x25,0x93,0x82,0x88,0x6c,0x3c,0x0a,0xb0,0x06,0x3c,0x03,0xb0,0x01,
34570x2c,0x42,0x00,0x02,0x00,0xc3,0x38,0x21,0x35,0x4a,0x80,0x18,0x14,0x40,0xff,0xef,
34580x00,0x00,0x20,0x21,0x8c,0xe5,0x00,0x00,0x8d,0x23,0x00,0x00,0x24,0x02,0xc0,0x00,
34590x00,0xa2,0x10,0x24,0x00,0x43,0x10,0x25,0xac,0xe2,0x00,0x00,0x8d,0x04,0x01,0xa8,
34600x27,0x83,0x93,0x48,0x8c,0xe5,0x00,0x04,0x00,0x04,0x20,0x80,0x00,0x83,0x20,0x21,
34610x8c,0x82,0x00,0x00,0x3c,0x03,0x80,0x00,0x00,0xa2,0x10,0x25,0x00,0x43,0x10,0x25,
34620xac,0xe2,0x00,0x04,0xaf,0x86,0xc5,0x60,0x8c,0xe2,0x00,0x00,0x93,0x85,0x88,0x6c,
34630xaf,0x82,0xc5,0x68,0x8c,0xe3,0x00,0x04,0xad,0x4b,0x00,0x00,0x8d,0x02,0x01,0xa8,
34640xaf,0x83,0xc5,0x64,0x24,0xa5,0xff,0xff,0x24,0x44,0x00,0x01,0x28,0x83,0x00,0x00,
34650x24,0x42,0x00,0x40,0x00,0x83,0x10,0x0a,0x00,0x02,0x11,0x83,0x00,0x02,0x11,0x80,
34660x00,0x82,0x20,0x23,0xad,0x04,0x01,0xa8,0xa3,0x85,0x88,0x6c,0x79,0x02,0x0d,0x7c,
34670x00,0x00,0x00,0x00,0x00,0x43,0x10,0x26,0x08,0x00,0x35,0x4f,0x00,0x02,0x20,0x2b,
34680x90,0x87,0x00,0x00,0x3c,0x02,0x80,0x01,0x27,0xbd,0xff,0xe8,0x24,0x48,0x02,0x1c,
34690xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,0x01,0x07,0x18,0x21,0x90,0x62,0x00,0x00,
34700x00,0x00,0x00,0x00,0x30,0x42,0x00,0x20,0x10,0x40,0x00,0x0a,0x00,0x00,0x80,0x21,
34710x24,0x84,0x00,0x01,0x90,0x87,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x07,0x18,0x21,
34720x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x20,0x14,0x40,0xff,0xf8,
34730x00,0x00,0x00,0x00,0x00,0x07,0x16,0x00,0x00,0x02,0x16,0x03,0x24,0x03,0x00,0x2d,
34740x10,0x43,0x00,0x0f,0x00,0x00,0x00,0x00,0x0c,0x00,0x35,0xb3,0x00,0x00,0x00,0x00,
34750x00,0x40,0x18,0x21,0x00,0x02,0x10,0x23,0x04,0x61,0x00,0x05,0x00,0x70,0x10,0x0a,
34760x16,0x00,0x00,0x03,0x3c,0x02,0x80,0x00,0x3c,0x02,0x7f,0xff,0x34,0x42,0xff,0xff,
34770x8f,0xbf,0x00,0x14,0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,
34780x24,0x10,0xff,0xff,0x08,0x00,0x35,0xa2,0x24,0x84,0x00,0x01,0x00,0x80,0x38,0x21,
34790x90,0x84,0x00,0x00,0x3c,0x02,0x80,0x01,0x24,0x48,0x02,0x1c,0x01,0x04,0x18,0x21,
34800x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x20,0x10,0x40,0x00,0x0a,
34810x00,0x00,0x50,0x21,0x24,0xe7,0x00,0x01,0x90,0xe4,0x00,0x00,0x00,0x00,0x00,0x00,
34820x01,0x04,0x18,0x21,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x20,
34830x14,0x40,0xff,0xf8,0x00,0x00,0x00,0x00,0x00,0x04,0x16,0x00,0x00,0x02,0x16,0x03,
34840x38,0x42,0x00,0x2b,0x24,0xe3,0x00,0x01,0x24,0x04,0x00,0x10,0x10,0xc4,0x00,0x38,
34850x00,0x62,0x38,0x0a,0x90,0xe4,0x00,0x00,0x14,0xc0,0x00,0x07,0x00,0x80,0x18,0x21,
34860x00,0x04,0x16,0x00,0x00,0x02,0x16,0x03,0x24,0x03,0x00,0x30,0x10,0x43,0x00,0x25,
34870x24,0x06,0x00,0x0a,0x00,0x80,0x18,0x21,0x00,0x03,0x16,0x00,0x10,0x40,0x00,0x1a,
34880x30,0x64,0x00,0xff,0x24,0x82,0xff,0xa9,0x2c,0x83,0x00,0x61,0x30,0x48,0x00,0xff,
34890x10,0x60,0x00,0x09,0x2c,0x89,0x00,0x41,0x24,0x82,0xff,0xc9,0x30,0x48,0x00,0xff,
34900x11,0x20,0x00,0x05,0x2c,0x83,0x00,0x3a,0x24,0x82,0xff,0xd0,0x14,0x60,0x00,0x02,
34910x30,0x48,0x00,0xff,0x24,0x08,0x00,0xff,0x01,0x06,0x10,0x2a,0x10,0x40,0x00,0x0a,
34920x01,0x46,0x00,0x18,0x24,0xe7,0x00,0x01,0x00,0x00,0x18,0x12,0x00,0x6a,0x10,0x2b,
34930x14,0x40,0x00,0x0a,0x00,0x68,0x50,0x21,0x80,0xe2,0x00,0x00,0x90,0xe3,0x00,0x00,
34940x14,0x40,0xff,0xe8,0x30,0x64,0x00,0xff,0x10,0xa0,0x00,0x02,0x00,0x00,0x00,0x00,
34950xac,0xa7,0x00,0x00,0x03,0xe0,0x00,0x08,0x01,0x40,0x10,0x21,0x03,0xe0,0x00,0x08,
34960x24,0x02,0xff,0xff,0x24,0x06,0x00,0x08,0x80,0xe3,0x00,0x01,0x24,0x02,0x00,0x78,
34970x10,0x62,0x00,0x03,0x24,0x02,0x00,0x58,0x14,0x62,0xff,0xd7,0x00,0x80,0x18,0x21,
34980x24,0xe7,0x00,0x02,0x90,0xe4,0x00,0x00,0x08,0x00,0x35,0xd5,0x24,0x06,0x00,0x10,
34990x80,0xe3,0x00,0x00,0x24,0x02,0x00,0x30,0x90,0xe4,0x00,0x00,0x10,0x62,0xff,0xf2,
35000x00,0x00,0x00,0x00,0x08,0x00,0x35,0xce,0x00,0x00,0x00,0x00,0x3c,0x04,0xb0,0x03,
35010x3c,0x06,0xb0,0x07,0x3c,0x02,0x80,0x01,0x34,0xc6,0x00,0x18,0x34,0x84,0x00,0x20,
35020x24,0x42,0xd8,0x2c,0x24,0x03,0xff,0x83,0xac,0x82,0x00,0x00,0xa0,0xc3,0x00,0x00,
35030x90,0xc4,0x00,0x00,0x27,0xbd,0xff,0xf8,0x3c,0x03,0xb0,0x07,0x24,0x02,0xff,0x82,
35040xa3,0xa4,0x00,0x00,0xa0,0x62,0x00,0x00,0x90,0x64,0x00,0x00,0x3c,0x02,0xb0,0x07,
35050x34,0x42,0x00,0x08,0xa3,0xa4,0x00,0x01,0xa0,0x40,0x00,0x00,0x90,0x43,0x00,0x00,
35060x24,0x02,0x00,0x03,0x3c,0x05,0xb0,0x07,0xa3,0xa3,0x00,0x00,0xa0,0xc2,0x00,0x00,
35070x90,0xc4,0x00,0x00,0x34,0xa5,0x00,0x10,0x24,0x02,0x00,0x06,0x3c,0x03,0xb0,0x07,
35080xa3,0xa4,0x00,0x00,0x34,0x63,0x00,0x38,0xa0,0xa2,0x00,0x00,0x90,0x64,0x00,0x00,
35090x3c,0x02,0xb0,0x07,0x34,0x42,0x00,0x20,0xa3,0xa4,0x00,0x00,0xa0,0xa0,0x00,0x00,
35100x90,0xa3,0x00,0x00,0xaf,0x82,0xc8,0x70,0xa3,0xa3,0x00,0x00,0xa0,0x40,0x00,0x00,
35110x90,0x43,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x08,};
3512
3513u8 Rtl8190PciFwDataArray[DataArrayLengthPci] = {
35140x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35150x00,0x00,0x00,0x00,0x0a,0x0d,0x5b,0x43,0x4d,0x50,0x4b,0x5d,0x00,0x00,0x00,0x00,
35160x80,0x01,0x00,0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35170x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35180x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35190x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35200x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35210x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35220x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35230x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35240x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35250x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35260x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35270x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35280x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35290x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35300x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35310x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35320x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35330x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35340x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35350x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35360x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35370x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35380x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35390x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35400x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35410x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35420x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35430x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35440x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35450x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35460x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35470x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x08,0x08,0x08,
35480x08,0x08,0x08,0x08,0x08,0x28,0x28,0x28,0x28,0x28,0x08,0x08,0x08,0x08,0x08,0x08,
35490x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0xa0,0x10,0x10,0x10,
35500x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x04,0x04,0x04,0x04,
35510x04,0x04,0x04,0x04,0x04,0x04,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x41,0x41,0x41,
35520x41,0x41,0x41,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,
35530x01,0x01,0x01,0x01,0x01,0x01,0x01,0x10,0x10,0x10,0x10,0x10,0x10,0x42,0x42,0x42,
35540x42,0x42,0x42,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,
35550x02,0x02,0x02,0x02,0x02,0x02,0x02,0x10,0x10,0x10,0x10,0x08,0x00,0x00,0x00,0x00,
35560x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35570x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xa0,0x10,0x10,0x10,
35580x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
35590x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x01,0x01,0x01,0x01,
35600x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,
35610x01,0x01,0x01,0x10,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x02,0x02,0x02,0x02,0x02,
35620x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,
35630x02,0x02,0x02,0x10,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x20,0x09,0x0d,0x0a,
35640x00,0x00,0x00,0x00,0x80,0x01,0x03,0x1c,0x00,0x00,0x00,0x00,0x43,0x6e,0x73,0x64,
35650x31,0x00,0x00,0x00,0x68,0x65,0x6c,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35660x72,0x34,0x00,0x00,0x77,0x34,0x00,0x00,0x64,0x62,0x67,0x00,0x72,0x61,0x63,0x74,
35670x72,0x6c,0x00,0x00,0x73,0x79,0x73,0x64,0x00,0x00,0x00,0x00,0x73,0x79,0x73,0x63,
35680x74,0x72,0x6c,0x00,0x74,0x78,0x74,0x62,0x6c,0x00,0x00,0x00,0x70,0x72,0x61,0x6e,
35690x67,0x65,0x00,0x00,0x64,0x6d,0x00,0x00,0x75,0x6e,0x6b,0x6e,0x6f,0x77,0x00,0x00,
35700x80,0x01,0x03,0x34,0x80,0x01,0x03,0x3c,0x80,0x01,0x03,0x3c,0x00,0x00,0x00,0x01,
35710x00,0x00,0x00,0x00,0x80,0x00,0x24,0x5c,0x80,0x01,0x03,0x40,0x80,0x01,0x03,0x3c,
35720x80,0x01,0x03,0x3c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x80,0x00,0x25,0xbc,
35730x80,0x01,0x03,0x44,0x80,0x01,0x03,0x3c,0x80,0x01,0x03,0x3c,0x00,0x00,0x00,0x01,
35740x00,0x00,0x00,0x00,0x80,0x00,0x27,0x38,0x80,0x01,0x03,0x48,0x80,0x01,0x03,0x3c,
35750x80,0x01,0x03,0x3c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x80,0x00,0x29,0x04,
35760x80,0x01,0x03,0x4c,0x80,0x01,0x03,0x3c,0x80,0x01,0x03,0x3c,0x00,0x00,0x00,0x01,
35770x00,0x00,0x00,0x00,0x80,0x00,0x29,0xdc,0x80,0x01,0x03,0x54,0x80,0x01,0x03,0x3c,
35780x80,0x01,0x03,0x3c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x80,0x00,0x29,0xe4,
35790x80,0x01,0x03,0x5c,0x80,0x01,0x03,0x3c,0x80,0x01,0x03,0x3c,0x00,0x00,0x00,0x01,
35800x00,0x00,0x00,0x00,0x80,0x00,0x29,0xec,0x80,0x01,0x03,0x64,0x80,0x01,0x03,0x3c,
35810x80,0x01,0x03,0x3c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x80,0x00,0x29,0xf4,
35820x80,0x01,0x03,0x6c,0x80,0x01,0x03,0x3c,0x80,0x01,0x03,0x3c,0x00,0x00,0x00,0x01,
35830x00,0x00,0x00,0x00,0x80,0x00,0x2b,0x80,0x80,0x01,0x03,0x74,0x80,0x01,0x03,0x3c,
35840x80,0x01,0x03,0x3c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x80,0x00,0x2b,0xf4,
35850x80,0x01,0x03,0x78,0x80,0x01,0x03,0x3c,0x80,0x01,0x03,0x3c,0x00,0x00,0x00,0x0f,
35860x00,0x00,0x00,0x01,0x80,0x00,0x2c,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
35870x0a,0x0d,0x52,0x54,0x4c,0x38,0x31,0x39,0x58,0x2d,0x25,0x64,0x3e,0x00,0x00,0x00,
35880x00,0x00,0x00,0x00,0x52,0x54,0x4c,0x38,0x31,0x39,0x58,0x2d,0x25,0x64,0x3e,0x0a,
35890x0d,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x2a,0x00,0x00,0x00,0x0a,0x0d,0x45,0x72,
35900x72,0x20,0x44,0x49,0x52,0x00,0x00,0x00,0x0a,0x0d,0x44,0x42,0x47,0x20,0x43,0x4d,
35910x44,0x73,0x3a,0x00,0x0a,0x0d,0x5b,0x00,0x5d,0x2d,0x00,0x00,0x0a,0x0d,0x3c,0x31,
35920x2e,0x43,0x4d,0x4e,0x3e,0x20,0x3c,0x32,0x2e,0x3f,0x3e,0x00,0x0a,0x0d,0x20,0x79,
35930x65,0x61,0x72,0x2d,0x64,0x61,0x79,0x2d,0x68,0x6f,0x75,0x72,0x2d,0x6d,0x69,0x6e,
35940x2d,0x73,0x65,0x63,0x2d,0x31,0x30,0x6d,0x73,0x3d,0x00,0x00,0x25,0x64,0x2d,0x00,
35950x0a,0x0d,0x09,0x20,0x20,0x20,0x20,0x20,0x30,0x30,0x20,0x20,0x20,0x20,0x20,0x20,
35960x20,0x30,0x34,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x30,0x38,0x20,0x20,0x20,0x20,
35970x20,0x20,0x20,0x30,0x43,0x00,0x00,0x00,0x0a,0x0d,0x09,0x20,0x20,0x20,0x20,0x20,
35980x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,
35990x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,0x3d,
36000x3d,0x3d,0x3d,0x00,0x0d,0x0a,0x20,0x30,0x78,0x25,0x30,0x38,0x58,0x20,0x20,0x00,
36010x09,0x00,0x00,0x00,0x25,0x30,0x38,0x58,0x20,0x00,0x00,0x00,0x0a,0x0d,0x44,0x62,
36020x67,0x5f,0x46,0x6c,0x61,0x67,0x25,0x64,0x3d,0x30,0x78,0x25,0x30,0x38,0x78,0x00,
36030x0a,0x0d,0x54,0x58,0x4c,0x4c,0x54,0x09,0x09,0x4e,0x45,0x58,0x54,0x20,0x20,0x20,
36040x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x4e,0x45,0x58,0x54,0x0a,0x0d,0x00,
36050x0a,0x0d,0x20,0x50,0x61,0x67,0x65,0x25,0x33,0x64,0x09,0x00,0x25,0x34,0x64,0x20,
36060x20,0x20,0x20,0x00,0x25,0x34,0x64,0x20,0x20,0x20,0x20,0x09,0x00,0x00,0x00,0x00,
36070x0a,0x0d,0x54,0x58,0x4f,0x51,0x54,0x09,0x09,0x48,0x65,0x61,0x64,0x20,0x20,0x20,
36080x20,0x54,0x61,0x69,0x6c,0x20,0x20,0x20,0x20,0x48,0x65,0x61,0x64,0x20,0x20,0x20,
36090x20,0x54,0x61,0x69,0x6c,0x0a,0x0d,0x00,0x0a,0x0d,0x55,0x6e,0x6b,0x6e,0x6f,0x77,
36100x20,0x63,0x6f,0x6d,0x6d,0x61,0x6e,0x64,0x00,0x00,0x00,0x00,0x0a,0x0d,0x45,0x72,
36110x72,0x20,0x41,0x72,0x67,0x0a,0x0d,0x55,0x53,0x41,0x47,0x45,0x3a,0x00,0x00,0x00,
36120x10,0x00,0x08,0x00,0x02,0xe9,0x01,0x74,0x02,0xab,0x01,0xc7,0x01,0x55,0x00,0xe4,
36130x00,0xab,0x00,0x72,0x00,0x55,0x00,0x4c,0x00,0x4c,0x00,0x4c,0x00,0x4c,0x00,0x4c,
36140x02,0x76,0x01,0x3b,0x00,0xd2,0x00,0x9e,0x00,0x69,0x00,0x4f,0x00,0x46,0x00,0x3f,
36150x01,0x3b,0x00,0x9e,0x00,0x69,0x00,0x4f,0x00,0x35,0x00,0x27,0x00,0x23,0x00,0x20,
36160x01,0x2f,0x00,0x98,0x00,0x65,0x00,0x4c,0x00,0x33,0x00,0x26,0x00,0x22,0x00,0x1e,
36170x00,0x98,0x00,0x4c,0x00,0x33,0x00,0x26,0x00,0x19,0x00,0x13,0x00,0x11,0x00,0x0f,
36180x02,0x39,0x01,0x1c,0x00,0xbd,0x00,0x8e,0x00,0x5f,0x00,0x47,0x00,0x3f,0x00,0x39,
36190x01,0x1c,0x00,0x8e,0x00,0x5f,0x00,0x47,0x00,0x2f,0x00,0x23,0x00,0x20,0x00,0x1c,
36200x01,0x11,0x00,0x89,0x00,0x5b,0x00,0x44,0x00,0x2e,0x00,0x22,0x00,0x1e,0x00,0x1b,
36210x00,0x89,0x00,0x44,0x00,0x2e,0x00,0x22,0x00,0x17,0x00,0x11,0x00,0x0f,0x00,0x0e,
36220x02,0xab,0x02,0xab,0x02,0x66,0x02,0x66,0x07,0x06,0x06,0x06,0x05,0x06,0x07,0x08,
36230x04,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0b,0x49,0x6e,0x74,0x00,0x00,0x00,0x00,0x00,
36240x00,0x00,0x54,0x4c,0x42,0x4d,0x4f,0x44,0x00,0x00,0x00,0x00,0x54,0x4c,0x42,0x4c,
36250x5f,0x64,0x61,0x74,0x61,0x00,0x54,0x4c,0x42,0x53,0x00,0x00,0x00,0x00,0x00,0x00,
36260x41,0x64,0x45,0x4c,0x5f,0x64,0x61,0x74,0x61,0x00,0x41,0x64,0x45,0x53,0x00,0x00,
36270x00,0x00,0x00,0x00,0x45,0x78,0x63,0x43,0x6f,0x64,0x65,0x36,0x00,0x00,0x45,0x78,
36280x63,0x43,0x6f,0x64,0x65,0x37,0x00,0x00,0x53,0x79,0x73,0x00,0x00,0x00,0x00,0x00,
36290x00,0x00,0x42,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x52,0x49,0x00,0x00,
36300x00,0x00,0x00,0x00,0x00,0x00,0x43,0x70,0x55,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
36310x4f,0x76,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
36320x80,0x01,0x14,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x00,0x00,0x00,0x10,
36330x00,0x00,0x00,0x2c,0x00,0x00,0x00,0x58,0x00,0x00,0x00,0x30,0x00,0x00,0x00,0x48,
36340x00,0x00,0x00,0x60,0x00,0x00,0x00,0x90,0x00,0x00,0x00,0xc0,0x00,0x00,0x01,0x20,
36350x00,0x00,0x01,0x80,0x00,0x00,0x01,0xb0,0x00,0x00,0x00,0x34,0x00,0x00,0x00,0x68,
36360x00,0x00,0x00,0x9c,0x00,0x00,0x00,0xd0,0x00,0x00,0x01,0x38,0x00,0x00,0x01,0xa0,
36370x00,0x00,0x01,0xd4,0x00,0x00,0x02,0x08,0x00,0x00,0x00,0x68,0x00,0x00,0x00,0xd0,
36380x00,0x00,0x01,0x38,0x00,0x00,0x01,0xa0,0x00,0x00,0x02,0x6f,0x00,0x00,0x03,0x40,
36390x00,0x00,0x03,0xa8,0x00,0x00,0x04,0x10,0x01,0x01,0x01,0x02,0x01,0x01,0x02,0x02,
36400x03,0x03,0x04,0x04,0x01,0x01,0x02,0x02,0x03,0x03,0x04,0x04,0x02,0x03,0x03,0x04,
36410x05,0x06,0x07,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
36420x00,0x00,0x00,0x00,0x3c,0x4e,0x55,0x4c,0x4c,0x3e,0x00,0x00,0x30,0x31,0x32,0x33,
36430x34,0x35,0x36,0x37,0x38,0x39,0x61,0x62,0x63,0x64,0x65,0x66,0x67,0x68,0x69,0x6a,
36440x6b,0x6c,0x6d,0x6e,0x6f,0x70,0x71,0x72,0x73,0x74,0x75,0x76,0x77,0x78,0x79,0x7a,
36450x00,0x00,0x00,0x00,0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37,0x38,0x39,0x41,0x42,
36460x43,0x44,0x45,0x46,0x47,0x48,0x49,0x4a,0x4b,0x4c,0x4d,0x4e,0x4f,0x50,0x51,0x52,
36470x53,0x54,0x55,0x56,0x57,0x58,0x59,0x5a,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
36480x00,0x00,0x00,0x00,0x5b,0x52,0x58,0x5d,0x20,0x70,0x6b,0x74,0x5f,0x6c,0x65,0x6e,
36490x3d,0x25,0x64,0x20,0x6f,0x66,0x66,0x73,0x65,0x74,0x3d,0x25,0x64,0x20,0x73,0x74,
36500x61,0x72,0x74,0x5f,0x61,0x64,0x64,0x72,0x3d,0x25,0x30,0x38,0x78,0x0a,0x0d,0x00,
36510x00,0x00,0x00,0x00,0x80,0x00,0x07,0x6c,0x80,0x00,0x07,0x80,0x80,0x00,0x07,0x80,
36520x80,0x00,0x07,0x70,0x80,0x00,0x07,0x70,0x80,0x00,0x07,0x94,0x80,0x00,0x76,0x50,
36530x80,0x00,0x76,0xa4,0x80,0x00,0x76,0xc0,0x80,0x00,0x77,0xac,0x80,0x00,0x78,0x64,
36540x80,0x00,0x79,0x10,0x80,0x00,0x79,0x7c,0x80,0x00,0x7a,0x88,0x80,0x00,0x7a,0xbc,
36550x80,0x00,0x7a,0xd0,0x80,0x00,0x7a,0xe4,0x80,0x00,0x7b,0x90,0x80,0x00,0x7b,0xcc,
36560x80,0x00,0x7c,0x7c,0x80,0x00,0x7c,0xa4,0x80,0x00,0x76,0x0c,0x80,0x00,0x7c,0xe8,
36570x80,0x00,0x83,0x74,0x80,0x00,0x83,0xec,0x80,0x00,0x83,0xf8,0x80,0x00,0x84,0x04,
36580x80,0x00,0x83,0x8c,0x80,0x00,0x83,0x8c,0x80,0x00,0x83,0x8c,0x80,0x00,0x83,0x8c,
36590x80,0x00,0x83,0x8c,0x80,0x00,0x83,0x8c,0x80,0x00,0x83,0x8c,0x80,0x00,0x83,0x8c,
36600x80,0x00,0x83,0x8c,0x80,0x00,0x83,0x8c,0x80,0x00,0x83,0x8c,0x80,0x00,0x83,0x8c,
36610x80,0x00,0x84,0x10,0x80,0x00,0x84,0x1c,0x80,0x00,0x84,0x28,0x80,0x00,0xa6,0xb4,
36620x80,0x00,0xa6,0xb4,0x80,0x00,0xa6,0xb4,0x80,0x00,0xa6,0xe8,0x80,0x00,0xa7,0x28,
36630x80,0x00,0xa7,0x60,0x80,0x00,0xa7,0x90,0x80,0x00,0xa7,0xc0,0x80,0x00,0xa7,0xd4,
36640x80,0x00,0xa8,0x3c,0x80,0x00,0xa8,0x50,0x80,0x00,0xa8,0x8c,0x80,0x00,0xa8,0x94,
36650x80,0x00,0xa8,0xd0,0x80,0x00,0xa8,0xe4,0x80,0x00,0xa8,0xec,0x80,0x00,0xa8,0xf4,
36660x80,0x00,0xa8,0xf4,0x80,0x00,0xa8,0xf4,0x80,0x00,0xa8,0xf4,0x80,0x00,0xa9,0x24,
36670x80,0x00,0xa9,0x38,0x80,0x00,0xa9,0x4c,0x80,0x00,0xa5,0xf8,0x80,0x00,0xac,0x78,
36680x80,0x00,0xac,0x78,0x80,0x00,0xac,0x78,0x80,0x00,0xac,0xac,0x80,0x00,0xac,0xec,
36690x80,0x00,0xad,0x24,0x80,0x00,0xad,0x54,0x80,0x00,0xad,0x84,0x80,0x00,0xad,0x98,
36700x80,0x00,0xae,0x00,0x80,0x00,0xae,0x14,0x80,0x00,0xae,0x50,0x80,0x00,0xae,0x58,
36710x80,0x00,0xae,0x94,0x80,0x00,0xae,0xa8,0x80,0x00,0xae,0xb0,0x80,0x00,0xae,0xb8,
36720x80,0x00,0xae,0xb8,0x80,0x00,0xae,0xb8,0x80,0x00,0xae,0xb8,0x80,0x00,0xae,0xe8,
36730x80,0x00,0xae,0xfc,0x80,0x00,0xaf,0x10,0x80,0x00,0xaa,0x98,0x80,0x00,0xbc,0x64,
36740x80,0x00,0xbc,0x7c,0x80,0x00,0xbc,0x7c,0x80,0x00,0xbc,0x6c,0x80,0x00,0xbc,0x7c,
36750x80,0x00,0xbc,0x7c,0x80,0x00,0xbc,0x7c,0x80,0x00,0xbc,0x7c,0x80,0x00,0xbc,0x7c,
36760x80,0x00,0xbc,0x7c,0x80,0x00,0xbc,0x7c,0x80,0x00,0xbc,0x74,0x80,0x00,0xbc,0x7c,
36770x80,0x00,0xbc,0x5c,0x80,0x00,0xbc,0x7c,0x80,0x00,0xbc,0x7c,0x80,0x00,0xc0,0xa4,
36780x80,0x00,0xbd,0x94,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,
36790x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,
36800x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,
36810x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,
36820x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,
36830x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,
36840x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,
36850x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,
36860x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,
36870x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,
36880x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,
36890x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,
36900x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbd,0xa0,
36910x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,
36920x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,
36930x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbd,0x28,0x80,0x00,0xbe,0x74,
36940x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,
36950x80,0x00,0xbe,0x74,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,
36960x80,0x00,0xbf,0xac,0x80,0x00,0xbe,0x7c,0x80,0x00,0xbe,0x9c,0x80,0x00,0xbe,0xa4,
36970x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbe,0xfc,0x80,0x00,0xbf,0xac,
36980x80,0x00,0xbd,0xa8,0x80,0x00,0xbf,0xac,0x80,0x00,0xbf,0xac,0x80,0x00,0xbd,0xa4,
3699};
3700
3701
3702u32 Rtl8190PciPHY_REGArray[PHY_REGArrayLengthPci] = {
37030x800,0x00050060,
37040x804,0x00000005,
37050x808,0x0000fc00,
37060x80c,0x0000001c,
37070x810,0x801010aa,
37080x814,0x000908c0,
37090x818,0x00000000,
37100x81c,0x00000000,
37110x820,0x00000004,
37120x824,0x00690000,
37130x828,0x00000004,
37140x82c,0x00e90000,
37150x830,0x00000004,
37160x834,0x00690000,
37170x838,0x00000004,
37180x83c,0x00e90000,
37190x840,0x00000000,
37200x844,0x00000000,
37210x848,0x00000000,
37220x84c,0x00000000,
37230x850,0x00000000,
37240x854,0x00000000,
37250x858,0x65a965a9,
37260x85c,0x65a965a9,
37270x860,0x001f0010,
37280x864,0x007f0010,
37290x868,0x001f0010,
37300x86c,0x007f0010,
37310x870,0x0f100f70,
37320x874,0x0f100f70,
37330x878,0x00000000,
37340x87c,0x00000000,
37350x880,0x5c385eb8,
37360x884,0x6357060d,
37370x888,0x0460c341,
37380x88c,0x0000ff00,
37390x890,0x00000000,
37400x894,0xfffffffe,
37410x898,0x4c42382f,
37420x89c,0x00656056,
37430x8b0,0x00000000,
37440x8e0,0x00000000,
37450x8e4,0x00000000,
37460x900,0x00000000,
37470x904,0x00000023,
37480x908,0x00000000,
37490x90c,0x35541545,
37500xa00,0x00d0c7d8,
37510xa04,0xab1f0008,
37520xa08,0x80cd8300,
37530xa0c,0x2e62740f,
37540xa10,0x95009b78,
37550xa14,0x11145008,
37560xa18,0x00881117,
37570xa1c,0x89140fa0,
37580xa20,0x1a1b0000,
37590xa24,0x090e1317,
37600xa28,0x00000204,
37610xa2c,0x00000000,
37620xc00,0x00000040,
37630xc04,0x0000500f,
37640xc08,0x000000e4,
37650xc0c,0x6c6c6c6c,
37660xc10,0x08000000,
37670xc14,0x40000100,
37680xc18,0x08000000,
37690xc1c,0x40000100,
37700xc20,0x08000000,
37710xc24,0x40000100,
37720xc28,0x08000000,
37730xc2c,0x40000100,
37740xc30,0x6de9ac44,
37750xc34,0x164052cd,
37760xc38,0x00070a14,
37770xc3c,0x0a969764,
37780xc40,0x1f7c403f,
37790xc44,0x000100b7,
37800xc48,0xec020000,
37810xc4c,0x00000300,
37820xc50,0x69543420,
37830xc54,0x433c0094,
37840xc58,0x69543420,
37850xc5c,0x433c0094,
37860xc60,0x69543420,
37870xc64,0x433c0094,
37880xc68,0x69543420,
37890xc6c,0x433c0094,
37900xc70,0x2c7f000d,
37910xc74,0x0186175b,
37920xc78,0x0000001f,
37930xc7c,0x00b91612,
37940xc80,0x40000100,
37950xc84,0x00000000,
37960xc88,0x40000100,
37970xc8c,0x08000000,
37980xc90,0x40000100,
37990xc94,0x00000000,
38000xc98,0x40000100,
38010xc9c,0x00000000,
38020xca0,0x00492492,
38030xca4,0x00000000,
38040xca8,0x00000000,
38050xcac,0x00000000,
38060xcb0,0x00000000,
38070xcb4,0x00000000,
38080xcb8,0x00000000,
38090xcbc,0x00492492,
38100xcc0,0x00000000,
38110xcc4,0x00000000,
38120xcc8,0x00000000,
38130xccc,0x00000000,
38140xcd0,0x00000000,
38150xcd4,0x00000000,
38160xcd8,0x64b22427,
38170xcdc,0x00766932,
38180xce0,0x00222222,
38190xd00,0x00000740,
38200xd04,0x0000040f,
38210xd08,0x0000803f,
38220xd0c,0x00000001,
38230xd10,0xa0633333,
38240xd14,0x33333c63,
38250xd18,0x6a8f5b6b,
38260xd1c,0x00000000,
38270xd20,0x00000000,
38280xd24,0x00000000,
38290xd28,0x00000000,
38300xd2c,0xcc979975,
38310xd30,0x00000000,
38320xd34,0x00000000,
38330xd38,0x00000000,
38340xd3c,0x00027293,
38350xd40,0x00000000,
38360xd44,0x00000000,
38370xd48,0x00000000,
38380xd4c,0x00000000,
38390xd50,0x6437140a,
38400xd54,0x024dbd02,
38410xd58,0x00000000,
38420xd5c,0x14032064,
3843};
3844
3845u32 Rtl8190PciPHY_REG_1T2RArray[PHY_REG_1T2RArrayLengthPci] = {
38460x800,0x00050060,
38470x804,0x00000004,
38480x808,0x0000fc00,
38490x80c,0x0000001c,
38500x810,0x801010aa,
38510x814,0x000908c0,
38520x818,0x00000000,
38530x81c,0x00000000,
38540x820,0x00000004,
38550x824,0x00690000,
38560x828,0x00000004,
38570x82c,0x00e90000,
38580x830,0x00000004,
38590x834,0x00690000,
38600x838,0x00000004,
38610x83c,0x00e90000,
38620x840,0x00000000,
38630x844,0x00000000,
38640x848,0x00000000,
38650x84c,0x00000000,
38660x850,0x00000000,
38670x854,0x00000000,
38680x858,0x65a965a9,
38690x85c,0x65a965a9,
38700x860,0x001f0000,
38710x864,0x007f0000,
38720x868,0x001f0010,
38730x86c,0x007f0010,
38740x870,0x0f100f70,
38750x874,0x0f100f70,
38760x878,0x00000000,
38770x87c,0x00000000,
38780x880,0x5c385898,
38790x884,0x6357060d,
38800x888,0x0460c341,
38810x88c,0x0000fc00,
38820x890,0x00000000,
38830x894,0xfffffffe,
38840x898,0x4c42382f,
38850x89c,0x00656056,
38860x8b0,0x00000000,
38870x8e0,0x00000000,
38880x8e4,0x00000000,
38890x900,0x00000000,
38900x904,0x00000023,
38910x908,0x00000000,
38920x90c,0x34441444,
38930xa00,0x00d0c7d8,
38940xa04,0x2b1f0008,
38950xa08,0x80cd8300,
38960xa0c,0x2e62740f,
38970xa10,0x95009b78,
38980xa14,0x11145008,
38990xa18,0x00881117,
39000xa1c,0x89140fa0,
39010xa20,0x1a1b0000,
39020xa24,0x090e1317,
39030xa28,0x00000204,
39040xa2c,0x00000000,
39050xc00,0x00000040,
39060xc04,0x0000500c,
39070xc08,0x000000e4,
39080xc0c,0x6c6c6c6c,
39090xc10,0x08000000,
39100xc14,0x40000100,
39110xc18,0x08000000,
39120xc1c,0x40000100,
39130xc20,0x08000000,
39140xc24,0x40000100,
39150xc28,0x08000000,
39160xc2c,0x40000100,
39170xc30,0x6de9ac44,
39180xc34,0x164052cd,
39190xc38,0x00070a14,
39200xc3c,0x0a969764,
39210xc40,0x1f7c403f,
39220xc44,0x000100b7,
39230xc48,0xec020000,
39240xc4c,0x00000300,
39250xc50,0x69543420,
39260xc54,0x433c0094,
39270xc58,0x69543420,
39280xc5c,0x433c0094,
39290xc60,0x69543420,
39300xc64,0x433c0094,
39310xc68,0x69543420,
39320xc6c,0x433c0094,
39330xc70,0x2c7f000d,
39340xc74,0x0186175b,
39350xc78,0x0000001f,
39360xc7c,0x00b91612,
39370xc80,0x40000100,
39380xc84,0x00000000,
39390xc88,0x40000100,
39400xc8c,0x08000000,
39410xc90,0x40000100,
39420xc94,0x00000000,
39430xc98,0x40000100,
39440xc9c,0x00000000,
39450xca0,0x00492492,
39460xca4,0x00000000,
39470xca8,0x00000000,
39480xcac,0x00000000,
39490xcb0,0x00000000,
39500xcb4,0x00000000,
39510xcb8,0x00000000,
39520xcbc,0x00492492,
39530xcc0,0x00000000,
39540xcc4,0x00000000,
39550xcc8,0x00000000,
39560xccc,0x00000000,
39570xcd0,0x00000000,
39580xcd4,0x00000000,
39590xcd8,0x64b22427,
39600xcdc,0x00766932,
39610xce0,0x00222222,
39620xd00,0x00000740,
39630xd04,0x0000040c,
39640xd08,0x0000803f,
39650xd0c,0x00000001,
39660xd10,0xa0633333,
39670xd14,0x33333c63,
39680xd18,0x6a8f5b6b,
39690xd1c,0x00000000,
39700xd20,0x00000000,
39710xd24,0x00000000,
39720xd28,0x00000000,
39730xd2c,0xcc979975,
39740xd30,0x00000000,
39750xd34,0x00000000,
39760xd38,0x00000000,
39770xd3c,0x00027293,
39780xd40,0x00000000,
39790xd44,0x00000000,
39800xd48,0x00000000,
39810xd4c,0x00000000,
39820xd50,0x6437140a,
39830xd54,0x024dbd02,
39840xd58,0x00000000,
39850xd5c,0x14032064,
3986};
3987
3988u32 Rtl8190PciRadioA_Array[RadioA_ArrayLengthPci] = {
39890x019,0x00000003,
39900x000,0x000000bf,
39910x001,0x00000ee0,
39920x002,0x0000004c,
39930x003,0x000007f1,
39940x004,0x00000975,
39950x005,0x00000c58,
39960x006,0x00000ae6,
39970x007,0x000000ca,
39980x008,0x00000e1c,
39990x009,0x000007f0,
40000x00a,0x000009d0,
40010x00b,0x000001ba,
40020x00c,0x00000240,
40030x00e,0x00000020,
40040x00f,0x00000990,
40050x012,0x00000806,
40060x014,0x000005ab,
40070x015,0x00000f80,
40080x016,0x00000020,
40090x017,0x00000597,
40100x018,0x0000050a,
40110x01a,0x00000f80,
40120x01b,0x00000f5e,
40130x01c,0x00000008,
40140x01d,0x00000607,
40150x01e,0x000006cc,
40160x01f,0x00000000,
40170x020,0x000001a5,
40180x01f,0x00000001,
40190x020,0x00000165,
40200x01f,0x00000002,
40210x020,0x000000c6,
40220x01f,0x00000003,
40230x020,0x00000086,
40240x01f,0x00000004,
40250x020,0x00000046,
40260x01f,0x00000005,
40270x020,0x000001e6,
40280x01f,0x00000006,
40290x020,0x000001a6,
40300x01f,0x00000007,
40310x020,0x00000166,
40320x01f,0x00000008,
40330x020,0x000000c7,
40340x01f,0x00000009,
40350x020,0x00000087,
40360x01f,0x0000000a,
40370x020,0x000000f7,
40380x01f,0x0000000b,
40390x020,0x000000d7,
40400x01f,0x0000000c,
40410x020,0x000000b7,
40420x01f,0x0000000d,
40430x020,0x00000097,
40440x01f,0x0000000e,
40450x020,0x00000077,
40460x01f,0x0000000f,
40470x020,0x00000057,
40480x01f,0x00000010,
40490x020,0x00000037,
40500x01f,0x00000011,
40510x020,0x000000fb,
40520x01f,0x00000012,
40530x020,0x000000db,
40540x01f,0x00000013,
40550x020,0x000000bb,
40560x01f,0x00000014,
40570x020,0x000000ff,
40580x01f,0x00000015,
40590x020,0x000000e3,
40600x01f,0x00000016,
40610x020,0x000000c3,
40620x01f,0x00000017,
40630x020,0x000000a3,
40640x01f,0x00000018,
40650x020,0x00000083,
40660x01f,0x00000019,
40670x020,0x00000063,
40680x01f,0x0000001a,
40690x020,0x00000043,
40700x01f,0x0000001b,
40710x020,0x00000023,
40720x01f,0x0000001c,
40730x020,0x00000003,
40740x01f,0x0000001d,
40750x020,0x000001e3,
40760x01f,0x0000001e,
40770x020,0x000001c3,
40780x01f,0x0000001f,
40790x020,0x000001a3,
40800x01f,0x00000020,
40810x020,0x00000183,
40820x01f,0x00000021,
40830x020,0x00000163,
40840x01f,0x00000022,
40850x020,0x00000143,
40860x01f,0x00000023,
40870x020,0x00000123,
40880x01f,0x00000024,
40890x020,0x00000103,
40900x023,0x00000203,
40910x024,0x00000200,
40920x00b,0x000001ba,
40930x02c,0x000003d7,
40940x02d,0x00000ff0,
40950x000,0x00000037,
40960x004,0x00000160,
40970x007,0x00000080,
40980x002,0x0000088d,
40990x0fe,0x00000000,
41000x0fe,0x00000000,
41010x016,0x00000200,
41020x016,0x00000380,
41030x016,0x00000020,
41040x016,0x000001a0,
41050x000,0x000000bf,
41060x00d,0x0000001f,
41070x00d,0x00000c9f,
41080x002,0x0000004d,
41090x000,0x00000cbf,
41100x004,0x00000975,
41110x007,0x00000700,
4112};
4113
4114u32 Rtl8190PciRadioB_Array[RadioB_ArrayLengthPci] = {
41150x019,0x00000003,
41160x000,0x000000bf,
41170x001,0x000006e0,
41180x002,0x0000004c,
41190x003,0x000007f1,
41200x004,0x00000975,
41210x005,0x00000c58,
41220x006,0x00000ae6,
41230x007,0x000000ca,
41240x008,0x00000e1c,
41250x000,0x000000b7,
41260x00a,0x00000850,
41270x000,0x000000bf,
41280x00b,0x000001ba,
41290x00c,0x00000240,
41300x00e,0x00000020,
41310x015,0x00000f80,
41320x016,0x00000020,
41330x017,0x00000597,
41340x018,0x0000050a,
41350x01a,0x00000e00,
41360x01b,0x00000f5e,
41370x01d,0x00000607,
41380x01e,0x000006cc,
41390x00b,0x000001ba,
41400x023,0x00000203,
41410x024,0x00000200,
41420x000,0x00000037,
41430x004,0x00000160,
41440x016,0x00000200,
41450x016,0x00000380,
41460x016,0x00000020,
41470x016,0x000001a0,
41480x00d,0x00000ccc,
41490x000,0x000000bf,
41500x002,0x0000004d,
41510x000,0x00000cbf,
41520x004,0x00000975,
41530x007,0x00000700,
4154};
4155
4156u32 Rtl8190PciRadioC_Array[RadioC_ArrayLengthPci] = {
41570x019,0x00000003,
41580x000,0x000000bf,
41590x001,0x00000ee0,
41600x002,0x0000004c,
41610x003,0x000007f1,
41620x004,0x00000975,
41630x005,0x00000c58,
41640x006,0x00000ae6,
41650x007,0x000000ca,
41660x008,0x00000e1c,
41670x009,0x000007f0,
41680x00a,0x000009d0,
41690x00b,0x000001ba,
41700x00c,0x00000240,
41710x00e,0x00000020,
41720x00f,0x00000990,
41730x012,0x00000806,
41740x014,0x000005ab,
41750x015,0x00000f80,
41760x016,0x00000020,
41770x017,0x00000597,
41780x018,0x0000050a,
41790x01a,0x00000f80,
41800x01b,0x00000f5e,
41810x01c,0x00000008,
41820x01d,0x00000607,
41830x01e,0x000006cc,
41840x01f,0x00000000,
41850x020,0x000001a5,
41860x01f,0x00000001,
41870x020,0x00000165,
41880x01f,0x00000002,
41890x020,0x000000c6,
41900x01f,0x00000003,
41910x020,0x00000086,
41920x01f,0x00000004,
41930x020,0x00000046,
41940x01f,0x00000005,
41950x020,0x000001e6,
41960x01f,0x00000006,
41970x020,0x000001a6,
41980x01f,0x00000007,
41990x020,0x00000166,
42000x01f,0x00000008,
42010x020,0x000000c7,
42020x01f,0x00000009,
42030x020,0x00000087,
42040x01f,0x0000000a,
42050x020,0x000000f7,
42060x01f,0x0000000b,
42070x020,0x000000d7,
42080x01f,0x0000000c,
42090x020,0x000000b7,
42100x01f,0x0000000d,
42110x020,0x00000097,
42120x01f,0x0000000e,
42130x020,0x00000077,
42140x01f,0x0000000f,
42150x020,0x00000057,
42160x01f,0x00000010,
42170x020,0x00000037,
42180x01f,0x00000011,
42190x020,0x000000fb,
42200x01f,0x00000012,
42210x020,0x000000db,
42220x01f,0x00000013,
42230x020,0x000000bb,
42240x01f,0x00000014,
42250x020,0x000000ff,
42260x01f,0x00000015,
42270x020,0x000000e3,
42280x01f,0x00000016,
42290x020,0x000000c3,
42300x01f,0x00000017,
42310x020,0x000000a3,
42320x01f,0x00000018,
42330x020,0x00000083,
42340x01f,0x00000019,
42350x020,0x00000063,
42360x01f,0x0000001a,
42370x020,0x00000043,
42380x01f,0x0000001b,
42390x020,0x00000023,
42400x01f,0x0000001c,
42410x020,0x00000003,
42420x01f,0x0000001d,
42430x020,0x000001e3,
42440x01f,0x0000001e,
42450x020,0x000001c3,
42460x01f,0x0000001f,
42470x020,0x000001a3,
42480x01f,0x00000020,
42490x020,0x00000183,
42500x01f,0x00000021,
42510x020,0x00000163,
42520x01f,0x00000022,
42530x020,0x00000143,
42540x01f,0x00000023,
42550x020,0x00000123,
42560x01f,0x00000024,
42570x020,0x00000103,
42580x023,0x00000203,
42590x024,0x00000200,
42600x00b,0x000001ba,
42610x02c,0x000003d7,
42620x02d,0x00000ff0,
42630x000,0x00000037,
42640x004,0x00000160,
42650x007,0x00000080,
42660x002,0x0000088d,
42670x0fe,0x00000000,
42680x0fe,0x00000000,
42690x016,0x00000200,
42700x016,0x00000380,
42710x016,0x00000020,
42720x016,0x000001a0,
42730x000,0x000000bf,
42740x00d,0x0000001f,
42750x00d,0x00000c9f,
42760x002,0x0000004d,
42770x000,0x00000cbf,
42780x004,0x00000975,
42790x007,0x00000700,
4280};
4281
4282u32 Rtl8190PciRadioD_Array[RadioD_ArrayLengthPci] = {
42830x019,0x00000003,
42840x000,0x000000bf,
42850x001,0x000006e0,
42860x002,0x0000004c,
42870x003,0x000007f1,
42880x004,0x00000975,
42890x005,0x00000c58,
42900x006,0x00000ae6,
42910x007,0x000000ca,
42920x008,0x00000e1c,
42930x000,0x000000b7,
42940x00a,0x00000850,
42950x000,0x000000bf,
42960x00b,0x000001ba,
42970x00c,0x00000240,
42980x00e,0x00000020,
42990x015,0x00000f80,
43000x016,0x00000020,
43010x017,0x00000597,
43020x018,0x0000050a,
43030x01a,0x00000e00,
43040x01b,0x00000f5e,
43050x01d,0x00000607,
43060x01e,0x000006cc,
43070x00b,0x000001ba,
43080x023,0x00000203,
43090x024,0x00000200,
43100x000,0x00000037,
43110x004,0x00000160,
43120x016,0x00000200,
43130x016,0x00000380,
43140x016,0x00000020,
43150x016,0x000001a0,
43160x00d,0x00000ccc,
43170x000,0x000000bf,
43180x002,0x0000004d,
43190x000,0x00000cbf,
43200x004,0x00000975,
43210x007,0x00000700,
4322};
4323
4324u32 Rtl8190PciMACPHY_Array[] = {
43250x03c,0xffff0000,0x00000f0f,
43260x340,0xffffffff,0x161a1a1a,
43270x344,0xffffffff,0x12121416,
43280x348,0x0000ffff,0x00001818,
43290x12c,0xffffffff,0x04000802,
43300x318,0x00000fff,0x00000800,
4331};
4332
4333u32 Rtl8190PciMACPHY_Array_PG[] = {
43340x03c,0xffff0000,0x00000f0f,
43350x340,0xffffffff,0x0a0c0d0f,
43360x344,0xffffffff,0x06070809,
43370x344,0xffffffff,0x06070809,
43380x348,0x0000ffff,0x00000000,
43390x12c,0xffffffff,0x04000802,
43400x318,0x00000fff,0x00000800,
4341};
4342
4343u32 Rtl8190PciAGCTAB_Array[AGCTAB_ArrayLengthPci] = {
43440xc78,0x7d000001,
43450xc78,0x7d010001,
43460xc78,0x7d020001,
43470xc78,0x7d030001,
43480xc78,0x7c040001,
43490xc78,0x7b050001,
43500xc78,0x7a060001,
43510xc78,0x79070001,
43520xc78,0x78080001,
43530xc78,0x77090001,
43540xc78,0x760a0001,
43550xc78,0x750b0001,
43560xc78,0x740c0001,
43570xc78,0x730d0001,
43580xc78,0x720e0001,
43590xc78,0x710f0001,
43600xc78,0x70100001,
43610xc78,0x6f110001,
43620xc78,0x6e120001,
43630xc78,0x6d130001,
43640xc78,0x6c140001,
43650xc78,0x6b150001,
43660xc78,0x6a160001,
43670xc78,0x69170001,
43680xc78,0x68180001,
43690xc78,0x67190001,
43700xc78,0x661a0001,
43710xc78,0x651b0001,
43720xc78,0x641c0001,
43730xc78,0x491d0001,
43740xc78,0x481e0001,
43750xc78,0x471f0001,
43760xc78,0x46200001,
43770xc78,0x45210001,
43780xc78,0x44220001,
43790xc78,0x43230001,
43800xc78,0x28240001,
43810xc78,0x27250001,
43820xc78,0x26260001,
43830xc78,0x25270001,
43840xc78,0x24280001,
43850xc78,0x23290001,
43860xc78,0x222a0001,
43870xc78,0x212b0001,
43880xc78,0x202c0001,
43890xc78,0x0a2d0001,
43900xc78,0x082e0001,
43910xc78,0x062f0001,
43920xc78,0x05300001,
43930xc78,0x04310001,
43940xc78,0x03320001,
43950xc78,0x02330001,
43960xc78,0x01340001,
43970xc78,0x00350001,
43980xc78,0x00360001,
43990xc78,0x00370001,
44000xc78,0x00380001,
44010xc78,0x00390001,
44020xc78,0x003a0001,
44030xc78,0x003b0001,
44040xc78,0x003c0001,
44050xc78,0x003d0001,
44060xc78,0x003e0001,
44070xc78,0x003f0001,
44080xc78,0x7d400001,
44090xc78,0x7d410001,
44100xc78,0x7d420001,
44110xc78,0x7d430001,
44120xc78,0x7c440001,
44130xc78,0x7b450001,
44140xc78,0x7a460001,
44150xc78,0x79470001,
44160xc78,0x78480001,
44170xc78,0x77490001,
44180xc78,0x764a0001,
44190xc78,0x754b0001,
44200xc78,0x744c0001,
44210xc78,0x734d0001,
44220xc78,0x724e0001,
44230xc78,0x714f0001,
44240xc78,0x70500001,
44250xc78,0x6f510001,
44260xc78,0x6e520001,
44270xc78,0x6d530001,
44280xc78,0x6c540001,
44290xc78,0x6b550001,
44300xc78,0x6a560001,
44310xc78,0x69570001,
44320xc78,0x68580001,
44330xc78,0x67590001,
44340xc78,0x665a0001,
44350xc78,0x655b0001,
44360xc78,0x645c0001,
44370xc78,0x495d0001,
44380xc78,0x485e0001,
44390xc78,0x475f0001,
44400xc78,0x46600001,
44410xc78,0x45610001,
44420xc78,0x44620001,
44430xc78,0x43630001,
44440xc78,0x28640001,
44450xc78,0x27650001,
44460xc78,0x26660001,
44470xc78,0x25670001,
44480xc78,0x24680001,
44490xc78,0x23690001,
44500xc78,0x226a0001,
44510xc78,0x216b0001,
44520xc78,0x206c0001,
44530xc78,0x0a6d0001,
44540xc78,0x086e0001,
44550xc78,0x066f0001,
44560xc78,0x05700001,
44570xc78,0x04710001,
44580xc78,0x03720001,
44590xc78,0x02730001,
44600xc78,0x01740001,
44610xc78,0x00750001,
44620xc78,0x00760001,
44630xc78,0x00770001,
44640xc78,0x00780001,
44650xc78,0x00790001,
44660xc78,0x007a0001,
44670xc78,0x007b0001,
44680xc78,0x007c0001,
44690xc78,0x007d0001,
44700xc78,0x007e0001,
44710xc78,0x007f0001,
44720xc78,0x3600001e,
44730xc78,0x3601001e,
44740xc78,0x3602001e,
44750xc78,0x3603001e,
44760xc78,0x3604001e,
44770xc78,0x3605001e,
44780xc78,0x3a06001e,
44790xc78,0x3c07001e,
44800xc78,0x3e08001e,
44810xc78,0x4209001e,
44820xc78,0x430a001e,
44830xc78,0x450b001e,
44840xc78,0x470c001e,
44850xc78,0x480d001e,
44860xc78,0x490e001e,
44870xc78,0x4b0f001e,
44880xc78,0x4c10001e,
44890xc78,0x4d11001e,
44900xc78,0x4d12001e,
44910xc78,0x4e13001e,
44920xc78,0x4f14001e,
44930xc78,0x5015001e,
44940xc78,0x5116001e,
44950xc78,0x5117001e,
44960xc78,0x5218001e,
44970xc78,0x5219001e,
44980xc78,0x531a001e,
44990xc78,0x541b001e,
45000xc78,0x541c001e,
45010xc78,0x551d001e,
45020xc78,0x561e001e,
45030xc78,0x561f001e,
45040xc78,0x5720001e,
45050xc78,0x5821001e,
45060xc78,0x5822001e,
45070xc78,0x5923001e,
45080xc78,0x5924001e,
45090xc78,0x5a25001e,
45100xc78,0x5b26001e,
45110xc78,0x5b27001e,
45120xc78,0x5c28001e,
45130xc78,0x5c29001e,
45140xc78,0x5d2a001e,
45150xc78,0x5d2b001e,
45160xc78,0x5e2c001e,
45170xc78,0x5e2d001e,
45180xc78,0x5f2e001e,
45190xc78,0x602f001e,
45200xc78,0x6030001e,
45210xc78,0x6131001e,
45220xc78,0x6132001e,
45230xc78,0x6233001e,
45240xc78,0x6234001e,
45250xc78,0x6335001e,
45260xc78,0x6336001e,
45270xc78,0x6437001e,
45280xc78,0x6538001e,
45290xc78,0x6639001e,
45300xc78,0x663a001e,
45310xc78,0x673b001e,
45320xc78,0x683c001e,
45330xc78,0x693d001e,
45340xc78,0x6a3e001e,
45350xc78,0x6b3f001e,
4536};
4537
4538#endif
diff --git a/drivers/staging/rtl8192e/r8190P_hwimg.h b/drivers/staging/rtl8192e/r8190P_hwimg.h
new file mode 100644
index 00000000000..18aef43737d
--- /dev/null
+++ b/drivers/staging/rtl8192e/r8190P_hwimg.h
@@ -0,0 +1,51 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/
19#ifndef __INC_HAL8190Pci_FW_IMG_H
20#define __INC_HAL8190Pci_FW_IMG_H
21
22/*Created on 2008/12/ 3, 3:26*/
23
24#include <linux/types.h>
25
26#define BootArrayLengthPci 344
27extern u8 Rtl8190PciFwBootArray[BootArrayLengthPci];
28#define MainArrayLengthPci 55388
29extern u8 Rtl8190PciFwMainArray[MainArrayLengthPci];
30#define DataArrayLengthPci 2960
31extern u8 Rtl8190PciFwDataArray[DataArrayLengthPci];
32#define PHY_REGArrayLengthPci 280
33extern u32 Rtl8190PciPHY_REGArray[PHY_REGArrayLengthPci];
34#define PHY_REG_1T2RArrayLengthPci 280
35extern u32 Rtl8190PciPHY_REG_1T2RArray[PHY_REG_1T2RArrayLengthPci];
36#define RadioA_ArrayLengthPci 246
37extern u32 Rtl8190PciRadioA_Array[RadioA_ArrayLengthPci] ;
38#define RadioB_ArrayLengthPci 78
39extern u32 Rtl8190PciRadioB_Array[RadioB_ArrayLengthPci] ;
40#define RadioC_ArrayLengthPci 246
41extern u32 Rtl8190PciRadioC_Array[RadioC_ArrayLengthPci] ;
42#define RadioD_ArrayLengthPci 78
43extern u32 Rtl8190PciRadioD_Array[RadioD_ArrayLengthPci] ;
44#define MACPHY_ArrayLengthPci 18
45extern u32 Rtl8190PciMACPHY_Array[MACPHY_ArrayLengthPci] ;
46#define MACPHY_Array_PGLengthPci 21
47extern u32 Rtl8190PciMACPHY_Array_PG[MACPHY_Array_PGLengthPci] ;
48#define AGCTAB_ArrayLengthPci 384
49extern u32 Rtl8190PciAGCTAB_Array[AGCTAB_ArrayLengthPci] ;
50
51#endif
diff --git a/drivers/staging/rtl8192e/r8190P_rtl8256.c b/drivers/staging/rtl8192e/r8190P_rtl8256.c
new file mode 100644
index 00000000000..26709e5b61c
--- /dev/null
+++ b/drivers/staging/rtl8192e/r8190P_rtl8256.c
@@ -0,0 +1,366 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/
19
20#include "rtl_core.h"
21#ifdef RTL8192SE
22#include "rtl8192s/r8192S_phyreg.h"
23#include "rtl8192s/r8192S_phy.h"
24#else
25#include "r8192E_phyreg.h"
26#include "r8192E_phy.h"
27#endif
28#include "r8190P_rtl8256.h"
29
30void PHY_SetRF8256Bandwidth(struct net_device* dev , HT_CHANNEL_WIDTH Bandwidth)
31{
32 u8 eRFPath;
33 struct r8192_priv *priv = rtllib_priv(dev);
34
35 for (eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++) {
36 if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath))
37 continue;
38
39 switch (Bandwidth) {
40 case HT_CHANNEL_WIDTH_20:
41 if (priv->card_8192_version == VERSION_8190_BD || priv->card_8192_version == VERSION_8190_BE) {
42 rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x0b, bMask12Bits, 0x100);
43 rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x2c, bMask12Bits, 0x3d7);
44 rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x0e, bMask12Bits, 0x021);
45
46 } else {
47 RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown hardware version\n");
48 }
49
50 break;
51 case HT_CHANNEL_WIDTH_20_40:
52 if (priv->card_8192_version == VERSION_8190_BD ||priv->card_8192_version == VERSION_8190_BE) {
53 rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x0b, bMask12Bits, 0x300);
54 rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x2c, bMask12Bits, 0x3ff);
55 rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x0e, bMask12Bits, 0x0e1);
56
57 } else {
58 RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown hardware version\n");
59 }
60
61
62 break;
63 default:
64 RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth );
65 break;
66
67 }
68 }
69 return;
70}
71
72bool PHY_RF8256_Config(struct net_device* dev)
73{
74 struct r8192_priv *priv = rtllib_priv(dev);
75 bool rtStatus = true;
76 priv->NumTotalRFPath = RTL819X_TOTAL_RF_PATH;
77 rtStatus = phy_RF8256_Config_ParaFile(dev);
78
79 return rtStatus;
80}
81
82bool phy_RF8256_Config_ParaFile(struct net_device* dev)
83{
84 u32 u4RegValue = 0;
85 u8 eRFPath;
86 bool rtStatus = true;
87 BB_REGISTER_DEFINITION_T *pPhyReg;
88 struct r8192_priv *priv = rtllib_priv(dev);
89 u32 RegOffSetToBeCheck = 0x3;
90 u32 RegValueToBeCheck = 0x7f1;
91 u32 RF3_Final_Value = 0;
92 u8 ConstRetryTimes = 5, RetryTimes = 5;
93 u8 ret = 0;
94
95 for (eRFPath = (RF90_RADIO_PATH_E)RF90_PATH_A; eRFPath <priv->NumTotalRFPath; eRFPath++) {
96 if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath))
97 continue;
98
99 pPhyReg = &priv->PHYRegDef[eRFPath];
100
101
102 switch (eRFPath) {
103 case RF90_PATH_A:
104 case RF90_PATH_C:
105 u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV);
106 break;
107 case RF90_PATH_B :
108 case RF90_PATH_D:
109 u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16);
110 break;
111 }
112
113 rtl8192_setBBreg(dev, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1);
114
115 rtl8192_setBBreg(dev, pPhyReg->rfintfo, bRFSI_RFENV, 0x1);
116
117 rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0);
118 rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0);
119
120 rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E) eRFPath, 0x0, bMask12Bits, 0xbf);
121
122 rtStatus = rtl8192_phy_checkBBAndRF(dev, HW90_BLOCK_RF, (RF90_RADIO_PATH_E)eRFPath);
123 if (rtStatus!= true) {
124 RT_TRACE(COMP_ERR, "PHY_RF8256_Config():Check Radio[%d] Fail!!\n", eRFPath);
125 goto phy_RF8256_Config_ParaFile_Fail;
126 }
127
128 RetryTimes = ConstRetryTimes;
129 RF3_Final_Value = 0;
130 switch (eRFPath) {
131 case RF90_PATH_A:
132 while (RF3_Final_Value!=RegValueToBeCheck && RetryTimes != 0) {
133 ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(RF90_RADIO_PATH_E)eRFPath);
134 RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits);
135 RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value);
136 RetryTimes--;
137 }
138 break;
139 case RF90_PATH_B:
140 while (RF3_Final_Value!=RegValueToBeCheck && RetryTimes != 0) {
141 ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(RF90_RADIO_PATH_E)eRFPath);
142 RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits);
143 RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value);
144 RetryTimes--;
145 }
146 break;
147 case RF90_PATH_C:
148 while (RF3_Final_Value!=RegValueToBeCheck && RetryTimes != 0) {
149 ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(RF90_RADIO_PATH_E)eRFPath);
150 RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits);
151 RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value);
152 RetryTimes--;
153 }
154 break;
155 case RF90_PATH_D:
156 while (RF3_Final_Value!=RegValueToBeCheck && RetryTimes != 0) {
157 ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(RF90_RADIO_PATH_E)eRFPath);
158 RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits);
159 RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value);
160 RetryTimes--;
161 }
162 break;
163 }
164
165 switch (eRFPath) {
166 case RF90_PATH_A:
167 case RF90_PATH_C:
168 rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue);
169 break;
170 case RF90_PATH_B :
171 case RF90_PATH_D:
172 rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue);
173 break;
174 }
175
176 if (ret) {
177 RT_TRACE(COMP_ERR, "phy_RF8256_Config_ParaFile():Radio[%d] Fail!!", eRFPath);
178 goto phy_RF8256_Config_ParaFile_Fail;
179 }
180
181 }
182
183 RT_TRACE(COMP_PHY, "PHY Initialization Success\n") ;
184 return true;
185
186phy_RF8256_Config_ParaFile_Fail:
187 RT_TRACE(COMP_ERR, "PHY Initialization failed\n") ;
188 return false;
189}
190
191#ifndef RTL8192SE
192void PHY_SetRF8256CCKTxPower(struct net_device* dev, u8 powerlevel)
193{
194 u32 TxAGC=0;
195 struct r8192_priv *priv = rtllib_priv(dev);
196#ifdef RTL8190P
197 u8 byte0, byte1;
198
199 TxAGC |= ((powerlevel<<8)|powerlevel);
200 TxAGC += priv->CCKTxPowerLevelOriginalOffset;
201
202 if (priv->bDynamicTxLowPower == true
203 /*pMgntInfo->bScanInProgress == true*/ )
204 {
205 if (priv->CustomerID == RT_CID_819x_Netcore)
206 TxAGC = 0x2222;
207 else
208 TxAGC += ((priv->CckPwEnl<<8)|priv->CckPwEnl);
209 }
210
211 byte0 = (u8)(TxAGC & 0xff);
212 byte1 = (u8)((TxAGC & 0xff00)>>8);
213 if (byte0 > 0x24)
214 byte0 = 0x24;
215 if (byte1 > 0x24)
216 byte1 = 0x24;
217 if (priv->rf_type == RF_2T4R)
218 {
219 if (priv->RF_C_TxPwDiff > 0)
220 {
221 if ( (byte0 + (u8)priv->RF_C_TxPwDiff) > 0x24)
222 byte0 = 0x24 - priv->RF_C_TxPwDiff;
223 if ( (byte1 + (u8)priv->RF_C_TxPwDiff) > 0x24)
224 byte1 = 0x24 - priv->RF_C_TxPwDiff;
225 }
226 }
227 TxAGC = (byte1<<8) |byte0;
228 write_nic_dword(dev, CCK_TXAGC, TxAGC);
229#else
230 #ifdef RTL8192E
231
232 TxAGC = powerlevel;
233 if (priv->bDynamicTxLowPower == true)
234 {
235 if (priv->CustomerID == RT_CID_819x_Netcore)
236 TxAGC = 0x22;
237 else
238 TxAGC += priv->CckPwEnl;
239 }
240 if (TxAGC > 0x24)
241 TxAGC = 0x24;
242 rtl8192_setBBreg(dev, rTxAGC_CCK_Mcs32, bTxAGCRateCCK, TxAGC);
243 #endif
244#endif
245}
246
247
248void PHY_SetRF8256OFDMTxPower(struct net_device* dev, u8 powerlevel)
249{
250 struct r8192_priv *priv = rtllib_priv(dev);
251#ifdef RTL8190P
252 u32 TxAGC1=0, TxAGC2=0, TxAGC2_tmp = 0;
253 u8 i, byteVal1[4], byteVal2[4], byteVal3[4];
254
255 if (priv->bDynamicTxHighPower == true)
256 {
257 TxAGC1 |= ((powerlevel<<24)|(powerlevel<<16)|(powerlevel<<8)|powerlevel);
258 TxAGC2_tmp = TxAGC1;
259
260 TxAGC1 += priv->MCSTxPowerLevelOriginalOffset[0];
261 TxAGC2 =0x03030303;
262
263 TxAGC2_tmp += priv->MCSTxPowerLevelOriginalOffset[1];
264 }
265 else
266 {
267 TxAGC1 |= ((powerlevel<<24)|(powerlevel<<16)|(powerlevel<<8)|powerlevel);
268 TxAGC2 = TxAGC1;
269
270 TxAGC1 += priv->MCSTxPowerLevelOriginalOffset[0];
271 TxAGC2 += priv->MCSTxPowerLevelOriginalOffset[1];
272
273 TxAGC2_tmp = TxAGC2;
274
275 }
276 for (i=0; i<4; i++)
277 {
278 byteVal1[i] = (u8)( (TxAGC1 & (0xff<<(i*8))) >>(i*8) );
279 if (byteVal1[i] > 0x24)
280 byteVal1[i] = 0x24;
281 byteVal2[i] = (u8)( (TxAGC2 & (0xff<<(i*8))) >>(i*8) );
282 if (byteVal2[i] > 0x24)
283 byteVal2[i] = 0x24;
284
285 byteVal3[i] = (u8)( (TxAGC2_tmp & (0xff<<(i*8))) >>(i*8) );
286 if (byteVal3[i] > 0x24)
287 byteVal3[i] = 0x24;
288 }
289
290 if (priv->rf_type == RF_2T4R)
291 {
292 if (priv->RF_C_TxPwDiff > 0)
293 {
294 for (i=0; i<4; i++)
295 {
296 if ( (byteVal1[i] + (u8)priv->RF_C_TxPwDiff) > 0x24)
297 byteVal1[i] = 0x24 - priv->RF_C_TxPwDiff;
298 if ( (byteVal2[i] + (u8)priv->RF_C_TxPwDiff) > 0x24)
299 byteVal2[i] = 0x24 - priv->RF_C_TxPwDiff;
300 if ( (byteVal3[i] + (u8)priv->RF_C_TxPwDiff) > 0x24)
301 byteVal3[i] = 0x24 - priv->RF_C_TxPwDiff;
302 }
303 }
304 }
305
306 TxAGC1 = (byteVal1[3]<<24) | (byteVal1[2]<<16) |(byteVal1[1]<<8) |byteVal1[0];
307 TxAGC2 = (byteVal2[3]<<24) | (byteVal2[2]<<16) |(byteVal2[1]<<8) |byteVal2[0];
308
309 TxAGC2_tmp = (byteVal3[3]<<24) | (byteVal3[2]<<16) |(byteVal3[1]<<8) |byteVal3[0];
310 priv->Pwr_Track = TxAGC2_tmp;
311
312 write_nic_dword(dev, MCS_TXAGC, TxAGC1);
313 write_nic_dword(dev, MCS_TXAGC+4, TxAGC2);
314#else
315#ifdef RTL8192E
316 u32 writeVal, powerBase0, powerBase1, writeVal_tmp;
317 u8 index = 0;
318 u16 RegOffset[6] = {0xe00, 0xe04, 0xe10, 0xe14, 0xe18, 0xe1c};
319 u8 byte0, byte1, byte2, byte3;
320
321 powerBase0 = powerlevel + priv->LegacyHTTxPowerDiff;
322 powerBase0 = (powerBase0<<24) | (powerBase0<<16) |(powerBase0<<8) |powerBase0;
323 powerBase1 = powerlevel;
324 powerBase1 = (powerBase1<<24) | (powerBase1<<16) |(powerBase1<<8) |powerBase1;
325
326 for (index=0; index<6; index++)
327 {
328 writeVal = (u32)(priv->MCSTxPowerLevelOriginalOffset[index] + ((index<2)?powerBase0:powerBase1));
329 byte0 = (u8)(writeVal & 0x7f);
330 byte1 = (u8)((writeVal & 0x7f00)>>8);
331 byte2 = (u8)((writeVal & 0x7f0000)>>16);
332 byte3 = (u8)((writeVal & 0x7f000000)>>24);
333 if (byte0 > 0x24)
334 byte0 = 0x24;
335 if (byte1 > 0x24)
336 byte1 = 0x24;
337 if (byte2 > 0x24)
338 byte2 = 0x24;
339 if (byte3 > 0x24)
340 byte3 = 0x24;
341
342 if (index == 3)
343 {
344 writeVal_tmp = (byte3<<24) | (byte2<<16) |(byte1<<8) |byte0;
345 priv->Pwr_Track = writeVal_tmp;
346 }
347
348 if (priv->bDynamicTxHighPower == true)
349 {
350 writeVal = 0x03030303;
351 }
352 else
353 {
354 writeVal = (byte3<<24) | (byte2<<16) |(byte1<<8) |byte0;
355 }
356 rtl8192_setBBreg(dev, RegOffset[index], 0x7f7f7f7f, writeVal);
357 }
358
359#endif
360#endif
361 return;
362}
363
364
365
366#endif
diff --git a/drivers/staging/rtl8192e/r8190P_rtl8256.h b/drivers/staging/rtl8192e/r8190P_rtl8256.h
new file mode 100644
index 00000000000..08bcb6213ac
--- /dev/null
+++ b/drivers/staging/rtl8192e/r8190P_rtl8256.h
@@ -0,0 +1,34 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/
19
20#ifndef RTL8225H
21#define RTL8225H
22
23#ifdef RTL8190P
24#define RTL819X_TOTAL_RF_PATH 4
25#else
26#define RTL819X_TOTAL_RF_PATH 2
27#endif
28extern void PHY_SetRF8256Bandwidth(struct net_device* dev , HT_CHANNEL_WIDTH Bandwidth);
29extern bool PHY_RF8256_Config(struct net_device* dev);
30extern bool phy_RF8256_Config_ParaFile(struct net_device* dev);
31extern void PHY_SetRF8256CCKTxPower(struct net_device* dev, u8 powerlevel);
32extern void PHY_SetRF8256OFDMTxPower(struct net_device* dev, u8 powerlevel);
33
34#endif
diff --git a/drivers/staging/rtl8192e/r8192E_cmdpkt.c b/drivers/staging/rtl8192e/r8192E_cmdpkt.c
new file mode 100644
index 00000000000..11506db1f78
--- /dev/null
+++ b/drivers/staging/rtl8192e/r8192E_cmdpkt.c
@@ -0,0 +1,478 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/
19#if (defined(RTL8192E) || defined(RTL8190P))
20
21#include "rtl_core.h"
22#include "r8192E_hw.h"
23#include "r8192E_cmdpkt.h"
24/*---------------------------Define Local Constant---------------------------*/
25/* Debug constant*/
26#define CMPK_DEBOUNCE_CNT 1
27#define CMPK_PRINT(Address)\
28{\
29 unsigned char i;\
30 u32 temp[10];\
31 \
32 memcpy(temp, Address, 40);\
33 for (i = 0; i <40; i+=4)\
34 printk("\r\n %08x", temp[i]);\
35}\
36
37/*---------------------------Define functions---------------------------------*/
38 extern bool cmpk_message_handle_tx(
39 struct net_device *dev,
40 u8* code_virtual_address,
41 u32 packettype,
42 u32 buffer_len)
43{
44
45 bool rt_status = true;
46 struct r8192_priv *priv = rtllib_priv(dev);
47 u16 frag_threshold;
48 u16 frag_length = 0, frag_offset = 0;
49 rt_firmware *pfirmware = priv->pFirmware;
50 struct sk_buff *skb;
51 unsigned char *seg_ptr;
52 cb_desc *tcb_desc;
53 u8 bLastIniPkt;
54
55 PTX_FWINFO_8190PCI pTxFwInfo = NULL;
56
57 RT_TRACE(COMP_CMDPKT,"%s(),buffer_len is %d\n",__func__,buffer_len);
58 firmware_init_param(dev);
59 frag_threshold = pfirmware->cmdpacket_frag_thresold;
60
61 do {
62 if ((buffer_len - frag_offset) > frag_threshold) {
63 frag_length = frag_threshold ;
64 bLastIniPkt = 0;
65
66 } else {
67 frag_length =(u16)(buffer_len - frag_offset);
68 bLastIniPkt = 1;
69 }
70
71 skb = dev_alloc_skb(frag_length + priv->rtllib->tx_headroom + 4);
72
73 if (skb == NULL) {
74 rt_status = false;
75 goto Failed;
76 }
77
78 memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
79 tcb_desc = (cb_desc*)(skb->cb + MAX_DEV_ADDR_SIZE);
80 tcb_desc->queue_index = TXCMD_QUEUE;
81 tcb_desc->bCmdOrInit = DESC_PACKET_TYPE_NORMAL;
82 tcb_desc->bLastIniPkt = bLastIniPkt;
83 tcb_desc->pkt_size = frag_length;
84
85 seg_ptr = skb_put(skb, priv->rtllib->tx_headroom);
86 pTxFwInfo = (PTX_FWINFO_8190PCI)seg_ptr;
87 memset(pTxFwInfo,0,sizeof(TX_FWINFO_8190PCI));
88 memset(pTxFwInfo,0x12,8);
89
90 seg_ptr = skb_put(skb, frag_length);
91 memcpy(seg_ptr, code_virtual_address, (u32)frag_length);
92
93 priv->rtllib->softmac_hard_start_xmit(skb,dev);
94
95 code_virtual_address += frag_length;
96 frag_offset += frag_length;
97
98 }while(frag_offset < buffer_len);
99
100 write_nic_byte(dev, TPPoll, TPPoll_CQ);
101Failed:
102 return rt_status;
103} /* CMPK_Message_Handle_Tx */
104
105static void
106cmpk_count_txstatistic(
107 struct net_device *dev,
108 cmpk_txfb_t *pstx_fb)
109{
110 struct r8192_priv *priv = rtllib_priv(dev);
111#ifdef ENABLE_PS
112 RT_RF_POWER_STATE rtState;
113
114 pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState));
115
116 if (rtState == eRfOff)
117 {
118 return;
119 }
120#endif
121
122#ifdef TODO
123 if (pAdapter->bInHctTest)
124 return;
125#endif
126 if (pstx_fb->tok)
127 {
128 priv->stats.txfeedbackok++;
129 priv->stats.txoktotal++;
130 priv->stats.txokbytestotal += pstx_fb->pkt_length;
131 priv->stats.txokinperiod++;
132
133 if (pstx_fb->pkt_type == PACKET_MULTICAST)
134 {
135 priv->stats.txmulticast++;
136 priv->stats.txbytesmulticast += pstx_fb->pkt_length;
137 }
138 else if (pstx_fb->pkt_type == PACKET_BROADCAST)
139 {
140 priv->stats.txbroadcast++;
141 priv->stats.txbytesbroadcast += pstx_fb->pkt_length;
142 }
143 else
144 {
145 priv->stats.txunicast++;
146 priv->stats.txbytesunicast += pstx_fb->pkt_length;
147 }
148 }
149 else
150 {
151 priv->stats.txfeedbackfail++;
152 priv->stats.txerrtotal++;
153 priv->stats.txerrbytestotal += pstx_fb->pkt_length;
154
155 if (pstx_fb->pkt_type == PACKET_MULTICAST)
156 {
157 priv->stats.txerrmulticast++;
158 }
159 else if (pstx_fb->pkt_type == PACKET_BROADCAST)
160 {
161 priv->stats.txerrbroadcast++;
162 }
163 else
164 {
165 priv->stats.txerrunicast++;
166 }
167 }
168
169 priv->stats.txretrycount += pstx_fb->retry_cnt;
170 priv->stats.txfeedbackretry += pstx_fb->retry_cnt;
171
172} /* cmpk_CountTxStatistic */
173
174
175
176static void
177cmpk_handle_tx_feedback(
178 struct net_device *dev,
179 u8 * pmsg)
180{
181 struct r8192_priv *priv = rtllib_priv(dev);
182 cmpk_txfb_t rx_tx_fb; /* */
183
184 priv->stats.txfeedback++;
185
186
187 memcpy((u8*)&rx_tx_fb, pmsg, sizeof(cmpk_txfb_t));
188 cmpk_count_txstatistic(dev, &rx_tx_fb);
189
190} /* cmpk_Handle_Tx_Feedback */
191
192void
193cmdpkt_beacontimerinterrupt_819xusb(
194 struct net_device *dev
195)
196{
197 struct r8192_priv *priv = rtllib_priv(dev);
198 u16 tx_rate;
199 {
200 if ((priv->rtllib->current_network.mode == IEEE_A) ||
201 (priv->rtllib->current_network.mode == IEEE_N_5G) ||
202 ((priv->rtllib->current_network.mode == IEEE_N_24G) && (!priv->rtllib->pHTInfo->bCurSuppCCK)))
203 {
204 tx_rate = 60;
205 DMESG("send beacon frame tx rate is 6Mbpm\n");
206 }
207 else
208 {
209 tx_rate =10;
210 DMESG("send beacon frame tx rate is 1Mbpm\n");
211 }
212
213
214 }
215
216}
217
218static void
219cmpk_handle_interrupt_status(
220 struct net_device *dev,
221 u8* pmsg)
222{
223 cmpk_intr_sta_t rx_intr_status; /* */
224 struct r8192_priv *priv = rtllib_priv(dev);
225
226 DMESG("---> cmpk_Handle_Interrupt_Status()\n");
227
228
229 rx_intr_status.length = pmsg[1];
230 if (rx_intr_status.length != (sizeof(cmpk_intr_sta_t) - 2))
231 {
232 DMESG("cmpk_Handle_Interrupt_Status: wrong length!\n");
233 return;
234 }
235
236
237 if ( priv->rtllib->iw_mode == IW_MODE_ADHOC)
238 {
239 rx_intr_status.interrupt_status = *((u32 *)(pmsg + 4));
240
241 DMESG("interrupt status = 0x%x\n", rx_intr_status.interrupt_status);
242
243 if (rx_intr_status.interrupt_status & ISR_TxBcnOk)
244 {
245 priv->rtllib->bibsscoordinator = true;
246 priv->stats.txbeaconokint++;
247 }
248 else if (rx_intr_status.interrupt_status & ISR_TxBcnErr)
249 {
250 priv->rtllib->bibsscoordinator = false;
251 priv->stats.txbeaconerr++;
252 }
253
254 if (rx_intr_status.interrupt_status & ISR_BcnTimerIntr)
255 {
256 cmdpkt_beacontimerinterrupt_819xusb(dev);
257 }
258
259 }
260
261
262
263 DMESG("<---- cmpk_handle_interrupt_status()\n");
264
265} /* cmpk_handle_interrupt_status */
266
267
268static void
269cmpk_handle_query_config_rx(
270 struct net_device *dev,
271 u8* pmsg)
272{
273 cmpk_query_cfg_t rx_query_cfg; /* */
274
275
276 rx_query_cfg.cfg_action = (pmsg[4] & 0x80000000)>>31;
277 rx_query_cfg.cfg_type = (pmsg[4] & 0x60) >> 5;
278 rx_query_cfg.cfg_size = (pmsg[4] & 0x18) >> 3;
279 rx_query_cfg.cfg_page = (pmsg[6] & 0x0F) >> 0;
280 rx_query_cfg.cfg_offset = pmsg[7];
281 rx_query_cfg.value = (pmsg[8] << 24) | (pmsg[9] << 16) |
282 (pmsg[10] << 8) | (pmsg[11] << 0);
283 rx_query_cfg.mask = (pmsg[12] << 24) | (pmsg[13] << 16) |
284 (pmsg[14] << 8) | (pmsg[15] << 0);
285
286} /* cmpk_Handle_Query_Config_Rx */
287
288
289static void cmpk_count_tx_status( struct net_device *dev,
290 cmpk_tx_status_t *pstx_status)
291{
292 struct r8192_priv *priv = rtllib_priv(dev);
293
294#ifdef ENABLE_PS
295
296 RT_RF_POWER_STATE rtstate;
297
298 pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState));
299
300 if (rtState == eRfOff)
301 {
302 return;
303 }
304#endif
305
306 priv->stats.txfeedbackok += pstx_status->txok;
307 priv->stats.txoktotal += pstx_status->txok;
308
309 priv->stats.txfeedbackfail += pstx_status->txfail;
310 priv->stats.txerrtotal += pstx_status->txfail;
311
312 priv->stats.txretrycount += pstx_status->txretry;
313 priv->stats.txfeedbackretry += pstx_status->txretry;
314
315
316 priv->stats.txmulticast += pstx_status->txmcok;
317 priv->stats.txbroadcast += pstx_status->txbcok;
318 priv->stats.txunicast += pstx_status->txucok;
319
320 priv->stats.txerrmulticast += pstx_status->txmcfail;
321 priv->stats.txerrbroadcast += pstx_status->txbcfail;
322 priv->stats.txerrunicast += pstx_status->txucfail;
323
324 priv->stats.txbytesmulticast += pstx_status->txmclength;
325 priv->stats.txbytesbroadcast += pstx_status->txbclength;
326 priv->stats.txbytesunicast += pstx_status->txuclength;
327
328 priv->stats.last_packet_rate = pstx_status->rate;
329} /* cmpk_CountTxStatus */
330
331
332
333static void
334cmpk_handle_tx_status(
335 struct net_device *dev,
336 u8* pmsg)
337{
338 cmpk_tx_status_t rx_tx_sts; /* */
339
340 memcpy((void*)&rx_tx_sts, (void*)pmsg, sizeof(cmpk_tx_status_t));
341 cmpk_count_tx_status(dev, &rx_tx_sts);
342
343}
344
345
346static void
347cmpk_handle_tx_rate_history(
348 struct net_device *dev,
349 u8* pmsg)
350{
351 cmpk_tx_rahis_t *ptxrate;
352 u8 i, j;
353 u16 length = sizeof(cmpk_tx_rahis_t);
354 u32 *ptemp;
355 struct r8192_priv *priv = rtllib_priv(dev);
356
357
358#ifdef ENABLE_PS
359 pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState));
360
361 if (rtState == eRfOff)
362 {
363 return;
364 }
365#endif
366
367 ptemp = (u32 *)pmsg;
368
369 for (i = 0; i < (length/4); i++)
370 {
371 u16 temp1, temp2;
372
373 temp1 = ptemp[i]&0x0000FFFF;
374 temp2 = ptemp[i]>>16;
375 ptemp[i] = (temp1<<16)|temp2;
376 }
377
378 ptxrate = (cmpk_tx_rahis_t *)pmsg;
379
380 if (ptxrate == NULL )
381 {
382 return;
383 }
384
385 for (i = 0; i < 16; i++)
386 {
387 if (i < 4)
388 priv->stats.txrate.cck[i] += ptxrate->cck[i];
389
390 if (i< 8)
391 priv->stats.txrate.ofdm[i] += ptxrate->ofdm[i];
392
393 for (j = 0; j < 4; j++)
394 priv->stats.txrate.ht_mcs[j][i] += ptxrate->ht_mcs[j][i];
395 }
396
397}
398
399
400extern u32
401cmpk_message_handle_rx(
402 struct net_device *dev,
403 struct rtllib_rx_stats *pstats)
404{
405 struct r8192_priv *priv = rtllib_priv(dev);
406 int total_length;
407 u8 cmd_length, exe_cnt = 0;
408 u8 element_id;
409 u8 *pcmd_buff;
410
411 RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx()\n");
412
413 if (/*(prfd->queue_id != CMPK_RX_QUEUE_ID) || */(pstats== NULL))
414 {
415 /* Print error message. */
416 /*RT_TRACE(COMP_SEND, DebugLevel,
417 ("\n\r[CMPK]-->Err queue id or pointer"));*/
418 return 0;
419 }
420
421 total_length = pstats->Length;
422
423 pcmd_buff = pstats->virtual_address;
424
425 element_id = pcmd_buff[0];
426
427 while (total_length > 0 || exe_cnt++ >100)
428 {
429 element_id = pcmd_buff[0];
430
431 switch (element_id) {
432 case RX_TX_FEEDBACK:
433 RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():RX_TX_FEEDBACK\n");
434 cmpk_handle_tx_feedback (dev, pcmd_buff);
435 cmd_length = CMPK_RX_TX_FB_SIZE;
436 break;
437 case RX_INTERRUPT_STATUS:
438 RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():RX_INTERRUPT_STATUS\n");
439 cmpk_handle_interrupt_status(dev, pcmd_buff);
440 cmd_length = sizeof(cmpk_intr_sta_t);
441 break;
442 case BOTH_QUERY_CONFIG:
443 RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():BOTH_QUERY_CONFIG\n");
444 cmpk_handle_query_config_rx(dev, pcmd_buff);
445 cmd_length = CMPK_BOTH_QUERY_CONFIG_SIZE;
446 break;
447 case RX_TX_STATUS:
448 RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():RX_TX_STATUS\n");
449 cmpk_handle_tx_status(dev, pcmd_buff);
450 cmd_length = CMPK_RX_TX_STS_SIZE;
451 break;
452 case RX_TX_PER_PKT_FEEDBACK:
453 RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():RX_TX_PER_PKT_FEEDBACK\n");
454 cmd_length = CMPK_RX_TX_FB_SIZE;
455 break;
456 case RX_TX_RATE_HISTORY:
457 RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():RX_TX_HISTORY\n");
458 cmpk_handle_tx_rate_history(dev, pcmd_buff);
459 cmd_length = CMPK_TX_RAHIS_SIZE;
460 break;
461 default:
462
463 RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():unknow CMD Element\n");
464 return 1;
465 }
466
467 priv->stats.rxcmdpkt[element_id]++;
468
469 total_length -= cmd_length;
470 pcmd_buff += cmd_length;
471 }
472 return 1;
473
474 RT_TRACE(COMP_CMDPKT, "<----cmpk_message_handle_rx()\n");
475}
476
477
478#endif
diff --git a/drivers/staging/rtl8192e/r8192E_cmdpkt.h b/drivers/staging/rtl8192e/r8192E_cmdpkt.h
new file mode 100644
index 00000000000..787337064bc
--- /dev/null
+++ b/drivers/staging/rtl8192e/r8192E_cmdpkt.h
@@ -0,0 +1,163 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/
19#ifndef R819XUSB_CMDPKT_H
20#define R819XUSB_CMDPKT_H
21#define CMPK_RX_TX_FB_SIZE sizeof(cmpk_txfb_t)
22#define CMPK_TX_SET_CONFIG_SIZE sizeof(cmpk_set_cfg_t)
23#define CMPK_BOTH_QUERY_CONFIG_SIZE sizeof(cmpk_set_cfg_t)
24#define CMPK_RX_TX_STS_SIZE sizeof(cmpk_tx_status_t)
25#define CMPK_RX_DBG_MSG_SIZE sizeof(cmpk_rx_dbginfo_t)
26#define CMPK_TX_RAHIS_SIZE sizeof(cmpk_tx_rahis_t)
27
28#define ISR_TxBcnOk BIT27
29#define ISR_TxBcnErr BIT26
30#define ISR_BcnTimerIntr BIT13
31
32
33typedef struct tag_cmd_pkt_tx_feedback
34{
35 u8 element_id;
36 u8 length;
37 u8 TID:4; /* */
38 u8 fail_reason:3; /* */
39 u8 tok:1;
40 u8 reserve1:4; /* */
41 u8 pkt_type:2; /* */
42 u8 bandwidth:1; /* */
43 u8 qos_pkt:1; /* */
44
45 u8 reserve2; /* */
46 u8 retry_cnt; /* */
47 u16 pkt_id; /* */
48
49 u16 seq_num; /* */
50 u8 s_rate;
51 u8 f_rate;
52
53 u8 s_rts_rate; /* */
54 u8 f_rts_rate; /* */
55 u16 pkt_length; /* */
56
57 u16 reserve3; /* */
58 u16 duration; /* */
59}cmpk_txfb_t;
60
61typedef struct tag_cmd_pkt_interrupt_status
62{
63 u8 element_id;
64 u8 length;
65 u16 reserve;
66 u32 interrupt_status;
67}cmpk_intr_sta_t;
68
69
70typedef struct tag_cmd_pkt_set_configuration
71{
72 u8 element_id;
73 u8 length;
74 u16 reserve1;
75 u8 cfg_reserve1:3;
76 u8 cfg_size:2;
77 u8 cfg_type:2;
78 u8 cfg_action:1;
79 u8 cfg_reserve2;
80 u8 cfg_page:4;
81 u8 cfg_reserve3:4;
82 u8 cfg_offset;
83 u32 value;
84 u32 mask;
85}cmpk_set_cfg_t;
86
87#define cmpk_query_cfg_t cmpk_set_cfg_t
88
89typedef struct tag_tx_stats_feedback
90{
91 u16 reserve1;
92 u8 length;
93 u8 element_id;
94
95 u16 txfail;
96 u16 txok;
97
98 u16 txmcok;
99 u16 txretry;
100
101 u16 txucok;
102 u16 txbcok;
103
104 u16 txbcfail;
105 u16 txmcfail;
106
107 u16 reserve2;
108 u16 txucfail;
109
110 u32 txmclength;
111 u32 txbclength;
112 u32 txuclength;
113
114 u16 reserve3_23;
115 u8 reserve3_1;
116 u8 rate;
117}__attribute__((packed)) cmpk_tx_status_t;
118
119typedef struct tag_rx_debug_message_feedback
120{
121 u16 reserve1;
122 u8 length;
123 u8 element_id;
124
125
126}cmpk_rx_dbginfo_t;
127
128typedef struct tag_tx_rate_history
129{
130 u8 element_id;
131 u8 length;
132 u16 reserved1;
133
134 u16 cck[4];
135
136 u16 ofdm[8];
137
138
139
140
141
142 u16 ht_mcs[4][16];
143
144}__attribute__((packed)) cmpk_tx_rahis_t;
145
146typedef enum tag_command_packet_directories
147{
148 RX_TX_FEEDBACK = 0,
149 RX_INTERRUPT_STATUS = 1,
150 TX_SET_CONFIG = 2,
151 BOTH_QUERY_CONFIG = 3,
152 RX_TX_STATUS = 4,
153 RX_DBGINFO_FEEDBACK = 5,
154 RX_TX_PER_PKT_FEEDBACK = 6,
155 RX_TX_RATE_HISTORY = 7,
156 RX_CMD_ELE_MAX
157}cmpk_element_e;
158
159extern u32 cmpk_message_handle_rx(struct net_device *dev, struct rtllib_rx_stats * pstats);
160extern bool cmpk_message_handle_tx(struct net_device *dev, u8* codevirtualaddress, u32 packettype, u32 buffer_len);
161
162
163#endif
diff --git a/drivers/staging/rtl8192e/r8192E_core.c.porig b/drivers/staging/rtl8192e/r8192E_core.c.porig
new file mode 100644
index 00000000000..94d9c8d5d09
--- /dev/null
+++ b/drivers/staging/rtl8192e/r8192E_core.c.porig
@@ -0,0 +1,5039 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 * Linux device driver for RTL8192E
4 *
5 * Based on the r8180 driver, which is:
6 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 *
20 * The full GNU General Public License is included in this distribution in the
21 * file called LICENSE.
22 *
23 * Contact Information:
24 * Jerry chuang <wlanfae@realtek.com>
25 */
26
27
28#include <linux/vmalloc.h>
29#include <linux/slab.h>
30#include <linux/interrupt.h>
31#include <linux/hardirq.h>
32#include <asm/uaccess.h>
33#include "r8192E_hw.h"
34#include "r8192E.h"
35#include "r8190_rtl8256.h" /* RTL8225 Radio frontend */
36#include "r8180_93cx6.h" /* Card EEPROM */
37#include "r8192E_wx.h"
38#include "r819xE_phy.h" //added by WB 4.30.2008
39#include "r819xE_phyreg.h"
40#include "r819xE_cmdpkt.h"
41#include "r8192E_dm.h"
42
43#ifdef CONFIG_PM
44#include "r8192_pm.h"
45#endif
46
47#ifdef ENABLE_DOT11D
48#include "ieee80211/dot11d.h"
49#endif
50
51//set here to open your trace code. //WB
52u32 rt_global_debug_component = COMP_ERR ; //always open err flags on
53
54static DEFINE_PCI_DEVICE_TABLE(rtl8192_pci_id_tbl) = {
55 /* Realtek */
56 { PCI_DEVICE(0x10ec, 0x8192) },
57
58 /* Corega */
59 { PCI_DEVICE(0x07aa, 0x0044) },
60 { PCI_DEVICE(0x07aa, 0x0047) },
61 {}
62};
63
64static char ifname[IFNAMSIZ] = "wlan%d";
65static int hwwep = 1; //default use hw. set 0 to use software security
66static int channels = 0x3fff;
67
68MODULE_LICENSE("GPL");
69MODULE_VERSION("V 1.1");
70MODULE_DEVICE_TABLE(pci, rtl8192_pci_id_tbl);
71//MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
72MODULE_DESCRIPTION("Linux driver for Realtek RTL819x WiFi cards");
73
74
75module_param_string(ifname, ifname, sizeof(ifname), S_IRUGO|S_IWUSR);
76module_param(hwwep,int, S_IRUGO|S_IWUSR);
77module_param(channels,int, S_IRUGO|S_IWUSR);
78
79MODULE_PARM_DESC(ifname," Net interface name, wlan%d=default");
80MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
81MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
82
83static int __devinit rtl8192_pci_probe(struct pci_dev *pdev,
84 const struct pci_device_id *id);
85static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev);
86
87static struct pci_driver rtl8192_pci_driver = {
88 .name = RTL819xE_MODULE_NAME, /* Driver name */
89 .id_table = rtl8192_pci_id_tbl, /* PCI_ID table */
90 .probe = rtl8192_pci_probe, /* probe fn */
91 .remove = __devexit_p(rtl8192_pci_disconnect), /* remove fn */
92#ifdef CONFIG_PM
93 .suspend = rtl8192E_suspend, /* PM suspend fn */
94 .resume = rtl8192E_resume, /* PM resume fn */
95#else
96 .suspend = NULL, /* PM suspend fn */
97 .resume = NULL, /* PM resume fn */
98#endif
99};
100
101static void rtl8192_start_beacon(struct ieee80211_device *ieee80211);
102static void rtl8192_stop_beacon(struct ieee80211_device *ieee80211);
103static void rtl819x_watchdog_wqcallback(struct work_struct *work);
104static void rtl8192_irq_rx_tasklet(unsigned long arg);
105static void rtl8192_irq_tx_tasklet(unsigned long arg);
106static void rtl8192_prepare_beacon(unsigned long arg);
107static irqreturn_t rtl8192_interrupt(int irq, void *param);
108static void rtl819xE_tx_cmd(struct r8192_priv *priv, struct sk_buff *skb);
109static void rtl8192_update_ratr_table(struct r8192_priv *priv);
110static void rtl8192_restart(struct work_struct *work);
111static void watch_dog_timer_callback(unsigned long data);
112static int _rtl8192_up(struct r8192_priv *priv);
113static void rtl8192_cancel_deferred_work(struct r8192_priv* priv);
114static short rtl8192_tx(struct r8192_priv *priv, struct sk_buff* skb);
115
116#ifdef ENABLE_DOT11D
117
118typedef struct _CHANNEL_LIST
119{
120 u8 Channel[32];
121 u8 Len;
122}CHANNEL_LIST, *PCHANNEL_LIST;
123
124static const CHANNEL_LIST ChannelPlan[] = {
125 {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,149,153,157,161,165},24}, //FCC
126 {{1,2,3,4,5,6,7,8,9,10,11},11}, //IC
127 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //ETSI
128 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Spain. Change to ETSI.
129 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //France. Change to ETSI.
130 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, //MKK //MKK
131 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22},//MKK1
132 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Israel.
133 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, // For 11a , TELEC
134 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64}, 22}, //MIC
135 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14} //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
136};
137
138static void rtl819x_set_channel_map(u8 channel_plan, struct r8192_priv* priv)
139{
140 int i, max_chan=-1, min_chan=-1;
141 struct ieee80211_device* ieee = priv->ieee80211;
142 switch (channel_plan)
143 {
144 case COUNTRY_CODE_FCC:
145 case COUNTRY_CODE_IC:
146 case COUNTRY_CODE_ETSI:
147 case COUNTRY_CODE_SPAIN:
148 case COUNTRY_CODE_FRANCE:
149 case COUNTRY_CODE_MKK:
150 case COUNTRY_CODE_MKK1:
151 case COUNTRY_CODE_ISRAEL:
152 case COUNTRY_CODE_TELEC:
153 case COUNTRY_CODE_MIC:
154 {
155 Dot11d_Init(ieee);
156 ieee->bGlobalDomain = false;
157 //acturally 8225 & 8256 rf chip only support B,G,24N mode
158 min_chan = 1;
159 max_chan = 14;
160
161 if (ChannelPlan[channel_plan].Len != 0){
162 // Clear old channel map
163 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
164 // Set new channel map
165 for (i=0;i<ChannelPlan[channel_plan].Len;i++)
166 {
167 if (ChannelPlan[channel_plan].Channel[i] < min_chan || ChannelPlan[channel_plan].Channel[i] > max_chan)
168 break;
169 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
170 }
171 }
172 break;
173 }
174 case COUNTRY_CODE_GLOBAL_DOMAIN:
175 {
176 GET_DOT11D_INFO(ieee)->bEnabled = 0; //this flag enabled to follow 11d country IE setting, otherwise, it shall follow global domain setting
177 Dot11d_Reset(ieee);
178 ieee->bGlobalDomain = true;
179 break;
180 }
181 default:
182 break;
183 }
184}
185#endif
186
187static inline bool rx_hal_is_cck_rate(prx_fwinfo_819x_pci pdrvinfo)
188{
189 return (pdrvinfo->RxRate == DESC90_RATE1M ||
190 pdrvinfo->RxRate == DESC90_RATE2M ||
191 pdrvinfo->RxRate == DESC90_RATE5_5M ||
192 pdrvinfo->RxRate == DESC90_RATE11M) &&
193 !pdrvinfo->RxHT;
194}
195
196void CamResetAllEntry(struct r8192_priv* priv)
197{
198 write_nic_dword(priv, RWCAM, BIT31|BIT30);
199}
200
201void write_cam(struct r8192_priv *priv, u8 addr, u32 data)
202{
203 write_nic_dword(priv, WCAMI, data);
204 write_nic_dword(priv, RWCAM, BIT31|BIT16|(addr&0xff) );
205}
206
207u32 read_cam(struct r8192_priv *priv, u8 addr)
208{
209 write_nic_dword(priv, RWCAM, 0x80000000|(addr&0xff) );
210 return read_nic_dword(priv, 0xa8);
211}
212
213u8 read_nic_byte(struct r8192_priv *priv, int x)
214{
215 return 0xff & readb(priv->mem_start + x);
216}
217
218u32 read_nic_dword(struct r8192_priv *priv, int x)
219{
220 return readl(priv->mem_start + x);
221}
222
223u16 read_nic_word(struct r8192_priv *priv, int x)
224{
225 return readw(priv->mem_start + x);
226}
227
228void write_nic_byte(struct r8192_priv *priv, int x,u8 y)
229{
230 writeb(y, priv->mem_start + x);
231 udelay(20);
232}
233
234void write_nic_dword(struct r8192_priv *priv, int x,u32 y)
235{
236 writel(y, priv->mem_start + x);
237 udelay(20);
238}
239
240void write_nic_word(struct r8192_priv *priv, int x,u16 y)
241{
242 writew(y, priv->mem_start + x);
243 udelay(20);
244}
245
246u8 rtl8192e_ap_sec_type(struct ieee80211_device *ieee)
247{
248 static const u8 ccmp_ie[4] = {0x00,0x50,0xf2,0x04};
249 static const u8 ccmp_rsn_ie[4] = {0x00, 0x0f, 0xac, 0x04};
250 int wpa_ie_len= ieee->wpa_ie_len;
251 struct ieee80211_crypt_data* crypt;
252 int encrypt;
253
254 crypt = ieee->crypt[ieee->tx_keyidx];
255
256 encrypt = (ieee->current_network.capability & WLAN_CAPABILITY_PRIVACY) ||
257 (ieee->host_encrypt && crypt && crypt->ops &&
258 (0 == strcmp(crypt->ops->name,"WEP")));
259
260 /* simply judge */
261 if(encrypt && (wpa_ie_len == 0)) {
262 // wep encryption, no N mode setting */
263 return SEC_ALG_WEP;
264 } else if((wpa_ie_len != 0)) {
265 // parse pairwise key type */
266 if (((ieee->wpa_ie[0] == 0xdd) && (!memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) ||
267 ((ieee->wpa_ie[0] == 0x30) && (!memcmp(&ieee->wpa_ie[10],ccmp_rsn_ie, 4))))
268 return SEC_ALG_CCMP;
269 else
270 return SEC_ALG_TKIP;
271 } else {
272 return SEC_ALG_NONE;
273 }
274}
275
276void rtl8192e_SetHwReg(struct ieee80211_device *ieee80211, u8 variable, u8 *val)
277{
278 struct r8192_priv *priv = ieee80211_priv(ieee80211->dev);
279
280 switch(variable)
281 {
282
283 case HW_VAR_BSSID:
284 write_nic_dword(priv, BSSIDR, ((u32*)(val))[0]);
285 write_nic_word(priv, BSSIDR+2, ((u16*)(val+2))[0]);
286 break;
287
288 case HW_VAR_MEDIA_STATUS:
289 {
290 RT_OP_MODE OpMode = *((RT_OP_MODE *)(val));
291 u8 btMsr = read_nic_byte(priv, MSR);
292
293 btMsr &= 0xfc;
294
295 switch(OpMode)
296 {
297 case RT_OP_MODE_INFRASTRUCTURE:
298 btMsr |= MSR_INFRA;
299 break;
300
301 case RT_OP_MODE_IBSS:
302 btMsr |= MSR_ADHOC;
303 break;
304
305 case RT_OP_MODE_AP:
306 btMsr |= MSR_AP;
307 break;
308
309 default:
310 btMsr |= MSR_NOLINK;
311 break;
312 }
313
314 write_nic_byte(priv, MSR, btMsr);
315 }
316 break;
317
318 case HW_VAR_CHECK_BSSID:
319 {
320 u32 RegRCR, Type;
321
322 Type = ((u8*)(val))[0];
323 RegRCR = read_nic_dword(priv, RCR);
324 priv->ReceiveConfig = RegRCR;
325
326 if (Type == true)
327 RegRCR |= (RCR_CBSSID);
328 else if (Type == false)
329 RegRCR &= (~RCR_CBSSID);
330
331 write_nic_dword(priv, RCR,RegRCR);
332 priv->ReceiveConfig = RegRCR;
333
334 }
335 break;
336
337 case HW_VAR_SLOT_TIME:
338 {
339 priv->slot_time = val[0];
340 write_nic_byte(priv, SLOT_TIME, val[0]);
341
342 }
343 break;
344
345 case HW_VAR_ACK_PREAMBLE:
346 {
347 u32 regTmp = 0;
348 priv->short_preamble = (bool)(*(u8*)val );
349 regTmp = priv->basic_rate;
350 if (priv->short_preamble)
351 regTmp |= BRSR_AckShortPmb;
352 write_nic_dword(priv, RRSR, regTmp);
353 }
354 break;
355
356 case HW_VAR_CPU_RST:
357 write_nic_dword(priv, CPU_GEN, ((u32*)(val))[0]);
358 break;
359
360 default:
361 break;
362 }
363
364}
365
366static struct proc_dir_entry *rtl8192_proc = NULL;
367
368static int proc_get_stats_ap(char *page, char **start,
369 off_t offset, int count,
370 int *eof, void *data)
371{
372 struct r8192_priv *priv = data;
373 struct ieee80211_device *ieee = priv->ieee80211;
374 struct ieee80211_network *target;
375 int len = 0;
376
377 list_for_each_entry(target, &ieee->network_list, list) {
378
379 len += snprintf(page + len, count - len,
380 "%s ", target->ssid);
381
382 if(target->wpa_ie_len>0 || target->rsn_ie_len>0){
383 len += snprintf(page + len, count - len,
384 "WPA\n");
385 }
386 else{
387 len += snprintf(page + len, count - len,
388 "non_WPA\n");
389 }
390
391 }
392
393 *eof = 1;
394 return len;
395}
396
397static int proc_get_registers(char *page, char **start,
398 off_t offset, int count,
399 int *eof, void *data)
400{
401 struct r8192_priv *priv = data;
402 int len = 0;
403 int i,n;
404 int max=0xff;
405
406 /* This dump the current register page */
407 len += snprintf(page + len, count - len,
408 "\n####################page 0##################\n ");
409
410 for(n=0;n<=max;)
411 {
412 len += snprintf(page + len, count - len,
413 "\nD: %2x > ",n);
414
415 for(i=0;i<16 && n<=max;i++,n++)
416 len += snprintf(page + len, count - len,
417 "%2x ",read_nic_byte(priv,n));
418 }
419 len += snprintf(page + len, count - len,"\n");
420 len += snprintf(page + len, count - len,
421 "\n####################page 1##################\n ");
422 for(n=0;n<=max;)
423 {
424 len += snprintf(page + len, count - len,
425 "\nD: %2x > ",n);
426
427 for(i=0;i<16 && n<=max;i++,n++)
428 len += snprintf(page + len, count - len,
429 "%2x ",read_nic_byte(priv,0x100|n));
430 }
431
432 len += snprintf(page + len, count - len,
433 "\n####################page 3##################\n ");
434 for(n=0;n<=max;)
435 {
436 len += snprintf(page + len, count - len,
437 "\nD: %2x > ",n);
438
439 for(i=0;i<16 && n<=max;i++,n++)
440 len += snprintf(page + len, count - len,
441 "%2x ",read_nic_byte(priv,0x300|n));
442 }
443
444 *eof = 1;
445 return len;
446
447}
448
449static int proc_get_stats_tx(char *page, char **start,
450 off_t offset, int count,
451 int *eof, void *data)
452{
453 struct r8192_priv *priv = data;
454
455 int len = 0;
456
457 len += snprintf(page + len, count - len,
458 "TX VI priority ok int: %lu\n"
459 "TX VO priority ok int: %lu\n"
460 "TX BE priority ok int: %lu\n"
461 "TX BK priority ok int: %lu\n"
462 "TX MANAGE priority ok int: %lu\n"
463 "TX BEACON priority ok int: %lu\n"
464 "TX BEACON priority error int: %lu\n"
465 "TX CMDPKT priority ok int: %lu\n"
466 "TX queue stopped?: %d\n"
467 "TX fifo overflow: %lu\n"
468 "TX total data packets %lu\n"
469 "TX total data bytes :%lu\n",
470 priv->stats.txviokint,
471 priv->stats.txvookint,
472 priv->stats.txbeokint,
473 priv->stats.txbkokint,
474 priv->stats.txmanageokint,
475 priv->stats.txbeaconokint,
476 priv->stats.txbeaconerr,
477 priv->stats.txcmdpktokint,
478 netif_queue_stopped(priv->ieee80211->dev),
479 priv->stats.txoverflow,
480 priv->ieee80211->stats.tx_packets,
481 priv->ieee80211->stats.tx_bytes);
482
483 *eof = 1;
484 return len;
485}
486
487
488
489static int proc_get_stats_rx(char *page, char **start,
490 off_t offset, int count,
491 int *eof, void *data)
492{
493 struct r8192_priv *priv = data;
494 int len = 0;
495
496 len += snprintf(page + len, count - len,
497 "RX packets: %lu\n"
498 "RX desc err: %lu\n"
499 "RX rx overflow error: %lu\n",
500 priv->stats.rxint,
501 priv->stats.rxrdu,
502 priv->stats.rxoverflow);
503
504 *eof = 1;
505 return len;
506}
507
508static void rtl8192_proc_module_init(void)
509{
510 RT_TRACE(COMP_INIT, "Initializing proc filesystem\n");
511 rtl8192_proc = proc_mkdir(RTL819xE_MODULE_NAME, init_net.proc_net);
512}
513
514
515static void rtl8192_proc_module_remove(void)
516{
517 remove_proc_entry(RTL819xE_MODULE_NAME, init_net.proc_net);
518}
519
520
521static void rtl8192_proc_remove_one(struct r8192_priv *priv)
522{
523 struct net_device *dev = priv->ieee80211->dev;
524
525 printk("dev name=======> %s\n",dev->name);
526
527 if (priv->dir_dev) {
528 remove_proc_entry("stats-tx", priv->dir_dev);
529 remove_proc_entry("stats-rx", priv->dir_dev);
530 remove_proc_entry("stats-ap", priv->dir_dev);
531 remove_proc_entry("registers", priv->dir_dev);
532 remove_proc_entry("wlan0", rtl8192_proc);
533 priv->dir_dev = NULL;
534 }
535}
536
537
538static void rtl8192_proc_init_one(struct r8192_priv *priv)
539{
540 struct net_device *dev = priv->ieee80211->dev;
541 struct proc_dir_entry *e;
542
543 priv->dir_dev = proc_mkdir(dev->name, rtl8192_proc);
544 if (!priv->dir_dev) {
545 RT_TRACE(COMP_ERR, "Unable to initialize /proc/net/rtl8192/%s\n",
546 dev->name);
547 return;
548 }
549 e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
550 priv->dir_dev, proc_get_stats_rx, priv);
551
552 if (!e) {
553 RT_TRACE(COMP_ERR,"Unable to initialize "
554 "/proc/net/rtl8192/%s/stats-rx\n",
555 dev->name);
556 }
557
558
559 e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
560 priv->dir_dev, proc_get_stats_tx, priv);
561
562 if (!e) {
563 RT_TRACE(COMP_ERR, "Unable to initialize "
564 "/proc/net/rtl8192/%s/stats-tx\n",
565 dev->name);
566 }
567
568 e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO,
569 priv->dir_dev, proc_get_stats_ap, priv);
570
571 if (!e) {
572 RT_TRACE(COMP_ERR, "Unable to initialize "
573 "/proc/net/rtl8192/%s/stats-ap\n",
574 dev->name);
575 }
576
577 e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
578 priv->dir_dev, proc_get_registers, priv);
579 if (!e) {
580 RT_TRACE(COMP_ERR, "Unable to initialize "
581 "/proc/net/rtl8192/%s/registers\n",
582 dev->name);
583 }
584}
585
586static short check_nic_enough_desc(struct ieee80211_device *ieee, int prio)
587{
588 struct r8192_priv *priv = ieee80211_priv(ieee->dev);
589 struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
590
591 /* for now we reserve two free descriptor as a safety boundary
592 * between the tail and the head
593 */
594 return (ring->entries - skb_queue_len(&ring->queue) >= 2);
595}
596
597static void tx_timeout(struct net_device *dev)
598{
599 struct r8192_priv *priv = ieee80211_priv(dev);
600
601 schedule_work(&priv->reset_wq);
602 printk("TXTIMEOUT");
603}
604
605static void rtl8192_irq_enable(struct r8192_priv *priv)
606{
607 u32 mask;
608
609 mask = IMR_ROK | IMR_VODOK | IMR_VIDOK | IMR_BEDOK | IMR_BKDOK |
610 IMR_HCCADOK | IMR_MGNTDOK | IMR_COMDOK | IMR_HIGHDOK |
611 IMR_BDOK | IMR_RXCMDOK | IMR_TIMEOUT0 | IMR_RDU | IMR_RXFOVW |
612 IMR_TXFOVW | IMR_BcnInt | IMR_TBDOK | IMR_TBDER;
613
614 write_nic_dword(priv, INTA_MASK, mask);
615}
616
617static void rtl8192_irq_disable(struct r8192_priv *priv)
618{
619 write_nic_dword(priv, INTA_MASK, 0);
620 synchronize_irq(priv->irq);
621}
622
623static void rtl8192_update_msr(struct r8192_priv *priv)
624{
625 u8 msr;
626
627 msr = read_nic_byte(priv, MSR);
628 msr &= ~ MSR_LINK_MASK;
629
630 /* do not change in link_state != WLAN_LINK_ASSOCIATED.
631 * msr must be updated if the state is ASSOCIATING.
632 * this is intentional and make sense for ad-hoc and
633 * master (see the create BSS/IBSS func)
634 */
635 if (priv->ieee80211->state == IEEE80211_LINKED){
636
637 if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
638 msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
639 else if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
640 msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
641 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
642 msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
643
644 }else
645 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
646
647 write_nic_byte(priv, MSR, msr);
648}
649
650static void rtl8192_set_chan(struct ieee80211_device *ieee80211, short ch)
651{
652 struct r8192_priv *priv = ieee80211_priv(ieee80211->dev);
653
654 priv->chan = ch;
655
656 /* need to implement rf set channel here WB */
657
658 if (priv->rf_set_chan)
659 priv->rf_set_chan(ieee80211, priv->chan);
660}
661
662static void rtl8192_rx_enable(struct r8192_priv *priv)
663{
664 write_nic_dword(priv, RDQDA, priv->rx_ring_dma);
665}
666
667/* the TX_DESC_BASE setting is according to the following queue index
668 * BK_QUEUE ===> 0
669 * BE_QUEUE ===> 1
670 * VI_QUEUE ===> 2
671 * VO_QUEUE ===> 3
672 * HCCA_QUEUE ===> 4
673 * TXCMD_QUEUE ===> 5
674 * MGNT_QUEUE ===> 6
675 * HIGH_QUEUE ===> 7
676 * BEACON_QUEUE ===> 8
677 * */
678static const u32 TX_DESC_BASE[] = {BKQDA, BEQDA, VIQDA, VOQDA, HCCAQDA, CQDA, MQDA, HQDA, BQDA};
679static void rtl8192_tx_enable(struct r8192_priv *priv)
680{
681 u32 i;
682
683 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
684 write_nic_dword(priv, TX_DESC_BASE[i], priv->tx_ring[i].dma);
685
686 ieee80211_reset_queue(priv->ieee80211);
687}
688
689
690static void rtl8192_free_rx_ring(struct r8192_priv *priv)
691{
692 int i;
693
694 for (i = 0; i < priv->rxringcount; i++) {
695 struct sk_buff *skb = priv->rx_buf[i];
696 if (!skb)
697 continue;
698
699 pci_unmap_single(priv->pdev,
700 *((dma_addr_t *)skb->cb),
701 priv->rxbuffersize, PCI_DMA_FROMDEVICE);
702 kfree_skb(skb);
703 }
704
705 pci_free_consistent(priv->pdev, sizeof(*priv->rx_ring) * priv->rxringcount,
706 priv->rx_ring, priv->rx_ring_dma);
707 priv->rx_ring = NULL;
708}
709
710static void rtl8192_free_tx_ring(struct r8192_priv *priv, unsigned int prio)
711{
712 struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
713
714 while (skb_queue_len(&ring->queue)) {
715 tx_desc_819x_pci *entry = &ring->desc[ring->idx];
716 struct sk_buff *skb = __skb_dequeue(&ring->queue);
717
718 pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
719 skb->len, PCI_DMA_TODEVICE);
720 kfree_skb(skb);
721 ring->idx = (ring->idx + 1) % ring->entries;
722 }
723
724 pci_free_consistent(priv->pdev, sizeof(*ring->desc)*ring->entries,
725 ring->desc, ring->dma);
726 ring->desc = NULL;
727}
728
729void PHY_SetRtl8192eRfOff(struct r8192_priv *priv)
730{
731 //disable RF-Chip A/B
732 rtl8192_setBBreg(priv, rFPGA0_XA_RFInterfaceOE, BIT4, 0x0);
733 //analog to digital off, for power save
734 rtl8192_setBBreg(priv, rFPGA0_AnalogParameter4, 0x300, 0x0);
735 //digital to analog off, for power save
736 rtl8192_setBBreg(priv, rFPGA0_AnalogParameter1, 0x18, 0x0);
737 //rx antenna off
738 rtl8192_setBBreg(priv, rOFDM0_TRxPathEnable, 0xf, 0x0);
739 //rx antenna off
740 rtl8192_setBBreg(priv, rOFDM1_TRxPathEnable, 0xf, 0x0);
741 //analog to digital part2 off, for power save
742 rtl8192_setBBreg(priv, rFPGA0_AnalogParameter1, 0x60, 0x0);
743 rtl8192_setBBreg(priv, rFPGA0_AnalogParameter1, 0x4, 0x0);
744 // Analog parameter!!Change bias and Lbus control.
745 write_nic_byte(priv, ANAPAR_FOR_8192PciE, 0x07);
746}
747
748static void rtl8192_halt_adapter(struct r8192_priv *priv, bool reset)
749{
750 int i;
751 u8 OpMode;
752 u32 ulRegRead;
753
754 OpMode = RT_OP_MODE_NO_LINK;
755 priv->ieee80211->SetHwRegHandler(priv->ieee80211, HW_VAR_MEDIA_STATUS, &OpMode);
756
757 if (!priv->ieee80211->bSupportRemoteWakeUp) {
758 /*
759 * disable tx/rx. In 8185 we write 0x10 (Reset bit),
760 * but here we make reference to WMAC and wirte 0x0
761 */
762 write_nic_byte(priv, CMDR, 0);
763 }
764
765 mdelay(20);
766
767 if (!reset) {
768 mdelay(150);
769
770 priv->bHwRfOffAction = 2;
771
772 /*
773 * Call MgntActSet_RF_State instead to
774 * prevent RF config race condition.
775 */
776 if (!priv->ieee80211->bSupportRemoteWakeUp) {
777 PHY_SetRtl8192eRfOff(priv);
778 ulRegRead = read_nic_dword(priv, CPU_GEN);
779 ulRegRead |= CPU_GEN_SYSTEM_RESET;
780 write_nic_dword(priv,CPU_GEN, ulRegRead);
781 } else {
782 /* for WOL */
783 write_nic_dword(priv, WFCRC0, 0xffffffff);
784 write_nic_dword(priv, WFCRC1, 0xffffffff);
785 write_nic_dword(priv, WFCRC2, 0xffffffff);
786
787 /* Write PMR register */
788 write_nic_byte(priv, PMR, 0x5);
789 /* Disable tx, enanble rx */
790 write_nic_byte(priv, MacBlkCtrl, 0xa);
791 }
792 }
793
794 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
795 skb_queue_purge(&priv->ieee80211->skb_waitQ [i]);
796 }
797 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
798 skb_queue_purge(&priv->ieee80211->skb_aggQ [i]);
799 }
800
801 skb_queue_purge(&priv->skb_queue);
802}
803
804static void rtl8192_data_hard_stop(struct ieee80211_device *ieee80211)
805{
806}
807
808static void rtl8192_data_hard_resume(struct ieee80211_device *ieee80211)
809{
810}
811
812/*
813 * this function TX data frames when the ieee80211 stack requires this.
814 * It checks also if we need to stop the ieee tx queue, eventually do it
815 */
816static void rtl8192_hard_data_xmit(struct sk_buff *skb,
817 struct ieee80211_device *ieee80211, int rate)
818{
819 struct r8192_priv *priv = ieee80211_priv(ieee80211->dev);
820 int ret;
821 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
822 u8 queue_index = tcb_desc->queue_index;
823
824 /* shall not be referred by command packet */
825 BUG_ON(queue_index == TXCMD_QUEUE);
826
827 if (priv->bHwRadioOff || (!priv->up))
828 {
829 kfree_skb(skb);
830 return;
831 }
832
833 skb_push(skb, priv->ieee80211->tx_headroom);
834 ret = rtl8192_tx(priv, skb);
835 if (ret != 0) {
836 kfree_skb(skb);
837 }
838
839 if (queue_index != MGNT_QUEUE) {
840 priv->ieee80211->stats.tx_bytes += (skb->len - priv->ieee80211->tx_headroom);
841 priv->ieee80211->stats.tx_packets++;
842 }
843}
844
845/*
846 * This is a rough attempt to TX a frame
847 * This is called by the ieee 80211 stack to TX management frames.
848 * If the ring is full packet are dropped (for data frame the queue
849 * is stopped before this can happen).
850 */
851static int rtl8192_hard_start_xmit(struct sk_buff *skb, struct ieee80211_device *ieee80211)
852{
853 struct r8192_priv *priv = ieee80211_priv(ieee80211->dev);
854 int ret;
855 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
856 u8 queue_index = tcb_desc->queue_index;
857
858 if (queue_index != TXCMD_QUEUE) {
859 if (priv->bHwRadioOff || (!priv->up))
860 {
861 kfree_skb(skb);
862 return 0;
863 }
864 }
865
866 if (queue_index == TXCMD_QUEUE) {
867 rtl819xE_tx_cmd(priv, skb);
868 ret = 0;
869 return ret;
870 } else {
871 tcb_desc->RATRIndex = 7;
872 tcb_desc->bTxDisableRateFallBack = 1;
873 tcb_desc->bTxUseDriverAssingedRate = 1;
874 tcb_desc->bTxEnableFwCalcDur = 1;
875 skb_push(skb, ieee80211->tx_headroom);
876 ret = rtl8192_tx(priv, skb);
877 if (ret != 0) {
878 kfree_skb(skb);
879 }
880 }
881
882 return ret;
883}
884
885
886static void rtl8192_tx_isr(struct r8192_priv *priv, int prio)
887{
888 struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
889
890 while (skb_queue_len(&ring->queue)) {
891 tx_desc_819x_pci *entry = &ring->desc[ring->idx];
892 struct sk_buff *skb;
893
894 /*
895 * beacon packet will only use the first descriptor defaultly,
896 * and the OWN may not be cleared by the hardware
897 */
898 if (prio != BEACON_QUEUE) {
899 if (entry->OWN)
900 return;
901 ring->idx = (ring->idx + 1) % ring->entries;
902 }
903
904 skb = __skb_dequeue(&ring->queue);
905 pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
906 skb->len, PCI_DMA_TODEVICE);
907
908 kfree_skb(skb);
909 }
910
911 if (prio != BEACON_QUEUE) {
912 /* try to deal with the pending packets */
913 tasklet_schedule(&priv->irq_tx_tasklet);
914 }
915}
916
917static void rtl8192_stop_beacon(struct ieee80211_device *ieee80211)
918{
919}
920
921static void rtl8192_config_rate(struct r8192_priv *priv, u16* rate_config)
922{
923 struct ieee80211_network *net;
924 u8 i=0, basic_rate = 0;
925 net = & priv->ieee80211->current_network;
926
927 for (i=0; i<net->rates_len; i++)
928 {
929 basic_rate = net->rates[i]&0x7f;
930 switch(basic_rate)
931 {
932 case MGN_1M: *rate_config |= RRSR_1M; break;
933 case MGN_2M: *rate_config |= RRSR_2M; break;
934 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
935 case MGN_11M: *rate_config |= RRSR_11M; break;
936 case MGN_6M: *rate_config |= RRSR_6M; break;
937 case MGN_9M: *rate_config |= RRSR_9M; break;
938 case MGN_12M: *rate_config |= RRSR_12M; break;
939 case MGN_18M: *rate_config |= RRSR_18M; break;
940 case MGN_24M: *rate_config |= RRSR_24M; break;
941 case MGN_36M: *rate_config |= RRSR_36M; break;
942 case MGN_48M: *rate_config |= RRSR_48M; break;
943 case MGN_54M: *rate_config |= RRSR_54M; break;
944 }
945 }
946 for (i=0; i<net->rates_ex_len; i++)
947 {
948 basic_rate = net->rates_ex[i]&0x7f;
949 switch(basic_rate)
950 {
951 case MGN_1M: *rate_config |= RRSR_1M; break;
952 case MGN_2M: *rate_config |= RRSR_2M; break;
953 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
954 case MGN_11M: *rate_config |= RRSR_11M; break;
955 case MGN_6M: *rate_config |= RRSR_6M; break;
956 case MGN_9M: *rate_config |= RRSR_9M; break;
957 case MGN_12M: *rate_config |= RRSR_12M; break;
958 case MGN_18M: *rate_config |= RRSR_18M; break;
959 case MGN_24M: *rate_config |= RRSR_24M; break;
960 case MGN_36M: *rate_config |= RRSR_36M; break;
961 case MGN_48M: *rate_config |= RRSR_48M; break;
962 case MGN_54M: *rate_config |= RRSR_54M; break;
963 }
964 }
965}
966
967
968#define SHORT_SLOT_TIME 9
969#define NON_SHORT_SLOT_TIME 20
970
971static void rtl8192_update_cap(struct r8192_priv *priv, u16 cap)
972{
973 u32 tmp = 0;
974 struct ieee80211_network *net = &priv->ieee80211->current_network;
975
976 priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
977 tmp = priv->basic_rate;
978 if (priv->short_preamble)
979 tmp |= BRSR_AckShortPmb;
980 write_nic_dword(priv, RRSR, tmp);
981
982 if (net->mode & (IEEE_G|IEEE_N_24G))
983 {
984 u8 slot_time = 0;
985 if ((cap & WLAN_CAPABILITY_SHORT_SLOT)&&(!priv->ieee80211->pHTInfo->bCurrentRT2RTLongSlotTime))
986 {//short slot time
987 slot_time = SHORT_SLOT_TIME;
988 }
989 else //long slot time
990 slot_time = NON_SHORT_SLOT_TIME;
991 priv->slot_time = slot_time;
992 write_nic_byte(priv, SLOT_TIME, slot_time);
993 }
994
995}
996
997static void rtl8192_net_update(struct r8192_priv *priv)
998{
999 struct ieee80211_network *net;
1000 u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
1001 u16 rate_config = 0;
1002 net = &priv->ieee80211->current_network;
1003
1004 /* update Basic rate: RR, BRSR */
1005 rtl8192_config_rate(priv, &rate_config);
1006
1007 /*
1008 * Select RRSR (in Legacy-OFDM and CCK)
1009 * For 8190, we select only 24M, 12M, 6M, 11M, 5.5M,
1010 * 2M, and 1M from the Basic rate.
1011 * We do not use other rates.
1012 */
1013 priv->basic_rate = rate_config &= 0x15f;
1014
1015 /* BSSID */
1016 write_nic_dword(priv, BSSIDR, ((u32 *)net->bssid)[0]);
1017 write_nic_word(priv, BSSIDR+4, ((u16 *)net->bssid)[2]);
1018
1019 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1020 {
1021 write_nic_word(priv, ATIMWND, 2);
1022 write_nic_word(priv, BCN_DMATIME, 256);
1023 write_nic_word(priv, BCN_INTERVAL, net->beacon_interval);
1024 /*
1025 * BIT15 of BCN_DRV_EARLY_INT will indicate
1026 * whether software beacon or hw beacon is applied.
1027 */
1028 write_nic_word(priv, BCN_DRV_EARLY_INT, 10);
1029 write_nic_byte(priv, BCN_ERR_THRESH, 100);
1030
1031 BcnTimeCfg |= (BcnCW<<BCN_TCFG_CW_SHIFT);
1032 /* TODO: BcnIFS may required to be changed on ASIC */
1033 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
1034 write_nic_word(priv, BCN_TCFG, BcnTimeCfg);
1035 }
1036}
1037
1038static void rtl819xE_tx_cmd(struct r8192_priv *priv, struct sk_buff *skb)
1039{
1040 struct rtl8192_tx_ring *ring;
1041 tx_desc_819x_pci *entry;
1042 unsigned int idx;
1043 dma_addr_t mapping;
1044 cb_desc *tcb_desc;
1045 unsigned long flags;
1046
1047 ring = &priv->tx_ring[TXCMD_QUEUE];
1048 mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
1049
1050 spin_lock_irqsave(&priv->irq_th_lock,flags);
1051 idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
1052 entry = &ring->desc[idx];
1053
1054 tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1055 memset(entry,0,12);
1056 entry->LINIP = tcb_desc->bLastIniPkt;
1057 entry->FirstSeg = 1;//first segment
1058 entry->LastSeg = 1; //last segment
1059 if(tcb_desc->bCmdOrInit == DESC_PACKET_TYPE_INIT) {
1060 entry->CmdInit = DESC_PACKET_TYPE_INIT;
1061 } else {
1062 entry->CmdInit = DESC_PACKET_TYPE_NORMAL;
1063 entry->Offset = sizeof(TX_FWINFO_8190PCI) + 8;
1064 entry->PktSize = (u16)(tcb_desc->pkt_size + entry->Offset);
1065 entry->QueueSelect = QSLT_CMD;
1066 entry->TxFWInfoSize = 0x08;
1067 entry->RATid = (u8)DESC_PACKET_TYPE_INIT;
1068 }
1069 entry->TxBufferSize = skb->len;
1070 entry->TxBuffAddr = cpu_to_le32(mapping);
1071 entry->OWN = 1;
1072
1073 __skb_queue_tail(&ring->queue, skb);
1074 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
1075
1076 write_nic_byte(priv, TPPoll, TPPoll_CQ);
1077
1078 return;
1079}
1080
1081/*
1082 * Mapping Software/Hardware descriptor queue id to "Queue Select Field"
1083 * in TxFwInfo data structure
1084 */
1085static u8 MapHwQueueToFirmwareQueue(u8 QueueID)
1086{
1087 u8 QueueSelect = 0;
1088
1089 switch (QueueID) {
1090 case BE_QUEUE:
1091 QueueSelect = QSLT_BE;
1092 break;
1093
1094 case BK_QUEUE:
1095 QueueSelect = QSLT_BK;
1096 break;
1097
1098 case VO_QUEUE:
1099 QueueSelect = QSLT_VO;
1100 break;
1101
1102 case VI_QUEUE:
1103 QueueSelect = QSLT_VI;
1104 break;
1105
1106 case MGNT_QUEUE:
1107 QueueSelect = QSLT_MGNT;
1108 break;
1109
1110 case BEACON_QUEUE:
1111 QueueSelect = QSLT_BEACON;
1112 break;
1113
1114 case TXCMD_QUEUE:
1115 QueueSelect = QSLT_CMD;
1116 break;
1117
1118 case HIGH_QUEUE:
1119 default:
1120 RT_TRACE(COMP_ERR, "Impossible Queue Selection: %d\n", QueueID);
1121 break;
1122 }
1123 return QueueSelect;
1124}
1125
1126static u8 MRateToHwRate8190Pci(u8 rate)
1127{
1128 u8 ret = DESC90_RATE1M;
1129
1130 switch(rate) {
1131 case MGN_1M: ret = DESC90_RATE1M; break;
1132 case MGN_2M: ret = DESC90_RATE2M; break;
1133 case MGN_5_5M: ret = DESC90_RATE5_5M; break;
1134 case MGN_11M: ret = DESC90_RATE11M; break;
1135 case MGN_6M: ret = DESC90_RATE6M; break;
1136 case MGN_9M: ret = DESC90_RATE9M; break;
1137 case MGN_12M: ret = DESC90_RATE12M; break;
1138 case MGN_18M: ret = DESC90_RATE18M; break;
1139 case MGN_24M: ret = DESC90_RATE24M; break;
1140 case MGN_36M: ret = DESC90_RATE36M; break;
1141 case MGN_48M: ret = DESC90_RATE48M; break;
1142 case MGN_54M: ret = DESC90_RATE54M; break;
1143
1144 // HT rate since here
1145 case MGN_MCS0: ret = DESC90_RATEMCS0; break;
1146 case MGN_MCS1: ret = DESC90_RATEMCS1; break;
1147 case MGN_MCS2: ret = DESC90_RATEMCS2; break;
1148 case MGN_MCS3: ret = DESC90_RATEMCS3; break;
1149 case MGN_MCS4: ret = DESC90_RATEMCS4; break;
1150 case MGN_MCS5: ret = DESC90_RATEMCS5; break;
1151 case MGN_MCS6: ret = DESC90_RATEMCS6; break;
1152 case MGN_MCS7: ret = DESC90_RATEMCS7; break;
1153 case MGN_MCS8: ret = DESC90_RATEMCS8; break;
1154 case MGN_MCS9: ret = DESC90_RATEMCS9; break;
1155 case MGN_MCS10: ret = DESC90_RATEMCS10; break;
1156 case MGN_MCS11: ret = DESC90_RATEMCS11; break;
1157 case MGN_MCS12: ret = DESC90_RATEMCS12; break;
1158 case MGN_MCS13: ret = DESC90_RATEMCS13; break;
1159 case MGN_MCS14: ret = DESC90_RATEMCS14; break;
1160 case MGN_MCS15: ret = DESC90_RATEMCS15; break;
1161 case (0x80|0x20): ret = DESC90_RATEMCS32; break;
1162
1163 default: break;
1164 }
1165 return ret;
1166}
1167
1168
1169static u8 QueryIsShort(u8 TxHT, u8 TxRate, cb_desc *tcb_desc)
1170{
1171 u8 tmp_Short;
1172
1173 tmp_Short = (TxHT==1)?((tcb_desc->bUseShortGI)?1:0):((tcb_desc->bUseShortPreamble)?1:0);
1174
1175 if(TxHT==1 && TxRate != DESC90_RATEMCS15)
1176 tmp_Short = 0;
1177
1178 return tmp_Short;
1179}
1180
1181/*
1182 * The tx procedure is just as following,
1183 * skb->cb will contain all the following information,
1184 * priority, morefrag, rate, &dev.
1185 */
1186static short rtl8192_tx(struct r8192_priv *priv, struct sk_buff* skb)
1187{
1188 struct rtl8192_tx_ring *ring;
1189 unsigned long flags;
1190 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1191 tx_desc_819x_pci *pdesc = NULL;
1192 TX_FWINFO_8190PCI *pTxFwInfo = NULL;
1193 dma_addr_t mapping;
1194 bool multi_addr = false, broad_addr = false, uni_addr = false;
1195 u8 *pda_addr = NULL;
1196 int idx;
1197
1198 if (priv->bdisable_nic) {
1199 RT_TRACE(COMP_ERR, "Nic is disabled! Can't tx packet len=%d qidx=%d!!!\n",
1200 skb->len, tcb_desc->queue_index);
1201 return skb->len;
1202 }
1203
1204#ifdef ENABLE_LPS
1205 priv->ieee80211->bAwakePktSent = true;
1206#endif
1207
1208 mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
1209
1210 /* collect the tx packets statitcs */
1211 pda_addr = ((u8 *)skb->data) + sizeof(TX_FWINFO_8190PCI);
1212 if (is_multicast_ether_addr(pda_addr))
1213 multi_addr = true;
1214 else if (is_broadcast_ether_addr(pda_addr))
1215 broad_addr = true;
1216 else
1217 uni_addr = true;
1218
1219 if (uni_addr)
1220 priv->stats.txbytesunicast += (u8)(skb->len) - sizeof(TX_FWINFO_8190PCI);
1221
1222 /* fill tx firmware */
1223 pTxFwInfo = (PTX_FWINFO_8190PCI)skb->data;
1224 memset(pTxFwInfo, 0, sizeof(TX_FWINFO_8190PCI));
1225 pTxFwInfo->TxHT = (tcb_desc->data_rate&0x80) ? 1 : 0;
1226 pTxFwInfo->TxRate = MRateToHwRate8190Pci((u8)tcb_desc->data_rate);
1227 pTxFwInfo->EnableCPUDur = tcb_desc->bTxEnableFwCalcDur;
1228 pTxFwInfo->Short = QueryIsShort(pTxFwInfo->TxHT, pTxFwInfo->TxRate, tcb_desc);
1229
1230 /* Aggregation related */
1231 if (tcb_desc->bAMPDUEnable) {
1232 pTxFwInfo->AllowAggregation = 1;
1233 pTxFwInfo->RxMF = tcb_desc->ampdu_factor;
1234 pTxFwInfo->RxAMD = tcb_desc->ampdu_density;
1235 } else {
1236 pTxFwInfo->AllowAggregation = 0;
1237 pTxFwInfo->RxMF = 0;
1238 pTxFwInfo->RxAMD = 0;
1239 }
1240
1241 /* Protection mode related */
1242 pTxFwInfo->RtsEnable = (tcb_desc->bRTSEnable) ? 1 : 0;
1243 pTxFwInfo->CtsEnable = (tcb_desc->bCTSEnable) ? 1 : 0;
1244 pTxFwInfo->RtsSTBC = (tcb_desc->bRTSSTBC) ? 1 : 0;
1245 pTxFwInfo->RtsHT = (tcb_desc->rts_rate&0x80) ? 1 : 0;
1246 pTxFwInfo->RtsRate = MRateToHwRate8190Pci((u8)tcb_desc->rts_rate);
1247 pTxFwInfo->RtsBandwidth = 0;
1248 pTxFwInfo->RtsSubcarrier = tcb_desc->RTSSC;
1249 pTxFwInfo->RtsShort = (pTxFwInfo->RtsHT == 0) ? (tcb_desc->bRTSUseShortPreamble ? 1 : 0) : (tcb_desc->bRTSUseShortGI? 1 : 0);
1250
1251 /* Set Bandwidth and sub-channel settings. */
1252 if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40) {
1253 if (tcb_desc->bPacketBW) {
1254 pTxFwInfo->TxBandwidth = 1;
1255 /* use duplicated mode */
1256 pTxFwInfo->TxSubCarrier = 0;
1257 } else {
1258 pTxFwInfo->TxBandwidth = 0;
1259 pTxFwInfo->TxSubCarrier = priv->nCur40MhzPrimeSC;
1260 }
1261 } else {
1262 pTxFwInfo->TxBandwidth = 0;
1263 pTxFwInfo->TxSubCarrier = 0;
1264 }
1265
1266 spin_lock_irqsave(&priv->irq_th_lock, flags);
1267 ring = &priv->tx_ring[tcb_desc->queue_index];
1268 if (tcb_desc->queue_index != BEACON_QUEUE)
1269 idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
1270 else
1271 idx = 0;
1272
1273 pdesc = &ring->desc[idx];
1274 if ((pdesc->OWN == 1) && (tcb_desc->queue_index != BEACON_QUEUE)) {
1275 RT_TRACE(COMP_ERR, "No more TX desc@%d, ring->idx = %d,idx = %d,%x\n",
1276 tcb_desc->queue_index, ring->idx, idx, skb->len);
1277 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
1278 return skb->len;
1279 }
1280
1281 /* fill tx descriptor */
1282 memset(pdesc, 0, 12);
1283
1284 /*DWORD 0*/
1285 pdesc->LINIP = 0;
1286 pdesc->CmdInit = 1;
1287 pdesc->Offset = sizeof(TX_FWINFO_8190PCI) + 8; /* We must add 8!! */
1288 pdesc->PktSize = (u16)skb->len-sizeof(TX_FWINFO_8190PCI);
1289
1290 /*DWORD 1*/
1291 pdesc->SecCAMID = 0;
1292 pdesc->RATid = tcb_desc->RATRIndex;
1293
1294 pdesc->NoEnc = 1;
1295 pdesc->SecType = 0x0;
1296 if (tcb_desc->bHwSec) {
1297 switch (priv->ieee80211->pairwise_key_type) {
1298 case KEY_TYPE_WEP40:
1299 case KEY_TYPE_WEP104:
1300 pdesc->SecType = 0x1;
1301 pdesc->NoEnc = 0;
1302 break;
1303 case KEY_TYPE_TKIP:
1304 pdesc->SecType = 0x2;
1305 pdesc->NoEnc = 0;
1306 break;
1307 case KEY_TYPE_CCMP:
1308 pdesc->SecType = 0x3;
1309 pdesc->NoEnc = 0;
1310 break;
1311 case KEY_TYPE_NA:
1312 pdesc->SecType = 0x0;
1313 pdesc->NoEnc = 1;
1314 break;
1315 }
1316 }
1317
1318 /* Set Packet ID */
1319 pdesc->PktId = 0x0;
1320
1321 pdesc->QueueSelect = MapHwQueueToFirmwareQueue(tcb_desc->queue_index);
1322 pdesc->TxFWInfoSize = sizeof(TX_FWINFO_8190PCI);
1323
1324 pdesc->DISFB = tcb_desc->bTxDisableRateFallBack;
1325 pdesc->USERATE = tcb_desc->bTxUseDriverAssingedRate;
1326
1327 pdesc->FirstSeg = 1;
1328 pdesc->LastSeg = 1;
1329 pdesc->TxBufferSize = skb->len;
1330
1331 pdesc->TxBuffAddr = cpu_to_le32(mapping);
1332 __skb_queue_tail(&ring->queue, skb);
1333 pdesc->OWN = 1;
1334 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
1335 priv->ieee80211->dev->trans_start = jiffies;
1336 write_nic_word(priv, TPPoll, 0x01<<tcb_desc->queue_index);
1337 return 0;
1338}
1339
1340static short rtl8192_alloc_rx_desc_ring(struct r8192_priv *priv)
1341{
1342 rx_desc_819x_pci *entry = NULL;
1343 int i;
1344
1345 priv->rx_ring = pci_alloc_consistent(priv->pdev,
1346 sizeof(*priv->rx_ring) * priv->rxringcount, &priv->rx_ring_dma);
1347
1348 if (!priv->rx_ring || (unsigned long)priv->rx_ring & 0xFF) {
1349 RT_TRACE(COMP_ERR,"Cannot allocate RX ring\n");
1350 return -ENOMEM;
1351 }
1352
1353 memset(priv->rx_ring, 0, sizeof(*priv->rx_ring) * priv->rxringcount);
1354 priv->rx_idx = 0;
1355
1356 for (i = 0; i < priv->rxringcount; i++) {
1357 struct sk_buff *skb = dev_alloc_skb(priv->rxbuffersize);
1358 dma_addr_t *mapping;
1359 entry = &priv->rx_ring[i];
1360 if (!skb)
1361 return 0;
1362 priv->rx_buf[i] = skb;
1363 mapping = (dma_addr_t *)skb->cb;
1364 *mapping = pci_map_single(priv->pdev, skb_tail_pointer(skb),
1365 priv->rxbuffersize, PCI_DMA_FROMDEVICE);
1366
1367 entry->BufferAddress = cpu_to_le32(*mapping);
1368
1369 entry->Length = priv->rxbuffersize;
1370 entry->OWN = 1;
1371 }
1372
1373 entry->EOR = 1;
1374 return 0;
1375}
1376
1377static int rtl8192_alloc_tx_desc_ring(struct r8192_priv *priv,
1378 unsigned int prio, unsigned int entries)
1379{
1380 tx_desc_819x_pci *ring;
1381 dma_addr_t dma;
1382 int i;
1383
1384 ring = pci_alloc_consistent(priv->pdev, sizeof(*ring) * entries, &dma);
1385 if (!ring || (unsigned long)ring & 0xFF) {
1386 RT_TRACE(COMP_ERR, "Cannot allocate TX ring (prio = %d)\n", prio);
1387 return -ENOMEM;
1388 }
1389
1390 memset(ring, 0, sizeof(*ring)*entries);
1391 priv->tx_ring[prio].desc = ring;
1392 priv->tx_ring[prio].dma = dma;
1393 priv->tx_ring[prio].idx = 0;
1394 priv->tx_ring[prio].entries = entries;
1395 skb_queue_head_init(&priv->tx_ring[prio].queue);
1396
1397 for (i = 0; i < entries; i++)
1398 ring[i].NextDescAddress =
1399 cpu_to_le32((u32)dma + ((i + 1) % entries) * sizeof(*ring));
1400
1401 return 0;
1402}
1403
1404static short rtl8192_pci_initdescring(struct r8192_priv *priv)
1405{
1406 u32 ret;
1407 int i;
1408
1409 ret = rtl8192_alloc_rx_desc_ring(priv);
1410 if (ret)
1411 return ret;
1412
1413 /* general process for other queue */
1414 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
1415 ret = rtl8192_alloc_tx_desc_ring(priv, i, priv->txringcount);
1416 if (ret)
1417 goto err_free_rings;
1418 }
1419
1420 return 0;
1421
1422err_free_rings:
1423 rtl8192_free_rx_ring(priv);
1424 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
1425 if (priv->tx_ring[i].desc)
1426 rtl8192_free_tx_ring(priv, i);
1427 return 1;
1428}
1429
1430static void rtl8192_pci_resetdescring(struct r8192_priv *priv)
1431{
1432 int i;
1433
1434 /* force the rx_idx to the first one */
1435 if(priv->rx_ring) {
1436 rx_desc_819x_pci *entry = NULL;
1437 for (i = 0; i < priv->rxringcount; i++) {
1438 entry = &priv->rx_ring[i];
1439 entry->OWN = 1;
1440 }
1441 priv->rx_idx = 0;
1442 }
1443
1444 /* after reset, release previous pending packet, and force the
1445 * tx idx to the first one */
1446 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
1447 if (priv->tx_ring[i].desc) {
1448 struct rtl8192_tx_ring *ring = &priv->tx_ring[i];
1449
1450 while (skb_queue_len(&ring->queue)) {
1451 tx_desc_819x_pci *entry = &ring->desc[ring->idx];
1452 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1453
1454 pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
1455 skb->len, PCI_DMA_TODEVICE);
1456 kfree_skb(skb);
1457 ring->idx = (ring->idx + 1) % ring->entries;
1458 }
1459 ring->idx = 0;
1460 }
1461 }
1462}
1463
1464static void rtl8192_link_change(struct ieee80211_device *ieee)
1465{
1466 struct r8192_priv *priv = ieee80211_priv(ieee->dev);
1467
1468 if (ieee->state == IEEE80211_LINKED)
1469 {
1470 rtl8192_net_update(priv);
1471 rtl8192_update_ratr_table(priv);
1472
1473 //add this as in pure N mode, wep encryption will use software way, but there is no chance to set this as wep will not set group key in wext. WB.2008.07.08
1474 if ((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type))
1475 EnableHWSecurityConfig8192(priv);
1476 }
1477 else
1478 {
1479 write_nic_byte(priv, 0x173, 0);
1480 }
1481
1482 rtl8192_update_msr(priv);
1483
1484 // 2007/10/16 MH MAC Will update TSF according to all received beacon, so we have
1485 // // To set CBSSID bit when link with any AP or STA.
1486 if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC)
1487 {
1488 u32 reg = 0;
1489 reg = read_nic_dword(priv, RCR);
1490 if (priv->ieee80211->state == IEEE80211_LINKED)
1491 priv->ReceiveConfig = reg |= RCR_CBSSID;
1492 else
1493 priv->ReceiveConfig = reg &= ~RCR_CBSSID;
1494 write_nic_dword(priv, RCR, reg);
1495 }
1496}
1497
1498
1499static const struct ieee80211_qos_parameters def_qos_parameters = {
1500 {3,3,3,3},/* cw_min */
1501 {7,7,7,7},/* cw_max */
1502 {2,2,2,2},/* aifs */
1503 {0,0,0,0},/* flags */
1504 {0,0,0,0} /* tx_op_limit */
1505};
1506
1507static void rtl8192_update_beacon(struct work_struct * work)
1508{
1509 struct r8192_priv *priv = container_of(work, struct r8192_priv, update_beacon_wq.work);
1510 struct ieee80211_device* ieee = priv->ieee80211;
1511 struct ieee80211_network* net = &ieee->current_network;
1512
1513 if (ieee->pHTInfo->bCurrentHTSupport)
1514 HTUpdateSelfAndPeerSetting(ieee, net);
1515 ieee->pHTInfo->bCurrentRT2RTLongSlotTime = net->bssht.bdRT2RTLongSlotTime;
1516 rtl8192_update_cap(priv, net->capability);
1517}
1518
1519/*
1520* background support to run QoS activate functionality
1521*/
1522static const int WDCAPARA_ADD[] = {EDCAPARA_BE,EDCAPARA_BK,EDCAPARA_VI,EDCAPARA_VO};
1523static void rtl8192_qos_activate(struct work_struct * work)
1524{
1525 struct r8192_priv *priv = container_of(work, struct r8192_priv, qos_activate);
1526 struct ieee80211_qos_parameters *qos_parameters = &priv->ieee80211->current_network.qos_data.parameters;
1527 u8 mode = priv->ieee80211->current_network.mode;
1528 u8 u1bAIFS;
1529 u32 u4bAcParam;
1530 int i;
1531
1532 mutex_lock(&priv->mutex);
1533 if(priv->ieee80211->state != IEEE80211_LINKED)
1534 goto success;
1535 RT_TRACE(COMP_QOS,"qos active process with associate response received\n");
1536 /* It better set slot time at first */
1537 /* For we just support b/g mode at present, let the slot time at 9/20 selection */
1538 /* update the ac parameter to related registers */
1539 for(i = 0; i < QOS_QUEUE_NUM; i++) {
1540 //Mode G/A: slotTimeTimer = 9; Mode B: 20
1541 u1bAIFS = qos_parameters->aifs[i] * ((mode&(IEEE_G|IEEE_N_24G)) ?9:20) + aSifsTime;
1542 u4bAcParam = ((((u32)(qos_parameters->tx_op_limit[i]))<< AC_PARAM_TXOP_LIMIT_OFFSET)|
1543 (((u32)(qos_parameters->cw_max[i]))<< AC_PARAM_ECW_MAX_OFFSET)|
1544 (((u32)(qos_parameters->cw_min[i]))<< AC_PARAM_ECW_MIN_OFFSET)|
1545 ((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET));
1546 write_nic_dword(priv, WDCAPARA_ADD[i], u4bAcParam);
1547 }
1548
1549success:
1550 mutex_unlock(&priv->mutex);
1551}
1552
1553static int rtl8192_qos_handle_probe_response(struct r8192_priv *priv,
1554 int active_network,
1555 struct ieee80211_network *network)
1556{
1557 int ret = 0;
1558 u32 size = sizeof(struct ieee80211_qos_parameters);
1559
1560 if(priv->ieee80211->state !=IEEE80211_LINKED)
1561 return ret;
1562
1563 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
1564 return ret;
1565
1566 if (network->flags & NETWORK_HAS_QOS_MASK) {
1567 if (active_network &&
1568 (network->flags & NETWORK_HAS_QOS_PARAMETERS))
1569 network->qos_data.active = network->qos_data.supported;
1570
1571 if ((network->qos_data.active == 1) && (active_network == 1) &&
1572 (network->flags & NETWORK_HAS_QOS_PARAMETERS) &&
1573 (network->qos_data.old_param_count !=
1574 network->qos_data.param_count)) {
1575 network->qos_data.old_param_count =
1576 network->qos_data.param_count;
1577 queue_work(priv->priv_wq, &priv->qos_activate);
1578 RT_TRACE (COMP_QOS, "QoS parameters change call "
1579 "qos_activate\n");
1580 }
1581 } else {
1582 memcpy(&priv->ieee80211->current_network.qos_data.parameters,
1583 &def_qos_parameters, size);
1584
1585 if ((network->qos_data.active == 1) && (active_network == 1)) {
1586 queue_work(priv->priv_wq, &priv->qos_activate);
1587 RT_TRACE(COMP_QOS, "QoS was disabled call qos_activate\n");
1588 }
1589 network->qos_data.active = 0;
1590 network->qos_data.supported = 0;
1591 }
1592
1593 return 0;
1594}
1595
1596/* handle manage frame frame beacon and probe response */
1597static int rtl8192_handle_beacon(struct ieee80211_device *ieee,
1598 struct ieee80211_beacon * beacon,
1599 struct ieee80211_network * network)
1600{
1601 struct r8192_priv *priv = ieee80211_priv(ieee->dev);
1602
1603 rtl8192_qos_handle_probe_response(priv,1,network);
1604
1605 queue_delayed_work(priv->priv_wq, &priv->update_beacon_wq, 0);
1606 return 0;
1607
1608}
1609
1610/*
1611 * handling the beaconing responses. if we get different QoS setting
1612 * off the network from the associated setting, adjust the QoS setting
1613 */
1614static int rtl8192_qos_association_resp(struct r8192_priv *priv,
1615 struct ieee80211_network *network)
1616{
1617 int ret = 0;
1618 unsigned long flags;
1619 u32 size = sizeof(struct ieee80211_qos_parameters);
1620 int set_qos_param = 0;
1621
1622 if ((priv == NULL) || (network == NULL))
1623 return ret;
1624
1625 if (priv->ieee80211->state != IEEE80211_LINKED)
1626 return ret;
1627
1628 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
1629 return ret;
1630
1631 spin_lock_irqsave(&priv->ieee80211->lock, flags);
1632 if (network->flags & NETWORK_HAS_QOS_PARAMETERS) {
1633 memcpy(&priv->ieee80211->current_network.qos_data.parameters,
1634 &network->qos_data.parameters,
1635 sizeof(struct ieee80211_qos_parameters));
1636 priv->ieee80211->current_network.qos_data.active = 1;
1637 set_qos_param = 1;
1638 /* update qos parameter for current network */
1639 priv->ieee80211->current_network.qos_data.old_param_count =
1640 priv->ieee80211->current_network.qos_data.param_count;
1641 priv->ieee80211->current_network.qos_data.param_count =
1642 network->qos_data.param_count;
1643
1644 } else {
1645 memcpy(&priv->ieee80211->current_network.qos_data.parameters,
1646 &def_qos_parameters, size);
1647 priv->ieee80211->current_network.qos_data.active = 0;
1648 priv->ieee80211->current_network.qos_data.supported = 0;
1649 set_qos_param = 1;
1650 }
1651
1652 spin_unlock_irqrestore(&priv->ieee80211->lock, flags);
1653
1654 RT_TRACE(COMP_QOS, "%s: network->flags = %d,%d\n", __FUNCTION__,
1655 network->flags, priv->ieee80211->current_network.qos_data.active);
1656 if (set_qos_param == 1)
1657 queue_work(priv->priv_wq, &priv->qos_activate);
1658
1659 return ret;
1660}
1661
1662
1663static int rtl8192_handle_assoc_response(struct ieee80211_device *ieee,
1664 struct ieee80211_assoc_response_frame *resp,
1665 struct ieee80211_network *network)
1666{
1667 struct r8192_priv *priv = ieee80211_priv(ieee->dev);
1668 rtl8192_qos_association_resp(priv, network);
1669 return 0;
1670}
1671
1672
1673/* updateRATRTabel for MCS only. Basic rate is not implemented. */
1674static void rtl8192_update_ratr_table(struct r8192_priv* priv)
1675{
1676 struct ieee80211_device* ieee = priv->ieee80211;
1677 u8* pMcsRate = ieee->dot11HTOperationalRateSet;
1678 u32 ratr_value = 0;
1679 u8 rate_index = 0;
1680
1681 rtl8192_config_rate(priv, (u16*)(&ratr_value));
1682 ratr_value |= (*(u16*)(pMcsRate)) << 12;
1683
1684 switch (ieee->mode)
1685 {
1686 case IEEE_A:
1687 ratr_value &= 0x00000FF0;
1688 break;
1689 case IEEE_B:
1690 ratr_value &= 0x0000000F;
1691 break;
1692 case IEEE_G:
1693 ratr_value &= 0x00000FF7;
1694 break;
1695 case IEEE_N_24G:
1696 case IEEE_N_5G:
1697 if (ieee->pHTInfo->PeerMimoPs == 0) //MIMO_PS_STATIC
1698 ratr_value &= 0x0007F007;
1699 else{
1700 if (priv->rf_type == RF_1T2R)
1701 ratr_value &= 0x000FF007;
1702 else
1703 ratr_value &= 0x0F81F007;
1704 }
1705 break;
1706 default:
1707 break;
1708 }
1709 ratr_value &= 0x0FFFFFFF;
1710 if(ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI40MHz){
1711 ratr_value |= 0x80000000;
1712 }else if(!ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI20MHz){
1713 ratr_value |= 0x80000000;
1714 }
1715 write_nic_dword(priv, RATR0+rate_index*4, ratr_value);
1716 write_nic_byte(priv, UFWP, 1);
1717}
1718
1719static bool GetNmodeSupportBySecCfg8190Pci(struct ieee80211_device *ieee)
1720{
1721 return !(ieee->rtllib_ap_sec_type &&
1722 (ieee->rtllib_ap_sec_type(ieee)&(SEC_ALG_WEP|SEC_ALG_TKIP)));
1723}
1724
1725static void rtl8192_refresh_supportrate(struct r8192_priv* priv)
1726{
1727 struct ieee80211_device* ieee = priv->ieee80211;
1728 //we donot consider set support rate for ABG mode, only HT MCS rate is set here.
1729 if (ieee->mode == WIRELESS_MODE_N_24G || ieee->mode == WIRELESS_MODE_N_5G)
1730 {
1731 memcpy(ieee->Regdot11HTOperationalRateSet, ieee->RegHTSuppRateSet, 16);
1732 }
1733 else
1734 memset(ieee->Regdot11HTOperationalRateSet, 0, 16);
1735}
1736
1737static u8 rtl8192_getSupportedWireleeMode(void)
1738{
1739 return (WIRELESS_MODE_N_24G|WIRELESS_MODE_G|WIRELESS_MODE_B);
1740}
1741
1742static void rtl8192_SetWirelessMode(struct ieee80211_device *ieee, u8 wireless_mode)
1743{
1744 struct r8192_priv *priv = ieee80211_priv(ieee->dev);
1745 u8 bSupportMode = rtl8192_getSupportedWireleeMode();
1746
1747 if ((wireless_mode == WIRELESS_MODE_AUTO) || ((wireless_mode&bSupportMode)==0))
1748 {
1749 if(bSupportMode & WIRELESS_MODE_N_24G)
1750 {
1751 wireless_mode = WIRELESS_MODE_N_24G;
1752 }
1753 else if(bSupportMode & WIRELESS_MODE_N_5G)
1754 {
1755 wireless_mode = WIRELESS_MODE_N_5G;
1756 }
1757 else if((bSupportMode & WIRELESS_MODE_A))
1758 {
1759 wireless_mode = WIRELESS_MODE_A;
1760 }
1761 else if((bSupportMode & WIRELESS_MODE_G))
1762 {
1763 wireless_mode = WIRELESS_MODE_G;
1764 }
1765 else if((bSupportMode & WIRELESS_MODE_B))
1766 {
1767 wireless_mode = WIRELESS_MODE_B;
1768 }
1769 else{
1770 RT_TRACE(COMP_ERR, "%s(), No valid wireless mode supported, SupportedWirelessMode(%x)!!!\n", __FUNCTION__,bSupportMode);
1771 wireless_mode = WIRELESS_MODE_B;
1772 }
1773 }
1774 priv->ieee80211->mode = wireless_mode;
1775
1776 if ((wireless_mode == WIRELESS_MODE_N_24G) || (wireless_mode == WIRELESS_MODE_N_5G))
1777 priv->ieee80211->pHTInfo->bEnableHT = 1;
1778 else
1779 priv->ieee80211->pHTInfo->bEnableHT = 0;
1780 RT_TRACE(COMP_INIT, "Current Wireless Mode is %x\n", wireless_mode);
1781 rtl8192_refresh_supportrate(priv);
1782}
1783
1784static bool GetHalfNmodeSupportByAPs819xPci(struct ieee80211_device* ieee)
1785{
1786 return ieee->bHalfWirelessN24GMode;
1787}
1788
1789static short rtl8192_is_tx_queue_empty(struct ieee80211_device *ieee)
1790{
1791 int i=0;
1792 struct r8192_priv *priv = ieee80211_priv(ieee->dev);
1793
1794 for (i=0; i<=MGNT_QUEUE; i++)
1795 {
1796 if ((i== TXCMD_QUEUE) || (i == HCCA_QUEUE) )
1797 continue;
1798 if (skb_queue_len(&(&priv->tx_ring[i])->queue) > 0){
1799 printk("===>tx queue is not empty:%d, %d\n", i, skb_queue_len(&(&priv->tx_ring[i])->queue));
1800 return 0;
1801 }
1802 }
1803 return 1;
1804}
1805
1806static void rtl8192_hw_sleep_down(struct r8192_priv *priv)
1807{
1808 MgntActSet_RF_State(priv, eRfSleep, RF_CHANGE_BY_PS);
1809}
1810
1811static void rtl8192_hw_wakeup(struct ieee80211_device *ieee)
1812{
1813 struct r8192_priv *priv = ieee80211_priv(ieee->dev);
1814 MgntActSet_RF_State(priv, eRfOn, RF_CHANGE_BY_PS);
1815}
1816
1817static void rtl8192_hw_wakeup_wq (struct work_struct *work)
1818{
1819 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
1820 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq);
1821
1822 rtl8192_hw_wakeup(ieee);
1823}
1824
1825#define MIN_SLEEP_TIME 50
1826#define MAX_SLEEP_TIME 10000
1827static void rtl8192_hw_to_sleep(struct ieee80211_device *ieee, u32 th, u32 tl)
1828{
1829 struct r8192_priv *priv = ieee80211_priv(ieee->dev);
1830 u32 tmp;
1831 u32 rb = jiffies;
1832
1833 // Writing HW register with 0 equals to disable
1834 // the timer, that is not really what we want
1835 //
1836 tl -= MSECS(8+16+7);
1837
1838 // If the interval in witch we are requested to sleep is too
1839 // short then give up and remain awake
1840 // when we sleep after send null frame, the timer will be too short to sleep.
1841 //
1842 if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME))
1843 ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
1844 printk("too short to sleep::%x, %x, %lx\n",tl, rb, MSECS(MIN_SLEEP_TIME));
1845 return;
1846 }
1847
1848 if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))||
1849 ((tl < rb) && (tl>MSECS(69)) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))||
1850 ((tl<rb)&&(tl<MSECS(69))&&((tl+0xffffffff-rb)>MSECS(MAX_SLEEP_TIME)))) {
1851 printk("========>too long to sleep:%x, %x, %lx\n", tl, rb, MSECS(MAX_SLEEP_TIME));
1852 return;
1853 }
1854
1855 tmp = (tl>rb)?(tl-rb):(rb-tl);
1856 queue_delayed_work(priv->ieee80211->wq,
1857 &priv->ieee80211->hw_wakeup_wq,tmp);
1858
1859 rtl8192_hw_sleep_down(priv);
1860}
1861
1862static void rtl8192_init_priv_variable(struct r8192_priv *priv)
1863{
1864 u8 i;
1865 PRT_POWER_SAVE_CONTROL pPSC = &priv->PowerSaveControl;
1866
1867 // Default Halt the NIC if RF is OFF.
1868 pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_HALT_NIC;
1869 pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_CLK_REQ;
1870 pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_ASPM;
1871 pPSC->RegRfPsLevel |= RT_RF_LPS_LEVEL_ASPM;
1872 pPSC->bLeisurePs = true;
1873 priv->ieee80211->RegMaxLPSAwakeIntvl = 5;
1874 priv->bHwRadioOff = false;
1875
1876 priv->being_init_adapter = false;
1877 priv->txringcount = 64;//32;
1878 priv->rxbuffersize = 9100;//2048;//1024;
1879 priv->rxringcount = MAX_RX_COUNT;//64;
1880 priv->chan = 1; //set to channel 1
1881 priv->RegWirelessMode = WIRELESS_MODE_AUTO;
1882 priv->RegChannelPlan = 0xf;
1883 priv->ieee80211->mode = WIRELESS_MODE_AUTO; //SET AUTO
1884 priv->ieee80211->iw_mode = IW_MODE_INFRA;
1885 priv->ieee80211->ieee_up=0;
1886 priv->retry_rts = DEFAULT_RETRY_RTS;
1887 priv->retry_data = DEFAULT_RETRY_DATA;
1888 priv->ieee80211->rts = DEFAULT_RTS_THRESHOLD;
1889 priv->ieee80211->rate = 110; //11 mbps
1890 priv->ieee80211->short_slot = 1;
1891 priv->promisc = (priv->ieee80211->dev->flags & IFF_PROMISC) ? 1:0;
1892 priv->bcck_in_ch14 = false;
1893 priv->CCKPresentAttentuation = 0;
1894 priv->rfa_txpowertrackingindex = 0;
1895 priv->rfc_txpowertrackingindex = 0;
1896 priv->CckPwEnl = 6;
1897 //added by amy for silent reset
1898 priv->ResetProgress = RESET_TYPE_NORESET;
1899 priv->bForcedSilentReset = 0;
1900 priv->bDisableNormalResetCheck = false;
1901 priv->force_reset = false;
1902 //added by amy for power save
1903 priv->RfOffReason = 0;
1904 priv->bHwRfOffAction = 0;
1905 priv->PowerSaveControl.bInactivePs = true;
1906 priv->PowerSaveControl.bIPSModeBackup = false;
1907
1908 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
1909 priv->ieee80211->iw_mode = IW_MODE_INFRA;
1910 priv->ieee80211->softmac_features = IEEE_SOFTMAC_SCAN |
1911 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
1912 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;/* |
1913 IEEE_SOFTMAC_BEACONS;*///added by amy 080604 //| //IEEE_SOFTMAC_SINGLE_QUEUE;
1914
1915 priv->ieee80211->active_scan = 1;
1916 priv->ieee80211->modulation = IEEE80211_CCK_MODULATION | IEEE80211_OFDM_MODULATION;
1917 priv->ieee80211->host_encrypt = 1;
1918 priv->ieee80211->host_decrypt = 1;
1919 priv->ieee80211->start_send_beacons = rtl8192_start_beacon;
1920 priv->ieee80211->stop_send_beacons = rtl8192_stop_beacon;
1921 priv->ieee80211->softmac_hard_start_xmit = rtl8192_hard_start_xmit;
1922 priv->ieee80211->set_chan = rtl8192_set_chan;
1923 priv->ieee80211->link_change = rtl8192_link_change;
1924 priv->ieee80211->softmac_data_hard_start_xmit = rtl8192_hard_data_xmit;
1925 priv->ieee80211->data_hard_stop = rtl8192_data_hard_stop;
1926 priv->ieee80211->data_hard_resume = rtl8192_data_hard_resume;
1927 priv->ieee80211->init_wmmparam_flag = 0;
1928 priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
1929 priv->ieee80211->check_nic_enough_desc = check_nic_enough_desc;
1930 priv->ieee80211->tx_headroom = sizeof(TX_FWINFO_8190PCI);
1931 priv->ieee80211->qos_support = 1;
1932 priv->ieee80211->SetBWModeHandler = rtl8192_SetBWMode;
1933 priv->ieee80211->handle_assoc_response = rtl8192_handle_assoc_response;
1934 priv->ieee80211->handle_beacon = rtl8192_handle_beacon;
1935
1936 priv->ieee80211->sta_wake_up = rtl8192_hw_wakeup;
1937 priv->ieee80211->enter_sleep_state = rtl8192_hw_to_sleep;
1938 priv->ieee80211->ps_is_queue_empty = rtl8192_is_tx_queue_empty;
1939 priv->ieee80211->GetNmodeSupportBySecCfg = GetNmodeSupportBySecCfg8190Pci;
1940 priv->ieee80211->SetWirelessMode = rtl8192_SetWirelessMode;
1941 priv->ieee80211->GetHalfNmodeSupportByAPsHandler = GetHalfNmodeSupportByAPs819xPci;
1942
1943 priv->ieee80211->InitialGainHandler = InitialGain819xPci;
1944
1945#ifdef ENABLE_IPS
1946 priv->ieee80211->ieee80211_ips_leave_wq = ieee80211_ips_leave_wq;
1947 priv->ieee80211->ieee80211_ips_leave = ieee80211_ips_leave;
1948#endif
1949#ifdef ENABLE_LPS
1950 priv->ieee80211->LeisurePSLeave = LeisurePSLeave;
1951#endif
1952
1953 priv->ieee80211->SetHwRegHandler = rtl8192e_SetHwReg;
1954 priv->ieee80211->rtllib_ap_sec_type = rtl8192e_ap_sec_type;
1955
1956 priv->ShortRetryLimit = 0x30;
1957 priv->LongRetryLimit = 0x30;
1958
1959 priv->ReceiveConfig = RCR_ADD3 |
1960 RCR_AMF | RCR_ADF | //accept management/data
1961 RCR_AICV | //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
1962 RCR_AB | RCR_AM | RCR_APM | //accept BC/MC/UC
1963 RCR_AAP | ((u32)7<<RCR_MXDMA_OFFSET) |
1964 ((u32)7 << RCR_FIFO_OFFSET) | RCR_ONLYERLPKT;
1965
1966 priv->pFirmware = vzalloc(sizeof(rt_firmware));
1967
1968 /* rx related queue */
1969 skb_queue_head_init(&priv->skb_queue);
1970
1971 /* Tx related queue */
1972 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
1973 skb_queue_head_init(&priv->ieee80211->skb_waitQ [i]);
1974 }
1975 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
1976 skb_queue_head_init(&priv->ieee80211->skb_aggQ [i]);
1977 }
1978 priv->rf_set_chan = rtl8192_phy_SwChnl;
1979}
1980
1981static void rtl8192_init_priv_lock(struct r8192_priv* priv)
1982{
1983 spin_lock_init(&priv->irq_th_lock);
1984 spin_lock_init(&priv->rf_ps_lock);
1985 sema_init(&priv->wx_sem,1);
1986 sema_init(&priv->rf_sem,1);
1987 mutex_init(&priv->mutex);
1988}
1989
1990/* init tasklet and wait_queue here */
1991#define DRV_NAME "wlan0"
1992static void rtl8192_init_priv_task(struct r8192_priv *priv)
1993{
1994 priv->priv_wq = create_workqueue(DRV_NAME);
1995
1996#ifdef ENABLE_IPS
1997 INIT_WORK(&priv->ieee80211->ips_leave_wq, IPSLeave_wq);
1998#endif
1999
2000 INIT_WORK(&priv->reset_wq, rtl8192_restart);
2001 INIT_DELAYED_WORK(&priv->watch_dog_wq, rtl819x_watchdog_wqcallback);
2002 INIT_DELAYED_WORK(&priv->txpower_tracking_wq, dm_txpower_trackingcallback);
2003 INIT_DELAYED_WORK(&priv->rfpath_check_wq, dm_rf_pathcheck_workitemcallback);
2004 INIT_DELAYED_WORK(&priv->update_beacon_wq, rtl8192_update_beacon);
2005 INIT_WORK(&priv->qos_activate, rtl8192_qos_activate);
2006 INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq, rtl8192_hw_wakeup_wq);
2007
2008 tasklet_init(&priv->irq_rx_tasklet, rtl8192_irq_rx_tasklet,
2009 (unsigned long) priv);
2010 tasklet_init(&priv->irq_tx_tasklet, rtl8192_irq_tx_tasklet,
2011 (unsigned long) priv);
2012 tasklet_init(&priv->irq_prepare_beacon_tasklet, rtl8192_prepare_beacon,
2013 (unsigned long) priv);
2014}
2015
2016static void rtl8192_get_eeprom_size(struct r8192_priv *priv)
2017{
2018 u16 curCR = 0;
2019 RT_TRACE(COMP_INIT, "===========>%s()\n", __FUNCTION__);
2020 curCR = read_nic_dword(priv, EPROM_CMD);
2021 RT_TRACE(COMP_INIT, "read from Reg Cmd9346CR(%x):%x\n", EPROM_CMD, curCR);
2022 //whether need I consider BIT5?
2023 priv->epromtype = (curCR & EPROM_CMD_9356SEL) ? EPROM_93c56 : EPROM_93c46;
2024 RT_TRACE(COMP_INIT, "<===========%s(), epromtype:%d\n", __FUNCTION__, priv->epromtype);
2025}
2026
2027/*
2028 * Adapter->EEPROMAddressSize should be set before this function call.
2029 * EEPROM address size can be got through GetEEPROMSize8185()
2030 */
2031static void rtl8192_read_eeprom_info(struct r8192_priv *priv)
2032{
2033 struct net_device *dev = priv->ieee80211->dev;
2034 u8 tempval;
2035 u8 ICVer8192, ICVer8256;
2036 u16 i,usValue, IC_Version;
2037 u16 EEPROMId;
2038 u8 bMac_Tmp_Addr[6] = {0x00, 0xe0, 0x4c, 0x00, 0x00, 0x01};
2039 RT_TRACE(COMP_INIT, "====> rtl8192_read_eeprom_info\n");
2040
2041
2042 // TODO: I don't know if we need to apply EF function to EEPROM read function
2043
2044 //2 Read EEPROM ID to make sure autoload is success
2045 EEPROMId = eprom_read(priv, 0);
2046 if( EEPROMId != RTL8190_EEPROM_ID )
2047 {
2048 RT_TRACE(COMP_ERR, "EEPROM ID is invalid:%x, %x\n", EEPROMId, RTL8190_EEPROM_ID);
2049 priv->AutoloadFailFlag=true;
2050 }
2051 else
2052 {
2053 priv->AutoloadFailFlag=false;
2054 }
2055
2056 //
2057 // Assign Chip Version ID
2058 //
2059 // Read IC Version && Channel Plan
2060 if(!priv->AutoloadFailFlag)
2061 {
2062 // VID, PID
2063 priv->eeprom_vid = eprom_read(priv, (EEPROM_VID >> 1));
2064 priv->eeprom_did = eprom_read(priv, (EEPROM_DID >> 1));
2065
2066 usValue = eprom_read(priv, (u16)(EEPROM_Customer_ID>>1)) >> 8 ;
2067 priv->eeprom_CustomerID = (u8)( usValue & 0xff);
2068 usValue = eprom_read(priv, (EEPROM_ICVersion_ChannelPlan>>1));
2069 priv->eeprom_ChannelPlan = usValue&0xff;
2070 IC_Version = ((usValue&0xff00)>>8);
2071
2072 ICVer8192 = (IC_Version&0xf); //bit0~3; 1:A cut, 2:B cut, 3:C cut...
2073 ICVer8256 = ((IC_Version&0xf0)>>4);//bit4~6, bit7 reserved for other RF chip; 1:A cut, 2:B cut, 3:C cut...
2074 RT_TRACE(COMP_INIT, "ICVer8192 = 0x%x\n", ICVer8192);
2075 RT_TRACE(COMP_INIT, "ICVer8256 = 0x%x\n", ICVer8256);
2076 if(ICVer8192 == 0x2) //B-cut
2077 {
2078 if(ICVer8256 == 0x5) //E-cut
2079 priv->card_8192_version= VERSION_8190_BE;
2080 }
2081
2082 switch(priv->card_8192_version)
2083 {
2084 case VERSION_8190_BD:
2085 case VERSION_8190_BE:
2086 break;
2087 default:
2088 priv->card_8192_version = VERSION_8190_BD;
2089 break;
2090 }
2091 RT_TRACE(COMP_INIT, "\nIC Version = 0x%x\n", priv->card_8192_version);
2092 }
2093 else
2094 {
2095 priv->card_8192_version = VERSION_8190_BD;
2096 priv->eeprom_vid = 0;
2097 priv->eeprom_did = 0;
2098 priv->eeprom_CustomerID = 0;
2099 priv->eeprom_ChannelPlan = 0;
2100 RT_TRACE(COMP_INIT, "IC Version = 0x%x\n", 0xff);
2101 }
2102
2103 RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
2104 RT_TRACE(COMP_INIT, "EEPROM DID = 0x%4x\n", priv->eeprom_did);
2105 RT_TRACE(COMP_INIT,"EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
2106
2107 //2 Read Permanent MAC address
2108 if(!priv->AutoloadFailFlag)
2109 {
2110 for(i = 0; i < 6; i += 2)
2111 {
2112 usValue = eprom_read(priv, (u16) ((EEPROM_NODE_ADDRESS_BYTE_0+i)>>1));
2113 *(u16*)(&dev->dev_addr[i]) = usValue;
2114 }
2115 } else {
2116 // when auto load failed, the last address byte set to be a random one.
2117 // added by david woo.2007/11/7
2118 memcpy(dev->dev_addr, bMac_Tmp_Addr, 6);
2119 }
2120
2121 RT_TRACE(COMP_INIT, "Permanent Address = %pM\n", dev->dev_addr);
2122
2123 //2 TX Power Check EEPROM Fail or not
2124 if(priv->card_8192_version > VERSION_8190_BD) {
2125 priv->bTXPowerDataReadFromEEPORM = true;
2126 } else {
2127 priv->bTXPowerDataReadFromEEPORM = false;
2128 }
2129
2130 // 2007/11/15 MH 8190PCI Default=2T4R, 8192PCIE default=1T2R
2131 priv->rf_type = RTL819X_DEFAULT_RF_TYPE;
2132
2133 if(priv->card_8192_version > VERSION_8190_BD)
2134 {
2135 // Read RF-indication and Tx Power gain index diff of legacy to HT OFDM rate.
2136 if(!priv->AutoloadFailFlag)
2137 {
2138 tempval = (eprom_read(priv, (EEPROM_RFInd_PowerDiff>>1))) & 0xff;
2139 priv->EEPROMLegacyHTTxPowerDiff = tempval & 0xf; // bit[3:0]
2140
2141 if (tempval&0x80) //RF-indication, bit[7]
2142 priv->rf_type = RF_1T2R;
2143 else
2144 priv->rf_type = RF_2T4R;
2145 }
2146 else
2147 {
2148 priv->EEPROMLegacyHTTxPowerDiff = EEPROM_Default_LegacyHTTxPowerDiff;
2149 }
2150 RT_TRACE(COMP_INIT, "EEPROMLegacyHTTxPowerDiff = %d\n",
2151 priv->EEPROMLegacyHTTxPowerDiff);
2152
2153 // Read ThermalMeter from EEPROM
2154 if(!priv->AutoloadFailFlag)
2155 {
2156 priv->EEPROMThermalMeter = (u8)(((eprom_read(priv, (EEPROM_ThermalMeter>>1))) & 0xff00)>>8);
2157 }
2158 else
2159 {
2160 priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
2161 }
2162 RT_TRACE(COMP_INIT, "ThermalMeter = %d\n", priv->EEPROMThermalMeter);
2163 //vivi, for tx power track
2164 priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
2165
2166 if(priv->epromtype == EPROM_93c46)
2167 {
2168 // Read antenna tx power offset of B/C/D to A and CrystalCap from EEPROM
2169 if(!priv->AutoloadFailFlag)
2170 {
2171 usValue = eprom_read(priv, (EEPROM_TxPwDiff_CrystalCap>>1));
2172 priv->EEPROMAntPwDiff = (usValue&0x0fff);
2173 priv->EEPROMCrystalCap = (u8)((usValue&0xf000)>>12);
2174 }
2175 else
2176 {
2177 priv->EEPROMAntPwDiff = EEPROM_Default_AntTxPowerDiff;
2178 priv->EEPROMCrystalCap = EEPROM_Default_TxPwDiff_CrystalCap;
2179 }
2180 RT_TRACE(COMP_INIT, "EEPROMAntPwDiff = %d\n", priv->EEPROMAntPwDiff);
2181 RT_TRACE(COMP_INIT, "EEPROMCrystalCap = %d\n", priv->EEPROMCrystalCap);
2182
2183 //
2184 // Get per-channel Tx Power Level
2185 //
2186 for(i=0; i<14; i+=2)
2187 {
2188 if(!priv->AutoloadFailFlag)
2189 {
2190 usValue = eprom_read(priv, (u16) ((EEPROM_TxPwIndex_CCK+i)>>1) );
2191 }
2192 else
2193 {
2194 usValue = EEPROM_Default_TxPower;
2195 }
2196 *((u16*)(&priv->EEPROMTxPowerLevelCCK[i])) = usValue;
2197 RT_TRACE(COMP_INIT,"CCK Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelCCK[i]);
2198 RT_TRACE(COMP_INIT, "CCK Tx Power Level, Index %d = 0x%02x\n", i+1, priv->EEPROMTxPowerLevelCCK[i+1]);
2199 }
2200 for(i=0; i<14; i+=2)
2201 {
2202 if(!priv->AutoloadFailFlag)
2203 {
2204 usValue = eprom_read(priv, (u16) ((EEPROM_TxPwIndex_OFDM_24G+i)>>1) );
2205 }
2206 else
2207 {
2208 usValue = EEPROM_Default_TxPower;
2209 }
2210 *((u16*)(&priv->EEPROMTxPowerLevelOFDM24G[i])) = usValue;
2211 RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelOFDM24G[i]);
2212 RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i+1, priv->EEPROMTxPowerLevelOFDM24G[i+1]);
2213 }
2214 }
2215
2216 //
2217 // Update HAL variables.
2218 //
2219 if(priv->epromtype == EPROM_93c46)
2220 {
2221 for(i=0; i<14; i++)
2222 {
2223 priv->TxPowerLevelCCK[i] = priv->EEPROMTxPowerLevelCCK[i];
2224 priv->TxPowerLevelOFDM24G[i] = priv->EEPROMTxPowerLevelOFDM24G[i];
2225 }
2226 priv->LegacyHTTxPowerDiff = priv->EEPROMLegacyHTTxPowerDiff;
2227 // Antenna B gain offset to antenna A, bit0~3
2228 priv->AntennaTxPwDiff[0] = (priv->EEPROMAntPwDiff & 0xf);
2229 // Antenna C gain offset to antenna A, bit4~7
2230 priv->AntennaTxPwDiff[1] = ((priv->EEPROMAntPwDiff & 0xf0)>>4);
2231 // Antenna D gain offset to antenna A, bit8~11
2232 priv->AntennaTxPwDiff[2] = ((priv->EEPROMAntPwDiff & 0xf00)>>8);
2233 // CrystalCap, bit12~15
2234 priv->CrystalCap = priv->EEPROMCrystalCap;
2235 // ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
2236 priv->ThermalMeter[0] = (priv->EEPROMThermalMeter & 0xf);
2237 priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter & 0xf0)>>4);
2238 }
2239 else if(priv->epromtype == EPROM_93c56)
2240 {
2241 for(i=0; i<3; i++) // channel 1~3 use the same Tx Power Level.
2242 {
2243 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[0];
2244 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[0];
2245 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[0];
2246 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[0];
2247 }
2248 for(i=3; i<9; i++) // channel 4~9 use the same Tx Power Level
2249 {
2250 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[1];
2251 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[1];
2252 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[1];
2253 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[1];
2254 }
2255 for(i=9; i<14; i++) // channel 10~14 use the same Tx Power Level
2256 {
2257 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[2];
2258 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[2];
2259 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[2];
2260 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[2];
2261 }
2262 for(i=0; i<14; i++)
2263 RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_A[%d] = 0x%x\n", i, priv->TxPowerLevelCCK_A[i]);
2264 for(i=0; i<14; i++)
2265 RT_TRACE(COMP_INIT,"priv->TxPowerLevelOFDM24G_A[%d] = 0x%x\n", i, priv->TxPowerLevelOFDM24G_A[i]);
2266 for(i=0; i<14; i++)
2267 RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_C[%d] = 0x%x\n", i, priv->TxPowerLevelCCK_C[i]);
2268 for(i=0; i<14; i++)
2269 RT_TRACE(COMP_INIT, "priv->TxPowerLevelOFDM24G_C[%d] = 0x%x\n", i, priv->TxPowerLevelOFDM24G_C[i]);
2270 priv->LegacyHTTxPowerDiff = priv->EEPROMLegacyHTTxPowerDiff;
2271 priv->AntennaTxPwDiff[0] = 0;
2272 priv->AntennaTxPwDiff[1] = 0;
2273 priv->AntennaTxPwDiff[2] = 0;
2274 priv->CrystalCap = priv->EEPROMCrystalCap;
2275 // ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
2276 priv->ThermalMeter[0] = (priv->EEPROMThermalMeter & 0xf);
2277 priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter & 0xf0)>>4);
2278 }
2279 }
2280
2281 if(priv->rf_type == RF_1T2R)
2282 {
2283 RT_TRACE(COMP_INIT, "1T2R config\n");
2284 }
2285 else if (priv->rf_type == RF_2T4R)
2286 {
2287 RT_TRACE(COMP_INIT, "2T4R config\n");
2288 }
2289
2290 // 2008/01/16 MH We can only know RF type in the function. So we have to init
2291 // DIG RATR table again.
2292 init_rate_adaptive(priv);
2293
2294 //1 Make a copy for following variables and we can change them if we want
2295
2296 if(priv->RegChannelPlan == 0xf)
2297 {
2298 priv->ChannelPlan = priv->eeprom_ChannelPlan;
2299 }
2300 else
2301 {
2302 priv->ChannelPlan = priv->RegChannelPlan;
2303 }
2304
2305 //
2306 // Used PID and DID to Set CustomerID
2307 //
2308 if( priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304 )
2309 {
2310 priv->CustomerID = RT_CID_DLINK;
2311 }
2312
2313 switch(priv->eeprom_CustomerID)
2314 {
2315 case EEPROM_CID_DEFAULT:
2316 priv->CustomerID = RT_CID_DEFAULT;
2317 break;
2318 case EEPROM_CID_CAMEO:
2319 priv->CustomerID = RT_CID_819x_CAMEO;
2320 break;
2321 case EEPROM_CID_RUNTOP:
2322 priv->CustomerID = RT_CID_819x_RUNTOP;
2323 break;
2324 case EEPROM_CID_NetCore:
2325 priv->CustomerID = RT_CID_819x_Netcore;
2326 break;
2327 case EEPROM_CID_TOSHIBA: // Merge by Jacken, 2008/01/31
2328 priv->CustomerID = RT_CID_TOSHIBA;
2329 if(priv->eeprom_ChannelPlan&0x80)
2330 priv->ChannelPlan = priv->eeprom_ChannelPlan&0x7f;
2331 else
2332 priv->ChannelPlan = 0x0;
2333 RT_TRACE(COMP_INIT, "Toshiba ChannelPlan = 0x%x\n",
2334 priv->ChannelPlan);
2335 break;
2336 case EEPROM_CID_Nettronix:
2337 priv->CustomerID = RT_CID_Nettronix;
2338 break;
2339 case EEPROM_CID_Pronet:
2340 priv->CustomerID = RT_CID_PRONET;
2341 break;
2342 case EEPROM_CID_DLINK:
2343 priv->CustomerID = RT_CID_DLINK;
2344 break;
2345
2346 case EEPROM_CID_WHQL:
2347 break;
2348 default:
2349 // value from RegCustomerID
2350 break;
2351 }
2352
2353 //Avoid the channel plan array overflow, by Bruce, 2007-08-27.
2354 if(priv->ChannelPlan > CHANNEL_PLAN_LEN - 1)
2355 priv->ChannelPlan = 0; //FCC
2356
2357 if( priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304)
2358 priv->ieee80211->bSupportRemoteWakeUp = true;
2359 else
2360 priv->ieee80211->bSupportRemoteWakeUp = false;
2361
2362
2363 RT_TRACE(COMP_INIT, "RegChannelPlan(%d)\n", priv->RegChannelPlan);
2364 RT_TRACE(COMP_INIT, "ChannelPlan = %d\n", priv->ChannelPlan);
2365 RT_TRACE(COMP_TRACE, "<==== ReadAdapterInfo\n");
2366}
2367
2368
2369static short rtl8192_get_channel_map(struct r8192_priv *priv)
2370{
2371#ifdef ENABLE_DOT11D
2372 if(priv->ChannelPlan> COUNTRY_CODE_GLOBAL_DOMAIN){
2373 printk("rtl8180_init:Error channel plan! Set to default.\n");
2374 priv->ChannelPlan= 0;
2375 }
2376 RT_TRACE(COMP_INIT, "Channel plan is %d\n",priv->ChannelPlan);
2377
2378 rtl819x_set_channel_map(priv->ChannelPlan, priv);
2379#else
2380 int ch,i;
2381 //Set Default Channel Plan
2382 if(!channels){
2383 DMESG("No channels, aborting");
2384 return -1;
2385 }
2386 ch=channels;
2387 priv->ChannelPlan= 0;//hikaru
2388 // set channels 1..14 allowed in given locale
2389 for (i=1; i<=14; i++) {
2390 (priv->ieee80211->channel_map)[i] = (u8)(ch & 0x01);
2391 ch >>= 1;
2392 }
2393#endif
2394 return 0;
2395}
2396
2397static short rtl8192_init(struct r8192_priv *priv)
2398{
2399 struct net_device *dev = priv->ieee80211->dev;
2400
2401 memset(&(priv->stats),0,sizeof(struct Stats));
2402 rtl8192_init_priv_variable(priv);
2403 rtl8192_init_priv_lock(priv);
2404 rtl8192_init_priv_task(priv);
2405 rtl8192_get_eeprom_size(priv);
2406 rtl8192_read_eeprom_info(priv);
2407 rtl8192_get_channel_map(priv);
2408 init_hal_dm(priv);
2409 init_timer(&priv->watch_dog_timer);
2410 priv->watch_dog_timer.data = (unsigned long)priv;
2411 priv->watch_dog_timer.function = watch_dog_timer_callback;
2412 if (request_irq(dev->irq, rtl8192_interrupt, IRQF_SHARED, dev->name, priv)) {
2413 printk("Error allocating IRQ %d",dev->irq);
2414 return -1;
2415 }else{
2416 priv->irq=dev->irq;
2417 printk("IRQ %d",dev->irq);
2418 }
2419 if (rtl8192_pci_initdescring(priv) != 0){
2420 printk("Endopoints initialization failed");
2421 return -1;
2422 }
2423
2424 return 0;
2425}
2426
2427/*
2428 * Actually only set RRSR, RATR and BW_OPMODE registers
2429 * not to do all the hw config as its name says
2430 * This part need to modified according to the rate set we filtered
2431 */
2432static void rtl8192_hwconfig(struct r8192_priv *priv)
2433{
2434 u32 regRATR = 0, regRRSR = 0;
2435 u8 regBwOpMode = 0, regTmp = 0;
2436
2437// Set RRSR, RATR, and BW_OPMODE registers
2438 //
2439 switch (priv->ieee80211->mode)
2440 {
2441 case WIRELESS_MODE_B:
2442 regBwOpMode = BW_OPMODE_20MHZ;
2443 regRATR = RATE_ALL_CCK;
2444 regRRSR = RATE_ALL_CCK;
2445 break;
2446 case WIRELESS_MODE_A:
2447 regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
2448 regRATR = RATE_ALL_OFDM_AG;
2449 regRRSR = RATE_ALL_OFDM_AG;
2450 break;
2451 case WIRELESS_MODE_G:
2452 regBwOpMode = BW_OPMODE_20MHZ;
2453 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
2454 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
2455 break;
2456 case WIRELESS_MODE_AUTO:
2457 case WIRELESS_MODE_N_24G:
2458 // It support CCK rate by default.
2459 // CCK rate will be filtered out only when associated AP does not support it.
2460 regBwOpMode = BW_OPMODE_20MHZ;
2461 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
2462 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
2463 break;
2464 case WIRELESS_MODE_N_5G:
2465 regBwOpMode = BW_OPMODE_5G;
2466 regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
2467 regRRSR = RATE_ALL_OFDM_AG;
2468 break;
2469 }
2470
2471 write_nic_byte(priv, BW_OPMODE, regBwOpMode);
2472 {
2473 u32 ratr_value = 0;
2474 ratr_value = regRATR;
2475 if (priv->rf_type == RF_1T2R)
2476 {
2477 ratr_value &= ~(RATE_ALL_OFDM_2SS);
2478 }
2479 write_nic_dword(priv, RATR0, ratr_value);
2480 write_nic_byte(priv, UFWP, 1);
2481 }
2482 regTmp = read_nic_byte(priv, 0x313);
2483 regRRSR = ((regTmp) << 24) | (regRRSR & 0x00ffffff);
2484 write_nic_dword(priv, RRSR, regRRSR);
2485
2486 //
2487 // Set Retry Limit here
2488 //
2489 write_nic_word(priv, RETRY_LIMIT,
2490 priv->ShortRetryLimit << RETRY_LIMIT_SHORT_SHIFT |
2491 priv->LongRetryLimit << RETRY_LIMIT_LONG_SHIFT);
2492 // Set Contention Window here
2493
2494 // Set Tx AGC
2495
2496 // Set Tx Antenna including Feedback control
2497
2498 // Set Auto Rate fallback control
2499
2500
2501}
2502
2503
2504static RT_STATUS rtl8192_adapter_start(struct r8192_priv *priv)
2505{
2506 struct net_device *dev = priv->ieee80211->dev;
2507 u32 ulRegRead;
2508 RT_STATUS rtStatus = RT_STATUS_SUCCESS;
2509 u8 tmpvalue;
2510 u8 ICVersion,SwitchingRegulatorOutput;
2511 bool bfirmwareok = true;
2512 u32 tmpRegA, tmpRegC, TempCCk;
2513 int i =0;
2514
2515 RT_TRACE(COMP_INIT, "====>%s()\n", __FUNCTION__);
2516 priv->being_init_adapter = true;
2517 rtl8192_pci_resetdescring(priv);
2518 // 2007/11/02 MH Before initalizing RF. We can not use FW to do RF-R/W.
2519 priv->Rf_Mode = RF_OP_By_SW_3wire;
2520
2521 //dPLL on
2522 if(priv->ResetProgress == RESET_TYPE_NORESET)
2523 {
2524 write_nic_byte(priv, ANAPAR, 0x37);
2525 // Accordign to designer's explain, LBUS active will never > 10ms. We delay 10ms
2526 // Joseph increae the time to prevent firmware download fail
2527 mdelay(500);
2528 }
2529
2530 //PlatformSleepUs(10000);
2531 // For any kind of InitializeAdapter process, we shall use system now!!
2532 priv->pFirmware->firmware_status = FW_STATUS_0_INIT;
2533
2534 //
2535 //3 //Config CPUReset Register
2536 //3//
2537 //3 Firmware Reset Or Not
2538 ulRegRead = read_nic_dword(priv, CPU_GEN);
2539 if(priv->pFirmware->firmware_status == FW_STATUS_0_INIT)
2540 { //called from MPInitialized. do nothing
2541 ulRegRead |= CPU_GEN_SYSTEM_RESET;
2542 }else if(priv->pFirmware->firmware_status == FW_STATUS_5_READY)
2543 ulRegRead |= CPU_GEN_FIRMWARE_RESET; // Called from MPReset
2544 else
2545 RT_TRACE(COMP_ERR, "ERROR in %s(): undefined firmware state(%d)\n", __FUNCTION__, priv->pFirmware->firmware_status);
2546
2547 write_nic_dword(priv, CPU_GEN, ulRegRead);
2548
2549 //3//
2550 //3 //Fix the issue of E-cut high temperature issue
2551 //3//
2552 // TODO: E cut only
2553 ICVersion = read_nic_byte(priv, IC_VERRSION);
2554 if(ICVersion >= 0x4) //E-cut only
2555 {
2556 // HW SD suggest that we should not wirte this register too often, so driver
2557 // should readback this register. This register will be modified only when
2558 // power on reset
2559 SwitchingRegulatorOutput = read_nic_byte(priv, SWREGULATOR);
2560 if(SwitchingRegulatorOutput != 0xb8)
2561 {
2562 write_nic_byte(priv, SWREGULATOR, 0xa8);
2563 mdelay(1);
2564 write_nic_byte(priv, SWREGULATOR, 0xb8);
2565 }
2566 }
2567
2568 //3//
2569 //3// Initialize BB before MAC
2570 //3//
2571 RT_TRACE(COMP_INIT, "BB Config Start!\n");
2572 rtStatus = rtl8192_BBConfig(priv);
2573 if(rtStatus != RT_STATUS_SUCCESS)
2574 {
2575 RT_TRACE(COMP_ERR, "BB Config failed\n");
2576 return rtStatus;
2577 }
2578 RT_TRACE(COMP_INIT,"BB Config Finished!\n");
2579
2580 //3//Set Loopback mode or Normal mode
2581 //3//
2582 //2006.12.13 by emily. Note!We should not merge these two CPU_GEN register writings
2583 // because setting of System_Reset bit reset MAC to default transmission mode.
2584 //Loopback mode or not
2585 priv->LoopbackMode = RTL819X_NO_LOOPBACK;
2586 if(priv->ResetProgress == RESET_TYPE_NORESET)
2587 {
2588 ulRegRead = read_nic_dword(priv, CPU_GEN);
2589 if(priv->LoopbackMode == RTL819X_NO_LOOPBACK)
2590 {
2591 ulRegRead = ((ulRegRead & CPU_GEN_NO_LOOPBACK_MSK) | CPU_GEN_NO_LOOPBACK_SET);
2592 }
2593 else if (priv->LoopbackMode == RTL819X_MAC_LOOPBACK )
2594 {
2595 ulRegRead |= CPU_CCK_LOOPBACK;
2596 }
2597 else
2598 {
2599 RT_TRACE(COMP_ERR,"Serious error: wrong loopback mode setting\n");
2600 }
2601
2602 //2008.06.03, for WOL
2603 //ulRegRead &= (~(CPU_GEN_GPIO_UART));
2604 write_nic_dword(priv, CPU_GEN, ulRegRead);
2605
2606 // 2006.11.29. After reset cpu, we sholud wait for a second, otherwise, it may fail to write registers. Emily
2607 udelay(500);
2608 }
2609 //3Set Hardware(Do nothing now)
2610 rtl8192_hwconfig(priv);
2611 //2=======================================================
2612 // Common Setting for all of the FPGA platform. (part 1)
2613 //2=======================================================
2614 // If there is changes, please make sure it applies to all of the FPGA version
2615 //3 Turn on Tx/Rx
2616 write_nic_byte(priv, CMDR, CR_RE|CR_TE);
2617
2618 //2Set Tx dma burst
2619 write_nic_byte(priv, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) |
2620 (MXDMA2_NoLimit<<MXDMA2_TX_SHIFT) ));
2621
2622 //set IDR0 here
2623 write_nic_dword(priv, MAC0, ((u32*)dev->dev_addr)[0]);
2624 write_nic_word(priv, MAC4, ((u16*)(dev->dev_addr + 4))[0]);
2625 //set RCR
2626 write_nic_dword(priv, RCR, priv->ReceiveConfig);
2627
2628 //3 Initialize Number of Reserved Pages in Firmware Queue
2629 write_nic_dword(priv, RQPN1, NUM_OF_PAGE_IN_FW_QUEUE_BK << RSVD_FW_QUEUE_PAGE_BK_SHIFT |
2630 NUM_OF_PAGE_IN_FW_QUEUE_BE << RSVD_FW_QUEUE_PAGE_BE_SHIFT |
2631 NUM_OF_PAGE_IN_FW_QUEUE_VI << RSVD_FW_QUEUE_PAGE_VI_SHIFT |
2632 NUM_OF_PAGE_IN_FW_QUEUE_VO <<RSVD_FW_QUEUE_PAGE_VO_SHIFT);
2633 write_nic_dword(priv, RQPN2, NUM_OF_PAGE_IN_FW_QUEUE_MGNT << RSVD_FW_QUEUE_PAGE_MGNT_SHIFT);
2634 write_nic_dword(priv, RQPN3, APPLIED_RESERVED_QUEUE_IN_FW|
2635 NUM_OF_PAGE_IN_FW_QUEUE_BCN<<RSVD_FW_QUEUE_PAGE_BCN_SHIFT|
2636 NUM_OF_PAGE_IN_FW_QUEUE_PUB<<RSVD_FW_QUEUE_PAGE_PUB_SHIFT);
2637
2638 rtl8192_tx_enable(priv);
2639 rtl8192_rx_enable(priv);
2640 //3Set Response Rate Setting Register
2641 // CCK rate is supported by default.
2642 // CCK rate will be filtered out only when associated AP does not support it.
2643 ulRegRead = (0xFFF00000 & read_nic_dword(priv, RRSR)) | RATE_ALL_OFDM_AG | RATE_ALL_CCK;
2644 write_nic_dword(priv, RRSR, ulRegRead);
2645 write_nic_dword(priv, RATR0+4*7, (RATE_ALL_OFDM_AG | RATE_ALL_CCK));
2646
2647 //2Set AckTimeout
2648 // TODO: (it value is only for FPGA version). need to be changed!!2006.12.18, by Emily
2649 write_nic_byte(priv, ACK_TIMEOUT, 0x30);
2650
2651 if(priv->ResetProgress == RESET_TYPE_NORESET)
2652 rtl8192_SetWirelessMode(priv->ieee80211, priv->ieee80211->mode);
2653 //-----------------------------------------------------------------------------
2654 // Set up security related. 070106, by rcnjko:
2655 // 1. Clear all H/W keys.
2656 // 2. Enable H/W encryption/decryption.
2657 //-----------------------------------------------------------------------------
2658 CamResetAllEntry(priv);
2659 {
2660 u8 SECR_value = 0x0;
2661 SECR_value |= SCR_TxEncEnable;
2662 SECR_value |= SCR_RxDecEnable;
2663 SECR_value |= SCR_NoSKMC;
2664 write_nic_byte(priv, SECR, SECR_value);
2665 }
2666 //3Beacon related
2667 write_nic_word(priv, ATIMWND, 2);
2668 write_nic_word(priv, BCN_INTERVAL, 100);
2669 for (i=0; i<QOS_QUEUE_NUM; i++)
2670 write_nic_dword(priv, WDCAPARA_ADD[i], 0x005e4332);
2671 //
2672 // Switching regulator controller: This is set temporarily.
2673 // It's not sure if this can be removed in the future.
2674 // PJ advised to leave it by default.
2675 //
2676 write_nic_byte(priv, 0xbe, 0xc0);
2677
2678 //2=======================================================
2679 // Set PHY related configuration defined in MAC register bank
2680 //2=======================================================
2681 rtl8192_phy_configmac(priv);
2682
2683 if (priv->card_8192_version > (u8) VERSION_8190_BD) {
2684 rtl8192_phy_getTxPower(priv);
2685 rtl8192_phy_setTxPower(priv, priv->chan);
2686 }
2687
2688 //if D or C cut
2689 tmpvalue = read_nic_byte(priv, IC_VERRSION);
2690 priv->IC_Cut = tmpvalue;
2691 RT_TRACE(COMP_INIT, "priv->IC_Cut = 0x%x\n", priv->IC_Cut);
2692 if(priv->IC_Cut >= IC_VersionCut_D)
2693 {
2694 //pHalData->bDcut = TRUE;
2695 if(priv->IC_Cut == IC_VersionCut_D)
2696 RT_TRACE(COMP_INIT, "D-cut\n");
2697 if(priv->IC_Cut == IC_VersionCut_E)
2698 {
2699 RT_TRACE(COMP_INIT, "E-cut\n");
2700 // HW SD suggest that we should not wirte this register too often, so driver
2701 // should readback this register. This register will be modified only when
2702 // power on reset
2703 }
2704 }
2705 else
2706 {
2707 //pHalData->bDcut = FALSE;
2708 RT_TRACE(COMP_INIT, "Before C-cut\n");
2709 }
2710
2711 //Firmware download
2712 RT_TRACE(COMP_INIT, "Load Firmware!\n");
2713 bfirmwareok = init_firmware(priv);
2714 if(bfirmwareok != true) {
2715 rtStatus = RT_STATUS_FAILURE;
2716 return rtStatus;
2717 }
2718 RT_TRACE(COMP_INIT, "Load Firmware finished!\n");
2719
2720 //RF config
2721 if(priv->ResetProgress == RESET_TYPE_NORESET)
2722 {
2723 RT_TRACE(COMP_INIT, "RF Config Started!\n");
2724 rtStatus = rtl8192_phy_RFConfig(priv);
2725 if(rtStatus != RT_STATUS_SUCCESS)
2726 {
2727 RT_TRACE(COMP_ERR, "RF Config failed\n");
2728 return rtStatus;
2729 }
2730 RT_TRACE(COMP_INIT, "RF Config Finished!\n");
2731 }
2732 rtl8192_phy_updateInitGain(priv);
2733
2734 /*---- Set CCK and OFDM Block "ON"----*/
2735 rtl8192_setBBreg(priv, rFPGA0_RFMOD, bCCKEn, 0x1);
2736 rtl8192_setBBreg(priv, rFPGA0_RFMOD, bOFDMEn, 0x1);
2737
2738 //Enable Led
2739 write_nic_byte(priv, 0x87, 0x0);
2740
2741 //2=======================================================
2742 // RF Power Save
2743 //2=======================================================
2744#ifdef ENABLE_IPS
2745
2746{
2747 if(priv->RfOffReason > RF_CHANGE_BY_PS)
2748 { // H/W or S/W RF OFF before sleep.
2749 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RfOffReason(%d)\n", __FUNCTION__,priv->RfOffReason);
2750 MgntActSet_RF_State(priv, eRfOff, priv->RfOffReason);
2751 }
2752 else if(priv->RfOffReason >= RF_CHANGE_BY_IPS)
2753 { // H/W or S/W RF OFF before sleep.
2754 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RfOffReason(%d)\n", __FUNCTION__, priv->RfOffReason);
2755 MgntActSet_RF_State(priv, eRfOff, priv->RfOffReason);
2756 }
2757 else
2758 {
2759 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): RF-ON \n",__FUNCTION__);
2760 priv->eRFPowerState = eRfOn;
2761 priv->RfOffReason = 0;
2762 }
2763}
2764#endif
2765 // We can force firmware to do RF-R/W
2766 if(priv->ieee80211->FwRWRF)
2767 priv->Rf_Mode = RF_OP_By_FW;
2768 else
2769 priv->Rf_Mode = RF_OP_By_SW_3wire;
2770
2771 if(priv->ResetProgress == RESET_TYPE_NORESET)
2772 {
2773 dm_initialize_txpower_tracking(priv);
2774
2775 if(priv->IC_Cut >= IC_VersionCut_D)
2776 {
2777 tmpRegA = rtl8192_QueryBBReg(priv, rOFDM0_XATxIQImbalance, bMaskDWord);
2778 tmpRegC = rtl8192_QueryBBReg(priv, rOFDM0_XCTxIQImbalance, bMaskDWord);
2779 for(i = 0; i<TxBBGainTableLength; i++)
2780 {
2781 if(tmpRegA == priv->txbbgain_table[i].txbbgain_value)
2782 {
2783 priv->rfa_txpowertrackingindex= (u8)i;
2784 priv->rfa_txpowertrackingindex_real= (u8)i;
2785 priv->rfa_txpowertracking_default = priv->rfa_txpowertrackingindex;
2786 break;
2787 }
2788 }
2789
2790 TempCCk = rtl8192_QueryBBReg(priv, rCCK0_TxFilter1, bMaskByte2);
2791
2792 for(i=0 ; i<CCKTxBBGainTableLength ; i++)
2793 {
2794 if(TempCCk == priv->cck_txbbgain_table[i].ccktxbb_valuearray[0])
2795 {
2796 priv->CCKPresentAttentuation_20Mdefault =(u8) i;
2797 break;
2798 }
2799 }
2800 priv->CCKPresentAttentuation_40Mdefault = 0;
2801 priv->CCKPresentAttentuation_difference = 0;
2802 priv->CCKPresentAttentuation = priv->CCKPresentAttentuation_20Mdefault;
2803 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_initial = %d\n", priv->rfa_txpowertrackingindex);
2804 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_real__initial = %d\n", priv->rfa_txpowertrackingindex_real);
2805 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_difference_initial = %d\n", priv->CCKPresentAttentuation_difference);
2806 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_initial = %d\n", priv->CCKPresentAttentuation);
2807 priv->btxpower_tracking = FALSE;//TEMPLY DISABLE
2808 }
2809 }
2810
2811 rtl8192_irq_enable(priv);
2812 priv->being_init_adapter = false;
2813 return rtStatus;
2814
2815}
2816
2817static void rtl8192_prepare_beacon(unsigned long arg)
2818{
2819 struct r8192_priv *priv = (struct r8192_priv*) arg;
2820 struct sk_buff *skb;
2821 cb_desc *tcb_desc;
2822
2823 skb = ieee80211_get_beacon(priv->ieee80211);
2824 tcb_desc = (cb_desc *)(skb->cb + 8);
2825 /* prepare misc info for the beacon xmit */
2826 tcb_desc->queue_index = BEACON_QUEUE;
2827 /* IBSS does not support HT yet, use 1M defaultly */
2828 tcb_desc->data_rate = 2;
2829 tcb_desc->RATRIndex = 7;
2830 tcb_desc->bTxDisableRateFallBack = 1;
2831 tcb_desc->bTxUseDriverAssingedRate = 1;
2832
2833 skb_push(skb, priv->ieee80211->tx_headroom);
2834 if(skb){
2835 rtl8192_tx(priv, skb);
2836 }
2837}
2838
2839
2840/*
2841 * configure registers for beacon tx and enables it via
2842 * rtl8192_beacon_tx_enable(). rtl8192_beacon_tx_disable() might
2843 * be used to stop beacon transmission
2844 */
2845static void rtl8192_start_beacon(struct ieee80211_device *ieee80211)
2846{
2847 struct r8192_priv *priv = ieee80211_priv(ieee80211->dev);
2848 struct ieee80211_network *net = &priv->ieee80211->current_network;
2849 u16 BcnTimeCfg = 0;
2850 u16 BcnCW = 6;
2851 u16 BcnIFS = 0xf;
2852
2853 DMESG("Enabling beacon TX");
2854 rtl8192_irq_disable(priv);
2855 //rtl8192_beacon_tx_enable(dev);
2856
2857 /* ATIM window */
2858 write_nic_word(priv, ATIMWND, 2);
2859
2860 /* Beacon interval (in unit of TU) */
2861 write_nic_word(priv, BCN_INTERVAL, net->beacon_interval);
2862
2863 /*
2864 * DrvErlyInt (in unit of TU).
2865 * (Time to send interrupt to notify driver to c
2866 * hange beacon content)
2867 * */
2868 write_nic_word(priv, BCN_DRV_EARLY_INT, 10);
2869
2870 /*
2871 * BcnDMATIM(in unit of us).
2872 * Indicates the time before TBTT to perform beacon queue DMA
2873 * */
2874 write_nic_word(priv, BCN_DMATIME, 256);
2875
2876 /*
2877 * Force beacon frame transmission even after receiving
2878 * beacon frame from other ad hoc STA
2879 * */
2880 write_nic_byte(priv, BCN_ERR_THRESH, 100);
2881
2882 /* Set CW and IFS */
2883 BcnTimeCfg |= BcnCW<<BCN_TCFG_CW_SHIFT;
2884 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
2885 write_nic_word(priv, BCN_TCFG, BcnTimeCfg);
2886
2887
2888 /* enable the interrupt for ad-hoc process */
2889 rtl8192_irq_enable(priv);
2890}
2891
2892static bool HalRxCheckStuck8190Pci(struct r8192_priv *priv)
2893{
2894 u16 RegRxCounter = read_nic_word(priv, 0x130);
2895 bool bStuck = FALSE;
2896
2897 RT_TRACE(COMP_RESET,"%s(): RegRxCounter is %d,RxCounter is %d\n",__FUNCTION__,RegRxCounter,priv->RxCounter);
2898 // If rssi is small, we should check rx for long time because of bad rx.
2899 // or maybe it will continuous silent reset every 2 seconds.
2900 priv->rx_chk_cnt++;
2901 if(priv->undecorated_smoothed_pwdb >= (RateAdaptiveTH_High+5))
2902 {
2903 priv->rx_chk_cnt = 0; /* high rssi, check rx stuck right now. */
2904 }
2905 else if(priv->undecorated_smoothed_pwdb < (RateAdaptiveTH_High+5) &&
2906 ((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_40M) ||
2907 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_20M)) )
2908
2909 {
2910 if(priv->rx_chk_cnt < 2)
2911 {
2912 return bStuck;
2913 }
2914 else
2915 {
2916 priv->rx_chk_cnt = 0;
2917 }
2918 }
2919 else if(((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_40M) ||
2920 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_20M)) &&
2921 priv->undecorated_smoothed_pwdb >= VeryLowRSSI)
2922 {
2923 if(priv->rx_chk_cnt < 4)
2924 {
2925 return bStuck;
2926 }
2927 else
2928 {
2929 priv->rx_chk_cnt = 0;
2930 }
2931 }
2932 else
2933 {
2934 if(priv->rx_chk_cnt < 8)
2935 {
2936 return bStuck;
2937 }
2938 else
2939 {
2940 priv->rx_chk_cnt = 0;
2941 }
2942 }
2943 if(priv->RxCounter==RegRxCounter)
2944 bStuck = TRUE;
2945
2946 priv->RxCounter = RegRxCounter;
2947
2948 return bStuck;
2949}
2950
2951static RESET_TYPE RxCheckStuck(struct r8192_priv *priv)
2952{
2953
2954 if(HalRxCheckStuck8190Pci(priv))
2955 {
2956 RT_TRACE(COMP_RESET, "RxStuck Condition\n");
2957 return RESET_TYPE_SILENT;
2958 }
2959
2960 return RESET_TYPE_NORESET;
2961}
2962
2963static RESET_TYPE rtl819x_check_reset(struct r8192_priv *priv)
2964{
2965 RESET_TYPE RxResetType = RESET_TYPE_NORESET;
2966 RT_RF_POWER_STATE rfState;
2967
2968 rfState = priv->eRFPowerState;
2969
2970 if (rfState != eRfOff && (priv->ieee80211->iw_mode != IW_MODE_ADHOC)) {
2971 /*
2972 * If driver is in the status of firmware download failure,
2973 * driver skips RF initialization and RF is in turned off state.
2974 * Driver should check whether Rx stuck and do silent reset. And
2975 * if driver is in firmware download failure status, driver
2976 * should initialize RF in the following silent reset procedure
2977 *
2978 * Driver should not check RX stuck in IBSS mode because it is
2979 * required to set Check BSSID in order to send beacon, however,
2980 * if check BSSID is set, STA cannot hear any packet a all.
2981 */
2982 RxResetType = RxCheckStuck(priv);
2983 }
2984
2985 RT_TRACE(COMP_RESET, "%s(): RxResetType is %d\n", __FUNCTION__, RxResetType);
2986
2987 return RxResetType;
2988}
2989
2990#ifdef ENABLE_IPS
2991static void InactivePsWorkItemCallback(struct r8192_priv *priv)
2992{
2993 PRT_POWER_SAVE_CONTROL pPSC = &priv->PowerSaveControl;
2994
2995 RT_TRACE(COMP_POWER, "InactivePsWorkItemCallback() --------->\n");
2996 //
2997 // This flag "bSwRfProcessing", indicates the status of IPS procedure, should be set if the IPS workitem
2998 // is really scheduled.
2999 // The old code, sets this flag before scheduling the IPS workitem and however, at the same time the
3000 // previous IPS workitem did not end yet, fails to schedule the current workitem. Thus, bSwRfProcessing
3001 // blocks the IPS procedure of switching RF.
3002 // By Bruce, 2007-12-25.
3003 //
3004 pPSC->bSwRfProcessing = TRUE;
3005
3006 RT_TRACE(COMP_RF, "InactivePsWorkItemCallback(): Set RF to %s.\n",
3007 pPSC->eInactivePowerState == eRfOff?"OFF":"ON");
3008
3009
3010 MgntActSet_RF_State(priv, pPSC->eInactivePowerState, RF_CHANGE_BY_IPS);
3011
3012 //
3013 // To solve CAM values miss in RF OFF, rewrite CAM values after RF ON. By Bruce, 2007-09-20.
3014 //
3015 pPSC->bSwRfProcessing = FALSE;
3016 RT_TRACE(COMP_POWER, "InactivePsWorkItemCallback() <---------\n");
3017}
3018
3019#ifdef ENABLE_LPS
3020/* Change current and default preamble mode. */
3021bool MgntActSet_802_11_PowerSaveMode(struct r8192_priv *priv, u8 rtPsMode)
3022{
3023
3024 // Currently, we do not change power save mode on IBSS mode.
3025 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3026 {
3027 return false;
3028 }
3029
3030 //
3031 // <RJ_NOTE> If we make HW to fill up the PwrMgt bit for us,
3032 // some AP will not response to our mgnt frames with PwrMgt bit set,
3033 // e.g. cannot associate the AP.
3034 // So I commented out it. 2005.02.16, by rcnjko.
3035 //
3036// // Change device's power save mode.
3037// Adapter->HalFunc.SetPSModeHandler( Adapter, rtPsMode );
3038
3039 // Update power save mode configured.
3040 //RT_TRACE(COMP_LPS,"%s(): set ieee->ps = %x\n",__FUNCTION__,rtPsMode);
3041 if(!priv->ps_force) {
3042 priv->ieee80211->ps = rtPsMode;
3043 }
3044
3045 // Awake immediately
3046 if(priv->ieee80211->sta_sleep != 0 && rtPsMode == IEEE80211_PS_DISABLED)
3047 {
3048 // Notify the AP we awke.
3049 rtl8192_hw_wakeup(priv->ieee80211);
3050 priv->ieee80211->sta_sleep = 0;
3051
3052 spin_lock(&priv->ieee80211->mgmt_tx_lock);
3053 printk("LPS leave: notify AP we are awaked ++++++++++ SendNullFunctionData\n");
3054 ieee80211_sta_ps_send_null_frame(priv->ieee80211, 0);
3055 spin_unlock(&priv->ieee80211->mgmt_tx_lock);
3056 }
3057
3058 return true;
3059}
3060
3061/* Enter the leisure power save mode. */
3062void LeisurePSEnter(struct ieee80211_device *ieee80211)
3063{
3064 struct r8192_priv *priv = ieee80211_priv(ieee80211->dev);
3065 PRT_POWER_SAVE_CONTROL pPSC = &priv->PowerSaveControl;
3066
3067 if(!((priv->ieee80211->iw_mode == IW_MODE_INFRA) &&
3068 (priv->ieee80211->state == IEEE80211_LINKED)) ||
3069 (priv->ieee80211->iw_mode == IW_MODE_ADHOC) ||
3070 (priv->ieee80211->iw_mode == IW_MODE_MASTER))
3071 return;
3072
3073 if (pPSC->bLeisurePs)
3074 {
3075 // Idle for a while if we connect to AP a while ago.
3076 if(pPSC->LpsIdleCount >= RT_CHECK_FOR_HANG_PERIOD) // 4 Sec
3077 {
3078
3079 if(priv->ieee80211->ps == IEEE80211_PS_DISABLED)
3080 {
3081 MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST);
3082
3083 }
3084 }
3085 else
3086 pPSC->LpsIdleCount++;
3087 }
3088}
3089
3090
3091/* Leave leisure power save mode. */
3092void LeisurePSLeave(struct ieee80211_device *ieee80211)
3093{
3094 struct r8192_priv *priv = ieee80211_priv(ieee80211->dev);
3095 PRT_POWER_SAVE_CONTROL pPSC = &priv->PowerSaveControl;
3096
3097 if (pPSC->bLeisurePs)
3098 {
3099 if(priv->ieee80211->ps != IEEE80211_PS_DISABLED)
3100 {
3101 // move to lps_wakecomplete()
3102 MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_DISABLED);
3103
3104 }
3105 }
3106}
3107#endif
3108
3109
3110/* Enter the inactive power save mode. RF will be off */
3111void IPSEnter(struct r8192_priv *priv)
3112{
3113 PRT_POWER_SAVE_CONTROL pPSC = &priv->PowerSaveControl;
3114 RT_RF_POWER_STATE rtState;
3115
3116 if (pPSC->bInactivePs)
3117 {
3118 rtState = priv->eRFPowerState;
3119 //
3120 // Added by Bruce, 2007-12-25.
3121 // Do not enter IPS in the following conditions:
3122 // (1) RF is already OFF or Sleep
3123 // (2) bSwRfProcessing (indicates the IPS is still under going)
3124 // (3) Connectted (only disconnected can trigger IPS)
3125 // (4) IBSS (send Beacon)
3126 // (5) AP mode (send Beacon)
3127 //
3128 if (rtState == eRfOn && !pPSC->bSwRfProcessing
3129 && (priv->ieee80211->state != IEEE80211_LINKED) )
3130 {
3131 RT_TRACE(COMP_RF,"IPSEnter(): Turn off RF.\n");
3132 pPSC->eInactivePowerState = eRfOff;
3133// queue_work(priv->priv_wq,&(pPSC->InactivePsWorkItem));
3134 InactivePsWorkItemCallback(priv);
3135 }
3136 }
3137}
3138
3139//
3140// Description:
3141// Leave the inactive power save mode, RF will be on.
3142// 2007.08.17, by shien chang.
3143//
3144void IPSLeave(struct r8192_priv *priv)
3145{
3146 PRT_POWER_SAVE_CONTROL pPSC = &priv->PowerSaveControl;
3147 RT_RF_POWER_STATE rtState;
3148
3149 if (pPSC->bInactivePs)
3150 {
3151 rtState = priv->eRFPowerState;
3152 if (rtState != eRfOn && !pPSC->bSwRfProcessing && priv->RfOffReason <= RF_CHANGE_BY_IPS)
3153 {
3154 RT_TRACE(COMP_POWER, "IPSLeave(): Turn on RF.\n");
3155 pPSC->eInactivePowerState = eRfOn;
3156 InactivePsWorkItemCallback(priv);
3157 }
3158 }
3159}
3160
3161void IPSLeave_wq(struct work_struct *work)
3162{
3163 struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, ips_leave_wq);
3164 struct net_device *dev = ieee->dev;
3165
3166 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
3167 down(&priv->ieee80211->ips_sem);
3168 IPSLeave(priv);
3169 up(&priv->ieee80211->ips_sem);
3170}
3171
3172void ieee80211_ips_leave_wq(struct ieee80211_device *ieee80211)
3173{
3174 struct r8192_priv *priv = ieee80211_priv(ieee80211->dev);
3175 RT_RF_POWER_STATE rtState;
3176 rtState = priv->eRFPowerState;
3177
3178 if (priv->PowerSaveControl.bInactivePs){
3179 if(rtState == eRfOff){
3180 if(priv->RfOffReason > RF_CHANGE_BY_IPS)
3181 {
3182 RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__);
3183 return;
3184 }
3185 else{
3186 printk("=========>%s(): IPSLeave\n",__FUNCTION__);
3187 queue_work(priv->ieee80211->wq,&priv->ieee80211->ips_leave_wq);
3188 }
3189 }
3190 }
3191}
3192//added by amy 090331 end
3193void ieee80211_ips_leave(struct ieee80211_device *ieee80211)
3194{
3195 struct r8192_priv *priv = ieee80211_priv(ieee80211->dev);
3196 down(&ieee80211->ips_sem);
3197 IPSLeave(priv);
3198 up(&ieee80211->ips_sem);
3199}
3200#endif
3201
3202static void rtl819x_update_rxcounts(
3203 struct r8192_priv *priv,
3204 u32* TotalRxBcnNum,
3205 u32* TotalRxDataNum
3206)
3207{
3208 u16 SlotIndex;
3209 u8 i;
3210
3211 *TotalRxBcnNum = 0;
3212 *TotalRxDataNum = 0;
3213
3214 SlotIndex = (priv->ieee80211->LinkDetectInfo.SlotIndex++)%(priv->ieee80211->LinkDetectInfo.SlotNum);
3215 priv->ieee80211->LinkDetectInfo.RxBcnNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod;
3216 priv->ieee80211->LinkDetectInfo.RxDataNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod;
3217 for( i=0; i<priv->ieee80211->LinkDetectInfo.SlotNum; i++ ){
3218 *TotalRxBcnNum += priv->ieee80211->LinkDetectInfo.RxBcnNum[i];
3219 *TotalRxDataNum += priv->ieee80211->LinkDetectInfo.RxDataNum[i];
3220 }
3221}
3222
3223
3224static void rtl819x_watchdog_wqcallback(struct work_struct *work)
3225{
3226 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
3227 struct r8192_priv *priv = container_of(dwork,struct r8192_priv,watch_dog_wq);
3228 struct ieee80211_device* ieee = priv->ieee80211;
3229 RESET_TYPE ResetType = RESET_TYPE_NORESET;
3230 bool bBusyTraffic = false;
3231 bool bEnterPS = false;
3232
3233 if ((!priv->up) || priv->bHwRadioOff)
3234 return;
3235
3236 if(!priv->up)
3237 return;
3238 hal_dm_watchdog(priv);
3239#ifdef ENABLE_IPS
3240 if(ieee->actscanning == false){
3241 if((ieee->iw_mode == IW_MODE_INFRA) && (ieee->state == IEEE80211_NOLINK) &&
3242 (priv->eRFPowerState == eRfOn) && !ieee->is_set_key &&
3243 (!ieee->proto_stoppping) && !ieee->wx_set_enc){
3244 if (priv->PowerSaveControl.ReturnPoint == IPS_CALLBACK_NONE){
3245 IPSEnter(priv);
3246 }
3247 }
3248 }
3249#endif
3250 {//to get busy traffic condition
3251 if(ieee->state == IEEE80211_LINKED)
3252 {
3253 if( ieee->LinkDetectInfo.NumRxOkInPeriod> 100 ||
3254 ieee->LinkDetectInfo.NumTxOkInPeriod> 100 ) {
3255 bBusyTraffic = true;
3256 }
3257
3258#ifdef ENABLE_LPS
3259 //added by amy for Leisure PS
3260 if( ((ieee->LinkDetectInfo.NumRxUnicastOkInPeriod + ieee->LinkDetectInfo.NumTxOkInPeriod) > 8 ) ||
3261 (ieee->LinkDetectInfo.NumRxUnicastOkInPeriod > 2) )
3262 {
3263 bEnterPS= false;
3264 }
3265 else
3266 {
3267 bEnterPS= true;
3268 }
3269
3270 // LeisurePS only work in infra mode.
3271 if(bEnterPS)
3272 {
3273 LeisurePSEnter(priv->ieee80211);
3274 }
3275 else
3276 {
3277 LeisurePSLeave(priv->ieee80211);
3278 }
3279#endif
3280
3281 }
3282 else
3283 {
3284#ifdef ENABLE_LPS
3285 LeisurePSLeave(priv->ieee80211);
3286#endif
3287 }
3288
3289 ieee->LinkDetectInfo.NumRxOkInPeriod = 0;
3290 ieee->LinkDetectInfo.NumTxOkInPeriod = 0;
3291 ieee->LinkDetectInfo.NumRxUnicastOkInPeriod = 0;
3292 ieee->LinkDetectInfo.bBusyTraffic = bBusyTraffic;
3293 }
3294
3295
3296 //added by amy for AP roaming
3297 if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_INFRA)
3298 {
3299 u32 TotalRxBcnNum = 0;
3300 u32 TotalRxDataNum = 0;
3301
3302 rtl819x_update_rxcounts(priv, &TotalRxBcnNum, &TotalRxDataNum);
3303 if((TotalRxBcnNum+TotalRxDataNum) == 0)
3304 {
3305 if (priv->eRFPowerState == eRfOff)
3306 RT_TRACE(COMP_ERR,"========>%s()\n",__FUNCTION__);
3307 printk("===>%s(): AP is power off,connect another one\n",__FUNCTION__);
3308 // Dot11d_Reset(dev);
3309 ieee->state = IEEE80211_ASSOCIATING;
3310 notify_wx_assoc_event(priv->ieee80211);
3311 RemovePeerTS(priv->ieee80211,priv->ieee80211->current_network.bssid);
3312 ieee->is_roaming = true;
3313 ieee->is_set_key = false;
3314 ieee->link_change(ieee);
3315 queue_work(ieee->wq, &ieee->associate_procedure_wq);
3316 }
3317 }
3318 ieee->LinkDetectInfo.NumRecvBcnInPeriod=0;
3319 ieee->LinkDetectInfo.NumRecvDataInPeriod=0;
3320
3321 //check if reset the driver
3322 if (priv->watchdog_check_reset_cnt++ >= 3 && !ieee->is_roaming &&
3323 priv->watchdog_last_time != 1)
3324 {
3325 ResetType = rtl819x_check_reset(priv);
3326 priv->watchdog_check_reset_cnt = 3;
3327 }
3328 if(!priv->bDisableNormalResetCheck && ResetType == RESET_TYPE_NORMAL)
3329 {
3330 priv->ResetProgress = RESET_TYPE_NORMAL;
3331 RT_TRACE(COMP_RESET,"%s(): NOMAL RESET\n",__FUNCTION__);
3332 return;
3333 }
3334 /* disable silent reset temply 2008.9.11*/
3335
3336 if( ((priv->force_reset) || (!priv->bDisableNormalResetCheck && ResetType==RESET_TYPE_SILENT))) // This is control by OID set in Pomelo
3337 {
3338 priv->watchdog_last_time = 1;
3339 }
3340 else
3341 priv->watchdog_last_time = 0;
3342
3343 priv->force_reset = false;
3344 priv->bForcedSilentReset = false;
3345 priv->bResetInProgress = false;
3346 RT_TRACE(COMP_TRACE, " <==RtUsbCheckForHangWorkItemCallback()\n");
3347
3348}
3349
3350void watch_dog_timer_callback(unsigned long data)
3351{
3352 struct r8192_priv *priv = (struct r8192_priv *) data;
3353 queue_delayed_work(priv->priv_wq,&priv->watch_dog_wq,0);
3354 mod_timer(&priv->watch_dog_timer, jiffies + MSECS(IEEE80211_WATCH_DOG_TIME));
3355
3356}
3357
3358static int _rtl8192_up(struct r8192_priv *priv)
3359{
3360 RT_STATUS init_status = RT_STATUS_SUCCESS;
3361 struct net_device *dev = priv->ieee80211->dev;
3362
3363 priv->up=1;
3364 priv->ieee80211->ieee_up=1;
3365 priv->bdisable_nic = false; //YJ,add,091111
3366 RT_TRACE(COMP_INIT, "Bringing up iface\n");
3367
3368 init_status = rtl8192_adapter_start(priv);
3369 if(init_status != RT_STATUS_SUCCESS)
3370 {
3371 RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n",__FUNCTION__);
3372 return -1;
3373 }
3374 RT_TRACE(COMP_INIT, "start adapter finished\n");
3375
3376 if (priv->eRFPowerState != eRfOn)
3377 MgntActSet_RF_State(priv, eRfOn, priv->RfOffReason);
3378
3379 if(priv->ieee80211->state != IEEE80211_LINKED)
3380 ieee80211_softmac_start_protocol(priv->ieee80211);
3381 ieee80211_reset_queue(priv->ieee80211);
3382 watch_dog_timer_callback((unsigned long) priv);
3383 if(!netif_queue_stopped(dev))
3384 netif_start_queue(dev);
3385 else
3386 netif_wake_queue(dev);
3387
3388 return 0;
3389}
3390
3391
3392static int rtl8192_open(struct net_device *dev)
3393{
3394 struct r8192_priv *priv = ieee80211_priv(dev);
3395 int ret;
3396
3397 down(&priv->wx_sem);
3398 ret = rtl8192_up(dev);
3399 up(&priv->wx_sem);
3400 return ret;
3401
3402}
3403
3404
3405int rtl8192_up(struct net_device *dev)
3406{
3407 struct r8192_priv *priv = ieee80211_priv(dev);
3408
3409 if (priv->up == 1) return -1;
3410
3411 return _rtl8192_up(priv);
3412}
3413
3414
3415static int rtl8192_close(struct net_device *dev)
3416{
3417 struct r8192_priv *priv = ieee80211_priv(dev);
3418 int ret;
3419
3420 down(&priv->wx_sem);
3421
3422 ret = rtl8192_down(dev);
3423
3424 up(&priv->wx_sem);
3425
3426 return ret;
3427
3428}
3429
3430int rtl8192_down(struct net_device *dev)
3431{
3432 struct r8192_priv *priv = ieee80211_priv(dev);
3433
3434 if (priv->up == 0) return -1;
3435
3436#ifdef ENABLE_LPS
3437 //LZM for PS-Poll AID issue. 090429
3438 if(priv->ieee80211->state == IEEE80211_LINKED)
3439 LeisurePSLeave(priv->ieee80211);
3440#endif
3441
3442 priv->up=0;
3443 priv->ieee80211->ieee_up = 0;
3444 RT_TRACE(COMP_DOWN, "==========>%s()\n", __FUNCTION__);
3445/* FIXME */
3446 if (!netif_queue_stopped(dev))
3447 netif_stop_queue(dev);
3448
3449 rtl8192_irq_disable(priv);
3450 rtl8192_cancel_deferred_work(priv);
3451 deinit_hal_dm(priv);
3452 del_timer_sync(&priv->watch_dog_timer);
3453
3454 ieee80211_softmac_stop_protocol(priv->ieee80211,true);
3455
3456 rtl8192_halt_adapter(priv, false);
3457 memset(&priv->ieee80211->current_network, 0 , offsetof(struct ieee80211_network, list));
3458
3459 RT_TRACE(COMP_DOWN, "<==========%s()\n", __FUNCTION__);
3460
3461 return 0;
3462}
3463
3464
3465void rtl8192_commit(struct r8192_priv *priv)
3466{
3467 if (priv->up == 0) return ;
3468
3469
3470 ieee80211_softmac_stop_protocol(priv->ieee80211,true);
3471
3472 rtl8192_irq_disable(priv);
3473 rtl8192_halt_adapter(priv, true);
3474 _rtl8192_up(priv);
3475}
3476
3477static void rtl8192_restart(struct work_struct *work)
3478{
3479 struct r8192_priv *priv = container_of(work, struct r8192_priv, reset_wq);
3480
3481 down(&priv->wx_sem);
3482
3483 rtl8192_commit(priv);
3484
3485 up(&priv->wx_sem);
3486}
3487
3488static void r8192_set_multicast(struct net_device *dev)
3489{
3490 struct r8192_priv *priv = ieee80211_priv(dev);
3491
3492 priv->promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
3493}
3494
3495
3496static int r8192_set_mac_adr(struct net_device *dev, void *mac)
3497{
3498 struct r8192_priv *priv = ieee80211_priv(dev);
3499 struct sockaddr *addr = mac;
3500
3501 down(&priv->wx_sem);
3502
3503 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
3504
3505 schedule_work(&priv->reset_wq);
3506 up(&priv->wx_sem);
3507
3508 return 0;
3509}
3510
3511static void r8192e_set_hw_key(struct r8192_priv *priv, struct ieee_param *ipw)
3512{
3513 struct ieee80211_device *ieee = priv->ieee80211;
3514 u8 broadcast_addr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
3515 u32 key[4];
3516
3517 if (ipw->u.crypt.set_tx) {
3518 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
3519 ieee->pairwise_key_type = KEY_TYPE_CCMP;
3520 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
3521 ieee->pairwise_key_type = KEY_TYPE_TKIP;
3522 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0) {
3523 if (ipw->u.crypt.key_len == 13)
3524 ieee->pairwise_key_type = KEY_TYPE_WEP104;
3525 else if (ipw->u.crypt.key_len == 5)
3526 ieee->pairwise_key_type = KEY_TYPE_WEP40;
3527 } else
3528 ieee->pairwise_key_type = KEY_TYPE_NA;
3529
3530 if (ieee->pairwise_key_type) {
3531 memcpy(key, ipw->u.crypt.key, 16);
3532 EnableHWSecurityConfig8192(priv);
3533 /*
3534 * We fill both index entry and 4th entry for pairwise
3535 * key as in IPW interface, adhoc will only get here,
3536 * so we need index entry for its default key serching!
3537 */
3538 setKey(priv, 4, ipw->u.crypt.idx,
3539 ieee->pairwise_key_type,
3540 (u8*)ieee->ap_mac_addr, 0, key);
3541
3542 /* LEAP WEP will never set this. */
3543 if (ieee->auth_mode != 2)
3544 setKey(priv, ipw->u.crypt.idx, ipw->u.crypt.idx,
3545 ieee->pairwise_key_type,
3546 (u8*)ieee->ap_mac_addr, 0, key);
3547 }
3548 if ((ieee->pairwise_key_type == KEY_TYPE_CCMP) &&
3549 ieee->pHTInfo->bCurrentHTSupport) {
3550 write_nic_byte(priv, 0x173, 1); /* fix aes bug */
3551 }
3552 } else {
3553 memcpy(key, ipw->u.crypt.key, 16);
3554 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
3555 ieee->group_key_type= KEY_TYPE_CCMP;
3556 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
3557 ieee->group_key_type = KEY_TYPE_TKIP;
3558 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0) {
3559 if (ipw->u.crypt.key_len == 13)
3560 ieee->group_key_type = KEY_TYPE_WEP104;
3561 else if (ipw->u.crypt.key_len == 5)
3562 ieee->group_key_type = KEY_TYPE_WEP40;
3563 } else
3564 ieee->group_key_type = KEY_TYPE_NA;
3565
3566 if (ieee->group_key_type) {
3567 setKey(priv, ipw->u.crypt.idx, ipw->u.crypt.idx,
3568 ieee->group_key_type, broadcast_addr, 0, key);
3569 }
3570 }
3571}
3572
3573/* based on ipw2200 driver */
3574static int rtl8192_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3575{
3576 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
3577 struct iwreq *wrq = (struct iwreq *)rq;
3578 int ret=-1;
3579 struct iw_point *p = &wrq->u.data;
3580 struct ieee_param *ipw = NULL;//(struct ieee_param *)wrq->u.data.pointer;
3581
3582 down(&priv->wx_sem);
3583
3584
3585 if (p->length < sizeof(struct ieee_param) || !p->pointer){
3586 ret = -EINVAL;
3587 goto out;
3588 }
3589
3590 ipw = kmalloc(p->length, GFP_KERNEL);
3591 if (ipw == NULL){
3592 ret = -ENOMEM;
3593 goto out;
3594 }
3595 if (copy_from_user(ipw, p->pointer, p->length)) {
3596 kfree(ipw);
3597 ret = -EFAULT;
3598 goto out;
3599 }
3600
3601 switch (cmd) {
3602 case RTL_IOCTL_WPA_SUPPLICANT:
3603 /* parse here for HW security */
3604 if (ipw->cmd == IEEE_CMD_SET_ENCRYPTION)
3605 r8192e_set_hw_key(priv, ipw);
3606 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
3607 break;
3608
3609 default:
3610 ret = -EOPNOTSUPP;
3611 break;
3612 }
3613
3614 kfree(ipw);
3615out:
3616 up(&priv->wx_sem);
3617
3618 return ret;
3619}
3620
3621static u8 HwRateToMRate90(bool bIsHT, u8 rate)
3622{
3623 u8 ret_rate = 0x02;
3624
3625 if(!bIsHT) {
3626 switch(rate) {
3627 case DESC90_RATE1M: ret_rate = MGN_1M; break;
3628 case DESC90_RATE2M: ret_rate = MGN_2M; break;
3629 case DESC90_RATE5_5M: ret_rate = MGN_5_5M; break;
3630 case DESC90_RATE11M: ret_rate = MGN_11M; break;
3631 case DESC90_RATE6M: ret_rate = MGN_6M; break;
3632 case DESC90_RATE9M: ret_rate = MGN_9M; break;
3633 case DESC90_RATE12M: ret_rate = MGN_12M; break;
3634 case DESC90_RATE18M: ret_rate = MGN_18M; break;
3635 case DESC90_RATE24M: ret_rate = MGN_24M; break;
3636 case DESC90_RATE36M: ret_rate = MGN_36M; break;
3637 case DESC90_RATE48M: ret_rate = MGN_48M; break;
3638 case DESC90_RATE54M: ret_rate = MGN_54M; break;
3639
3640 default:
3641 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
3642 break;
3643 }
3644
3645 } else {
3646 switch(rate) {
3647 case DESC90_RATEMCS0: ret_rate = MGN_MCS0; break;
3648 case DESC90_RATEMCS1: ret_rate = MGN_MCS1; break;
3649 case DESC90_RATEMCS2: ret_rate = MGN_MCS2; break;
3650 case DESC90_RATEMCS3: ret_rate = MGN_MCS3; break;
3651 case DESC90_RATEMCS4: ret_rate = MGN_MCS4; break;
3652 case DESC90_RATEMCS5: ret_rate = MGN_MCS5; break;
3653 case DESC90_RATEMCS6: ret_rate = MGN_MCS6; break;
3654 case DESC90_RATEMCS7: ret_rate = MGN_MCS7; break;
3655 case DESC90_RATEMCS8: ret_rate = MGN_MCS8; break;
3656 case DESC90_RATEMCS9: ret_rate = MGN_MCS9; break;
3657 case DESC90_RATEMCS10: ret_rate = MGN_MCS10; break;
3658 case DESC90_RATEMCS11: ret_rate = MGN_MCS11; break;
3659 case DESC90_RATEMCS12: ret_rate = MGN_MCS12; break;
3660 case DESC90_RATEMCS13: ret_rate = MGN_MCS13; break;
3661 case DESC90_RATEMCS14: ret_rate = MGN_MCS14; break;
3662 case DESC90_RATEMCS15: ret_rate = MGN_MCS15; break;
3663 case DESC90_RATEMCS32: ret_rate = (0x80|0x20); break;
3664
3665 default:
3666 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT);
3667 break;
3668 }
3669 }
3670
3671 return ret_rate;
3672}
3673
3674/* Record the TSF time stamp when receiving a packet */
3675static void UpdateRxPktTimeStamp8190(struct r8192_priv *priv, struct ieee80211_rx_stats *stats)
3676{
3677
3678 if(stats->bIsAMPDU && !stats->bFirstMPDU) {
3679 stats->mac_time[0] = priv->LastRxDescTSFLow;
3680 stats->mac_time[1] = priv->LastRxDescTSFHigh;
3681 } else {
3682 priv->LastRxDescTSFLow = stats->mac_time[0];
3683 priv->LastRxDescTSFHigh = stats->mac_time[1];
3684 }
3685}
3686
3687static long rtl819x_translate_todbm(u8 signal_strength_index)// 0-100 index.
3688{
3689 long signal_power; // in dBm.
3690
3691 // Translate to dBm (x=0.5y-95).
3692 signal_power = (long)((signal_strength_index + 1) >> 1);
3693 signal_power -= 95;
3694
3695 return signal_power;
3696}
3697
3698/* 2008/01/22 MH We can not delcare RSSI/EVM total value of sliding window to
3699 be a local static. Otherwise, it may increase when we return from S3/S4. The
3700 value will be kept in memory or disk. We must delcare the value in adapter
3701 and it will be reinitialized when return from S3/S4. */
3702static void rtl8192_process_phyinfo(struct r8192_priv * priv, u8* buffer,struct ieee80211_rx_stats * pprevious_stats, struct ieee80211_rx_stats * pcurrent_stats)
3703{
3704 bool bcheck = false;
3705 u8 rfpath;
3706 u32 nspatial_stream, tmp_val;
3707 static u32 slide_rssi_index=0, slide_rssi_statistics=0;
3708 static u32 slide_evm_index=0, slide_evm_statistics=0;
3709 static u32 last_rssi=0, last_evm=0;
3710 //cosa add for beacon rssi smoothing
3711 static u32 slide_beacon_adc_pwdb_index=0, slide_beacon_adc_pwdb_statistics=0;
3712 static u32 last_beacon_adc_pwdb=0;
3713
3714 struct ieee80211_hdr_3addr *hdr;
3715 u16 sc ;
3716 unsigned int frag,seq;
3717 hdr = (struct ieee80211_hdr_3addr *)buffer;
3718 sc = le16_to_cpu(hdr->seq_ctl);
3719 frag = WLAN_GET_SEQ_FRAG(sc);
3720 seq = WLAN_GET_SEQ_SEQ(sc);
3721
3722 //
3723 // Check whether we should take the previous packet into accounting
3724 //
3725 if(!pprevious_stats->bIsAMPDU)
3726 {
3727 // if previous packet is not aggregated packet
3728 bcheck = true;
3729 }
3730
3731 if(slide_rssi_statistics++ >= PHY_RSSI_SLID_WIN_MAX)
3732 {
3733 slide_rssi_statistics = PHY_RSSI_SLID_WIN_MAX;
3734 last_rssi = priv->stats.slide_signal_strength[slide_rssi_index];
3735 priv->stats.slide_rssi_total -= last_rssi;
3736 }
3737 priv->stats.slide_rssi_total += pprevious_stats->SignalStrength;
3738
3739 priv->stats.slide_signal_strength[slide_rssi_index++] = pprevious_stats->SignalStrength;
3740 if(slide_rssi_index >= PHY_RSSI_SLID_WIN_MAX)
3741 slide_rssi_index = 0;
3742
3743 // <1> Showed on UI for user, in dbm
3744 tmp_val = priv->stats.slide_rssi_total/slide_rssi_statistics;
3745 priv->stats.signal_strength = rtl819x_translate_todbm((u8)tmp_val);
3746 pcurrent_stats->rssi = priv->stats.signal_strength;
3747 //
3748 // If the previous packet does not match the criteria, neglect it
3749 //
3750 if(!pprevious_stats->bPacketMatchBSSID)
3751 {
3752 if(!pprevious_stats->bToSelfBA)
3753 return;
3754 }
3755
3756 if(!bcheck)
3757 return;
3758
3759 // <2> Showed on UI for engineering
3760 // hardware does not provide rssi information for each rf path in CCK
3761 if(!pprevious_stats->bIsCCK && pprevious_stats->bPacketToSelf)
3762 {
3763 for (rfpath = RF90_PATH_A; rfpath < RF90_PATH_C; rfpath++)
3764 {
3765 if (!rtl8192_phy_CheckIsLegalRFPath(priv, rfpath))
3766 continue;
3767 RT_TRACE(COMP_DBG, "pPreviousstats->RxMIMOSignalStrength[rfpath] = %d\n", pprevious_stats->RxMIMOSignalStrength[rfpath]);
3768 //Fixed by Jacken 2008-03-20
3769 if(priv->stats.rx_rssi_percentage[rfpath] == 0)
3770 {
3771 priv->stats.rx_rssi_percentage[rfpath] = pprevious_stats->RxMIMOSignalStrength[rfpath];
3772 }
3773 if(pprevious_stats->RxMIMOSignalStrength[rfpath] > priv->stats.rx_rssi_percentage[rfpath])
3774 {
3775 priv->stats.rx_rssi_percentage[rfpath] =
3776 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
3777 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
3778 priv->stats.rx_rssi_percentage[rfpath] = priv->stats.rx_rssi_percentage[rfpath] + 1;
3779 }
3780 else
3781 {
3782 priv->stats.rx_rssi_percentage[rfpath] =
3783 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
3784 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
3785 }
3786 RT_TRACE(COMP_DBG, "priv->RxStats.RxRSSIPercentage[rfPath] = %d \n" , priv->stats.rx_rssi_percentage[rfpath]);
3787 }
3788 }
3789
3790
3791 //
3792 // Check PWDB.
3793 //
3794 //cosa add for beacon rssi smoothing by average.
3795 if(pprevious_stats->bPacketBeacon)
3796 {
3797 /* record the beacon pwdb to the sliding window. */
3798 if(slide_beacon_adc_pwdb_statistics++ >= PHY_Beacon_RSSI_SLID_WIN_MAX)
3799 {
3800 slide_beacon_adc_pwdb_statistics = PHY_Beacon_RSSI_SLID_WIN_MAX;
3801 last_beacon_adc_pwdb = priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index];
3802 priv->stats.Slide_Beacon_Total -= last_beacon_adc_pwdb;
3803 // slide_beacon_adc_pwdb_index, last_beacon_adc_pwdb, Adapter->RxStats.Slide_Beacon_Total);
3804 }
3805 priv->stats.Slide_Beacon_Total += pprevious_stats->RxPWDBAll;
3806 priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index] = pprevious_stats->RxPWDBAll;
3807 slide_beacon_adc_pwdb_index++;
3808 if(slide_beacon_adc_pwdb_index >= PHY_Beacon_RSSI_SLID_WIN_MAX)
3809 slide_beacon_adc_pwdb_index = 0;
3810 pprevious_stats->RxPWDBAll = priv->stats.Slide_Beacon_Total/slide_beacon_adc_pwdb_statistics;
3811 if(pprevious_stats->RxPWDBAll >= 3)
3812 pprevious_stats->RxPWDBAll -= 3;
3813 }
3814
3815 RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
3816 pprevious_stats->bIsCCK? "CCK": "OFDM",
3817 pprevious_stats->RxPWDBAll);
3818
3819 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
3820 {
3821 if(priv->undecorated_smoothed_pwdb < 0) // initialize
3822 {
3823 priv->undecorated_smoothed_pwdb = pprevious_stats->RxPWDBAll;
3824 }
3825
3826 if(pprevious_stats->RxPWDBAll > (u32)priv->undecorated_smoothed_pwdb)
3827 {
3828 priv->undecorated_smoothed_pwdb =
3829 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
3830 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
3831 priv->undecorated_smoothed_pwdb = priv->undecorated_smoothed_pwdb + 1;
3832 }
3833 else
3834 {
3835 priv->undecorated_smoothed_pwdb =
3836 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
3837 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
3838 }
3839 }
3840
3841 //
3842 // Check EVM
3843 //
3844 /* record the general EVM to the sliding window. */
3845 if(pprevious_stats->SignalQuality == 0)
3846 {
3847 }
3848 else
3849 {
3850 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA){
3851 if(slide_evm_statistics++ >= PHY_RSSI_SLID_WIN_MAX){
3852 slide_evm_statistics = PHY_RSSI_SLID_WIN_MAX;
3853 last_evm = priv->stats.slide_evm[slide_evm_index];
3854 priv->stats.slide_evm_total -= last_evm;
3855 }
3856
3857 priv->stats.slide_evm_total += pprevious_stats->SignalQuality;
3858
3859 priv->stats.slide_evm[slide_evm_index++] = pprevious_stats->SignalQuality;
3860 if(slide_evm_index >= PHY_RSSI_SLID_WIN_MAX)
3861 slide_evm_index = 0;
3862
3863 // <1> Showed on UI for user, in percentage.
3864 tmp_val = priv->stats.slide_evm_total/slide_evm_statistics;
3865 //cosa add 10/11/2007, Showed on UI for user in Windows Vista, for Link quality.
3866 }
3867
3868 // <2> Showed on UI for engineering
3869 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
3870 {
3871 for(nspatial_stream = 0; nspatial_stream<2 ; nspatial_stream++) // 2 spatial stream
3872 {
3873 if(pprevious_stats->RxMIMOSignalQuality[nspatial_stream] != -1)
3874 {
3875 if(priv->stats.rx_evm_percentage[nspatial_stream] == 0) // initialize
3876 {
3877 priv->stats.rx_evm_percentage[nspatial_stream] = pprevious_stats->RxMIMOSignalQuality[nspatial_stream];
3878 }
3879 priv->stats.rx_evm_percentage[nspatial_stream] =
3880 ( (priv->stats.rx_evm_percentage[nspatial_stream]* (Rx_Smooth_Factor-1)) +
3881 (pprevious_stats->RxMIMOSignalQuality[nspatial_stream]* 1)) / (Rx_Smooth_Factor);
3882 }
3883 }
3884 }
3885 }
3886
3887}
3888
3889static u8 rtl819x_query_rxpwrpercentage(
3890 char antpower
3891 )
3892{
3893 if ((antpower <= -100) || (antpower >= 20))
3894 {
3895 return 0;
3896 }
3897 else if (antpower >= 0)
3898 {
3899 return 100;
3900 }
3901 else
3902 {
3903 return (100+antpower);
3904 }
3905
3906}
3907
3908static u8
3909rtl819x_evm_dbtopercentage(
3910 char value
3911 )
3912{
3913 char ret_val;
3914
3915 ret_val = value;
3916
3917 if(ret_val >= 0)
3918 ret_val = 0;
3919 if(ret_val <= -33)
3920 ret_val = -33;
3921 ret_val = 0 - ret_val;
3922 ret_val*=3;
3923 if(ret_val == 99)
3924 ret_val = 100;
3925 return ret_val;
3926}
3927
3928/* We want good-looking for signal strength/quality */
3929static long rtl819x_signal_scale_mapping(long currsig)
3930{
3931 long retsig;
3932
3933 // Step 1. Scale mapping.
3934 if(currsig >= 61 && currsig <= 100)
3935 {
3936 retsig = 90 + ((currsig - 60) / 4);
3937 }
3938 else if(currsig >= 41 && currsig <= 60)
3939 {
3940 retsig = 78 + ((currsig - 40) / 2);
3941 }
3942 else if(currsig >= 31 && currsig <= 40)
3943 {
3944 retsig = 66 + (currsig - 30);
3945 }
3946 else if(currsig >= 21 && currsig <= 30)
3947 {
3948 retsig = 54 + (currsig - 20);
3949 }
3950 else if(currsig >= 5 && currsig <= 20)
3951 {
3952 retsig = 42 + (((currsig - 5) * 2) / 3);
3953 }
3954 else if(currsig == 4)
3955 {
3956 retsig = 36;
3957 }
3958 else if(currsig == 3)
3959 {
3960 retsig = 27;
3961 }
3962 else if(currsig == 2)
3963 {
3964 retsig = 18;
3965 }
3966 else if(currsig == 1)
3967 {
3968 retsig = 9;
3969 }
3970 else
3971 {
3972 retsig = currsig;
3973 }
3974
3975 return retsig;
3976}
3977
3978static void rtl8192_query_rxphystatus(
3979 struct r8192_priv * priv,
3980 struct ieee80211_rx_stats * pstats,
3981 prx_desc_819x_pci pdesc,
3982 prx_fwinfo_819x_pci pdrvinfo,
3983 struct ieee80211_rx_stats * precord_stats,
3984 bool bpacket_match_bssid,
3985 bool bpacket_toself,
3986 bool bPacketBeacon,
3987 bool bToSelfBA
3988 )
3989{
3990 //PRT_RFD_STATUS pRtRfdStatus = &(pRfd->Status);
3991 phy_sts_ofdm_819xpci_t* pofdm_buf;
3992 phy_sts_cck_819xpci_t * pcck_buf;
3993 phy_ofdm_rx_status_rxsc_sgien_exintfflag* prxsc;
3994 u8 *prxpkt;
3995 u8 i,max_spatial_stream, tmp_rxsnr, tmp_rxevm, rxsc_sgien_exflg;
3996 char rx_pwr[4], rx_pwr_all=0;
3997 //long rx_avg_pwr = 0;
3998 char rx_snrX, rx_evmX;
3999 u8 evm, pwdb_all;
4000 u32 RSSI, total_rssi=0;//, total_evm=0;
4001// long signal_strength_index = 0;
4002 u8 is_cck_rate=0;
4003 u8 rf_rx_num = 0;
4004
4005 is_cck_rate = rx_hal_is_cck_rate(pdrvinfo);
4006
4007 // Record it for next packet processing
4008 memset(precord_stats, 0, sizeof(struct ieee80211_rx_stats));
4009 pstats->bPacketMatchBSSID = precord_stats->bPacketMatchBSSID = bpacket_match_bssid;
4010 pstats->bPacketToSelf = precord_stats->bPacketToSelf = bpacket_toself;
4011 pstats->bIsCCK = precord_stats->bIsCCK = is_cck_rate;//RX_HAL_IS_CCK_RATE(pDrvInfo);
4012 pstats->bPacketBeacon = precord_stats->bPacketBeacon = bPacketBeacon;
4013 pstats->bToSelfBA = precord_stats->bToSelfBA = bToSelfBA;
4014 /*2007.08.30 requested by SD3 Jerry */
4015 if (priv->phy_check_reg824 == 0)
4016 {
4017 priv->phy_reg824_bit9 = rtl8192_QueryBBReg(priv, rFPGA0_XA_HSSIParameter2, 0x200);
4018 priv->phy_check_reg824 = 1;
4019 }
4020
4021
4022 prxpkt = (u8*)pdrvinfo;
4023
4024 /* Move pointer to the 16th bytes. Phy status start address. */
4025 prxpkt += sizeof(rx_fwinfo_819x_pci);
4026
4027 /* Initial the cck and ofdm buffer pointer */
4028 pcck_buf = (phy_sts_cck_819xpci_t *)prxpkt;
4029 pofdm_buf = (phy_sts_ofdm_819xpci_t *)prxpkt;
4030
4031 pstats->RxMIMOSignalQuality[0] = -1;
4032 pstats->RxMIMOSignalQuality[1] = -1;
4033 precord_stats->RxMIMOSignalQuality[0] = -1;
4034 precord_stats->RxMIMOSignalQuality[1] = -1;
4035
4036 if(is_cck_rate)
4037 {
4038 //
4039 // (1)Hardware does not provide RSSI for CCK
4040 //
4041
4042 //
4043 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
4044 //
4045 u8 report;//, cck_agc_rpt;
4046
4047 if (!priv->phy_reg824_bit9)
4048 {
4049 report = pcck_buf->cck_agc_rpt & 0xc0;
4050 report = report>>6;
4051 switch(report)
4052 {
4053 //Fixed by Jacken from Bryant 2008-03-20
4054 //Original value is -38 , -26 , -14 , -2
4055 //Fixed value is -35 , -23 , -11 , 6
4056 case 0x3:
4057 rx_pwr_all = -35 - (pcck_buf->cck_agc_rpt & 0x3e);
4058 break;
4059 case 0x2:
4060 rx_pwr_all = -23 - (pcck_buf->cck_agc_rpt & 0x3e);
4061 break;
4062 case 0x1:
4063 rx_pwr_all = -11 - (pcck_buf->cck_agc_rpt & 0x3e);
4064 break;
4065 case 0x0:
4066 rx_pwr_all = 8 - (pcck_buf->cck_agc_rpt & 0x3e);
4067 break;
4068 }
4069 }
4070 else
4071 {
4072 report = pcck_buf->cck_agc_rpt & 0x60;
4073 report = report>>5;
4074 switch(report)
4075 {
4076 case 0x3:
4077 rx_pwr_all = -35 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
4078 break;
4079 case 0x2:
4080 rx_pwr_all = -23 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1);
4081 break;
4082 case 0x1:
4083 rx_pwr_all = -11 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
4084 break;
4085 case 0x0:
4086 rx_pwr_all = -8 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
4087 break;
4088 }
4089 }
4090
4091 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
4092 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
4093 pstats->RecvSignalPower = rx_pwr_all;
4094
4095 //
4096 // (3) Get Signal Quality (EVM)
4097 //
4098 if(bpacket_match_bssid)
4099 {
4100 u8 sq;
4101
4102 if(pstats->RxPWDBAll > 40)
4103 {
4104 sq = 100;
4105 }else
4106 {
4107 sq = pcck_buf->sq_rpt;
4108
4109 if(pcck_buf->sq_rpt > 64)
4110 sq = 0;
4111 else if (pcck_buf->sq_rpt < 20)
4112 sq = 100;
4113 else
4114 sq = ((64-sq) * 100) / 44;
4115 }
4116 pstats->SignalQuality = precord_stats->SignalQuality = sq;
4117 pstats->RxMIMOSignalQuality[0] = precord_stats->RxMIMOSignalQuality[0] = sq;
4118 pstats->RxMIMOSignalQuality[1] = precord_stats->RxMIMOSignalQuality[1] = -1;
4119 }
4120 }
4121 else
4122 {
4123 //
4124 // (1)Get RSSI for HT rate
4125 //
4126 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
4127 {
4128 // 2008/01/30 MH we will judge RF RX path now.
4129 if (priv->brfpath_rxenable[i])
4130 rf_rx_num++;
4131 //else
4132 //continue;
4133
4134 //Fixed by Jacken from Bryant 2008-03-20
4135 //Original value is 106
4136 rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 110;
4137
4138 //Get Rx snr value in DB
4139 tmp_rxsnr = pofdm_buf->rxsnr_X[i];
4140 rx_snrX = (char)(tmp_rxsnr);
4141 rx_snrX /= 2;
4142
4143 /* Translate DBM to percentage. */
4144 RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]);
4145 if (priv->brfpath_rxenable[i])
4146 total_rssi += RSSI;
4147
4148 /* Record Signal Strength for next packet */
4149 if(bpacket_match_bssid)
4150 {
4151 pstats->RxMIMOSignalStrength[i] =(u8) RSSI;
4152 precord_stats->RxMIMOSignalStrength[i] =(u8) RSSI;
4153 }
4154 }
4155
4156
4157 //
4158 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
4159 //
4160 //Fixed by Jacken from Bryant 2008-03-20
4161 //Original value is 106
4162 rx_pwr_all = (((pofdm_buf->pwdb_all ) >> 1 )& 0x7f) -106;
4163 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
4164
4165 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
4166 pstats->RxPower = precord_stats->RxPower = rx_pwr_all;
4167 pstats->RecvSignalPower = rx_pwr_all;
4168 //
4169 // (3)EVM of HT rate
4170 //
4171 if(pdrvinfo->RxHT && pdrvinfo->RxRate>=DESC90_RATEMCS8 &&
4172 pdrvinfo->RxRate<=DESC90_RATEMCS15)
4173 max_spatial_stream = 2; //both spatial stream make sense
4174 else
4175 max_spatial_stream = 1; //only spatial stream 1 makes sense
4176
4177 for(i=0; i<max_spatial_stream; i++)
4178 {
4179 tmp_rxevm = pofdm_buf->rxevm_X[i];
4180 rx_evmX = (char)(tmp_rxevm);
4181
4182 // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment
4183 // fill most significant bit to "zero" when doing shifting operation which may change a negative
4184 // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore.
4185 rx_evmX /= 2; //dbm
4186
4187 evm = rtl819x_evm_dbtopercentage(rx_evmX);
4188 if(bpacket_match_bssid)
4189 {
4190 if(i==0) // Fill value in RFD, Get the first spatial stream only
4191 pstats->SignalQuality = precord_stats->SignalQuality = (u8)(evm & 0xff);
4192 pstats->RxMIMOSignalQuality[i] = precord_stats->RxMIMOSignalQuality[i] = (u8)(evm & 0xff);
4193 }
4194 }
4195
4196
4197 /* record rx statistics for debug */
4198 rxsc_sgien_exflg = pofdm_buf->rxsc_sgien_exflg;
4199 prxsc = (phy_ofdm_rx_status_rxsc_sgien_exintfflag *)&rxsc_sgien_exflg;
4200 }
4201
4202 //UI BSS List signal strength(in percentage), make it good looking, from 0~100.
4203 //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
4204 if(is_cck_rate)
4205 {
4206 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)pwdb_all));//PWDB_ALL;
4207
4208 }
4209 else
4210 {
4211 //pRfd->Status.SignalStrength = pRecordRfd->Status.SignalStrength = (u1Byte)(SignalScaleMapping(total_rssi/=RF90_PATH_MAX));//(u1Byte)(total_rssi/=RF90_PATH_MAX);
4212 // We can judge RX path number now.
4213 if (rf_rx_num != 0)
4214 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)(total_rssi/=rf_rx_num)));
4215 }
4216}
4217
4218static void
4219rtl8192_record_rxdesc_forlateruse(
4220 struct ieee80211_rx_stats * psrc_stats,
4221 struct ieee80211_rx_stats * ptarget_stats
4222)
4223{
4224 ptarget_stats->bIsAMPDU = psrc_stats->bIsAMPDU;
4225 ptarget_stats->bFirstMPDU = psrc_stats->bFirstMPDU;
4226}
4227
4228
4229
4230static void TranslateRxSignalStuff819xpci(struct r8192_priv *priv,
4231 struct sk_buff *skb,
4232 struct ieee80211_rx_stats * pstats,
4233 prx_desc_819x_pci pdesc,
4234 prx_fwinfo_819x_pci pdrvinfo)
4235{
4236 // TODO: We must only check packet for current MAC address. Not finish
4237 bool bpacket_match_bssid, bpacket_toself;
4238 bool bPacketBeacon=false, bToSelfBA=false;
4239 struct ieee80211_hdr_3addr *hdr;
4240 u16 fc,type;
4241
4242 // Get Signal Quality for only RX data queue (but not command queue)
4243
4244 u8* tmp_buf;
4245 u8 *praddr;
4246
4247 /* Get MAC frame start address. */
4248 tmp_buf = skb->data;
4249
4250 hdr = (struct ieee80211_hdr_3addr *)tmp_buf;
4251 fc = le16_to_cpu(hdr->frame_ctl);
4252 type = WLAN_FC_GET_TYPE(fc);
4253 praddr = hdr->addr1;
4254
4255 /* Check if the received packet is acceptabe. */
4256 bpacket_match_bssid = ((IEEE80211_FTYPE_CTL != type) &&
4257 (!compare_ether_addr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
4258 && (!pstats->bHwError) && (!pstats->bCRC)&& (!pstats->bICV));
4259 bpacket_toself = bpacket_match_bssid & (!compare_ether_addr(praddr, priv->ieee80211->dev->dev_addr));
4260
4261 if(WLAN_FC_GET_FRAMETYPE(fc)== IEEE80211_STYPE_BEACON)
4262 {
4263 bPacketBeacon = true;
4264 }
4265 if(WLAN_FC_GET_FRAMETYPE(fc) == IEEE80211_STYPE_BLOCKACK)
4266 {
4267 if (!compare_ether_addr(praddr, priv->ieee80211->dev->dev_addr))
4268 bToSelfBA = true;
4269 }
4270
4271 //
4272 // Process PHY information for previous packet (RSSI/PWDB/EVM)
4273 //
4274 // Because phy information is contained in the last packet of AMPDU only, so driver
4275 // should process phy information of previous packet
4276 rtl8192_process_phyinfo(priv, tmp_buf, &priv->previous_stats, pstats);
4277 rtl8192_query_rxphystatus(priv, pstats, pdesc, pdrvinfo, &priv->previous_stats, bpacket_match_bssid,
4278 bpacket_toself ,bPacketBeacon, bToSelfBA);
4279 rtl8192_record_rxdesc_forlateruse(pstats, &priv->previous_stats);
4280
4281}
4282
4283
4284static void rtl8192_tx_resume(struct r8192_priv *priv)
4285{
4286 struct ieee80211_device *ieee = priv->ieee80211;
4287 struct sk_buff *skb;
4288 int i;
4289
4290 for (i = BK_QUEUE; i < TXCMD_QUEUE; i++) {
4291 while ((!skb_queue_empty(&ieee->skb_waitQ[i])) &&
4292 (priv->ieee80211->check_nic_enough_desc(ieee, i) > 0)) {
4293 /* 1. dequeue the packet from the wait queue */
4294 skb = skb_dequeue(&ieee->skb_waitQ[i]);
4295 /* 2. tx the packet directly */
4296 ieee->softmac_data_hard_start_xmit(skb, ieee, 0);
4297 }
4298 }
4299}
4300
4301static void rtl8192_irq_tx_tasklet(unsigned long arg)
4302{
4303 struct r8192_priv *priv = (struct r8192_priv*) arg;
4304 struct rtl8192_tx_ring *mgnt_ring = &priv->tx_ring[MGNT_QUEUE];
4305 unsigned long flags;
4306
4307 /* check if we need to report that the management queue is drained */
4308 spin_lock_irqsave(&priv->irq_th_lock, flags);
4309
4310 if (!skb_queue_len(&mgnt_ring->queue) &&
4311 priv->ieee80211->ack_tx_to_ieee &&
4312 rtl8192_is_tx_queue_empty(priv->ieee80211)) {
4313 priv->ieee80211->ack_tx_to_ieee = 0;
4314 ieee80211_ps_tx_ack(priv->ieee80211, 1);
4315 }
4316
4317 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
4318
4319 rtl8192_tx_resume(priv);
4320}
4321
4322/* Record the received data rate */
4323static void UpdateReceivedRateHistogramStatistics8190(
4324 struct r8192_priv *priv,
4325 struct ieee80211_rx_stats* pstats
4326 )
4327{
4328 u32 rcvType=1; //0: Total, 1:OK, 2:CRC, 3:ICV
4329 u32 rateIndex;
4330 u32 preamble_guardinterval; //1: short preamble/GI, 0: long preamble/GI
4331
4332 if(pstats->bCRC)
4333 rcvType = 2;
4334 else if(pstats->bICV)
4335 rcvType = 3;
4336
4337 if(pstats->bShortPreamble)
4338 preamble_guardinterval = 1;// short
4339 else
4340 preamble_guardinterval = 0;// long
4341
4342 switch(pstats->rate)
4343 {
4344 //
4345 // CCK rate
4346 //
4347 case MGN_1M: rateIndex = 0; break;
4348 case MGN_2M: rateIndex = 1; break;
4349 case MGN_5_5M: rateIndex = 2; break;
4350 case MGN_11M: rateIndex = 3; break;
4351 //
4352 // Legacy OFDM rate
4353 //
4354 case MGN_6M: rateIndex = 4; break;
4355 case MGN_9M: rateIndex = 5; break;
4356 case MGN_12M: rateIndex = 6; break;
4357 case MGN_18M: rateIndex = 7; break;
4358 case MGN_24M: rateIndex = 8; break;
4359 case MGN_36M: rateIndex = 9; break;
4360 case MGN_48M: rateIndex = 10; break;
4361 case MGN_54M: rateIndex = 11; break;
4362 //
4363 // 11n High throughput rate
4364 //
4365 case MGN_MCS0: rateIndex = 12; break;
4366 case MGN_MCS1: rateIndex = 13; break;
4367 case MGN_MCS2: rateIndex = 14; break;
4368 case MGN_MCS3: rateIndex = 15; break;
4369 case MGN_MCS4: rateIndex = 16; break;
4370 case MGN_MCS5: rateIndex = 17; break;
4371 case MGN_MCS6: rateIndex = 18; break;
4372 case MGN_MCS7: rateIndex = 19; break;
4373 case MGN_MCS8: rateIndex = 20; break;
4374 case MGN_MCS9: rateIndex = 21; break;
4375 case MGN_MCS10: rateIndex = 22; break;
4376 case MGN_MCS11: rateIndex = 23; break;
4377 case MGN_MCS12: rateIndex = 24; break;
4378 case MGN_MCS13: rateIndex = 25; break;
4379 case MGN_MCS14: rateIndex = 26; break;
4380 case MGN_MCS15: rateIndex = 27; break;
4381 default: rateIndex = 28; break;
4382 }
4383 priv->stats.received_rate_histogram[0][rateIndex]++; //total
4384 priv->stats.received_rate_histogram[rcvType][rateIndex]++;
4385}
4386
4387static void rtl8192_rx(struct r8192_priv *priv)
4388{
4389 struct ieee80211_hdr_1addr *ieee80211_hdr = NULL;
4390 bool unicast_packet = false;
4391 struct ieee80211_rx_stats stats = {
4392 .signal = 0,
4393 .noise = -98,
4394 .rate = 0,
4395 .freq = IEEE80211_24GHZ_BAND,
4396 };
4397 unsigned int count = priv->rxringcount;
4398 prx_fwinfo_819x_pci pDrvInfo = NULL;
4399 struct sk_buff *new_skb;
4400
4401 while (count--) {
4402 rx_desc_819x_pci *pdesc = &priv->rx_ring[priv->rx_idx];//rx descriptor
4403 struct sk_buff *skb = priv->rx_buf[priv->rx_idx];//rx pkt
4404
4405 if (pdesc->OWN)
4406 /* wait data to be filled by hardware */
4407 return;
4408
4409 stats.bICV = pdesc->ICV;
4410 stats.bCRC = pdesc->CRC32;
4411 stats.bHwError = pdesc->CRC32 | pdesc->ICV;
4412
4413 stats.Length = pdesc->Length;
4414 if(stats.Length < 24)
4415 stats.bHwError |= 1;
4416
4417 if(stats.bHwError) {
4418 stats.bShift = false;
4419 goto done;
4420 }
4421 pDrvInfo = NULL;
4422 new_skb = dev_alloc_skb(priv->rxbuffersize);
4423
4424 if (unlikely(!new_skb))
4425 goto done;
4426
4427 stats.RxDrvInfoSize = pdesc->RxDrvInfoSize;
4428 stats.RxBufShift = ((pdesc->Shift)&0x03);
4429 stats.Decrypted = !pdesc->SWDec;
4430
4431 pci_dma_sync_single_for_cpu(priv->pdev,
4432 *((dma_addr_t *)skb->cb),
4433 priv->rxbuffersize,
4434 PCI_DMA_FROMDEVICE);
4435 skb_put(skb, pdesc->Length);
4436 pDrvInfo = (rx_fwinfo_819x_pci *)(skb->data + stats.RxBufShift);
4437 skb_reserve(skb, stats.RxDrvInfoSize + stats.RxBufShift);
4438
4439 stats.rate = HwRateToMRate90((bool)pDrvInfo->RxHT, (u8)pDrvInfo->RxRate);
4440 stats.bShortPreamble = pDrvInfo->SPLCP;
4441
4442 /* it is debug only. It should be disabled in released driver.
4443 * 2007.1.11 by Emily
4444 * */
4445 UpdateReceivedRateHistogramStatistics8190(priv, &stats);
4446
4447 stats.bIsAMPDU = (pDrvInfo->PartAggr==1);
4448 stats.bFirstMPDU = (pDrvInfo->PartAggr==1) && (pDrvInfo->FirstAGGR==1);
4449
4450 stats.TimeStampLow = pDrvInfo->TSFL;
4451 stats.TimeStampHigh = read_nic_dword(priv, TSFR+4);
4452
4453 UpdateRxPktTimeStamp8190(priv, &stats);
4454
4455 //
4456 // Get Total offset of MPDU Frame Body
4457 //
4458 if((stats.RxBufShift + stats.RxDrvInfoSize) > 0)
4459 stats.bShift = 1;
4460
4461 /* ???? */
4462 TranslateRxSignalStuff819xpci(priv, skb, &stats, pdesc, pDrvInfo);
4463
4464 /* Rx A-MPDU */
4465 if(pDrvInfo->FirstAGGR==1 || pDrvInfo->PartAggr == 1)
4466 RT_TRACE(COMP_RXDESC, "pDrvInfo->FirstAGGR = %d, pDrvInfo->PartAggr = %d\n",
4467 pDrvInfo->FirstAGGR, pDrvInfo->PartAggr);
4468 skb_trim(skb, skb->len - 4/*sCrcLng*/);
4469 /* rx packets statistics */
4470 ieee80211_hdr = (struct ieee80211_hdr_1addr *)skb->data;
4471 unicast_packet = false;
4472
4473 if(is_broadcast_ether_addr(ieee80211_hdr->addr1)) {
4474 //TODO
4475 }else if(is_multicast_ether_addr(ieee80211_hdr->addr1)){
4476 //TODO
4477 }else {
4478 /* unicast packet */
4479 unicast_packet = true;
4480 }
4481
4482 if(!ieee80211_rtl_rx(priv->ieee80211, skb, &stats)){
4483 dev_kfree_skb_any(skb);
4484 } else {
4485 priv->stats.rxok++;
4486 if(unicast_packet) {
4487 priv->stats.rxbytesunicast += skb->len;
4488 }
4489 }
4490
4491 pci_unmap_single(priv->pdev, *((dma_addr_t *) skb->cb),
4492 priv->rxbuffersize, PCI_DMA_FROMDEVICE);
4493
4494 skb = new_skb;
4495 priv->rx_buf[priv->rx_idx] = skb;
4496 *((dma_addr_t *) skb->cb) = pci_map_single(priv->pdev, skb_tail_pointer(skb), priv->rxbuffersize, PCI_DMA_FROMDEVICE);
4497
4498done:
4499 pdesc->BufferAddress = cpu_to_le32(*((dma_addr_t *)skb->cb));
4500 pdesc->OWN = 1;
4501 pdesc->Length = priv->rxbuffersize;
4502 if (priv->rx_idx == priv->rxringcount-1)
4503 pdesc->EOR = 1;
4504 priv->rx_idx = (priv->rx_idx + 1) % priv->rxringcount;
4505 }
4506
4507}
4508
4509static void rtl8192_irq_rx_tasklet(unsigned long arg)
4510{
4511 struct r8192_priv *priv = (struct r8192_priv*) arg;
4512 rtl8192_rx(priv);
4513 /* unmask RDU */
4514 write_nic_dword(priv, INTA_MASK, read_nic_dword(priv, INTA_MASK) | IMR_RDU);
4515}
4516
4517static const struct net_device_ops rtl8192_netdev_ops = {
4518 .ndo_open = rtl8192_open,
4519 .ndo_stop = rtl8192_close,
4520 .ndo_tx_timeout = tx_timeout,
4521 .ndo_do_ioctl = rtl8192_ioctl,
4522 .ndo_set_multicast_list = r8192_set_multicast,
4523 .ndo_set_mac_address = r8192_set_mac_adr,
4524 .ndo_start_xmit = ieee80211_rtl_xmit,
4525};
4526
4527static int __devinit rtl8192_pci_probe(struct pci_dev *pdev,
4528 const struct pci_device_id *id)
4529{
4530 struct net_device *dev = NULL;
4531 struct r8192_priv *priv= NULL;
4532 u8 unit = 0;
4533 int ret = -ENODEV;
4534 unsigned long pmem_start, pmem_len, pmem_flags;
4535 u8 revisionid;
4536
4537 RT_TRACE(COMP_INIT,"Configuring chip resources\n");
4538
4539 if( pci_enable_device (pdev) ){
4540 RT_TRACE(COMP_ERR,"Failed to enable PCI device");
4541 return -EIO;
4542 }
4543
4544 pci_set_master(pdev);
4545 //pci_set_wmi(pdev);
4546 pci_set_dma_mask(pdev, 0xffffff00ULL);
4547 pci_set_consistent_dma_mask(pdev,0xffffff00ULL);
4548 dev = alloc_ieee80211(sizeof(struct r8192_priv));
4549 if (!dev) {
4550 ret = -ENOMEM;
4551 goto fail_free;
4552 }
4553
4554 pci_set_drvdata(pdev, dev);
4555 SET_NETDEV_DEV(dev, &pdev->dev);
4556 priv = ieee80211_priv(dev);
4557 priv->ieee80211 = netdev_priv(dev);
4558 priv->pdev=pdev;
4559 if((pdev->subsystem_vendor == PCI_VENDOR_ID_DLINK)&&(pdev->subsystem_device == 0x3304)){
4560 priv->ieee80211->bSupportRemoteWakeUp = 1;
4561 } else
4562 {
4563 priv->ieee80211->bSupportRemoteWakeUp = 0;
4564 }
4565
4566 pmem_start = pci_resource_start(pdev, 1);
4567 pmem_len = pci_resource_len(pdev, 1);
4568 pmem_flags = pci_resource_flags (pdev, 1);
4569
4570 if (!(pmem_flags & IORESOURCE_MEM)) {
4571 RT_TRACE(COMP_ERR, "region #1 not a MMIO resource, aborting\n");
4572 goto fail;
4573 }
4574
4575 //DMESG("Memory mapped space @ 0x%08lx ", pmem_start);
4576 if( ! request_mem_region(pmem_start, pmem_len, RTL819xE_MODULE_NAME)) {
4577 RT_TRACE(COMP_ERR,"request_mem_region failed!\n");
4578 goto fail;
4579 }
4580
4581 priv->mem_start = ioremap_nocache(pmem_start, pmem_len);
4582 if (!priv->mem_start) {
4583 RT_TRACE(COMP_ERR,"ioremap failed!\n");
4584 goto fail1;
4585 }
4586
4587 dev->mem_start = (unsigned long) priv->mem_start;
4588 dev->mem_end = (unsigned long) (priv->mem_start +
4589 pci_resource_len(pdev, 0));
4590
4591 /* We disable the RETRY_TIMEOUT register (0x41) to keep
4592 * PCI Tx retries from interfering with C3 CPU state */
4593 pci_write_config_byte(pdev, 0x41, 0x00);
4594
4595
4596 pci_read_config_byte(pdev, 0x08, &revisionid);
4597 /* If the revisionid is 0x10, the device uses rtl8192se. */
4598 if (pdev->device == 0x8192 && revisionid == 0x10)
4599 goto fail1;
4600
4601 pci_read_config_byte(pdev, 0x05, &unit);
4602 pci_write_config_byte(pdev, 0x05, unit & (~0x04));
4603
4604 dev->irq = pdev->irq;
4605 priv->irq = 0;
4606
4607 dev->netdev_ops = &rtl8192_netdev_ops;
4608
4609 dev->wireless_handlers = &r8192_wx_handlers_def;
4610 dev->type=ARPHRD_ETHER;
4611
4612 dev->watchdog_timeo = HZ*3;
4613
4614 if (dev_alloc_name(dev, ifname) < 0){
4615 RT_TRACE(COMP_INIT, "Oops: devname already taken! Trying wlan%%d...\n");
4616 strcpy(ifname, "wlan%d");
4617 dev_alloc_name(dev, ifname);
4618 }
4619
4620 RT_TRACE(COMP_INIT, "Driver probe completed1\n");
4621 if (rtl8192_init(priv)!=0) {
4622 RT_TRACE(COMP_ERR, "Initialization failed\n");
4623 goto fail;
4624 }
4625
4626 register_netdev(dev);
4627 RT_TRACE(COMP_INIT, "dev name=======> %s\n",dev->name);
4628 rtl8192_proc_init_one(priv);
4629
4630
4631 RT_TRACE(COMP_INIT, "Driver probe completed\n");
4632 return 0;
4633
4634fail1:
4635
4636 if (priv->mem_start) {
4637 iounmap(priv->mem_start);
4638 release_mem_region( pci_resource_start(pdev, 1),
4639 pci_resource_len(pdev, 1) );
4640 }
4641
4642fail:
4643 if(dev){
4644
4645 if (priv->irq) {
4646 free_irq(priv->irq, priv);
4647 priv->irq = 0;
4648 }
4649 free_ieee80211(dev);
4650 }
4651
4652fail_free:
4653 pci_disable_device(pdev);
4654
4655 DMESG("wlan driver load failed\n");
4656 pci_set_drvdata(pdev, NULL);
4657 return ret;
4658
4659}
4660
4661/* detach all the work and timer structure declared or inititialized
4662 * in r8192_init function.
4663 * */
4664static void rtl8192_cancel_deferred_work(struct r8192_priv* priv)
4665{
4666 /* call cancel_work_sync instead of cancel_delayed_work if and only if Linux_version_code
4667 * is or is newer than 2.6.20 and work structure is defined to be struct work_struct.
4668 * Otherwise call cancel_delayed_work is enough.
4669 * FIXME (2.6.20 should 2.6.22, work_struct should not cancel)
4670 * */
4671 cancel_delayed_work(&priv->watch_dog_wq);
4672 cancel_delayed_work(&priv->update_beacon_wq);
4673 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
4674 cancel_delayed_work(&priv->gpio_change_rf_wq);
4675 cancel_work_sync(&priv->reset_wq);
4676 cancel_work_sync(&priv->qos_activate);
4677}
4678
4679
4680static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev)
4681{
4682 struct net_device *dev = pci_get_drvdata(pdev);
4683 struct r8192_priv *priv ;
4684 u32 i;
4685
4686 if (dev) {
4687
4688 unregister_netdev(dev);
4689
4690 priv = ieee80211_priv(dev);
4691
4692 rtl8192_proc_remove_one(priv);
4693
4694 rtl8192_down(dev);
4695 if (priv->pFirmware)
4696 {
4697 vfree(priv->pFirmware);
4698 priv->pFirmware = NULL;
4699 }
4700 destroy_workqueue(priv->priv_wq);
4701
4702 /* free tx/rx rings */
4703 rtl8192_free_rx_ring(priv);
4704 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
4705 rtl8192_free_tx_ring(priv, i);
4706
4707 if (priv->irq) {
4708 printk("Freeing irq %d\n", priv->irq);
4709 free_irq(priv->irq, priv);
4710 priv->irq = 0;
4711 }
4712
4713 if (priv->mem_start) {
4714 iounmap(priv->mem_start);
4715 release_mem_region( pci_resource_start(pdev, 1),
4716 pci_resource_len(pdev, 1) );
4717 }
4718
4719 free_ieee80211(dev);
4720 }
4721
4722 pci_disable_device(pdev);
4723 RT_TRACE(COMP_DOWN, "wlan driver removed\n");
4724}
4725
4726extern int ieee80211_rtl_init(void);
4727extern void ieee80211_rtl_exit(void);
4728
4729static int __init rtl8192_pci_module_init(void)
4730{
4731 int retval;
4732
4733 retval = ieee80211_rtl_init();
4734 if (retval)
4735 return retval;
4736
4737 printk(KERN_INFO "\nLinux kernel driver for RTL8192 based WLAN cards\n");
4738 printk(KERN_INFO "Copyright (c) 2007-2008, Realsil Wlan\n");
4739 RT_TRACE(COMP_INIT, "Initializing module\n");
4740 rtl8192_proc_module_init();
4741 if(0!=pci_register_driver(&rtl8192_pci_driver))
4742 {
4743 DMESG("No device found");
4744 /*pci_unregister_driver (&rtl8192_pci_driver);*/
4745 return -ENODEV;
4746 }
4747 return 0;
4748}
4749
4750
4751static void __exit rtl8192_pci_module_exit(void)
4752{
4753 pci_unregister_driver(&rtl8192_pci_driver);
4754
4755 RT_TRACE(COMP_DOWN, "Exiting\n");
4756 rtl8192_proc_module_remove();
4757 ieee80211_rtl_exit();
4758}
4759
4760static irqreturn_t rtl8192_interrupt(int irq, void *param)
4761{
4762 struct r8192_priv *priv = param;
4763 struct net_device *dev = priv->ieee80211->dev;
4764 unsigned long flags;
4765 u32 inta;
4766 irqreturn_t ret = IRQ_HANDLED;
4767
4768 spin_lock_irqsave(&priv->irq_th_lock, flags);
4769
4770 /* ISR: 4bytes */
4771
4772 inta = read_nic_dword(priv, ISR); /* & priv->IntrMask; */
4773 write_nic_dword(priv, ISR, inta); /* reset int situation */
4774
4775 if (!inta) {
4776 /*
4777 * most probably we can safely return IRQ_NONE,
4778 * but for now is better to avoid problems
4779 */
4780 goto out_unlock;
4781 }
4782
4783 if (inta == 0xffff) {
4784 /* HW disappared */
4785 goto out_unlock;
4786 }
4787
4788 if (!netif_running(dev))
4789 goto out_unlock;
4790
4791 if (inta & IMR_TBDOK) {
4792 RT_TRACE(COMP_INTR, "beacon ok interrupt!\n");
4793 rtl8192_tx_isr(priv, BEACON_QUEUE);
4794 priv->stats.txbeaconokint++;
4795 }
4796
4797 if (inta & IMR_TBDER) {
4798 RT_TRACE(COMP_INTR, "beacon ok interrupt!\n");
4799 rtl8192_tx_isr(priv, BEACON_QUEUE);
4800 priv->stats.txbeaconerr++;
4801 }
4802
4803 if (inta & IMR_MGNTDOK ) {
4804 RT_TRACE(COMP_INTR, "Manage ok interrupt!\n");
4805 priv->stats.txmanageokint++;
4806 rtl8192_tx_isr(priv, MGNT_QUEUE);
4807 }
4808
4809 if (inta & IMR_COMDOK)
4810 {
4811 priv->stats.txcmdpktokint++;
4812 rtl8192_tx_isr(priv, TXCMD_QUEUE);
4813 }
4814
4815 if (inta & IMR_ROK) {
4816 priv->stats.rxint++;
4817 tasklet_schedule(&priv->irq_rx_tasklet);
4818 }
4819
4820 if (inta & IMR_BcnInt) {
4821 RT_TRACE(COMP_INTR, "prepare beacon for interrupt!\n");
4822 tasklet_schedule(&priv->irq_prepare_beacon_tasklet);
4823 }
4824
4825 if (inta & IMR_RDU) {
4826 RT_TRACE(COMP_INTR, "rx descriptor unavailable!\n");
4827 priv->stats.rxrdu++;
4828 /* reset int situation */
4829 write_nic_dword(priv, INTA_MASK, read_nic_dword(priv, INTA_MASK) & ~IMR_RDU);
4830 tasklet_schedule(&priv->irq_rx_tasklet);
4831 }
4832
4833 if (inta & IMR_RXFOVW) {
4834 RT_TRACE(COMP_INTR, "rx overflow !\n");
4835 priv->stats.rxoverflow++;
4836 tasklet_schedule(&priv->irq_rx_tasklet);
4837 }
4838
4839 if (inta & IMR_TXFOVW)
4840 priv->stats.txoverflow++;
4841
4842 if (inta & IMR_BKDOK) {
4843 RT_TRACE(COMP_INTR, "BK Tx OK interrupt!\n");
4844 priv->stats.txbkokint++;
4845 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
4846 rtl8192_tx_isr(priv, BK_QUEUE);
4847 }
4848
4849 if (inta & IMR_BEDOK) {
4850 RT_TRACE(COMP_INTR, "BE TX OK interrupt!\n");
4851 priv->stats.txbeokint++;
4852 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
4853 rtl8192_tx_isr(priv, BE_QUEUE);
4854 }
4855
4856 if (inta & IMR_VIDOK) {
4857 RT_TRACE(COMP_INTR, "VI TX OK interrupt!\n");
4858 priv->stats.txviokint++;
4859 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
4860 rtl8192_tx_isr(priv, VI_QUEUE);
4861 }
4862
4863 if (inta & IMR_VODOK) {
4864 priv->stats.txvookint++;
4865 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
4866 rtl8192_tx_isr(priv, VO_QUEUE);
4867 }
4868
4869out_unlock:
4870 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
4871
4872 return ret;
4873}
4874
4875void EnableHWSecurityConfig8192(struct r8192_priv *priv)
4876{
4877 u8 SECR_value = 0x0;
4878 struct ieee80211_device* ieee = priv->ieee80211;
4879
4880 SECR_value = SCR_TxEncEnable | SCR_RxDecEnable;
4881
4882 if (((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type)) && (priv->ieee80211->auth_mode != 2))
4883 {
4884 SECR_value |= SCR_RxUseDK;
4885 SECR_value |= SCR_TxUseDK;
4886 }
4887 else if ((ieee->iw_mode == IW_MODE_ADHOC) && (ieee->pairwise_key_type & (KEY_TYPE_CCMP | KEY_TYPE_TKIP)))
4888 {
4889 SECR_value |= SCR_RxUseDK;
4890 SECR_value |= SCR_TxUseDK;
4891 }
4892
4893 //add HWSec active enable here.
4894//default using hwsec. when peer AP is in N mode only and pairwise_key_type is none_aes(which HT_IOT_ACT_PURE_N_MODE indicates it), use software security. when peer AP is in b,g,n mode mixed and pairwise_key_type is none_aes, use g mode hw security. WB on 2008.7.4
4895 ieee->hwsec_active = 1;
4896
4897 if ((ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE) || !hwwep)//!ieee->hwsec_support) //add hwsec_support flag to totol control hw_sec on/off
4898 {
4899 ieee->hwsec_active = 0;
4900 SECR_value &= ~SCR_RxDecEnable;
4901 }
4902
4903 RT_TRACE(COMP_SEC,"%s:, hwsec:%d, pairwise_key:%d, SECR_value:%x\n", __FUNCTION__,
4904 ieee->hwsec_active, ieee->pairwise_key_type, SECR_value);
4905 {
4906 write_nic_byte(priv, SECR, SECR_value);//SECR_value | SCR_UseDK );
4907 }
4908
4909}
4910#define TOTAL_CAM_ENTRY 32
4911//#define CAM_CONTENT_COUNT 8
4912void setKey(struct r8192_priv *priv, u8 EntryNo, u8 KeyIndex, u16 KeyType,
4913 const u8 *MacAddr, u8 DefaultKey, u32 *KeyContent)
4914{
4915 u32 TargetCommand = 0;
4916 u32 TargetContent = 0;
4917 u16 usConfig = 0;
4918 u8 i;
4919#ifdef ENABLE_IPS
4920 RT_RF_POWER_STATE rtState;
4921
4922 rtState = priv->eRFPowerState;
4923 if (priv->PowerSaveControl.bInactivePs){
4924 if(rtState == eRfOff){
4925 if(priv->RfOffReason > RF_CHANGE_BY_IPS)
4926 {
4927 RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__);
4928 //up(&priv->wx_sem);
4929 return ;
4930 }
4931 else{
4932 down(&priv->ieee80211->ips_sem);
4933 IPSLeave(priv);
4934 up(&priv->ieee80211->ips_sem);
4935 }
4936 }
4937 }
4938 priv->ieee80211->is_set_key = true;
4939#endif
4940 if (EntryNo >= TOTAL_CAM_ENTRY)
4941 RT_TRACE(COMP_ERR, "cam entry exceeds in setKey()\n");
4942
4943 RT_TRACE(COMP_SEC, "====>to setKey(), priv:%p, EntryNo:%d, KeyIndex:%d, KeyType:%d, MacAddr%pM\n", priv, EntryNo, KeyIndex, KeyType, MacAddr);
4944
4945 if (DefaultKey)
4946 usConfig |= BIT15 | (KeyType<<2);
4947 else
4948 usConfig |= BIT15 | (KeyType<<2) | KeyIndex;
4949// usConfig |= BIT15 | (KeyType<<2) | (DefaultKey<<5) | KeyIndex;
4950
4951
4952 for(i=0 ; i<CAM_CONTENT_COUNT; i++){
4953 TargetCommand = i+CAM_CONTENT_COUNT*EntryNo;
4954 TargetCommand |= BIT31|BIT16;
4955
4956 if(i==0){//MAC|Config
4957 TargetContent = (u32)(*(MacAddr+0)) << 16|
4958 (u32)(*(MacAddr+1)) << 24|
4959 (u32)usConfig;
4960
4961 write_nic_dword(priv, WCAMI, TargetContent);
4962 write_nic_dword(priv, RWCAM, TargetCommand);
4963 }
4964 else if(i==1){//MAC
4965 TargetContent = (u32)(*(MacAddr+2)) |
4966 (u32)(*(MacAddr+3)) << 8|
4967 (u32)(*(MacAddr+4)) << 16|
4968 (u32)(*(MacAddr+5)) << 24;
4969 write_nic_dword(priv, WCAMI, TargetContent);
4970 write_nic_dword(priv, RWCAM, TargetCommand);
4971 }
4972 else { //Key Material
4973 if(KeyContent != NULL)
4974 {
4975 write_nic_dword(priv, WCAMI, (u32)(*(KeyContent+i-2)) );
4976 write_nic_dword(priv, RWCAM, TargetCommand);
4977 }
4978 }
4979 }
4980 RT_TRACE(COMP_SEC,"=========>after set key, usconfig:%x\n", usConfig);
4981}
4982
4983bool NicIFEnableNIC(struct r8192_priv *priv)
4984{
4985 RT_STATUS init_status = RT_STATUS_SUCCESS;
4986 PRT_POWER_SAVE_CONTROL pPSC = &priv->PowerSaveControl;
4987
4988 //YJ,add,091109
4989 if (priv->up == 0){
4990 RT_TRACE(COMP_ERR, "ERR!!! %s(): Driver is already down!\n",__FUNCTION__);
4991 priv->bdisable_nic = false; //YJ,add,091111
4992 return false;
4993 }
4994 // <1> Reset memory: descriptor, buffer,..
4995 //NicIFResetMemory(Adapter);
4996
4997 // <2> Enable Adapter
4998 //priv->bfirst_init = true;
4999 init_status = rtl8192_adapter_start(priv);
5000 if (init_status != RT_STATUS_SUCCESS) {
5001 RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n",__FUNCTION__);
5002 priv->bdisable_nic = false; //YJ,add,091111
5003 return -1;
5004 }
5005 RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC);
5006 //priv->bfirst_init = false;
5007
5008 // <3> Enable Interrupt
5009 rtl8192_irq_enable(priv);
5010 priv->bdisable_nic = false;
5011
5012 return (init_status == RT_STATUS_SUCCESS);
5013}
5014
5015bool NicIFDisableNIC(struct r8192_priv *priv)
5016{
5017 bool status = true;
5018 u8 tmp_state = 0;
5019 // <1> Disable Interrupt
5020
5021 priv->bdisable_nic = true; //YJ,move,091109
5022 tmp_state = priv->ieee80211->state;
5023
5024 ieee80211_softmac_stop_protocol(priv->ieee80211, false);
5025
5026 priv->ieee80211->state = tmp_state;
5027 rtl8192_cancel_deferred_work(priv);
5028 rtl8192_irq_disable(priv);
5029 // <2> Stop all timer
5030
5031 // <3> Disable Adapter
5032 rtl8192_halt_adapter(priv, false);
5033// priv->bdisable_nic = true;
5034
5035 return status;
5036}
5037
5038module_init(rtl8192_pci_module_init);
5039module_exit(rtl8192_pci_module_exit);
diff --git a/drivers/staging/rtl8192e/r8192E_core.c.rej b/drivers/staging/rtl8192e/r8192E_core.c.rej
new file mode 100644
index 00000000000..351b44cce9a
--- /dev/null
+++ b/drivers/staging/rtl8192e/r8192E_core.c.rej
@@ -0,0 +1,5036 @@
1--- drivers/staging/rtl8192e/r8192E_core.c
2+++ drivers/staging/rtl8192e/r8192E_core.c
3@@ -1,5033 +0,0 @@
4-/******************************************************************************
5- * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
6- * Linux device driver for RTL8192E
7- *
8- * Based on the r8180 driver, which is:
9- * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
10- * This program is free software; you can redistribute it and/or modify it
11- * under the terms of version 2 of the GNU General Public License as
12- * published by the Free Software Foundation.
13- *
14- * This program is distributed in the hope that it will be useful, but WITHOUT
15- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17- * more details.
18- *
19- * You should have received a copy of the GNU General Public License along with
20- * this program; if not, write to the Free Software Foundation, Inc.,
21- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
22- *
23- * The full GNU General Public License is included in this distribution in the
24- * file called LICENSE.
25- *
26- * Contact Information:
27- * Jerry chuang <wlanfae@realtek.com>
28- */
29-
30-
31-#include <linux/vmalloc.h>
32-#include <linux/slab.h>
33-#include <asm/uaccess.h>
34-#include "r8192E_hw.h"
35-#include "r8192E.h"
36-#include "r8190_rtl8256.h" /* RTL8225 Radio frontend */
37-#include "r8180_93cx6.h" /* Card EEPROM */
38-#include "r8192E_wx.h"
39-#include "r819xE_phy.h" //added by WB 4.30.2008
40-#include "r819xE_phyreg.h"
41-#include "r819xE_cmdpkt.h"
42-#include "r8192E_dm.h"
43-
44-#ifdef CONFIG_PM
45-#include "r8192_pm.h"
46-#endif
47-
48-#ifdef ENABLE_DOT11D
49-#include "ieee80211/dot11d.h"
50-#endif
51-
52-//set here to open your trace code. //WB
53-u32 rt_global_debug_component = COMP_ERR ; //always open err flags on
54-
55-static DEFINE_PCI_DEVICE_TABLE(rtl8192_pci_id_tbl) = {
56- /* Realtek */
57- { PCI_DEVICE(0x10ec, 0x8192) },
58-
59- /* Corega */
60- { PCI_DEVICE(0x07aa, 0x0044) },
61- { PCI_DEVICE(0x07aa, 0x0047) },
62- {}
63-};
64-
65-static char ifname[IFNAMSIZ] = "wlan%d";
66-static int hwwep = 1; //default use hw. set 0 to use software security
67-static int channels = 0x3fff;
68-
69-MODULE_LICENSE("GPL");
70-MODULE_VERSION("V 1.1");
71-MODULE_DEVICE_TABLE(pci, rtl8192_pci_id_tbl);
72-//MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
73-MODULE_DESCRIPTION("Linux driver for Realtek RTL819x WiFi cards");
74-
75-
76-module_param_string(ifname, ifname, sizeof(ifname), S_IRUGO|S_IWUSR);
77-module_param(hwwep,int, S_IRUGO|S_IWUSR);
78-module_param(channels,int, S_IRUGO|S_IWUSR);
79-
80-MODULE_PARM_DESC(ifname," Net interface name, wlan%d=default");
81-MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
82-MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
83-
84-static int __devinit rtl8192_pci_probe(struct pci_dev *pdev,
85- const struct pci_device_id *id);
86-static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev);
87-
88-static struct pci_driver rtl8192_pci_driver = {
89- .name = RTL819xE_MODULE_NAME, /* Driver name */
90- .id_table = rtl8192_pci_id_tbl, /* PCI_ID table */
91- .probe = rtl8192_pci_probe, /* probe fn */
92- .remove = __devexit_p(rtl8192_pci_disconnect), /* remove fn */
93-#ifdef CONFIG_PM
94- .suspend = rtl8192E_suspend, /* PM suspend fn */
95- .resume = rtl8192E_resume, /* PM resume fn */
96-#else
97- .suspend = NULL, /* PM suspend fn */
98- .resume = NULL, /* PM resume fn */
99-#endif
100-};
101-
102-static void rtl8192_start_beacon(struct ieee80211_device *ieee80211);
103-static void rtl8192_stop_beacon(struct ieee80211_device *ieee80211);
104-static void rtl819x_watchdog_wqcallback(struct work_struct *work);
105-static void rtl8192_irq_rx_tasklet(unsigned long arg);
106-static void rtl8192_irq_tx_tasklet(unsigned long arg);
107-static void rtl8192_prepare_beacon(unsigned long arg);
108-static irqreturn_t rtl8192_interrupt(int irq, void *param);
109-static void rtl819xE_tx_cmd(struct r8192_priv *priv, struct sk_buff *skb);
110-static void rtl8192_update_ratr_table(struct r8192_priv *priv);
111-static void rtl8192_restart(struct work_struct *work);
112-static void watch_dog_timer_callback(unsigned long data);
113-static int _rtl8192_up(struct r8192_priv *priv);
114-static void rtl8192_cancel_deferred_work(struct r8192_priv* priv);
115-static short rtl8192_tx(struct r8192_priv *priv, struct sk_buff* skb);
116-
117-#ifdef ENABLE_DOT11D
118-
119-typedef struct _CHANNEL_LIST
120-{
121- u8 Channel[32];
122- u8 Len;
123-}CHANNEL_LIST, *PCHANNEL_LIST;
124-
125-static const CHANNEL_LIST ChannelPlan[] = {
126- {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,149,153,157,161,165},24}, //FCC
127- {{1,2,3,4,5,6,7,8,9,10,11},11}, //IC
128- {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //ETSI
129- {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Spain. Change to ETSI.
130- {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //France. Change to ETSI.
131- {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, //MKK //MKK
132- {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22},//MKK1
133- {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Israel.
134- {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, // For 11a , TELEC
135- {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64}, 22}, //MIC
136- {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14} //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
137-};
138-
139-static void rtl819x_set_channel_map(u8 channel_plan, struct r8192_priv* priv)
140-{
141- int i, max_chan=-1, min_chan=-1;
142- struct ieee80211_device* ieee = priv->ieee80211;
143- switch (channel_plan)
144- {
145- case COUNTRY_CODE_FCC:
146- case COUNTRY_CODE_IC:
147- case COUNTRY_CODE_ETSI:
148- case COUNTRY_CODE_SPAIN:
149- case COUNTRY_CODE_FRANCE:
150- case COUNTRY_CODE_MKK:
151- case COUNTRY_CODE_MKK1:
152- case COUNTRY_CODE_ISRAEL:
153- case COUNTRY_CODE_TELEC:
154- case COUNTRY_CODE_MIC:
155- {
156- Dot11d_Init(ieee);
157- ieee->bGlobalDomain = false;
158- //acturally 8225 & 8256 rf chip only support B,G,24N mode
159- min_chan = 1;
160- max_chan = 14;
161-
162- if (ChannelPlan[channel_plan].Len != 0){
163- // Clear old channel map
164- memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
165- // Set new channel map
166- for (i=0;i<ChannelPlan[channel_plan].Len;i++)
167- {
168- if (ChannelPlan[channel_plan].Channel[i] < min_chan || ChannelPlan[channel_plan].Channel[i] > max_chan)
169- break;
170- GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
171- }
172- }
173- break;
174- }
175- case COUNTRY_CODE_GLOBAL_DOMAIN:
176- {
177- GET_DOT11D_INFO(ieee)->bEnabled = 0; //this flag enabled to follow 11d country IE setting, otherwise, it shall follow global domain setting
178- Dot11d_Reset(ieee);
179- ieee->bGlobalDomain = true;
180- break;
181- }
182- default:
183- break;
184- }
185-}
186-#endif
187-
188-static inline bool rx_hal_is_cck_rate(prx_fwinfo_819x_pci pdrvinfo)
189-{
190- return (pdrvinfo->RxRate == DESC90_RATE1M ||
191- pdrvinfo->RxRate == DESC90_RATE2M ||
192- pdrvinfo->RxRate == DESC90_RATE5_5M ||
193- pdrvinfo->RxRate == DESC90_RATE11M) &&
194- !pdrvinfo->RxHT;
195-}
196-
197-void CamResetAllEntry(struct r8192_priv* priv)
198-{
199- write_nic_dword(priv, RWCAM, BIT31|BIT30);
200-}
201-
202-void write_cam(struct r8192_priv *priv, u8 addr, u32 data)
203-{
204- write_nic_dword(priv, WCAMI, data);
205- write_nic_dword(priv, RWCAM, BIT31|BIT16|(addr&0xff) );
206-}
207-
208-u32 read_cam(struct r8192_priv *priv, u8 addr)
209-{
210- write_nic_dword(priv, RWCAM, 0x80000000|(addr&0xff) );
211- return read_nic_dword(priv, 0xa8);
212-}
213-
214-u8 read_nic_byte(struct r8192_priv *priv, int x)
215-{
216- return 0xff & readb(priv->mem_start + x);
217-}
218-
219-u32 read_nic_dword(struct r8192_priv *priv, int x)
220-{
221- return readl(priv->mem_start + x);
222-}
223-
224-u16 read_nic_word(struct r8192_priv *priv, int x)
225-{
226- return readw(priv->mem_start + x);
227-}
228-
229-void write_nic_byte(struct r8192_priv *priv, int x,u8 y)
230-{
231- writeb(y, priv->mem_start + x);
232- udelay(20);
233-}
234-
235-void write_nic_dword(struct r8192_priv *priv, int x,u32 y)
236-{
237- writel(y, priv->mem_start + x);
238- udelay(20);
239-}
240-
241-void write_nic_word(struct r8192_priv *priv, int x,u16 y)
242-{
243- writew(y, priv->mem_start + x);
244- udelay(20);
245-}
246-
247-u8 rtl8192e_ap_sec_type(struct ieee80211_device *ieee)
248-{
249- static const u8 ccmp_ie[4] = {0x00,0x50,0xf2,0x04};
250- static const u8 ccmp_rsn_ie[4] = {0x00, 0x0f, 0xac, 0x04};
251- int wpa_ie_len= ieee->wpa_ie_len;
252- struct ieee80211_crypt_data* crypt;
253- int encrypt;
254-
255- crypt = ieee->crypt[ieee->tx_keyidx];
256-
257- encrypt = (ieee->current_network.capability & WLAN_CAPABILITY_PRIVACY) ||
258- (ieee->host_encrypt && crypt && crypt->ops &&
259- (0 == strcmp(crypt->ops->name,"WEP")));
260-
261- /* simply judge */
262- if(encrypt && (wpa_ie_len == 0)) {
263- // wep encryption, no N mode setting */
264- return SEC_ALG_WEP;
265- } else if((wpa_ie_len != 0)) {
266- // parse pairwise key type */
267- if (((ieee->wpa_ie[0] == 0xdd) && (!memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) ||
268- ((ieee->wpa_ie[0] == 0x30) && (!memcmp(&ieee->wpa_ie[10],ccmp_rsn_ie, 4))))
269- return SEC_ALG_CCMP;
270- else
271- return SEC_ALG_TKIP;
272- } else {
273- return SEC_ALG_NONE;
274- }
275-}
276-
277-void rtl8192e_SetHwReg(struct ieee80211_device *ieee80211, u8 variable, u8 *val)
278-{
279- struct r8192_priv *priv = ieee80211_priv(ieee80211->dev);
280-
281- switch(variable)
282- {
283-
284- case HW_VAR_BSSID:
285- write_nic_dword(priv, BSSIDR, ((u32*)(val))[0]);
286- write_nic_word(priv, BSSIDR+2, ((u16*)(val+2))[0]);
287- break;
288-
289- case HW_VAR_MEDIA_STATUS:
290- {
291- RT_OP_MODE OpMode = *((RT_OP_MODE *)(val));
292- u8 btMsr = read_nic_byte(priv, MSR);
293-
294- btMsr &= 0xfc;
295-
296- switch(OpMode)
297- {
298- case RT_OP_MODE_INFRASTRUCTURE:
299- btMsr |= MSR_INFRA;
300- break;
301-
302- case RT_OP_MODE_IBSS:
303- btMsr |= MSR_ADHOC;
304- break;
305-
306- case RT_OP_MODE_AP:
307- btMsr |= MSR_AP;
308- break;
309-
310- default:
311- btMsr |= MSR_NOLINK;
312- break;
313- }
314-
315- write_nic_byte(priv, MSR, btMsr);
316- }
317- break;
318-
319- case HW_VAR_CHECK_BSSID:
320- {
321- u32 RegRCR, Type;
322-
323- Type = ((u8*)(val))[0];
324- RegRCR = read_nic_dword(priv, RCR);
325- priv->ReceiveConfig = RegRCR;
326-
327- if (Type == true)
328- RegRCR |= (RCR_CBSSID);
329- else if (Type == false)
330- RegRCR &= (~RCR_CBSSID);
331-
332- write_nic_dword(priv, RCR,RegRCR);
333- priv->ReceiveConfig = RegRCR;
334-
335- }
336- break;
337-
338- case HW_VAR_SLOT_TIME:
339- {
340- priv->slot_time = val[0];
341- write_nic_byte(priv, SLOT_TIME, val[0]);
342-
343- }
344- break;
345-
346- case HW_VAR_ACK_PREAMBLE:
347- {
348- u32 regTmp = 0;
349- priv->short_preamble = (bool)(*(u8*)val );
350- regTmp = priv->basic_rate;
351- if (priv->short_preamble)
352- regTmp |= BRSR_AckShortPmb;
353- write_nic_dword(priv, RRSR, regTmp);
354- }
355- break;
356-
357- case HW_VAR_CPU_RST:
358- write_nic_dword(priv, CPU_GEN, ((u32*)(val))[0]);
359- break;
360-
361- default:
362- break;
363- }
364-
365-}
366-
367-static struct proc_dir_entry *rtl8192_proc = NULL;
368-
369-static int proc_get_stats_ap(char *page, char **start,
370- off_t offset, int count,
371- int *eof, void *data)
372-{
373- struct r8192_priv *priv = data;
374- struct ieee80211_device *ieee = priv->ieee80211;
375- struct ieee80211_network *target;
376- int len = 0;
377-
378- list_for_each_entry(target, &ieee->network_list, list) {
379-
380- len += snprintf(page + len, count - len,
381- "%s ", target->ssid);
382-
383- if(target->wpa_ie_len>0 || target->rsn_ie_len>0){
384- len += snprintf(page + len, count - len,
385- "WPA\n");
386- }
387- else{
388- len += snprintf(page + len, count - len,
389- "non_WPA\n");
390- }
391-
392- }
393-
394- *eof = 1;
395- return len;
396-}
397-
398-static int proc_get_registers(char *page, char **start,
399- off_t offset, int count,
400- int *eof, void *data)
401-{
402- struct r8192_priv *priv = data;
403- int len = 0;
404- int i,n;
405- int max=0xff;
406-
407- /* This dump the current register page */
408- len += snprintf(page + len, count - len,
409- "\n####################page 0##################\n ");
410-
411- for(n=0;n<=max;)
412- {
413- len += snprintf(page + len, count - len,
414- "\nD: %2x > ",n);
415-
416- for(i=0;i<16 && n<=max;i++,n++)
417- len += snprintf(page + len, count - len,
418- "%2x ",read_nic_byte(priv,n));
419- }
420- len += snprintf(page + len, count - len,"\n");
421- len += snprintf(page + len, count - len,
422- "\n####################page 1##################\n ");
423- for(n=0;n<=max;)
424- {
425- len += snprintf(page + len, count - len,
426- "\nD: %2x > ",n);
427-
428- for(i=0;i<16 && n<=max;i++,n++)
429- len += snprintf(page + len, count - len,
430- "%2x ",read_nic_byte(priv,0x100|n));
431- }
432-
433- len += snprintf(page + len, count - len,
434- "\n####################page 3##################\n ");
435- for(n=0;n<=max;)
436- {
437- len += snprintf(page + len, count - len,
438- "\nD: %2x > ",n);
439-
440- for(i=0;i<16 && n<=max;i++,n++)
441- len += snprintf(page + len, count - len,
442- "%2x ",read_nic_byte(priv,0x300|n));
443- }
444-
445- *eof = 1;
446- return len;
447-
448-}
449-
450-static int proc_get_stats_tx(char *page, char **start,
451- off_t offset, int count,
452- int *eof, void *data)
453-{
454- struct r8192_priv *priv = data;
455-
456- int len = 0;
457-
458- len += snprintf(page + len, count - len,
459- "TX VI priority ok int: %lu\n"
460- "TX VO priority ok int: %lu\n"
461- "TX BE priority ok int: %lu\n"
462- "TX BK priority ok int: %lu\n"
463- "TX MANAGE priority ok int: %lu\n"
464- "TX BEACON priority ok int: %lu\n"
465- "TX BEACON priority error int: %lu\n"
466- "TX CMDPKT priority ok int: %lu\n"
467- "TX queue stopped?: %d\n"
468- "TX fifo overflow: %lu\n"
469- "TX total data packets %lu\n"
470- "TX total data bytes :%lu\n",
471- priv->stats.txviokint,
472- priv->stats.txvookint,
473- priv->stats.txbeokint,
474- priv->stats.txbkokint,
475- priv->stats.txmanageokint,
476- priv->stats.txbeaconokint,
477- priv->stats.txbeaconerr,
478- priv->stats.txcmdpktokint,
479- netif_queue_stopped(priv->ieee80211->dev),
480- priv->stats.txoverflow,
481- priv->ieee80211->stats.tx_packets,
482- priv->ieee80211->stats.tx_bytes);
483-
484- *eof = 1;
485- return len;
486-}
487-
488-
489-
490-static int proc_get_stats_rx(char *page, char **start,
491- off_t offset, int count,
492- int *eof, void *data)
493-{
494- struct r8192_priv *priv = data;
495- int len = 0;
496-
497- len += snprintf(page + len, count - len,
498- "RX packets: %lu\n"
499- "RX desc err: %lu\n"
500- "RX rx overflow error: %lu\n",
501- priv->stats.rxint,
502- priv->stats.rxrdu,
503- priv->stats.rxoverflow);
504-
505- *eof = 1;
506- return len;
507-}
508-
509-static void rtl8192_proc_module_init(void)
510-{
511- RT_TRACE(COMP_INIT, "Initializing proc filesystem\n");
512- rtl8192_proc=create_proc_entry(RTL819xE_MODULE_NAME, S_IFDIR, init_net.proc_net);
513-}
514-
515-
516-static void rtl8192_proc_module_remove(void)
517-{
518- remove_proc_entry(RTL819xE_MODULE_NAME, init_net.proc_net);
519-}
520-
521-
522-static void rtl8192_proc_remove_one(struct r8192_priv *priv)
523-{
524- struct net_device *dev = priv->ieee80211->dev;
525-
526- printk("dev name=======> %s\n",dev->name);
527-
528- if (priv->dir_dev) {
529- remove_proc_entry("stats-tx", priv->dir_dev);
530- remove_proc_entry("stats-rx", priv->dir_dev);
531- remove_proc_entry("stats-ap", priv->dir_dev);
532- remove_proc_entry("registers", priv->dir_dev);
533- remove_proc_entry("wlan0", rtl8192_proc);
534- priv->dir_dev = NULL;
535- }
536-}
537-
538-
539-static void rtl8192_proc_init_one(struct r8192_priv *priv)
540-{
541- struct net_device *dev = priv->ieee80211->dev;
542- struct proc_dir_entry *e;
543-
544- priv->dir_dev = create_proc_entry(dev->name,
545- S_IFDIR | S_IRUGO | S_IXUGO,
546- rtl8192_proc);
547- if (!priv->dir_dev) {
548- RT_TRACE(COMP_ERR, "Unable to initialize /proc/net/rtl8192/%s\n",
549- dev->name);
550- return;
551- }
552- e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
553- priv->dir_dev, proc_get_stats_rx, priv);
554-
555- if (!e) {
556- RT_TRACE(COMP_ERR,"Unable to initialize "
557- "/proc/net/rtl8192/%s/stats-rx\n",
558- dev->name);
559- }
560-
561-
562- e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
563- priv->dir_dev, proc_get_stats_tx, priv);
564-
565- if (!e) {
566- RT_TRACE(COMP_ERR, "Unable to initialize "
567- "/proc/net/rtl8192/%s/stats-tx\n",
568- dev->name);
569- }
570-
571- e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO,
572- priv->dir_dev, proc_get_stats_ap, priv);
573-
574- if (!e) {
575- RT_TRACE(COMP_ERR, "Unable to initialize "
576- "/proc/net/rtl8192/%s/stats-ap\n",
577- dev->name);
578- }
579-
580- e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
581- priv->dir_dev, proc_get_registers, priv);
582- if (!e) {
583- RT_TRACE(COMP_ERR, "Unable to initialize "
584- "/proc/net/rtl8192/%s/registers\n",
585- dev->name);
586- }
587-}
588-
589-static short check_nic_enough_desc(struct ieee80211_device *ieee, int prio)
590-{
591- struct r8192_priv *priv = ieee80211_priv(ieee->dev);
592- struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
593-
594- /* for now we reserve two free descriptor as a safety boundary
595- * between the tail and the head
596- */
597- return (ring->entries - skb_queue_len(&ring->queue) >= 2);
598-}
599-
600-static void tx_timeout(struct net_device *dev)
601-{
602- struct r8192_priv *priv = ieee80211_priv(dev);
603-
604- schedule_work(&priv->reset_wq);
605- printk("TXTIMEOUT");
606-}
607-
608-static void rtl8192_irq_enable(struct r8192_priv *priv)
609-{
610- u32 mask;
611-
612- mask = IMR_ROK | IMR_VODOK | IMR_VIDOK | IMR_BEDOK | IMR_BKDOK |
613- IMR_HCCADOK | IMR_MGNTDOK | IMR_COMDOK | IMR_HIGHDOK |
614- IMR_BDOK | IMR_RXCMDOK | IMR_TIMEOUT0 | IMR_RDU | IMR_RXFOVW |
615- IMR_TXFOVW | IMR_BcnInt | IMR_TBDOK | IMR_TBDER;
616-
617- write_nic_dword(priv, INTA_MASK, mask);
618-}
619-
620-static void rtl8192_irq_disable(struct r8192_priv *priv)
621-{
622- write_nic_dword(priv, INTA_MASK, 0);
623- synchronize_irq(priv->irq);
624-}
625-
626-static void rtl8192_update_msr(struct r8192_priv *priv)
627-{
628- u8 msr;
629-
630- msr = read_nic_byte(priv, MSR);
631- msr &= ~ MSR_LINK_MASK;
632-
633- /* do not change in link_state != WLAN_LINK_ASSOCIATED.
634- * msr must be updated if the state is ASSOCIATING.
635- * this is intentional and make sense for ad-hoc and
636- * master (see the create BSS/IBSS func)
637- */
638- if (priv->ieee80211->state == IEEE80211_LINKED){
639-
640- if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
641- msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
642- else if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
643- msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
644- else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
645- msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
646-
647- }else
648- msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
649-
650- write_nic_byte(priv, MSR, msr);
651-}
652-
653-static void rtl8192_set_chan(struct ieee80211_device *ieee80211, short ch)
654-{
655- struct r8192_priv *priv = ieee80211_priv(ieee80211->dev);
656-
657- priv->chan = ch;
658-
659- /* need to implement rf set channel here WB */
660-
661- if (priv->rf_set_chan)
662- priv->rf_set_chan(ieee80211, priv->chan);
663-}
664-
665-static void rtl8192_rx_enable(struct r8192_priv *priv)
666-{
667- write_nic_dword(priv, RDQDA, priv->rx_ring_dma);
668-}
669-
670-/* the TX_DESC_BASE setting is according to the following queue index
671- * BK_QUEUE ===> 0
672- * BE_QUEUE ===> 1
673- * VI_QUEUE ===> 2
674- * VO_QUEUE ===> 3
675- * HCCA_QUEUE ===> 4
676- * TXCMD_QUEUE ===> 5
677- * MGNT_QUEUE ===> 6
678- * HIGH_QUEUE ===> 7
679- * BEACON_QUEUE ===> 8
680- * */
681-static const u32 TX_DESC_BASE[] = {BKQDA, BEQDA, VIQDA, VOQDA, HCCAQDA, CQDA, MQDA, HQDA, BQDA};
682-static void rtl8192_tx_enable(struct r8192_priv *priv)
683-{
684- u32 i;
685-
686- for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
687- write_nic_dword(priv, TX_DESC_BASE[i], priv->tx_ring[i].dma);
688-
689- ieee80211_reset_queue(priv->ieee80211);
690-}
691-
692-
693-static void rtl8192_free_rx_ring(struct r8192_priv *priv)
694-{
695- int i;
696-
697- for (i = 0; i < priv->rxringcount; i++) {
698- struct sk_buff *skb = priv->rx_buf[i];
699- if (!skb)
700- continue;
701-
702- pci_unmap_single(priv->pdev,
703- *((dma_addr_t *)skb->cb),
704- priv->rxbuffersize, PCI_DMA_FROMDEVICE);
705- kfree_skb(skb);
706- }
707-
708- pci_free_consistent(priv->pdev, sizeof(*priv->rx_ring) * priv->rxringcount,
709- priv->rx_ring, priv->rx_ring_dma);
710- priv->rx_ring = NULL;
711-}
712-
713-static void rtl8192_free_tx_ring(struct r8192_priv *priv, unsigned int prio)
714-{
715- struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
716-
717- while (skb_queue_len(&ring->queue)) {
718- tx_desc_819x_pci *entry = &ring->desc[ring->idx];
719- struct sk_buff *skb = __skb_dequeue(&ring->queue);
720-
721- pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
722- skb->len, PCI_DMA_TODEVICE);
723- kfree_skb(skb);
724- ring->idx = (ring->idx + 1) % ring->entries;
725- }
726-
727- pci_free_consistent(priv->pdev, sizeof(*ring->desc)*ring->entries,
728- ring->desc, ring->dma);
729- ring->desc = NULL;
730-}
731-
732-void PHY_SetRtl8192eRfOff(struct r8192_priv *priv)
733-{
734- //disable RF-Chip A/B
735- rtl8192_setBBreg(priv, rFPGA0_XA_RFInterfaceOE, BIT4, 0x0);
736- //analog to digital off, for power save
737- rtl8192_setBBreg(priv, rFPGA0_AnalogParameter4, 0x300, 0x0);
738- //digital to analog off, for power save
739- rtl8192_setBBreg(priv, rFPGA0_AnalogParameter1, 0x18, 0x0);
740- //rx antenna off
741- rtl8192_setBBreg(priv, rOFDM0_TRxPathEnable, 0xf, 0x0);
742- //rx antenna off
743- rtl8192_setBBreg(priv, rOFDM1_TRxPathEnable, 0xf, 0x0);
744- //analog to digital part2 off, for power save
745- rtl8192_setBBreg(priv, rFPGA0_AnalogParameter1, 0x60, 0x0);
746- rtl8192_setBBreg(priv, rFPGA0_AnalogParameter1, 0x4, 0x0);
747- // Analog parameter!!Change bias and Lbus control.
748- write_nic_byte(priv, ANAPAR_FOR_8192PciE, 0x07);
749-}
750-
751-static void rtl8192_halt_adapter(struct r8192_priv *priv, bool reset)
752-{
753- int i;
754- u8 OpMode;
755- u32 ulRegRead;
756-
757- OpMode = RT_OP_MODE_NO_LINK;
758- priv->ieee80211->SetHwRegHandler(priv->ieee80211, HW_VAR_MEDIA_STATUS, &OpMode);
759-
760- if (!priv->ieee80211->bSupportRemoteWakeUp) {
761- /*
762- * disable tx/rx. In 8185 we write 0x10 (Reset bit),
763- * but here we make reference to WMAC and wirte 0x0
764- */
765- write_nic_byte(priv, CMDR, 0);
766- }
767-
768- mdelay(20);
769-
770- if (!reset) {
771- mdelay(150);
772-
773- priv->bHwRfOffAction = 2;
774-
775- /*
776- * Call MgntActSet_RF_State instead to
777- * prevent RF config race condition.
778- */
779- if (!priv->ieee80211->bSupportRemoteWakeUp) {
780- PHY_SetRtl8192eRfOff(priv);
781- ulRegRead = read_nic_dword(priv, CPU_GEN);
782- ulRegRead |= CPU_GEN_SYSTEM_RESET;
783- write_nic_dword(priv,CPU_GEN, ulRegRead);
784- } else {
785- /* for WOL */
786- write_nic_dword(priv, WFCRC0, 0xffffffff);
787- write_nic_dword(priv, WFCRC1, 0xffffffff);
788- write_nic_dword(priv, WFCRC2, 0xffffffff);
789-
790- /* Write PMR register */
791- write_nic_byte(priv, PMR, 0x5);
792- /* Disable tx, enanble rx */
793- write_nic_byte(priv, MacBlkCtrl, 0xa);
794- }
795- }
796-
797- for(i = 0; i < MAX_QUEUE_SIZE; i++) {
798- skb_queue_purge(&priv->ieee80211->skb_waitQ [i]);
799- }
800- for(i = 0; i < MAX_QUEUE_SIZE; i++) {
801- skb_queue_purge(&priv->ieee80211->skb_aggQ [i]);
802- }
803-
804- skb_queue_purge(&priv->skb_queue);
805-}
806-
807-static void rtl8192_data_hard_stop(struct ieee80211_device *ieee80211)
808-{
809-}
810-
811-static void rtl8192_data_hard_resume(struct ieee80211_device *ieee80211)
812-{
813-}
814-
815-/*
816- * this function TX data frames when the ieee80211 stack requires this.
817- * It checks also if we need to stop the ieee tx queue, eventually do it
818- */
819-static void rtl8192_hard_data_xmit(struct sk_buff *skb,
820- struct ieee80211_device *ieee80211, int rate)
821-{
822- struct r8192_priv *priv = ieee80211_priv(ieee80211->dev);
823- int ret;
824- cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
825- u8 queue_index = tcb_desc->queue_index;
826-
827- /* shall not be referred by command packet */
828- BUG_ON(queue_index == TXCMD_QUEUE);
829-
830- if (priv->bHwRadioOff || (!priv->up))
831- {
832- kfree_skb(skb);
833- return;
834- }
835-
836- skb_push(skb, priv->ieee80211->tx_headroom);
837- ret = rtl8192_tx(priv, skb);
838- if (ret != 0) {
839- kfree_skb(skb);
840- }
841-
842- if (queue_index != MGNT_QUEUE) {
843- priv->ieee80211->stats.tx_bytes += (skb->len - priv->ieee80211->tx_headroom);
844- priv->ieee80211->stats.tx_packets++;
845- }
846-}
847-
848-/*
849- * This is a rough attempt to TX a frame
850- * This is called by the ieee 80211 stack to TX management frames.
851- * If the ring is full packet are dropped (for data frame the queue
852- * is stopped before this can happen).
853- */
854-static int rtl8192_hard_start_xmit(struct sk_buff *skb, struct ieee80211_device *ieee80211)
855-{
856- struct r8192_priv *priv = ieee80211_priv(ieee80211->dev);
857- int ret;
858- cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
859- u8 queue_index = tcb_desc->queue_index;
860-
861- if (queue_index != TXCMD_QUEUE) {
862- if (priv->bHwRadioOff || (!priv->up))
863- {
864- kfree_skb(skb);
865- return 0;
866- }
867- }
868-
869- if (queue_index == TXCMD_QUEUE) {
870- rtl819xE_tx_cmd(priv, skb);
871- ret = 0;
872- return ret;
873- } else {
874- tcb_desc->RATRIndex = 7;
875- tcb_desc->bTxDisableRateFallBack = 1;
876- tcb_desc->bTxUseDriverAssingedRate = 1;
877- tcb_desc->bTxEnableFwCalcDur = 1;
878- skb_push(skb, ieee80211->tx_headroom);
879- ret = rtl8192_tx(priv, skb);
880- if (ret != 0) {
881- kfree_skb(skb);
882- }
883- }
884-
885- return ret;
886-}
887-
888-
889-static void rtl8192_tx_isr(struct r8192_priv *priv, int prio)
890-{
891- struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
892-
893- while (skb_queue_len(&ring->queue)) {
894- tx_desc_819x_pci *entry = &ring->desc[ring->idx];
895- struct sk_buff *skb;
896-
897- /*
898- * beacon packet will only use the first descriptor defaultly,
899- * and the OWN may not be cleared by the hardware
900- */
901- if (prio != BEACON_QUEUE) {
902- if (entry->OWN)
903- return;
904- ring->idx = (ring->idx + 1) % ring->entries;
905- }
906-
907- skb = __skb_dequeue(&ring->queue);
908- pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
909- skb->len, PCI_DMA_TODEVICE);
910-
911- kfree_skb(skb);
912- }
913-
914- if (prio != BEACON_QUEUE) {
915- /* try to deal with the pending packets */
916- tasklet_schedule(&priv->irq_tx_tasklet);
917- }
918-}
919-
920-static void rtl8192_stop_beacon(struct ieee80211_device *ieee80211)
921-{
922-}
923-
924-static void rtl8192_config_rate(struct r8192_priv *priv, u16* rate_config)
925-{
926- struct ieee80211_network *net;
927- u8 i=0, basic_rate = 0;
928- net = & priv->ieee80211->current_network;
929-
930- for (i=0; i<net->rates_len; i++)
931- {
932- basic_rate = net->rates[i]&0x7f;
933- switch(basic_rate)
934- {
935- case MGN_1M: *rate_config |= RRSR_1M; break;
936- case MGN_2M: *rate_config |= RRSR_2M; break;
937- case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
938- case MGN_11M: *rate_config |= RRSR_11M; break;
939- case MGN_6M: *rate_config |= RRSR_6M; break;
940- case MGN_9M: *rate_config |= RRSR_9M; break;
941- case MGN_12M: *rate_config |= RRSR_12M; break;
942- case MGN_18M: *rate_config |= RRSR_18M; break;
943- case MGN_24M: *rate_config |= RRSR_24M; break;
944- case MGN_36M: *rate_config |= RRSR_36M; break;
945- case MGN_48M: *rate_config |= RRSR_48M; break;
946- case MGN_54M: *rate_config |= RRSR_54M; break;
947- }
948- }
949- for (i=0; i<net->rates_ex_len; i++)
950- {
951- basic_rate = net->rates_ex[i]&0x7f;
952- switch(basic_rate)
953- {
954- case MGN_1M: *rate_config |= RRSR_1M; break;
955- case MGN_2M: *rate_config |= RRSR_2M; break;
956- case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
957- case MGN_11M: *rate_config |= RRSR_11M; break;
958- case MGN_6M: *rate_config |= RRSR_6M; break;
959- case MGN_9M: *rate_config |= RRSR_9M; break;
960- case MGN_12M: *rate_config |= RRSR_12M; break;
961- case MGN_18M: *rate_config |= RRSR_18M; break;
962- case MGN_24M: *rate_config |= RRSR_24M; break;
963- case MGN_36M: *rate_config |= RRSR_36M; break;
964- case MGN_48M: *rate_config |= RRSR_48M; break;
965- case MGN_54M: *rate_config |= RRSR_54M; break;
966- }
967- }
968-}
969-
970-
971-#define SHORT_SLOT_TIME 9
972-#define NON_SHORT_SLOT_TIME 20
973-
974-static void rtl8192_update_cap(struct r8192_priv *priv, u16 cap)
975-{
976- u32 tmp = 0;
977- struct ieee80211_network *net = &priv->ieee80211->current_network;
978-
979- priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
980- tmp = priv->basic_rate;
981- if (priv->short_preamble)
982- tmp |= BRSR_AckShortPmb;
983- write_nic_dword(priv, RRSR, tmp);
984-
985- if (net->mode & (IEEE_G|IEEE_N_24G))
986- {
987- u8 slot_time = 0;
988- if ((cap & WLAN_CAPABILITY_SHORT_SLOT)&&(!priv->ieee80211->pHTInfo->bCurrentRT2RTLongSlotTime))
989- {//short slot time
990- slot_time = SHORT_SLOT_TIME;
991- }
992- else //long slot time
993- slot_time = NON_SHORT_SLOT_TIME;
994- priv->slot_time = slot_time;
995- write_nic_byte(priv, SLOT_TIME, slot_time);
996- }
997-
998-}
999-
1000-static void rtl8192_net_update(struct r8192_priv *priv)
1001-{
1002- struct ieee80211_network *net;
1003- u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
1004- u16 rate_config = 0;
1005- net = &priv->ieee80211->current_network;
1006-
1007- /* update Basic rate: RR, BRSR */
1008- rtl8192_config_rate(priv, &rate_config);
1009-
1010- /*
1011- * Select RRSR (in Legacy-OFDM and CCK)
1012- * For 8190, we select only 24M, 12M, 6M, 11M, 5.5M,
1013- * 2M, and 1M from the Basic rate.
1014- * We do not use other rates.
1015- */
1016- priv->basic_rate = rate_config &= 0x15f;
1017-
1018- /* BSSID */
1019- write_nic_dword(priv, BSSIDR, ((u32 *)net->bssid)[0]);
1020- write_nic_word(priv, BSSIDR+4, ((u16 *)net->bssid)[2]);
1021-
1022- if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1023- {
1024- write_nic_word(priv, ATIMWND, 2);
1025- write_nic_word(priv, BCN_DMATIME, 256);
1026- write_nic_word(priv, BCN_INTERVAL, net->beacon_interval);
1027- /*
1028- * BIT15 of BCN_DRV_EARLY_INT will indicate
1029- * whether software beacon or hw beacon is applied.
1030- */
1031- write_nic_word(priv, BCN_DRV_EARLY_INT, 10);
1032- write_nic_byte(priv, BCN_ERR_THRESH, 100);
1033-
1034- BcnTimeCfg |= (BcnCW<<BCN_TCFG_CW_SHIFT);
1035- /* TODO: BcnIFS may required to be changed on ASIC */
1036- BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
1037- write_nic_word(priv, BCN_TCFG, BcnTimeCfg);
1038- }
1039-}
1040-
1041-static void rtl819xE_tx_cmd(struct r8192_priv *priv, struct sk_buff *skb)
1042-{
1043- struct rtl8192_tx_ring *ring;
1044- tx_desc_819x_pci *entry;
1045- unsigned int idx;
1046- dma_addr_t mapping;
1047- cb_desc *tcb_desc;
1048- unsigned long flags;
1049-
1050- ring = &priv->tx_ring[TXCMD_QUEUE];
1051- mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
1052-
1053- spin_lock_irqsave(&priv->irq_th_lock,flags);
1054- idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
1055- entry = &ring->desc[idx];
1056-
1057- tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1058- memset(entry,0,12);
1059- entry->LINIP = tcb_desc->bLastIniPkt;
1060- entry->FirstSeg = 1;//first segment
1061- entry->LastSeg = 1; //last segment
1062- if(tcb_desc->bCmdOrInit == DESC_PACKET_TYPE_INIT) {
1063- entry->CmdInit = DESC_PACKET_TYPE_INIT;
1064- } else {
1065- entry->CmdInit = DESC_PACKET_TYPE_NORMAL;
1066- entry->Offset = sizeof(TX_FWINFO_8190PCI) + 8;
1067- entry->PktSize = (u16)(tcb_desc->pkt_size + entry->Offset);
1068- entry->QueueSelect = QSLT_CMD;
1069- entry->TxFWInfoSize = 0x08;
1070- entry->RATid = (u8)DESC_PACKET_TYPE_INIT;
1071- }
1072- entry->TxBufferSize = skb->len;
1073- entry->TxBuffAddr = cpu_to_le32(mapping);
1074- entry->OWN = 1;
1075-
1076- __skb_queue_tail(&ring->queue, skb);
1077- spin_unlock_irqrestore(&priv->irq_th_lock,flags);
1078-
1079- write_nic_byte(priv, TPPoll, TPPoll_CQ);
1080-
1081- return;
1082-}
1083-
1084-/*
1085- * Mapping Software/Hardware descriptor queue id to "Queue Select Field"
1086- * in TxFwInfo data structure
1087- */
1088-static u8 MapHwQueueToFirmwareQueue(u8 QueueID)
1089-{
1090- u8 QueueSelect = 0;
1091-
1092- switch (QueueID) {
1093- case BE_QUEUE:
1094- QueueSelect = QSLT_BE;
1095- break;
1096-
1097- case BK_QUEUE:
1098- QueueSelect = QSLT_BK;
1099- break;
1100-
1101- case VO_QUEUE:
1102- QueueSelect = QSLT_VO;
1103- break;
1104-
1105- case VI_QUEUE:
1106- QueueSelect = QSLT_VI;
1107- break;
1108-
1109- case MGNT_QUEUE:
1110- QueueSelect = QSLT_MGNT;
1111- break;
1112-
1113- case BEACON_QUEUE:
1114- QueueSelect = QSLT_BEACON;
1115- break;
1116-
1117- case TXCMD_QUEUE:
1118- QueueSelect = QSLT_CMD;
1119- break;
1120-
1121- case HIGH_QUEUE:
1122- default:
1123- RT_TRACE(COMP_ERR, "Impossible Queue Selection: %d\n", QueueID);
1124- break;
1125- }
1126- return QueueSelect;
1127-}
1128-
1129-static u8 MRateToHwRate8190Pci(u8 rate)
1130-{
1131- u8 ret = DESC90_RATE1M;
1132-
1133- switch(rate) {
1134- case MGN_1M: ret = DESC90_RATE1M; break;
1135- case MGN_2M: ret = DESC90_RATE2M; break;
1136- case MGN_5_5M: ret = DESC90_RATE5_5M; break;
1137- case MGN_11M: ret = DESC90_RATE11M; break;
1138- case MGN_6M: ret = DESC90_RATE6M; break;
1139- case MGN_9M: ret = DESC90_RATE9M; break;
1140- case MGN_12M: ret = DESC90_RATE12M; break;
1141- case MGN_18M: ret = DESC90_RATE18M; break;
1142- case MGN_24M: ret = DESC90_RATE24M; break;
1143- case MGN_36M: ret = DESC90_RATE36M; break;
1144- case MGN_48M: ret = DESC90_RATE48M; break;
1145- case MGN_54M: ret = DESC90_RATE54M; break;
1146-
1147- // HT rate since here
1148- case MGN_MCS0: ret = DESC90_RATEMCS0; break;
1149- case MGN_MCS1: ret = DESC90_RATEMCS1; break;
1150- case MGN_MCS2: ret = DESC90_RATEMCS2; break;
1151- case MGN_MCS3: ret = DESC90_RATEMCS3; break;
1152- case MGN_MCS4: ret = DESC90_RATEMCS4; break;
1153- case MGN_MCS5: ret = DESC90_RATEMCS5; break;
1154- case MGN_MCS6: ret = DESC90_RATEMCS6; break;
1155- case MGN_MCS7: ret = DESC90_RATEMCS7; break;
1156- case MGN_MCS8: ret = DESC90_RATEMCS8; break;
1157- case MGN_MCS9: ret = DESC90_RATEMCS9; break;
1158- case MGN_MCS10: ret = DESC90_RATEMCS10; break;
1159- case MGN_MCS11: ret = DESC90_RATEMCS11; break;
1160- case MGN_MCS12: ret = DESC90_RATEMCS12; break;
1161- case MGN_MCS13: ret = DESC90_RATEMCS13; break;
1162- case MGN_MCS14: ret = DESC90_RATEMCS14; break;
1163- case MGN_MCS15: ret = DESC90_RATEMCS15; break;
1164- case (0x80|0x20): ret = DESC90_RATEMCS32; break;
1165-
1166- default: break;
1167- }
1168- return ret;
1169-}
1170-
1171-
1172-static u8 QueryIsShort(u8 TxHT, u8 TxRate, cb_desc *tcb_desc)
1173-{
1174- u8 tmp_Short;
1175-
1176- tmp_Short = (TxHT==1)?((tcb_desc->bUseShortGI)?1:0):((tcb_desc->bUseShortPreamble)?1:0);
1177-
1178- if(TxHT==1 && TxRate != DESC90_RATEMCS15)
1179- tmp_Short = 0;
1180-
1181- return tmp_Short;
1182-}
1183-
1184-/*
1185- * The tx procedure is just as following,
1186- * skb->cb will contain all the following information,
1187- * priority, morefrag, rate, &dev.
1188- */
1189-static short rtl8192_tx(struct r8192_priv *priv, struct sk_buff* skb)
1190-{
1191- struct rtl8192_tx_ring *ring;
1192- unsigned long flags;
1193- cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1194- tx_desc_819x_pci *pdesc = NULL;
1195- TX_FWINFO_8190PCI *pTxFwInfo = NULL;
1196- dma_addr_t mapping;
1197- bool multi_addr = false, broad_addr = false, uni_addr = false;
1198- u8 *pda_addr = NULL;
1199- int idx;
1200-
1201- if (priv->bdisable_nic) {
1202- RT_TRACE(COMP_ERR, "Nic is disabled! Can't tx packet len=%d qidx=%d!!!\n",
1203- skb->len, tcb_desc->queue_index);
1204- return skb->len;
1205- }
1206-
1207-#ifdef ENABLE_LPS
1208- priv->ieee80211->bAwakePktSent = true;
1209-#endif
1210-
1211- mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
1212-
1213- /* collect the tx packets statitcs */
1214- pda_addr = ((u8 *)skb->data) + sizeof(TX_FWINFO_8190PCI);
1215- if (is_multicast_ether_addr(pda_addr))
1216- multi_addr = true;
1217- else if (is_broadcast_ether_addr(pda_addr))
1218- broad_addr = true;
1219- else
1220- uni_addr = true;
1221-
1222- if (uni_addr)
1223- priv->stats.txbytesunicast += (u8)(skb->len) - sizeof(TX_FWINFO_8190PCI);
1224-
1225- /* fill tx firmware */
1226- pTxFwInfo = (PTX_FWINFO_8190PCI)skb->data;
1227- memset(pTxFwInfo, 0, sizeof(TX_FWINFO_8190PCI));
1228- pTxFwInfo->TxHT = (tcb_desc->data_rate&0x80) ? 1 : 0;
1229- pTxFwInfo->TxRate = MRateToHwRate8190Pci((u8)tcb_desc->data_rate);
1230- pTxFwInfo->EnableCPUDur = tcb_desc->bTxEnableFwCalcDur;
1231- pTxFwInfo->Short = QueryIsShort(pTxFwInfo->TxHT, pTxFwInfo->TxRate, tcb_desc);
1232-
1233- /* Aggregation related */
1234- if (tcb_desc->bAMPDUEnable) {
1235- pTxFwInfo->AllowAggregation = 1;
1236- pTxFwInfo->RxMF = tcb_desc->ampdu_factor;
1237- pTxFwInfo->RxAMD = tcb_desc->ampdu_density;
1238- } else {
1239- pTxFwInfo->AllowAggregation = 0;
1240- pTxFwInfo->RxMF = 0;
1241- pTxFwInfo->RxAMD = 0;
1242- }
1243-
1244- /* Protection mode related */
1245- pTxFwInfo->RtsEnable = (tcb_desc->bRTSEnable) ? 1 : 0;
1246- pTxFwInfo->CtsEnable = (tcb_desc->bCTSEnable) ? 1 : 0;
1247- pTxFwInfo->RtsSTBC = (tcb_desc->bRTSSTBC) ? 1 : 0;
1248- pTxFwInfo->RtsHT = (tcb_desc->rts_rate&0x80) ? 1 : 0;
1249- pTxFwInfo->RtsRate = MRateToHwRate8190Pci((u8)tcb_desc->rts_rate);
1250- pTxFwInfo->RtsBandwidth = 0;
1251- pTxFwInfo->RtsSubcarrier = tcb_desc->RTSSC;
1252- pTxFwInfo->RtsShort = (pTxFwInfo->RtsHT == 0) ? (tcb_desc->bRTSUseShortPreamble ? 1 : 0) : (tcb_desc->bRTSUseShortGI? 1 : 0);
1253-
1254- /* Set Bandwidth and sub-channel settings. */
1255- if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40) {
1256- if (tcb_desc->bPacketBW) {
1257- pTxFwInfo->TxBandwidth = 1;
1258- /* use duplicated mode */
1259- pTxFwInfo->TxSubCarrier = 0;
1260- } else {
1261- pTxFwInfo->TxBandwidth = 0;
1262- pTxFwInfo->TxSubCarrier = priv->nCur40MhzPrimeSC;
1263- }
1264- } else {
1265- pTxFwInfo->TxBandwidth = 0;
1266- pTxFwInfo->TxSubCarrier = 0;
1267- }
1268-
1269- spin_lock_irqsave(&priv->irq_th_lock, flags);
1270- ring = &priv->tx_ring[tcb_desc->queue_index];
1271- if (tcb_desc->queue_index != BEACON_QUEUE)
1272- idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
1273- else
1274- idx = 0;
1275-
1276- pdesc = &ring->desc[idx];
1277- if ((pdesc->OWN == 1) && (tcb_desc->queue_index != BEACON_QUEUE)) {
1278- RT_TRACE(COMP_ERR, "No more TX desc@%d, ring->idx = %d,idx = %d,%x\n",
1279- tcb_desc->queue_index, ring->idx, idx, skb->len);
1280- spin_unlock_irqrestore(&priv->irq_th_lock, flags);
1281- return skb->len;
1282- }
1283-
1284- /* fill tx descriptor */
1285- memset(pdesc, 0, 12);
1286-
1287- /*DWORD 0*/
1288- pdesc->LINIP = 0;
1289- pdesc->CmdInit = 1;
1290- pdesc->Offset = sizeof(TX_FWINFO_8190PCI) + 8; /* We must add 8!! */
1291- pdesc->PktSize = (u16)skb->len-sizeof(TX_FWINFO_8190PCI);
1292-
1293- /*DWORD 1*/
1294- pdesc->SecCAMID = 0;
1295- pdesc->RATid = tcb_desc->RATRIndex;
1296-
1297- pdesc->NoEnc = 1;
1298- pdesc->SecType = 0x0;
1299- if (tcb_desc->bHwSec) {
1300- switch (priv->ieee80211->pairwise_key_type) {
1301- case KEY_TYPE_WEP40:
1302- case KEY_TYPE_WEP104:
1303- pdesc->SecType = 0x1;
1304- pdesc->NoEnc = 0;
1305- break;
1306- case KEY_TYPE_TKIP:
1307- pdesc->SecType = 0x2;
1308- pdesc->NoEnc = 0;
1309- break;
1310- case KEY_TYPE_CCMP:
1311- pdesc->SecType = 0x3;
1312- pdesc->NoEnc = 0;
1313- break;
1314- case KEY_TYPE_NA:
1315- pdesc->SecType = 0x0;
1316- pdesc->NoEnc = 1;
1317- break;
1318- }
1319- }
1320-
1321- /* Set Packet ID */
1322- pdesc->PktId = 0x0;
1323-
1324- pdesc->QueueSelect = MapHwQueueToFirmwareQueue(tcb_desc->queue_index);
1325- pdesc->TxFWInfoSize = sizeof(TX_FWINFO_8190PCI);
1326-
1327- pdesc->DISFB = tcb_desc->bTxDisableRateFallBack;
1328- pdesc->USERATE = tcb_desc->bTxUseDriverAssingedRate;
1329-
1330- pdesc->FirstSeg = 1;
1331- pdesc->LastSeg = 1;
1332- pdesc->TxBufferSize = skb->len;
1333-
1334- pdesc->TxBuffAddr = cpu_to_le32(mapping);
1335- __skb_queue_tail(&ring->queue, skb);
1336- pdesc->OWN = 1;
1337- spin_unlock_irqrestore(&priv->irq_th_lock, flags);
1338- priv->ieee80211->dev->trans_start = jiffies;
1339- write_nic_word(priv, TPPoll, 0x01<<tcb_desc->queue_index);
1340- return 0;
1341-}
1342-
1343-static short rtl8192_alloc_rx_desc_ring(struct r8192_priv *priv)
1344-{
1345- rx_desc_819x_pci *entry = NULL;
1346- int i;
1347-
1348- priv->rx_ring = pci_alloc_consistent(priv->pdev,
1349- sizeof(*priv->rx_ring) * priv->rxringcount, &priv->rx_ring_dma);
1350-
1351- if (!priv->rx_ring || (unsigned long)priv->rx_ring & 0xFF) {
1352- RT_TRACE(COMP_ERR,"Cannot allocate RX ring\n");
1353- return -ENOMEM;
1354- }
1355-
1356- memset(priv->rx_ring, 0, sizeof(*priv->rx_ring) * priv->rxringcount);
1357- priv->rx_idx = 0;
1358-
1359- for (i = 0; i < priv->rxringcount; i++) {
1360- struct sk_buff *skb = dev_alloc_skb(priv->rxbuffersize);
1361- dma_addr_t *mapping;
1362- entry = &priv->rx_ring[i];
1363- if (!skb)
1364- return 0;
1365- priv->rx_buf[i] = skb;
1366- mapping = (dma_addr_t *)skb->cb;
1367- *mapping = pci_map_single(priv->pdev, skb_tail_pointer(skb),
1368- priv->rxbuffersize, PCI_DMA_FROMDEVICE);
1369-
1370- entry->BufferAddress = cpu_to_le32(*mapping);
1371-
1372- entry->Length = priv->rxbuffersize;
1373- entry->OWN = 1;
1374- }
1375-
1376- entry->EOR = 1;
1377- return 0;
1378-}
1379-
1380-static int rtl8192_alloc_tx_desc_ring(struct r8192_priv *priv,
1381- unsigned int prio, unsigned int entries)
1382-{
1383- tx_desc_819x_pci *ring;
1384- dma_addr_t dma;
1385- int i;
1386-
1387- ring = pci_alloc_consistent(priv->pdev, sizeof(*ring) * entries, &dma);
1388- if (!ring || (unsigned long)ring & 0xFF) {
1389- RT_TRACE(COMP_ERR, "Cannot allocate TX ring (prio = %d)\n", prio);
1390- return -ENOMEM;
1391- }
1392-
1393- memset(ring, 0, sizeof(*ring)*entries);
1394- priv->tx_ring[prio].desc = ring;
1395- priv->tx_ring[prio].dma = dma;
1396- priv->tx_ring[prio].idx = 0;
1397- priv->tx_ring[prio].entries = entries;
1398- skb_queue_head_init(&priv->tx_ring[prio].queue);
1399-
1400- for (i = 0; i < entries; i++)
1401- ring[i].NextDescAddress =
1402- cpu_to_le32((u32)dma + ((i + 1) % entries) * sizeof(*ring));
1403-
1404- return 0;
1405-}
1406-
1407-static short rtl8192_pci_initdescring(struct r8192_priv *priv)
1408-{
1409- u32 ret;
1410- int i;
1411-
1412- ret = rtl8192_alloc_rx_desc_ring(priv);
1413- if (ret)
1414- return ret;
1415-
1416- /* general process for other queue */
1417- for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
1418- ret = rtl8192_alloc_tx_desc_ring(priv, i, priv->txringcount);
1419- if (ret)
1420- goto err_free_rings;
1421- }
1422-
1423- return 0;
1424-
1425-err_free_rings:
1426- rtl8192_free_rx_ring(priv);
1427- for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
1428- if (priv->tx_ring[i].desc)
1429- rtl8192_free_tx_ring(priv, i);
1430- return 1;
1431-}
1432-
1433-static void rtl8192_pci_resetdescring(struct r8192_priv *priv)
1434-{
1435- int i;
1436-
1437- /* force the rx_idx to the first one */
1438- if(priv->rx_ring) {
1439- rx_desc_819x_pci *entry = NULL;
1440- for (i = 0; i < priv->rxringcount; i++) {
1441- entry = &priv->rx_ring[i];
1442- entry->OWN = 1;
1443- }
1444- priv->rx_idx = 0;
1445- }
1446-
1447- /* after reset, release previous pending packet, and force the
1448- * tx idx to the first one */
1449- for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
1450- if (priv->tx_ring[i].desc) {
1451- struct rtl8192_tx_ring *ring = &priv->tx_ring[i];
1452-
1453- while (skb_queue_len(&ring->queue)) {
1454- tx_desc_819x_pci *entry = &ring->desc[ring->idx];
1455- struct sk_buff *skb = __skb_dequeue(&ring->queue);
1456-
1457- pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
1458- skb->len, PCI_DMA_TODEVICE);
1459- kfree_skb(skb);
1460- ring->idx = (ring->idx + 1) % ring->entries;
1461- }
1462- ring->idx = 0;
1463- }
1464- }
1465-}
1466-
1467-static void rtl8192_link_change(struct ieee80211_device *ieee)
1468-{
1469- struct r8192_priv *priv = ieee80211_priv(ieee->dev);
1470-
1471- if (ieee->state == IEEE80211_LINKED)
1472- {
1473- rtl8192_net_update(priv);
1474- rtl8192_update_ratr_table(priv);
1475-
1476- //add this as in pure N mode, wep encryption will use software way, but there is no chance to set this as wep will not set group key in wext. WB.2008.07.08
1477- if ((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type))
1478- EnableHWSecurityConfig8192(priv);
1479- }
1480- else
1481- {
1482- write_nic_byte(priv, 0x173, 0);
1483- }
1484-
1485- rtl8192_update_msr(priv);
1486-
1487- // 2007/10/16 MH MAC Will update TSF according to all received beacon, so we have
1488- // // To set CBSSID bit when link with any AP or STA.
1489- if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC)
1490- {
1491- u32 reg = 0;
1492- reg = read_nic_dword(priv, RCR);
1493- if (priv->ieee80211->state == IEEE80211_LINKED)
1494- priv->ReceiveConfig = reg |= RCR_CBSSID;
1495- else
1496- priv->ReceiveConfig = reg &= ~RCR_CBSSID;
1497- write_nic_dword(priv, RCR, reg);
1498- }
1499-}
1500-
1501-
1502-static const struct ieee80211_qos_parameters def_qos_parameters = {
1503- {3,3,3,3},/* cw_min */
1504- {7,7,7,7},/* cw_max */
1505- {2,2,2,2},/* aifs */
1506- {0,0,0,0},/* flags */
1507- {0,0,0,0} /* tx_op_limit */
1508-};
1509-
1510-static void rtl8192_update_beacon(struct work_struct * work)
1511-{
1512- struct r8192_priv *priv = container_of(work, struct r8192_priv, update_beacon_wq.work);
1513- struct ieee80211_device* ieee = priv->ieee80211;
1514- struct ieee80211_network* net = &ieee->current_network;
1515-
1516- if (ieee->pHTInfo->bCurrentHTSupport)
1517- HTUpdateSelfAndPeerSetting(ieee, net);
1518- ieee->pHTInfo->bCurrentRT2RTLongSlotTime = net->bssht.bdRT2RTLongSlotTime;
1519- rtl8192_update_cap(priv, net->capability);
1520-}
1521-
1522-/*
1523-* background support to run QoS activate functionality
1524-*/
1525-static const int WDCAPARA_ADD[] = {EDCAPARA_BE,EDCAPARA_BK,EDCAPARA_VI,EDCAPARA_VO};
1526-static void rtl8192_qos_activate(struct work_struct * work)
1527-{
1528- struct r8192_priv *priv = container_of(work, struct r8192_priv, qos_activate);
1529- struct ieee80211_qos_parameters *qos_parameters = &priv->ieee80211->current_network.qos_data.parameters;
1530- u8 mode = priv->ieee80211->current_network.mode;
1531- u8 u1bAIFS;
1532- u32 u4bAcParam;
1533- int i;
1534-
1535- mutex_lock(&priv->mutex);
1536- if(priv->ieee80211->state != IEEE80211_LINKED)
1537- goto success;
1538- RT_TRACE(COMP_QOS,"qos active process with associate response received\n");
1539- /* It better set slot time at first */
1540- /* For we just support b/g mode at present, let the slot time at 9/20 selection */
1541- /* update the ac parameter to related registers */
1542- for(i = 0; i < QOS_QUEUE_NUM; i++) {
1543- //Mode G/A: slotTimeTimer = 9; Mode B: 20
1544- u1bAIFS = qos_parameters->aifs[i] * ((mode&(IEEE_G|IEEE_N_24G)) ?9:20) + aSifsTime;
1545- u4bAcParam = ((((u32)(qos_parameters->tx_op_limit[i]))<< AC_PARAM_TXOP_LIMIT_OFFSET)|
1546- (((u32)(qos_parameters->cw_max[i]))<< AC_PARAM_ECW_MAX_OFFSET)|
1547- (((u32)(qos_parameters->cw_min[i]))<< AC_PARAM_ECW_MIN_OFFSET)|
1548- ((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET));
1549- write_nic_dword(priv, WDCAPARA_ADD[i], u4bAcParam);
1550- }
1551-
1552-success:
1553- mutex_unlock(&priv->mutex);
1554-}
1555-
1556-static int rtl8192_qos_handle_probe_response(struct r8192_priv *priv,
1557- int active_network,
1558- struct ieee80211_network *network)
1559-{
1560- int ret = 0;
1561- u32 size = sizeof(struct ieee80211_qos_parameters);
1562-
1563- if(priv->ieee80211->state !=IEEE80211_LINKED)
1564- return ret;
1565-
1566- if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
1567- return ret;
1568-
1569- if (network->flags & NETWORK_HAS_QOS_MASK) {
1570- if (active_network &&
1571- (network->flags & NETWORK_HAS_QOS_PARAMETERS))
1572- network->qos_data.active = network->qos_data.supported;
1573-
1574- if ((network->qos_data.active == 1) && (active_network == 1) &&
1575- (network->flags & NETWORK_HAS_QOS_PARAMETERS) &&
1576- (network->qos_data.old_param_count !=
1577- network->qos_data.param_count)) {
1578- network->qos_data.old_param_count =
1579- network->qos_data.param_count;
1580- queue_work(priv->priv_wq, &priv->qos_activate);
1581- RT_TRACE (COMP_QOS, "QoS parameters change call "
1582- "qos_activate\n");
1583- }
1584- } else {
1585- memcpy(&priv->ieee80211->current_network.qos_data.parameters,
1586- &def_qos_parameters, size);
1587-
1588- if ((network->qos_data.active == 1) && (active_network == 1)) {
1589- queue_work(priv->priv_wq, &priv->qos_activate);
1590- RT_TRACE(COMP_QOS, "QoS was disabled call qos_activate\n");
1591- }
1592- network->qos_data.active = 0;
1593- network->qos_data.supported = 0;
1594- }
1595-
1596- return 0;
1597-}
1598-
1599-/* handle manage frame frame beacon and probe response */
1600-static int rtl8192_handle_beacon(struct ieee80211_device *ieee,
1601- struct ieee80211_beacon * beacon,
1602- struct ieee80211_network * network)
1603-{
1604- struct r8192_priv *priv = ieee80211_priv(ieee->dev);
1605-
1606- rtl8192_qos_handle_probe_response(priv,1,network);
1607-
1608- queue_delayed_work(priv->priv_wq, &priv->update_beacon_wq, 0);
1609- return 0;
1610-
1611-}
1612-
1613-/*
1614- * handling the beaconing responses. if we get different QoS setting
1615- * off the network from the associated setting, adjust the QoS setting
1616- */
1617-static int rtl8192_qos_association_resp(struct r8192_priv *priv,
1618- struct ieee80211_network *network)
1619-{
1620- int ret = 0;
1621- unsigned long flags;
1622- u32 size = sizeof(struct ieee80211_qos_parameters);
1623- int set_qos_param = 0;
1624-
1625- if ((priv == NULL) || (network == NULL))
1626- return ret;
1627-
1628- if (priv->ieee80211->state != IEEE80211_LINKED)
1629- return ret;
1630-
1631- if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
1632- return ret;
1633-
1634- spin_lock_irqsave(&priv->ieee80211->lock, flags);
1635- if (network->flags & NETWORK_HAS_QOS_PARAMETERS) {
1636- memcpy(&priv->ieee80211->current_network.qos_data.parameters,
1637- &network->qos_data.parameters,
1638- sizeof(struct ieee80211_qos_parameters));
1639- priv->ieee80211->current_network.qos_data.active = 1;
1640- set_qos_param = 1;
1641- /* update qos parameter for current network */
1642- priv->ieee80211->current_network.qos_data.old_param_count =
1643- priv->ieee80211->current_network.qos_data.param_count;
1644- priv->ieee80211->current_network.qos_data.param_count =
1645- network->qos_data.param_count;
1646-
1647- } else {
1648- memcpy(&priv->ieee80211->current_network.qos_data.parameters,
1649- &def_qos_parameters, size);
1650- priv->ieee80211->current_network.qos_data.active = 0;
1651- priv->ieee80211->current_network.qos_data.supported = 0;
1652- set_qos_param = 1;
1653- }
1654-
1655- spin_unlock_irqrestore(&priv->ieee80211->lock, flags);
1656-
1657- RT_TRACE(COMP_QOS, "%s: network->flags = %d,%d\n", __FUNCTION__,
1658- network->flags, priv->ieee80211->current_network.qos_data.active);
1659- if (set_qos_param == 1)
1660- queue_work(priv->priv_wq, &priv->qos_activate);
1661-
1662- return ret;
1663-}
1664-
1665-
1666-static int rtl8192_handle_assoc_response(struct ieee80211_device *ieee,
1667- struct ieee80211_assoc_response_frame *resp,
1668- struct ieee80211_network *network)
1669-{
1670- struct r8192_priv *priv = ieee80211_priv(ieee->dev);
1671- rtl8192_qos_association_resp(priv, network);
1672- return 0;
1673-}
1674-
1675-
1676-/* updateRATRTabel for MCS only. Basic rate is not implemented. */
1677-static void rtl8192_update_ratr_table(struct r8192_priv* priv)
1678-{
1679- struct ieee80211_device* ieee = priv->ieee80211;
1680- u8* pMcsRate = ieee->dot11HTOperationalRateSet;
1681- u32 ratr_value = 0;
1682- u8 rate_index = 0;
1683-
1684- rtl8192_config_rate(priv, (u16*)(&ratr_value));
1685- ratr_value |= (*(u16*)(pMcsRate)) << 12;
1686-
1687- switch (ieee->mode)
1688- {
1689- case IEEE_A:
1690- ratr_value &= 0x00000FF0;
1691- break;
1692- case IEEE_B:
1693- ratr_value &= 0x0000000F;
1694- break;
1695- case IEEE_G:
1696- ratr_value &= 0x00000FF7;
1697- break;
1698- case IEEE_N_24G:
1699- case IEEE_N_5G:
1700- if (ieee->pHTInfo->PeerMimoPs == 0) //MIMO_PS_STATIC
1701- ratr_value &= 0x0007F007;
1702- else{
1703- if (priv->rf_type == RF_1T2R)
1704- ratr_value &= 0x000FF007;
1705- else
1706- ratr_value &= 0x0F81F007;
1707- }
1708- break;
1709- default:
1710- break;
1711- }
1712- ratr_value &= 0x0FFFFFFF;
1713- if(ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI40MHz){
1714- ratr_value |= 0x80000000;
1715- }else if(!ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI20MHz){
1716- ratr_value |= 0x80000000;
1717- }
1718- write_nic_dword(priv, RATR0+rate_index*4, ratr_value);
1719- write_nic_byte(priv, UFWP, 1);
1720-}
1721-
1722-static bool GetNmodeSupportBySecCfg8190Pci(struct ieee80211_device *ieee)
1723-{
1724- return !(ieee->rtllib_ap_sec_type &&
1725- (ieee->rtllib_ap_sec_type(ieee)&(SEC_ALG_WEP|SEC_ALG_TKIP)));
1726-}
1727-
1728-static void rtl8192_refresh_supportrate(struct r8192_priv* priv)
1729-{
1730- struct ieee80211_device* ieee = priv->ieee80211;
1731- //we donot consider set support rate for ABG mode, only HT MCS rate is set here.
1732- if (ieee->mode == WIRELESS_MODE_N_24G || ieee->mode == WIRELESS_MODE_N_5G)
1733- {
1734- memcpy(ieee->Regdot11HTOperationalRateSet, ieee->RegHTSuppRateSet, 16);
1735- }
1736- else
1737- memset(ieee->Regdot11HTOperationalRateSet, 0, 16);
1738-}
1739-
1740-static u8 rtl8192_getSupportedWireleeMode(void)
1741-{
1742- return (WIRELESS_MODE_N_24G|WIRELESS_MODE_G|WIRELESS_MODE_B);
1743-}
1744-
1745-static void rtl8192_SetWirelessMode(struct ieee80211_device *ieee, u8 wireless_mode)
1746-{
1747- struct r8192_priv *priv = ieee80211_priv(ieee->dev);
1748- u8 bSupportMode = rtl8192_getSupportedWireleeMode();
1749-
1750- if ((wireless_mode == WIRELESS_MODE_AUTO) || ((wireless_mode&bSupportMode)==0))
1751- {
1752- if(bSupportMode & WIRELESS_MODE_N_24G)
1753- {
1754- wireless_mode = WIRELESS_MODE_N_24G;
1755- }
1756- else if(bSupportMode & WIRELESS_MODE_N_5G)
1757- {
1758- wireless_mode = WIRELESS_MODE_N_5G;
1759- }
1760- else if((bSupportMode & WIRELESS_MODE_A))
1761- {
1762- wireless_mode = WIRELESS_MODE_A;
1763- }
1764- else if((bSupportMode & WIRELESS_MODE_G))
1765- {
1766- wireless_mode = WIRELESS_MODE_G;
1767- }
1768- else if((bSupportMode & WIRELESS_MODE_B))
1769- {
1770- wireless_mode = WIRELESS_MODE_B;
1771- }
1772- else{
1773- RT_TRACE(COMP_ERR, "%s(), No valid wireless mode supported, SupportedWirelessMode(%x)!!!\n", __FUNCTION__,bSupportMode);
1774- wireless_mode = WIRELESS_MODE_B;
1775- }
1776- }
1777- priv->ieee80211->mode = wireless_mode;
1778-
1779- if ((wireless_mode == WIRELESS_MODE_N_24G) || (wireless_mode == WIRELESS_MODE_N_5G))
1780- priv->ieee80211->pHTInfo->bEnableHT = 1;
1781- else
1782- priv->ieee80211->pHTInfo->bEnableHT = 0;
1783- RT_TRACE(COMP_INIT, "Current Wireless Mode is %x\n", wireless_mode);
1784- rtl8192_refresh_supportrate(priv);
1785-}
1786-
1787-static bool GetHalfNmodeSupportByAPs819xPci(struct ieee80211_device* ieee)
1788-{
1789- return ieee->bHalfWirelessN24GMode;
1790-}
1791-
1792-static short rtl8192_is_tx_queue_empty(struct ieee80211_device *ieee)
1793-{
1794- int i=0;
1795- struct r8192_priv *priv = ieee80211_priv(ieee->dev);
1796-
1797- for (i=0; i<=MGNT_QUEUE; i++)
1798- {
1799- if ((i== TXCMD_QUEUE) || (i == HCCA_QUEUE) )
1800- continue;
1801- if (skb_queue_len(&(&priv->tx_ring[i])->queue) > 0){
1802- printk("===>tx queue is not empty:%d, %d\n", i, skb_queue_len(&(&priv->tx_ring[i])->queue));
1803- return 0;
1804- }
1805- }
1806- return 1;
1807-}
1808-
1809-static void rtl8192_hw_sleep_down(struct r8192_priv *priv)
1810-{
1811- MgntActSet_RF_State(priv, eRfSleep, RF_CHANGE_BY_PS);
1812-}
1813-
1814-static void rtl8192_hw_wakeup(struct ieee80211_device *ieee)
1815-{
1816- struct r8192_priv *priv = ieee80211_priv(ieee->dev);
1817- MgntActSet_RF_State(priv, eRfOn, RF_CHANGE_BY_PS);
1818-}
1819-
1820-static void rtl8192_hw_wakeup_wq (struct work_struct *work)
1821-{
1822- struct delayed_work *dwork = container_of(work,struct delayed_work,work);
1823- struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq);
1824-
1825- rtl8192_hw_wakeup(ieee);
1826-}
1827-
1828-#define MIN_SLEEP_TIME 50
1829-#define MAX_SLEEP_TIME 10000
1830-static void rtl8192_hw_to_sleep(struct ieee80211_device *ieee, u32 th, u32 tl)
1831-{
1832- struct r8192_priv *priv = ieee80211_priv(ieee->dev);
1833- u32 tmp;
1834- u32 rb = jiffies;
1835-
1836- // Writing HW register with 0 equals to disable
1837- // the timer, that is not really what we want
1838- //
1839- tl -= MSECS(8+16+7);
1840-
1841- // If the interval in witch we are requested to sleep is too
1842- // short then give up and remain awake
1843- // when we sleep after send null frame, the timer will be too short to sleep.
1844- //
1845- if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME))
1846- ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
1847- printk("too short to sleep::%x, %x, %lx\n",tl, rb, MSECS(MIN_SLEEP_TIME));
1848- return;
1849- }
1850-
1851- if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))||
1852- ((tl < rb) && (tl>MSECS(69)) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))||
1853- ((tl<rb)&&(tl<MSECS(69))&&((tl+0xffffffff-rb)>MSECS(MAX_SLEEP_TIME)))) {
1854- printk("========>too long to sleep:%x, %x, %lx\n", tl, rb, MSECS(MAX_SLEEP_TIME));
1855- return;
1856- }
1857-
1858- tmp = (tl>rb)?(tl-rb):(rb-tl);
1859- queue_delayed_work(priv->ieee80211->wq,
1860- &priv->ieee80211->hw_wakeup_wq,tmp);
1861-
1862- rtl8192_hw_sleep_down(priv);
1863-}
1864-
1865-static void rtl8192_init_priv_variable(struct r8192_priv *priv)
1866-{
1867- u8 i;
1868- PRT_POWER_SAVE_CONTROL pPSC = &priv->PowerSaveControl;
1869-
1870- // Default Halt the NIC if RF is OFF.
1871- pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_HALT_NIC;
1872- pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_CLK_REQ;
1873- pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_ASPM;
1874- pPSC->RegRfPsLevel |= RT_RF_LPS_LEVEL_ASPM;
1875- pPSC->bLeisurePs = true;
1876- priv->ieee80211->RegMaxLPSAwakeIntvl = 5;
1877- priv->bHwRadioOff = false;
1878-
1879- priv->being_init_adapter = false;
1880- priv->txringcount = 64;//32;
1881- priv->rxbuffersize = 9100;//2048;//1024;
1882- priv->rxringcount = MAX_RX_COUNT;//64;
1883- priv->chan = 1; //set to channel 1
1884- priv->RegWirelessMode = WIRELESS_MODE_AUTO;
1885- priv->RegChannelPlan = 0xf;
1886- priv->ieee80211->mode = WIRELESS_MODE_AUTO; //SET AUTO
1887- priv->ieee80211->iw_mode = IW_MODE_INFRA;
1888- priv->ieee80211->ieee_up=0;
1889- priv->retry_rts = DEFAULT_RETRY_RTS;
1890- priv->retry_data = DEFAULT_RETRY_DATA;
1891- priv->ieee80211->rts = DEFAULT_RTS_THRESHOLD;
1892- priv->ieee80211->rate = 110; //11 mbps
1893- priv->ieee80211->short_slot = 1;
1894- priv->promisc = (priv->ieee80211->dev->flags & IFF_PROMISC) ? 1:0;
1895- priv->bcck_in_ch14 = false;
1896- priv->CCKPresentAttentuation = 0;
1897- priv->rfa_txpowertrackingindex = 0;
1898- priv->rfc_txpowertrackingindex = 0;
1899- priv->CckPwEnl = 6;
1900- //added by amy for silent reset
1901- priv->ResetProgress = RESET_TYPE_NORESET;
1902- priv->bForcedSilentReset = 0;
1903- priv->bDisableNormalResetCheck = false;
1904- priv->force_reset = false;
1905- //added by amy for power save
1906- priv->RfOffReason = 0;
1907- priv->bHwRfOffAction = 0;
1908- priv->PowerSaveControl.bInactivePs = true;
1909- priv->PowerSaveControl.bIPSModeBackup = false;
1910-
1911- priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
1912- priv->ieee80211->iw_mode = IW_MODE_INFRA;
1913- priv->ieee80211->softmac_features = IEEE_SOFTMAC_SCAN |
1914- IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
1915- IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;/* |
1916- IEEE_SOFTMAC_BEACONS;*///added by amy 080604 //| //IEEE_SOFTMAC_SINGLE_QUEUE;
1917-
1918- priv->ieee80211->active_scan = 1;
1919- priv->ieee80211->modulation = IEEE80211_CCK_MODULATION | IEEE80211_OFDM_MODULATION;
1920- priv->ieee80211->host_encrypt = 1;
1921- priv->ieee80211->host_decrypt = 1;
1922- priv->ieee80211->start_send_beacons = rtl8192_start_beacon;
1923- priv->ieee80211->stop_send_beacons = rtl8192_stop_beacon;
1924- priv->ieee80211->softmac_hard_start_xmit = rtl8192_hard_start_xmit;
1925- priv->ieee80211->set_chan = rtl8192_set_chan;
1926- priv->ieee80211->link_change = rtl8192_link_change;
1927- priv->ieee80211->softmac_data_hard_start_xmit = rtl8192_hard_data_xmit;
1928- priv->ieee80211->data_hard_stop = rtl8192_data_hard_stop;
1929- priv->ieee80211->data_hard_resume = rtl8192_data_hard_resume;
1930- priv->ieee80211->init_wmmparam_flag = 0;
1931- priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
1932- priv->ieee80211->check_nic_enough_desc = check_nic_enough_desc;
1933- priv->ieee80211->tx_headroom = sizeof(TX_FWINFO_8190PCI);
1934- priv->ieee80211->qos_support = 1;
1935- priv->ieee80211->SetBWModeHandler = rtl8192_SetBWMode;
1936- priv->ieee80211->handle_assoc_response = rtl8192_handle_assoc_response;
1937- priv->ieee80211->handle_beacon = rtl8192_handle_beacon;
1938-
1939- priv->ieee80211->sta_wake_up = rtl8192_hw_wakeup;
1940- priv->ieee80211->enter_sleep_state = rtl8192_hw_to_sleep;
1941- priv->ieee80211->ps_is_queue_empty = rtl8192_is_tx_queue_empty;
1942- priv->ieee80211->GetNmodeSupportBySecCfg = GetNmodeSupportBySecCfg8190Pci;
1943- priv->ieee80211->SetWirelessMode = rtl8192_SetWirelessMode;
1944- priv->ieee80211->GetHalfNmodeSupportByAPsHandler = GetHalfNmodeSupportByAPs819xPci;
1945-
1946- priv->ieee80211->InitialGainHandler = InitialGain819xPci;
1947-
1948-#ifdef ENABLE_IPS
1949- priv->ieee80211->ieee80211_ips_leave_wq = ieee80211_ips_leave_wq;
1950- priv->ieee80211->ieee80211_ips_leave = ieee80211_ips_leave;
1951-#endif
1952-#ifdef ENABLE_LPS
1953- priv->ieee80211->LeisurePSLeave = LeisurePSLeave;
1954-#endif
1955-
1956- priv->ieee80211->SetHwRegHandler = rtl8192e_SetHwReg;
1957- priv->ieee80211->rtllib_ap_sec_type = rtl8192e_ap_sec_type;
1958-
1959- priv->ShortRetryLimit = 0x30;
1960- priv->LongRetryLimit = 0x30;
1961-
1962- priv->ReceiveConfig = RCR_ADD3 |
1963- RCR_AMF | RCR_ADF | //accept management/data
1964- RCR_AICV | //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
1965- RCR_AB | RCR_AM | RCR_APM | //accept BC/MC/UC
1966- RCR_AAP | ((u32)7<<RCR_MXDMA_OFFSET) |
1967- ((u32)7 << RCR_FIFO_OFFSET) | RCR_ONLYERLPKT;
1968-
1969- priv->pFirmware = vzalloc(sizeof(rt_firmware));
1970-
1971- /* rx related queue */
1972- skb_queue_head_init(&priv->skb_queue);
1973-
1974- /* Tx related queue */
1975- for(i = 0; i < MAX_QUEUE_SIZE; i++) {
1976- skb_queue_head_init(&priv->ieee80211->skb_waitQ [i]);
1977- }
1978- for(i = 0; i < MAX_QUEUE_SIZE; i++) {
1979- skb_queue_head_init(&priv->ieee80211->skb_aggQ [i]);
1980- }
1981- priv->rf_set_chan = rtl8192_phy_SwChnl;
1982-}
1983-
1984-static void rtl8192_init_priv_lock(struct r8192_priv* priv)
1985-{
1986- spin_lock_init(&priv->irq_th_lock);
1987- spin_lock_init(&priv->rf_ps_lock);
1988- sema_init(&priv->wx_sem,1);
1989- sema_init(&priv->rf_sem,1);
1990- mutex_init(&priv->mutex);
1991-}
1992-
1993-/* init tasklet and wait_queue here */
1994-#define DRV_NAME "wlan0"
1995-static void rtl8192_init_priv_task(struct r8192_priv *priv)
1996-{
1997- priv->priv_wq = create_workqueue(DRV_NAME);
1998-
1999-#ifdef ENABLE_IPS
2000- INIT_WORK(&priv->ieee80211->ips_leave_wq, IPSLeave_wq);
2001-#endif
2002-
2003- INIT_WORK(&priv->reset_wq, rtl8192_restart);
2004- INIT_DELAYED_WORK(&priv->watch_dog_wq, rtl819x_watchdog_wqcallback);
2005- INIT_DELAYED_WORK(&priv->txpower_tracking_wq, dm_txpower_trackingcallback);
2006- INIT_DELAYED_WORK(&priv->rfpath_check_wq, dm_rf_pathcheck_workitemcallback);
2007- INIT_DELAYED_WORK(&priv->update_beacon_wq, rtl8192_update_beacon);
2008- INIT_WORK(&priv->qos_activate, rtl8192_qos_activate);
2009- INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq, rtl8192_hw_wakeup_wq);
2010-
2011- tasklet_init(&priv->irq_rx_tasklet, rtl8192_irq_rx_tasklet,
2012- (unsigned long) priv);
2013- tasklet_init(&priv->irq_tx_tasklet, rtl8192_irq_tx_tasklet,
2014- (unsigned long) priv);
2015- tasklet_init(&priv->irq_prepare_beacon_tasklet, rtl8192_prepare_beacon,
2016- (unsigned long) priv);
2017-}
2018-
2019-static void rtl8192_get_eeprom_size(struct r8192_priv *priv)
2020-{
2021- u16 curCR = 0;
2022- RT_TRACE(COMP_INIT, "===========>%s()\n", __FUNCTION__);
2023- curCR = read_nic_dword(priv, EPROM_CMD);
2024- RT_TRACE(COMP_INIT, "read from Reg Cmd9346CR(%x):%x\n", EPROM_CMD, curCR);
2025- //whether need I consider BIT5?
2026- priv->epromtype = (curCR & EPROM_CMD_9356SEL) ? EPROM_93c56 : EPROM_93c46;
2027- RT_TRACE(COMP_INIT, "<===========%s(), epromtype:%d\n", __FUNCTION__, priv->epromtype);
2028-}
2029-
2030-/*
2031- * Adapter->EEPROMAddressSize should be set before this function call.
2032- * EEPROM address size can be got through GetEEPROMSize8185()
2033- */
2034-static void rtl8192_read_eeprom_info(struct r8192_priv *priv)
2035-{
2036- struct net_device *dev = priv->ieee80211->dev;
2037- u8 tempval;
2038- u8 ICVer8192, ICVer8256;
2039- u16 i,usValue, IC_Version;
2040- u16 EEPROMId;
2041- u8 bMac_Tmp_Addr[6] = {0x00, 0xe0, 0x4c, 0x00, 0x00, 0x01};
2042- RT_TRACE(COMP_INIT, "====> rtl8192_read_eeprom_info\n");
2043-
2044-
2045- // TODO: I don't know if we need to apply EF function to EEPROM read function
2046-
2047- //2 Read EEPROM ID to make sure autoload is success
2048- EEPROMId = eprom_read(priv, 0);
2049- if( EEPROMId != RTL8190_EEPROM_ID )
2050- {
2051- RT_TRACE(COMP_ERR, "EEPROM ID is invalid:%x, %x\n", EEPROMId, RTL8190_EEPROM_ID);
2052- priv->AutoloadFailFlag=true;
2053- }
2054- else
2055- {
2056- priv->AutoloadFailFlag=false;
2057- }
2058-
2059- //
2060- // Assign Chip Version ID
2061- //
2062- // Read IC Version && Channel Plan
2063- if(!priv->AutoloadFailFlag)
2064- {
2065- // VID, PID
2066- priv->eeprom_vid = eprom_read(priv, (EEPROM_VID >> 1));
2067- priv->eeprom_did = eprom_read(priv, (EEPROM_DID >> 1));
2068-
2069- usValue = eprom_read(priv, (u16)(EEPROM_Customer_ID>>1)) >> 8 ;
2070- priv->eeprom_CustomerID = (u8)( usValue & 0xff);
2071- usValue = eprom_read(priv, (EEPROM_ICVersion_ChannelPlan>>1));
2072- priv->eeprom_ChannelPlan = usValue&0xff;
2073- IC_Version = ((usValue&0xff00)>>8);
2074-
2075- ICVer8192 = (IC_Version&0xf); //bit0~3; 1:A cut, 2:B cut, 3:C cut...
2076- ICVer8256 = ((IC_Version&0xf0)>>4);//bit4~6, bit7 reserved for other RF chip; 1:A cut, 2:B cut, 3:C cut...
2077- RT_TRACE(COMP_INIT, "ICVer8192 = 0x%x\n", ICVer8192);
2078- RT_TRACE(COMP_INIT, "ICVer8256 = 0x%x\n", ICVer8256);
2079- if(ICVer8192 == 0x2) //B-cut
2080- {
2081- if(ICVer8256 == 0x5) //E-cut
2082- priv->card_8192_version= VERSION_8190_BE;
2083- }
2084-
2085- switch(priv->card_8192_version)
2086- {
2087- case VERSION_8190_BD:
2088- case VERSION_8190_BE:
2089- break;
2090- default:
2091- priv->card_8192_version = VERSION_8190_BD;
2092- break;
2093- }
2094- RT_TRACE(COMP_INIT, "\nIC Version = 0x%x\n", priv->card_8192_version);
2095- }
2096- else
2097- {
2098- priv->card_8192_version = VERSION_8190_BD;
2099- priv->eeprom_vid = 0;
2100- priv->eeprom_did = 0;
2101- priv->eeprom_CustomerID = 0;
2102- priv->eeprom_ChannelPlan = 0;
2103- RT_TRACE(COMP_INIT, "IC Version = 0x%x\n", 0xff);
2104- }
2105-
2106- RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
2107- RT_TRACE(COMP_INIT, "EEPROM DID = 0x%4x\n", priv->eeprom_did);
2108- RT_TRACE(COMP_INIT,"EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
2109-
2110- //2 Read Permanent MAC address
2111- if(!priv->AutoloadFailFlag)
2112- {
2113- for(i = 0; i < 6; i += 2)
2114- {
2115- usValue = eprom_read(priv, (u16) ((EEPROM_NODE_ADDRESS_BYTE_0+i)>>1));
2116- *(u16*)(&dev->dev_addr[i]) = usValue;
2117- }
2118- } else {
2119- // when auto load failed, the last address byte set to be a random one.
2120- // added by david woo.2007/11/7
2121- memcpy(dev->dev_addr, bMac_Tmp_Addr, 6);
2122- }
2123-
2124- RT_TRACE(COMP_INIT, "Permanent Address = %pM\n", dev->dev_addr);
2125-
2126- //2 TX Power Check EEPROM Fail or not
2127- if(priv->card_8192_version > VERSION_8190_BD) {
2128- priv->bTXPowerDataReadFromEEPORM = true;
2129- } else {
2130- priv->bTXPowerDataReadFromEEPORM = false;
2131- }
2132-
2133- // 2007/11/15 MH 8190PCI Default=2T4R, 8192PCIE default=1T2R
2134- priv->rf_type = RTL819X_DEFAULT_RF_TYPE;
2135-
2136- if(priv->card_8192_version > VERSION_8190_BD)
2137- {
2138- // Read RF-indication and Tx Power gain index diff of legacy to HT OFDM rate.
2139- if(!priv->AutoloadFailFlag)
2140- {
2141- tempval = (eprom_read(priv, (EEPROM_RFInd_PowerDiff>>1))) & 0xff;
2142- priv->EEPROMLegacyHTTxPowerDiff = tempval & 0xf; // bit[3:0]
2143-
2144- if (tempval&0x80) //RF-indication, bit[7]
2145- priv->rf_type = RF_1T2R;
2146- else
2147- priv->rf_type = RF_2T4R;
2148- }
2149- else
2150- {
2151- priv->EEPROMLegacyHTTxPowerDiff = EEPROM_Default_LegacyHTTxPowerDiff;
2152- }
2153- RT_TRACE(COMP_INIT, "EEPROMLegacyHTTxPowerDiff = %d\n",
2154- priv->EEPROMLegacyHTTxPowerDiff);
2155-
2156- // Read ThermalMeter from EEPROM
2157- if(!priv->AutoloadFailFlag)
2158- {
2159- priv->EEPROMThermalMeter = (u8)(((eprom_read(priv, (EEPROM_ThermalMeter>>1))) & 0xff00)>>8);
2160- }
2161- else
2162- {
2163- priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
2164- }
2165- RT_TRACE(COMP_INIT, "ThermalMeter = %d\n", priv->EEPROMThermalMeter);
2166- //vivi, for tx power track
2167- priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
2168-
2169- if(priv->epromtype == EPROM_93c46)
2170- {
2171- // Read antenna tx power offset of B/C/D to A and CrystalCap from EEPROM
2172- if(!priv->AutoloadFailFlag)
2173- {
2174- usValue = eprom_read(priv, (EEPROM_TxPwDiff_CrystalCap>>1));
2175- priv->EEPROMAntPwDiff = (usValue&0x0fff);
2176- priv->EEPROMCrystalCap = (u8)((usValue&0xf000)>>12);
2177- }
2178- else
2179- {
2180- priv->EEPROMAntPwDiff = EEPROM_Default_AntTxPowerDiff;
2181- priv->EEPROMCrystalCap = EEPROM_Default_TxPwDiff_CrystalCap;
2182- }
2183- RT_TRACE(COMP_INIT, "EEPROMAntPwDiff = %d\n", priv->EEPROMAntPwDiff);
2184- RT_TRACE(COMP_INIT, "EEPROMCrystalCap = %d\n", priv->EEPROMCrystalCap);
2185-
2186- //
2187- // Get per-channel Tx Power Level
2188- //
2189- for(i=0; i<14; i+=2)
2190- {
2191- if(!priv->AutoloadFailFlag)
2192- {
2193- usValue = eprom_read(priv, (u16) ((EEPROM_TxPwIndex_CCK+i)>>1) );
2194- }
2195- else
2196- {
2197- usValue = EEPROM_Default_TxPower;
2198- }
2199- *((u16*)(&priv->EEPROMTxPowerLevelCCK[i])) = usValue;
2200- RT_TRACE(COMP_INIT,"CCK Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelCCK[i]);
2201- RT_TRACE(COMP_INIT, "CCK Tx Power Level, Index %d = 0x%02x\n", i+1, priv->EEPROMTxPowerLevelCCK[i+1]);
2202- }
2203- for(i=0; i<14; i+=2)
2204- {
2205- if(!priv->AutoloadFailFlag)
2206- {
2207- usValue = eprom_read(priv, (u16) ((EEPROM_TxPwIndex_OFDM_24G+i)>>1) );
2208- }
2209- else
2210- {
2211- usValue = EEPROM_Default_TxPower;
2212- }
2213- *((u16*)(&priv->EEPROMTxPowerLevelOFDM24G[i])) = usValue;
2214- RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelOFDM24G[i]);
2215- RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i+1, priv->EEPROMTxPowerLevelOFDM24G[i+1]);
2216- }
2217- }
2218-
2219- //
2220- // Update HAL variables.
2221- //
2222- if(priv->epromtype == EPROM_93c46)
2223- {
2224- for(i=0; i<14; i++)
2225- {
2226- priv->TxPowerLevelCCK[i] = priv->EEPROMTxPowerLevelCCK[i];
2227- priv->TxPowerLevelOFDM24G[i] = priv->EEPROMTxPowerLevelOFDM24G[i];
2228- }
2229- priv->LegacyHTTxPowerDiff = priv->EEPROMLegacyHTTxPowerDiff;
2230- // Antenna B gain offset to antenna A, bit0~3
2231- priv->AntennaTxPwDiff[0] = (priv->EEPROMAntPwDiff & 0xf);
2232- // Antenna C gain offset to antenna A, bit4~7
2233- priv->AntennaTxPwDiff[1] = ((priv->EEPROMAntPwDiff & 0xf0)>>4);
2234- // Antenna D gain offset to antenna A, bit8~11
2235- priv->AntennaTxPwDiff[2] = ((priv->EEPROMAntPwDiff & 0xf00)>>8);
2236- // CrystalCap, bit12~15
2237- priv->CrystalCap = priv->EEPROMCrystalCap;
2238- // ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
2239- priv->ThermalMeter[0] = (priv->EEPROMThermalMeter & 0xf);
2240- priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter & 0xf0)>>4);
2241- }
2242- else if(priv->epromtype == EPROM_93c56)
2243- {
2244- for(i=0; i<3; i++) // channel 1~3 use the same Tx Power Level.
2245- {
2246- priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[0];
2247- priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[0];
2248- priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[0];
2249- priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[0];
2250- }
2251- for(i=3; i<9; i++) // channel 4~9 use the same Tx Power Level
2252- {
2253- priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[1];
2254- priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[1];
2255- priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[1];
2256- priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[1];
2257- }
2258- for(i=9; i<14; i++) // channel 10~14 use the same Tx Power Level
2259- {
2260- priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[2];
2261- priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[2];
2262- priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[2];
2263- priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[2];
2264- }
2265- for(i=0; i<14; i++)
2266- RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_A[%d] = 0x%x\n", i, priv->TxPowerLevelCCK_A[i]);
2267- for(i=0; i<14; i++)
2268- RT_TRACE(COMP_INIT,"priv->TxPowerLevelOFDM24G_A[%d] = 0x%x\n", i, priv->TxPowerLevelOFDM24G_A[i]);
2269- for(i=0; i<14; i++)
2270- RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_C[%d] = 0x%x\n", i, priv->TxPowerLevelCCK_C[i]);
2271- for(i=0; i<14; i++)
2272- RT_TRACE(COMP_INIT, "priv->TxPowerLevelOFDM24G_C[%d] = 0x%x\n", i, priv->TxPowerLevelOFDM24G_C[i]);
2273- priv->LegacyHTTxPowerDiff = priv->EEPROMLegacyHTTxPowerDiff;
2274- priv->AntennaTxPwDiff[0] = 0;
2275- priv->AntennaTxPwDiff[1] = 0;
2276- priv->AntennaTxPwDiff[2] = 0;
2277- priv->CrystalCap = priv->EEPROMCrystalCap;
2278- // ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
2279- priv->ThermalMeter[0] = (priv->EEPROMThermalMeter & 0xf);
2280- priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter & 0xf0)>>4);
2281- }
2282- }
2283-
2284- if(priv->rf_type == RF_1T2R)
2285- {
2286- RT_TRACE(COMP_INIT, "1T2R config\n");
2287- }
2288- else if (priv->rf_type == RF_2T4R)
2289- {
2290- RT_TRACE(COMP_INIT, "2T4R config\n");
2291- }
2292-
2293- // 2008/01/16 MH We can only know RF type in the function. So we have to init
2294- // DIG RATR table again.
2295- init_rate_adaptive(priv);
2296-
2297- //1 Make a copy for following variables and we can change them if we want
2298-
2299- if(priv->RegChannelPlan == 0xf)
2300- {
2301- priv->ChannelPlan = priv->eeprom_ChannelPlan;
2302- }
2303- else
2304- {
2305- priv->ChannelPlan = priv->RegChannelPlan;
2306- }
2307-
2308- //
2309- // Used PID and DID to Set CustomerID
2310- //
2311- if( priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304 )
2312- {
2313- priv->CustomerID = RT_CID_DLINK;
2314- }
2315-
2316- switch(priv->eeprom_CustomerID)
2317- {
2318- case EEPROM_CID_DEFAULT:
2319- priv->CustomerID = RT_CID_DEFAULT;
2320- break;
2321- case EEPROM_CID_CAMEO:
2322- priv->CustomerID = RT_CID_819x_CAMEO;
2323- break;
2324- case EEPROM_CID_RUNTOP:
2325- priv->CustomerID = RT_CID_819x_RUNTOP;
2326- break;
2327- case EEPROM_CID_NetCore:
2328- priv->CustomerID = RT_CID_819x_Netcore;
2329- break;
2330- case EEPROM_CID_TOSHIBA: // Merge by Jacken, 2008/01/31
2331- priv->CustomerID = RT_CID_TOSHIBA;
2332- if(priv->eeprom_ChannelPlan&0x80)
2333- priv->ChannelPlan = priv->eeprom_ChannelPlan&0x7f;
2334- else
2335- priv->ChannelPlan = 0x0;
2336- RT_TRACE(COMP_INIT, "Toshiba ChannelPlan = 0x%x\n",
2337- priv->ChannelPlan);
2338- break;
2339- case EEPROM_CID_Nettronix:
2340- priv->CustomerID = RT_CID_Nettronix;
2341- break;
2342- case EEPROM_CID_Pronet:
2343- priv->CustomerID = RT_CID_PRONET;
2344- break;
2345- case EEPROM_CID_DLINK:
2346- priv->CustomerID = RT_CID_DLINK;
2347- break;
2348-
2349- case EEPROM_CID_WHQL:
2350- break;
2351- default:
2352- // value from RegCustomerID
2353- break;
2354- }
2355-
2356- //Avoid the channel plan array overflow, by Bruce, 2007-08-27.
2357- if(priv->ChannelPlan > CHANNEL_PLAN_LEN - 1)
2358- priv->ChannelPlan = 0; //FCC
2359-
2360- if( priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304)
2361- priv->ieee80211->bSupportRemoteWakeUp = true;
2362- else
2363- priv->ieee80211->bSupportRemoteWakeUp = false;
2364-
2365-
2366- RT_TRACE(COMP_INIT, "RegChannelPlan(%d)\n", priv->RegChannelPlan);
2367- RT_TRACE(COMP_INIT, "ChannelPlan = %d\n", priv->ChannelPlan);
2368- RT_TRACE(COMP_TRACE, "<==== ReadAdapterInfo\n");
2369-}
2370-
2371-
2372-static short rtl8192_get_channel_map(struct r8192_priv *priv)
2373-{
2374-#ifdef ENABLE_DOT11D
2375- if(priv->ChannelPlan> COUNTRY_CODE_GLOBAL_DOMAIN){
2376- printk("rtl8180_init:Error channel plan! Set to default.\n");
2377- priv->ChannelPlan= 0;
2378- }
2379- RT_TRACE(COMP_INIT, "Channel plan is %d\n",priv->ChannelPlan);
2380-
2381- rtl819x_set_channel_map(priv->ChannelPlan, priv);
2382-#else
2383- int ch,i;
2384- //Set Default Channel Plan
2385- if(!channels){
2386- DMESG("No channels, aborting");
2387- return -1;
2388- }
2389- ch=channels;
2390- priv->ChannelPlan= 0;//hikaru
2391- // set channels 1..14 allowed in given locale
2392- for (i=1; i<=14; i++) {
2393- (priv->ieee80211->channel_map)[i] = (u8)(ch & 0x01);
2394- ch >>= 1;
2395- }
2396-#endif
2397- return 0;
2398-}
2399-
2400-static short rtl8192_init(struct r8192_priv *priv)
2401-{
2402- struct net_device *dev = priv->ieee80211->dev;
2403-
2404- memset(&(priv->stats),0,sizeof(struct Stats));
2405- rtl8192_init_priv_variable(priv);
2406- rtl8192_init_priv_lock(priv);
2407- rtl8192_init_priv_task(priv);
2408- rtl8192_get_eeprom_size(priv);
2409- rtl8192_read_eeprom_info(priv);
2410- rtl8192_get_channel_map(priv);
2411- init_hal_dm(priv);
2412- init_timer(&priv->watch_dog_timer);
2413- priv->watch_dog_timer.data = (unsigned long)priv;
2414- priv->watch_dog_timer.function = watch_dog_timer_callback;
2415- if (request_irq(dev->irq, rtl8192_interrupt, IRQF_SHARED, dev->name, priv)) {
2416- printk("Error allocating IRQ %d",dev->irq);
2417- return -1;
2418- }else{
2419- priv->irq=dev->irq;
2420- printk("IRQ %d",dev->irq);
2421- }
2422- if (rtl8192_pci_initdescring(priv) != 0){
2423- printk("Endopoints initialization failed");
2424- return -1;
2425- }
2426-
2427- return 0;
2428-}
2429-
2430-/*
2431- * Actually only set RRSR, RATR and BW_OPMODE registers
2432- * not to do all the hw config as its name says
2433- * This part need to modified according to the rate set we filtered
2434- */
2435-static void rtl8192_hwconfig(struct r8192_priv *priv)
2436-{
2437- u32 regRATR = 0, regRRSR = 0;
2438- u8 regBwOpMode = 0, regTmp = 0;
2439-
2440-// Set RRSR, RATR, and BW_OPMODE registers
2441- //
2442- switch (priv->ieee80211->mode)
2443- {
2444- case WIRELESS_MODE_B:
2445- regBwOpMode = BW_OPMODE_20MHZ;
2446- regRATR = RATE_ALL_CCK;
2447- regRRSR = RATE_ALL_CCK;
2448- break;
2449- case WIRELESS_MODE_A:
2450- regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
2451- regRATR = RATE_ALL_OFDM_AG;
2452- regRRSR = RATE_ALL_OFDM_AG;
2453- break;
2454- case WIRELESS_MODE_G:
2455- regBwOpMode = BW_OPMODE_20MHZ;
2456- regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
2457- regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
2458- break;
2459- case WIRELESS_MODE_AUTO:
2460- case WIRELESS_MODE_N_24G:
2461- // It support CCK rate by default.
2462- // CCK rate will be filtered out only when associated AP does not support it.
2463- regBwOpMode = BW_OPMODE_20MHZ;
2464- regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
2465- regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
2466- break;
2467- case WIRELESS_MODE_N_5G:
2468- regBwOpMode = BW_OPMODE_5G;
2469- regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
2470- regRRSR = RATE_ALL_OFDM_AG;
2471- break;
2472- }
2473-
2474- write_nic_byte(priv, BW_OPMODE, regBwOpMode);
2475- {
2476- u32 ratr_value = 0;
2477- ratr_value = regRATR;
2478- if (priv->rf_type == RF_1T2R)
2479- {
2480- ratr_value &= ~(RATE_ALL_OFDM_2SS);
2481- }
2482- write_nic_dword(priv, RATR0, ratr_value);
2483- write_nic_byte(priv, UFWP, 1);
2484- }
2485- regTmp = read_nic_byte(priv, 0x313);
2486- regRRSR = ((regTmp) << 24) | (regRRSR & 0x00ffffff);
2487- write_nic_dword(priv, RRSR, regRRSR);
2488-
2489- //
2490- // Set Retry Limit here
2491- //
2492- write_nic_word(priv, RETRY_LIMIT,
2493- priv->ShortRetryLimit << RETRY_LIMIT_SHORT_SHIFT |
2494- priv->LongRetryLimit << RETRY_LIMIT_LONG_SHIFT);
2495- // Set Contention Window here
2496-
2497- // Set Tx AGC
2498-
2499- // Set Tx Antenna including Feedback control
2500-
2501- // Set Auto Rate fallback control
2502-
2503-
2504-}
2505-
2506-
2507-static RT_STATUS rtl8192_adapter_start(struct r8192_priv *priv)
2508-{
2509- struct net_device *dev = priv->ieee80211->dev;
2510- u32 ulRegRead;
2511- RT_STATUS rtStatus = RT_STATUS_SUCCESS;
2512- u8 tmpvalue;
2513- u8 ICVersion,SwitchingRegulatorOutput;
2514- bool bfirmwareok = true;
2515- u32 tmpRegA, tmpRegC, TempCCk;
2516- int i =0;
2517-
2518- RT_TRACE(COMP_INIT, "====>%s()\n", __FUNCTION__);
2519- priv->being_init_adapter = true;
2520- rtl8192_pci_resetdescring(priv);
2521- // 2007/11/02 MH Before initalizing RF. We can not use FW to do RF-R/W.
2522- priv->Rf_Mode = RF_OP_By_SW_3wire;
2523-
2524- //dPLL on
2525- if(priv->ResetProgress == RESET_TYPE_NORESET)
2526- {
2527- write_nic_byte(priv, ANAPAR, 0x37);
2528- // Accordign to designer's explain, LBUS active will never > 10ms. We delay 10ms
2529- // Joseph increae the time to prevent firmware download fail
2530- mdelay(500);
2531- }
2532-
2533- //PlatformSleepUs(10000);
2534- // For any kind of InitializeAdapter process, we shall use system now!!
2535- priv->pFirmware->firmware_status = FW_STATUS_0_INIT;
2536-
2537- //
2538- //3 //Config CPUReset Register
2539- //3//
2540- //3 Firmware Reset Or Not
2541- ulRegRead = read_nic_dword(priv, CPU_GEN);
2542- if(priv->pFirmware->firmware_status == FW_STATUS_0_INIT)
2543- { //called from MPInitialized. do nothing
2544- ulRegRead |= CPU_GEN_SYSTEM_RESET;
2545- }else if(priv->pFirmware->firmware_status == FW_STATUS_5_READY)
2546- ulRegRead |= CPU_GEN_FIRMWARE_RESET; // Called from MPReset
2547- else
2548- RT_TRACE(COMP_ERR, "ERROR in %s(): undefined firmware state(%d)\n", __FUNCTION__, priv->pFirmware->firmware_status);
2549-
2550- write_nic_dword(priv, CPU_GEN, ulRegRead);
2551-
2552- //3//
2553- //3 //Fix the issue of E-cut high temperature issue
2554- //3//
2555- // TODO: E cut only
2556- ICVersion = read_nic_byte(priv, IC_VERRSION);
2557- if(ICVersion >= 0x4) //E-cut only
2558- {
2559- // HW SD suggest that we should not wirte this register too often, so driver
2560- // should readback this register. This register will be modified only when
2561- // power on reset
2562- SwitchingRegulatorOutput = read_nic_byte(priv, SWREGULATOR);
2563- if(SwitchingRegulatorOutput != 0xb8)
2564- {
2565- write_nic_byte(priv, SWREGULATOR, 0xa8);
2566- mdelay(1);
2567- write_nic_byte(priv, SWREGULATOR, 0xb8);
2568- }
2569- }
2570-
2571- //3//
2572- //3// Initialize BB before MAC
2573- //3//
2574- RT_TRACE(COMP_INIT, "BB Config Start!\n");
2575- rtStatus = rtl8192_BBConfig(priv);
2576- if(rtStatus != RT_STATUS_SUCCESS)
2577- {
2578- RT_TRACE(COMP_ERR, "BB Config failed\n");
2579- return rtStatus;
2580- }
2581- RT_TRACE(COMP_INIT,"BB Config Finished!\n");
2582-
2583- //3//Set Loopback mode or Normal mode
2584- //3//
2585- //2006.12.13 by emily. Note!We should not merge these two CPU_GEN register writings
2586- // because setting of System_Reset bit reset MAC to default transmission mode.
2587- //Loopback mode or not
2588- priv->LoopbackMode = RTL819X_NO_LOOPBACK;
2589- if(priv->ResetProgress == RESET_TYPE_NORESET)
2590- {
2591- ulRegRead = read_nic_dword(priv, CPU_GEN);
2592- if(priv->LoopbackMode == RTL819X_NO_LOOPBACK)
2593- {
2594- ulRegRead = ((ulRegRead & CPU_GEN_NO_LOOPBACK_MSK) | CPU_GEN_NO_LOOPBACK_SET);
2595- }
2596- else if (priv->LoopbackMode == RTL819X_MAC_LOOPBACK )
2597- {
2598- ulRegRead |= CPU_CCK_LOOPBACK;
2599- }
2600- else
2601- {
2602- RT_TRACE(COMP_ERR,"Serious error: wrong loopback mode setting\n");
2603- }
2604-
2605- //2008.06.03, for WOL
2606- //ulRegRead &= (~(CPU_GEN_GPIO_UART));
2607- write_nic_dword(priv, CPU_GEN, ulRegRead);
2608-
2609- // 2006.11.29. After reset cpu, we sholud wait for a second, otherwise, it may fail to write registers. Emily
2610- udelay(500);
2611- }
2612- //3Set Hardware(Do nothing now)
2613- rtl8192_hwconfig(priv);
2614- //2=======================================================
2615- // Common Setting for all of the FPGA platform. (part 1)
2616- //2=======================================================
2617- // If there is changes, please make sure it applies to all of the FPGA version
2618- //3 Turn on Tx/Rx
2619- write_nic_byte(priv, CMDR, CR_RE|CR_TE);
2620-
2621- //2Set Tx dma burst
2622- write_nic_byte(priv, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) |
2623- (MXDMA2_NoLimit<<MXDMA2_TX_SHIFT) ));
2624-
2625- //set IDR0 here
2626- write_nic_dword(priv, MAC0, ((u32*)dev->dev_addr)[0]);
2627- write_nic_word(priv, MAC4, ((u16*)(dev->dev_addr + 4))[0]);
2628- //set RCR
2629- write_nic_dword(priv, RCR, priv->ReceiveConfig);
2630-
2631- //3 Initialize Number of Reserved Pages in Firmware Queue
2632- write_nic_dword(priv, RQPN1, NUM_OF_PAGE_IN_FW_QUEUE_BK << RSVD_FW_QUEUE_PAGE_BK_SHIFT |
2633- NUM_OF_PAGE_IN_FW_QUEUE_BE << RSVD_FW_QUEUE_PAGE_BE_SHIFT |
2634- NUM_OF_PAGE_IN_FW_QUEUE_VI << RSVD_FW_QUEUE_PAGE_VI_SHIFT |
2635- NUM_OF_PAGE_IN_FW_QUEUE_VO <<RSVD_FW_QUEUE_PAGE_VO_SHIFT);
2636- write_nic_dword(priv, RQPN2, NUM_OF_PAGE_IN_FW_QUEUE_MGNT << RSVD_FW_QUEUE_PAGE_MGNT_SHIFT);
2637- write_nic_dword(priv, RQPN3, APPLIED_RESERVED_QUEUE_IN_FW|
2638- NUM_OF_PAGE_IN_FW_QUEUE_BCN<<RSVD_FW_QUEUE_PAGE_BCN_SHIFT|
2639- NUM_OF_PAGE_IN_FW_QUEUE_PUB<<RSVD_FW_QUEUE_PAGE_PUB_SHIFT);
2640-
2641- rtl8192_tx_enable(priv);
2642- rtl8192_rx_enable(priv);
2643- //3Set Response Rate Setting Register
2644- // CCK rate is supported by default.
2645- // CCK rate will be filtered out only when associated AP does not support it.
2646- ulRegRead = (0xFFF00000 & read_nic_dword(priv, RRSR)) | RATE_ALL_OFDM_AG | RATE_ALL_CCK;
2647- write_nic_dword(priv, RRSR, ulRegRead);
2648- write_nic_dword(priv, RATR0+4*7, (RATE_ALL_OFDM_AG | RATE_ALL_CCK));
2649-
2650- //2Set AckTimeout
2651- // TODO: (it value is only for FPGA version). need to be changed!!2006.12.18, by Emily
2652- write_nic_byte(priv, ACK_TIMEOUT, 0x30);
2653-
2654- if(priv->ResetProgress == RESET_TYPE_NORESET)
2655- rtl8192_SetWirelessMode(priv->ieee80211, priv->ieee80211->mode);
2656- //-----------------------------------------------------------------------------
2657- // Set up security related. 070106, by rcnjko:
2658- // 1. Clear all H/W keys.
2659- // 2. Enable H/W encryption/decryption.
2660- //-----------------------------------------------------------------------------
2661- CamResetAllEntry(priv);
2662- {
2663- u8 SECR_value = 0x0;
2664- SECR_value |= SCR_TxEncEnable;
2665- SECR_value |= SCR_RxDecEnable;
2666- SECR_value |= SCR_NoSKMC;
2667- write_nic_byte(priv, SECR, SECR_value);
2668- }
2669- //3Beacon related
2670- write_nic_word(priv, ATIMWND, 2);
2671- write_nic_word(priv, BCN_INTERVAL, 100);
2672- for (i=0; i<QOS_QUEUE_NUM; i++)
2673- write_nic_dword(priv, WDCAPARA_ADD[i], 0x005e4332);
2674- //
2675- // Switching regulator controller: This is set temporarily.
2676- // It's not sure if this can be removed in the future.
2677- // PJ advised to leave it by default.
2678- //
2679- write_nic_byte(priv, 0xbe, 0xc0);
2680-
2681- //2=======================================================
2682- // Set PHY related configuration defined in MAC register bank
2683- //2=======================================================
2684- rtl8192_phy_configmac(priv);
2685-
2686- if (priv->card_8192_version > (u8) VERSION_8190_BD) {
2687- rtl8192_phy_getTxPower(priv);
2688- rtl8192_phy_setTxPower(priv, priv->chan);
2689- }
2690-
2691- //if D or C cut
2692- tmpvalue = read_nic_byte(priv, IC_VERRSION);
2693- priv->IC_Cut = tmpvalue;
2694- RT_TRACE(COMP_INIT, "priv->IC_Cut = 0x%x\n", priv->IC_Cut);
2695- if(priv->IC_Cut >= IC_VersionCut_D)
2696- {
2697- //pHalData->bDcut = TRUE;
2698- if(priv->IC_Cut == IC_VersionCut_D)
2699- RT_TRACE(COMP_INIT, "D-cut\n");
2700- if(priv->IC_Cut == IC_VersionCut_E)
2701- {
2702- RT_TRACE(COMP_INIT, "E-cut\n");
2703- // HW SD suggest that we should not wirte this register too often, so driver
2704- // should readback this register. This register will be modified only when
2705- // power on reset
2706- }
2707- }
2708- else
2709- {
2710- //pHalData->bDcut = FALSE;
2711- RT_TRACE(COMP_INIT, "Before C-cut\n");
2712- }
2713-
2714- //Firmware download
2715- RT_TRACE(COMP_INIT, "Load Firmware!\n");
2716- bfirmwareok = init_firmware(priv);
2717- if(bfirmwareok != true) {
2718- rtStatus = RT_STATUS_FAILURE;
2719- return rtStatus;
2720- }
2721- RT_TRACE(COMP_INIT, "Load Firmware finished!\n");
2722-
2723- //RF config
2724- if(priv->ResetProgress == RESET_TYPE_NORESET)
2725- {
2726- RT_TRACE(COMP_INIT, "RF Config Started!\n");
2727- rtStatus = rtl8192_phy_RFConfig(priv);
2728- if(rtStatus != RT_STATUS_SUCCESS)
2729- {
2730- RT_TRACE(COMP_ERR, "RF Config failed\n");
2731- return rtStatus;
2732- }
2733- RT_TRACE(COMP_INIT, "RF Config Finished!\n");
2734- }
2735- rtl8192_phy_updateInitGain(priv);
2736-
2737- /*---- Set CCK and OFDM Block "ON"----*/
2738- rtl8192_setBBreg(priv, rFPGA0_RFMOD, bCCKEn, 0x1);
2739- rtl8192_setBBreg(priv, rFPGA0_RFMOD, bOFDMEn, 0x1);
2740-
2741- //Enable Led
2742- write_nic_byte(priv, 0x87, 0x0);
2743-
2744- //2=======================================================
2745- // RF Power Save
2746- //2=======================================================
2747-#ifdef ENABLE_IPS
2748-
2749-{
2750- if(priv->RfOffReason > RF_CHANGE_BY_PS)
2751- { // H/W or S/W RF OFF before sleep.
2752- RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RfOffReason(%d)\n", __FUNCTION__,priv->RfOffReason);
2753- MgntActSet_RF_State(priv, eRfOff, priv->RfOffReason);
2754- }
2755- else if(priv->RfOffReason >= RF_CHANGE_BY_IPS)
2756- { // H/W or S/W RF OFF before sleep.
2757- RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RfOffReason(%d)\n", __FUNCTION__, priv->RfOffReason);
2758- MgntActSet_RF_State(priv, eRfOff, priv->RfOffReason);
2759- }
2760- else
2761- {
2762- RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): RF-ON \n",__FUNCTION__);
2763- priv->eRFPowerState = eRfOn;
2764- priv->RfOffReason = 0;
2765- }
2766-}
2767-#endif
2768- // We can force firmware to do RF-R/W
2769- if(priv->ieee80211->FwRWRF)
2770- priv->Rf_Mode = RF_OP_By_FW;
2771- else
2772- priv->Rf_Mode = RF_OP_By_SW_3wire;
2773-
2774- if(priv->ResetProgress == RESET_TYPE_NORESET)
2775- {
2776- dm_initialize_txpower_tracking(priv);
2777-
2778- if(priv->IC_Cut >= IC_VersionCut_D)
2779- {
2780- tmpRegA = rtl8192_QueryBBReg(priv, rOFDM0_XATxIQImbalance, bMaskDWord);
2781- tmpRegC = rtl8192_QueryBBReg(priv, rOFDM0_XCTxIQImbalance, bMaskDWord);
2782- for(i = 0; i<TxBBGainTableLength; i++)
2783- {
2784- if(tmpRegA == priv->txbbgain_table[i].txbbgain_value)
2785- {
2786- priv->rfa_txpowertrackingindex= (u8)i;
2787- priv->rfa_txpowertrackingindex_real= (u8)i;
2788- priv->rfa_txpowertracking_default = priv->rfa_txpowertrackingindex;
2789- break;
2790- }
2791- }
2792-
2793- TempCCk = rtl8192_QueryBBReg(priv, rCCK0_TxFilter1, bMaskByte2);
2794-
2795- for(i=0 ; i<CCKTxBBGainTableLength ; i++)
2796- {
2797- if(TempCCk == priv->cck_txbbgain_table[i].ccktxbb_valuearray[0])
2798- {
2799- priv->CCKPresentAttentuation_20Mdefault =(u8) i;
2800- break;
2801- }
2802- }
2803- priv->CCKPresentAttentuation_40Mdefault = 0;
2804- priv->CCKPresentAttentuation_difference = 0;
2805- priv->CCKPresentAttentuation = priv->CCKPresentAttentuation_20Mdefault;
2806- RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_initial = %d\n", priv->rfa_txpowertrackingindex);
2807- RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_real__initial = %d\n", priv->rfa_txpowertrackingindex_real);
2808- RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_difference_initial = %d\n", priv->CCKPresentAttentuation_difference);
2809- RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_initial = %d\n", priv->CCKPresentAttentuation);
2810- priv->btxpower_tracking = FALSE;//TEMPLY DISABLE
2811- }
2812- }
2813-
2814- rtl8192_irq_enable(priv);
2815- priv->being_init_adapter = false;
2816- return rtStatus;
2817-
2818-}
2819-
2820-static void rtl8192_prepare_beacon(unsigned long arg)
2821-{
2822- struct r8192_priv *priv = (struct r8192_priv*) arg;
2823- struct sk_buff *skb;
2824- cb_desc *tcb_desc;
2825-
2826- skb = ieee80211_get_beacon(priv->ieee80211);
2827- tcb_desc = (cb_desc *)(skb->cb + 8);
2828- /* prepare misc info for the beacon xmit */
2829- tcb_desc->queue_index = BEACON_QUEUE;
2830- /* IBSS does not support HT yet, use 1M defaultly */
2831- tcb_desc->data_rate = 2;
2832- tcb_desc->RATRIndex = 7;
2833- tcb_desc->bTxDisableRateFallBack = 1;
2834- tcb_desc->bTxUseDriverAssingedRate = 1;
2835-
2836- skb_push(skb, priv->ieee80211->tx_headroom);
2837- if(skb){
2838- rtl8192_tx(priv, skb);
2839- }
2840-}
2841-
2842-
2843-/*
2844- * configure registers for beacon tx and enables it via
2845- * rtl8192_beacon_tx_enable(). rtl8192_beacon_tx_disable() might
2846- * be used to stop beacon transmission
2847- */
2848-static void rtl8192_start_beacon(struct ieee80211_device *ieee80211)
2849-{
2850- struct r8192_priv *priv = ieee80211_priv(ieee80211->dev);
2851- struct ieee80211_network *net = &priv->ieee80211->current_network;
2852- u16 BcnTimeCfg = 0;
2853- u16 BcnCW = 6;
2854- u16 BcnIFS = 0xf;
2855-
2856- DMESG("Enabling beacon TX");
2857- rtl8192_irq_disable(priv);
2858- //rtl8192_beacon_tx_enable(dev);
2859-
2860- /* ATIM window */
2861- write_nic_word(priv, ATIMWND, 2);
2862-
2863- /* Beacon interval (in unit of TU) */
2864- write_nic_word(priv, BCN_INTERVAL, net->beacon_interval);
2865-
2866- /*
2867- * DrvErlyInt (in unit of TU).
2868- * (Time to send interrupt to notify driver to c
2869- * hange beacon content)
2870- * */
2871- write_nic_word(priv, BCN_DRV_EARLY_INT, 10);
2872-
2873- /*
2874- * BcnDMATIM(in unit of us).
2875- * Indicates the time before TBTT to perform beacon queue DMA
2876- * */
2877- write_nic_word(priv, BCN_DMATIME, 256);
2878-
2879- /*
2880- * Force beacon frame transmission even after receiving
2881- * beacon frame from other ad hoc STA
2882- * */
2883- write_nic_byte(priv, BCN_ERR_THRESH, 100);
2884-
2885- /* Set CW and IFS */
2886- BcnTimeCfg |= BcnCW<<BCN_TCFG_CW_SHIFT;
2887- BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
2888- write_nic_word(priv, BCN_TCFG, BcnTimeCfg);
2889-
2890-
2891- /* enable the interrupt for ad-hoc process */
2892- rtl8192_irq_enable(priv);
2893-}
2894-
2895-static bool HalRxCheckStuck8190Pci(struct r8192_priv *priv)
2896-{
2897- u16 RegRxCounter = read_nic_word(priv, 0x130);
2898- bool bStuck = FALSE;
2899-
2900- RT_TRACE(COMP_RESET,"%s(): RegRxCounter is %d,RxCounter is %d\n",__FUNCTION__,RegRxCounter,priv->RxCounter);
2901- // If rssi is small, we should check rx for long time because of bad rx.
2902- // or maybe it will continuous silent reset every 2 seconds.
2903- priv->rx_chk_cnt++;
2904- if(priv->undecorated_smoothed_pwdb >= (RateAdaptiveTH_High+5))
2905- {
2906- priv->rx_chk_cnt = 0; /* high rssi, check rx stuck right now. */
2907- }
2908- else if(priv->undecorated_smoothed_pwdb < (RateAdaptiveTH_High+5) &&
2909- ((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_40M) ||
2910- (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_20M)) )
2911-
2912- {
2913- if(priv->rx_chk_cnt < 2)
2914- {
2915- return bStuck;
2916- }
2917- else
2918- {
2919- priv->rx_chk_cnt = 0;
2920- }
2921- }
2922- else if(((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_40M) ||
2923- (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_20M)) &&
2924- priv->undecorated_smoothed_pwdb >= VeryLowRSSI)
2925- {
2926- if(priv->rx_chk_cnt < 4)
2927- {
2928- return bStuck;
2929- }
2930- else
2931- {
2932- priv->rx_chk_cnt = 0;
2933- }
2934- }
2935- else
2936- {
2937- if(priv->rx_chk_cnt < 8)
2938- {
2939- return bStuck;
2940- }
2941- else
2942- {
2943- priv->rx_chk_cnt = 0;
2944- }
2945- }
2946- if(priv->RxCounter==RegRxCounter)
2947- bStuck = TRUE;
2948-
2949- priv->RxCounter = RegRxCounter;
2950-
2951- return bStuck;
2952-}
2953-
2954-static RESET_TYPE RxCheckStuck(struct r8192_priv *priv)
2955-{
2956-
2957- if(HalRxCheckStuck8190Pci(priv))
2958- {
2959- RT_TRACE(COMP_RESET, "RxStuck Condition\n");
2960- return RESET_TYPE_SILENT;
2961- }
2962-
2963- return RESET_TYPE_NORESET;
2964-}
2965-
2966-static RESET_TYPE rtl819x_check_reset(struct r8192_priv *priv)
2967-{
2968- RESET_TYPE RxResetType = RESET_TYPE_NORESET;
2969- RT_RF_POWER_STATE rfState;
2970-
2971- rfState = priv->eRFPowerState;
2972-
2973- if (rfState != eRfOff && (priv->ieee80211->iw_mode != IW_MODE_ADHOC)) {
2974- /*
2975- * If driver is in the status of firmware download failure,
2976- * driver skips RF initialization and RF is in turned off state.
2977- * Driver should check whether Rx stuck and do silent reset. And
2978- * if driver is in firmware download failure status, driver
2979- * should initialize RF in the following silent reset procedure
2980- *
2981- * Driver should not check RX stuck in IBSS mode because it is
2982- * required to set Check BSSID in order to send beacon, however,
2983- * if check BSSID is set, STA cannot hear any packet a all.
2984- */
2985- RxResetType = RxCheckStuck(priv);
2986- }
2987-
2988- RT_TRACE(COMP_RESET, "%s(): RxResetType is %d\n", __FUNCTION__, RxResetType);
2989-
2990- return RxResetType;
2991-}
2992-
2993-#ifdef ENABLE_IPS
2994-static void InactivePsWorkItemCallback(struct r8192_priv *priv)
2995-{
2996- PRT_POWER_SAVE_CONTROL pPSC = &priv->PowerSaveControl;
2997-
2998- RT_TRACE(COMP_POWER, "InactivePsWorkItemCallback() --------->\n");
2999- //
3000- // This flag "bSwRfProcessing", indicates the status of IPS procedure, should be set if the IPS workitem
3001- // is really scheduled.
3002- // The old code, sets this flag before scheduling the IPS workitem and however, at the same time the
3003- // previous IPS workitem did not end yet, fails to schedule the current workitem. Thus, bSwRfProcessing
3004- // blocks the IPS procedure of switching RF.
3005- // By Bruce, 2007-12-25.
3006- //
3007- pPSC->bSwRfProcessing = TRUE;
3008-
3009- RT_TRACE(COMP_RF, "InactivePsWorkItemCallback(): Set RF to %s.\n",
3010- pPSC->eInactivePowerState == eRfOff?"OFF":"ON");
3011-
3012-
3013- MgntActSet_RF_State(priv, pPSC->eInactivePowerState, RF_CHANGE_BY_IPS);
3014-
3015- //
3016- // To solve CAM values miss in RF OFF, rewrite CAM values after RF ON. By Bruce, 2007-09-20.
3017- //
3018- pPSC->bSwRfProcessing = FALSE;
3019- RT_TRACE(COMP_POWER, "InactivePsWorkItemCallback() <---------\n");
3020-}
3021-
3022-#ifdef ENABLE_LPS
3023-/* Change current and default preamble mode. */
3024-bool MgntActSet_802_11_PowerSaveMode(struct r8192_priv *priv, u8 rtPsMode)
3025-{
3026-
3027- // Currently, we do not change power save mode on IBSS mode.
3028- if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3029- {
3030- return false;
3031- }
3032-
3033- //
3034- // <RJ_NOTE> If we make HW to fill up the PwrMgt bit for us,
3035- // some AP will not response to our mgnt frames with PwrMgt bit set,
3036- // e.g. cannot associate the AP.
3037- // So I commented out it. 2005.02.16, by rcnjko.
3038- //
3039-// // Change device's power save mode.
3040-// Adapter->HalFunc.SetPSModeHandler( Adapter, rtPsMode );
3041-
3042- // Update power save mode configured.
3043- //RT_TRACE(COMP_LPS,"%s(): set ieee->ps = %x\n",__FUNCTION__,rtPsMode);
3044- if(!priv->ps_force) {
3045- priv->ieee80211->ps = rtPsMode;
3046- }
3047-
3048- // Awake immediately
3049- if(priv->ieee80211->sta_sleep != 0 && rtPsMode == IEEE80211_PS_DISABLED)
3050- {
3051- // Notify the AP we awke.
3052- rtl8192_hw_wakeup(priv->ieee80211);
3053- priv->ieee80211->sta_sleep = 0;
3054-
3055- spin_lock(&priv->ieee80211->mgmt_tx_lock);
3056- printk("LPS leave: notify AP we are awaked ++++++++++ SendNullFunctionData\n");
3057- ieee80211_sta_ps_send_null_frame(priv->ieee80211, 0);
3058- spin_unlock(&priv->ieee80211->mgmt_tx_lock);
3059- }
3060-
3061- return true;
3062-}
3063-
3064-/* Enter the leisure power save mode. */
3065-void LeisurePSEnter(struct ieee80211_device *ieee80211)
3066-{
3067- struct r8192_priv *priv = ieee80211_priv(ieee80211->dev);
3068- PRT_POWER_SAVE_CONTROL pPSC = &priv->PowerSaveControl;
3069-
3070- if(!((priv->ieee80211->iw_mode == IW_MODE_INFRA) &&
3071- (priv->ieee80211->state == IEEE80211_LINKED)) ||
3072- (priv->ieee80211->iw_mode == IW_MODE_ADHOC) ||
3073- (priv->ieee80211->iw_mode == IW_MODE_MASTER))
3074- return;
3075-
3076- if (pPSC->bLeisurePs)
3077- {
3078- // Idle for a while if we connect to AP a while ago.
3079- if(pPSC->LpsIdleCount >= RT_CHECK_FOR_HANG_PERIOD) // 4 Sec
3080- {
3081-
3082- if(priv->ieee80211->ps == IEEE80211_PS_DISABLED)
3083- {
3084- MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST);
3085-
3086- }
3087- }
3088- else
3089- pPSC->LpsIdleCount++;
3090- }
3091-}
3092-
3093-
3094-/* Leave leisure power save mode. */
3095-void LeisurePSLeave(struct ieee80211_device *ieee80211)
3096-{
3097- struct r8192_priv *priv = ieee80211_priv(ieee80211->dev);
3098- PRT_POWER_SAVE_CONTROL pPSC = &priv->PowerSaveControl;
3099-
3100- if (pPSC->bLeisurePs)
3101- {
3102- if(priv->ieee80211->ps != IEEE80211_PS_DISABLED)
3103- {
3104- // move to lps_wakecomplete()
3105- MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_DISABLED);
3106-
3107- }
3108- }
3109-}
3110-#endif
3111-
3112-
3113-/* Enter the inactive power save mode. RF will be off */
3114-void IPSEnter(struct r8192_priv *priv)
3115-{
3116- PRT_POWER_SAVE_CONTROL pPSC = &priv->PowerSaveControl;
3117- RT_RF_POWER_STATE rtState;
3118-
3119- if (pPSC->bInactivePs)
3120- {
3121- rtState = priv->eRFPowerState;
3122- //
3123- // Added by Bruce, 2007-12-25.
3124- // Do not enter IPS in the following conditions:
3125- // (1) RF is already OFF or Sleep
3126- // (2) bSwRfProcessing (indicates the IPS is still under going)
3127- // (3) Connectted (only disconnected can trigger IPS)
3128- // (4) IBSS (send Beacon)
3129- // (5) AP mode (send Beacon)
3130- //
3131- if (rtState == eRfOn && !pPSC->bSwRfProcessing
3132- && (priv->ieee80211->state != IEEE80211_LINKED) )
3133- {
3134- RT_TRACE(COMP_RF,"IPSEnter(): Turn off RF.\n");
3135- pPSC->eInactivePowerState = eRfOff;
3136-// queue_work(priv->priv_wq,&(pPSC->InactivePsWorkItem));
3137- InactivePsWorkItemCallback(priv);
3138- }
3139- }
3140-}
3141-
3142-//
3143-// Description:
3144-// Leave the inactive power save mode, RF will be on.
3145-// 2007.08.17, by shien chang.
3146-//
3147-void IPSLeave(struct r8192_priv *priv)
3148-{
3149- PRT_POWER_SAVE_CONTROL pPSC = &priv->PowerSaveControl;
3150- RT_RF_POWER_STATE rtState;
3151-
3152- if (pPSC->bInactivePs)
3153- {
3154- rtState = priv->eRFPowerState;
3155- if (rtState != eRfOn && !pPSC->bSwRfProcessing && priv->RfOffReason <= RF_CHANGE_BY_IPS)
3156- {
3157- RT_TRACE(COMP_POWER, "IPSLeave(): Turn on RF.\n");
3158- pPSC->eInactivePowerState = eRfOn;
3159- InactivePsWorkItemCallback(priv);
3160- }
3161- }
3162-}
3163-
3164-void IPSLeave_wq(struct work_struct *work)
3165-{
3166- struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, ips_leave_wq);
3167- struct net_device *dev = ieee->dev;
3168-
3169- struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
3170- down(&priv->ieee80211->ips_sem);
3171- IPSLeave(priv);
3172- up(&priv->ieee80211->ips_sem);
3173-}
3174-
3175-void ieee80211_ips_leave_wq(struct ieee80211_device *ieee80211)
3176-{
3177- struct r8192_priv *priv = ieee80211_priv(ieee80211->dev);
3178- RT_RF_POWER_STATE rtState;
3179- rtState = priv->eRFPowerState;
3180-
3181- if (priv->PowerSaveControl.bInactivePs){
3182- if(rtState == eRfOff){
3183- if(priv->RfOffReason > RF_CHANGE_BY_IPS)
3184- {
3185- RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__);
3186- return;
3187- }
3188- else{
3189- printk("=========>%s(): IPSLeave\n",__FUNCTION__);
3190- queue_work(priv->ieee80211->wq,&priv->ieee80211->ips_leave_wq);
3191- }
3192- }
3193- }
3194-}
3195-//added by amy 090331 end
3196-void ieee80211_ips_leave(struct ieee80211_device *ieee80211)
3197-{
3198- struct r8192_priv *priv = ieee80211_priv(ieee80211->dev);
3199- down(&ieee80211->ips_sem);
3200- IPSLeave(priv);
3201- up(&ieee80211->ips_sem);
3202-}
3203-#endif
3204-
3205-static void rtl819x_update_rxcounts(
3206- struct r8192_priv *priv,
3207- u32* TotalRxBcnNum,
3208- u32* TotalRxDataNum
3209-)
3210-{
3211- u16 SlotIndex;
3212- u8 i;
3213-
3214- *TotalRxBcnNum = 0;
3215- *TotalRxDataNum = 0;
3216-
3217- SlotIndex = (priv->ieee80211->LinkDetectInfo.SlotIndex++)%(priv->ieee80211->LinkDetectInfo.SlotNum);
3218- priv->ieee80211->LinkDetectInfo.RxBcnNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod;
3219- priv->ieee80211->LinkDetectInfo.RxDataNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod;
3220- for( i=0; i<priv->ieee80211->LinkDetectInfo.SlotNum; i++ ){
3221- *TotalRxBcnNum += priv->ieee80211->LinkDetectInfo.RxBcnNum[i];
3222- *TotalRxDataNum += priv->ieee80211->LinkDetectInfo.RxDataNum[i];
3223- }
3224-}
3225-
3226-
3227-static void rtl819x_watchdog_wqcallback(struct work_struct *work)
3228-{
3229- struct delayed_work *dwork = container_of(work,struct delayed_work,work);
3230- struct r8192_priv *priv = container_of(dwork,struct r8192_priv,watch_dog_wq);
3231- struct ieee80211_device* ieee = priv->ieee80211;
3232- RESET_TYPE ResetType = RESET_TYPE_NORESET;
3233- bool bBusyTraffic = false;
3234- bool bEnterPS = false;
3235-
3236- if ((!priv->up) || priv->bHwRadioOff)
3237- return;
3238-
3239- if(!priv->up)
3240- return;
3241- hal_dm_watchdog(priv);
3242-#ifdef ENABLE_IPS
3243- if(ieee->actscanning == false){
3244- if((ieee->iw_mode == IW_MODE_INFRA) && (ieee->state == IEEE80211_NOLINK) &&
3245- (priv->eRFPowerState == eRfOn) && !ieee->is_set_key &&
3246- (!ieee->proto_stoppping) && !ieee->wx_set_enc){
3247- if (priv->PowerSaveControl.ReturnPoint == IPS_CALLBACK_NONE){
3248- IPSEnter(priv);
3249- }
3250- }
3251- }
3252-#endif
3253- {//to get busy traffic condition
3254- if(ieee->state == IEEE80211_LINKED)
3255- {
3256- if( ieee->LinkDetectInfo.NumRxOkInPeriod> 100 ||
3257- ieee->LinkDetectInfo.NumTxOkInPeriod> 100 ) {
3258- bBusyTraffic = true;
3259- }
3260-
3261-#ifdef ENABLE_LPS
3262- //added by amy for Leisure PS
3263- if( ((ieee->LinkDetectInfo.NumRxUnicastOkInPeriod + ieee->LinkDetectInfo.NumTxOkInPeriod) > 8 ) ||
3264- (ieee->LinkDetectInfo.NumRxUnicastOkInPeriod > 2) )
3265- {
3266- bEnterPS= false;
3267- }
3268- else
3269- {
3270- bEnterPS= true;
3271- }
3272-
3273- // LeisurePS only work in infra mode.
3274- if(bEnterPS)
3275- {
3276- LeisurePSEnter(priv->ieee80211);
3277- }
3278- else
3279- {
3280- LeisurePSLeave(priv->ieee80211);
3281- }
3282-#endif
3283-
3284- }
3285- else
3286- {
3287-#ifdef ENABLE_LPS
3288- LeisurePSLeave(priv->ieee80211);
3289-#endif
3290- }
3291-
3292- ieee->LinkDetectInfo.NumRxOkInPeriod = 0;
3293- ieee->LinkDetectInfo.NumTxOkInPeriod = 0;
3294- ieee->LinkDetectInfo.NumRxUnicastOkInPeriod = 0;
3295- ieee->LinkDetectInfo.bBusyTraffic = bBusyTraffic;
3296- }
3297-
3298-
3299- //added by amy for AP roaming
3300- if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_INFRA)
3301- {
3302- u32 TotalRxBcnNum = 0;
3303- u32 TotalRxDataNum = 0;
3304-
3305- rtl819x_update_rxcounts(priv, &TotalRxBcnNum, &TotalRxDataNum);
3306- if((TotalRxBcnNum+TotalRxDataNum) == 0)
3307- {
3308- if (priv->eRFPowerState == eRfOff)
3309- RT_TRACE(COMP_ERR,"========>%s()\n",__FUNCTION__);
3310- printk("===>%s(): AP is power off,connect another one\n",__FUNCTION__);
3311- // Dot11d_Reset(dev);
3312- ieee->state = IEEE80211_ASSOCIATING;
3313- notify_wx_assoc_event(priv->ieee80211);
3314- RemovePeerTS(priv->ieee80211,priv->ieee80211->current_network.bssid);
3315- ieee->is_roaming = true;
3316- ieee->is_set_key = false;
3317- ieee->link_change(ieee);
3318- queue_work(ieee->wq, &ieee->associate_procedure_wq);
3319- }
3320- }
3321- ieee->LinkDetectInfo.NumRecvBcnInPeriod=0;
3322- ieee->LinkDetectInfo.NumRecvDataInPeriod=0;
3323-
3324- //check if reset the driver
3325- if (priv->watchdog_check_reset_cnt++ >= 3 && !ieee->is_roaming &&
3326- priv->watchdog_last_time != 1)
3327- {
3328- ResetType = rtl819x_check_reset(priv);
3329- priv->watchdog_check_reset_cnt = 3;
3330- }
3331- if(!priv->bDisableNormalResetCheck && ResetType == RESET_TYPE_NORMAL)
3332- {
3333- priv->ResetProgress = RESET_TYPE_NORMAL;
3334- RT_TRACE(COMP_RESET,"%s(): NOMAL RESET\n",__FUNCTION__);
3335- return;
3336- }
3337- /* disable silent reset temply 2008.9.11*/
3338-
3339- if( ((priv->force_reset) || (!priv->bDisableNormalResetCheck && ResetType==RESET_TYPE_SILENT))) // This is control by OID set in Pomelo
3340- {
3341- priv->watchdog_last_time = 1;
3342- }
3343- else
3344- priv->watchdog_last_time = 0;
3345-
3346- priv->force_reset = false;
3347- priv->bForcedSilentReset = false;
3348- priv->bResetInProgress = false;
3349- RT_TRACE(COMP_TRACE, " <==RtUsbCheckForHangWorkItemCallback()\n");
3350-
3351-}
3352-
3353-void watch_dog_timer_callback(unsigned long data)
3354-{
3355- struct r8192_priv *priv = (struct r8192_priv *) data;
3356- queue_delayed_work(priv->priv_wq,&priv->watch_dog_wq,0);
3357- mod_timer(&priv->watch_dog_timer, jiffies + MSECS(IEEE80211_WATCH_DOG_TIME));
3358-
3359-}
3360-
3361-static int _rtl8192_up(struct r8192_priv *priv)
3362-{
3363- RT_STATUS init_status = RT_STATUS_SUCCESS;
3364- struct net_device *dev = priv->ieee80211->dev;
3365-
3366- priv->up=1;
3367- priv->ieee80211->ieee_up=1;
3368- priv->bdisable_nic = false; //YJ,add,091111
3369- RT_TRACE(COMP_INIT, "Bringing up iface\n");
3370-
3371- init_status = rtl8192_adapter_start(priv);
3372- if(init_status != RT_STATUS_SUCCESS)
3373- {
3374- RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n",__FUNCTION__);
3375- return -1;
3376- }
3377- RT_TRACE(COMP_INIT, "start adapter finished\n");
3378-
3379- if (priv->eRFPowerState != eRfOn)
3380- MgntActSet_RF_State(priv, eRfOn, priv->RfOffReason);
3381-
3382- if(priv->ieee80211->state != IEEE80211_LINKED)
3383- ieee80211_softmac_start_protocol(priv->ieee80211);
3384- ieee80211_reset_queue(priv->ieee80211);
3385- watch_dog_timer_callback((unsigned long) priv);
3386- if(!netif_queue_stopped(dev))
3387- netif_start_queue(dev);
3388- else
3389- netif_wake_queue(dev);
3390-
3391- return 0;
3392-}
3393-
3394-
3395-static int rtl8192_open(struct net_device *dev)
3396-{
3397- struct r8192_priv *priv = ieee80211_priv(dev);
3398- int ret;
3399-
3400- down(&priv->wx_sem);
3401- ret = rtl8192_up(dev);
3402- up(&priv->wx_sem);
3403- return ret;
3404-
3405-}
3406-
3407-
3408-int rtl8192_up(struct net_device *dev)
3409-{
3410- struct r8192_priv *priv = ieee80211_priv(dev);
3411-
3412- if (priv->up == 1) return -1;
3413-
3414- return _rtl8192_up(priv);
3415-}
3416-
3417-
3418-static int rtl8192_close(struct net_device *dev)
3419-{
3420- struct r8192_priv *priv = ieee80211_priv(dev);
3421- int ret;
3422-
3423- down(&priv->wx_sem);
3424-
3425- ret = rtl8192_down(dev);
3426-
3427- up(&priv->wx_sem);
3428-
3429- return ret;
3430-
3431-}
3432-
3433-int rtl8192_down(struct net_device *dev)
3434-{
3435- struct r8192_priv *priv = ieee80211_priv(dev);
3436-
3437- if (priv->up == 0) return -1;
3438-
3439-#ifdef ENABLE_LPS
3440- //LZM for PS-Poll AID issue. 090429
3441- if(priv->ieee80211->state == IEEE80211_LINKED)
3442- LeisurePSLeave(priv->ieee80211);
3443-#endif
3444-
3445- priv->up=0;
3446- priv->ieee80211->ieee_up = 0;
3447- RT_TRACE(COMP_DOWN, "==========>%s()\n", __FUNCTION__);
3448-/* FIXME */
3449- if (!netif_queue_stopped(dev))
3450- netif_stop_queue(dev);
3451-
3452- rtl8192_irq_disable(priv);
3453- rtl8192_cancel_deferred_work(priv);
3454- deinit_hal_dm(priv);
3455- del_timer_sync(&priv->watch_dog_timer);
3456-
3457- ieee80211_softmac_stop_protocol(priv->ieee80211,true);
3458-
3459- rtl8192_halt_adapter(priv, false);
3460- memset(&priv->ieee80211->current_network, 0 , offsetof(struct ieee80211_network, list));
3461-
3462- RT_TRACE(COMP_DOWN, "<==========%s()\n", __FUNCTION__);
3463-
3464- return 0;
3465-}
3466-
3467-
3468-void rtl8192_commit(struct r8192_priv *priv)
3469-{
3470- if (priv->up == 0) return ;
3471-
3472-
3473- ieee80211_softmac_stop_protocol(priv->ieee80211,true);
3474-
3475- rtl8192_irq_disable(priv);
3476- rtl8192_halt_adapter(priv, true);
3477- _rtl8192_up(priv);
3478-}
3479-
3480-static void rtl8192_restart(struct work_struct *work)
3481-{
3482- struct r8192_priv *priv = container_of(work, struct r8192_priv, reset_wq);
3483-
3484- down(&priv->wx_sem);
3485-
3486- rtl8192_commit(priv);
3487-
3488- up(&priv->wx_sem);
3489-}
3490-
3491-static void r8192_set_multicast(struct net_device *dev)
3492-{
3493- struct r8192_priv *priv = ieee80211_priv(dev);
3494-
3495- priv->promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
3496-}
3497-
3498-
3499-static int r8192_set_mac_adr(struct net_device *dev, void *mac)
3500-{
3501- struct r8192_priv *priv = ieee80211_priv(dev);
3502- struct sockaddr *addr = mac;
3503-
3504- down(&priv->wx_sem);
3505-
3506- memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
3507-
3508- schedule_work(&priv->reset_wq);
3509- up(&priv->wx_sem);
3510-
3511- return 0;
3512-}
3513-
3514-static void r8192e_set_hw_key(struct r8192_priv *priv, struct ieee_param *ipw)
3515-{
3516- struct ieee80211_device *ieee = priv->ieee80211;
3517- u8 broadcast_addr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
3518- u32 key[4];
3519-
3520- if (ipw->u.crypt.set_tx) {
3521- if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
3522- ieee->pairwise_key_type = KEY_TYPE_CCMP;
3523- else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
3524- ieee->pairwise_key_type = KEY_TYPE_TKIP;
3525- else if (strcmp(ipw->u.crypt.alg, "WEP") == 0) {
3526- if (ipw->u.crypt.key_len == 13)
3527- ieee->pairwise_key_type = KEY_TYPE_WEP104;
3528- else if (ipw->u.crypt.key_len == 5)
3529- ieee->pairwise_key_type = KEY_TYPE_WEP40;
3530- } else
3531- ieee->pairwise_key_type = KEY_TYPE_NA;
3532-
3533- if (ieee->pairwise_key_type) {
3534- memcpy(key, ipw->u.crypt.key, 16);
3535- EnableHWSecurityConfig8192(priv);
3536- /*
3537- * We fill both index entry and 4th entry for pairwise
3538- * key as in IPW interface, adhoc will only get here,
3539- * so we need index entry for its default key serching!
3540- */
3541- setKey(priv, 4, ipw->u.crypt.idx,
3542- ieee->pairwise_key_type,
3543- (u8*)ieee->ap_mac_addr, 0, key);
3544-
3545- /* LEAP WEP will never set this. */
3546- if (ieee->auth_mode != 2)
3547- setKey(priv, ipw->u.crypt.idx, ipw->u.crypt.idx,
3548- ieee->pairwise_key_type,
3549- (u8*)ieee->ap_mac_addr, 0, key);
3550- }
3551- if ((ieee->pairwise_key_type == KEY_TYPE_CCMP) &&
3552- ieee->pHTInfo->bCurrentHTSupport) {
3553- write_nic_byte(priv, 0x173, 1); /* fix aes bug */
3554- }
3555- } else {
3556- memcpy(key, ipw->u.crypt.key, 16);
3557- if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
3558- ieee->group_key_type= KEY_TYPE_CCMP;
3559- else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
3560- ieee->group_key_type = KEY_TYPE_TKIP;
3561- else if (strcmp(ipw->u.crypt.alg, "WEP") == 0) {
3562- if (ipw->u.crypt.key_len == 13)
3563- ieee->group_key_type = KEY_TYPE_WEP104;
3564- else if (ipw->u.crypt.key_len == 5)
3565- ieee->group_key_type = KEY_TYPE_WEP40;
3566- } else
3567- ieee->group_key_type = KEY_TYPE_NA;
3568-
3569- if (ieee->group_key_type) {
3570- setKey(priv, ipw->u.crypt.idx, ipw->u.crypt.idx,
3571- ieee->group_key_type, broadcast_addr, 0, key);
3572- }
3573- }
3574-}
3575-
3576-/* based on ipw2200 driver */
3577-static int rtl8192_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3578-{
3579- struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
3580- struct iwreq *wrq = (struct iwreq *)rq;
3581- int ret=-1;
3582- struct iw_point *p = &wrq->u.data;
3583- struct ieee_param *ipw = NULL;//(struct ieee_param *)wrq->u.data.pointer;
3584-
3585- down(&priv->wx_sem);
3586-
3587-
3588- if (p->length < sizeof(struct ieee_param) || !p->pointer){
3589- ret = -EINVAL;
3590- goto out;
3591- }
3592-
3593- ipw = kmalloc(p->length, GFP_KERNEL);
3594- if (ipw == NULL){
3595- ret = -ENOMEM;
3596- goto out;
3597- }
3598- if (copy_from_user(ipw, p->pointer, p->length)) {
3599- kfree(ipw);
3600- ret = -EFAULT;
3601- goto out;
3602- }
3603-
3604- switch (cmd) {
3605- case RTL_IOCTL_WPA_SUPPLICANT:
3606- /* parse here for HW security */
3607- if (ipw->cmd == IEEE_CMD_SET_ENCRYPTION)
3608- r8192e_set_hw_key(priv, ipw);
3609- ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
3610- break;
3611-
3612- default:
3613- ret = -EOPNOTSUPP;
3614- break;
3615- }
3616-
3617- kfree(ipw);
3618-out:
3619- up(&priv->wx_sem);
3620-
3621- return ret;
3622-}
3623-
3624-static u8 HwRateToMRate90(bool bIsHT, u8 rate)
3625-{
3626- u8 ret_rate = 0x02;
3627-
3628- if(!bIsHT) {
3629- switch(rate) {
3630- case DESC90_RATE1M: ret_rate = MGN_1M; break;
3631- case DESC90_RATE2M: ret_rate = MGN_2M; break;
3632- case DESC90_RATE5_5M: ret_rate = MGN_5_5M; break;
3633- case DESC90_RATE11M: ret_rate = MGN_11M; break;
3634- case DESC90_RATE6M: ret_rate = MGN_6M; break;
3635- case DESC90_RATE9M: ret_rate = MGN_9M; break;
3636- case DESC90_RATE12M: ret_rate = MGN_12M; break;
3637- case DESC90_RATE18M: ret_rate = MGN_18M; break;
3638- case DESC90_RATE24M: ret_rate = MGN_24M; break;
3639- case DESC90_RATE36M: ret_rate = MGN_36M; break;
3640- case DESC90_RATE48M: ret_rate = MGN_48M; break;
3641- case DESC90_RATE54M: ret_rate = MGN_54M; break;
3642-
3643- default:
3644- RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
3645- break;
3646- }
3647-
3648- } else {
3649- switch(rate) {
3650- case DESC90_RATEMCS0: ret_rate = MGN_MCS0; break;
3651- case DESC90_RATEMCS1: ret_rate = MGN_MCS1; break;
3652- case DESC90_RATEMCS2: ret_rate = MGN_MCS2; break;
3653- case DESC90_RATEMCS3: ret_rate = MGN_MCS3; break;
3654- case DESC90_RATEMCS4: ret_rate = MGN_MCS4; break;
3655- case DESC90_RATEMCS5: ret_rate = MGN_MCS5; break;
3656- case DESC90_RATEMCS6: ret_rate = MGN_MCS6; break;
3657- case DESC90_RATEMCS7: ret_rate = MGN_MCS7; break;
3658- case DESC90_RATEMCS8: ret_rate = MGN_MCS8; break;
3659- case DESC90_RATEMCS9: ret_rate = MGN_MCS9; break;
3660- case DESC90_RATEMCS10: ret_rate = MGN_MCS10; break;
3661- case DESC90_RATEMCS11: ret_rate = MGN_MCS11; break;
3662- case DESC90_RATEMCS12: ret_rate = MGN_MCS12; break;
3663- case DESC90_RATEMCS13: ret_rate = MGN_MCS13; break;
3664- case DESC90_RATEMCS14: ret_rate = MGN_MCS14; break;
3665- case DESC90_RATEMCS15: ret_rate = MGN_MCS15; break;
3666- case DESC90_RATEMCS32: ret_rate = (0x80|0x20); break;
3667-
3668- default:
3669- RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT);
3670- break;
3671- }
3672- }
3673-
3674- return ret_rate;
3675-}
3676-
3677-/* Record the TSF time stamp when receiving a packet */
3678-static void UpdateRxPktTimeStamp8190(struct r8192_priv *priv, struct ieee80211_rx_stats *stats)
3679-{
3680-
3681- if(stats->bIsAMPDU && !stats->bFirstMPDU) {
3682- stats->mac_time[0] = priv->LastRxDescTSFLow;
3683- stats->mac_time[1] = priv->LastRxDescTSFHigh;
3684- } else {
3685- priv->LastRxDescTSFLow = stats->mac_time[0];
3686- priv->LastRxDescTSFHigh = stats->mac_time[1];
3687- }
3688-}
3689-
3690-static long rtl819x_translate_todbm(u8 signal_strength_index)// 0-100 index.
3691-{
3692- long signal_power; // in dBm.
3693-
3694- // Translate to dBm (x=0.5y-95).
3695- signal_power = (long)((signal_strength_index + 1) >> 1);
3696- signal_power -= 95;
3697-
3698- return signal_power;
3699-}
3700-
3701-/* 2008/01/22 MH We can not delcare RSSI/EVM total value of sliding window to
3702- be a local static. Otherwise, it may increase when we return from S3/S4. The
3703- value will be kept in memory or disk. We must delcare the value in adapter
3704- and it will be reinitialized when return from S3/S4. */
3705-static void rtl8192_process_phyinfo(struct r8192_priv * priv, u8* buffer,struct ieee80211_rx_stats * pprevious_stats, struct ieee80211_rx_stats * pcurrent_stats)
3706-{
3707- bool bcheck = false;
3708- u8 rfpath;
3709- u32 nspatial_stream, tmp_val;
3710- static u32 slide_rssi_index=0, slide_rssi_statistics=0;
3711- static u32 slide_evm_index=0, slide_evm_statistics=0;
3712- static u32 last_rssi=0, last_evm=0;
3713- //cosa add for beacon rssi smoothing
3714- static u32 slide_beacon_adc_pwdb_index=0, slide_beacon_adc_pwdb_statistics=0;
3715- static u32 last_beacon_adc_pwdb=0;
3716-
3717- struct ieee80211_hdr_3addr *hdr;
3718- u16 sc ;
3719- unsigned int frag,seq;
3720- hdr = (struct ieee80211_hdr_3addr *)buffer;
3721- sc = le16_to_cpu(hdr->seq_ctl);
3722- frag = WLAN_GET_SEQ_FRAG(sc);
3723- seq = WLAN_GET_SEQ_SEQ(sc);
3724-
3725- //
3726- // Check whether we should take the previous packet into accounting
3727- //
3728- if(!pprevious_stats->bIsAMPDU)
3729- {
3730- // if previous packet is not aggregated packet
3731- bcheck = true;
3732- }
3733-
3734- if(slide_rssi_statistics++ >= PHY_RSSI_SLID_WIN_MAX)
3735- {
3736- slide_rssi_statistics = PHY_RSSI_SLID_WIN_MAX;
3737- last_rssi = priv->stats.slide_signal_strength[slide_rssi_index];
3738- priv->stats.slide_rssi_total -= last_rssi;
3739- }
3740- priv->stats.slide_rssi_total += pprevious_stats->SignalStrength;
3741-
3742- priv->stats.slide_signal_strength[slide_rssi_index++] = pprevious_stats->SignalStrength;
3743- if(slide_rssi_index >= PHY_RSSI_SLID_WIN_MAX)
3744- slide_rssi_index = 0;
3745-
3746- // <1> Showed on UI for user, in dbm
3747- tmp_val = priv->stats.slide_rssi_total/slide_rssi_statistics;
3748- priv->stats.signal_strength = rtl819x_translate_todbm((u8)tmp_val);
3749- pcurrent_stats->rssi = priv->stats.signal_strength;
3750- //
3751- // If the previous packet does not match the criteria, neglect it
3752- //
3753- if(!pprevious_stats->bPacketMatchBSSID)
3754- {
3755- if(!pprevious_stats->bToSelfBA)
3756- return;
3757- }
3758-
3759- if(!bcheck)
3760- return;
3761-
3762- // <2> Showed on UI for engineering
3763- // hardware does not provide rssi information for each rf path in CCK
3764- if(!pprevious_stats->bIsCCK && pprevious_stats->bPacketToSelf)
3765- {
3766- for (rfpath = RF90_PATH_A; rfpath < RF90_PATH_C; rfpath++)
3767- {
3768- if (!rtl8192_phy_CheckIsLegalRFPath(priv, rfpath))
3769- continue;
3770- RT_TRACE(COMP_DBG, "pPreviousstats->RxMIMOSignalStrength[rfpath] = %d\n", pprevious_stats->RxMIMOSignalStrength[rfpath]);
3771- //Fixed by Jacken 2008-03-20
3772- if(priv->stats.rx_rssi_percentage[rfpath] == 0)
3773- {
3774- priv->stats.rx_rssi_percentage[rfpath] = pprevious_stats->RxMIMOSignalStrength[rfpath];
3775- }
3776- if(pprevious_stats->RxMIMOSignalStrength[rfpath] > priv->stats.rx_rssi_percentage[rfpath])
3777- {
3778- priv->stats.rx_rssi_percentage[rfpath] =
3779- ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
3780- (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
3781- priv->stats.rx_rssi_percentage[rfpath] = priv->stats.rx_rssi_percentage[rfpath] + 1;
3782- }
3783- else
3784- {
3785- priv->stats.rx_rssi_percentage[rfpath] =
3786- ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
3787- (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
3788- }
3789- RT_TRACE(COMP_DBG, "priv->RxStats.RxRSSIPercentage[rfPath] = %d \n" , priv->stats.rx_rssi_percentage[rfpath]);
3790- }
3791- }
3792-
3793-
3794- //
3795- // Check PWDB.
3796- //
3797- //cosa add for beacon rssi smoothing by average.
3798- if(pprevious_stats->bPacketBeacon)
3799- {
3800- /* record the beacon pwdb to the sliding window. */
3801- if(slide_beacon_adc_pwdb_statistics++ >= PHY_Beacon_RSSI_SLID_WIN_MAX)
3802- {
3803- slide_beacon_adc_pwdb_statistics = PHY_Beacon_RSSI_SLID_WIN_MAX;
3804- last_beacon_adc_pwdb = priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index];
3805- priv->stats.Slide_Beacon_Total -= last_beacon_adc_pwdb;
3806- // slide_beacon_adc_pwdb_index, last_beacon_adc_pwdb, Adapter->RxStats.Slide_Beacon_Total);
3807- }
3808- priv->stats.Slide_Beacon_Total += pprevious_stats->RxPWDBAll;
3809- priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index] = pprevious_stats->RxPWDBAll;
3810- slide_beacon_adc_pwdb_index++;
3811- if(slide_beacon_adc_pwdb_index >= PHY_Beacon_RSSI_SLID_WIN_MAX)
3812- slide_beacon_adc_pwdb_index = 0;
3813- pprevious_stats->RxPWDBAll = priv->stats.Slide_Beacon_Total/slide_beacon_adc_pwdb_statistics;
3814- if(pprevious_stats->RxPWDBAll >= 3)
3815- pprevious_stats->RxPWDBAll -= 3;
3816- }
3817-
3818- RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
3819- pprevious_stats->bIsCCK? "CCK": "OFDM",
3820- pprevious_stats->RxPWDBAll);
3821-
3822- if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
3823- {
3824- if(priv->undecorated_smoothed_pwdb < 0) // initialize
3825- {
3826- priv->undecorated_smoothed_pwdb = pprevious_stats->RxPWDBAll;
3827- }
3828-
3829- if(pprevious_stats->RxPWDBAll > (u32)priv->undecorated_smoothed_pwdb)
3830- {
3831- priv->undecorated_smoothed_pwdb =
3832- ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
3833- (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
3834- priv->undecorated_smoothed_pwdb = priv->undecorated_smoothed_pwdb + 1;
3835- }
3836- else
3837- {
3838- priv->undecorated_smoothed_pwdb =
3839- ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
3840- (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
3841- }
3842- }
3843-
3844- //
3845- // Check EVM
3846- //
3847- /* record the general EVM to the sliding window. */
3848- if(pprevious_stats->SignalQuality == 0)
3849- {
3850- }
3851- else
3852- {
3853- if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA){
3854- if(slide_evm_statistics++ >= PHY_RSSI_SLID_WIN_MAX){
3855- slide_evm_statistics = PHY_RSSI_SLID_WIN_MAX;
3856- last_evm = priv->stats.slide_evm[slide_evm_index];
3857- priv->stats.slide_evm_total -= last_evm;
3858- }
3859-
3860- priv->stats.slide_evm_total += pprevious_stats->SignalQuality;
3861-
3862- priv->stats.slide_evm[slide_evm_index++] = pprevious_stats->SignalQuality;
3863- if(slide_evm_index >= PHY_RSSI_SLID_WIN_MAX)
3864- slide_evm_index = 0;
3865-
3866- // <1> Showed on UI for user, in percentage.
3867- tmp_val = priv->stats.slide_evm_total/slide_evm_statistics;
3868- //cosa add 10/11/2007, Showed on UI for user in Windows Vista, for Link quality.
3869- }
3870-
3871- // <2> Showed on UI for engineering
3872- if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
3873- {
3874- for(nspatial_stream = 0; nspatial_stream<2 ; nspatial_stream++) // 2 spatial stream
3875- {
3876- if(pprevious_stats->RxMIMOSignalQuality[nspatial_stream] != -1)
3877- {
3878- if(priv->stats.rx_evm_percentage[nspatial_stream] == 0) // initialize
3879- {
3880- priv->stats.rx_evm_percentage[nspatial_stream] = pprevious_stats->RxMIMOSignalQuality[nspatial_stream];
3881- }
3882- priv->stats.rx_evm_percentage[nspatial_stream] =
3883- ( (priv->stats.rx_evm_percentage[nspatial_stream]* (Rx_Smooth_Factor-1)) +
3884- (pprevious_stats->RxMIMOSignalQuality[nspatial_stream]* 1)) / (Rx_Smooth_Factor);
3885- }
3886- }
3887- }
3888- }
3889-
3890-}
3891-
3892-static u8 rtl819x_query_rxpwrpercentage(
3893- char antpower
3894- )
3895-{
3896- if ((antpower <= -100) || (antpower >= 20))
3897- {
3898- return 0;
3899- }
3900- else if (antpower >= 0)
3901- {
3902- return 100;
3903- }
3904- else
3905- {
3906- return (100+antpower);
3907- }
3908-
3909-}
3910-
3911-static u8
3912-rtl819x_evm_dbtopercentage(
3913- char value
3914- )
3915-{
3916- char ret_val;
3917-
3918- ret_val = value;
3919-
3920- if(ret_val >= 0)
3921- ret_val = 0;
3922- if(ret_val <= -33)
3923- ret_val = -33;
3924- ret_val = 0 - ret_val;
3925- ret_val*=3;
3926- if(ret_val == 99)
3927- ret_val = 100;
3928- return ret_val;
3929-}
3930-
3931-/* We want good-looking for signal strength/quality */
3932-static long rtl819x_signal_scale_mapping(long currsig)
3933-{
3934- long retsig;
3935-
3936- // Step 1. Scale mapping.
3937- if(currsig >= 61 && currsig <= 100)
3938- {
3939- retsig = 90 + ((currsig - 60) / 4);
3940- }
3941- else if(currsig >= 41 && currsig <= 60)
3942- {
3943- retsig = 78 + ((currsig - 40) / 2);
3944- }
3945- else if(currsig >= 31 && currsig <= 40)
3946- {
3947- retsig = 66 + (currsig - 30);
3948- }
3949- else if(currsig >= 21 && currsig <= 30)
3950- {
3951- retsig = 54 + (currsig - 20);
3952- }
3953- else if(currsig >= 5 && currsig <= 20)
3954- {
3955- retsig = 42 + (((currsig - 5) * 2) / 3);
3956- }
3957- else if(currsig == 4)
3958- {
3959- retsig = 36;
3960- }
3961- else if(currsig == 3)
3962- {
3963- retsig = 27;
3964- }
3965- else if(currsig == 2)
3966- {
3967- retsig = 18;
3968- }
3969- else if(currsig == 1)
3970- {
3971- retsig = 9;
3972- }
3973- else
3974- {
3975- retsig = currsig;
3976- }
3977-
3978- return retsig;
3979-}
3980-
3981-static void rtl8192_query_rxphystatus(
3982- struct r8192_priv * priv,
3983- struct ieee80211_rx_stats * pstats,
3984- prx_desc_819x_pci pdesc,
3985- prx_fwinfo_819x_pci pdrvinfo,
3986- struct ieee80211_rx_stats * precord_stats,
3987- bool bpacket_match_bssid,
3988- bool bpacket_toself,
3989- bool bPacketBeacon,
3990- bool bToSelfBA
3991- )
3992-{
3993- //PRT_RFD_STATUS pRtRfdStatus = &(pRfd->Status);
3994- phy_sts_ofdm_819xpci_t* pofdm_buf;
3995- phy_sts_cck_819xpci_t * pcck_buf;
3996- phy_ofdm_rx_status_rxsc_sgien_exintfflag* prxsc;
3997- u8 *prxpkt;
3998- u8 i,max_spatial_stream, tmp_rxsnr, tmp_rxevm, rxsc_sgien_exflg;
3999- char rx_pwr[4], rx_pwr_all=0;
4000- //long rx_avg_pwr = 0;
4001- char rx_snrX, rx_evmX;
4002- u8 evm, pwdb_all;
4003- u32 RSSI, total_rssi=0;//, total_evm=0;
4004-// long signal_strength_index = 0;
4005- u8 is_cck_rate=0;
4006- u8 rf_rx_num = 0;
4007-
4008- is_cck_rate = rx_hal_is_cck_rate(pdrvinfo);
4009-
4010- // Record it for next packet processing
4011- memset(precord_stats, 0, sizeof(struct ieee80211_rx_stats));
4012- pstats->bPacketMatchBSSID = precord_stats->bPacketMatchBSSID = bpacket_match_bssid;
4013- pstats->bPacketToSelf = precord_stats->bPacketToSelf = bpacket_toself;
4014- pstats->bIsCCK = precord_stats->bIsCCK = is_cck_rate;//RX_HAL_IS_CCK_RATE(pDrvInfo);
4015- pstats->bPacketBeacon = precord_stats->bPacketBeacon = bPacketBeacon;
4016- pstats->bToSelfBA = precord_stats->bToSelfBA = bToSelfBA;
4017- /*2007.08.30 requested by SD3 Jerry */
4018- if (priv->phy_check_reg824 == 0)
4019- {
4020- priv->phy_reg824_bit9 = rtl8192_QueryBBReg(priv, rFPGA0_XA_HSSIParameter2, 0x200);
4021- priv->phy_check_reg824 = 1;
4022- }
4023-
4024-
4025- prxpkt = (u8*)pdrvinfo;
4026-
4027- /* Move pointer to the 16th bytes. Phy status start address. */
4028- prxpkt += sizeof(rx_fwinfo_819x_pci);
4029-
4030- /* Initial the cck and ofdm buffer pointer */
4031- pcck_buf = (phy_sts_cck_819xpci_t *)prxpkt;
4032- pofdm_buf = (phy_sts_ofdm_819xpci_t *)prxpkt;
4033-
4034- pstats->RxMIMOSignalQuality[0] = -1;
4035- pstats->RxMIMOSignalQuality[1] = -1;
4036- precord_stats->RxMIMOSignalQuality[0] = -1;
4037- precord_stats->RxMIMOSignalQuality[1] = -1;
4038-
4039- if(is_cck_rate)
4040- {
4041- //
4042- // (1)Hardware does not provide RSSI for CCK
4043- //
4044-
4045- //
4046- // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
4047- //
4048- u8 report;//, cck_agc_rpt;
4049-
4050- if (!priv->phy_reg824_bit9)
4051- {
4052- report = pcck_buf->cck_agc_rpt & 0xc0;
4053- report = report>>6;
4054- switch(report)
4055- {
4056- //Fixed by Jacken from Bryant 2008-03-20
4057- //Original value is -38 , -26 , -14 , -2
4058- //Fixed value is -35 , -23 , -11 , 6
4059- case 0x3:
4060- rx_pwr_all = -35 - (pcck_buf->cck_agc_rpt & 0x3e);
4061- break;
4062- case 0x2:
4063- rx_pwr_all = -23 - (pcck_buf->cck_agc_rpt & 0x3e);
4064- break;
4065- case 0x1:
4066- rx_pwr_all = -11 - (pcck_buf->cck_agc_rpt & 0x3e);
4067- break;
4068- case 0x0:
4069- rx_pwr_all = 8 - (pcck_buf->cck_agc_rpt & 0x3e);
4070- break;
4071- }
4072- }
4073- else
4074- {
4075- report = pcck_buf->cck_agc_rpt & 0x60;
4076- report = report>>5;
4077- switch(report)
4078- {
4079- case 0x3:
4080- rx_pwr_all = -35 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
4081- break;
4082- case 0x2:
4083- rx_pwr_all = -23 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1);
4084- break;
4085- case 0x1:
4086- rx_pwr_all = -11 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
4087- break;
4088- case 0x0:
4089- rx_pwr_all = -8 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
4090- break;
4091- }
4092- }
4093-
4094- pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
4095- pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
4096- pstats->RecvSignalPower = rx_pwr_all;
4097-
4098- //
4099- // (3) Get Signal Quality (EVM)
4100- //
4101- if(bpacket_match_bssid)
4102- {
4103- u8 sq;
4104-
4105- if(pstats->RxPWDBAll > 40)
4106- {
4107- sq = 100;
4108- }else
4109- {
4110- sq = pcck_buf->sq_rpt;
4111-
4112- if(pcck_buf->sq_rpt > 64)
4113- sq = 0;
4114- else if (pcck_buf->sq_rpt < 20)
4115- sq = 100;
4116- else
4117- sq = ((64-sq) * 100) / 44;
4118- }
4119- pstats->SignalQuality = precord_stats->SignalQuality = sq;
4120- pstats->RxMIMOSignalQuality[0] = precord_stats->RxMIMOSignalQuality[0] = sq;
4121- pstats->RxMIMOSignalQuality[1] = precord_stats->RxMIMOSignalQuality[1] = -1;
4122- }
4123- }
4124- else
4125- {
4126- //
4127- // (1)Get RSSI for HT rate
4128- //
4129- for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
4130- {
4131- // 2008/01/30 MH we will judge RF RX path now.
4132- if (priv->brfpath_rxenable[i])
4133- rf_rx_num++;
4134- //else
4135- //continue;
4136-
4137- //Fixed by Jacken from Bryant 2008-03-20
4138- //Original value is 106
4139- rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 110;
4140-
4141- //Get Rx snr value in DB
4142- tmp_rxsnr = pofdm_buf->rxsnr_X[i];
4143- rx_snrX = (char)(tmp_rxsnr);
4144- rx_snrX /= 2;
4145-
4146- /* Translate DBM to percentage. */
4147- RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]);
4148- if (priv->brfpath_rxenable[i])
4149- total_rssi += RSSI;
4150-
4151- /* Record Signal Strength for next packet */
4152- if(bpacket_match_bssid)
4153- {
4154- pstats->RxMIMOSignalStrength[i] =(u8) RSSI;
4155- precord_stats->RxMIMOSignalStrength[i] =(u8) RSSI;
4156- }
4157- }
4158-
4159-
4160- //
4161- // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
4162- //
4163- //Fixed by Jacken from Bryant 2008-03-20
4164- //Original value is 106
4165- rx_pwr_all = (((pofdm_buf->pwdb_all ) >> 1 )& 0x7f) -106;
4166- pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
4167-
4168- pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
4169- pstats->RxPower = precord_stats->RxPower = rx_pwr_all;
4170- pstats->RecvSignalPower = rx_pwr_all;
4171- //
4172- // (3)EVM of HT rate
4173- //
4174- if(pdrvinfo->RxHT && pdrvinfo->RxRate>=DESC90_RATEMCS8 &&
4175- pdrvinfo->RxRate<=DESC90_RATEMCS15)
4176- max_spatial_stream = 2; //both spatial stream make sense
4177- else
4178- max_spatial_stream = 1; //only spatial stream 1 makes sense
4179-
4180- for(i=0; i<max_spatial_stream; i++)
4181- {
4182- tmp_rxevm = pofdm_buf->rxevm_X[i];
4183- rx_evmX = (char)(tmp_rxevm);
4184-
4185- // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment
4186- // fill most significant bit to "zero" when doing shifting operation which may change a negative
4187- // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore.
4188- rx_evmX /= 2; //dbm
4189-
4190- evm = rtl819x_evm_dbtopercentage(rx_evmX);
4191- if(bpacket_match_bssid)
4192- {
4193- if(i==0) // Fill value in RFD, Get the first spatial stream only
4194- pstats->SignalQuality = precord_stats->SignalQuality = (u8)(evm & 0xff);
4195- pstats->RxMIMOSignalQuality[i] = precord_stats->RxMIMOSignalQuality[i] = (u8)(evm & 0xff);
4196- }
4197- }
4198-
4199-
4200- /* record rx statistics for debug */
4201- rxsc_sgien_exflg = pofdm_buf->rxsc_sgien_exflg;
4202- prxsc = (phy_ofdm_rx_status_rxsc_sgien_exintfflag *)&rxsc_sgien_exflg;
4203- }
4204-
4205- //UI BSS List signal strength(in percentage), make it good looking, from 0~100.
4206- //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
4207- if(is_cck_rate)
4208- {
4209- pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)pwdb_all));//PWDB_ALL;
4210-
4211- }
4212- else
4213- {
4214- //pRfd->Status.SignalStrength = pRecordRfd->Status.SignalStrength = (u1Byte)(SignalScaleMapping(total_rssi/=RF90_PATH_MAX));//(u1Byte)(total_rssi/=RF90_PATH_MAX);
4215- // We can judge RX path number now.
4216- if (rf_rx_num != 0)
4217- pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)(total_rssi/=rf_rx_num)));
4218- }
4219-}
4220-
4221-static void
4222-rtl8192_record_rxdesc_forlateruse(
4223- struct ieee80211_rx_stats * psrc_stats,
4224- struct ieee80211_rx_stats * ptarget_stats
4225-)
4226-{
4227- ptarget_stats->bIsAMPDU = psrc_stats->bIsAMPDU;
4228- ptarget_stats->bFirstMPDU = psrc_stats->bFirstMPDU;
4229-}
4230-
4231-
4232-
4233-static void TranslateRxSignalStuff819xpci(struct r8192_priv *priv,
4234- struct sk_buff *skb,
4235- struct ieee80211_rx_stats * pstats,
4236- prx_desc_819x_pci pdesc,
4237- prx_fwinfo_819x_pci pdrvinfo)
4238-{
4239- // TODO: We must only check packet for current MAC address. Not finish
4240- bool bpacket_match_bssid, bpacket_toself;
4241- bool bPacketBeacon=false, bToSelfBA=false;
4242- struct ieee80211_hdr_3addr *hdr;
4243- u16 fc,type;
4244-
4245- // Get Signal Quality for only RX data queue (but not command queue)
4246-
4247- u8* tmp_buf;
4248- u8 *praddr;
4249-
4250- /* Get MAC frame start address. */
4251- tmp_buf = skb->data;
4252-
4253- hdr = (struct ieee80211_hdr_3addr *)tmp_buf;
4254- fc = le16_to_cpu(hdr->frame_ctl);
4255- type = WLAN_FC_GET_TYPE(fc);
4256- praddr = hdr->addr1;
4257-
4258- /* Check if the received packet is acceptabe. */
4259- bpacket_match_bssid = ((IEEE80211_FTYPE_CTL != type) &&
4260- (!compare_ether_addr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
4261- && (!pstats->bHwError) && (!pstats->bCRC)&& (!pstats->bICV));
4262- bpacket_toself = bpacket_match_bssid & (!compare_ether_addr(praddr, priv->ieee80211->dev->dev_addr));
4263-
4264- if(WLAN_FC_GET_FRAMETYPE(fc)== IEEE80211_STYPE_BEACON)
4265- {
4266- bPacketBeacon = true;
4267- }
4268- if(WLAN_FC_GET_FRAMETYPE(fc) == IEEE80211_STYPE_BLOCKACK)
4269- {
4270- if (!compare_ether_addr(praddr, priv->ieee80211->dev->dev_addr))
4271- bToSelfBA = true;
4272- }
4273-
4274- //
4275- // Process PHY information for previous packet (RSSI/PWDB/EVM)
4276- //
4277- // Because phy information is contained in the last packet of AMPDU only, so driver
4278- // should process phy information of previous packet
4279- rtl8192_process_phyinfo(priv, tmp_buf, &priv->previous_stats, pstats);
4280- rtl8192_query_rxphystatus(priv, pstats, pdesc, pdrvinfo, &priv->previous_stats, bpacket_match_bssid,
4281- bpacket_toself ,bPacketBeacon, bToSelfBA);
4282- rtl8192_record_rxdesc_forlateruse(pstats, &priv->previous_stats);
4283-
4284-}
4285-
4286-
4287-static void rtl8192_tx_resume(struct r8192_priv *priv)
4288-{
4289- struct ieee80211_device *ieee = priv->ieee80211;
4290- struct sk_buff *skb;
4291- int i;
4292-
4293- for (i = BK_QUEUE; i < TXCMD_QUEUE; i++) {
4294- while ((!skb_queue_empty(&ieee->skb_waitQ[i])) &&
4295- (priv->ieee80211->check_nic_enough_desc(ieee, i) > 0)) {
4296- /* 1. dequeue the packet from the wait queue */
4297- skb = skb_dequeue(&ieee->skb_waitQ[i]);
4298- /* 2. tx the packet directly */
4299- ieee->softmac_data_hard_start_xmit(skb, ieee, 0);
4300- }
4301- }
4302-}
4303-
4304-static void rtl8192_irq_tx_tasklet(unsigned long arg)
4305-{
4306- struct r8192_priv *priv = (struct r8192_priv*) arg;
4307- struct rtl8192_tx_ring *mgnt_ring = &priv->tx_ring[MGNT_QUEUE];
4308- unsigned long flags;
4309-
4310- /* check if we need to report that the management queue is drained */
4311- spin_lock_irqsave(&priv->irq_th_lock, flags);
4312-
4313- if (!skb_queue_len(&mgnt_ring->queue) &&
4314- priv->ieee80211->ack_tx_to_ieee &&
4315- rtl8192_is_tx_queue_empty(priv->ieee80211)) {
4316- priv->ieee80211->ack_tx_to_ieee = 0;
4317- ieee80211_ps_tx_ack(priv->ieee80211, 1);
4318- }
4319-
4320- spin_unlock_irqrestore(&priv->irq_th_lock, flags);
4321-
4322- rtl8192_tx_resume(priv);
4323-}
4324-
4325-/* Record the received data rate */
4326-static void UpdateReceivedRateHistogramStatistics8190(
4327- struct r8192_priv *priv,
4328- struct ieee80211_rx_stats* pstats
4329- )
4330-{
4331- u32 rcvType=1; //0: Total, 1:OK, 2:CRC, 3:ICV
4332- u32 rateIndex;
4333- u32 preamble_guardinterval; //1: short preamble/GI, 0: long preamble/GI
4334-
4335- if(pstats->bCRC)
4336- rcvType = 2;
4337- else if(pstats->bICV)
4338- rcvType = 3;
4339-
4340- if(pstats->bShortPreamble)
4341- preamble_guardinterval = 1;// short
4342- else
4343- preamble_guardinterval = 0;// long
4344-
4345- switch(pstats->rate)
4346- {
4347- //
4348- // CCK rate
4349- //
4350- case MGN_1M: rateIndex = 0; break;
4351- case MGN_2M: rateIndex = 1; break;
4352- case MGN_5_5M: rateIndex = 2; break;
4353- case MGN_11M: rateIndex = 3; break;
4354- //
4355- // Legacy OFDM rate
4356- //
4357- case MGN_6M: rateIndex = 4; break;
4358- case MGN_9M: rateIndex = 5; break;
4359- case MGN_12M: rateIndex = 6; break;
4360- case MGN_18M: rateIndex = 7; break;
4361- case MGN_24M: rateIndex = 8; break;
4362- case MGN_36M: rateIndex = 9; break;
4363- case MGN_48M: rateIndex = 10; break;
4364- case MGN_54M: rateIndex = 11; break;
4365- //
4366- // 11n High throughput rate
4367- //
4368- case MGN_MCS0: rateIndex = 12; break;
4369- case MGN_MCS1: rateIndex = 13; break;
4370- case MGN_MCS2: rateIndex = 14; break;
4371- case MGN_MCS3: rateIndex = 15; break;
4372- case MGN_MCS4: rateIndex = 16; break;
4373- case MGN_MCS5: rateIndex = 17; break;
4374- case MGN_MCS6: rateIndex = 18; break;
4375- case MGN_MCS7: rateIndex = 19; break;
4376- case MGN_MCS8: rateIndex = 20; break;
4377- case MGN_MCS9: rateIndex = 21; break;
4378- case MGN_MCS10: rateIndex = 22; break;
4379- case MGN_MCS11: rateIndex = 23; break;
4380- case MGN_MCS12: rateIndex = 24; break;
4381- case MGN_MCS13: rateIndex = 25; break;
4382- case MGN_MCS14: rateIndex = 26; break;
4383- case MGN_MCS15: rateIndex = 27; break;
4384- default: rateIndex = 28; break;
4385- }
4386- priv->stats.received_rate_histogram[0][rateIndex]++; //total
4387- priv->stats.received_rate_histogram[rcvType][rateIndex]++;
4388-}
4389-
4390-static void rtl8192_rx(struct r8192_priv *priv)
4391-{
4392- struct ieee80211_hdr_1addr *ieee80211_hdr = NULL;
4393- bool unicast_packet = false;
4394- struct ieee80211_rx_stats stats = {
4395- .signal = 0,
4396- .noise = -98,
4397- .rate = 0,
4398- .freq = IEEE80211_24GHZ_BAND,
4399- };
4400- unsigned int count = priv->rxringcount;
4401- prx_fwinfo_819x_pci pDrvInfo = NULL;
4402- struct sk_buff *new_skb;
4403-
4404- while (count--) {
4405- rx_desc_819x_pci *pdesc = &priv->rx_ring[priv->rx_idx];//rx descriptor
4406- struct sk_buff *skb = priv->rx_buf[priv->rx_idx];//rx pkt
4407-
4408- if (pdesc->OWN)
4409- /* wait data to be filled by hardware */
4410- return;
4411-
4412- stats.bICV = pdesc->ICV;
4413- stats.bCRC = pdesc->CRC32;
4414- stats.bHwError = pdesc->CRC32 | pdesc->ICV;
4415-
4416- stats.Length = pdesc->Length;
4417- if(stats.Length < 24)
4418- stats.bHwError |= 1;
4419-
4420- if(stats.bHwError) {
4421- stats.bShift = false;
4422- goto done;
4423- }
4424- pDrvInfo = NULL;
4425- new_skb = dev_alloc_skb(priv->rxbuffersize);
4426-
4427- if (unlikely(!new_skb))
4428- goto done;
4429-
4430- stats.RxDrvInfoSize = pdesc->RxDrvInfoSize;
4431- stats.RxBufShift = ((pdesc->Shift)&0x03);
4432- stats.Decrypted = !pdesc->SWDec;
4433-
4434- pci_dma_sync_single_for_cpu(priv->pdev,
4435- *((dma_addr_t *)skb->cb),
4436- priv->rxbuffersize,
4437- PCI_DMA_FROMDEVICE);
4438- skb_put(skb, pdesc->Length);
4439- pDrvInfo = (rx_fwinfo_819x_pci *)(skb->data + stats.RxBufShift);
4440- skb_reserve(skb, stats.RxDrvInfoSize + stats.RxBufShift);
4441-
4442- stats.rate = HwRateToMRate90((bool)pDrvInfo->RxHT, (u8)pDrvInfo->RxRate);
4443- stats.bShortPreamble = pDrvInfo->SPLCP;
4444-
4445- /* it is debug only. It should be disabled in released driver.
4446- * 2007.1.11 by Emily
4447- * */
4448- UpdateReceivedRateHistogramStatistics8190(priv, &stats);
4449-
4450- stats.bIsAMPDU = (pDrvInfo->PartAggr==1);
4451- stats.bFirstMPDU = (pDrvInfo->PartAggr==1) && (pDrvInfo->FirstAGGR==1);
4452-
4453- stats.TimeStampLow = pDrvInfo->TSFL;
4454- stats.TimeStampHigh = read_nic_dword(priv, TSFR+4);
4455-
4456- UpdateRxPktTimeStamp8190(priv, &stats);
4457-
4458- //
4459- // Get Total offset of MPDU Frame Body
4460- //
4461- if((stats.RxBufShift + stats.RxDrvInfoSize) > 0)
4462- stats.bShift = 1;
4463-
4464- /* ???? */
4465- TranslateRxSignalStuff819xpci(priv, skb, &stats, pdesc, pDrvInfo);
4466-
4467- /* Rx A-MPDU */
4468- if(pDrvInfo->FirstAGGR==1 || pDrvInfo->PartAggr == 1)
4469- RT_TRACE(COMP_RXDESC, "pDrvInfo->FirstAGGR = %d, pDrvInfo->PartAggr = %d\n",
4470- pDrvInfo->FirstAGGR, pDrvInfo->PartAggr);
4471- skb_trim(skb, skb->len - 4/*sCrcLng*/);
4472- /* rx packets statistics */
4473- ieee80211_hdr = (struct ieee80211_hdr_1addr *)skb->data;
4474- unicast_packet = false;
4475-
4476- if(is_broadcast_ether_addr(ieee80211_hdr->addr1)) {
4477- //TODO
4478- }else if(is_multicast_ether_addr(ieee80211_hdr->addr1)){
4479- //TODO
4480- }else {
4481- /* unicast packet */
4482- unicast_packet = true;
4483- }
4484-
4485- if(!ieee80211_rtl_rx(priv->ieee80211, skb, &stats)){
4486- dev_kfree_skb_any(skb);
4487- } else {
4488- priv->stats.rxok++;
4489- if(unicast_packet) {
4490- priv->stats.rxbytesunicast += skb->len;
4491- }
4492- }
4493-
4494- pci_unmap_single(priv->pdev, *((dma_addr_t *) skb->cb),
4495- priv->rxbuffersize, PCI_DMA_FROMDEVICE);
4496-
4497- skb = new_skb;
4498- priv->rx_buf[priv->rx_idx] = skb;
4499- *((dma_addr_t *) skb->cb) = pci_map_single(priv->pdev, skb_tail_pointer(skb), priv->rxbuffersize, PCI_DMA_FROMDEVICE);
4500-
4501-done:
4502- pdesc->BufferAddress = cpu_to_le32(*((dma_addr_t *)skb->cb));
4503- pdesc->OWN = 1;
4504- pdesc->Length = priv->rxbuffersize;
4505- if (priv->rx_idx == priv->rxringcount-1)
4506- pdesc->EOR = 1;
4507- priv->rx_idx = (priv->rx_idx + 1) % priv->rxringcount;
4508- }
4509-
4510-}
4511-
4512-static void rtl8192_irq_rx_tasklet(unsigned long arg)
4513-{
4514- struct r8192_priv *priv = (struct r8192_priv*) arg;
4515- rtl8192_rx(priv);
4516- /* unmask RDU */
4517- write_nic_dword(priv, INTA_MASK, read_nic_dword(priv, INTA_MASK) | IMR_RDU);
4518-}
4519-
4520-static const struct net_device_ops rtl8192_netdev_ops = {
4521- .ndo_open = rtl8192_open,
4522- .ndo_stop = rtl8192_close,
4523- .ndo_tx_timeout = tx_timeout,
4524- .ndo_do_ioctl = rtl8192_ioctl,
4525- .ndo_set_multicast_list = r8192_set_multicast,
4526- .ndo_set_mac_address = r8192_set_mac_adr,
4527- .ndo_start_xmit = ieee80211_rtl_xmit,
4528-};
4529-
4530-static int __devinit rtl8192_pci_probe(struct pci_dev *pdev,
4531- const struct pci_device_id *id)
4532-{
4533- struct net_device *dev = NULL;
4534- struct r8192_priv *priv= NULL;
4535- u8 unit = 0;
4536- int ret = -ENODEV;
4537- unsigned long pmem_start, pmem_len, pmem_flags;
4538-
4539- RT_TRACE(COMP_INIT,"Configuring chip resources\n");
4540-
4541- if( pci_enable_device (pdev) ){
4542- RT_TRACE(COMP_ERR,"Failed to enable PCI device");
4543- return -EIO;
4544- }
4545-
4546- pci_set_master(pdev);
4547- //pci_set_wmi(pdev);
4548- pci_set_dma_mask(pdev, 0xffffff00ULL);
4549- pci_set_consistent_dma_mask(pdev,0xffffff00ULL);
4550- dev = alloc_ieee80211(sizeof(struct r8192_priv));
4551- if (!dev) {
4552- ret = -ENOMEM;
4553- goto fail_free;
4554- }
4555-
4556- pci_set_drvdata(pdev, dev);
4557- SET_NETDEV_DEV(dev, &pdev->dev);
4558- priv = ieee80211_priv(dev);
4559- priv->ieee80211 = netdev_priv(dev);
4560- priv->pdev=pdev;
4561- if((pdev->subsystem_vendor == PCI_VENDOR_ID_DLINK)&&(pdev->subsystem_device == 0x3304)){
4562- priv->ieee80211->bSupportRemoteWakeUp = 1;
4563- } else
4564- {
4565- priv->ieee80211->bSupportRemoteWakeUp = 0;
4566- }
4567-
4568- pmem_start = pci_resource_start(pdev, 1);
4569- pmem_len = pci_resource_len(pdev, 1);
4570- pmem_flags = pci_resource_flags (pdev, 1);
4571-
4572- if (!(pmem_flags & IORESOURCE_MEM)) {
4573- RT_TRACE(COMP_ERR, "region #1 not a MMIO resource, aborting\n");
4574- goto fail;
4575- }
4576-
4577- //DMESG("Memory mapped space @ 0x%08lx ", pmem_start);
4578- if( ! request_mem_region(pmem_start, pmem_len, RTL819xE_MODULE_NAME)) {
4579- RT_TRACE(COMP_ERR,"request_mem_region failed!\n");
4580- goto fail;
4581- }
4582-
4583- priv->mem_start = ioremap_nocache(pmem_start, pmem_len);
4584- if (!priv->mem_start) {
4585- RT_TRACE(COMP_ERR,"ioremap failed!\n");
4586- goto fail1;
4587- }
4588-
4589- dev->mem_start = (unsigned long) priv->mem_start;
4590- dev->mem_end = (unsigned long) (priv->mem_start +
4591- pci_resource_len(pdev, 0));
4592-
4593- /* We disable the RETRY_TIMEOUT register (0x41) to keep
4594- * PCI Tx retries from interfering with C3 CPU state */
4595- pci_write_config_byte(pdev, 0x41, 0x00);
4596-
4597-
4598- pci_read_config_byte(pdev, 0x05, &unit);
4599- pci_write_config_byte(pdev, 0x05, unit & (~0x04));
4600-
4601- dev->irq = pdev->irq;
4602- priv->irq = 0;
4603-
4604- dev->netdev_ops = &rtl8192_netdev_ops;
4605-
4606- dev->wireless_handlers = &r8192_wx_handlers_def;
4607- dev->type=ARPHRD_ETHER;
4608-
4609- dev->watchdog_timeo = HZ*3;
4610-
4611- if (dev_alloc_name(dev, ifname) < 0){
4612- RT_TRACE(COMP_INIT, "Oops: devname already taken! Trying wlan%%d...\n");
4613- strcpy(ifname, "wlan%d");
4614- dev_alloc_name(dev, ifname);
4615- }
4616-
4617- RT_TRACE(COMP_INIT, "Driver probe completed1\n");
4618- if (rtl8192_init(priv)!=0) {
4619- RT_TRACE(COMP_ERR, "Initialization failed\n");
4620- goto fail;
4621- }
4622-
4623- register_netdev(dev);
4624- RT_TRACE(COMP_INIT, "dev name=======> %s\n",dev->name);
4625- rtl8192_proc_init_one(priv);
4626-
4627-
4628- RT_TRACE(COMP_INIT, "Driver probe completed\n");
4629- return 0;
4630-
4631-fail1:
4632-
4633- if (priv->mem_start) {
4634- iounmap(priv->mem_start);
4635- release_mem_region( pci_resource_start(pdev, 1),
4636- pci_resource_len(pdev, 1) );
4637- }
4638-
4639-fail:
4640- if(dev){
4641-
4642- if (priv->irq) {
4643- free_irq(priv->irq, priv);
4644- priv->irq = 0;
4645- }
4646- free_ieee80211(dev);
4647- }
4648-
4649-fail_free:
4650- pci_disable_device(pdev);
4651-
4652- DMESG("wlan driver load failed\n");
4653- pci_set_drvdata(pdev, NULL);
4654- return ret;
4655-
4656-}
4657-
4658-/* detach all the work and timer structure declared or inititialized
4659- * in r8192_init function.
4660- * */
4661-static void rtl8192_cancel_deferred_work(struct r8192_priv* priv)
4662-{
4663- /* call cancel_work_sync instead of cancel_delayed_work if and only if Linux_version_code
4664- * is or is newer than 2.6.20 and work structure is defined to be struct work_struct.
4665- * Otherwise call cancel_delayed_work is enough.
4666- * FIXME (2.6.20 should 2.6.22, work_struct should not cancel)
4667- * */
4668- cancel_delayed_work(&priv->watch_dog_wq);
4669- cancel_delayed_work(&priv->update_beacon_wq);
4670- cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
4671- cancel_delayed_work(&priv->gpio_change_rf_wq);
4672- cancel_work_sync(&priv->reset_wq);
4673- cancel_work_sync(&priv->qos_activate);
4674-}
4675-
4676-
4677-static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev)
4678-{
4679- struct net_device *dev = pci_get_drvdata(pdev);
4680- struct r8192_priv *priv ;
4681- u32 i;
4682-
4683- if (dev) {
4684-
4685- unregister_netdev(dev);
4686-
4687- priv = ieee80211_priv(dev);
4688-
4689- rtl8192_proc_remove_one(priv);
4690-
4691- rtl8192_down(dev);
4692- if (priv->pFirmware)
4693- {
4694- vfree(priv->pFirmware);
4695- priv->pFirmware = NULL;
4696- }
4697- destroy_workqueue(priv->priv_wq);
4698-
4699- /* free tx/rx rings */
4700- rtl8192_free_rx_ring(priv);
4701- for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
4702- rtl8192_free_tx_ring(priv, i);
4703-
4704- if (priv->irq) {
4705- printk("Freeing irq %d\n", priv->irq);
4706- free_irq(priv->irq, priv);
4707- priv->irq = 0;
4708- }
4709-
4710- if (priv->mem_start) {
4711- iounmap(priv->mem_start);
4712- release_mem_region( pci_resource_start(pdev, 1),
4713- pci_resource_len(pdev, 1) );
4714- }
4715-
4716- free_ieee80211(dev);
4717- }
4718-
4719- pci_disable_device(pdev);
4720- RT_TRACE(COMP_DOWN, "wlan driver removed\n");
4721-}
4722-
4723-extern int ieee80211_rtl_init(void);
4724-extern void ieee80211_rtl_exit(void);
4725-
4726-static int __init rtl8192_pci_module_init(void)
4727-{
4728- int retval;
4729-
4730- retval = ieee80211_rtl_init();
4731- if (retval)
4732- return retval;
4733-
4734- printk(KERN_INFO "\nLinux kernel driver for RTL8192 based WLAN cards\n");
4735- printk(KERN_INFO "Copyright (c) 2007-2008, Realsil Wlan\n");
4736- RT_TRACE(COMP_INIT, "Initializing module\n");
4737- rtl8192_proc_module_init();
4738- if(0!=pci_register_driver(&rtl8192_pci_driver))
4739- {
4740- DMESG("No device found");
4741- /*pci_unregister_driver (&rtl8192_pci_driver);*/
4742- return -ENODEV;
4743- }
4744- return 0;
4745-}
4746-
4747-
4748-static void __exit rtl8192_pci_module_exit(void)
4749-{
4750- pci_unregister_driver(&rtl8192_pci_driver);
4751-
4752- RT_TRACE(COMP_DOWN, "Exiting\n");
4753- rtl8192_proc_module_remove();
4754- ieee80211_rtl_exit();
4755-}
4756-
4757-static irqreturn_t rtl8192_interrupt(int irq, void *param)
4758-{
4759- struct r8192_priv *priv = param;
4760- struct net_device *dev = priv->ieee80211->dev;
4761- unsigned long flags;
4762- u32 inta;
4763- irqreturn_t ret = IRQ_HANDLED;
4764-
4765- spin_lock_irqsave(&priv->irq_th_lock, flags);
4766-
4767- /* ISR: 4bytes */
4768-
4769- inta = read_nic_dword(priv, ISR); /* & priv->IntrMask; */
4770- write_nic_dword(priv, ISR, inta); /* reset int situation */
4771-
4772- if (!inta) {
4773- /*
4774- * most probably we can safely return IRQ_NONE,
4775- * but for now is better to avoid problems
4776- */
4777- goto out_unlock;
4778- }
4779-
4780- if (inta == 0xffff) {
4781- /* HW disappared */
4782- goto out_unlock;
4783- }
4784-
4785- if (!netif_running(dev))
4786- goto out_unlock;
4787-
4788- if (inta & IMR_TBDOK) {
4789- RT_TRACE(COMP_INTR, "beacon ok interrupt!\n");
4790- rtl8192_tx_isr(priv, BEACON_QUEUE);
4791- priv->stats.txbeaconokint++;
4792- }
4793-
4794- if (inta & IMR_TBDER) {
4795- RT_TRACE(COMP_INTR, "beacon ok interrupt!\n");
4796- rtl8192_tx_isr(priv, BEACON_QUEUE);
4797- priv->stats.txbeaconerr++;
4798- }
4799-
4800- if (inta & IMR_MGNTDOK ) {
4801- RT_TRACE(COMP_INTR, "Manage ok interrupt!\n");
4802- priv->stats.txmanageokint++;
4803- rtl8192_tx_isr(priv, MGNT_QUEUE);
4804- }
4805-
4806- if (inta & IMR_COMDOK)
4807- {
4808- priv->stats.txcmdpktokint++;
4809- rtl8192_tx_isr(priv, TXCMD_QUEUE);
4810- }
4811-
4812- if (inta & IMR_ROK) {
4813- priv->stats.rxint++;
4814- tasklet_schedule(&priv->irq_rx_tasklet);
4815- }
4816-
4817- if (inta & IMR_BcnInt) {
4818- RT_TRACE(COMP_INTR, "prepare beacon for interrupt!\n");
4819- tasklet_schedule(&priv->irq_prepare_beacon_tasklet);
4820- }
4821-
4822- if (inta & IMR_RDU) {
4823- RT_TRACE(COMP_INTR, "rx descriptor unavailable!\n");
4824- priv->stats.rxrdu++;
4825- /* reset int situation */
4826- write_nic_dword(priv, INTA_MASK, read_nic_dword(priv, INTA_MASK) & ~IMR_RDU);
4827- tasklet_schedule(&priv->irq_rx_tasklet);
4828- }
4829-
4830- if (inta & IMR_RXFOVW) {
4831- RT_TRACE(COMP_INTR, "rx overflow !\n");
4832- priv->stats.rxoverflow++;
4833- tasklet_schedule(&priv->irq_rx_tasklet);
4834- }
4835-
4836- if (inta & IMR_TXFOVW)
4837- priv->stats.txoverflow++;
4838-
4839- if (inta & IMR_BKDOK) {
4840- RT_TRACE(COMP_INTR, "BK Tx OK interrupt!\n");
4841- priv->stats.txbkokint++;
4842- priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
4843- rtl8192_tx_isr(priv, BK_QUEUE);
4844- }
4845-
4846- if (inta & IMR_BEDOK) {
4847- RT_TRACE(COMP_INTR, "BE TX OK interrupt!\n");
4848- priv->stats.txbeokint++;
4849- priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
4850- rtl8192_tx_isr(priv, BE_QUEUE);
4851- }
4852-
4853- if (inta & IMR_VIDOK) {
4854- RT_TRACE(COMP_INTR, "VI TX OK interrupt!\n");
4855- priv->stats.txviokint++;
4856- priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
4857- rtl8192_tx_isr(priv, VI_QUEUE);
4858- }
4859-
4860- if (inta & IMR_VODOK) {
4861- priv->stats.txvookint++;
4862- priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
4863- rtl8192_tx_isr(priv, VO_QUEUE);
4864- }
4865-
4866-out_unlock:
4867- spin_unlock_irqrestore(&priv->irq_th_lock, flags);
4868-
4869- return ret;
4870-}
4871-
4872-void EnableHWSecurityConfig8192(struct r8192_priv *priv)
4873-{
4874- u8 SECR_value = 0x0;
4875- struct ieee80211_device* ieee = priv->ieee80211;
4876-
4877- SECR_value = SCR_TxEncEnable | SCR_RxDecEnable;
4878-
4879- if (((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type)) && (priv->ieee80211->auth_mode != 2))
4880- {
4881- SECR_value |= SCR_RxUseDK;
4882- SECR_value |= SCR_TxUseDK;
4883- }
4884- else if ((ieee->iw_mode == IW_MODE_ADHOC) && (ieee->pairwise_key_type & (KEY_TYPE_CCMP | KEY_TYPE_TKIP)))
4885- {
4886- SECR_value |= SCR_RxUseDK;
4887- SECR_value |= SCR_TxUseDK;
4888- }
4889-
4890- //add HWSec active enable here.
4891-//default using hwsec. when peer AP is in N mode only and pairwise_key_type is none_aes(which HT_IOT_ACT_PURE_N_MODE indicates it), use software security. when peer AP is in b,g,n mode mixed and pairwise_key_type is none_aes, use g mode hw security. WB on 2008.7.4
4892- ieee->hwsec_active = 1;
4893-
4894- if ((ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE) || !hwwep)//!ieee->hwsec_support) //add hwsec_support flag to totol control hw_sec on/off
4895- {
4896- ieee->hwsec_active = 0;
4897- SECR_value &= ~SCR_RxDecEnable;
4898- }
4899-
4900- RT_TRACE(COMP_SEC,"%s:, hwsec:%d, pairwise_key:%d, SECR_value:%x\n", __FUNCTION__,
4901- ieee->hwsec_active, ieee->pairwise_key_type, SECR_value);
4902- {
4903- write_nic_byte(priv, SECR, SECR_value);//SECR_value | SCR_UseDK );
4904- }
4905-
4906-}
4907-#define TOTAL_CAM_ENTRY 32
4908-//#define CAM_CONTENT_COUNT 8
4909-void setKey(struct r8192_priv *priv, u8 EntryNo, u8 KeyIndex, u16 KeyType,
4910- const u8 *MacAddr, u8 DefaultKey, u32 *KeyContent)
4911-{
4912- u32 TargetCommand = 0;
4913- u32 TargetContent = 0;
4914- u16 usConfig = 0;
4915- u8 i;
4916-#ifdef ENABLE_IPS
4917- RT_RF_POWER_STATE rtState;
4918-
4919- rtState = priv->eRFPowerState;
4920- if (priv->PowerSaveControl.bInactivePs){
4921- if(rtState == eRfOff){
4922- if(priv->RfOffReason > RF_CHANGE_BY_IPS)
4923- {
4924- RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__);
4925- //up(&priv->wx_sem);
4926- return ;
4927- }
4928- else{
4929- down(&priv->ieee80211->ips_sem);
4930- IPSLeave(priv);
4931- up(&priv->ieee80211->ips_sem);
4932- }
4933- }
4934- }
4935- priv->ieee80211->is_set_key = true;
4936-#endif
4937- if (EntryNo >= TOTAL_CAM_ENTRY)
4938- RT_TRACE(COMP_ERR, "cam entry exceeds in setKey()\n");
4939-
4940- RT_TRACE(COMP_SEC, "====>to setKey(), priv:%p, EntryNo:%d, KeyIndex:%d, KeyType:%d, MacAddr%pM\n", priv, EntryNo, KeyIndex, KeyType, MacAddr);
4941-
4942- if (DefaultKey)
4943- usConfig |= BIT15 | (KeyType<<2);
4944- else
4945- usConfig |= BIT15 | (KeyType<<2) | KeyIndex;
4946-// usConfig |= BIT15 | (KeyType<<2) | (DefaultKey<<5) | KeyIndex;
4947-
4948-
4949- for(i=0 ; i<CAM_CONTENT_COUNT; i++){
4950- TargetCommand = i+CAM_CONTENT_COUNT*EntryNo;
4951- TargetCommand |= BIT31|BIT16;
4952-
4953- if(i==0){//MAC|Config
4954- TargetContent = (u32)(*(MacAddr+0)) << 16|
4955- (u32)(*(MacAddr+1)) << 24|
4956- (u32)usConfig;
4957-
4958- write_nic_dword(priv, WCAMI, TargetContent);
4959- write_nic_dword(priv, RWCAM, TargetCommand);
4960- }
4961- else if(i==1){//MAC
4962- TargetContent = (u32)(*(MacAddr+2)) |
4963- (u32)(*(MacAddr+3)) << 8|
4964- (u32)(*(MacAddr+4)) << 16|
4965- (u32)(*(MacAddr+5)) << 24;
4966- write_nic_dword(priv, WCAMI, TargetContent);
4967- write_nic_dword(priv, RWCAM, TargetCommand);
4968- }
4969- else { //Key Material
4970- if(KeyContent != NULL)
4971- {
4972- write_nic_dword(priv, WCAMI, (u32)(*(KeyContent+i-2)) );
4973- write_nic_dword(priv, RWCAM, TargetCommand);
4974- }
4975- }
4976- }
4977- RT_TRACE(COMP_SEC,"=========>after set key, usconfig:%x\n", usConfig);
4978-}
4979-
4980-bool NicIFEnableNIC(struct r8192_priv *priv)
4981-{
4982- RT_STATUS init_status = RT_STATUS_SUCCESS;
4983- PRT_POWER_SAVE_CONTROL pPSC = &priv->PowerSaveControl;
4984-
4985- //YJ,add,091109
4986- if (priv->up == 0){
4987- RT_TRACE(COMP_ERR, "ERR!!! %s(): Driver is already down!\n",__FUNCTION__);
4988- priv->bdisable_nic = false; //YJ,add,091111
4989- return false;
4990- }
4991- // <1> Reset memory: descriptor, buffer,..
4992- //NicIFResetMemory(Adapter);
4993-
4994- // <2> Enable Adapter
4995- //priv->bfirst_init = true;
4996- init_status = rtl8192_adapter_start(priv);
4997- if (init_status != RT_STATUS_SUCCESS) {
4998- RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n",__FUNCTION__);
4999- priv->bdisable_nic = false; //YJ,add,091111
5000- return -1;
5001- }
5002- RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC);
5003- //priv->bfirst_init = false;
5004-
5005- // <3> Enable Interrupt
5006- rtl8192_irq_enable(priv);
5007- priv->bdisable_nic = false;
5008-
5009- return (init_status == RT_STATUS_SUCCESS);
5010-}
5011-
5012-bool NicIFDisableNIC(struct r8192_priv *priv)
5013-{
5014- bool status = true;
5015- u8 tmp_state = 0;
5016- // <1> Disable Interrupt
5017-
5018- priv->bdisable_nic = true; //YJ,move,091109
5019- tmp_state = priv->ieee80211->state;
5020-
5021- ieee80211_softmac_stop_protocol(priv->ieee80211, false);
5022-
5023- priv->ieee80211->state = tmp_state;
5024- rtl8192_cancel_deferred_work(priv);
5025- rtl8192_irq_disable(priv);
5026- // <2> Stop all timer
5027-
5028- // <3> Disable Adapter
5029- rtl8192_halt_adapter(priv, false);
5030-// priv->bdisable_nic = true;
5031-
5032- return status;
5033-}
5034-
5035-module_init(rtl8192_pci_module_init);
5036-module_exit(rtl8192_pci_module_exit);
diff --git a/drivers/staging/rtl8192e/r8192E_dev.c b/drivers/staging/rtl8192e/r8192E_dev.c
new file mode 100644
index 00000000000..ba988f0fbd3
--- /dev/null
+++ b/drivers/staging/rtl8192e/r8192E_dev.c
@@ -0,0 +1,2670 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * Based on the r8180 driver, which is:
5 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 *
19 * The full GNU General Public License is included in this distribution in the
20 * file called LICENSE.
21 *
22 * Contact Information:
23 * wlanfae <wlanfae@realtek.com>
24******************************************************************************/
25#include "rtl_core.h"
26#include "r8192E_phy.h"
27#include "r8192E_phyreg.h"
28#include "r8190P_rtl8256.h"
29#include "r8192E_cmdpkt.h"
30#include "rtl_dm.h"
31#include "rtl_wx.h"
32
33extern int WDCAPARA_ADD[];
34
35void rtl8192e_start_beacon(struct net_device *dev)
36{
37 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
38 struct rtllib_network *net = &priv->rtllib->current_network;
39 u16 BcnTimeCfg = 0;
40 u16 BcnCW = 6;
41 u16 BcnIFS = 0xf;
42
43 DMESG("Enabling beacon TX");
44 rtl8192_irq_disable(dev);
45
46 write_nic_word(dev, ATIMWND, 2);
47
48 write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
49 write_nic_word(dev, BCN_DRV_EARLY_INT, 10);
50 write_nic_word(dev, BCN_DMATIME, 256);
51
52 write_nic_byte(dev, BCN_ERR_THRESH, 100);
53
54 BcnTimeCfg |= BcnCW<<BCN_TCFG_CW_SHIFT;
55 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
56 write_nic_word(dev, BCN_TCFG, BcnTimeCfg);
57 rtl8192_irq_enable(dev);
58}
59
60void rtl8192e_update_msr(struct net_device *dev)
61{
62 struct r8192_priv *priv = rtllib_priv(dev);
63 u8 msr;
64 LED_CTL_MODE LedAction = LED_CTL_NO_LINK;
65 msr = read_nic_byte(dev, MSR);
66 msr &= ~ MSR_LINK_MASK;
67
68 switch (priv->rtllib->iw_mode) {
69 case IW_MODE_INFRA:
70 if (priv->rtllib->state == RTLLIB_LINKED)
71 msr |= (MSR_LINK_MANAGED << MSR_LINK_SHIFT);
72 else
73 msr |= (MSR_LINK_NONE << MSR_LINK_SHIFT);
74 LedAction = LED_CTL_LINK;
75 break;
76 case IW_MODE_ADHOC:
77 if (priv->rtllib->state == RTLLIB_LINKED)
78 msr |= (MSR_LINK_ADHOC << MSR_LINK_SHIFT);
79 else
80 msr |= (MSR_LINK_NONE << MSR_LINK_SHIFT);
81 break;
82 case IW_MODE_MASTER:
83 if (priv->rtllib->state == RTLLIB_LINKED)
84 msr |= (MSR_LINK_MASTER << MSR_LINK_SHIFT);
85 else
86 msr |= (MSR_LINK_NONE << MSR_LINK_SHIFT);
87 break;
88 default:
89 break;
90 }
91
92 write_nic_byte(dev, MSR, msr);
93 if (priv->rtllib->LedControlHandler)
94 priv->rtllib->LedControlHandler(dev, LedAction);
95}
96
97void
98rtl8192e_SetHwReg(struct net_device *dev,u8 variable,u8* val)
99{
100 struct r8192_priv* priv = rtllib_priv(dev);
101
102 switch (variable)
103 {
104
105 case HW_VAR_BSSID:
106 write_nic_dword(dev, BSSIDR, ((u32*)(val))[0]);
107 write_nic_word(dev, BSSIDR+2, ((u16*)(val+2))[0]);
108 break;
109
110 case HW_VAR_MEDIA_STATUS:
111 {
112 RT_OP_MODE OpMode = *((RT_OP_MODE *)(val));
113 LED_CTL_MODE LedAction = LED_CTL_NO_LINK;
114 u8 btMsr = read_nic_byte(dev, MSR);
115
116 btMsr &= 0xfc;
117
118 switch (OpMode)
119 {
120 case RT_OP_MODE_INFRASTRUCTURE:
121 btMsr |= MSR_INFRA;
122 LedAction = LED_CTL_LINK;
123 break;
124
125 case RT_OP_MODE_IBSS:
126 btMsr |= MSR_ADHOC;
127 break;
128
129 case RT_OP_MODE_AP:
130 btMsr |= MSR_AP;
131 LedAction = LED_CTL_LINK;
132 break;
133
134 default:
135 btMsr |= MSR_NOLINK;
136 break;
137 }
138
139 write_nic_byte(dev, MSR, btMsr);
140
141 }
142 break;
143
144 case HW_VAR_CECHK_BSSID:
145 {
146 u32 RegRCR, Type;
147
148 Type = ((u8*)(val))[0];
149 RegRCR = read_nic_dword(dev,RCR);
150 priv->ReceiveConfig = RegRCR;
151
152 if (Type == true)
153 RegRCR |= (RCR_CBSSID);
154 else if (Type == false)
155 RegRCR &= (~RCR_CBSSID);
156
157 write_nic_dword(dev, RCR,RegRCR);
158 priv->ReceiveConfig = RegRCR;
159
160 }
161 break;
162
163 case HW_VAR_SLOT_TIME:
164 {
165
166 priv->slot_time = val[0];
167 write_nic_byte(dev, SLOT_TIME, val[0]);
168
169#ifdef MERGE_TO_DO
170 if (priv->rtllib->current_network.qos_data.supported !=0)
171 {
172 for (eACI = 0; eACI < AC_MAX; eACI++)
173 {
174 priv->rtllib->SetHwRegHandler(dev, HW_VAR_AC_PARAM, (u8*)(&eACI));
175 }
176 }
177 else
178 {
179 u8 u1bAIFS = aSifsTime + (2 * priv->slot_time);
180
181 write_nic_byte(dev, EDCAPARA_VO, u1bAIFS);
182 write_nic_byte(dev, EDCAPARA_VI, u1bAIFS);
183 write_nic_byte(dev, EDCAPARA_BE, u1bAIFS);
184 write_nic_byte(dev, EDCAPARA_BK, u1bAIFS);
185 }
186#endif
187 }
188 break;
189
190 case HW_VAR_ACK_PREAMBLE:
191 {
192 u32 regTmp = 0;
193 priv->short_preamble = (bool)(*(u8*)val );
194 regTmp = priv->basic_rate;
195 if (priv->short_preamble)
196 regTmp |= BRSR_AckShortPmb;
197 write_nic_dword(dev, RRSR, regTmp);
198 }
199 break;
200
201 case HW_VAR_CPU_RST:
202 write_nic_dword(dev, CPU_GEN, ((u32*)(val))[0]);
203 break;
204
205 case HW_VAR_AC_PARAM:
206 {
207 u8 pAcParam = *((u8*)val);
208#ifdef MERGE_TO_DO
209 u32 eACI = GET_WMM_AC_PARAM_ACI(pAcParam);
210#else
211 u32 eACI = pAcParam;
212#endif
213 u8 u1bAIFS;
214 u32 u4bAcParam;
215 u8 mode = priv->rtllib->mode;
216 struct rtllib_qos_parameters *qos_parameters = &priv->rtllib->current_network.qos_data.parameters;
217
218
219 u1bAIFS = qos_parameters->aifs[pAcParam] * ((mode&(IEEE_G|IEEE_N_24G)) ?9:20) + aSifsTime;
220
221 dm_init_edca_turbo(dev);
222
223 u4bAcParam = ( (((u32)(qos_parameters->tx_op_limit[pAcParam])) << AC_PARAM_TXOP_LIMIT_OFFSET) |
224 (((u32)(qos_parameters->cw_max[pAcParam])) << AC_PARAM_ECW_MAX_OFFSET) |
225 (((u32)(qos_parameters->cw_min[pAcParam])) << AC_PARAM_ECW_MIN_OFFSET) |
226 (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET) );
227
228 RT_TRACE(COMP_DBG, "%s():HW_VAR_AC_PARAM eACI:%x:%x\n", __func__,eACI, u4bAcParam);
229 switch (eACI)
230 {
231 case AC1_BK:
232 write_nic_dword(dev, EDCAPARA_BK, u4bAcParam);
233 break;
234
235 case AC0_BE:
236 write_nic_dword(dev, EDCAPARA_BE, u4bAcParam);
237 break;
238
239 case AC2_VI:
240 write_nic_dword(dev, EDCAPARA_VI, u4bAcParam);
241 break;
242
243 case AC3_VO:
244 write_nic_dword(dev, EDCAPARA_VO, u4bAcParam);
245 break;
246
247 default:
248 printk("SetHwReg8185(): invalid ACI: %d !\n", eACI);
249 break;
250 }
251 priv->rtllib->SetHwRegHandler(dev, HW_VAR_ACM_CTRL, (u8*)(&pAcParam));
252 }
253 break;
254
255 case HW_VAR_ACM_CTRL:
256 {
257 struct rtllib_qos_parameters *qos_parameters = &priv->rtllib->current_network.qos_data.parameters;
258 u8 pAcParam = *((u8*)val);
259#ifdef MERGE_TO_DO
260 u32 eACI = GET_WMM_AC_PARAM_ACI(pAciAifsn);
261#else
262 u32 eACI = pAcParam;
263#endif
264 PACI_AIFSN pAciAifsn = (PACI_AIFSN)&(qos_parameters->aifs[0]);
265 u8 ACM = pAciAifsn->f.ACM;
266 u8 AcmCtrl = read_nic_byte( dev, AcmHwCtrl);
267
268 RT_TRACE(COMP_DBG, "===========>%s():HW_VAR_ACM_CTRL:%x\n", __func__,eACI);
269 AcmCtrl = AcmCtrl | ((priv->AcmMethod == 2)?0x0:0x1);
270
271 if ( ACM )
272 {
273 switch (eACI)
274 {
275 case AC0_BE:
276 AcmCtrl |= AcmHw_BeqEn;
277 break;
278
279 case AC2_VI:
280 AcmCtrl |= AcmHw_ViqEn;
281 break;
282
283 case AC3_VO:
284 AcmCtrl |= AcmHw_VoqEn;
285 break;
286
287 default:
288 RT_TRACE( COMP_QOS, "SetHwReg8185(): [HW_VAR_ACM_CTRL] ACM set failed: eACI is %d\n", eACI );
289 break;
290 }
291 }
292 else
293 {
294 switch (eACI)
295 {
296 case AC0_BE:
297 AcmCtrl &= (~AcmHw_BeqEn);
298 break;
299
300 case AC2_VI:
301 AcmCtrl &= (~AcmHw_ViqEn);
302 break;
303
304 case AC3_VO:
305 AcmCtrl &= (~AcmHw_BeqEn);
306 break;
307
308 default:
309 break;
310 }
311 }
312
313 RT_TRACE( COMP_QOS, "SetHwReg8190pci(): [HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl );
314 write_nic_byte(dev, AcmHwCtrl, AcmCtrl );
315 }
316 break;
317
318 case HW_VAR_SIFS:
319 write_nic_byte(dev, SIFS, val[0]);
320 write_nic_byte(dev, SIFS+1, val[0]);
321 break;
322
323 case HW_VAR_RF_TIMING:
324 {
325#ifdef RTL8192E
326 u8 Rf_Timing = *((u8*)val);
327 write_nic_byte(dev, rFPGA0_RFTiming1, Rf_Timing);
328#endif
329 }
330 break;
331
332 default:
333 break;
334 }
335
336}
337
338static void rtl8192_read_eeprom_info(struct net_device* dev)
339{
340 struct r8192_priv *priv = rtllib_priv(dev);
341
342 u8 tempval;
343#ifdef RTL8192E
344 u8 ICVer8192, ICVer8256;
345#endif
346 u16 i,usValue, IC_Version;
347 u16 EEPROMId;
348#ifdef RTL8190P
349 u8 offset;
350 u8 EepromTxPower[100];
351#endif
352 u8 bMac_Tmp_Addr[6] = {0x00, 0xe0, 0x4c, 0x00, 0x00, 0x01};
353 RT_TRACE(COMP_INIT, "====> rtl8192_read_eeprom_info\n");
354
355
356
357 EEPROMId = eprom_read(dev, 0);
358 if ( EEPROMId != RTL8190_EEPROM_ID )
359 {
360 RT_TRACE(COMP_ERR, "EEPROM ID is invalid:%x, %x\n", EEPROMId, RTL8190_EEPROM_ID);
361 priv->AutoloadFailFlag=true;
362 }
363 else
364 {
365 priv->AutoloadFailFlag=false;
366 }
367
368 if (!priv->AutoloadFailFlag)
369 {
370 priv->eeprom_vid = eprom_read(dev, (EEPROM_VID >> 1));
371 priv->eeprom_did = eprom_read(dev, (EEPROM_DID >> 1));
372
373 usValue = eprom_read(dev, (u16)(EEPROM_Customer_ID>>1)) >> 8 ;
374 priv->eeprom_CustomerID = (u8)( usValue & 0xff);
375 usValue = eprom_read(dev, (EEPROM_ICVersion_ChannelPlan>>1));
376 priv->eeprom_ChannelPlan = usValue&0xff;
377 IC_Version = ((usValue&0xff00)>>8);
378
379#ifdef RTL8190P
380 priv->card_8192_version = (VERSION_8190)(IC_Version);
381#elif defined RTL8192E
382 ICVer8192 = (IC_Version&0xf);
383 ICVer8256 = ((IC_Version&0xf0)>>4);
384 RT_TRACE(COMP_INIT, "\nICVer8192 = 0x%x\n", ICVer8192);
385 RT_TRACE(COMP_INIT, "\nICVer8256 = 0x%x\n", ICVer8256);
386 if (ICVer8192 == 0x2)
387 {
388 if (ICVer8256 == 0x5)
389 priv->card_8192_version= VERSION_8190_BE;
390 }
391#endif
392 switch (priv->card_8192_version)
393 {
394 case VERSION_8190_BD:
395 case VERSION_8190_BE:
396 break;
397 default:
398 priv->card_8192_version = VERSION_8190_BD;
399 break;
400 }
401 RT_TRACE(COMP_INIT, "\nIC Version = 0x%x\n", priv->card_8192_version);
402 }
403 else
404 {
405 priv->card_8192_version = VERSION_8190_BD;
406 priv->eeprom_vid = 0;
407 priv->eeprom_did = 0;
408 priv->eeprom_CustomerID = 0;
409 priv->eeprom_ChannelPlan = 0;
410 RT_TRACE(COMP_INIT, "\nIC Version = 0x%x\n", 0xff);
411 }
412
413 RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
414 RT_TRACE(COMP_INIT, "EEPROM DID = 0x%4x\n", priv->eeprom_did);
415 RT_TRACE(COMP_INIT,"EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
416
417 if (!priv->AutoloadFailFlag)
418 {
419 for (i = 0; i < 6; i += 2)
420 {
421 usValue = eprom_read(dev, (u16) ((EEPROM_NODE_ADDRESS_BYTE_0+i)>>1));
422 *(u16*)(&dev->dev_addr[i]) = usValue;
423 }
424 } else {
425 memcpy(dev->dev_addr, bMac_Tmp_Addr, 6);
426 }
427
428 RT_TRACE(COMP_INIT, "Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n",
429 dev->dev_addr[0], dev->dev_addr[1],
430 dev->dev_addr[2], dev->dev_addr[3],
431 dev->dev_addr[4], dev->dev_addr[5]);
432
433 if (priv->card_8192_version > VERSION_8190_BD) {
434 priv->bTXPowerDataReadFromEEPORM = true;
435 } else {
436 priv->bTXPowerDataReadFromEEPORM = false;
437 }
438
439 priv->rf_type = RTL819X_DEFAULT_RF_TYPE;
440
441 if (priv->card_8192_version > VERSION_8190_BD)
442 {
443 if (!priv->AutoloadFailFlag)
444 {
445 tempval = (eprom_read(dev, (EEPROM_RFInd_PowerDiff>>1))) & 0xff;
446 priv->EEPROMLegacyHTTxPowerDiff = tempval & 0xf;
447
448 if (tempval&0x80)
449 priv->rf_type = RF_1T2R;
450 else
451 priv->rf_type = RF_2T4R;
452 }
453 else
454 {
455 priv->EEPROMLegacyHTTxPowerDiff = 0x04;
456 }
457 RT_TRACE(COMP_INIT, "EEPROMLegacyHTTxPowerDiff = %d\n",
458 priv->EEPROMLegacyHTTxPowerDiff);
459
460 if (!priv->AutoloadFailFlag)
461 {
462 priv->EEPROMThermalMeter = (u8)(((eprom_read(dev, (EEPROM_ThermalMeter>>1))) & 0xff00)>>8);
463 }
464 else
465 {
466 priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
467 }
468 RT_TRACE(COMP_INIT, "ThermalMeter = %d\n", priv->EEPROMThermalMeter);
469 priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
470
471 if (priv->epromtype == EEPROM_93C46)
472 {
473 if (!priv->AutoloadFailFlag)
474 {
475 usValue = eprom_read(dev, (EEPROM_TxPwDiff_CrystalCap>>1));
476 priv->EEPROMAntPwDiff = (usValue&0x0fff);
477 priv->EEPROMCrystalCap = (u8)((usValue&0xf000)>>12);
478 }
479 else
480 {
481 priv->EEPROMAntPwDiff = EEPROM_Default_AntTxPowerDiff;
482 priv->EEPROMCrystalCap = EEPROM_Default_TxPwDiff_CrystalCap;
483 }
484 RT_TRACE(COMP_INIT, "EEPROMAntPwDiff = %d\n", priv->EEPROMAntPwDiff);
485 RT_TRACE(COMP_INIT, "EEPROMCrystalCap = %d\n", priv->EEPROMCrystalCap);
486
487 for (i=0; i<14; i+=2)
488 {
489 if (!priv->AutoloadFailFlag)
490 {
491 usValue = eprom_read(dev, (u16) ((EEPROM_TxPwIndex_CCK+i)>>1) );
492 }
493 else
494 {
495 usValue = EEPROM_Default_TxPower;
496 }
497 *((u16*)(&priv->EEPROMTxPowerLevelCCK[i])) = usValue;
498 RT_TRACE(COMP_INIT,"CCK Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelCCK[i]);
499 RT_TRACE(COMP_INIT, "CCK Tx Power Level, Index %d = 0x%02x\n", i+1, priv->EEPROMTxPowerLevelCCK[i+1]);
500 }
501 for (i=0; i<14; i+=2)
502 {
503 if (!priv->AutoloadFailFlag)
504 {
505 usValue = eprom_read(dev, (u16) ((EEPROM_TxPwIndex_OFDM_24G+i)>>1) );
506 }
507 else
508 {
509 usValue = EEPROM_Default_TxPower;
510 }
511 *((u16*)(&priv->EEPROMTxPowerLevelOFDM24G[i])) = usValue;
512 RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelOFDM24G[i]);
513 RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i+1, priv->EEPROMTxPowerLevelOFDM24G[i+1]);
514 }
515 }
516 else if (priv->epromtype== EEPROM_93C56)
517 {
518#ifdef RTL8190P
519 if (!priv->AutoloadFailFlag)
520 {
521 priv->EEPROMAntPwDiff = EEPROM_Default_AntTxPowerDiff;
522 priv->EEPROMCrystalCap = (u8)(((eprom_read(dev, (EEPROM_C56_CrystalCap>>1))) & 0xf000)>>12);
523 }
524 else
525 {
526 priv->EEPROMAntPwDiff = EEPROM_Default_AntTxPowerDiff;
527 priv->EEPROMCrystalCap = EEPROM_Default_TxPwDiff_CrystalCap;
528 }
529 RT_TRACE(COMP_INIT,"EEPROMAntPwDiff = %d\n", priv->EEPROMAntPwDiff);
530 RT_TRACE(COMP_INIT, "EEPROMCrystalCap = %d\n", priv->EEPROMCrystalCap);
531
532 if (!priv->AutoloadFailFlag)
533 {
534 for (i = 0; i < 12; i+=2)
535 {
536 if (i <6)
537 offset = EEPROM_C56_RfA_CCK_Chnl1_TxPwIndex + i;
538 else
539 offset = EEPROM_C56_RfC_CCK_Chnl1_TxPwIndex + i - 6;
540 usValue = eprom_read(dev, (offset>>1));
541 *((u16*)(&EepromTxPower[i])) = usValue;
542 }
543
544 for (i = 0; i < 12; i++)
545 {
546 if (i <= 2)
547 priv->EEPROMRfACCKChnl1TxPwLevel[i] = EepromTxPower[i];
548 else if ((i >=3 )&&(i <= 5))
549 priv->EEPROMRfAOfdmChnlTxPwLevel[i-3] = EepromTxPower[i];
550 else if ((i >=6 )&&(i <= 8))
551 priv->EEPROMRfCCCKChnl1TxPwLevel[i-6] = EepromTxPower[i];
552 else
553 priv->EEPROMRfCOfdmChnlTxPwLevel[i-9] = EepromTxPower[i];
554 }
555 }
556 else
557 {
558 priv->EEPROMRfACCKChnl1TxPwLevel[0] = EEPROM_Default_TxPowerLevel;
559 priv->EEPROMRfACCKChnl1TxPwLevel[1] = EEPROM_Default_TxPowerLevel;
560 priv->EEPROMRfACCKChnl1TxPwLevel[2] = EEPROM_Default_TxPowerLevel;
561
562 priv->EEPROMRfAOfdmChnlTxPwLevel[0] = EEPROM_Default_TxPowerLevel;
563 priv->EEPROMRfAOfdmChnlTxPwLevel[1] = EEPROM_Default_TxPowerLevel;
564 priv->EEPROMRfAOfdmChnlTxPwLevel[2] = EEPROM_Default_TxPowerLevel;
565
566 priv->EEPROMRfCCCKChnl1TxPwLevel[0] = EEPROM_Default_TxPowerLevel;
567 priv->EEPROMRfCCCKChnl1TxPwLevel[1] = EEPROM_Default_TxPowerLevel;
568 priv->EEPROMRfCCCKChnl1TxPwLevel[2] = EEPROM_Default_TxPowerLevel;
569
570 priv->EEPROMRfCOfdmChnlTxPwLevel[0] = EEPROM_Default_TxPowerLevel;
571 priv->EEPROMRfCOfdmChnlTxPwLevel[1] = EEPROM_Default_TxPowerLevel;
572 priv->EEPROMRfCOfdmChnlTxPwLevel[2] = EEPROM_Default_TxPowerLevel;
573 }
574 RT_TRACE(COMP_INIT, "priv->EEPROMRfACCKChnl1TxPwLevel[0] = 0x%x\n", priv->EEPROMRfACCKChnl1TxPwLevel[0]);
575 RT_TRACE(COMP_INIT, "priv->EEPROMRfACCKChnl1TxPwLevel[1] = 0x%x\n", priv->EEPROMRfACCKChnl1TxPwLevel[1]);
576 RT_TRACE(COMP_INIT, "priv->EEPROMRfACCKChnl1TxPwLevel[2] = 0x%x\n", priv->EEPROMRfACCKChnl1TxPwLevel[2]);
577 RT_TRACE(COMP_INIT, "priv->EEPROMRfAOfdmChnlTxPwLevel[0] = 0x%x\n", priv->EEPROMRfAOfdmChnlTxPwLevel[0]);
578 RT_TRACE(COMP_INIT, "priv->EEPROMRfAOfdmChnlTxPwLevel[1] = 0x%x\n", priv->EEPROMRfAOfdmChnlTxPwLevel[1]);
579 RT_TRACE(COMP_INIT, "priv->EEPROMRfAOfdmChnlTxPwLevel[2] = 0x%x\n", priv->EEPROMRfAOfdmChnlTxPwLevel[2]);
580 RT_TRACE(COMP_INIT, "priv->EEPROMRfCCCKChnl1TxPwLevel[0] = 0x%x\n", priv->EEPROMRfCCCKChnl1TxPwLevel[0]);
581 RT_TRACE(COMP_INIT, "priv->EEPROMRfCCCKChnl1TxPwLevel[1] = 0x%x\n", priv->EEPROMRfCCCKChnl1TxPwLevel[1]);
582 RT_TRACE(COMP_INIT, "priv->EEPROMRfCCCKChnl1TxPwLevel[2] = 0x%x\n", priv->EEPROMRfCCCKChnl1TxPwLevel[2]);
583 RT_TRACE(COMP_INIT, "priv->EEPROMRfCOfdmChnlTxPwLevel[0] = 0x%x\n", priv->EEPROMRfCOfdmChnlTxPwLevel[0]);
584 RT_TRACE(COMP_INIT, "priv->EEPROMRfCOfdmChnlTxPwLevel[1] = 0x%x\n", priv->EEPROMRfCOfdmChnlTxPwLevel[1]);
585 RT_TRACE(COMP_INIT, "priv->EEPROMRfCOfdmChnlTxPwLevel[2] = 0x%x\n", priv->EEPROMRfCOfdmChnlTxPwLevel[2]);
586#endif
587
588 }
589 if (priv->epromtype == EEPROM_93C46)
590 {
591 for (i=0; i<14; i++)
592 {
593 priv->TxPowerLevelCCK[i] = priv->EEPROMTxPowerLevelCCK[i];
594 priv->TxPowerLevelOFDM24G[i] = priv->EEPROMTxPowerLevelOFDM24G[i];
595 }
596 priv->LegacyHTTxPowerDiff = priv->EEPROMLegacyHTTxPowerDiff;
597 priv->AntennaTxPwDiff[0] = (priv->EEPROMAntPwDiff & 0xf);
598 priv->AntennaTxPwDiff[1] = ((priv->EEPROMAntPwDiff & 0xf0)>>4);
599 priv->AntennaTxPwDiff[2] = ((priv->EEPROMAntPwDiff & 0xf00)>>8);
600 priv->CrystalCap = priv->EEPROMCrystalCap;
601 priv->ThermalMeter[0] = (priv->EEPROMThermalMeter & 0xf);
602 priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter & 0xf0)>>4);
603 }
604 else if (priv->epromtype == EEPROM_93C56)
605 {
606
607 for (i=0; i<3; i++)
608 {
609 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[0];
610 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[0];
611 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[0];
612 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[0];
613 }
614 for (i=3; i<9; i++)
615 {
616 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[1];
617 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[1];
618 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[1];
619 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[1];
620 }
621 for (i=9; i<14; i++)
622 {
623 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[2];
624 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[2];
625 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[2];
626 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[2];
627 }
628 for (i=0; i<14; i++)
629 RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_A[%d] = 0x%x\n", i, priv->TxPowerLevelCCK_A[i]);
630 for (i=0; i<14; i++)
631 RT_TRACE(COMP_INIT,"priv->TxPowerLevelOFDM24G_A[%d] = 0x%x\n", i, priv->TxPowerLevelOFDM24G_A[i]);
632 for (i=0; i<14; i++)
633 RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_C[%d] = 0x%x\n", i, priv->TxPowerLevelCCK_C[i]);
634 for (i=0; i<14; i++)
635 RT_TRACE(COMP_INIT, "priv->TxPowerLevelOFDM24G_C[%d] = 0x%x\n", i, priv->TxPowerLevelOFDM24G_C[i]);
636 priv->LegacyHTTxPowerDiff = priv->EEPROMLegacyHTTxPowerDiff;
637 priv->AntennaTxPwDiff[0] = 0;
638 priv->AntennaTxPwDiff[1] = 0;
639 priv->AntennaTxPwDiff[2] = 0;
640 priv->CrystalCap = priv->EEPROMCrystalCap;
641 priv->ThermalMeter[0] = (priv->EEPROMThermalMeter & 0xf);
642 priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter & 0xf0)>>4);
643 }
644 }
645
646 if (priv->rf_type == RF_1T2R)
647 {
648 RT_TRACE(COMP_INIT, "\n1T2R config\n");
649 }
650 else if (priv->rf_type == RF_2T4R)
651 {
652 RT_TRACE(COMP_INIT, "\n2T4R config\n");
653 }
654
655 init_rate_adaptive(dev);
656
657
658 priv->rf_chip= RF_8256;
659
660 if (priv->RegChannelPlan == 0xf)
661 {
662 priv->ChannelPlan = priv->eeprom_ChannelPlan;
663 }
664 else
665 {
666 priv->ChannelPlan = priv->RegChannelPlan;
667 }
668
669 if ( priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304 )
670 {
671 priv->CustomerID = RT_CID_DLINK;
672 }
673
674 switch (priv->eeprom_CustomerID)
675 {
676 case EEPROM_CID_DEFAULT:
677 priv->CustomerID = RT_CID_DEFAULT;
678 break;
679 case EEPROM_CID_CAMEO:
680 priv->CustomerID = RT_CID_819x_CAMEO;
681 break;
682 case EEPROM_CID_RUNTOP:
683 priv->CustomerID = RT_CID_819x_RUNTOP;
684 break;
685 case EEPROM_CID_NetCore:
686 priv->CustomerID = RT_CID_819x_Netcore;
687 break;
688 case EEPROM_CID_TOSHIBA:
689 priv->CustomerID = RT_CID_TOSHIBA;
690 if (priv->eeprom_ChannelPlan&0x80)
691 priv->ChannelPlan = priv->eeprom_ChannelPlan&0x7f;
692 else
693 priv->ChannelPlan = 0x0;
694 RT_TRACE(COMP_INIT, "Toshiba ChannelPlan = 0x%x\n",
695 priv->ChannelPlan);
696 break;
697 case EEPROM_CID_Nettronix:
698 priv->ScanDelay = 100;
699 priv->CustomerID = RT_CID_Nettronix;
700 break;
701 case EEPROM_CID_Pronet:
702 priv->CustomerID = RT_CID_PRONET;
703 break;
704 case EEPROM_CID_DLINK:
705 priv->CustomerID = RT_CID_DLINK;
706 break;
707
708 case EEPROM_CID_WHQL:
709
710
711
712 break;
713 default:
714 break;
715 }
716
717 if (priv->ChannelPlan > CHANNEL_PLAN_LEN - 1)
718 priv->ChannelPlan = 0;
719#ifdef ENABLE_DOT11D
720 priv->ChannelPlan = COUNTRY_CODE_WORLD_WIDE_13;
721#endif
722
723#ifdef TO_DO_LIST
724 switch (priv->CustomerID)
725 {
726 case RT_CID_DEFAULT:
727#ifdef RTL8190P
728 priv->LedStrategy = HW_LED;
729#elif defined RTL8192E
730 priv->LedStrategy = SW_LED_MODE1;
731#endif
732 break;
733
734 case RT_CID_819x_CAMEO:
735 priv->LedStrategy = SW_LED_MODE2;
736 break;
737
738 case RT_CID_819x_RUNTOP:
739 priv->LedStrategy = SW_LED_MODE3;
740 break;
741
742 case RT_CID_819x_Netcore:
743 priv->LedStrategy = SW_LED_MODE4;
744 break;
745
746 case RT_CID_Nettronix:
747 priv->LedStrategy = SW_LED_MODE5;
748 break;
749
750 case RT_CID_PRONET:
751 priv->LedStrategy = SW_LED_MODE6;
752 break;
753
754 case RT_CID_TOSHIBA:
755
756 default:
757#ifdef RTL8190P
758 priv->LedStrategy = HW_LED;
759#elif defined RTL8192E
760 priv->LedStrategy = SW_LED_MODE1;
761#endif
762 break;
763 }
764 RT_TRACE(COMP_INIT, "LedStrategy = %d \n", priv->LedStrategy);
765#endif
766
767 if ( priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304)
768 priv->rtllib->bSupportRemoteWakeUp = true;
769 else
770 priv->rtllib->bSupportRemoteWakeUp = false;
771
772 RT_TRACE(COMP_INIT, "RegChannelPlan(%d)\n", priv->RegChannelPlan);
773 RT_TRACE(COMP_INIT, "ChannelPlan = %d \n", priv->ChannelPlan);
774 RT_TRACE(COMP_TRACE, "<==== ReadAdapterInfo\n");
775
776 return ;
777}
778
779void rtl8192_get_eeprom_size(struct net_device* dev)
780{
781 u16 curCR = 0;
782 struct r8192_priv *priv = rtllib_priv(dev);
783 RT_TRACE(COMP_INIT, "===========>%s()\n", __func__);
784 curCR = read_nic_dword(dev, EPROM_CMD);
785 RT_TRACE(COMP_INIT, "read from Reg Cmd9346CR(%x):%x\n", EPROM_CMD, curCR);
786 priv->epromtype = (curCR & EPROM_CMD_9356SEL) ? EEPROM_93C56 : EEPROM_93C46;
787 RT_TRACE(COMP_INIT, "<===========%s(), epromtype:%d\n", __func__, priv->epromtype);
788 rtl8192_read_eeprom_info(dev);
789}
790
791static void rtl8192_hwconfig(struct net_device* dev)
792{
793 u32 regRATR = 0, regRRSR = 0;
794 u8 regBwOpMode = 0, regTmp = 0;
795 struct r8192_priv *priv = rtllib_priv(dev);
796
797 switch (priv->rtllib->mode)
798 {
799 case WIRELESS_MODE_B:
800 regBwOpMode = BW_OPMODE_20MHZ;
801 regRATR = RATE_ALL_CCK;
802 regRRSR = RATE_ALL_CCK;
803 break;
804 case WIRELESS_MODE_A:
805 regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
806 regRATR = RATE_ALL_OFDM_AG;
807 regRRSR = RATE_ALL_OFDM_AG;
808 break;
809 case WIRELESS_MODE_G:
810 regBwOpMode = BW_OPMODE_20MHZ;
811 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
812 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
813 break;
814 case WIRELESS_MODE_AUTO:
815 case WIRELESS_MODE_N_24G:
816 regBwOpMode = BW_OPMODE_20MHZ;
817 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
818 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
819 break;
820 case WIRELESS_MODE_N_5G:
821 regBwOpMode = BW_OPMODE_5G;
822 regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
823 regRRSR = RATE_ALL_OFDM_AG;
824 break;
825 default:
826 regBwOpMode = BW_OPMODE_20MHZ;
827 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
828 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
829 break;
830 }
831
832 write_nic_byte(dev, BW_OPMODE, regBwOpMode);
833 {
834 u32 ratr_value = 0;
835 ratr_value = regRATR;
836 if (priv->rf_type == RF_1T2R)
837 {
838 ratr_value &= ~(RATE_ALL_OFDM_2SS);
839 }
840 write_nic_dword(dev, RATR0, ratr_value);
841 write_nic_byte(dev, UFWP, 1);
842 }
843 regTmp = read_nic_byte(dev, 0x313);
844 regRRSR = ((regTmp) << 24) | (regRRSR & 0x00ffffff);
845 write_nic_dword(dev, RRSR, regRRSR);
846
847 write_nic_word(dev, RETRY_LIMIT,
848 priv->ShortRetryLimit << RETRY_LIMIT_SHORT_SHIFT | \
849 priv->LongRetryLimit << RETRY_LIMIT_LONG_SHIFT);
850
851
852
853}
854
855bool rtl8192_adapter_start(struct net_device *dev)
856{
857 struct r8192_priv *priv = rtllib_priv(dev);
858 u32 ulRegRead;
859 bool rtStatus = true;
860 u8 tmpvalue;
861#ifdef RTL8192E
862 u8 ICVersion,SwitchingRegulatorOutput;
863#endif
864 bool bfirmwareok = true;
865#ifdef RTL8190P
866 u8 ucRegRead;
867#endif
868 u32 tmpRegA, tmpRegC, TempCCk;
869 int i = 0;
870 u32 retry_times = 0;
871
872 RT_TRACE(COMP_INIT, "====>%s()\n", __func__);
873 priv->being_init_adapter = true;
874
875#ifdef CONFIG_ASPM_OR_D3
876 RT_DISABLE_ASPM(dev);
877#endif
878
879start:
880 rtl8192_pci_resetdescring(dev);
881 priv->Rf_Mode = RF_OP_By_SW_3wire;
882#ifdef RTL8192E
883 if (priv->ResetProgress == RESET_TYPE_NORESET)
884 {
885 write_nic_byte(dev, ANAPAR, 0x37);
886 mdelay(500);
887 }
888#endif
889 priv->pFirmware->firmware_status = FW_STATUS_0_INIT;
890
891 if (priv->RegRfOff == true)
892 priv->rtllib->eRFPowerState = eRfOff;
893
894 ulRegRead = read_nic_dword(dev, CPU_GEN);
895 if (priv->pFirmware->firmware_status == FW_STATUS_0_INIT)
896 {
897 ulRegRead |= CPU_GEN_SYSTEM_RESET;
898 }else if (priv->pFirmware->firmware_status == FW_STATUS_5_READY)
899 ulRegRead |= CPU_GEN_FIRMWARE_RESET;
900 else
901 RT_TRACE(COMP_ERR, "ERROR in %s(): undefined firmware state(%d)\n", __func__, priv->pFirmware->firmware_status);
902
903#ifdef RTL8190P
904 ulRegRead &= (~(CPU_GEN_GPIO_UART));
905#endif
906
907 write_nic_dword(dev, CPU_GEN, ulRegRead);
908
909#ifdef RTL8192E
910
911 ICVersion = read_nic_byte(dev, IC_VERRSION);
912 if (ICVersion >= 0x4)
913 {
914 SwitchingRegulatorOutput = read_nic_byte(dev, SWREGULATOR);
915 if (SwitchingRegulatorOutput != 0xb8)
916 {
917 write_nic_byte(dev, SWREGULATOR, 0xa8);
918 mdelay(1);
919 write_nic_byte(dev, SWREGULATOR, 0xb8);
920 }
921 }
922#endif
923 RT_TRACE(COMP_INIT, "BB Config Start!\n");
924 rtStatus = rtl8192_BBConfig(dev);
925 if (rtStatus != true)
926 {
927 RT_TRACE(COMP_ERR, "BB Config failed\n");
928 return rtStatus;
929 }
930 RT_TRACE(COMP_INIT,"BB Config Finished!\n");
931
932 priv->LoopbackMode = RTL819X_NO_LOOPBACK;
933 if (priv->ResetProgress == RESET_TYPE_NORESET)
934 {
935 ulRegRead = read_nic_dword(dev, CPU_GEN);
936 if (priv->LoopbackMode == RTL819X_NO_LOOPBACK)
937 {
938 ulRegRead = ((ulRegRead & CPU_GEN_NO_LOOPBACK_MSK) | CPU_GEN_NO_LOOPBACK_SET);
939 }
940 else if (priv->LoopbackMode == RTL819X_MAC_LOOPBACK )
941 {
942 ulRegRead |= CPU_CCK_LOOPBACK;
943 }
944 else
945 {
946 RT_TRACE(COMP_ERR,"Serious error: wrong loopback mode setting\n");
947 }
948
949 write_nic_dword(dev, CPU_GEN, ulRegRead);
950
951 udelay(500);
952 }
953 rtl8192_hwconfig(dev);
954 write_nic_byte(dev, CMDR, CR_RE|CR_TE);
955
956#ifdef RTL8190P
957 write_nic_byte(dev, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) | \
958 (MXDMA2_NoLimit<<MXDMA2_TX_SHIFT) | \
959 (1<<MULRW_SHIFT)));
960#elif defined RTL8192E
961 write_nic_byte(dev, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) |\
962 (MXDMA2_NoLimit<<MXDMA2_TX_SHIFT) ));
963#endif
964 write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]);
965 write_nic_word(dev, MAC4, ((u16*)(dev->dev_addr + 4))[0]);
966 write_nic_dword(dev, RCR, priv->ReceiveConfig);
967
968#ifdef TO_DO_LIST
969 if (priv->bInHctTest)
970 {
971 write_nic_dword(dev, RQPN1, NUM_OF_PAGE_IN_FW_QUEUE_BK_DTM << RSVD_FW_QUEUE_PAGE_BK_SHIFT |\
972 NUM_OF_PAGE_IN_FW_QUEUE_BE_DTM << RSVD_FW_QUEUE_PAGE_BE_SHIFT | \
973 NUM_OF_PAGE_IN_FW_QUEUE_VI_DTM << RSVD_FW_QUEUE_PAGE_VI_SHIFT | \
974 NUM_OF_PAGE_IN_FW_QUEUE_VO_DTM <<RSVD_FW_QUEUE_PAGE_VO_SHIFT);
975 write_nic_dword(dev, RQPN2, NUM_OF_PAGE_IN_FW_QUEUE_MGNT << RSVD_FW_QUEUE_PAGE_MGNT_SHIFT);
976 write_nic_dword(dev, RQPN3, APPLIED_RESERVED_QUEUE_IN_FW| \
977 NUM_OF_PAGE_IN_FW_QUEUE_BCN<<RSVD_FW_QUEUE_PAGE_BCN_SHIFT|\
978 NUM_OF_PAGE_IN_FW_QUEUE_PUB_DTM<<RSVD_FW_QUEUE_PAGE_PUB_SHIFT);
979 }
980 else
981#endif
982 {
983 write_nic_dword(dev, RQPN1, NUM_OF_PAGE_IN_FW_QUEUE_BK << RSVD_FW_QUEUE_PAGE_BK_SHIFT |\
984 NUM_OF_PAGE_IN_FW_QUEUE_BE << RSVD_FW_QUEUE_PAGE_BE_SHIFT | \
985 NUM_OF_PAGE_IN_FW_QUEUE_VI << RSVD_FW_QUEUE_PAGE_VI_SHIFT | \
986 NUM_OF_PAGE_IN_FW_QUEUE_VO <<RSVD_FW_QUEUE_PAGE_VO_SHIFT);
987 write_nic_dword(dev, RQPN2, NUM_OF_PAGE_IN_FW_QUEUE_MGNT << RSVD_FW_QUEUE_PAGE_MGNT_SHIFT);
988 write_nic_dword(dev, RQPN3, APPLIED_RESERVED_QUEUE_IN_FW| \
989 NUM_OF_PAGE_IN_FW_QUEUE_BCN<<RSVD_FW_QUEUE_PAGE_BCN_SHIFT|\
990 NUM_OF_PAGE_IN_FW_QUEUE_PUB<<RSVD_FW_QUEUE_PAGE_PUB_SHIFT);
991 }
992
993 rtl8192_tx_enable(dev);
994 rtl8192_rx_enable(dev);
995 ulRegRead = (0xFFF00000 & read_nic_dword(dev, RRSR)) | RATE_ALL_OFDM_AG | RATE_ALL_CCK;
996 write_nic_dword(dev, RRSR, ulRegRead);
997 write_nic_dword(dev, RATR0+4*7, (RATE_ALL_OFDM_AG | RATE_ALL_CCK));
998
999 write_nic_byte(dev, ACK_TIMEOUT, 0x30);
1000
1001 if (priv->ResetProgress == RESET_TYPE_NORESET)
1002 rtl8192_SetWirelessMode(dev, priv->rtllib->mode);
1003 CamResetAllEntry(dev);
1004 {
1005 u8 SECR_value = 0x0;
1006 SECR_value |= SCR_TxEncEnable;
1007 SECR_value |= SCR_RxDecEnable;
1008 SECR_value |= SCR_NoSKMC;
1009 write_nic_byte(dev, SECR, SECR_value);
1010 }
1011 write_nic_word(dev, ATIMWND, 2);
1012 write_nic_word(dev, BCN_INTERVAL, 100);
1013 {
1014 int i;
1015 for (i=0; i<QOS_QUEUE_NUM; i++)
1016 write_nic_dword(dev, WDCAPARA_ADD[i], 0x005e4332);
1017 }
1018 write_nic_byte(dev, 0xbe, 0xc0);
1019
1020 rtl8192_phy_configmac(dev);
1021
1022 if (priv->card_8192_version > (u8) VERSION_8190_BD) {
1023 rtl8192_phy_getTxPower(dev);
1024 rtl8192_phy_setTxPower(dev, priv->chan);
1025 }
1026
1027 tmpvalue = read_nic_byte(dev, IC_VERRSION);
1028 priv->IC_Cut= tmpvalue;
1029 RT_TRACE(COMP_INIT, "priv->IC_Cut= 0x%x\n", priv->IC_Cut);
1030 if (priv->IC_Cut>= IC_VersionCut_D)
1031 {
1032 if (priv->IC_Cut== IC_VersionCut_D) {
1033 RT_TRACE(COMP_INIT, "D-cut\n");
1034 } else if (priv->IC_Cut== IC_VersionCut_E) {
1035 RT_TRACE(COMP_INIT, "E-cut\n");
1036 }
1037 } else {
1038 RT_TRACE(COMP_INIT, "Before C-cut\n");
1039 }
1040
1041 RT_TRACE(COMP_INIT, "Load Firmware!\n");
1042 bfirmwareok = init_firmware(dev);
1043 if (!bfirmwareok) {
1044 if (retry_times < 10) {
1045 retry_times++;
1046 goto start;
1047 } else {
1048 rtStatus = false;
1049 goto end;
1050 }
1051 }
1052 RT_TRACE(COMP_INIT, "Load Firmware finished!\n");
1053 if (priv->ResetProgress == RESET_TYPE_NORESET) {
1054 RT_TRACE(COMP_INIT, "RF Config Started!\n");
1055 rtStatus = rtl8192_phy_RFConfig(dev);
1056 if (rtStatus != true) {
1057 RT_TRACE(COMP_ERR, "RF Config failed\n");
1058 return rtStatus;
1059 }
1060 RT_TRACE(COMP_INIT, "RF Config Finished!\n");
1061 }
1062 rtl8192_phy_updateInitGain(dev);
1063
1064 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
1065 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
1066
1067#ifdef RTL8192E
1068 write_nic_byte(dev, 0x87, 0x0);
1069#endif
1070#ifdef RTL8190P
1071 ucRegRead = read_nic_byte(dev, GPE);
1072 ucRegRead |= BIT0;
1073 write_nic_byte(dev, GPE, ucRegRead);
1074
1075 ucRegRead = read_nic_byte(dev, GPO);
1076 ucRegRead &= ~BIT0;
1077 write_nic_byte(dev, GPO, ucRegRead);
1078#endif
1079
1080 if (priv->RegRfOff == true) {
1081 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RegRfOff ----------\n",__func__);
1082 MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_SW,true);
1083 } else if (priv->rtllib->RfOffReason > RF_CHANGE_BY_PS) {
1084 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RfOffReason(%d) ----------\n", __func__,priv->rtllib->RfOffReason);
1085 MgntActSet_RF_State(dev, eRfOff, priv->rtllib->RfOffReason,true);
1086 } else if (priv->rtllib->RfOffReason >= RF_CHANGE_BY_IPS) {
1087 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RfOffReason(%d) ----------\n", __func__,priv->rtllib->RfOffReason);
1088 MgntActSet_RF_State(dev, eRfOff, priv->rtllib->RfOffReason,true);
1089 } else {
1090 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): RF-ON \n",__func__);
1091 priv->rtllib->eRFPowerState = eRfOn;
1092 priv->rtllib->RfOffReason = 0;
1093
1094
1095 }
1096
1097 if (priv->rtllib->FwRWRF)
1098 priv->Rf_Mode = RF_OP_By_FW;
1099 else
1100 priv->Rf_Mode = RF_OP_By_SW_3wire;
1101
1102 if (priv->ResetProgress == RESET_TYPE_NORESET)
1103 {
1104 dm_initialize_txpower_tracking(dev);
1105
1106 if (priv->IC_Cut>= IC_VersionCut_D) {
1107 tmpRegA= rtl8192_QueryBBReg(dev,rOFDM0_XATxIQImbalance,bMaskDWord);
1108 tmpRegC= rtl8192_QueryBBReg(dev,rOFDM0_XCTxIQImbalance,bMaskDWord);
1109 for (i = 0; i<TxBBGainTableLength; i++) {
1110 if (tmpRegA == priv->txbbgain_table[i].txbbgain_value) {
1111 priv->rfa_txpowertrackingindex= (u8)i;
1112 priv->rfa_txpowertrackingindex_real= (u8)i;
1113 priv->rfa_txpowertracking_default = priv->rfa_txpowertrackingindex;
1114 break;
1115 }
1116 }
1117
1118 TempCCk = rtl8192_QueryBBReg(dev, rCCK0_TxFilter1, bMaskByte2);
1119
1120 for (i = 0; i < CCKTxBBGainTableLength; i++) {
1121 if (TempCCk == priv->cck_txbbgain_table[i].ccktxbb_valuearray[0]) {
1122 priv->CCKPresentAttentuation_20Mdefault =(u8) i;
1123 break;
1124 }
1125 }
1126 priv->CCKPresentAttentuation_40Mdefault = 0;
1127 priv->CCKPresentAttentuation_difference = 0;
1128 priv->CCKPresentAttentuation = priv->CCKPresentAttentuation_20Mdefault;
1129 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_initial = %d\n", priv->rfa_txpowertrackingindex);
1130 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_real__initial = %d\n", priv->rfa_txpowertrackingindex_real);
1131 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_difference_initial = %d\n", priv->CCKPresentAttentuation_difference);
1132 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_initial = %d\n", priv->CCKPresentAttentuation);
1133 priv->btxpower_tracking = false;
1134 }
1135 }
1136 rtl8192_irq_enable(dev);
1137end:
1138 priv->being_init_adapter = false;
1139 return rtStatus;
1140}
1141
1142void rtl8192_net_update(struct net_device *dev)
1143{
1144
1145 struct r8192_priv *priv = rtllib_priv(dev);
1146 struct rtllib_network *net;
1147 u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
1148 u16 rate_config = 0;
1149
1150 net = &priv->rtllib->current_network;
1151 rtl8192_config_rate(dev, &rate_config);
1152 priv->dot11CurrentPreambleMode = PREAMBLE_AUTO;
1153 priv->basic_rate = rate_config &= 0x15f;
1154 write_nic_dword(dev,BSSIDR,((u32*)net->bssid)[0]);
1155 write_nic_word(dev,BSSIDR+4,((u16*)net->bssid)[2]);
1156
1157 if (priv->rtllib->iw_mode == IW_MODE_ADHOC) {
1158 write_nic_word(dev, ATIMWND, 2);
1159 write_nic_word(dev, BCN_DMATIME, 256);
1160 write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
1161 write_nic_word(dev, BCN_DRV_EARLY_INT, 10);
1162 write_nic_byte(dev, BCN_ERR_THRESH, 100);
1163
1164 BcnTimeCfg |= (BcnCW<<BCN_TCFG_CW_SHIFT);
1165 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
1166
1167 write_nic_word(dev, BCN_TCFG, BcnTimeCfg);
1168 }
1169}
1170
1171void rtl8192_link_change(struct net_device *dev)
1172{
1173 struct r8192_priv *priv = rtllib_priv(dev);
1174 struct rtllib_device* ieee = priv->rtllib;
1175
1176 if (!priv->up)
1177 return;
1178
1179 if (ieee->state == RTLLIB_LINKED) {
1180 rtl8192_net_update(dev);
1181 priv->ops->update_ratr_table(dev);
1182 if ((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type))
1183 EnableHWSecurityConfig8192(dev);
1184 } else {
1185 write_nic_byte(dev, 0x173, 0);
1186 }
1187 rtl8192e_update_msr(dev);
1188
1189 if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC) {
1190 u32 reg = 0;
1191 reg = read_nic_dword(dev, RCR);
1192 if (priv->rtllib->state == RTLLIB_LINKED) {
1193 if (ieee->IntelPromiscuousModeInfo.bPromiscuousOn)
1194 ;
1195 else
1196 priv->ReceiveConfig = reg |= RCR_CBSSID;
1197 } else
1198 priv->ReceiveConfig = reg &= ~RCR_CBSSID;
1199
1200 write_nic_dword(dev, RCR, reg);
1201 }
1202}
1203
1204void rtl8192_AllowAllDestAddr(struct net_device* dev,
1205 bool bAllowAllDA, bool WriteIntoReg)
1206{
1207 struct r8192_priv* priv = rtllib_priv(dev);
1208
1209 if (bAllowAllDA)
1210 priv->ReceiveConfig |= RCR_AAP;
1211 else
1212 priv->ReceiveConfig &= ~RCR_AAP;
1213
1214 if (WriteIntoReg)
1215 write_nic_dword( dev, RCR, priv->ReceiveConfig );
1216}
1217
1218
1219static u8 MRateToHwRate8190Pci(u8 rate)
1220{
1221 u8 ret = DESC90_RATE1M;
1222
1223 switch (rate) {
1224 case MGN_1M:
1225 ret = DESC90_RATE1M;
1226 break;
1227 case MGN_2M:
1228 ret = DESC90_RATE2M;
1229 break;
1230 case MGN_5_5M:
1231 ret = DESC90_RATE5_5M;
1232 break;
1233 case MGN_11M:
1234 ret = DESC90_RATE11M;
1235 break;
1236 case MGN_6M:
1237 ret = DESC90_RATE6M;
1238 break;
1239 case MGN_9M:
1240 ret = DESC90_RATE9M;
1241 break;
1242 case MGN_12M:
1243 ret = DESC90_RATE12M;
1244 break;
1245 case MGN_18M:
1246 ret = DESC90_RATE18M;
1247 break;
1248 case MGN_24M:
1249 ret = DESC90_RATE24M;
1250 break;
1251 case MGN_36M:
1252 ret = DESC90_RATE36M;
1253 break;
1254 case MGN_48M:
1255 ret = DESC90_RATE48M;
1256 break;
1257 case MGN_54M:
1258 ret = DESC90_RATE54M;
1259 break;
1260 case MGN_MCS0:
1261 ret = DESC90_RATEMCS0;
1262 break;
1263 case MGN_MCS1:
1264 ret = DESC90_RATEMCS1;
1265 break;
1266 case MGN_MCS2:
1267 ret = DESC90_RATEMCS2;
1268 break;
1269 case MGN_MCS3:
1270 ret = DESC90_RATEMCS3;
1271 break;
1272 case MGN_MCS4:
1273 ret = DESC90_RATEMCS4;
1274 break;
1275 case MGN_MCS5:
1276 ret = DESC90_RATEMCS5;
1277 break;
1278 case MGN_MCS6:
1279 ret = DESC90_RATEMCS6;
1280 break;
1281 case MGN_MCS7:
1282 ret = DESC90_RATEMCS7;
1283 break;
1284 case MGN_MCS8:
1285 ret = DESC90_RATEMCS8;
1286 break;
1287 case MGN_MCS9:
1288 ret = DESC90_RATEMCS9;
1289 break;
1290 case MGN_MCS10:
1291 ret = DESC90_RATEMCS10;
1292 break;
1293 case MGN_MCS11:
1294 ret = DESC90_RATEMCS11;
1295 break;
1296 case MGN_MCS12:
1297 ret = DESC90_RATEMCS12;
1298 break;
1299 case MGN_MCS13:
1300 ret = DESC90_RATEMCS13;
1301 break;
1302 case MGN_MCS14:
1303 ret = DESC90_RATEMCS14;
1304 break;
1305 case MGN_MCS15:
1306 ret = DESC90_RATEMCS15;
1307 break;
1308 case (0x80|0x20):
1309 ret = DESC90_RATEMCS32;
1310 break;
1311 default:
1312 break;
1313 }
1314 return ret;
1315}
1316
1317u8 rtl8192_MapHwQueueToFirmwareQueue(u8 QueueID, u8 priority)
1318{
1319 u8 QueueSelect = 0x0;
1320
1321 switch (QueueID) {
1322 case BE_QUEUE:
1323 QueueSelect = QSLT_BE;
1324 break;
1325
1326 case BK_QUEUE:
1327 QueueSelect = QSLT_BK;
1328 break;
1329
1330 case VO_QUEUE:
1331 QueueSelect = QSLT_VO;
1332 break;
1333
1334 case VI_QUEUE:
1335 QueueSelect = QSLT_VI;
1336 break;
1337 case MGNT_QUEUE:
1338 QueueSelect = QSLT_MGNT;
1339 break;
1340 case BEACON_QUEUE:
1341 QueueSelect = QSLT_BEACON;
1342 break;
1343 case TXCMD_QUEUE:
1344 QueueSelect = QSLT_CMD;
1345 break;
1346 case HIGH_QUEUE:
1347 QueueSelect = QSLT_HIGH;
1348 break;
1349 default:
1350 RT_TRACE(COMP_ERR, "TransmitTCB(): Impossible Queue Selection:"
1351 " %d \n", QueueID);
1352 break;
1353 }
1354 return QueueSelect;
1355}
1356
1357
1358void rtl8192_tx_fill_desc(struct net_device* dev, tx_desc * pdesc, cb_desc * cb_desc, struct sk_buff* skb)
1359{
1360 struct r8192_priv *priv = rtllib_priv(dev);
1361 dma_addr_t mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
1362 TX_FWINFO_8190PCI *pTxFwInfo = NULL;
1363 pTxFwInfo = (PTX_FWINFO_8190PCI)skb->data;
1364 memset(pTxFwInfo,0,sizeof(TX_FWINFO_8190PCI));
1365 pTxFwInfo->TxHT = (cb_desc->data_rate&0x80)?1:0;
1366 pTxFwInfo->TxRate = MRateToHwRate8190Pci((u8)cb_desc->data_rate);
1367 pTxFwInfo->EnableCPUDur = cb_desc->bTxEnableFwCalcDur;
1368 pTxFwInfo->Short = rtl8192_QueryIsShort(pTxFwInfo->TxHT, pTxFwInfo->TxRate, cb_desc);
1369
1370 if (cb_desc->bAMPDUEnable) {
1371 pTxFwInfo->AllowAggregation = 1;
1372 pTxFwInfo->RxMF = cb_desc->ampdu_factor;
1373 pTxFwInfo->RxAMD = cb_desc->ampdu_density;
1374 } else {
1375 pTxFwInfo->AllowAggregation = 0;
1376 pTxFwInfo->RxMF = 0;
1377 pTxFwInfo->RxAMD = 0;
1378 }
1379
1380 pTxFwInfo->RtsEnable = (cb_desc->bRTSEnable)?1:0;
1381 pTxFwInfo->CtsEnable = (cb_desc->bCTSEnable)?1:0;
1382 pTxFwInfo->RtsSTBC = (cb_desc->bRTSSTBC)?1:0;
1383 pTxFwInfo->RtsHT= (cb_desc->rts_rate&0x80)?1:0;
1384 pTxFwInfo->RtsRate = MRateToHwRate8190Pci((u8)cb_desc->rts_rate);
1385 pTxFwInfo->RtsBandwidth = 0;
1386 pTxFwInfo->RtsSubcarrier = cb_desc->RTSSC;
1387 pTxFwInfo->RtsShort = (pTxFwInfo->RtsHT==0)?(cb_desc->bRTSUseShortPreamble?1:0):(cb_desc->bRTSUseShortGI?1:0);
1388 if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
1389 {
1390 if (cb_desc->bPacketBW)
1391 {
1392 pTxFwInfo->TxBandwidth = 1;
1393#ifdef RTL8190P
1394 pTxFwInfo->TxSubCarrier = 3;
1395#else
1396 pTxFwInfo->TxSubCarrier = 0;
1397#endif
1398 }
1399 else
1400 {
1401 pTxFwInfo->TxBandwidth = 0;
1402 pTxFwInfo->TxSubCarrier = priv->nCur40MhzPrimeSC;
1403 }
1404 } else {
1405 pTxFwInfo->TxBandwidth = 0;
1406 pTxFwInfo->TxSubCarrier = 0;
1407 }
1408
1409 memset((u8*)pdesc,0,12);
1410 pdesc->LINIP = 0;
1411 pdesc->CmdInit = 1;
1412 pdesc->Offset = sizeof(TX_FWINFO_8190PCI) + 8;
1413 pdesc->PktSize = (u16)skb->len-sizeof(TX_FWINFO_8190PCI);
1414
1415 pdesc->SecCAMID= 0;
1416 pdesc->RATid = cb_desc->RATRIndex;
1417
1418
1419 pdesc->NoEnc = 1;
1420 pdesc->SecType = 0x0;
1421 if (cb_desc->bHwSec) {
1422 static u8 tmp =0;
1423 if (!tmp) {
1424 RT_TRACE(COMP_DBG, "==>================hw sec\n");
1425 tmp = 1;
1426 }
1427 switch (priv->rtllib->pairwise_key_type) {
1428 case KEY_TYPE_WEP40:
1429 case KEY_TYPE_WEP104:
1430 pdesc->SecType = 0x1;
1431 pdesc->NoEnc = 0;
1432 break;
1433 case KEY_TYPE_TKIP:
1434 pdesc->SecType = 0x2;
1435 pdesc->NoEnc = 0;
1436 break;
1437 case KEY_TYPE_CCMP:
1438 pdesc->SecType = 0x3;
1439 pdesc->NoEnc = 0;
1440 break;
1441 case KEY_TYPE_NA:
1442 pdesc->SecType = 0x0;
1443 pdesc->NoEnc = 1;
1444 break;
1445 }
1446 }
1447
1448 pdesc->PktId = 0x0;
1449
1450 pdesc->QueueSelect = rtl8192_MapHwQueueToFirmwareQueue(cb_desc->queue_index, cb_desc->priority);
1451 pdesc->TxFWInfoSize = sizeof(TX_FWINFO_8190PCI);
1452
1453 pdesc->DISFB = cb_desc->bTxDisableRateFallBack;
1454 pdesc->USERATE = cb_desc->bTxUseDriverAssingedRate;
1455
1456 pdesc->FirstSeg =1;
1457 pdesc->LastSeg = 1;
1458 pdesc->TxBufferSize = skb->len;
1459
1460 pdesc->TxBuffAddr = cpu_to_le32(mapping);
1461}
1462
1463void rtl8192_tx_fill_cmd_desc(struct net_device* dev, tx_desc_cmd * entry,
1464 cb_desc * cb_desc, struct sk_buff* skb)
1465{
1466 struct r8192_priv *priv = rtllib_priv(dev);
1467 dma_addr_t mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
1468
1469 memset(entry,0,12);
1470 entry->LINIP = cb_desc->bLastIniPkt;
1471 entry->FirstSeg = 1;
1472 entry->LastSeg = 1;
1473 if (cb_desc->bCmdOrInit == DESC_PACKET_TYPE_INIT) {
1474 entry->CmdInit = DESC_PACKET_TYPE_INIT;
1475 } else {
1476 tx_desc* entry_tmp = (tx_desc*)entry;
1477 entry_tmp->CmdInit = DESC_PACKET_TYPE_NORMAL;
1478 entry_tmp->Offset = sizeof(TX_FWINFO_8190PCI) + 8;
1479 entry_tmp->PktSize = (u16)(cb_desc->pkt_size + entry_tmp->Offset);
1480 entry_tmp->QueueSelect = QSLT_CMD;
1481 entry_tmp->TxFWInfoSize = 0x08;
1482 entry_tmp->RATid = (u8)DESC_PACKET_TYPE_INIT;
1483 }
1484 entry->TxBufferSize = skb->len;
1485 entry->TxBuffAddr = cpu_to_le32(mapping);
1486 entry->OWN = 1;
1487}
1488
1489u8 HwRateToMRate90(bool bIsHT, u8 rate)
1490{
1491 u8 ret_rate = 0x02;
1492
1493 if (!bIsHT) {
1494 switch (rate) {
1495 case DESC90_RATE1M: ret_rate = MGN_1M; break;
1496 case DESC90_RATE2M: ret_rate = MGN_2M; break;
1497 case DESC90_RATE5_5M: ret_rate = MGN_5_5M; break;
1498 case DESC90_RATE11M: ret_rate = MGN_11M; break;
1499 case DESC90_RATE6M: ret_rate = MGN_6M; break;
1500 case DESC90_RATE9M: ret_rate = MGN_9M; break;
1501 case DESC90_RATE12M: ret_rate = MGN_12M; break;
1502 case DESC90_RATE18M: ret_rate = MGN_18M; break;
1503 case DESC90_RATE24M: ret_rate = MGN_24M; break;
1504 case DESC90_RATE36M: ret_rate = MGN_36M; break;
1505 case DESC90_RATE48M: ret_rate = MGN_48M; break;
1506 case DESC90_RATE54M: ret_rate = MGN_54M; break;
1507
1508 default:
1509 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
1510 break;
1511 }
1512
1513 } else {
1514 switch (rate) {
1515 case DESC90_RATEMCS0: ret_rate = MGN_MCS0; break;
1516 case DESC90_RATEMCS1: ret_rate = MGN_MCS1; break;
1517 case DESC90_RATEMCS2: ret_rate = MGN_MCS2; break;
1518 case DESC90_RATEMCS3: ret_rate = MGN_MCS3; break;
1519 case DESC90_RATEMCS4: ret_rate = MGN_MCS4; break;
1520 case DESC90_RATEMCS5: ret_rate = MGN_MCS5; break;
1521 case DESC90_RATEMCS6: ret_rate = MGN_MCS6; break;
1522 case DESC90_RATEMCS7: ret_rate = MGN_MCS7; break;
1523 case DESC90_RATEMCS8: ret_rate = MGN_MCS8; break;
1524 case DESC90_RATEMCS9: ret_rate = MGN_MCS9; break;
1525 case DESC90_RATEMCS10: ret_rate = MGN_MCS10; break;
1526 case DESC90_RATEMCS11: ret_rate = MGN_MCS11; break;
1527 case DESC90_RATEMCS12: ret_rate = MGN_MCS12; break;
1528 case DESC90_RATEMCS13: ret_rate = MGN_MCS13; break;
1529 case DESC90_RATEMCS14: ret_rate = MGN_MCS14; break;
1530 case DESC90_RATEMCS15: ret_rate = MGN_MCS15; break;
1531 case DESC90_RATEMCS32: ret_rate = (0x80|0x20); break;
1532
1533 default:
1534 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT);
1535 break;
1536 }
1537 }
1538
1539 return ret_rate;
1540}
1541
1542long
1543rtl8192_signal_scale_mapping(struct r8192_priv * priv,
1544 long currsig
1545 )
1546{
1547 long retsig;
1548
1549#if defined RTL8192SE || defined RTL8192CE
1550 if (priv->CustomerID == RT_CID_819x_Lenovo)
1551 {
1552 return currsig;
1553 }
1554 else if (priv->CustomerID == RT_CID_819x_Netcore)
1555 {
1556 if (currsig >= 31 && currsig <= 100)
1557 {
1558 retsig = 100;
1559 }
1560 else if (currsig >= 21 && currsig <= 30)
1561 {
1562 retsig = 90 + ((currsig - 20) / 1);
1563 }
1564 else if (currsig >= 11 && currsig <= 20)
1565 {
1566 retsig = 80 + ((currsig - 10) / 1);
1567 }
1568 else if (currsig >= 7 && currsig <= 10)
1569 {
1570 retsig = 69 + (currsig - 7);
1571 }
1572 else if (currsig == 6)
1573 {
1574 retsig = 54;
1575 }
1576 else if (currsig == 5)
1577 {
1578 retsig = 45;
1579 }
1580 else if (currsig == 4)
1581 {
1582 retsig = 36;
1583 }
1584 else if (currsig == 3)
1585 {
1586 retsig = 27;
1587 }
1588 else if (currsig == 2)
1589 {
1590 retsig = 18;
1591 }
1592 else if (currsig == 1)
1593 {
1594 retsig = 9;
1595 }
1596 else
1597 {
1598 retsig = currsig;
1599 }
1600 return retsig;
1601 }
1602#endif
1603
1604 if (currsig >= 61 && currsig <= 100)
1605 {
1606 retsig = 90 + ((currsig - 60) / 4);
1607 }
1608 else if (currsig >= 41 && currsig <= 60)
1609 {
1610 retsig = 78 + ((currsig - 40) / 2);
1611 }
1612 else if (currsig >= 31 && currsig <= 40)
1613 {
1614 retsig = 66 + (currsig - 30);
1615 }
1616 else if (currsig >= 21 && currsig <= 30)
1617 {
1618 retsig = 54 + (currsig - 20);
1619 }
1620 else if (currsig >= 5 && currsig <= 20)
1621 {
1622 retsig = 42 + (((currsig - 5) * 2) / 3);
1623 }
1624 else if (currsig == 4)
1625 {
1626 retsig = 36;
1627 }
1628 else if (currsig == 3)
1629 {
1630 retsig = 27;
1631 }
1632 else if (currsig == 2)
1633 {
1634 retsig = 18;
1635 }
1636 else if (currsig == 1)
1637 {
1638 retsig = 9;
1639 }
1640 else
1641 {
1642 retsig = currsig;
1643 }
1644
1645 return retsig;
1646}
1647
1648
1649#define rx_hal_is_cck_rate(_pdrvinfo)\
1650 (_pdrvinfo->RxRate == DESC90_RATE1M ||\
1651 _pdrvinfo->RxRate == DESC90_RATE2M ||\
1652 _pdrvinfo->RxRate == DESC90_RATE5_5M ||\
1653 _pdrvinfo->RxRate == DESC90_RATE11M) &&\
1654 !_pdrvinfo->RxHT
1655void rtl8192_query_rxphystatus(
1656 struct r8192_priv * priv,
1657 struct rtllib_rx_stats * pstats,
1658 prx_desc pdesc,
1659 prx_fwinfo pdrvinfo,
1660 struct rtllib_rx_stats * precord_stats,
1661 bool bpacket_match_bssid,
1662 bool bpacket_toself,
1663 bool bPacketBeacon,
1664 bool bToSelfBA
1665 )
1666{
1667 phy_sts_ofdm_819xpci_t* pofdm_buf;
1668 phy_sts_cck_819xpci_t * pcck_buf;
1669 phy_ofdm_rx_status_rxsc_sgien_exintfflag* prxsc;
1670 u8 *prxpkt;
1671 u8 i,max_spatial_stream, tmp_rxsnr, tmp_rxevm, rxsc_sgien_exflg;
1672 char rx_pwr[4], rx_pwr_all=0;
1673 char rx_snrX, rx_evmX;
1674 u8 evm, pwdb_all;
1675 u32 RSSI, total_rssi=0;
1676 u8 is_cck_rate=0;
1677 u8 rf_rx_num = 0;
1678
1679 static u8 check_reg824 = 0;
1680 static u32 reg824_bit9 = 0;
1681
1682 priv->stats.numqry_phystatus++;
1683
1684
1685 is_cck_rate = rx_hal_is_cck_rate(pdrvinfo);
1686 memset(precord_stats, 0, sizeof(struct rtllib_rx_stats));
1687 pstats->bPacketMatchBSSID = precord_stats->bPacketMatchBSSID = bpacket_match_bssid;
1688 pstats->bPacketToSelf = precord_stats->bPacketToSelf = bpacket_toself;
1689 pstats->bIsCCK = precord_stats->bIsCCK = is_cck_rate;
1690 pstats->bPacketBeacon = precord_stats->bPacketBeacon = bPacketBeacon;
1691 pstats->bToSelfBA = precord_stats->bToSelfBA = bToSelfBA;
1692 if (check_reg824 == 0)
1693 {
1694 reg824_bit9 = rtl8192_QueryBBReg(priv->rtllib->dev, rFPGA0_XA_HSSIParameter2, 0x200);
1695 check_reg824 = 1;
1696 }
1697
1698
1699 prxpkt = (u8*)pdrvinfo;
1700
1701 prxpkt += sizeof(rx_fwinfo);
1702
1703 pcck_buf = (phy_sts_cck_819xpci_t *)prxpkt;
1704 pofdm_buf = (phy_sts_ofdm_819xpci_t *)prxpkt;
1705
1706 pstats->RxMIMOSignalQuality[0] = -1;
1707 pstats->RxMIMOSignalQuality[1] = -1;
1708 precord_stats->RxMIMOSignalQuality[0] = -1;
1709 precord_stats->RxMIMOSignalQuality[1] = -1;
1710
1711 if (is_cck_rate)
1712 {
1713
1714 u8 report;
1715#ifdef RTL8190P
1716 u8 tmp_pwdb;
1717 char cck_adc_pwdb[4];
1718#endif
1719 priv->stats.numqry_phystatusCCK++;
1720
1721#ifdef RTL8190P
1722 if (priv->rf_type == RF_2T4R && DM_RxPathSelTable.Enable && bpacket_match_bssid)
1723 {
1724 for (i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
1725 {
1726 tmp_pwdb = pcck_buf->adc_pwdb_X[i];
1727 cck_adc_pwdb[i] = (char)tmp_pwdb;
1728 cck_adc_pwdb[i] /= 2;
1729 pstats->cck_adc_pwdb[i] = precord_stats->cck_adc_pwdb[i] = cck_adc_pwdb[i];
1730 }
1731 }
1732#endif
1733
1734 if (!reg824_bit9)
1735 {
1736 report = pcck_buf->cck_agc_rpt & 0xc0;
1737 report = report>>6;
1738 switch (report)
1739 {
1740 case 0x3:
1741 rx_pwr_all = -35 - (pcck_buf->cck_agc_rpt & 0x3e);
1742 break;
1743 case 0x2:
1744 rx_pwr_all = -23 - (pcck_buf->cck_agc_rpt & 0x3e);
1745 break;
1746 case 0x1:
1747 rx_pwr_all = -11 - (pcck_buf->cck_agc_rpt & 0x3e);
1748 break;
1749 case 0x0:
1750 rx_pwr_all = 8 - (pcck_buf->cck_agc_rpt & 0x3e);
1751 break;
1752 }
1753 }
1754 else
1755 {
1756 report = pcck_buf->cck_agc_rpt & 0x60;
1757 report = report>>5;
1758 switch (report)
1759 {
1760 case 0x3:
1761 rx_pwr_all = -35 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
1762 break;
1763 case 0x2:
1764 rx_pwr_all = -23 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1);
1765 break;
1766 case 0x1:
1767 rx_pwr_all = -11 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
1768 break;
1769 case 0x0:
1770 rx_pwr_all = -8 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
1771 break;
1772 }
1773 }
1774
1775 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
1776 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
1777 pstats->RecvSignalPower = rx_pwr_all;
1778
1779 if (bpacket_match_bssid)
1780 {
1781 u8 sq;
1782
1783 if (pstats->RxPWDBAll > 40)
1784 {
1785 sq = 100;
1786 }else
1787 {
1788 sq = pcck_buf->sq_rpt;
1789
1790 if (pcck_buf->sq_rpt > 64)
1791 sq = 0;
1792 else if (pcck_buf->sq_rpt < 20)
1793 sq = 100;
1794 else
1795 sq = ((64-sq) * 100) / 44;
1796 }
1797 pstats->SignalQuality = precord_stats->SignalQuality = sq;
1798 pstats->RxMIMOSignalQuality[0] = precord_stats->RxMIMOSignalQuality[0] = sq;
1799 pstats->RxMIMOSignalQuality[1] = precord_stats->RxMIMOSignalQuality[1] = -1;
1800 }
1801 }
1802 else
1803 {
1804 priv->stats.numqry_phystatusHT++;
1805 for (i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
1806 {
1807 if (priv->brfpath_rxenable[i])
1808 rf_rx_num++;
1809
1810#ifdef RTL8190P
1811 rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 106;
1812#else
1813 rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 110;
1814#endif
1815
1816 tmp_rxsnr = pofdm_buf->rxsnr_X[i];
1817 rx_snrX = (char)(tmp_rxsnr);
1818 rx_snrX /= 2;
1819 priv->stats.rxSNRdB[i] = (long)rx_snrX;
1820
1821 RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]);
1822 if (priv->brfpath_rxenable[i])
1823 total_rssi += RSSI;
1824
1825 if (bpacket_match_bssid)
1826 {
1827 pstats->RxMIMOSignalStrength[i] =(u8) RSSI;
1828 precord_stats->RxMIMOSignalStrength[i] =(u8) RSSI;
1829 }
1830 }
1831
1832
1833 rx_pwr_all = (((pofdm_buf->pwdb_all ) >> 1 )& 0x7f) -106;
1834 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
1835
1836 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
1837 pstats->RxPower = precord_stats->RxPower = rx_pwr_all;
1838 pstats->RecvSignalPower = rx_pwr_all;
1839 if (pdrvinfo->RxHT && pdrvinfo->RxRate>=DESC90_RATEMCS8 &&
1840 pdrvinfo->RxRate<=DESC90_RATEMCS15)
1841 max_spatial_stream = 2;
1842 else
1843 max_spatial_stream = 1;
1844
1845 for (i=0; i<max_spatial_stream; i++)
1846 {
1847 tmp_rxevm = pofdm_buf->rxevm_X[i];
1848 rx_evmX = (char)(tmp_rxevm);
1849
1850 rx_evmX /= 2;
1851
1852 evm = rtl819x_evm_dbtopercentage(rx_evmX);
1853 if (bpacket_match_bssid)
1854 {
1855 if (i==0)
1856 pstats->SignalQuality = precord_stats->SignalQuality = (u8)(evm & 0xff);
1857 pstats->RxMIMOSignalQuality[i] = precord_stats->RxMIMOSignalQuality[i] = (u8)(evm & 0xff);
1858 }
1859 }
1860
1861
1862 rxsc_sgien_exflg = pofdm_buf->rxsc_sgien_exflg;
1863 prxsc = (phy_ofdm_rx_status_rxsc_sgien_exintfflag *)&rxsc_sgien_exflg;
1864 if (pdrvinfo->BW)
1865 priv->stats.received_bwtype[1+prxsc->rxsc]++;
1866 else
1867 priv->stats.received_bwtype[0]++;
1868 }
1869
1870 if (is_cck_rate)
1871 {
1872 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl8192_signal_scale_mapping(priv,(long)pwdb_all));
1873
1874 }
1875 else
1876 {
1877 if (rf_rx_num != 0)
1878 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl8192_signal_scale_mapping(priv,(long)(total_rssi/=rf_rx_num)));
1879 }
1880}
1881
1882void rtl8192_process_phyinfo(struct r8192_priv * priv, u8* buffer,struct rtllib_rx_stats * pprevious_stats, struct rtllib_rx_stats * pcurrent_stats)
1883{
1884 bool bcheck = false;
1885 u8 rfpath;
1886 u32 nspatial_stream, tmp_val;
1887 static u32 slide_rssi_index=0, slide_rssi_statistics=0;
1888 static u32 slide_evm_index=0, slide_evm_statistics=0;
1889 static u32 last_rssi=0, last_evm=0;
1890 static u32 slide_beacon_adc_pwdb_index=0, slide_beacon_adc_pwdb_statistics=0;
1891 static u32 last_beacon_adc_pwdb=0;
1892
1893 struct rtllib_hdr_3addr *hdr;
1894 u16 sc ;
1895 unsigned int frag,seq;
1896 hdr = (struct rtllib_hdr_3addr *)buffer;
1897 sc = le16_to_cpu(hdr->seq_ctl);
1898 frag = WLAN_GET_SEQ_FRAG(sc);
1899 seq = WLAN_GET_SEQ_SEQ(sc);
1900 pcurrent_stats->Seq_Num = seq;
1901 if (!pprevious_stats->bIsAMPDU)
1902 bcheck = true;
1903
1904 if (slide_rssi_statistics++ >= PHY_RSSI_SLID_WIN_MAX)
1905 {
1906 slide_rssi_statistics = PHY_RSSI_SLID_WIN_MAX;
1907 last_rssi = priv->stats.slide_signal_strength[slide_rssi_index];
1908 priv->stats.slide_rssi_total -= last_rssi;
1909 }
1910 priv->stats.slide_rssi_total += pprevious_stats->SignalStrength;
1911
1912 priv->stats.slide_signal_strength[slide_rssi_index++] = pprevious_stats->SignalStrength;
1913 if (slide_rssi_index >= PHY_RSSI_SLID_WIN_MAX)
1914 slide_rssi_index = 0;
1915
1916 tmp_val = priv->stats.slide_rssi_total/slide_rssi_statistics;
1917 priv->stats.signal_strength = rtl819x_translate_todbm(priv, (u8)tmp_val);
1918 pcurrent_stats->rssi = priv->stats.signal_strength;
1919 if (!pprevious_stats->bPacketMatchBSSID)
1920 {
1921 if (!pprevious_stats->bToSelfBA)
1922 return;
1923 }
1924
1925 if (!bcheck)
1926 return;
1927
1928 rtl819x_process_cck_rxpathsel(priv,pprevious_stats);
1929
1930 priv->stats.num_process_phyinfo++;
1931 if (!pprevious_stats->bIsCCK && pprevious_stats->bPacketToSelf)
1932 {
1933 for (rfpath = RF90_PATH_A; rfpath < RF90_PATH_C; rfpath++)
1934 {
1935 if (!rtl8192_phy_CheckIsLegalRFPath(priv->rtllib->dev, rfpath))
1936 continue;
1937 RT_TRACE(COMP_DBG,"Jacken -> pPreviousstats->RxMIMOSignalStrength[rfpath] = %d \n" ,pprevious_stats->RxMIMOSignalStrength[rfpath] );
1938 if (priv->stats.rx_rssi_percentage[rfpath] == 0)
1939 {
1940 priv->stats.rx_rssi_percentage[rfpath] = pprevious_stats->RxMIMOSignalStrength[rfpath];
1941 }
1942 if (pprevious_stats->RxMIMOSignalStrength[rfpath] > priv->stats.rx_rssi_percentage[rfpath])
1943 {
1944 priv->stats.rx_rssi_percentage[rfpath] =
1945 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
1946 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
1947 priv->stats.rx_rssi_percentage[rfpath] = priv->stats.rx_rssi_percentage[rfpath] + 1;
1948 }
1949 else
1950 {
1951 priv->stats.rx_rssi_percentage[rfpath] =
1952 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
1953 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
1954 }
1955 RT_TRACE(COMP_DBG,"Jacken -> priv->RxStats.RxRSSIPercentage[rfPath] = %d \n" ,priv->stats.rx_rssi_percentage[rfpath] );
1956 }
1957 }
1958
1959
1960 if (pprevious_stats->bPacketBeacon)
1961 {
1962 if (slide_beacon_adc_pwdb_statistics++ >= PHY_Beacon_RSSI_SLID_WIN_MAX)
1963 {
1964 slide_beacon_adc_pwdb_statistics = PHY_Beacon_RSSI_SLID_WIN_MAX;
1965 last_beacon_adc_pwdb = priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index];
1966 priv->stats.Slide_Beacon_Total -= last_beacon_adc_pwdb;
1967 }
1968 priv->stats.Slide_Beacon_Total += pprevious_stats->RxPWDBAll;
1969 priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index] = pprevious_stats->RxPWDBAll;
1970 slide_beacon_adc_pwdb_index++;
1971 if (slide_beacon_adc_pwdb_index >= PHY_Beacon_RSSI_SLID_WIN_MAX)
1972 slide_beacon_adc_pwdb_index = 0;
1973 pprevious_stats->RxPWDBAll = priv->stats.Slide_Beacon_Total/slide_beacon_adc_pwdb_statistics;
1974 if (pprevious_stats->RxPWDBAll >= 3)
1975 pprevious_stats->RxPWDBAll -= 3;
1976 }
1977
1978 RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
1979 pprevious_stats->bIsCCK? "CCK": "OFDM",
1980 pprevious_stats->RxPWDBAll);
1981
1982 if (pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
1983 {
1984 if (priv->undecorated_smoothed_pwdb < 0)
1985 {
1986 priv->undecorated_smoothed_pwdb = pprevious_stats->RxPWDBAll;
1987 }
1988 if (pprevious_stats->RxPWDBAll > (u32)priv->undecorated_smoothed_pwdb)
1989 {
1990 priv->undecorated_smoothed_pwdb =
1991 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
1992 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
1993 priv->undecorated_smoothed_pwdb = priv->undecorated_smoothed_pwdb + 1;
1994 }
1995 else
1996 {
1997 priv->undecorated_smoothed_pwdb =
1998 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
1999 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
2000 }
2001 rtl819x_update_rxsignalstatistics8190pci(priv,pprevious_stats);
2002 }
2003
2004 if (pprevious_stats->SignalQuality == 0)
2005 {
2006 }
2007 else
2008 {
2009 if (pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA){
2010 if (slide_evm_statistics++ >= PHY_RSSI_SLID_WIN_MAX){
2011 slide_evm_statistics = PHY_RSSI_SLID_WIN_MAX;
2012 last_evm = priv->stats.slide_evm[slide_evm_index];
2013 priv->stats.slide_evm_total -= last_evm;
2014 }
2015
2016 priv->stats.slide_evm_total += pprevious_stats->SignalQuality;
2017
2018 priv->stats.slide_evm[slide_evm_index++] = pprevious_stats->SignalQuality;
2019 if (slide_evm_index >= PHY_RSSI_SLID_WIN_MAX)
2020 slide_evm_index = 0;
2021
2022 tmp_val = priv->stats.slide_evm_total/slide_evm_statistics;
2023 priv->stats.signal_quality = tmp_val;
2024 priv->stats.last_signal_strength_inpercent = tmp_val;
2025 }
2026
2027 if (pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
2028 {
2029 for (nspatial_stream = 0; nspatial_stream<2 ; nspatial_stream++)
2030 {
2031 if (pprevious_stats->RxMIMOSignalQuality[nspatial_stream] != -1)
2032 {
2033 if (priv->stats.rx_evm_percentage[nspatial_stream] == 0)
2034 {
2035 priv->stats.rx_evm_percentage[nspatial_stream] = pprevious_stats->RxMIMOSignalQuality[nspatial_stream];
2036 }
2037 priv->stats.rx_evm_percentage[nspatial_stream] =
2038 ( (priv->stats.rx_evm_percentage[nspatial_stream]* (Rx_Smooth_Factor-1)) +
2039 (pprevious_stats->RxMIMOSignalQuality[nspatial_stream]* 1)) / (Rx_Smooth_Factor);
2040 }
2041 }
2042 }
2043 }
2044
2045}
2046
2047
2048void rtl8192_TranslateRxSignalStuff(struct net_device *dev,
2049 struct sk_buff *skb,
2050 struct rtllib_rx_stats * pstats,
2051 prx_desc pdesc,
2052 prx_fwinfo pdrvinfo)
2053{
2054 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2055 bool bpacket_match_bssid, bpacket_toself;
2056 bool bPacketBeacon=false;
2057 struct rtllib_hdr_3addr *hdr;
2058 bool bToSelfBA=false;
2059 static struct rtllib_rx_stats previous_stats;
2060 u16 fc,type;
2061
2062
2063 u8* tmp_buf;
2064 u8 *praddr;
2065
2066 tmp_buf = skb->data + pstats->RxDrvInfoSize + pstats->RxBufShift;
2067
2068 hdr = (struct rtllib_hdr_3addr *)tmp_buf;
2069 fc = le16_to_cpu(hdr->frame_ctl);
2070 type = WLAN_FC_GET_TYPE(fc);
2071 praddr = hdr->addr1;
2072
2073 bpacket_match_bssid = ((RTLLIB_FTYPE_CTL != type) &&
2074 (!compare_ether_addr(priv->rtllib->current_network.bssid,
2075 (fc & RTLLIB_FCTL_TODS)? hdr->addr1 :
2076 (fc & RTLLIB_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
2077 && (!pstats->bHwError) && (!pstats->bCRC)&& (!pstats->bICV));
2078 bpacket_toself = bpacket_match_bssid & (!compare_ether_addr(praddr, priv->rtllib->dev->dev_addr));
2079 if (WLAN_FC_GET_FRAMETYPE(fc)== RTLLIB_STYPE_BEACON)
2080 {
2081 bPacketBeacon = true;
2082 }
2083 if (bpacket_match_bssid)
2084 {
2085 priv->stats.numpacket_matchbssid++;
2086 }
2087 if (bpacket_toself){
2088 priv->stats.numpacket_toself++;
2089 }
2090 rtl8192_process_phyinfo(priv, tmp_buf,&previous_stats, pstats);
2091 rtl8192_query_rxphystatus(priv, pstats, pdesc, pdrvinfo, &previous_stats, bpacket_match_bssid,
2092 bpacket_toself ,bPacketBeacon, bToSelfBA);
2093 rtl8192_record_rxdesc_forlateruse(pstats, &previous_stats);
2094}
2095
2096void rtl8192_UpdateReceivedRateHistogramStatistics(
2097 struct net_device *dev,
2098 struct rtllib_rx_stats* pstats
2099 )
2100{
2101 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2102 u32 rcvType=1;
2103 u32 rateIndex;
2104 u32 preamble_guardinterval;
2105
2106 if (pstats->bCRC)
2107 rcvType = 2;
2108 else if (pstats->bICV)
2109 rcvType = 3;
2110
2111 if (pstats->bShortPreamble)
2112 preamble_guardinterval = 1;
2113 else
2114 preamble_guardinterval = 0;
2115
2116 switch (pstats->rate)
2117 {
2118 case MGN_1M: rateIndex = 0; break;
2119 case MGN_2M: rateIndex = 1; break;
2120 case MGN_5_5M: rateIndex = 2; break;
2121 case MGN_11M: rateIndex = 3; break;
2122 case MGN_6M: rateIndex = 4; break;
2123 case MGN_9M: rateIndex = 5; break;
2124 case MGN_12M: rateIndex = 6; break;
2125 case MGN_18M: rateIndex = 7; break;
2126 case MGN_24M: rateIndex = 8; break;
2127 case MGN_36M: rateIndex = 9; break;
2128 case MGN_48M: rateIndex = 10; break;
2129 case MGN_54M: rateIndex = 11; break;
2130 case MGN_MCS0: rateIndex = 12; break;
2131 case MGN_MCS1: rateIndex = 13; break;
2132 case MGN_MCS2: rateIndex = 14; break;
2133 case MGN_MCS3: rateIndex = 15; break;
2134 case MGN_MCS4: rateIndex = 16; break;
2135 case MGN_MCS5: rateIndex = 17; break;
2136 case MGN_MCS6: rateIndex = 18; break;
2137 case MGN_MCS7: rateIndex = 19; break;
2138 case MGN_MCS8: rateIndex = 20; break;
2139 case MGN_MCS9: rateIndex = 21; break;
2140 case MGN_MCS10: rateIndex = 22; break;
2141 case MGN_MCS11: rateIndex = 23; break;
2142 case MGN_MCS12: rateIndex = 24; break;
2143 case MGN_MCS13: rateIndex = 25; break;
2144 case MGN_MCS14: rateIndex = 26; break;
2145 case MGN_MCS15: rateIndex = 27; break;
2146 default: rateIndex = 28; break;
2147 }
2148 priv->stats.received_preamble_GI[preamble_guardinterval][rateIndex]++;
2149 priv->stats.received_rate_histogram[0][rateIndex]++;
2150 priv->stats.received_rate_histogram[rcvType][rateIndex]++;
2151}
2152
2153bool rtl8192_rx_query_status_desc(struct net_device* dev, struct rtllib_rx_stats* stats,
2154 rx_desc *pdesc, struct sk_buff* skb)
2155{
2156 struct r8192_priv *priv = rtllib_priv(dev);
2157
2158 stats->bICV = pdesc->ICV;
2159 stats->bCRC = pdesc->CRC32;
2160 stats->bHwError = pdesc->CRC32 | pdesc->ICV;
2161
2162 stats->Length = pdesc->Length;
2163 if (stats->Length < 24)
2164 stats->bHwError |= 1;
2165
2166 if (stats->bHwError) {
2167 stats->bShift = false;
2168
2169 if (pdesc->CRC32) {
2170 if (pdesc->Length <500)
2171 priv->stats.rxcrcerrmin++;
2172 else if (pdesc->Length >1000)
2173 priv->stats.rxcrcerrmax++;
2174 else
2175 priv->stats.rxcrcerrmid++;
2176 }
2177 return false;
2178 } else {
2179 prx_fwinfo pDrvInfo = NULL;
2180 stats->RxDrvInfoSize = pdesc->RxDrvInfoSize;
2181 stats->RxBufShift = ((pdesc->Shift)&0x03);
2182 stats->Decrypted = !pdesc->SWDec;
2183
2184 pDrvInfo = (rx_fwinfo *)(skb->data + stats->RxBufShift);
2185
2186 stats->rate = HwRateToMRate90((bool)pDrvInfo->RxHT, (u8)pDrvInfo->RxRate);
2187 stats->bShortPreamble = pDrvInfo->SPLCP;
2188
2189 rtl8192_UpdateReceivedRateHistogramStatistics(dev, stats);
2190
2191 stats->bIsAMPDU = (pDrvInfo->PartAggr==1);
2192 stats->bFirstMPDU = (pDrvInfo->PartAggr==1) && (pDrvInfo->FirstAGGR==1);
2193
2194 stats->TimeStampLow = pDrvInfo->TSFL;
2195 stats->TimeStampHigh = read_nic_dword(dev, TSFR+4);
2196
2197 rtl819x_UpdateRxPktTimeStamp(dev, stats);
2198
2199 if ((stats->RxBufShift + stats->RxDrvInfoSize) > 0)
2200 stats->bShift = 1;
2201
2202 stats->RxIs40MHzPacket = pDrvInfo->BW;
2203
2204 rtl8192_TranslateRxSignalStuff(dev,skb, stats, pdesc, pDrvInfo);
2205
2206 if (pDrvInfo->FirstAGGR==1 || pDrvInfo->PartAggr == 1)
2207 RT_TRACE(COMP_RXDESC, "pDrvInfo->FirstAGGR = %d, pDrvInfo->PartAggr = %d\n",
2208 pDrvInfo->FirstAGGR, pDrvInfo->PartAggr);
2209 skb_trim(skb, skb->len - 4/*sCrcLng*/);
2210
2211
2212 stats->packetlength = stats->Length-4;
2213 stats->fraglength = stats->packetlength;
2214 stats->fragoffset = 0;
2215 stats->ntotalfrag = 1;
2216 return true;
2217 }
2218}
2219
2220void rtl8192_halt_adapter(struct net_device *dev, bool reset)
2221{
2222 struct r8192_priv *priv = rtllib_priv(dev);
2223 int i;
2224 u8 OpMode;
2225 u8 u1bTmp;
2226 u32 ulRegRead;
2227#ifdef RTL8190P
2228 u8 ucRegRead;
2229#endif
2230
2231 OpMode = RT_OP_MODE_NO_LINK;
2232 priv->rtllib->SetHwRegHandler(dev, HW_VAR_MEDIA_STATUS, &OpMode);
2233
2234#if 1
2235 if (!priv->rtllib->bSupportRemoteWakeUp)
2236 {
2237 u1bTmp = 0x0;
2238 write_nic_byte(dev, CMDR, u1bTmp);
2239 }
2240#else
2241 cmd=read_nic_byte(dev,CMDR);
2242 write_nic_byte(dev, CMDR, cmd &~ (CR_TE|CR_RE));
2243#endif
2244
2245 mdelay(20);
2246
2247 if (!reset)
2248 {
2249 mdelay(150);
2250
2251#ifdef RTL8192E
2252 priv->bHwRfOffAction = 2;
2253#endif
2254
2255 if (!priv->rtllib->bSupportRemoteWakeUp)
2256 {
2257#ifdef RTL8190P
2258 {
2259 PHY_SetRtl8190pRfOff(dev);
2260 }
2261#elif defined RTL8192E
2262 {
2263 PHY_SetRtl8192eRfOff(dev);
2264 }
2265#endif
2266 ulRegRead = read_nic_dword(dev,CPU_GEN);
2267 ulRegRead|=CPU_GEN_SYSTEM_RESET;
2268 write_nic_dword(dev,CPU_GEN, ulRegRead);
2269 }
2270 else
2271 {
2272 write_nic_dword(dev, WFCRC0, 0xffffffff);
2273 write_nic_dword(dev, WFCRC1, 0xffffffff);
2274 write_nic_dword(dev, WFCRC2, 0xffffffff);
2275
2276
2277#ifdef RTL8190P
2278 {
2279 ucRegRead = read_nic_byte(dev, GPO);
2280 ucRegRead |= BIT0;
2281 write_nic_byte(dev, GPO, ucRegRead);
2282 }
2283#endif
2284 write_nic_byte(dev, PMR, 0x5);
2285 write_nic_byte(dev, MacBlkCtrl, 0xa);
2286 }
2287 }
2288
2289 for (i = 0; i < MAX_QUEUE_SIZE; i++) {
2290 skb_queue_purge(&priv->rtllib->skb_waitQ [i]);
2291 }
2292 for (i = 0; i < MAX_QUEUE_SIZE; i++) {
2293 skb_queue_purge(&priv->rtllib->skb_aggQ [i]);
2294 }
2295
2296 skb_queue_purge(&priv->skb_queue);
2297 return;
2298}
2299
2300void rtl8192_update_ratr_table(struct net_device* dev)
2301{
2302 struct r8192_priv* priv = rtllib_priv(dev);
2303 struct rtllib_device* ieee = priv->rtllib;
2304 u8* pMcsRate = ieee->dot11HTOperationalRateSet;
2305 u32 ratr_value = 0;
2306 u8 rate_index = 0;
2307
2308 rtl8192_config_rate(dev, (u16*)(&ratr_value));
2309 ratr_value |= (*(u16*)(pMcsRate)) << 12;
2310 switch (ieee->mode)
2311 {
2312 case IEEE_A:
2313 ratr_value &= 0x00000FF0;
2314 break;
2315 case IEEE_B:
2316 ratr_value &= 0x0000000F;
2317 break;
2318 case IEEE_G:
2319 case IEEE_G|IEEE_B:
2320 ratr_value &= 0x00000FF7;
2321 break;
2322 case IEEE_N_24G:
2323 case IEEE_N_5G:
2324 if (ieee->pHTInfo->PeerMimoPs == 0)
2325 ratr_value &= 0x0007F007;
2326 else{
2327 if (priv->rf_type == RF_1T2R)
2328 ratr_value &= 0x000FF007;
2329 else
2330 ratr_value &= 0x0F81F007;
2331 }
2332 break;
2333 default:
2334 break;
2335 }
2336 ratr_value &= 0x0FFFFFFF;
2337 if (ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI40MHz){
2338 ratr_value |= 0x80000000;
2339 }else if (!ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI20MHz){
2340 ratr_value |= 0x80000000;
2341 }
2342 write_nic_dword(dev, RATR0+rate_index*4, ratr_value);
2343 write_nic_byte(dev, UFWP, 1);
2344}
2345
2346void
2347rtl8192_InitializeVariables(struct net_device *dev)
2348{
2349 struct r8192_priv *priv = rtllib_priv(dev);
2350
2351#ifdef RTL8190P
2352 strcpy(priv->nick, "rtl8190p");
2353#elif defined(RTL8192E)
2354 strcpy(priv->nick, "rtl8192E");
2355#endif
2356
2357#ifdef _ENABLE_SW_BEACON
2358 priv->rtllib->softmac_features = IEEE_SOFTMAC_SCAN |
2359 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
2360 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE |
2361 IEEE_SOFTMAC_BEACONS;
2362#else
2363 priv->rtllib->softmac_features = IEEE_SOFTMAC_SCAN |
2364 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
2365 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE /* |
2366 IEEE_SOFTMAC_BEACONS*/;
2367#endif
2368
2369 priv->rtllib->tx_headroom = sizeof(TX_FWINFO_8190PCI);
2370
2371 priv->ShortRetryLimit = 0x30;
2372 priv->LongRetryLimit = 0x30;
2373
2374 priv->EarlyRxThreshold = 7;
2375 priv->pwrGroupCnt = 0;
2376
2377 priv->bIgnoreSilentReset = false;
2378 priv->enable_gpio0 = 0;
2379
2380 priv->TransmitConfig = 0;
2381
2382 priv->ReceiveConfig = RCR_ADD3 |
2383 RCR_AMF | RCR_ADF |
2384 RCR_AICV |
2385 RCR_AB | RCR_AM | RCR_APM |
2386 RCR_AAP | ((u32)7<<RCR_MXDMA_OFFSET) |
2387 ((u32)7 << RCR_FIFO_OFFSET) | RCR_ONLYERLPKT;
2388
2389 priv->irq_mask[0] = (u32)(IMR_ROK | IMR_VODOK | IMR_VIDOK | IMR_BEDOK | IMR_BKDOK |\
2390 IMR_HCCADOK | IMR_MGNTDOK | IMR_COMDOK | IMR_HIGHDOK |\
2391 IMR_BDOK | IMR_RXCMDOK | IMR_TIMEOUT0 | IMR_RDU | IMR_RXFOVW |\
2392 IMR_TXFOVW | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
2393
2394
2395 priv->MidHighPwrTHR_L1 = 0x3B;
2396 priv->MidHighPwrTHR_L2 = 0x40;
2397 priv->PwrDomainProtect = false;
2398
2399 priv->bfirst_after_down = 0;
2400}
2401
2402void rtl8192_EnableInterrupt(struct net_device *dev)
2403{
2404 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2405 priv->irq_enabled = 1;
2406
2407#ifdef RTL8192CE
2408 write_nic_dword(dev, REG_HIMR, priv->irq_mask[0]&0xFFFFFFFF);
2409#else
2410 write_nic_dword(dev,INTA_MASK, priv->irq_mask[0]);
2411#endif
2412
2413#ifdef RTL8192SE
2414 write_nic_dword(dev,INTA_MASK+4, priv->irq_mask[1]&0x3F);
2415#endif
2416
2417}
2418
2419void rtl8192_DisableInterrupt(struct net_device *dev)
2420{
2421 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2422
2423#ifdef RTL8192CE
2424 write_nic_dword(dev, REG_HIMR, IMR8190_DISABLED);
2425#else
2426 write_nic_dword(dev,INTA_MASK,0);
2427#endif
2428
2429#ifdef RTL8192SE
2430 write_nic_dword(dev,INTA_MASK + 4,0);
2431#endif
2432 priv->irq_enabled = 0;
2433}
2434
2435void rtl8192_ClearInterrupt(struct net_device *dev)
2436{
2437 u32 tmp = 0;
2438#ifdef RTL8192CE
2439 tmp = read_nic_dword(dev, REG_HISR);
2440 write_nic_dword(dev, REG_HISR, tmp);
2441#else
2442 tmp = read_nic_dword(dev, ISR);
2443 write_nic_dword(dev, ISR, tmp);
2444#endif
2445
2446#ifdef RTL8192SE
2447 tmp = read_nic_dword(dev, ISR+4);
2448 write_nic_dword(dev, ISR+4, tmp);
2449#endif
2450}
2451
2452
2453void rtl8192_enable_rx(struct net_device *dev)
2454{
2455 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2456 write_nic_dword(dev, RDQDA,priv->rx_ring_dma[RX_MPDU_QUEUE]);
2457}
2458
2459u32 TX_DESC_BASE[] = {BKQDA, BEQDA, VIQDA, VOQDA, HCCAQDA, CQDA, MQDA, HQDA, BQDA};
2460void rtl8192_enable_tx(struct net_device *dev)
2461{
2462 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2463 u32 i;
2464
2465 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
2466 write_nic_dword(dev, TX_DESC_BASE[i], priv->tx_ring[i].dma);
2467}
2468
2469
2470void rtl8192_beacon_disable(struct net_device *dev)
2471{
2472 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2473 u32 reg;
2474
2475#ifdef RTL8192CE
2476 reg = read_nic_dword(priv->rtllib->dev,REG_HIMR);
2477
2478 reg &= ~(IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
2479 write_nic_dword(priv->rtllib->dev, REG_HIMR, reg);
2480#else
2481 reg = read_nic_dword(priv->rtllib->dev,INTA_MASK);
2482
2483 reg &= ~(IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
2484 write_nic_dword(priv->rtllib->dev, INTA_MASK, reg);
2485#endif
2486}
2487
2488void rtl8192_interrupt_recognized(struct net_device *dev, u32 *p_inta, u32 *p_intb)
2489{
2490#ifdef RTL8192SE
2491 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2492 *p_inta = read_nic_dword(dev, ISR) & priv->irq_mask[0];
2493#else
2494 *p_inta = read_nic_dword(dev, ISR) ;
2495#endif
2496 write_nic_dword(dev,ISR,*p_inta);
2497#ifdef RTL8192SE
2498 *p_intb = read_nic_dword(dev, ISR+4);
2499 write_nic_dword(dev, ISR+4, *p_intb);
2500#endif
2501}
2502
2503bool rtl8192_HalRxCheckStuck(struct net_device *dev)
2504{
2505 struct r8192_priv *priv = rtllib_priv(dev);
2506 u16 RegRxCounter = read_nic_word(dev, 0x130);
2507 bool bStuck = false;
2508 static u8 rx_chk_cnt = 0;
2509 u32 SlotIndex = 0, TotalRxStuckCount = 0;
2510 u8 i;
2511 u8 SilentResetRxSoltNum = 4;
2512
2513 RT_TRACE(COMP_RESET,"%s(): RegRxCounter is %d,RxCounter is %d\n",
2514 __func__, RegRxCounter,priv->RxCounter);
2515
2516 rx_chk_cnt++;
2517 if (priv->undecorated_smoothed_pwdb >= (RateAdaptiveTH_High+5))
2518 {
2519 rx_chk_cnt = 0;
2520 } else if ((priv->undecorated_smoothed_pwdb < (RateAdaptiveTH_High+5)) &&
2521 (((priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) &&
2522 (priv->undecorated_smoothed_pwdb >= RateAdaptiveTH_Low_40M)) ||
2523 ((priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20) &&
2524 (priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_20M)))) {
2525 if (rx_chk_cnt < 2) {
2526 return bStuck;
2527 } else {
2528 rx_chk_cnt = 0;
2529 }
2530 } else if ((((priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) &&
2531 (priv->undecorated_smoothed_pwdb < RateAdaptiveTH_Low_40M)) ||
2532 ((priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20) &&
2533 (priv->undecorated_smoothed_pwdb < RateAdaptiveTH_Low_20M))) &&
2534 priv->undecorated_smoothed_pwdb >= VeryLowRSSI) {
2535 if (rx_chk_cnt < 4) {
2536 return bStuck;
2537 } else {
2538 rx_chk_cnt = 0;
2539 }
2540 } else {
2541 if (rx_chk_cnt < 8) {
2542 return bStuck;
2543 } else {
2544 rx_chk_cnt = 0;
2545 }
2546 }
2547
2548
2549 SlotIndex = (priv->SilentResetRxSlotIndex++)%SilentResetRxSoltNum;
2550
2551 if (priv->RxCounter==RegRxCounter)
2552 {
2553 priv->SilentResetRxStuckEvent[SlotIndex] = 1;
2554
2555 for ( i = 0; i < SilentResetRxSoltNum ; i++ )
2556 TotalRxStuckCount += priv->SilentResetRxStuckEvent[i];
2557
2558 if (TotalRxStuckCount == SilentResetRxSoltNum)
2559 {
2560 bStuck = true;
2561 for ( i = 0; i < SilentResetRxSoltNum ; i++ )
2562 TotalRxStuckCount += priv->SilentResetRxStuckEvent[i];
2563 }
2564
2565
2566 } else {
2567 priv->SilentResetRxStuckEvent[SlotIndex] = 0;
2568 }
2569
2570 priv->RxCounter = RegRxCounter;
2571
2572 return bStuck;
2573}
2574
2575bool rtl8192_HalTxCheckStuck(struct net_device *dev)
2576{
2577 struct r8192_priv *priv = rtllib_priv(dev);
2578 bool bStuck = false;
2579#if defined(RTL8192E) || defined(RTL8190P)
2580 u16 RegTxCounter = read_nic_word(dev, 0x128);
2581#elif defined (RTL8192SE) || defined (RTL8192CE)
2582 u16 RegTxCounter = read_nic_word(dev, 0x366);
2583#else
2584 u16 RegTxCounter = priv->TxCounter + 1;
2585 WARN_ON(1);
2586#endif
2587
2588 RT_TRACE(COMP_RESET, "%s():RegTxCounter is %d,TxCounter is %d\n",
2589 __func__,RegTxCounter,priv->TxCounter);
2590
2591 if (priv->TxCounter == RegTxCounter)
2592 bStuck = true;
2593
2594 priv->TxCounter = RegTxCounter;
2595
2596 return bStuck;
2597}
2598
2599bool rtl8192_GetNmodeSupportBySecCfg(struct net_device *dev)
2600{
2601#ifdef RTL8192SE
2602 return true;
2603#else
2604 struct r8192_priv *priv = rtllib_priv(dev);
2605 struct rtllib_device *ieee = priv->rtllib;
2606 if (ieee->rtllib_ap_sec_type &&
2607 (ieee->rtllib_ap_sec_type(priv->rtllib)&(SEC_ALG_WEP|SEC_ALG_TKIP))) {
2608 return false;
2609 } else {
2610 return true;
2611 }
2612#endif
2613}
2614
2615bool rtl8192_GetHalfNmodeSupportByAPs(struct net_device* dev)
2616{
2617#ifdef RTL8192SE
2618 return false;
2619#else
2620 bool Reval;
2621 struct r8192_priv* priv = rtllib_priv(dev);
2622 struct rtllib_device* ieee = priv->rtllib;
2623
2624 if (ieee->bHalfWirelessN24GMode == true)
2625 Reval = true;
2626 else
2627 Reval = false;
2628
2629 return Reval;
2630#endif
2631}
2632
2633u8 rtl8192_QueryIsShort(u8 TxHT, u8 TxRate, cb_desc *tcb_desc)
2634{
2635 u8 tmp_Short;
2636
2637 tmp_Short = (TxHT==1)?((tcb_desc->bUseShortGI)?1:0):((tcb_desc->bUseShortPreamble)?1:0);
2638#if defined RTL8192SE || defined RTL8192CE
2639 if (TxHT==1 && TxRate != DESC92S_RATEMCS15)
2640#elif defined RTL8192E || defined RTL8190P
2641 if (TxHT==1 && TxRate != DESC90_RATEMCS15)
2642#endif
2643 tmp_Short = 0;
2644
2645 return tmp_Short;
2646}
2647
2648void
2649ActUpdateChannelAccessSetting(
2650 struct net_device* dev,
2651 WIRELESS_MODE WirelessMode,
2652 PCHANNEL_ACCESS_SETTING ChnlAccessSetting
2653 )
2654{
2655 struct r8192_priv* priv = rtllib_priv(dev);
2656
2657 return;
2658
2659 {
2660 u16 SIFS_Timer;
2661
2662 if (WirelessMode == WIRELESS_MODE_G)
2663 SIFS_Timer = 0x0e0e;
2664 else
2665 SIFS_Timer = priv->SifsTime;
2666
2667 priv->rtllib->SetHwRegHandler( dev, HW_VAR_SIFS, (u8*)&SIFS_Timer);
2668 }
2669
2670}
diff --git a/drivers/staging/rtl8192e/r8192E_dev.h b/drivers/staging/rtl8192e/r8192E_dev.h
new file mode 100644
index 00000000000..f8021c7a661
--- /dev/null
+++ b/drivers/staging/rtl8192e/r8192E_dev.h
@@ -0,0 +1,56 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * Based on the r8180 driver, which is:
5 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 *
19 * The full GNU General Public License is included in this distribution in the
20 * file called LICENSE.
21 *
22 * Contact Information:
23 * wlanfae <wlanfae@realtek.com>
24******************************************************************************/
25#ifndef _RTL8192E_H
26#define _RTL8192E_H
27
28#include "r8190P_def.h"
29
30u8 rtl8192_QueryIsShort(u8 TxHT, u8 TxRate, cb_desc *tcb_desc);
31bool rtl8192_GetHalfNmodeSupportByAPs(struct net_device* dev);
32bool rtl8192_GetNmodeSupportBySecCfg(struct net_device *dev);
33bool rtl8192_HalTxCheckStuck(struct net_device *dev);
34bool rtl8192_HalRxCheckStuck(struct net_device *dev);
35void rtl8192_interrupt_recognized(struct net_device *dev, u32 *p_inta, u32 *p_intb);
36void rtl8192_enable_rx(struct net_device *dev);
37void rtl8192_enable_tx(struct net_device *dev);
38void rtl8192_EnableInterrupt(struct net_device *dev);
39void rtl8192_DisableInterrupt(struct net_device *dev);
40void rtl8192_ClearInterrupt(struct net_device *dev);
41void rtl8192_InitializeVariables(struct net_device *dev);
42void rtl8192e_start_beacon(struct net_device *dev);
43void rtl8192e_SetHwReg(struct net_device *dev,u8 variable,u8* val);
44void rtl8192_get_eeprom_size(struct net_device* dev);
45bool rtl8192_adapter_start(struct net_device *dev);
46void rtl8192_link_change(struct net_device *dev);
47void rtl8192_AllowAllDestAddr(struct net_device* dev, bool bAllowAllDA, bool WriteIntoReg);
48void rtl8192_tx_fill_desc(struct net_device* dev, tx_desc * pdesc, cb_desc * cb_desc,
49 struct sk_buff* skb);
50void rtl8192_tx_fill_cmd_desc(struct net_device* dev, tx_desc_cmd * entry,
51 cb_desc * cb_desc, struct sk_buff* skb);
52bool rtl8192_rx_query_status_desc(struct net_device* dev, struct rtllib_rx_stats *stats,
53 rx_desc *pdesc, struct sk_buff* skb);
54void rtl8192_halt_adapter(struct net_device *dev, bool reset);
55void rtl8192_update_ratr_table(struct net_device* dev);
56#endif
diff --git a/drivers/staging/rtl8192e/r8192E_firmware.c b/drivers/staging/rtl8192e/r8192E_firmware.c
new file mode 100644
index 00000000000..6d490292c03
--- /dev/null
+++ b/drivers/staging/rtl8192e/r8192E_firmware.c
@@ -0,0 +1,396 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/
19
20#if (defined(RTL8192E) || defined(RTL8190P))
21
22#include "rtl_core.h"
23#include "r8192E_hw.h"
24#ifdef RTL8190P
25#include "r8190P_hwimg.h"
26#elif defined RTL8192E
27#include "r8192E_hwimg.h"
28#endif
29#include "r8192E_firmware.h"
30#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
31#include <linux/firmware.h>
32#endif
33
34extern void firmware_init_param(struct net_device *dev)
35{
36 struct r8192_priv *priv = rtllib_priv(dev);
37 rt_firmware *pfirmware = priv->pFirmware;
38
39 pfirmware->cmdpacket_frag_thresold = GET_COMMAND_PACKET_FRAG_THRESHOLD(MAX_TRANSMIT_BUFFER_SIZE);
40}
41
42bool fw_download_code(struct net_device *dev, u8 *code_virtual_address, u32 buffer_len)
43{
44 struct r8192_priv *priv = rtllib_priv(dev);
45 bool rt_status = true;
46 u16 frag_threshold;
47 u16 frag_length, frag_offset = 0;
48 int i;
49
50 rt_firmware *pfirmware = priv->pFirmware;
51 struct sk_buff *skb;
52 unsigned char *seg_ptr;
53 cb_desc *tcb_desc;
54 u8 bLastIniPkt;
55
56 firmware_init_param(dev);
57 frag_threshold = pfirmware->cmdpacket_frag_thresold;
58 do {
59 if ((buffer_len - frag_offset) > frag_threshold) {
60 frag_length = frag_threshold ;
61 bLastIniPkt = 0;
62
63 } else {
64 frag_length = buffer_len - frag_offset;
65 bLastIniPkt = 1;
66
67 }
68
69 skb = dev_alloc_skb(frag_length + 4);
70 memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
71 tcb_desc = (cb_desc*)(skb->cb + MAX_DEV_ADDR_SIZE);
72 tcb_desc->queue_index = TXCMD_QUEUE;
73 tcb_desc->bCmdOrInit = DESC_PACKET_TYPE_INIT;
74 tcb_desc->bLastIniPkt = bLastIniPkt;
75
76 seg_ptr = skb->data;
77 for (i=0 ; i < frag_length; i+=4) {
78 *seg_ptr++ = ((i+0)<frag_length)?code_virtual_address[i+3]:0;
79 *seg_ptr++ = ((i+1)<frag_length)?code_virtual_address[i+2]:0;
80 *seg_ptr++ = ((i+2)<frag_length)?code_virtual_address[i+1]:0;
81 *seg_ptr++ = ((i+3)<frag_length)?code_virtual_address[i+0]:0;
82 }
83 tcb_desc->txbuf_size= (u16)i;
84 skb_put(skb, i);
85
86 if (!priv->rtllib->check_nic_enough_desc(dev,tcb_desc->queue_index)||
87 (!skb_queue_empty(&priv->rtllib->skb_waitQ[tcb_desc->queue_index]))||\
88 (priv->rtllib->queue_stop) ) {
89 RT_TRACE(COMP_FIRMWARE, "===================> tx full!\n");
90 skb_queue_tail(&priv->rtllib->skb_waitQ[tcb_desc->queue_index], skb);
91 } else {
92 priv->rtllib->softmac_hard_start_xmit(skb,dev);
93 }
94
95 code_virtual_address += frag_length;
96 frag_offset += frag_length;
97
98 }while(frag_offset < buffer_len);
99
100 write_nic_byte(dev, TPPoll, TPPoll_CQ);
101
102 return rt_status;
103}
104
105bool
106fwSendNullPacket(
107 struct net_device *dev,
108 u32 Length
109)
110{
111 bool rtStatus = true;
112 struct r8192_priv *priv = rtllib_priv(dev);
113 struct sk_buff *skb;
114 cb_desc *tcb_desc;
115 unsigned char *ptr_buf;
116 bool bLastInitPacket = false;
117
118
119 skb = dev_alloc_skb(Length+ 4);
120 memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
121 tcb_desc = (cb_desc*)(skb->cb + MAX_DEV_ADDR_SIZE);
122 tcb_desc->queue_index = TXCMD_QUEUE;
123 tcb_desc->bCmdOrInit = DESC_PACKET_TYPE_INIT;
124 tcb_desc->bLastIniPkt = bLastInitPacket;
125 ptr_buf = skb_put(skb, Length);
126 memset(ptr_buf,0,Length);
127 tcb_desc->txbuf_size= (u16)Length;
128
129 if (!priv->rtllib->check_nic_enough_desc(dev,tcb_desc->queue_index)||
130 (!skb_queue_empty(&priv->rtllib->skb_waitQ[tcb_desc->queue_index]))||\
131 (priv->rtllib->queue_stop) ) {
132 RT_TRACE(COMP_FIRMWARE,"===================NULL packet================> tx full!\n");
133 skb_queue_tail(&priv->rtllib->skb_waitQ[tcb_desc->queue_index], skb);
134 } else {
135 priv->rtllib->softmac_hard_start_xmit(skb,dev);
136 }
137
138 write_nic_byte(dev, TPPoll, TPPoll_CQ);
139 return rtStatus;
140}
141
142bool CPUcheck_maincodeok_turnonCPU(struct net_device *dev)
143{
144 bool rt_status = true;
145 u32 CPU_status = 0;
146 unsigned long timeout;
147
148 timeout = jiffies + MSECS(200);
149 while (time_before(jiffies, timeout)) {
150 CPU_status = read_nic_dword(dev, CPU_GEN);
151 if (CPU_status & CPU_GEN_PUT_CODE_OK)
152 break;
153 msleep(2);
154 }
155
156 if (!(CPU_status&CPU_GEN_PUT_CODE_OK)) {
157 RT_TRACE(COMP_ERR, "Download Firmware: Put code fail!\n");
158 goto CPUCheckMainCodeOKAndTurnOnCPU_Fail;
159 } else {
160 RT_TRACE(COMP_FIRMWARE, "Download Firmware: Put code ok!\n");
161 }
162
163 CPU_status = read_nic_dword(dev, CPU_GEN);
164 write_nic_byte(dev, CPU_GEN, (u8)((CPU_status|CPU_GEN_PWR_STB_CPU)&0xff));
165 mdelay(1);
166
167 timeout = jiffies + MSECS(200);
168 while (time_before(jiffies, timeout)) {
169 CPU_status = read_nic_dword(dev, CPU_GEN);
170 if (CPU_status&CPU_GEN_BOOT_RDY)
171 break;
172 msleep(2);
173 }
174
175 if (!(CPU_status&CPU_GEN_BOOT_RDY)) {
176 goto CPUCheckMainCodeOKAndTurnOnCPU_Fail;
177 } else {
178 RT_TRACE(COMP_FIRMWARE, "Download Firmware: Boot ready!\n");
179 }
180
181 return rt_status;
182
183CPUCheckMainCodeOKAndTurnOnCPU_Fail:
184 RT_TRACE(COMP_ERR, "ERR in %s()\n", __func__);
185 rt_status = false;
186 return rt_status;
187}
188
189bool CPUcheck_firmware_ready(struct net_device *dev)
190{
191
192 bool rt_status = true;
193 u32 CPU_status = 0;
194 unsigned long timeout;
195
196 timeout = jiffies + MSECS(20);
197 while (time_before(jiffies, timeout)) {
198 CPU_status = read_nic_dword(dev, CPU_GEN);
199 if (CPU_status&CPU_GEN_FIRM_RDY)
200 break;
201 msleep(2);
202 }
203
204 if (!(CPU_status&CPU_GEN_FIRM_RDY))
205 goto CPUCheckFirmwareReady_Fail;
206 else
207 RT_TRACE(COMP_FIRMWARE, "Download Firmware: Firmware ready!\n");
208
209 return rt_status;
210
211CPUCheckFirmwareReady_Fail:
212 RT_TRACE(COMP_ERR, "ERR in %s()\n", __func__);
213 rt_status = false;
214 return rt_status;
215
216}
217
218inline static bool firmware_check_ready(struct net_device *dev, u8 load_fw_status)
219{
220 struct r8192_priv *priv = rtllib_priv(dev);
221 rt_firmware *pfirmware = priv->pFirmware;
222 bool rt_status = true;
223
224 switch (load_fw_status) {
225 case FW_INIT_STEP0_BOOT:
226 pfirmware->firmware_status = FW_STATUS_1_MOVE_BOOT_CODE;
227#ifdef RTL8190P
228 rt_status = fwSendNullPacket(dev, RTL8190_CPU_START_OFFSET);
229 if (!rt_status) {
230 RT_TRACE(COMP_INIT, "fwSendNullPacket() fail ! \n");
231 }
232#endif
233 break;
234
235 case FW_INIT_STEP1_MAIN:
236 pfirmware->firmware_status = FW_STATUS_2_MOVE_MAIN_CODE;
237
238 rt_status = CPUcheck_maincodeok_turnonCPU(dev);
239 if (rt_status) {
240 pfirmware->firmware_status = FW_STATUS_3_TURNON_CPU;
241 } else {
242 RT_TRACE(COMP_FIRMWARE, "CPUcheck_maincodeok_turnonCPU fail!\n");
243 }
244
245 break;
246
247 case FW_INIT_STEP2_DATA:
248 pfirmware->firmware_status = FW_STATUS_4_MOVE_DATA_CODE;
249 mdelay(1);
250
251 rt_status = CPUcheck_firmware_ready(dev);
252 if (rt_status) {
253 pfirmware->firmware_status = FW_STATUS_5_READY;
254 } else {
255 RT_TRACE(COMP_FIRMWARE, "CPUcheck_firmware_ready fail(%d)!\n",rt_status);
256 }
257
258 break;
259 default:
260 rt_status = false;
261 RT_TRACE(COMP_FIRMWARE, "Unknown firware status");
262 break;
263 }
264
265 return rt_status;
266}
267
268bool init_firmware(struct net_device *dev)
269{
270 struct r8192_priv *priv = rtllib_priv(dev);
271 bool rt_status = true;
272
273#ifdef RTL8190P
274 u8 *firmware_img_buf[3] = { &Rtl8190PciFwBootArray[0],
275 &Rtl8190PciFwMainArray[0],
276 &Rtl8190PciFwDataArray[0]};
277
278 u32 firmware_img_len[3] = { sizeof(Rtl8190PciFwBootArray),
279 sizeof(Rtl8190PciFwMainArray),
280 sizeof(Rtl8190PciFwDataArray)};
281#else
282 u8 *firmware_img_buf[3] = { &Rtl8192PciEFwBootArray[0],
283 &Rtl8192PciEFwMainArray[0],
284 &Rtl8192PciEFwDataArray[0]};
285
286 u32 firmware_img_len[3] = { sizeof(Rtl8192PciEFwBootArray),
287 sizeof(Rtl8192PciEFwMainArray),
288 sizeof(Rtl8192PciEFwDataArray)};
289#endif
290 u32 file_length = 0;
291 u8 *mapped_file = NULL;
292 u8 init_step = 0;
293 opt_rst_type_e rst_opt = OPT_SYSTEM_RESET;
294 firmware_init_step_e starting_state = FW_INIT_STEP0_BOOT;
295
296 rt_firmware *pfirmware = priv->pFirmware;
297
298 RT_TRACE(COMP_FIRMWARE, " PlatformInitFirmware()==>\n");
299
300 if (pfirmware->firmware_status == FW_STATUS_0_INIT ) {
301 rst_opt = OPT_SYSTEM_RESET;
302 starting_state = FW_INIT_STEP0_BOOT;
303
304 }else if (pfirmware->firmware_status == FW_STATUS_5_READY) {
305 rst_opt = OPT_FIRMWARE_RESET;
306 starting_state = FW_INIT_STEP2_DATA;
307 }else {
308 RT_TRACE(COMP_FIRMWARE, "PlatformInitFirmware: undefined firmware state\n");
309 }
310
311#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0) && defined(USE_FW_SOURCE_IMG_FILE)
312 priv->firmware_source = FW_SOURCE_IMG_FILE;
313#else
314 priv->firmware_source = FW_SOURCE_HEADER_FILE;
315#endif
316 for (init_step = starting_state; init_step <= FW_INIT_STEP2_DATA; init_step++) {
317 if (rst_opt == OPT_SYSTEM_RESET) {
318 switch (priv->firmware_source) {
319 case FW_SOURCE_IMG_FILE:
320 {
321#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0) && defined(USE_FW_SOURCE_IMG_FILE)
322 if (pfirmware->firmware_buf_size[init_step] == 0) {
323 const char *fw_name[3] = { "RTL8192E/boot.img",
324 "RTL8192E/main.img",
325 "RTL8192E/data.img"
326 };
327 const struct firmware *fw_entry;
328 int rc;
329 rc = request_firmware(&fw_entry, fw_name[init_step],&priv->pdev->dev);
330 if (rc < 0 ) {
331 RT_TRACE(COMP_FIRMWARE, "request firmware fail!\n");
332 goto download_firmware_fail;
333 }
334 if (fw_entry->size > sizeof(pfirmware->firmware_buf[init_step])) {
335 RT_TRACE(COMP_FIRMWARE, "img file size exceed the container buffer fail!\n");
336 goto download_firmware_fail;
337 }
338
339 if (init_step != FW_INIT_STEP1_MAIN) {
340 memcpy(pfirmware->firmware_buf[init_step],fw_entry->data,fw_entry->size);
341 pfirmware->firmware_buf_size[init_step] = fw_entry->size;
342
343 } else {
344 memset(pfirmware->firmware_buf[init_step],0,128);
345 memcpy(&pfirmware->firmware_buf[init_step][128],fw_entry->data,fw_entry->size);
346 pfirmware->firmware_buf_size[init_step] = fw_entry->size+128;
347 }
348
349 if (rst_opt == OPT_SYSTEM_RESET) {
350 release_firmware(fw_entry);
351 }
352 }
353 mapped_file = pfirmware->firmware_buf[init_step];
354 file_length = pfirmware->firmware_buf_size[init_step];
355#endif
356 break;
357 }
358 case FW_SOURCE_HEADER_FILE:
359 mapped_file = firmware_img_buf[init_step];
360 file_length = firmware_img_len[init_step];
361 if (init_step == FW_INIT_STEP2_DATA) {
362 memcpy(pfirmware->firmware_buf[init_step], mapped_file, file_length);
363 pfirmware->firmware_buf_size[init_step] = file_length;
364 }
365 break;
366
367 default:
368 break;
369 }
370
371
372 } else if (rst_opt == OPT_FIRMWARE_RESET) {
373 mapped_file = pfirmware->firmware_buf[init_step];
374 file_length = pfirmware->firmware_buf_size[init_step];
375 }
376
377 rt_status = fw_download_code(dev,mapped_file,file_length);
378 if (rt_status != true) {
379 goto download_firmware_fail;
380 }
381
382 if (!firmware_check_ready(dev, init_step)) {
383 goto download_firmware_fail;
384 }
385 }
386
387 RT_TRACE(COMP_FIRMWARE, "Firmware Download Success\n");
388 return rt_status;
389
390download_firmware_fail:
391 RT_TRACE(COMP_ERR, "ERR in %s()\n", __func__);
392 rt_status = false;
393 return rt_status;
394
395}
396#endif
diff --git a/drivers/staging/rtl8192e/r8192E_firmware.h b/drivers/staging/rtl8192e/r8192E_firmware.h
new file mode 100644
index 00000000000..8819f974474
--- /dev/null
+++ b/drivers/staging/rtl8192e/r8192E_firmware.h
@@ -0,0 +1,73 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/
19#ifndef __INC_FIRMWARE_H
20#define __INC_FIRMWARE_H
21
22#define RTL8190_CPU_START_OFFSET 0x80
23
24#define GET_COMMAND_PACKET_FRAG_THRESHOLD(v) (4*(v/4) - 8 )
25
26typedef enum _firmware_init_step{
27 FW_INIT_STEP0_BOOT = 0,
28 FW_INIT_STEP1_MAIN = 1,
29 FW_INIT_STEP2_DATA = 2,
30}firmware_init_step_e;
31
32typedef enum _opt_rst_type{
33 OPT_SYSTEM_RESET = 0,
34 OPT_FIRMWARE_RESET = 1,
35}opt_rst_type_e;
36
37typedef enum _desc_packet_type_e{
38 DESC_PACKET_TYPE_INIT = 0,
39 DESC_PACKET_TYPE_NORMAL = 1,
40}desc_packet_type_e;
41
42typedef enum _firmware_source{
43 FW_SOURCE_IMG_FILE = 0,
44 FW_SOURCE_HEADER_FILE = 1,
45}firmware_source_e, *pfirmware_source_e;
46
47typedef enum _firmware_status{
48 FW_STATUS_0_INIT = 0,
49 FW_STATUS_1_MOVE_BOOT_CODE = 1,
50 FW_STATUS_2_MOVE_MAIN_CODE = 2,
51 FW_STATUS_3_TURNON_CPU = 3,
52 FW_STATUS_4_MOVE_DATA_CODE = 4,
53 FW_STATUS_5_READY = 5,
54}firmware_status_e;
55
56typedef struct _rt_firmare_seg_container {
57 u16 seg_size;
58 u8 *seg_ptr;
59}fw_seg_container, *pfw_seg_container;
60
61typedef struct _rt_firmware{
62 firmware_status_e firmware_status;
63 u16 cmdpacket_frag_thresold;
64#define RTL8190_MAX_FIRMWARE_CODE_SIZE 64000
65#define MAX_FW_INIT_STEP 3
66 u8 firmware_buf[MAX_FW_INIT_STEP][RTL8190_MAX_FIRMWARE_CODE_SIZE];
67 u16 firmware_buf_size[MAX_FW_INIT_STEP];
68} rt_firmware, *prt_firmware;
69
70bool init_firmware(struct net_device *dev);
71extern void firmware_init_param(struct net_device *dev);
72
73#endif
diff --git a/drivers/staging/rtl8192e/r8192E_hw.h b/drivers/staging/rtl8192e/r8192E_hw.h
index 24e7303e56a..0b29636c302 100644
--- a/drivers/staging/rtl8192e/r8192E_hw.h
+++ b/drivers/staging/rtl8192e/r8192E_hw.h
@@ -1,49 +1,36 @@
1/* 1/******************************************************************************
2 This is part of rtl8187 OpenSource driver. 2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 Copyright (C) Andrea Merello 2004-2005 <andreamrl@tiscali.it> 3 *
4 Released under the terms of GPL (General Public Licence) 4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/
5 19
6 Parts of this driver are based on the GPL part of the
7 official Realtek driver.
8 Parts of this driver are based on the rtl8180 driver skeleton
9 from Patric Schenke & Andres Salomon.
10 Parts of this driver are based on the Intel Pro Wireless
11 2100 GPL driver.
12 20
13 We want to tanks the Authors of those projects
14 and the Ndiswrapper project Authors.
15*/
16
17/* Mariusz Matuszek added full registers definition with Realtek's name */
18
19/* this file contains register definitions for the rtl8187 MAC controller */
20#ifndef R8180_HW 21#ifndef R8180_HW
21#define R8180_HW 22#define R8180_HW
22 23
23typedef enum _VERSION_8190{ 24typedef enum _BaseBand_Config_Type {
24 VERSION_8190_BD=0x3, 25 BaseBand_Config_PHY_REG = 0,
25 VERSION_8190_BE 26 BaseBand_Config_AGC_TAB = 1,
26}VERSION_8190,*PVERSION_8190; 27} BaseBand_Config_Type, *PBaseBand_Config_Type;
27//added for different RF type
28typedef enum _RT_RF_TYPE_DEF
29{
30 RF_1T2R = 0,
31 RF_2T4R,
32
33 RF_819X_MAX_TYPE
34}RT_RF_TYPE_DEF;
35
36typedef enum _BaseBand_Config_Type{
37 BaseBand_Config_PHY_REG = 0, //Radio Path A
38 BaseBand_Config_AGC_TAB = 1, //Radio Path B
39}BaseBand_Config_Type, *PBaseBand_Config_Type;
40 28
41#define RTL8187_REQT_READ 0xc0 29#define RTL8187_REQT_READ 0xc0
42#define RTL8187_REQT_WRITE 0x40 30#define RTL8187_REQT_WRITE 0x40
43#define RTL8187_REQ_GET_REGS 0x05 31#define RTL8187_REQ_GET_REGS 0x05
44#define RTL8187_REQ_SET_REGS 0x05 32#define RTL8187_REQ_SET_REGS 0x05
45 33
46#define R8180_MAX_RETRY 255
47#define MAX_TX_URB 5 34#define MAX_TX_URB 5
48#define MAX_RX_URB 16 35#define MAX_RX_URB 16
49#define RX_URB_SIZE 9100 36#define RX_URB_SIZE 9100
@@ -65,14 +52,14 @@ typedef enum _BaseBand_Config_Type{
65#define EEPROM_TxPowerDiff 0x1F 52#define EEPROM_TxPowerDiff 0x1F
66 53
67 54
68#define EEPROM_PwDiff 0x21 //0x21 55#define EEPROM_PwDiff 0x21
69#define EEPROM_CrystalCap 0x22 //0x22 56#define EEPROM_CrystalCap 0x22
70 57
71 58
72 59
73#define EEPROM_TxPwIndex_CCK_V1 0x29 //0x29~0x2B 60#define EEPROM_TxPwIndex_CCK_V1 0x29
74#define EEPROM_TxPwIndex_OFDM_24G_V1 0x2C //0x2C~0x2E 61#define EEPROM_TxPwIndex_OFDM_24G_V1 0x2C
75#define EEPROM_TxPwIndex_Ver 0x27 //0x27 62#define EEPROM_TxPwIndex_Ver 0x27
76 63
77#define EEPROM_Default_TxPowerDiff 0x0 64#define EEPROM_Default_TxPowerDiff 0x0
78#define EEPROM_Default_ThermalMeter 0x77 65#define EEPROM_Default_ThermalMeter 0x77
@@ -81,42 +68,51 @@ typedef enum _BaseBand_Config_Type{
81#define EEPROM_Default_PwDiff 0x4 68#define EEPROM_Default_PwDiff 0x4
82#define EEPROM_Default_CrystalCap 0x5 69#define EEPROM_Default_CrystalCap 0x5
83#define EEPROM_Default_TxPower 0x1010 70#define EEPROM_Default_TxPower 0x1010
84#define EEPROM_ICVersion_ChannelPlan 0x7C //0x7C:ChannelPlan, 0x7D:IC_Version 71#define EEPROM_ICVersion_ChannelPlan 0x7C
85#define EEPROM_Customer_ID 0x7B //0x7B:CustomerID 72#define EEPROM_Customer_ID 0x7B
86 73#ifdef RTL8190P
74#define EEPROM_RFInd_PowerDiff 0x14
75#define EEPROM_ThermalMeter 0x15
76#define EEPROM_TxPwDiff_CrystalCap 0x16
77#define EEPROM_TxPwIndex_CCK 0x18
78#define EEPROM_TxPwIndex_OFDM_24G 0x26
79#define EEPROM_TxPwIndex_OFDM_5G 0x34
80#define EEPROM_C56_CrystalCap 0x17
81#define EEPROM_C56_RfA_CCK_Chnl1_TxPwIndex 0x80
82#define EEPROM_C56_RfA_HT_OFDM_TxPwIndex 0x81
83#define EEPROM_C56_RfC_CCK_Chnl1_TxPwIndex 0xbc
84#define EEPROM_C56_RfC_HT_OFDM_TxPwIndex 0xb9
85#else
86#ifdef RTL8192E
87#define EEPROM_RFInd_PowerDiff 0x28 87#define EEPROM_RFInd_PowerDiff 0x28
88#define EEPROM_ThermalMeter 0x29 88#define EEPROM_ThermalMeter 0x29
89#define EEPROM_TxPwDiff_CrystalCap 0x2A //0x2A~0x2B 89#define EEPROM_TxPwDiff_CrystalCap 0x2A
90#define EEPROM_TxPwIndex_CCK 0x2C //0x23 90#define EEPROM_TxPwIndex_CCK 0x2C
91#define EEPROM_TxPwIndex_OFDM_24G 0x3A //0x24~0x26 91#define EEPROM_TxPwIndex_OFDM_24G 0x3A
92 92#endif
93#endif
93#define EEPROM_Default_TxPowerLevel 0x10 94#define EEPROM_Default_TxPowerLevel 0x10
94 95#define EEPROM_IC_VER 0x7d
95#define EEPROM_IC_VER 0x7d //0x7D 96#define EEPROM_CRC 0x7e
96#define EEPROM_CRC 0x7e //0x7E~0x7F
97 97
98#define EEPROM_CID_DEFAULT 0x0 98#define EEPROM_CID_DEFAULT 0x0
99#define EEPROM_CID_CAMEO 0x1 99#define EEPROM_CID_CAMEO 0x1
100#define EEPROM_CID_RUNTOP 0x2 100#define EEPROM_CID_RUNTOP 0x2
101#define EEPROM_CID_Senao 0x3 101#define EEPROM_CID_Senao 0x3
102#define EEPROM_CID_TOSHIBA 0x4 // Toshiba setting, Merge by Jacken, 2008/01/31 102#define EEPROM_CID_TOSHIBA 0x4
103#define EEPROM_CID_NetCore 0x5 103#define EEPROM_CID_NetCore 0x5
104#define EEPROM_CID_Nettronix 0x6 104#define EEPROM_CID_Nettronix 0x6
105#define EEPROM_CID_Pronet 0x7 105#define EEPROM_CID_Pronet 0x7
106#define EEPROM_CID_DLINK 0x8 106#define EEPROM_CID_DLINK 0x8
107#define EEPROM_CID_WHQL 0xFE //added by sherry for dtm, 20080728 107#define EEPROM_CID_WHQL 0xFE
108
109enum _RTL8192Pci_HW { 108enum _RTL8192Pci_HW {
110 MAC0 = 0x000, 109 MAC0 = 0x000,
111 MAC1 = 0x001, 110 MAC1 = 0x001,
112 MAC2 = 0x002, 111 MAC2 = 0x002,
113 MAC3 = 0x003, 112 MAC3 = 0x003,
114 MAC4 = 0x004, 113 MAC4 = 0x004,
115 MAC5 = 0x005, 114 MAC5 = 0x005,
116 PCIF = 0x009, // PCI Function Register 0x0009h~0x000bh 115 PCIF = 0x009,
117//----------------------------------------------------------------------------
118// 8190 PCIF bits (Offset 0x009-000b, 24bit)
119//----------------------------------------------------------------------------
120#define MXDMA2_16bytes 0x000 116#define MXDMA2_16bytes 0x000
121#define MXDMA2_32bytes 0x001 117#define MXDMA2_32bytes 0x001
122#define MXDMA2_64bytes 0x010 118#define MXDMA2_64bytes 0x010
@@ -129,8 +125,8 @@ enum _RTL8192Pci_HW {
129#define MULRW_SHIFT 3 125#define MULRW_SHIFT 3
130#define MXDMA2_RX_SHIFT 4 126#define MXDMA2_RX_SHIFT 4
131#define MXDMA2_TX_SHIFT 0 127#define MXDMA2_TX_SHIFT 0
132 PMR = 0x00c, // Power management register 128 PMR = 0x00c,
133 EPROM_CMD = 0x00e, 129 EPROM_CMD = 0x00e,
134#define EPROM_CMD_RESERVED_MASK BIT5 130#define EPROM_CMD_RESERVED_MASK BIT5
135#define EPROM_CMD_9356SEL BIT4 131#define EPROM_CMD_9356SEL BIT4
136#define EPROM_CMD_OPERATING_MODE_SHIFT 6 132#define EPROM_CMD_OPERATING_MODE_SHIFT 6
@@ -151,71 +147,65 @@ enum _RTL8192Pci_HW {
151 147
152 ANAPAR = 0x17, 148 ANAPAR = 0x17,
153#define BB_GLOBAL_RESET_BIT 0x1 149#define BB_GLOBAL_RESET_BIT 0x1
154 BB_GLOBAL_RESET = 0x020, // BasebandGlobal Reset Register 150 BB_GLOBAL_RESET = 0x020,
155 BSSIDR = 0x02E, // BSSID Register 151 BSSIDR = 0x02E,
156 CMDR = 0x037, // Command register 152 CMDR = 0x037,
157#define CR_RST 0x10 153#define CR_RST 0x10
158#define CR_RE 0x08 154#define CR_RE 0x08
159#define CR_TE 0x04 155#define CR_TE 0x04
160#define CR_MulRW 0x01 156#define CR_MulRW 0x01
161 SIFS = 0x03E, // SIFS register 157 SIFS = 0x03E,
162 TCR = 0x040, // Transmit Configuration Register 158 TCR = 0x040,
163 RCR = 0x044, // Receive Configuration Register 159 RCR = 0x044,
164//----------------------------------------------------------------------------
165//// 8190 (RCR) Receive Configuration Register (Offset 0x44~47, 32 bit)
166////----------------------------------------------------------------------------
167#define RCR_FILTER_MASK (BIT0|BIT1|BIT2|BIT3|BIT5|BIT12|BIT18|BIT19|BIT20|BIT21|BIT22|BIT23) 160#define RCR_FILTER_MASK (BIT0|BIT1|BIT2|BIT3|BIT5|BIT12|BIT18|BIT19|BIT20|BIT21|BIT22|BIT23)
168#define RCR_ONLYERLPKT BIT31 // Early Receiving based on Packet Size. 161#define RCR_ONLYERLPKT BIT31
169#define RCR_ENCS2 BIT30 // Enable Carrier Sense Detection Method 2 162#define RCR_ENCS2 BIT30
170#define RCR_ENCS1 BIT29 // Enable Carrier Sense Detection Method 1 163#define RCR_ENCS1 BIT29
171#define RCR_ENMBID BIT27 // Enable Multiple BssId. 164#define RCR_ENMBID BIT27
172#define RCR_ACKTXBW (BIT24|BIT25) // TXBW Setting of ACK frames 165#define RCR_ACKTXBW (BIT24|BIT25)
173#define RCR_CBSSID BIT23 // Accept BSSID match packet 166#define RCR_CBSSID BIT23
174#define RCR_APWRMGT BIT22 // Accept power management packet 167#define RCR_APWRMGT BIT22
175#define RCR_ADD3 BIT21 // Accept address 3 match packet 168#define RCR_ADD3 BIT21
176#define RCR_AMF BIT20 // Accept management type frame 169#define RCR_AMF BIT20
177#define RCR_ACF BIT19 // Accept control type frame 170#define RCR_ACF BIT19
178#define RCR_ADF BIT18 // Accept data type frame 171#define RCR_ADF BIT18
179#define RCR_RXFTH BIT13 // Rx FIFO Threshold 172#define RCR_RXFTH BIT13
180#define RCR_AICV BIT12 // Accept ICV error packet 173#define RCR_AICV BIT12
181#define RCR_ACRC32 BIT5 // Accept CRC32 error packet 174#define RCR_ACRC32 BIT5
182#define RCR_AB BIT3 // Accept broadcast packet 175#define RCR_AB BIT3
183#define RCR_AM BIT2 // Accept multicast packet 176#define RCR_AM BIT2
184#define RCR_APM BIT1 // Accept physical match packet 177#define RCR_APM BIT1
185#define RCR_AAP BIT0 // Accept all unicast packet 178#define RCR_AAP BIT0
186#define RCR_MXDMA_OFFSET 8 179#define RCR_MXDMA_OFFSET 8
187#define RCR_FIFO_OFFSET 13 180#define RCR_FIFO_OFFSET 13
188 SLOT_TIME = 0x049, // Slot Time Register 181 SLOT_TIME = 0x049,
189 ACK_TIMEOUT = 0x04c, // Ack Timeout Register 182 ACK_TIMEOUT = 0x04c,
190 PIFS_TIME = 0x04d, // PIFS time 183 PIFS_TIME = 0x04d,
191 USTIME = 0x04e, // Microsecond Tuning Register, Sets the microsecond time unit used by MAC clock. 184 USTIME = 0x04e,
192 EDCAPARA_BE = 0x050, // EDCA Parameter of AC BE 185 EDCAPARA_BE = 0x050,
193 EDCAPARA_BK = 0x054, // EDCA Parameter of AC BK 186 EDCAPARA_BK = 0x054,
194 EDCAPARA_VO = 0x058, // EDCA Parameter of AC VO 187 EDCAPARA_VO = 0x058,
195 EDCAPARA_VI = 0x05C, // EDCA Parameter of AC VI 188 EDCAPARA_VI = 0x05C,
196#define AC_PARAM_TXOP_LIMIT_OFFSET 16 189#define AC_PARAM_TXOP_LIMIT_OFFSET 16
197#define AC_PARAM_ECW_MAX_OFFSET 12 190#define AC_PARAM_ECW_MAX_OFFSET 12
198#define AC_PARAM_ECW_MIN_OFFSET 8 191#define AC_PARAM_ECW_MIN_OFFSET 8
199#define AC_PARAM_AIFS_OFFSET 0 192#define AC_PARAM_AIFS_OFFSET 0
200 RFPC = 0x05F, // Rx FIFO Packet Count 193 RFPC = 0x05F,
201 CWRR = 0x060, // Contention Window Report Register 194 CWRR = 0x060,
202 BCN_TCFG = 0x062, // Beacon Time Configuration 195 BCN_TCFG = 0x062,
203#define BCN_TCFG_CW_SHIFT 8 196#define BCN_TCFG_CW_SHIFT 8
204#define BCN_TCFG_IFS 0 197#define BCN_TCFG_IFS 0
205 BCN_INTERVAL = 0x070, // Beacon Interval (TU) 198 BCN_INTERVAL = 0x070,
206 ATIMWND = 0x072, // ATIM Window Size (TU) 199 ATIMWND = 0x072,
207 BCN_DRV_EARLY_INT = 0x074, // Driver Early Interrupt Time (TU). Time to send interrupt to notify to change beacon content before TBTT 200 BCN_DRV_EARLY_INT = 0x074,
208#define BCN_DRV_EARLY_INT_SWBCN_SHIFT 8 201#define BCN_DRV_EARLY_INT_SWBCN_SHIFT 8
209#define BCN_DRV_EARLY_INT_TIME_SHIFT 0 202#define BCN_DRV_EARLY_INT_TIME_SHIFT 0
210 BCN_DMATIME = 0x076, // Beacon DMA and ATIM interrupt time (US). Indicates the time before TBTT to perform beacon queue DMA 203 BCN_DMATIME = 0x076,
211 BCN_ERR_THRESH = 0x078, // Beacon Error Threshold 204 BCN_ERR_THRESH = 0x078,
212 RWCAM = 0x0A0, //IN 8190 Data Sheet is called CAMcmd 205 RWCAM = 0x0A0,
213 //---------------------------------------------------------------------------- 206#define CAM_CM_SecCAMPolling BIT31
214 //// 8190 CAM Command Register (offset 0xA0, 4 byte) 207#define CAM_CM_SecCAMClr BIT30
215 ////---------------------------------------------------------------------------- 208#define CAM_CM_SecCAMWE BIT16
216#define CAM_CM_SecCAMPolling BIT31 //Security CAM Polling
217#define CAM_CM_SecCAMClr BIT30 //Clear all bits in CAM
218#define CAM_CM_SecCAMWE BIT16 //Security CAM enable
219#define CAM_VALID BIT15 209#define CAM_VALID BIT15
220#define CAM_NOTVALID 0x0000 210#define CAM_NOTVALID 0x0000
221#define CAM_USEDK BIT5 211#define CAM_USEDK BIT5
@@ -234,68 +224,62 @@ enum _RTL8192Pci_HW {
234#define CAM_READ 0x00000000 224#define CAM_READ 0x00000000
235#define CAM_POLLINIG BIT31 225#define CAM_POLLINIG BIT31
236#define SCR_UseDK 0x01 226#define SCR_UseDK 0x01
237 WCAMI = 0x0A4, // Software write CAM input content 227 WCAMI = 0x0A4,
238 RCAMO = 0x0A8, // Software read/write CAM config 228 RCAMO = 0x0A8,
239 SECR = 0x0B0, //Security Configuration Register 229 SECR = 0x0B0,
240#define SCR_TxUseDK BIT0 //Force Tx Use Default Key 230#define SCR_TxUseDK BIT0
241#define SCR_RxUseDK BIT1 //Force Rx Use Default Key 231#define SCR_RxUseDK BIT1
242#define SCR_TxEncEnable BIT2 //Enable Tx Encryption 232#define SCR_TxEncEnable BIT2
243#define SCR_RxDecEnable BIT3 //Enable Rx Decryption 233#define SCR_RxDecEnable BIT3
244#define SCR_SKByA2 BIT4 //Search kEY BY A2 234#define SCR_SKByA2 BIT4
245#define SCR_NoSKMC BIT5 //No Key Search for Multicast 235#define SCR_NoSKMC BIT5
246 SWREGULATOR = 0x0BD, // Switching Regulator 236 SWREGULATOR = 0x0BD,
247 INTA_MASK = 0x0f4, 237 INTA_MASK = 0x0f4,
248//----------------------------------------------------------------------------
249// 8190 IMR/ISR bits (offset 0xfd, 8bits)
250//----------------------------------------------------------------------------
251#define IMR8190_DISABLED 0x0 238#define IMR8190_DISABLED 0x0
252#define IMR_ATIMEND BIT28 // ATIM Window End Interrupt 239#define IMR_ATIMEND BIT28
253#define IMR_TBDOK BIT27 // Transmit Beacon OK Interrupt 240#define IMR_TBDOK BIT27
254#define IMR_TBDER BIT26 // Transmit Beacon Error Interrupt 241#define IMR_TBDER BIT26
255#define IMR_TXFOVW BIT15 // Transmit FIFO Overflow 242#define IMR_TXFOVW BIT15
256#define IMR_TIMEOUT0 BIT14 // TimeOut0 243#define IMR_TIMEOUT0 BIT14
257#define IMR_BcnInt BIT13 // Beacon DMA Interrupt 0 244#define IMR_BcnInt BIT13
258#define IMR_RXFOVW BIT12 // Receive FIFO Overflow 245#define IMR_RXFOVW BIT12
259#define IMR_RDU BIT11 // Receive Descriptor Unavailable 246#define IMR_RDU BIT11
260#define IMR_RXCMDOK BIT10 // Receive Command Packet OK 247#define IMR_RXCMDOK BIT10
261#define IMR_BDOK BIT9 // Beacon Queue DMA OK Interrup 248#define IMR_BDOK BIT9
262#define IMR_HIGHDOK BIT8 // High Queue DMA OK Interrupt 249#define IMR_HIGHDOK BIT8
263#define IMR_COMDOK BIT7 // Command Queue DMA OK Interrupt 250#define IMR_COMDOK BIT7
264#define IMR_MGNTDOK BIT6 // Management Queue DMA OK Interrupt 251#define IMR_MGNTDOK BIT6
265#define IMR_HCCADOK BIT5 // HCCA Queue DMA OK Interrupt 252#define IMR_HCCADOK BIT5
266#define IMR_BKDOK BIT4 // AC_BK DMA OK Interrupt 253#define IMR_BKDOK BIT4
267#define IMR_BEDOK BIT3 // AC_BE DMA OK Interrupt 254#define IMR_BEDOK BIT3
268#define IMR_VIDOK BIT2 // AC_VI DMA OK Interrupt 255#define IMR_VIDOK BIT2
269#define IMR_VODOK BIT1 // AC_VO DMA Interrupt 256#define IMR_VODOK BIT1
270#define IMR_ROK BIT0 // Receive DMA OK Interrupt 257#define IMR_ROK BIT0
271 ISR = 0x0f8, // Interrupt Status Register 258 ISR = 0x0f8,
272 TPPoll = 0x0fd, // Transmit priority polling register 259 TPPoll = 0x0fd,
273#define TPPoll_BKQ BIT0 // BK queue polling 260#define TPPoll_BKQ BIT0
274#define TPPoll_BEQ BIT1 // BE queue polling 261#define TPPoll_BEQ BIT1
275#define TPPoll_VIQ BIT2 // VI queue polling 262#define TPPoll_VIQ BIT2
276#define TPPoll_VOQ BIT3 // VO queue polling 263#define TPPoll_VOQ BIT3
277#define TPPoll_BQ BIT4 // Beacon queue polling 264#define TPPoll_BQ BIT4
278#define TPPoll_CQ BIT5 // Command queue polling 265#define TPPoll_CQ BIT5
279#define TPPoll_MQ BIT6 // Management queue polling 266#define TPPoll_MQ BIT6
280#define TPPoll_HQ BIT7 // High queue polling 267#define TPPoll_HQ BIT7
281#define TPPoll_HCCAQ BIT8 // HCCA queue polling 268#define TPPoll_HCCAQ BIT8
282#define TPPoll_StopBK BIT9 // Stop BK queue 269#define TPPoll_StopBK BIT9
283#define TPPoll_StopBE BIT10 // Stop BE queue 270#define TPPoll_StopBE BIT10
284#define TPPoll_StopVI BIT11 // Stop VI queue 271#define TPPoll_StopVI BIT11
285#define TPPoll_StopVO BIT12 // Stop VO queue 272#define TPPoll_StopVO BIT12
286#define TPPoll_StopMgt BIT13 // Stop Mgnt queue 273#define TPPoll_StopMgt BIT13
287#define TPPoll_StopHigh BIT14 // Stop High queue 274#define TPPoll_StopHigh BIT14
288#define TPPoll_StopHCCA BIT15 // Stop HCCA queue 275#define TPPoll_StopHCCA BIT15
289#define TPPoll_SHIFT 8 // Queue ID mapping 276#define TPPoll_SHIFT 8
290 277
291 PSR = 0x0ff, // Page Select Register 278 PSR = 0x0ff,
292#define PSR_GEN 0x0 // Page 0 register general MAC Control 279#define PSR_GEN 0x0
293#define PSR_CPU 0x1 // Page 1 register for CPU 280#define PSR_CPU 0x1
294 CPU_GEN = 0x100, // CPU Reset Register 281 CPU_GEN = 0x100,
295 BB_RESET = 0x101, // Baseband Reset 282 BB_RESET = 0x101,
296//----------------------------------------------------------------------------
297// 8190 CPU General Register (offset 0x100, 4 byte)
298//----------------------------------------------------------------------------
299#define CPU_CCK_LOOPBACK 0x00030000 283#define CPU_CCK_LOOPBACK 0x00030000
300#define CPU_GEN_SYSTEM_RESET 0x00000001 284#define CPU_GEN_SYSTEM_RESET 0x00000001
301#define CPU_GEN_FIRMWARE_RESET 0x00000008 285#define CPU_GEN_FIRMWARE_RESET 0x00000008
@@ -304,19 +288,15 @@ enum _RTL8192Pci_HW {
304#define CPU_GEN_PUT_CODE_OK 0x00000080 288#define CPU_GEN_PUT_CODE_OK 0x00000080
305#define CPU_GEN_BB_RST 0x00000100 289#define CPU_GEN_BB_RST 0x00000100
306#define CPU_GEN_PWR_STB_CPU 0x00000004 290#define CPU_GEN_PWR_STB_CPU 0x00000004
307#define CPU_GEN_NO_LOOPBACK_MSK 0xFFF8FFFF // Set bit18,17,16 to 0. Set bit19 291#define CPU_GEN_NO_LOOPBACK_MSK 0xFFF8FFFF
308#define CPU_GEN_NO_LOOPBACK_SET 0x00080000 // Set BIT19 to 1 292#define CPU_GEN_NO_LOOPBACK_SET 0x00080000
309#define CPU_GEN_GPIO_UART 0x00007000 293#define CPU_GEN_GPIO_UART 0x00007000
310 294
311 LED1Cfg = 0x154,// LED1 Configuration Register 295 LED1Cfg = 0x154,
312 LED0Cfg = 0x155,// LED0 Configuration Register 296 LED0Cfg = 0x155,
313 297
314 AcmAvg = 0x170, // ACM Average Period Register 298 AcmAvg = 0x170,
315 AcmHwCtrl = 0x171, // ACM Hardware Control Register 299 AcmHwCtrl = 0x171,
316//----------------------------------------------------------------------------
317//
318// 8190 AcmHwCtrl bits (offset 0x171, 1 byte)
319//----------------------------------------------------------------------------
320#define AcmHw_HwEn BIT0 300#define AcmHw_HwEn BIT0
321#define AcmHw_BeqEn BIT1 301#define AcmHw_BeqEn BIT1
322#define AcmHw_ViqEn BIT2 302#define AcmHw_ViqEn BIT2
@@ -324,67 +304,65 @@ enum _RTL8192Pci_HW {
324#define AcmHw_BeqStatus BIT4 304#define AcmHw_BeqStatus BIT4
325#define AcmHw_ViqStatus BIT5 305#define AcmHw_ViqStatus BIT5
326#define AcmHw_VoqStatus BIT6 306#define AcmHw_VoqStatus BIT6
327 AcmFwCtrl = 0x172, // ACM Firmware Control Register 307 AcmFwCtrl = 0x172,
328#define AcmFw_BeqStatus BIT0 308#define AcmFw_BeqStatus BIT0
329#define AcmFw_ViqStatus BIT1 309#define AcmFw_ViqStatus BIT1
330#define AcmFw_VoqStatus BIT2 310#define AcmFw_VoqStatus BIT2
331 VOAdmTime = 0x174, // VO Queue Admitted Time Register 311 VOAdmTime = 0x174,
332 VIAdmTime = 0x178, // VI Queue Admitted Time Register 312 VIAdmTime = 0x178,
333 BEAdmTime = 0x17C, // BE Queue Admitted Time Register 313 BEAdmTime = 0x17C,
334 RQPN1 = 0x180, // Reserved Queue Page Number , Vo Vi, Be, Bk 314 RQPN1 = 0x180,
335 RQPN2 = 0x184, // Reserved Queue Page Number, HCCA, Cmd, Mgnt, High 315 RQPN2 = 0x184,
336 RQPN3 = 0x188, // Reserved Queue Page Number, Bcn, Public, 316 RQPN3 = 0x188,
337 QPRR = 0x1E0, // Queue Page Report per TID 317 QPRR = 0x1E0,
338 QPNR = 0x1F0, // Queue Packet Number report per TID 318 QPNR = 0x1F0,
339/* there's 9 tx descriptor base address available */ 319 BQDA = 0x200,
340 BQDA = 0x200, // Beacon Queue Descriptor Address 320 HQDA = 0x204,
341 HQDA = 0x204, // High Priority Queue Descriptor Address 321 CQDA = 0x208,
342 CQDA = 0x208, // Command Queue Descriptor Address 322 MQDA = 0x20C,
343 MQDA = 0x20C, // Management Queue Descriptor Address 323 HCCAQDA = 0x210,
344 HCCAQDA = 0x210, // HCCA Queue Descriptor Address 324 VOQDA = 0x214,
345 VOQDA = 0x214, // VO Queue Descriptor Address 325 VIQDA = 0x218,
346 VIQDA = 0x218, // VI Queue Descriptor Address 326 BEQDA = 0x21C,
347 BEQDA = 0x21C, // BE Queue Descriptor Address 327 BKQDA = 0x220,
348 BKQDA = 0x220, // BK Queue Descriptor Address 328 RCQDA = 0x224,
349/* there's 2 rx descriptor base address availalbe */ 329 RDQDA = 0x228,
350 RCQDA = 0x224, // Receive command Queue Descriptor Address 330
351 RDQDA = 0x228, // Receive Queue Descriptor Start Address 331 MAR0 = 0x240,
352
353 MAR0 = 0x240, // Multicast filter.
354 MAR4 = 0x244, 332 MAR4 = 0x244,
355 333
356 CCX_PERIOD = 0x250, // CCX Measurement Period Register, in unit of TU. 334 CCX_PERIOD = 0x250,
357 CLM_RESULT = 0x251, // CCA Busy fraction register. 335 CLM_RESULT = 0x251,
358 NHM_PERIOD = 0x252, // NHM Measurement Period register, in unit of TU. 336 NHM_PERIOD = 0x252,
359 337
360 NHM_THRESHOLD0 = 0x253, // Noise Histogram Meashorement0. 338 NHM_THRESHOLD0 = 0x253,
361 NHM_THRESHOLD1 = 0x254, // Noise Histogram Meashorement1. 339 NHM_THRESHOLD1 = 0x254,
362 NHM_THRESHOLD2 = 0x255, // Noise Histogram Meashorement2. 340 NHM_THRESHOLD2 = 0x255,
363 NHM_THRESHOLD3 = 0x256, // Noise Histogram Meashorement3. 341 NHM_THRESHOLD3 = 0x256,
364 NHM_THRESHOLD4 = 0x257, // Noise Histogram Meashorement4. 342 NHM_THRESHOLD4 = 0x257,
365 NHM_THRESHOLD5 = 0x258, // Noise Histogram Meashorement5. 343 NHM_THRESHOLD5 = 0x258,
366 NHM_THRESHOLD6 = 0x259, // Noise Histogram Meashorement6 344 NHM_THRESHOLD6 = 0x259,
367 345
368 MCTRL = 0x25A, // Measurement Control 346 MCTRL = 0x25A,
369 347
370 NHM_RPI_COUNTER0 = 0x264, // Noise Histogram RPI counter0, the fraction of signal strength < NHM_THRESHOLD0. 348 NHM_RPI_COUNTER0 = 0x264,
371 NHM_RPI_COUNTER1 = 0x265, // Noise Histogram RPI counter1, the fraction of signal strength in (NHM_THRESHOLD0, NHM_THRESHOLD1]. 349 NHM_RPI_COUNTER1 = 0x265,
372 NHM_RPI_COUNTER2 = 0x266, // Noise Histogram RPI counter2, the fraction of signal strength in (NHM_THRESHOLD1, NHM_THRESHOLD2]. 350 NHM_RPI_COUNTER2 = 0x266,
373 NHM_RPI_COUNTER3 = 0x267, // Noise Histogram RPI counter3, the fraction of signal strength in (NHM_THRESHOLD2, NHM_THRESHOLD3]. 351 NHM_RPI_COUNTER3 = 0x267,
374 NHM_RPI_COUNTER4 = 0x268, // Noise Histogram RPI counter4, the fraction of signal strength in (NHM_THRESHOLD3, NHM_THRESHOLD4]. 352 NHM_RPI_COUNTER4 = 0x268,
375 NHM_RPI_COUNTER5 = 0x269, // Noise Histogram RPI counter5, the fraction of signal strength in (NHM_THRESHOLD4, NHM_THRESHOLD5]. 353 NHM_RPI_COUNTER5 = 0x269,
376 NHM_RPI_COUNTER6 = 0x26A, // Noise Histogram RPI counter6, the fraction of signal strength in (NHM_THRESHOLD5, NHM_THRESHOLD6]. 354 NHM_RPI_COUNTER6 = 0x26A,
377 NHM_RPI_COUNTER7 = 0x26B, // Noise Histogram RPI counter7, the fraction of signal strength in (NHM_THRESHOLD6, NHM_THRESHOLD7]. 355 NHM_RPI_COUNTER7 = 0x26B,
378 WFCRC0 = 0x2f0, 356 WFCRC0 = 0x2f0,
379 WFCRC1 = 0x2f4, 357 WFCRC1 = 0x2f4,
380 WFCRC2 = 0x2f8, 358 WFCRC2 = 0x2f8,
381 359
382 BW_OPMODE = 0x300, // Bandwidth operation mode 360 BW_OPMODE = 0x300,
383#define BW_OPMODE_11J BIT0 361#define BW_OPMODE_11J BIT0
384#define BW_OPMODE_5G BIT1 362#define BW_OPMODE_5G BIT1
385#define BW_OPMODE_20MHZ BIT2 363#define BW_OPMODE_20MHZ BIT2
386 IC_VERRSION = 0x301, //IC_VERSION 364 IC_VERRSION = 0x301,
387 MSR = 0x303, // Media Status register 365 MSR = 0x303,
388#define MSR_LINK_MASK ((1<<0)|(1<<1)) 366#define MSR_LINK_MASK ((1<<0)|(1<<1))
389#define MSR_LINK_MANAGED 2 367#define MSR_LINK_MANAGED 2
390#define MSR_LINK_NONE 0 368#define MSR_LINK_NONE 0
@@ -392,11 +370,17 @@ enum _RTL8192Pci_HW {
392#define MSR_LINK_ADHOC 1 370#define MSR_LINK_ADHOC 1
393#define MSR_LINK_MASTER 3 371#define MSR_LINK_MASTER 3
394#define MSR_LINK_ENEDCA (1<<4) 372#define MSR_LINK_ENEDCA (1<<4)
395 RETRY_LIMIT = 0x304, // Retry Limit [15:8]-short, [7:0]-long 373
374#define MSR_NOLINK 0x00
375#define MSR_ADHOC 0x01
376#define MSR_INFRA 0x02
377#define MSR_AP 0x03
378
379 RETRY_LIMIT = 0x304,
396#define RETRY_LIMIT_SHORT_SHIFT 8 380#define RETRY_LIMIT_SHORT_SHIFT 8
397#define RETRY_LIMIT_LONG_SHIFT 0 381#define RETRY_LIMIT_LONG_SHIFT 0
398 TSFR = 0x308, 382 TSFR = 0x308,
399 RRSR = 0x310, // Response Rate Set 383 RRSR = 0x310,
400#define RRSR_RSC_OFFSET 21 384#define RRSR_RSC_OFFSET 21
401#define RRSR_SHORT_OFFSET 23 385#define RRSR_SHORT_OFFSET 23
402#define RRSR_RSC_DUPLICATE 0x600000 386#define RRSR_RSC_DUPLICATE 0x600000
@@ -423,18 +407,13 @@ enum _RTL8192Pci_HW {
423#define RRSR_MCS5 BIT17 407#define RRSR_MCS5 BIT17
424#define RRSR_MCS6 BIT18 408#define RRSR_MCS6 BIT18
425#define RRSR_MCS7 BIT19 409#define RRSR_MCS7 BIT19
426#define BRSR_AckShortPmb BIT23 // CCK ACK: use Short Preamble or not 410#define BRSR_AckShortPmb BIT23
427 UFWP = 0x318, 411 UFWP = 0x318,
428 RATR0 = 0x320, // Rate Adaptive Table register1 412 RATR0 = 0x320,
429//----------------------------------------------------------------------------
430// 8190 Rate Adaptive Table Register (offset 0x320, 4 byte)
431//----------------------------------------------------------------------------
432//CCK
433#define RATR_1M 0x00000001 413#define RATR_1M 0x00000001
434#define RATR_2M 0x00000002 414#define RATR_2M 0x00000002
435#define RATR_55M 0x00000004 415#define RATR_55M 0x00000004
436#define RATR_11M 0x00000008 416#define RATR_11M 0x00000008
437//OFDM
438#define RATR_6M 0x00000010 417#define RATR_6M 0x00000010
439#define RATR_9M 0x00000020 418#define RATR_9M 0x00000020
440#define RATR_12M 0x00000040 419#define RATR_12M 0x00000040
@@ -443,7 +422,6 @@ enum _RTL8192Pci_HW {
443#define RATR_36M 0x00000200 422#define RATR_36M 0x00000200
444#define RATR_48M 0x00000400 423#define RATR_48M 0x00000400
445#define RATR_54M 0x00000800 424#define RATR_54M 0x00000800
446//MCS 1 Spatial Stream
447#define RATR_MCS0 0x00001000 425#define RATR_MCS0 0x00001000
448#define RATR_MCS1 0x00002000 426#define RATR_MCS1 0x00002000
449#define RATR_MCS2 0x00004000 427#define RATR_MCS2 0x00004000
@@ -452,7 +430,6 @@ enum _RTL8192Pci_HW {
452#define RATR_MCS5 0x00020000 430#define RATR_MCS5 0x00020000
453#define RATR_MCS6 0x00040000 431#define RATR_MCS6 0x00040000
454#define RATR_MCS7 0x00080000 432#define RATR_MCS7 0x00080000
455//MCS 2 Spatial Stream
456#define RATR_MCS8 0x00100000 433#define RATR_MCS8 0x00100000
457#define RATR_MCS9 0x00200000 434#define RATR_MCS9 0x00200000
458#define RATR_MCS10 0x00400000 435#define RATR_MCS10 0x00400000
@@ -461,7 +438,6 @@ enum _RTL8192Pci_HW {
461#define RATR_MCS13 0x02000000 438#define RATR_MCS13 0x02000000
462#define RATR_MCS14 0x04000000 439#define RATR_MCS14 0x04000000
463#define RATR_MCS15 0x08000000 440#define RATR_MCS15 0x08000000
464// ALL CCK Rate
465#define RATE_ALL_CCK RATR_1M|RATR_2M|RATR_55M|RATR_11M 441#define RATE_ALL_CCK RATR_1M|RATR_2M|RATR_55M|RATR_11M
466#define RATE_ALL_OFDM_AG RATR_6M|RATR_9M|RATR_12M|RATR_18M|RATR_24M|RATR_36M|RATR_48M|RATR_54M 442#define RATE_ALL_OFDM_AG RATR_6M|RATR_9M|RATR_12M|RATR_18M|RATR_24M|RATR_36M|RATR_48M|RATR_54M
467#define RATE_ALL_OFDM_1SS RATR_MCS0|RATR_MCS1|RATR_MCS2|RATR_MCS3 | \ 443#define RATE_ALL_OFDM_1SS RATR_MCS0|RATR_MCS1|RATR_MCS2|RATR_MCS3 | \
@@ -470,22 +446,20 @@ enum _RTL8192Pci_HW {
470 RATR_MCS12|RATR_MCS13|RATR_MCS14|RATR_MCS15 446 RATR_MCS12|RATR_MCS13|RATR_MCS14|RATR_MCS15
471 447
472 448
473 DRIVER_RSSI = 0x32c, // Driver tell Firmware current RSSI 449 DRIVER_RSSI = 0x32c,
474 MCS_TXAGC = 0x340, // MCS AGC 450 MCS_TXAGC = 0x340,
475 CCK_TXAGC = 0x348, // CCK AGC 451 CCK_TXAGC = 0x348,
476 MacBlkCtrl = 0x403, // Mac block on/off control register 452 MacBlkCtrl = 0x403,
477 453
478}; 454}
455;
479 456
480#define GPI 0x108 457#define GPI 0x108
481#define GPO 0x109 458#define GPO 0x109
482#define GPE 0x10a 459#define GPE 0x10a
483 460
484#define ANAPAR_FOR_8192PciE 0x17 // Analog parameter register 461#define HWSET_MAX_SIZE_92S 128
485 462
486#define MSR_NOLINK 0x00 463#define ANAPAR_FOR_8192PciE 0x17
487#define MSR_ADHOC 0x01
488#define MSR_INFRA 0x02
489#define MSR_AP 0x03
490 464
491#endif 465#endif
diff --git a/drivers/staging/rtl8192e/r8192E_hwimg.c b/drivers/staging/rtl8192e/r8192E_hwimg.c
new file mode 100644
index 00000000000..1b42f7335d9
--- /dev/null
+++ b/drivers/staging/rtl8192e/r8192E_hwimg.c
@@ -0,0 +1,3337 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/
19/*Created on 2008/11/18, 3: 7*/
20
21#include "r8192E_hwimg.h"
22
23u8 Rtl8192PciEFwBootArray[BootArrayLengthPciE] = {
240x10,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x3c,0x08,0xbf,0xc0,0x25,0x08,0x00,0x08,
250x3c,0x09,0xb0,0x03,0xad,0x28,0x00,0x20,0x40,0x80,0x68,0x00,0x00,0x00,0x00,0x00,
260x3c,0x0a,0xd0,0x00,0x40,0x8a,0x60,0x00,0x00,0x00,0x00,0x00,0x3c,0x08,0x80,0x01,
270x25,0x08,0xa8,0x04,0x24,0x09,0x00,0x01,0x3c,0x01,0x7f,0xff,0x34,0x21,0xff,0xff,
280x01,0x01,0x50,0x24,0x00,0x09,0x48,0x40,0x35,0x29,0x00,0x01,0x01,0x2a,0x10,0x2b,
290x14,0x40,0xff,0xfc,0x00,0x00,0x00,0x00,0x3c,0x0a,0x00,0x00,0x25,0x4a,0x00,0x00,
300x4c,0x8a,0x00,0x00,0x4c,0x89,0x08,0x00,0x00,0x00,0x00,0x00,0x3c,0x08,0x80,0x01,
310x25,0x08,0xa8,0x04,0x3c,0x01,0x80,0x00,0x01,0x21,0x48,0x25,0x3c,0x0a,0xbf,0xc0,
320x25,0x4a,0x00,0x7c,0x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,0xad,0x00,0x00,0x00,
330x21,0x08,0x00,0x04,0x01,0x09,0x10,0x2b,0x14,0x40,0xff,0xf8,0x00,0x00,0x00,0x00,
340x3c,0x08,0x80,0x01,0x25,0x08,0x7f,0xff,0x24,0x09,0x00,0x01,0x3c,0x01,0x7f,0xff,
350x34,0x21,0xff,0xff,0x01,0x01,0x50,0x24,0x00,0x09,0x48,0x40,0x35,0x29,0x00,0x01,
360x01,0x2a,0x10,0x2b,0x14,0x40,0xff,0xfc,0x00,0x00,0x00,0x00,0x3c,0x0a,0x80,0x01,
370x25,0x4a,0x00,0x00,0x3c,0x01,0x7f,0xff,0x34,0x21,0xff,0xff,0x01,0x41,0x50,0x24,
380x3c,0x09,0x00,0x01,0x35,0x29,0x7f,0xff,0x4c,0x8a,0x20,0x00,0x4c,0x89,0x28,0x00,
390x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x24,0x08,0x04,0x10,
400x00,0x00,0x00,0x00,0x40,0x88,0xa0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
410x3c,0x08,0xbf,0xc0,0x00,0x00,0x00,0x00,0x8d,0x09,0x00,0x00,0x00,0x00,0x00,0x00,
420x3c,0x0a,0xbf,0xc0,0x25,0x4a,0x01,0x20,0x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,
430x3c,0x08,0xb0,0x03,0x8d,0x09,0x00,0x00,0x00,0x00,0x00,0x00,0x35,0x29,0x00,0x10,
440xad,0x09,0x00,0x00,0x00,0x00,0x00,0x00,0x3c,0x08,0x80,0x00,0x25,0x08,0x4b,0x94,
450x01,0x00,0x00,0x08,0x00,0x00,0x00,0x00,};
46
47u8 Rtl8192PciEFwMainArray[MainArrayLengthPciE] = {
480x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
490x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
500x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
510x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
520x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
530x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
540x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
550x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
560x40,0x04,0x68,0x00,0x40,0x05,0x70,0x00,0x40,0x06,0x40,0x00,0x0c,0x00,0x12,0x98,
570x00,0x00,0x00,0x00,0x40,0x1a,0x68,0x00,0x33,0x5b,0x00,0x3c,0x17,0x60,0x00,0x09,
580x00,0x00,0x00,0x00,0x40,0x1b,0x60,0x00,0x00,0x00,0x00,0x00,0x03,0x5b,0xd0,0x24,
590x40,0x1a,0x70,0x00,0x03,0x40,0x00,0x08,0x42,0x00,0x00,0x10,0x00,0x00,0x00,0x00,
600x00,0x00,0x00,0x00,0x3c,0x02,0xff,0xff,0x34,0x42,0xff,0xff,0x8c,0x43,0x00,0x00,
610x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,0x24,0x42,0x00,0xd0,
620xac,0x62,0x00,0x00,0x00,0x00,0x20,0x21,0x27,0x85,0x8b,0x70,0x00,0x85,0x18,0x21,
630x24,0x84,0x00,0x01,0x28,0x82,0x00,0x0a,0x14,0x40,0xff,0xfc,0xa0,0x60,0x00,0x00,
640x27,0x82,0x8b,0x7a,0x24,0x04,0x00,0x06,0x24,0x84,0xff,0xff,0xa4,0x40,0x00,0x00,
650x04,0x81,0xff,0xfd,0x24,0x42,0x00,0x02,0x24,0x02,0x00,0x03,0xa3,0x82,0x8b,0x70,
660x24,0x02,0x00,0x0a,0x24,0x03,0x09,0xc4,0xa3,0x82,0x8b,0x72,0x24,0x02,0x00,0x04,
670x24,0x04,0x00,0x01,0x24,0x05,0x00,0x02,0xa7,0x83,0x8b,0x86,0xa3,0x82,0x8b,0x78,
680x24,0x03,0x04,0x00,0x24,0x02,0x02,0x00,0xaf,0x83,0x8b,0x8c,0xa3,0x85,0x8b,0x79,
690xa7,0x82,0x8b,0x7a,0xa7,0x84,0x8b,0x7c,0xaf,0x84,0x8b,0x88,0xa3,0x84,0x8b,0x71,
700xa3,0x80,0x8b,0x73,0xa3,0x80,0x8b,0x74,0xa3,0x80,0x8b,0x75,0xa3,0x84,0x8b,0x76,
710xa3,0x85,0x8b,0x77,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,
720x3c,0x02,0x80,0x00,0x24,0x42,0x01,0x7c,0x34,0x63,0x00,0x20,0xac,0x62,0x00,0x00,
730x27,0x84,0x8b,0x98,0x00,0x00,0x10,0x21,0x24,0x42,0x00,0x01,0x00,0x02,0x16,0x00,
740x00,0x02,0x16,0x03,0x28,0x43,0x00,0x03,0xac,0x80,0xff,0xfc,0xa0,0x80,0x00,0x00,
750x14,0x60,0xff,0xf9,0x24,0x84,0x00,0x0c,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
760x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,0x24,0x42,0x01,0xc0,
770x3c,0x08,0xb0,0x03,0xac,0x62,0x00,0x00,0x35,0x08,0x00,0x70,0x8d,0x02,0x00,0x00,
780x00,0xa0,0x48,0x21,0x00,0x04,0x26,0x00,0x00,0x02,0x2a,0x43,0x00,0x06,0x36,0x00,
790x00,0x07,0x3e,0x00,0x00,0x02,0x12,0x03,0x29,0x23,0x00,0x03,0x00,0x04,0x56,0x03,
800x00,0x06,0x36,0x03,0x00,0x07,0x3e,0x03,0x30,0x48,0x00,0x01,0x10,0x60,0x00,0x11,
810x30,0xa5,0x00,0x07,0x24,0x02,0x00,0x02,0x00,0x49,0x10,0x23,0x00,0x45,0x10,0x07,
820x30,0x42,0x00,0x01,0x10,0x40,0x00,0x66,0x00,0x00,0x00,0x00,0x8f,0xa2,0x00,0x10,
830x00,0x00,0x00,0x00,0x00,0x02,0x21,0x43,0x11,0x00,0x00,0x10,0x00,0x07,0x20,0x0b,
840x15,0x20,0x00,0x06,0x24,0x02,0x00,0x01,0x3c,0x02,0xb0,0x05,0x34,0x42,0x01,0x20,
850xa4,0x44,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x11,0x22,0x00,0x04,
860x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x05,0x08,0x00,0x00,0x94,0x34,0x42,0x01,0x24,
870x3c,0x02,0xb0,0x05,0x08,0x00,0x00,0x94,0x34,0x42,0x01,0x22,0x15,0x20,0x00,0x54,
880x24,0x02,0x00,0x01,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x74,0x90,0x43,0x00,0x00,
890x00,0x00,0x00,0x00,0xaf,0x83,0x8b,0x94,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x70,
900x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x6b,0x00,0x08,0x11,0x60,0x00,0x18,
910x00,0x09,0x28,0x40,0x00,0x00,0x40,0x21,0x27,0x85,0x8b,0x90,0x8c,0xa3,0x00,0x00,
920x8c,0xa2,0x00,0x04,0x00,0x00,0x00,0x00,0x00,0x62,0x38,0x23,0x00,0x43,0x10,0x2a,
930x10,0x40,0x00,0x3d,0x00,0x00,0x00,0x00,0xac,0xa7,0x00,0x00,0x25,0x02,0x00,0x01,
940x00,0x02,0x16,0x00,0x00,0x02,0x46,0x03,0x29,0x03,0x00,0x03,0x14,0x60,0xff,0xf3,
950x24,0xa5,0x00,0x0c,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x70,0x90,0x62,0x00,0x00,
960x00,0x00,0x00,0x00,0x00,0x4b,0x10,0x23,0xa0,0x62,0x00,0x00,0x00,0x09,0x28,0x40,
970x00,0xa9,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x8b,0x98,0x00,0x0a,0x20,0x0b,
980x00,0x43,0x18,0x21,0x10,0xc0,0x00,0x05,0x00,0x00,0x38,0x21,0x80,0x62,0x00,0x01,
990x00,0x00,0x00,0x00,0x14,0x40,0x00,0x05,0x00,0x00,0x00,0x00,0x80,0x62,0x00,0x00,
1000x00,0x00,0x00,0x00,0x14,0x40,0x00,0x03,0x00,0xa9,0x10,0x21,0x24,0x07,0x00,0x01,
1010x00,0xa9,0x10,0x21,0x00,0x02,0x30,0x80,0x27,0x82,0x8b,0x98,0xa0,0x67,0x00,0x01,
1020x00,0xc2,0x38,0x21,0x80,0xe3,0x00,0x01,0x00,0x00,0x00,0x00,0x10,0x60,0x00,0x07,
1030x00,0x00,0x00,0x00,0x27,0x83,0x8b,0x90,0x00,0xc3,0x18,0x21,0x8c,0x62,0x00,0x00,
1040x00,0x00,0x00,0x00,0x00,0x44,0x10,0x21,0xac,0x62,0x00,0x00,0x27,0x85,0x8b,0x94,
1050x27,0x82,0x8b,0x90,0x00,0xc5,0x28,0x21,0x00,0xc2,0x10,0x21,0x8c,0x43,0x00,0x00,
1060x8c,0xa4,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x64,0x18,0x2a,0x14,0x60,0x00,0x03,
1070x24,0x02,0x00,0x01,0x03,0xe0,0x00,0x08,0xa0,0xe2,0x00,0x00,0xa0,0xe0,0x00,0x00,
1080x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x08,0x00,0x00,0xb7,0xac,0xa0,0x00,0x00,
1090x11,0x22,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x7c,
1100x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0xaf,0x83,0x8b,0xac,0x08,0x00,0x00,0xa7,
1110x3c,0x02,0xb0,0x03,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x78,0x90,0x43,0x00,0x00,
1120x00,0x00,0x00,0x00,0xaf,0x83,0x8b,0xa0,0x08,0x00,0x00,0xa7,0x3c,0x02,0xb0,0x03,
1130x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,0x24,0x42,0x04,0x10,
1140x3c,0x05,0xb0,0x03,0xac,0x62,0x00,0x00,0x34,0xa5,0x00,0x70,0x8c,0xa2,0x00,0x00,
1150x90,0x84,0x00,0x08,0x3c,0x06,0xb0,0x03,0x00,0x02,0x16,0x00,0x2c,0x83,0x00,0x03,
1160x34,0xc6,0x00,0x72,0x24,0x07,0x00,0x01,0x10,0x60,0x00,0x11,0x00,0x02,0x2f,0xc2,
1170x90,0xc2,0x00,0x00,0x00,0x00,0x18,0x21,0x00,0x02,0x16,0x00,0x10,0xa7,0x00,0x09,
1180x00,0x02,0x16,0x03,0x14,0x80,0x00,0x0c,0x30,0x43,0x00,0x03,0x83,0x82,0x8b,0x98,
1190x00,0x00,0x00,0x00,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x00,0x02,0x16,0x00,
1200x00,0x02,0x1e,0x03,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x72,0xa0,0x43,0x00,0x00,
1210x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x30,0x45,0x00,0x05,0x10,0x87,0x00,0x04,
1220x30,0x43,0x00,0x06,0x93,0x82,0x8b,0xb0,0x08,0x00,0x01,0x1f,0x00,0x43,0x10,0x21,
1230x83,0x82,0x8b,0xa4,0x00,0x00,0x00,0x00,0x00,0x02,0x10,0x40,0x08,0x00,0x01,0x1f,
1240x00,0x45,0x10,0x21,0x10,0x80,0x00,0x05,0x00,0x00,0x18,0x21,0x24,0x63,0x00,0x01,
1250x00,0x64,0x10,0x2b,0x14,0x40,0xff,0xfd,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
1260x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x24,0x42,0x04,0xe4,
1270x3c,0x04,0xb0,0x02,0x34,0x63,0x00,0x20,0xac,0x62,0x00,0x00,0x34,0x84,0x00,0x08,
1280x24,0x02,0x00,0x01,0xaf,0x84,0x8b,0xc0,0xa3,0x82,0x8b,0xd0,0xa7,0x80,0x8b,0xc4,
1290xa7,0x80,0x8b,0xc6,0xaf,0x80,0x8b,0xc8,0xaf,0x80,0x8b,0xcc,0x03,0xe0,0x00,0x08,
1300x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,
1310x24,0x42,0x05,0x24,0x3c,0x04,0xb0,0x03,0xac,0x62,0x00,0x00,0x34,0x84,0x00,0xac,
1320x80,0xa2,0x00,0x15,0x8c,0x83,0x00,0x00,0x27,0xbd,0xff,0xf0,0x00,0x43,0x10,0x21,
1330xac,0x82,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x10,0x3c,0x02,0xb0,0x03,
1340x3c,0x03,0x80,0x00,0x34,0x42,0x00,0x20,0x24,0x63,0x05,0x5c,0x27,0xbd,0xff,0xe0,
1350xac,0x43,0x00,0x00,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x18,
1360x8f,0x90,0x8b,0xc0,0x0c,0x00,0x02,0x98,0x00,0x80,0x88,0x21,0x14,0x40,0x00,0x2a,
1370x3c,0x02,0x00,0x80,0x16,0x20,0x00,0x02,0x34,0x42,0x02,0x01,0x24,0x02,0x02,0x01,
1380xae,0x02,0x00,0x00,0x97,0x84,0x8b,0xc4,0x97,0x82,0x8b,0xc6,0x3c,0x03,0xb0,0x02,
1390x00,0x83,0x20,0x21,0x24,0x42,0x00,0x04,0xa7,0x82,0x8b,0xc6,0xa4,0x82,0x00,0x00,
1400x8f,0x84,0x8b,0xc8,0x8f,0x82,0x8b,0xc0,0x93,0x85,0x8b,0x72,0x24,0x84,0x00,0x01,
1410x24,0x42,0x00,0x04,0x24,0x03,0x8f,0xff,0x3c,0x07,0xb0,0x06,0x3c,0x06,0xb0,0x03,
1420x00,0x43,0x10,0x24,0x00,0x85,0x28,0x2a,0x34,0xe7,0x80,0x18,0xaf,0x82,0x8b,0xc0,
1430xaf,0x84,0x8b,0xc8,0x10,0xa0,0x00,0x08,0x34,0xc6,0x01,0x08,0x8f,0x83,0x8b,0xcc,
1440x8f,0x84,0x8b,0x8c,0x8c,0xc2,0x00,0x00,0x00,0x64,0x18,0x21,0x00,0x43,0x10,0x2b,
1450x14,0x40,0x00,0x09,0x00,0x00,0x00,0x00,0x8c,0xe2,0x00,0x00,0x3c,0x03,0x0f,0x00,
1460x3c,0x04,0x04,0x00,0x00,0x43,0x10,0x24,0x10,0x44,0x00,0x03,0x00,0x00,0x00,0x00,
1470x0c,0x00,0x04,0x96,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x18,0x7b,0xb0,0x00,0xbc,
1480x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x27,0xbd,0xff,0xd8,0x3c,0x02,0xb0,0x03,
1490x3c,0x03,0x80,0x00,0x24,0x63,0x06,0x48,0xaf,0xb0,0x00,0x10,0x34,0x42,0x00,0x20,
1500x8f,0x90,0x8b,0xc0,0xac,0x43,0x00,0x00,0xaf,0xb3,0x00,0x1c,0xaf,0xb2,0x00,0x18,
1510xaf,0xb1,0x00,0x14,0xaf,0xbf,0x00,0x20,0x00,0x80,0x88,0x21,0x00,0xa0,0x90,0x21,
1520x0c,0x00,0x02,0x98,0x00,0xc0,0x98,0x21,0x24,0x07,0x8f,0xff,0x14,0x40,0x00,0x19,
1530x26,0x03,0x00,0x04,0x24,0x02,0x0e,0x03,0xae,0x02,0x00,0x00,0x00,0x67,0x80,0x24,
1540x26,0x02,0x00,0x04,0xae,0x11,0x00,0x00,0x00,0x47,0x80,0x24,0x97,0x86,0x8b,0xc4,
1550x26,0x03,0x00,0x04,0xae,0x12,0x00,0x00,0x00,0x67,0x80,0x24,0xae,0x13,0x00,0x00,
1560x8f,0x84,0x8b,0xc0,0x3c,0x02,0xb0,0x02,0x97,0x85,0x8b,0xc6,0x00,0xc2,0x30,0x21,
1570x8f,0x82,0x8b,0xc8,0x24,0x84,0x00,0x10,0x24,0xa5,0x00,0x10,0x00,0x87,0x20,0x24,
1580x24,0x42,0x00,0x01,0xa7,0x85,0x8b,0xc6,0xaf,0x84,0x8b,0xc0,0xaf,0x82,0x8b,0xc8,
1590xa4,0xc5,0x00,0x00,0x8f,0xbf,0x00,0x20,0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,
1600x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x28,0x27,0xbd,0xff,0xe8,0xaf,0xbf,0x00,0x10,
1610x94,0x82,0x00,0x04,0x00,0x00,0x00,0x00,0x30,0x42,0xe0,0x00,0x14,0x40,0x00,0x14,
1620x00,0x00,0x00,0x00,0x90,0x82,0x00,0x02,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xfc,
1630x00,0x82,0x28,0x21,0x8c,0xa4,0x00,0x00,0x3c,0x02,0x00,0x70,0x8c,0xa6,0x00,0x08,
1640x00,0x82,0x10,0x21,0x2c,0x43,0x00,0x06,0x10,0x60,0x00,0x09,0x3c,0x03,0x80,0x01,
1650x00,0x02,0x10,0x80,0x24,0x63,0x01,0xe8,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,
1660x00,0x00,0x00,0x00,0x00,0x80,0x00,0x08,0x00,0x00,0x00,0x00,0xaf,0x86,0x80,0x14,
1670x8f,0xbf,0x00,0x10,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,
1680x8c,0xa4,0x00,0x00,0x0c,0x00,0x17,0x84,0x00,0x00,0x00,0x00,0x08,0x00,0x01,0xdc,
1690x00,0x00,0x00,0x00,0x0c,0x00,0x24,0x49,0x00,0xc0,0x20,0x21,0x08,0x00,0x01,0xdc,
1700x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x34,0x42,0x01,0x08,0x8c,0x44,0x00,0x00,
1710x8f,0x82,0x80,0x18,0x3c,0x03,0x00,0x0f,0x34,0x63,0x42,0x40,0x00,0x43,0x10,0x21,
1720x00,0x82,0x20,0x2b,0x10,0x80,0x00,0x09,0x24,0x03,0x00,0x05,0x8f,0x82,0x83,0x60,
1730x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,0xaf,0x82,0x83,0x60,0x10,0x43,0x00,0x03,
1740x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,
1750x8c,0x63,0x01,0x08,0x24,0x02,0x00,0x01,0xa3,0x82,0x80,0x11,0xaf,0x80,0x83,0x60,
1760xaf,0x83,0x80,0x18,0x08,0x00,0x01,0xf9,0x00,0x00,0x00,0x00,0x30,0x84,0x00,0xff,
1770x14,0x80,0x00,0x2f,0x00,0x00,0x00,0x00,0x8f,0x82,0x80,0x14,0xa3,0x85,0x83,0x93,
1780x10,0x40,0x00,0x2b,0x2c,0xa2,0x00,0x04,0x14,0x40,0x00,0x06,0x00,0x05,0x10,0x40,
1790x24,0xa2,0xff,0xfc,0x2c,0x42,0x00,0x08,0x10,0x40,0x00,0x09,0x24,0xa2,0xff,0xf0,
1800x00,0x05,0x10,0x40,0x27,0x84,0x83,0x9c,0x00,0x44,0x10,0x21,0x94,0x43,0x00,0x00,
1810x00,0x00,0x00,0x00,0x24,0x63,0x00,0x01,0x03,0xe0,0x00,0x08,0xa4,0x43,0x00,0x00,
1820x2c,0x42,0x00,0x10,0x14,0x40,0x00,0x0a,0x00,0x05,0x10,0x40,0x24,0xa2,0xff,0xe0,
1830x2c,0x42,0x00,0x10,0x14,0x40,0x00,0x06,0x00,0x05,0x10,0x40,0x24,0xa2,0xff,0xd0,
1840x2c,0x42,0x00,0x10,0x10,0x40,0x00,0x09,0x24,0xa2,0xff,0xc0,0x00,0x05,0x10,0x40,
1850x27,0x84,0x83,0x9c,0x00,0x44,0x10,0x21,0x94,0x43,0xff,0xf8,0x00,0x00,0x00,0x00,
1860x24,0x63,0x00,0x01,0x03,0xe0,0x00,0x08,0xa4,0x43,0xff,0xf8,0x2c,0x42,0x00,0x10,
1870x10,0x40,0x00,0x07,0x00,0x05,0x10,0x40,0x27,0x84,0x83,0x9c,0x00,0x44,0x10,0x21,
1880x94,0x43,0xff,0xf8,0x00,0x00,0x00,0x00,0x24,0x63,0x00,0x01,0xa4,0x43,0xff,0xf8,
1890x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x8f,0x86,0x8b,0xc0,0x8f,0x82,0x80,0x14,
1900x27,0xbd,0xff,0xe8,0xaf,0xbf,0x00,0x10,0x10,0x40,0x00,0x2a,0x00,0xc0,0x38,0x21,
1910x24,0x02,0x00,0x07,0x24,0x03,0xff,0x9c,0xa3,0x82,0x83,0x9b,0xa3,0x83,0x83,0x9a,
1920x27,0x8a,0x83,0x98,0x00,0x00,0x20,0x21,0x24,0x09,0x8f,0xff,0x00,0x04,0x10,0x80,
1930x00,0x4a,0x28,0x21,0x8c,0xa2,0x00,0x00,0x24,0xe3,0x00,0x04,0x24,0x88,0x00,0x01,
1940xac,0xe2,0x00,0x00,0x10,0x80,0x00,0x02,0x00,0x69,0x38,0x24,0xac,0xa0,0x00,0x00,
1950x31,0x04,0x00,0xff,0x2c,0x82,0x00,0x27,0x14,0x40,0xff,0xf5,0x00,0x04,0x10,0x80,
1960x97,0x83,0x8b,0xc6,0x97,0x85,0x8b,0xc4,0x3c,0x02,0xb0,0x02,0x24,0x63,0x00,0x9c,
1970x00,0xa2,0x28,0x21,0x3c,0x04,0xb0,0x06,0xa7,0x83,0x8b,0xc6,0x34,0x84,0x80,0x18,
1980xa4,0xa3,0x00,0x00,0x8c,0x85,0x00,0x00,0x24,0x02,0x8f,0xff,0x24,0xc6,0x00,0x9c,
1990x3c,0x03,0x0f,0x00,0x00,0xc2,0x30,0x24,0x00,0xa3,0x28,0x24,0x3c,0x02,0x04,0x00,
2000xaf,0x86,0x8b,0xc0,0x10,0xa2,0x00,0x03,0x00,0x00,0x00,0x00,0x0c,0x00,0x04,0x96,
2010x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x10,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
2020x27,0xbd,0x00,0x18,0x8f,0x86,0x8b,0xc0,0x27,0xbd,0xff,0xc8,0x24,0x02,0x00,0x08,
2030x24,0x03,0x00,0x20,0xaf,0xbf,0x00,0x30,0xa3,0xa2,0x00,0x13,0xa3,0xa3,0x00,0x12,
2040xa7,0xa4,0x00,0x10,0x00,0xc0,0x28,0x21,0x27,0xa9,0x00,0x10,0x00,0x00,0x38,0x21,
2050x24,0x08,0x8f,0xff,0x00,0x07,0x10,0x80,0x00,0x49,0x10,0x21,0x8c,0x44,0x00,0x00,
2060x24,0xe3,0x00,0x01,0x30,0x67,0x00,0xff,0x24,0xa2,0x00,0x04,0x2c,0xe3,0x00,0x08,
2070xac,0xa4,0x00,0x00,0x14,0x60,0xff,0xf7,0x00,0x48,0x28,0x24,0x97,0x83,0x8b,0xc6,
2080x97,0x85,0x8b,0xc4,0x3c,0x02,0xb0,0x02,0x24,0x63,0x00,0x20,0x00,0xa2,0x28,0x21,
2090x3c,0x04,0xb0,0x06,0xa7,0x83,0x8b,0xc6,0x34,0x84,0x80,0x18,0xa4,0xa3,0x00,0x00,
2100x8c,0x85,0x00,0x00,0x24,0x02,0x8f,0xff,0x24,0xc6,0x00,0x20,0x3c,0x03,0x0f,0x00,
2110x00,0xc2,0x30,0x24,0x00,0xa3,0x28,0x24,0x3c,0x02,0x04,0x00,0xaf,0x86,0x8b,0xc0,
2120x10,0xa2,0x00,0x03,0x00,0x00,0x00,0x00,0x0c,0x00,0x04,0x96,0x00,0x00,0x00,0x00,
2130x8f,0xbf,0x00,0x30,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x38,
2140x93,0x82,0x8b,0xd0,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x11,0x24,0x06,0x00,0x01,
2150x8f,0x82,0x8b,0xc8,0x3c,0x05,0xb0,0x06,0x3c,0x04,0xb0,0x03,0x34,0xa5,0x80,0x18,
2160x34,0x84,0x01,0x08,0x14,0x40,0x00,0x09,0x00,0x00,0x30,0x21,0x97,0x82,0x8b,0xc4,
2170x8c,0x84,0x00,0x00,0x3c,0x03,0xb0,0x02,0x00,0x43,0x10,0x21,0xaf,0x84,0x8b,0xcc,
2180xa7,0x80,0x8b,0xc6,0xac,0x40,0x00,0x00,0xac,0x40,0x00,0x04,0x8c,0xa2,0x00,0x00,
2190x03,0xe0,0x00,0x08,0x00,0xc0,0x10,0x21,0x8f,0x86,0x8b,0xc0,0x8f,0x82,0x8b,0xc8,
2200x27,0xbd,0xff,0xe8,0xaf,0xbf,0x00,0x10,0x00,0xc0,0x40,0x21,0x14,0x40,0x00,0x0a,
2210x00,0x40,0x50,0x21,0x00,0x00,0x38,0x21,0x27,0x89,0x83,0x68,0x24,0xe2,0x00,0x01,
2220x00,0x07,0x18,0x80,0x30,0x47,0x00,0xff,0x00,0x69,0x18,0x21,0x2c,0xe2,0x00,0x0a,
2230x14,0x40,0xff,0xfa,0xac,0x60,0x00,0x00,0x3c,0x02,0x00,0x80,0x10,0x82,0x00,0x6f,
2240x00,0x00,0x00,0x00,0x97,0x82,0x83,0x6e,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,
2250xa7,0x82,0x83,0x6e,0x90,0xa3,0x00,0x15,0x97,0x82,0x83,0x70,0x00,0x03,0x1e,0x00,
2260x00,0x03,0x1e,0x03,0x00,0x43,0x10,0x21,0xa7,0x82,0x83,0x70,0x8c,0xa4,0x00,0x20,
2270x3c,0x02,0x00,0x60,0x3c,0x03,0x00,0x20,0x00,0x82,0x20,0x24,0x10,0x83,0x00,0x54,
2280x00,0x00,0x00,0x00,0x14,0x80,0x00,0x47,0x00,0x00,0x00,0x00,0x97,0x82,0x83,0x74,
2290x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,0xa7,0x82,0x83,0x74,0x84,0xa3,0x00,0x06,
2300x8f,0x82,0x83,0x84,0x00,0x00,0x00,0x00,0x00,0x43,0x10,0x21,0xaf,0x82,0x83,0x84,
2310x25,0x42,0x00,0x01,0x28,0x43,0x27,0x10,0xaf,0x82,0x8b,0xc8,0x10,0x60,0x00,0x09,
2320x24,0x02,0x00,0x04,0x93,0x83,0x80,0x11,0x24,0x02,0x00,0x01,0x10,0x62,0x00,0x05,
2330x24,0x02,0x00,0x04,0x8f,0xbf,0x00,0x10,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
2340x27,0xbd,0x00,0x18,0x24,0x03,0x00,0x28,0xa3,0x83,0x83,0x6a,0xa3,0x82,0x83,0x6b,
2350x90,0xa2,0x00,0x18,0x93,0x83,0x83,0x93,0x00,0x00,0x38,0x21,0x00,0x02,0x16,0x00,
2360x00,0x02,0x16,0x03,0xa7,0x82,0x83,0x7e,0xa3,0x83,0x83,0x8c,0x27,0x89,0x83,0x68,
2370x24,0x05,0x8f,0xff,0x00,0x07,0x10,0x80,0x00,0x49,0x10,0x21,0x8c,0x44,0x00,0x00,
2380x24,0xe3,0x00,0x01,0x30,0x67,0x00,0xff,0x25,0x02,0x00,0x04,0x2c,0xe3,0x00,0x0a,
2390xad,0x04,0x00,0x00,0x14,0x60,0xff,0xf7,0x00,0x45,0x40,0x24,0x97,0x83,0x8b,0xc6,
2400x97,0x85,0x8b,0xc4,0x3c,0x02,0xb0,0x02,0x24,0x63,0x00,0x28,0x00,0xa2,0x28,0x21,
2410x3c,0x04,0xb0,0x06,0xa7,0x83,0x8b,0xc6,0x34,0x84,0x80,0x18,0xa4,0xa3,0x00,0x00,
2420x8c,0x85,0x00,0x00,0x24,0x02,0x8f,0xff,0x24,0xc6,0x00,0x28,0x3c,0x03,0x0f,0x00,
2430x00,0xc2,0x30,0x24,0x00,0xa3,0x28,0x24,0x3c,0x02,0x04,0x00,0xaf,0x86,0x8b,0xc0,
2440x10,0xa2,0x00,0x03,0x00,0x00,0x00,0x00,0x0c,0x00,0x04,0x96,0x00,0x00,0x00,0x00,
2450x0c,0x00,0x02,0x36,0x00,0x00,0x00,0x00,0xa3,0x80,0x80,0x11,0x08,0x00,0x02,0xe5,
2460x00,0x00,0x00,0x00,0x97,0x82,0x83,0x76,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,
2470xa7,0x82,0x83,0x76,0x84,0xa3,0x00,0x06,0x8f,0x82,0x83,0x88,0x00,0x00,0x00,0x00,
2480x00,0x43,0x10,0x21,0xaf,0x82,0x83,0x88,0x08,0x00,0x02,0xdd,0x25,0x42,0x00,0x01,
2490x97,0x82,0x83,0x72,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,0xa7,0x82,0x83,0x72,
2500x84,0xa3,0x00,0x06,0x8f,0x82,0x83,0x80,0x00,0x00,0x00,0x00,0x00,0x43,0x10,0x21,
2510xaf,0x82,0x83,0x80,0x08,0x00,0x02,0xdd,0x25,0x42,0x00,0x01,0x97,0x82,0x83,0x6c,
2520x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,0xa7,0x82,0x83,0x6c,0x08,0x00,0x02,0xc5,
2530x00,0x00,0x00,0x00,0x27,0xbd,0xff,0xd0,0xaf,0xbf,0x00,0x28,0x8c,0xa3,0x00,0x20,
2540x8f,0x8a,0x8b,0xc0,0x3c,0x02,0x00,0x10,0x00,0x62,0x10,0x24,0x00,0xa0,0x38,0x21,
2550x01,0x40,0x48,0x21,0x10,0x40,0x00,0x3d,0x00,0x80,0x28,0x21,0x8c,0xe4,0x00,0x1c,
2560x34,0xa5,0x12,0x06,0xaf,0xa5,0x00,0x10,0x8c,0x82,0x00,0x08,0x00,0x03,0x1c,0x42,
2570x30,0x63,0x00,0x30,0x00,0x02,0x13,0x02,0x30,0x42,0x00,0x40,0x00,0x43,0x10,0x25,
2580x90,0xe6,0x00,0x10,0x90,0xe4,0x00,0x13,0x94,0xe8,0x00,0x0c,0x94,0xe3,0x00,0x1a,
2590x00,0x02,0x16,0x00,0x90,0xe7,0x00,0x12,0x00,0xa2,0x28,0x25,0x24,0x02,0x12,0x34,
2600xa7,0xa2,0x00,0x1c,0x24,0x02,0x56,0x78,0xaf,0xa5,0x00,0x10,0xa3,0xa6,0x00,0x18,
2610xa3,0xa7,0x00,0x1f,0xa7,0xa3,0x00,0x1a,0xa3,0xa4,0x00,0x19,0xa7,0xa8,0x00,0x20,
2620xa7,0xa2,0x00,0x22,0x00,0x00,0x28,0x21,0x27,0xa7,0x00,0x10,0x24,0x06,0x8f,0xff,
2630x00,0x05,0x10,0x80,0x00,0x47,0x10,0x21,0x8c,0x44,0x00,0x00,0x24,0xa3,0x00,0x01,
2640x30,0x65,0x00,0xff,0x25,0x22,0x00,0x04,0x2c,0xa3,0x00,0x05,0xad,0x24,0x00,0x00,
2650x14,0x60,0xff,0xf7,0x00,0x46,0x48,0x24,0x97,0x83,0x8b,0xc6,0x97,0x85,0x8b,0xc4,
2660x3c,0x02,0xb0,0x02,0x24,0x63,0x00,0x14,0x00,0xa2,0x28,0x21,0x3c,0x04,0xb0,0x06,
2670xa7,0x83,0x8b,0xc6,0x34,0x84,0x80,0x18,0xa4,0xa3,0x00,0x00,0x8c,0x85,0x00,0x00,
2680x24,0x02,0x8f,0xff,0x25,0x46,0x00,0x14,0x3c,0x03,0x0f,0x00,0x00,0xc2,0x50,0x24,
2690x00,0xa3,0x28,0x24,0x3c,0x02,0x04,0x00,0xaf,0x8a,0x8b,0xc0,0x10,0xa2,0x00,0x03,
2700x00,0x00,0x00,0x00,0x0c,0x00,0x04,0x96,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x28,
2710x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x30,0x3c,0x05,0xb0,0x03,
2720x3c,0x02,0x80,0x00,0x27,0xbd,0xff,0xc8,0x00,0x04,0x22,0x00,0x34,0xa5,0x00,0x20,
2730x24,0x42,0x0d,0xfc,0x3c,0x03,0xb0,0x00,0xaf,0xb5,0x00,0x24,0xaf,0xb4,0x00,0x20,
2740xaf,0xb2,0x00,0x18,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x30,0x00,0x83,0x80,0x21,
2750xaf,0xb7,0x00,0x2c,0xaf,0xb6,0x00,0x28,0xaf,0xb3,0x00,0x1c,0xaf,0xb1,0x00,0x14,
2760xac,0xa2,0x00,0x00,0x8e,0x09,0x00,0x00,0x00,0x00,0x90,0x21,0x26,0x10,0x00,0x08,
2770x00,0x09,0xa6,0x02,0x12,0x80,0x00,0x13,0x00,0x00,0xa8,0x21,0x24,0x13,0x00,0x02,
2780x3c,0x16,0x00,0xff,0x3c,0x17,0xff,0x00,0x8e,0x09,0x00,0x00,0x00,0x00,0x00,0x00,
2790x00,0x09,0x12,0x02,0x24,0x42,0x00,0x02,0x31,0x25,0x00,0xff,0x10,0xb3,0x00,0x76,
2800x30,0x51,0x00,0xff,0x24,0x02,0x00,0x03,0x10,0xa2,0x00,0x18,0x00,0x00,0x00,0x00,
2810x02,0x51,0x10,0x21,0x30,0x52,0xff,0xff,0x02,0x54,0x18,0x2b,0x14,0x60,0xff,0xf2,
2820x02,0x11,0x80,0x21,0x12,0xa0,0x00,0x0a,0x3c,0x02,0xb0,0x06,0x34,0x42,0x80,0x18,
2830x8c,0x43,0x00,0x00,0x3c,0x04,0x0f,0x00,0x3c,0x02,0x04,0x00,0x00,0x64,0x18,0x24,
2840x10,0x62,0x00,0x03,0x00,0x00,0x00,0x00,0x0c,0x00,0x04,0x96,0x00,0x00,0x00,0x00,
2850x8f,0xbf,0x00,0x30,0x7b,0xb6,0x01,0x7c,0x7b,0xb4,0x01,0x3c,0x7b,0xb2,0x00,0xfc,
2860x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x38,0x8e,0x09,0x00,0x04,
2870x24,0x15,0x00,0x01,0x8e,0x06,0x00,0x0c,0x00,0x09,0x11,0x42,0x00,0x09,0x18,0xc2,
2880x30,0x48,0x00,0x03,0x00,0x09,0x14,0x02,0x30,0x6c,0x00,0x03,0x00,0x09,0x26,0x02,
2890x11,0x15,0x00,0x45,0x30,0x43,0x00,0x0f,0x29,0x02,0x00,0x02,0x14,0x40,0x00,0x26,
2900x00,0x00,0x00,0x00,0x11,0x13,0x00,0x0f,0x00,0x00,0x38,0x21,0x00,0x07,0x22,0x02,
2910x30,0x84,0xff,0x00,0x3c,0x03,0x00,0xff,0x00,0x07,0x2e,0x02,0x00,0x07,0x12,0x00,
2920x00,0x43,0x10,0x24,0x00,0xa4,0x28,0x25,0x00,0xa2,0x28,0x25,0x00,0x07,0x1e,0x00,
2930x00,0xa3,0x28,0x25,0x0c,0x00,0x01,0x92,0x01,0x20,0x20,0x21,0x08,0x00,0x03,0xa5,
2940x02,0x51,0x10,0x21,0x11,0x95,0x00,0x0f,0x00,0x00,0x00,0x00,0x11,0x88,0x00,0x07,
2950x00,0x00,0x00,0x00,0x00,0x04,0x10,0x80,0x27,0x83,0x8b,0x70,0x00,0x43,0x10,0x21,
2960x8c,0x47,0x00,0x18,0x08,0x00,0x03,0xcc,0x00,0x07,0x22,0x02,0x00,0x04,0x10,0x40,
2970x27,0x83,0x8b,0x78,0x00,0x43,0x10,0x21,0x94,0x47,0x00,0x02,0x08,0x00,0x03,0xcc,
2980x00,0x07,0x22,0x02,0x27,0x82,0x8b,0x70,0x00,0x82,0x10,0x21,0x90,0x47,0x00,0x00,
2990x08,0x00,0x03,0xcc,0x00,0x07,0x22,0x02,0x15,0x00,0xff,0xdc,0x00,0x00,0x38,0x21,
3000x10,0x75,0x00,0x05,0x00,0x80,0x38,0x21,0x00,0x65,0x18,0x26,0x24,0x82,0x01,0x00,
3010x00,0x00,0x38,0x21,0x00,0x43,0x38,0x0a,0x24,0x02,0x00,0x01,0x11,0x82,0x00,0x0e,
3020x3c,0x02,0xb0,0x03,0x24,0x02,0x00,0x02,0x11,0x82,0x00,0x06,0x00,0x00,0x00,0x00,
3030x3c,0x02,0xb0,0x03,0x00,0xe2,0x10,0x21,0x8c,0x47,0x00,0x00,0x08,0x00,0x03,0xcc,
3040x00,0x07,0x22,0x02,0x3c,0x02,0xb0,0x03,0x00,0xe2,0x10,0x21,0x94,0x43,0x00,0x00,
3050x08,0x00,0x03,0xcb,0x30,0x67,0xff,0xff,0x00,0xe2,0x10,0x21,0x90,0x43,0x00,0x00,
3060x08,0x00,0x03,0xcb,0x30,0x67,0x00,0xff,0x30,0x62,0x00,0x03,0x00,0x02,0x12,0x00,
3070x11,0x95,0x00,0x07,0x00,0x44,0x38,0x21,0x11,0x93,0x00,0x03,0x00,0x00,0x00,0x00,
3080x08,0x00,0x03,0xfd,0x3c,0x02,0xb0,0x0a,0x08,0x00,0x04,0x02,0x3c,0x02,0xb0,0x0a,
3090x08,0x00,0x04,0x06,0x3c,0x02,0xb0,0x0a,0x8e,0x09,0x00,0x04,0x8e,0x02,0x00,0x08,
3100x8e,0x03,0x00,0x0c,0x00,0x09,0x41,0x42,0x00,0x02,0x22,0x02,0x00,0x03,0x3a,0x02,
3110x30,0x84,0xff,0x00,0x30,0xe7,0xff,0x00,0x00,0x02,0x5e,0x02,0x00,0x02,0x32,0x00,
3120x00,0x03,0x56,0x02,0x00,0x03,0x2a,0x00,0x01,0x64,0x58,0x25,0x00,0xd6,0x30,0x24,
3130x01,0x47,0x50,0x25,0x00,0x02,0x16,0x00,0x00,0xb6,0x28,0x24,0x00,0x03,0x1e,0x00,
3140x01,0x66,0x58,0x25,0x01,0x45,0x50,0x25,0x00,0x57,0x10,0x24,0x00,0x77,0x18,0x24,
3150x01,0x62,0x38,0x25,0x01,0x43,0x30,0x25,0x00,0x09,0x10,0xc2,0x00,0x09,0x1c,0x02,
3160x31,0x08,0x00,0x03,0x30,0x4c,0x00,0x03,0x30,0x63,0x00,0x0f,0x00,0x09,0x26,0x02,
3170x00,0xe0,0x58,0x21,0x15,0x00,0x00,0x28,0x00,0xc0,0x50,0x21,0x24,0x02,0x00,0x01,
3180x10,0x62,0x00,0x06,0x00,0x80,0x28,0x21,0x24,0x02,0x00,0x03,0x14,0x62,0xff,0x69,
3190x02,0x51,0x10,0x21,0x24,0x85,0x01,0x00,0x24,0x02,0x00,0x01,0x11,0x82,0x00,0x15,
3200x24,0x02,0x00,0x02,0x11,0x82,0x00,0x0a,0x3c,0x03,0xb0,0x03,0x00,0xa3,0x18,0x21,
3210x8c,0x62,0x00,0x00,0x00,0x0a,0x20,0x27,0x01,0x6a,0x28,0x24,0x00,0x44,0x10,0x24,
3220x00,0x45,0x10,0x25,0xac,0x62,0x00,0x00,0x08,0x00,0x03,0xa5,0x02,0x51,0x10,0x21,
3230x00,0xa3,0x18,0x21,0x94,0x62,0x00,0x00,0x00,0x0a,0x20,0x27,0x01,0x6a,0x28,0x24,
3240x00,0x44,0x10,0x24,0x00,0x45,0x10,0x25,0xa4,0x62,0x00,0x00,0x08,0x00,0x03,0xa5,
3250x02,0x51,0x10,0x21,0x3c,0x03,0xb0,0x03,0x00,0xa3,0x18,0x21,0x90,0x62,0x00,0x00,
3260x00,0x0a,0x20,0x27,0x01,0x6a,0x28,0x24,0x00,0x44,0x10,0x24,0x00,0x45,0x10,0x25,
3270x08,0x00,0x03,0xa4,0xa0,0x62,0x00,0x00,0x24,0x02,0x00,0x01,0x11,0x02,0x00,0x21,
3280x00,0x00,0x00,0x00,0x15,0x13,0xff,0x42,0x00,0x00,0x00,0x00,0x11,0x82,0x00,0x17,
3290x00,0x00,0x00,0x00,0x11,0x88,0x00,0x0b,0x00,0x00,0x00,0x00,0x27,0x83,0x8b,0x70,
3300x00,0x04,0x20,0x80,0x00,0x83,0x20,0x21,0x8c,0x82,0x00,0x18,0x00,0x06,0x18,0x27,
3310x00,0xe6,0x28,0x24,0x00,0x43,0x10,0x24,0x00,0x45,0x10,0x25,0x08,0x00,0x03,0xa4,
3320xac,0x82,0x00,0x18,0x27,0x83,0x8b,0x78,0x00,0x04,0x20,0x40,0x00,0x83,0x20,0x21,
3330x94,0x82,0x00,0x02,0x00,0x06,0x18,0x27,0x00,0xe6,0x28,0x24,0x00,0x43,0x10,0x24,
3340x00,0x45,0x10,0x25,0x08,0x00,0x03,0xa4,0xa4,0x82,0x00,0x02,0x27,0x83,0x8b,0x70,
3350x00,0x83,0x18,0x21,0x90,0x62,0x00,0x00,0x00,0x06,0x20,0x27,0x08,0x00,0x04,0x5a,
3360x00,0xe6,0x28,0x24,0x30,0x62,0x00,0x07,0x00,0x02,0x12,0x00,0x11,0x88,0x00,0x0f,
3370x00,0x44,0x10,0x21,0x11,0x93,0x00,0x07,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x0a,
3380x00,0x43,0x18,0x21,0x8c,0x62,0x00,0x00,0x00,0x06,0x20,0x27,0x08,0x00,0x04,0x47,
3390x00,0xe6,0x28,0x24,0x3c,0x03,0xb0,0x0a,0x00,0x43,0x18,0x21,0x94,0x62,0x00,0x00,
3400x00,0x06,0x20,0x27,0x08,0x00,0x04,0x50,0x00,0xe6,0x28,0x24,0x3c,0x03,0xb0,0x0a,
3410x08,0x00,0x04,0x7d,0x00,0x43,0x18,0x21,0x97,0x85,0x8b,0xc4,0x3c,0x07,0xb0,0x02,
3420x3c,0x04,0xb0,0x03,0x3c,0x02,0x80,0x00,0x00,0xa7,0x28,0x21,0x34,0x84,0x00,0x20,
3430x24,0x42,0x12,0x58,0x24,0x03,0xff,0x80,0xac,0x82,0x00,0x00,0xa0,0xa3,0x00,0x07,
3440x97,0x82,0x8b,0xc6,0x97,0x85,0x8b,0xc4,0x3c,0x06,0xb0,0x06,0x30,0x42,0xff,0xf8,
3450x24,0x42,0x00,0x10,0x00,0xa2,0x10,0x21,0x30,0x42,0x0f,0xff,0x24,0x44,0x00,0x08,
3460x30,0x84,0x0f,0xff,0x00,0x05,0x28,0xc2,0x3c,0x03,0x00,0x40,0x00,0xa3,0x28,0x25,
3470x00,0x87,0x20,0x21,0x34,0xc6,0x80,0x18,0xac,0xc5,0x00,0x00,0xaf,0x84,0x8b,0xc0,
3480xa7,0x82,0x8b,0xc4,0xa7,0x80,0x8b,0xc6,0xaf,0x80,0x8b,0xc8,0x03,0xe0,0x00,0x08,
3490x00,0x00,0x00,0x00,0x30,0xa5,0x00,0xff,0x30,0x84,0x00,0xff,0x24,0x02,0x00,0x01,
3500x00,0xe0,0x48,0x21,0x30,0xc6,0x00,0xff,0x8f,0xa7,0x00,0x10,0x10,0x82,0x00,0x07,
3510x00,0xa0,0x40,0x21,0x24,0x02,0x00,0x03,0x10,0x82,0x00,0x03,0x00,0x00,0x00,0x00,
3520x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x24,0xa8,0x01,0x00,0x3c,0x03,0xb0,0x03,
3530x24,0x02,0x00,0x01,0x00,0x07,0x20,0x27,0x01,0x27,0x28,0x24,0x10,0xc2,0x00,0x14,
3540x01,0x03,0x18,0x21,0x24,0x02,0x00,0x02,0x10,0xc2,0x00,0x09,0x00,0x07,0x50,0x27,
3550x3c,0x03,0xb0,0x03,0x01,0x03,0x18,0x21,0x8c,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
3560x00,0x4a,0x10,0x24,0x00,0x45,0x10,0x25,0x08,0x00,0x04,0xe1,0xac,0x62,0x00,0x00,
3570x3c,0x03,0xb0,0x03,0x01,0x03,0x18,0x21,0x94,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
3580x00,0x4a,0x10,0x24,0x00,0x45,0x10,0x25,0x03,0xe0,0x00,0x08,0xa4,0x62,0x00,0x00,
3590x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x44,0x10,0x24,0x00,0x45,0x10,0x25,
3600xa0,0x62,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x30,0x84,0x00,0x07,
3610x00,0x04,0x22,0x00,0x30,0xa5,0x00,0xff,0x00,0x85,0x28,0x21,0x3c,0x02,0xb0,0x0a,
3620x00,0xa2,0x40,0x21,0x30,0xc6,0x00,0xff,0x24,0x02,0x00,0x01,0x8f,0xa4,0x00,0x10,
3630x10,0xc2,0x00,0x14,0x24,0x02,0x00,0x02,0x00,0x04,0x50,0x27,0x10,0xc2,0x00,0x09,
3640x00,0xe4,0x48,0x24,0x3c,0x03,0xb0,0x0a,0x00,0xa3,0x18,0x21,0x8c,0x62,0x00,0x00,
3650x00,0x00,0x00,0x00,0x00,0x4a,0x10,0x24,0x00,0x49,0x10,0x25,0x03,0xe0,0x00,0x08,
3660xac,0x62,0x00,0x00,0x3c,0x03,0xb0,0x0a,0x00,0xa3,0x18,0x21,0x94,0x62,0x00,0x00,
3670x00,0x00,0x00,0x00,0x00,0x4a,0x10,0x24,0x00,0x49,0x10,0x25,0x03,0xe0,0x00,0x08,
3680xa4,0x62,0x00,0x00,0x91,0x02,0x00,0x00,0x00,0x04,0x18,0x27,0x00,0xe4,0x20,0x24,
3690x00,0x43,0x10,0x24,0x00,0x44,0x10,0x25,0x03,0xe0,0x00,0x08,0xa1,0x02,0x00,0x00,
3700x30,0xa9,0x00,0xff,0x27,0x83,0x8b,0x70,0x30,0x85,0x00,0xff,0x24,0x02,0x00,0x01,
3710x00,0x07,0x50,0x27,0x00,0xc7,0x40,0x24,0x11,0x22,0x00,0x17,0x00,0xa3,0x18,0x21,
3720x00,0x05,0x20,0x40,0x27,0x82,0x8b,0x70,0x00,0x05,0x28,0x80,0x27,0x83,0x8b,0x78,
3730x00,0x83,0x50,0x21,0x00,0xa2,0x20,0x21,0x24,0x02,0x00,0x02,0x00,0x07,0x40,0x27,
3740x11,0x22,0x00,0x07,0x00,0xc7,0x28,0x24,0x8c,0x82,0x00,0x18,0x00,0x00,0x00,0x00,
3750x00,0x48,0x10,0x24,0x00,0x45,0x10,0x25,0x03,0xe0,0x00,0x08,0xac,0x82,0x00,0x18,
3760x95,0x42,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x48,0x10,0x24,0x00,0x45,0x10,0x25,
3770x03,0xe0,0x00,0x08,0xa5,0x42,0x00,0x02,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
3780x00,0x4a,0x10,0x24,0x00,0x48,0x10,0x25,0x03,0xe0,0x00,0x08,0xa0,0x62,0x00,0x00,
3790x00,0x04,0x32,0x02,0x30,0xc6,0xff,0x00,0x00,0x04,0x16,0x02,0x00,0x04,0x1a,0x00,
3800x3c,0x05,0x00,0xff,0x00,0x65,0x18,0x24,0x00,0x46,0x10,0x25,0x00,0x43,0x10,0x25,
3810x00,0x04,0x26,0x00,0x03,0xe0,0x00,0x08,0x00,0x44,0x10,0x25,0x3c,0x03,0xb0,0x03,
3820x3c,0x02,0x80,0x00,0x27,0xbd,0xff,0xe8,0x34,0x63,0x00,0x20,0x24,0x42,0x14,0xdc,
3830x3c,0x04,0xb0,0x03,0xaf,0xbf,0x00,0x14,0xac,0x62,0x00,0x00,0xaf,0xb0,0x00,0x10,
3840x34,0x84,0x00,0x2c,0x8c,0x83,0x00,0x00,0xa7,0x80,0xbc,0x00,0x00,0x03,0x12,0x02,
3850x00,0x03,0x2d,0x02,0x30,0x42,0x0f,0xff,0xa3,0x83,0xbc,0x08,0xa7,0x85,0xbc,0x0c,
3860xa7,0x82,0xbc,0x0a,0xa7,0x80,0xbc,0x02,0xa7,0x80,0xbc,0x04,0xa7,0x80,0xbc,0x06,
3870x0c,0x00,0x06,0xd1,0x24,0x04,0x05,0x00,0x3c,0x05,0x08,0x00,0x00,0x45,0x28,0x25,
3880x24,0x04,0x05,0x00,0x0c,0x00,0x06,0xbf,0x00,0x40,0x80,0x21,0x3c,0x02,0xf7,0xff,
3890x34,0x42,0xff,0xff,0x02,0x02,0x80,0x24,0x02,0x00,0x28,0x21,0x0c,0x00,0x06,0xbf,
3900x24,0x04,0x05,0x00,0x3c,0x02,0xb0,0x03,0x3c,0x03,0xb0,0x03,0x34,0x42,0x01,0x08,
3910x34,0x63,0x01,0x18,0x8c,0x45,0x00,0x00,0x8c,0x64,0x00,0x00,0x3c,0x02,0x00,0x0f,
3920x3c,0x03,0x00,0x4c,0x30,0x84,0x02,0x00,0x34,0x63,0x4b,0x40,0xaf,0x85,0xbc,0x10,
3930x10,0x80,0x00,0x06,0x34,0x42,0x42,0x40,0xaf,0x83,0xbc,0x14,0x8f,0xbf,0x00,0x14,
3940x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0xaf,0x82,0xbc,0x14,
3950x08,0x00,0x05,0x67,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,
3960x27,0xbd,0xff,0xc8,0x34,0x63,0x00,0x20,0x24,0x42,0x15,0xb8,0x30,0x84,0x00,0xff,
3970xaf,0xbf,0x00,0x30,0xaf,0xb7,0x00,0x2c,0xaf,0xb6,0x00,0x28,0xaf,0xb5,0x00,0x24,
3980xaf,0xb4,0x00,0x20,0xaf,0xb3,0x00,0x1c,0xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,
3990xaf,0xb0,0x00,0x10,0xac,0x62,0x00,0x00,0x10,0x80,0x00,0x1c,0x24,0x02,0x00,0x02,
4000x10,0x82,0x00,0x08,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x30,0x7b,0xb6,0x01,0x7c,
4010x7b,0xb4,0x01,0x3c,0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,
4020x27,0xbd,0x00,0x38,0xa7,0x80,0xbc,0x00,0xa7,0x80,0xbc,0x02,0xa7,0x80,0xbc,0x04,
4030xa7,0x80,0xbc,0x06,0x0c,0x00,0x06,0xd1,0x24,0x04,0x05,0x00,0x3c,0x05,0x08,0x00,
4040x00,0x45,0x28,0x25,0x24,0x04,0x05,0x00,0x0c,0x00,0x06,0xbf,0x00,0x40,0x80,0x21,
4050x3c,0x05,0xf7,0xff,0x34,0xa5,0xff,0xff,0x02,0x05,0x28,0x24,0x0c,0x00,0x06,0xbf,
4060x24,0x04,0x05,0x00,0x08,0x00,0x05,0x82,0x00,0x00,0x00,0x00,0x0c,0x00,0x06,0xd1,
4070x24,0x04,0x05,0xa0,0x24,0x04,0x05,0xa4,0x0c,0x00,0x06,0xd1,0x00,0x02,0xbc,0x02,
4080x24,0x04,0x05,0xa8,0x00,0x02,0xb4,0x02,0x0c,0x00,0x06,0xd1,0x30,0x55,0xff,0xff,
4090x00,0x40,0x80,0x21,0x97,0x84,0xbc,0x00,0x97,0x82,0xbc,0x02,0x97,0x83,0xbc,0x06,
4100x02,0xe4,0x20,0x23,0x02,0xa2,0x10,0x23,0x00,0x82,0x20,0x21,0x97,0x82,0xbc,0x04,
4110x32,0x14,0xff,0xff,0x02,0x83,0x18,0x23,0x02,0xc2,0x10,0x23,0x00,0x82,0x20,0x21,
4120x93,0x82,0xbc,0x08,0x00,0x83,0x20,0x21,0x30,0x84,0xff,0xff,0x00,0x82,0x10,0x2b,
4130x14,0x40,0x00,0xaa,0x00,0x00,0x00,0x00,0x97,0x82,0xbc,0x0c,0x00,0x00,0x00,0x00,
4140x00,0x44,0x10,0x2b,0x14,0x40,0x00,0x7f,0x00,0x00,0x00,0x00,0x97,0x82,0xbc,0x0a,
4150x00,0x00,0x00,0x00,0x00,0x44,0x10,0x2b,0x10,0x40,0x00,0x3a,0x00,0x00,0x00,0x00,
4160x0c,0x00,0x06,0xd1,0x24,0x04,0x04,0x50,0x30,0x51,0x00,0x7f,0x00,0x40,0x80,0x21,
4170x2e,0x22,0x00,0x32,0x10,0x40,0x00,0x13,0x24,0x02,0x00,0x20,0x12,0x22,0x00,0x17,
4180x24,0x02,0xff,0x80,0x02,0x02,0x10,0x24,0x26,0x31,0x00,0x01,0x00,0x51,0x80,0x25,
4190x02,0x00,0x28,0x21,0x0c,0x00,0x06,0xbf,0x24,0x04,0x04,0x50,0x02,0x00,0x28,0x21,
4200x0c,0x00,0x06,0xbf,0x24,0x04,0x04,0x58,0x02,0x00,0x28,0x21,0x0c,0x00,0x06,0xbf,
4210x24,0x04,0x04,0x60,0x02,0x00,0x28,0x21,0x24,0x04,0x04,0x68,0x0c,0x00,0x06,0xbf,
4220x00,0x00,0x00,0x00,0xa7,0x97,0xbc,0x00,0xa7,0x95,0xbc,0x02,0xa7,0x96,0xbc,0x04,
4230xa7,0x94,0xbc,0x06,0x08,0x00,0x05,0x82,0x00,0x00,0x00,0x00,0x0c,0x00,0x06,0xd1,
4240x24,0x04,0x02,0x08,0x3c,0x04,0x00,0xc0,0x00,0x40,0x28,0x21,0x00,0x44,0x10,0x24,
4250x00,0x02,0x15,0x82,0x24,0x03,0x00,0x03,0x10,0x43,0x00,0x07,0x00,0x00,0x00,0x00,
4260x3c,0x02,0xff,0x3f,0x34,0x42,0xff,0xff,0x00,0xa2,0x10,0x24,0x00,0x44,0x28,0x25,
4270x0c,0x00,0x06,0xbf,0x24,0x04,0x02,0x08,0x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x2c,
4280x00,0x40,0x90,0x21,0x3c,0x02,0xff,0xff,0x34,0x42,0x3f,0xff,0x02,0x42,0x90,0x24,
4290x02,0x40,0x28,0x21,0x0c,0x00,0x06,0xbf,0x24,0x04,0x02,0x2c,0x08,0x00,0x05,0xc9,
4300x24,0x02,0xff,0x80,0x0c,0x00,0x06,0xd1,0x24,0x04,0x04,0x50,0x30,0x51,0x00,0x7f,
4310x24,0x02,0x00,0x20,0x16,0x22,0xff,0xdb,0x00,0x00,0x00,0x00,0x0c,0x00,0x06,0xd1,
4320x24,0x04,0x02,0x2c,0x34,0x52,0x40,0x00,0x02,0x40,0x28,0x21,0x0c,0x00,0x06,0xbf,
4330x24,0x04,0x02,0x2c,0x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x58,0x24,0x04,0x02,0x5c,
4340x0c,0x00,0x06,0xd1,0x00,0x02,0x9e,0x02,0x30,0x43,0x00,0xff,0x00,0x13,0x12,0x00,
4350x00,0x43,0x10,0x25,0x2c,0x43,0x00,0x04,0x14,0x60,0x00,0x1d,0x2c,0x42,0x00,0x11,
4360x10,0x40,0x00,0x0b,0x00,0x00,0x00,0x00,0x3c,0x02,0xff,0xff,0x34,0x42,0x3f,0xff,
4370x02,0x42,0x90,0x24,0x02,0x40,0x28,0x21,0x24,0x04,0x02,0x2c,0x0c,0x00,0x06,0xbf,
4380x36,0x52,0x80,0x00,0x02,0x40,0x28,0x21,0x08,0x00,0x05,0xd7,0x24,0x04,0x02,0x2c,
4390x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x08,0x3c,0x04,0x00,0xc0,0x00,0x40,0x28,0x21,
4400x00,0x44,0x10,0x24,0x00,0x02,0x15,0x82,0x24,0x03,0x00,0x02,0x14,0x43,0xff,0xee,
4410x3c,0x02,0xff,0x3f,0x34,0x42,0xff,0xff,0x00,0xa2,0x10,0x24,0x00,0x44,0x28,0x25,
4420x0c,0x00,0x06,0xbf,0x24,0x04,0x02,0x08,0x08,0x00,0x06,0x13,0x3c,0x02,0xff,0xff,
4430x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x08,0x00,0x40,0x28,0x21,0x00,0x02,0x15,0x82,
4440x30,0x42,0x00,0x03,0x24,0x03,0x00,0x03,0x14,0x43,0xff,0xdf,0x3c,0x02,0xff,0x3f,
4450x34,0x42,0xff,0xff,0x00,0xa2,0x10,0x24,0x3c,0x03,0x00,0x80,0x08,0x00,0x06,0x28,
4460x00,0x43,0x28,0x25,0x0c,0x00,0x06,0xd1,0x24,0x04,0x04,0x50,0x30,0x51,0x00,0x7f,
4470x00,0x40,0x80,0x21,0x2e,0x22,0x00,0x32,0x10,0x40,0xff,0x9a,0x24,0x02,0x00,0x20,
4480x12,0x22,0x00,0x04,0x24,0x02,0xff,0x80,0x02,0x02,0x10,0x24,0x08,0x00,0x05,0xcb,
4490x26,0x31,0x00,0x02,0x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x08,0x3c,0x04,0x00,0xc0,
4500x00,0x40,0x28,0x21,0x00,0x44,0x10,0x24,0x00,0x02,0x15,0x82,0x24,0x03,0x00,0x03,
4510x10,0x43,0x00,0x07,0x00,0x00,0x00,0x00,0x3c,0x02,0xff,0x3f,0x34,0x42,0xff,0xff,
4520x00,0xa2,0x10,0x24,0x00,0x44,0x28,0x25,0x0c,0x00,0x06,0xbf,0x24,0x04,0x02,0x08,
4530x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x2c,0x00,0x40,0x90,0x21,0x3c,0x02,0xff,0xff,
4540x34,0x42,0x3f,0xff,0x02,0x42,0x90,0x24,0x02,0x40,0x28,0x21,0x0c,0x00,0x06,0xbf,
4550x24,0x04,0x02,0x2c,0x08,0x00,0x06,0x42,0x24,0x02,0xff,0x80,0x0c,0x00,0x06,0xd1,
4560x24,0x04,0x04,0x50,0x00,0x40,0x80,0x21,0x30,0x51,0x00,0x7f,0x24,0x02,0x00,0x20,
4570x12,0x22,0x00,0x1d,0x2e,0x22,0x00,0x21,0x14,0x40,0xff,0x72,0x24,0x02,0xff,0x80,
4580x02,0x02,0x10,0x24,0x26,0x31,0xff,0xff,0x00,0x51,0x80,0x25,0x24,0x04,0x04,0x50,
4590x0c,0x00,0x06,0xbf,0x02,0x00,0x28,0x21,0x24,0x04,0x04,0x58,0x0c,0x00,0x06,0xbf,
4600x02,0x00,0x28,0x21,0x24,0x04,0x04,0x60,0x0c,0x00,0x06,0xbf,0x02,0x00,0x28,0x21,
4610x02,0x00,0x28,0x21,0x0c,0x00,0x06,0xbf,0x24,0x04,0x04,0x68,0x24,0x02,0x00,0x20,
4620x16,0x22,0xff,0x60,0x00,0x00,0x00,0x00,0x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x2c,
4630x00,0x40,0x90,0x21,0x3c,0x02,0xff,0xff,0x34,0x42,0x3f,0xff,0x02,0x42,0x10,0x24,
4640x08,0x00,0x06,0x19,0x34,0x52,0x80,0x00,0x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x2c,
4650x34,0x52,0x40,0x00,0x02,0x40,0x28,0x21,0x0c,0x00,0x06,0xbf,0x24,0x04,0x02,0x2c,
4660x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x58,0x24,0x04,0x02,0x5c,0x0c,0x00,0x06,0xd1,
4670x00,0x02,0x9e,0x02,0x30,0x43,0x00,0xff,0x00,0x13,0x12,0x00,0x00,0x43,0x10,0x25,
4680x2c,0x43,0x00,0x04,0x14,0x60,0x00,0x20,0x2c,0x42,0x00,0x11,0x10,0x40,0x00,0x0d,
4690x00,0x00,0x00,0x00,0x3c,0x02,0xff,0xff,0x34,0x42,0x3f,0xff,0x02,0x42,0x90,0x24,
4700x02,0x40,0x28,0x21,0x24,0x04,0x02,0x2c,0x0c,0x00,0x06,0xbf,0x36,0x52,0x80,0x00,
4710x02,0x40,0x28,0x21,0x0c,0x00,0x06,0xbf,0x24,0x04,0x02,0x2c,0x08,0x00,0x06,0x66,
4720x2e,0x22,0x00,0x21,0x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x08,0x3c,0x04,0x00,0xc0,
4730x00,0x40,0x28,0x21,0x00,0x44,0x10,0x24,0x00,0x02,0x15,0x82,0x24,0x03,0x00,0x02,
4740x14,0x43,0xff,0xec,0x00,0x00,0x00,0x00,0x3c,0x02,0xff,0x3f,0x34,0x42,0xff,0xff,
4750x00,0xa2,0x10,0x24,0x00,0x44,0x28,0x25,0x0c,0x00,0x06,0xbf,0x24,0x04,0x02,0x08,
4760x08,0x00,0x06,0x96,0x3c,0x02,0xff,0xff,0x0c,0x00,0x06,0xd1,0x24,0x04,0x02,0x08,
4770x00,0x40,0x28,0x21,0x00,0x02,0x15,0x82,0x30,0x42,0x00,0x03,0x24,0x03,0x00,0x03,
4780x14,0x43,0xff,0xdc,0x3c,0x03,0x00,0x80,0x3c,0x02,0xff,0x3f,0x34,0x42,0xff,0xff,
4790x00,0xa2,0x10,0x24,0x08,0x00,0x06,0xae,0x00,0x43,0x28,0x25,0x30,0x83,0x00,0x03,
4800x00,0x04,0x20,0x40,0x00,0x83,0x20,0x23,0x3c,0x02,0xb0,0x0a,0x00,0x82,0x20,0x21,
4810x3c,0x06,0x00,0x01,0xac,0x85,0x00,0x00,0x24,0x07,0x00,0x01,0x00,0x00,0x28,0x21,
4820x34,0xc6,0x86,0x9f,0x8c,0x82,0x10,0x00,0x24,0xa5,0x00,0x01,0x10,0x47,0x00,0x03,
4830x00,0xc5,0x18,0x2b,0x10,0x60,0xff,0xfb,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,
4840x00,0x00,0x00,0x00,0x30,0x83,0x00,0x03,0x00,0x04,0x20,0x40,0x3c,0x02,0xb0,0x0a,
4850x00,0x83,0x20,0x23,0x00,0x82,0x20,0x21,0x3c,0x06,0x00,0x01,0x24,0x02,0xff,0xff,
4860xac,0x82,0x10,0x00,0x00,0x00,0x28,0x21,0x24,0x07,0x00,0x01,0x34,0xc6,0x86,0x9f,
4870x8c,0x82,0x10,0x00,0x24,0xa5,0x00,0x01,0x10,0x47,0x00,0x03,0x00,0xc5,0x18,0x2b,
4880x10,0x60,0xff,0xfb,0x00,0x00,0x00,0x00,0x8c,0x82,0x00,0x00,0x03,0xe0,0x00,0x08,
4890x00,0x00,0x00,0x00,0x3c,0x05,0xb0,0x03,0x3c,0x02,0x80,0x00,0x24,0x42,0x1b,0x94,
4900x24,0x03,0x00,0x01,0x34,0xa5,0x00,0x20,0x3c,0x06,0xb0,0x03,0xac,0xa2,0x00,0x00,
4910x34,0xc6,0x01,0x04,0xa0,0x83,0x00,0x48,0xa0,0x80,0x00,0x04,0xa0,0x80,0x00,0x05,
4920xa0,0x80,0x00,0x06,0xa0,0x80,0x00,0x07,0xa0,0x80,0x00,0x08,0xa0,0x80,0x00,0x09,
4930xa0,0x80,0x00,0x0a,0xa0,0x80,0x00,0x11,0xa0,0x80,0x00,0x13,0xa0,0x80,0x00,0x49,
4940x94,0xc2,0x00,0x00,0xac,0x80,0x00,0x00,0xa0,0x80,0x00,0x4e,0x00,0x02,0x14,0x00,
4950x00,0x02,0x14,0x03,0x30,0x43,0x00,0xff,0x30,0x42,0xff,0x00,0xa4,0x82,0x00,0x44,
4960xa4,0x83,0x00,0x46,0xac,0x80,0x00,0x24,0xac,0x80,0x00,0x28,0xac,0x80,0x00,0x2c,
4970xac,0x80,0x00,0x30,0xac,0x80,0x00,0x34,0xac,0x80,0x00,0x38,0xac,0x80,0x00,0x3c,
4980x03,0xe0,0x00,0x08,0xac,0x80,0x00,0x40,0x84,0x83,0x00,0x0c,0x3c,0x07,0xb0,0x03,
4990x34,0xe7,0x00,0x20,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,
5000x27,0x83,0x90,0x04,0x00,0x43,0x10,0x21,0x8c,0x48,0x00,0x18,0x3c,0x02,0x80,0x00,
5010x24,0x42,0x1c,0x28,0xac,0xe2,0x00,0x00,0x8d,0x03,0x00,0x08,0x80,0x82,0x00,0x13,
5020x00,0x05,0x2c,0x00,0x00,0x03,0x1e,0x02,0x00,0x02,0x12,0x00,0x30,0x63,0x00,0x7e,
5030x00,0x62,0x18,0x21,0x00,0x65,0x18,0x21,0x3c,0x02,0xc0,0x00,0x3c,0x05,0xb0,0x05,
5040x34,0x42,0x04,0x00,0x24,0x63,0x00,0x01,0x3c,0x07,0xb0,0x05,0x3c,0x08,0xb0,0x05,
5050x34,0xa5,0x04,0x20,0xac,0xa3,0x00,0x00,0x00,0xc2,0x30,0x21,0x34,0xe7,0x04,0x24,
5060x35,0x08,0x02,0x28,0x24,0x02,0x00,0x01,0x24,0x03,0x00,0x20,0xac,0xe6,0x00,0x00,
5070xac,0x82,0x00,0x3c,0x03,0xe0,0x00,0x08,0xa1,0x03,0x00,0x00,0x27,0xbd,0xff,0xa8,
5080x00,0x07,0x60,0x80,0x27,0x82,0xb4,0x00,0xaf,0xbe,0x00,0x50,0xaf,0xb7,0x00,0x4c,
5090xaf,0xb5,0x00,0x44,0xaf,0xb4,0x00,0x40,0xaf,0xbf,0x00,0x54,0xaf,0xb6,0x00,0x48,
5100xaf,0xb3,0x00,0x3c,0xaf,0xb2,0x00,0x38,0xaf,0xb1,0x00,0x34,0xaf,0xb0,0x00,0x30,
5110x01,0x82,0x10,0x21,0x8c,0x43,0x00,0x00,0x00,0xe0,0x70,0x21,0x3c,0x02,0x80,0x00,
5120x94,0x73,0x00,0x14,0x3c,0x07,0xb0,0x03,0x34,0xe7,0x00,0x20,0x24,0x42,0x1c,0xbc,
5130x3c,0x03,0xb0,0x05,0xac,0xe2,0x00,0x00,0x34,0x63,0x01,0x28,0x90,0x67,0x00,0x00,
5140x00,0x13,0xa8,0xc0,0x02,0xb3,0x18,0x21,0x27,0x82,0x90,0x04,0x00,0x03,0x18,0x80,
5150x00,0x62,0x18,0x21,0x00,0x05,0x2c,0x00,0x00,0x07,0x3e,0x00,0x28,0xc2,0x00,0x03,
5160x00,0xc0,0xa0,0x21,0x00,0x80,0x78,0x21,0x00,0x05,0xbc,0x03,0x8c,0x68,0x00,0x18,
5170x02,0xa0,0x58,0x21,0x10,0x40,0x01,0x81,0x00,0x07,0xf6,0x03,0x00,0xde,0x10,0x07,
5180x30,0x5e,0x00,0x01,0x01,0x73,0x10,0x21,0x27,0x83,0x90,0x08,0x00,0x02,0x10,0x80,
5190x00,0x43,0x10,0x21,0x80,0x4d,0x00,0x06,0x8d,0x03,0x00,0x00,0x8d,0x02,0x00,0x04,
5200x8d,0x0a,0x00,0x08,0x8d,0x03,0x00,0x0c,0xaf,0xa2,0x00,0x20,0x11,0xa0,0x01,0x71,
5210xaf,0xa3,0x00,0x18,0x27,0x82,0xb4,0x00,0x01,0x82,0x10,0x21,0x8c,0x44,0x00,0x00,
5220x00,0x00,0x00,0x00,0x90,0x83,0x00,0x16,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x04,
5230x14,0x60,0x00,0x12,0x00,0x00,0xb0,0x21,0x3c,0x02,0xb0,0x09,0x34,0x42,0x01,0x46,
5240x90,0x43,0x00,0x00,0x2a,0x84,0x00,0x04,0x10,0x80,0x01,0x56,0x30,0x65,0x00,0x01,
5250x91,0xe2,0x00,0x09,0x00,0x00,0x00,0x00,0x12,0x82,0x00,0x02,0x00,0x00,0x00,0x00,
5260x00,0x00,0x28,0x21,0x14,0xa0,0x00,0x03,0x00,0x00,0x38,0x21,0x13,0xc0,0x00,0x03,
5270x38,0xf6,0x00,0x01,0x24,0x07,0x00,0x01,0x38,0xf6,0x00,0x01,0x01,0x73,0x10,0x21,
5280x00,0x02,0x30,0x80,0x27,0x83,0x90,0x10,0x00,0xc3,0x48,0x21,0x91,0x25,0x00,0x00,
5290x8f,0xa4,0x00,0x20,0x2c,0xa3,0x00,0x04,0x00,0x04,0x11,0xc3,0x30,0x42,0x00,0x01,
5300x00,0x03,0xb0,0x0b,0x12,0xc0,0x00,0xd8,0xaf,0xa2,0x00,0x24,0x93,0x90,0xbb,0xea,
5310x00,0x0a,0x16,0x42,0x30,0x52,0x00,0x3f,0x2e,0x06,0x00,0x0c,0x10,0xc0,0x00,0xc0,
5320x00,0xa0,0x20,0x21,0x2c,0xa2,0x00,0x10,0x14,0x40,0x00,0x04,0x00,0x90,0x10,0x2b,
5330x30,0xa2,0x00,0x07,0x24,0x44,0x00,0x04,0x00,0x90,0x10,0x2b,0x10,0x40,0x00,0x0b,
5340x01,0x73,0x10,0x21,0x27,0x85,0xbb,0x1c,0x00,0x10,0x10,0x40,0x00,0x50,0x10,0x21,
5350x00,0x45,0x10,0x21,0x90,0x50,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x90,0x18,0x2b,
5360x14,0x60,0xff,0xfa,0x00,0x10,0x10,0x40,0x01,0x73,0x10,0x21,0x00,0x02,0x10,0x80,
5370x27,0x83,0x90,0x08,0x00,0x43,0x10,0x21,0x31,0xa4,0x00,0x01,0x10,0x80,0x00,0xa5,
5380xa0,0x50,0x00,0x07,0x3c,0x04,0xb0,0x05,0x34,0x84,0x00,0x08,0x24,0x02,0x00,0x01,
5390x3c,0x03,0x80,0x00,0xa1,0xe2,0x00,0x4e,0xac,0x83,0x00,0x00,0x8c,0x85,0x00,0x00,
5400x3c,0x02,0x00,0xf0,0x3c,0x03,0x40,0xf0,0x34,0x42,0xf0,0x00,0x34,0x63,0xf0,0x00,
5410x24,0x17,0x00,0x0e,0x24,0x13,0x01,0x06,0xac,0x82,0x00,0x00,0xac,0x83,0x00,0x00,
5420x27,0x82,0xb4,0x00,0x01,0x82,0x10,0x21,0x8c,0x43,0x00,0x00,0x24,0x05,0x00,0x01,
5430xaf,0xa5,0x00,0x1c,0x90,0x62,0x00,0x16,0x00,0x13,0xa8,0xc0,0x32,0x51,0x00,0x02,
5440x34,0x42,0x00,0x04,0xa0,0x62,0x00,0x16,0x8f,0xa3,0x00,0x20,0x8f,0xa4,0x00,0x18,
5450x00,0x03,0x13,0x43,0x00,0x04,0x1a,0x02,0x30,0x47,0x00,0x01,0x12,0x20,0x00,0x04,
5460x30,0x64,0x07,0xff,0x2e,0x03,0x00,0x04,0x32,0x42,0x00,0x33,0x00,0x43,0x90,0x0b,
5470x8f,0xa5,0x00,0x24,0x8f,0xa6,0x00,0x1c,0x00,0x12,0x10,0x40,0x00,0x05,0x19,0xc0,
5480x00,0x47,0x10,0x21,0x00,0x06,0x2a,0x80,0x00,0x43,0x10,0x21,0x00,0x10,0x32,0x00,
5490x00,0x04,0x24,0x80,0x02,0x65,0x28,0x21,0x00,0xa4,0x28,0x21,0x00,0x46,0x10,0x21,
5500x00,0x17,0x1c,0x00,0x3c,0x04,0xc0,0x00,0x00,0x43,0x30,0x21,0x16,0x80,0x00,0x29,
5510x00,0xa4,0x28,0x21,0x3c,0x02,0xb0,0x05,0x34,0x42,0x04,0x00,0x3c,0x03,0xb0,0x05,
5520x3c,0x04,0xb0,0x05,0xac,0x46,0x00,0x00,0x34,0x63,0x04,0x04,0x34,0x84,0x02,0x28,
5530x24,0x02,0x00,0x01,0xac,0x65,0x00,0x00,0xa0,0x82,0x00,0x00,0x3c,0x02,0xb0,0x09,
5540x34,0x42,0x01,0x46,0x90,0x44,0x00,0x00,0x91,0xe3,0x00,0x09,0x30,0x86,0x00,0x01,
5550x02,0x83,0x18,0x26,0x00,0x03,0x30,0x0b,0x14,0xc0,0x00,0x03,0x00,0x00,0x28,0x21,
5560x13,0xc0,0x00,0x03,0x02,0xb3,0x10,0x21,0x24,0x05,0x00,0x01,0x02,0xb3,0x10,0x21,
5570x27,0x83,0x90,0x08,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x84,0x48,0x00,0x04,
5580x00,0xa0,0x30,0x21,0x00,0xe0,0x20,0x21,0x02,0x80,0x28,0x21,0x02,0xc0,0x38,0x21,
5590x0c,0x00,0x00,0x70,0xaf,0xa8,0x00,0x10,0x7b,0xbe,0x02,0xbc,0x7b,0xb6,0x02,0x7c,
5600x7b,0xb4,0x02,0x3c,0x7b,0xb2,0x01,0xfc,0x7b,0xb0,0x01,0xbc,0x03,0xe0,0x00,0x08,
5610x27,0xbd,0x00,0x58,0x24,0x02,0x00,0x01,0x12,0x82,0x00,0x3d,0x3c,0x02,0xb0,0x05,
5620x24,0x02,0x00,0x02,0x12,0x82,0x00,0x31,0x3c,0x02,0xb0,0x05,0x24,0x02,0x00,0x03,
5630x12,0x82,0x00,0x25,0x3c,0x02,0xb0,0x05,0x24,0x02,0x00,0x10,0x12,0x82,0x00,0x19,
5640x3c,0x02,0xb0,0x05,0x24,0x02,0x00,0x11,0x12,0x82,0x00,0x0d,0x3c,0x02,0xb0,0x05,
5650x24,0x02,0x00,0x12,0x16,0x82,0xff,0xd1,0x3c,0x02,0xb0,0x05,0x3c,0x03,0xb0,0x05,
5660x34,0x42,0x04,0x20,0x3c,0x04,0xb0,0x05,0x34,0x63,0x04,0x24,0xac,0x46,0x00,0x00,
5670x34,0x84,0x02,0x28,0xac,0x65,0x00,0x00,0x08,0x00,0x07,0xe6,0x24,0x02,0x00,0x20,
5680x34,0x42,0x04,0x40,0x3c,0x03,0xb0,0x05,0x3c,0x04,0xb0,0x05,0xac,0x46,0x00,0x00,
5690x34,0x63,0x04,0x44,0x34,0x84,0x02,0x28,0x24,0x02,0x00,0x40,0x08,0x00,0x07,0xe6,
5700xac,0x65,0x00,0x00,0x34,0x42,0x04,0x28,0x3c,0x03,0xb0,0x05,0x3c,0x04,0xb0,0x05,
5710xac,0x46,0x00,0x00,0x34,0x63,0x04,0x2c,0x34,0x84,0x02,0x28,0x24,0x02,0xff,0x80,
5720x08,0x00,0x07,0xe6,0xac,0x65,0x00,0x00,0x34,0x42,0x04,0x18,0x3c,0x03,0xb0,0x05,
5730x3c,0x04,0xb0,0x05,0xac,0x46,0x00,0x00,0x34,0x63,0x04,0x1c,0x34,0x84,0x02,0x28,
5740x24,0x02,0x00,0x08,0x08,0x00,0x07,0xe6,0xac,0x65,0x00,0x00,0x34,0x42,0x04,0x10,
5750x3c,0x03,0xb0,0x05,0x3c,0x04,0xb0,0x05,0xac,0x46,0x00,0x00,0x34,0x63,0x04,0x14,
5760x34,0x84,0x02,0x28,0x24,0x02,0x00,0x04,0x08,0x00,0x07,0xe6,0xac,0x65,0x00,0x00,
5770x34,0x42,0x04,0x08,0x3c,0x03,0xb0,0x05,0x3c,0x04,0xb0,0x05,0xac,0x46,0x00,0x00,
5780x34,0x63,0x04,0x0c,0x34,0x84,0x02,0x28,0x24,0x02,0x00,0x02,0x08,0x00,0x07,0xe6,
5790xac,0x65,0x00,0x00,0x24,0x17,0x00,0x14,0x08,0x00,0x07,0xb8,0x24,0x13,0x01,0x02,
5800x30,0xa2,0x00,0x07,0x24,0x44,0x00,0x0c,0x00,0x90,0x18,0x2b,0x10,0x60,0x00,0x0c,
5810x26,0x02,0x00,0x04,0x27,0x85,0xbb,0x1c,0x00,0x10,0x10,0x40,0x00,0x50,0x10,0x21,
5820x00,0x45,0x10,0x21,0x90,0x50,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x90,0x18,0x2b,
5830x14,0x60,0xff,0xfa,0x00,0x10,0x10,0x40,0x2e,0x06,0x00,0x0c,0x26,0x02,0x00,0x04,
5840x08,0x00,0x07,0xa2,0x00,0x46,0x80,0x0a,0x27,0x82,0xb4,0x00,0x01,0x82,0x20,0x21,
5850x8c,0x87,0x00,0x00,0x00,0x00,0x00,0x00,0x90,0xe2,0x00,0x19,0x00,0x00,0x00,0x00,
5860x14,0x40,0x00,0x07,0x00,0x00,0x00,0x00,0x27,0x82,0x90,0x20,0x00,0xc2,0x10,0x21,
5870x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x60,0x00,0x14,0x00,0x00,0x00,0x00,
5880x90,0xe3,0x00,0x16,0x27,0x82,0x90,0x08,0x00,0xc2,0x10,0x21,0x34,0x63,0x00,0x20,
5890x90,0x50,0x00,0x07,0xa0,0xe3,0x00,0x16,0x8c,0x84,0x00,0x00,0x00,0x0a,0x1e,0x42,
5900x24,0x06,0x00,0x01,0x90,0x82,0x00,0x16,0x30,0x71,0x00,0x02,0x30,0x72,0x00,0x3f,
5910x30,0x42,0x00,0xfb,0x24,0x17,0x00,0x18,0x24,0x13,0x01,0x03,0x24,0x15,0x08,0x18,
5920xaf,0xa6,0x00,0x1c,0x08,0x00,0x07,0xc2,0xa0,0x82,0x00,0x16,0x8d,0x02,0x00,0x04,
5930x00,0x0a,0x1c,0x42,0x30,0x42,0x00,0x10,0x14,0x40,0x00,0x15,0x30,0x72,0x00,0x3f,
5940x81,0x22,0x00,0x05,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x11,0x30,0x72,0x00,0x3e,
5950x27,0x83,0x90,0x18,0x00,0xc3,0x18,0x21,0x80,0x64,0x00,0x00,0x27,0x83,0xb5,0x78,
5960x00,0x04,0x11,0x00,0x00,0x44,0x10,0x23,0x00,0x02,0x10,0x80,0x00,0x44,0x10,0x23,
5970x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x90,0x44,0x00,0x05,0x90,0x43,0x00,0x04,
5980x00,0x00,0x00,0x00,0x00,0x64,0x18,0x24,0x30,0x63,0x00,0x01,0x02,0x43,0x90,0x25,
5990x27,0x85,0xb4,0x00,0x01,0x85,0x28,0x21,0x8c,0xa6,0x00,0x00,0x01,0x73,0x10,0x21,
6000x27,0x83,0x90,0x10,0x90,0xc4,0x00,0x16,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,
6010x30,0x84,0x00,0xdf,0x90,0x50,0x00,0x00,0xa0,0xc4,0x00,0x16,0x80,0xc6,0x00,0x12,
6020x8c,0xa3,0x00,0x00,0x2d,0xc4,0x00,0x02,0xaf,0xa6,0x00,0x1c,0x90,0x62,0x00,0x16,
6030x00,0x00,0x00,0x00,0x30,0x42,0x00,0xfb,0x14,0x80,0x00,0x06,0xa0,0x62,0x00,0x16,
6040x24,0x02,0x00,0x06,0x11,0xc2,0x00,0x03,0x24,0x02,0x00,0x04,0x15,0xc2,0xff,0x0e,
6050x32,0x51,0x00,0x02,0x32,0x51,0x00,0x02,0x2e,0x02,0x00,0x0c,0x14,0x40,0x00,0x0f,
6060x00,0x11,0x18,0x2b,0x32,0x02,0x00,0x0f,0x34,0x42,0x00,0x10,0x00,0x03,0x19,0x00,
6070x00,0x43,0x18,0x21,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0xe0,0xa0,0x43,0x00,0x00,
6080x00,0x00,0x20,0x21,0x02,0x00,0x28,0x21,0x0c,0x00,0x02,0x03,0xaf,0xaf,0x00,0x28,
6090x8f,0xaf,0x00,0x28,0x08,0x00,0x07,0xc2,0x00,0x00,0x00,0x00,0x08,0x00,0x08,0xbd,
6100x32,0x03,0x00,0xff,0x3c,0x03,0xb0,0x05,0x34,0x63,0x02,0x42,0x90,0x62,0x00,0x00,
6110x00,0x00,0x00,0x00,0x30,0x42,0x00,0x0f,0x14,0x40,0xfe,0xaa,0x00,0x00,0x00,0x00,
6120x91,0xe2,0x00,0x09,0x00,0x00,0x00,0x00,0x02,0x82,0x10,0x26,0x08,0x00,0x07,0x79,
6130x00,0x02,0x28,0x0b,0x08,0x00,0x07,0x7f,0x00,0x00,0xb0,0x21,0x24,0x02,0x00,0x10,
6140x10,0xc2,0x00,0x08,0x24,0x02,0x00,0x11,0x10,0xc2,0xfe,0x7d,0x00,0x07,0x17,0x83,
6150x24,0x02,0x00,0x12,0x14,0xc2,0xfe,0x7b,0x00,0x07,0x17,0x43,0x08,0x00,0x07,0x59,
6160x30,0x5e,0x00,0x01,0x08,0x00,0x07,0x59,0x00,0x07,0xf7,0xc2,0x00,0x04,0x10,0x40,
6170x27,0x83,0x80,0x1c,0x00,0x43,0x10,0x21,0x00,0x80,0x40,0x21,0x94,0x44,0x00,0x00,
6180x2d,0x07,0x00,0x04,0x24,0xc2,0x00,0x03,0x00,0x47,0x30,0x0a,0x00,0x86,0x00,0x18,
6190x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,0x24,0x42,0x23,0x8c,
6200xac,0x62,0x00,0x00,0x2d,0x06,0x00,0x10,0x00,0x00,0x20,0x12,0x00,0x04,0x22,0x42,
6210x24,0x84,0x00,0x01,0x24,0x83,0x00,0xc0,0x10,0xe0,0x00,0x0b,0x24,0x82,0x00,0x60,
6220x00,0x40,0x20,0x21,0x00,0x65,0x20,0x0a,0x3c,0x03,0xb0,0x03,0x34,0x63,0x01,0x00,
6230x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,0x00,0x44,0x20,0x04,
6240x03,0xe0,0x00,0x08,0x00,0x80,0x10,0x21,0x24,0x85,0x00,0x28,0x24,0x83,0x00,0x24,
6250x31,0x02,0x00,0x08,0x14,0xc0,0xff,0xf4,0x24,0x84,0x00,0x14,0x00,0x60,0x20,0x21,
6260x08,0x00,0x08,0xfa,0x00,0xa2,0x20,0x0b,0x27,0xbd,0xff,0xe0,0x3c,0x03,0xb0,0x03,
6270x3c,0x02,0x80,0x00,0xaf,0xb0,0x00,0x10,0x24,0x42,0x24,0x28,0x00,0x80,0x80,0x21,
6280x34,0x63,0x00,0x20,0x3c,0x04,0xb0,0x03,0xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,
6290xaf,0xbf,0x00,0x1c,0x83,0xb1,0x00,0x33,0x83,0xa8,0x00,0x37,0x34,0x84,0x01,0x10,
6300xac,0x62,0x00,0x00,0x2e,0x02,0x00,0x10,0x00,0xe0,0x90,0x21,0x8c,0x87,0x00,0x00,
6310x14,0x40,0x00,0x0c,0x2e,0x02,0x00,0x0c,0x3c,0x02,0x00,0x0f,0x34,0x42,0xf0,0x00,
6320x00,0xe2,0x10,0x24,0x14,0x40,0x00,0x37,0x32,0x02,0x00,0x08,0x32,0x02,0x00,0x07,
6330x27,0x83,0x80,0xcc,0x00,0x43,0x10,0x21,0x90,0x50,0x00,0x00,0x00,0x00,0x00,0x00,
6340x2e,0x02,0x00,0x0c,0x14,0x40,0x00,0x03,0x02,0x00,0x20,0x21,0x32,0x02,0x00,0x0f,
6350x24,0x44,0x00,0x0c,0x00,0x87,0x10,0x06,0x30,0x42,0x00,0x01,0x14,0x40,0x00,0x07,
6360x2c,0x82,0x00,0x0c,0x00,0x04,0x10,0x80,0x27,0x83,0xb4,0x50,0x00,0x43,0x10,0x21,
6370x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,0x2c,0x82,0x00,0x0c,0x14,0x40,0x00,0x05,
6380x00,0x05,0x10,0x40,0x00,0x46,0x10,0x21,0x00,0x02,0x11,0x00,0x00,0x82,0x10,0x21,
6390x24,0x44,0x00,0x04,0x15,0x00,0x00,0x02,0x24,0x06,0x00,0x20,0x24,0x06,0x00,0x0e,
6400x0c,0x00,0x08,0xe3,0x00,0x00,0x00,0x00,0x00,0x40,0x30,0x21,0x3c,0x02,0xb0,0x03,
6410x34,0x42,0x01,0x00,0x90,0x43,0x00,0x00,0x2e,0x04,0x00,0x04,0x24,0x02,0x00,0x10,
6420x24,0x05,0x00,0x0a,0x00,0x44,0x28,0x0a,0x30,0x63,0x00,0x01,0x14,0x60,0x00,0x02,
6430x00,0x05,0x10,0x40,0x00,0xa0,0x10,0x21,0x30,0x45,0x00,0xff,0x00,0xc5,0x10,0x21,
6440x24,0x46,0x00,0x46,0x02,0x26,0x18,0x04,0xa6,0x43,0x00,0x00,0x8f,0xbf,0x00,0x1c,
6450x8f,0xb2,0x00,0x18,0x7b,0xb0,0x00,0xbc,0x00,0xc0,0x10,0x21,0x03,0xe0,0x00,0x08,
6460x27,0xbd,0x00,0x20,0x10,0x40,0xff,0xcf,0x2e,0x02,0x00,0x0c,0x32,0x02,0x00,0x07,
6470x27,0x83,0x80,0xc4,0x00,0x43,0x10,0x21,0x90,0x44,0x00,0x00,0x08,0x00,0x09,0x28,
6480x02,0x04,0x80,0x23,0x27,0xbd,0xff,0xb8,0x00,0x05,0x38,0x80,0x27,0x82,0xb4,0x00,
6490xaf,0xbe,0x00,0x40,0xaf,0xb6,0x00,0x38,0xaf,0xb3,0x00,0x2c,0xaf,0xbf,0x00,0x44,
6500xaf,0xb7,0x00,0x3c,0xaf,0xb5,0x00,0x34,0xaf,0xb4,0x00,0x30,0xaf,0xb2,0x00,0x28,
6510xaf,0xb1,0x00,0x24,0xaf,0xb0,0x00,0x20,0x00,0xe2,0x38,0x21,0x8c,0xe6,0x00,0x00,
6520xaf,0xa5,0x00,0x4c,0x3c,0x02,0x80,0x00,0x3c,0x05,0xb0,0x03,0x34,0xa5,0x00,0x20,
6530x24,0x42,0x25,0x84,0x24,0x03,0x00,0x01,0xac,0xa2,0x00,0x00,0xa0,0xc3,0x00,0x12,
6540x8c,0xe5,0x00,0x00,0x94,0xc3,0x00,0x06,0x90,0xa2,0x00,0x16,0xa4,0xc3,0x00,0x14,
6550x27,0x83,0x90,0x00,0x34,0x42,0x00,0x08,0xa0,0xa2,0x00,0x16,0x8c,0xe8,0x00,0x00,
6560xaf,0xa4,0x00,0x48,0x27,0x82,0x90,0x04,0x95,0x11,0x00,0x14,0x00,0x00,0x00,0x00,
6570x00,0x11,0x98,0xc0,0x02,0x71,0x20,0x21,0x00,0x04,0x20,0x80,0x00,0x82,0x10,0x21,
6580x8c,0x52,0x00,0x18,0x00,0x83,0x18,0x21,0x84,0x75,0x00,0x06,0x8e,0x45,0x00,0x08,
6590x8e,0x46,0x00,0x04,0x8e,0x47,0x00,0x04,0x00,0x05,0x1c,0x82,0x00,0x06,0x31,0x42,
6600x27,0x82,0x90,0x10,0x30,0x63,0x00,0x01,0x30,0xc6,0x00,0x01,0x00,0x82,0x20,0x21,
6610xa5,0x15,0x00,0x1a,0x00,0x05,0x14,0x42,0xaf,0xa3,0x00,0x18,0xaf,0xa6,0x00,0x1c,
6620x30,0xe7,0x00,0x10,0x30,0x56,0x00,0x01,0x80,0x97,0x00,0x06,0x14,0xe0,0x00,0x47,
6630x00,0x05,0xf7,0xc2,0x80,0x82,0x00,0x05,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x44,
6640x02,0x71,0x10,0x21,0x93,0x90,0xbb,0xe9,0x00,0x00,0x00,0x00,0x2e,0x02,0x00,0x0c,
6650x14,0x40,0x00,0x06,0x02,0x00,0x20,0x21,0x00,0x16,0x10,0x40,0x00,0x43,0x10,0x21,
6660x00,0x02,0x11,0x00,0x02,0x02,0x10,0x21,0x24,0x44,0x00,0x04,0x02,0x71,0x10,0x21,
6670x00,0x02,0x10,0x80,0x27,0x83,0x90,0x10,0x00,0x43,0x10,0x21,0x00,0x80,0x80,0x21,
6680xa0,0x44,0x00,0x03,0xa0,0x44,0x00,0x00,0x02,0x00,0x20,0x21,0x02,0xc0,0x28,0x21,
6690x0c,0x00,0x08,0xe3,0x02,0xa0,0x30,0x21,0x02,0x71,0x18,0x21,0x00,0x03,0x88,0x80,
6700x00,0x40,0xa0,0x21,0x27,0x82,0x90,0x20,0x02,0x22,0x10,0x21,0x8c,0x44,0x00,0x00,
6710x26,0xe3,0x00,0x02,0x00,0x03,0x17,0xc2,0x00,0x62,0x18,0x21,0x00,0x04,0x25,0xc2,
6720x00,0x03,0x18,0x43,0x30,0x84,0x00,0x01,0x00,0x03,0x18,0x40,0x03,0xc4,0x20,0x24,
6730x14,0x80,0x00,0x15,0x02,0x43,0x38,0x21,0x3c,0x08,0xb0,0x03,0x35,0x08,0x00,0x28,
6740x8d,0x03,0x00,0x00,0x8f,0xa6,0x00,0x4c,0x8f,0xa4,0x00,0x48,0x27,0x82,0x90,0x08,
6750x02,0x22,0x10,0x21,0x24,0x63,0x00,0x01,0x02,0xa0,0x28,0x21,0xa4,0x54,0x00,0x04,
6760x00,0xc0,0x38,0x21,0x0c,0x00,0x07,0x2f,0xad,0x03,0x00,0x00,0x7b,0xbe,0x02,0x3c,
6770x7b,0xb6,0x01,0xfc,0x7b,0xb4,0x01,0xbc,0x7b,0xb2,0x01,0x7c,0x7b,0xb0,0x01,0x3c,
6780x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x48,0x8f,0xa2,0x00,0x1c,0x8f,0xa6,0x00,0x18,
6790x02,0x00,0x20,0x21,0x02,0xc0,0x28,0x21,0xaf,0xa2,0x00,0x10,0x0c,0x00,0x09,0x0a,
6800xaf,0xa0,0x00,0x14,0x08,0x00,0x09,0xc6,0x02,0x82,0xa0,0x21,0x02,0x71,0x10,0x21,
6810x00,0x02,0x10,0x80,0x27,0x83,0x90,0x10,0x00,0x43,0x10,0x21,0x90,0x50,0x00,0x00,
6820x08,0x00,0x09,0xb2,0xa0,0x50,0x00,0x03,0x27,0xbd,0xff,0xb8,0xaf,0xb1,0x00,0x24,
6830x8f,0xb1,0x00,0x5c,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,
6840x24,0x42,0x27,0xa8,0xaf,0xbe,0x00,0x40,0xaf,0xb7,0x00,0x3c,0xaf,0xb6,0x00,0x38,
6850xaf,0xb5,0x00,0x34,0xaf,0xb4,0x00,0x30,0xaf,0xa5,0x00,0x4c,0x8f,0xb5,0x00,0x58,
6860xaf,0xbf,0x00,0x44,0xaf,0xb3,0x00,0x2c,0xaf,0xb2,0x00,0x28,0xaf,0xb0,0x00,0x20,
6870x00,0xe0,0xb0,0x21,0xac,0x62,0x00,0x00,0x00,0x80,0xf0,0x21,0x00,0x00,0xb8,0x21,
6880x16,0x20,0x00,0x2b,0x00,0x00,0xa0,0x21,0x27,0x85,0xb4,0x00,0x00,0x07,0x10,0x80,
6890x00,0x45,0x10,0x21,0x8c,0x53,0x00,0x00,0x00,0x15,0x18,0x80,0x00,0x65,0x18,0x21,
6900x92,0x62,0x00,0x16,0x8c,0x72,0x00,0x00,0x30,0x42,0x00,0x03,0x14,0x40,0x00,0x2d,
6910x00,0x00,0x00,0x00,0x92,0x42,0x00,0x16,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x03,
6920x14,0x40,0x00,0x28,0x00,0x00,0x00,0x00,0x8c,0x82,0x00,0x34,0x00,0x00,0x00,0x00,
6930x14,0x40,0x00,0x18,0x02,0x20,0x10,0x21,0x8c,0x82,0x00,0x38,0x00,0x00,0x00,0x00,
6940x14,0x40,0x00,0x14,0x02,0x20,0x10,0x21,0x8c,0x82,0x00,0x3c,0x00,0x00,0x00,0x00,
6950x14,0x40,0x00,0x0f,0x3c,0x03,0xb0,0x09,0x3c,0x05,0xb0,0x05,0x34,0x63,0x01,0x44,
6960x34,0xa5,0x02,0x52,0x94,0x66,0x00,0x00,0x90,0xa2,0x00,0x00,0x8f,0xa3,0x00,0x4c,
6970x00,0x00,0x00,0x00,0x00,0x62,0x10,0x06,0x30,0x42,0x00,0x01,0x10,0x40,0x00,0x04,
6980x30,0xc6,0xff,0xff,0x2c,0xc2,0x00,0x41,0x10,0x40,0x00,0x09,0x24,0x05,0x00,0x14,
6990x02,0x20,0x10,0x21,0x7b,0xbe,0x02,0x3c,0x7b,0xb6,0x01,0xfc,0x7b,0xb4,0x01,0xbc,
7000x7b,0xb2,0x01,0x7c,0x7b,0xb0,0x01,0x3c,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x48,
7010x0c,0x00,0x07,0x0a,0x24,0x06,0x01,0x07,0x24,0x02,0x00,0x01,0x08,0x00,0x0a,0x2c,
7020xa3,0xc2,0x00,0x11,0x10,0xc0,0x00,0x1c,0x24,0x02,0x00,0x01,0x10,0xc2,0x00,0x17,
7030x00,0xc0,0x88,0x21,0x96,0x54,0x00,0x1a,0x02,0xa0,0xb8,0x21,0x12,0x20,0xff,0xed,
7040x02,0x20,0x10,0x21,0x27,0x83,0xb4,0x00,0x00,0x17,0x10,0x80,0x00,0x43,0x10,0x21,
7050x8c,0x44,0x00,0x00,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x28,0x80,0x86,0x00,0x12,
7060x8c,0x62,0x00,0x00,0x00,0x14,0x2c,0x00,0x00,0x05,0x2c,0x03,0x00,0x46,0x10,0x21,
7070x8f,0xa6,0x00,0x4c,0x02,0xe0,0x38,0x21,0x03,0xc0,0x20,0x21,0x0c,0x00,0x07,0x2f,
7080xac,0x62,0x00,0x00,0x08,0x00,0x0a,0x2c,0xaf,0xd1,0x00,0x40,0x96,0x74,0x00,0x1a,
7090x08,0x00,0x0a,0x3f,0x02,0xc0,0xb8,0x21,0x3c,0x02,0xb0,0x03,0x34,0x42,0x01,0x08,
7100x8c,0x50,0x00,0x00,0x02,0x60,0x20,0x21,0x0c,0x00,0x1e,0xf3,0x02,0x00,0x28,0x21,
7110x30,0x42,0x00,0xff,0x02,0x00,0x28,0x21,0x02,0x40,0x20,0x21,0x0c,0x00,0x1e,0xf3,
7120xaf,0xa2,0x00,0x18,0x8f,0xa4,0x00,0x18,0x00,0x00,0x00,0x00,0x10,0x80,0x00,0xed,
7130x30,0x50,0x00,0xff,0x12,0x00,0x00,0x18,0x24,0x11,0x00,0x01,0x96,0x63,0x00,0x14,
7140x96,0x44,0x00,0x14,0x27,0x85,0x90,0x00,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,
7150x00,0x02,0x10,0x80,0x00,0x45,0x10,0x21,0x00,0x04,0x18,0xc0,0x8c,0x46,0x00,0x08,
7160x00,0x64,0x18,0x21,0x00,0x03,0x18,0x80,0x00,0x65,0x18,0x21,0x00,0x06,0x17,0x02,
7170x24,0x04,0x00,0xff,0x8c,0x63,0x00,0x08,0x10,0x44,0x00,0xd6,0x00,0x03,0x17,0x02,
7180x10,0x44,0x00,0xd5,0x3c,0x02,0x80,0x00,0x00,0x66,0x18,0x2b,0x24,0x11,0x00,0x02,
7190x24,0x02,0x00,0x01,0x00,0x43,0x88,0x0a,0x24,0x02,0x00,0x01,0x12,0x22,0x00,0x5a,
7200x24,0x02,0x00,0x02,0x16,0x22,0xff,0xbd,0x00,0x00,0x00,0x00,0x96,0x49,0x00,0x14,
7210x27,0x82,0x90,0x04,0x02,0xa0,0xb8,0x21,0x00,0x09,0x50,0xc0,0x01,0x49,0x18,0x21,
7220x00,0x03,0x40,0x80,0x01,0x02,0x10,0x21,0x8c,0x43,0x00,0x18,0x00,0x00,0x00,0x00,
7230x8c,0x65,0x00,0x08,0x8c,0x62,0x00,0x0c,0x8c,0x62,0x00,0x04,0x00,0x05,0x24,0x42,
7240x00,0x05,0x1c,0x82,0x30,0x42,0x00,0x10,0x30,0x66,0x00,0x01,0x14,0x40,0x00,0x41,
7250x30,0x87,0x00,0x01,0x27,0x82,0x90,0x18,0x01,0x02,0x10,0x21,0x80,0x44,0x00,0x00,
7260x27,0x82,0xb5,0x78,0x00,0x04,0x19,0x00,0x00,0x64,0x18,0x23,0x00,0x03,0x18,0x80,
7270x00,0x64,0x18,0x23,0x00,0x03,0x18,0x80,0x00,0x62,0x10,0x21,0x90,0x45,0x00,0x05,
7280x27,0x84,0xb4,0xa0,0x00,0x64,0x18,0x21,0x90,0x63,0x00,0x00,0x10,0xa0,0x00,0x2b,
7290x2c,0x64,0x00,0x0c,0x14,0x80,0x00,0x04,0x00,0x60,0x10,0x21,0x00,0x06,0x11,0x00,
7300x00,0x62,0x10,0x21,0x24,0x42,0x00,0x24,0x3c,0x01,0xb0,0x03,0xa0,0x22,0x00,0xe1,
7310x14,0x80,0x00,0x06,0x00,0x60,0x28,0x21,0x00,0x07,0x10,0x40,0x00,0x46,0x10,0x21,
7320x00,0x02,0x11,0x00,0x00,0x62,0x10,0x21,0x24,0x45,0x00,0x04,0x01,0x49,0x10,0x21,
7330x27,0x83,0x90,0x10,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x00,0xa0,0x18,0x21,
7340xa0,0x45,0x00,0x03,0xa0,0x45,0x00,0x00,0x24,0x02,0x00,0x08,0x12,0x02,0x00,0x0b,
7350x24,0x02,0x00,0x01,0x00,0x60,0x28,0x21,0x02,0x40,0x20,0x21,0x0c,0x00,0x1f,0x6f,
7360xaf,0xa2,0x00,0x10,0x30,0x54,0xff,0xff,0x92,0x42,0x00,0x16,0x00,0x00,0x00,0x00,
7370x02,0x02,0x10,0x25,0x08,0x00,0x0a,0x3f,0xa2,0x42,0x00,0x16,0x00,0x60,0x28,0x21,
7380x02,0x40,0x20,0x21,0x0c,0x00,0x1f,0x20,0xaf,0xa0,0x00,0x10,0x08,0x00,0x0a,0xc2,
7390x30,0x54,0xff,0xff,0x08,0x00,0x0a,0xaa,0x00,0x60,0x10,0x21,0x14,0x80,0xff,0xfd,
7400x00,0x00,0x00,0x00,0x00,0x06,0x11,0x00,0x00,0x62,0x10,0x21,0x08,0x00,0x0a,0xaa,
7410x24,0x42,0x00,0x04,0x27,0x82,0x90,0x10,0x01,0x02,0x10,0x21,0x90,0x43,0x00,0x00,
7420x08,0x00,0x0a,0xba,0xa0,0x43,0x00,0x03,0x96,0x69,0x00,0x14,0x02,0xc0,0xb8,0x21,
7430x24,0x0b,0x00,0x01,0x00,0x09,0x10,0xc0,0x00,0x49,0x18,0x21,0x00,0x03,0x40,0x80,
7440x00,0x40,0x50,0x21,0x27,0x82,0x90,0x04,0x01,0x02,0x10,0x21,0x8c,0x43,0x00,0x18,
7450x00,0x00,0x00,0x00,0x8c,0x65,0x00,0x08,0x8c,0x62,0x00,0x0c,0x8c,0x62,0x00,0x04,
7460x00,0x05,0x24,0x42,0x00,0x05,0x1c,0x82,0x30,0x42,0x00,0x10,0x30,0x66,0x00,0x01,
7470x10,0x40,0x00,0x0d,0x30,0x87,0x00,0x01,0x27,0x82,0x90,0x18,0x01,0x02,0x10,0x21,
7480x80,0x43,0x00,0x00,0x00,0x00,0x58,0x21,0x00,0x03,0x11,0x00,0x00,0x43,0x10,0x23,
7490x00,0x02,0x10,0x80,0x00,0x43,0x10,0x23,0x00,0x02,0x10,0x80,0x27,0x83,0xb5,0x70,
7500x00,0x43,0x10,0x21,0xa0,0x40,0x00,0x04,0x11,0x60,0x00,0x4f,0x00,0x00,0x00,0x00,
7510x01,0x49,0x10,0x21,0x00,0x02,0x20,0x80,0x27,0x85,0x90,0x10,0x00,0x85,0x10,0x21,
7520x80,0x43,0x00,0x05,0x00,0x00,0x00,0x00,0x14,0x60,0x00,0x42,0x01,0x49,0x10,0x21,
7530x27,0x82,0x90,0x18,0x00,0x82,0x10,0x21,0x80,0x44,0x00,0x00,0x27,0x82,0xb5,0x78,
7540x00,0x04,0x19,0x00,0x00,0x64,0x18,0x23,0x00,0x03,0x18,0x80,0x00,0x64,0x18,0x23,
7550x00,0x03,0x18,0x80,0x00,0x62,0x10,0x21,0x90,0x45,0x00,0x05,0x27,0x84,0xb4,0xa0,
7560x00,0x64,0x18,0x21,0x90,0x63,0x00,0x00,0x10,0xa0,0x00,0x2c,0x2c,0x64,0x00,0x0c,
7570x14,0x80,0x00,0x04,0x00,0x60,0x10,0x21,0x00,0x06,0x11,0x00,0x00,0x62,0x10,0x21,
7580x24,0x42,0x00,0x24,0x3c,0x01,0xb0,0x03,0xa0,0x22,0x00,0xe1,0x14,0x80,0x00,0x06,
7590x00,0x60,0x28,0x21,0x00,0x07,0x10,0x40,0x00,0x46,0x10,0x21,0x00,0x02,0x11,0x00,
7600x00,0x62,0x10,0x21,0x24,0x45,0x00,0x04,0x01,0x49,0x10,0x21,0x27,0x83,0x90,0x10,
7610x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x00,0xa0,0x18,0x21,0xa0,0x45,0x00,0x03,
7620xa0,0x45,0x00,0x00,0x8f,0xa4,0x00,0x18,0x24,0x02,0x00,0x08,0x10,0x82,0x00,0x0c,
7630x00,0x60,0x28,0x21,0x24,0x02,0x00,0x01,0x02,0x60,0x20,0x21,0x0c,0x00,0x1f,0x6f,
7640xaf,0xa2,0x00,0x10,0x8f,0xa3,0x00,0x18,0x30,0x54,0xff,0xff,0x92,0x62,0x00,0x16,
7650x00,0x00,0x00,0x00,0x00,0x62,0x10,0x25,0x08,0x00,0x0a,0x3f,0xa2,0x62,0x00,0x16,
7660x02,0x60,0x20,0x21,0x0c,0x00,0x1f,0x20,0xaf,0xa0,0x00,0x10,0x08,0x00,0x0b,0x31,
7670x00,0x00,0x00,0x00,0x08,0x00,0x0b,0x19,0x00,0x60,0x10,0x21,0x14,0x80,0xff,0xfd,
7680x00,0x00,0x00,0x00,0x00,0x06,0x11,0x00,0x00,0x62,0x10,0x21,0x08,0x00,0x0b,0x19,
7690x24,0x42,0x00,0x04,0x00,0x02,0x10,0x80,0x00,0x45,0x10,0x21,0x90,0x43,0x00,0x00,
7700x08,0x00,0x0b,0x29,0xa0,0x43,0x00,0x03,0x27,0x85,0x90,0x10,0x08,0x00,0x0b,0x45,
7710x01,0x49,0x10,0x21,0x3c,0x02,0x80,0x00,0x00,0x62,0x18,0x26,0x08,0x00,0x0a,0x7a,
7720x00,0xc2,0x30,0x26,0x12,0x00,0xff,0x2d,0x24,0x02,0x00,0x01,0x08,0x00,0x0a,0x7f,
7730x24,0x11,0x00,0x02,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x27,0xbd,0xff,0xd0,
7740x24,0x42,0x2d,0x54,0x34,0x63,0x00,0x20,0x3c,0x05,0xb0,0x05,0xaf,0xb3,0x00,0x24,
7750xaf,0xb2,0x00,0x20,0xaf,0xb1,0x00,0x1c,0xaf,0xbf,0x00,0x28,0xaf,0xb0,0x00,0x18,
7760xac,0x62,0x00,0x00,0x34,0xa5,0x02,0x42,0x90,0xa2,0x00,0x00,0x00,0x80,0x90,0x21,
7770x24,0x11,0x00,0x10,0x30,0x53,0x00,0xff,0x24,0x02,0x00,0x10,0x12,0x22,0x00,0xcf,
7780x00,0x00,0x18,0x21,0x24,0x02,0x00,0x11,0x12,0x22,0x00,0xc1,0x24,0x02,0x00,0x12,
7790x12,0x22,0x00,0xb4,0x00,0x00,0x00,0x00,0x14,0x60,0x00,0xad,0xae,0x43,0x00,0x40,
7800x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x2c,0x8c,0x44,0x00,0x00,0x3c,0x03,0x00,0x02,
7810x34,0x63,0x00,0xff,0x00,0x83,0x80,0x24,0x00,0x10,0x14,0x43,0x10,0x40,0x00,0x05,
7820x00,0x00,0x00,0x00,0x8e,0x42,0x00,0x34,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x92,
7830x00,0x00,0x00,0x00,0x93,0x83,0x8b,0x71,0x00,0x00,0x00,0x00,0x30,0x62,0x00,0x02,
7840x10,0x40,0x00,0x04,0x32,0x10,0x00,0xff,0x00,0x10,0x11,0xc3,0x14,0x40,0x00,0x86,
7850x00,0x00,0x00,0x00,0x16,0x00,0x00,0x15,0x02,0x00,0x10,0x21,0x26,0x22,0x00,0x01,
7860x30,0x51,0x00,0xff,0x2e,0x23,0x00,0x13,0x14,0x60,0xff,0xdb,0x24,0x03,0x00,0x02,
7870x12,0x63,0x00,0x73,0x24,0x02,0x00,0x05,0x2a,0x62,0x00,0x03,0x10,0x40,0x00,0x58,
7880x24,0x02,0x00,0x04,0x24,0x02,0x00,0x01,0x12,0x62,0x00,0x4b,0x02,0x40,0x20,0x21,
7890x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x2c,0x8c,0x43,0x00,0x00,0x00,0x00,0x00,0x00,
7900x30,0x70,0x00,0xff,0x12,0x00,0x00,0x06,0x02,0x00,0x10,0x21,0x8f,0xbf,0x00,0x28,
7910x7b,0xb2,0x01,0x3c,0x7b,0xb0,0x00,0xfc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x30,
7920x92,0x46,0x00,0x04,0x8e,0x43,0x00,0x24,0x24,0x02,0x00,0x07,0x02,0x40,0x20,0x21,
7930x00,0x00,0x28,0x21,0x24,0x07,0x00,0x06,0xaf,0xa2,0x00,0x10,0x0c,0x00,0x09,0xea,
7940xaf,0xa3,0x00,0x14,0xae,0x42,0x00,0x24,0x3c,0x02,0xb0,0x05,0x8c,0x42,0x02,0x2c,
7950x00,0x00,0x00,0x00,0x30,0x50,0x00,0xff,0x16,0x00,0xff,0xec,0x02,0x00,0x10,0x21,
7960x92,0x46,0x00,0x05,0x8e,0x43,0x00,0x28,0x24,0x02,0x00,0x05,0x02,0x40,0x20,0x21,
7970x24,0x05,0x00,0x01,0x24,0x07,0x00,0x04,0xaf,0xa2,0x00,0x10,0x0c,0x00,0x09,0xea,
7980xaf,0xa3,0x00,0x14,0xae,0x42,0x00,0x28,0x3c,0x02,0xb0,0x05,0x8c,0x42,0x02,0x2c,
7990x00,0x00,0x00,0x00,0x30,0x50,0x00,0xff,0x16,0x00,0xff,0xdc,0x02,0x00,0x10,0x21,
8000x92,0x46,0x00,0x06,0x8e,0x43,0x00,0x2c,0x24,0x02,0x00,0x03,0x02,0x40,0x20,0x21,
8010x24,0x05,0x00,0x02,0x00,0x00,0x38,0x21,0xaf,0xa2,0x00,0x10,0x0c,0x00,0x09,0xea,
8020xaf,0xa3,0x00,0x14,0xae,0x42,0x00,0x2c,0x3c,0x02,0xb0,0x05,0x8c,0x42,0x02,0x2c,
8030x00,0x00,0x00,0x00,0x30,0x50,0x00,0xff,0x16,0x00,0xff,0xcc,0x02,0x00,0x10,0x21,
8040x92,0x46,0x00,0x07,0x8e,0x43,0x00,0x30,0x24,0x02,0x00,0x02,0x02,0x40,0x20,0x21,
8050x24,0x05,0x00,0x03,0x24,0x07,0x00,0x01,0xaf,0xa2,0x00,0x10,0x0c,0x00,0x09,0xea,
8060xaf,0xa3,0x00,0x14,0xae,0x42,0x00,0x30,0x3c,0x02,0xb0,0x05,0x8c,0x42,0x02,0x2c,
8070x08,0x00,0x0b,0x9b,0x30,0x42,0x00,0xff,0x92,0x46,0x00,0x04,0x8e,0x43,0x00,0x24,
8080x24,0x02,0x00,0x07,0x00,0x00,0x28,0x21,0x24,0x07,0x00,0x06,0xaf,0xa2,0x00,0x10,
8090x0c,0x00,0x09,0xea,0xaf,0xa3,0x00,0x14,0x08,0x00,0x0b,0x94,0xae,0x42,0x00,0x24,
8100x12,0x62,0x00,0x0d,0x24,0x02,0x00,0x03,0x24,0x02,0x00,0x08,0x16,0x62,0xff,0xa8,
8110x02,0x40,0x20,0x21,0x92,0x46,0x00,0x07,0x8e,0x42,0x00,0x30,0x24,0x05,0x00,0x03,
8120x24,0x07,0x00,0x01,0xaf,0xa3,0x00,0x10,0x0c,0x00,0x09,0xea,0xaf,0xa2,0x00,0x14,
8130x08,0x00,0x0b,0x94,0xae,0x42,0x00,0x30,0x92,0x46,0x00,0x06,0x8e,0x43,0x00,0x2c,
8140x02,0x40,0x20,0x21,0x24,0x05,0x00,0x02,0x00,0x00,0x38,0x21,0xaf,0xa2,0x00,0x10,
8150x0c,0x00,0x09,0xea,0xaf,0xa3,0x00,0x14,0x08,0x00,0x0b,0x94,0xae,0x42,0x00,0x2c,
8160x92,0x46,0x00,0x05,0x8e,0x43,0x00,0x28,0x02,0x40,0x20,0x21,0x24,0x05,0x00,0x01,
8170x24,0x07,0x00,0x04,0xaf,0xa2,0x00,0x10,0x0c,0x00,0x09,0xea,0xaf,0xa3,0x00,0x14,
8180x08,0x00,0x0b,0x94,0xae,0x42,0x00,0x28,0x0c,0x00,0x01,0x57,0x24,0x04,0x00,0x01,
8190x08,0x00,0x0b,0x85,0x00,0x00,0x00,0x00,0x8f,0x84,0xb4,0x40,0xae,0x40,0x00,0x34,
8200x94,0x85,0x00,0x14,0x0c,0x00,0x1b,0x66,0x00,0x00,0x00,0x00,0x93,0x83,0x8b,0x71,
8210x00,0x00,0x00,0x00,0x30,0x62,0x00,0x02,0x10,0x40,0xff,0x69,0x00,0x00,0x00,0x00,
8220x0c,0x00,0x01,0x57,0x00,0x00,0x20,0x21,0x08,0x00,0x0b,0x7d,0x00,0x00,0x00,0x00,
8230x02,0x40,0x20,0x21,0x0c,0x00,0x09,0x61,0x02,0x20,0x28,0x21,0x08,0x00,0x0b,0x71,
8240x3c,0x02,0xb0,0x05,0x8e,0x42,0x00,0x3c,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0x4a,
8250x00,0x00,0x00,0x00,0x8f,0x82,0xb4,0x48,0x00,0x00,0x00,0x00,0x90,0x42,0x00,0x0a,
8260x00,0x00,0x00,0x00,0x00,0x02,0x18,0x2b,0x08,0x00,0x0b,0x6e,0xae,0x43,0x00,0x3c,
8270x8e,0x42,0x00,0x38,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0x3d,0x24,0x02,0x00,0x12,
8280x8f,0x82,0xb4,0x44,0x00,0x00,0x00,0x00,0x90,0x42,0x00,0x0a,0x00,0x00,0x00,0x00,
8290x00,0x02,0x18,0x2b,0x08,0x00,0x0b,0x6e,0xae,0x43,0x00,0x38,0x8e,0x42,0x00,0x34,
8300x00,0x00,0x00,0x00,0x14,0x40,0xff,0x30,0x24,0x02,0x00,0x11,0x8f,0x82,0xb4,0x40,
8310x00,0x00,0x00,0x00,0x90,0x42,0x00,0x0a,0x00,0x00,0x00,0x00,0x00,0x02,0x18,0x2b,
8320x08,0x00,0x0b,0x6e,0xae,0x43,0x00,0x34,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,
8330x27,0xbd,0xff,0xe0,0x34,0x63,0x00,0x20,0x24,0x42,0x31,0x08,0x3c,0x08,0xb0,0x03,
8340xaf,0xb1,0x00,0x14,0xac,0x62,0x00,0x00,0x35,0x08,0x01,0x00,0xaf,0xbf,0x00,0x18,
8350xaf,0xb0,0x00,0x10,0x91,0x03,0x00,0x00,0x00,0xa0,0x48,0x21,0x24,0x11,0x00,0x0a,
8360x2c,0xa5,0x00,0x04,0x24,0x02,0x00,0x10,0x00,0x45,0x88,0x0a,0x30,0x63,0x00,0x01,
8370x00,0xc0,0x28,0x21,0x14,0x60,0x00,0x02,0x00,0x11,0x40,0x40,0x02,0x20,0x40,0x21,
8380x84,0x83,0x00,0x0c,0x31,0x11,0x00,0xff,0x01,0x20,0x20,0x21,0x00,0x03,0x10,0xc0,
8390x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x90,0x08,0x00,0x43,0x10,0x21,
8400x84,0x43,0x00,0x04,0x24,0x06,0x00,0x0e,0x10,0xe0,0x00,0x06,0x02,0x23,0x80,0x21,
8410x02,0x00,0x10,0x21,0x8f,0xbf,0x00,0x18,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,
8420x27,0xbd,0x00,0x20,0x0c,0x00,0x08,0xe3,0x00,0x00,0x00,0x00,0x02,0x11,0x18,0x21,
8430x08,0x00,0x0c,0x64,0x00,0x62,0x80,0x21,0x27,0xbd,0xff,0xd0,0xaf,0xbf,0x00,0x28,
8440xaf,0xb4,0x00,0x20,0xaf,0xb3,0x00,0x1c,0xaf,0xb2,0x00,0x18,0xaf,0xb5,0x00,0x24,
8450xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0x84,0x82,0x00,0x0c,0x3c,0x06,0xb0,0x03,
8460x34,0xc6,0x00,0x20,0x00,0x02,0x18,0xc0,0x00,0x62,0x18,0x21,0x00,0x03,0x18,0x80,
8470x27,0x82,0x90,0x04,0x00,0x62,0x10,0x21,0x8c,0x55,0x00,0x18,0x3c,0x02,0x80,0x00,
8480x24,0x42,0x31,0xb8,0xac,0xc2,0x00,0x00,0x8e,0xb0,0x00,0x08,0x27,0x82,0x90,0x08,
8490x00,0x62,0x18,0x21,0x90,0x71,0x00,0x07,0x00,0x10,0x86,0x43,0x32,0x10,0x00,0x01,
8500x00,0xa0,0x38,0x21,0x02,0x00,0x30,0x21,0x00,0xa0,0x98,0x21,0x02,0x20,0x28,0x21,
8510x0c,0x00,0x0c,0x42,0x00,0x80,0x90,0x21,0x02,0x20,0x20,0x21,0x02,0x00,0x28,0x21,
8520x24,0x06,0x00,0x14,0x0c,0x00,0x08,0xe3,0x00,0x40,0xa0,0x21,0x86,0x43,0x00,0x0c,
8530x3c,0x09,0xb0,0x09,0x3c,0x08,0xb0,0x09,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,
8540x00,0x02,0x10,0x80,0x27,0x83,0x90,0x10,0x00,0x43,0x10,0x21,0x80,0x43,0x00,0x06,
8550x3c,0x07,0xb0,0x09,0x3c,0x05,0xb0,0x09,0x28,0x62,0x00,0x00,0x24,0x64,0x00,0x03,
8560x00,0x82,0x18,0x0b,0x00,0x03,0x18,0x83,0x3c,0x02,0xb0,0x09,0x00,0x03,0x18,0x80,
8570x34,0x42,0x01,0x02,0x35,0x29,0x01,0x10,0x35,0x08,0x01,0x14,0x34,0xe7,0x01,0x20,
8580x34,0xa5,0x01,0x24,0xa4,0x54,0x00,0x00,0x12,0x60,0x00,0x11,0x02,0xa3,0xa8,0x21,
8590x8e,0xa2,0x00,0x0c,0x8e,0xa3,0x00,0x08,0x00,0x02,0x14,0x00,0x00,0x03,0x1c,0x02,
8600x00,0x43,0x10,0x21,0xad,0x22,0x00,0x00,0x8e,0xa3,0x00,0x0c,0x00,0x00,0x00,0x00,
8610x00,0x03,0x1c,0x02,0xa5,0x03,0x00,0x00,0x8f,0xbf,0x00,0x28,0x7b,0xb4,0x01,0x3c,
8620x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x30,
8630x8e,0xa2,0x00,0x04,0x00,0x00,0x00,0x00,0xad,0x22,0x00,0x00,0x8e,0xa4,0x00,0x08,
8640x00,0x00,0x00,0x00,0xa5,0x04,0x00,0x00,0x7a,0xa2,0x00,0x7c,0x00,0x00,0x00,0x00,
8650x00,0x03,0x1c,0x00,0x00,0x02,0x14,0x02,0x00,0x62,0x18,0x21,0xac,0xe3,0x00,0x00,
8660x8e,0xa2,0x00,0x0c,0x00,0x00,0x00,0x00,0x00,0x02,0x14,0x02,0x08,0x00,0x0c,0xb6,
8670xa4,0xa2,0x00,0x00,0x27,0xbd,0xff,0xe0,0xaf,0xb2,0x00,0x18,0xaf,0xb0,0x00,0x10,
8680xaf,0xbf,0x00,0x1c,0xaf,0xb1,0x00,0x14,0x84,0x82,0x00,0x0c,0x00,0x80,0x90,0x21,
8690x3c,0x05,0xb0,0x03,0x00,0x02,0x20,0xc0,0x00,0x82,0x20,0x21,0x00,0x04,0x20,0x80,
8700x27,0x82,0x90,0x04,0x00,0x82,0x10,0x21,0x8c,0x51,0x00,0x18,0x3c,0x02,0x80,0x00,
8710x34,0xa5,0x00,0x20,0x24,0x42,0x33,0x34,0x27,0x83,0x90,0x08,0xac,0xa2,0x00,0x00,
8720x00,0x83,0x20,0x21,0x3c,0x02,0xb0,0x03,0x90,0x86,0x00,0x07,0x34,0x42,0x01,0x00,
8730x8e,0x23,0x00,0x08,0x90,0x44,0x00,0x00,0x2c,0xc5,0x00,0x04,0x24,0x02,0x00,0x10,
8740x24,0x10,0x00,0x0a,0x00,0x45,0x80,0x0a,0x00,0x03,0x1e,0x43,0x30,0x84,0x00,0x01,
8750x30,0x65,0x00,0x01,0x14,0x80,0x00,0x02,0x00,0x10,0x10,0x40,0x02,0x00,0x10,0x21,
8760x00,0xc0,0x20,0x21,0x24,0x06,0x00,0x20,0x0c,0x00,0x08,0xe3,0x30,0x50,0x00,0xff,
8770x86,0x44,0x00,0x0c,0x27,0x85,0x90,0x10,0x3c,0x06,0xb0,0x09,0x00,0x04,0x18,0xc0,
8780x00,0x64,0x18,0x21,0x00,0x03,0x18,0x80,0x00,0x65,0x18,0x21,0x80,0x64,0x00,0x06,
8790x00,0x50,0x10,0x21,0x34,0xc6,0x01,0x02,0x24,0x85,0x00,0x03,0x28,0x83,0x00,0x00,
8800x00,0xa3,0x20,0x0b,0x00,0x04,0x20,0x83,0x00,0x04,0x20,0x80,0xa4,0xc2,0x00,0x00,
8810x02,0x24,0x20,0x21,0x8c,0x83,0x00,0x04,0x3c,0x02,0xb0,0x09,0x34,0x42,0x01,0x10,
8820xac,0x43,0x00,0x00,0x8c,0x86,0x00,0x08,0x3c,0x02,0xb0,0x09,0x34,0x42,0x01,0x14,
8830xa4,0x46,0x00,0x00,0x8c,0x85,0x00,0x0c,0x8c,0x82,0x00,0x08,0x3c,0x06,0xb0,0x09,
8840x00,0x05,0x2c,0x00,0x00,0x02,0x14,0x02,0x00,0xa2,0x28,0x21,0x34,0xc6,0x01,0x20,
8850xac,0xc5,0x00,0x00,0x8c,0x83,0x00,0x0c,0x3c,0x05,0xb0,0x09,0x34,0xa5,0x01,0x24,
8860x00,0x03,0x1c,0x02,0xa4,0xa3,0x00,0x00,0x92,0x42,0x00,0x0a,0x3c,0x03,0xb0,0x09,
8870x34,0x63,0x01,0x30,0x00,0x02,0x13,0x00,0x24,0x42,0x00,0x04,0x30,0x42,0xff,0xff,
8880xa4,0x62,0x00,0x00,0x86,0x44,0x00,0x0c,0x27,0x83,0x90,0x18,0x8f,0xbf,0x00,0x1c,
8890x00,0x04,0x10,0xc0,0x00,0x44,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,
8900x94,0x44,0x00,0x02,0x8f,0xb2,0x00,0x18,0x7b,0xb0,0x00,0xbc,0x3c,0x05,0xb0,0x09,
8910x34,0xa5,0x01,0x32,0xa4,0xa4,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,
8920x27,0xbd,0xff,0xe0,0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x00,0xaf,0xb0,0x00,0x10,
8930x34,0x42,0x00,0x20,0x00,0xa0,0x80,0x21,0x24,0x63,0x34,0xc0,0x00,0x05,0x2c,0x43,
8940xaf,0xb1,0x00,0x14,0xaf,0xbf,0x00,0x18,0xac,0x43,0x00,0x00,0x10,0xa0,0x00,0x05,
8950x00,0x80,0x88,0x21,0x8c,0x82,0x00,0x34,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0xb6,
8960x00,0x00,0x00,0x00,0x32,0x10,0x00,0xff,0x12,0x00,0x00,0x4c,0x00,0x00,0x10,0x21,
8970x24,0x02,0x00,0x08,0x12,0x02,0x00,0xa3,0x2a,0x02,0x00,0x09,0x10,0x40,0x00,0x89,
8980x24,0x02,0x00,0x40,0x24,0x04,0x00,0x02,0x12,0x04,0x00,0x79,0x2a,0x02,0x00,0x03,
8990x10,0x40,0x00,0x69,0x24,0x02,0x00,0x04,0x24,0x02,0x00,0x01,0x12,0x02,0x00,0x5a,
9000x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x05,0x34,0x42,0x00,0x08,0x3c,0x03,0x80,0x00,
9010xa2,0x20,0x00,0x4e,0xac,0x43,0x00,0x00,0x82,0x24,0x00,0x11,0x92,0x27,0x00,0x11,
9020x10,0x80,0x00,0x4e,0x00,0x00,0x00,0x00,0x92,0x26,0x00,0x0a,0x24,0x02,0x00,0x12,
9030x10,0x46,0x00,0x09,0x30,0xc2,0x00,0xff,0x27,0x83,0xb4,0x00,0x00,0x02,0x10,0x80,
9040x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,0x94,0x83,0x00,0x14,
9050x00,0x00,0x00,0x00,0xa6,0x23,0x00,0x0c,0x3c,0x02,0xb0,0x09,0x34,0x42,0x00,0x40,
9060x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x03,0xa2,0x23,0x00,0x10,
9070x14,0x60,0x00,0x2b,0x30,0x65,0x00,0x01,0x30,0xc2,0x00,0xff,0x27,0x83,0xb4,0x00,
9080x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,0x82,0x23,0x00,0x12,
9090x90,0x82,0x00,0x16,0x00,0x00,0x00,0x00,0x00,0x02,0x11,0x42,0x30,0x42,0x00,0x01,
9100x00,0x62,0x18,0x21,0x00,0x03,0x26,0x00,0x14,0x80,0x00,0x18,0xa2,0x23,0x00,0x12,
9110x00,0x07,0x16,0x00,0x14,0x40,0x00,0x11,0x24,0x02,0x00,0x01,0x96,0x23,0x00,0x0c,
9120x27,0x84,0x90,0x10,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,
9130x00,0x44,0x10,0x21,0x80,0x45,0x00,0x06,0x00,0x03,0x1a,0x00,0x3c,0x02,0xb0,0x00,
9140x00,0x65,0x18,0x21,0x00,0x62,0x18,0x21,0x90,0x64,0x00,0x00,0x90,0x62,0x00,0x04,
9150xa2,0x20,0x00,0x15,0xa3,0x80,0x8b,0xd4,0x24,0x02,0x00,0x01,0x8f,0xbf,0x00,0x18,
9160x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x0c,0x00,0x0c,0xcd,
9170x02,0x20,0x20,0x21,0x92,0x27,0x00,0x11,0x08,0x00,0x0d,0x7d,0x00,0x07,0x16,0x00,
9180x0c,0x00,0x0c,0x6e,0x02,0x20,0x20,0x21,0x86,0x23,0x00,0x0c,0x27,0x84,0x90,0x08,
9190x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x44,0x20,0x21,
9200x90,0x85,0x00,0x07,0x27,0x83,0x90,0x10,0x00,0x43,0x10,0x21,0xa2,0x25,0x00,0x13,
9210x90,0x83,0x00,0x07,0x08,0x00,0x0d,0x95,0xa0,0x43,0x00,0x02,0x92,0x26,0x00,0x0a,
9220x08,0x00,0x0d,0x5e,0x30,0xc2,0x00,0xff,0x8e,0x22,0x00,0x24,0x00,0x00,0x00,0x00,
9230x10,0x50,0x00,0x07,0xa2,0x20,0x00,0x08,0x24,0x02,0x00,0x07,0xa2,0x22,0x00,0x0a,
9240x92,0x22,0x00,0x27,0xae,0x20,0x00,0x24,0x08,0x00,0x0d,0x51,0xa2,0x22,0x00,0x04,
9250x08,0x00,0x0d,0xaf,0x24,0x02,0x00,0x06,0x16,0x02,0xff,0x9b,0x3c,0x02,0xb0,0x05,
9260x8e,0x23,0x00,0x2c,0x24,0x02,0x00,0x01,0x10,0x62,0x00,0x07,0xa2,0x24,0x00,0x08,
9270x24,0x02,0x00,0x03,0xa2,0x22,0x00,0x0a,0x92,0x22,0x00,0x2f,0xae,0x20,0x00,0x2c,
9280x08,0x00,0x0d,0x51,0xa2,0x22,0x00,0x06,0x08,0x00,0x0d,0xbe,0xa2,0x20,0x00,0x0a,
9290x8e,0x22,0x00,0x28,0x24,0x03,0x00,0x01,0x24,0x04,0x00,0x01,0x10,0x44,0x00,0x07,
9300xa2,0x23,0x00,0x08,0x24,0x02,0x00,0x05,0xa2,0x22,0x00,0x0a,0x92,0x22,0x00,0x2b,
9310xae,0x20,0x00,0x28,0x08,0x00,0x0d,0x51,0xa2,0x22,0x00,0x05,0x08,0x00,0x0d,0xca,
9320x24,0x02,0x00,0x04,0x12,0x02,0x00,0x12,0x2a,0x02,0x00,0x41,0x10,0x40,0x00,0x09,
9330x24,0x02,0x00,0x80,0x24,0x02,0x00,0x20,0x16,0x02,0xff,0x7b,0x3c,0x02,0xb0,0x05,
9340x24,0x02,0x00,0x12,0xa2,0x22,0x00,0x0a,0xa2,0x22,0x00,0x08,0x08,0x00,0x0d,0x51,
9350xae,0x20,0x00,0x3c,0x16,0x02,0xff,0x74,0x3c,0x02,0xb0,0x05,0x24,0x02,0x00,0x10,
9360xa2,0x22,0x00,0x0a,0xa2,0x22,0x00,0x08,0x08,0x00,0x0d,0x51,0xae,0x20,0x00,0x34,
9370x24,0x02,0x00,0x11,0xa2,0x22,0x00,0x0a,0xa2,0x22,0x00,0x08,0x08,0x00,0x0d,0x51,
9380xae,0x20,0x00,0x38,0x8e,0x24,0x00,0x30,0x24,0x02,0x00,0x03,0x24,0x03,0x00,0x01,
9390x10,0x83,0x00,0x07,0xa2,0x22,0x00,0x08,0x24,0x02,0x00,0x02,0xa2,0x22,0x00,0x0a,
9400x92,0x22,0x00,0x33,0xae,0x20,0x00,0x30,0x08,0x00,0x0d,0x51,0xa2,0x22,0x00,0x07,
9410x08,0x00,0x0d,0xf0,0xa2,0x24,0x00,0x0a,0x8f,0x84,0xb4,0x40,0xae,0x20,0x00,0x34,
9420x94,0x85,0x00,0x14,0x0c,0x00,0x1b,0x66,0x32,0x10,0x00,0xff,0x08,0x00,0x0d,0x42,
9430x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x24,0x42,0x37,0xf4,
9440x34,0x63,0x00,0x20,0xac,0x62,0x00,0x00,0x80,0xa2,0x00,0x15,0x3c,0x06,0xb0,0x05,
9450x10,0x40,0x00,0x0a,0x34,0xc6,0x02,0x54,0x83,0x83,0x8b,0xd4,0x00,0x00,0x00,0x00,
9460xac,0x83,0x00,0x24,0x8c,0xc2,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x17,0x42,
9470x30,0x42,0x00,0x01,0x03,0xe0,0x00,0x08,0xac,0x82,0x00,0x28,0x8c,0x82,0x00,0x2c,
9480x3c,0x06,0xb0,0x05,0x34,0xc6,0x04,0x50,0x00,0x02,0x18,0x43,0x30,0x63,0x00,0x01,
9490x10,0x40,0x00,0x04,0x30,0x45,0x00,0x01,0xac,0x83,0x00,0x28,0x03,0xe0,0x00,0x08,
9500xac,0x85,0x00,0x24,0x90,0xc2,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,
9510x30,0x43,0x00,0x02,0x30,0x42,0x00,0x01,0xac,0x83,0x00,0x28,0x03,0xe0,0x00,0x08,
9520xac,0x82,0x00,0x24,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x27,0xbd,0xff,0xd8,
9530x34,0x63,0x00,0x20,0x24,0x42,0x38,0x84,0xac,0x62,0x00,0x00,0xaf,0xb1,0x00,0x1c,
9540xaf,0xbf,0x00,0x20,0xaf,0xb0,0x00,0x18,0x90,0xa6,0x00,0x0a,0x27,0x83,0xb4,0x00,
9550x00,0xa0,0x88,0x21,0x00,0x06,0x10,0x80,0x00,0x43,0x10,0x21,0x8c,0x50,0x00,0x00,
9560x80,0xa5,0x00,0x11,0x92,0x03,0x00,0x12,0x10,0xa0,0x00,0x04,0xa2,0x20,0x00,0x15,
9570x24,0x02,0x00,0x12,0x10,0xc2,0x00,0xda,0x00,0x00,0x00,0x00,0x82,0x22,0x00,0x12,
9580x00,0x00,0x00,0x00,0x10,0x40,0x00,0x67,0x00,0x00,0x00,0x00,0xa2,0x20,0x00,0x12,
9590xa2,0x00,0x00,0x19,0x86,0x23,0x00,0x0c,0x00,0x00,0x00,0x00,0x00,0x03,0x10,0xc0,
9600x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x90,0x20,0x00,0x43,0x10,0x21,
9610xa0,0x40,0x00,0x00,0x92,0x03,0x00,0x16,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0xdf,
9620xa2,0x03,0x00,0x16,0x82,0x02,0x00,0x12,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x20,
9630x00,0x00,0x00,0x00,0x92,0x23,0x00,0x08,0x00,0x00,0x00,0x00,0x14,0x60,0x00,0x45,
9640x24,0x02,0x00,0x01,0xa2,0x20,0x00,0x04,0x92,0x08,0x00,0x04,0x00,0x00,0x00,0x00,
9650x15,0x00,0x00,0x1e,0x24,0x02,0x00,0x01,0x92,0x07,0x00,0x0a,0xa2,0x02,0x00,0x17,
9660x92,0x02,0x00,0x16,0x30,0xe3,0x00,0xff,0x30,0x42,0x00,0xe4,0x10,0x60,0x00,0x03,
9670xa2,0x02,0x00,0x16,0x34,0x42,0x00,0x01,0xa2,0x02,0x00,0x16,0x11,0x00,0x00,0x05,
9680x00,0x00,0x00,0x00,0x92,0x02,0x00,0x16,0x00,0x00,0x00,0x00,0x34,0x42,0x00,0x02,
9690xa2,0x02,0x00,0x16,0x92,0x02,0x00,0x17,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x08,
9700x00,0x00,0x00,0x00,0x96,0x02,0x00,0x06,0x00,0x00,0x00,0x00,0xa6,0x02,0x00,0x14,
9710x8f,0xbf,0x00,0x20,0x7b,0xb0,0x00,0xfc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x28,
9720x96,0x02,0x00,0x00,0x08,0x00,0x0e,0x6c,0xa6,0x02,0x00,0x14,0x92,0x07,0x00,0x0a,
9730x00,0x00,0x00,0x00,0x14,0xe0,0x00,0x03,0x00,0x00,0x00,0x00,0x08,0x00,0x0e,0x58,
9740xa2,0x00,0x00,0x17,0x96,0x04,0x00,0x00,0x96,0x05,0x00,0x06,0x27,0x86,0x90,0x00,
9750x00,0x04,0x18,0xc0,0x00,0x64,0x18,0x21,0x00,0x05,0x10,0xc0,0x00,0x45,0x10,0x21,
9760x00,0x03,0x18,0x80,0x00,0x66,0x18,0x21,0x00,0x02,0x10,0x80,0x00,0x46,0x10,0x21,
9770x8c,0x66,0x00,0x08,0x8c,0x45,0x00,0x08,0x3c,0x03,0x80,0x00,0x00,0xc3,0x20,0x24,
9780x10,0x80,0x00,0x08,0x00,0xa3,0x10,0x24,0x10,0x40,0x00,0x04,0x00,0x00,0x18,0x21,
9790x10,0x80,0x00,0x02,0x24,0x03,0x00,0x01,0x00,0xa6,0x18,0x2b,0x08,0x00,0x0e,0x58,
9800xa2,0x03,0x00,0x17,0x10,0x40,0xff,0xfd,0x00,0xa6,0x18,0x2b,0x08,0x00,0x0e,0x8c,
9810x00,0x00,0x00,0x00,0x10,0x62,0x00,0x09,0x24,0x02,0x00,0x02,0x10,0x62,0x00,0x05,
9820x24,0x02,0x00,0x03,0x14,0x62,0xff,0xb8,0x00,0x00,0x00,0x00,0x08,0x00,0x0e,0x52,
9830xa2,0x20,0x00,0x07,0x08,0x00,0x0e,0x52,0xa2,0x20,0x00,0x06,0x08,0x00,0x0e,0x52,
9840xa2,0x20,0x00,0x05,0x82,0x22,0x00,0x10,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x69,
9850x2c,0x62,0x00,0x02,0x10,0x40,0x00,0x49,0x3c,0x02,0xb0,0x09,0x92,0x25,0x00,0x08,
9860x00,0x00,0x00,0x00,0x30,0xa6,0x00,0xff,0x2c,0xc2,0x00,0x04,0x10,0x40,0x00,0x3b,
9870x2c,0xc2,0x00,0x10,0x3c,0x04,0xb0,0x05,0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,
9880x24,0x02,0x00,0x01,0x00,0xc2,0x10,0x04,0x00,0x02,0x10,0x27,0x00,0x62,0x18,0x24,
9890xa0,0x83,0x00,0x00,0x86,0x23,0x00,0x0c,0x96,0x26,0x00,0x0c,0x00,0x03,0x10,0xc0,
9900x00,0x43,0x10,0x21,0x00,0x02,0x28,0x80,0x27,0x83,0x90,0x04,0x00,0xa3,0x18,0x21,
9910x8c,0x64,0x00,0x18,0x00,0x00,0x00,0x00,0x8c,0x82,0x00,0x04,0x00,0x00,0x00,0x00,
9920x30,0x42,0x00,0x10,0x10,0x40,0x00,0x18,0x24,0x07,0x00,0x01,0x93,0x82,0x8b,0x71,
9930x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,0x14,0x40,0x00,0x0a,0x24,0x05,0x00,0x24,
9940x00,0x06,0x2c,0x00,0x00,0x05,0x2c,0x03,0x0c,0x00,0x1b,0x66,0x02,0x00,0x20,0x21,
9950x92,0x02,0x00,0x16,0xa2,0x00,0x00,0x12,0x30,0x42,0x00,0xe7,0x08,0x00,0x0e,0x49,
9960xa2,0x02,0x00,0x16,0xf0,0xc5,0x00,0x06,0x00,0x00,0x28,0x12,0x27,0x82,0x90,0x00,
9970x00,0xa2,0x28,0x21,0x0c,0x00,0x01,0x49,0x3c,0x04,0x00,0x80,0x96,0x26,0x00,0x0c,
9980x08,0x00,0x0e,0xc9,0x00,0x06,0x2c,0x00,0x27,0x83,0x90,0x10,0x27,0x82,0x90,0x18,
9990x00,0xa2,0x10,0x21,0x00,0xa3,0x18,0x21,0x90,0x44,0x00,0x00,0x90,0x65,0x00,0x05,
10000x93,0x82,0x80,0x10,0x00,0x00,0x30,0x21,0x0c,0x00,0x21,0x9a,0xaf,0xa2,0x00,0x10,
10010x96,0x26,0x00,0x0c,0x08,0x00,0x0e,0xc3,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0xcd,
10020x3c,0x04,0xb0,0x05,0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,0x30,0xa5,0x00,0x0f,
10030x24,0x02,0x00,0x80,0x08,0x00,0x0e,0xb2,0x00,0xa2,0x10,0x07,0x86,0x26,0x00,0x0c,
10040x3c,0x03,0xb0,0x09,0x34,0x42,0x01,0x72,0x34,0x63,0x01,0x78,0x94,0x47,0x00,0x00,
10050x8c,0x65,0x00,0x00,0x00,0x06,0x10,0xc0,0x00,0x46,0x10,0x21,0x3c,0x04,0xb0,0x09,
10060xae,0x25,0x00,0x1c,0x34,0x84,0x01,0x7c,0x27,0x83,0x90,0x04,0x00,0x02,0x10,0x80,
10070x8c,0x85,0x00,0x00,0x00,0x43,0x10,0x21,0x8c,0x43,0x00,0x18,0xae,0x25,0x00,0x20,
10080xa6,0x27,0x00,0x18,0x8c,0x66,0x00,0x08,0x02,0x20,0x20,0x21,0x0c,0x00,0x0f,0x19,
10090x00,0x00,0x28,0x21,0x86,0x25,0x00,0x18,0x8e,0x26,0x00,0x1c,0x8e,0x27,0x00,0x20,
10100x02,0x20,0x20,0x21,0x0c,0x00,0x1c,0x68,0xaf,0xa2,0x00,0x10,0x08,0x00,0x0e,0x49,
10110xa2,0x02,0x00,0x12,0x92,0x22,0x00,0x08,0x08,0x00,0x0e,0x49,0xa2,0x22,0x00,0x09,
10120xa2,0x20,0x00,0x11,0x80,0x82,0x00,0x50,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x03,
10130x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0xd0,0xac,0x40,0x00,0x00,0x08,0x00,0x0e,0x49,
10140xa0,0x80,0x00,0x50,0x94,0x8a,0x00,0x0c,0x24,0x03,0x00,0x24,0x00,0x80,0x70,0x21,
10150x3c,0x02,0x80,0x00,0x3c,0x04,0xb0,0x03,0x24,0x42,0x3c,0x64,0xf1,0x43,0x00,0x06,
10160x34,0x84,0x00,0x20,0x00,0x00,0x18,0x12,0x00,0xa0,0x68,0x21,0xac,0x82,0x00,0x00,
10170x27,0x85,0x90,0x10,0x27,0x82,0x90,0x0f,0x27,0xbd,0xff,0xf8,0x00,0x62,0x60,0x21,
10180x00,0x65,0x58,0x21,0x00,0x00,0xc0,0x21,0x11,0xa0,0x00,0xcc,0x00,0x00,0x78,0x21,
10190x00,0x0a,0x1c,0x00,0x00,0x03,0x1c,0x03,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,
10200x00,0x02,0x10,0x80,0x00,0x45,0x10,0x21,0x91,0x87,0x00,0x00,0x80,0x48,0x00,0x04,
10210x03,0xa0,0x60,0x21,0x00,0x0a,0x1c,0x00,0x00,0x03,0x1c,0x03,0x00,0x03,0x10,0xc0,
10220x00,0x43,0x10,0x21,0x00,0x02,0x48,0x80,0x27,0x83,0x90,0x04,0xa3,0xa7,0x00,0x00,
10230x01,0x23,0x18,0x21,0x8c,0x64,0x00,0x18,0x25,0x02,0xff,0xff,0x00,0x48,0x40,0x0b,
10240x8c,0x83,0x00,0x04,0x2d,0x05,0x00,0x07,0x24,0x02,0x00,0x06,0x30,0x63,0x00,0x08,
10250x14,0x60,0x00,0x35,0x00,0x45,0x40,0x0a,0x93,0xa7,0x00,0x00,0x27,0x82,0x90,0x18,
10260x01,0x22,0x10,0x21,0x30,0xe3,0x00,0xf0,0x38,0x63,0x00,0x50,0x30,0xe5,0x00,0xff,
10270x00,0x05,0x20,0x2b,0x00,0x03,0x18,0x2b,0x00,0x64,0x18,0x24,0x90,0x49,0x00,0x00,
10280x10,0x60,0x00,0x16,0x30,0xe4,0x00,0x0f,0x24,0x02,0x00,0x04,0x10,0xa2,0x00,0x9d,
10290x00,0x00,0x00,0x00,0x11,0xa0,0x00,0x3a,0x2c,0xa2,0x00,0x0c,0x10,0x40,0x00,0x02,
10300x24,0x84,0x00,0x0c,0x00,0xe0,0x20,0x21,0x30,0x84,0x00,0xff,0x00,0x04,0x10,0x40,
10310x27,0x83,0xbb,0x1c,0x00,0x44,0x10,0x21,0x00,0x43,0x10,0x21,0x90,0x47,0x00,0x00,
10320x00,0x00,0x00,0x00,0x2c,0xe3,0x00,0x0c,0xa3,0xa7,0x00,0x00,0x10,0x60,0x00,0x02,
10330x24,0xe2,0x00,0x04,0x00,0xe0,0x10,0x21,0xa3,0xa2,0x00,0x00,0x91,0x65,0x00,0x00,
10340x91,0x82,0x00,0x00,0x30,0xa3,0x00,0xff,0x00,0x62,0x10,0x2b,0x10,0x40,0x00,0x0e,
10350x2c,0x62,0x00,0x0c,0x14,0x40,0x00,0x03,0x00,0x60,0x20,0x21,0x30,0xa2,0x00,0x0f,
10360x24,0x44,0x00,0x0c,0x00,0x04,0x10,0x40,0x00,0x44,0x20,0x21,0x27,0x83,0xbb,0x1c,
10370x00,0x83,0x18,0x21,0x90,0x62,0x00,0x02,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x05,
10380x00,0x09,0x11,0x00,0xa1,0x85,0x00,0x00,0x93,0xa2,0x00,0x00,0x03,0xe0,0x00,0x08,
10390x27,0xbd,0x00,0x08,0x00,0x49,0x10,0x23,0x00,0x02,0x10,0x80,0x00,0x49,0x10,0x23,
10400x00,0x02,0x10,0x80,0x00,0x44,0x10,0x21,0x27,0x83,0xb4,0xa8,0x00,0x43,0x10,0x21,
10410x90,0x44,0x00,0x00,0x00,0x00,0x00,0x00,0x2c,0x83,0x00,0x0c,0x14,0x60,0x00,0x06,
10420x00,0x80,0x10,0x21,0x00,0x18,0x10,0x40,0x00,0x4f,0x10,0x21,0x00,0x02,0x11,0x00,
10430x00,0x82,0x10,0x21,0x24,0x42,0x00,0x04,0x08,0x00,0x0f,0x7a,0xa1,0x82,0x00,0x00,
10440x8f,0x8d,0x81,0x5c,0x00,0x00,0x00,0x00,0x01,0xa8,0x10,0x21,0x90,0x43,0x00,0x00,
10450x00,0x00,0x00,0x00,0x10,0x60,0xff,0xd1,0x00,0x00,0x28,0x21,0x00,0x06,0x74,0x82,
10460x30,0xe2,0x00,0xff,0x2c,0x42,0x00,0x0c,0x14,0x40,0x00,0x03,0x00,0xe0,0x10,0x21,
10470x30,0xe2,0x00,0x0f,0x24,0x42,0x00,0x0c,0x30,0x44,0x00,0xff,0xa3,0xa2,0x00,0x00,
10480x24,0x02,0x00,0x0c,0x10,0x82,0x00,0x0d,0x00,0x09,0x11,0x00,0x00,0x49,0x10,0x23,
10490x00,0x02,0x10,0x80,0x00,0x04,0x18,0x40,0x00,0x49,0x10,0x23,0x00,0x64,0x18,0x21,
10500x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x27,0x84,0xb4,0xa8,0x00,0x44,0x10,0x21,
10510x90,0x47,0x00,0x00,0x00,0x00,0x00,0x00,0xa3,0xa7,0x00,0x00,0x00,0x0a,0x1c,0x00,
10520x00,0x03,0x1c,0x03,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,
10530x27,0x83,0x90,0x04,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x18,0x00,0x00,0x00,0x00,
10540x8c,0x83,0x00,0x04,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x10,0x14,0x60,0x00,0x33,
10550x00,0x06,0x14,0x42,0x00,0x09,0x11,0x00,0x00,0x49,0x10,0x23,0x00,0x02,0x10,0x80,
10560x00,0x49,0x10,0x23,0x27,0x83,0xb5,0x78,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,
10570x90,0x44,0x00,0x04,0x90,0x43,0x00,0x05,0x00,0x00,0x00,0x00,0x00,0x64,0xc0,0x24,
10580x93,0xa7,0x00,0x00,0x00,0x00,0x00,0x00,0x2c,0xe2,0x00,0x0f,0x10,0x40,0x00,0x0f,
10590x31,0xcf,0x00,0x01,0x00,0x0a,0x1c,0x00,0x00,0x03,0x1c,0x03,0x00,0x03,0x10,0xc0,
10600x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x84,0x90,0x00,0x00,0x44,0x10,0x21,
10610x84,0x43,0x00,0x06,0x00,0x00,0x00,0x00,0x28,0x63,0x06,0x41,0x14,0x60,0x00,0x04,
10620x30,0xe2,0x00,0xff,0x24,0x07,0x00,0x0f,0xa3,0xa7,0x00,0x00,0x30,0xe2,0x00,0xff,
10630x2c,0x42,0x00,0x0c,0x14,0x40,0x00,0x06,0x00,0xe0,0x10,0x21,0x00,0x18,0x10,0x40,
10640x00,0x4f,0x10,0x21,0x00,0x02,0x11,0x00,0x00,0x47,0x10,0x21,0x24,0x42,0x00,0x04,
10650xa3,0xa2,0x00,0x00,0x00,0x40,0x38,0x21,0x01,0xa8,0x10,0x21,0x90,0x43,0x00,0x00,
10660x24,0xa4,0x00,0x01,0x30,0x85,0xff,0xff,0x00,0xa3,0x18,0x2b,0x14,0x60,0xff,0xad,
10670x30,0xe2,0x00,0xff,0x08,0x00,0x0f,0x67,0x00,0x00,0x00,0x00,0x08,0x00,0x0f,0xc8,
10680x30,0x58,0x00,0x01,0x81,0xc2,0x00,0x48,0x00,0x00,0x00,0x00,0x10,0x40,0xff,0x73,
10690x00,0x00,0x00,0x00,0x08,0x00,0x0f,0x55,0x00,0x00,0x00,0x00,0x00,0x0a,0x1c,0x00,
10700x00,0x03,0x1c,0x03,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,
10710x00,0x45,0x10,0x21,0x80,0x48,0x00,0x05,0x91,0x67,0x00,0x00,0x08,0x00,0x0f,0x35,
10720x03,0xa0,0x58,0x21,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,
10730x24,0x42,0x40,0x04,0x03,0xe0,0x00,0x08,0xac,0x62,0x00,0x00,0x27,0xbd,0xff,0xc0,
10740xaf,0xb7,0x00,0x34,0xaf,0xb6,0x00,0x30,0xaf,0xb5,0x00,0x2c,0xaf,0xb4,0x00,0x28,
10750xaf,0xb3,0x00,0x24,0xaf,0xb2,0x00,0x20,0xaf,0xbf,0x00,0x3c,0xaf,0xbe,0x00,0x38,
10760xaf,0xb1,0x00,0x1c,0xaf,0xb0,0x00,0x18,0x84,0x82,0x00,0x0c,0x27,0x93,0x90,0x04,
10770x3c,0x05,0xb0,0x03,0x00,0x02,0x18,0xc0,0x00,0x62,0x18,0x21,0x00,0x03,0x18,0x80,
10780x00,0x73,0x10,0x21,0x8c,0x5e,0x00,0x18,0x3c,0x02,0x80,0x00,0x34,0xa5,0x00,0x20,
10790x24,0x42,0x40,0x1c,0xac,0xa2,0x00,0x00,0x8f,0xd0,0x00,0x08,0x27,0x95,0x90,0x10,
10800x00,0x75,0x18,0x21,0x00,0x00,0x28,0x21,0x02,0x00,0x30,0x21,0x90,0x71,0x00,0x00,
10810x0c,0x00,0x0f,0x19,0x00,0x80,0xb0,0x21,0x00,0x40,0x90,0x21,0x00,0x10,0x14,0x42,
10820x30,0x54,0x00,0x01,0x02,0x40,0x20,0x21,0x00,0x10,0x14,0x82,0x02,0x80,0x28,0x21,
10830x12,0x51,0x00,0x23,0x00,0x10,0xbf,0xc2,0x86,0xc3,0x00,0x0c,0x30,0x50,0x00,0x01,
10840x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x55,0x10,0x21,
10850xa0,0x52,0x00,0x00,0x86,0xc3,0x00,0x0c,0x00,0x00,0x00,0x00,0x00,0x03,0x10,0xc0,
10860x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x53,0x30,0x21,0x8c,0xc7,0x00,0x18,
10870x27,0x83,0x90,0x00,0x00,0x43,0x10,0x21,0x8c,0xe3,0x00,0x04,0x84,0x46,0x00,0x06,
10880x00,0x03,0x19,0x42,0x0c,0x00,0x08,0xe3,0x30,0x73,0x00,0x01,0x00,0x40,0x88,0x21,
10890x02,0x40,0x20,0x21,0x02,0x80,0x28,0x21,0x16,0xe0,0x00,0x10,0x02,0x00,0x30,0x21,
10900x86,0xc2,0x00,0x0c,0x00,0x00,0x00,0x00,0x00,0x02,0x18,0xc0,0x00,0x62,0x18,0x21,
10910x00,0x03,0x18,0x80,0x27,0x82,0x90,0x08,0x00,0x62,0x18,0x21,0xa4,0x71,0x00,0x04,
10920x7b,0xbe,0x01,0xfc,0x7b,0xb6,0x01,0xbc,0x7b,0xb4,0x01,0x7c,0x7b,0xb2,0x01,0x3c,
10930x7b,0xb0,0x00,0xfc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x40,0x86,0xc3,0x00,0x0c,
10940xaf,0xb3,0x00,0x10,0xaf,0xa0,0x00,0x14,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,
10950x00,0x02,0x10,0x80,0x00,0x55,0x10,0x21,0x80,0x47,0x00,0x06,0x00,0x00,0x00,0x00,
10960x24,0xe7,0x00,0x02,0x00,0x07,0x17,0xc2,0x00,0xe2,0x38,0x21,0x00,0x07,0x38,0x43,
10970x00,0x07,0x38,0x40,0x0c,0x00,0x09,0x0a,0x03,0xc7,0x38,0x21,0x08,0x00,0x10,0x48,
10980x02,0x22,0x88,0x21,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x27,0xbd,0xff,0xd0,
10990x34,0x63,0x00,0x20,0x24,0x42,0x41,0xa4,0xaf,0xb2,0x00,0x20,0xac,0x62,0x00,0x00,
11000xaf,0xbf,0x00,0x28,0xaf,0xb3,0x00,0x24,0xaf,0xb1,0x00,0x1c,0xaf,0xb0,0x00,0x18,
11010x3c,0x02,0xb0,0x03,0x90,0x83,0x00,0x0a,0x34,0x42,0x01,0x04,0x94,0x45,0x00,0x00,
11020x00,0x03,0x18,0x80,0x27,0x82,0xb4,0x00,0x00,0x62,0x18,0x21,0x30,0xa6,0xff,0xff,
11030x8c,0x71,0x00,0x00,0x80,0x85,0x00,0x12,0x30,0xc9,0x00,0xff,0x00,0x06,0x32,0x02,
11040xa4,0x86,0x00,0x44,0xa4,0x89,0x00,0x46,0x82,0x22,0x00,0x12,0x00,0x80,0x90,0x21,
11050x10,0xa0,0x00,0x1b,0xa0,0x80,0x00,0x15,0x00,0xc5,0x10,0x2a,0x10,0x40,0x00,0x14,
11060x00,0x00,0x00,0x00,0xa2,0x20,0x00,0x19,0x84,0x83,0x00,0x0c,0x00,0x00,0x00,0x00,
11070x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x90,0x20,
11080x00,0x43,0x10,0x21,0xa0,0x40,0x00,0x00,0xa0,0x80,0x00,0x12,0x92,0x22,0x00,0x16,
11090x00,0x00,0x00,0x00,0x30,0x42,0x00,0xdf,0xa2,0x22,0x00,0x16,0x8f,0xbf,0x00,0x28,
11100x7b,0xb2,0x01,0x3c,0x7b,0xb0,0x00,0xfc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x30,
11110x0c,0x00,0x10,0x01,0x00,0x00,0x00,0x00,0x08,0x00,0x10,0x97,0x00,0x00,0x00,0x00,
11120x28,0x42,0x00,0x02,0x10,0x40,0x01,0x76,0x00,0x00,0x28,0x21,0x94,0x87,0x00,0x0c,
11130x00,0x00,0x00,0x00,0x00,0xe0,0x10,0x21,0x00,0x02,0x14,0x00,0x00,0x02,0x14,0x03,
11140x00,0x07,0x24,0x00,0x00,0x04,0x24,0x03,0x00,0x02,0x18,0xc0,0x00,0x62,0x18,0x21,
11150x00,0x04,0x28,0xc0,0x00,0xa4,0x28,0x21,0x27,0x82,0x90,0x20,0x00,0x03,0x18,0x80,
11160x00,0x62,0x18,0x21,0x00,0x05,0x28,0x80,0x27,0x82,0x90,0x08,0x00,0xa2,0x10,0x21,
11170x8c,0x68,0x00,0x00,0x80,0x44,0x00,0x06,0x27,0x82,0x90,0x10,0x00,0x08,0x1d,0x02,
11180x00,0xa2,0x28,0x21,0x38,0x84,0x00,0x00,0x30,0x63,0x00,0x01,0x01,0x24,0x30,0x0b,
11190x80,0xaa,0x00,0x04,0x80,0xa9,0x00,0x05,0x10,0x60,0x00,0x02,0x00,0x08,0x14,0x02,
11200x30,0x46,0x00,0x0f,0x15,0x20,0x00,0x28,0x01,0x49,0x10,0x21,0x15,0x40,0x00,0x11,
11210x30,0xe3,0xff,0xff,0x92,0x45,0x00,0x08,0x00,0x00,0x00,0x00,0x30,0xa8,0x00,0xff,
11220x2d,0x02,0x00,0x04,0x10,0x40,0x01,0x46,0x2d,0x02,0x00,0x10,0x3c,0x04,0xb0,0x05,
11230x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,0x24,0x02,0x00,0x01,0x01,0x02,0x10,0x04,
11240x00,0x62,0x18,0x25,0xa0,0x83,0x00,0x00,0x96,0x47,0x00,0x0c,0x00,0x00,0x00,0x00,
11250x30,0xe3,0xff,0xff,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x27,0x84,0x90,0x10,
11260x00,0x02,0x10,0x80,0x00,0x44,0x10,0x21,0x80,0x45,0x00,0x06,0x00,0x03,0x1a,0x00,
11270x3c,0x04,0xb0,0x00,0x00,0x65,0x18,0x21,0x00,0x64,0x20,0x21,0x94,0x82,0x00,0x00,
11280x82,0x43,0x00,0x10,0x00,0x02,0x14,0x00,0x14,0x60,0x00,0x06,0x00,0x02,0x3c,0x03,
11290x30,0xe2,0x00,0x04,0x14,0x40,0x00,0x04,0x01,0x49,0x10,0x21,0x34,0xe2,0x08,0x00,
11300xa4,0x82,0x00,0x00,0x01,0x49,0x10,0x21,0x00,0x02,0x16,0x00,0x00,0x02,0x16,0x03,
11310x00,0x46,0x10,0x2a,0x10,0x40,0x00,0x7c,0x00,0x00,0x00,0x00,0x82,0x42,0x00,0x10,
11320x00,0x00,0x00,0x00,0x10,0x40,0x00,0x0e,0x00,0x00,0x00,0x00,0x86,0x43,0x00,0x0c,
11330x25,0x44,0x00,0x01,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,
11340x27,0x83,0x90,0x10,0x00,0x43,0x10,0x21,0xa0,0x44,0x00,0x04,0x92,0x23,0x00,0x16,
11350x02,0x40,0x20,0x21,0x30,0x63,0x00,0xfb,0x08,0x00,0x10,0x9c,0xa2,0x23,0x00,0x16,
11360x86,0x43,0x00,0x0c,0x25,0x24,0x00,0x01,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,
11370x00,0x02,0x10,0x80,0x27,0x83,0x90,0x10,0x00,0x43,0x10,0x21,0xa0,0x44,0x00,0x05,
11380x86,0x45,0x00,0x0c,0x0c,0x00,0x1e,0xea,0x02,0x20,0x20,0x21,0x10,0x40,0x00,0x5a,
11390x00,0x00,0x00,0x00,0x92,0x45,0x00,0x08,0x00,0x00,0x00,0x00,0x30,0xa6,0x00,0xff,
11400x2c,0xc2,0x00,0x04,0x10,0x40,0x00,0x4c,0x2c,0xc2,0x00,0x10,0x3c,0x04,0xb0,0x05,
11410x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,0x24,0x02,0x00,0x01,0x00,0xc2,0x10,0x04,
11420x00,0x02,0x10,0x27,0x00,0x62,0x18,0x24,0xa0,0x83,0x00,0x00,0x92,0x45,0x00,0x08,
11430x00,0x00,0x00,0x00,0x30,0xa5,0x00,0xff,0x14,0xa0,0x00,0x33,0x24,0x02,0x00,0x01,
11440xa2,0x40,0x00,0x04,0x92,0x22,0x00,0x04,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x0c,
11450x24,0x02,0x00,0x01,0xa2,0x22,0x00,0x17,0x92,0x22,0x00,0x17,0x00,0x00,0x00,0x00,
11460x10,0x40,0x00,0x04,0x00,0x00,0x00,0x00,0x96,0x22,0x00,0x06,0x08,0x00,0x10,0x97,
11470xa6,0x22,0x00,0x14,0x96,0x22,0x00,0x00,0x08,0x00,0x10,0x97,0xa6,0x22,0x00,0x14,
11480x92,0x22,0x00,0x0a,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x03,0x00,0x00,0x00,0x00,
11490x08,0x00,0x11,0x26,0xa2,0x20,0x00,0x17,0x96,0x24,0x00,0x00,0x96,0x25,0x00,0x06,
11500x27,0x86,0x90,0x00,0x00,0x04,0x18,0xc0,0x00,0x64,0x18,0x21,0x00,0x05,0x10,0xc0,
11510x00,0x45,0x10,0x21,0x00,0x03,0x18,0x80,0x00,0x66,0x18,0x21,0x00,0x02,0x10,0x80,
11520x00,0x46,0x10,0x21,0x8c,0x65,0x00,0x08,0x8c,0x44,0x00,0x08,0x3c,0x03,0x80,0x00,
11530x00,0xa3,0x30,0x24,0x10,0xc0,0x00,0x08,0x00,0x83,0x10,0x24,0x10,0x40,0x00,0x04,
11540x00,0x00,0x18,0x21,0x10,0xc0,0x00,0x02,0x24,0x03,0x00,0x01,0x00,0x85,0x18,0x2b,
11550x08,0x00,0x11,0x26,0xa2,0x23,0x00,0x17,0x10,0x40,0xff,0xfd,0x00,0x85,0x18,0x2b,
11560x08,0x00,0x11,0x49,0x00,0x00,0x00,0x00,0x10,0xa2,0x00,0x09,0x24,0x02,0x00,0x02,
11570x10,0xa2,0x00,0x05,0x24,0x02,0x00,0x03,0x14,0xa2,0xff,0xca,0x00,0x00,0x00,0x00,
11580x08,0x00,0x11,0x21,0xa2,0x40,0x00,0x07,0x08,0x00,0x11,0x21,0xa2,0x40,0x00,0x06,
11590x08,0x00,0x11,0x21,0xa2,0x40,0x00,0x05,0x14,0x40,0xff,0xbe,0x3c,0x04,0xb0,0x05,
11600x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,0x30,0xa5,0x00,0x0f,0x24,0x02,0x00,0x80,
11610x08,0x00,0x11,0x18,0x00,0xa2,0x10,0x07,0x0c,0x00,0x10,0x07,0x02,0x40,0x20,0x21,
11620x08,0x00,0x10,0x97,0x00,0x00,0x00,0x00,0x92,0x45,0x00,0x08,0x00,0x00,0x00,0x00,
11630x30,0xa6,0x00,0xff,0x2c,0xc2,0x00,0x04,0x10,0x40,0x00,0x99,0x2c,0xc2,0x00,0x10,
11640x3c,0x04,0xb0,0x05,0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,0x24,0x02,0x00,0x01,
11650x00,0xc2,0x10,0x04,0x00,0x02,0x10,0x27,0x00,0x62,0x18,0x24,0xa0,0x83,0x00,0x00,
11660x92,0x45,0x00,0x08,0x00,0x00,0x00,0x00,0x30,0xa5,0x00,0xff,0x14,0xa0,0x00,0x80,
11670x24,0x02,0x00,0x01,0xa2,0x40,0x00,0x04,0x86,0x43,0x00,0x0c,0x27,0x93,0x90,0x04,
11680x96,0x47,0x00,0x0c,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x28,0x80,
11690x00,0xb3,0x18,0x21,0x8c,0x64,0x00,0x18,0x00,0x00,0x00,0x00,0x8c,0x82,0x00,0x04,
11700x00,0x00,0x00,0x00,0x30,0x42,0x00,0x10,0x10,0x40,0x00,0x64,0x00,0x00,0x30,0x21,
11710x00,0x07,0x1c,0x00,0x00,0x03,0x1c,0x03,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,
11720x00,0x02,0x10,0x80,0x00,0x53,0x10,0x21,0x8c,0x43,0x00,0x18,0x93,0x82,0x8b,0x71,
11730x8c,0x64,0x00,0x04,0x30,0x42,0x00,0x01,0x00,0x04,0x21,0x42,0x14,0x40,0x00,0x4d,
11740x30,0x90,0x00,0x01,0x00,0x07,0x2c,0x00,0x00,0x05,0x2c,0x03,0x0c,0x00,0x1b,0x66,
11750x02,0x20,0x20,0x21,0x96,0x26,0x00,0x06,0x12,0x00,0x00,0x14,0x30,0xc5,0xff,0xff,
11760x02,0x60,0x90,0x21,0x00,0x05,0x10,0xc0,0x00,0x45,0x10,0x21,0x00,0x02,0x10,0x80,
11770x00,0x52,0x18,0x21,0x92,0x22,0x00,0x0a,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x0b,
11780x02,0x20,0x20,0x21,0x8c,0x63,0x00,0x18,0x00,0x00,0x00,0x00,0x8c,0x62,0x00,0x04,
11790x00,0x00,0x00,0x00,0x00,0x02,0x11,0x42,0x0c,0x00,0x1b,0x66,0x30,0x50,0x00,0x01,
11800x96,0x26,0x00,0x06,0x16,0x00,0xff,0xef,0x30,0xc5,0xff,0xff,0x92,0x22,0x00,0x04,
11810x00,0x00,0x00,0x00,0x14,0x40,0x00,0x0d,0x24,0x02,0x00,0x01,0xa2,0x22,0x00,0x17,
11820x92,0x22,0x00,0x17,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x05,0x00,0x00,0x00,0x00,
11830xa6,0x26,0x00,0x14,0x92,0x22,0x00,0x16,0x08,0x00,0x10,0x96,0x30,0x42,0x00,0xc3,
11840x96,0x22,0x00,0x00,0x08,0x00,0x11,0xbd,0xa6,0x22,0x00,0x14,0x92,0x22,0x00,0x0a,
11850x00,0x00,0x00,0x00,0x14,0x40,0x00,0x03,0x00,0x00,0x00,0x00,0x08,0x00,0x11,0xb8,
11860xa2,0x20,0x00,0x17,0x96,0x24,0x00,0x00,0x30,0xc5,0xff,0xff,0x00,0x05,0x18,0xc0,
11870x00,0x04,0x10,0xc0,0x00,0x44,0x10,0x21,0x00,0x65,0x18,0x21,0x27,0x84,0x90,0x00,
11880x00,0x02,0x10,0x80,0x00,0x44,0x10,0x21,0x00,0x03,0x18,0x80,0x8c,0x45,0x00,0x08,
11890x00,0x64,0x18,0x21,0x8c,0x64,0x00,0x08,0x3c,0x02,0x80,0x00,0x00,0xa2,0x38,0x24,
11900x10,0xe0,0x00,0x08,0x00,0x82,0x10,0x24,0x10,0x40,0x00,0x04,0x00,0x00,0x18,0x21,
11910x10,0xe0,0x00,0x02,0x24,0x03,0x00,0x01,0x00,0x85,0x18,0x2b,0x08,0x00,0x11,0xb8,
11920xa2,0x23,0x00,0x17,0x10,0x40,0xff,0xfd,0x00,0x85,0x18,0x2b,0x08,0x00,0x11,0xdc,
11930x00,0x00,0x00,0x00,0x24,0x05,0x00,0x24,0xf0,0xe5,0x00,0x06,0x00,0x00,0x28,0x12,
11940x27,0x82,0x90,0x00,0x00,0xa2,0x28,0x21,0x0c,0x00,0x01,0x49,0x00,0x00,0x20,0x21,
11950x96,0x47,0x00,0x0c,0x08,0x00,0x11,0x9a,0x00,0x07,0x2c,0x00,0x27,0x83,0x90,0x10,
11960x27,0x82,0x90,0x18,0x00,0xa2,0x10,0x21,0x00,0xa3,0x18,0x21,0x90,0x44,0x00,0x00,
11970x90,0x65,0x00,0x05,0x93,0x82,0x80,0x10,0x24,0x07,0x00,0x01,0x0c,0x00,0x21,0x9a,
11980xaf,0xa2,0x00,0x10,0x96,0x47,0x00,0x0c,0x08,0x00,0x11,0x8d,0x00,0x07,0x1c,0x00,
11990x10,0xa2,0x00,0x09,0x24,0x02,0x00,0x02,0x10,0xa2,0x00,0x05,0x24,0x02,0x00,0x03,
12000x14,0xa2,0xff,0x7d,0x00,0x00,0x00,0x00,0x08,0x00,0x11,0x7e,0xa2,0x40,0x00,0x07,
12010x08,0x00,0x11,0x7e,0xa2,0x40,0x00,0x06,0x08,0x00,0x11,0x7e,0xa2,0x40,0x00,0x05,
12020x14,0x40,0xff,0x71,0x3c,0x04,0xb0,0x05,0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,
12030x30,0xa5,0x00,0x0f,0x24,0x02,0x00,0x80,0x08,0x00,0x11,0x75,0x00,0xa2,0x10,0x07,
12040x14,0x40,0xfe,0xc3,0x3c,0x04,0xb0,0x05,0x34,0x84,0x02,0x29,0x90,0x83,0x00,0x00,
12050x30,0xa5,0x00,0x0f,0x24,0x02,0x00,0x80,0x08,0x00,0x10,0xd0,0x00,0xa2,0x10,0x07,
12060x84,0x83,0x00,0x0c,0x00,0x00,0x00,0x00,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,
12070x00,0x02,0x10,0x80,0x27,0x83,0x90,0x04,0x00,0x43,0x10,0x21,0x8c,0x47,0x00,0x18,
12080x00,0x00,0x00,0x00,0x8c,0xe6,0x00,0x08,0x0c,0x00,0x0f,0x19,0x00,0x00,0x00,0x00,
12090x02,0x40,0x20,0x21,0x00,0x00,0x28,0x21,0x00,0x00,0x30,0x21,0x00,0x00,0x38,0x21,
12100x0c,0x00,0x1c,0x68,0xaf,0xa2,0x00,0x10,0x00,0x02,0x1e,0x00,0x14,0x60,0xfe,0x6b,
12110xa2,0x22,0x00,0x12,0x92,0x43,0x00,0x08,0x00,0x00,0x00,0x00,0x14,0x60,0x00,0x40,
12120x24,0x02,0x00,0x01,0xa2,0x40,0x00,0x04,0x92,0x28,0x00,0x04,0x00,0x00,0x00,0x00,
12130x15,0x00,0x00,0x19,0x24,0x02,0x00,0x01,0x92,0x27,0x00,0x0a,0xa2,0x22,0x00,0x17,
12140x92,0x22,0x00,0x17,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x10,0x00,0x00,0x00,0x00,
12150x96,0x22,0x00,0x06,0x00,0x00,0x00,0x00,0xa6,0x22,0x00,0x14,0x92,0x22,0x00,0x16,
12160x30,0xe3,0x00,0xff,0x30,0x42,0x00,0xc0,0x10,0x60,0x00,0x03,0xa2,0x22,0x00,0x16,
12170x34,0x42,0x00,0x01,0xa2,0x22,0x00,0x16,0x11,0x00,0xfe,0x50,0x00,0x00,0x00,0x00,
12180x92,0x22,0x00,0x16,0x08,0x00,0x10,0x96,0x34,0x42,0x00,0x02,0x96,0x22,0x00,0x00,
12190x08,0x00,0x12,0x3f,0xa6,0x22,0x00,0x14,0x92,0x27,0x00,0x0a,0x00,0x00,0x00,0x00,
12200x14,0xe0,0x00,0x03,0x00,0x00,0x00,0x00,0x08,0x00,0x12,0x38,0xa2,0x20,0x00,0x17,
12210x96,0x24,0x00,0x00,0x96,0x25,0x00,0x06,0x27,0x86,0x90,0x00,0x00,0x04,0x18,0xc0,
12220x00,0x64,0x18,0x21,0x00,0x05,0x10,0xc0,0x00,0x45,0x10,0x21,0x00,0x03,0x18,0x80,
12230x00,0x66,0x18,0x21,0x00,0x02,0x10,0x80,0x00,0x46,0x10,0x21,0x8c,0x65,0x00,0x08,
12240x8c,0x44,0x00,0x08,0x3c,0x03,0x80,0x00,0x00,0xa3,0x30,0x24,0x10,0xc0,0x00,0x08,
12250x00,0x83,0x10,0x24,0x10,0x40,0x00,0x04,0x00,0x00,0x18,0x21,0x10,0xc0,0x00,0x02,
12260x24,0x03,0x00,0x01,0x00,0x85,0x18,0x2b,0x08,0x00,0x12,0x38,0xa2,0x23,0x00,0x17,
12270x10,0x40,0xff,0xfd,0x00,0x85,0x18,0x2b,0x08,0x00,0x12,0x67,0x00,0x00,0x00,0x00,
12280x10,0x62,0x00,0x09,0x24,0x02,0x00,0x02,0x10,0x62,0x00,0x05,0x24,0x02,0x00,0x03,
12290x14,0x62,0xff,0xbd,0x00,0x00,0x00,0x00,0x08,0x00,0x12,0x32,0xa2,0x40,0x00,0x07,
12300x08,0x00,0x12,0x32,0xa2,0x40,0x00,0x06,0x08,0x00,0x12,0x32,0xa2,0x40,0x00,0x05,
12310x3c,0x02,0x80,0x00,0x00,0x82,0x30,0x24,0x10,0xc0,0x00,0x08,0x00,0xa2,0x18,0x24,
12320x10,0x60,0x00,0x04,0x00,0x00,0x10,0x21,0x10,0xc0,0x00,0x02,0x24,0x02,0x00,0x01,
12330x00,0xa4,0x10,0x2b,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x10,0x60,0xff,0xfd,
12340x00,0xa4,0x10,0x2b,0x08,0x00,0x12,0x82,0x00,0x00,0x00,0x00,0x30,0x82,0xff,0xff,
12350x00,0x02,0x18,0xc0,0x00,0x62,0x18,0x21,0x27,0x84,0x90,0x10,0x00,0x03,0x18,0x80,
12360x00,0x64,0x18,0x21,0x80,0x66,0x00,0x06,0x00,0x02,0x12,0x00,0x3c,0x03,0xb0,0x00,
12370x00,0x46,0x10,0x21,0x00,0x45,0x10,0x21,0x03,0xe0,0x00,0x08,0x00,0x43,0x10,0x21,
12380x27,0xbd,0xff,0xe0,0x30,0x82,0x00,0x7c,0x30,0x84,0xff,0x00,0xaf,0xbf,0x00,0x1c,
12390xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0x14,0x40,0x00,0x41,
12400x00,0x04,0x22,0x03,0x24,0x02,0x00,0x04,0x3c,0x10,0xb0,0x03,0x8e,0x10,0x00,0x00,
12410x10,0x82,0x00,0x32,0x24,0x02,0x00,0x08,0x10,0x82,0x00,0x03,0x32,0x02,0x00,0x20,
12420x08,0x00,0x12,0xa8,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x17,0x3c,0x02,0xb0,0x06,
12430x34,0x42,0x80,0x24,0x8c,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x67,0x00,0xff,
12440x10,0xe0,0x00,0x23,0x00,0x00,0x88,0x21,0x8f,0x85,0x8f,0xe0,0x00,0x40,0x30,0x21,
12450x94,0xa2,0x00,0x08,0x8c,0xc3,0x00,0x00,0x26,0x31,0x00,0x01,0x24,0x42,0x00,0x02,
12460x30,0x42,0x01,0xff,0x34,0x63,0x01,0x00,0x02,0x27,0x20,0x2a,0xa4,0xa2,0x00,0x08,
12470x14,0x80,0xff,0xf7,0xac,0xc3,0x00,0x00,0x84,0xa3,0x00,0x08,0x3c,0x02,0xb0,0x03,
12480x34,0x42,0x00,0x30,0xac,0x43,0x00,0x00,0x27,0x92,0xb4,0x00,0x24,0x11,0x00,0x12,
12490x8e,0x44,0x00,0x00,0x26,0x31,0xff,0xff,0x90,0x82,0x00,0x10,0x00,0x00,0x00,0x00,
12500x10,0x40,0x00,0x03,0x26,0x52,0x00,0x04,0x0c,0x00,0x18,0xd0,0x00,0x00,0x00,0x00,
12510x06,0x21,0xff,0xf7,0x24,0x02,0xff,0xdf,0x02,0x02,0x80,0x24,0x3c,0x01,0xb0,0x03,
12520x0c,0x00,0x13,0x1c,0xac,0x30,0x00,0x00,0x08,0x00,0x12,0xa8,0x00,0x00,0x00,0x00,
12530x8f,0x85,0x8f,0xe0,0x08,0x00,0x12,0xbe,0x00,0x00,0x00,0x00,0x24,0x02,0xff,0x95,
12540x3c,0x03,0xb0,0x03,0x02,0x02,0x80,0x24,0x34,0x63,0x00,0x30,0x3c,0x01,0xb0,0x03,
12550xac,0x30,0x00,0x00,0x0c,0x00,0x12,0xe5,0xac,0x60,0x00,0x00,0x08,0x00,0x12,0xa8,
12560x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x50,0x08,0x00,0x12,0xa8,
12570xac,0x46,0x00,0x00,0x3c,0x0a,0x80,0x00,0x25,0x4a,0x4b,0x94,0x3c,0x0b,0xb0,0x03,
12580xad,0x6a,0x00,0x20,0x3c,0x08,0x80,0x01,0x25,0x08,0x00,0x00,0x3c,0x09,0x80,0x01,
12590x25,0x29,0x03,0x50,0x11,0x09,0x00,0x10,0x00,0x00,0x00,0x00,0x3c,0x0a,0x80,0x00,
12600x25,0x4a,0x4b,0xbc,0x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,0x3c,0x08,0xb0,0x06,
12610x35,0x08,0x80,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x8d,0x09,0x00,0x00,
12620x00,0x00,0x00,0x00,0x31,0x29,0x00,0x01,0x00,0x00,0x00,0x00,0x24,0x01,0x00,0x01,
12630x15,0x21,0xff,0xf2,0x00,0x00,0x00,0x00,0x3c,0x0a,0x80,0x00,0x25,0x4a,0x4b,0xf8,
12640x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,0x3c,0x02,0xb0,0x03,0x8c,0x43,0x00,0x00,
12650x00,0x00,0x00,0x00,0x34,0x63,0x00,0x40,0x00,0x00,0x00,0x00,0xac,0x43,0x00,0x00,
12660x00,0x00,0x00,0x00,0x3c,0x0a,0x80,0x00,0x25,0x4a,0x4c,0x24,0x3c,0x0b,0xb0,0x03,
12670xad,0x6a,0x00,0x20,0x3c,0x02,0x80,0x01,0x24,0x42,0x00,0x00,0x3c,0x03,0x80,0x01,
12680x24,0x63,0x03,0x50,0x3c,0x04,0xb0,0x00,0x8c,0x85,0x00,0x00,0x00,0x00,0x00,0x00,
12690xac,0x45,0x00,0x00,0x24,0x42,0x00,0x04,0x24,0x84,0x00,0x04,0x00,0x43,0x08,0x2a,
12700x14,0x20,0xff,0xf9,0x00,0x00,0x00,0x00,0x0c,0x00,0x13,0x1c,0x00,0x00,0x00,0x00,
12710x3c,0x0a,0x80,0x00,0x25,0x4a,0x4c,0x70,0x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,
12720x3c,0x02,0x80,0x01,0x24,0x42,0x03,0x50,0x3c,0x03,0x80,0x01,0x24,0x63,0x3f,0x24,
12730xac,0x40,0x00,0x00,0xac,0x40,0x00,0x04,0xac,0x40,0x00,0x08,0xac,0x40,0x00,0x0c,
12740x24,0x42,0x00,0x10,0x00,0x43,0x08,0x2a,0x14,0x20,0xff,0xf9,0x00,0x00,0x00,0x00,
12750x3c,0x0a,0x80,0x00,0x25,0x4a,0x4c,0xb0,0x3c,0x0b,0xb0,0x03,0xad,0x6a,0x00,0x20,
12760x3c,0x1c,0x80,0x01,0x27,0x9c,0x7f,0xf0,0x27,0x9d,0x8b,0xe0,0x00,0x00,0x00,0x00,
12770x27,0x9d,0x8f,0xc8,0x3c,0x0a,0x80,0x00,0x25,0x4a,0x4c,0xd4,0x3c,0x0b,0xb0,0x03,
12780xad,0x6a,0x00,0x20,0x40,0x80,0x68,0x00,0x40,0x08,0x60,0x00,0x00,0x00,0x00,0x00,
12790x35,0x08,0xff,0x01,0x40,0x88,0x60,0x00,0x00,0x00,0x00,0x00,0x0c,0x00,0x15,0x62,
12800x00,0x00,0x00,0x00,0x24,0x84,0xf8,0x00,0x30,0x87,0x00,0x03,0x00,0x04,0x30,0x40,
12810x00,0xc7,0x20,0x23,0x3c,0x02,0xb0,0x0a,0x27,0xbd,0xff,0xe0,0x24,0x03,0xff,0xff,
12820x00,0x82,0x20,0x21,0xaf,0xb1,0x00,0x14,0xac,0x83,0x10,0x00,0xaf,0xbf,0x00,0x18,
12830xaf,0xb0,0x00,0x10,0x00,0xa0,0x88,0x21,0x24,0x03,0x00,0x01,0x8c,0x82,0x10,0x00,
12840x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x00,0xc7,0x10,0x23,0x3c,0x03,0xb0,0x0a,
12850x00,0x43,0x10,0x21,0x8c,0x50,0x00,0x00,0x0c,0x00,0x13,0x99,0x02,0x20,0x20,0x21,
12860x02,0x11,0x80,0x24,0x00,0x50,0x80,0x06,0x02,0x00,0x10,0x21,0x8f,0xbf,0x00,0x18,
12870x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x27,0xbd,0xff,0xd8,
12880xaf,0xb2,0x00,0x18,0x00,0xa0,0x90,0x21,0x24,0x05,0xff,0xff,0xaf,0xb3,0x00,0x1c,
12890xaf,0xbf,0x00,0x20,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0x00,0xc0,0x98,0x21,
12900x12,0x45,0x00,0x23,0x24,0x84,0xf8,0x00,0x30,0x83,0x00,0x03,0x00,0x04,0x10,0x40,
12910x00,0x40,0x88,0x21,0x00,0x60,0x20,0x21,0x00,0x43,0x10,0x23,0x3c,0x03,0xb0,0x0a,
12920x00,0x43,0x10,0x21,0xac,0x45,0x10,0x00,0x00,0x40,0x18,0x21,0x24,0x05,0x00,0x01,
12930x8c,0x62,0x10,0x00,0x00,0x00,0x00,0x00,0x14,0x45,0xff,0xfd,0x3c,0x02,0xb0,0x0a,
12940x02,0x24,0x88,0x23,0x02,0x22,0x88,0x21,0x8e,0x30,0x00,0x00,0x0c,0x00,0x13,0x99,
12950x02,0x40,0x20,0x21,0x00,0x12,0x18,0x27,0x02,0x03,0x80,0x24,0x00,0x53,0x10,0x04,
12960x02,0x02,0x80,0x25,0xae,0x30,0x00,0x00,0x24,0x03,0x00,0x01,0x8e,0x22,0x10,0x00,
12970x00,0x00,0x00,0x00,0x14,0x43,0xff,0xfd,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x20,
12980x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x28,
12990x30,0x82,0x00,0x03,0x00,0x04,0x18,0x40,0x00,0x62,0x18,0x23,0x3c,0x04,0xb0,0x0a,
13000x00,0x64,0x18,0x21,0xac,0x66,0x00,0x00,0x24,0x04,0x00,0x01,0x8c,0x62,0x10,0x00,
13010x00,0x00,0x00,0x00,0x14,0x44,0xff,0xfd,0x00,0x00,0x00,0x00,0x08,0x00,0x13,0x87,
13020x00,0x00,0x00,0x00,0x00,0x00,0x18,0x21,0x00,0x64,0x10,0x06,0x30,0x42,0x00,0x01,
13030x14,0x40,0x00,0x05,0x00,0x00,0x00,0x00,0x24,0x63,0x00,0x01,0x2c,0x62,0x00,0x20,
13040x14,0x40,0xff,0xf9,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x60,0x10,0x21,
13050x27,0xbd,0xff,0xe0,0x3c,0x03,0xb0,0x05,0xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,
13060xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x1c,0x00,0x80,0x90,0x21,0x00,0xa0,0x80,0x21,
13070x00,0xc0,0x88,0x21,0x34,0x63,0x02,0x2e,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
13080x30,0x42,0x00,0x01,0x14,0x40,0xff,0xfc,0x24,0x04,0x08,0x24,0x3c,0x05,0x00,0xc0,
13090x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x03,0x24,0x04,0x08,0x34,0x3c,0x05,0x00,0xc0,
13100x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x03,0x3c,0x02,0xc0,0x00,0x00,0x10,0x1c,0x00,
13110x34,0x42,0x04,0x00,0x3c,0x04,0xb0,0x05,0x3c,0x05,0xb0,0x05,0x24,0x63,0x16,0x09,
13120x02,0x22,0x10,0x21,0x34,0x84,0x04,0x20,0x34,0xa5,0x04,0x24,0x3c,0x06,0xb0,0x05,
13130xac,0x83,0x00,0x00,0x24,0x07,0x00,0x01,0xac,0xa2,0x00,0x00,0x34,0xc6,0x02,0x28,
13140x24,0x02,0x00,0x20,0xae,0x47,0x00,0x3c,0x24,0x04,0x08,0x24,0xa0,0xc2,0x00,0x00,
13150x3c,0x05,0x00,0xc0,0xa2,0x47,0x00,0x11,0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x01,
13160x24,0x04,0x08,0x34,0x3c,0x05,0x00,0xc0,0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x01,
13170x8f,0xbf,0x00,0x1c,0x8f,0xb2,0x00,0x18,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,
13180x27,0xbd,0x00,0x20,0x24,0x02,0x00,0x06,0xac,0x82,0x00,0x0c,0xa0,0x80,0x00,0x50,
13190xac,0x80,0x00,0x00,0xac,0x80,0x00,0x04,0xac,0x80,0x00,0x08,0xac,0x80,0x00,0x14,
13200xac,0x80,0x00,0x18,0xac,0x80,0x00,0x1c,0xa4,0x80,0x00,0x20,0xac,0x80,0x00,0x24,
13210xac,0x80,0x00,0x28,0xac,0x80,0x00,0x2c,0xa0,0x80,0x00,0x30,0xa0,0x80,0x00,0x31,
13220xac,0x80,0x00,0x34,0xac,0x80,0x00,0x38,0xa0,0x80,0x00,0x3c,0xac,0x82,0x00,0x10,
13230xa0,0x80,0x00,0x44,0xac,0x80,0x00,0x48,0x03,0xe0,0x00,0x08,0xac,0x80,0x00,0x4c,
13240x3c,0x04,0xb0,0x06,0x34,0x84,0x80,0x00,0x8c,0x83,0x00,0x00,0x3c,0x02,0x12,0x00,
13250x3c,0x05,0xb0,0x03,0x00,0x62,0x18,0x25,0x34,0xa5,0x00,0x8b,0x24,0x02,0xff,0x80,
13260xac,0x83,0x00,0x00,0x03,0xe0,0x00,0x08,0xa0,0xa2,0x00,0x00,0x3c,0x04,0xb0,0x03,
13270x34,0x84,0x00,0x0b,0x24,0x02,0x00,0x22,0x3c,0x05,0xb0,0x01,0x3c,0x06,0x45,0x67,
13280x3c,0x0a,0xb0,0x09,0xa0,0x82,0x00,0x00,0x34,0xa5,0x00,0x04,0x34,0xc6,0x89,0xaa,
13290x35,0x4a,0x00,0x04,0x24,0x02,0x01,0x23,0x3c,0x0b,0xb0,0x09,0x3c,0x07,0x01,0x23,
13300x3c,0x0c,0xb0,0x09,0x3c,0x01,0xb0,0x01,0xac,0x20,0x00,0x00,0x27,0xbd,0xff,0xe0,
13310xac,0xa0,0x00,0x00,0x35,0x6b,0x00,0x08,0x3c,0x01,0xb0,0x09,0xac,0x26,0x00,0x00,
13320x34,0xe7,0x45,0x66,0xa5,0x42,0x00,0x00,0x35,0x8c,0x00,0x0c,0x24,0x02,0xcd,0xef,
13330x3c,0x0d,0xb0,0x09,0x3c,0x08,0xcd,0xef,0x3c,0x0e,0xb0,0x09,0xad,0x67,0x00,0x00,
13340xaf,0xb7,0x00,0x1c,0xa5,0x82,0x00,0x00,0xaf,0xb6,0x00,0x18,0xaf,0xb5,0x00,0x14,
13350xaf,0xb4,0x00,0x10,0xaf,0xb3,0x00,0x0c,0xaf,0xb2,0x00,0x08,0xaf,0xb1,0x00,0x04,
13360xaf,0xb0,0x00,0x00,0x35,0xad,0x00,0x10,0x35,0x08,0x01,0x22,0x35,0xce,0x00,0x14,
13370x24,0x02,0x89,0xab,0x3c,0x0f,0xb0,0x09,0x3c,0x09,0x89,0xab,0x3c,0x10,0xb0,0x09,
13380x3c,0x11,0xb0,0x09,0x3c,0x12,0xb0,0x09,0x3c,0x13,0xb0,0x09,0x3c,0x14,0xb0,0x09,
13390x3c,0x15,0xb0,0x09,0x3c,0x16,0xb0,0x09,0x3c,0x17,0xb0,0x09,0xad,0xa8,0x00,0x00,
13400x24,0x03,0xff,0xff,0xa5,0xc2,0x00,0x00,0x35,0xef,0x00,0x18,0x35,0x29,0xcd,0xee,
13410x36,0x10,0x00,0x1c,0x36,0x31,0x00,0x20,0x36,0x52,0x00,0x24,0x36,0x73,0x00,0x28,
13420x36,0x94,0x00,0x2c,0x36,0xb5,0x00,0x30,0x36,0xd6,0x00,0x34,0x36,0xf7,0x00,0x38,
13430x24,0x02,0x45,0x67,0xad,0xe9,0x00,0x00,0xa6,0x02,0x00,0x00,0xae,0x23,0x00,0x00,
13440x8f,0xb0,0x00,0x00,0xa6,0x43,0x00,0x00,0x8f,0xb1,0x00,0x04,0xae,0x63,0x00,0x00,
13450x8f,0xb2,0x00,0x08,0xa6,0x83,0x00,0x00,0x8f,0xb3,0x00,0x0c,0xae,0xa3,0x00,0x00,
13460x8f,0xb4,0x00,0x10,0xa6,0xc3,0x00,0x00,0x8f,0xb5,0x00,0x14,0xae,0xe3,0x00,0x00,
13470x7b,0xb6,0x00,0xfc,0x3c,0x18,0xb0,0x09,0x37,0x18,0x00,0x3c,0xa7,0x03,0x00,0x00,
13480x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,
13490x34,0x63,0x00,0x20,0x24,0x42,0x51,0x48,0xac,0x62,0x00,0x00,0x8c,0x83,0x00,0x34,
13500x34,0x02,0xff,0xff,0x00,0x43,0x10,0x2a,0x14,0x40,0x01,0x04,0x00,0x80,0x28,0x21,
13510x8c,0x86,0x00,0x08,0x24,0x02,0x00,0x03,0x10,0xc2,0x00,0xf7,0x00,0x00,0x00,0x00,
13520x8c,0xa2,0x00,0x2c,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x4f,0x24,0x02,0x00,0x06,
13530x3c,0x03,0xb0,0x05,0x34,0x63,0x04,0x50,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
13540x30,0x42,0x00,0xff,0x14,0x40,0x00,0xdd,0xac,0xa2,0x00,0x2c,0x24,0x02,0x00,0x01,
13550x10,0xc2,0x00,0xdc,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xc2,0x00,0xca,
13560x00,0x00,0x00,0x00,0x8c,0xa7,0x00,0x04,0x24,0x02,0x00,0x02,0x10,0xe2,0x00,0xc0,
13570x00,0x00,0x00,0x00,0x8c,0xa2,0x00,0x14,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x09,
13580x24,0x02,0x00,0x01,0x3c,0x03,0xb0,0x09,0x34,0x63,0x01,0x60,0x90,0x62,0x00,0x00,
13590x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,0x10,0x40,0x00,0x05,0xac,0xa2,0x00,0x14,
13600x24,0x02,0x00,0x01,0xac,0xa2,0x00,0x00,0x03,0xe0,0x00,0x08,0xac,0xa0,0x00,0x14,
13610x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0xd0,0x8c,0x43,0x00,0x00,0x00,0x00,0x00,0x00,
13620x04,0x61,0x00,0x19,0x3c,0x02,0xb0,0x03,0x3c,0x03,0xb0,0x05,0x34,0x63,0x02,0x2e,
13630x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,0x14,0x40,0x00,0x12,
13640x3c,0x02,0xb0,0x03,0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x42,0x90,0x43,0x00,0x00,
13650x00,0x00,0x00,0x00,0x14,0x60,0x00,0x0c,0x3c,0x02,0xb0,0x03,0x80,0xa2,0x00,0x50,
13660x00,0x00,0x00,0x00,0x14,0x40,0x00,0x08,0x3c,0x02,0xb0,0x03,0x14,0xc0,0x00,0x07,
13670x34,0x42,0x00,0x3f,0x24,0x02,0x00,0x0e,0x24,0x03,0x00,0x01,0xac,0xa2,0x00,0x00,
13680x03,0xe0,0x00,0x08,0xa0,0xa3,0x00,0x50,0x34,0x42,0x00,0x3f,0x90,0x44,0x00,0x00,
13690x24,0x03,0x00,0x01,0x10,0x64,0x00,0x7f,0x3c,0x03,0xb0,0x05,0x80,0xa2,0x00,0x31,
13700x00,0x00,0x00,0x00,0x10,0x40,0x00,0x0a,0x3c,0x02,0xb0,0x06,0x34,0x42,0x80,0x18,
13710x8c,0x43,0x00,0x00,0x3c,0x04,0xf0,0x00,0x3c,0x02,0x80,0x00,0x00,0x64,0x18,0x24,
13720x10,0x62,0x00,0x03,0x24,0x02,0x00,0x09,0x03,0xe0,0x00,0x08,0xac,0xa2,0x00,0x00,
13730x8c,0xa2,0x00,0x40,0x00,0x00,0x00,0x00,0x8c,0x43,0x00,0x00,0x00,0x00,0x00,0x00,
13740x10,0x60,0x00,0x09,0x3c,0x03,0xb0,0x03,0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x2c,
13750x8c,0x43,0x00,0x00,0x3c,0x04,0x00,0x02,0x00,0x64,0x18,0x24,0x14,0x60,0xff,0xf2,
13760x24,0x02,0x00,0x10,0x3c,0x03,0xb0,0x03,0x34,0x63,0x02,0x01,0x90,0x62,0x00,0x00,
13770x00,0x00,0x00,0x00,0x30,0x42,0x00,0x80,0x10,0x40,0x00,0x0e,0x00,0x00,0x00,0x00,
13780x8c,0xa3,0x00,0x0c,0x00,0x00,0x00,0x00,0xac,0xa3,0x00,0x10,0x3c,0x02,0xb0,0x03,
13790x90,0x42,0x02,0x01,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x0f,0xac,0xa2,0x00,0x0c,
13800x90,0xa3,0x00,0x0f,0x24,0x02,0x00,0x0d,0x3c,0x01,0xb0,0x03,0x08,0x00,0x14,0xb2,
13810xa0,0x23,0x02,0x01,0x3c,0x02,0xb0,0x09,0x34,0x42,0x01,0x80,0x90,0x44,0x00,0x00,
13820x00,0x00,0x00,0x00,0x00,0x04,0x1e,0x00,0x00,0x03,0x1e,0x03,0x10,0x60,0x00,0x15,
13830xa0,0xa4,0x00,0x44,0x24,0x02,0x00,0x01,0x10,0x62,0x00,0x0b,0x24,0x02,0x00,0x02,
13840x10,0x62,0x00,0x03,0x24,0x03,0x00,0x0d,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
13850x8c,0xa2,0x00,0x0c,0xac,0xa3,0x00,0x00,0x24,0x03,0x00,0x04,0xac,0xa2,0x00,0x10,
13860x03,0xe0,0x00,0x08,0xac,0xa3,0x00,0x0c,0x24,0x02,0x00,0x0d,0xac,0xa2,0x00,0x00,
13870x24,0x03,0x00,0x04,0x24,0x02,0x00,0x06,0xac,0xa3,0x00,0x10,0x03,0xe0,0x00,0x08,
13880xac,0xa2,0x00,0x0c,0x8c,0xa3,0x00,0x38,0x24,0x04,0x00,0x01,0x10,0x64,0x00,0x2d,
13890x24,0x02,0x00,0x02,0x10,0x60,0x00,0x19,0x00,0x00,0x00,0x00,0x10,0x62,0x00,0x10,
13900x24,0x02,0x00,0x04,0x10,0x62,0x00,0x04,0x00,0x00,0x00,0x00,0xac,0xa0,0x00,0x38,
13910x03,0xe0,0x00,0x08,0xac,0xa0,0x00,0x00,0x10,0xe4,0x00,0x07,0x24,0x02,0x00,0x03,
13920x80,0xa2,0x00,0x30,0x00,0x00,0x00,0x00,0x00,0x02,0x18,0x0b,0xac,0xa3,0x00,0x00,
13930x03,0xe0,0x00,0x08,0xac,0xa0,0x00,0x38,0x08,0x00,0x15,0x04,0xac,0xa2,0x00,0x00,
13940x10,0xe4,0x00,0x02,0x24,0x02,0x00,0x03,0x24,0x02,0x00,0x0c,0xac,0xa2,0x00,0x00,
13950x24,0x02,0x00,0x04,0x03,0xe0,0x00,0x08,0xac,0xa2,0x00,0x38,0x10,0xe4,0x00,0x0e,
13960x3c,0x03,0xb0,0x06,0x34,0x63,0x80,0x24,0x8c,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
13970x30,0x42,0x00,0xff,0x10,0x40,0x00,0x06,0xac,0xa2,0x00,0x18,0x24,0x02,0x00,0x02,
13980xac,0xa2,0x00,0x00,0xac,0xa0,0x00,0x18,0x08,0x00,0x15,0x0d,0x24,0x02,0x00,0x01,
13990x08,0x00,0x15,0x1a,0xac,0xa0,0x00,0x00,0x24,0x02,0x00,0x03,0x08,0x00,0x15,0x1a,
14000xac,0xa2,0x00,0x00,0x24,0x03,0x00,0x0b,0xac,0xa2,0x00,0x38,0x03,0xe0,0x00,0x08,
14010xac,0xa3,0x00,0x00,0x34,0x63,0x02,0x2e,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
14020x30,0x42,0x00,0x01,0x14,0x40,0xff,0x7d,0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x42,
14030x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x60,0xff,0x78,0x00,0x00,0x00,0x00,
14040x10,0xc0,0xff,0x81,0x24,0x02,0x00,0x0e,0x08,0x00,0x14,0xa7,0x00,0x00,0x00,0x00,
14050x80,0xa2,0x00,0x30,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0x3e,0x24,0x02,0x00,0x04,
14060x08,0x00,0x14,0xb2,0x00,0x00,0x00,0x00,0x84,0xa2,0x00,0x20,0x00,0x00,0x00,0x00,
14070x10,0x40,0xff,0x75,0x24,0x02,0x00,0x06,0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x2e,
14080x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x01,0x30,0x63,0x00,0xff,
14090x00,0x60,0x10,0x21,0x14,0x40,0xff,0x2b,0xa4,0xa3,0x00,0x20,0x08,0x00,0x14,0xb2,
14100x24,0x02,0x00,0x06,0x8c,0xa2,0x00,0x1c,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0x66,
14110x24,0x02,0x00,0x05,0x3c,0x03,0xb0,0x05,0x34,0x63,0x02,0x2c,0x8c,0x62,0x00,0x00,
14120x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,0x10,0x40,0xff,0x1b,0xac,0xa2,0x00,0x1c,
14130x08,0x00,0x14,0xb2,0x24,0x02,0x00,0x05,0x3c,0x02,0xb0,0x05,0x8c,0x42,0x00,0x00,
14140x00,0x00,0x00,0x00,0x00,0x02,0x17,0x42,0x30,0x42,0x00,0x01,0x14,0x40,0xff,0x56,
14150x24,0x02,0x00,0x06,0x08,0x00,0x14,0x60,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x0a,
14160x03,0xe0,0x00,0x08,0xac,0x82,0x00,0x00,0x27,0xbd,0xff,0xd8,0xaf,0xb0,0x00,0x10,
14170x27,0x90,0x86,0x58,0xaf,0xbf,0x00,0x20,0xaf,0xb3,0x00,0x1c,0xaf,0xb2,0x00,0x18,
14180x0c,0x00,0x29,0xd5,0xaf,0xb1,0x00,0x14,0xaf,0x90,0x8f,0xe0,0x48,0x02,0x00,0x00,
14190x0c,0x00,0x13,0xf0,0x00,0x00,0x00,0x00,0x0c,0x00,0x18,0x1f,0x02,0x00,0x20,0x21,
14200x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x3a,0x94,0x43,0x00,0x00,0x00,0x00,0x00,0x00,
14210xa3,0x83,0x8f,0xe4,0x0c,0x00,0x00,0x34,0x00,0x00,0x00,0x00,0x0c,0x00,0x13,0xfb,
14220x00,0x00,0x00,0x00,0x27,0x84,0x84,0x98,0x0c,0x00,0x27,0x59,0x00,0x00,0x00,0x00,
14230x93,0x84,0x80,0x10,0x0c,0x00,0x21,0x3f,0x00,0x00,0x00,0x00,0x27,0x84,0x89,0x18,
14240x0c,0x00,0x06,0xe5,0x00,0x00,0x00,0x00,0x0c,0x00,0x01,0x39,0x00,0x00,0x00,0x00,
14250x27,0x84,0x84,0x40,0x0c,0x00,0x13,0xd9,0x00,0x00,0x00,0x00,0x27,0x82,0x89,0x4c,
14260xaf,0x82,0x84,0x80,0x0c,0x00,0x00,0x5f,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,
14270x34,0x63,0x01,0x08,0x3c,0x04,0xb0,0x09,0x3c,0x05,0xb0,0x09,0x8c,0x66,0x00,0x00,
14280x34,0x84,0x01,0x68,0x34,0xa5,0x01,0x40,0x24,0x02,0xc8,0x80,0x24,0x03,0x00,0x0a,
14290xa4,0x82,0x00,0x00,0xa4,0xa3,0x00,0x00,0x3c,0x04,0xb0,0x03,0x8c,0x82,0x00,0x00,
14300x8f,0x85,0x84,0x40,0xaf,0x86,0x84,0x38,0x34,0x42,0x00,0x20,0xac,0x82,0x00,0x00,
14310x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x58,0x8c,0x43,0x00,0x00,0x2c,0xa4,0x00,0x11,
14320x34,0x63,0x01,0x00,0xac,0x43,0x00,0x00,0x10,0x80,0xff,0xfa,0x3c,0x02,0xb0,0x03,
14330x3c,0x03,0x80,0x01,0x00,0x05,0x10,0x80,0x24,0x63,0x02,0x00,0x00,0x43,0x10,0x21,
14340x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x08,0x00,0x00,0x00,0x00,
14350x27,0x84,0x84,0x98,0x0c,0x00,0x26,0x8e,0x00,0x00,0x00,0x00,0x27,0x84,0x84,0x40,
14360x0c,0x00,0x14,0x52,0x00,0x00,0x00,0x00,0x93,0x83,0x81,0xf1,0x24,0x02,0x00,0x01,
14370x10,0x62,0x00,0x08,0x00,0x00,0x00,0x00,0x8f,0x85,0x84,0x40,0x8f,0x82,0x84,0x74,
14380x00,0x00,0x00,0x00,0x24,0x42,0x00,0x01,0xaf,0x82,0x84,0x74,0x08,0x00,0x15,0x9d,
14390x3c,0x02,0xb0,0x03,0x27,0x84,0x84,0x98,0x0c,0x00,0x27,0x0d,0x00,0x00,0x00,0x00,
14400x08,0x00,0x15,0xb6,0x00,0x00,0x00,0x00,0x27,0x84,0x84,0x98,0x0c,0x00,0x28,0xdd,
14410x00,0x00,0x00,0x00,0xa3,0x82,0x84,0x71,0x8f,0x82,0x84,0x74,0xaf,0x80,0x84,0x40,
14420x24,0x42,0x00,0x01,0xaf,0x82,0x84,0x74,0x08,0x00,0x15,0x9c,0x00,0x00,0x28,0x21,
14430x27,0x84,0x86,0x58,0x0c,0x00,0x19,0x5b,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,
14440x14,0x40,0x00,0x05,0x3c,0x03,0xb0,0x05,0xaf,0x80,0x84,0x40,0xaf,0x80,0x84,0x44,
14450x08,0x00,0x15,0xb6,0x00,0x00,0x00,0x00,0x34,0x63,0x04,0x50,0x90,0x62,0x00,0x00,
14460x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,0xaf,0x82,0x84,0x6c,0x14,0x40,0x00,0x20,
14470x24,0x02,0x00,0x01,0x8f,0x84,0x84,0x48,0x00,0x00,0x00,0x00,0x10,0x82,0x00,0x20,
14480x3c,0x03,0xb0,0x09,0x34,0x63,0x01,0x60,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
14490x30,0x42,0x00,0xff,0xaf,0x82,0x84,0x54,0x14,0x40,0x00,0x15,0x24,0x02,0x00,0x01,
14500x24,0x02,0x00,0x02,0x10,0x82,0x00,0x07,0x00,0x00,0x00,0x00,0x24,0x05,0x00,0x03,
14510x24,0x02,0x00,0x01,0xaf,0x82,0x84,0x44,0xaf,0x85,0x84,0x40,0x08,0x00,0x15,0xb6,
14520x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x2e,0x90,0x43,0x00,0x00,
14530x00,0x00,0x00,0x00,0x30,0x63,0x00,0x01,0x30,0x63,0x00,0xff,0x00,0x60,0x10,0x21,
14540xa7,0x83,0x84,0x60,0x14,0x40,0xff,0xf1,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
14550xaf,0x82,0x84,0x44,0xaf,0x80,0x84,0x40,0x08,0x00,0x15,0xb6,0x00,0x00,0x00,0x00,
14560x3c,0x03,0xb0,0x05,0x34,0x63,0x02,0x2c,0x8c,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
14570x30,0x42,0x00,0xff,0xaf,0x82,0x84,0x5c,0x14,0x40,0xff,0xf5,0x24,0x02,0x00,0x01,
14580x08,0x00,0x15,0xe1,0x3c,0x03,0xb0,0x09,0x27,0x84,0x86,0x58,0x0c,0x00,0x1a,0xd1,
14590x00,0x00,0x00,0x00,0x83,0x82,0x84,0x70,0x00,0x00,0x00,0x00,0x14,0x40,0xff,0xec,
14600x24,0x02,0x00,0x02,0x3c,0x03,0xb0,0x05,0x34,0x63,0x04,0x50,0x90,0x62,0x00,0x00,
14610x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,0xaf,0x82,0x84,0x6c,0x14,0x40,0xff,0xe4,
14620x24,0x02,0x00,0x02,0x8f,0x84,0x84,0x48,0x24,0x02,0x00,0x01,0x10,0x82,0x00,0x12,
14630x24,0x02,0x00,0x02,0x10,0x82,0x00,0x04,0x00,0x00,0x00,0x00,0x24,0x05,0x00,0x04,
14640x08,0x00,0x15,0xed,0x24,0x02,0x00,0x02,0x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x2e,
14650x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x01,0x30,0x63,0x00,0xff,
14660x00,0x60,0x10,0x21,0xa7,0x83,0x84,0x60,0x14,0x40,0xff,0xf4,0x00,0x00,0x00,0x00,
14670x08,0x00,0x15,0xfc,0x24,0x02,0x00,0x02,0x3c,0x03,0xb0,0x05,0x34,0x63,0x02,0x2c,
14680x8c,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xff,0xaf,0x82,0x84,0x5c,
14690x14,0x40,0xff,0xf7,0x00,0x00,0x00,0x00,0x08,0x00,0x16,0x1d,0x24,0x02,0x00,0x02,
14700x27,0x84,0x89,0x18,0x0c,0x00,0x0b,0x55,0x00,0x00,0x00,0x00,0x8f,0x83,0x84,0x44,
14710xaf,0x82,0x84,0x5c,0x38,0x64,0x00,0x02,0x00,0x04,0x18,0x0a,0xaf,0x83,0x84,0x44,
14720x14,0x40,0xff,0xad,0x24,0x05,0x00,0x05,0x8f,0x82,0x89,0x58,0xaf,0x80,0x84,0x40,
14730x10,0x40,0x00,0x02,0x24,0x04,0x00,0x01,0xaf,0x84,0x84,0x48,0x93,0x82,0x89,0x66,
14740x00,0x00,0x00,0x00,0x10,0x40,0xff,0x6c,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x05,
14750x34,0x42,0x00,0x08,0x8c,0x43,0x00,0x00,0x3c,0x04,0x20,0x00,0x00,0x64,0x18,0x24,
14760x10,0x60,0xff,0x65,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0xa0,
14770x8c,0x43,0x00,0x00,0x3c,0x04,0x80,0x00,0xaf,0x80,0x89,0x40,0x24,0x63,0x00,0x01,
14780xac,0x43,0x00,0x00,0x3c,0x01,0xb0,0x05,0xac,0x24,0x00,0x08,0xaf,0x80,0x89,0x3c,
14790xaf,0x80,0x89,0x44,0xaf,0x80,0x89,0x48,0xaf,0x80,0x89,0x54,0xaf,0x80,0x89,0x4c,
14800x08,0x00,0x15,0xb6,0x00,0x00,0x00,0x00,0x83,0x82,0x84,0x90,0x00,0x00,0x00,0x00,
14810x10,0x40,0x00,0x02,0x24,0x02,0x00,0x20,0xaf,0x82,0x84,0x5c,0x8f,0x85,0x84,0x5c,
14820x27,0x84,0x89,0x18,0x0c,0x00,0x0d,0x30,0x00,0x00,0x00,0x00,0x00,0x02,0x1e,0x00,
14830xa3,0x82,0x84,0x70,0xaf,0x80,0x84,0x5c,0x10,0x60,0xff,0x8e,0x00,0x00,0x00,0x00,
14840x3c,0x02,0xb0,0x05,0x34,0x42,0x02,0x2e,0x90,0x43,0x00,0x00,0x00,0x00,0x00,0x00,
14850x30,0x63,0x00,0x01,0x30,0x63,0x00,0xff,0x00,0x60,0x10,0x21,0xa7,0x83,0x84,0x60,
14860x10,0x40,0x00,0x04,0x24,0x04,0x00,0x02,0xaf,0x84,0x84,0x48,0x08,0x00,0x15,0xfd,
14870x00,0x00,0x00,0x00,0x08,0x00,0x15,0xee,0x24,0x05,0x00,0x06,0x27,0x84,0x84,0x40,
14880x27,0x85,0x89,0x18,0x0c,0x00,0x0d,0xfd,0x00,0x00,0x00,0x00,0x8f,0x82,0x84,0x64,
14890xaf,0x80,0x84,0x6c,0x14,0x40,0x00,0x19,0x00,0x40,0x18,0x21,0x8f,0x82,0x84,0x68,
14900x00,0x00,0x00,0x00,0x14,0x40,0x00,0x15,0x24,0x02,0x00,0x02,0x8f,0x83,0x84,0x48,
14910x00,0x00,0x00,0x00,0x10,0x62,0x00,0x0b,0x3c,0x02,0x40,0x00,0x8f,0x83,0x84,0x44,
14920x24,0x02,0x00,0x01,0x10,0x62,0x00,0x02,0x24,0x05,0x00,0x03,0x24,0x05,0x00,0x06,
14930xaf,0x85,0x84,0x40,0x24,0x04,0x00,0x03,0xaf,0x84,0x84,0x48,0x08,0x00,0x15,0xb6,
14940x00,0x00,0x00,0x00,0x34,0x42,0x00,0x14,0x3c,0x01,0xb0,0x05,0xac,0x22,0x00,0x00,
14950xaf,0x80,0x84,0x40,0x08,0x00,0x16,0x96,0x24,0x04,0x00,0x03,0x10,0x60,0x00,0x10,
14960x00,0x00,0x00,0x00,0x27,0x85,0x89,0x18,0x27,0x84,0x84,0x40,0x0c,0x00,0x0e,0x21,
14970x00,0x00,0x00,0x00,0x8f,0x83,0x84,0x44,0x24,0x02,0x00,0x01,0xa3,0x80,0x84,0x70,
14980xaf,0x80,0x84,0x48,0x10,0x62,0x00,0x02,0x24,0x05,0x00,0x03,0x24,0x05,0x00,0x04,
14990xaf,0x85,0x84,0x40,0xaf,0x80,0x84,0x64,0x08,0x00,0x15,0xb6,0x00,0x00,0x00,0x00,
15000x83,0x82,0x84,0x90,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x04,0x00,0x00,0x00,0x00,
15010x27,0x84,0x89,0x18,0x0c,0x00,0x10,0x69,0x00,0x00,0x00,0x00,0x8f,0x82,0x84,0x44,
15020xa3,0x80,0x84,0x70,0xaf,0x80,0x84,0x40,0xaf,0x80,0x84,0x48,0x14,0x40,0x00,0x03,
15030x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0xaf,0x82,0x84,0x44,0xaf,0x80,0x84,0x68,
15040x08,0x00,0x15,0xb6,0x00,0x00,0x00,0x00,0x27,0x84,0x84,0x40,0x27,0x85,0x89,0x18,
15050x0c,0x00,0x0e,0x21,0x00,0x00,0x00,0x00,0x8f,0x82,0x84,0x44,0xa3,0x80,0x84,0x70,
15060xaf,0x80,0x84,0x40,0xaf,0x80,0x84,0x48,0x14,0x40,0xfe,0xeb,0x00,0x00,0x00,0x00,
15070x24,0x02,0x00,0x02,0xaf,0x82,0x84,0x44,0x08,0x00,0x15,0xb6,0x00,0x00,0x00,0x00,
15080x27,0x84,0x89,0x18,0x0c,0x00,0x10,0x69,0x00,0x00,0x00,0x00,0x08,0x00,0x16,0xc6,
15090x00,0x00,0x00,0x00,0x27,0x84,0x84,0x98,0x0c,0x00,0x29,0x73,0x00,0x00,0x00,0x00,
15100x08,0x00,0x15,0xc5,0x00,0x00,0x00,0x00,0x0c,0x00,0x24,0x05,0x00,0x00,0x00,0x00,
15110x0c,0x00,0x26,0xff,0x00,0x00,0x00,0x00,0x0c,0x00,0x18,0x11,0x00,0x00,0x00,0x00,
15120x93,0x83,0xbc,0x18,0x00,0x00,0x00,0x00,0x14,0x60,0x00,0x2b,0x3c,0x02,0xb0,0x03,
15130x34,0x42,0x01,0x08,0x8c,0x44,0x00,0x00,0x8f,0x83,0xbc,0x10,0x8f,0x82,0xbc,0x14,
15140x00,0x83,0x18,0x23,0x00,0x43,0x10,0x2b,0x10,0x40,0x00,0x23,0x3c,0x02,0xb0,0x03,
15150x24,0x04,0x05,0xa0,0x34,0x42,0x01,0x18,0x8c,0x42,0x00,0x00,0x0c,0x00,0x06,0xd1,
15160x00,0x00,0x00,0x00,0x24,0x04,0x05,0xa4,0x0c,0x00,0x06,0xd1,0x00,0x02,0x84,0x02,
15170x30,0x51,0xff,0xff,0x24,0x04,0x05,0xa8,0x00,0x02,0x94,0x02,0x0c,0x00,0x06,0xd1,
15180x3a,0x10,0xff,0xff,0x3a,0x31,0xff,0xff,0x30,0x42,0xff,0xff,0x2e,0x10,0x00,0x01,
15190x2e,0x31,0x00,0x01,0x3a,0x52,0xff,0xff,0x02,0x11,0x80,0x25,0x2e,0x52,0x00,0x01,
15200x38,0x42,0xff,0xff,0x02,0x12,0x80,0x25,0x2c,0x42,0x00,0x01,0x02,0x02,0x80,0x25,
15210x16,0x00,0x00,0x02,0x24,0x04,0x00,0x02,0x00,0x00,0x20,0x21,0x0c,0x00,0x05,0x6e,
15220x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x34,0x42,0x01,0x08,0x8c,0x43,0x00,0x00,
15230x00,0x00,0x00,0x00,0xaf,0x83,0xbc,0x10,0x0c,0x00,0x01,0xe9,0x00,0x00,0x00,0x00,
15240xaf,0x80,0x84,0x40,0xaf,0x80,0x84,0x74,0x08,0x00,0x15,0x9c,0x00,0x00,0x28,0x21,
15250x27,0x90,0xb4,0x00,0x24,0x11,0x00,0x12,0x8e,0x04,0x00,0x00,0x00,0x00,0x00,0x00,
15260x90,0x82,0x00,0x10,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x03,0x00,0x00,0x00,0x00,
15270x0c,0x00,0x18,0xd0,0x00,0x00,0x00,0x00,0x26,0x31,0xff,0xff,0x06,0x21,0xff,0xf6,
15280x26,0x10,0x00,0x04,0xaf,0x80,0x84,0x40,0x08,0x00,0x15,0xb7,0x00,0x00,0x28,0x21,
15290x3c,0x02,0xb0,0x03,0x34,0x42,0x01,0x08,0x8c,0x44,0x00,0x00,0x8f,0x82,0x84,0x38,
15300x00,0x04,0x19,0xc2,0x00,0x02,0x11,0xc2,0x10,0x62,0xff,0xf6,0x00,0x00,0x00,0x00,
15310x3c,0x02,0xb0,0x03,0x34,0x42,0x01,0x02,0x90,0x43,0x00,0x00,0x3c,0x12,0xb0,0x05,
15320xaf,0x84,0x84,0x38,0x30,0x63,0x00,0xff,0x00,0x03,0x11,0x40,0x00,0x43,0x10,0x23,
15330x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x00,0x02,0x99,0x00,0x00,0x00,0x88,0x21,
15340x36,0x52,0x02,0x2c,0x27,0x90,0xb4,0x00,0x8e,0x04,0x00,0x00,0x00,0x00,0x00,0x00,
15350x90,0x83,0x00,0x16,0x00,0x00,0x00,0x00,0x30,0x62,0x00,0x03,0x10,0x40,0x00,0x06,
15360x30,0x62,0x00,0x1c,0x14,0x40,0x00,0x04,0x00,0x00,0x00,0x00,0x8f,0x85,0x84,0x38,
15370x0c,0x00,0x1e,0x94,0x02,0x60,0x30,0x21,0x8e,0x42,0x00,0x00,0x00,0x00,0x00,0x00,
15380x30,0x42,0x00,0xff,0x14,0x40,0xff,0xd7,0x00,0x00,0x00,0x00,0x26,0x31,0x00,0x01,
15390x2a,0x22,0x00,0x13,0x14,0x40,0xff,0xec,0x26,0x10,0x00,0x04,0x08,0x00,0x17,0x21,
15400x00,0x00,0x00,0x00,0x8f,0x84,0x84,0x4c,0x27,0x85,0x89,0x18,0x0c,0x00,0x17,0xa4,
15410x00,0x00,0x00,0x00,0x8f,0x83,0x84,0x4c,0x24,0x02,0x00,0x04,0x14,0x62,0xfe,0xa5,
15420x00,0x00,0x00,0x00,0x08,0x00,0x15,0xee,0x24,0x05,0x00,0x05,0x3c,0x02,0xb0,0x03,
15430x34,0x42,0x00,0x3f,0x90,0x44,0x00,0x00,0x24,0x03,0x00,0x01,0x10,0x64,0x00,0x08,
15440x00,0x00,0x00,0x00,0x27,0x84,0x89,0x18,0x0c,0x00,0x24,0x2c,0x00,0x00,0x00,0x00,
15450x24,0x05,0x00,0x05,0xaf,0x85,0x84,0x40,0x08,0x00,0x15,0xb7,0x00,0x00,0x00,0x00,
15460x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x14,0x8c,0x44,0x00,0x00,0x0c,0x00,0x24,0x49,
15470x00,0x00,0x00,0x00,0x08,0x00,0x17,0x65,0x24,0x05,0x00,0x05,0x8f,0x82,0x89,0x4c,
15480x00,0x00,0x00,0x00,0x10,0x40,0x00,0x0d,0x00,0x00,0x00,0x00,0x8f,0x84,0xb4,0x40,
15490xaf,0x80,0x89,0x4c,0x94,0x85,0x00,0x14,0x0c,0x00,0x1b,0x66,0x00,0x00,0x00,0x00,
15500x93,0x82,0x8b,0x71,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x02,0x10,0x40,0x00,0x03,
15510x00,0x00,0x00,0x00,0x0c,0x00,0x01,0x57,0x00,0x00,0x20,0x21,0x8f,0x84,0xb4,0x40,
15520x0c,0x00,0x18,0xd0,0x00,0x00,0x00,0x00,0x08,0x00,0x17,0x21,0x00,0x00,0x00,0x00,
15530x3c,0x02,0xff,0x90,0x27,0xbd,0xff,0xe8,0x00,0x80,0x18,0x21,0x34,0x42,0x00,0x01,
15540x27,0x84,0x89,0x18,0x10,0x62,0x00,0x05,0xaf,0xbf,0x00,0x10,0x8f,0xbf,0x00,0x10,
15550x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x0c,0x00,0x06,0xe5,
15560x00,0x00,0x00,0x00,0x27,0x84,0x86,0x58,0x0c,0x00,0x18,0x1f,0x00,0x00,0x00,0x00,
15570x27,0x84,0x84,0x40,0x0c,0x00,0x13,0xd9,0x00,0x00,0x00,0x00,0x08,0x00,0x17,0x8b,
15580x00,0x00,0x00,0x00,0x8f,0x82,0x89,0x58,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x05,
15590x00,0x00,0x18,0x21,0x8f,0x82,0x84,0x48,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x02,
15600x00,0x00,0x00,0x00,0x24,0x03,0x00,0x01,0x03,0xe0,0x00,0x08,0x00,0x60,0x10,0x21,
15610x27,0xbd,0xff,0xe0,0x3c,0x06,0xb0,0x03,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,
15620x34,0xc6,0x00,0x5f,0xaf,0xbf,0x00,0x18,0x90,0xc3,0x00,0x00,0x3c,0x07,0xb0,0x03,
15630x34,0xe7,0x00,0x5d,0x34,0x63,0x00,0x01,0x3c,0x09,0xb0,0x03,0x24,0x02,0x00,0x01,
15640xa0,0xc3,0x00,0x00,0x00,0x80,0x80,0x21,0xa0,0xe2,0x00,0x00,0x00,0xa0,0x88,0x21,
15650x35,0x29,0x00,0x5e,0x00,0xe0,0x40,0x21,0x24,0x04,0x00,0x01,0x91,0x22,0x00,0x00,
15660x91,0x03,0x00,0x00,0x30,0x42,0x00,0x01,0x14,0x83,0x00,0x03,0x30,0x42,0x00,0x01,
15670x14,0x40,0xff,0xfa,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x04,0x12,0x02,0x00,0x2c,
15680x24,0x05,0x0f,0x00,0x24,0x02,0x00,0x06,0x12,0x02,0x00,0x08,0x24,0x05,0x00,0x0f,
15690x3c,0x02,0xb0,0x03,0x34,0x42,0x02,0x00,0xa0,0x50,0x00,0x00,0x8f,0xbf,0x00,0x18,
15700x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x24,0x04,0x0c,0x04,
15710x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x0f,0x24,0x04,0x0d,0x04,0x24,0x05,0x00,0x0f,
15720x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x0f,0x24,0x04,0x08,0x80,0x24,0x05,0x1e,0x00,
15730x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x0f,0x24,0x04,0x08,0x8c,0x24,0x05,0x0f,0x00,
15740x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x0f,0x24,0x04,0x08,0x24,0x3c,0x05,0x00,0x30,
15750x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x02,0x24,0x04,0x08,0x2c,0x3c,0x05,0x00,0x30,
15760x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x02,0x24,0x04,0x08,0x34,0x3c,0x05,0x00,0x30,
15770x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x02,0x24,0x04,0x08,0x3c,0x3c,0x05,0x00,0x30,
15780x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x02,0x08,0x00,0x17,0xc5,0x3c,0x02,0xb0,0x03,
15790x24,0x04,0x08,0x8c,0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x04,0x24,0x04,0x08,0x80,
15800x24,0x05,0x1e,0x00,0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x04,0x24,0x04,0x0c,0x04,
15810x24,0x05,0x00,0x0f,0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x04,0x24,0x04,0x0d,0x04,
15820x24,0x05,0x00,0x0f,0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x04,0x24,0x04,0x08,0x24,
15830x3c,0x05,0x00,0x30,0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x03,0x24,0x04,0x08,0x2c,
15840x3c,0x05,0x00,0x30,0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x03,0x24,0x04,0x08,0x34,
15850x3c,0x05,0x00,0x30,0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x02,0x3c,0x05,0x00,0x30,
15860x24,0x06,0x00,0x03,0x0c,0x00,0x13,0x5f,0x24,0x04,0x08,0x3c,0x02,0x20,0x20,0x21,
15870x24,0x05,0x00,0x14,0x0c,0x00,0x13,0xa4,0x24,0x06,0x01,0x07,0x08,0x00,0x17,0xc5,
15880x3c,0x02,0xb0,0x03,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x73,0x90,0x62,0x00,0x00,
15890x00,0x00,0x00,0x00,0x30,0x42,0x00,0x02,0x14,0x40,0x00,0x04,0x00,0x00,0x00,0x00,
15900xa3,0x80,0x81,0x58,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
15910xa3,0x82,0x81,0x58,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,
15920x3c,0x02,0x80,0x00,0x00,0x80,0x70,0x21,0x34,0x63,0x00,0x20,0x24,0x42,0x60,0x7c,
15930x3c,0x04,0xb0,0x03,0xac,0x62,0x00,0x00,0x34,0x84,0x00,0x30,0xad,0xc0,0x02,0xb8,
15940x8c,0x83,0x00,0x00,0x24,0x02,0x00,0xff,0xa5,0xc0,0x00,0x0a,0x00,0x00,0x30,0x21,
15950xa7,0x82,0x8f,0xf0,0x27,0x88,0x90,0x00,0xa5,0xc3,0x00,0x08,0x3c,0x07,0xb0,0x08,
15960x30,0xc2,0xff,0xff,0x00,0x02,0x20,0xc0,0x24,0xc3,0x00,0x01,0x00,0x82,0x10,0x21,
15970x00,0x60,0x30,0x21,0x00,0x02,0x10,0x80,0x30,0x63,0xff,0xff,0x00,0x48,0x10,0x21,
15980x00,0x87,0x20,0x21,0x28,0xc5,0x00,0xff,0xac,0x83,0x00,0x00,0x14,0xa0,0xff,0xf4,
15990xa4,0x43,0x00,0x00,0x3c,0x02,0xb0,0x08,0x34,0x03,0xff,0xff,0x25,0xc4,0x00,0x0c,
16000x24,0x0a,0x00,0x02,0x34,0x42,0x07,0xf8,0x3c,0x06,0xb0,0x03,0xa7,0x83,0xb3,0xdc,
16010xac,0x43,0x00,0x00,0xaf,0x84,0xb4,0x00,0x34,0xc6,0x00,0x64,0xa0,0x8a,0x00,0x18,
16020x94,0xc5,0x00,0x00,0x8f,0x82,0xb4,0x00,0x25,0xc4,0x00,0x30,0x24,0x08,0x00,0x03,
16030x3c,0x03,0xb0,0x03,0xa0,0x45,0x00,0x21,0x34,0x63,0x00,0x66,0xaf,0x84,0xb4,0x04,
16040xa0,0x88,0x00,0x18,0x94,0x65,0x00,0x00,0x8f,0x82,0xb4,0x04,0x25,0xc4,0x00,0x54,
16050x25,0xc7,0x00,0x78,0xa0,0x45,0x00,0x21,0xaf,0x84,0xb4,0x08,0xa0,0x88,0x00,0x18,
16060x94,0x65,0x00,0x00,0x8f,0x82,0xb4,0x08,0x25,0xc8,0x00,0x9c,0x24,0x09,0x00,0x01,
16070xa0,0x45,0x00,0x21,0xaf,0x87,0xb4,0x0c,0xa0,0xea,0x00,0x18,0x94,0xc4,0x00,0x00,
16080x8f,0x82,0xb4,0x0c,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x62,0xa0,0x44,0x00,0x21,
16090xaf,0x88,0xb4,0x10,0xa1,0x09,0x00,0x18,0x94,0x65,0x00,0x00,0x8f,0x82,0xb4,0x10,
16100x25,0xc4,0x00,0xc0,0x3c,0x06,0xb0,0x03,0xa0,0x45,0x00,0x21,0xaf,0x84,0xb4,0x14,
16110xa0,0x89,0x00,0x18,0x94,0x65,0x00,0x00,0x8f,0x82,0xb4,0x14,0x25,0xc4,0x00,0xe4,
16120x34,0xc6,0x00,0x60,0xa0,0x45,0x00,0x21,0xaf,0x84,0xb4,0x18,0xa0,0x80,0x00,0x18,
16130x94,0xc5,0x00,0x00,0x8f,0x82,0xb4,0x18,0x25,0xc3,0x01,0x08,0x25,0xc7,0x01,0x2c,
16140xa0,0x45,0x00,0x21,0xaf,0x83,0xb4,0x1c,0xa0,0x60,0x00,0x18,0x94,0xc8,0x00,0x00,
16150x8f,0x82,0xb4,0x1c,0x25,0xc4,0x01,0x50,0x25,0xc5,0x01,0x74,0xa0,0x48,0x00,0x21,
16160x25,0xc6,0x01,0x98,0x25,0xc9,0x01,0xbc,0x25,0xca,0x01,0xe0,0x25,0xcb,0x02,0x04,
16170x25,0xcc,0x02,0x28,0x25,0xcd,0x02,0x4c,0x24,0x02,0x00,0x10,0x3c,0x03,0xb0,0x03,
16180xaf,0x87,0xb4,0x20,0x34,0x63,0x00,0x38,0xa0,0xe0,0x00,0x18,0xaf,0x84,0xb4,0x24,
16190xa0,0x80,0x00,0x18,0xaf,0x85,0xb4,0x28,0xa0,0xa0,0x00,0x18,0xaf,0x86,0xb4,0x2c,
16200xa0,0xc0,0x00,0x18,0xaf,0x89,0xb4,0x30,0xa1,0x20,0x00,0x18,0xaf,0x8a,0xb4,0x34,
16210xa1,0x40,0x00,0x18,0xaf,0x8b,0xb4,0x38,0xa1,0x60,0x00,0x18,0xaf,0x8c,0xb4,0x3c,
16220xa1,0x80,0x00,0x18,0xaf,0x8d,0xb4,0x40,0xa1,0xa2,0x00,0x18,0x94,0x64,0x00,0x00,
16230x8f,0x82,0xb4,0x40,0x25,0xc5,0x02,0x70,0x3c,0x03,0xb0,0x03,0xa0,0x44,0x00,0x21,
16240x24,0x02,0x00,0x11,0xaf,0x85,0xb4,0x44,0x34,0x63,0x00,0x6e,0xa0,0xa2,0x00,0x18,
16250x94,0x64,0x00,0x00,0x8f,0x82,0xb4,0x44,0x25,0xc5,0x02,0x94,0x3c,0x03,0xb0,0x03,
16260xa0,0x44,0x00,0x21,0x24,0x02,0x00,0x12,0xaf,0x85,0xb4,0x48,0x34,0x63,0x00,0x6c,
16270xa0,0xa2,0x00,0x18,0x94,0x64,0x00,0x00,0x8f,0x82,0xb4,0x48,0x24,0x05,0xff,0xff,
16280x24,0x07,0x00,0x01,0xa0,0x44,0x00,0x21,0x24,0x06,0x00,0x12,0x27,0x84,0xb4,0x00,
16290x8c,0x82,0x00,0x00,0x24,0xc6,0xff,0xff,0xa0,0x40,0x00,0x04,0x8c,0x83,0x00,0x00,
16300xa4,0x45,0x00,0x00,0xa4,0x45,0x00,0x02,0xa0,0x60,0x00,0x0a,0x8c,0x82,0x00,0x00,
16310xa4,0x65,0x00,0x06,0xa4,0x65,0x00,0x08,0xa0,0x40,0x00,0x10,0x8c,0x83,0x00,0x00,
16320xa4,0x45,0x00,0x0c,0xa4,0x45,0x00,0x0e,0xa0,0x60,0x00,0x12,0x8c,0x82,0x00,0x00,
16330x00,0x00,0x00,0x00,0xa0,0x40,0x00,0x16,0x8c,0x83,0x00,0x00,0xa4,0x45,0x00,0x14,
16340xa0,0x67,0x00,0x17,0x8c,0x82,0x00,0x00,0x24,0x84,0x00,0x04,0xa0,0x40,0x00,0x20,
16350x04,0xc1,0xff,0xe7,0xac,0x40,0x00,0x1c,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
16360x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x00,0x34,0x42,0x00,0x20,0x24,0x63,0x63,0x40,
16370xac,0x43,0x00,0x00,0x90,0x82,0x00,0x10,0x00,0x80,0x60,0x21,0x10,0x40,0x00,0x56,
16380x00,0x00,0x70,0x21,0x97,0x82,0x8f,0xf0,0x94,0x8a,0x00,0x0c,0x27,0x87,0x90,0x00,
16390x00,0x02,0x40,0xc0,0x01,0x02,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x47,0x10,0x21,
16400x90,0x8b,0x00,0x18,0xa4,0x4a,0x00,0x00,0x94,0x83,0x00,0x0e,0x39,0x64,0x00,0x10,
16410x2c,0x84,0x00,0x01,0x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x34,0x85,0x00,0x02,
16420x39,0x63,0x00,0x11,0x00,0x83,0x28,0x0b,0x34,0xa3,0x00,0x08,0x39,0x64,0x00,0x12,
16430x00,0x02,0x10,0x80,0x00,0xa4,0x18,0x0b,0x00,0x47,0x10,0x21,0x94,0x49,0x00,0x04,
16440x34,0x64,0x00,0x20,0x00,0x6b,0x20,0x0b,0x34,0x83,0x00,0x40,0x39,0x62,0x00,0x01,
16450x00,0x82,0x18,0x0b,0x00,0x09,0x30,0xc0,0x34,0x64,0x00,0x80,0x00,0xc9,0x28,0x21,
16460x39,0x62,0x00,0x02,0x00,0x60,0x68,0x21,0x00,0x82,0x68,0x0a,0x00,0x05,0x28,0x80,
16470x3c,0x02,0xb0,0x08,0x00,0xa7,0x28,0x21,0x00,0xc2,0x30,0x21,0x01,0x02,0x40,0x21,
16480x34,0x03,0xff,0xff,0x35,0xa4,0x01,0x00,0x39,0x62,0x00,0x03,0x2d,0x67,0x00,0x13,
16490xad,0x0a,0x00,0x00,0xa4,0xa3,0x00,0x00,0xac,0xc3,0x00,0x00,0xa7,0x89,0x8f,0xf0,
16500x10,0xe0,0x00,0x0f,0x00,0x82,0x68,0x0a,0x3c,0x03,0x80,0x01,0x00,0x0b,0x10,0x80,
16510x24,0x63,0x02,0x44,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,
16520x00,0x80,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x60,
16530x94,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x14,0x00,0x00,0x02,0x74,0x03,
16540x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x3a,0x94,0x44,0x00,0x00,0x93,0x83,0x8f,0xe4,
16550x91,0x82,0x00,0x21,0x01,0xc4,0x20,0x21,0x91,0x85,0x00,0x10,0x00,0x04,0x24,0x00,
16560x00,0x62,0x18,0x21,0x00,0x04,0x74,0x03,0x00,0x6e,0x18,0x23,0x00,0x65,0x10,0x2a,
16570x00,0xa2,0x18,0x0a,0x00,0x0d,0x24,0x00,0x3c,0x02,0xb0,0x06,0x24,0x05,0xff,0xff,
16580x00,0x64,0x18,0x25,0x34,0x42,0x80,0x20,0xac,0x43,0x00,0x00,0xa5,0x85,0x00,0x0e,
16590xa1,0x80,0x00,0x10,0xa5,0x85,0x00,0x0c,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
16600x3c,0x03,0xb0,0x03,0x08,0x00,0x19,0x14,0x34,0x63,0x00,0x62,0x3c,0x03,0xb0,0x03,
16610x08,0x00,0x19,0x14,0x34,0x63,0x00,0x64,0x3c,0x03,0xb0,0x03,0x08,0x00,0x19,0x14,
16620x34,0x63,0x00,0x66,0x3c,0x03,0xb0,0x03,0x08,0x00,0x19,0x14,0x34,0x63,0x00,0x38,
16630x3c,0x03,0xb0,0x03,0x08,0x00,0x19,0x14,0x34,0x63,0x00,0x6e,0x3c,0x03,0xb0,0x03,
16640x08,0x00,0x19,0x14,0x34,0x63,0x00,0x6c,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,
16650x34,0x63,0x00,0x20,0x24,0x42,0x65,0x08,0x00,0x05,0x28,0x40,0xac,0x62,0x00,0x00,
16660x00,0xa6,0x28,0x21,0x2c,0xe2,0x00,0x10,0x14,0x80,0x00,0x06,0x00,0x00,0x18,0x21,
16670x10,0x40,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0xe0,0x18,0x21,0x03,0xe0,0x00,0x08,
16680x00,0x60,0x10,0x21,0x24,0x02,0x00,0x20,0x10,0xe2,0x00,0x06,0x2c,0xe4,0x00,0x10,
16690x24,0xa2,0x00,0x01,0x10,0x80,0xff,0xf9,0x00,0x02,0x11,0x00,0x08,0x00,0x19,0x4f,
16700x00,0x47,0x18,0x21,0x08,0x00,0x19,0x4f,0x24,0xa3,0x00,0x50,0x27,0xbd,0xff,0xc8,
16710xaf,0xb3,0x00,0x1c,0xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,0xaf,0xbf,0x00,0x30,
16720xaf,0xb7,0x00,0x2c,0xaf,0xb6,0x00,0x28,0xaf,0xb5,0x00,0x24,0xaf,0xb4,0x00,0x20,
16730xaf,0xb0,0x00,0x10,0x00,0x80,0x88,0x21,0x84,0x84,0x00,0x08,0x3c,0x05,0xb0,0x03,
16740x3c,0x02,0x80,0x00,0x34,0xa5,0x00,0x20,0x24,0x42,0x65,0x6c,0x3c,0x03,0xb0,0x06,
16750x00,0x04,0x20,0x80,0xac,0xa2,0x00,0x00,0x00,0x83,0x20,0x21,0x3c,0x06,0xb0,0x06,
16760x8c,0x82,0x00,0x00,0x34,0xc6,0x80,0x24,0x8c,0x88,0x00,0x00,0x8c,0xc4,0x00,0x00,
16770x96,0x25,0x00,0x08,0x30,0x52,0xff,0xff,0x00,0x08,0x44,0x02,0x34,0x84,0x01,0x00,
16780x3c,0x02,0xb0,0x00,0x00,0x08,0x18,0xc0,0x00,0x12,0x3a,0x00,0xac,0xc4,0x00,0x00,
16790x00,0xe2,0x38,0x21,0xae,0x32,0x02,0xb8,0x00,0x68,0x18,0x21,0x24,0xa5,0x00,0x02,
16800x8c,0xf6,0x00,0x00,0x30,0xa5,0x01,0xff,0x8c,0xf4,0x00,0x04,0x27,0x86,0x90,0x00,
16810x00,0x03,0x18,0x80,0x00,0x12,0x98,0xc0,0xa6,0x25,0x00,0x08,0x00,0x66,0x18,0x21,
16820x02,0x72,0x10,0x21,0x94,0x65,0x00,0x00,0x00,0x02,0x48,0x80,0x01,0x26,0x30,0x21,
16830x24,0x02,0xff,0xff,0x00,0x14,0x1a,0x02,0x27,0x84,0x90,0x10,0xa4,0xc2,0x00,0x02,
16840x30,0x63,0x00,0x1f,0x24,0x02,0x00,0x10,0x01,0x24,0x20,0x21,0xa4,0xc8,0x00,0x04,
16850x8c,0xf0,0x00,0x08,0xa6,0x23,0x00,0x06,0xa6,0x25,0x00,0x0a,0xa0,0x82,0x00,0x06,
16860x86,0x25,0x00,0x06,0x27,0x82,0x90,0x04,0x01,0x22,0x10,0x21,0x24,0x03,0x00,0x13,
16870x10,0xa3,0x00,0xee,0xac,0x47,0x00,0x18,0x3c,0x03,0xb0,0x03,0x34,0x63,0x01,0x00,
16880xa6,0x20,0x00,0x02,0x3c,0x02,0xb0,0x03,0x90,0x64,0x00,0x00,0x34,0x42,0x01,0x08,
16890x8c,0x45,0x00,0x00,0x00,0x10,0x1b,0xc2,0x00,0x04,0x20,0x82,0x30,0x63,0x00,0x01,
16900xac,0xc5,0x00,0x08,0x10,0x60,0x00,0xc7,0x30,0x97,0x00,0x01,0x00,0x10,0x16,0x82,
16910x30,0x46,0x00,0x01,0x00,0x10,0x12,0x02,0x00,0x10,0x19,0xc2,0x00,0x10,0x26,0x02,
16920x00,0x10,0x2e,0x42,0x30,0x48,0x00,0x7f,0x24,0x02,0x00,0x01,0x30,0x75,0x00,0x01,
16930x30,0x84,0x00,0x01,0x10,0xc2,0x00,0xb3,0x30,0xa3,0x00,0x01,0x00,0x60,0x28,0x21,
16940x0c,0x00,0x19,0x42,0x01,0x00,0x38,0x21,0x02,0x72,0x18,0x21,0x00,0x03,0x18,0x80,
16950x2c,0x46,0x00,0x54,0x27,0x85,0x90,0x10,0x27,0x84,0x90,0x08,0x00,0x06,0x10,0x0a,
16960x00,0x65,0x28,0x21,0x26,0xa6,0x00,0x02,0x00,0x64,0x18,0x21,0xa0,0xa2,0x00,0x02,
16970xa0,0x66,0x00,0x06,0xa0,0x62,0x00,0x07,0xa0,0xa2,0x00,0x01,0x02,0x72,0x28,0x21,
16980x00,0x05,0x28,0x80,0x27,0x82,0x90,0x04,0x00,0xa2,0x58,0x21,0x8d,0x64,0x00,0x18,
16990x00,0x10,0x15,0xc2,0x30,0x42,0x00,0x01,0x8c,0x83,0x00,0x0c,0x27,0x84,0x90,0x20,
17000x00,0xa4,0x48,0x21,0xa6,0x22,0x00,0x00,0xa6,0x36,0x00,0x04,0x8d,0x26,0x00,0x00,
17010x00,0x03,0x19,0x42,0x3c,0x02,0xff,0xef,0x34,0x42,0xff,0xff,0x30,0x63,0x00,0x01,
17020x00,0xc2,0x40,0x24,0x00,0x03,0x1d,0x00,0x01,0x03,0x40,0x25,0x00,0x08,0x15,0x02,
17030x00,0x14,0x19,0x82,0x00,0x14,0x25,0x82,0x00,0x10,0x34,0x42,0x00,0x10,0x3c,0x82,
17040x00,0x10,0x2c,0x02,0x30,0x42,0x00,0x01,0x30,0xcd,0x00,0x01,0x30,0x6c,0x00,0x01,
17050x30,0xe6,0x00,0x01,0x30,0x8a,0x00,0x03,0x32,0x94,0x00,0x07,0x30,0xa5,0x00,0x01,
17060xad,0x28,0x00,0x00,0x10,0x40,0x00,0x0b,0x32,0x07,0x00,0x7f,0x8d,0x64,0x00,0x18,
17070x3c,0x03,0xff,0xf0,0x34,0x63,0xff,0xff,0x8c,0x82,0x00,0x0c,0x01,0x03,0x18,0x24,
17080x00,0x02,0x13,0x82,0x30,0x42,0x00,0x0f,0x00,0x02,0x14,0x00,0x00,0x62,0x18,0x25,
17090xad,0x23,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xc2,0x00,0x6a,0x00,0x00,0x00,0x00,
17100x15,0x80,0x00,0x03,0x00,0x00,0x00,0x00,0x15,0x40,0x00,0x5b,0x24,0x02,0x00,0x01,
17110x96,0x22,0x00,0x04,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x04,0xa6,0x22,0x00,0x04,
17120x00,0xa0,0x20,0x21,0x0c,0x00,0x19,0x42,0x01,0xa0,0x28,0x21,0x02,0x72,0x18,0x21,
17130x00,0x03,0x40,0x80,0x2c,0x45,0x00,0x54,0x27,0x84,0x90,0x10,0x01,0x04,0x20,0x21,
17140x00,0x05,0x10,0x0a,0xa0,0x82,0x00,0x00,0xa0,0x80,0x00,0x04,0xa0,0x80,0x00,0x05,
17150x96,0x23,0x00,0x04,0x27,0x82,0x90,0x00,0x01,0x02,0x10,0x21,0xa4,0x43,0x00,0x06,
17160x27,0x82,0x90,0x04,0x92,0x26,0x00,0x01,0x01,0x02,0x10,0x21,0x8c,0x45,0x00,0x18,
17170x27,0x83,0x90,0x20,0x01,0x03,0x18,0x21,0xa0,0x60,0x00,0x00,0xa0,0x86,0x00,0x07,
17180x94,0xa2,0x00,0x10,0x24,0x03,0x00,0x04,0x30,0x42,0x00,0x0f,0x10,0x43,0x00,0x36,
17190x24,0xa5,0x00,0x10,0x94,0xa3,0x00,0x16,0x27,0x87,0x90,0x18,0x01,0x07,0x10,0x21,
17200xa4,0x43,0x00,0x02,0x94,0xa2,0x00,0x04,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,
17210x14,0x40,0x00,0x24,0x02,0x72,0x20,0x21,0x94,0xa2,0x00,0x00,0x24,0x03,0x00,0xa4,
17220x30,0x42,0x00,0xff,0x10,0x43,0x00,0x1f,0x00,0x00,0x00,0x00,0x94,0xa2,0x00,0x00,
17230x24,0x03,0x00,0x88,0x30,0x42,0x00,0x88,0x10,0x43,0x00,0x14,0x02,0x72,0x18,0x21,
17240x27,0x84,0x90,0x20,0x00,0x03,0x18,0x80,0x00,0x64,0x18,0x21,0x8c,0x62,0x00,0x00,
17250x3c,0x04,0x00,0x80,0x00,0x44,0x10,0x25,0xac,0x62,0x00,0x00,0x02,0x72,0x10,0x21,
17260x00,0x02,0x10,0x80,0x00,0x47,0x10,0x21,0xa0,0x54,0x00,0x00,0x8f,0xbf,0x00,0x30,
17270x7b,0xb6,0x01,0x7c,0x7b,0xb4,0x01,0x3c,0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,
17280x24,0x02,0x00,0x01,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x38,0x94,0xa2,0x00,0x18,
17290x00,0x00,0x00,0x00,0x30,0x42,0x00,0x60,0x10,0x40,0xff,0xe9,0x02,0x72,0x18,0x21,
17300x02,0x72,0x20,0x21,0x27,0x82,0x90,0x20,0x00,0x04,0x20,0x80,0x00,0x82,0x20,0x21,
17310x8c,0x83,0x00,0x00,0x3c,0x02,0xff,0x7f,0x34,0x42,0xff,0xff,0x00,0x62,0x18,0x24,
17320x08,0x00,0x1a,0x37,0xac,0x83,0x00,0x00,0x27,0x87,0x90,0x18,0x01,0x07,0x10,0x21,
17330x08,0x00,0x1a,0x21,0xa4,0x40,0x00,0x02,0x11,0x42,0x00,0x07,0x00,0x00,0x00,0x00,
17340x2d,0x42,0x00,0x02,0x14,0x40,0xff,0xa7,0x00,0xa0,0x20,0x21,0x96,0x22,0x00,0x04,
17350x08,0x00,0x19,0xff,0x24,0x42,0x00,0x0c,0x96,0x22,0x00,0x04,0x08,0x00,0x19,0xff,
17360x24,0x42,0x00,0x08,0x16,0xe6,0xff,0x96,0x3c,0x02,0xff,0xfb,0x8d,0x63,0x00,0x18,
17370x34,0x42,0xff,0xff,0x02,0x02,0x10,0x24,0xac,0x62,0x00,0x08,0x08,0x00,0x19,0xf8,
17380x00,0x00,0x30,0x21,0x16,0xe6,0xff,0x4e,0x00,0x60,0x28,0x21,0x3c,0x02,0xfb,0xff,
17390x34,0x42,0xff,0xff,0x02,0x02,0x10,0x24,0xac,0xe2,0x00,0x08,0x08,0x00,0x19,0xb7,
17400x00,0x00,0x30,0x21,0x93,0x87,0xbb,0x14,0x00,0x10,0x1e,0x42,0x00,0x10,0x26,0x82,
17410x27,0x82,0x90,0x08,0x2c,0xe5,0x00,0x0c,0x01,0x22,0x48,0x21,0x30,0x63,0x00,0x01,
17420x30,0x86,0x00,0x01,0x14,0xa0,0x00,0x06,0x00,0xe0,0x40,0x21,0x00,0x03,0x10,0x40,
17430x00,0x46,0x10,0x21,0x00,0x02,0x11,0x00,0x00,0xe2,0x10,0x21,0x24,0x48,0x00,0x04,
17440x02,0x72,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x84,0x90,0x10,0x27,0x83,0x90,0x08,
17450x00,0x44,0x20,0x21,0x00,0x43,0x10,0x21,0xa1,0x28,0x00,0x07,0xa0,0x40,0x00,0x06,
17460xa0,0x80,0x00,0x02,0x08,0x00,0x19,0xc7,0xa0,0x80,0x00,0x01,0x24,0x02,0x00,0x01,
17470xa6,0x22,0x00,0x02,0x0c,0x00,0x01,0xc2,0x00,0xe0,0x20,0x21,0x08,0x00,0x1a,0x3b,
17480x00,0x00,0x00,0x00,0x30,0xa7,0xff,0xff,0x00,0x07,0x18,0xc0,0x00,0x67,0x18,0x21,
17490x3c,0x06,0xb0,0x03,0x3c,0x02,0x80,0x00,0x24,0x42,0x6a,0x44,0x27,0x85,0x90,0x10,
17500x00,0x03,0x18,0x80,0x34,0xc6,0x00,0x20,0x00,0x65,0x18,0x21,0xac,0xc2,0x00,0x00,
17510x80,0x62,0x00,0x07,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x29,0x00,0x80,0x28,0x21,
17520x90,0x82,0x00,0x16,0x00,0x00,0x00,0x00,0x34,0x42,0x00,0x02,0x30,0x43,0x00,0x01,
17530x14,0x60,0x00,0x02,0xa0,0x82,0x00,0x16,0xa0,0x80,0x00,0x17,0x90,0xa2,0x00,0x04,
17540x3c,0x03,0xb0,0x03,0x27,0x86,0x90,0x00,0x14,0x40,0x00,0x06,0x34,0x63,0x00,0x20,
17550x24,0x02,0x00,0x01,0xa0,0xa2,0x00,0x04,0xa4,0xa7,0x00,0x02,0x03,0xe0,0x00,0x08,
17560xa4,0xa7,0x00,0x00,0x94,0xa4,0x00,0x02,0x3c,0x02,0x80,0x01,0x24,0x42,0x82,0x6c,
17570xac,0x62,0x00,0x00,0x00,0x04,0x18,0xc0,0x00,0x64,0x18,0x21,0x00,0x03,0x18,0x80,
17580x00,0x66,0x18,0x21,0x94,0x62,0x00,0x04,0xa4,0x67,0x00,0x02,0x3c,0x03,0xb0,0x08,
17590x00,0x02,0x20,0xc0,0x00,0x82,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x46,0x10,0x21,
17600x00,0x83,0x20,0x21,0xa4,0x47,0x00,0x00,0xac,0x87,0x00,0x00,0x90,0xa2,0x00,0x04,
17610xa4,0xa7,0x00,0x02,0x24,0x42,0x00,0x01,0x03,0xe0,0x00,0x08,0xa0,0xa2,0x00,0x04,
17620x90,0x82,0x00,0x16,0x24,0x85,0x00,0x06,0x34,0x42,0x00,0x01,0x30,0x43,0x00,0x02,
17630x14,0x60,0xff,0xda,0xa0,0x82,0x00,0x16,0x24,0x02,0x00,0x01,0x08,0x00,0x1a,0xa7,
17640xa0,0x82,0x00,0x17,0x27,0xbd,0xff,0xe8,0xaf,0xbf,0x00,0x10,0x00,0x80,0x38,0x21,
17650x84,0x84,0x00,0x02,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x3c,0x0a,0xb0,0x06,
17660x34,0x63,0x00,0x20,0x24,0x42,0x6b,0x44,0x3c,0x0b,0xb0,0x08,0x27,0x89,0x90,0x00,
17670x34,0x0c,0xff,0xff,0x35,0x4a,0x80,0x20,0x10,0x80,0x00,0x30,0xac,0x62,0x00,0x00,
17680x97,0x82,0x8f,0xf0,0x94,0xe6,0x02,0xba,0x00,0x02,0x18,0xc0,0x00,0x6b,0x28,0x21,
17690xac,0xa6,0x00,0x00,0x8c,0xe4,0x02,0xb8,0x00,0x62,0x18,0x21,0x00,0x03,0x18,0x80,
17700x00,0x04,0x10,0xc0,0x00,0x44,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x49,0x10,0x21,
17710x94,0x48,0x00,0x04,0x00,0x69,0x18,0x21,0xa4,0x66,0x00,0x00,0x00,0x08,0x28,0xc0,
17720x00,0xab,0x10,0x21,0xac,0x4c,0x00,0x00,0x8c,0xe4,0x02,0xb8,0x27,0x82,0x90,0x04,
17730x00,0xa8,0x28,0x21,0x00,0x04,0x18,0xc0,0x00,0x64,0x18,0x21,0x00,0x03,0x18,0x80,
17740x00,0x62,0x10,0x21,0x8c,0x46,0x00,0x18,0x27,0x84,0x90,0x10,0x00,0x64,0x18,0x21,
17750x8c,0xc2,0x00,0x00,0x80,0x67,0x00,0x06,0x00,0x05,0x28,0x80,0x30,0x42,0xff,0xff,
17760x00,0x47,0x10,0x21,0x30,0x43,0x00,0xff,0x00,0x03,0x18,0x2b,0x00,0x02,0x12,0x02,
17770x00,0x43,0x10,0x21,0x3c,0x04,0x00,0x04,0x00,0xa9,0x28,0x21,0x00,0x44,0x10,0x25,
17780xa4,0xac,0x00,0x00,0xad,0x42,0x00,0x00,0xa7,0x88,0x8f,0xf0,0x8f,0xbf,0x00,0x10,
17790x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x84,0xe3,0x00,0x06,
17800x27,0x82,0xb4,0x00,0x94,0xe5,0x02,0xba,0x00,0x03,0x18,0x80,0x00,0x62,0x18,0x21,
17810x8c,0x64,0x00,0x00,0x0c,0x00,0x1a,0x91,0x00,0x00,0x00,0x00,0x08,0x00,0x1b,0x0b,
17820x00,0x00,0x00,0x00,0x94,0x88,0x00,0x00,0x00,0x80,0x58,0x21,0x27,0x8a,0x90,0x00,
17830x00,0x08,0x18,0xc0,0x00,0x68,0x18,0x21,0x3c,0x04,0xb0,0x03,0x00,0x03,0x18,0x80,
17840x3c,0x02,0x80,0x00,0x00,0x6a,0x18,0x21,0x34,0x84,0x00,0x20,0x24,0x42,0x6c,0x64,
17850x30,0xa5,0xff,0xff,0xac,0x82,0x00,0x00,0x94,0x67,0x00,0x02,0x11,0x05,0x00,0x35,
17860x24,0x04,0x00,0x01,0x91,0x66,0x00,0x04,0x00,0x00,0x00,0x00,0x00,0x86,0x10,0x2a,
17870x10,0x40,0x00,0x10,0x00,0xc0,0x48,0x21,0x3c,0x0d,0xb0,0x03,0x01,0x40,0x60,0x21,
17880x35,0xad,0x00,0x20,0x10,0xe5,0x00,0x0d,0x24,0x84,0x00,0x01,0x00,0x07,0x10,0xc0,
17890x00,0x47,0x10,0x21,0x00,0x02,0x10,0x80,0x01,0x20,0x30,0x21,0x00,0x4a,0x10,0x21,
17900x00,0x86,0x18,0x2a,0x00,0xe0,0x40,0x21,0x94,0x47,0x00,0x02,0x14,0x60,0xff,0xf5,
17910x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x10,0x21,0x00,0x08,0x20,0xc0,
17920x00,0x88,0x20,0x21,0x24,0xc2,0xff,0xff,0x00,0x04,0x20,0x80,0xa1,0x62,0x00,0x04,
17930x00,0x8c,0x20,0x21,0x94,0x83,0x00,0x04,0x00,0x07,0x10,0xc0,0x00,0x47,0x10,0x21,
17940x00,0x02,0x10,0x80,0x00,0x4c,0x10,0x21,0x00,0x03,0x28,0xc0,0x94,0x46,0x00,0x02,
17950x00,0xa3,0x18,0x21,0x00,0x03,0x18,0x80,0x00,0x6c,0x18,0x21,0xa4,0x66,0x00,0x00,
17960xa4,0x86,0x00,0x02,0x95,0x64,0x00,0x02,0x3c,0x03,0xb0,0x08,0x3c,0x02,0x80,0x01,
17970x00,0xa3,0x28,0x21,0x24,0x42,0x82,0x6c,0xad,0xa2,0x00,0x00,0x10,0x87,0x00,0x03,
17980xac,0xa6,0x00,0x00,0x03,0xe0,0x00,0x08,0x24,0x02,0x00,0x01,0x08,0x00,0x1b,0x59,
17990xa5,0x68,0x00,0x02,0x91,0x62,0x00,0x04,0xa5,0x67,0x00,0x00,0x24,0x42,0xff,0xff,
18000x30,0x43,0x00,0xff,0x14,0x60,0xff,0xf7,0xa1,0x62,0x00,0x04,0x24,0x02,0xff,0xff,
18010x08,0x00,0x1b,0x59,0xa5,0x62,0x00,0x02,0x00,0x05,0x40,0xc0,0x01,0x05,0x30,0x21,
18020x27,0xbd,0xff,0xd8,0x00,0x06,0x30,0x80,0x27,0x82,0x90,0x04,0xaf,0xb2,0x00,0x18,
18030xaf,0xb1,0x00,0x14,0xaf,0xbf,0x00,0x20,0xaf,0xb3,0x00,0x1c,0xaf,0xb0,0x00,0x10,
18040x00,0xc2,0x10,0x21,0x8c,0x47,0x00,0x18,0x00,0xa0,0x90,0x21,0x3c,0x02,0x80,0x00,
18050x3c,0x05,0xb0,0x03,0x34,0xa5,0x00,0x20,0x24,0x42,0x6d,0x98,0xac,0xa2,0x00,0x00,
18060x27,0x83,0x90,0x10,0x00,0xc3,0x30,0x21,0x8c,0xe2,0x00,0x00,0x80,0xc5,0x00,0x06,
18070x00,0x80,0x88,0x21,0x30,0x42,0xff,0xff,0x00,0x45,0x10,0x21,0x30,0x43,0x00,0xff,
18080x10,0x60,0x00,0x02,0x00,0x02,0x12,0x02,0x24,0x42,0x00,0x01,0x30,0x53,0x00,0xff,
18090x01,0x12,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x90,0x10,0x00,0x43,0x10,0x21,
18100x80,0x44,0x00,0x07,0x00,0x00,0x00,0x00,0x10,0x80,0x00,0x4b,0x26,0x24,0x00,0x06,
18110x32,0x50,0xff,0xff,0x02,0x20,0x20,0x21,0x0c,0x00,0x1b,0x19,0x02,0x00,0x28,0x21,
18120x92,0x22,0x00,0x10,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x2e,0x3c,0x03,0xb0,0x08,
18130x3c,0x09,0x80,0x01,0x27,0x88,0x90,0x00,0xa6,0x32,0x00,0x0c,0x00,0x10,0x20,0xc0,
18140x00,0x90,0x20,0x21,0x00,0x04,0x20,0x80,0x00,0x88,0x20,0x21,0x94,0x82,0x00,0x04,
18150x3c,0x03,0xb0,0x08,0x3c,0x07,0xb0,0x03,0x00,0x02,0x28,0xc0,0x00,0xa2,0x10,0x21,
18160x00,0x02,0x10,0x80,0x00,0x48,0x10,0x21,0x00,0xa3,0x28,0x21,0x25,0x26,0x82,0x6c,
18170x34,0x03,0xff,0xff,0x34,0xe7,0x00,0x20,0xac,0xe6,0x00,0x00,0xa4,0x83,0x00,0x02,
18180xa4,0x43,0x00,0x00,0xac,0xa3,0x00,0x00,0x92,0x22,0x00,0x10,0x92,0x23,0x00,0x0a,
18190xa6,0x32,0x00,0x0e,0x02,0x62,0x10,0x21,0x14,0x60,0x00,0x05,0xa2,0x22,0x00,0x10,
18200x92,0x22,0x00,0x16,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xfe,0xa2,0x22,0x00,0x16,
18210x92,0x22,0x00,0x04,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x05,0x00,0x00,0x00,0x00,
18220x92,0x22,0x00,0x16,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xfd,0xa2,0x22,0x00,0x16,
18230x8f,0xbf,0x00,0x20,0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,
18240x27,0xbd,0x00,0x28,0x96,0x22,0x00,0x0e,0x27,0x88,0x90,0x00,0x00,0x02,0x20,0xc0,
18250x00,0x82,0x20,0x21,0x00,0x04,0x20,0x80,0x00,0x88,0x20,0x21,0x94,0x82,0x00,0x04,
18260x3c,0x06,0xb0,0x03,0x3c,0x09,0x80,0x01,0x00,0x02,0x28,0xc0,0x00,0xa2,0x10,0x21,
18270x00,0x02,0x10,0x80,0x00,0xa3,0x28,0x21,0x00,0x48,0x10,0x21,0x34,0xc6,0x00,0x20,
18280x25,0x23,0x82,0x6c,0xac,0xc3,0x00,0x00,0xa4,0x50,0x00,0x00,0xac,0xb0,0x00,0x00,
18290x08,0x00,0x1b,0x97,0xa4,0x90,0x00,0x02,0x08,0x00,0x1b,0x8e,0x32,0x50,0xff,0xff,
18300x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,0x24,0x42,0x6f,0x60,0x34,0x63,0x00,0x20,
18310xac,0x62,0x00,0x00,0x90,0x82,0x00,0x04,0x97,0xaa,0x00,0x12,0x00,0x80,0x60,0x21,
18320x30,0xa8,0xff,0xff,0x00,0x4a,0x20,0x23,0x34,0x09,0xff,0xff,0x30,0xcf,0xff,0xff,
18330x30,0xee,0xff,0xff,0x11,0x09,0x00,0x73,0xa1,0x84,0x00,0x04,0x00,0x0e,0xc0,0xc0,
18340x00,0x08,0x10,0xc0,0x00,0x48,0x10,0x21,0x03,0x0e,0x20,0x21,0x27,0x8d,0x90,0x00,
18350x00,0x04,0x20,0x80,0x00,0x02,0x10,0x80,0x00,0x4d,0x10,0x21,0x00,0x8d,0x20,0x21,
18360x94,0x86,0x00,0x02,0x94,0x43,0x00,0x04,0x3c,0x19,0x80,0x01,0xa4,0x46,0x00,0x02,
18370x00,0x03,0x28,0xc0,0x00,0xa3,0x18,0x21,0x94,0x87,0x00,0x02,0x3c,0x02,0xb0,0x08,
18380x00,0x03,0x18,0x80,0x00,0xa2,0x28,0x21,0x00,0x6d,0x18,0x21,0x27,0x22,0x82,0x6c,
18390x3c,0x01,0xb0,0x03,0xac,0x22,0x00,0x20,0xa4,0x66,0x00,0x00,0x10,0xe9,0x00,0x57,
18400xac,0xa6,0x00,0x00,0x01,0xe0,0x30,0x21,0x11,0x40,0x00,0x1d,0x00,0x00,0x48,0x21,
18410x01,0x40,0x38,0x21,0x27,0x8b,0x90,0x04,0x27,0x8a,0x90,0x10,0x00,0x06,0x40,0xc0,
18420x01,0x06,0x18,0x21,0x00,0x03,0x18,0x80,0x00,0x6b,0x10,0x21,0x8c,0x44,0x00,0x18,
18430x00,0x6a,0x18,0x21,0x80,0x65,0x00,0x06,0x8c,0x82,0x00,0x00,0x00,0x00,0x00,0x00,
18440x30,0x42,0xff,0xff,0x00,0x45,0x10,0x21,0x30,0x44,0x00,0xff,0x00,0x02,0x12,0x02,
18450x01,0x22,0x18,0x21,0x24,0x62,0x00,0x01,0x14,0x80,0x00,0x02,0x30,0x49,0x00,0xff,
18460x30,0x69,0x00,0xff,0x01,0x06,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x4d,0x10,0x21,
18470x24,0xe7,0xff,0xff,0x94,0x46,0x00,0x02,0x14,0xe0,0xff,0xe9,0x00,0x06,0x40,0xc0,
18480x91,0x82,0x00,0x10,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x20,0x3c,0x06,0xb0,0x03,
18490xa5,0x8f,0x00,0x0c,0x03,0x0e,0x20,0x21,0x00,0x04,0x20,0x80,0x00,0x8d,0x20,0x21,
18500x94,0x82,0x00,0x04,0x3c,0x03,0xb0,0x08,0x3c,0x07,0xb0,0x03,0x00,0x02,0x28,0xc0,
18510x00,0xa2,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x4d,0x10,0x21,0x00,0xa3,0x28,0x21,
18520x27,0x26,0x82,0x6c,0x34,0x03,0xff,0xff,0x34,0xe7,0x00,0x20,0xac,0xe6,0x00,0x00,
18530xa4,0x83,0x00,0x02,0xa4,0x43,0x00,0x00,0xac,0xa3,0x00,0x00,0x91,0x82,0x00,0x10,
18540x91,0x83,0x00,0x04,0xa5,0x8e,0x00,0x0e,0x01,0x22,0x10,0x21,0x14,0x60,0x00,0x05,
18550xa1,0x82,0x00,0x10,0x91,0x82,0x00,0x16,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0xfd,
18560xa1,0x82,0x00,0x16,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x95,0x82,0x00,0x0e,
18570x3c,0x03,0xb0,0x08,0x00,0x02,0x20,0xc0,0x00,0x82,0x20,0x21,0x00,0x04,0x20,0x80,
18580x00,0x8d,0x20,0x21,0x94,0x82,0x00,0x04,0x34,0xc6,0x00,0x20,0x27,0x27,0x82,0x6c,
18590x00,0x02,0x28,0xc0,0x00,0xa2,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0xa3,0x28,0x21,
18600x00,0x4d,0x10,0x21,0xac,0xc7,0x00,0x00,0xa4,0x8f,0x00,0x02,0xa4,0x4f,0x00,0x00,
18610xac,0xaf,0x00,0x00,0x08,0x00,0x1c,0x26,0x03,0x0e,0x20,0x21,0x08,0x00,0x1c,0x01,
18620xa5,0x88,0x00,0x02,0x00,0x0e,0xc0,0xc0,0x03,0x0e,0x10,0x21,0x00,0x02,0x10,0x80,
18630x27,0x8d,0x90,0x00,0x00,0x4d,0x10,0x21,0x94,0x43,0x00,0x02,0x30,0x84,0x00,0xff,
18640x14,0x80,0x00,0x05,0xa5,0x83,0x00,0x00,0x24,0x02,0xff,0xff,0x3c,0x19,0x80,0x01,
18650x08,0x00,0x1c,0x01,0xa5,0x82,0x00,0x02,0x08,0x00,0x1c,0x01,0x3c,0x19,0x80,0x01,
18660x3c,0x08,0xb0,0x03,0x3c,0x02,0x80,0x00,0x27,0xbd,0xff,0x78,0x35,0x08,0x00,0x20,
18670x24,0x42,0x71,0xa0,0xaf,0xb2,0x00,0x68,0xaf,0xb1,0x00,0x64,0xaf,0xb0,0x00,0x60,
18680xad,0x02,0x00,0x00,0xaf,0xbf,0x00,0x84,0xaf,0xbe,0x00,0x80,0xaf,0xb7,0x00,0x7c,
18690xaf,0xb6,0x00,0x78,0xaf,0xb5,0x00,0x74,0xaf,0xb4,0x00,0x70,0xaf,0xb3,0x00,0x6c,
18700xaf,0xa4,0x00,0x88,0x90,0x83,0x00,0x0a,0x27,0x82,0xb4,0x00,0xaf,0xa6,0x00,0x90,
18710x00,0x03,0x18,0x80,0x00,0x62,0x18,0x21,0x8c,0x63,0x00,0x00,0xaf,0xa7,0x00,0x94,
18720x27,0x86,0x90,0x04,0xaf,0xa3,0x00,0x1c,0x94,0x63,0x00,0x14,0x30,0xb1,0xff,0xff,
18730x24,0x08,0x00,0x01,0x00,0x03,0x20,0xc0,0xaf,0xa3,0x00,0x18,0x00,0x83,0x18,0x21,
18740xaf,0xa4,0x00,0x54,0x00,0x03,0x18,0x80,0x27,0x84,0x90,0x10,0x00,0x64,0x20,0x21,
18750x80,0x82,0x00,0x06,0x00,0x66,0x18,0x21,0x8c,0x66,0x00,0x18,0x24,0x42,0x00,0x02,
18760x00,0x02,0x1f,0xc2,0x8c,0xc4,0x00,0x08,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x43,
18770x00,0x02,0x10,0x40,0x00,0x04,0x2f,0xc2,0x00,0x04,0x1c,0x82,0x00,0xc2,0x38,0x21,
18780x00,0x04,0x24,0x42,0x8f,0xa2,0x00,0x1c,0x30,0x63,0x00,0x01,0x30,0x84,0x00,0x01,
18790xaf,0xa5,0x00,0x3c,0xaf,0xa3,0x00,0x34,0xaf,0xa4,0x00,0x38,0xaf,0xa0,0x00,0x40,
18800xaf,0xa0,0x00,0x44,0xaf,0xa0,0x00,0x50,0xaf,0xa8,0x00,0x20,0x80,0x42,0x00,0x12,
18810x8f,0xb2,0x00,0x18,0xaf,0xa2,0x00,0x28,0x8c,0xd0,0x00,0x0c,0x14,0xa0,0x01,0xe4,
18820x00,0x60,0x30,0x21,0x00,0x10,0x10,0x82,0x30,0x45,0x00,0x07,0x10,0xa0,0x00,0x11,
18830xaf,0xa0,0x00,0x30,0x8f,0xa4,0x00,0x98,0x27,0x82,0x80,0x1c,0x00,0x04,0x18,0x40,
18840x00,0x62,0x18,0x21,0x24,0xa2,0x00,0x06,0x8f,0xa5,0x00,0x20,0x94,0x64,0x00,0x00,
18850x00,0x45,0x10,0x04,0x00,0x44,0x00,0x1a,0x14,0x80,0x00,0x02,0x00,0x00,0x00,0x00,
18860x00,0x07,0x00,0x0d,0x00,0x00,0x10,0x12,0x24,0x42,0x00,0x20,0x30,0x42,0xff,0xfc,
18870xaf,0xa2,0x00,0x30,0x8f,0xa3,0x00,0x18,0x8f,0xa4,0x00,0x28,0x34,0x02,0xff,0xff,
18880xaf,0xa0,0x00,0x2c,0xaf,0xa2,0x00,0x48,0xaf,0xa3,0x00,0x4c,0x00,0x60,0xf0,0x21,
18890x00,0x00,0xb8,0x21,0x18,0x80,0x00,0x48,0xaf,0xa0,0x00,0x24,0x00,0x11,0x89,0x02,
18900xaf,0xb1,0x00,0x58,0x00,0x80,0xa8,0x21,0x00,0x12,0x10,0xc0,0x00,0x52,0x18,0x21,
18910x00,0x03,0x80,0x80,0x27,0x85,0x90,0x00,0x02,0x40,0x20,0x21,0x00,0x40,0xa0,0x21,
18920x02,0x05,0x10,0x21,0x94,0x56,0x00,0x02,0x0c,0x00,0x12,0x8b,0x00,0x00,0x28,0x21,
18930x90,0x42,0x00,0x00,0x24,0x03,0x00,0x08,0x30,0x42,0x00,0x0c,0x10,0x43,0x01,0x9e,
18940x24,0x04,0x00,0x01,0x24,0x02,0x00,0x01,0x10,0x82,0x01,0x7c,0x3c,0x02,0xb0,0x03,
18950x8f,0xa6,0x00,0x88,0x34,0x42,0x01,0x04,0x84,0xc5,0x00,0x0c,0x02,0x92,0x18,0x21,
18960x94,0x46,0x00,0x00,0x00,0x05,0x20,0xc0,0x00,0x85,0x20,0x21,0x00,0x03,0x18,0x80,
18970x27,0x82,0x90,0x10,0x27,0x85,0x90,0x08,0x00,0x65,0x28,0x21,0x00,0x62,0x18,0x21,
18980x80,0x71,0x00,0x05,0x80,0x73,0x00,0x04,0x8f,0xa3,0x00,0x88,0x30,0xd0,0xff,0xff,
18990x00,0x10,0x3a,0x03,0x32,0x08,0x00,0xff,0x27,0x82,0x90,0x20,0x00,0x04,0x20,0x80,
19000x80,0xa6,0x00,0x06,0x00,0x82,0x20,0x21,0xa4,0x67,0x00,0x44,0xa4,0x68,0x00,0x46,
19010x8c,0x84,0x00,0x00,0x38,0xc6,0x00,0x00,0x01,0x00,0x80,0x21,0x00,0x04,0x15,0x02,
19020x30,0x42,0x00,0x01,0x10,0x40,0x00,0x03,0x00,0xe6,0x80,0x0a,0x00,0x04,0x14,0x02,
19030x30,0x50,0x00,0x0f,0x12,0x20,0x01,0x50,0x02,0x40,0x20,0x21,0x02,0x71,0x10,0x21,
19040x00,0x50,0x10,0x2a,0x14,0x40,0x00,0xed,0x02,0x92,0x10,0x21,0x93,0x82,0x8b,0x71,
19050x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,0x14,0x40,0x00,0xe0,0x02,0x92,0x28,0x21,
19060x26,0xe2,0x00,0x01,0x30,0x57,0xff,0xff,0x02,0x40,0xf0,0x21,0x26,0xb5,0xff,0xff,
19070x16,0xa0,0xff,0xbd,0x02,0xc0,0x90,0x21,0x16,0xe0,0x00,0xd0,0x00,0x00,0x00,0x00,
19080x8f,0xa3,0x00,0x98,0x00,0x00,0x00,0x00,0x2c,0x62,0x00,0x10,0x10,0x40,0x00,0x2e,
19090x00,0x00,0x00,0x00,0x8f,0xa4,0x00,0x24,0x00,0x00,0x00,0x00,0x18,0x80,0x00,0x2a,
19100x24,0x03,0x00,0x01,0x8f,0xa5,0x00,0x1c,0x27,0x84,0x90,0x04,0x94,0xb2,0x00,0x14,
19110xa0,0xa3,0x00,0x12,0x8f,0xa6,0x00,0x3c,0x00,0x12,0x10,0xc0,0x00,0x52,0x10,0x21,
19120x00,0x02,0x80,0x80,0x27,0x82,0x90,0x10,0x02,0x02,0x10,0x21,0x80,0x43,0x00,0x06,
19130x02,0x04,0x20,0x21,0x8c,0x85,0x00,0x18,0x24,0x63,0x00,0x02,0x00,0x03,0x17,0xc2,
19140x00,0x62,0x18,0x21,0x00,0x03,0x18,0x43,0x00,0x03,0x18,0x40,0x14,0xc0,0x00,0x0e,
19150x00,0xa3,0x38,0x21,0x27,0x82,0x90,0x00,0x02,0x02,0x10,0x21,0x94,0x43,0x00,0x06,
19160x8f,0xa8,0x00,0x1c,0x24,0x02,0x00,0x01,0xa5,0x03,0x00,0x1a,0x7b,0xbe,0x04,0x3c,
19170x7b,0xb6,0x03,0xfc,0x7b,0xb4,0x03,0xbc,0x7b,0xb2,0x03,0x7c,0x7b,0xb0,0x03,0x3c,
19180x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x88,0x8f,0xa4,0x00,0x98,0x8f,0xa5,0x00,0x38,
19190x8f,0xa6,0x00,0x34,0xaf,0xa0,0x00,0x10,0x0c,0x00,0x09,0x0a,0xaf,0xa0,0x00,0x14,
19200x08,0x00,0x1d,0x2d,0x00,0x00,0x00,0x00,0x8f,0xa3,0x00,0x44,0x93,0x82,0x81,0x58,
19210x00,0x00,0x00,0x00,0x10,0x40,0x00,0x61,0x30,0x69,0x00,0x03,0x8f,0xa4,0x00,0x24,
19220x8f,0xa5,0x00,0x28,0x00,0x00,0x00,0x00,0x00,0x85,0x10,0x2a,0x10,0x40,0x00,0x8f,
19230x00,0x00,0x00,0x00,0x8f,0xa6,0x00,0x1c,0x00,0x00,0x00,0x00,0x90,0xc4,0x00,0x04,
19240x00,0x00,0x00,0x00,0x30,0x83,0x00,0xff,0x00,0xa3,0x10,0x2a,0x10,0x40,0x00,0x87,
19250x00,0x00,0x00,0x00,0x8f,0xa8,0x00,0x24,0x00,0x00,0x00,0x00,0x11,0x00,0x00,0x83,
19260x00,0x65,0x10,0x23,0x00,0xa8,0x18,0x23,0x00,0x62,0x10,0x2a,0x14,0x40,0x00,0x7d,
19270x30,0x63,0x00,0xff,0x00,0x85,0x10,0x23,0x30,0x42,0x00,0xff,0xaf,0xa2,0x00,0x50,
19280x8f,0xa2,0x00,0x50,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x73,0x00,0x00,0xa8,0x21,
19290x27,0x8c,0x90,0x00,0x3c,0x0b,0x80,0xff,0x24,0x10,0x00,0x04,0x27,0x91,0x90,0x04,
19300x35,0x6b,0xff,0xff,0x3c,0x0d,0x7f,0x00,0x27,0x8e,0x90,0x10,0x01,0x80,0x78,0x21,
19310x00,0x12,0x30,0xc0,0x00,0xd2,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x4c,0x10,0x21,
19320x94,0x42,0x00,0x06,0x8f,0xa3,0x00,0x2c,0x8f,0xa4,0x00,0x30,0xaf,0xa2,0x00,0x44,
19330x8f,0xa5,0x00,0x44,0x30,0x49,0x00,0x03,0x02,0x09,0x10,0x23,0x30,0x42,0x00,0x03,
19340x00,0xa2,0x10,0x21,0x8f,0xa8,0x00,0x30,0x24,0x42,0x00,0x04,0x30,0x42,0xff,0xff,
19350x00,0x64,0x38,0x21,0x01,0x02,0x28,0x23,0x00,0x62,0x18,0x21,0x00,0x48,0x10,0x2b,
19360x10,0x40,0x00,0x52,0x00,0x00,0x20,0x21,0x30,0xe7,0xff,0xff,0x30,0xa4,0xff,0xff,
19370xaf,0xa7,0x00,0x2c,0x00,0xd2,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x51,0x18,0x21,
19380x8c,0x65,0x00,0x18,0x00,0x04,0x25,0x40,0x00,0x8d,0x20,0x24,0x8c,0xa8,0x00,0x04,
19390x00,0x4e,0x18,0x21,0x00,0x4f,0x50,0x21,0x01,0x0b,0x40,0x24,0x01,0x04,0x40,0x25,
19400xac,0xa8,0x00,0x04,0x8f,0xa4,0x00,0x98,0x8f,0xa2,0x00,0x50,0x26,0xb5,0x00,0x01,
19410xa0,0x64,0x00,0x00,0x8c,0xa4,0x00,0x08,0x00,0x00,0x00,0x00,0x04,0x81,0x00,0x0c,
19420x02,0xa2,0x30,0x2a,0x80,0x62,0x00,0x06,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x02,
19430x00,0x02,0x1f,0xc2,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x43,0x00,0x02,0x10,0x40,
19440x00,0xa2,0x38,0x21,0x8f,0xa5,0x00,0x40,0x00,0x00,0x00,0x00,0xa4,0xe5,0x00,0x00,
19450x95,0x52,0x00,0x02,0x14,0xc0,0xff,0xc7,0x00,0x12,0x30,0xc0,0x8f,0xa4,0x00,0x24,
19460x8f,0xa5,0x00,0x50,0x8f,0xa6,0x00,0x1c,0x8f,0xa3,0x00,0x2c,0x00,0x85,0x80,0x21,
19470xa0,0xd0,0x00,0x12,0x00,0x09,0x10,0x23,0x30,0x42,0x00,0x03,0x8f,0xa8,0x00,0x88,
19480x00,0x62,0x10,0x23,0xa4,0xc2,0x00,0x1a,0x85,0x03,0x00,0x0c,0x00,0x00,0x00,0x00,
19490x00,0x03,0x10,0xc0,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x80,0x27,0x83,0x90,0x04,
19500x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x18,0x00,0x00,0x00,0x00,0x8c,0x83,0x00,0x04,
19510x00,0x00,0x00,0x00,0x30,0x63,0x00,0x10,0x14,0x60,0xff,0x74,0x02,0x00,0x10,0x21,
19520x8f,0xa3,0x00,0x54,0x8f,0xa4,0x00,0x18,0x8f,0xa5,0x00,0x24,0x00,0x64,0x10,0x21,
19530x00,0x02,0x10,0x80,0x27,0x83,0x90,0x18,0x00,0x43,0x10,0x21,0x90,0x44,0x00,0x00,
19540x10,0xa0,0x00,0x03,0x00,0x00,0x30,0x21,0x08,0x00,0x1d,0x33,0x02,0x00,0x10,0x21,
19550x93,0x82,0x80,0x10,0x00,0x00,0x28,0x21,0x00,0x00,0x38,0x21,0x0c,0x00,0x21,0x9a,
19560xaf,0xa2,0x00,0x10,0x08,0x00,0x1d,0x33,0x02,0x00,0x10,0x21,0x30,0x63,0xff,0xff,
19570x08,0x00,0x1d,0x85,0xaf,0xa3,0x00,0x2c,0x8f,0xa8,0x00,0x44,0x08,0x00,0x1d,0xa7,
19580x31,0x09,0x00,0x03,0x08,0x00,0x1d,0x60,0xaf,0xa3,0x00,0x50,0x8f,0xa6,0x00,0x44,
19590xaf,0xa0,0x00,0x50,0x08,0x00,0x1d,0xa7,0x30,0xc9,0x00,0x03,0x8f,0xa5,0x00,0x48,
19600x8f,0xa6,0x00,0x4c,0x8f,0xa4,0x00,0x1c,0x03,0xc0,0x38,0x21,0x0c,0x00,0x1b,0xd8,
19610xaf,0xb7,0x00,0x10,0x08,0x00,0x1d,0x10,0x00,0x00,0x00,0x00,0x00,0x05,0x28,0x80,
19620x27,0x82,0x90,0x00,0x00,0xa2,0x28,0x21,0x00,0x00,0x20,0x21,0x0c,0x00,0x01,0x49,
19630x00,0x00,0x00,0x00,0x08,0x00,0x1d,0x09,0x26,0xe2,0x00,0x01,0x00,0x02,0x80,0x80,
19640x27,0x83,0x90,0x10,0x8f,0xa4,0x00,0x1c,0x02,0x03,0x18,0x21,0x26,0x31,0x00,0x01,
19650x02,0x40,0x28,0x21,0x0c,0x00,0x1e,0xea,0xa0,0x71,0x00,0x05,0x14,0x40,0xff,0x13,
19660x00,0x00,0x00,0x00,0x16,0xe0,0x00,0x4d,0x03,0xc0,0x38,0x21,0x8f,0xa4,0x00,0x24,
19670x8f,0xa5,0x00,0x20,0x24,0x02,0x00,0x01,0x24,0x84,0x00,0x01,0xaf,0xb2,0x00,0x48,
19680xaf,0xb6,0x00,0x4c,0x02,0xc0,0xf0,0x21,0x10,0xa2,0x00,0x41,0xaf,0xa4,0x00,0x24,
19690x27,0x82,0x90,0x00,0x02,0x02,0x10,0x21,0x94,0x42,0x00,0x06,0x8f,0xa4,0x00,0x30,
19700xaf,0xa0,0x00,0x20,0xaf,0xa2,0x00,0x44,0x30,0x49,0x00,0x03,0x8f,0xa8,0x00,0x44,
19710x00,0x09,0x10,0x23,0x30,0x42,0x00,0x03,0x01,0x02,0x10,0x21,0x24,0x42,0x00,0x04,
19720x30,0x42,0xff,0xff,0x00,0x44,0x18,0x2b,0x10,0x60,0x00,0x2b,0x00,0x00,0x00,0x00,
19730x8f,0xa5,0x00,0x2c,0x00,0x82,0x10,0x23,0x00,0xa4,0x18,0x21,0x30,0x63,0xff,0xff,
19740x30,0x44,0xff,0xff,0xaf,0xa3,0x00,0x2c,0x02,0x92,0x28,0x21,0x00,0x05,0x28,0x80,
19750x27,0x82,0x90,0x04,0x00,0xa2,0x10,0x21,0x8c,0x46,0x00,0x18,0x3c,0x03,0x80,0xff,
19760x3c,0x02,0x7f,0x00,0x8c,0xc8,0x00,0x04,0x00,0x04,0x25,0x40,0x34,0x63,0xff,0xff,
19770x00,0x82,0x20,0x24,0x01,0x03,0x40,0x24,0x01,0x04,0x40,0x25,0xac,0xc8,0x00,0x04,
19780x8f,0xa8,0x00,0x98,0x27,0x82,0x90,0x10,0x00,0xa2,0x10,0x21,0xa0,0x48,0x00,0x00,
19790x8c,0xc4,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x04,0x27,0xc2,0x10,0x80,0xfe,0xdb,
19800xaf,0xa4,0x00,0x3c,0x80,0x42,0x00,0x06,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x02,
19810x00,0x02,0x1f,0xc2,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x43,0x00,0x02,0x10,0x40,
19820x00,0xc2,0x38,0x21,0x8f,0xa2,0x00,0x40,0x00,0x00,0x00,0x00,0xa4,0xe2,0x00,0x00,
19830x08,0x00,0x1d,0x0c,0x26,0xb5,0xff,0xff,0x8f,0xa6,0x00,0x2c,0x00,0x00,0x20,0x21,
19840x00,0xc2,0x10,0x21,0x30,0x42,0xff,0xff,0x08,0x00,0x1e,0x1a,0xaf,0xa2,0x00,0x2c,
19850x8f,0xa6,0x00,0x1c,0x08,0x00,0x1e,0x04,0xa4,0xd2,0x00,0x14,0x8f,0xa5,0x00,0x48,
19860x8f,0xa6,0x00,0x4c,0x8f,0xa4,0x00,0x1c,0x0c,0x00,0x1b,0xd8,0xaf,0xb7,0x00,0x10,
19870x08,0x00,0x1d,0xfb,0x00,0x00,0xb8,0x21,0x0c,0x00,0x12,0x8b,0x00,0x00,0x28,0x21,
19880x00,0x40,0x18,0x21,0x94,0x42,0x00,0x00,0x00,0x00,0x00,0x00,0x34,0x42,0x08,0x00,
19890xa4,0x62,0x00,0x00,0x08,0x00,0x1d,0x00,0x02,0x71,0x10,0x21,0x02,0x92,0x18,0x21,
19900x00,0x03,0x80,0x80,0x27,0x82,0x90,0x04,0x02,0x02,0x10,0x21,0x8c,0x44,0x00,0x18,
19910x00,0x00,0x00,0x00,0x8c,0x83,0x00,0x04,0x00,0x00,0x00,0x00,0x30,0x63,0x00,0x10,
19920x10,0x60,0x00,0x09,0x24,0x06,0x00,0x01,0x93,0x82,0x8b,0x71,0x00,0x00,0x00,0x00,
19930x30,0x42,0x00,0x01,0x10,0x40,0xfe,0xa2,0x3c,0x04,0x00,0x80,0x27,0x85,0x90,0x00,
19940x08,0x00,0x1d,0xeb,0x02,0x05,0x28,0x21,0x27,0x83,0x90,0x18,0x27,0x82,0x90,0x10,
19950x02,0x03,0x18,0x21,0x02,0x02,0x10,0x21,0x90,0x64,0x00,0x00,0x90,0x45,0x00,0x05,
19960x93,0x83,0x80,0x10,0x00,0x00,0x38,0x21,0x0c,0x00,0x21,0x9a,0xaf,0xa3,0x00,0x10,
19970x08,0x00,0x1e,0x62,0x00,0x00,0x00,0x00,0x27,0x82,0x90,0x18,0x02,0x02,0x10,0x21,
19980x94,0x43,0x00,0x02,0x8f,0xa6,0x00,0x58,0x00,0x03,0x19,0x02,0x00,0x66,0x18,0x23,
19990x30,0x63,0x0f,0xff,0x28,0x62,0x00,0x20,0x10,0x40,0x00,0x06,0x28,0x62,0x00,0x40,
20000x8f,0xa8,0x00,0x90,0x00,0x00,0x00,0x00,0x00,0x68,0x10,0x06,0x08,0x00,0x1c,0xd9,
20010x30,0x44,0x00,0x01,0x10,0x40,0x00,0x04,0x00,0x00,0x00,0x00,0x8f,0xa4,0x00,0x94,
20020x08,0x00,0x1e,0x83,0x00,0x64,0x10,0x06,0x08,0x00,0x1c,0xd9,0x00,0x00,0x20,0x21,
20030x8f,0xa4,0x00,0x98,0x8f,0xa5,0x00,0x38,0xaf,0xa0,0x00,0x10,0x0c,0x00,0x09,0x0a,
20040xaf,0xa8,0x00,0x14,0x30,0x42,0xff,0xff,0x08,0x00,0x1c,0xa9,0xaf,0xa2,0x00,0x40,
20050x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x00,0x27,0xbd,0xff,0xe0,0x34,0x42,0x00,0x20,
20060x24,0x63,0x7a,0x50,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x18,
20070xac,0x43,0x00,0x00,0x90,0x82,0x00,0x0a,0x00,0x80,0x80,0x21,0x14,0x40,0x00,0x45,
20080x00,0x00,0x88,0x21,0x92,0x02,0x00,0x04,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x3c,
20090x00,0x00,0x00,0x00,0x12,0x20,0x00,0x18,0x00,0x00,0x00,0x00,0x92,0x02,0x00,0x16,
20100x92,0x05,0x00,0x0a,0x30,0x42,0x00,0xfc,0x10,0xa0,0x00,0x03,0xa2,0x02,0x00,0x16,
20110x34,0x42,0x00,0x01,0xa2,0x02,0x00,0x16,0x92,0x04,0x00,0x04,0x00,0x00,0x00,0x00,
20120x30,0x83,0x00,0xff,0x10,0x60,0x00,0x05,0x00,0x00,0x00,0x00,0x92,0x02,0x00,0x16,
20130x00,0x00,0x00,0x00,0x34,0x42,0x00,0x02,0xa2,0x02,0x00,0x16,0x10,0x60,0x00,0x0a,
20140x00,0x00,0x00,0x00,0x14,0xa0,0x00,0x08,0x00,0x00,0x00,0x00,0x96,0x02,0x00,0x00,
20150xa2,0x00,0x00,0x17,0xa6,0x02,0x00,0x14,0x8f,0xbf,0x00,0x18,0x7b,0xb0,0x00,0xbc,
20160x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x14,0x80,0x00,0x05,0x24,0x02,0x00,0x01,
20170x96,0x03,0x00,0x06,0xa2,0x02,0x00,0x17,0x08,0x00,0x1e,0xbe,0xa6,0x03,0x00,0x14,
20180x96,0x04,0x00,0x00,0x96,0x05,0x00,0x06,0x27,0x86,0x90,0x00,0x00,0x04,0x10,0xc0,
20190x00,0x05,0x18,0xc0,0x00,0x44,0x10,0x21,0x00,0x65,0x18,0x21,0x00,0x02,0x10,0x80,
20200x00,0x03,0x18,0x80,0x00,0x66,0x18,0x21,0x00,0x46,0x10,0x21,0x8c,0x65,0x00,0x08,
20210x8c,0x44,0x00,0x08,0x0c,0x00,0x12,0x7c,0x00,0x00,0x00,0x00,0x30,0x43,0x00,0xff,
20220x10,0x60,0x00,0x04,0xa2,0x02,0x00,0x17,0x96,0x02,0x00,0x06,0x08,0x00,0x1e,0xbe,
20230xa6,0x02,0x00,0x14,0x96,0x02,0x00,0x00,0x08,0x00,0x1e,0xbe,0xa6,0x02,0x00,0x14,
20240x96,0x05,0x00,0x00,0x0c,0x00,0x1e,0xea,0x02,0x00,0x20,0x21,0x08,0x00,0x1e,0xa5,
20250x02,0x22,0x88,0x21,0x94,0x85,0x00,0x06,0x0c,0x00,0x1e,0xea,0x00,0x00,0x00,0x00,
20260x08,0x00,0x1e,0xa1,0x00,0x40,0x88,0x21,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x00,
20270x34,0x63,0x00,0x20,0x24,0x42,0x7b,0xa8,0x27,0xbd,0xff,0xf0,0xac,0x62,0x00,0x00,
20280x00,0x00,0x10,0x21,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x10,0x3c,0x03,0xb0,0x03,
20290x3c,0x02,0x80,0x00,0x34,0x63,0x00,0x20,0x24,0x42,0x7b,0xcc,0xac,0x62,0x00,0x00,
20300x90,0x89,0x00,0x0a,0x00,0x80,0x30,0x21,0x11,0x20,0x00,0x05,0x00,0xa0,0x50,0x21,
20310x90,0x82,0x00,0x17,0x00,0x00,0x00,0x00,0x14,0x40,0x00,0x1b,0x00,0x00,0x00,0x00,
20320x90,0xc7,0x00,0x04,0x00,0x00,0x00,0x00,0x10,0xe0,0x00,0x1b,0x00,0x00,0x00,0x00,
20330x94,0xc8,0x00,0x00,0x27,0x83,0x90,0x00,0x93,0x85,0x8b,0x70,0x00,0x08,0x10,0xc0,
20340x00,0x48,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x08,
20350x00,0xe5,0x28,0x2b,0x10,0xa0,0x00,0x06,0x01,0x44,0x18,0x23,0x8f,0x82,0x8b,0x88,
20360x00,0x00,0x00,0x00,0x00,0x43,0x10,0x2b,0x10,0x40,0x00,0x05,0x00,0x00,0x00,0x00,
20370x24,0x03,0x00,0x10,0xa4,0xc8,0x00,0x14,0x03,0xe0,0x00,0x08,0x00,0x60,0x10,0x21,
20380x11,0x20,0x00,0x05,0x00,0x00,0x00,0x00,0x94,0xc2,0x00,0x06,0x24,0x03,0x00,0x08,
20390x08,0x00,0x1f,0x16,0xa4,0xc2,0x00,0x14,0x08,0x00,0x1f,0x16,0x00,0x00,0x18,0x21,
20400x27,0xbd,0xff,0xc8,0xaf,0xb5,0x00,0x2c,0xaf,0xb4,0x00,0x28,0xaf,0xb3,0x00,0x24,
20410xaf,0xb0,0x00,0x18,0xaf,0xbf,0x00,0x30,0xaf,0xb2,0x00,0x20,0xaf,0xb1,0x00,0x1c,
20420x94,0x91,0x00,0x06,0x00,0x80,0xa0,0x21,0x3c,0x02,0x80,0x00,0x3c,0x04,0xb0,0x03,
20430x00,0x11,0xa8,0xc0,0x34,0x84,0x00,0x20,0x24,0x42,0x7c,0x80,0x02,0xb1,0x48,0x21,
20440xac,0x82,0x00,0x00,0x00,0x09,0x48,0x80,0x24,0x03,0x00,0x01,0x27,0x82,0x90,0x10,
20450xa2,0x83,0x00,0x12,0x01,0x22,0x10,0x21,0x27,0x84,0x90,0x04,0x01,0x24,0x20,0x21,
20460x80,0x48,0x00,0x06,0x8c,0x8a,0x00,0x18,0x27,0x83,0x90,0x20,0x01,0x23,0x48,0x21,
20470x8d,0x24,0x00,0x00,0x25,0x08,0x00,0x02,0x8d,0x42,0x00,0x00,0x8d,0x49,0x00,0x04,
20480x00,0x08,0x17,0xc2,0x8d,0x43,0x00,0x08,0x01,0x02,0x40,0x21,0x00,0x04,0x25,0xc2,
20490x00,0x08,0x40,0x43,0x30,0x84,0x00,0x01,0x00,0x03,0x1f,0xc2,0x00,0x08,0x40,0x40,
20500x00,0xe0,0x80,0x21,0x00,0x64,0x18,0x24,0x00,0x09,0x49,0x42,0x01,0x48,0x10,0x21,
20510x00,0xa0,0x98,0x21,0x00,0xa0,0x20,0x21,0x00,0x40,0x38,0x21,0x02,0x00,0x28,0x21,
20520x14,0x60,0x00,0x19,0x31,0x29,0x00,0x01,0x94,0x42,0x00,0x00,0x02,0xb1,0x88,0x21,
20530x02,0x00,0x28,0x21,0x00,0x11,0x88,0x80,0x27,0x90,0x90,0x00,0x02,0x30,0x80,0x21,
20540x96,0x03,0x00,0x06,0x30,0x52,0xff,0xff,0x02,0x60,0x20,0x21,0x00,0x60,0x30,0x21,
20550xa6,0x83,0x00,0x1a,0x27,0x82,0x90,0x08,0x0c,0x00,0x08,0xe3,0x02,0x22,0x88,0x21,
20560x00,0x52,0x10,0x21,0x96,0x03,0x00,0x06,0xa6,0x22,0x00,0x04,0x8f,0xbf,0x00,0x30,
20570x7b,0xb4,0x01,0x7c,0x7b,0xb2,0x01,0x3c,0x7b,0xb0,0x00,0xfc,0x00,0x60,0x10,0x21,
20580x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x38,0xaf,0xa9,0x00,0x10,0x0c,0x00,0x09,0x0a,
20590xaf,0xa0,0x00,0x14,0x08,0x00,0x1f,0x54,0x02,0xb1,0x88,0x21,0x27,0xbd,0xff,0xc0,
20600xaf,0xbe,0x00,0x38,0xaf,0xb7,0x00,0x34,0xaf,0xb6,0x00,0x30,0xaf,0xb5,0x00,0x2c,
20610xaf,0xb3,0x00,0x24,0xaf,0xb1,0x00,0x1c,0xaf,0xbf,0x00,0x3c,0xaf,0xb4,0x00,0x28,
20620xaf,0xb2,0x00,0x20,0xaf,0xb0,0x00,0x18,0x94,0x90,0x00,0x00,0x3c,0x08,0xb0,0x03,
20630x35,0x08,0x00,0x20,0x00,0x10,0x10,0xc0,0x00,0x50,0x18,0x21,0x00,0x40,0x88,0x21,
20640x3c,0x02,0x80,0x00,0x00,0x03,0x48,0x80,0x24,0x42,0x7d,0xbc,0x00,0x80,0x98,0x21,
20650x27,0x84,0x90,0x10,0x01,0x24,0x20,0x21,0x93,0xb7,0x00,0x53,0xad,0x02,0x00,0x00,
20660x80,0x83,0x00,0x06,0x27,0x82,0x90,0x04,0x01,0x22,0x10,0x21,0x8c,0x44,0x00,0x18,
20670x24,0x63,0x00,0x02,0x00,0x03,0x17,0xc2,0x8c,0x88,0x00,0x08,0x00,0x62,0x18,0x21,
20680x00,0x03,0x18,0x43,0x00,0x03,0x18,0x40,0xaf,0xa7,0x00,0x4c,0x2c,0xa2,0x00,0x10,
20690x00,0xa0,0xa8,0x21,0x00,0x83,0x50,0x21,0x00,0x08,0x47,0xc2,0x00,0xc0,0x58,0x21,
20700x00,0x00,0xb0,0x21,0x8c,0x92,0x00,0x0c,0x14,0x40,0x00,0x13,0x00,0x00,0xf0,0x21,
20710x92,0x67,0x00,0x04,0x24,0x14,0x00,0x01,0x12,0x87,0x00,0x10,0x02,0x30,0x10,0x21,
20720x27,0x83,0x90,0x18,0x01,0x23,0x18,0x21,0x80,0x64,0x00,0x00,0x27,0x83,0xb5,0x70,
20730x00,0x04,0x11,0x00,0x00,0x44,0x10,0x23,0x00,0x02,0x10,0x80,0x00,0x44,0x10,0x23,
20740x00,0x02,0x10,0x80,0x00,0x43,0x10,0x21,0x90,0x44,0x00,0x04,0x00,0x00,0x00,0x00,
20750x10,0x80,0x00,0x23,0x00,0x00,0x00,0x00,0x02,0x30,0x10,0x21,0x00,0x02,0x80,0x80,
20760x24,0x04,0x00,0x01,0x27,0x83,0x90,0x20,0xa2,0x64,0x00,0x12,0x02,0x03,0x18,0x21,
20770x8c,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x15,0xc2,0x30,0x42,0x00,0x01,
20780x01,0x02,0x10,0x24,0x14,0x40,0x00,0x0e,0x02,0xa0,0x20,0x21,0x27,0x82,0x90,0x00,
20790x02,0x02,0x10,0x21,0x94,0x43,0x00,0x06,0x00,0x00,0x00,0x00,0xa6,0x63,0x00,0x1a,
20800x94,0x42,0x00,0x06,0x7b,0xbe,0x01,0xfc,0x7b,0xb6,0x01,0xbc,0x7b,0xb4,0x01,0x7c,
20810x7b,0xb2,0x01,0x3c,0x7b,0xb0,0x00,0xfc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x40,
20820x8f,0xa5,0x00,0x4c,0x01,0x60,0x30,0x21,0x01,0x40,0x38,0x21,0xaf,0xa0,0x00,0x10,
20830x0c,0x00,0x09,0x0a,0xaf,0xa0,0x00,0x14,0x08,0x00,0x1f,0xbb,0x00,0x00,0x00,0x00,
20840x27,0x83,0x90,0x20,0x01,0x23,0x18,0x21,0x8c,0x62,0x00,0x00,0x00,0x00,0x00,0x00,
20850x00,0x02,0x15,0xc2,0x30,0x42,0x00,0x01,0x01,0x02,0x10,0x24,0x14,0x40,0x00,0xaf,
20860x00,0xa0,0x20,0x21,0x32,0x4f,0x00,0x03,0x00,0x12,0x10,0x82,0x25,0xe3,0x00,0x0d,
20870x30,0x45,0x00,0x07,0x00,0x74,0x78,0x04,0x10,0xa0,0x00,0x0e,0x00,0x00,0x90,0x21,
20880x27,0x82,0x80,0x1c,0x00,0x15,0x18,0x40,0x00,0x62,0x18,0x21,0x94,0x64,0x00,0x00,
20890x24,0xa2,0x00,0x06,0x00,0x54,0x10,0x04,0x00,0x44,0x00,0x1a,0x14,0x80,0x00,0x02,
20900x00,0x00,0x00,0x00,0x00,0x07,0x00,0x0d,0x00,0x00,0x10,0x12,0x24,0x42,0x00,0x20,
20910x30,0x52,0xff,0xfc,0x02,0x30,0x10,0x21,0x27,0x83,0x90,0x10,0x00,0x02,0x10,0x80,
20920x00,0x43,0x10,0x21,0x90,0x44,0x00,0x03,0x00,0x00,0x00,0x00,0x30,0x83,0x00,0xff,
20930x2c,0x62,0x00,0x0c,0x14,0x40,0x00,0x04,0x2c,0x62,0x00,0x19,0x30,0x82,0x00,0x0f,
20940x24,0x43,0x00,0x0c,0x2c,0x62,0x00,0x19,0x10,0x40,0x00,0x19,0x24,0x0e,0x00,0x20,
20950x24,0x62,0xff,0xe9,0x2c,0x42,0x00,0x02,0x14,0x40,0x00,0x15,0x24,0x0e,0x00,0x10,
20960x24,0x62,0xff,0xeb,0x2c,0x42,0x00,0x02,0x14,0x40,0x00,0x11,0x24,0x0e,0x00,0x08,
20970x24,0x02,0x00,0x14,0x10,0x62,0x00,0x0e,0x24,0x0e,0x00,0x02,0x24,0x62,0xff,0xef,
20980x2c,0x42,0x00,0x03,0x14,0x40,0x00,0x0a,0x24,0x0e,0x00,0x10,0x24,0x62,0xff,0xf1,
20990x2c,0x42,0x00,0x02,0x14,0x40,0x00,0x06,0x24,0x0e,0x00,0x08,0x24,0x62,0xff,0xf3,
21000x2c,0x42,0x00,0x02,0x24,0x0e,0x00,0x04,0x24,0x03,0x00,0x02,0x00,0x62,0x70,0x0a,
21010x30,0xe2,0x00,0xff,0x00,0x00,0x48,0x21,0x00,0x00,0x68,0x21,0x10,0x40,0x00,0x6d,
21020x00,0x00,0x58,0x21,0x3c,0x14,0x80,0xff,0x27,0x99,0x90,0x00,0x01,0xf2,0xc0,0x23,
21030x36,0x94,0xff,0xff,0x01,0xc9,0x10,0x2a,0x14,0x40,0x00,0x64,0x24,0x03,0x00,0x04,
21040x00,0x10,0x28,0xc0,0x00,0xb0,0x10,0x21,0x00,0x02,0x10,0x80,0x00,0x59,0x10,0x21,
21050x94,0x56,0x00,0x06,0x00,0x00,0x00,0x00,0x32,0xcc,0x00,0x03,0x00,0x6c,0x10,0x23,
21060x30,0x42,0x00,0x03,0x02,0xc2,0x10,0x21,0x24,0x42,0x00,0x04,0x30,0x51,0xff,0xff,
21070x02,0x32,0x18,0x2b,0x10,0x60,0x00,0x4d,0x01,0xf1,0x10,0x23,0x02,0x51,0x10,0x23,
21080x01,0x78,0x18,0x2b,0x10,0x60,0x00,0x34,0x30,0x44,0xff,0xff,0x29,0x22,0x00,0x40,
21090x10,0x40,0x00,0x31,0x01,0x72,0x18,0x21,0x25,0x22,0x00,0x01,0x00,0x02,0x16,0x00,
21100x00,0x02,0x4e,0x03,0x00,0xb0,0x10,0x21,0x00,0x02,0x30,0x80,0x27,0x82,0x90,0x04,
21110x30,0x6b,0xff,0xff,0x00,0xc2,0x18,0x21,0x8c,0x67,0x00,0x18,0x00,0x04,0x25,0x40,
21120x3c,0x03,0x7f,0x00,0x8c,0xe2,0x00,0x04,0x00,0x83,0x20,0x24,0x27,0x83,0x90,0x10,
21130x00,0x54,0x10,0x24,0x00,0xc3,0x28,0x21,0x00,0x44,0x10,0x25,0xac,0xe2,0x00,0x04,
21140x16,0xe0,0x00,0x02,0xa0,0xb5,0x00,0x00,0xa0,0xb5,0x00,0x03,0x27,0x84,0x90,0x20,
21150x00,0xc4,0x18,0x21,0x8c,0x62,0x00,0x00,0x8c,0xe8,0x00,0x08,0x00,0x02,0x15,0xc2,
21160x00,0x08,0x47,0xc2,0x30,0x42,0x00,0x01,0x01,0x02,0x10,0x24,0x10,0x40,0x00,0x0a,
21170x00,0x00,0x00,0x00,0x80,0xa2,0x00,0x06,0x00,0x00,0x00,0x00,0x24,0x42,0x00,0x02,
21180x00,0x02,0x1f,0xc2,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x43,0x00,0x02,0x10,0x40,
21190x00,0xe2,0x50,0x21,0xa5,0x5e,0x00,0x00,0x92,0x62,0x00,0x04,0x25,0xad,0x00,0x01,
21200x27,0x84,0x90,0x00,0x00,0xc4,0x18,0x21,0x01,0xa2,0x10,0x2a,0x94,0x70,0x00,0x02,
21210x14,0x40,0xff,0xb8,0x00,0x00,0x00,0x00,0x96,0x63,0x00,0x14,0x00,0x0c,0x10,0x23,
21220xa2,0x69,0x00,0x12,0x30,0x42,0x00,0x03,0x01,0x62,0x10,0x23,0x00,0x03,0x80,0xc0,
21230x8f,0xa5,0x00,0x4c,0x30,0x4b,0xff,0xff,0x02,0x03,0x80,0x21,0x27,0x82,0x90,0x08,
21240x00,0x10,0x80,0x80,0xa6,0x6b,0x00,0x1a,0x02,0xa0,0x20,0x21,0x01,0x60,0x30,0x21,
21250x01,0x60,0x88,0x21,0x0c,0x00,0x08,0xe3,0x02,0x02,0x80,0x21,0x00,0x5e,0x10,0x21,
21260xa6,0x02,0x00,0x04,0x08,0x00,0x1f,0xc1,0x02,0x20,0x10,0x21,0x01,0x62,0x10,0x2b,
21270x10,0x40,0xff,0xe9,0x00,0x00,0x20,0x21,0x29,0x22,0x00,0x40,0x10,0x40,0xff,0xe6,
21280x01,0x71,0x18,0x21,0x08,0x00,0x20,0x37,0x25,0x22,0x00,0x01,0x08,0x00,0x20,0x66,
21290x32,0xcc,0x00,0x03,0x08,0x00,0x20,0x66,0x00,0x00,0x60,0x21,0x8f,0xa5,0x00,0x4c,
21300x01,0x40,0x38,0x21,0xaf,0xa0,0x00,0x10,0x0c,0x00,0x09,0x0a,0xaf,0xb4,0x00,0x14,
21310x92,0x67,0x00,0x04,0x08,0x00,0x1f,0xd9,0x30,0x5e,0xff,0xff,0x30,0x84,0xff,0xff,
21320x00,0x04,0x30,0xc0,0x00,0xc4,0x20,0x21,0x00,0x04,0x20,0x80,0x27,0x82,0x90,0x00,
21330x3c,0x03,0xb0,0x08,0x30,0xa5,0xff,0xff,0x00,0x82,0x20,0x21,0x00,0xc3,0x30,0x21,
21340xac,0xc5,0x00,0x00,0x03,0xe0,0x00,0x08,0xa4,0x85,0x00,0x00,0x30,0x84,0xff,0xff,
21350x00,0x04,0x30,0xc0,0x00,0xc4,0x30,0x21,0x27,0x88,0x90,0x00,0x00,0x06,0x30,0x80,
21360x00,0xc8,0x30,0x21,0x94,0xc3,0x00,0x04,0x3c,0x02,0xb0,0x08,0x3c,0x07,0xb0,0x03,
21370x00,0x03,0x20,0xc0,0x00,0x83,0x18,0x21,0x00,0x03,0x18,0x80,0x00,0x82,0x20,0x21,
21380x3c,0x02,0x80,0x01,0x30,0xa5,0xff,0xff,0x00,0x68,0x18,0x21,0x34,0xe7,0x00,0x20,
21390x24,0x42,0x82,0x6c,0xac,0xe2,0x00,0x00,0xa4,0xc5,0x00,0x02,0xa4,0x65,0x00,0x00,
21400x03,0xe0,0x00,0x08,0xac,0x85,0x00,0x00,0x30,0x84,0xff,0xff,0x00,0x04,0x10,0xc0,
21410x00,0x44,0x10,0x21,0x27,0x89,0x90,0x00,0x00,0x02,0x10,0x80,0x00,0x49,0x10,0x21,
21420x97,0x83,0x8f,0xf0,0x94,0x4a,0x00,0x04,0x3c,0x02,0xb0,0x08,0x00,0x03,0x38,0xc0,
21430x00,0x0a,0x40,0xc0,0x00,0xe3,0x18,0x21,0x01,0x0a,0x28,0x21,0x00,0xe2,0x38,0x21,
21440x01,0x02,0x40,0x21,0x00,0x03,0x18,0x80,0x00,0x05,0x28,0x80,0x3c,0x06,0xb0,0x03,
21450x3c,0x02,0x80,0x01,0x00,0xa9,0x28,0x21,0x00,0x69,0x18,0x21,0x34,0xc6,0x00,0x20,
21460x34,0x09,0xff,0xff,0x24,0x42,0x82,0xc8,0xac,0xc2,0x00,0x00,0xa4,0x64,0x00,0x00,
21470xac,0xe4,0x00,0x00,0xa4,0xa9,0x00,0x00,0xad,0x09,0x00,0x00,0xa7,0x8a,0x8f,0xf0,
21480x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x01,
21490x34,0x63,0x00,0x20,0x24,0x42,0x83,0x48,0x3c,0x04,0xb0,0x03,0xac,0x62,0x00,0x00,
21500x34,0x84,0x01,0x10,0x8c,0x82,0x00,0x00,0x97,0x83,0x81,0x60,0x30,0x42,0xff,0xff,
21510x10,0x62,0x00,0x16,0x24,0x0a,0x00,0x01,0xa7,0x82,0x81,0x60,0xaf,0x80,0xb4,0x50,
21520x00,0x40,0x28,0x21,0x24,0x06,0x00,0x01,0x27,0x84,0xb4,0x54,0x25,0x43,0xff,0xff,
21530x00,0x66,0x10,0x04,0x00,0xa2,0x10,0x24,0x14,0x40,0x00,0x07,0x00,0x00,0x00,0x00,
21540x8c,0x83,0xff,0xfc,0x00,0x00,0x00,0x00,0x00,0x66,0x10,0x04,0x00,0xa2,0x10,0x24,
21550x38,0x42,0x00,0x00,0x01,0x42,0x18,0x0a,0x25,0x4a,0x00,0x01,0x2d,0x42,0x00,0x14,
21560xac,0x83,0x00,0x00,0x14,0x40,0xff,0xf1,0x24,0x84,0x00,0x04,0x3c,0x0b,0xb0,0x03,
21570x00,0x00,0x50,0x21,0x3c,0x0c,0x80,0x00,0x27,0x89,0xb4,0xa0,0x35,0x6b,0x01,0x20,
21580x8d,0x68,0x00,0x00,0x8d,0x23,0x00,0x04,0x01,0x0c,0x10,0x24,0x00,0x02,0x17,0xc2,
21590x11,0x03,0x00,0x37,0xa1,0x22,0x00,0xdc,0xa1,0x20,0x00,0xd5,0xa1,0x20,0x00,0xd6,
21600x01,0x20,0x30,0x21,0x00,0x00,0x38,0x21,0x00,0x00,0x28,0x21,0x01,0x20,0x20,0x21,
21610x00,0xa8,0x10,0x06,0x30,0x42,0x00,0x01,0x10,0xe0,0x00,0x10,0xa0,0x82,0x00,0x0a,
21620x90,0x82,0x00,0x07,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x31,0x24,0xa2,0xff,0xff,
21630xa0,0x82,0x00,0x08,0x90,0x82,0x00,0x0a,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x09,
21640x00,0x00,0x00,0x00,0x90,0x83,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x03,0x10,0x40,
21650x00,0x43,0x10,0x21,0x00,0x46,0x10,0x21,0xa0,0x45,0x00,0x09,0x90,0x82,0x00,0x0a,
21660x00,0x00,0x00,0x00,0x10,0x40,0x00,0x07,0x00,0x00,0x00,0x00,0x14,0xe0,0x00,0x04,
21670x00,0x00,0x00,0x00,0xa0,0xc5,0x00,0xd5,0x24,0x07,0x00,0x01,0xa0,0x85,0x00,0x08,
21680xa0,0xc5,0x00,0xd6,0x24,0xa5,0x00,0x01,0x2c,0xa2,0x00,0x1c,0x14,0x40,0xff,0xe0,
21690x24,0x84,0x00,0x03,0x90,0xc4,0x00,0xd5,0x00,0x00,0x28,0x21,0x00,0xa4,0x10,0x2b,
21700x10,0x40,0x00,0x0b,0x00,0x00,0x00,0x00,0x00,0xc0,0x18,0x21,0xa0,0x64,0x00,0x08,
21710x90,0xc2,0x00,0xd5,0x24,0xa5,0x00,0x01,0xa0,0x62,0x00,0x09,0x90,0xc4,0x00,0xd5,
21720x00,0x00,0x00,0x00,0x00,0xa4,0x10,0x2b,0x14,0x40,0xff,0xf8,0x24,0x63,0x00,0x03,
21730x25,0x4a,0x00,0x01,0x2d,0x42,0x00,0x08,0xad,0x28,0x00,0x04,0x25,0x6b,0x00,0x04,
21740x14,0x40,0xff,0xbf,0x25,0x29,0x00,0xec,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
21750x90,0x82,0x00,0x05,0x08,0x00,0x21,0x0d,0xa0,0x82,0x00,0x08,0x97,0x85,0x8b,0x7a,
21760x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x01,0x27,0xbd,0xff,0xe8,0x34,0x63,0x00,0x20,
21770x24,0x42,0x84,0xfc,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,0xac,0x62,0x00,0x00,
21780x30,0x90,0x00,0xff,0x00,0x05,0x28,0x42,0x00,0x00,0x48,0x21,0x27,0x8f,0xb4,0xa4,
21790x00,0x00,0x50,0x21,0x00,0x00,0x58,0x21,0x27,0x98,0xb5,0x84,0x27,0x99,0xb5,0x80,
21800x27,0x8e,0xb5,0x7e,0x27,0x8c,0xb4,0xa8,0x27,0x8d,0xb5,0x00,0x27,0x88,0xb5,0x78,
21810x00,0x0a,0x18,0x80,0x01,0x6f,0x10,0x21,0xac,0x40,0x00,0x00,0xac,0x45,0x00,0x58,
21820x00,0x6e,0x20,0x21,0x00,0x78,0x10,0x21,0xa1,0x00,0xff,0xfc,0xad,0x00,0x00,0x00,
21830xa1,0x00,0x00,0x04,0xa1,0x00,0x00,0x05,0xad,0x00,0xff,0xf8,0x00,0x79,0x18,0x21,
21840x24,0x06,0x00,0x01,0x24,0xc6,0xff,0xff,0xa0,0x80,0x00,0x00,0xa4,0x60,0x00,0x00,
21850xac,0x40,0x00,0x00,0x24,0x63,0x00,0x02,0x24,0x42,0x00,0x04,0x04,0xc1,0xff,0xf9,
21860x24,0x84,0x00,0x01,0x00,0x0a,0x10,0x80,0x00,0x4d,0x20,0x21,0x00,0x00,0x30,0x21,
21870x00,0x4c,0x18,0x21,0x27,0x87,0x81,0x64,0x8c,0xe2,0x00,0x00,0x24,0xe7,0x00,0x04,
21880xac,0x82,0x00,0x00,0xa0,0x66,0x00,0x00,0xa0,0x66,0x00,0x01,0x24,0xc6,0x00,0x01,
21890x28,0xc2,0x00,0x1c,0xa0,0x60,0x00,0x02,0x24,0x84,0x00,0x04,0x14,0x40,0xff,0xf6,
21900x24,0x63,0x00,0x03,0x25,0x29,0x00,0x01,0x29,0x22,0x00,0x08,0x25,0x4a,0x00,0x3b,
21910x25,0x08,0x00,0xec,0x14,0x40,0xff,0xd6,0x25,0x6b,0x00,0xec,0xa7,0x80,0x81,0x60,
21920x00,0x00,0x48,0x21,0x27,0x83,0xb4,0x50,0xac,0x69,0x00,0x00,0x25,0x29,0x00,0x01,
21930x29,0x22,0x00,0x0c,0x14,0x40,0xff,0xfc,0x24,0x63,0x00,0x04,0x0c,0x00,0x20,0xd2,
21940x00,0x00,0x00,0x00,0x2e,0x04,0x00,0x14,0x27,0x83,0xb4,0xa0,0x24,0x09,0x00,0x07,
21950x10,0x80,0x00,0x0a,0x00,0x00,0x00,0x00,0x90,0x62,0x00,0xd5,0x25,0x29,0xff,0xff,
21960xa0,0x62,0x00,0x00,0x05,0x21,0xff,0xfa,0x24,0x63,0x00,0xec,0x8f,0xbf,0x00,0x14,
21970x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x90,0x62,0x00,0xd6,
21980x08,0x00,0x21,0x90,0x25,0x29,0xff,0xff,0x30,0x84,0x00,0xff,0x00,0x04,0x11,0x00,
21990x00,0x44,0x10,0x23,0x00,0x02,0x10,0x80,0x00,0x44,0x10,0x23,0x00,0x02,0x10,0x80,
22000x27,0x83,0xb4,0xa0,0x00,0x43,0x60,0x21,0x3c,0x04,0xb0,0x03,0x3c,0x02,0x80,0x01,
22010x34,0x84,0x00,0x20,0x24,0x42,0x86,0x68,0x30,0xc6,0x00,0xff,0x93,0xaa,0x00,0x13,
22020x30,0xa5,0x00,0xff,0x30,0xe7,0x00,0xff,0xac,0x82,0x00,0x00,0x10,0xc0,0x00,0xe8,
22030x25,0x8f,0x00,0xd0,0x91,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x24,0x42,0xff,0xfc,
22040x2c,0x43,0x00,0x18,0x10,0x60,0x00,0xc7,0x3c,0x03,0x80,0x01,0x00,0x02,0x10,0x80,
22050x24,0x63,0x02,0x90,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,
22060x00,0x80,0x00,0x08,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x30,0x14,0x40,0x00,0x1c,
22070x00,0x00,0x00,0x00,0x10,0xa0,0x00,0x17,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
22080x10,0xa2,0x00,0x11,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0x00,0x0c,
22090x00,0x00,0x00,0x00,0x24,0x02,0x00,0x03,0x10,0xa2,0x00,0x06,0x00,0x00,0x00,0x00,
22100x8d,0x82,0x00,0xd0,0x00,0x00,0x00,0x00,0x24,0x42,0xff,0xe0,0x03,0xe0,0x00,0x08,
22110xad,0x82,0x00,0xd0,0x8d,0x82,0x00,0xd0,0x08,0x00,0x21,0xcb,0x24,0x42,0xff,0xe8,
22120x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,0x08,0x00,0x21,0xcb,
22130x24,0x42,0x00,0x01,0x8d,0x82,0x00,0xd0,0x08,0x00,0x21,0xcb,0x24,0x42,0x00,0x02,
22140x10,0xa0,0xff,0xf9,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0x00,0x0a,
22150x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0xe9,0x00,0x00,0x00,0x00,
22160x24,0x02,0x00,0x03,0x10,0xa2,0xff,0xe6,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,
22170x08,0x00,0x21,0xcb,0x24,0x42,0xff,0xd0,0x8d,0x82,0x00,0xd0,0x08,0x00,0x21,0xcb,
22180x24,0x42,0xff,0xfc,0x10,0xa0,0xff,0xeb,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
22190x10,0xa2,0xff,0xe5,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0xe0,
22200x24,0x02,0x00,0x03,0x14,0xa2,0xff,0xdb,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,
22210x08,0x00,0x21,0xcb,0x24,0x42,0xff,0xf8,0x2d,0x42,0x00,0x19,0x14,0x40,0xff,0xc5,
22220x00,0x00,0x00,0x00,0x10,0xa0,0xff,0xdb,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
22230x10,0xa2,0xff,0xd5,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0xd0,
22240x24,0x02,0x00,0x03,0x10,0xa2,0xff,0xf1,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,
22250x08,0x00,0x21,0xcb,0x24,0x42,0xff,0xf0,0x2d,0x42,0x00,0x1b,0x10,0x40,0xff,0xf1,
22260x00,0x00,0x00,0x00,0x10,0xa0,0xff,0xcb,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
22270x10,0xa2,0xff,0xc5,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x14,0xa2,0xff,0xb5,
22280x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,0x08,0x00,0x21,0xcb,0x24,0x42,0xff,0xf4,
22290x2d,0x42,0x00,0x1e,0x10,0x40,0xff,0xe3,0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0xbd,
22300x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0xb5,0x24,0x02,0x00,0x02,
22310x10,0xa2,0xff,0xd6,0x00,0x00,0x00,0x00,0x08,0x00,0x21,0xc6,0x24,0x02,0x00,0x03,
22320x2d,0x42,0x00,0x23,0x10,0x40,0xff,0xd7,0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0xae,
22330x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0xa9,0x24,0x02,0x00,0x02,
22340x14,0xa2,0xff,0xb7,0x00,0x00,0x00,0x00,0x08,0x00,0x22,0x03,0x00,0x00,0x00,0x00,
22350x2d,0x42,0x00,0x25,0x10,0x40,0xff,0xcb,0x00,0x00,0x00,0x00,0x08,0x00,0x21,0xd8,
22360x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x16,0x14,0x40,0x00,0x0e,0x00,0x00,0x00,0x00,
22370x10,0xa0,0xff,0xa0,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x9a,
22380x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x95,0x24,0x02,0x00,0x03,
22390x14,0xa2,0xff,0xb6,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,0x08,0x00,0x21,0xcb,
22400x24,0x42,0xff,0xfa,0x10,0xa0,0xff,0x93,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
22410x10,0xa2,0xff,0x8d,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x88,
22420x00,0x00,0x00,0x00,0x08,0x00,0x21,0xf3,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x17,
22430x14,0x40,0xff,0xac,0x00,0x00,0x00,0x00,0x08,0x00,0x22,0x34,0x00,0x00,0x00,0x00,
22440x2d,0x42,0x00,0x19,0x10,0x40,0xff,0xe2,0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0x81,
22450x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x7b,0x00,0x00,0x00,0x00,
22460x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x76,0x24,0x02,0x00,0x03,0x10,0xa2,0xff,0x97,
22470x00,0x00,0x00,0x00,0x08,0x00,0x21,0xc8,0x00,0x00,0x00,0x00,0x08,0x00,0x22,0x51,
22480x2d,0x42,0x00,0x1b,0x2d,0x42,0x00,0x1e,0x10,0x40,0xff,0xde,0x00,0x00,0x00,0x00,
22490x10,0xa0,0xff,0x70,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x6a,
22500x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x65,0x24,0x02,0x00,0x03,
22510x10,0xa2,0xff,0x96,0x00,0x00,0x00,0x00,0x08,0x00,0x21,0xc8,0x00,0x00,0x00,0x00,
22520x2d,0x42,0x00,0x23,0x14,0x40,0xff,0xf2,0x00,0x00,0x00,0x00,0x08,0x00,0x21,0xf9,
22530x00,0x00,0x00,0x00,0x08,0x00,0x21,0xf7,0x2d,0x42,0x00,0x25,0x08,0x00,0x22,0x2d,
22540x2d,0x42,0x00,0x27,0x10,0xa0,0xff,0x5b,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
22550x10,0xa2,0xff,0x55,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x50,
22560x24,0x02,0x00,0x03,0x14,0xa2,0xff,0x71,0x00,0x00,0x00,0x00,0x08,0x00,0x21,0xe6,
22570x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x27,0x14,0x40,0xff,0xad,0x00,0x00,0x00,0x00,
22580x08,0x00,0x22,0x79,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x2a,0x14,0x40,0xff,0xd8,
22590x00,0x00,0x00,0x00,0x08,0x00,0x21,0xe9,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x2c,
22600x14,0x40,0xff,0x78,0x00,0x00,0x00,0x00,0x08,0x00,0x21,0xbd,0x00,0x00,0x00,0x00,
22610x91,0x86,0x00,0x00,0x91,0x83,0x00,0xd4,0x25,0x8d,0x00,0x5c,0x30,0xc4,0x00,0xff,
22620x00,0x04,0x10,0x40,0x00,0x44,0x10,0x21,0x00,0x04,0x48,0x80,0x01,0x82,0x58,0x21,
22630x01,0x89,0x40,0x21,0x25,0x78,0x00,0x08,0x10,0x60,0x00,0x37,0x25,0x0e,0x00,0x60,
22640x2c,0xa2,0x00,0x03,0x14,0x40,0x00,0x25,0x00,0x00,0x00,0x00,0x91,0x82,0x00,0xdd,
22650x00,0x00,0x00,0x00,0x14,0x40,0x00,0x1e,0x00,0x00,0x00,0x00,0x27,0x87,0x81,0x64,
22660x01,0x27,0x10,0x21,0x8c,0x43,0x00,0x00,0x00,0x00,0x00,0x00,0xad,0x03,0x00,0x60,
22670x91,0x62,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x40,0x30,0x21,0xa1,0x82,0x00,0x00,
22680x30,0xc2,0x00,0xff,0x00,0x02,0x10,0x80,0x00,0x47,0x10,0x21,0x8c,0x43,0x00,0x00,
22690x00,0x00,0x00,0x00,0x00,0x03,0x18,0x42,0xad,0xa3,0x00,0x00,0x91,0x84,0x00,0x00,
22700x8d,0xc5,0x00,0x00,0x00,0x04,0x20,0x80,0x00,0x87,0x10,0x21,0x8c,0x43,0x00,0x00,
22710x00,0x05,0x28,0x40,0x00,0x8c,0x20,0x21,0x00,0x03,0x18,0x80,0x00,0xa3,0x10,0x2b,
22720x00,0x62,0x28,0x0a,0xac,0x85,0x00,0x60,0x03,0xe0,0x00,0x08,0xa1,0x80,0x00,0xd4,
22730x27,0x87,0x81,0x64,0x08,0x00,0x22,0xb0,0xa1,0x80,0x00,0xdd,0x27,0x82,0x81,0xd4,
22740x8d,0x83,0x00,0xd8,0x00,0x82,0x10,0x21,0x90,0x44,0x00,0x00,0x24,0x63,0x00,0x01,
22750x00,0x64,0x20,0x2b,0x14,0x80,0xff,0x02,0xad,0x83,0x00,0xd8,0x8d,0x02,0x00,0x60,
22760xa1,0x80,0x00,0xd4,0x00,0x02,0x1f,0xc2,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x43,
22770x03,0xe0,0x00,0x08,0xad,0x82,0x00,0x5c,0x10,0xe0,0x00,0x1d,0x24,0x83,0xff,0xfc,
22780x2c,0x62,0x00,0x18,0x10,0x40,0x01,0x10,0x00,0x03,0x10,0x80,0x3c,0x03,0x80,0x01,
22790x24,0x63,0x02,0xf0,0x00,0x43,0x10,0x21,0x8c,0x44,0x00,0x00,0x00,0x00,0x00,0x00,
22800x00,0x80,0x00,0x08,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x30,0x14,0x40,0x00,0x65,
22810x00,0x00,0x00,0x00,0x10,0xa0,0x00,0x60,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
22820x10,0xa2,0x00,0x5a,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0x00,0x08,
22830x00,0x00,0x00,0x00,0x24,0x02,0x00,0x03,0x10,0xa2,0x00,0x51,0x00,0x00,0x00,0x00,
22840x8d,0x82,0x00,0xd0,0x00,0x00,0x00,0x00,0x24,0x42,0xff,0xe0,0xad,0x82,0x00,0xd0,
22850x8d,0xe3,0x00,0x00,0x8d,0xa2,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x43,0x10,0x21,
22860xad,0xa2,0x00,0x00,0xad,0xe0,0x00,0x00,0x8d,0xa3,0x00,0x00,0x8d,0xc4,0x00,0x00,
22870x00,0x00,0x00,0x00,0x00,0x83,0x10,0x2a,0x10,0x40,0x00,0x22,0x00,0x00,0x00,0x00,
22880x93,0x05,0x00,0x01,0x91,0x82,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x45,0x00,0x05,
22890x24,0x02,0x00,0x01,0xa1,0x85,0x00,0x00,0xa1,0x82,0x00,0xd4,0x03,0xe0,0x00,0x08,
22900xad,0x80,0x00,0xd8,0x91,0x82,0x00,0xdd,0x24,0x03,0x00,0x01,0x10,0x43,0x00,0x05,
22910x00,0x00,0x00,0x00,0xa1,0x83,0x00,0xd4,0xad,0x80,0x00,0xd8,0x03,0xe0,0x00,0x08,
22920xa1,0x83,0x00,0xdd,0x00,0x04,0x17,0xc2,0x00,0x82,0x10,0x21,0x00,0x02,0x10,0x43,
22930xad,0xa2,0x00,0x00,0x91,0x83,0x00,0x00,0x27,0x82,0x81,0x64,0x8d,0xc5,0x00,0x00,
22940x00,0x03,0x18,0x80,0x00,0x62,0x18,0x21,0x8c,0x64,0x00,0x00,0x00,0x05,0x28,0x40,
22950x00,0x04,0x18,0x80,0x00,0xa3,0x10,0x2b,0x00,0x62,0x28,0x0a,0x08,0x00,0x22,0xc2,
22960xad,0xc5,0x00,0x00,0x97,0x82,0x8b,0x7c,0x00,0x00,0x00,0x00,0x00,0x62,0x10,0x2a,
22970x10,0x40,0xfe,0xab,0x00,0x00,0x00,0x00,0x91,0x82,0x00,0xdd,0x00,0x00,0x00,0x00,
22980x14,0x40,0x00,0x15,0x00,0x00,0x00,0x00,0x91,0x83,0x00,0x00,0x27,0x82,0x81,0x64,
22990x00,0x03,0x18,0x80,0x00,0x62,0x10,0x21,0x8c,0x44,0x00,0x00,0x00,0x6c,0x18,0x21,
23000xac,0x64,0x00,0x60,0x93,0x05,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x10,0x80,
23010x01,0x82,0x10,0x21,0x24,0x4e,0x00,0x60,0xa1,0x85,0x00,0x00,0x8d,0xc2,0x00,0x00,
23020x00,0x00,0x00,0x00,0x00,0x02,0x1f,0xc2,0x00,0x43,0x10,0x21,0x00,0x02,0x10,0x43,
23030x03,0xe0,0x00,0x08,0xad,0xa2,0x00,0x00,0x08,0x00,0x23,0x37,0xa1,0x80,0x00,0xdd,
23040x8d,0x82,0x00,0xd0,0x08,0x00,0x22,0xf3,0x24,0x42,0xff,0xe8,0x8d,0x82,0x00,0xd0,
23050x08,0x00,0x22,0xf3,0x24,0x42,0x00,0x01,0x8d,0x82,0x00,0xd0,0x08,0x00,0x22,0xf3,
23060x24,0x42,0x00,0x02,0x10,0xa0,0xff,0xf9,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
23070x10,0xa2,0x00,0x0a,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0xa0,
23080x00,0x00,0x00,0x00,0x24,0x02,0x00,0x03,0x10,0xa2,0xff,0x9d,0x00,0x00,0x00,0x00,
23090x8d,0x82,0x00,0xd0,0x08,0x00,0x22,0xf3,0x24,0x42,0xff,0xd0,0x8d,0x82,0x00,0xd0,
23100x08,0x00,0x22,0xf3,0x24,0x42,0xff,0xfc,0x10,0xa0,0xff,0xeb,0x00,0x00,0x00,0x00,
23110x24,0x02,0x00,0x01,0x10,0xa2,0xff,0xe5,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,
23120x10,0xa2,0xff,0x93,0x24,0x02,0x00,0x03,0x14,0xa2,0xff,0xdd,0x00,0x00,0x00,0x00,
23130x8d,0x82,0x00,0xd0,0x08,0x00,0x22,0xf3,0x24,0x42,0xff,0xf8,0x2d,0x42,0x00,0x19,
23140x14,0x40,0xff,0x7c,0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0xdb,0x00,0x00,0x00,0x00,
23150x24,0x02,0x00,0x01,0x10,0xa2,0xff,0xd5,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,
23160x10,0xa2,0xff,0x83,0x24,0x02,0x00,0x03,0x10,0xa2,0xff,0xf1,0x00,0x00,0x00,0x00,
23170x8d,0x82,0x00,0xd0,0x08,0x00,0x22,0xf3,0x24,0x42,0xff,0xf0,0x2d,0x42,0x00,0x1b,
23180x10,0x40,0xff,0xf1,0x00,0x00,0x00,0x00,0x10,0xa0,0xff,0xcb,0x00,0x00,0x00,0x00,
23190x24,0x02,0x00,0x01,0x10,0xa2,0xff,0xc5,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,
23200x14,0xa2,0xff,0x6c,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,0x08,0x00,0x22,0xf3,
23210x24,0x42,0xff,0xf4,0x2d,0x42,0x00,0x1e,0x10,0x40,0xff,0xe3,0x00,0x00,0x00,0x00,
23220x10,0xa0,0xff,0xbd,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x68,
23230x24,0x02,0x00,0x02,0x10,0xa2,0xff,0xd6,0x00,0x00,0x00,0x00,0x08,0x00,0x22,0xee,
23240x24,0x02,0x00,0x03,0x2d,0x42,0x00,0x23,0x10,0x40,0xff,0xd7,0x00,0x00,0x00,0x00,
23250x10,0xa0,0xff,0xae,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x5c,
23260x24,0x02,0x00,0x02,0x14,0xa2,0xff,0xb7,0x00,0x00,0x00,0x00,0x08,0x00,0x23,0x74,
23270x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x25,0x10,0x40,0xff,0xcb,0x00,0x00,0x00,0x00,
23280x08,0x00,0x23,0x49,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x16,0x14,0x40,0x00,0x0e,
23290x00,0x00,0x00,0x00,0x10,0xa0,0xff,0xa0,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
23300x10,0xa2,0xff,0x9a,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x48,
23310x24,0x02,0x00,0x03,0x14,0xa2,0xff,0xb6,0x00,0x00,0x00,0x00,0x8d,0x82,0x00,0xd0,
23320x08,0x00,0x22,0xf3,0x24,0x42,0xff,0xfa,0x10,0xa0,0xff,0x93,0x00,0x00,0x00,0x00,
23330x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x8d,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,
23340x10,0xa2,0xff,0x3b,0x00,0x00,0x00,0x00,0x08,0x00,0x23,0x64,0x00,0x00,0x00,0x00,
23350x2d,0x42,0x00,0x17,0x14,0x40,0xff,0xac,0x00,0x00,0x00,0x00,0x08,0x00,0x23,0xa5,
23360x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x19,0x10,0x40,0xff,0xe2,0x00,0x00,0x00,0x00,
23370x10,0xa0,0xff,0x81,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x7b,
23380x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x29,0x24,0x02,0x00,0x03,
23390x10,0xa2,0xff,0x97,0x00,0x00,0x00,0x00,0x08,0x00,0x22,0xf0,0x00,0x00,0x00,0x00,
23400x08,0x00,0x23,0xc2,0x2d,0x42,0x00,0x1b,0x2d,0x42,0x00,0x1e,0x10,0x40,0xff,0xde,
23410x00,0x00,0x00,0x00,0x10,0xa0,0xff,0x70,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,
23420x10,0xa2,0xff,0x6a,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0xa2,0xff,0x18,
23430x24,0x02,0x00,0x03,0x10,0xa2,0xff,0x96,0x00,0x00,0x00,0x00,0x08,0x00,0x22,0xf0,
23440x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x23,0x14,0x40,0xff,0xf2,0x00,0x00,0x00,0x00,
23450x08,0x00,0x23,0x6a,0x00,0x00,0x00,0x00,0x08,0x00,0x23,0x68,0x2d,0x42,0x00,0x25,
23460x08,0x00,0x23,0x9e,0x2d,0x42,0x00,0x27,0x10,0xa0,0xff,0x5b,0x00,0x00,0x00,0x00,
23470x24,0x02,0x00,0x01,0x10,0xa2,0xff,0x55,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,
23480x10,0xa2,0xff,0x03,0x24,0x02,0x00,0x03,0x14,0xa2,0xff,0x71,0x00,0x00,0x00,0x00,
23490x08,0x00,0x23,0x57,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x27,0x14,0x40,0xff,0xad,
23500x00,0x00,0x00,0x00,0x08,0x00,0x23,0xea,0x00,0x00,0x00,0x00,0x2d,0x42,0x00,0x2a,
23510x14,0x40,0xff,0xd8,0x00,0x00,0x00,0x00,0x08,0x00,0x23,0x5a,0x00,0x00,0x00,0x00,
23520x2d,0x42,0x00,0x2c,0x14,0x40,0xff,0x78,0x00,0x00,0x00,0x00,0x08,0x00,0x22,0xe5,
23530x00,0x00,0x00,0x00,0x27,0xbd,0xff,0xe8,0x3c,0x02,0xb0,0x03,0xaf,0xbf,0x00,0x14,
23540xaf,0xb0,0x00,0x10,0x34,0x42,0x01,0x18,0x3c,0x03,0xb0,0x03,0x8c,0x50,0x00,0x00,
23550x34,0x63,0x01,0x2c,0x90,0x62,0x00,0x00,0x32,0x05,0x00,0x01,0xa3,0x82,0x80,0x10,
23560x14,0xa0,0x00,0x14,0x30,0x44,0x00,0xff,0x32,0x02,0x01,0x00,0x14,0x40,0x00,0x09,
23570x00,0x00,0x00,0x00,0x32,0x02,0x08,0x00,0x10,0x40,0x00,0x02,0x24,0x02,0x00,0x01,
23580xa3,0x82,0xbc,0x18,0x8f,0xbf,0x00,0x14,0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,
23590x27,0xbd,0x00,0x18,0x0c,0x00,0x05,0x37,0x00,0x00,0x00,0x00,0x26,0x02,0xff,0x00,
23600xa3,0x80,0xbc,0x18,0x3c,0x01,0xb0,0x03,0xac,0x22,0x01,0x18,0x08,0x00,0x24,0x16,
23610x32,0x02,0x08,0x00,0x0c,0x00,0x21,0x3f,0x00,0x00,0x00,0x00,0x26,0x02,0xff,0xff,
23620x3c,0x01,0xb0,0x03,0xac,0x22,0x01,0x18,0x08,0x00,0x24,0x13,0x32,0x02,0x01,0x00,
23630x27,0xbd,0xff,0xe0,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0xd0,0xaf,0xbf,0x00,0x18,
23640x8c,0x43,0x00,0x00,0x3c,0x02,0x00,0x40,0x24,0x07,0x0f,0xff,0x00,0x03,0x33,0x02,
23650x00,0x03,0x2d,0x02,0x00,0x03,0x43,0x02,0x30,0x69,0x0f,0xff,0x00,0x62,0x18,0x24,
23660x30,0xa5,0x00,0x03,0x30,0xc6,0x00,0xff,0x10,0x60,0x00,0x08,0x31,0x08,0x00,0xff,
23670x01,0x00,0x30,0x21,0x0c,0x00,0x24,0xdf,0xaf,0xa9,0x00,0x10,0x8f,0xbf,0x00,0x18,
23680x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x0c,0x00,0x25,0x31,
23690x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0xd4,0x08,0x00,0x24,0x3f,
23700xac,0x62,0x00,0x00,0x27,0xbd,0xff,0xc0,0x3c,0x02,0xb0,0x03,0xaf,0xbe,0x00,0x38,
23710xaf,0xb5,0x00,0x2c,0xaf,0xb1,0x00,0x1c,0xaf,0xb0,0x00,0x18,0xaf,0xbf,0x00,0x3c,
23720xaf,0xb7,0x00,0x34,0xaf,0xb6,0x00,0x30,0xaf,0xb4,0x00,0x28,0xaf,0xb3,0x00,0x24,
23730xaf,0xb2,0x00,0x20,0x34,0x42,0x00,0x3f,0x90,0x43,0x00,0x00,0x00,0x80,0x80,0x21,
23740x00,0x00,0xf0,0x21,0x00,0x00,0x88,0x21,0x10,0x60,0x00,0x76,0x00,0x00,0xa8,0x21,
23750x3c,0x01,0xb0,0x03,0xa0,0x20,0x00,0x3f,0x00,0x10,0x12,0x02,0x24,0x04,0x06,0x14,
23760x0c,0x00,0x06,0xd1,0x30,0x54,0x00,0x0f,0x24,0x04,0x06,0x14,0x0c,0x00,0x06,0xd1,
23770xaf,0xa2,0x00,0x10,0x3c,0x03,0x00,0xff,0x34,0x63,0xff,0xff,0x32,0x10,0x00,0x7f,
23780x00,0x43,0x10,0x24,0x00,0x10,0x86,0x00,0x02,0x02,0x80,0x25,0x02,0x00,0x28,0x21,
23790x24,0x04,0x06,0x14,0x3c,0x13,0xbf,0xff,0x0c,0x00,0x06,0xbf,0x3c,0x16,0xb0,0x03,
23800x00,0x00,0x90,0x21,0x3c,0x17,0x40,0x00,0x36,0x73,0xff,0xff,0x36,0xd6,0x00,0x3e,
23810x0c,0x00,0x06,0xd1,0x24,0x04,0x04,0x00,0x00,0x57,0x10,0x25,0x00,0x40,0x28,0x21,
23820x0c,0x00,0x06,0xbf,0x24,0x04,0x04,0x00,0x00,0x00,0x80,0x21,0x0c,0x00,0x25,0xf9,
23830x00,0x00,0x00,0x00,0x26,0x03,0x00,0x01,0x10,0x40,0x00,0x46,0x30,0x70,0x00,0xff,
23840x12,0x00,0xff,0xfa,0x00,0x00,0x00,0x00,0x0c,0x00,0x06,0xd1,0x24,0x04,0x04,0x00,
23850x00,0x53,0x10,0x24,0x00,0x40,0x28,0x21,0x0c,0x00,0x06,0xbf,0x24,0x04,0x04,0x00,
23860x24,0x02,0x00,0x01,0x12,0x82,0x00,0x37,0x00,0x00,0x00,0x00,0x12,0x80,0x00,0x35,
23870x00,0x00,0x00,0x00,0x32,0x31,0x00,0x7f,0x12,0x20,0x00,0x04,0x24,0x03,0x00,0x04,
23880x27,0xc2,0x00,0x01,0x30,0x5e,0x00,0xff,0x02,0xb1,0xa8,0x21,0x12,0x43,0x00,0x2a,
23890x3c,0x03,0xb0,0x03,0x02,0x43,0x10,0x21,0xa0,0x51,0x00,0x34,0x26,0x42,0x00,0x01,
23900x30,0x52,0x00,0xff,0x2e,0x43,0x00,0x05,0x14,0x60,0xff,0xd9,0x00,0x00,0x00,0x00,
23910x8f,0xa5,0x00,0x10,0x0c,0x00,0x06,0xbf,0x24,0x04,0x06,0x14,0x12,0xa0,0x00,0x0e,
23920x3c,0x02,0xb0,0x03,0x13,0xc0,0x00,0x0d,0x34,0x42,0x00,0x3c,0x00,0x15,0x10,0x40,
23930x00,0x55,0x10,0x21,0x00,0x02,0x10,0xc0,0x00,0x55,0x10,0x21,0x00,0x02,0xa8,0x80,
23940x02,0xbe,0x00,0x1b,0x17,0xc0,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x07,0x00,0x0d,
23950x00,0x00,0xa8,0x12,0x3c,0x02,0xb0,0x03,0x34,0x42,0x00,0x3c,0x3c,0x03,0xb0,0x03,
23960x3c,0x04,0xb0,0x03,0xa4,0x55,0x00,0x00,0x34,0x63,0x00,0x1c,0x34,0x84,0x00,0x1d,
23970x24,0x02,0x00,0x01,0xa0,0x60,0x00,0x00,0xa0,0x82,0x00,0x00,0x7b,0xbe,0x01,0xfc,
23980x7b,0xb6,0x01,0xbc,0x7b,0xb4,0x01,0x7c,0x7b,0xb2,0x01,0x3c,0x7b,0xb0,0x00,0xfc,
23990x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x40,0xa2,0xd1,0x00,0x00,0x08,0x00,0x24,0x98,
24000x26,0x42,0x00,0x01,0x0c,0x00,0x06,0xd1,0x24,0x04,0x04,0xfc,0x08,0x00,0x24,0x8d,
24010x00,0x40,0x88,0x21,0x3c,0x03,0xb0,0x03,0x34,0x63,0x00,0x3c,0x3c,0x04,0xb0,0x03,
24020x3c,0x05,0xb0,0x03,0xa4,0x60,0x00,0x00,0x34,0x84,0x00,0x1c,0x34,0xa5,0x00,0x1d,
24030x24,0x02,0x00,0x02,0x24,0x03,0x00,0x01,0xa0,0x82,0x00,0x00,0x08,0x00,0x24,0xb7,
24040xa0,0xa3,0x00,0x00,0x0c,0x00,0x17,0x99,0x00,0x00,0x00,0x00,0x10,0x40,0xff,0x8b,
24050x00,0x10,0x12,0x02,0x3c,0x02,0xb0,0x03,0x3c,0x04,0xb0,0x03,0x34,0x42,0x00,0x3c,
24060x34,0x84,0x00,0x14,0x24,0x03,0x00,0x01,0xa4,0x40,0x00,0x00,0x3c,0x01,0xb0,0x03,
24070xa0,0x23,0x00,0x3f,0x08,0x00,0x24,0xb7,0xac,0x90,0x00,0x00,0x27,0xbd,0xff,0xd8,
24080xaf,0xb0,0x00,0x10,0x30,0xd0,0x00,0xff,0x2e,0x02,0x00,0x2e,0xaf,0xb2,0x00,0x18,
24090xaf,0xb1,0x00,0x14,0xaf,0xbf,0x00,0x20,0xaf,0xb3,0x00,0x1c,0x30,0xb1,0x00,0xff,
24100x14,0x40,0x00,0x06,0x00,0x80,0x90,0x21,0x8f,0xbf,0x00,0x20,0x7b,0xb2,0x00,0xfc,
24110x7b,0xb0,0x00,0xbc,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x28,0x2e,0x13,0x00,0x10,
24120x24,0x05,0x00,0x14,0x0c,0x00,0x13,0xa4,0x24,0x06,0x01,0x07,0x12,0x60,0x00,0x38,
24130x02,0x00,0x30,0x21,0x8f,0xa2,0x00,0x38,0x30,0xc3,0x00,0x3f,0x3c,0x04,0xb0,0x09,
24140x00,0x02,0x14,0x00,0x00,0x43,0x30,0x25,0x34,0x84,0x01,0x60,0x90,0x82,0x00,0x00,
24150x00,0x00,0x00,0x00,0x14,0x40,0xff,0xfd,0x24,0x02,0x00,0x01,0x12,0x22,0x00,0x2a,
24160x2a,0x22,0x00,0x02,0x14,0x40,0x00,0x24,0x24,0x02,0x00,0x02,0x12,0x22,0x00,0x20,
24170x24,0x02,0x00,0x03,0x12,0x22,0x00,0x19,0x00,0x00,0x00,0x00,0x16,0x60,0xff,0xe2,
24180x24,0x02,0x00,0x01,0x12,0x22,0x00,0x13,0x2a,0x22,0x00,0x02,0x14,0x40,0x00,0x0d,
24190x24,0x02,0x00,0x02,0x12,0x22,0x00,0x09,0x24,0x02,0x00,0x03,0x16,0x22,0xff,0xda,
24200x00,0x00,0x00,0x00,0x24,0x04,0x08,0x4c,0x24,0x05,0xff,0xff,0x0c,0x00,0x13,0x5f,
24210x3c,0x06,0x0c,0xb8,0x08,0x00,0x24,0xea,0x00,0x00,0x00,0x00,0x08,0x00,0x25,0x12,
24220x24,0x04,0x08,0x48,0x16,0x20,0xff,0xd0,0x00,0x00,0x00,0x00,0x08,0x00,0x25,0x12,
24230x24,0x04,0x08,0x40,0x08,0x00,0x25,0x12,0x24,0x04,0x08,0x44,0x24,0x04,0x08,0x4c,
24240x0c,0x00,0x13,0x5f,0x24,0x05,0xff,0xff,0x08,0x00,0x25,0x07,0x00,0x00,0x00,0x00,
24250x08,0x00,0x25,0x20,0x24,0x04,0x08,0x48,0x16,0x20,0xff,0xe0,0x00,0x00,0x00,0x00,
24260x08,0x00,0x25,0x20,0x24,0x04,0x08,0x40,0x08,0x00,0x25,0x20,0x24,0x04,0x08,0x44,
24270x02,0x40,0x20,0x21,0x0c,0x00,0x25,0x71,0x02,0x20,0x28,0x21,0x08,0x00,0x24,0xf5,
24280x00,0x40,0x30,0x21,0x27,0xbd,0xff,0xd8,0x2c,0xc2,0x00,0x2e,0xaf,0xb2,0x00,0x18,
24290xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x20,0xaf,0xb3,0x00,0x1c,
24300x00,0xc0,0x80,0x21,0x30,0xb1,0x00,0xff,0x00,0x80,0x90,0x21,0x14,0x40,0x00,0x07,
24310x00,0x00,0x18,0x21,0x8f,0xbf,0x00,0x20,0x7b,0xb2,0x00,0xfc,0x7b,0xb0,0x00,0xbc,
24320x00,0x60,0x10,0x21,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x28,0x2e,0x13,0x00,0x10,
24330x24,0x05,0x00,0x14,0x0c,0x00,0x13,0xa4,0x24,0x06,0x01,0x07,0x12,0x60,0x00,0x24,
24340x02,0x00,0x30,0x21,0x3c,0x03,0xb0,0x09,0x34,0x63,0x01,0x60,0x90,0x62,0x00,0x00,
24350x00,0x00,0x00,0x00,0x14,0x40,0xff,0xfd,0x30,0xc5,0x00,0x3f,0x0c,0x00,0x25,0xae,
24360x02,0x20,0x20,0x21,0x16,0x60,0x00,0x0a,0x00,0x40,0x80,0x21,0x24,0x02,0x00,0x01,
24370x12,0x22,0x00,0x15,0x2a,0x22,0x00,0x02,0x14,0x40,0x00,0x0f,0x24,0x02,0x00,0x02,
24380x12,0x22,0x00,0x0b,0x24,0x02,0x00,0x03,0x12,0x22,0x00,0x03,0x00,0x00,0x00,0x00,
24390x08,0x00,0x25,0x3d,0x02,0x00,0x18,0x21,0x24,0x04,0x08,0x4c,0x24,0x05,0xff,0xff,
24400x0c,0x00,0x13,0x5f,0x3c,0x06,0x0c,0xb8,0x08,0x00,0x25,0x3d,0x02,0x00,0x18,0x21,
24410x08,0x00,0x25,0x5f,0x24,0x04,0x08,0x48,0x16,0x20,0xff,0xf5,0x00,0x00,0x00,0x00,
24420x08,0x00,0x25,0x5f,0x24,0x04,0x08,0x40,0x08,0x00,0x25,0x5f,0x24,0x04,0x08,0x44,
24430x02,0x40,0x20,0x21,0x0c,0x00,0x25,0x71,0x02,0x20,0x28,0x21,0x08,0x00,0x25,0x49,
24440x00,0x40,0x30,0x21,0x27,0xbd,0xff,0xe8,0x2c,0xc2,0x00,0x1f,0xaf,0xb0,0x00,0x10,
24450xaf,0xbf,0x00,0x14,0x00,0xc0,0x80,0x21,0x14,0x40,0x00,0x1d,0x30,0xa5,0x00,0xff,
24460x24,0x02,0x00,0x01,0x10,0xa2,0x00,0x18,0x28,0xa2,0x00,0x02,0x14,0x40,0x00,0x12,
24470x24,0x02,0x00,0x02,0x10,0xa2,0x00,0x0e,0x24,0x02,0x00,0x03,0x10,0xa2,0x00,0x07,
24480x24,0x04,0x08,0x4c,0x26,0x10,0xff,0xe2,0x02,0x00,0x10,0x21,0x8f,0xbf,0x00,0x14,
24490x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x24,0x05,0xff,0xff,
24500x0c,0x00,0x13,0x5f,0x3c,0x06,0x0d,0xf8,0x08,0x00,0x25,0x82,0x26,0x10,0xff,0xe2,
24510x08,0x00,0x25,0x87,0x24,0x04,0x08,0x48,0x14,0xa0,0xff,0xf2,0x24,0x04,0x08,0x40,
24520x08,0x00,0x25,0x88,0x24,0x05,0xff,0xff,0x08,0x00,0x25,0x87,0x24,0x04,0x08,0x44,
24530x2c,0xc2,0x00,0x10,0x14,0x40,0xff,0xec,0x24,0x02,0x00,0x01,0x10,0xa2,0x00,0x14,
24540x28,0xa2,0x00,0x02,0x14,0x40,0x00,0x0e,0x24,0x02,0x00,0x02,0x10,0xa2,0x00,0x0a,
24550x24,0x02,0x00,0x03,0x10,0xa2,0x00,0x03,0x24,0x04,0x08,0x4c,0x08,0x00,0x25,0x82,
24560x26,0x10,0xff,0xf1,0x24,0x05,0xff,0xff,0x0c,0x00,0x13,0x5f,0x3c,0x06,0x0d,0xb8,
24570x08,0x00,0x25,0x82,0x26,0x10,0xff,0xf1,0x08,0x00,0x25,0xa1,0x24,0x04,0x08,0x48,
24580x14,0xa0,0xff,0xf6,0x24,0x04,0x08,0x40,0x08,0x00,0x25,0xa2,0x24,0x05,0xff,0xff,
24590x08,0x00,0x25,0xa1,0x24,0x04,0x08,0x44,0x27,0xbd,0xff,0xe8,0x30,0x84,0x00,0xff,
24600x24,0x02,0x00,0x01,0x10,0x82,0x00,0x39,0xaf,0xbf,0x00,0x10,0x28,0x82,0x00,0x02,
24610x14,0x40,0x00,0x27,0x00,0x00,0x00,0x00,0x24,0x02,0x00,0x02,0x10,0x82,0x00,0x17,
24620x00,0xa0,0x30,0x21,0x24,0x02,0x00,0x03,0x10,0x82,0x00,0x05,0x24,0x04,0x08,0x3c,
24630x8f,0xbf,0x00,0x10,0x00,0x00,0x00,0x00,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,
24640x0c,0x00,0x13,0x5f,0x3c,0x05,0x3f,0x00,0x24,0x04,0x08,0x3c,0x3c,0x05,0x80,0x00,
24650x0c,0x00,0x13,0x5f,0x00,0x00,0x30,0x21,0x24,0x04,0x08,0x3c,0x3c,0x05,0x80,0x00,
24660x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x01,0x24,0x04,0x08,0xac,0x0c,0x00,0x13,0x41,
24670x24,0x05,0x0f,0xff,0x08,0x00,0x25,0xbc,0x00,0x00,0x00,0x00,0x24,0x04,0x08,0x34,
24680x0c,0x00,0x13,0x5f,0x3c,0x05,0x3f,0x00,0x24,0x04,0x08,0x34,0x3c,0x05,0x80,0x00,
24690x0c,0x00,0x13,0x5f,0x00,0x00,0x30,0x21,0x24,0x04,0x08,0x34,0x3c,0x05,0x80,0x00,
24700x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x01,0x08,0x00,0x25,0xcb,0x24,0x04,0x08,0xa8,
24710x14,0x80,0xff,0xdf,0x00,0xa0,0x30,0x21,0x24,0x04,0x08,0x24,0x0c,0x00,0x13,0x5f,
24720x3c,0x05,0x3f,0x00,0x24,0x04,0x08,0x24,0x3c,0x05,0x80,0x00,0x0c,0x00,0x13,0x5f,
24730x00,0x00,0x30,0x21,0x24,0x04,0x08,0x24,0x3c,0x05,0x80,0x00,0x0c,0x00,0x13,0x5f,
24740x24,0x06,0x00,0x01,0x08,0x00,0x25,0xcb,0x24,0x04,0x08,0xa0,0x00,0xa0,0x30,0x21,
24750x24,0x04,0x08,0x2c,0x0c,0x00,0x13,0x5f,0x3c,0x05,0x3f,0x00,0x24,0x04,0x08,0x2c,
24760x3c,0x05,0x80,0x00,0x0c,0x00,0x13,0x5f,0x00,0x00,0x30,0x21,0x24,0x04,0x08,0x2c,
24770x3c,0x05,0x80,0x00,0x0c,0x00,0x13,0x5f,0x24,0x06,0x00,0x01,0x08,0x00,0x25,0xcb,
24780x24,0x04,0x08,0xa4,0x3c,0x05,0x00,0x14,0x3c,0x02,0xb0,0x05,0x34,0x42,0x04,0x20,
24790x3c,0x06,0xc0,0x00,0x3c,0x03,0xb0,0x05,0x3c,0x04,0xb0,0x05,0x34,0xa5,0x17,0x09,
24800xac,0x45,0x00,0x00,0x34,0xc6,0x05,0x07,0x34,0x63,0x04,0x24,0x34,0x84,0x02,0x28,
24810x3c,0x07,0xb0,0x05,0x24,0x02,0x00,0x20,0xac,0x66,0x00,0x00,0x34,0xe7,0x04,0x50,
24820xa0,0x82,0x00,0x00,0x90,0xe2,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x03,
24830x10,0x40,0xff,0xfc,0x24,0x02,0x00,0x01,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
24840x93,0x85,0x81,0xf1,0x24,0x02,0x00,0x01,0x14,0xa2,0x00,0x53,0x00,0x80,0x40,0x21,
24850x8c,0x89,0x00,0x04,0x3c,0x02,0xb0,0x01,0x01,0x22,0x30,0x21,0x8c,0xc3,0x00,0x04,
24860x3c,0x02,0x01,0x00,0x00,0x62,0x10,0x24,0x10,0x40,0x00,0x4b,0x30,0x62,0x00,0x08,
24870x10,0x45,0x00,0x59,0x00,0x00,0x00,0x00,0x94,0xc2,0x00,0x38,0x24,0x03,0x00,0xb4,
24880x30,0x44,0x00,0xff,0x10,0x83,0x00,0x61,0x24,0x02,0x00,0xc4,0x10,0x82,0x00,0x54,
24890x24,0x02,0x00,0x94,0x10,0x82,0x00,0x45,0x00,0x00,0x00,0x00,0x94,0xc2,0x00,0x38,
24900x00,0x00,0x00,0x00,0x30,0x47,0xff,0xff,0x30,0xe3,0x40,0xff,0x24,0x02,0x40,0x88,
24910x14,0x62,0x00,0x39,0x30,0xe3,0x03,0x00,0x24,0x02,0x03,0x00,0x10,0x62,0x00,0x38,
24920x00,0x00,0x00,0x00,0x94,0xc2,0x00,0x56,0x00,0x00,0x00,0x00,0x30,0x47,0xff,0xff,
24930x30,0xe2,0x00,0x80,0x14,0x40,0x00,0x30,0x3c,0x02,0xb0,0x01,0x01,0x22,0x30,0x21,
24940x94,0xc3,0x00,0x60,0x24,0x02,0x00,0x08,0x14,0x43,0x00,0x3b,0x00,0x00,0x00,0x00,
24950x90,0xc2,0x00,0x62,0x24,0x03,0x00,0x04,0x00,0x02,0x39,0x02,0x10,0xe3,0x00,0x15,
24960x24,0x02,0x00,0x06,0x14,0xe2,0x00,0x34,0x00,0x00,0x00,0x00,0x8d,0x05,0x01,0xac,
24970x94,0xc4,0x00,0x66,0x27,0x82,0x89,0x68,0x00,0x05,0x28,0x80,0x30,0x87,0xff,0xff,
24980x00,0xa2,0x28,0x21,0x00,0x07,0x1a,0x00,0x8c,0xa4,0x00,0x00,0x00,0x07,0x12,0x02,
24990x00,0x43,0x10,0x25,0x24,0x42,0x00,0x5e,0x24,0x03,0xc0,0x00,0x30,0x47,0xff,0xff,
25000x00,0x83,0x20,0x24,0x00,0x87,0x20,0x25,0xac,0xa4,0x00,0x00,0x08,0x00,0x26,0x76,
25010xad,0x07,0x00,0x10,0x8d,0x05,0x01,0xac,0x94,0xc4,0x00,0x64,0x27,0x82,0x89,0x68,
25020x00,0x05,0x28,0x80,0x30,0x87,0xff,0xff,0x00,0xa2,0x28,0x21,0x00,0x07,0x1a,0x00,
25030x8c,0xa4,0x00,0x00,0x00,0x07,0x12,0x02,0x00,0x43,0x10,0x25,0x24,0x42,0x00,0x36,
25040x3c,0x03,0xff,0xff,0x30,0x47,0xff,0xff,0x00,0x83,0x20,0x24,0x00,0x87,0x20,0x25,
25050xac,0xa4,0x00,0x00,0xad,0x07,0x00,0x10,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
25060x94,0xc2,0x00,0x50,0x08,0x00,0x26,0x34,0x30,0x47,0xff,0xff,0x8d,0x04,0x01,0xac,
25070x27,0x83,0x89,0x68,0x00,0x04,0x20,0x80,0x00,0x83,0x20,0x21,0x8c,0x82,0x00,0x00,
25080x3c,0x03,0xff,0xff,0x00,0x43,0x10,0x24,0x34,0x42,0x00,0x2e,0xac,0x82,0x00,0x00,
25090x24,0x03,0x00,0x2e,0xad,0x03,0x00,0x10,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
25100x8d,0x04,0x01,0xac,0x27,0x83,0x89,0x68,0x00,0x04,0x20,0x80,0x00,0x83,0x20,0x21,
25110x8c,0x82,0x00,0x00,0x3c,0x03,0xff,0xff,0x00,0x43,0x10,0x24,0x34,0x42,0x00,0x0e,
25120x24,0x03,0x00,0x0e,0x08,0x00,0x26,0x75,0xac,0x82,0x00,0x00,0x8d,0x04,0x01,0xac,
25130x27,0x83,0x89,0x68,0x00,0x04,0x20,0x80,0x00,0x83,0x20,0x21,0x8c,0x82,0x00,0x00,
25140x3c,0x03,0xff,0xff,0x00,0x43,0x10,0x24,0x34,0x42,0x00,0x14,0x24,0x03,0x00,0x14,
25150x08,0x00,0x26,0x75,0xac,0x82,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
25160x30,0xc6,0x00,0xff,0x00,0x06,0x48,0x40,0x01,0x26,0x10,0x21,0x00,0x02,0x10,0x80,
25170x27,0x8b,0xbc,0x30,0x27,0x83,0xbc,0x36,0x00,0x4b,0x40,0x21,0x00,0x43,0x10,0x21,
25180x94,0x47,0x00,0x00,0x30,0xa2,0x3f,0xff,0x10,0xe2,0x00,0x29,0x30,0x8a,0xff,0xff,
25190x95,0x02,0x00,0x02,0x24,0x03,0x00,0x01,0x00,0x02,0x11,0x82,0x30,0x42,0x00,0x01,
25200x10,0x43,0x00,0x18,0x00,0x00,0x00,0x00,0x01,0x26,0x10,0x21,0x00,0x02,0x10,0x80,
25210x00,0x4b,0x30,0x21,0x94,0xc4,0x00,0x02,0x27,0x83,0xbc,0x36,0x27,0x85,0xbc,0x34,
25220x00,0x45,0x28,0x21,0x30,0x84,0xff,0xdf,0x00,0x43,0x10,0x21,0xa4,0xc4,0x00,0x02,
25230xa4,0x40,0x00,0x00,0xa4,0xa0,0x00,0x00,0x94,0xc3,0x00,0x02,0x3c,0x04,0xb0,0x01,
25240x01,0x44,0x20,0x21,0x30,0x63,0xff,0xbf,0xa4,0xc3,0x00,0x02,0xa0,0xc0,0x00,0x00,
25250x8c,0x82,0x00,0x04,0x24,0x03,0xf0,0xff,0x00,0x43,0x10,0x24,0x03,0xe0,0x00,0x08,
25260xac,0x82,0x00,0x04,0x24,0x02,0xc0,0x00,0x91,0x04,0x00,0x01,0x00,0xa2,0x10,0x24,
25270x00,0x47,0x28,0x25,0x3c,0x03,0xb0,0x01,0x24,0x02,0x00,0x02,0x14,0x82,0xff,0xe2,
25280x01,0x43,0x18,0x21,0xac,0x65,0x00,0x00,0x08,0x00,0x26,0xa3,0x01,0x26,0x10,0x21,
25290x08,0x00,0x26,0xa3,0x01,0x26,0x10,0x21,0x93,0x83,0x81,0xf1,0x24,0x02,0x00,0x01,
25300x14,0x62,0x00,0x0d,0x3c,0x02,0xb0,0x01,0x8c,0x84,0x00,0x04,0x3c,0x06,0xb0,0x09,
25310x00,0x82,0x20,0x21,0x8c,0x85,0x00,0x08,0x8c,0x83,0x00,0x04,0x3c,0x02,0x01,0x00,
25320x34,0xc6,0x01,0x00,0x00,0x62,0x18,0x24,0x14,0x60,0x00,0x05,0x30,0xa5,0x20,0x00,
25330x24,0x02,0x00,0x06,0xa0,0xc2,0x00,0x00,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,
25340x3c,0x03,0xb0,0x09,0x10,0xa0,0xff,0xfc,0x34,0x63,0x01,0x00,0x24,0x02,0x00,0x0e,
25350x08,0x00,0x26,0xd6,0xa0,0x62,0x00,0x00,0x3c,0x02,0xb0,0x01,0x30,0xa5,0xff,0xff,
25360x00,0xa2,0x28,0x21,0x8c,0xa3,0x00,0x00,0x3c,0x02,0x10,0x00,0x00,0x80,0x30,0x21,
25370x00,0x62,0x18,0x24,0x8c,0xa2,0x00,0x04,0x10,0x60,0x00,0x04,0x00,0x00,0x00,0x00,
25380x30,0x42,0x80,0x00,0x10,0x40,0x00,0x13,0x00,0x00,0x00,0x00,0x8c,0xc2,0x01,0xa8,
25390x00,0x00,0x00,0x00,0x24,0x44,0x00,0x01,0x28,0x83,0x00,0x00,0x24,0x42,0x00,0x40,
25400x00,0x83,0x10,0x0a,0x93,0x83,0x81,0xf0,0x00,0x02,0x11,0x83,0x00,0x02,0x11,0x80,
25410x00,0x82,0x20,0x23,0x24,0x63,0xff,0xff,0xac,0xc4,0x01,0xa8,0xa3,0x83,0x81,0xf0,
25420x8c,0xc4,0x01,0xac,0x8c,0xc2,0x01,0xa8,0x00,0x00,0x00,0x00,0x00,0x44,0x10,0x26,
25430x00,0x02,0x10,0x2b,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x3c,0x03,0xb0,0x03,
25440x34,0x63,0x00,0x73,0x90,0x62,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x42,0x00,0x01,
25450x14,0x40,0x00,0x04,0x00,0x00,0x00,0x00,0xa3,0x80,0x81,0xf1,0x03,0xe0,0x00,0x08,
25460x00,0x00,0x00,0x00,0x24,0x02,0x00,0x01,0xa3,0x82,0x81,0xf1,0x03,0xe0,0x00,0x08,
25470x00,0x00,0x00,0x00,0x8c,0x82,0x00,0x04,0x3c,0x05,0xb0,0x01,0x00,0x80,0x50,0x21,
25480x00,0x45,0x10,0x21,0x8c,0x43,0x00,0x04,0x24,0x02,0x00,0x05,0x00,0x03,0x1a,0x02,
25490x30,0x69,0x00,0x0f,0x11,0x22,0x00,0x0b,0x24,0x02,0x00,0x07,0x11,0x22,0x00,0x09,
25500x24,0x02,0x00,0x0a,0x11,0x22,0x00,0x07,0x24,0x02,0x00,0x0b,0x11,0x22,0x00,0x05,
25510x24,0x02,0x00,0x01,0x93,0x83,0x81,0xf0,0x3c,0x04,0xb0,0x06,0x10,0x62,0x00,0x03,
25520x34,0x84,0x80,0x18,0x03,0xe0,0x00,0x08,0x00,0x00,0x00,0x00,0x8c,0x82,0x00,0x00,
25530x00,0x00,0x00,0x00,0x00,0x02,0x17,0x02,0x14,0x40,0xff,0xfa,0x00,0x00,0x00,0x00,
25540x8d,0x43,0x01,0xa8,0x27,0x82,0x89,0x68,0x00,0x03,0x18,0x80,0x00,0x6a,0x20,0x21,
25550x8c,0x87,0x00,0xa8,0x00,0x62,0x18,0x21,0x8c,0x68,0x00,0x00,0x00,0xe5,0x28,0x21,
25560x8c,0xa9,0x00,0x00,0x3c,0x02,0xff,0xff,0x27,0x83,0x8a,0x68,0x01,0x22,0x10,0x24,
25570x00,0x48,0x10,0x25,0xac,0xa2,0x00,0x00,0x8d,0x44,0x01,0xa8,0x00,0x07,0x30,0xc2,
25580x3c,0x02,0x00,0x80,0x00,0x04,0x20,0x80,0x00,0x83,0x20,0x21,0x00,0x06,0x32,0x00,
25590x8c,0xa9,0x00,0x04,0x00,0xc2,0x30,0x25,0x8c,0x82,0x00,0x00,0x3c,0x03,0x80,0x00,
25600x01,0x22,0x10,0x25,0x00,0x43,0x10,0x25,0xac,0xa2,0x00,0x04,0xaf,0x87,0xbc,0x20,
25610x8c,0xa2,0x00,0x00,0x00,0x00,0x00,0x00,0xaf,0x82,0xbc,0x28,0x8c,0xa3,0x00,0x04,
25620x3c,0x01,0xb0,0x07,0xac,0x26,0x80,0x18,0x8d,0x42,0x01,0xa8,0xaf,0x83,0xbc,0x24,
25630x93,0x85,0x81,0xf0,0x24,0x44,0x00,0x01,0x28,0x83,0x00,0x00,0x24,0x42,0x00,0x40,
25640x00,0x83,0x10,0x0a,0x00,0x02,0x11,0x83,0x00,0x02,0x11,0x80,0x24,0xa5,0xff,0xff,
25650x00,0x82,0x20,0x23,0xad,0x44,0x01,0xa8,0xa3,0x85,0x81,0xf0,0x08,0x00,0x27,0x21,
25660x00,0x00,0x00,0x00,0x3c,0x05,0xb0,0x03,0x3c,0x02,0x80,0x01,0x34,0xa5,0x00,0x20,
25670x24,0x42,0x9d,0x64,0xac,0xa2,0x00,0x00,0x24,0x02,0x00,0x02,0x24,0x03,0x00,0x20,
25680xac,0x82,0x00,0x64,0x3c,0x02,0x80,0x01,0xac,0x83,0x00,0x60,0xac,0x80,0x00,0x00,
25690xac,0x80,0x00,0x04,0xac,0x80,0x00,0x08,0xac,0x80,0x00,0x4c,0xac,0x80,0x00,0x50,
25700xac,0x80,0x00,0x54,0xac,0x80,0x00,0x0c,0xac,0x80,0x00,0x58,0xa0,0x80,0x00,0x5c,
25710x24,0x42,0x9e,0x28,0x24,0x83,0x00,0x68,0x24,0x05,0x00,0x0f,0x24,0xa5,0xff,0xff,
25720xac,0x62,0x00,0x00,0x04,0xa1,0xff,0xfd,0x24,0x63,0x00,0x04,0x3c,0x02,0x80,0x01,
25730x24,0x42,0x9f,0x10,0xac,0x82,0x00,0x78,0x3c,0x03,0x80,0x01,0x3c,0x02,0x80,0x01,
25740x24,0x63,0xa0,0x9c,0x24,0x42,0xa0,0x08,0xac,0x83,0x00,0x88,0xac,0x82,0x00,0x98,
25750x3c,0x03,0x80,0x01,0x3c,0x02,0x80,0x01,0x24,0x63,0xa1,0x44,0x24,0x42,0xa2,0x5c,
25760xac,0x83,0x00,0xa0,0xac,0x82,0x00,0xa4,0xa0,0x80,0x01,0xba,0xac,0x80,0x01,0xa8,
25770xac,0x80,0x01,0xac,0xac,0x80,0x01,0xb0,0xac,0x80,0x01,0xb4,0xa0,0x80,0x01,0xb8,
25780x03,0xe0,0x00,0x08,0xa0,0x80,0x01,0xb9,0x3c,0x03,0xb0,0x03,0x3c,0x02,0x80,0x01,
25790x34,0x63,0x00,0x20,0x24,0x42,0x9e,0x28,0x03,0xe0,0x00,0x08,0xac,0x62,0x00,0x00,
25800x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,0x34,0x42,0x00,0x20,0x24,0x63,0x9e,0x40,
25810xac,0x43,0x00,0x00,0x8c,0x82,0x00,0x10,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x11,
25820x00,0x80,0x28,0x21,0x8c,0x82,0x00,0x14,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x0d,
25830x00,0x00,0x00,0x00,0x8c,0x84,0x00,0x10,0x8c,0xa3,0x00,0x14,0x8c,0xa2,0x00,0x04,
25840x00,0x83,0x20,0x21,0x00,0x44,0x10,0x21,0x30,0x43,0x00,0xff,0x00,0x03,0x18,0x2b,
25850x00,0x02,0x12,0x02,0x00,0x43,0x10,0x21,0x00,0x02,0x12,0x00,0x30,0x42,0x3f,0xff,
25860xac,0xa2,0x00,0x04,0xac,0xa0,0x00,0x00,0xac,0xa0,0x00,0x4c,0xac,0xa0,0x00,0x50,
25870xac,0xa0,0x00,0x54,0x03,0xe0,0x00,0x08,0xac,0xa0,0x00,0x0c,0x3c,0x03,0xb0,0x03,
25880x3c,0x02,0x80,0x01,0x34,0x63,0x00,0x20,0x24,0x42,0x9e,0xbc,0xac,0x62,0x00,0x00,
25890x8c,0x86,0x00,0x04,0x3c,0x02,0xb0,0x01,0x24,0x03,0x00,0x01,0x00,0xc2,0x10,0x21,
25900x8c,0x45,0x00,0x00,0xac,0x83,0x00,0x4c,0x00,0x05,0x14,0x02,0x30,0xa3,0x3f,0xff,
25910x30,0x42,0x00,0xff,0xac,0x83,0x00,0x10,0xac,0x82,0x00,0x14,0x8c,0x83,0x00,0x14,
25920xac,0x85,0x00,0x40,0x00,0xc3,0x30,0x21,0x03,0xe0,0x00,0x08,0xac,0x86,0x00,0x08,
25930x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,0x27,0xbd,0xff,0xe8,0x34,0x42,0x00,0x20,
25940x24,0x63,0x9f,0x10,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,0xac,0x43,0x00,0x00,
25950x8c,0x82,0x00,0x4c,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x0a,0x00,0x80,0x80,0x21,
25960xae,0x00,0x00,0x00,0xae,0x00,0x00,0x4c,0xae,0x00,0x00,0x50,0xae,0x00,0x00,0x54,
25970xae,0x00,0x00,0x0c,0x8f,0xbf,0x00,0x14,0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,
25980x27,0xbd,0x00,0x18,0x0c,0x00,0x27,0xaf,0x00,0x00,0x00,0x00,0x08,0x00,0x27,0xd1,
25990xae,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,0x27,0xbd,0xff,0xe8,
26000x34,0x42,0x00,0x20,0x24,0x63,0x9f,0x74,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,
26010xac,0x43,0x00,0x00,0x8c,0x82,0x00,0x4c,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x16,
26020x00,0x80,0x80,0x21,0x8e,0x03,0x00,0x08,0x3c,0x02,0xb0,0x01,0x8e,0x04,0x00,0x44,
26030x00,0x62,0x18,0x21,0x90,0x65,0x00,0x00,0x24,0x02,0x00,0x01,0xae,0x02,0x00,0x50,
26040x30,0xa3,0x00,0xff,0x00,0x03,0x10,0x82,0x00,0x04,0x23,0x02,0x30,0x84,0x00,0x0f,
26050x30,0x42,0x00,0x03,0x00,0x03,0x19,0x02,0xae,0x04,0x00,0x34,0xae,0x02,0x00,0x2c,
26060xae,0x03,0x00,0x30,0xa2,0x05,0x00,0x48,0x8f,0xbf,0x00,0x14,0x8f,0xb0,0x00,0x10,
26070x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x0c,0x00,0x27,0xaf,0x00,0x00,0x00,0x00,
26080x08,0x00,0x27,0xe9,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,
26090x27,0xbd,0xff,0xe8,0x34,0x42,0x00,0x20,0x24,0x63,0xa0,0x08,0xaf,0xb0,0x00,0x10,
26100xaf,0xbf,0x00,0x14,0xac,0x43,0x00,0x00,0x8c,0x82,0x00,0x50,0x00,0x00,0x00,0x00,
26110x10,0x40,0x00,0x16,0x00,0x80,0x80,0x21,0x92,0x03,0x00,0x44,0x8e,0x02,0x00,0x40,
26120x83,0x85,0x8b,0xd4,0x92,0x04,0x00,0x41,0x30,0x63,0x00,0x01,0x00,0x02,0x16,0x02,
26130xae,0x04,0x00,0x14,0x00,0x00,0x30,0x21,0xae,0x02,0x00,0x18,0x10,0xa0,0x00,0x04,
26140xae,0x03,0x00,0x3c,0x10,0x60,0x00,0x03,0x24,0x02,0x00,0x01,0x24,0x06,0x00,0x01,
26150x24,0x02,0x00,0x01,0xa3,0x86,0x8b,0xd4,0x8f,0xbf,0x00,0x14,0xae,0x02,0x00,0x54,
26160x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x0c,0x00,0x27,0xdd,
26170x00,0x00,0x00,0x00,0x08,0x00,0x28,0x0e,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,
26180x3c,0x03,0x80,0x01,0x27,0xbd,0xff,0xe8,0x34,0x42,0x00,0x20,0x24,0x63,0xa0,0x9c,
26190xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,0xac,0x43,0x00,0x00,0x8c,0x82,0x00,0x50,
26200x00,0x00,0x00,0x00,0x10,0x40,0x00,0x1b,0x00,0x80,0x80,0x21,0x3c,0x02,0xb0,0x03,
26210x8c,0x42,0x00,0x00,0x92,0x04,0x00,0x44,0x8e,0x03,0x00,0x40,0x83,0x86,0x8b,0xd4,
26220x92,0x05,0x00,0x41,0x30,0x42,0x08,0x00,0x30,0x84,0x00,0x01,0x00,0x02,0x12,0xc2,
26230x00,0x03,0x1e,0x02,0x00,0x82,0x20,0x25,0xae,0x05,0x00,0x14,0x00,0x00,0x38,0x21,
26240xae,0x03,0x00,0x18,0x10,0xc0,0x00,0x04,0xae,0x04,0x00,0x3c,0x10,0x80,0x00,0x03,
26250x24,0x02,0x00,0x01,0x24,0x07,0x00,0x01,0x24,0x02,0x00,0x01,0xa3,0x87,0x8b,0xd4,
26260x8f,0xbf,0x00,0x14,0xae,0x02,0x00,0x54,0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,
26270x27,0xbd,0x00,0x18,0x0c,0x00,0x27,0xdd,0x00,0x00,0x00,0x00,0x08,0x00,0x28,0x33,
26280x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,0x27,0xbd,0xff,0xe8,
26290x34,0x42,0x00,0x20,0x24,0x63,0xa1,0x44,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,
26300xac,0x43,0x00,0x00,0x8c,0x82,0x00,0x54,0x00,0x00,0x00,0x00,0x10,0x40,0x00,0x37,
26310x00,0x80,0x80,0x21,0x8e,0x04,0x00,0x04,0x8e,0x03,0x00,0x44,0x3c,0x02,0x80,0x00,
26320x3c,0x05,0xb0,0x01,0x34,0x42,0x00,0x10,0x00,0x85,0x20,0x21,0x00,0x62,0x18,0x25,
26330xac,0x83,0x00,0x04,0x8e,0x02,0x00,0x04,0x8e,0x03,0x01,0xac,0x02,0x00,0x20,0x21,
26340x00,0x45,0x10,0x21,0x8c,0x46,0x00,0x00,0x00,0x03,0x18,0x80,0x27,0x82,0x89,0x68,
26350x00,0x62,0x18,0x21,0xac,0x66,0x00,0x00,0x8e,0x02,0x00,0x04,0x8e,0x03,0x01,0xac,
26360x00,0x45,0x10,0x21,0x8c,0x46,0x00,0x04,0x00,0x03,0x18,0x80,0x27,0x82,0x8a,0x68,
26370x00,0x62,0x18,0x21,0x0c,0x00,0x26,0x10,0xac,0x66,0x00,0x00,0x8e,0x03,0x01,0xac,
26380x8e,0x07,0x00,0x04,0x3c,0x06,0xb0,0x03,0x24,0x65,0x00,0x01,0x28,0xa4,0x00,0x00,
26390x24,0x62,0x00,0x40,0x00,0xa4,0x10,0x0a,0x00,0x02,0x11,0x83,0x00,0x02,0x11,0x80,
26400x00,0x03,0x18,0x80,0x00,0xa2,0x28,0x23,0x00,0x70,0x18,0x21,0xae,0x05,0x01,0xac,
26410xac,0x67,0x00,0xa8,0x34,0xc6,0x00,0x30,0x8c,0xc3,0x00,0x00,0x93,0x82,0x81,0xf0,
26420x02,0x00,0x20,0x21,0x24,0x63,0x00,0x01,0x24,0x42,0x00,0x01,0xac,0xc3,0x00,0x00,
26430xa3,0x82,0x81,0xf0,0x0c,0x00,0x27,0x90,0x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x14,
26440x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x18,0x0c,0x00,0x28,0x27,
26450x00,0x00,0x00,0x00,0x08,0x00,0x28,0x5d,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,
26460x3c,0x03,0x80,0x01,0x27,0xbd,0xff,0xe8,0x34,0x42,0x00,0x20,0x24,0x63,0xa2,0x5c,
26470xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x14,0xac,0x43,0x00,0x00,0x8c,0x82,0x00,0x54,
26480x00,0x00,0x00,0x00,0x10,0x40,0x00,0x37,0x00,0x80,0x80,0x21,0x8e,0x04,0x00,0x04,
26490x8e,0x03,0x00,0x44,0x3c,0x02,0x80,0x00,0x3c,0x05,0xb0,0x01,0x34,0x42,0x00,0x10,
26500x00,0x85,0x20,0x21,0x00,0x62,0x18,0x25,0xac,0x83,0x00,0x04,0x8e,0x02,0x00,0x04,
26510x8e,0x03,0x01,0xac,0x02,0x00,0x20,0x21,0x00,0x45,0x10,0x21,0x8c,0x46,0x00,0x00,
26520x00,0x03,0x18,0x80,0x27,0x82,0x89,0x68,0x00,0x62,0x18,0x21,0xac,0x66,0x00,0x00,
26530x8e,0x02,0x00,0x04,0x8e,0x03,0x01,0xac,0x00,0x45,0x10,0x21,0x8c,0x46,0x00,0x04,
26540x00,0x03,0x18,0x80,0x27,0x82,0x8a,0x68,0x00,0x62,0x18,0x21,0x0c,0x00,0x26,0x10,
26550xac,0x66,0x00,0x00,0x8e,0x03,0x01,0xac,0x8e,0x07,0x00,0x04,0x3c,0x06,0xb0,0x03,
26560x24,0x65,0x00,0x01,0x28,0xa4,0x00,0x00,0x24,0x62,0x00,0x40,0x00,0xa4,0x10,0x0a,
26570x00,0x02,0x11,0x83,0x00,0x02,0x11,0x80,0x00,0x03,0x18,0x80,0x00,0xa2,0x28,0x23,
26580x00,0x70,0x18,0x21,0xae,0x05,0x01,0xac,0xac,0x67,0x00,0xa8,0x34,0xc6,0x00,0x30,
26590x8c,0xc3,0x00,0x00,0x93,0x82,0x81,0xf0,0x02,0x00,0x20,0x21,0x24,0x63,0x00,0x01,
26600x24,0x42,0x00,0x01,0xac,0xc3,0x00,0x00,0xa3,0x82,0x81,0xf0,0x0c,0x00,0x27,0x90,
26610x00,0x00,0x00,0x00,0x8f,0xbf,0x00,0x14,0x8f,0xb0,0x00,0x10,0x03,0xe0,0x00,0x08,
26620x27,0xbd,0x00,0x18,0x0c,0x00,0x28,0x27,0x00,0x00,0x00,0x00,0x08,0x00,0x28,0xa3,
26630x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,0x3c,0x03,0x80,0x01,0x34,0x42,0x00,0x20,
26640x24,0x63,0xa3,0x74,0x27,0xbd,0xff,0xe0,0xac,0x43,0x00,0x00,0x3c,0x02,0x80,0x01,
26650xaf,0xb2,0x00,0x18,0xaf,0xb1,0x00,0x14,0xaf,0xb0,0x00,0x10,0xaf,0xbf,0x00,0x1c,
26660x00,0x80,0x80,0x21,0x24,0x52,0x9e,0x28,0x00,0x00,0x88,0x21,0x3c,0x03,0xb0,0x09,
26670x34,0x63,0x00,0x06,0x8e,0x06,0x00,0x04,0x90,0x62,0x00,0x00,0x00,0x06,0x22,0x02,
26680x00,0x44,0x10,0x23,0x24,0x44,0x00,0x40,0x28,0x83,0x00,0x00,0x24,0x42,0x00,0x7f,
26690x00,0x83,0x10,0x0a,0x00,0x02,0x11,0x83,0x00,0x02,0x11,0x80,0x24,0x84,0xff,0xff,
26700x10,0x44,0x00,0x68,0x00,0x00,0x28,0x21,0x3c,0x02,0xb0,0x01,0x00,0xc2,0x10,0x21,
26710x8c,0x44,0x00,0x04,0x3c,0x03,0x7c,0x00,0x34,0x63,0x00,0xf0,0x00,0x83,0x18,0x24,
26720xae,0x04,0x00,0x44,0x8c,0x44,0x00,0x00,0x10,0x60,0x00,0x69,0x00,0x00,0x38,0x21,
26730x3c,0x09,0xb0,0x03,0x3c,0x06,0x7c,0x00,0x35,0x29,0x00,0x99,0x3c,0x0a,0xb0,0x01,
26740x24,0x08,0x00,0x40,0x34,0xc6,0x00,0xf0,0x3c,0x0b,0xff,0xff,0x3c,0x0c,0x28,0x38,
26750x16,0x20,0x00,0x06,0x24,0xa5,0x00,0x01,0x93,0x82,0x81,0xf6,0x24,0x11,0x00,0x01,
26760x24,0x42,0x00,0x01,0xa1,0x22,0x00,0x00,0xa3,0x82,0x81,0xf6,0x8e,0x02,0x00,0x04,
26770x24,0x07,0x00,0x01,0x24,0x42,0x01,0x00,0x30,0x42,0x3f,0xff,0xae,0x02,0x00,0x04,
26780x00,0x4a,0x10,0x21,0x8c,0x43,0x00,0x04,0x00,0x00,0x00,0x00,0xae,0x03,0x00,0x44,
26790x8c,0x44,0x00,0x00,0x10,0xa8,0x00,0x2d,0x00,0x66,0x18,0x24,0x14,0x60,0xff,0xec,
26800x00,0x8b,0x10,0x24,0x14,0x4c,0xff,0xea,0x24,0x02,0x00,0x01,0x10,0xe2,0x00,0x2f,
26810x3c,0x03,0xb0,0x09,0x8e,0x02,0x00,0x44,0x8e,0x04,0x00,0x60,0x00,0x02,0x1e,0x42,
26820x00,0x02,0x12,0x02,0x30,0x42,0x00,0x0f,0x30,0x63,0x00,0x01,0xae,0x02,0x00,0x00,
26830x10,0x44,0x00,0x1a,0xae,0x03,0x00,0x58,0x8e,0x02,0x00,0x64,0x8e,0x04,0x00,0x58,
26840x00,0x00,0x00,0x00,0x10,0x82,0x00,0x05,0x00,0x00,0x00,0x00,0xae,0x00,0x00,0x4c,
26850xae,0x00,0x00,0x50,0xae,0x00,0x00,0x54,0xae,0x00,0x00,0x0c,0x8e,0x03,0x00,0x00,
26860x00,0x00,0x00,0x00,0x00,0x03,0x10,0x80,0x00,0x50,0x10,0x21,0x8c,0x42,0x00,0x68,
26870x00,0x00,0x00,0x00,0x10,0x52,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x40,0xf8,0x09,
26880x02,0x00,0x20,0x21,0x8e,0x04,0x00,0x58,0x8e,0x03,0x00,0x00,0x00,0x00,0x00,0x00,
26890xae,0x03,0x00,0x60,0x08,0x00,0x28,0xeb,0xae,0x04,0x00,0x64,0x8e,0x02,0x00,0x64,
26900x00,0x00,0x00,0x00,0x14,0x62,0xff,0xe5,0x00,0x00,0x00,0x00,0x7a,0x02,0x0d,0x7c,
26910x8f,0xbf,0x00,0x1c,0x8f,0xb2,0x00,0x18,0x7b,0xb0,0x00,0xbc,0x00,0x43,0x10,0x26,
26920x00,0x02,0x10,0x2b,0x03,0xe0,0x00,0x08,0x27,0xbd,0x00,0x20,0x34,0x63,0x00,0x06,
26930x8e,0x04,0x00,0x04,0x90,0x62,0x00,0x00,0x00,0x04,0x22,0x02,0x00,0x44,0x10,0x23,
26940x24,0x44,0x00,0x40,0x28,0x83,0x00,0x00,0x24,0x42,0x00,0x7f,0x00,0x83,0x10,0x0a,
26950x00,0x02,0x11,0x83,0x00,0x02,0x11,0x80,0x00,0x82,0x20,0x23,0x14,0x87,0xff,0xc5,
26960x00,0x00,0x00,0x00,0x8e,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x2c,0x62,0x00,0x03,
26970x14,0x40,0x00,0x05,0x24,0x02,0x00,0x0d,0x10,0x62,0x00,0x03,0x24,0x02,0x00,0x01,
26980x08,0x00,0x29,0x4b,0xa2,0x02,0x00,0x5c,0x08,0x00,0x29,0x4b,0xa2,0x00,0x00,0x5c,
26990x3c,0x02,0xff,0xff,0x00,0x82,0x10,0x24,0x3c,0x03,0x28,0x38,0x14,0x43,0xff,0x94,
27000x24,0x02,0x00,0x01,0x08,0x00,0x29,0x23,0x00,0x00,0x00,0x00,0x3c,0x02,0xb0,0x03,
27010x3c,0x03,0x80,0x01,0x34,0x42,0x00,0x20,0x24,0x63,0xa5,0xcc,0xac,0x43,0x00,0x00,
27020x8c,0x83,0x01,0xa8,0x8c,0x82,0x01,0xac,0x00,0x80,0x40,0x21,0x10,0x62,0x00,0x20,
27030x00,0x00,0x20,0x21,0x93,0x82,0x81,0xf1,0x00,0x03,0x28,0x80,0x3c,0x07,0xb0,0x06,
27040x00,0xa8,0x18,0x21,0x24,0x04,0x00,0x01,0x8c,0x66,0x00,0xa8,0x10,0x44,0x00,0x1c,
27050x34,0xe7,0x80,0x18,0x3c,0x05,0xb0,0x01,0xaf,0x86,0xbc,0x20,0x00,0xc5,0x28,0x21,
27060x8c,0xa3,0x00,0x00,0x00,0x06,0x20,0xc2,0x3c,0x02,0x00,0x80,0x00,0x04,0x22,0x00,
27070x00,0x82,0x20,0x25,0xaf,0x83,0xbc,0x28,0x8c,0xa2,0x00,0x04,0xac,0xe4,0x00,0x00,
27080x8d,0x03,0x01,0xa8,0xaf,0x82,0xbc,0x24,0x24,0x64,0x00,0x01,0x04,0x80,0x00,0x0a,
27090x00,0x80,0x10,0x21,0x00,0x02,0x11,0x83,0x8d,0x03,0x01,0xac,0x00,0x02,0x11,0x80,
27100x00,0x82,0x10,0x23,0x00,0x43,0x18,0x26,0xad,0x02,0x01,0xa8,0x00,0x03,0x20,0x2b,
27110x03,0xe0,0x00,0x08,0x00,0x80,0x10,0x21,0x08,0x00,0x29,0x95,0x24,0x62,0x00,0x40,
27120x27,0x82,0x89,0x68,0x00,0x06,0x20,0xc2,0x00,0x04,0x22,0x00,0x00,0xa2,0x48,0x21,
27130x3c,0x02,0x00,0x80,0x00,0x82,0x58,0x25,0x93,0x82,0x81,0xf0,0x3c,0x0a,0xb0,0x06,
27140x3c,0x03,0xb0,0x01,0x2c,0x42,0x00,0x02,0x00,0xc3,0x38,0x21,0x35,0x4a,0x80,0x18,
27150x14,0x40,0xff,0xef,0x00,0x00,0x20,0x21,0x8c,0xe5,0x00,0x00,0x8d,0x23,0x00,0x00,
27160x24,0x02,0xc0,0x00,0x00,0xa2,0x10,0x24,0x00,0x43,0x10,0x25,0xac,0xe2,0x00,0x00,
27170x8d,0x04,0x01,0xa8,0x27,0x83,0x8a,0x68,0x8c,0xe5,0x00,0x04,0x00,0x04,0x20,0x80,
27180x00,0x83,0x20,0x21,0x8c,0x82,0x00,0x00,0x3c,0x03,0x80,0x00,0x00,0xa2,0x10,0x25,
27190x00,0x43,0x10,0x25,0xac,0xe2,0x00,0x04,0xaf,0x86,0xbc,0x20,0x8c,0xe2,0x00,0x00,
27200x93,0x85,0x81,0xf0,0xaf,0x82,0xbc,0x28,0x8c,0xe3,0x00,0x04,0xad,0x4b,0x00,0x00,
27210x8d,0x02,0x01,0xa8,0xaf,0x83,0xbc,0x24,0x24,0xa5,0xff,0xff,0x24,0x44,0x00,0x01,
27220x28,0x83,0x00,0x00,0x24,0x42,0x00,0x40,0x00,0x83,0x10,0x0a,0x00,0x02,0x11,0x83,
27230x00,0x02,0x11,0x80,0x00,0x82,0x20,0x23,0xad,0x04,0x01,0xa8,0xa3,0x85,0x81,0xf0,
27240x79,0x02,0x0d,0x7c,0x00,0x00,0x00,0x00,0x00,0x43,0x10,0x26,0x08,0x00,0x29,0x9c,
27250x00,0x02,0x20,0x2b,0x3c,0x04,0xb0,0x03,0x3c,0x06,0xb0,0x07,0x3c,0x02,0x80,0x01,
27260x34,0xc6,0x00,0x18,0x34,0x84,0x00,0x20,0x24,0x42,0xa7,0x54,0x24,0x03,0xff,0x83,
27270xac,0x82,0x00,0x00,0xa0,0xc3,0x00,0x00,0x90,0xc4,0x00,0x00,0x27,0xbd,0xff,0xf8,
27280x3c,0x03,0xb0,0x07,0x24,0x02,0xff,0x82,0xa3,0xa4,0x00,0x00,0xa0,0x62,0x00,0x00,
27290x90,0x64,0x00,0x00,0x3c,0x02,0xb0,0x07,0x34,0x42,0x00,0x08,0xa3,0xa4,0x00,0x01,
27300xa0,0x40,0x00,0x00,0x90,0x43,0x00,0x00,0x24,0x02,0x00,0x03,0x3c,0x05,0xb0,0x07,
27310xa3,0xa3,0x00,0x00,0xa0,0xc2,0x00,0x00,0x90,0xc4,0x00,0x00,0x34,0xa5,0x00,0x10,
27320x24,0x02,0x00,0x06,0x3c,0x03,0xb0,0x07,0xa3,0xa4,0x00,0x00,0x34,0x63,0x00,0x38,
27330xa0,0xa2,0x00,0x00,0x90,0x64,0x00,0x00,0x3c,0x02,0xb0,0x07,0x34,0x42,0x00,0x20,
27340xa3,0xa4,0x00,0x00,0xa0,0xa0,0x00,0x00,0x90,0xa3,0x00,0x00,0xaf,0x82,0xbf,0x30,
27350xa3,0xa3,0x00,0x00,0xa0,0x40,0x00,0x00,0x90,0x43,0x00,0x00,0x03,0xe0,0x00,0x08,
27360x27,0xbd,0x00,0x08,};
2737
2738u8 Rtl8192PciEFwDataArray[DataArrayLengthPciE] = {
27390x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x10,0x00,0x08,0x00,
27400x02,0xe9,0x01,0x74,0x02,0xab,0x01,0xc7,0x01,0x55,0x00,0xe4,0x00,0xab,0x00,0x72,
27410x00,0x55,0x00,0x4c,0x00,0x4c,0x00,0x4c,0x00,0x4c,0x00,0x4c,0x02,0x76,0x01,0x3b,
27420x00,0xd2,0x00,0x9e,0x00,0x69,0x00,0x4f,0x00,0x46,0x00,0x3f,0x01,0x3b,0x00,0x9e,
27430x00,0x69,0x00,0x4f,0x00,0x35,0x00,0x27,0x00,0x23,0x00,0x20,0x01,0x2f,0x00,0x98,
27440x00,0x65,0x00,0x4c,0x00,0x33,0x00,0x26,0x00,0x22,0x00,0x1e,0x00,0x98,0x00,0x4c,
27450x00,0x33,0x00,0x26,0x00,0x19,0x00,0x13,0x00,0x11,0x00,0x0f,0x02,0x39,0x01,0x1c,
27460x00,0xbd,0x00,0x8e,0x00,0x5f,0x00,0x47,0x00,0x3f,0x00,0x39,0x01,0x1c,0x00,0x8e,
27470x00,0x5f,0x00,0x47,0x00,0x2f,0x00,0x23,0x00,0x20,0x00,0x1c,0x01,0x11,0x00,0x89,
27480x00,0x5b,0x00,0x44,0x00,0x2e,0x00,0x22,0x00,0x1e,0x00,0x1b,0x00,0x89,0x00,0x44,
27490x00,0x2e,0x00,0x22,0x00,0x17,0x00,0x11,0x00,0x0f,0x00,0x0e,0x02,0xab,0x02,0xab,
27500x02,0x66,0x02,0x66,0x07,0x06,0x06,0x06,0x05,0x06,0x07,0x08,0x04,0x06,0x07,0x08,
27510x09,0x0a,0x0b,0x0b,0x49,0x6e,0x74,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x54,0x4c,
27520x42,0x4d,0x4f,0x44,0x00,0x00,0x00,0x00,0x54,0x4c,0x42,0x4c,0x5f,0x64,0x61,0x74,
27530x61,0x00,0x54,0x4c,0x42,0x53,0x00,0x00,0x00,0x00,0x00,0x00,0x41,0x64,0x45,0x4c,
27540x5f,0x64,0x61,0x74,0x61,0x00,0x41,0x64,0x45,0x53,0x00,0x00,0x00,0x00,0x00,0x00,
27550x45,0x78,0x63,0x43,0x6f,0x64,0x65,0x36,0x00,0x00,0x45,0x78,0x63,0x43,0x6f,0x64,
27560x65,0x37,0x00,0x00,0x53,0x79,0x73,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x42,0x70,
27570x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x52,0x49,0x00,0x00,0x00,0x00,0x00,0x00,
27580x00,0x00,0x43,0x70,0x55,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x4f,0x76,0x00,0x00,
27590x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x01,0x0b,0x63,
27600x00,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x00,0x00,0x00,0x10,0x00,0x00,0x00,0x2c,
27610x00,0x00,0x00,0x58,0x00,0x00,0x00,0x30,0x00,0x00,0x00,0x48,0x00,0x00,0x00,0x60,
27620x00,0x00,0x00,0x90,0x00,0x00,0x00,0xc0,0x00,0x00,0x01,0x20,0x00,0x00,0x01,0x80,
27630x00,0x00,0x01,0xb0,0x00,0x00,0x00,0x34,0x00,0x00,0x00,0x68,0x00,0x00,0x00,0x9c,
27640x00,0x00,0x00,0xd0,0x00,0x00,0x01,0x38,0x00,0x00,0x01,0xa0,0x00,0x00,0x01,0xd4,
27650x00,0x00,0x02,0x08,0x00,0x00,0x00,0x68,0x00,0x00,0x00,0xd0,0x00,0x00,0x01,0x38,
27660x00,0x00,0x01,0xa0,0x00,0x00,0x02,0x6f,0x00,0x00,0x03,0x40,0x00,0x00,0x03,0xa8,
27670x00,0x00,0x04,0x10,0x01,0x01,0x01,0x02,0x01,0x01,0x02,0x02,0x03,0x03,0x04,0x04,
27680x01,0x01,0x02,0x02,0x03,0x03,0x04,0x04,0x02,0x03,0x03,0x04,0x05,0x06,0x07,0x08,
27690x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x07,0x6c,0x80,0x00,0x07,0x80,
27700x80,0x00,0x07,0x80,0x80,0x00,0x07,0x70,0x80,0x00,0x07,0x70,0x80,0x00,0x07,0x94,
27710x80,0x00,0x56,0xb0,0x80,0x00,0x57,0x08,0x80,0x00,0x57,0x30,0x80,0x00,0x58,0x28,
27720x80,0x00,0x58,0xe0,0x80,0x00,0x59,0x88,0x80,0x00,0x59,0xfc,0x80,0x00,0x5b,0x08,
27730x80,0x00,0x5b,0x40,0x80,0x00,0x5b,0x54,0x80,0x00,0x5b,0x68,0x80,0x00,0x5c,0x50,
27740x80,0x00,0x5c,0x90,0x80,0x00,0x5d,0x44,0x80,0x00,0x5d,0x6c,0x80,0x00,0x56,0x70,
27750x80,0x00,0x5d,0xbc,0x80,0x00,0x64,0x48,0x80,0x00,0x64,0xc0,0x80,0x00,0x64,0xcc,
27760x80,0x00,0x64,0xd8,0x80,0x00,0x64,0x60,0x80,0x00,0x64,0x60,0x80,0x00,0x64,0x60,
27770x80,0x00,0x64,0x60,0x80,0x00,0x64,0x60,0x80,0x00,0x64,0x60,0x80,0x00,0x64,0x60,
27780x80,0x00,0x64,0x60,0x80,0x00,0x64,0x60,0x80,0x00,0x64,0x60,0x80,0x00,0x64,0x60,
27790x80,0x00,0x64,0x60,0x80,0x00,0x64,0xe4,0x80,0x00,0x64,0xf0,0x80,0x00,0x64,0xfc,
27800x80,0x00,0x87,0xa4,0x80,0x00,0x87,0xa4,0x80,0x00,0x87,0xa4,0x80,0x00,0x87,0xd8,
27810x80,0x00,0x88,0x18,0x80,0x00,0x88,0x50,0x80,0x00,0x88,0x80,0x80,0x00,0x88,0xb0,
27820x80,0x00,0x88,0xc4,0x80,0x00,0x89,0x2c,0x80,0x00,0x89,0x40,0x80,0x00,0x89,0x7c,
27830x80,0x00,0x89,0x84,0x80,0x00,0x89,0xc0,0x80,0x00,0x89,0xd4,0x80,0x00,0x89,0xdc,
27840x80,0x00,0x89,0xe4,0x80,0x00,0x89,0xe4,0x80,0x00,0x89,0xe4,0x80,0x00,0x89,0xe4,
27850x80,0x00,0x8a,0x14,0x80,0x00,0x8a,0x28,0x80,0x00,0x8a,0x3c,0x80,0x00,0x86,0xe8,
27860x80,0x00,0x8d,0x68,0x80,0x00,0x8d,0x68,0x80,0x00,0x8d,0x68,0x80,0x00,0x8d,0x9c,
27870x80,0x00,0x8d,0xdc,0x80,0x00,0x8e,0x14,0x80,0x00,0x8e,0x44,0x80,0x00,0x8e,0x74,
27880x80,0x00,0x8e,0x88,0x80,0x00,0x8e,0xf0,0x80,0x00,0x8f,0x04,0x80,0x00,0x8f,0x40,
27890x80,0x00,0x8f,0x48,0x80,0x00,0x8f,0x84,0x80,0x00,0x8f,0x98,0x80,0x00,0x8f,0xa0,
27900x80,0x00,0x8f,0xa8,0x80,0x00,0x8f,0xa8,0x80,0x00,0x8f,0xa8,0x80,0x00,0x8f,0xa8,
27910x80,0x00,0x8f,0xd8,0x80,0x00,0x8f,0xec,0x80,0x00,0x90,0x00,0x80,0x00,0x8b,0x88,
2792};
2793
2794u32 Rtl8192PciEPHY_REGArray[PHY_REGArrayLengthPciE] = {
27950x0, };
2796
2797u32 Rtl8192PciEPHY_REG_1T2RArray[PHY_REG_1T2RArrayLengthPciE] = {
27980x800,0x00000000,
27990x804,0x00000001,
28000x808,0x0000fc00,
28010x80c,0x0000001c,
28020x810,0x801010aa,
28030x814,0x008514d0,
28040x818,0x00000040,
28050x81c,0x00000000,
28060x820,0x00000004,
28070x824,0x00690000,
28080x828,0x00000004,
28090x82c,0x00e90000,
28100x830,0x00000004,
28110x834,0x00690000,
28120x838,0x00000004,
28130x83c,0x00e90000,
28140x840,0x00000000,
28150x844,0x00000000,
28160x848,0x00000000,
28170x84c,0x00000000,
28180x850,0x00000000,
28190x854,0x00000000,
28200x858,0x65a965a9,
28210x85c,0x65a965a9,
28220x860,0x001f0010,
28230x864,0x007f0010,
28240x868,0x001f0010,
28250x86c,0x007f0010,
28260x870,0x0f100f70,
28270x874,0x0f100f70,
28280x878,0x00000000,
28290x87c,0x00000000,
28300x880,0x6870e36c,
28310x884,0xe3573600,
28320x888,0x4260c340,
28330x88c,0x0000ff00,
28340x890,0x00000000,
28350x894,0xfffffffe,
28360x898,0x4c42382f,
28370x89c,0x00656056,
28380x8b0,0x00000000,
28390x8e0,0x00000000,
28400x8e4,0x00000000,
28410x900,0x00000000,
28420x904,0x00000023,
28430x908,0x00000000,
28440x90c,0x31121311,
28450xa00,0x00d0c7d8,
28460xa04,0x811f0008,
28470xa08,0x80cd8300,
28480xa0c,0x2e62740f,
28490xa10,0x95009b78,
28500xa14,0x11145008,
28510xa18,0x00881117,
28520xa1c,0x89140fa0,
28530xa20,0x1a1b0000,
28540xa24,0x090e1317,
28550xa28,0x00000204,
28560xa2c,0x00000000,
28570xc00,0x00000040,
28580xc04,0x00005433,
28590xc08,0x000000e4,
28600xc0c,0x6c6c6c6c,
28610xc10,0x08800000,
28620xc14,0x40000100,
28630xc18,0x08000000,
28640xc1c,0x40000100,
28650xc20,0x08000000,
28660xc24,0x40000100,
28670xc28,0x08000000,
28680xc2c,0x40000100,
28690xc30,0x6de9ac44,
28700xc34,0x465c52cd,
28710xc38,0x497f5994,
28720xc3c,0x0a969764,
28730xc40,0x1f7c403f,
28740xc44,0x000100b7,
28750xc48,0xec020000,
28760xc4c,0x00000300,
28770xc50,0x69543420,
28780xc54,0x433c0094,
28790xc58,0x69543420,
28800xc5c,0x433c0094,
28810xc60,0x69543420,
28820xc64,0x433c0094,
28830xc68,0x69543420,
28840xc6c,0x433c0094,
28850xc70,0x2c7f000d,
28860xc74,0x0186175b,
28870xc78,0x0000001f,
28880xc7c,0x00b91612,
28890xc80,0x40000100,
28900xc84,0x20000000,
28910xc88,0x40000100,
28920xc8c,0x20200000,
28930xc90,0x40000100,
28940xc94,0x00000000,
28950xc98,0x40000100,
28960xc9c,0x00000000,
28970xca0,0x00492492,
28980xca4,0x00000000,
28990xca8,0x00000000,
29000xcac,0x00000000,
29010xcb0,0x00000000,
29020xcb4,0x00000000,
29030xcb8,0x00000000,
29040xcbc,0x00492492,
29050xcc0,0x00000000,
29060xcc4,0x00000000,
29070xcc8,0x00000000,
29080xccc,0x00000000,
29090xcd0,0x00000000,
29100xcd4,0x00000000,
29110xcd8,0x64b22427,
29120xcdc,0x00766932,
29130xce0,0x00222222,
29140xd00,0x00000750,
29150xd04,0x00000403,
29160xd08,0x0000907f,
29170xd0c,0x00000001,
29180xd10,0xa0633333,
29190xd14,0x33333c63,
29200xd18,0x6a8f5b6b,
29210xd1c,0x00000000,
29220xd20,0x00000000,
29230xd24,0x00000000,
29240xd28,0x00000000,
29250xd2c,0xcc979975,
29260xd30,0x00000000,
29270xd34,0x00000000,
29280xd38,0x00000000,
29290xd3c,0x00027293,
29300xd40,0x00000000,
29310xd44,0x00000000,
29320xd48,0x00000000,
29330xd4c,0x00000000,
29340xd50,0x6437140a,
29350xd54,0x024dbd02,
29360xd58,0x00000000,
29370xd5c,0x04032064,
29380xe00,0x161a1a1a,
29390xe04,0x12121416,
29400xe08,0x00001800,
29410xe0c,0x00000000,
29420xe10,0x161a1a1a,
29430xe14,0x12121416,
29440xe18,0x161a1a1a,
29450xe1c,0x12121416,
2946};
2947
2948u32 Rtl8192PciERadioA_Array[RadioA_ArrayLengthPciE] = {
29490x019,0x00000003,
29500x000,0x000000bf,
29510x001,0x00000ee0,
29520x002,0x0000004c,
29530x003,0x000007f1,
29540x004,0x00000975,
29550x005,0x00000c58,
29560x006,0x00000ae6,
29570x007,0x000000ca,
29580x008,0x00000e1c,
29590x009,0x000007f0,
29600x00a,0x000009d0,
29610x00b,0x000001ba,
29620x00c,0x00000240,
29630x00e,0x00000020,
29640x00f,0x00000990,
29650x012,0x00000806,
29660x014,0x000005ab,
29670x015,0x00000f80,
29680x016,0x00000020,
29690x017,0x00000597,
29700x018,0x0000050a,
29710x01a,0x00000f80,
29720x01b,0x00000f5e,
29730x01c,0x00000008,
29740x01d,0x00000607,
29750x01e,0x000006cc,
29760x01f,0x00000000,
29770x020,0x000001a5,
29780x01f,0x00000001,
29790x020,0x00000165,
29800x01f,0x00000002,
29810x020,0x000000c6,
29820x01f,0x00000003,
29830x020,0x00000086,
29840x01f,0x00000004,
29850x020,0x00000046,
29860x01f,0x00000005,
29870x020,0x000001e6,
29880x01f,0x00000006,
29890x020,0x000001a6,
29900x01f,0x00000007,
29910x020,0x00000166,
29920x01f,0x00000008,
29930x020,0x000000c7,
29940x01f,0x00000009,
29950x020,0x00000087,
29960x01f,0x0000000a,
29970x020,0x000000f7,
29980x01f,0x0000000b,
29990x020,0x000000d7,
30000x01f,0x0000000c,
30010x020,0x000000b7,
30020x01f,0x0000000d,
30030x020,0x00000097,
30040x01f,0x0000000e,
30050x020,0x00000077,
30060x01f,0x0000000f,
30070x020,0x00000057,
30080x01f,0x00000010,
30090x020,0x00000037,
30100x01f,0x00000011,
30110x020,0x000000fb,
30120x01f,0x00000012,
30130x020,0x000000db,
30140x01f,0x00000013,
30150x020,0x000000bb,
30160x01f,0x00000014,
30170x020,0x000000ff,
30180x01f,0x00000015,
30190x020,0x000000e3,
30200x01f,0x00000016,
30210x020,0x000000c3,
30220x01f,0x00000017,
30230x020,0x000000a3,
30240x01f,0x00000018,
30250x020,0x00000083,
30260x01f,0x00000019,
30270x020,0x00000063,
30280x01f,0x0000001a,
30290x020,0x00000043,
30300x01f,0x0000001b,
30310x020,0x00000023,
30320x01f,0x0000001c,
30330x020,0x00000003,
30340x01f,0x0000001d,
30350x020,0x000001e3,
30360x01f,0x0000001e,
30370x020,0x000001c3,
30380x01f,0x0000001f,
30390x020,0x000001a3,
30400x01f,0x00000020,
30410x020,0x00000183,
30420x01f,0x00000021,
30430x020,0x00000163,
30440x01f,0x00000022,
30450x020,0x00000143,
30460x01f,0x00000023,
30470x020,0x00000123,
30480x01f,0x00000024,
30490x020,0x00000103,
30500x023,0x00000203,
30510x024,0x00000100,
30520x00b,0x000001ba,
30530x02c,0x000003d7,
30540x02d,0x00000ff0,
30550x000,0x00000037,
30560x004,0x00000160,
30570x007,0x00000080,
30580x002,0x0000088d,
30590x0fe,0x00000000,
30600x0fe,0x00000000,
30610x016,0x00000200,
30620x016,0x00000380,
30630x016,0x00000020,
30640x016,0x000001a0,
30650x000,0x000000bf,
30660x00d,0x0000001f,
30670x00d,0x00000c9f,
30680x002,0x0000004d,
30690x000,0x00000cbf,
30700x004,0x00000975,
30710x007,0x00000700,
3072};
3073
3074u32 Rtl8192PciERadioB_Array[RadioB_ArrayLengthPciE] = {
30750x019,0x00000003,
30760x000,0x000000bf,
30770x001,0x000006e0,
30780x002,0x0000004c,
30790x003,0x000007f1,
30800x004,0x00000975,
30810x005,0x00000c58,
30820x006,0x00000ae6,
30830x007,0x000000ca,
30840x008,0x00000e1c,
30850x000,0x000000b7,
30860x00a,0x00000850,
30870x000,0x000000bf,
30880x00b,0x000001ba,
30890x00c,0x00000240,
30900x00e,0x00000020,
30910x015,0x00000f80,
30920x016,0x00000020,
30930x017,0x00000597,
30940x018,0x0000050a,
30950x01a,0x00000e00,
30960x01b,0x00000f5e,
30970x01d,0x00000607,
30980x01e,0x000006cc,
30990x00b,0x000001ba,
31000x023,0x00000203,
31010x024,0x00000100,
31020x000,0x00000037,
31030x004,0x00000160,
31040x016,0x00000200,
31050x016,0x00000380,
31060x016,0x00000020,
31070x016,0x000001a0,
31080x00d,0x00000ccc,
31090x000,0x000000bf,
31100x002,0x0000004d,
31110x000,0x00000cbf,
31120x004,0x00000975,
31130x007,0x00000700,
3114};
3115
3116u32 Rtl8192PciERadioC_Array[RadioC_ArrayLengthPciE] = {
31170x0, };
3118
3119u32 Rtl8192PciERadioD_Array[RadioD_ArrayLengthPciE] = {
31200x0, };
3121
3122u32 Rtl8192PciEMACPHY_Array[] = {
31230x03c,0xffff0000,0x00000f0f,
31240x340,0xffffffff,0x161a1a1a,
31250x344,0xffffffff,0x12121416,
31260x348,0x0000ffff,0x00001818,
31270x12c,0xffffffff,0x04000802,
31280x318,0x00000fff,0x00000100,
3129};
3130
3131u32 Rtl8192PciEMACPHY_Array_PG[] = {
31320x03c,0xffff0000,0x00000f0f,
31330xe00,0xffffffff,0x06090909,
31340xe04,0xffffffff,0x00030306,
31350xe08,0x0000ff00,0x00000000,
31360xe10,0xffffffff,0x0a0c0d0f,
31370xe14,0xffffffff,0x06070809,
31380xe18,0xffffffff,0x0a0c0d0f,
31390xe1c,0xffffffff,0x06070809,
31400x12c,0xffffffff,0x04000802,
31410x318,0x00000fff,0x00000800,
3142};
3143
3144u32 Rtl8192PciEAGCTAB_Array[AGCTAB_ArrayLengthPciE] = {
31450xc78,0x7d000001,
31460xc78,0x7d010001,
31470xc78,0x7d020001,
31480xc78,0x7d030001,
31490xc78,0x7d040001,
31500xc78,0x7d050001,
31510xc78,0x7c060001,
31520xc78,0x7b070001,
31530xc78,0x7a080001,
31540xc78,0x79090001,
31550xc78,0x780a0001,
31560xc78,0x770b0001,
31570xc78,0x760c0001,
31580xc78,0x750d0001,
31590xc78,0x740e0001,
31600xc78,0x730f0001,
31610xc78,0x72100001,
31620xc78,0x71110001,
31630xc78,0x70120001,
31640xc78,0x6f130001,
31650xc78,0x6e140001,
31660xc78,0x6d150001,
31670xc78,0x6c160001,
31680xc78,0x6b170001,
31690xc78,0x6a180001,
31700xc78,0x69190001,
31710xc78,0x681a0001,
31720xc78,0x671b0001,
31730xc78,0x661c0001,
31740xc78,0x651d0001,
31750xc78,0x641e0001,
31760xc78,0x491f0001,
31770xc78,0x48200001,
31780xc78,0x47210001,
31790xc78,0x46220001,
31800xc78,0x45230001,
31810xc78,0x44240001,
31820xc78,0x43250001,
31830xc78,0x28260001,
31840xc78,0x27270001,
31850xc78,0x26280001,
31860xc78,0x25290001,
31870xc78,0x242a0001,
31880xc78,0x232b0001,
31890xc78,0x222c0001,
31900xc78,0x212d0001,
31910xc78,0x202e0001,
31920xc78,0x0a2f0001,
31930xc78,0x08300001,
31940xc78,0x06310001,
31950xc78,0x05320001,
31960xc78,0x04330001,
31970xc78,0x03340001,
31980xc78,0x02350001,
31990xc78,0x01360001,
32000xc78,0x00370001,
32010xc78,0x00380001,
32020xc78,0x00390001,
32030xc78,0x003a0001,
32040xc78,0x003b0001,
32050xc78,0x003c0001,
32060xc78,0x003d0001,
32070xc78,0x003e0001,
32080xc78,0x003f0001,
32090xc78,0x7d400001,
32100xc78,0x7d410001,
32110xc78,0x7d420001,
32120xc78,0x7d430001,
32130xc78,0x7d440001,
32140xc78,0x7d450001,
32150xc78,0x7c460001,
32160xc78,0x7b470001,
32170xc78,0x7a480001,
32180xc78,0x79490001,
32190xc78,0x784a0001,
32200xc78,0x774b0001,
32210xc78,0x764c0001,
32220xc78,0x754d0001,
32230xc78,0x744e0001,
32240xc78,0x734f0001,
32250xc78,0x72500001,
32260xc78,0x71510001,
32270xc78,0x70520001,
32280xc78,0x6f530001,
32290xc78,0x6e540001,
32300xc78,0x6d550001,
32310xc78,0x6c560001,
32320xc78,0x6b570001,
32330xc78,0x6a580001,
32340xc78,0x69590001,
32350xc78,0x685a0001,
32360xc78,0x675b0001,
32370xc78,0x665c0001,
32380xc78,0x655d0001,
32390xc78,0x645e0001,
32400xc78,0x495f0001,
32410xc78,0x48600001,
32420xc78,0x47610001,
32430xc78,0x46620001,
32440xc78,0x45630001,
32450xc78,0x44640001,
32460xc78,0x43650001,
32470xc78,0x28660001,
32480xc78,0x27670001,
32490xc78,0x26680001,
32500xc78,0x25690001,
32510xc78,0x246a0001,
32520xc78,0x236b0001,
32530xc78,0x226c0001,
32540xc78,0x216d0001,
32550xc78,0x206e0001,
32560xc78,0x0a6f0001,
32570xc78,0x08700001,
32580xc78,0x06710001,
32590xc78,0x05720001,
32600xc78,0x04730001,
32610xc78,0x03740001,
32620xc78,0x02750001,
32630xc78,0x01760001,
32640xc78,0x00770001,
32650xc78,0x00780001,
32660xc78,0x00790001,
32670xc78,0x007a0001,
32680xc78,0x007b0001,
32690xc78,0x007c0001,
32700xc78,0x007d0001,
32710xc78,0x007e0001,
32720xc78,0x007f0001,
32730xc78,0x2e00001e,
32740xc78,0x2e01001e,
32750xc78,0x2e02001e,
32760xc78,0x2e03001e,
32770xc78,0x2e04001e,
32780xc78,0x2e05001e,
32790xc78,0x3006001e,
32800xc78,0x3407001e,
32810xc78,0x3908001e,
32820xc78,0x3c09001e,
32830xc78,0x3f0a001e,
32840xc78,0x420b001e,
32850xc78,0x440c001e,
32860xc78,0x450d001e,
32870xc78,0x460e001e,
32880xc78,0x460f001e,
32890xc78,0x4710001e,
32900xc78,0x4811001e,
32910xc78,0x4912001e,
32920xc78,0x4a13001e,
32930xc78,0x4b14001e,
32940xc78,0x4b15001e,
32950xc78,0x4c16001e,
32960xc78,0x4d17001e,
32970xc78,0x4e18001e,
32980xc78,0x4f19001e,
32990xc78,0x4f1a001e,
33000xc78,0x501b001e,
33010xc78,0x511c001e,
33020xc78,0x521d001e,
33030xc78,0x521e001e,
33040xc78,0x531f001e,
33050xc78,0x5320001e,
33060xc78,0x5421001e,
33070xc78,0x5522001e,
33080xc78,0x5523001e,
33090xc78,0x5624001e,
33100xc78,0x5725001e,
33110xc78,0x5726001e,
33120xc78,0x5827001e,
33130xc78,0x5828001e,
33140xc78,0x5929001e,
33150xc78,0x592a001e,
33160xc78,0x5a2b001e,
33170xc78,0x5b2c001e,
33180xc78,0x5c2d001e,
33190xc78,0x5c2e001e,
33200xc78,0x5d2f001e,
33210xc78,0x5e30001e,
33220xc78,0x5f31001e,
33230xc78,0x6032001e,
33240xc78,0x6033001e,
33250xc78,0x6134001e,
33260xc78,0x6235001e,
33270xc78,0x6336001e,
33280xc78,0x6437001e,
33290xc78,0x6438001e,
33300xc78,0x6539001e,
33310xc78,0x663a001e,
33320xc78,0x673b001e,
33330xc78,0x673c001e,
33340xc78,0x683d001e,
33350xc78,0x693e001e,
33360xc78,0x6a3f001e,
3337};
diff --git a/drivers/staging/rtl8192e/r8192E_hwimg.h b/drivers/staging/rtl8192e/r8192E_hwimg.h
new file mode 100644
index 00000000000..061a9c34ac8
--- /dev/null
+++ b/drivers/staging/rtl8192e/r8192E_hwimg.h
@@ -0,0 +1,51 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/
19#ifndef __INC_HAL8192PciE_FW_IMG_H
20#define __INC_HAL8192PciE_FW_IMG_H
21
22/*Created on 2008/11/18, 3: 7*/
23
24#include <linux/types.h>
25
26#define BootArrayLengthPciE 344
27extern u8 Rtl8192PciEFwBootArray[BootArrayLengthPciE];
28#define MainArrayLengthPciE 43012
29extern u8 Rtl8192PciEFwMainArray[MainArrayLengthPciE];
30#define DataArrayLengthPciE 848
31extern u8 Rtl8192PciEFwDataArray[DataArrayLengthPciE];
32#define PHY_REGArrayLengthPciE 1
33extern u32 Rtl8192PciEPHY_REGArray[PHY_REGArrayLengthPciE];
34#define PHY_REG_1T2RArrayLengthPciE 296
35extern u32 Rtl8192PciEPHY_REG_1T2RArray[PHY_REG_1T2RArrayLengthPciE];
36#define RadioA_ArrayLengthPciE 246
37extern u32 Rtl8192PciERadioA_Array[RadioA_ArrayLengthPciE] ;
38#define RadioB_ArrayLengthPciE 78
39extern u32 Rtl8192PciERadioB_Array[RadioB_ArrayLengthPciE] ;
40#define RadioC_ArrayLengthPciE 1
41extern u32 Rtl8192PciERadioC_Array[RadioC_ArrayLengthPciE] ;
42#define RadioD_ArrayLengthPciE 1
43extern u32 Rtl8192PciERadioD_Array[RadioD_ArrayLengthPciE] ;
44#define MACPHY_ArrayLengthPciE 18
45extern u32 Rtl8192PciEMACPHY_Array[MACPHY_ArrayLengthPciE] ;
46#define MACPHY_Array_PGLengthPciE 30
47extern u32 Rtl8192PciEMACPHY_Array_PG[MACPHY_Array_PGLengthPciE] ;
48#define AGCTAB_ArrayLengthPciE 384
49extern u32 Rtl8192PciEAGCTAB_Array[AGCTAB_ArrayLengthPciE] ;
50
51#endif
diff --git a/drivers/staging/rtl8192e/r8192E_phy.c b/drivers/staging/rtl8192e/r8192E_phy.c
new file mode 100644
index 00000000000..a20451b6ee6
--- /dev/null
+++ b/drivers/staging/rtl8192e/r8192E_phy.c
@@ -0,0 +1,1963 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/
19#if (defined(RTL8192E) || defined(RTL8190P))
20
21
22#include "rtl_core.h"
23#include "r8192E_hw.h"
24#include "r8192E_phyreg.h"
25#include "r8190P_rtl8256.h"
26#include "r8192E_phy.h"
27#include "rtl_dm.h"
28#ifdef ENABLE_DOT11D
29#include "dot11d.h"
30#endif
31
32#ifdef RTL8190P
33#include "r8190P_hwimg.h"
34#endif
35
36#ifdef RTL8192E
37#include "r8192E_hwimg.h"
38#endif
39
40static u32 RF_CHANNEL_TABLE_ZEBRA[] = {
41 0,
42 0x085c,
43 0x08dc,
44 0x095c,
45 0x09dc,
46 0x0a5c,
47 0x0adc,
48 0x0b5c,
49 0x0bdc,
50 0x0c5c,
51 0x0cdc,
52 0x0d5c,
53 0x0ddc,
54 0x0e5c,
55 0x0f72,
56};
57
58/*************************Define local function prototype**********************/
59
60static u32 phy_FwRFSerialRead(struct net_device* dev,RF90_RADIO_PATH_E eRFPath,u32 Offset);
61static void phy_FwRFSerialWrite(struct net_device* dev,RF90_RADIO_PATH_E eRFPath,u32 Offset,u32 Data);
62u32 rtl8192_CalculateBitShift(u32 dwBitMask)
63{
64 u32 i;
65 for (i=0; i<=31; i++)
66 {
67 if (((dwBitMask>>i)&0x1) == 1)
68 break;
69 }
70 return i;
71}
72u8 rtl8192_phy_CheckIsLegalRFPath(struct net_device* dev, u32 eRFPath)
73{
74 u8 ret = 1;
75 struct r8192_priv *priv = rtllib_priv(dev);
76#ifdef RTL8190P
77 if (priv->rf_type == RF_2T4R)
78 {
79 ret= 1;
80 }
81 else if (priv->rf_type == RF_1T2R)
82 {
83 if (eRFPath == RF90_PATH_A || eRFPath == RF90_PATH_B)
84 ret = 0;
85 else if (eRFPath == RF90_PATH_C || eRFPath == RF90_PATH_D)
86 ret = 1;
87 }
88#else
89 #ifdef RTL8192E
90 if (priv->rf_type == RF_2T4R)
91 ret = 0;
92 else if (priv->rf_type == RF_1T2R)
93 {
94 if (eRFPath == RF90_PATH_A || eRFPath == RF90_PATH_B)
95 ret = 1;
96 else if (eRFPath == RF90_PATH_C || eRFPath == RF90_PATH_D)
97 ret = 0;
98 }
99 #endif
100#endif
101 return ret;
102}
103void rtl8192_setBBreg(struct net_device* dev, u32 dwRegAddr, u32 dwBitMask, u32 dwData)
104{
105
106 u32 OriginalValue, BitShift, NewValue;
107
108 if (dwBitMask!= bMaskDWord)
109 {
110 OriginalValue = read_nic_dword(dev, dwRegAddr);
111 BitShift = rtl8192_CalculateBitShift(dwBitMask);
112 NewValue = (((OriginalValue) & (~dwBitMask)) | (dwData << BitShift));
113 write_nic_dword(dev, dwRegAddr, NewValue);
114 }else
115 write_nic_dword(dev, dwRegAddr, dwData);
116 return;
117}
118u32 rtl8192_QueryBBReg(struct net_device* dev, u32 dwRegAddr, u32 dwBitMask)
119{
120 u32 Ret = 0, OriginalValue, BitShift;
121
122 OriginalValue = read_nic_dword(dev, dwRegAddr);
123 BitShift = rtl8192_CalculateBitShift(dwBitMask);
124 Ret = (OriginalValue & dwBitMask) >> BitShift;
125
126 return (Ret);
127}
128u32 rtl8192_phy_RFSerialRead(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 Offset)
129{
130 struct r8192_priv *priv = rtllib_priv(dev);
131 u32 ret = 0;
132 u32 NewOffset = 0;
133 BB_REGISTER_DEFINITION_T* pPhyReg = &priv->PHYRegDef[eRFPath];
134 Offset &= 0x3f;
135
136 if (priv->rf_chip == RF_8256)
137 {
138#ifdef RTL8190P
139 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);
140#else
141 #ifdef RTL8192E
142 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);
143 #endif
144#endif
145 if (Offset >= 31)
146 {
147 priv->RfReg0Value[eRFPath] |= 0x140;
148 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16) );
149 NewOffset = Offset -30;
150 }
151 else if (Offset >= 16)
152 {
153 priv->RfReg0Value[eRFPath] |= 0x100;
154 priv->RfReg0Value[eRFPath] &= (~0x40);
155 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16) );
156
157 NewOffset = Offset - 15;
158 }
159 else
160 NewOffset = Offset;
161 }
162 else
163 {
164 RT_TRACE((COMP_PHY|COMP_ERR), "check RF type here, need to be 8256\n");
165 NewOffset = Offset;
166 }
167 rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, bLSSIReadAddress, NewOffset);
168 rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, bLSSIReadEdge, 0x0);
169 rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, bLSSIReadEdge, 0x1);
170
171
172 msleep(1);
173
174 ret = rtl8192_QueryBBReg(dev, pPhyReg->rfLSSIReadBack, bLSSIReadBackData);
175
176
177 if (priv->rf_chip == RF_8256)
178 {
179 priv->RfReg0Value[eRFPath] &= 0xebf;
180
181 rtl8192_setBBreg(
182 dev,
183 pPhyReg->rf3wireOffset,
184 bMaskDWord,
185 (priv->RfReg0Value[eRFPath] << 16));
186
187#ifdef RTL8190P
188 if (priv->rf_type == RF_2T4R)
189 {
190 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0xf);
191 }
192 else if (priv->rf_type == RF_1T2R)
193 {
194 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xc00, 0x3);
195 }
196#else
197 #ifdef RTL8192E
198 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3);
199 #endif
200#endif
201 }
202
203
204 return ret;
205
206}
207
208void rtl8192_phy_RFSerialWrite(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 Offset, u32 Data)
209{
210 struct r8192_priv *priv = rtllib_priv(dev);
211 u32 DataAndAddr = 0, NewOffset = 0;
212 BB_REGISTER_DEFINITION_T *pPhyReg = &priv->PHYRegDef[eRFPath];
213
214 Offset &= 0x3f;
215 if (priv->rf_chip == RF_8256)
216 {
217
218#ifdef RTL8190P
219 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);
220#else
221 #ifdef RTL8192E
222 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);
223 #endif
224#endif
225
226 if (Offset >= 31)
227 {
228 priv->RfReg0Value[eRFPath] |= 0x140;
229 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath] << 16));
230 NewOffset = Offset - 30;
231 }
232 else if (Offset >= 16)
233 {
234 priv->RfReg0Value[eRFPath] |= 0x100;
235 priv->RfReg0Value[eRFPath] &= (~0x40);
236 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16));
237 NewOffset = Offset - 15;
238 }
239 else
240 NewOffset = Offset;
241 }
242 else
243 {
244 RT_TRACE((COMP_PHY|COMP_ERR), "check RF type here, need to be 8256\n");
245 NewOffset = Offset;
246 }
247
248 DataAndAddr = (Data<<16) | (NewOffset&0x3f);
249
250 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
251
252
253 if (Offset==0x0)
254 priv->RfReg0Value[eRFPath] = Data;
255
256 if (priv->rf_chip == RF_8256)
257 {
258 if (Offset != 0)
259 {
260 priv->RfReg0Value[eRFPath] &= 0xebf;
261 rtl8192_setBBreg(
262 dev,
263 pPhyReg->rf3wireOffset,
264 bMaskDWord,
265 (priv->RfReg0Value[eRFPath] << 16));
266 }
267#ifdef RTL8190P
268 if (priv->rf_type == RF_2T4R)
269 {
270 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0xf);
271 }
272 else if (priv->rf_type == RF_1T2R)
273 {
274 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xc00, 0x3);
275 }
276#else
277 #ifdef RTL8192E
278 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3);
279 #endif
280#endif
281 }
282
283 return;
284}
285
286void rtl8192_phy_SetRFReg(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 RegAddr, u32 BitMask, u32 Data)
287{
288 struct r8192_priv *priv = rtllib_priv(dev);
289 u32 Original_Value, BitShift, New_Value;
290
291 if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath))
292 return;
293#ifdef RTL8192E
294 if (priv->rtllib->eRFPowerState != eRfOn && !priv->being_init_adapter)
295 return;
296#endif
297
298 RT_TRACE(COMP_PHY, "FW RF CTRL is not ready now\n");
299 if (priv->Rf_Mode == RF_OP_By_FW)
300 {
301 if (BitMask != bMask12Bits)
302 {
303 Original_Value = phy_FwRFSerialRead(dev, eRFPath, RegAddr);
304 BitShift = rtl8192_CalculateBitShift(BitMask);
305 New_Value = (((Original_Value) & (~BitMask)) | (Data<< BitShift));
306
307 phy_FwRFSerialWrite(dev, eRFPath, RegAddr, New_Value);
308 }else
309 phy_FwRFSerialWrite(dev, eRFPath, RegAddr, Data);
310 udelay(200);
311
312 }
313 else
314 {
315 if (BitMask != bMask12Bits)
316 {
317 Original_Value = rtl8192_phy_RFSerialRead(dev, eRFPath, RegAddr);
318 BitShift = rtl8192_CalculateBitShift(BitMask);
319 New_Value = (((Original_Value) & (~BitMask)) | (Data<< BitShift));
320
321 rtl8192_phy_RFSerialWrite(dev, eRFPath, RegAddr, New_Value);
322 }else
323 rtl8192_phy_RFSerialWrite(dev, eRFPath, RegAddr, Data);
324 }
325 return;
326}
327
328u32 rtl8192_phy_QueryRFReg(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 RegAddr, u32 BitMask)
329{
330 u32 Original_Value, Readback_Value, BitShift;
331 struct r8192_priv *priv = rtllib_priv(dev);
332 if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath))
333 return 0;
334#ifdef RTL8192E
335 if (priv->rtllib->eRFPowerState != eRfOn && !priv->being_init_adapter)
336 return 0;
337#endif
338 down(&priv->rf_sem);
339 if (priv->Rf_Mode == RF_OP_By_FW)
340 {
341 Original_Value = phy_FwRFSerialRead(dev, eRFPath, RegAddr);
342 udelay(200);
343 }
344 else
345 {
346 Original_Value = rtl8192_phy_RFSerialRead(dev, eRFPath, RegAddr);
347
348 }
349 BitShift = rtl8192_CalculateBitShift(BitMask);
350 Readback_Value = (Original_Value & BitMask) >> BitShift;
351 up(&priv->rf_sem);
352 return (Readback_Value);
353}
354
355static u32 phy_FwRFSerialRead(
356 struct net_device* dev,
357 RF90_RADIO_PATH_E eRFPath,
358 u32 Offset )
359{
360 u32 retValue = 0;
361 u32 Data = 0;
362 u8 time = 0;
363 Data |= ((Offset&0xFF)<<12);
364 Data |= ((eRFPath&0x3)<<20);
365 Data |= 0x80000000;
366 while (read_nic_dword(dev, QPNR)&0x80000000)
367 {
368 if (time++ < 100)
369 {
370 udelay(10);
371 }
372 else
373 break;
374 }
375 write_nic_dword(dev, QPNR, Data);
376 while (read_nic_dword(dev, QPNR)&0x80000000)
377 {
378 if (time++ < 100)
379 {
380 udelay(10);
381 }
382 else
383 return (0);
384 }
385 retValue = read_nic_dword(dev, RF_DATA);
386
387 return (retValue);
388
389} /* phy_FwRFSerialRead */
390
391static void
392phy_FwRFSerialWrite(
393 struct net_device* dev,
394 RF90_RADIO_PATH_E eRFPath,
395 u32 Offset,
396 u32 Data )
397{
398 u8 time = 0;
399
400
401 Data |= ((Offset&0xFF)<<12);
402 Data |= ((eRFPath&0x3)<<20);
403 Data |= 0x400000;
404 Data |= 0x80000000;
405
406 while (read_nic_dword(dev, QPNR)&0x80000000)
407 {
408 if (time++ < 100)
409 {
410 udelay(10);
411 }
412 else
413 break;
414 }
415 write_nic_dword(dev, QPNR, Data);
416
417} /* phy_FwRFSerialWrite */
418
419
420void rtl8192_phy_configmac(struct net_device* dev)
421{
422 u32 dwArrayLen = 0, i = 0;
423 u32* pdwArray = NULL;
424 struct r8192_priv *priv = rtllib_priv(dev);
425#ifdef TO_DO_LIST
426if (dev->bInHctTest)
427 {
428 RT_TRACE(COMP_PHY, "Rtl819XMACPHY_ArrayDTM\n");
429 dwArrayLen = MACPHY_ArrayLengthDTM;
430 pdwArray = Rtl819XMACPHY_ArrayDTM;
431 }
432 else if (priv->bTXPowerDataReadFromEEPORM)
433#endif
434 if (priv->bTXPowerDataReadFromEEPORM)
435 {
436 RT_TRACE(COMP_PHY, "Rtl819XMACPHY_Array_PG\n");
437 dwArrayLen = MACPHY_Array_PGLength;
438 pdwArray = Rtl819XMACPHY_Array_PG;
439
440 }
441 else
442 {
443 RT_TRACE(COMP_PHY,"Read rtl819XMACPHY_Array\n");
444 dwArrayLen = MACPHY_ArrayLength;
445 pdwArray = Rtl819XMACPHY_Array;
446 }
447 for (i = 0; i<dwArrayLen; i=i+3){
448 RT_TRACE(COMP_DBG, "The Rtl8190MACPHY_Array[0] is %x Rtl8190MACPHY_Array[1] is %x Rtl8190MACPHY_Array[2] is %x\n",
449 pdwArray[i], pdwArray[i+1], pdwArray[i+2]);
450 if (pdwArray[i] == 0x318)
451 {
452 pdwArray[i+2] = 0x00000800;
453 }
454 rtl8192_setBBreg(dev, pdwArray[i], pdwArray[i+1], pdwArray[i+2]);
455 }
456 return;
457
458}
459
460void rtl8192_phyConfigBB(struct net_device* dev, u8 ConfigType)
461{
462 int i;
463 u32* Rtl819XPHY_REGArray_Table = NULL;
464 u32* Rtl819XAGCTAB_Array_Table = NULL;
465 u16 AGCTAB_ArrayLen, PHY_REGArrayLen = 0;
466 struct r8192_priv *priv = rtllib_priv(dev);
467#ifdef TO_DO_LIST
468 u32 *rtl8192PhyRegArrayTable = NULL, *rtl8192AgcTabArrayTable = NULL;
469 if (dev->bInHctTest)
470 {
471 AGCTAB_ArrayLen = AGCTAB_ArrayLengthDTM;
472 Rtl819XAGCTAB_Array_Table = Rtl819XAGCTAB_ArrayDTM;
473
474 if (priv->RF_Type == RF_2T4R)
475 {
476 PHY_REGArrayLen = PHY_REGArrayLengthDTM;
477 Rtl819XPHY_REGArray_Table = Rtl819XPHY_REGArrayDTM;
478 }
479 else if (priv->RF_Type == RF_1T2R)
480 {
481 PHY_REGArrayLen = PHY_REG_1T2RArrayLengthDTM;
482 Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_1T2RArrayDTM;
483 }
484 }
485 else
486#endif
487 {
488 AGCTAB_ArrayLen = AGCTAB_ArrayLength;
489 Rtl819XAGCTAB_Array_Table = Rtl819XAGCTAB_Array;
490 if (priv->rf_type == RF_2T4R)
491 {
492 PHY_REGArrayLen = PHY_REGArrayLength;
493 Rtl819XPHY_REGArray_Table = Rtl819XPHY_REGArray;
494 }
495 else if (priv->rf_type == RF_1T2R)
496 {
497 PHY_REGArrayLen = PHY_REG_1T2RArrayLength;
498 Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_1T2RArray;
499 }
500 }
501
502 if (ConfigType == BaseBand_Config_PHY_REG)
503 {
504 for (i=0; i<PHY_REGArrayLen; i+=2)
505 {
506 rtl8192_setBBreg(dev, Rtl819XPHY_REGArray_Table[i], bMaskDWord, Rtl819XPHY_REGArray_Table[i+1]);
507 RT_TRACE(COMP_DBG, "i: %x, The Rtl819xUsbPHY_REGArray[0] is %x Rtl819xUsbPHY_REGArray[1] is %x \n",i, Rtl819XPHY_REGArray_Table[i], Rtl819XPHY_REGArray_Table[i+1]);
508 }
509 }
510 else if (ConfigType == BaseBand_Config_AGC_TAB)
511 {
512 for (i=0; i<AGCTAB_ArrayLen; i+=2)
513 {
514 rtl8192_setBBreg(dev, Rtl819XAGCTAB_Array_Table[i], bMaskDWord, Rtl819XAGCTAB_Array_Table[i+1]);
515 RT_TRACE(COMP_DBG, "i:%x, The rtl819XAGCTAB_Array[0] is %x rtl819XAGCTAB_Array[1] is %x \n",i, Rtl819XAGCTAB_Array_Table[i], Rtl819XAGCTAB_Array_Table[i+1]);
516 }
517 }
518 return;
519
520
521}
522void rtl8192_InitBBRFRegDef(struct net_device* dev)
523{
524 struct r8192_priv *priv = rtllib_priv(dev);
525 priv->PHYRegDef[RF90_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW;
526 priv->PHYRegDef[RF90_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW;
527 priv->PHYRegDef[RF90_PATH_C].rfintfs = rFPGA0_XCD_RFInterfaceSW;
528 priv->PHYRegDef[RF90_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW;
529
530 priv->PHYRegDef[RF90_PATH_A].rfintfi = rFPGA0_XAB_RFInterfaceRB;
531 priv->PHYRegDef[RF90_PATH_B].rfintfi = rFPGA0_XAB_RFInterfaceRB;
532 priv->PHYRegDef[RF90_PATH_C].rfintfi = rFPGA0_XCD_RFInterfaceRB;
533 priv->PHYRegDef[RF90_PATH_D].rfintfi = rFPGA0_XCD_RFInterfaceRB;
534
535 priv->PHYRegDef[RF90_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE;
536 priv->PHYRegDef[RF90_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE;
537 priv->PHYRegDef[RF90_PATH_C].rfintfo = rFPGA0_XC_RFInterfaceOE;
538 priv->PHYRegDef[RF90_PATH_D].rfintfo = rFPGA0_XD_RFInterfaceOE;
539
540 priv->PHYRegDef[RF90_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE;
541 priv->PHYRegDef[RF90_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE;
542 priv->PHYRegDef[RF90_PATH_C].rfintfe = rFPGA0_XC_RFInterfaceOE;
543 priv->PHYRegDef[RF90_PATH_D].rfintfe = rFPGA0_XD_RFInterfaceOE;
544
545 priv->PHYRegDef[RF90_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter;
546 priv->PHYRegDef[RF90_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter;
547 priv->PHYRegDef[RF90_PATH_C].rf3wireOffset = rFPGA0_XC_LSSIParameter;
548 priv->PHYRegDef[RF90_PATH_D].rf3wireOffset = rFPGA0_XD_LSSIParameter;
549
550 priv->PHYRegDef[RF90_PATH_A].rfLSSI_Select = rFPGA0_XAB_RFParameter;
551 priv->PHYRegDef[RF90_PATH_B].rfLSSI_Select = rFPGA0_XAB_RFParameter;
552 priv->PHYRegDef[RF90_PATH_C].rfLSSI_Select = rFPGA0_XCD_RFParameter;
553 priv->PHYRegDef[RF90_PATH_D].rfLSSI_Select = rFPGA0_XCD_RFParameter;
554
555 priv->PHYRegDef[RF90_PATH_A].rfTxGainStage = rFPGA0_TxGainStage;
556 priv->PHYRegDef[RF90_PATH_B].rfTxGainStage = rFPGA0_TxGainStage;
557 priv->PHYRegDef[RF90_PATH_C].rfTxGainStage = rFPGA0_TxGainStage;
558 priv->PHYRegDef[RF90_PATH_D].rfTxGainStage = rFPGA0_TxGainStage;
559
560 priv->PHYRegDef[RF90_PATH_A].rfHSSIPara1 = rFPGA0_XA_HSSIParameter1;
561 priv->PHYRegDef[RF90_PATH_B].rfHSSIPara1 = rFPGA0_XB_HSSIParameter1;
562 priv->PHYRegDef[RF90_PATH_C].rfHSSIPara1 = rFPGA0_XC_HSSIParameter1;
563 priv->PHYRegDef[RF90_PATH_D].rfHSSIPara1 = rFPGA0_XD_HSSIParameter1;
564
565 priv->PHYRegDef[RF90_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2;
566 priv->PHYRegDef[RF90_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2;
567 priv->PHYRegDef[RF90_PATH_C].rfHSSIPara2 = rFPGA0_XC_HSSIParameter2;
568 priv->PHYRegDef[RF90_PATH_D].rfHSSIPara2 = rFPGA0_XD_HSSIParameter2;
569
570 priv->PHYRegDef[RF90_PATH_A].rfSwitchControl = rFPGA0_XAB_SwitchControl;
571 priv->PHYRegDef[RF90_PATH_B].rfSwitchControl = rFPGA0_XAB_SwitchControl;
572 priv->PHYRegDef[RF90_PATH_C].rfSwitchControl = rFPGA0_XCD_SwitchControl;
573 priv->PHYRegDef[RF90_PATH_D].rfSwitchControl = rFPGA0_XCD_SwitchControl;
574
575 priv->PHYRegDef[RF90_PATH_A].rfAGCControl1 = rOFDM0_XAAGCCore1;
576 priv->PHYRegDef[RF90_PATH_B].rfAGCControl1 = rOFDM0_XBAGCCore1;
577 priv->PHYRegDef[RF90_PATH_C].rfAGCControl1 = rOFDM0_XCAGCCore1;
578 priv->PHYRegDef[RF90_PATH_D].rfAGCControl1 = rOFDM0_XDAGCCore1;
579
580 priv->PHYRegDef[RF90_PATH_A].rfAGCControl2 = rOFDM0_XAAGCCore2;
581 priv->PHYRegDef[RF90_PATH_B].rfAGCControl2 = rOFDM0_XBAGCCore2;
582 priv->PHYRegDef[RF90_PATH_C].rfAGCControl2 = rOFDM0_XCAGCCore2;
583 priv->PHYRegDef[RF90_PATH_D].rfAGCControl2 = rOFDM0_XDAGCCore2;
584
585 priv->PHYRegDef[RF90_PATH_A].rfRxIQImbalance = rOFDM0_XARxIQImbalance;
586 priv->PHYRegDef[RF90_PATH_B].rfRxIQImbalance = rOFDM0_XBRxIQImbalance;
587 priv->PHYRegDef[RF90_PATH_C].rfRxIQImbalance = rOFDM0_XCRxIQImbalance;
588 priv->PHYRegDef[RF90_PATH_D].rfRxIQImbalance = rOFDM0_XDRxIQImbalance;
589
590 priv->PHYRegDef[RF90_PATH_A].rfRxAFE = rOFDM0_XARxAFE;
591 priv->PHYRegDef[RF90_PATH_B].rfRxAFE = rOFDM0_XBRxAFE;
592 priv->PHYRegDef[RF90_PATH_C].rfRxAFE = rOFDM0_XCRxAFE;
593 priv->PHYRegDef[RF90_PATH_D].rfRxAFE = rOFDM0_XDRxAFE;
594
595 priv->PHYRegDef[RF90_PATH_A].rfTxIQImbalance = rOFDM0_XATxIQImbalance;
596 priv->PHYRegDef[RF90_PATH_B].rfTxIQImbalance = rOFDM0_XBTxIQImbalance;
597 priv->PHYRegDef[RF90_PATH_C].rfTxIQImbalance = rOFDM0_XCTxIQImbalance;
598 priv->PHYRegDef[RF90_PATH_D].rfTxIQImbalance = rOFDM0_XDTxIQImbalance;
599
600 priv->PHYRegDef[RF90_PATH_A].rfTxAFE = rOFDM0_XATxAFE;
601 priv->PHYRegDef[RF90_PATH_B].rfTxAFE = rOFDM0_XBTxAFE;
602 priv->PHYRegDef[RF90_PATH_C].rfTxAFE = rOFDM0_XCTxAFE;
603 priv->PHYRegDef[RF90_PATH_D].rfTxAFE = rOFDM0_XDTxAFE;
604
605 priv->PHYRegDef[RF90_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack;
606 priv->PHYRegDef[RF90_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack;
607 priv->PHYRegDef[RF90_PATH_C].rfLSSIReadBack = rFPGA0_XC_LSSIReadBack;
608 priv->PHYRegDef[RF90_PATH_D].rfLSSIReadBack = rFPGA0_XD_LSSIReadBack;
609
610}
611bool rtl8192_phy_checkBBAndRF(struct net_device* dev, HW90_BLOCK_E CheckBlock, RF90_RADIO_PATH_E eRFPath)
612{
613 bool ret = true;
614 u32 i, CheckTimes = 4, dwRegRead = 0;
615 u32 WriteAddr[4];
616 u32 WriteData[] = {0xfffff027, 0xaa55a02f, 0x00000027, 0x55aa502f};
617 WriteAddr[HW90_BLOCK_MAC] = 0x100;
618 WriteAddr[HW90_BLOCK_PHY0] = 0x900;
619 WriteAddr[HW90_BLOCK_PHY1] = 0x800;
620 WriteAddr[HW90_BLOCK_RF] = 0x3;
621 RT_TRACE(COMP_PHY, "=======>%s(), CheckBlock:%d\n", __func__, CheckBlock);
622 for (i=0 ; i < CheckTimes ; i++)
623 {
624
625 switch (CheckBlock)
626 {
627 case HW90_BLOCK_MAC:
628 RT_TRACE(COMP_ERR, "PHY_CheckBBRFOK(): Never Write 0x100 here!");
629 break;
630
631 case HW90_BLOCK_PHY0:
632 case HW90_BLOCK_PHY1:
633 write_nic_dword(dev, WriteAddr[CheckBlock], WriteData[i]);
634 dwRegRead = read_nic_dword(dev, WriteAddr[CheckBlock]);
635 break;
636
637 case HW90_BLOCK_RF:
638 WriteData[i] &= 0xfff;
639 rtl8192_phy_SetRFReg(dev, eRFPath, WriteAddr[HW90_BLOCK_RF], bMask12Bits, WriteData[i]);
640 mdelay(10);
641 dwRegRead = rtl8192_phy_QueryRFReg(dev, eRFPath, WriteAddr[HW90_BLOCK_RF], bMaskDWord);
642 mdelay(10);
643 break;
644
645 default:
646 ret = false;
647 break;
648 }
649
650
651 if (dwRegRead != WriteData[i])
652 {
653 RT_TRACE(COMP_ERR, "====>error=====dwRegRead: %x, WriteData: %x \n", dwRegRead, WriteData[i]);
654 ret = false;
655 break;
656 }
657 }
658
659 return ret;
660}
661
662bool rtl8192_BB_Config_ParaFile(struct net_device* dev)
663{
664 struct r8192_priv *priv = rtllib_priv(dev);
665 bool rtStatus = true;
666 u8 bRegValue = 0, eCheckItem = 0;
667 u32 dwRegValue = 0;
668 /**************************************
669 **************************************/
670
671 bRegValue = read_nic_byte(dev, BB_GLOBAL_RESET);
672 write_nic_byte(dev, BB_GLOBAL_RESET,(bRegValue|BB_GLOBAL_RESET_BIT));
673
674 dwRegValue = read_nic_dword(dev, CPU_GEN);
675 write_nic_dword(dev, CPU_GEN, (dwRegValue&(~CPU_GEN_BB_RST)));
676
677 for (eCheckItem=(HW90_BLOCK_E)HW90_BLOCK_PHY0; eCheckItem<=HW90_BLOCK_PHY1; eCheckItem++)
678 {
679 rtStatus = rtl8192_phy_checkBBAndRF(dev, (HW90_BLOCK_E)eCheckItem, (RF90_RADIO_PATH_E)0);
680 if (rtStatus != true)
681 {
682 RT_TRACE((COMP_ERR | COMP_PHY), "PHY_RF8256_Config():Check PHY%d Fail!!\n", eCheckItem-1);
683 return rtStatus;
684 }
685 }
686 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn|bOFDMEn, 0x0);
687 rtl8192_phyConfigBB(dev, BaseBand_Config_PHY_REG);
688
689 dwRegValue = read_nic_dword(dev, CPU_GEN);
690 write_nic_dword(dev, CPU_GEN, (dwRegValue|CPU_GEN_BB_RST));
691
692 rtl8192_phyConfigBB(dev, BaseBand_Config_AGC_TAB);
693
694 if (priv->IC_Cut > VERSION_8190_BD)
695 {
696 if (priv->rf_type == RF_2T4R)
697 {
698 dwRegValue = ( priv->AntennaTxPwDiff[2]<<8 |
699 priv->AntennaTxPwDiff[1]<<4 |
700 priv->AntennaTxPwDiff[0]);
701 }
702 else
703 dwRegValue = 0x0;
704 rtl8192_setBBreg(dev, rFPGA0_TxGainStage,
705 (bXBTxAGC|bXCTxAGC|bXDTxAGC), dwRegValue);
706
707
708#ifdef RTL8190P
709 dwRegValue = priv->CrystalCap & 0x3;
710 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, bXtalCap01, dwRegValue);
711 dwRegValue = ((priv->CrystalCap & 0xc)>>2);
712 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter2, bXtalCap23, dwRegValue);
713#else
714 #ifdef RTL8192E
715 dwRegValue = priv->CrystalCap;
716 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, bXtalCap92x, dwRegValue);
717 #endif
718#endif
719
720 }
721
722 return rtStatus;
723}
724bool rtl8192_BBConfig(struct net_device* dev)
725{
726 bool rtStatus = true;
727 rtl8192_InitBBRFRegDef(dev);
728 rtStatus = rtl8192_BB_Config_ParaFile(dev);
729 return rtStatus;
730}
731
732void rtl8192_phy_getTxPower(struct net_device* dev)
733{
734 struct r8192_priv *priv = rtllib_priv(dev);
735#ifdef RTL8190P
736 priv->MCSTxPowerLevelOriginalOffset[0] =
737 read_nic_dword(dev, MCS_TXAGC);
738 priv->MCSTxPowerLevelOriginalOffset[1] =
739 read_nic_dword(dev, (MCS_TXAGC+4));
740 priv->CCKTxPowerLevelOriginalOffset =
741 read_nic_dword(dev, CCK_TXAGC);
742#else
743 #ifdef RTL8192E
744 priv->MCSTxPowerLevelOriginalOffset[0] =
745 read_nic_dword(dev, rTxAGC_Rate18_06);
746 priv->MCSTxPowerLevelOriginalOffset[1] =
747 read_nic_dword(dev, rTxAGC_Rate54_24);
748 priv->MCSTxPowerLevelOriginalOffset[2] =
749 read_nic_dword(dev, rTxAGC_Mcs03_Mcs00);
750 priv->MCSTxPowerLevelOriginalOffset[3] =
751 read_nic_dword(dev, rTxAGC_Mcs07_Mcs04);
752 priv->MCSTxPowerLevelOriginalOffset[4] =
753 read_nic_dword(dev, rTxAGC_Mcs11_Mcs08);
754 priv->MCSTxPowerLevelOriginalOffset[5] =
755 read_nic_dword(dev, rTxAGC_Mcs15_Mcs12);
756 #endif
757#endif
758
759 priv->DefaultInitialGain[0] = read_nic_byte(dev, rOFDM0_XAAGCCore1);
760 priv->DefaultInitialGain[1] = read_nic_byte(dev, rOFDM0_XBAGCCore1);
761 priv->DefaultInitialGain[2] = read_nic_byte(dev, rOFDM0_XCAGCCore1);
762 priv->DefaultInitialGain[3] = read_nic_byte(dev, rOFDM0_XDAGCCore1);
763 RT_TRACE(COMP_INIT, "Default initial gain (c50=0x%x, c58=0x%x, c60=0x%x, c68=0x%x) \n",
764 priv->DefaultInitialGain[0], priv->DefaultInitialGain[1],
765 priv->DefaultInitialGain[2], priv->DefaultInitialGain[3]);
766
767 priv->framesync = read_nic_byte(dev, rOFDM0_RxDetector3);
768 priv->framesyncC34 = read_nic_dword(dev, rOFDM0_RxDetector2);
769 RT_TRACE(COMP_INIT, "Default framesync (0x%x) = 0x%x \n",
770 rOFDM0_RxDetector3, priv->framesync);
771 priv->SifsTime = read_nic_word(dev, SIFS);
772 return;
773}
774
775void rtl8192_phy_setTxPower(struct net_device* dev, u8 channel)
776{
777 struct r8192_priv *priv = rtllib_priv(dev);
778 u8 powerlevel = 0,powerlevelOFDM24G = 0;
779 char ant_pwr_diff;
780 u32 u4RegValue;
781
782 if (priv->epromtype == EEPROM_93C46)
783 {
784 powerlevel = priv->TxPowerLevelCCK[channel-1];
785 powerlevelOFDM24G = priv->TxPowerLevelOFDM24G[channel-1];
786 }
787 else if (priv->epromtype == EEPROM_93C56)
788 {
789 if (priv->rf_type == RF_1T2R)
790 {
791 powerlevel = priv->TxPowerLevelCCK_C[channel-1];
792 powerlevelOFDM24G = priv->TxPowerLevelOFDM24G_C[channel-1];
793 }
794 else if (priv->rf_type == RF_2T4R)
795 {
796 powerlevel = priv->TxPowerLevelCCK_A[channel-1];
797 powerlevelOFDM24G = priv->TxPowerLevelOFDM24G_A[channel-1];
798
799 ant_pwr_diff = priv->TxPowerLevelOFDM24G_C[channel-1]
800 -priv->TxPowerLevelOFDM24G_A[channel-1];
801
802 priv->RF_C_TxPwDiff = ant_pwr_diff;
803
804 ant_pwr_diff &= 0xf;
805
806 priv->AntennaTxPwDiff[2] = 0;
807 priv->AntennaTxPwDiff[1] = (u8)(ant_pwr_diff);
808 priv->AntennaTxPwDiff[0] = 0;
809
810 u4RegValue = ( priv->AntennaTxPwDiff[2]<<8 |
811 priv->AntennaTxPwDiff[1]<<4 |
812 priv->AntennaTxPwDiff[0]);
813
814 rtl8192_setBBreg(dev, rFPGA0_TxGainStage,
815 (bXBTxAGC|bXCTxAGC|bXDTxAGC), u4RegValue);
816 }
817 }
818#ifdef TODO
819 if ( pMgntInfo->OpMode == RT_OP_MODE_INFRASTRUCTURE &&
820 pMgntInfo->bWithCcxCellPwr &&
821 channel == pMgntInfo->dot11CurrentChannelNumber)
822 {
823 u8 CckCellPwrIdx = DbmToTxPwrIdx(dev, WIRELESS_MODE_B, pMgntInfo->CcxCellPwr);
824 u8 LegacyOfdmCellPwrIdx = DbmToTxPwrIdx(dev, WIRELESS_MODE_G, pMgntInfo->CcxCellPwr);
825 u8 OfdmCellPwrIdx = DbmToTxPwrIdx(dev, WIRELESS_MODE_N_24G, pMgntInfo->CcxCellPwr);
826
827 RT_TRACE(COMP_TXAGC, DBG_LOUD,
828 ("CCX Cell Limit: %d dbm => CCK Tx power index : %d, Legacy OFDM Tx power index : %d, OFDM Tx power index: %d\n",
829 pMgntInfo->CcxCellPwr, CckCellPwrIdx, LegacyOfdmCellPwrIdx, OfdmCellPwrIdx));
830 RT_TRACE(COMP_TXAGC, DBG_LOUD,
831 ("EEPROM channel(%d) => CCK Tx power index: %d, Legacy OFDM Tx power index : %d, OFDM Tx power index: %d\n",
832 channel, powerlevel, powerlevelOFDM24G + pHalData->LegacyHTTxPowerDiff, powerlevelOFDM24G));
833
834 if (powerlevel > CckCellPwrIdx)
835 powerlevel = CckCellPwrIdx;
836 if (powerlevelOFDM24G + pHalData->LegacyHTTxPowerDiff > OfdmCellPwrIdx)
837 {
838 if ((OfdmCellPwrIdx - pHalData->LegacyHTTxPowerDiff) > 0)
839 {
840 powerlevelOFDM24G = OfdmCellPwrIdx - pHalData->LegacyHTTxPowerDiff;
841 }
842 else
843 {
844 LegacyOfdmCellPwrIdx = 0;
845 }
846 }
847
848 RT_TRACE(COMP_TXAGC, DBG_LOUD,
849 ("Altered CCK Tx power index : %d, Legacy OFDM Tx power index: %d, OFDM Tx power index: %d\n",
850 powerlevel, powerlevelOFDM24G + pHalData->LegacyHTTxPowerDiff, powerlevelOFDM24G));
851 }
852
853 pHalData->CurrentCckTxPwrIdx = powerlevel;
854 pHalData->CurrentOfdm24GTxPwrIdx = powerlevelOFDM24G;
855
856 RtActChannelList(Adapter, RT_CHNL_LIST_ACTION_GET_CHANNEL, &channel, &pChannelInfo);
857
858 if (pChannelInfo)
859 {
860 if (pChannelInfo->MaxTxPwrDbm != UNSPECIFIED_PWR_DBM)
861 {
862 u1Byte CckMaxPwrIdx = DbmToTxPwrIdx(Adapter, WIRELESS_MODE_B, pChannelInfo->MaxTxPwrDbm);
863 u1Byte LegacyOfdmMaxPwrIdx = DbmToTxPwrIdx(Adapter, WIRELESS_MODE_G, pChannelInfo->MaxTxPwrDbm);
864 u1Byte OfdmMaxPwrIdx = DbmToTxPwrIdx(Adapter, WIRELESS_MODE_N_24G, pChannelInfo->MaxTxPwrDbm);
865
866 RT_TRACE(COMP_TXAGC, DBG_LOUD,
867 ("CCX Cell Limit: %ld dbm => CCK Tx power index : %d, Legacy OFDM Tx power index : %d, OFDM Tx power index: %d\n",
868 pChannelInfo->MaxTxPwrDbm, CckMaxPwrIdx, LegacyOfdmMaxPwrIdx, OfdmMaxPwrIdx));
869 RT_TRACE(COMP_TXAGC, DBG_LOUD,
870 ("EEPROM channel(%d) => CCK Tx power index: %d, Legacy OFDM Tx power index : %d, OFDM Tx power index: %d\n",
871 channel, powerlevel, powerlevelOFDM24G + pHalData->LegacyHTTxPowerDiff, powerlevelOFDM24G));
872
873 if (powerlevel > CckMaxPwrIdx)
874 powerlevel = CckMaxPwrIdx;
875 if (powerlevelOFDM24G + pHalData->LegacyHTTxPowerDiff > OfdmMaxPwrIdx)
876 {
877 if ((OfdmMaxPwrIdx - pHalData->LegacyHTTxPowerDiff) > 0)
878 {
879 powerlevelOFDM24G = OfdmMaxPwrIdx - pHalData->LegacyHTTxPowerDiff;
880 }
881 else
882 {
883 LegacyOfdmMaxPwrIdx = 0;
884 }
885 }
886
887 RT_TRACE(COMP_TXAGC, DBG_LOUD,
888 ("Altered CCK Tx power index : %d, Legacy OFDM Tx power index: %d, OFDM Tx power index: %d\n",
889 powerlevel, powerlevelOFDM24G + pHalData->LegacyHTTxPowerDiff, powerlevelOFDM24G));
890 }
891 }
892#endif
893 switch (priv->rf_chip)
894 {
895 case RF_8225:
896 break;
897 case RF_8256:
898 PHY_SetRF8256CCKTxPower(dev, powerlevel);
899 PHY_SetRF8256OFDMTxPower(dev, powerlevelOFDM24G);
900 break;
901 case RF_8258:
902 break;
903 default:
904 RT_TRACE(COMP_ERR, "unknown rf chip in funtion %s()\n", __func__);
905 break;
906 }
907 return;
908}
909
910bool rtl8192_phy_RFConfig(struct net_device* dev)
911{
912 struct r8192_priv *priv = rtllib_priv(dev);
913 bool rtStatus = true;
914 switch (priv->rf_chip)
915 {
916 case RF_8225:
917 break;
918 case RF_8256:
919 rtStatus = PHY_RF8256_Config(dev);
920 break;
921
922 case RF_8258:
923 break;
924 case RF_PSEUDO_11N:
925 break;
926
927 default:
928 RT_TRACE(COMP_ERR, "error chip id\n");
929 break;
930 }
931 return rtStatus;
932}
933
934void rtl8192_phy_updateInitGain(struct net_device* dev)
935{
936 return;
937}
938
939u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device* dev, RF90_RADIO_PATH_E eRFPath)
940{
941
942 int i;
943 u8 ret = 0;
944
945 switch (eRFPath){
946 case RF90_PATH_A:
947 for (i = 0;i<RadioA_ArrayLength; i=i+2){
948
949 if (Rtl819XRadioA_Array[i] == 0xfe){
950 msleep(100);
951 continue;
952 }
953 rtl8192_phy_SetRFReg(dev, eRFPath, Rtl819XRadioA_Array[i], bMask12Bits, Rtl819XRadioA_Array[i+1]);
954
955 }
956 break;
957 case RF90_PATH_B:
958 for (i = 0;i<RadioB_ArrayLength; i=i+2){
959
960 if (Rtl819XRadioB_Array[i] == 0xfe){
961 msleep(100);
962 continue;
963 }
964 rtl8192_phy_SetRFReg(dev, eRFPath, Rtl819XRadioB_Array[i], bMask12Bits, Rtl819XRadioB_Array[i+1]);
965
966 }
967 break;
968 case RF90_PATH_C:
969 for (i = 0;i<RadioC_ArrayLength; i=i+2){
970
971 if (Rtl819XRadioC_Array[i] == 0xfe){
972 msleep(100);
973 continue;
974 }
975 rtl8192_phy_SetRFReg(dev, eRFPath, Rtl819XRadioC_Array[i], bMask12Bits, Rtl819XRadioC_Array[i+1]);
976
977 }
978 break;
979 case RF90_PATH_D:
980 for (i = 0;i<RadioD_ArrayLength; i=i+2){
981
982 if (Rtl819XRadioD_Array[i] == 0xfe){
983 msleep(100);
984 continue;
985 }
986 rtl8192_phy_SetRFReg(dev, eRFPath, Rtl819XRadioD_Array[i], bMask12Bits, Rtl819XRadioD_Array[i+1]);
987
988 }
989 break;
990 default:
991 break;
992 }
993
994 return ret;;
995
996}
997void rtl8192_SetTxPowerLevel(struct net_device *dev, u8 channel)
998{
999 struct r8192_priv *priv = rtllib_priv(dev);
1000 u8 powerlevel = priv->TxPowerLevelCCK[channel-1];
1001 u8 powerlevelOFDM24G = priv->TxPowerLevelOFDM24G[channel-1];
1002
1003 switch (priv->rf_chip)
1004 {
1005 case RF_8225:
1006#ifdef TO_DO_LIST
1007 PHY_SetRF8225CckTxPower(dev, powerlevel);
1008 PHY_SetRF8225OfdmTxPower(dev, powerlevelOFDM24G);
1009#endif
1010 break;
1011
1012 case RF_8256:
1013 PHY_SetRF8256CCKTxPower(dev, powerlevel);
1014 PHY_SetRF8256OFDMTxPower(dev, powerlevelOFDM24G);
1015 break;
1016
1017 case RF_8258:
1018 break;
1019 default:
1020 RT_TRACE(COMP_ERR, "unknown rf chip ID in rtl8192_SetTxPowerLevel()\n");
1021 break;
1022 }
1023 return;
1024}
1025u8 rtl8192_phy_SetSwChnlCmdArray(
1026 SwChnlCmd* CmdTable,
1027 u32 CmdTableIdx,
1028 u32 CmdTableSz,
1029 SwChnlCmdID CmdID,
1030 u32 Para1,
1031 u32 Para2,
1032 u32 msDelay
1033 )
1034{
1035 SwChnlCmd* pCmd;
1036
1037 if (CmdTable == NULL)
1038 {
1039 RT_TRACE(COMP_ERR, "phy_SetSwChnlCmdArray(): CmdTable cannot be NULL.\n");
1040 return false;
1041 }
1042 if (CmdTableIdx >= CmdTableSz)
1043 {
1044 RT_TRACE(COMP_ERR, "phy_SetSwChnlCmdArray(): Access invalid index, please check size of the table, CmdTableIdx:%d, CmdTableSz:%d\n",
1045 CmdTableIdx, CmdTableSz);
1046 return false;
1047 }
1048
1049 pCmd = CmdTable + CmdTableIdx;
1050 pCmd->CmdID = CmdID;
1051 pCmd->Para1 = Para1;
1052 pCmd->Para2 = Para2;
1053 pCmd->msDelay = msDelay;
1054
1055 return true;
1056}
1057u8 rtl8192_phy_SwChnlStepByStep(struct net_device *dev, u8 channel, u8* stage, u8* step, u32* delay)
1058{
1059 struct r8192_priv *priv = rtllib_priv(dev);
1060 SwChnlCmd PreCommonCmd[MAX_PRECMD_CNT];
1061 u32 PreCommonCmdCnt;
1062 SwChnlCmd PostCommonCmd[MAX_POSTCMD_CNT];
1063 u32 PostCommonCmdCnt;
1064 SwChnlCmd RfDependCmd[MAX_RFDEPENDCMD_CNT];
1065 u32 RfDependCmdCnt;
1066 SwChnlCmd *CurrentCmd = NULL;
1067 u8 eRFPath;
1068
1069 RT_TRACE(COMP_TRACE, "====>%s()====stage:%d, step:%d, channel:%d\n", __func__, *stage, *step, channel);
1070
1071#ifdef ENABLE_DOT11D
1072 if (!IsLegalChannel(priv->rtllib, channel))
1073 {
1074 RT_TRACE(COMP_ERR, "=============>set to illegal channel:%d\n", channel);
1075 return true;
1076 }
1077#endif
1078
1079 {
1080 PreCommonCmdCnt = 0;
1081 rtl8192_phy_SetSwChnlCmdArray(PreCommonCmd, PreCommonCmdCnt++, MAX_PRECMD_CNT,
1082 CmdID_SetTxPowerLevel, 0, 0, 0);
1083 rtl8192_phy_SetSwChnlCmdArray(PreCommonCmd, PreCommonCmdCnt++, MAX_PRECMD_CNT,
1084 CmdID_End, 0, 0, 0);
1085
1086 PostCommonCmdCnt = 0;
1087
1088 rtl8192_phy_SetSwChnlCmdArray(PostCommonCmd, PostCommonCmdCnt++, MAX_POSTCMD_CNT,
1089 CmdID_End, 0, 0, 0);
1090
1091 RfDependCmdCnt = 0;
1092 switch ( priv->rf_chip )
1093 {
1094 case RF_8225:
1095 if (!(channel >= 1 && channel <= 14))
1096 {
1097 RT_TRACE(COMP_ERR, "illegal channel for Zebra 8225: %d\n", channel);
1098 return false;
1099 }
1100 rtl8192_phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT,
1101 CmdID_RF_WriteReg, rZebra1_Channel, RF_CHANNEL_TABLE_ZEBRA[channel], 10);
1102 rtl8192_phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT,
1103 CmdID_End, 0, 0, 0);
1104 break;
1105
1106 case RF_8256:
1107 if (!(channel >= 1 && channel <= 14))
1108 {
1109 RT_TRACE(COMP_ERR, "illegal channel for Zebra 8256: %d\n", channel);
1110 return false;
1111 }
1112 rtl8192_phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT,
1113 CmdID_RF_WriteReg, rZebra1_Channel, channel, 10);
1114 rtl8192_phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT,
1115 CmdID_End, 0, 0, 0);
1116 break;
1117
1118 case RF_8258:
1119 break;
1120
1121 default:
1122 RT_TRACE(COMP_ERR, "Unknown RFChipID: %d\n", priv->rf_chip);
1123 return false;
1124 break;
1125 }
1126
1127
1128 do{
1129 switch (*stage)
1130 {
1131 case 0:
1132 CurrentCmd=&PreCommonCmd[*step];
1133 break;
1134 case 1:
1135 CurrentCmd=&RfDependCmd[*step];
1136 break;
1137 case 2:
1138 CurrentCmd=&PostCommonCmd[*step];
1139 break;
1140 }
1141
1142 if (CurrentCmd->CmdID==CmdID_End)
1143 {
1144 if ((*stage)==2)
1145 {
1146 return true;
1147 }
1148 else
1149 {
1150 (*stage)++;
1151 (*step)=0;
1152 continue;
1153 }
1154 }
1155
1156 switch (CurrentCmd->CmdID)
1157 {
1158 case CmdID_SetTxPowerLevel:
1159 if (priv->IC_Cut > (u8)VERSION_8190_BD)
1160 rtl8192_SetTxPowerLevel(dev,channel);
1161 break;
1162 case CmdID_WritePortUlong:
1163 write_nic_dword(dev, CurrentCmd->Para1, CurrentCmd->Para2);
1164 break;
1165 case CmdID_WritePortUshort:
1166 write_nic_word(dev, CurrentCmd->Para1, (u16)CurrentCmd->Para2);
1167 break;
1168 case CmdID_WritePortUchar:
1169 write_nic_byte(dev, CurrentCmd->Para1, (u8)CurrentCmd->Para2);
1170 break;
1171 case CmdID_RF_WriteReg:
1172 for (eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++)
1173 rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, bMask12Bits, CurrentCmd->Para2<<7);
1174 break;
1175 default:
1176 break;
1177 }
1178
1179 break;
1180 }while(true);
1181 }/*for (Number of RF paths)*/
1182
1183 (*delay)=CurrentCmd->msDelay;
1184 (*step)++;
1185 return false;
1186}
1187
1188void rtl8192_phy_FinishSwChnlNow(struct net_device *dev, u8 channel)
1189{
1190 struct r8192_priv *priv = rtllib_priv(dev);
1191 u32 delay = 0;
1192
1193 while(!rtl8192_phy_SwChnlStepByStep(dev,channel,&priv->SwChnlStage,&priv->SwChnlStep,&delay))
1194 {
1195 if (delay>0)
1196 msleep(delay);
1197 if (IS_NIC_DOWN(priv))
1198 break;
1199 }
1200}
1201void rtl8192_SwChnl_WorkItem(struct net_device *dev)
1202{
1203
1204 struct r8192_priv *priv = rtllib_priv(dev);
1205
1206 RT_TRACE(COMP_TRACE, "==> SwChnlCallback819xUsbWorkItem()\n");
1207
1208 RT_TRACE(COMP_TRACE, "=====>--%s(), set chan:%d, priv:%p\n", __func__, priv->chan, priv);
1209
1210 rtl8192_phy_FinishSwChnlNow(dev , priv->chan);
1211
1212 RT_TRACE(COMP_TRACE, "<== SwChnlCallback819xUsbWorkItem()\n");
1213}
1214
1215u8 rtl8192_phy_SwChnl(struct net_device* dev, u8 channel)
1216{
1217 struct r8192_priv *priv = rtllib_priv(dev);
1218 RT_TRACE(COMP_PHY, "=====>%s()\n", __func__);
1219 if (IS_NIC_DOWN(priv))
1220 {
1221 RT_TRACE(COMP_ERR, "%s(): ERR !! driver is not up\n",__func__);
1222 return false;
1223 }
1224 if (priv->SwChnlInProgress)
1225 return false;
1226
1227
1228 switch (priv->rtllib->mode)
1229 {
1230 case WIRELESS_MODE_A:
1231 case WIRELESS_MODE_N_5G:
1232 if (channel<=14){
1233 RT_TRACE(COMP_ERR, "WIRELESS_MODE_A but channel<=14");
1234 return false;
1235 }
1236 break;
1237 case WIRELESS_MODE_B:
1238 if (channel>14){
1239 RT_TRACE(COMP_ERR, "WIRELESS_MODE_B but channel>14");
1240 return false;
1241 }
1242 break;
1243 case WIRELESS_MODE_G:
1244 case WIRELESS_MODE_N_24G:
1245 if (channel>14){
1246 RT_TRACE(COMP_ERR, "WIRELESS_MODE_G but channel>14");
1247 return false;
1248 }
1249 break;
1250 }
1251
1252 priv->SwChnlInProgress = true;
1253 if (channel == 0)
1254 channel = 1;
1255
1256 priv->chan=channel;
1257
1258 priv->SwChnlStage=0;
1259 priv->SwChnlStep=0;
1260
1261 if (!IS_NIC_DOWN(priv)){
1262 rtl8192_SwChnl_WorkItem(dev);
1263 }
1264 priv->SwChnlInProgress = false;
1265 return true;
1266}
1267
1268static void CCK_Tx_Power_Track_BW_Switch_TSSI(struct net_device *dev )
1269{
1270 struct r8192_priv *priv = rtllib_priv(dev);
1271
1272 switch (priv->CurrentChannelBW)
1273 {
1274 case HT_CHANNEL_WIDTH_20:
1275 priv->CCKPresentAttentuation =
1276 priv->CCKPresentAttentuation_20Mdefault + priv->CCKPresentAttentuation_difference;
1277
1278 if (priv->CCKPresentAttentuation > (CCKTxBBGainTableLength-1))
1279 priv->CCKPresentAttentuation = CCKTxBBGainTableLength-1;
1280 if (priv->CCKPresentAttentuation < 0)
1281 priv->CCKPresentAttentuation = 0;
1282
1283 RT_TRACE(COMP_POWER_TRACKING, "20M, priv->CCKPresentAttentuation = %d\n", priv->CCKPresentAttentuation);
1284
1285 if (priv->rtllib->current_network.channel== 14 && !priv->bcck_in_ch14)
1286 {
1287 priv->bcck_in_ch14 = true;
1288 dm_cck_txpower_adjust(dev,priv->bcck_in_ch14);
1289 }
1290 else if (priv->rtllib->current_network.channel != 14 && priv->bcck_in_ch14)
1291 {
1292 priv->bcck_in_ch14 = false;
1293 dm_cck_txpower_adjust(dev,priv->bcck_in_ch14);
1294 }
1295 else
1296 dm_cck_txpower_adjust(dev,priv->bcck_in_ch14);
1297 break;
1298
1299 case HT_CHANNEL_WIDTH_20_40:
1300 priv->CCKPresentAttentuation =
1301 priv->CCKPresentAttentuation_40Mdefault + priv->CCKPresentAttentuation_difference;
1302
1303 RT_TRACE(COMP_POWER_TRACKING, "40M, priv->CCKPresentAttentuation = %d\n", priv->CCKPresentAttentuation);
1304 if (priv->CCKPresentAttentuation > (CCKTxBBGainTableLength-1))
1305 priv->CCKPresentAttentuation = CCKTxBBGainTableLength-1;
1306 if (priv->CCKPresentAttentuation < 0)
1307 priv->CCKPresentAttentuation = 0;
1308
1309 if (priv->rtllib->current_network.channel == 14 && !priv->bcck_in_ch14)
1310 {
1311 priv->bcck_in_ch14 = true;
1312 dm_cck_txpower_adjust(dev,priv->bcck_in_ch14);
1313 }
1314 else if (priv->rtllib->current_network.channel != 14 && priv->bcck_in_ch14)
1315 {
1316 priv->bcck_in_ch14 = false;
1317 dm_cck_txpower_adjust(dev,priv->bcck_in_ch14);
1318 }
1319 else
1320 dm_cck_txpower_adjust(dev,priv->bcck_in_ch14);
1321 break;
1322 }
1323}
1324
1325#ifndef RTL8190P
1326static void CCK_Tx_Power_Track_BW_Switch_ThermalMeter(struct net_device *dev)
1327{
1328 struct r8192_priv *priv = rtllib_priv(dev);
1329
1330 if (priv->rtllib->current_network.channel == 14 && !priv->bcck_in_ch14)
1331 priv->bcck_in_ch14 = true;
1332 else if (priv->rtllib->current_network.channel != 14 && priv->bcck_in_ch14)
1333 priv->bcck_in_ch14 = false;
1334
1335 switch (priv->CurrentChannelBW)
1336 {
1337 case HT_CHANNEL_WIDTH_20:
1338 if (priv->Record_CCK_20Mindex == 0)
1339 priv->Record_CCK_20Mindex = 6;
1340 priv->CCK_index = priv->Record_CCK_20Mindex;
1341 RT_TRACE(COMP_POWER_TRACKING, "20MHz, CCK_Tx_Power_Track_BW_Switch_ThermalMeter(),CCK_index = %d\n", priv->CCK_index);
1342 break;
1343
1344 case HT_CHANNEL_WIDTH_20_40:
1345 priv->CCK_index = priv->Record_CCK_40Mindex;
1346 RT_TRACE(COMP_POWER_TRACKING, "40MHz, CCK_Tx_Power_Track_BW_Switch_ThermalMeter(), CCK_index = %d\n", priv->CCK_index);
1347 break;
1348 }
1349 dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
1350}
1351#endif
1352
1353static void CCK_Tx_Power_Track_BW_Switch(struct net_device *dev)
1354{
1355#ifdef RTL8192E
1356 struct r8192_priv *priv = rtllib_priv(dev);
1357#endif
1358
1359#ifdef RTL8190P
1360 CCK_Tx_Power_Track_BW_Switch_TSSI(dev);
1361#else
1362 if (priv->IC_Cut >= IC_VersionCut_D)
1363 CCK_Tx_Power_Track_BW_Switch_TSSI(dev);
1364 else
1365 CCK_Tx_Power_Track_BW_Switch_ThermalMeter(dev);
1366#endif
1367}
1368
1369void rtl8192_SetBWModeWorkItem(struct net_device *dev)
1370{
1371
1372 struct r8192_priv *priv = rtllib_priv(dev);
1373 u8 regBwOpMode;
1374
1375 RT_TRACE(COMP_SWBW, "==>rtl8192_SetBWModeWorkItem() Switch to %s bandwidth\n", \
1376 priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz")
1377
1378
1379 if (priv->rf_chip== RF_PSEUDO_11N)
1380 {
1381 priv->SetBWModeInProgress= false;
1382 return;
1383 }
1384 if (IS_NIC_DOWN(priv)){
1385 RT_TRACE(COMP_ERR,"%s(): ERR!! driver is not up\n",__func__);
1386 return;
1387 }
1388 regBwOpMode = read_nic_byte(dev, BW_OPMODE);
1389
1390 switch (priv->CurrentChannelBW)
1391 {
1392 case HT_CHANNEL_WIDTH_20:
1393 regBwOpMode |= BW_OPMODE_20MHZ;
1394 write_nic_byte(dev, BW_OPMODE, regBwOpMode);
1395 break;
1396
1397 case HT_CHANNEL_WIDTH_20_40:
1398 regBwOpMode &= ~BW_OPMODE_20MHZ;
1399 write_nic_byte(dev, BW_OPMODE, regBwOpMode);
1400 break;
1401
1402 default:
1403 RT_TRACE(COMP_ERR, "SetChannelBandwidth819xUsb(): unknown Bandwidth: %#X\n",priv->CurrentChannelBW);
1404 break;
1405 }
1406
1407 switch (priv->CurrentChannelBW)
1408 {
1409 case HT_CHANNEL_WIDTH_20:
1410 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bRFMOD, 0x0);
1411 rtl8192_setBBreg(dev, rFPGA1_RFMOD, bRFMOD, 0x0);
1412
1413 if (!priv->btxpower_tracking)
1414 {
1415 write_nic_dword(dev, rCCK0_TxFilter1, 0x1a1b0000);
1416 write_nic_dword(dev, rCCK0_TxFilter2, 0x090e1317);
1417 write_nic_dword(dev, rCCK0_DebugPort, 0x00000204);
1418 }
1419 else
1420 CCK_Tx_Power_Track_BW_Switch(dev);
1421
1422#ifdef RTL8190P
1423 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, bADClkPhase, 1);
1424 rtl8192_setBBreg(dev, rOFDM0_RxDetector1, bMaskByte0, 0x44);
1425#else
1426 #ifdef RTL8192E
1427 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x00100000, 1);
1428 #endif
1429#endif
1430
1431 break;
1432 case HT_CHANNEL_WIDTH_20_40:
1433 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bRFMOD, 0x1);
1434 rtl8192_setBBreg(dev, rFPGA1_RFMOD, bRFMOD, 0x1);
1435
1436 if (!priv->btxpower_tracking)
1437 {
1438 write_nic_dword(dev, rCCK0_TxFilter1, 0x35360000);
1439 write_nic_dword(dev, rCCK0_TxFilter2, 0x121c252e);
1440 write_nic_dword(dev, rCCK0_DebugPort, 0x00000409);
1441 }
1442 else
1443 CCK_Tx_Power_Track_BW_Switch(dev);
1444
1445 rtl8192_setBBreg(dev, rCCK0_System, bCCKSideBand, (priv->nCur40MhzPrimeSC>>1));
1446 rtl8192_setBBreg(dev, rOFDM1_LSTF, 0xC00, priv->nCur40MhzPrimeSC);
1447
1448
1449#ifdef RTL8190P
1450 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, bADClkPhase, 0);
1451 rtl8192_setBBreg(dev, rOFDM0_RxDetector1, bMaskByte0, 0x42);
1452
1453 if (priv->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)
1454 {
1455 rtl8192_setBBreg(dev, rFPGA0_RFMOD, (BIT6|BIT5), 0x01);
1456 }else if (priv->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)
1457 {
1458 rtl8192_setBBreg(dev, rFPGA0_RFMOD, (BIT6|BIT5), 0x02);
1459 }
1460
1461#else
1462 #ifdef RTL8192E
1463 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x00100000, 0);
1464 #endif
1465#endif
1466 break;
1467 default:
1468 RT_TRACE(COMP_ERR, "SetChannelBandwidth819xUsb(): unknown Bandwidth: %#X\n" ,priv->CurrentChannelBW);
1469 break;
1470
1471 }
1472
1473#if 1
1474 switch ( priv->rf_chip )
1475 {
1476 case RF_8225:
1477#ifdef TO_DO_LIST
1478 PHY_SetRF8225Bandwidth(dev, pHalData->CurrentChannelBW);
1479#endif
1480 break;
1481
1482 case RF_8256:
1483 PHY_SetRF8256Bandwidth(dev, priv->CurrentChannelBW);
1484 break;
1485
1486 case RF_8258:
1487 break;
1488
1489 case RF_PSEUDO_11N:
1490 break;
1491
1492 default:
1493 RT_TRACE(COMP_ERR, "Unknown RFChipID: %d\n", priv->rf_chip);
1494 break;
1495 }
1496#endif
1497 atomic_dec(&(priv->rtllib->atm_swbw));
1498 priv->SetBWModeInProgress= false;
1499
1500 RT_TRACE(COMP_SWBW, "<==SetBWMode819xUsb()");
1501}
1502
1503void rtl8192_SetBWMode(struct net_device *dev, HT_CHANNEL_WIDTH Bandwidth, HT_EXTCHNL_OFFSET Offset)
1504{
1505 struct r8192_priv *priv = rtllib_priv(dev);
1506
1507
1508 if (priv->SetBWModeInProgress)
1509 return;
1510
1511 atomic_inc(&(priv->rtllib->atm_swbw));
1512 priv->SetBWModeInProgress= true;
1513
1514 priv->CurrentChannelBW = Bandwidth;
1515
1516 if (Offset==HT_EXTCHNL_OFFSET_LOWER)
1517 priv->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_UPPER;
1518 else if (Offset==HT_EXTCHNL_OFFSET_UPPER)
1519 priv->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_LOWER;
1520 else
1521 priv->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
1522
1523 rtl8192_SetBWModeWorkItem(dev);
1524
1525}
1526
1527
1528void InitialGain819xPci(struct net_device *dev, u8 Operation)
1529{
1530#define SCAN_RX_INITIAL_GAIN 0x17
1531#define POWER_DETECTION_TH 0x08
1532 struct r8192_priv *priv = rtllib_priv(dev);
1533 u32 BitMask;
1534 u8 initial_gain;
1535
1536 if (!IS_NIC_DOWN(priv)){
1537 switch (Operation)
1538 {
1539 case IG_Backup:
1540 RT_TRACE(COMP_SCAN, "IG_Backup, backup the initial gain.\n");
1541 initial_gain = SCAN_RX_INITIAL_GAIN;
1542 BitMask = bMaskByte0;
1543 if (dm_digtable.dig_algorithm == DIG_ALGO_BY_FALSE_ALARM)
1544 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8);
1545 priv->initgain_backup.xaagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XAAGCCore1, BitMask);
1546 priv->initgain_backup.xbagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XBAGCCore1, BitMask);
1547 priv->initgain_backup.xcagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XCAGCCore1, BitMask);
1548 priv->initgain_backup.xdagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XDAGCCore1, BitMask);
1549 BitMask = bMaskByte2;
1550 priv->initgain_backup.cca = (u8)rtl8192_QueryBBReg(dev, rCCK0_CCA, BitMask);
1551
1552 RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xc50 is %x\n",priv->initgain_backup.xaagccore1);
1553 RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xc58 is %x\n",priv->initgain_backup.xbagccore1);
1554 RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xc60 is %x\n",priv->initgain_backup.xcagccore1);
1555 RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xc68 is %x\n",priv->initgain_backup.xdagccore1);
1556 RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xa0a is %x\n",priv->initgain_backup.cca);
1557
1558 RT_TRACE(COMP_SCAN, "Write scan initial gain = 0x%x \n", initial_gain);
1559 write_nic_byte(dev, rOFDM0_XAAGCCore1, initial_gain);
1560 write_nic_byte(dev, rOFDM0_XBAGCCore1, initial_gain);
1561 write_nic_byte(dev, rOFDM0_XCAGCCore1, initial_gain);
1562 write_nic_byte(dev, rOFDM0_XDAGCCore1, initial_gain);
1563 RT_TRACE(COMP_SCAN, "Write scan 0xa0a = 0x%x \n", POWER_DETECTION_TH);
1564 write_nic_byte(dev, 0xa0a, POWER_DETECTION_TH);
1565 break;
1566 case IG_Restore:
1567 RT_TRACE(COMP_SCAN, "IG_Restore, restore the initial gain.\n");
1568 BitMask = 0x7f;
1569 if (dm_digtable.dig_algorithm == DIG_ALGO_BY_FALSE_ALARM)
1570 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8);
1571
1572 rtl8192_setBBreg(dev, rOFDM0_XAAGCCore1, BitMask, (u32)priv->initgain_backup.xaagccore1);
1573 rtl8192_setBBreg(dev, rOFDM0_XBAGCCore1, BitMask, (u32)priv->initgain_backup.xbagccore1);
1574 rtl8192_setBBreg(dev, rOFDM0_XCAGCCore1, BitMask, (u32)priv->initgain_backup.xcagccore1);
1575 rtl8192_setBBreg(dev, rOFDM0_XDAGCCore1, BitMask, (u32)priv->initgain_backup.xdagccore1);
1576 BitMask = bMaskByte2;
1577 rtl8192_setBBreg(dev, rCCK0_CCA, BitMask, (u32)priv->initgain_backup.cca);
1578
1579 RT_TRACE(COMP_SCAN, "Scan BBInitialGainRestore 0xc50 is %x\n",priv->initgain_backup.xaagccore1);
1580 RT_TRACE(COMP_SCAN, "Scan BBInitialGainRestore 0xc58 is %x\n",priv->initgain_backup.xbagccore1);
1581 RT_TRACE(COMP_SCAN, "Scan BBInitialGainRestore 0xc60 is %x\n",priv->initgain_backup.xcagccore1);
1582 RT_TRACE(COMP_SCAN, "Scan BBInitialGainRestore 0xc68 is %x\n",priv->initgain_backup.xdagccore1);
1583 RT_TRACE(COMP_SCAN, "Scan BBInitialGainRestore 0xa0a is %x\n",priv->initgain_backup.cca);
1584
1585 rtl8192_phy_setTxPower(dev,priv->rtllib->current_network.channel);
1586
1587
1588 if (dm_digtable.dig_algorithm == DIG_ALGO_BY_FALSE_ALARM)
1589 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1);
1590 break;
1591 default:
1592 RT_TRACE(COMP_SCAN, "Unknown IG Operation. \n");
1593 break;
1594 }
1595 }
1596}
1597
1598#if defined RTL8190P
1599extern void
1600PHY_SetRtl8190pRfOff(struct net_device* dev )
1601{
1602 struct r8192_priv *priv = rtllib_priv(dev);
1603
1604 if (priv->rf_type == RF_2T4R)
1605 {
1606 rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x0);
1607 }
1608 rtl8192_setBBreg(dev, rFPGA0_XC_RFInterfaceOE, BIT4, 0x0);
1609 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);
1610 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x1e0, 0x0);
1611 rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0xf, 0x0);
1612 rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0xf, 0x0);
1613 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x1e00, 0x0);
1614
1615}
1616#endif
1617
1618#if defined RTL8192E
1619extern void
1620PHY_SetRtl8192eRfOff(struct net_device* dev )
1621{
1622
1623 rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x0);
1624 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300, 0x0);
1625 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x18, 0x0);
1626 rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0xf, 0x0);
1627 rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0xf, 0x0);
1628 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x60, 0x0);
1629 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x4, 0x0);
1630 write_nic_byte(dev, ANAPAR_FOR_8192PciE, 0x07);
1631
1632}
1633#endif
1634
1635#ifndef RTL8192SE
1636bool
1637SetRFPowerState8190(
1638 struct net_device* dev,
1639 RT_RF_POWER_STATE eRFPowerState
1640 )
1641{
1642 struct r8192_priv *priv = rtllib_priv(dev);
1643#if defined RTL8192E
1644 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
1645#endif
1646 bool bResult = true;
1647 u8 i = 0, QueueID = 0;
1648 struct rtl8192_tx_ring *ring = NULL;
1649
1650 if (priv->SetRFPowerStateInProgress == true)
1651 return false;
1652 RT_TRACE(COMP_PS, "===========> SetRFPowerState8190()!\n");
1653 priv->SetRFPowerStateInProgress = true;
1654
1655 switch (priv->rf_chip)
1656 {
1657 case RF_8256:
1658 switch ( eRFPowerState )
1659 {
1660 case eRfOn:
1661 RT_TRACE(COMP_PS, "SetRFPowerState8190() eRfOn !\n");
1662 #ifdef RTL8190P
1663 if (priv->rf_type == RF_2T4R)
1664 {
1665 rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x1);
1666 rtl8192_setBBreg(dev, rFPGA0_XC_RFInterfaceOE, BIT4, 0x1);
1667 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0xf);
1668 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x1e0, 0xf);
1669 rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0xf, 0xf);
1670 rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0xf, 0xf);
1671 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x1e00, 0xf);
1672 }
1673 else if (priv->rf_type == RF_1T2R)
1674 {
1675 rtl8192_setBBreg(dev, rFPGA0_XC_RFInterfaceOE, BIT4, 0x1);
1676 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xc00, 0x3);
1677 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x180, 0x3);
1678 rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0xc, 0x3);
1679 rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0xc, 0x3);
1680 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x1800, 0x3);
1681 }
1682 else if (priv->rf_type == RF_1T1R)
1683 {
1684 rtl8192_setBBreg(dev, rFPGA0_XC_RFInterfaceOE, BIT4, 0x1);
1685 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x400, 0x1);
1686 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x80, 0x1);
1687 rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0x4, 0x1);
1688 rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0x4, 0x1);
1689 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x800, 0x1);
1690 }
1691
1692#elif defined RTL8192E
1693 if ((priv->rtllib->eRFPowerState == eRfOff) && RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC))
1694 {
1695 bool rtstatus = true;
1696 u32 InitilizeCount = 3;
1697 do
1698 {
1699 InitilizeCount--;
1700 priv->RegRfOff = false;
1701 rtstatus = NicIFEnableNIC(dev);
1702 }while( (rtstatus != true) &&(InitilizeCount >0) );
1703
1704 if (rtstatus != true)
1705 {
1706 RT_TRACE(COMP_ERR,"%s():Initialize Adapter fail,return\n",__func__);
1707 priv->SetRFPowerStateInProgress = false;
1708 return false;
1709 }
1710
1711 RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC);
1712 } else {
1713 write_nic_byte(dev, ANAPAR, 0x37);
1714 mdelay(1);
1715 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x4, 0x1);
1716 priv->bHwRfOffAction = 0;
1717
1718 rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x1);
1719 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3);
1720 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x18, 0x3);
1721 rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0x3, 0x3);
1722 rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0x3, 0x3);
1723 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x60, 0x3);
1724
1725 }
1726
1727 #endif
1728 break;
1729
1730 case eRfSleep:
1731 {
1732 if (priv->rtllib->eRFPowerState == eRfOff)
1733 break;
1734
1735
1736 {
1737 for (QueueID = 0, i = 0; QueueID < MAX_TX_QUEUE; )
1738 {
1739 ring = &priv->tx_ring[QueueID];
1740
1741 if (skb_queue_len(&ring->queue) == 0) {
1742 QueueID++;
1743 continue;
1744 }
1745#ifdef TO_DO_LIST
1746 else if (IsLowPowerState(Adapter))
1747 {
1748 RT_TRACE((COMP_POWER|COMP_RF), "eRf Off/Sleep: %d times TcbBusyQueue[%d] !=0 but lower power state!\n", (i+1), QueueID);
1749 break;
1750 }
1751#endif
1752 else
1753 {
1754 RT_TRACE((COMP_POWER|COMP_RF), "eRf Off/Sleep: %d times TcbBusyQueue[%d] !=0 before doze!\n", (i+1), QueueID);
1755 udelay(10);
1756 i++;
1757 }
1758
1759 if (i >= MAX_DOZE_WAITING_TIMES_9x)
1760 {
1761 RT_TRACE(COMP_POWER, "\n\n\n TimeOut!! SetRFPowerState8190(): eRfOff: %d times TcbBusyQueue[%d] != 0 !!!\n\n\n", MAX_DOZE_WAITING_TIMES_9x, QueueID);
1762 break;
1763 }
1764 }
1765 }
1766
1767#ifdef RTL8190P
1768 {
1769 PHY_SetRtl8190pRfOff(dev);
1770 }
1771#elif defined RTL8192E
1772 {
1773 PHY_SetRtl8192eRfOff(dev);
1774 }
1775#endif
1776 }
1777 break;
1778
1779 case eRfOff:
1780 RT_TRACE(COMP_PS, "SetRFPowerState8190() eRfOff/Sleep !\n");
1781
1782
1783 for (QueueID = 0, i = 0; QueueID < MAX_TX_QUEUE; ) {
1784 ring = &priv->tx_ring[QueueID];
1785
1786 if (skb_queue_len(&ring->queue) == 0) {
1787 QueueID++;
1788 continue;
1789 }
1790#ifdef TO_DO_LIST
1791 else if (IsLowPowerState(Adapter))
1792 {
1793 RT_TRACE(COMP_POWER,
1794 "eRf Off/Sleep: %d times TcbBusyQueue[%d] !=0 but lower power state!\n", (i+1), QueueID);
1795 break;
1796 }
1797#endif
1798 else
1799 {
1800 RT_TRACE(COMP_POWER,
1801 "eRf Off/Sleep: %d times TcbBusyQueue[%d] !=0 before doze!\n", (i+1), QueueID);
1802 udelay(10);
1803 i++;
1804 }
1805
1806 if (i >= MAX_DOZE_WAITING_TIMES_9x)
1807 {
1808 RT_TRACE(COMP_POWER, "\n\n\n SetZebraRFPowerState8185B(): eRfOff: %d times TcbBusyQueue[%d] != 0 !!!\n\n\n", MAX_DOZE_WAITING_TIMES_9x, QueueID);
1809 break;
1810 }
1811 }
1812
1813#if defined RTL8190P
1814 {
1815 PHY_SetRtl8190pRfOff(dev);
1816 }
1817#elif defined RTL8192E
1818 {
1819 if (pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_HALT_NIC && !RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC))
1820 {
1821
1822 NicIFDisableNIC(dev);
1823 RT_SET_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC);
1824 }
1825 else if (!(pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_HALT_NIC))
1826 {
1827 PHY_SetRtl8192eRfOff(dev);
1828 }
1829#ifdef TO_DO_LIST
1830 if (pMgntInfo->RfOffReason == RF_CHANGE_BY_IPS )
1831 {
1832 Adapter->HalFunc.LedControlHandler(dev,LED_CTL_NO_LINK);
1833 }
1834 else
1835 {
1836 Adapter->HalFunc.LedControlHandler(dev, LED_CTL_POWER_OFF);
1837 }
1838#endif
1839 }
1840#else
1841 else
1842 {
1843 RT_TRACE(COMP_DBG,DBG_TRACE,("It is not 8190Pci and 8192PciE \n"));
1844 }
1845 #endif
1846
1847 break;
1848
1849 default:
1850 bResult = false;
1851 RT_TRACE(COMP_ERR, "SetRFPowerState8190(): unknow state to set: 0x%X!!!\n", eRFPowerState);
1852 break;
1853 }
1854
1855 break;
1856
1857 default:
1858 RT_TRACE(COMP_ERR, "SetRFPowerState8190(): Unknown RF type\n");
1859 break;
1860 }
1861
1862 if (bResult) {
1863 priv->rtllib->eRFPowerState = eRFPowerState;
1864
1865 switch (priv->rf_chip )
1866 {
1867 case RF_8256:
1868 switch (priv->rtllib->eRFPowerState)
1869 {
1870 case eRfOff:
1871 if (priv->rtllib->RfOffReason==RF_CHANGE_BY_IPS ) {
1872 #ifdef TO_DO
1873 dev->HalFunc.LedControlHandler(dev,LED_CTL_NO_LINK);
1874 #endif
1875 } else {
1876 #ifdef TO_DO
1877 dev->HalFunc.LedControlHandler(dev, LED_CTL_POWER_OFF);
1878 #endif
1879 }
1880 break;
1881
1882 case eRfOn:
1883 if ( priv->rtllib->state == RTLLIB_LINKED) {
1884 #ifdef TO_DO
1885 dev->HalFunc.LedControlHandler(dev, LED_CTL_LINK);
1886 #endif
1887 } else {
1888 #ifdef TO_DO
1889 dev->HalFunc.LedControlHandler(dev, LED_CTL_NO_LINK);
1890 #endif
1891 }
1892 break;
1893
1894 default:
1895 break;
1896 }
1897
1898 break;
1899
1900 default:
1901 RT_TRACE(COMP_ERR, "SetRFPowerState8190(): Unknown RF type\n");
1902 break;
1903 }
1904 }
1905
1906 priv->SetRFPowerStateInProgress = false;
1907 RT_TRACE(COMP_PS, "<=========== SetRFPowerState8190() bResult = %d!\n", bResult);
1908 return bResult;
1909}
1910
1911
1912
1913bool
1914SetRFPowerState(
1915 struct net_device* dev,
1916 RT_RF_POWER_STATE eRFPowerState
1917 )
1918{
1919 struct r8192_priv *priv = rtllib_priv(dev);
1920
1921 bool bResult = false;
1922
1923 RT_TRACE(COMP_PS,"---------> SetRFPowerState(): eRFPowerState(%d)\n", eRFPowerState);
1924 if (eRFPowerState == priv->rtllib->eRFPowerState && priv->bHwRfOffAction == 0) {
1925 RT_TRACE(COMP_PS, "<--------- SetRFPowerState(): discard the request for eRFPowerState(%d) is the same.\n", eRFPowerState);
1926 return bResult;
1927 }
1928
1929 bResult = SetRFPowerState8190(dev, eRFPowerState);
1930
1931 RT_TRACE(COMP_PS, "<--------- SetRFPowerState(): bResult(%d)\n", bResult);
1932
1933 return bResult;
1934}
1935#endif
1936
1937extern void
1938PHY_ScanOperationBackup8192(
1939 struct net_device* dev,
1940 u8 Operation
1941 )
1942{
1943 struct r8192_priv *priv = rtllib_priv(dev);
1944
1945 if (priv->up) {
1946 switch (Operation) {
1947 case SCAN_OPT_BACKUP:
1948 priv->rtllib->InitialGainHandler(dev,IG_Backup);
1949 break;
1950
1951 case SCAN_OPT_RESTORE:
1952 priv->rtllib->InitialGainHandler(dev,IG_Restore);
1953 break;
1954
1955 default:
1956 RT_TRACE(COMP_SCAN, "Unknown Scan Backup Operation. \n");
1957 break;
1958 }
1959 }
1960
1961}
1962
1963#endif
diff --git a/drivers/staging/rtl8192e/r8192E_phy.h b/drivers/staging/rtl8192e/r8192E_phy.h
new file mode 100644
index 00000000000..ad0b9fd9d25
--- /dev/null
+++ b/drivers/staging/rtl8192e/r8192E_phy.h
@@ -0,0 +1,164 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/
19#ifndef _R819XU_PHY_H
20#define _R819XU_PHY_H
21
22#define MAX_DOZE_WAITING_TIMES_9x 64
23
24#define MAX_PRECMD_CNT 16
25#define MAX_RFDEPENDCMD_CNT 16
26#define MAX_POSTCMD_CNT 16
27
28#ifdef RTL8190P
29#define AGCTAB_ArrayLength AGCTAB_ArrayLengthPci
30#define MACPHY_ArrayLength MACPHY_ArrayLengthPci
31#define RadioA_ArrayLength RadioA_ArrayLengthPci
32#define RadioB_ArrayLength RadioB_ArrayLengthPci
33#define MACPHY_Array_PGLength MACPHY_Array_PGLengthPci
34#define RadioC_ArrayLength RadioC_ArrayLengthPci
35#define RadioD_ArrayLength RadioD_ArrayLengthPci
36#define PHY_REGArrayLength PHY_REGArrayLengthPci
37#define PHY_REG_1T2RArrayLength PHY_REG_1T2RArrayLengthPci
38
39#define Rtl819XMACPHY_Array_PG Rtl8190PciMACPHY_Array_PG
40#define Rtl819XMACPHY_Array Rtl8190PciMACPHY_Array
41#define Rtl819XRadioA_Array Rtl8190PciRadioA_Array
42#define Rtl819XRadioB_Array Rtl8190PciRadioB_Array
43#define Rtl819XRadioC_Array Rtl8190PciRadioC_Array
44#define Rtl819XRadioD_Array Rtl8190PciRadioD_Array
45#define Rtl819XAGCTAB_Array Rtl8190PciAGCTAB_Array
46#define Rtl819XPHY_REGArray Rtl8190PciPHY_REGArray
47#define Rtl819XPHY_REG_1T2RArray Rtl8190PciPHY_REG_1T2RArray
48#endif
49
50#ifdef RTL8192E
51#define AGCTAB_ArrayLength AGCTAB_ArrayLengthPciE
52#define MACPHY_ArrayLength MACPHY_ArrayLengthPciE
53#define RadioA_ArrayLength RadioA_ArrayLengthPciE
54#define RadioB_ArrayLength RadioB_ArrayLengthPciE
55#define MACPHY_Array_PGLength MACPHY_Array_PGLengthPciE
56#define RadioC_ArrayLength RadioC_ArrayLengthPciE
57#define RadioD_ArrayLength RadioD_ArrayLengthPciE
58#define PHY_REGArrayLength PHY_REGArrayLengthPciE
59#define PHY_REG_1T2RArrayLength PHY_REG_1T2RArrayLengthPciE
60
61#define Rtl819XMACPHY_Array_PG Rtl8192PciEMACPHY_Array_PG
62#define Rtl819XMACPHY_Array Rtl8192PciEMACPHY_Array
63#define Rtl819XRadioA_Array Rtl8192PciERadioA_Array
64#define Rtl819XRadioB_Array Rtl8192PciERadioB_Array
65#define Rtl819XRadioC_Array Rtl8192PciERadioC_Array
66#define Rtl819XRadioD_Array Rtl8192PciERadioD_Array
67#define Rtl819XAGCTAB_Array Rtl8192PciEAGCTAB_Array
68#define Rtl819XPHY_REGArray Rtl8192PciEPHY_REGArray
69#define Rtl819XPHY_REG_1T2RArray Rtl8192PciEPHY_REG_1T2RArray
70#endif
71
72
73
74typedef enum _SwChnlCmdID{
75 CmdID_End,
76 CmdID_SetTxPowerLevel,
77 CmdID_BBRegWrite10,
78 CmdID_WritePortUlong,
79 CmdID_WritePortUshort,
80 CmdID_WritePortUchar,
81 CmdID_RF_WriteReg,
82}SwChnlCmdID;
83
84/*--------------------------------Define structure--------------------------------*/
85typedef struct _SwChnlCmd{
86 SwChnlCmdID CmdID;
87 u32 Para1;
88 u32 Para2;
89 u32 msDelay;
90}__attribute__ ((packed)) SwChnlCmd;
91
92extern u32 rtl819XMACPHY_Array_PG[];
93extern u32 rtl819XPHY_REG_1T2RArray[];
94extern u32 rtl819XAGCTAB_Array[];
95extern u32 rtl819XRadioA_Array[];
96extern u32 rtl819XRadioB_Array[];
97extern u32 rtl819XRadioC_Array[];
98extern u32 rtl819XRadioD_Array[];
99
100typedef enum _HW90_BLOCK{
101 HW90_BLOCK_MAC = 0,
102 HW90_BLOCK_PHY0 = 1,
103 HW90_BLOCK_PHY1 = 2,
104 HW90_BLOCK_RF = 3,
105 HW90_BLOCK_MAXIMUM = 4,
106}HW90_BLOCK_E, *PHW90_BLOCK_E;
107
108typedef enum _RF90_RADIO_PATH{
109 RF90_PATH_A = 0,
110 RF90_PATH_B = 1,
111 RF90_PATH_C = 2,
112 RF90_PATH_D = 3,
113 RF90_PATH_MAX
114}RF90_RADIO_PATH_E, *PRF90_RADIO_PATH_E;
115
116#define bMaskByte0 0xff
117#define bMaskByte1 0xff00
118#define bMaskByte2 0xff0000
119#define bMaskByte3 0xff000000
120#define bMaskHWord 0xffff0000
121#define bMaskLWord 0x0000ffff
122#define bMaskDWord 0xffffffff
123
124extern u8 rtl8192_phy_CheckIsLegalRFPath(struct net_device* dev, u32 eRFPath);
125extern void rtl8192_setBBreg(struct net_device* dev, u32 dwRegAddr, u32 dwBitMask, u32 dwData);
126extern u32 rtl8192_QueryBBReg(struct net_device* dev, u32 dwRegAddr, u32 dwBitMask);
127extern void rtl8192_phy_SetRFReg(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 RegAddr, u32 BitMask, u32 Data);
128extern u32 rtl8192_phy_QueryRFReg(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 RegAddr, u32 BitMask);
129extern void rtl8192_phy_configmac(struct net_device* dev);
130extern void rtl8192_phyConfigBB(struct net_device* dev, u8 ConfigType);
131extern bool rtl8192_phy_checkBBAndRF(struct net_device* dev, HW90_BLOCK_E CheckBlock, RF90_RADIO_PATH_E eRFPath);
132extern bool rtl8192_BBConfig(struct net_device* dev);
133extern void rtl8192_phy_getTxPower(struct net_device* dev);
134extern void rtl8192_phy_setTxPower(struct net_device* dev, u8 channel);
135extern bool rtl8192_phy_RFConfig(struct net_device* dev);
136extern void rtl8192_phy_updateInitGain(struct net_device* dev);
137extern u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device* dev, RF90_RADIO_PATH_E eRFPath);
138
139extern u8 rtl8192_phy_SwChnl(struct net_device* dev, u8 channel);
140extern void rtl8192_SetBWMode(struct net_device *dev, HT_CHANNEL_WIDTH Bandwidth, HT_EXTCHNL_OFFSET Offset);
141extern void rtl8192_SwChnl_WorkItem(struct net_device *dev);
142extern void rtl8192_SetBWModeWorkItem(struct net_device *dev);
143extern void InitialGain819xPci(struct net_device *dev, u8 Operation);
144
145#if defined RTL8190P
146extern void
147PHY_SetRtl8190pRfOff(struct net_device* dev );
148#endif
149
150#if defined RTL8192E
151extern void
152PHY_SetRtl8192eRfOff(struct net_device* dev );
153#endif
154
155bool
156SetRFPowerState(
157 struct net_device* dev,
158 RT_RF_POWER_STATE eRFPowerState
159 );
160#define PHY_SetRFPowerState SetRFPowerState
161
162extern void PHY_ScanOperationBackup8192(struct net_device* dev,u8 Operation);
163
164#endif
diff --git a/drivers/staging/rtl8192e/r8192E_phyreg.h b/drivers/staging/rtl8192e/r8192E_phyreg.h
new file mode 100644
index 00000000000..7899dd538dc
--- /dev/null
+++ b/drivers/staging/rtl8192e/r8192E_phyreg.h
@@ -0,0 +1,852 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/
19#ifndef _R819XU_PHYREG_H
20#define _R819XU_PHYREG_H
21
22
23#define RF_DATA 0x1d4
24
25#define rPMAC_Reset 0x100
26#define rPMAC_TxStart 0x104
27#define rPMAC_TxLegacySIG 0x108
28#define rPMAC_TxHTSIG1 0x10c
29#define rPMAC_TxHTSIG2 0x110
30#define rPMAC_PHYDebug 0x114
31#define rPMAC_TxPacketNum 0x118
32#define rPMAC_TxIdle 0x11c
33#define rPMAC_TxMACHeader0 0x120
34#define rPMAC_TxMACHeader1 0x124
35#define rPMAC_TxMACHeader2 0x128
36#define rPMAC_TxMACHeader3 0x12c
37#define rPMAC_TxMACHeader4 0x130
38#define rPMAC_TxMACHeader5 0x134
39#define rPMAC_TxDataType 0x138
40#define rPMAC_TxRandomSeed 0x13c
41#define rPMAC_CCKPLCPPreamble 0x140
42#define rPMAC_CCKPLCPHeader 0x144
43#define rPMAC_CCKCRC16 0x148
44#define rPMAC_OFDMRxCRC32OK 0x170
45#define rPMAC_OFDMRxCRC32Er 0x174
46#define rPMAC_OFDMRxParityEr 0x178
47#define rPMAC_OFDMRxCRC8Er 0x17c
48#define rPMAC_CCKCRxRC16Er 0x180
49#define rPMAC_CCKCRxRC32Er 0x184
50#define rPMAC_CCKCRxRC32OK 0x188
51#define rPMAC_TxStatus 0x18c
52
53#define MCS_TXAGC 0x340
54#define CCK_TXAGC 0x348
55
56/*---------------------0x400~0x4ff----------------------*/
57#define MacBlkCtrl 0x403
58
59#define rFPGA0_RFMOD 0x800
60#define rFPGA0_TxInfo 0x804
61#define rFPGA0_PSDFunction 0x808
62#define rFPGA0_TxGainStage 0x80c
63#define rFPGA0_RFTiming1 0x810
64#define rFPGA0_RFTiming2 0x814
65#define rFPGA0_XA_HSSIParameter1 0x820
66#define rFPGA0_XA_HSSIParameter2 0x824
67#define rFPGA0_XB_HSSIParameter1 0x828
68#define rFPGA0_XB_HSSIParameter2 0x82c
69#define rFPGA0_XC_HSSIParameter1 0x830
70#define rFPGA0_XC_HSSIParameter2 0x834
71#define rFPGA0_XD_HSSIParameter1 0x838
72#define rFPGA0_XD_HSSIParameter2 0x83c
73#define rFPGA0_XA_LSSIParameter 0x840
74#define rFPGA0_XB_LSSIParameter 0x844
75#define rFPGA0_XC_LSSIParameter 0x848
76#define rFPGA0_XD_LSSIParameter 0x84c
77#define rFPGA0_RFWakeUpParameter 0x850
78#define rFPGA0_RFSleepUpParameter 0x854
79#define rFPGA0_XAB_SwitchControl 0x858
80#define rFPGA0_XCD_SwitchControl 0x85c
81#define rFPGA0_XA_RFInterfaceOE 0x860
82#define rFPGA0_XB_RFInterfaceOE 0x864
83#define rFPGA0_XC_RFInterfaceOE 0x868
84#define rFPGA0_XD_RFInterfaceOE 0x86c
85#define rFPGA0_XAB_RFInterfaceSW 0x870
86#define rFPGA0_XCD_RFInterfaceSW 0x874
87#define rFPGA0_XAB_RFParameter 0x878
88#define rFPGA0_XCD_RFParameter 0x87c
89#define rFPGA0_AnalogParameter1 0x880
90#define rFPGA0_AnalogParameter2 0x884
91#define rFPGA0_AnalogParameter3 0x888
92#define rFPGA0_AnalogParameter4 0x88c
93#define rFPGA0_XA_LSSIReadBack 0x8a0
94#define rFPGA0_XB_LSSIReadBack 0x8a4
95#define rFPGA0_XC_LSSIReadBack 0x8a8
96#define rFPGA0_XD_LSSIReadBack 0x8ac
97#define rFPGA0_PSDReport 0x8b4
98#define rFPGA0_XAB_RFInterfaceRB 0x8e0
99#define rFPGA0_XCD_RFInterfaceRB 0x8e4
100
101#define rFPGA1_RFMOD 0x900
102#define rFPGA1_TxBlock 0x904
103#define rFPGA1_DebugSelect 0x908
104#define rFPGA1_TxInfo 0x90c
105
106#define rCCK0_System 0xa00
107#define rCCK0_AFESetting 0xa04
108#define rCCK0_CCA 0xa08
109#define rCCK0_RxAGC1 0xa0c
110#define rCCK0_RxAGC2 0xa10
111#define rCCK0_RxHP 0xa14
112#define rCCK0_DSPParameter1 0xa18
113#define rCCK0_DSPParameter2 0xa1c
114#define rCCK0_TxFilter1 0xa20
115#define rCCK0_TxFilter2 0xa24
116#define rCCK0_DebugPort 0xa28
117#define rCCK0_FalseAlarmReport 0xa2c
118#define rCCK0_TRSSIReport 0xa50
119#define rCCK0_RxReport 0xa54
120#define rCCK0_FACounterLower 0xa5c
121#define rCCK0_FACounterUpper 0xa58
122
123#define rOFDM0_LSTF 0xc00
124#define rOFDM0_TRxPathEnable 0xc04
125#define rOFDM0_TRMuxPar 0xc08
126#define rOFDM0_TRSWIsolation 0xc0c
127#define rOFDM0_XARxAFE 0xc10
128#define rOFDM0_XARxIQImbalance 0xc14
129#define rOFDM0_XBRxAFE 0xc18
130#define rOFDM0_XBRxIQImbalance 0xc1c
131#define rOFDM0_XCRxAFE 0xc20
132#define rOFDM0_XCRxIQImbalance 0xc24
133#define rOFDM0_XDRxAFE 0xc28
134#define rOFDM0_XDRxIQImbalance 0xc2c
135#define rOFDM0_RxDetector1 0xc30
136#define rOFDM0_RxDetector2 0xc34
137#define rOFDM0_RxDetector3 0xc38
138#define rOFDM0_RxDetector4 0xc3c
139#define rOFDM0_RxDSP 0xc40
140#define rOFDM0_CFOandDAGC 0xc44
141#define rOFDM0_CCADropThreshold 0xc48
142#define rOFDM0_ECCAThreshold 0xc4c
143#define rOFDM0_XAAGCCore1 0xc50
144#define rOFDM0_XAAGCCore2 0xc54
145#define rOFDM0_XBAGCCore1 0xc58
146#define rOFDM0_XBAGCCore2 0xc5c
147#define rOFDM0_XCAGCCore1 0xc60
148#define rOFDM0_XCAGCCore2 0xc64
149#define rOFDM0_XDAGCCore1 0xc68
150#define rOFDM0_XDAGCCore2 0xc6c
151#define rOFDM0_AGCParameter1 0xc70
152#define rOFDM0_AGCParameter2 0xc74
153#define rOFDM0_AGCRSSITable 0xc78
154#define rOFDM0_HTSTFAGC 0xc7c
155#define rOFDM0_XATxIQImbalance 0xc80
156#define rOFDM0_XATxAFE 0xc84
157#define rOFDM0_XBTxIQImbalance 0xc88
158#define rOFDM0_XBTxAFE 0xc8c
159#define rOFDM0_XCTxIQImbalance 0xc90
160#define rOFDM0_XCTxAFE 0xc94
161#define rOFDM0_XDTxIQImbalance 0xc98
162#define rOFDM0_XDTxAFE 0xc9c
163#define rOFDM0_RxHPParameter 0xce0
164#define rOFDM0_TxPseudoNoiseWgt 0xce4
165#define rOFDM0_FrameSync 0xcf0
166#define rOFDM0_DFSReport 0xcf4
167#define rOFDM0_TxCoeff1 0xca4
168#define rOFDM0_TxCoeff2 0xca8
169#define rOFDM0_TxCoeff3 0xcac
170#define rOFDM0_TxCoeff4 0xcb0
171#define rOFDM0_TxCoeff5 0xcb4
172#define rOFDM0_TxCoeff6 0xcb8
173
174
175#define rOFDM1_LSTF 0xd00
176#define rOFDM1_TRxPathEnable 0xd04
177#define rOFDM1_CFO 0xd08
178#define rOFDM1_CSI1 0xd10
179#define rOFDM1_SBD 0xd14
180#define rOFDM1_CSI2 0xd18
181#define rOFDM1_CFOTracking 0xd2c
182#define rOFDM1_TRxMesaure1 0xd34
183#define rOFDM1_IntfDet 0xd3c
184#define rOFDM1_PseudoNoiseStateAB 0xd50
185#define rOFDM1_PseudoNoiseStateCD 0xd54
186#define rOFDM1_RxPseudoNoiseWgt 0xd58
187#define rOFDM_PHYCounter1 0xda0
188#define rOFDM_PHYCounter2 0xda4
189#define rOFDM_PHYCounter3 0xda8
190#define rOFDM_ShortCFOAB 0xdac
191#define rOFDM_ShortCFOCD 0xdb0
192#define rOFDM_LongCFOAB 0xdb4
193#define rOFDM_LongCFOCD 0xdb8
194#define rOFDM_TailCFOAB 0xdbc
195#define rOFDM_TailCFOCD 0xdc0
196#define rOFDM_PWMeasure1 0xdc4
197#define rOFDM_PWMeasure2 0xdc8
198#define rOFDM_BWReport 0xdcc
199#define rOFDM_AGCReport 0xdd0
200#define rOFDM_RxSNR 0xdd4
201#define rOFDM_RxEVMCSI 0xdd8
202#define rOFDM_SIGReport 0xddc
203
204#define rTxAGC_Rate18_06 0xe00
205#define rTxAGC_Rate54_24 0xe04
206#define rTxAGC_CCK_Mcs32 0xe08
207#define rTxAGC_Mcs03_Mcs00 0xe10
208#define rTxAGC_Mcs07_Mcs04 0xe14
209#define rTxAGC_Mcs11_Mcs08 0xe18
210#define rTxAGC_Mcs15_Mcs12 0xe1c
211
212
213#define rZebra1_HSSIEnable 0x0
214#define rZebra1_TRxEnable1 0x1
215#define rZebra1_TRxEnable2 0x2
216#define rZebra1_AGC 0x4
217#define rZebra1_ChargePump 0x5
218#define rZebra1_Channel 0x7
219#define rZebra1_TxGain 0x8
220#define rZebra1_TxLPF 0x9
221#define rZebra1_RxLPF 0xb
222#define rZebra1_RxHPFCorner 0xc
223
224#define rGlobalCtrl 0
225#define rRTL8256_TxLPF 19
226#define rRTL8256_RxLPF 11
227
228#define rRTL8258_TxLPF 0x11
229#define rRTL8258_RxLPF 0x13
230#define rRTL8258_RSSILPF 0xa
231
232#define bBBResetB 0x100
233#define bGlobalResetB 0x200
234#define bOFDMTxStart 0x4
235#define bCCKTxStart 0x8
236#define bCRC32Debug 0x100
237#define bPMACLoopback 0x10
238#define bTxLSIG 0xffffff
239#define bOFDMTxRate 0xf
240#define bOFDMTxReserved 0x10
241#define bOFDMTxLength 0x1ffe0
242#define bOFDMTxParity 0x20000
243#define bTxHTSIG1 0xffffff
244#define bTxHTMCSRate 0x7f
245#define bTxHTBW 0x80
246#define bTxHTLength 0xffff00
247#define bTxHTSIG2 0xffffff
248#define bTxHTSmoothing 0x1
249#define bTxHTSounding 0x2
250#define bTxHTReserved 0x4
251#define bTxHTAggreation 0x8
252#define bTxHTSTBC 0x30
253#define bTxHTAdvanceCoding 0x40
254#define bTxHTShortGI 0x80
255#define bTxHTNumberHT_LTF 0x300
256#define bTxHTCRC8 0x3fc00
257#define bCounterReset 0x10000
258#define bNumOfOFDMTx 0xffff
259#define bNumOfCCKTx 0xffff0000
260#define bTxIdleInterval 0xffff
261#define bOFDMService 0xffff0000
262#define bTxMACHeader 0xffffffff
263#define bTxDataInit 0xff
264#define bTxHTMode 0x100
265#define bTxDataType 0x30000
266#define bTxRandomSeed 0xffffffff
267#define bCCKTxPreamble 0x1
268#define bCCKTxSFD 0xffff0000
269#define bCCKTxSIG 0xff
270#define bCCKTxService 0xff00
271#define bCCKLengthExt 0x8000
272#define bCCKTxLength 0xffff0000
273#define bCCKTxCRC16 0xffff
274#define bCCKTxStatus 0x1
275#define bOFDMTxStatus 0x2
276
277#define bRFMOD 0x1
278#define bJapanMode 0x2
279#define bCCKTxSC 0x30
280#define bCCKEn 0x1000000
281#define bOFDMEn 0x2000000
282#define bOFDMRxADCPhase 0x10000
283#define bOFDMTxDACPhase 0x40000
284#define bXATxAGC 0x3f
285#define bXBTxAGC 0xf00
286#define bXCTxAGC 0xf000
287#define bXDTxAGC 0xf0000
288#define bPAStart 0xf0000000
289#define bTRStart 0x00f00000
290#define bRFStart 0x0000f000
291#define bBBStart 0x000000f0
292#define bBBCCKStart 0x0000000f
293#define bPAEnd 0xf
294#define bTREnd 0x0f000000
295#define bRFEnd 0x000f0000
296#define bCCAMask 0x000000f0
297#define bR2RCCAMask 0x00000f00
298#define bHSSI_R2TDelay 0xf8000000
299#define bHSSI_T2RDelay 0xf80000
300#define bContTxHSSI 0x400
301#define bIGFromCCK 0x200
302#define bAGCAddress 0x3f
303#define bRxHPTx 0x7000
304#define bRxHPT2R 0x38000
305#define bRxHPCCKIni 0xc0000
306#define bAGCTxCode 0xc00000
307#define bAGCRxCode 0x300000
308#define b3WireDataLength 0x800
309#define b3WireAddressLength 0x400
310#define b3WireRFPowerDown 0x1
311#define b5GPAPEPolarity 0x40000000
312#define b2GPAPEPolarity 0x80000000
313#define bRFSW_TxDefaultAnt 0x3
314#define bRFSW_TxOptionAnt 0x30
315#define bRFSW_RxDefaultAnt 0x300
316#define bRFSW_RxOptionAnt 0x3000
317#define bRFSI_3WireData 0x1
318#define bRFSI_3WireClock 0x2
319#define bRFSI_3WireLoad 0x4
320#define bRFSI_3WireRW 0x8
321#define bRFSI_3Wire 0xf
322#define bRFSI_RFENV 0x10
323#define bRFSI_TRSW 0x20
324#define bRFSI_TRSWB 0x40
325#define bRFSI_ANTSW 0x100
326#define bRFSI_ANTSWB 0x200
327#define bRFSI_PAPE 0x400
328#define bRFSI_PAPE5G 0x800
329#define bBandSelect 0x1
330#define bHTSIG2_GI 0x80
331#define bHTSIG2_Smoothing 0x01
332#define bHTSIG2_Sounding 0x02
333#define bHTSIG2_Aggreaton 0x08
334#define bHTSIG2_STBC 0x30
335#define bHTSIG2_AdvCoding 0x40
336#define bHTSIG2_NumOfHTLTF 0x300
337#define bHTSIG2_CRC8 0x3fc
338#define bHTSIG1_MCS 0x7f
339#define bHTSIG1_BandWidth 0x80
340#define bHTSIG1_HTLength 0xffff
341#define bLSIG_Rate 0xf
342#define bLSIG_Reserved 0x10
343#define bLSIG_Length 0x1fffe
344#define bLSIG_Parity 0x20
345#define bCCKRxPhase 0x4
346#define bLSSIReadAddress 0x3f000000
347#define bLSSIReadEdge 0x80000000
348#define bLSSIReadBackData 0xfff
349#define bLSSIReadOKFlag 0x1000
350#define bCCKSampleRate 0x8
351
352#define bRegulator0Standby 0x1
353#define bRegulatorPLLStandby 0x2
354#define bRegulator1Standby 0x4
355#define bPLLPowerUp 0x8
356#define bDPLLPowerUp 0x10
357#define bDA10PowerUp 0x20
358#define bAD7PowerUp 0x200
359#define bDA6PowerUp 0x2000
360#define bXtalPowerUp 0x4000
361#define b40MDClkPowerUP 0x8000
362#define bDA6DebugMode 0x20000
363#define bDA6Swing 0x380000
364#define bADClkPhase 0x4000000
365#define b80MClkDelay 0x18000000
366#define bAFEWatchDogEnable 0x20000000
367#define bXtalCap 0x0f000000
368#define bXtalCap01 0xc0000000
369#define bXtalCap23 0x3
370#define bXtalCap92x 0x0f000000
371#define bIntDifClkEnable 0x400
372#define bExtSigClkEnable 0x800
373#define bBandgapMbiasPowerUp 0x10000
374#define bAD11SHGain 0xc0000
375#define bAD11InputRange 0x700000
376#define bAD11OPCurrent 0x3800000
377#define bIPathLoopback 0x4000000
378#define bQPathLoopback 0x8000000
379#define bAFELoopback 0x10000000
380#define bDA10Swing 0x7e0
381#define bDA10Reverse 0x800
382#define bDAClkSource 0x1000
383#define bAD7InputRange 0x6000
384#define bAD7Gain 0x38000
385#define bAD7OutputCMMode 0x40000
386#define bAD7InputCMMode 0x380000
387#define bAD7Current 0xc00000
388#define bRegulatorAdjust 0x7000000
389#define bAD11PowerUpAtTx 0x1
390#define bDA10PSAtTx 0x10
391#define bAD11PowerUpAtRx 0x100
392#define bDA10PSAtRx 0x1000
393
394#define bCCKRxAGCFormat 0x200
395
396#define bPSDFFTSamplepPoint 0xc000
397#define bPSDAverageNum 0x3000
398#define bIQPathControl 0xc00
399#define bPSDFreq 0x3ff
400#define bPSDAntennaPath 0x30
401#define bPSDIQSwitch 0x40
402#define bPSDRxTrigger 0x400000
403#define bPSDTxTrigger 0x80000000
404#define bPSDSineToneScale 0x7f000000
405#define bPSDReport 0xffff
406
407#define bOFDMTxSC 0x30000000
408#define bCCKTxOn 0x1
409#define bOFDMTxOn 0x2
410#define bDebugPage 0xfff
411#define bDebugItem 0xff
412#define bAntL 0x10
413#define bAntNonHT 0x100
414#define bAntHT1 0x1000
415#define bAntHT2 0x10000
416#define bAntHT1S1 0x100000
417#define bAntNonHTS1 0x1000000
418
419#define bCCKBBMode 0x3
420#define bCCKTxPowerSaving 0x80
421#define bCCKRxPowerSaving 0x40
422#define bCCKSideBand 0x10
423#define bCCKScramble 0x8
424#define bCCKAntDiversity 0x8000
425#define bCCKCarrierRecovery 0x4000
426#define bCCKTxRate 0x3000
427#define bCCKDCCancel 0x0800
428#define bCCKISICancel 0x0400
429#define bCCKMatchFilter 0x0200
430#define bCCKEqualizer 0x0100
431#define bCCKPreambleDetect 0x800000
432#define bCCKFastFalseCCA 0x400000
433#define bCCKChEstStart 0x300000
434#define bCCKCCACount 0x080000
435#define bCCKcs_lim 0x070000
436#define bCCKBistMode 0x80000000
437#define bCCKCCAMask 0x40000000
438#define bCCKTxDACPhase 0x4
439#define bCCKRxADCPhase 0x20000000
440#define bCCKr_cp_mode0 0x0100
441#define bCCKTxDCOffset 0xf0
442#define bCCKRxDCOffset 0xf
443#define bCCKCCAMode 0xc000
444#define bCCKFalseCS_lim 0x3f00
445#define bCCKCS_ratio 0xc00000
446#define bCCKCorgBit_sel 0x300000
447#define bCCKPD_lim 0x0f0000
448#define bCCKNewCCA 0x80000000
449#define bCCKRxHPofIG 0x8000
450#define bCCKRxIG 0x7f00
451#define bCCKLNAPolarity 0x800000
452#define bCCKRx1stGain 0x7f0000
453#define bCCKRFExtend 0x20000000
454#define bCCKRxAGCSatLevel 0x1f000000
455#define bCCKRxAGCSatCount 0xe0
456#define bCCKRxRFSettle 0x1f
457#define bCCKFixedRxAGC 0x8000
458#define bCCKAntennaPolarity 0x2000
459#define bCCKTxFilterType 0x0c00
460#define bCCKRxAGCReportType 0x0300
461#define bCCKRxDAGCEn 0x80000000
462#define bCCKRxDAGCPeriod 0x20000000
463#define bCCKRxDAGCSatLevel 0x1f000000
464#define bCCKTimingRecovery 0x800000
465#define bCCKTxC0 0x3f0000
466#define bCCKTxC1 0x3f000000
467#define bCCKTxC2 0x3f
468#define bCCKTxC3 0x3f00
469#define bCCKTxC4 0x3f0000
470#define bCCKTxC5 0x3f000000
471#define bCCKTxC6 0x3f
472#define bCCKTxC7 0x3f00
473#define bCCKDebugPort 0xff0000
474#define bCCKDACDebug 0x0f000000
475#define bCCKFalseAlarmEnable 0x8000
476#define bCCKFalseAlarmRead 0x4000
477#define bCCKTRSSI 0x7f
478#define bCCKRxAGCReport 0xfe
479#define bCCKRxReport_AntSel 0x80000000
480#define bCCKRxReport_MFOff 0x40000000
481#define bCCKRxRxReport_SQLoss 0x20000000
482#define bCCKRxReport_Pktloss 0x10000000
483#define bCCKRxReport_Lockedbit 0x08000000
484#define bCCKRxReport_RateError 0x04000000
485#define bCCKRxReport_RxRate 0x03000000
486#define bCCKRxFACounterLower 0xff
487#define bCCKRxFACounterUpper 0xff000000
488#define bCCKRxHPAGCStart 0xe000
489#define bCCKRxHPAGCFinal 0x1c00
490
491#define bCCKRxFalseAlarmEnable 0x8000
492#define bCCKFACounterFreeze 0x4000
493
494#define bCCKTxPathSel 0x10000000
495#define bCCKDefaultRxPath 0xc000000
496#define bCCKOptionRxPath 0x3000000
497
498#define bNumOfSTF 0x3
499#define bShift_L 0xc0
500#define bGI_TH 0xc
501#define bRxPathA 0x1
502#define bRxPathB 0x2
503#define bRxPathC 0x4
504#define bRxPathD 0x8
505#define bTxPathA 0x1
506#define bTxPathB 0x2
507#define bTxPathC 0x4
508#define bTxPathD 0x8
509#define bTRSSIFreq 0x200
510#define bADCBackoff 0x3000
511#define bDFIRBackoff 0xc000
512#define bTRSSILatchPhase 0x10000
513#define bRxIDCOffset 0xff
514#define bRxQDCOffset 0xff00
515#define bRxDFIRMode 0x1800000
516#define bRxDCNFType 0xe000000
517#define bRXIQImb_A 0x3ff
518#define bRXIQImb_B 0xfc00
519#define bRXIQImb_C 0x3f0000
520#define bRXIQImb_D 0xffc00000
521#define bDC_dc_Notch 0x60000
522#define bRxNBINotch 0x1f000000
523#define bPD_TH 0xf
524#define bPD_TH_Opt2 0xc000
525#define bPWED_TH 0x700
526#define bIfMF_Win_L 0x800
527#define bPD_Option 0x1000
528#define bMF_Win_L 0xe000
529#define bBW_Search_L 0x30000
530#define bwin_enh_L 0xc0000
531#define bBW_TH 0x700000
532#define bED_TH2 0x3800000
533#define bBW_option 0x4000000
534#define bRatio_TH 0x18000000
535#define bWindow_L 0xe0000000
536#define bSBD_Option 0x1
537#define bFrame_TH 0x1c
538#define bFS_Option 0x60
539#define bDC_Slope_check 0x80
540#define bFGuard_Counter_DC_L 0xe00
541#define bFrame_Weight_Short 0x7000
542#define bSub_Tune 0xe00000
543#define bFrame_DC_Length 0xe000000
544#define bSBD_start_offset 0x30000000
545#define bFrame_TH_2 0x7
546#define bFrame_GI2_TH 0x38
547#define bGI2_Sync_en 0x40
548#define bSarch_Short_Early 0x300
549#define bSarch_Short_Late 0xc00
550#define bSarch_GI2_Late 0x70000
551#define bCFOAntSum 0x1
552#define bCFOAcc 0x2
553#define bCFOStartOffset 0xc
554#define bCFOLookBack 0x70
555#define bCFOSumWeight 0x80
556#define bDAGCEnable 0x10000
557#define bTXIQImb_A 0x3ff
558#define bTXIQImb_B 0xfc00
559#define bTXIQImb_C 0x3f0000
560#define bTXIQImb_D 0xffc00000
561#define bTxIDCOffset 0xff
562#define bTxQDCOffset 0xff00
563#define bTxDFIRMode 0x10000
564#define bTxPesudoNoiseOn 0x4000000
565#define bTxPesudoNoise_A 0xff
566#define bTxPesudoNoise_B 0xff00
567#define bTxPesudoNoise_C 0xff0000
568#define bTxPesudoNoise_D 0xff000000
569#define bCCADropOption 0x20000
570#define bCCADropThres 0xfff00000
571#define bEDCCA_H 0xf
572#define bEDCCA_L 0xf0
573#define bLambda_ED 0x300
574#define bRxInitialGain 0x7f
575#define bRxAntDivEn 0x80
576#define bRxAGCAddressForLNA 0x7f00
577#define bRxHighPowerFlow 0x8000
578#define bRxAGCFreezeThres 0xc0000
579#define bRxFreezeStep_AGC1 0x300000
580#define bRxFreezeStep_AGC2 0xc00000
581#define bRxFreezeStep_AGC3 0x3000000
582#define bRxFreezeStep_AGC0 0xc000000
583#define bRxRssi_Cmp_En 0x10000000
584#define bRxQuickAGCEn 0x20000000
585#define bRxAGCFreezeThresMode 0x40000000
586#define bRxOverFlowCheckType 0x80000000
587#define bRxAGCShift 0x7f
588#define bTRSW_Tri_Only 0x80
589#define bPowerThres 0x300
590#define bRxAGCEn 0x1
591#define bRxAGCTogetherEn 0x2
592#define bRxAGCMin 0x4
593#define bRxHP_Ini 0x7
594#define bRxHP_TRLNA 0x70
595#define bRxHP_RSSI 0x700
596#define bRxHP_BBP1 0x7000
597#define bRxHP_BBP2 0x70000
598#define bRxHP_BBP3 0x700000
599#define bRSSI_H 0x7f0000
600#define bRSSI_Gen 0x7f000000
601#define bRxSettle_TRSW 0x7
602#define bRxSettle_LNA 0x38
603#define bRxSettle_RSSI 0x1c0
604#define bRxSettle_BBP 0xe00
605#define bRxSettle_RxHP 0x7000
606#define bRxSettle_AntSW_RSSI 0x38000
607#define bRxSettle_AntSW 0xc0000
608#define bRxProcessTime_DAGC 0x300000
609#define bRxSettle_HSSI 0x400000
610#define bRxProcessTime_BBPPW 0x800000
611#define bRxAntennaPowerShift 0x3000000
612#define bRSSITableSelect 0xc000000
613#define bRxHP_Final 0x7000000
614#define bRxHTSettle_BBP 0x7
615#define bRxHTSettle_HSSI 0x8
616#define bRxHTSettle_RxHP 0x70
617#define bRxHTSettle_BBPPW 0x80
618#define bRxHTSettle_Idle 0x300
619#define bRxHTSettle_Reserved 0x1c00
620#define bRxHTRxHPEn 0x8000
621#define bRxHTAGCFreezeThres 0x30000
622#define bRxHTAGCTogetherEn 0x40000
623#define bRxHTAGCMin 0x80000
624#define bRxHTAGCEn 0x100000
625#define bRxHTDAGCEn 0x200000
626#define bRxHTRxHP_BBP 0x1c00000
627#define bRxHTRxHP_Final 0xe0000000
628#define bRxPWRatioTH 0x3
629#define bRxPWRatioEn 0x4
630#define bRxMFHold 0x3800
631#define bRxPD_Delay_TH1 0x38
632#define bRxPD_Delay_TH2 0x1c0
633#define bRxPD_DC_COUNT_MAX 0x600
634#define bRxPD_Delay_TH 0x8000
635#define bRxProcess_Delay 0xf0000
636#define bRxSearchrange_GI2_Early 0x700000
637#define bRxFrame_Guard_Counter_L 0x3800000
638#define bRxSGI_Guard_L 0xc000000
639#define bRxSGI_Search_L 0x30000000
640#define bRxSGI_TH 0xc0000000
641#define bDFSCnt0 0xff
642#define bDFSCnt1 0xff00
643#define bDFSFlag 0xf0000
644
645#define bMFWeightSum 0x300000
646#define bMinIdxTH 0x7f000000
647
648#define bDAFormat 0x40000
649
650#define bTxChEmuEnable 0x01000000
651
652#define bTRSWIsolation_A 0x7f
653#define bTRSWIsolation_B 0x7f00
654#define bTRSWIsolation_C 0x7f0000
655#define bTRSWIsolation_D 0x7f000000
656
657#define bExtLNAGain 0x7c00
658
659#define bSTBCEn 0x4
660#define bAntennaMapping 0x10
661#define bNss 0x20
662#define bCFOAntSumD 0x200
663#define bPHYCounterReset 0x8000000
664#define bCFOReportGet 0x4000000
665#define bOFDMContinueTx 0x10000000
666#define bOFDMSingleCarrier 0x20000000
667#define bOFDMSingleTone 0x40000000
668#define bHTDetect 0x100
669#define bCFOEn 0x10000
670#define bCFOValue 0xfff00000
671#define bSigTone_Re 0x3f
672#define bSigTone_Im 0x7f00
673#define bCounter_CCA 0xffff
674#define bCounter_ParityFail 0xffff0000
675#define bCounter_RateIllegal 0xffff
676#define bCounter_CRC8Fail 0xffff0000
677#define bCounter_MCSNoSupport 0xffff
678#define bCounter_FastSync 0xffff
679#define bShortCFO 0xfff
680#define bShortCFOTLength 12
681#define bShortCFOFLength 11
682#define bLongCFO 0x7ff
683#define bLongCFOTLength 11
684#define bLongCFOFLength 11
685#define bTailCFO 0x1fff
686#define bTailCFOTLength 13
687#define bTailCFOFLength 12
688
689#define bmax_en_pwdB 0xffff
690#define bCC_power_dB 0xffff0000
691#define bnoise_pwdB 0xffff
692#define bPowerMeasTLength 10
693#define bPowerMeasFLength 3
694#define bRx_HT_BW 0x1
695#define bRxSC 0x6
696#define bRx_HT 0x8
697
698#define bNB_intf_det_on 0x1
699#define bIntf_win_len_cfg 0x30
700#define bNB_Intf_TH_cfg 0x1c0
701
702#define bRFGain 0x3f
703#define bTableSel 0x40
704#define bTRSW 0x80
705
706#define bRxSNR_A 0xff
707#define bRxSNR_B 0xff00
708#define bRxSNR_C 0xff0000
709#define bRxSNR_D 0xff000000
710#define bSNREVMTLength 8
711#define bSNREVMFLength 1
712
713#define bCSI1st 0xff
714#define bCSI2nd 0xff00
715#define bRxEVM1st 0xff0000
716#define bRxEVM2nd 0xff000000
717
718#define bSIGEVM 0xff
719#define bPWDB 0xff00
720#define bSGIEN 0x10000
721
722#define bSFactorQAM1 0xf
723#define bSFactorQAM2 0xf0
724#define bSFactorQAM3 0xf00
725#define bSFactorQAM4 0xf000
726#define bSFactorQAM5 0xf0000
727#define bSFactorQAM6 0xf0000
728#define bSFactorQAM7 0xf00000
729#define bSFactorQAM8 0xf000000
730#define bSFactorQAM9 0xf0000000
731#define bCSIScheme 0x100000
732
733#define bNoiseLvlTopSet 0x3
734#define bChSmooth 0x4
735#define bChSmoothCfg1 0x38
736#define bChSmoothCfg2 0x1c0
737#define bChSmoothCfg3 0xe00
738#define bChSmoothCfg4 0x7000
739#define bMRCMode 0x800000
740#define bTHEVMCfg 0x7000000
741
742#define bLoopFitType 0x1
743#define bUpdCFO 0x40
744#define bUpdCFOOffData 0x80
745#define bAdvUpdCFO 0x100
746#define bAdvTimeCtrl 0x800
747#define bUpdClko 0x1000
748#define bFC 0x6000
749#define bTrackingMode 0x8000
750#define bPhCmpEnable 0x10000
751#define bUpdClkoLTF 0x20000
752#define bComChCFO 0x40000
753#define bCSIEstiMode 0x80000
754#define bAdvUpdEqz 0x100000
755#define bUChCfg 0x7000000
756#define bUpdEqz 0x8000000
757
758#define bTxAGCRate18_06 0x7f7f7f7f
759#define bTxAGCRate54_24 0x7f7f7f7f
760#define bTxAGCRateMCS32 0x7f
761#define bTxAGCRateCCK 0x7f00
762#define bTxAGCRateMCS3_MCS0 0x7f7f7f7f
763#define bTxAGCRateMCS7_MCS4 0x7f7f7f7f
764#define bTxAGCRateMCS11_MCS8 0x7f7f7f7f
765#define bTxAGCRateMCS15_MCS12 0x7f7f7f7f
766
767
768#define bRxPesudoNoiseOn 0x20000000
769#define bRxPesudoNoise_A 0xff
770#define bRxPesudoNoise_B 0xff00
771#define bRxPesudoNoise_C 0xff0000
772#define bRxPesudoNoise_D 0xff000000
773#define bPesudoNoiseState_A 0xffff
774#define bPesudoNoiseState_B 0xffff0000
775#define bPesudoNoiseState_C 0xffff
776#define bPesudoNoiseState_D 0xffff0000
777
778#define bZebra1_HSSIEnable 0x8
779#define bZebra1_TRxControl 0xc00
780#define bZebra1_TRxGainSetting 0x07f
781#define bZebra1_RxCorner 0xc00
782#define bZebra1_TxChargePump 0x38
783#define bZebra1_RxChargePump 0x7
784#define bZebra1_ChannelNum 0xf80
785#define bZebra1_TxLPFBW 0x400
786#define bZebra1_RxLPFBW 0x600
787
788#define bRTL8256RegModeCtrl1 0x100
789#define bRTL8256RegModeCtrl0 0x40
790#define bRTL8256_TxLPFBW 0x18
791#define bRTL8256_RxLPFBW 0x600
792
793#define bRTL8258_TxLPFBW 0xc
794#define bRTL8258_RxLPFBW 0xc00
795#define bRTL8258_RSSILPFBW 0xc0
796
797#define bByte0 0x1
798#define bByte1 0x2
799#define bByte2 0x4
800#define bByte3 0x8
801#define bWord0 0x3
802#define bWord1 0xc
803#define bDWord 0xf
804
805#define bMaskByte0 0xff
806#define bMaskByte1 0xff00
807#define bMaskByte2 0xff0000
808#define bMaskByte3 0xff000000
809#define bMaskHWord 0xffff0000
810#define bMaskLWord 0x0000ffff
811#define bMaskDWord 0xffffffff
812
813#define bMask12Bits 0xfff
814
815#define bEnable 0x1
816#define bDisable 0x0
817
818#define LeftAntenna 0x0
819#define RightAntenna 0x1
820
821#define tCheckTxStatus 500
822#define tUpdateRxCounter 100
823
824#define rateCCK 0
825#define rateOFDM 1
826#define rateHT 2
827
828#define bPMAC_End 0x1ff
829#define bFPGAPHY0_End 0x8ff
830#define bFPGAPHY1_End 0x9ff
831#define bCCKPHY0_End 0xaff
832#define bOFDMPHY0_End 0xcff
833#define bOFDMPHY1_End 0xdff
834
835
836#define bPMACControl 0x0
837#define bWMACControl 0x1
838#define bWNICControl 0x2
839
840#define PathA 0x0
841#define PathB 0x1
842#define PathC 0x2
843#define PathD 0x3
844
845#define rRTL8256RxMixerPole 0xb
846#define bZebraRxMixerPole 0x6
847#define rRTL8256TxBBOPBias 0x9
848#define bRTL8256TxBBOPBias 0x400
849#define rRTL8256TxBBBW 19
850#define bRTL8256TxBBBW 0x18
851
852#endif
diff --git a/drivers/staging/rtl8192e/readme b/drivers/staging/rtl8192e/readme
new file mode 100644
index 00000000000..10a66f56560
--- /dev/null
+++ b/drivers/staging/rtl8192e/readme
@@ -0,0 +1,160 @@
1What this layer should do
2
3- It mantain the old mechanism as alternative, so the
4 ipw2100 driver works with really few changes.
5- Encapsulate / Decapsulate rtllib packet
6- Handle fragmentation
7- Optionally provide an alterantive mechanism for netif queue stop/wake,
8 so that the rtllib layer will pass one fragment per time instead of
9 one txb struct per time. so the driver can stop the queue in the middle
10 of a packet.
11- Provide two different TX interfaces for cards that can handle management
12 frames on one HW queue, and data on another, and for cards that have only
13 one HW queue (the latter untested and very, very rough).
14- Optionally provide the logic for handling IBSS/MASTER/MONITOR/BSS modes
15 and for the channel, essid and wap get/set wireless extension requests.
16 so that the driver has only to change channel when the ieee stack tell it.
17- Optionally provide a scanning mechanism so that the driver has not to
18 worry about this, just implement the set channel calback and pass
19 frames to the upper layer
20- Optionally provide the bss client protocol handshaking (just with open
21 authentication)
22- Optionally provide the probe request send mechanism
23- Optionally provide the bss master mode logic to handle association
24 protocol (only open authentication) and probe responses.
25- SW wep encryption (with open authentication)
26- It collects some stats
27- It provides beacons to the card when it ask for them
28
29What this layer doesn't do (yet)
30- Perform shared authentication
31- Have full support for master mode (the AP should loop back in the air
32 frames from an associated client to another. This could be done easily
33 with few lines of code, and it is done in my previous version of the
34 stach, but a table of association must be keept and a disassociation
35 policy must be decided and implemented.
36- Handle cleanly the full ieee 802.11 protocol. In AP mode it never
37 disassociate clients, and it is really prone to always allow access.
38 In bss client mode it is a bit rough with AP deauth and disassoc requests.
39- It has not any entry point to view the collected stats.
40- Altought it takes care of the card supported rates in the management frame
41 it sends, support for rate changing on TXed packet is not complete.
42- Give up once associated in bss client mode (it never detect a
43 signal loss condition to disassociate and restart scanning)
44- Provide a mechanism for enabling the TX in monitor mode, so
45 userspace programs can TX raw packets.
46- Provide a mechanism for cards that need that the SW take care of beacon
47 TX completely, in sense that the SW has to enqueue by itself beacons
48 to the card so it TX them (if any...)
49APIs
50
51Callback functions in the original stack has been mantained.
52following has been added (from rtllib.h)
53
54 /* Softmac-generated frames (mamagement) are TXed via this
55 * callback if the flag IEEE_SOFTMAC_SINGLE_QUEUE is
56 * not set. As some cards may have different HW queues that
57 * one might want to use for data and management frames
58 * the option to have two callbacks might be useful.
59 * This fucntion can't sleep.
60 */
61 int (*softmac_hard_start_xmit)(struct sk_buff *skb,
62 struct net_device *dev);
63
64 /* used instead of hard_start_xmit (not softmac_hard_start_xmit)
65 * if the IEEE_SOFTMAC_TX_QUEUE feature is used to TX data
66 * frames. I the option IEEE_SOFTMAC_SINGLE_QUEUE is also set
67 * then also management frames are sent via this callback.
68 * This function can't sleep.
69 */
70 void (*softmac_data_hard_start_xmit)(struct sk_buff *skb,
71 struct net_device *dev);
72
73 /* stops the HW queue for DATA frames. Useful to avoid
74 * waste time to TX data frame when we are reassociating
75 * This function can sleep.
76 */
77 void (*data_hard_stop)(struct net_device *dev);
78
79 /* OK this is complementar to data_poll_hard_stop */
80 void (*data_hard_resume)(struct net_device *dev);
81
82 /* ask to the driver to retune the radio .
83 * This function can sleep. the driver should ensure
84 * the radio has been swithced before return.
85 */
86 void (*set_chan)(struct net_device *dev,short ch);
87
88 /* These are not used if the ieee stack takes care of
89 * scanning (IEEE_SOFTMAC_SCAN feature set).
90 * In this case only the set_chan is used.
91 *
92 * The syncro version is similar to the start_scan but
93 * does not return until all channels has been scanned.
94 * this is called in user context and should sleep,
95 * it is called in a work_queue when swithcing to ad-hoc mode
96 * or in behalf of iwlist scan when the card is associated
97 * and root user ask for a scan.
98 * the fucntion stop_scan should stop both the syncro and
99 * background scanning and can sleep.
100 * The fucntion start_scan should initiate the background
101 * scanning and can't sleep.
102 */
103 void (*scan_syncro)(struct net_device *dev);
104 void (*start_scan)(struct net_device *dev);
105 void (*stop_scan)(struct net_device *dev);
106
107 /* indicate the driver that the link state is changed
108 * for example it may indicate the card is associated now.
109 * Driver might be interested in this to apply RX filter
110 * rules or simply light the LINK led
111 */
112 void (*link_change)(struct net_device *dev);
113
114Functions hard_data_[resume/stop] are optional and should not be used
115if the driver decides to uses data+management frames enqueue in a
116single HQ queue (thus using just the softmac_hard_data_start_xmit
117callback).
118
119Function that the driver can use are:
120
121rtllib_get_beacon - this is called by the driver when
122 the HW needs a beacon.
123rtllib_softmac_start_protocol - this should normally be called in the
124 driver open function
125rtllib_softmac_stop_protocol - the opposite of the above
126rtllib_wake_queue - this is similar to netif_wake_queue
127rtllib_reset_queue - this throw away fragments pending(if any)
128rtllib_stop_queue - this is similar to netif_stop_queue
129
130
131known BUGS:
132- When performing syncro scan (possiblily when swithcing to ad-hoc mode
133 and when running iwlist scan when associated) there is still an odd
134 behaviour.. I have not looked in this more accurately (yet).
135
136locking:
137locking is done by means of three structures.
1381- ieee->lock (by means of spin_[un]lock_irq[save/restore]
1392- ieee->wx_sem
1403- ieee->scan_sem
141
142the lock 1 is what protect most of the critical sections in the ieee stack.
143the lock 2 is used to avoid that more than one of the SET wireless extension
144handlers (as well as start/stop protocol function) are running at the same time.
145the lock 1 is used when we need to modify or read the shared data in the wx handlers.
146In other words the lock 2 will prevent one SET action will run across another SET
147action (by make sleep the 2nd one) but allow GET actions, while the lock 1
148make atomic those little shared data access in both GET and SET operation.
149So get operation will be never be delayed really: they will never sleep..
150Furthermore in the top of some SET operations a flag is set before acquiring
151the lock. This is an help to make the previous running SET operation to
152finish faster if needed (just in case the second one will totally undo the
153first, so there is not need to complete the 1st really.. ).
154The background scanning mechaninsm is protected by the lock 1 except for the
155workqueue. this wq is here just to let the set_chan callback sleep (I thinked it
156might be appreciated by USB network card driver developer). In this case the lock 3
157take its turn.
158Thus the stop function needs both the locks.
159Funny in the syncro scan the lock 2 play its role (as both the syncro_scan
160function and the stop scan function are called with this semaphore held).
diff --git a/drivers/staging/rtl8192e/ieee80211/rtl819x_BA.h b/drivers/staging/rtl8192e/rtl819x_BA.h
index 8ddc8bf9dc2..bf8fdea991c 100644
--- a/drivers/staging/rtl8192e/ieee80211/rtl819x_BA.h
+++ b/drivers/staging/rtl8192e/rtl819x_BA.h
@@ -1,7 +1,25 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/
1#ifndef _BATYPE_H_ 19#ifndef _BATYPE_H_
2#define _BATYPE_H_ 20#define _BATYPE_H_
3 21
4#define TOTAL_TXBA_NUM 16 22#define TOTAL_TXBA_NUM 16
5#define TOTAL_RXBA_NUM 16 23#define TOTAL_RXBA_NUM 16
6 24
7#define BA_SETUP_TIMEOUT 200 25#define BA_SETUP_TIMEOUT 200
@@ -18,14 +36,6 @@
18#define DELBA_REASON_END_BA 37 36#define DELBA_REASON_END_BA 37
19#define DELBA_REASON_UNKNOWN_BA 38 37#define DELBA_REASON_UNKNOWN_BA 38
20#define DELBA_REASON_TIMEOUT 39 38#define DELBA_REASON_TIMEOUT 39
21/* whether need define BA Action frames here?
22struct ieee80211_ADDBA_Req{
23 struct ieee80211_header_data header;
24 u8 category;
25 u8
26} __attribute__ ((packed));
27*/
28//Is this need?I put here just to make it easier to define structure BA_RECORD //WB
29typedef union _SEQUENCE_CONTROL{ 39typedef union _SEQUENCE_CONTROL{
30 u16 ShortData; 40 u16 ShortData;
31 struct 41 struct
@@ -65,5 +75,4 @@ typedef struct _BA_RECORD {
65 SEQUENCE_CONTROL BaStartSeqCtrl; 75 SEQUENCE_CONTROL BaStartSeqCtrl;
66} BA_RECORD, *PBA_RECORD; 76} BA_RECORD, *PBA_RECORD;
67 77
68#endif //end _BATYPE_H_ 78#endif
69
diff --git a/drivers/staging/rtl8192e/rtl819x_BAProc.c b/drivers/staging/rtl8192e/rtl819x_BAProc.c
new file mode 100644
index 00000000000..08b90678539
--- /dev/null
+++ b/drivers/staging/rtl8192e/rtl819x_BAProc.c
@@ -0,0 +1,618 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/
19#include "rtllib.h"
20#include "rtl819x_BA.h"
21#include "rtl_core.h"
22#ifdef RTK_DMP_PLATFORM
23#include <linux/usb_setting.h>
24#endif
25
26void ActivateBAEntry(struct rtllib_device* ieee, PBA_RECORD pBA, u16 Time)
27{
28 pBA->bValid = true;
29 if (Time != 0)
30 mod_timer(&pBA->Timer, jiffies + MSECS(Time));
31}
32
33void DeActivateBAEntry( struct rtllib_device* ieee, PBA_RECORD pBA)
34{
35 pBA->bValid = false;
36 del_timer_sync(&pBA->Timer);
37}
38u8 TxTsDeleteBA( struct rtllib_device* ieee, PTX_TS_RECORD pTxTs)
39{
40 PBA_RECORD pAdmittedBa = &pTxTs->TxAdmittedBARecord;
41 PBA_RECORD pPendingBa = &pTxTs->TxPendingBARecord;
42 u8 bSendDELBA = false;
43
44 if (pPendingBa->bValid)
45 {
46 DeActivateBAEntry(ieee, pPendingBa);
47 bSendDELBA = true;
48 }
49
50 if (pAdmittedBa->bValid)
51 {
52 DeActivateBAEntry(ieee, pAdmittedBa);
53 bSendDELBA = true;
54 }
55
56 return bSendDELBA;
57}
58
59u8 RxTsDeleteBA( struct rtllib_device* ieee, PRX_TS_RECORD pRxTs)
60{
61 PBA_RECORD pBa = &pRxTs->RxAdmittedBARecord;
62 u8 bSendDELBA = false;
63
64 if (pBa->bValid)
65 {
66 DeActivateBAEntry(ieee, pBa);
67 bSendDELBA = true;
68 }
69
70 return bSendDELBA;
71}
72
73void ResetBaEntry( PBA_RECORD pBA)
74{
75 pBA->bValid = false;
76 pBA->BaParamSet.shortData = 0;
77 pBA->BaTimeoutValue = 0;
78 pBA->DialogToken = 0;
79 pBA->BaStartSeqCtrl.ShortData = 0;
80}
81static struct sk_buff* rtllib_ADDBA(struct rtllib_device* ieee, u8* Dst, PBA_RECORD pBA, u16 StatusCode, u8 type)
82{
83 struct sk_buff *skb = NULL;
84 struct rtllib_hdr_3addr* BAReq = NULL;
85 u8* tag = NULL;
86 u16 tmp = 0;
87 u16 len = ieee->tx_headroom + 9;
88 RTLLIB_DEBUG(RTLLIB_DL_TRACE | RTLLIB_DL_BA, "========>%s(), frame(%d) sentd to:"MAC_FMT", ieee->dev:%p\n", __func__, type, MAC_ARG(Dst), ieee->dev);
89 if (pBA == NULL||ieee == NULL)
90 {
91 RTLLIB_DEBUG(RTLLIB_DL_ERR, "pBA(%p) is NULL or ieee(%p) is NULL\n", pBA, ieee);
92 return NULL;
93 }
94#ifdef USB_USE_ALIGNMENT
95 u32 Tmpaddr=0;
96 int alignment=0;
97 skb = dev_alloc_skb(len + sizeof( struct rtllib_hdr_3addr) + USB_512B_ALIGNMENT_SIZE);
98#else
99 skb = dev_alloc_skb(len + sizeof( struct rtllib_hdr_3addr));
100#endif
101 if (skb == NULL)
102 {
103 RTLLIB_DEBUG(RTLLIB_DL_ERR, "can't alloc skb for ADDBA_REQ\n");
104 return NULL;
105 }
106
107 memset(skb->data, 0, sizeof( struct rtllib_hdr_3addr));
108
109#ifdef USB_USE_ALIGNMENT
110 Tmpaddr = (u32)skb->data;
111 alignment = Tmpaddr & 0x1ff;
112 skb_reserve(skb,(USB_512B_ALIGNMENT_SIZE - alignment));
113#endif
114
115 skb_reserve(skb, ieee->tx_headroom);
116
117 BAReq = ( struct rtllib_hdr_3addr *) skb_put(skb,sizeof( struct rtllib_hdr_3addr));
118
119 memcpy(BAReq->addr1, Dst, ETH_ALEN);
120 memcpy(BAReq->addr2, ieee->dev->dev_addr, ETH_ALEN);
121
122 memcpy(BAReq->addr3, ieee->current_network.bssid, ETH_ALEN);
123 BAReq->frame_ctl = cpu_to_le16(RTLLIB_STYPE_MANAGE_ACT);
124
125 tag = (u8*)skb_put(skb, 9);
126 *tag ++= ACT_CAT_BA;
127 *tag ++= type;
128 *tag ++= pBA->DialogToken;
129
130 if (ACT_ADDBARSP == type)
131 {
132 RT_TRACE(COMP_DBG, "====>to send ADDBARSP\n");
133 tmp = cpu_to_le16(StatusCode);
134 memcpy(tag, (u8*)&tmp, 2);
135 tag += 2;
136 }
137 tmp = cpu_to_le16(pBA->BaParamSet.shortData);
138 memcpy(tag, (u8*)&tmp, 2);
139 tag += 2;
140 tmp = cpu_to_le16(pBA->BaTimeoutValue);
141 memcpy(tag, (u8*)&tmp, 2);
142 tag += 2;
143
144 if (ACT_ADDBAREQ == type)
145 {
146 memcpy(tag,(u8*)&(pBA->BaStartSeqCtrl), 2);
147 tag += 2;
148 }
149
150 RTLLIB_DEBUG_DATA(RTLLIB_DL_DATA|RTLLIB_DL_BA, skb->data, skb->len);
151 return skb;
152}
153
154static struct sk_buff* rtllib_DELBA(
155 struct rtllib_device* ieee,
156 u8* dst,
157 PBA_RECORD pBA,
158 TR_SELECT TxRxSelect,
159 u16 ReasonCode
160 )
161{
162 DELBA_PARAM_SET DelbaParamSet;
163 struct sk_buff *skb = NULL;
164 struct rtllib_hdr_3addr* Delba = NULL;
165 u8* tag = NULL;
166 u16 tmp = 0;
167 u16 len = 6 + ieee->tx_headroom;
168
169 if (net_ratelimit())
170 RTLLIB_DEBUG(RTLLIB_DL_TRACE | RTLLIB_DL_BA, "========>%s(), ReasonCode(%d) sentd to:"MAC_FMT"\n", __func__, ReasonCode, MAC_ARG(dst));
171
172 memset(&DelbaParamSet, 0, 2);
173
174 DelbaParamSet.field.Initiator = (TxRxSelect==TX_DIR)?1:0;
175 DelbaParamSet.field.TID = pBA->BaParamSet.field.TID;
176
177#ifdef USB_USE_ALIGNMENT
178 u32 Tmpaddr=0;
179 int alignment=0;
180 skb = dev_alloc_skb(len + sizeof( struct rtllib_hdr_3addr) + USB_512B_ALIGNMENT_SIZE);
181#else
182 skb = dev_alloc_skb(len + sizeof( struct rtllib_hdr_3addr));
183#endif
184 if (skb == NULL)
185 {
186 RTLLIB_DEBUG(RTLLIB_DL_ERR, "can't alloc skb for ADDBA_REQ\n");
187 return NULL;
188 }
189
190#ifdef USB_USE_ALIGNMENT
191 Tmpaddr = (u32)skb->data;
192 alignment = Tmpaddr & 0x1ff;
193 skb_reserve(skb,(USB_512B_ALIGNMENT_SIZE - alignment));
194#endif
195 skb_reserve(skb, ieee->tx_headroom);
196
197 Delba = ( struct rtllib_hdr_3addr *) skb_put(skb,sizeof( struct rtllib_hdr_3addr));
198
199 memcpy(Delba->addr1, dst, ETH_ALEN);
200 memcpy(Delba->addr2, ieee->dev->dev_addr, ETH_ALEN);
201 memcpy(Delba->addr3, ieee->current_network.bssid, ETH_ALEN);
202 Delba->frame_ctl = cpu_to_le16(RTLLIB_STYPE_MANAGE_ACT);
203
204 tag = (u8*)skb_put(skb, 6);
205
206 *tag ++= ACT_CAT_BA;
207 *tag ++= ACT_DELBA;
208
209 tmp = cpu_to_le16(DelbaParamSet.shortData);
210 memcpy(tag, (u8*)&tmp, 2);
211 tag += 2;
212 tmp = cpu_to_le16(ReasonCode);
213 memcpy(tag, (u8*)&tmp, 2);
214 tag += 2;
215
216 RTLLIB_DEBUG_DATA(RTLLIB_DL_DATA|RTLLIB_DL_BA, skb->data, skb->len);
217 if (net_ratelimit())
218 RTLLIB_DEBUG(RTLLIB_DL_TRACE | RTLLIB_DL_BA, "<=====%s()\n", __func__);
219 return skb;
220}
221
222void rtllib_send_ADDBAReq(struct rtllib_device* ieee, u8* dst, PBA_RECORD pBA)
223{
224 struct sk_buff *skb = NULL;
225 skb = rtllib_ADDBA(ieee, dst, pBA, 0, ACT_ADDBAREQ);
226
227 if (skb) {
228 RT_TRACE(COMP_DBG, "====>to send ADDBAREQ!!!!!\n");
229 softmac_mgmt_xmit(skb, ieee);
230 } else {
231 RTLLIB_DEBUG(RTLLIB_DL_ERR, "alloc skb error in function %s()\n", __func__);
232 }
233 return;
234}
235
236void rtllib_send_ADDBARsp(struct rtllib_device* ieee, u8* dst, PBA_RECORD pBA, u16 StatusCode)
237{
238 struct sk_buff *skb = NULL;
239 skb = rtllib_ADDBA(ieee, dst, pBA, StatusCode, ACT_ADDBARSP);
240 if (skb)
241 softmac_mgmt_xmit(skb, ieee);
242 else
243 RTLLIB_DEBUG(RTLLIB_DL_ERR, "alloc skb error in function %s()\n", __func__);
244
245 return;
246
247}
248
249void rtllib_send_DELBA(struct rtllib_device* ieee, u8* dst, PBA_RECORD pBA, TR_SELECT TxRxSelect, u16 ReasonCode)
250{
251 struct sk_buff *skb = NULL;
252 skb = rtllib_DELBA(ieee, dst, pBA, TxRxSelect, ReasonCode);
253 if (skb)
254 {
255 softmac_mgmt_xmit(skb, ieee);
256 }
257 else
258 {
259 RTLLIB_DEBUG(RTLLIB_DL_ERR, "alloc skb error in function %s()\n", __func__);
260 }
261 return ;
262}
263
264int rtllib_rx_ADDBAReq( struct rtllib_device* ieee, struct sk_buff *skb)
265{
266 struct rtllib_hdr_3addr* req = NULL;
267 u16 rc = 0;
268 u8 * dst = NULL, *pDialogToken = NULL, *tag = NULL;
269 PBA_RECORD pBA = NULL;
270 PBA_PARAM_SET pBaParamSet = NULL;
271 u16* pBaTimeoutVal = NULL;
272 PSEQUENCE_CONTROL pBaStartSeqCtrl = NULL;
273 PRX_TS_RECORD pTS = NULL;
274
275 if (skb->len < sizeof( struct rtllib_hdr_3addr) + 9)
276 {
277 RTLLIB_DEBUG(RTLLIB_DL_ERR, " Invalid skb len in BAREQ(%d / %d)\n",(int)skb->len, (int)(sizeof( struct rtllib_hdr_3addr) + 9));
278 return -1;
279 }
280
281 RTLLIB_DEBUG_DATA(RTLLIB_DL_DATA|RTLLIB_DL_BA, skb->data, skb->len);
282
283 req = ( struct rtllib_hdr_3addr*) skb->data;
284 tag = (u8*)req;
285 dst = (u8*)(&req->addr2[0]);
286 tag += sizeof( struct rtllib_hdr_3addr);
287 pDialogToken = tag + 2;
288 pBaParamSet = (PBA_PARAM_SET)(tag + 3);
289 pBaTimeoutVal = (u16*)(tag + 5);
290 pBaStartSeqCtrl = (PSEQUENCE_CONTROL)(req + 7);
291
292 RT_TRACE(COMP_DBG, "====>rx ADDBAREQ from :"MAC_FMT"\n", MAC_ARG(dst));
293 if (ieee->current_network.qos_data.active == 0 ||
294 (ieee->pHTInfo->bCurrentHTSupport == false) ||
295 (ieee->pHTInfo->IOTAction & HT_IOT_ACT_REJECT_ADDBA_REQ)) {
296 rc = ADDBA_STATUS_REFUSED;
297 RTLLIB_DEBUG(RTLLIB_DL_ERR, "Failed to reply on ADDBA_REQ as some capability is not ready(%d, %d)\n", ieee->current_network.qos_data.active, ieee->pHTInfo->bCurrentHTSupport);
298 goto OnADDBAReq_Fail;
299 }
300 if (!GetTs(
301 ieee,
302 (PTS_COMMON_INFO*)(&pTS),
303 dst,
304 (u8)(pBaParamSet->field.TID),
305 RX_DIR,
306 true) )
307 {
308 rc = ADDBA_STATUS_REFUSED;
309 RTLLIB_DEBUG(RTLLIB_DL_ERR, "can't get TS in %s()\n", __func__);
310 goto OnADDBAReq_Fail;
311 }
312 pBA = &pTS->RxAdmittedBARecord;
313
314 if (pBaParamSet->field.BAPolicy == BA_POLICY_DELAYED)
315 {
316 rc = ADDBA_STATUS_INVALID_PARAM;
317 RTLLIB_DEBUG(RTLLIB_DL_ERR, "BA Policy is not correct in %s()\n", __func__);
318 goto OnADDBAReq_Fail;
319 }
320
321
322 rtllib_FlushRxTsPendingPkts(ieee, pTS);
323
324 DeActivateBAEntry(ieee, pBA);
325 pBA->DialogToken = *pDialogToken;
326 pBA->BaParamSet = *pBaParamSet;
327 pBA->BaTimeoutValue = *pBaTimeoutVal;
328 pBA->BaStartSeqCtrl = *pBaStartSeqCtrl;
329
330 if (ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev)||
331 (ieee->pHTInfo->IOTAction & HT_IOT_ACT_ALLOW_PEER_AGG_ONE_PKT))
332 pBA->BaParamSet.field.BufferSize = 1;
333 else
334 pBA->BaParamSet.field.BufferSize = 32;
335
336 ActivateBAEntry(ieee, pBA, 0);
337 rtllib_send_ADDBARsp(ieee, dst, pBA, ADDBA_STATUS_SUCCESS);
338
339 return 0;
340
341OnADDBAReq_Fail:
342 {
343 BA_RECORD BA;
344 BA.BaParamSet = *pBaParamSet;
345 BA.BaTimeoutValue = *pBaTimeoutVal;
346 BA.DialogToken = *pDialogToken;
347 BA.BaParamSet.field.BAPolicy = BA_POLICY_IMMEDIATE;
348 rtllib_send_ADDBARsp(ieee, dst, &BA, rc);
349 return 0;
350 }
351
352}
353
354int rtllib_rx_ADDBARsp( struct rtllib_device* ieee, struct sk_buff *skb)
355{
356 struct rtllib_hdr_3addr* rsp = NULL;
357 PBA_RECORD pPendingBA, pAdmittedBA;
358 PTX_TS_RECORD pTS = NULL;
359 u8* dst = NULL, *pDialogToken = NULL, *tag = NULL;
360 u16* pStatusCode = NULL, *pBaTimeoutVal = NULL;
361 PBA_PARAM_SET pBaParamSet = NULL;
362 u16 ReasonCode;
363
364 if (skb->len < sizeof( struct rtllib_hdr_3addr) + 9)
365 {
366 RTLLIB_DEBUG(RTLLIB_DL_ERR, " Invalid skb len in BARSP(%d / %d)\n", (int)skb->len, (int)(sizeof( struct rtllib_hdr_3addr) + 9));
367 return -1;
368 }
369 rsp = ( struct rtllib_hdr_3addr*)skb->data;
370 tag = (u8*)rsp;
371 dst = (u8*)(&rsp->addr2[0]);
372 tag += sizeof( struct rtllib_hdr_3addr);
373 pDialogToken = tag + 2;
374 pStatusCode = (u16*)(tag + 3);
375 pBaParamSet = (PBA_PARAM_SET)(tag + 5);
376 pBaTimeoutVal = (u16*)(tag + 7);
377
378 RT_TRACE(COMP_DBG, "====>rx ADDBARSP from :"MAC_FMT"\n", MAC_ARG(dst));
379 if (
380 ieee->current_network.qos_data.active == 0 ||
381 ieee->pHTInfo->bCurrentHTSupport == false ||
382 ieee->pHTInfo->bCurrentAMPDUEnable == false )
383 {
384 RTLLIB_DEBUG(RTLLIB_DL_ERR, "reject to ADDBA_RSP as some capability is not ready(%d, %d, %d)\n",ieee->current_network.qos_data.active, ieee->pHTInfo->bCurrentHTSupport, ieee->pHTInfo->bCurrentAMPDUEnable);
385 ReasonCode = DELBA_REASON_UNKNOWN_BA;
386 goto OnADDBARsp_Reject;
387 }
388
389
390 if (!GetTs(ieee, (PTS_COMMON_INFO*)(&pTS), dst,
391 (u8)(pBaParamSet->field.TID), TX_DIR, false)) {
392 RTLLIB_DEBUG(RTLLIB_DL_ERR, "can't get TS in %s()\n", __func__);
393 ReasonCode = DELBA_REASON_UNKNOWN_BA;
394 goto OnADDBARsp_Reject;
395 }
396
397 pTS->bAddBaReqInProgress = false;
398 pPendingBA = &pTS->TxPendingBARecord;
399 pAdmittedBA = &pTS->TxAdmittedBARecord;
400
401
402 if ((pAdmittedBA->bValid==true))
403 {
404 RTLLIB_DEBUG(RTLLIB_DL_BA, "OnADDBARsp(): Recv ADDBA Rsp. Drop because already admit it! \n");
405 return -1;
406 }
407 else if ((pPendingBA->bValid == false) ||(*pDialogToken != pPendingBA->DialogToken))
408 {
409 RTLLIB_DEBUG(RTLLIB_DL_ERR, "OnADDBARsp(): Recv ADDBA Rsp. BA invalid, DELBA! \n");
410 ReasonCode = DELBA_REASON_UNKNOWN_BA;
411 goto OnADDBARsp_Reject;
412 }
413 else
414 {
415 RTLLIB_DEBUG(RTLLIB_DL_BA, "OnADDBARsp(): Recv ADDBA Rsp. BA is admitted! Status code:%X\n", *pStatusCode);
416 DeActivateBAEntry(ieee, pPendingBA);
417 }
418
419
420 if (*pStatusCode == ADDBA_STATUS_SUCCESS)
421 {
422 if (pBaParamSet->field.BAPolicy == BA_POLICY_DELAYED)
423 {
424 pTS->bAddBaReqDelayed = true;
425 DeActivateBAEntry(ieee, pAdmittedBA);
426 ReasonCode = DELBA_REASON_END_BA;
427 goto OnADDBARsp_Reject;
428 }
429
430
431 pAdmittedBA->DialogToken = *pDialogToken;
432 pAdmittedBA->BaTimeoutValue = *pBaTimeoutVal;
433 pAdmittedBA->BaStartSeqCtrl = pPendingBA->BaStartSeqCtrl;
434 pAdmittedBA->BaParamSet = *pBaParamSet;
435 DeActivateBAEntry(ieee, pAdmittedBA);
436 ActivateBAEntry(ieee, pAdmittedBA, *pBaTimeoutVal);
437 } else {
438 pTS->bAddBaReqDelayed = true;
439 pTS->bDisable_AddBa = true;
440 ReasonCode = DELBA_REASON_END_BA;
441 goto OnADDBARsp_Reject;
442 }
443
444 return 0;
445
446OnADDBARsp_Reject:
447 {
448 BA_RECORD BA;
449 BA.BaParamSet = *pBaParamSet;
450 rtllib_send_DELBA(ieee, dst, &BA, TX_DIR, ReasonCode);
451 return 0;
452 }
453
454}
455
456int rtllib_rx_DELBA(struct rtllib_device* ieee,struct sk_buff *skb)
457{
458 struct rtllib_hdr_3addr* delba = NULL;
459 PDELBA_PARAM_SET pDelBaParamSet = NULL;
460 u16* pReasonCode = NULL;
461 u8* dst = NULL;
462
463 if (skb->len < sizeof( struct rtllib_hdr_3addr) + 6)
464 {
465 RTLLIB_DEBUG(RTLLIB_DL_ERR, " Invalid skb len in DELBA(%d / %d)\n", (int)skb->len, (int)(sizeof( struct rtllib_hdr_3addr) + 6));
466 return -1;
467 }
468
469 if (
470 ieee->current_network.qos_data.active == 0 ||
471 ieee->pHTInfo->bCurrentHTSupport == false )
472 {
473 RTLLIB_DEBUG(RTLLIB_DL_ERR, "received DELBA while QOS or HT is not supported(%d, %d)\n",ieee->current_network.qos_data.active, ieee->pHTInfo->bCurrentHTSupport);
474 return -1;
475 }
476
477 RTLLIB_DEBUG_DATA(RTLLIB_DL_DATA|RTLLIB_DL_BA, skb->data, skb->len);
478 delba = ( struct rtllib_hdr_3addr*)skb->data;
479 dst = (u8*)(&delba->addr2[0]);
480 delba += sizeof( struct rtllib_hdr_3addr);
481 pDelBaParamSet = (PDELBA_PARAM_SET)(delba+2);
482 pReasonCode = (u16*)(delba+4);
483
484 if (pDelBaParamSet->field.Initiator == 1)
485 {
486 PRX_TS_RECORD pRxTs;
487
488 if ( !GetTs(
489 ieee,
490 (PTS_COMMON_INFO*)&pRxTs,
491 dst,
492 (u8)pDelBaParamSet->field.TID,
493 RX_DIR,
494 false) )
495 {
496 RTLLIB_DEBUG(RTLLIB_DL_ERR, "can't get TS for RXTS in %s().dst:"MAC_FMT" TID:%d\n", __func__, MAC_ARG(dst), (u8)pDelBaParamSet->field.TID);
497 return -1;
498 }
499
500 RxTsDeleteBA(ieee, pRxTs);
501 }
502 else
503 {
504 PTX_TS_RECORD pTxTs;
505
506 if (!GetTs(
507 ieee,
508 (PTS_COMMON_INFO*)&pTxTs,
509 dst,
510 (u8)pDelBaParamSet->field.TID,
511 TX_DIR,
512 false) )
513 {
514 RTLLIB_DEBUG(RTLLIB_DL_ERR, "can't get TS for TXTS in %s()\n", __func__);
515 return -1;
516 }
517
518 pTxTs->bUsingBa = false;
519 pTxTs->bAddBaReqInProgress = false;
520 pTxTs->bAddBaReqDelayed = false;
521 del_timer_sync(&pTxTs->TsAddBaTimer);
522 TxTsDeleteBA(ieee, pTxTs);
523 }
524 return 0;
525}
526
527void
528TsInitAddBA(
529 struct rtllib_device* ieee,
530 PTX_TS_RECORD pTS,
531 u8 Policy,
532 u8 bOverwritePending
533 )
534{
535 PBA_RECORD pBA = &pTS->TxPendingBARecord;
536
537 if (pBA->bValid==true && bOverwritePending==false)
538 return;
539
540 DeActivateBAEntry(ieee, pBA);
541
542 pBA->DialogToken++;
543 pBA->BaParamSet.field.AMSDU_Support = 0;
544 pBA->BaParamSet.field.BAPolicy = Policy;
545 pBA->BaParamSet.field.TID = pTS->TsCommonInfo.TSpec.f.TSInfo.field.ucTSID;
546 pBA->BaParamSet.field.BufferSize = 32;
547 pBA->BaTimeoutValue = 0;
548 pBA->BaStartSeqCtrl.field.SeqNum = (pTS->TxCurSeq + 3) % 4096;
549
550 ActivateBAEntry(ieee, pBA, BA_SETUP_TIMEOUT);
551
552 rtllib_send_ADDBAReq(ieee, pTS->TsCommonInfo.Addr, pBA);
553}
554
555void
556TsInitDelBA( struct rtllib_device* ieee, PTS_COMMON_INFO pTsCommonInfo, TR_SELECT TxRxSelect)
557{
558
559 if (TxRxSelect == TX_DIR)
560 {
561 PTX_TS_RECORD pTxTs = (PTX_TS_RECORD)pTsCommonInfo;
562
563 if (TxTsDeleteBA(ieee, pTxTs))
564 rtllib_send_DELBA(
565 ieee,
566 pTsCommonInfo->Addr,
567 (pTxTs->TxAdmittedBARecord.bValid)?(&pTxTs->TxAdmittedBARecord):(&pTxTs->TxPendingBARecord),
568 TxRxSelect,
569 DELBA_REASON_END_BA);
570 }
571 else if (TxRxSelect == RX_DIR)
572 {
573 PRX_TS_RECORD pRxTs = (PRX_TS_RECORD)pTsCommonInfo;
574 if (RxTsDeleteBA(ieee, pRxTs))
575 rtllib_send_DELBA(
576 ieee,
577 pTsCommonInfo->Addr,
578 &pRxTs->RxAdmittedBARecord,
579 TxRxSelect,
580 DELBA_REASON_END_BA );
581 }
582}
583void BaSetupTimeOut(unsigned long data)
584{
585 PTX_TS_RECORD pTxTs = (PTX_TS_RECORD)data;
586
587 pTxTs->bAddBaReqInProgress = false;
588 pTxTs->bAddBaReqDelayed = true;
589 pTxTs->TxPendingBARecord.bValid = false;
590}
591
592void TxBaInactTimeout(unsigned long data)
593{
594 PTX_TS_RECORD pTxTs = (PTX_TS_RECORD)data;
595 struct rtllib_device *ieee = container_of(pTxTs, struct rtllib_device, TxTsRecord[pTxTs->num]);
596 TxTsDeleteBA(ieee, pTxTs);
597 rtllib_send_DELBA(
598 ieee,
599 pTxTs->TsCommonInfo.Addr,
600 &pTxTs->TxAdmittedBARecord,
601 TX_DIR,
602 DELBA_REASON_TIMEOUT);
603}
604
605void RxBaInactTimeout(unsigned long data)
606{
607 PRX_TS_RECORD pRxTs = (PRX_TS_RECORD)data;
608 struct rtllib_device *ieee = container_of(pRxTs, struct rtllib_device, RxTsRecord[pRxTs->num]);
609
610 RxTsDeleteBA(ieee, pRxTs);
611 rtllib_send_DELBA(
612 ieee,
613 pRxTs->TsCommonInfo.Addr,
614 &pRxTs->RxAdmittedBARecord,
615 RX_DIR,
616 DELBA_REASON_TIMEOUT);
617 return ;
618}
diff --git a/drivers/staging/rtl8192e/ieee80211/rtl819x_HT.h b/drivers/staging/rtl8192e/rtl819x_HT.h
index 56a120cf629..15878ad01d7 100644
--- a/drivers/staging/rtl8192e/ieee80211/rtl819x_HT.h
+++ b/drivers/staging/rtl8192e/rtl819x_HT.h
@@ -1,31 +1,35 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/
1#ifndef _RTL819XU_HTTYPE_H_ 19#ifndef _RTL819XU_HTTYPE_H_
2#define _RTL819XU_HTTYPE_H_ 20#define _RTL819XU_HTTYPE_H_
3 21
4//------------------------------------------------------------
5// The HT Capability element is present in beacons, association request,
6// reassociation request and probe response frames
7//------------------------------------------------------------
8 22
9//
10// Operation mode value
11//
12#define HT_OPMODE_NO_PROTECT 0 23#define HT_OPMODE_NO_PROTECT 0
13#define HT_OPMODE_OPTIONAL 1 24#define HT_OPMODE_OPTIONAL 1
14#define HT_OPMODE_40MHZ_PROTECT 2 25#define HT_OPMODE_40MHZ_PROTECT 2
15#define HT_OPMODE_MIXED 3 26#define HT_OPMODE_MIXED 3
16 27
17//
18// MIMO Power Save Setings
19//
20#define MIMO_PS_STATIC 0 28#define MIMO_PS_STATIC 0
21#define MIMO_PS_DYNAMIC 1 29#define MIMO_PS_DYNAMIC 1
22#define MIMO_PS_NOLIMIT 3 30#define MIMO_PS_NOLIMIT 3
23 31
24 32
25//
26// There should be 128 bits to cover all of the MCS rates. However, since
27// 8190 does not support too much rates, one integer is quite enough.
28//
29 33
30#define sHTCLng 4 34#define sHTCLng 4
31 35
@@ -52,21 +56,13 @@ typedef enum _HT_MCS_RATE{
52 HT_MCS13 = 0x00002000, 56 HT_MCS13 = 0x00002000,
53 HT_MCS14 = 0x00004000, 57 HT_MCS14 = 0x00004000,
54 HT_MCS15 = 0x00008000, 58 HT_MCS15 = 0x00008000,
55 // Do not define MCS32 here although 8190 support MCS32
56}HT_MCS_RATE,*PHT_MCS_RATE; 59}HT_MCS_RATE,*PHT_MCS_RATE;
57 60
58//
59// Represent Channel Width in HT Capabilities
60//
61typedef enum _HT_CHANNEL_WIDTH{ 61typedef enum _HT_CHANNEL_WIDTH{
62 HT_CHANNEL_WIDTH_20 = 0, 62 HT_CHANNEL_WIDTH_20 = 0,
63 HT_CHANNEL_WIDTH_20_40 = 1, 63 HT_CHANNEL_WIDTH_20_40 = 1,
64}HT_CHANNEL_WIDTH, *PHT_CHANNEL_WIDTH; 64}HT_CHANNEL_WIDTH, *PHT_CHANNEL_WIDTH;
65 65
66//
67// Represent Extension Channel Offset in HT Capabilities
68// This is available only in 40Mhz mode.
69//
70typedef enum _HT_EXTCHNL_OFFSET{ 66typedef enum _HT_EXTCHNL_OFFSET{
71 HT_EXTCHNL_OFFSET_NO_EXT = 0, 67 HT_EXTCHNL_OFFSET_NO_EXT = 0,
72 HT_EXTCHNL_OFFSET_UPPER = 1, 68 HT_EXTCHNL_OFFSET_UPPER = 1,
@@ -75,15 +71,14 @@ typedef enum _HT_EXTCHNL_OFFSET{
75}HT_EXTCHNL_OFFSET, *PHT_EXTCHNL_OFFSET; 71}HT_EXTCHNL_OFFSET, *PHT_EXTCHNL_OFFSET;
76 72
77typedef enum _CHNLOP{ 73typedef enum _CHNLOP{
78 CHNLOP_NONE = 0, // No Action now 74 CHNLOP_NONE = 0,
79 CHNLOP_SCAN = 1, // Scan in progress 75 CHNLOP_SCAN = 1,
80 CHNLOP_SWBW = 2, // Bandwidth switching in progress 76 CHNLOP_SWBW = 2,
81 CHNLOP_SWCHNL = 3, // Software Channel switching in progress 77 CHNLOP_SWCHNL = 3,
82} CHNLOP, *PCHNLOP; 78} CHNLOP, *PCHNLOP;
83 79
84// Determine if the Channel Operation is in progress
85#define CHHLOP_IN_PROGRESS(_pHTInfo) \ 80#define CHHLOP_IN_PROGRESS(_pHTInfo) \
86 ((_pHTInfo)->ChnlOp > CHNLOP_NONE) ? TRUE : FALSE 81 ((_pHTInfo)->ChnlOp > CHNLOP_NONE) ? true : false
87 82
88/* 83/*
89typedef union _HT_CAPABILITY{ 84typedef union _HT_CAPABILITY{
@@ -121,7 +116,7 @@ typedef union _HT_CAPABILITY_MACPARA{
121 116
122typedef enum _HT_ACTION{ 117typedef enum _HT_ACTION{
123 ACT_RECOMMAND_WIDTH = 0, 118 ACT_RECOMMAND_WIDTH = 0,
124 ACT_MIMO_PWR_SAVE = 1, 119 ACT_MIMO_PWR_SAVE = 1,
125 ACT_PSMP = 2, 120 ACT_PSMP = 2,
126 ACT_SET_PCO_PHASE = 3, 121 ACT_SET_PCO_PHASE = 3,
127 ACT_MIMO_CHL_MEASURE = 4, 122 ACT_MIMO_CHL_MEASURE = 4,
@@ -133,7 +128,6 @@ typedef enum _HT_ACTION{
133} HT_ACTION, *PHT_ACTION; 128} HT_ACTION, *PHT_ACTION;
134 129
135 130
136/* 2007/06/07 MH Define sub-carrier mode for 40MHZ. */
137typedef enum _HT_Bandwidth_40MHZ_Sub_Carrier{ 131typedef enum _HT_Bandwidth_40MHZ_Sub_Carrier{
138 SC_MODE_DUPLICATE = 0, 132 SC_MODE_DUPLICATE = 0,
139 SC_MODE_LOWER = 1, 133 SC_MODE_LOWER = 1,
@@ -143,7 +137,6 @@ typedef enum _HT_Bandwidth_40MHZ_Sub_Carrier{
143 137
144typedef struct _HT_CAPABILITY_ELE{ 138typedef struct _HT_CAPABILITY_ELE{
145 139
146 //HT capability info
147 u8 AdvCoding:1; 140 u8 AdvCoding:1;
148 u8 ChlWidth:1; 141 u8 ChlWidth:1;
149 u8 MimoPwrSave:2; 142 u8 MimoPwrSave:2;
@@ -159,30 +152,21 @@ typedef struct _HT_CAPABILITY_ELE{
159 u8 Rsvd1:1; 152 u8 Rsvd1:1;
160 u8 LSigTxopProtect:1; 153 u8 LSigTxopProtect:1;
161 154
162 //MAC HT parameters info
163 u8 MaxRxAMPDUFactor:2; 155 u8 MaxRxAMPDUFactor:2;
164 u8 MPDUDensity:3; 156 u8 MPDUDensity:3;
165 u8 Rsvd2:3; 157 u8 Rsvd2:3;
166 158
167 //Supported MCS set
168 u8 MCS[16]; 159 u8 MCS[16];
169 160
170 161
171 //Extended HT Capability Info
172 u16 ExtHTCapInfo; 162 u16 ExtHTCapInfo;
173 163
174 //TXBF Capabilities
175 u8 TxBFCap[4]; 164 u8 TxBFCap[4];
176 165
177 //Antenna Selection Capabilities
178 u8 ASCap; 166 u8 ASCap;
179 167
180} __attribute__ ((packed)) HT_CAPABILITY_ELE, *PHT_CAPABILITY_ELE; 168} __attribute__ ((packed)) HT_CAPABILITY_ELE, *PHT_CAPABILITY_ELE;
181 169
182//------------------------------------------------------------
183// The HT Information element is present in beacons
184// Only AP is required to include this element
185//------------------------------------------------------------
186 170
187typedef struct _HT_INFORMATION_ELE{ 171typedef struct _HT_INFORMATION_ELE{
188 u8 ControlChl; 172 u8 ControlChl;
@@ -211,10 +195,6 @@ typedef struct _HT_INFORMATION_ELE{
211 u8 BasicMSC[16]; 195 u8 BasicMSC[16];
212} __attribute__ ((packed)) HT_INFORMATION_ELE, *PHT_INFORMATION_ELE; 196} __attribute__ ((packed)) HT_INFORMATION_ELE, *PHT_INFORMATION_ELE;
213 197
214//
215// MIMO Power Save control field.
216// This is appear in MIMO Power Save Action Frame
217//
218typedef struct _MIMOPS_CTRL{ 198typedef struct _MIMOPS_CTRL{
219 u8 MimoPsEnable:1; 199 u8 MimoPsEnable:1;
220 u8 MimoPsMode:1; 200 u8 MimoPsMode:1;
@@ -232,62 +212,49 @@ typedef enum _HT_AGGRE_MODE_E{
232 HT_AGG_FORCE_DISABLE = 2, 212 HT_AGG_FORCE_DISABLE = 2,
233}HT_AGGRE_MODE_E, *PHT_AGGRE_MODE_E; 213}HT_AGGRE_MODE_E, *PHT_AGGRE_MODE_E;
234 214
235//------------------------------------------------------------
236// The Data structure is used to keep HT related variables when card is
237// configured as non-AP STA mode. **Note** Current_xxx should be set
238// to default value in HTInitializeHTInfo()
239//------------------------------------------------------------
240 215
241typedef struct _RT_HIGH_THROUGHPUT{ 216typedef struct _RT_HIGH_THROUGHPUT{
242 u8 bEnableHT; 217 u8 bEnableHT;
243 u8 bCurrentHTSupport; 218 u8 bCurrentHTSupport;
244 219
245 u8 bRegBW40MHz; // Tx 40MHz channel capablity 220 u8 bRegBW40MHz;
246 u8 bCurBW40MHz; // Tx 40MHz channel capability 221 u8 bCurBW40MHz;
247 222
248 u8 bRegShortGI40MHz; // Tx Short GI for 40Mhz 223 u8 bRegShortGI40MHz;
249 u8 bCurShortGI40MHz; // Tx Short GI for 40MHz 224 u8 bCurShortGI40MHz;
250 225
251 u8 bRegShortGI20MHz; // Tx Short GI for 20MHz 226 u8 bRegShortGI20MHz;
252 u8 bCurShortGI20MHz; // Tx Short GI for 20MHz 227 u8 bCurShortGI20MHz;
253 228
254 u8 bRegSuppCCK; // Tx CCK rate capability 229 u8 bRegSuppCCK;
255 u8 bCurSuppCCK; // Tx CCK rate capability 230 u8 bCurSuppCCK;
256 231
257 // 802.11n spec version for "peer"
258 HT_SPEC_VER ePeerHTSpecVer; 232 HT_SPEC_VER ePeerHTSpecVer;
259 233
260 234
261 // HT related information for "Self" 235 HT_CAPABILITY_ELE SelfHTCap;
262 HT_CAPABILITY_ELE SelfHTCap; // This is HT cap element sent to peer STA, which also indicate HT Rx capabilities. 236 HT_INFORMATION_ELE SelfHTInfo;
263 HT_INFORMATION_ELE SelfHTInfo; // This is HT info element sent to peer STA, which also indicate HT Rx capabilities.
264 237
265 // HT related information for "Peer"
266 u8 PeerHTCapBuf[32]; 238 u8 PeerHTCapBuf[32];
267 u8 PeerHTInfoBuf[32]; 239 u8 PeerHTInfoBuf[32];
268 240
269 241
270 // A-MSDU related 242 u8 bAMSDU_Support;
271 u8 bAMSDU_Support; // This indicates Tx A-MSDU capability 243 u16 nAMSDU_MaxSize;
272 u16 nAMSDU_MaxSize; // This indicates Tx A-MSDU capability 244 u8 bCurrent_AMSDU_Support;
273 u8 bCurrent_AMSDU_Support; // This indicates Tx A-MSDU capability 245 u16 nCurrent_AMSDU_MaxSize;
274 u16 nCurrent_AMSDU_MaxSize; // This indicates Tx A-MSDU capability
275 246
247 u8 bAMPDUEnable;
248 u8 bCurrentAMPDUEnable;
249 u8 AMPDU_Factor;
250 u8 CurrentAMPDUFactor;
251 u8 MPDU_Density;
252 u8 CurrentMPDUDensity;
276 253
277 // AMPDU related <2006.08.10 Emily>
278 u8 bAMPDUEnable; // This indicate Tx A-MPDU capability
279 u8 bCurrentAMPDUEnable; // This indicate Tx A-MPDU capability
280 u8 AMPDU_Factor; // This indicate Tx A-MPDU capability
281 u8 CurrentAMPDUFactor; // This indicate Tx A-MPDU capability
282 u8 MPDU_Density; // This indicate Tx A-MPDU capability
283 u8 CurrentMPDUDensity; // This indicate Tx A-MPDU capability
284
285 // Forced A-MPDU enable
286 HT_AGGRE_MODE_E ForcedAMPDUMode; 254 HT_AGGRE_MODE_E ForcedAMPDUMode;
287 u8 ForcedAMPDUFactor; 255 u8 ForcedAMPDUFactor;
288 u8 ForcedMPDUDensity; 256 u8 ForcedMPDUDensity;
289 257
290 // Forced A-MSDU enable
291 HT_AGGRE_MODE_E ForcedAMSDUMode; 258 HT_AGGRE_MODE_E ForcedAMSDUMode;
292 u16 ForcedAMSDUMaxSize; 259 u16 ForcedAMSDUMaxSize;
293 260
@@ -295,28 +262,23 @@ typedef struct _RT_HIGH_THROUGHPUT{
295 262
296 u8 CurrentOpMode; 263 u8 CurrentOpMode;
297 264
298 // MIMO PS related
299 u8 SelfMimoPs; 265 u8 SelfMimoPs;
300 u8 PeerMimoPs; 266 u8 PeerMimoPs;
301 267
302 // 40MHz Channel Offset settings.
303 HT_EXTCHNL_OFFSET CurSTAExtChnlOffset; 268 HT_EXTCHNL_OFFSET CurSTAExtChnlOffset;
304 u8 bCurTxBW40MHz; // If we use 40 MHz to Tx 269 u8 bCurTxBW40MHz;
305 u8 PeerBandwidth; 270 u8 PeerBandwidth;
306 271
307 // For Bandwidth Switching
308 u8 bSwBwInProgress; 272 u8 bSwBwInProgress;
309 CHNLOP ChnlOp; // software switching channel in progress. By Bruce, 2008-02-15. 273 CHNLOP ChnlOp;
310 u8 SwBwStep; 274 u8 SwBwStep;
311 //struct timer_list SwBwTimer; //moved to ieee80211_device. as timer_list need include some header file here.
312 275
313 // For Realtek proprietary A-MPDU factor for aggregation
314 u8 bRegRT2RTAggregation; 276 u8 bRegRT2RTAggregation;
277 u8 RT2RT_HT_Mode;
315 u8 bCurrentRT2RTAggregation; 278 u8 bCurrentRT2RTAggregation;
316 u8 bCurrentRT2RTLongSlotTime; 279 u8 bCurrentRT2RTLongSlotTime;
317 u8 szRT2RTAggBuffer[10]; 280 u8 szRT2RTAggBuffer[10];
318 281
319 // Rx Reorder control
320 u8 bRegRxReorderEnable; 282 u8 bRegRxReorderEnable;
321 u8 bCurRxReorderEnable; 283 u8 bCurRxReorderEnable;
322 u8 RxReorderWinSize; 284 u8 RxReorderWinSize;
@@ -331,21 +293,26 @@ typedef struct _RT_HIGH_THROUGHPUT{
331 u8 UsbRxFwAggrPageNum; 293 u8 UsbRxFwAggrPageNum;
332 u8 UsbRxFwAggrPacketNum; 294 u8 UsbRxFwAggrPacketNum;
333 u8 UsbRxFwAggrTimeout; 295 u8 UsbRxFwAggrTimeout;
296 u8 UsbRxPageSize;
334#endif 297#endif
335 298
336 // Add for Broadcom(Linksys) IOT. Joseph
337 u8 bIsPeerBcm; 299 u8 bIsPeerBcm;
338 300
339 // For IOT issue.
340 u8 IOTPeer; 301 u8 IOTPeer;
341 u32 IOTAction; 302 u32 IOTAction;
303 u8 IOTRaFunc;
304
305 u8 bWAIotBroadcom;
306 u8 WAIotTH;
307
308#ifdef RTL8192CE
309 u8 bRDGEnable;
310#endif
311
312 u8 bAcceptAddbaReq;
342} __attribute__ ((packed)) RT_HIGH_THROUGHPUT, *PRT_HIGH_THROUGHPUT; 313} __attribute__ ((packed)) RT_HIGH_THROUGHPUT, *PRT_HIGH_THROUGHPUT;
343 314
344 315
345//------------------------------------------------------------
346// The Data structure is used to keep HT related variable for "each Sta"
347// when card is configured as "AP mode"
348//------------------------------------------------------------
349 316
350typedef struct _RT_HTINFO_STA_ENTRY{ 317typedef struct _RT_HTINFO_STA_ENTRY{
351 u8 bEnableHT; 318 u8 bEnableHT;
@@ -361,10 +328,19 @@ typedef struct _RT_HTINFO_STA_ENTRY{
361 328
362 u8 bBw40MHz; 329 u8 bBw40MHz;
363 330
331 u8 bCurTxBW40MHz;
332
333 u8 bCurShortGI20MHz;
334
335 u8 bCurShortGI40MHz;
336
364 u8 MimoPs; 337 u8 MimoPs;
365 338
366 u8 McsRateSet[16]; 339 u8 McsRateSet[16];
367 340
341 u8 bCurRxReorderEnable;
342
343 u16 nAMSDU_MaxSize;
368 344
369}RT_HTINFO_STA_ENTRY, *PRT_HTINFO_STA_ENTRY; 345}RT_HTINFO_STA_ENTRY, *PRT_HTINFO_STA_ENTRY;
370 346
@@ -372,35 +348,31 @@ typedef struct _RT_HTINFO_STA_ENTRY{
372 348
373 349
374 350
375//------------------------------------------------------------
376// The Data structure is used to keep HT related variable for "each AP"
377// when card is configured as "STA mode"
378//------------------------------------------------------------
379 351
380typedef struct _BSS_HT{ 352typedef struct _BSS_HT{
381 353
382 u8 bdSupportHT; 354 u8 bdSupportHT;
383 355
384 // HT related elements
385 u8 bdHTCapBuf[32]; 356 u8 bdHTCapBuf[32];
386 u16 bdHTCapLen; 357 u16 bdHTCapLen;
387 u8 bdHTInfoBuf[32]; 358 u8 bdHTInfoBuf[32];
388 u16 bdHTInfoLen; 359 u16 bdHTInfoLen;
389 360
390 HT_SPEC_VER bdHTSpecVer; 361 HT_SPEC_VER bdHTSpecVer;
391 //HT_CAPABILITY_ELE bdHTCapEle; 362 HT_CHANNEL_WIDTH bdBandWidth;
392 //HT_INFORMATION_ELE bdHTInfoEle;
393 363
394 u8 bdRT2RTAggregation; 364 u8 bdRT2RTAggregation;
395 u8 bdRT2RTLongSlotTime; 365 u8 bdRT2RTLongSlotTime;
366 u8 RT2RT_HT_Mode;
367 u8 bdHT1R;
396} __attribute__ ((packed)) BSS_HT, *PBSS_HT; 368} __attribute__ ((packed)) BSS_HT, *PBSS_HT;
397 369
398typedef struct _MIMO_RSSI{ 370typedef struct _MIMO_RSSI{
399 u32 EnableAntenna; 371 u32 EnableAntenna;
400 u32 AntennaA; 372 u32 AntennaA;
401 u32 AntennaB; 373 u32 AntennaB;
402 u32 AntennaC; 374 u32 AntennaC;
403 u32 AntennaD; 375 u32 AntennaD;
404 u32 Average; 376 u32 Average;
405}MIMO_RSSI, *PMIMO_RSSI; 377}MIMO_RSSI, *PMIMO_RSSI;
406 378
@@ -411,8 +383,11 @@ typedef struct _MIMO_EVM{
411 383
412typedef struct _FALSE_ALARM_STATISTICS{ 384typedef struct _FALSE_ALARM_STATISTICS{
413 u32 Cnt_Parity_Fail; 385 u32 Cnt_Parity_Fail;
414 u32 Cnt_Rate_Illegal; 386 u32 Cnt_Rate_Illegal;
415 u32 Cnt_Crc8_fail; 387 u32 Cnt_Crc8_fail;
388 u32 Cnt_Mcs_fail;
389 u32 Cnt_Ofdm_fail;
390 u32 Cnt_Cck_fail;
416 u32 Cnt_all; 391 u32 Cnt_all;
417}FALSE_ALARM_STATISTICS, *PFALSE_ALARM_STATISTICS; 392}FALSE_ALARM_STATISTICS, *PFALSE_ALARM_STATISTICS;
418 393
@@ -420,12 +395,8 @@ typedef struct _FALSE_ALARM_STATISTICS{
420extern u8 MCS_FILTER_ALL[16]; 395extern u8 MCS_FILTER_ALL[16];
421extern u8 MCS_FILTER_1SS[16]; 396extern u8 MCS_FILTER_1SS[16];
422 397
423/* 2007/07/11 MH Modify the macro. Becaus STA may link with a N-AP. If we set
424 STA in A/B/G mode and AP is still in N mode. The macro will be wrong. We have
425 to add a macro to judge wireless mode. */
426#define PICK_RATE(_nLegacyRate, _nMcsRate) \ 398#define PICK_RATE(_nLegacyRate, _nMcsRate) \
427 (_nMcsRate==0)?(_nLegacyRate&0x7f):(_nMcsRate) 399 (_nMcsRate==0)?(_nLegacyRate&0x7f):(_nMcsRate)
428/* 2007/07/12 MH We only define legacy and HT wireless mode now. */
429#define LEGACY_WIRELESS_MODE IEEE_MODE_MASK 400#define LEGACY_WIRELESS_MODE IEEE_MODE_MASK
430 401
431#define CURRENT_RATE(WirelessMode, LegacyRate, HTRate) \ 402#define CURRENT_RATE(WirelessMode, LegacyRate, HTRate) \
@@ -435,12 +406,11 @@ extern u8 MCS_FILTER_1SS[16];
435 406
436 407
437 408
438// MCS Bw 40 {1~7, 12~15,32} 409#define RATE_ADPT_1SS_MASK 0xFF
439#define RATE_ADPT_1SS_MASK 0xFF 410#define RATE_ADPT_2SS_MASK 0xF0
440#define RATE_ADPT_2SS_MASK 0xF0 //Skip MCS8~11 because mcs7 > mcs6, 9, 10, 11. 2007.01.16 by Emily
441#define RATE_ADPT_MCS32_MASK 0x01 411#define RATE_ADPT_MCS32_MASK 0x01
442 412
443#define IS_11N_MCS_RATE(rate) (rate&0x80) 413#define IS_11N_MCS_RATE(rate) (rate&0x80)
444 414
445typedef enum _HT_AGGRE_SIZE{ 415typedef enum _HT_AGGRE_SIZE{
446 HT_AGG_SIZE_8K = 0, 416 HT_AGG_SIZE_8K = 0,
@@ -449,22 +419,27 @@ typedef enum _HT_AGGRE_SIZE{
449 HT_AGG_SIZE_64K = 3, 419 HT_AGG_SIZE_64K = 3,
450}HT_AGGRE_SIZE_E, *PHT_AGGRE_SIZE_E; 420}HT_AGGRE_SIZE_E, *PHT_AGGRE_SIZE_E;
451 421
452/* Indicate different AP vendor for IOT issue */
453typedef enum _HT_IOT_PEER 422typedef enum _HT_IOT_PEER
454{ 423{
455 HT_IOT_PEER_UNKNOWN = 0, 424 HT_IOT_PEER_UNKNOWN = 0,
456 HT_IOT_PEER_REALTEK = 1, 425 HT_IOT_PEER_REALTEK = 1,
457 HT_IOT_PEER_BROADCOM = 2, 426 HT_IOT_PEER_REALTEK_92SE = 2,
458 HT_IOT_PEER_RALINK = 3, 427 HT_IOT_PEER_BROADCOM = 3,
459 HT_IOT_PEER_ATHEROS = 4, 428 HT_IOT_PEER_RALINK = 4,
460 HT_IOT_PEER_CISCO= 5, 429 HT_IOT_PEER_ATHEROS = 5,
461 HT_IOT_PEER_MARVELL=6, 430 HT_IOT_PEER_CISCO= 6,
462 HT_IOT_PEER_MAX = 7 431 HT_IOT_PEER_MARVELL=7,
432 HT_IOT_PEER_92U_SOFTAP = 8,
433 HT_IOT_PEER_SELF_SOFTAP = 9,
434 HT_IOT_PEER_AIRGO = 10,
435 HT_IOT_PEER_MAX = 11,
463}HT_IOT_PEER_E, *PHTIOT_PEER_E; 436}HT_IOT_PEER_E, *PHTIOT_PEER_E;
464 437
465// 438typedef enum _HT_IOT_PEER_SUBTYPE
466// IOT Action for different AP 439{
467// 440 HT_IOT_PEER_ATHEROS_DIR635 = 0,
441}HT_IOT_PEER_SUBTYPE_E, *PHTIOT_PEER_SUBTYPE_E;
442
468typedef enum _HT_IOT_ACTION{ 443typedef enum _HT_IOT_ACTION{
469 HT_IOT_ACT_TX_USE_AMSDU_4K = 0x00000001, 444 HT_IOT_ACT_TX_USE_AMSDU_4K = 0x00000001,
470 HT_IOT_ACT_TX_USE_AMSDU_8K = 0x00000002, 445 HT_IOT_ACT_TX_USE_AMSDU_8K = 0x00000002,
@@ -476,8 +451,43 @@ typedef enum _HT_IOT_ACTION{
476 HT_IOT_ACT_CDD_FSYNC = 0x00000080, 451 HT_IOT_ACT_CDD_FSYNC = 0x00000080,
477 HT_IOT_ACT_PURE_N_MODE = 0x00000100, 452 HT_IOT_ACT_PURE_N_MODE = 0x00000100,
478 HT_IOT_ACT_FORCED_CTS2SELF = 0x00000200, 453 HT_IOT_ACT_FORCED_CTS2SELF = 0x00000200,
479 HT_IOT_ACT_NULL_DATA_POWER_SAVING = 0x00800000, 454 HT_IOT_ACT_FORCED_RTS = 0x00000400,
455 HT_IOT_ACT_AMSDU_ENABLE = 0x00000800,
456 HT_IOT_ACT_REJECT_ADDBA_REQ = 0x00001000,
457 HT_IOT_ACT_ALLOW_PEER_AGG_ONE_PKT = 0x00002000,
458 HT_IOT_ACT_EDCA_BIAS_ON_RX = 0x00004000,
459
460 HT_IOT_ACT_HYBRID_AGGREGATION = 0x00010000,
461 HT_IOT_ACT_DISABLE_SHORT_GI = 0x00020000,
462 HT_IOT_ACT_DISABLE_HIGH_POWER = 0x00040000,
463 HT_IOT_ACT_DISABLE_TX_40_MHZ = 0x00080000,
464 HT_IOT_ACT_TX_NO_AGGREGATION = 0x00100000,
465 HT_IOT_ACT_DISABLE_TX_2SS = 0x00200000,
466
467 HT_IOT_ACT_MID_HIGHPOWER = 0x00400000,
468 HT_IOT_ACT_NULL_DATA_POWER_SAVING = 0x00800000,
469
470 HT_IOT_ACT_DISABLE_CCK_RATE = 0x01000000,
471 HT_IOT_ACT_FORCED_ENABLE_BE_TXOP = 0x02000000,
472 HT_IOT_ACT_WA_IOT_Broadcom = 0x04000000,
473
474 HT_IOT_ACT_DISABLE_RX_40MHZ_SHORT_GI = 0x08000000,
475
480}HT_IOT_ACTION_E, *PHT_IOT_ACTION_E; 476}HT_IOT_ACTION_E, *PHT_IOT_ACTION_E;
481 477
482#endif //_RTL819XU_HTTYPE_H_ 478typedef enum _HT_IOT_RAFUNC{
479 HT_IOT_RAFUNC_DISABLE_ALL = 0x00,
480 HT_IOT_RAFUNC_PEER_1R = 0x01,
481 HT_IOT_RAFUNC_TX_AMSDU = 0x02,
482}HT_IOT_RAFUNC, *PHT_IOT_RAFUNC;
483
484typedef enum _RT_HT_CAP{
485 RT_HT_CAP_USE_TURBO_AGGR = 0x01,
486 RT_HT_CAP_USE_LONG_PREAMBLE = 0x02,
487 RT_HT_CAP_USE_AMPDU = 0x04,
488 RT_HT_CAP_USE_WOW = 0x8,
489 RT_HT_CAP_USE_SOFTAP = 0x10,
490 RT_HT_CAP_USE_92SE = 0x20,
491}RT_HT_CAPBILITY, *PRT_HT_CAPBILITY;
483 492
493#endif
diff --git a/drivers/staging/rtl8192e/rtl819x_HTProc.c b/drivers/staging/rtl8192e/rtl819x_HTProc.c
new file mode 100644
index 00000000000..eaf73676f95
--- /dev/null
+++ b/drivers/staging/rtl8192e/rtl819x_HTProc.c
@@ -0,0 +1,1531 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/
19#include "rtllib.h"
20#include "rtl819x_HT.h"
21u8 MCS_FILTER_ALL[16] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
22
23u8 MCS_FILTER_1SS[16] = {0xff, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
24
25u16 MCS_DATA_RATE[2][2][77] =
26 { { {13, 26, 39, 52, 78, 104, 117, 130, 26, 52, 78 ,104, 156, 208, 234, 260,
27 39, 78, 117, 234, 312, 351, 390, 52, 104, 156, 208, 312, 416, 468, 520,
28 0, 78, 104, 130, 117, 156, 195, 104, 130, 130, 156, 182, 182, 208, 156, 195,
29 195, 234, 273, 273, 312, 130, 156, 181, 156, 181, 208, 234, 208, 234, 260, 260,
30 286, 195, 234, 273, 234, 273, 312, 351, 312, 351, 390, 390, 429},
31 {14, 29, 43, 58, 87, 116, 130, 144, 29, 58, 87, 116, 173, 231, 260, 289,
32 43, 87, 130, 173, 260, 347, 390, 433, 58, 116, 173, 231, 347, 462, 520, 578,
33 0, 87, 116, 144, 130, 173, 217, 116, 144, 144, 173, 202, 202, 231, 173, 217,
34 217, 260, 303, 303, 347, 144, 173, 202, 173, 202, 231, 260, 231, 260, 289, 289,
35 318, 217, 260, 303, 260, 303, 347, 390, 347, 390, 433, 433, 477} },
36 { {27, 54, 81, 108, 162, 216, 243, 270, 54, 108, 162, 216, 324, 432, 486, 540,
37 81, 162, 243, 324, 486, 648, 729, 810, 108, 216, 324, 432, 648, 864, 972, 1080,
38 12, 162, 216, 270, 243, 324, 405, 216, 270, 270, 324, 378, 378, 432, 324, 405,
39 405, 486, 567, 567, 648, 270, 324, 378, 324, 378, 432, 486, 432, 486, 540, 540,
40 594, 405, 486, 567, 486, 567, 648, 729, 648, 729, 810, 810, 891},
41 {30, 60, 90, 120, 180, 240, 270, 300, 60, 120, 180, 240, 360, 480, 540, 600,
42 90, 180, 270, 360, 540, 720, 810, 900, 120, 240, 360, 480, 720, 960, 1080, 1200,
43 13, 180, 240, 300, 270, 360, 450, 240, 300, 300, 360, 420, 420, 480, 360, 450,
44 450, 540, 630, 630, 720, 300, 360, 420, 360, 420, 480, 540, 480, 540, 600, 600,
45 660, 450, 540, 630, 540, 630, 720, 810, 720, 810, 900, 900, 990} }
46 };
47
48static u8 UNKNOWN_BORADCOM[3] = {0x00, 0x14, 0xbf};
49static u8 LINKSYSWRT330_LINKSYSWRT300_BROADCOM[3] = {0x00, 0x1a, 0x70};
50static u8 LINKSYSWRT350_LINKSYSWRT150_BROADCOM[3] = {0x00, 0x1d, 0x7e};
51static u8 BELKINF5D8233V1_RALINK[3] = {0x00, 0x17, 0x3f};
52static u8 BELKINF5D82334V3_RALINK[3] = {0x00, 0x1c, 0xdf};
53static u8 PCI_RALINK[3] = {0x00, 0x90, 0xcc};
54static u8 EDIMAX_RALINK[3] = {0x00, 0x0e, 0x2e};
55static u8 AIRLINK_RALINK[3] = {0x00, 0x18, 0x02};
56static u8 DLINK_ATHEROS_1[3] = {0x00, 0x1c, 0xf0};
57static u8 DLINK_ATHEROS_2[3] = {0x00, 0x21, 0x91};
58static u8 CISCO_BROADCOM[3] = {0x00, 0x17, 0x94};
59#if defined(RTL8192SU)
60static u8 NETGEAR_BROADCOM[3] = {0x00, 0x1f, 0x33};
61#endif
62static u8 LINKSYS_MARVELL_4400N[3] = {0x00, 0x14, 0xa4};
63void HTUpdateDefaultSetting(struct rtllib_device* ieee)
64{
65 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
66
67#ifdef RTL8192CE
68 pHTInfo->bRDGEnable = 0;
69#endif
70
71 pHTInfo->bAcceptAddbaReq = 1;
72
73 pHTInfo->bRegShortGI20MHz= 1;
74 pHTInfo->bRegShortGI40MHz= 1;
75
76 pHTInfo->bRegBW40MHz = 1;
77
78 if (pHTInfo->bRegBW40MHz)
79 pHTInfo->bRegSuppCCK = 1;
80 else
81 pHTInfo->bRegSuppCCK = true;
82
83 pHTInfo->nAMSDU_MaxSize = 7935UL;
84 pHTInfo->bAMSDU_Support = 0;
85
86 pHTInfo->bAMPDUEnable = 1;
87 pHTInfo->AMPDU_Factor = 2;
88 pHTInfo->MPDU_Density = 0;
89
90 pHTInfo->SelfMimoPs = 3;
91 if (pHTInfo->SelfMimoPs == 2)
92 pHTInfo->SelfMimoPs = 3;
93 ieee->bTxDisableRateFallBack = 0;
94 ieee->bTxUseDriverAssingedRate = 0;
95
96 ieee->bTxEnableFwCalcDur = 1;
97
98 pHTInfo->bRegRT2RTAggregation = 1;
99
100 pHTInfo->bRegRxReorderEnable = 1;
101 pHTInfo->RxReorderWinSize = 64;
102 pHTInfo->RxReorderPendingTime = 30;
103
104#ifdef USB_TX_DRIVER_AGGREGATION_ENABLE
105 pHTInfo->UsbTxAggrNum = 4;
106#endif
107#ifdef USB_RX_AGGREGATION_SUPPORT
108#ifdef RTL8192SU
109 pHTInfo->UsbRxFwAggrEn = 1;
110 pHTInfo->UsbRxFwAggrPageNum = 48;
111 pHTInfo->UsbRxFwAggrPacketNum = 8;
112 pHTInfo->UsbRxFwAggrTimeout = 4;
113 pHTInfo->UsbRxPageSize= 128;
114#else
115 pHTInfo->UsbRxFwAggrEn = 1;
116 pHTInfo->UsbRxFwAggrPageNum = 24;
117 pHTInfo->UsbRxFwAggrPacketNum = 8;
118 pHTInfo->UsbRxFwAggrTimeout = 8;
119#endif
120#endif
121
122
123}
124void HTDebugHTCapability(u8* CapIE, u8* TitleString )
125{
126
127 static u8 EWC11NHTCap[] = {0x00, 0x90, 0x4c, 0x33};
128 PHT_CAPABILITY_ELE pCapELE;
129
130 if (!memcmp(CapIE, EWC11NHTCap, sizeof(EWC11NHTCap)))
131 {
132 RTLLIB_DEBUG(RTLLIB_DL_HT, "EWC IE in %s()\n", __func__);
133 pCapELE = (PHT_CAPABILITY_ELE)(&CapIE[4]);
134 }else
135 pCapELE = (PHT_CAPABILITY_ELE)(&CapIE[0]);
136
137 RTLLIB_DEBUG(RTLLIB_DL_HT, "<Log HT Capability>. Called by %s\n", TitleString );
138
139 RTLLIB_DEBUG(RTLLIB_DL_HT, "\tSupported Channel Width = %s\n", (pCapELE->ChlWidth)?"20MHz": "20/40MHz");
140 RTLLIB_DEBUG(RTLLIB_DL_HT, "\tSupport Short GI for 20M = %s\n", (pCapELE->ShortGI20Mhz)?"YES": "NO");
141 RTLLIB_DEBUG(RTLLIB_DL_HT, "\tSupport Short GI for 40M = %s\n", (pCapELE->ShortGI40Mhz)?"YES": "NO");
142 RTLLIB_DEBUG(RTLLIB_DL_HT, "\tSupport TX STBC = %s\n", (pCapELE->TxSTBC)?"YES": "NO");
143 RTLLIB_DEBUG(RTLLIB_DL_HT, "\tMax AMSDU Size = %s\n", (pCapELE->MaxAMSDUSize)?"3839": "7935");
144 RTLLIB_DEBUG(RTLLIB_DL_HT, "\tSupport CCK in 20/40 mode = %s\n", (pCapELE->DssCCk)?"YES": "NO");
145 RTLLIB_DEBUG(RTLLIB_DL_HT, "\tMax AMPDU Factor = %d\n", pCapELE->MaxRxAMPDUFactor);
146 RTLLIB_DEBUG(RTLLIB_DL_HT, "\tMPDU Density = %d\n", pCapELE->MPDUDensity);
147 RTLLIB_DEBUG(RTLLIB_DL_HT, "\tMCS Rate Set = [%x][%x][%x][%x][%x]\n", pCapELE->MCS[0],\
148 pCapELE->MCS[1], pCapELE->MCS[2], pCapELE->MCS[3], pCapELE->MCS[4]);
149 return;
150
151}
152void HTDebugHTInfo(u8* InfoIE, u8* TitleString)
153{
154
155 static u8 EWC11NHTInfo[] = {0x00, 0x90, 0x4c, 0x34};
156 PHT_INFORMATION_ELE pHTInfoEle;
157
158 if (!memcmp(InfoIE, EWC11NHTInfo, sizeof(EWC11NHTInfo)))
159 {
160 RTLLIB_DEBUG(RTLLIB_DL_HT, "EWC IE in %s()\n", __func__);
161 pHTInfoEle = (PHT_INFORMATION_ELE)(&InfoIE[4]);
162 }else
163 pHTInfoEle = (PHT_INFORMATION_ELE)(&InfoIE[0]);
164
165
166 RTLLIB_DEBUG(RTLLIB_DL_HT, "<Log HT Information Element>. Called by %s\n", TitleString);
167
168 RTLLIB_DEBUG(RTLLIB_DL_HT, "\tPrimary channel = %d\n", pHTInfoEle->ControlChl);
169 RTLLIB_DEBUG(RTLLIB_DL_HT, "\tSenondary channel =");
170 switch (pHTInfoEle->ExtChlOffset)
171 {
172 case 0:
173 RTLLIB_DEBUG(RTLLIB_DL_HT, "Not Present\n");
174 break;
175 case 1:
176 RTLLIB_DEBUG(RTLLIB_DL_HT, "Upper channel\n");
177 break;
178 case 2:
179 RTLLIB_DEBUG(RTLLIB_DL_HT, "Reserved. Eooro!!!\n");
180 break;
181 case 3:
182 RTLLIB_DEBUG(RTLLIB_DL_HT, "Lower Channel\n");
183 break;
184 }
185 RTLLIB_DEBUG(RTLLIB_DL_HT, "\tRecommended channel width = %s\n", (pHTInfoEle->RecommemdedTxWidth)?"20Mhz": "40Mhz");
186
187 RTLLIB_DEBUG(RTLLIB_DL_HT, "\tOperation mode for protection = ");
188 switch (pHTInfoEle->OptMode)
189 {
190 case 0:
191 RTLLIB_DEBUG(RTLLIB_DL_HT, "No Protection\n");
192 break;
193 case 1:
194 RTLLIB_DEBUG(RTLLIB_DL_HT, "HT non-member protection mode\n");
195 break;
196 case 2:
197 RTLLIB_DEBUG(RTLLIB_DL_HT, "Suggest to open protection\n");
198 break;
199 case 3:
200 RTLLIB_DEBUG(RTLLIB_DL_HT, "HT mixed mode\n");
201 break;
202 }
203
204 RTLLIB_DEBUG(RTLLIB_DL_HT, "\tBasic MCS Rate Set = [%x][%x][%x][%x][%x]\n", pHTInfoEle->BasicMSC[0],\
205 pHTInfoEle->BasicMSC[1], pHTInfoEle->BasicMSC[2], pHTInfoEle->BasicMSC[3], pHTInfoEle->BasicMSC[4]);
206 return;
207}
208
209bool IsHTHalfNmode40Bandwidth(struct rtllib_device* ieee)
210{
211 bool retValue = false;
212 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
213
214 if (pHTInfo->bCurrentHTSupport == false )
215 retValue = false;
216 else if (pHTInfo->bRegBW40MHz == false)
217 retValue = false;
218 else if (!ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev))
219 retValue = false;
220 else if (((PHT_CAPABILITY_ELE)(pHTInfo->PeerHTCapBuf))->ChlWidth)
221 retValue = true;
222 else
223 retValue = false;
224
225 return retValue;
226}
227
228bool IsHTHalfNmodeSGI(struct rtllib_device* ieee, bool is40MHz)
229{
230 bool retValue = false;
231 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
232
233 if (pHTInfo->bCurrentHTSupport == false )
234 retValue = false;
235 else if (!ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev))
236 retValue = false;
237 else if (is40MHz)
238 {
239 if (((PHT_CAPABILITY_ELE)(pHTInfo->PeerHTCapBuf))->ShortGI40Mhz)
240 retValue = true;
241 else
242 retValue = false;
243 }
244 else
245 {
246 if (((PHT_CAPABILITY_ELE)(pHTInfo->PeerHTCapBuf))->ShortGI20Mhz)
247 retValue = true;
248 else
249 retValue = false;
250 }
251
252 return retValue;
253}
254
255u16 HTHalfMcsToDataRate(struct rtllib_device* ieee, u8 nMcsRate)
256{
257
258 u8 is40MHz;
259 u8 isShortGI;
260
261 is40MHz = (IsHTHalfNmode40Bandwidth(ieee))?1:0;
262 isShortGI = (IsHTHalfNmodeSGI(ieee, is40MHz))? 1:0;
263
264 return MCS_DATA_RATE[is40MHz][isShortGI][(nMcsRate&0x7f)];
265}
266
267
268u16 HTMcsToDataRate( struct rtllib_device* ieee, u8 nMcsRate)
269{
270 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
271
272 u8 is40MHz = (pHTInfo->bCurBW40MHz)?1:0;
273 u8 isShortGI = (pHTInfo->bCurBW40MHz)?
274 ((pHTInfo->bCurShortGI40MHz)?1:0):
275 ((pHTInfo->bCurShortGI20MHz)?1:0);
276 return MCS_DATA_RATE[is40MHz][isShortGI][(nMcsRate&0x7f)];
277}
278
279u16 TxCountToDataRate( struct rtllib_device* ieee, u8 nDataRate)
280{
281 u16 CCKOFDMRate[12] = {0x02 , 0x04 , 0x0b , 0x16 , 0x0c , 0x12 , 0x18 , 0x24 , 0x30 , 0x48 , 0x60 , 0x6c};
282 u8 is40MHz = 0;
283 u8 isShortGI = 0;
284
285 if (nDataRate < 12)
286 {
287 return CCKOFDMRate[nDataRate];
288 }
289 else
290 {
291 if (nDataRate >= 0x10 && nDataRate <= 0x1f)
292 {
293 is40MHz = 0;
294 isShortGI = 0;
295
296 }
297 else if (nDataRate >=0x20 && nDataRate <= 0x2f )
298 {
299 is40MHz = 1;
300 isShortGI = 0;
301
302 }
303 else if (nDataRate >= 0x30 && nDataRate <= 0x3f )
304 {
305 is40MHz = 0;
306 isShortGI = 1;
307
308 }
309 else if (nDataRate >= 0x40 && nDataRate <= 0x4f )
310 {
311 is40MHz = 1;
312 isShortGI = 1;
313
314 }
315 return MCS_DATA_RATE[is40MHz][isShortGI][nDataRate&0xf];
316 }
317}
318
319
320
321bool IsHTHalfNmodeAPs(struct rtllib_device* ieee)
322{
323 bool retValue = false;
324 struct rtllib_network* net = &ieee->current_network;
325
326 if ((memcmp(net->bssid, BELKINF5D8233V1_RALINK, 3)==0) ||
327 (memcmp(net->bssid, BELKINF5D82334V3_RALINK, 3)==0) ||
328 (memcmp(net->bssid, PCI_RALINK, 3)==0) ||
329 (memcmp(net->bssid, EDIMAX_RALINK, 3)==0) ||
330 (memcmp(net->bssid, AIRLINK_RALINK, 3)==0) ||
331 (net->ralink_cap_exist))
332 retValue = true;
333 else if ((memcmp(net->bssid, UNKNOWN_BORADCOM, 3)==0) ||
334 (memcmp(net->bssid, LINKSYSWRT330_LINKSYSWRT300_BROADCOM, 3)==0)||
335 (memcmp(net->bssid, LINKSYSWRT350_LINKSYSWRT150_BROADCOM, 3)==0)||
336 (net->broadcom_cap_exist))
337 retValue = true;
338 else if (net->bssht.bdRT2RTAggregation)
339 retValue = true;
340 else
341 retValue = false;
342
343 return retValue;
344}
345
346void HTIOTPeerDetermine(struct rtllib_device* ieee)
347{
348 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
349 struct rtllib_network* net = &ieee->current_network;
350 if (net->bssht.bdRT2RTAggregation){
351 pHTInfo->IOTPeer = HT_IOT_PEER_REALTEK;
352 if (net->bssht.RT2RT_HT_Mode & RT_HT_CAP_USE_92SE){
353 pHTInfo->IOTPeer = HT_IOT_PEER_REALTEK_92SE;
354 }
355 if (net->bssht.RT2RT_HT_Mode & RT_HT_CAP_USE_SOFTAP){
356 pHTInfo->IOTPeer = HT_IOT_PEER_92U_SOFTAP;
357 }
358 }
359 else if (net->broadcom_cap_exist)
360 pHTInfo->IOTPeer = HT_IOT_PEER_BROADCOM;
361 else if ((memcmp(net->bssid, UNKNOWN_BORADCOM, 3)==0) ||
362 (memcmp(net->bssid, LINKSYSWRT330_LINKSYSWRT300_BROADCOM, 3)==0)||
363 (memcmp(net->bssid, LINKSYSWRT350_LINKSYSWRT150_BROADCOM, 3)==0)/*||
364 (memcmp(net->bssid, NETGEAR834Bv2_BROADCOM, 3)==0) */)
365 pHTInfo->IOTPeer = HT_IOT_PEER_BROADCOM;
366 else if ((memcmp(net->bssid, BELKINF5D8233V1_RALINK, 3)==0) ||
367 (memcmp(net->bssid, BELKINF5D82334V3_RALINK, 3)==0) ||
368 (memcmp(net->bssid, PCI_RALINK, 3)==0) ||
369 (memcmp(net->bssid, EDIMAX_RALINK, 3)==0) ||
370 (memcmp(net->bssid, AIRLINK_RALINK, 3)==0) ||
371 net->ralink_cap_exist)
372 pHTInfo->IOTPeer = HT_IOT_PEER_RALINK;
373 else if ((net->atheros_cap_exist )||
374 (memcmp(net->bssid, DLINK_ATHEROS_1, 3) == 0)||
375 (memcmp(net->bssid, DLINK_ATHEROS_2, 3) == 0))
376 pHTInfo->IOTPeer = HT_IOT_PEER_ATHEROS;
377 else if ((memcmp(net->bssid, CISCO_BROADCOM, 3)==0)||net->cisco_cap_exist)
378 pHTInfo->IOTPeer = HT_IOT_PEER_CISCO;
379 else if ((memcmp(net->bssid, LINKSYS_MARVELL_4400N, 3) == 0) ||
380 net->marvell_cap_exist)
381 pHTInfo->IOTPeer = HT_IOT_PEER_MARVELL;
382 else if (net->airgo_cap_exist)
383 pHTInfo->IOTPeer = HT_IOT_PEER_AIRGO;
384 else
385 pHTInfo->IOTPeer = HT_IOT_PEER_UNKNOWN;
386
387 RTLLIB_DEBUG(RTLLIB_DL_IOT, "Joseph debug!! IOTPEER: %x\n", pHTInfo->IOTPeer);
388}
389
390u8 HTIOTActIsDisableMCS14(struct rtllib_device* ieee, u8* PeerMacAddr)
391{
392 return 0;
393 }
394
395
396bool HTIOTActIsDisableMCS15(struct rtllib_device* ieee)
397{
398 bool retValue = false;
399
400#if defined(RTL8192U)
401 if (ieee->current_network.bssht.bdBandWidth == HT_CHANNEL_WIDTH_20_40)
402 retValue = true;
403 else
404 retValue = false;
405#endif
406
407
408 return retValue;
409}
410
411bool HTIOTActIsDisableMCSTwoSpatialStream(struct rtllib_device* ieee)
412{
413 bool retValue = false;
414#ifdef RTL8192U
415 struct rtllib_network* net = &ieee->current_network;
416
417 if ((ieee->pHTInfo->bCurrentHTSupport == true) && (ieee->pairwise_key_type == KEY_TYPE_CCMP))
418 {
419 if ((memcmp(net->bssid, BELKINF5D8233V1_RALINK, 3)==0) ||
420 (memcmp(net->bssid, PCI_RALINK, 3)==0) ||
421 (memcmp(net->bssid, EDIMAX_RALINK, 3)==0))
422 {
423 retValue = false;
424 }
425 }
426#endif
427#if defined(RTL8192SU) || defined RTL8192CE
428 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
429 if (ieee->rtllib_ap_sec_type &&
430 (ieee->rtllib_ap_sec_type(ieee)&(SEC_ALG_WEP|SEC_ALG_TKIP)))
431 {
432 if ( (pHTInfo->IOTPeer != HT_IOT_PEER_ATHEROS) &&
433 (pHTInfo->IOTPeer != HT_IOT_PEER_UNKNOWN) &&
434 (pHTInfo->IOTPeer != HT_IOT_PEER_MARVELL) &&
435 (pHTInfo->IOTPeer != HT_IOT_PEER_REALTEK_92SE) &&
436 (pHTInfo->IOTPeer != HT_IOT_PEER_RALINK) )
437 retValue = true;
438 }
439#elif defined(RTL8192SE)
440 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
441 if (ieee->rtllib_ap_sec_type &&
442 (ieee->rtllib_ap_sec_type(ieee)&SEC_ALG_TKIP)) {
443 if (pHTInfo->IOTPeer == HT_IOT_PEER_RALINK){
444 retValue = true;
445 }
446 }
447#endif
448 return retValue;
449}
450
451u8 HTIOTActIsDisableEDCATurbo(struct rtllib_device* ieee, u8* PeerMacAddr)
452{
453 return false;
454}
455
456
457bool HTIOTActIsEnableBETxOPLimit(struct rtllib_device* ieee)
458{
459 bool retValue = false;
460
461#if defined RTL8192SU
462 if (ieee->mode == IEEE_G)
463 retValue = true;
464#elif defined RTL8192CE
465 if (ieee->mode == IEEE_G ||
466 (ieee->rtllib_ap_sec_type(ieee)&(SEC_ALG_WEP|SEC_ALG_TKIP)))
467 retValue = true;
468#endif
469
470 return retValue;
471}
472
473
474u8 HTIOTActIsMgntUseCCK6M(struct rtllib_device* ieee,struct rtllib_network *network)
475{
476 u8 retValue = 0;
477
478
479#if (defined RTL8192U || defined RTL8192E || defined RTL8190P)
480 {
481 if (ieee->pHTInfo->IOTPeer == HT_IOT_PEER_BROADCOM)
482 {
483 retValue = 1;
484 }
485 }
486#endif
487
488 return retValue;
489}
490
491u8
492HTIOTActWAIOTBroadcom(struct rtllib_device* ieee)
493{
494 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
495 u8 retValue = false;
496 u8 boundary=59;
497
498 pHTInfo->bWAIotBroadcom = false;
499 if (ieee->pHTInfo->IOTPeer == HT_IOT_PEER_BROADCOM)
500 {
501 if (ieee->current_network.bssht.bdBandWidth == HT_CHANNEL_WIDTH_20_40)
502 {
503 if (!(pHTInfo->bRegBW40MHz))
504 {
505 if (ieee->current_network.mode != WIRELESS_MODE_B)
506 {
507 pHTInfo->bWAIotBroadcom = true;
508
509 if (ieee->b_customer_lenovo_id == true)
510 boundary = 30;
511
512 if ( ieee->current_network.RSSI >= boundary)
513 retValue = true;
514 }
515 }else{
516 ;
517 }
518 }
519 }
520 return retValue;
521}
522
523u8 HTIOTActIsForcedCTS2Self(struct rtllib_device *ieee, struct rtllib_network *network)
524{
525 u8 retValue = 0;
526#if (defined RTL8192SE || defined RTL8192SU || defined RTL8192CE)
527 if ((ieee->pHTInfo->IOTPeer == HT_IOT_PEER_MARVELL) ||(ieee->pHTInfo->IOTPeer == HT_IOT_PEER_ATHEROS) )
528#else
529 if (ieee->pHTInfo->IOTPeer == HT_IOT_PEER_MARVELL)
530#endif
531 {
532 retValue = 1;
533 }
534
535 return retValue;
536}
537
538u8 HTIOTActIsForcedRTSCTS(struct rtllib_device *ieee, struct rtllib_network *network)
539{
540 u8 retValue = 0;
541#if defined(RTL8192SE) || defined(RTL8192SU)
542 if (ieee->pHTInfo->bCurrentHTSupport)
543 {
544 if ((ieee->pHTInfo->IOTPeer != HT_IOT_PEER_REALTEK)&&
545 (ieee->pHTInfo->IOTPeer != HT_IOT_PEER_REALTEK_92SE))
546 {
547 if ((ieee->pHTInfo->IOTAction & HT_IOT_ACT_TX_NO_AGGREGATION) == 0)
548 retValue = 1;
549 }
550 }
551#endif
552 return retValue;
553}
554
555u8
556HTIOTActIsForcedAMSDU8K(struct rtllib_device *ieee, struct rtllib_network *network)
557{
558 u8 retValue = 0;
559
560 return retValue;
561}
562
563u8 HTIOTActIsCCDFsync(struct rtllib_device *ieee)
564{
565 u8 retValue = 0;
566#if (defined RTL8190P || defined RTL8192U || defined RTL8192SU)
567 if (ieee->pHTInfo->IOTPeer == HT_IOT_PEER_BROADCOM)
568 {
569 retValue = 1;
570 }
571#endif
572 return retValue;
573}
574
575u8
576HTIOCActRejcectADDBARequest(struct rtllib_network *network)
577{
578 u8 retValue = 0;
579#if (defined RTL8192SE || defined RTL8192SU || defined RTL8192CE)
580 {
581
582
583 }
584#endif
585
586 return retValue;
587
588}
589
590u8
591 HTIOTActIsEDCABiasRx(struct rtllib_device* ieee,struct rtllib_network *network)
592{
593 u8 retValue = 0;
594#ifdef RTL8192SU
595 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
596 {
597 if (pHTInfo->IOTPeer==HT_IOT_PEER_ATHEROS ||
598 pHTInfo->IOTPeer==HT_IOT_PEER_BROADCOM ||
599 pHTInfo->IOTPeer==HT_IOT_PEER_RALINK)
600 return 1;
601
602 }
603#elif defined RTL8192CE
604 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
605 {
606 if (pHTInfo->IOTPeer==HT_IOT_PEER_ATHEROS ||
607 pHTInfo->IOTPeer==HT_IOT_PEER_RALINK)
608 return 1;
609
610 }
611#elif defined RTL8192SE
612 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
613 {
614 if (ieee->rtllib_ap_sec_type != NULL)
615 if (ieee->rtllib_ap_sec_type(ieee) == SEC_ALG_CCMP)
616 if (pHTInfo->IOTPeer==HT_IOT_PEER_RALINK){
617 return 1;
618 }
619
620 }
621#endif
622 return retValue;
623}
624
625u8
626HTIOTActDisableShortGI(struct rtllib_device* ieee,struct rtllib_network *network)
627{
628 u8 retValue = 0;
629 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
630
631 if (pHTInfo->IOTPeer==HT_IOT_PEER_RALINK)
632 {
633 retValue = 1;
634 }
635
636 return retValue;
637}
638
639u8
640HTIOTActDisableHighPower(struct rtllib_device* ieee,struct rtllib_network *network)
641{
642 u8 retValue = 0;
643#if (defined RTL8192SE || defined RTL8192SU || defined RTL8192CE)
644 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
645#endif
646
647#ifdef RTL8192SU
648 if (pHTInfo->IOTPeer==HT_IOT_PEER_RALINK ||
649 pHTInfo->IOTPeer==HT_IOT_PEER_REALTEK ||
650 pHTInfo->IOTPeer==HT_IOT_PEER_REALTEK_92SE)
651 {
652 retValue = 1;
653 }
654#elif defined RTL8192SE || defined RTL8192CE
655 if (pHTInfo->IOTPeer==HT_IOT_PEER_RALINK ||
656 pHTInfo->IOTPeer==HT_IOT_PEER_REALTEK )
657 {
658 retValue = 1;
659 }
660#endif
661 return retValue;
662}
663
664void
665HTIOTActDetermineRaFunc(struct rtllib_device* ieee, bool bPeerRx2ss)
666{
667 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
668 pHTInfo->IOTRaFunc &= HT_IOT_RAFUNC_DISABLE_ALL;
669
670 if (pHTInfo->IOTPeer == HT_IOT_PEER_RALINK && !bPeerRx2ss)
671 pHTInfo->IOTRaFunc |= HT_IOT_RAFUNC_PEER_1R;
672
673 if (pHTInfo->IOTAction & HT_IOT_ACT_AMSDU_ENABLE)
674 pHTInfo->IOTRaFunc |= HT_IOT_RAFUNC_TX_AMSDU;
675
676}
677
678
679u8
680HTIOTActIsDisableTx40MHz(struct rtllib_device* ieee,struct rtllib_network *network)
681{
682 u8 retValue = 0;
683
684#if (defined RTL8192SU || defined RTL8192SE || defined RTL8192CE)
685 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
686 if ( (KEY_TYPE_WEP104 == ieee->pairwise_key_type) ||
687 (KEY_TYPE_WEP40 == ieee->pairwise_key_type) ||
688 (KEY_TYPE_WEP104 == ieee->group_key_type) ||
689 (KEY_TYPE_WEP40 == ieee->group_key_type) ||
690 (KEY_TYPE_TKIP == ieee->pairwise_key_type) )
691 {
692 if ((pHTInfo->IOTPeer==HT_IOT_PEER_REALTEK) && (network->bssht.bdSupportHT))
693 retValue = 1;
694 }
695#endif
696
697 return retValue;
698}
699
700u8
701HTIOTActIsTxNoAggregation(struct rtllib_device* ieee,struct rtllib_network *network)
702{
703 u8 retValue = 0;
704
705#if (defined RTL8192SU || defined RTL8192SE || defined RTL8192CE)
706 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
707 if ( (KEY_TYPE_WEP104 == ieee->pairwise_key_type) ||
708 (KEY_TYPE_WEP40 == ieee->pairwise_key_type) ||
709 (KEY_TYPE_WEP104 == ieee->group_key_type) ||
710 (KEY_TYPE_WEP40 == ieee->group_key_type) ||
711 (KEY_TYPE_TKIP == ieee->pairwise_key_type) )
712 {
713 if (pHTInfo->IOTPeer==HT_IOT_PEER_REALTEK)
714 retValue = 1;
715 }
716#endif
717
718 return retValue;
719}
720
721
722u8
723HTIOTActIsDisableTx2SS(struct rtllib_device* ieee,struct rtllib_network *network)
724{
725 u8 retValue = 0;
726
727#if (defined RTL8192SU || defined RTL8192SE || defined RTL8192CE)
728 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
729 if ( (KEY_TYPE_WEP104 == ieee->pairwise_key_type) ||
730 (KEY_TYPE_WEP40 == ieee->pairwise_key_type) ||
731 (KEY_TYPE_WEP104 == ieee->group_key_type) ||
732 (KEY_TYPE_WEP40 == ieee->group_key_type) ||
733 (KEY_TYPE_TKIP == ieee->pairwise_key_type) )
734 {
735 if ((pHTInfo->IOTPeer==HT_IOT_PEER_REALTEK) && (network->bssht.bdSupportHT))
736 retValue = 1;
737 }
738#endif
739
740 return retValue;
741}
742
743
744bool HTIOCActIsDisableCckRate(struct rtllib_device* ieee,struct rtllib_network *network)
745{
746 bool retValue = false;
747#if defined(RTL8192SU)
748 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
749 if (pHTInfo->IOTPeer == HT_IOT_PEER_BROADCOM)
750 {
751 if ((memcmp(network->bssid, NETGEAR_BROADCOM, 3)==0)
752 && (network->bssht.bdBandWidth == HT_CHANNEL_WIDTH_20_40))
753 return true;
754 }
755#endif
756 return retValue;
757}
758
759bool HTIOCActAllowPeerAggOnePacket(struct rtllib_device* ieee,struct rtllib_network *network)
760{
761 bool retValue = false;
762#if defined(RTL8192SE) || defined(RTL8192SU)
763 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
764 {
765 if (ieee->VersionID<2)
766 if (pHTInfo->IOTPeer == HT_IOT_PEER_MARVELL)
767 return true;
768
769 }
770#endif
771 return retValue;
772}
773
774bool
775HTIOTActIsNullDataPowerSaving(struct rtllib_device* ieee,struct rtllib_network *network)
776{
777 bool retValue = false;
778#if defined(RTL8192SE) || defined(RTL8192SU)
779 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
780 {
781 if (pHTInfo->IOTPeer == HT_IOT_PEER_BROADCOM)
782 return true;
783
784 }
785#endif
786 return retValue;
787}
788
789void HTResetIOTSetting(
790 PRT_HIGH_THROUGHPUT pHTInfo
791)
792{
793 pHTInfo->IOTAction = 0;
794 pHTInfo->IOTPeer = HT_IOT_PEER_UNKNOWN;
795 pHTInfo->IOTRaFunc = 0;
796}
797
798
799void HTConstructCapabilityElement(struct rtllib_device* ieee, u8* posHTCap, u8* len, u8 IsEncrypt, bool bAssoc)
800{
801 PRT_HIGH_THROUGHPUT pHT = ieee->pHTInfo;
802 PHT_CAPABILITY_ELE pCapELE = NULL;
803
804 if ((posHTCap == NULL) || (pHT == NULL))
805 {
806 RTLLIB_DEBUG(RTLLIB_DL_ERR, "posHTCap or pHTInfo can't be null in HTConstructCapabilityElement()\n");
807 return;
808 }
809 memset(posHTCap, 0, *len);
810
811 if ((bAssoc) && (pHT->ePeerHTSpecVer == HT_SPEC_VER_EWC))
812 {
813 u8 EWC11NHTCap[] = {0x00, 0x90, 0x4c, 0x33};
814 memcpy(posHTCap, EWC11NHTCap, sizeof(EWC11NHTCap));
815 pCapELE = (PHT_CAPABILITY_ELE)&(posHTCap[4]);
816 *len = 30 + 2;
817 }else
818 {
819 pCapELE = (PHT_CAPABILITY_ELE)posHTCap;
820 *len = 26 + 2;
821 }
822
823 pCapELE->AdvCoding = 0;
824 if (ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev))
825 pCapELE->ChlWidth = 0;
826 else
827 pCapELE->ChlWidth = (pHT->bRegBW40MHz?1:0);
828
829 pCapELE->MimoPwrSave = pHT->SelfMimoPs;
830 pCapELE->GreenField = 0;
831 pCapELE->ShortGI20Mhz = 1;
832 pCapELE->ShortGI40Mhz = 1;
833
834 pCapELE->TxSTBC = 1;
835#if defined RTL8192SE || defined RTL8192CE
836 pCapELE->TxSTBC = 0;
837#endif
838 pCapELE->RxSTBC = 0;
839 pCapELE->DelayBA = 0;
840 pCapELE->MaxAMSDUSize = (MAX_RECEIVE_BUFFER_SIZE>=7935)?1:0;
841 pCapELE->DssCCk = ((pHT->bRegBW40MHz)?(pHT->bRegSuppCCK?1:0):0);
842 pCapELE->PSMP = 0;
843 pCapELE->LSigTxopProtect = 0;
844
845
846 RTLLIB_DEBUG(RTLLIB_DL_HT, "TX HT cap/info ele BW=%d MaxAMSDUSize:%d DssCCk:%d\n", pCapELE->ChlWidth, pCapELE->MaxAMSDUSize, pCapELE->DssCCk);
847
848 if ( IsEncrypt)
849 {
850 pCapELE->MPDUDensity = 7;
851 pCapELE->MaxRxAMPDUFactor = 2;
852 }
853 else
854 {
855 pCapELE->MaxRxAMPDUFactor = 3;
856 pCapELE->MPDUDensity = 0;
857 }
858
859 memcpy(pCapELE->MCS, ieee->Regdot11HTOperationalRateSet, 16);
860 memset(&pCapELE->ExtHTCapInfo, 0, 2);
861 memset(pCapELE->TxBFCap, 0, 4);
862
863 pCapELE->ASCap = 0;
864
865 if (bAssoc) {
866 if (pHT->IOTAction & HT_IOT_ACT_DISABLE_MCS15)
867 pCapELE->MCS[1] &= 0x7f;
868
869 if (pHT->IOTAction & HT_IOT_ACT_DISABLE_MCS14)
870 pCapELE->MCS[1] &= 0xbf;
871
872 if (pHT->IOTAction & HT_IOT_ACT_DISABLE_ALL_2SS)
873 pCapELE->MCS[1] &= 0x00;
874
875 if (pHT->IOTAction & HT_IOT_ACT_DISABLE_RX_40MHZ_SHORT_GI)
876 pCapELE->ShortGI40Mhz = 0;
877
878 if (ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev))
879 {
880 pCapELE->ChlWidth = 0;
881
882 pCapELE->MCS[1] = 0;
883 }
884 }
885
886
887
888
889
890 return;
891
892}
893void HTConstructInfoElement(struct rtllib_device* ieee, u8* posHTInfo, u8* len, u8 IsEncrypt)
894{
895 PRT_HIGH_THROUGHPUT pHT = ieee->pHTInfo;
896 PHT_INFORMATION_ELE pHTInfoEle = (PHT_INFORMATION_ELE)posHTInfo;
897 if ((posHTInfo == NULL) || (pHTInfoEle == NULL))
898 {
899 RTLLIB_DEBUG(RTLLIB_DL_ERR, "posHTInfo or pHTInfoEle can't be null in HTConstructInfoElement()\n");
900 return;
901 }
902
903 memset(posHTInfo, 0, *len);
904 if ( (ieee->iw_mode == IW_MODE_ADHOC) || (ieee->iw_mode == IW_MODE_MASTER))
905 {
906 pHTInfoEle->ControlChl = ieee->current_network.channel;
907 pHTInfoEle->ExtChlOffset = ((pHT->bRegBW40MHz == false)?HT_EXTCHNL_OFFSET_NO_EXT:
908 (ieee->current_network.channel<=6)?
909 HT_EXTCHNL_OFFSET_UPPER:HT_EXTCHNL_OFFSET_LOWER);
910 pHTInfoEle->RecommemdedTxWidth = pHT->bRegBW40MHz;
911 pHTInfoEle->RIFS = 0;
912 pHTInfoEle->PSMPAccessOnly = 0;
913 pHTInfoEle->SrvIntGranularity = 0;
914 pHTInfoEle->OptMode = pHT->CurrentOpMode;
915 pHTInfoEle->NonGFDevPresent = 0;
916 pHTInfoEle->DualBeacon = 0;
917 pHTInfoEle->SecondaryBeacon = 0;
918 pHTInfoEle->LSigTxopProtectFull = 0;
919 pHTInfoEle->PcoActive = 0;
920 pHTInfoEle->PcoPhase = 0;
921
922 memset(pHTInfoEle->BasicMSC, 0, 16);
923
924
925 *len = 22 + 2;
926
927 }
928 else
929 {
930 *len = 0;
931 }
932 return;
933}
934
935void HTConstructRT2RTAggElement(struct rtllib_device* ieee, u8* posRT2RTAgg, u8* len)
936{
937 if (posRT2RTAgg == NULL) {
938 RTLLIB_DEBUG(RTLLIB_DL_ERR, "posRT2RTAgg can't be null in HTConstructRT2RTAggElement()\n");
939 return;
940 }
941 memset(posRT2RTAgg, 0, *len);
942 *posRT2RTAgg++ = 0x00;
943 *posRT2RTAgg++ = 0xe0;
944 *posRT2RTAgg++ = 0x4c;
945 *posRT2RTAgg++ = 0x02;
946 *posRT2RTAgg++ = 0x01;
947
948#ifdef RTL8192CE
949 *posRT2RTAgg = 0x70;
950#else
951 *posRT2RTAgg = 0x30;
952#endif
953
954 if (ieee->bSupportRemoteWakeUp) {
955 *posRT2RTAgg |= RT_HT_CAP_USE_WOW;
956 }
957
958 *len = 6 + 2;
959
960 return;
961
962#ifdef TODO
963 posRT2RTAgg->Length = 6;
964#endif
965
966
967
968
969}
970
971u8 HT_PickMCSRate(struct rtllib_device* ieee, u8* pOperateMCS)
972{
973 u8 i;
974 if (pOperateMCS == NULL)
975 {
976 RTLLIB_DEBUG(RTLLIB_DL_ERR, "pOperateMCS can't be null in HT_PickMCSRate()\n");
977 return false;
978 }
979
980 switch (ieee->mode) {
981 case IEEE_A:
982 case IEEE_B:
983 case IEEE_G:
984 for (i=0;i<=15;i++)
985 pOperateMCS[i] = 0;
986 break;
987 case IEEE_N_24G:
988 case IEEE_N_5G:
989 pOperateMCS[0] &=RATE_ADPT_1SS_MASK;
990 pOperateMCS[1] &=RATE_ADPT_2SS_MASK;
991 pOperateMCS[3] &=RATE_ADPT_MCS32_MASK;
992 break;
993 default:
994 break;
995
996 }
997
998 return true;
999}
1000
1001u8 HTGetHighestMCSRate(struct rtllib_device* ieee, u8* pMCSRateSet, u8* pMCSFilter)
1002{
1003 u8 i, j;
1004 u8 bitMap;
1005 u8 mcsRate = 0;
1006 u8 availableMcsRate[16];
1007 if (pMCSRateSet == NULL || pMCSFilter == NULL)
1008 {
1009 RTLLIB_DEBUG(RTLLIB_DL_ERR, "pMCSRateSet or pMCSFilter can't be null in HTGetHighestMCSRate()\n");
1010 return false;
1011 }
1012 for (i=0; i<16; i++)
1013 availableMcsRate[i] = pMCSRateSet[i] & pMCSFilter[i];
1014
1015 for (i = 0; i < 16; i++)
1016 {
1017 if (availableMcsRate[i] != 0)
1018 break;
1019 }
1020 if (i == 16)
1021 return false;
1022
1023 for (i = 0; i < 16; i++)
1024 {
1025 if (availableMcsRate[i] != 0)
1026 {
1027 bitMap = availableMcsRate[i];
1028 for (j = 0; j < 8; j++)
1029 {
1030 if ((bitMap%2) != 0)
1031 {
1032 if (HTMcsToDataRate(ieee, (8*i+j)) > HTMcsToDataRate(ieee, mcsRate))
1033 mcsRate = (8*i+j);
1034 }
1035 bitMap = bitMap>>1;
1036 }
1037 }
1038 }
1039 return (mcsRate|0x80);
1040}
1041
1042u8 HTFilterMCSRate( struct rtllib_device* ieee, u8* pSupportMCS, u8* pOperateMCS)
1043{
1044
1045 u8 i=0;
1046
1047 for (i=0;i<=15;i++){
1048 pOperateMCS[i] = ieee->Regdot11TxHTOperationalRateSet[i]&pSupportMCS[i];
1049 }
1050
1051
1052
1053 HT_PickMCSRate(ieee, pOperateMCS);
1054
1055 if (ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev))
1056 pOperateMCS[1] = 0;
1057
1058 for (i=2; i<=15; i++)
1059 pOperateMCS[i] = 0;
1060
1061 return true;
1062}
1063void HTSetConnectBwMode(struct rtllib_device* ieee, HT_CHANNEL_WIDTH Bandwidth, HT_EXTCHNL_OFFSET Offset);
1064void HTOnAssocRsp(struct rtllib_device *ieee)
1065{
1066 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
1067 PHT_CAPABILITY_ELE pPeerHTCap = NULL;
1068 PHT_INFORMATION_ELE pPeerHTInfo = NULL;
1069 u16 nMaxAMSDUSize = 0;
1070 u8* pMcsFilter = NULL;
1071
1072 static u8 EWC11NHTCap[] = {0x00, 0x90, 0x4c, 0x33};
1073 static u8 EWC11NHTInfo[] = {0x00, 0x90, 0x4c, 0x34};
1074
1075 if ( pHTInfo->bCurrentHTSupport == false )
1076 {
1077 RTLLIB_DEBUG(RTLLIB_DL_ERR, "<=== HTOnAssocRsp(): HT_DISABLE\n");
1078 return;
1079 }
1080 RTLLIB_DEBUG(RTLLIB_DL_HT, "===> HTOnAssocRsp_wq(): HT_ENABLE\n");
1081
1082 if (!memcmp(pHTInfo->PeerHTCapBuf,EWC11NHTCap, sizeof(EWC11NHTCap)))
1083 pPeerHTCap = (PHT_CAPABILITY_ELE)(&pHTInfo->PeerHTCapBuf[4]);
1084 else
1085 pPeerHTCap = (PHT_CAPABILITY_ELE)(pHTInfo->PeerHTCapBuf);
1086
1087 if (!memcmp(pHTInfo->PeerHTInfoBuf, EWC11NHTInfo, sizeof(EWC11NHTInfo)))
1088 pPeerHTInfo = (PHT_INFORMATION_ELE)(&pHTInfo->PeerHTInfoBuf[4]);
1089 else
1090 pPeerHTInfo = (PHT_INFORMATION_ELE)(pHTInfo->PeerHTInfoBuf);
1091
1092 RTLLIB_DEBUG_DATA(RTLLIB_DL_DATA|RTLLIB_DL_HT, pPeerHTCap, sizeof(HT_CAPABILITY_ELE));
1093 HTSetConnectBwMode(ieee, (HT_CHANNEL_WIDTH)(pPeerHTCap->ChlWidth), (HT_EXTCHNL_OFFSET)(pPeerHTInfo->ExtChlOffset));
1094 pHTInfo->bCurTxBW40MHz = ((pPeerHTInfo->RecommemdedTxWidth == 1)?true:false);
1095
1096 pHTInfo->bCurShortGI20MHz=
1097 ((pHTInfo->bRegShortGI20MHz)?((pPeerHTCap->ShortGI20Mhz==1)?true:false):false);
1098 pHTInfo->bCurShortGI40MHz=
1099 ((pHTInfo->bRegShortGI40MHz)?((pPeerHTCap->ShortGI40Mhz==1)?true:false):false);
1100
1101 pHTInfo->bCurSuppCCK =
1102 ((pHTInfo->bRegSuppCCK)?((pPeerHTCap->DssCCk==1)?true:false):false);
1103
1104
1105 pHTInfo->bCurrent_AMSDU_Support = pHTInfo->bAMSDU_Support;
1106
1107 nMaxAMSDUSize = (pPeerHTCap->MaxAMSDUSize==0)?3839:7935;
1108
1109 if (pHTInfo->nAMSDU_MaxSize > nMaxAMSDUSize )
1110 pHTInfo->nCurrent_AMSDU_MaxSize = nMaxAMSDUSize;
1111 else
1112 pHTInfo->nCurrent_AMSDU_MaxSize = pHTInfo->nAMSDU_MaxSize;
1113
1114 pHTInfo->bCurrentAMPDUEnable = pHTInfo->bAMPDUEnable;
1115 if (ieee->rtllib_ap_sec_type &&
1116 (ieee->rtllib_ap_sec_type(ieee)&(SEC_ALG_WEP|SEC_ALG_TKIP))){
1117 if ( (pHTInfo->IOTPeer== HT_IOT_PEER_ATHEROS) ||
1118 (pHTInfo->IOTPeer == HT_IOT_PEER_UNKNOWN) )
1119 pHTInfo->bCurrentAMPDUEnable = false;
1120 }
1121
1122 if (!pHTInfo->bRegRT2RTAggregation)
1123 {
1124 if (pHTInfo->AMPDU_Factor > pPeerHTCap->MaxRxAMPDUFactor)
1125 pHTInfo->CurrentAMPDUFactor = pPeerHTCap->MaxRxAMPDUFactor;
1126 else
1127 pHTInfo->CurrentAMPDUFactor = pHTInfo->AMPDU_Factor;
1128
1129 } else {
1130 if (ieee->current_network.bssht.bdRT2RTAggregation)
1131 {
1132 if ( ieee->pairwise_key_type != KEY_TYPE_NA)
1133 pHTInfo->CurrentAMPDUFactor = pPeerHTCap->MaxRxAMPDUFactor;
1134 else
1135 pHTInfo->CurrentAMPDUFactor = HT_AGG_SIZE_64K;
1136 }else
1137 {
1138 if (pPeerHTCap->MaxRxAMPDUFactor < HT_AGG_SIZE_32K)
1139 pHTInfo->CurrentAMPDUFactor = pPeerHTCap->MaxRxAMPDUFactor;
1140 else
1141 pHTInfo->CurrentAMPDUFactor = HT_AGG_SIZE_32K;
1142 }
1143 }
1144 if (pHTInfo->MPDU_Density > pPeerHTCap->MPDUDensity)
1145 pHTInfo->CurrentMPDUDensity = pHTInfo->MPDU_Density;
1146 else
1147 pHTInfo->CurrentMPDUDensity = pPeerHTCap->MPDUDensity;
1148#if (defined RTL8192SE || defined RTL8192SU || defined RTL8192CE)
1149 if (ieee->SetHwRegHandler != NULL) {
1150 ieee->SetHwRegHandler( ieee->dev, HW_VAR_SHORTGI_DENSITY, (u8*)(&ieee->MaxMssDensity));
1151 ieee->SetHwRegHandler(ieee->dev, HW_VAR_AMPDU_FACTOR, &pHTInfo->CurrentAMPDUFactor);
1152 ieee->SetHwRegHandler(ieee->dev, HW_VAR_AMPDU_MIN_SPACE, &pHTInfo->CurrentMPDUDensity);
1153 }
1154#elif defined RTL8192CE
1155 if (ieee->SetHwRegHandler != NULL) {
1156 ieee->SetHwRegHandler(ieee->dev, HW_VAR_AMPDU_FACTOR, &pHTInfo->CurrentAMPDUFactor);
1157 ieee->SetHwRegHandler(ieee->dev, HW_VAR_AMPDU_MIN_SPACE, &pHTInfo->CurrentMPDUDensity);
1158 }
1159#endif
1160#ifndef RTL8190P
1161 if (pHTInfo->IOTAction & HT_IOT_ACT_TX_USE_AMSDU_8K)
1162#else
1163 if ( 0 )
1164#endif
1165 {
1166 pHTInfo->bCurrentAMPDUEnable = false;
1167 pHTInfo->ForcedAMSDUMode = HT_AGG_FORCE_ENABLE;
1168 pHTInfo->ForcedAMSDUMaxSize = 7935;
1169 }
1170 pHTInfo->bCurRxReorderEnable = pHTInfo->bRegRxReorderEnable;
1171
1172 if (pPeerHTCap->MCS[0] == 0)
1173 pPeerHTCap->MCS[0] = 0xff;
1174
1175 HTIOTActDetermineRaFunc(ieee, ((pPeerHTCap->MCS[1])!=0));
1176
1177 HTFilterMCSRate(ieee, pPeerHTCap->MCS, ieee->dot11HTOperationalRateSet);
1178
1179 pHTInfo->PeerMimoPs = pPeerHTCap->MimoPwrSave;
1180 if (pHTInfo->PeerMimoPs == MIMO_PS_STATIC)
1181 pMcsFilter = MCS_FILTER_1SS;
1182 else
1183 pMcsFilter = MCS_FILTER_ALL;
1184 ieee->HTHighestOperaRate = HTGetHighestMCSRate(ieee, ieee->dot11HTOperationalRateSet, pMcsFilter);
1185 ieee->HTCurrentOperaRate = ieee->HTHighestOperaRate;
1186
1187 pHTInfo->CurrentOpMode = pPeerHTInfo->OptMode;
1188
1189}
1190
1191void HTSetConnectBwModeCallback(struct rtllib_device* ieee);
1192void HTInitializeHTInfo(struct rtllib_device* ieee)
1193{
1194 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
1195
1196 RTLLIB_DEBUG(RTLLIB_DL_HT, "===========>%s()\n", __func__);
1197 pHTInfo->bCurrentHTSupport = false;
1198
1199 pHTInfo->bCurBW40MHz = false;
1200 pHTInfo->bCurTxBW40MHz = false;
1201
1202 pHTInfo->bCurShortGI20MHz = false;
1203 pHTInfo->bCurShortGI40MHz = false;
1204 pHTInfo->bForcedShortGI = false;
1205
1206 pHTInfo->bCurSuppCCK = true;
1207
1208 pHTInfo->bCurrent_AMSDU_Support = false;
1209 pHTInfo->nCurrent_AMSDU_MaxSize = pHTInfo->nAMSDU_MaxSize;
1210 pHTInfo->CurrentMPDUDensity = pHTInfo->MPDU_Density;
1211 pHTInfo->CurrentAMPDUFactor = pHTInfo->AMPDU_Factor;
1212
1213 memset((void*)(&(pHTInfo->SelfHTCap)), 0, sizeof(pHTInfo->SelfHTCap));
1214 memset((void*)(&(pHTInfo->SelfHTInfo)), 0, sizeof(pHTInfo->SelfHTInfo));
1215 memset((void*)(&(pHTInfo->PeerHTCapBuf)), 0, sizeof(pHTInfo->PeerHTCapBuf));
1216 memset((void*)(&(pHTInfo->PeerHTInfoBuf)), 0, sizeof(pHTInfo->PeerHTInfoBuf));
1217
1218 pHTInfo->bSwBwInProgress = false;
1219 pHTInfo->ChnlOp = CHNLOP_NONE;
1220
1221 pHTInfo->ePeerHTSpecVer = HT_SPEC_VER_IEEE;
1222
1223 pHTInfo->bCurrentRT2RTAggregation = false;
1224 pHTInfo->bCurrentRT2RTLongSlotTime = false;
1225 pHTInfo->RT2RT_HT_Mode = (RT_HT_CAPBILITY)0;
1226
1227 pHTInfo->IOTPeer = 0;
1228 pHTInfo->IOTAction = 0;
1229 pHTInfo->IOTRaFunc = 0;
1230
1231 {
1232 u8* RegHTSuppRateSets = &(ieee->RegHTSuppRateSet[0]);
1233 RegHTSuppRateSets[0] = 0xFF;
1234 RegHTSuppRateSets[1] = 0xFF;
1235 RegHTSuppRateSets[4] = 0x01;
1236 }
1237}
1238void HTInitializeBssDesc(PBSS_HT pBssHT)
1239{
1240
1241 pBssHT->bdSupportHT = false;
1242 memset(pBssHT->bdHTCapBuf, 0, sizeof(pBssHT->bdHTCapBuf));
1243 pBssHT->bdHTCapLen = 0;
1244 memset(pBssHT->bdHTInfoBuf, 0, sizeof(pBssHT->bdHTInfoBuf));
1245 pBssHT->bdHTInfoLen = 0;
1246
1247 pBssHT->bdHTSpecVer= HT_SPEC_VER_IEEE;
1248
1249 pBssHT->bdRT2RTAggregation = false;
1250 pBssHT->bdRT2RTLongSlotTime = false;
1251 pBssHT->RT2RT_HT_Mode = (RT_HT_CAPBILITY)0;
1252}
1253
1254void HTResetSelfAndSavePeerSetting(struct rtllib_device* ieee, struct rtllib_network * pNetwork)
1255{
1256 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
1257 u8 bIOTAction = 0;
1258
1259 RTLLIB_DEBUG(RTLLIB_DL_HT, "==============>%s()\n", __func__);
1260 /*unmark bEnableHT flag here is the same reason why unmarked in function rtllib_softmac_new_net. WB 2008.09.10*/
1261 if (pNetwork->bssht.bdSupportHT)
1262 {
1263 pHTInfo->bCurrentHTSupport = true;
1264 pHTInfo->ePeerHTSpecVer = pNetwork->bssht.bdHTSpecVer;
1265
1266 if (pNetwork->bssht.bdHTCapLen > 0 && pNetwork->bssht.bdHTCapLen <= sizeof(pHTInfo->PeerHTCapBuf))
1267 memcpy(pHTInfo->PeerHTCapBuf, pNetwork->bssht.bdHTCapBuf, pNetwork->bssht.bdHTCapLen);
1268
1269 if (pNetwork->bssht.bdHTInfoLen > 0 && pNetwork->bssht.bdHTInfoLen <= sizeof(pHTInfo->PeerHTInfoBuf))
1270 memcpy(pHTInfo->PeerHTInfoBuf, pNetwork->bssht.bdHTInfoBuf, pNetwork->bssht.bdHTInfoLen);
1271
1272 if (pHTInfo->bRegRT2RTAggregation)
1273 {
1274 pHTInfo->bCurrentRT2RTAggregation = pNetwork->bssht.bdRT2RTAggregation;
1275 pHTInfo->bCurrentRT2RTLongSlotTime = pNetwork->bssht.bdRT2RTLongSlotTime;
1276 pHTInfo->RT2RT_HT_Mode = pNetwork->bssht.RT2RT_HT_Mode;
1277 }
1278 else
1279 {
1280 pHTInfo->bCurrentRT2RTAggregation = false;
1281 pHTInfo->bCurrentRT2RTLongSlotTime = false;
1282 pHTInfo->RT2RT_HT_Mode = (RT_HT_CAPBILITY)0;
1283 }
1284
1285 HTIOTPeerDetermine(ieee);
1286
1287 pHTInfo->IOTAction = 0;
1288 bIOTAction = HTIOTActIsDisableMCS14(ieee, pNetwork->bssid);
1289 if (bIOTAction)
1290 pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_MCS14;
1291
1292 bIOTAction = HTIOTActIsDisableMCS15(ieee);
1293 if (bIOTAction)
1294 pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_MCS15;
1295
1296 bIOTAction = HTIOTActIsDisableMCSTwoSpatialStream(ieee);
1297 if (bIOTAction)
1298 pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_ALL_2SS;
1299
1300
1301 bIOTAction = HTIOTActIsDisableEDCATurbo(ieee, pNetwork->bssid);
1302 if (bIOTAction)
1303 pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_EDCA_TURBO;
1304
1305#if defined(RTL8190P) || defined(RTL8192E) || defined(RTL8192U)
1306 bIOTAction = HTIOTActIsMgntUseCCK6M(ieee,pNetwork);
1307 if (bIOTAction)
1308 pHTInfo->IOTAction |= HT_IOT_ACT_MGNT_USE_CCK_6M;
1309#elif defined(RTL8192SE) || defined(RTL8192SU) || defined RTL8192CE
1310 bIOTAction = HTIOTActWAIOTBroadcom(ieee);
1311 if (bIOTAction)
1312 {
1313 pHTInfo->IOTAction |= HT_IOT_ACT_WA_IOT_Broadcom;
1314 }
1315#endif
1316 bIOTAction = HTIOTActIsCCDFsync(ieee);
1317 if (bIOTAction)
1318 pHTInfo->IOTAction |= HT_IOT_ACT_CDD_FSYNC;
1319#if defined(RTL8192SU) || defined(RTL8192SE) || defined RTL8192CE
1320 bIOTAction = HTIOTActIsForcedCTS2Self(ieee,pNetwork);
1321 if (bIOTAction)
1322 pHTInfo->IOTAction |= HT_IOT_ACT_FORCED_CTS2SELF;
1323
1324
1325 bIOTAction = HTIOTActIsEnableBETxOPLimit(ieee);
1326 if (bIOTAction)
1327 pHTInfo->IOTAction |= HT_IOT_ACT_FORCED_ENABLE_BE_TXOP;
1328
1329#if defined(RTL8192SU)
1330 bIOTAction = HTIOCActRejcectADDBARequest(pNetwork);
1331 if (bIOTAction)
1332 pHTInfo->IOTAction |= HT_IOT_ACT_REJECT_ADDBA_REQ;
1333#endif
1334
1335 bIOTAction = HTIOCActAllowPeerAggOnePacket(ieee, pNetwork);
1336 if (bIOTAction)
1337 pHTInfo->IOTAction |= HT_IOT_ACT_ALLOW_PEER_AGG_ONE_PKT;
1338
1339 bIOTAction = HTIOTActIsEDCABiasRx(ieee, pNetwork);
1340 if (bIOTAction)
1341 pHTInfo->IOTAction |= HT_IOT_ACT_EDCA_BIAS_ON_RX;
1342
1343#if defined(RTL8192SU)
1344 bIOTAction = HTIOCActIsDisableCckRate(ieee, pNetwork);
1345 if (bIOTAction)
1346 pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_CCK_RATE;
1347#endif
1348 bIOTAction = HTIOTActDisableShortGI(ieee, pNetwork);
1349 if (bIOTAction)
1350 pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_SHORT_GI;
1351
1352 bIOTAction = HTIOTActDisableHighPower(ieee, pNetwork);
1353 if (bIOTAction)
1354 pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_HIGH_POWER;
1355
1356
1357 bIOTAction = HTIOTActIsForcedAMSDU8K(ieee, pNetwork);
1358 if (bIOTAction)
1359 pHTInfo->IOTAction |= HT_IOT_ACT_TX_USE_AMSDU_8K;
1360
1361#if defined(RTL8192SU)
1362 bIOTAction = HTIOTActIsTxNoAggregation(ieee, pNetwork);
1363 if (bIOTAction)
1364 pHTInfo->IOTAction |= HT_IOT_ACT_TX_NO_AGGREGATION;
1365
1366 bIOTAction = HTIOTActIsDisableTx40MHz(ieee, pNetwork);
1367 if (bIOTAction)
1368 pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_TX_40_MHZ;
1369
1370 bIOTAction = HTIOTActIsDisableTx2SS(ieee, pNetwork);
1371 if (bIOTAction)
1372 pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_TX_2SS;
1373#endif
1374
1375 bIOTAction = HTIOTActIsForcedRTSCTS(ieee, pNetwork);
1376 if (bIOTAction)
1377 pHTInfo->IOTAction |= HT_IOT_ACT_FORCED_RTS;
1378
1379 bIOTAction = HTIOTActIsNullDataPowerSaving(ieee, pNetwork);
1380 if (bIOTAction)
1381 pHTInfo->IOTAction |= HT_IOT_ACT_NULL_DATA_POWER_SAVING;
1382#endif
1383
1384 } else {
1385 pHTInfo->bCurrentHTSupport = false;
1386 pHTInfo->bCurrentRT2RTAggregation = false;
1387 pHTInfo->bCurrentRT2RTLongSlotTime = false;
1388 pHTInfo->RT2RT_HT_Mode = (RT_HT_CAPBILITY)0;
1389
1390 pHTInfo->IOTAction = 0;
1391 pHTInfo->IOTRaFunc = 0;
1392 }
1393
1394}
1395
1396void HTUpdateSelfAndPeerSetting(struct rtllib_device* ieee, struct rtllib_network * pNetwork)
1397{
1398 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
1399 PHT_INFORMATION_ELE pPeerHTInfo = (PHT_INFORMATION_ELE)pNetwork->bssht.bdHTInfoBuf;
1400
1401 if (pHTInfo->bCurrentHTSupport)
1402 {
1403 if (pNetwork->bssht.bdHTInfoLen != 0)
1404 pHTInfo->CurrentOpMode = pPeerHTInfo->OptMode;
1405
1406 }
1407}
1408
1409void HTUseDefaultSetting(struct rtllib_device* ieee)
1410{
1411 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
1412
1413 if (pHTInfo->bEnableHT)
1414 {
1415 pHTInfo->bCurrentHTSupport = true;
1416 pHTInfo->bCurSuppCCK = pHTInfo->bRegSuppCCK;
1417
1418 pHTInfo->bCurBW40MHz = pHTInfo->bRegBW40MHz;
1419 pHTInfo->bCurShortGI20MHz= pHTInfo->bRegShortGI20MHz;
1420
1421 pHTInfo->bCurShortGI40MHz= pHTInfo->bRegShortGI40MHz;
1422
1423 if (ieee->iw_mode == IW_MODE_ADHOC)
1424 {
1425 ieee->current_network.qos_data.active = ieee->current_network.qos_data.supported;
1426 }
1427 pHTInfo->bCurrent_AMSDU_Support = pHTInfo->bAMSDU_Support;
1428 pHTInfo->nCurrent_AMSDU_MaxSize = pHTInfo->nAMSDU_MaxSize;
1429
1430 pHTInfo->bCurrentAMPDUEnable = pHTInfo->bAMPDUEnable;
1431 pHTInfo->CurrentAMPDUFactor = pHTInfo->AMPDU_Factor;
1432
1433 pHTInfo->CurrentMPDUDensity = pHTInfo->CurrentMPDUDensity;
1434
1435
1436 HTFilterMCSRate(ieee, ieee->Regdot11TxHTOperationalRateSet, ieee->dot11HTOperationalRateSet);
1437#ifdef TODO
1438 Adapter->HalFunc.InitHalRATRTableHandler( Adapter, &pMgntInfo->dot11OperationalRateSet, pMgntInfo->dot11HTOperationalRateSet);
1439#endif
1440 ieee->HTHighestOperaRate = HTGetHighestMCSRate(ieee, ieee->dot11HTOperationalRateSet, MCS_FILTER_ALL);
1441 ieee->HTCurrentOperaRate = ieee->HTHighestOperaRate;
1442
1443#if (defined RTL8192SE || defined RTL8192SU || defined RTL8192CE)
1444 if (ieee->SetHwRegHandler != NULL) {
1445 ieee->SetHwRegHandler( ieee->dev, HW_VAR_SHORTGI_DENSITY, (u8*)(&ieee->MaxMssDensity));
1446 ieee->SetHwRegHandler(ieee->dev, HW_VAR_AMPDU_FACTOR, &pHTInfo->CurrentAMPDUFactor);
1447 ieee->SetHwRegHandler(ieee->dev, HW_VAR_AMPDU_MIN_SPACE, &pHTInfo->CurrentMPDUDensity);
1448 }
1449#endif
1450
1451 }
1452 else
1453 {
1454 pHTInfo->bCurrentHTSupport = false;
1455 }
1456 return;
1457}
1458u8 HTCCheck(struct rtllib_device* ieee, u8* pFrame)
1459{
1460 if (ieee->pHTInfo->bCurrentHTSupport)
1461 {
1462 if ( (IsQoSDataFrame(pFrame) && Frame_Order(pFrame)) == 1)
1463 {
1464 RTLLIB_DEBUG(RTLLIB_DL_HT, "HT CONTROL FILED EXIST!!\n");
1465 return true;
1466 }
1467 }
1468 return false;
1469}
1470
1471void HTSetConnectBwMode(struct rtllib_device* ieee, HT_CHANNEL_WIDTH Bandwidth, HT_EXTCHNL_OFFSET Offset)
1472{
1473 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
1474
1475 if (pHTInfo->bRegBW40MHz == false)
1476 return;
1477
1478 if (ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev))
1479 Bandwidth=HT_CHANNEL_WIDTH_20;
1480
1481
1482 if (pHTInfo->bSwBwInProgress) {
1483 printk("%s: bSwBwInProgress!!\n", __func__);
1484 return;
1485 }
1486 if (Bandwidth==HT_CHANNEL_WIDTH_20_40)
1487 {
1488 if (ieee->current_network.channel<2 && Offset==HT_EXTCHNL_OFFSET_LOWER)
1489 Offset = HT_EXTCHNL_OFFSET_NO_EXT;
1490 if (Offset==HT_EXTCHNL_OFFSET_UPPER || Offset==HT_EXTCHNL_OFFSET_LOWER) {
1491 pHTInfo->bCurBW40MHz = true;
1492 pHTInfo->CurSTAExtChnlOffset = Offset;
1493 } else {
1494 pHTInfo->bCurBW40MHz = false;
1495 pHTInfo->CurSTAExtChnlOffset = HT_EXTCHNL_OFFSET_NO_EXT;
1496 }
1497 } else {
1498 pHTInfo->bCurBW40MHz = false;
1499 pHTInfo->CurSTAExtChnlOffset = HT_EXTCHNL_OFFSET_NO_EXT;
1500 }
1501
1502 printk("%s():pHTInfo->bCurBW40MHz:%x\n", __func__, pHTInfo->bCurBW40MHz);
1503
1504 pHTInfo->bSwBwInProgress = true;
1505
1506 HTSetConnectBwModeCallback(ieee);
1507
1508}
1509
1510void HTSetConnectBwModeCallback(struct rtllib_device* ieee)
1511{
1512 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
1513
1514 RTLLIB_DEBUG(RTLLIB_DL_HT, "======>%s()\n", __func__);
1515 if (pHTInfo->bCurBW40MHz)
1516 {
1517 if (pHTInfo->CurSTAExtChnlOffset==HT_EXTCHNL_OFFSET_UPPER)
1518 ieee->set_chan(ieee->dev, ieee->current_network.channel+2);
1519 else if (pHTInfo->CurSTAExtChnlOffset==HT_EXTCHNL_OFFSET_LOWER)
1520 ieee->set_chan(ieee->dev, ieee->current_network.channel-2);
1521 else
1522 ieee->set_chan(ieee->dev, ieee->current_network.channel);
1523
1524 ieee->SetBWModeHandler(ieee->dev, HT_CHANNEL_WIDTH_20_40, pHTInfo->CurSTAExtChnlOffset);
1525 } else {
1526 ieee->set_chan(ieee->dev, ieee->current_network.channel);
1527 ieee->SetBWModeHandler(ieee->dev, HT_CHANNEL_WIDTH_20, HT_EXTCHNL_OFFSET_NO_EXT);
1528 }
1529
1530 pHTInfo->bSwBwInProgress = false;
1531}
diff --git a/drivers/staging/rtl8192e/rtl819x_Qos.h b/drivers/staging/rtl8192e/rtl819x_Qos.h
new file mode 100644
index 00000000000..4c89a769915
--- /dev/null
+++ b/drivers/staging/rtl8192e/rtl819x_Qos.h
@@ -0,0 +1,422 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/
19#ifndef __INC_QOS_TYPE_H
20#define __INC_QOS_TYPE_H
21
22#include "rtllib_endianfree.h"
23
24#define BIT0 0x00000001
25#define BIT1 0x00000002
26#define BIT2 0x00000004
27#define BIT3 0x00000008
28#define BIT4 0x00000010
29#define BIT5 0x00000020
30#define BIT6 0x00000040
31#define BIT7 0x00000080
32#define BIT8 0x00000100
33#define BIT9 0x00000200
34#define BIT10 0x00000400
35#define BIT11 0x00000800
36#define BIT12 0x00001000
37#define BIT13 0x00002000
38#define BIT14 0x00004000
39#define BIT15 0x00008000
40#define BIT16 0x00010000
41#define BIT17 0x00020000
42#define BIT18 0x00040000
43#define BIT19 0x00080000
44#define BIT20 0x00100000
45#define BIT21 0x00200000
46#define BIT22 0x00400000
47#define BIT23 0x00800000
48#define BIT24 0x01000000
49#define BIT25 0x02000000
50#define BIT26 0x04000000
51#define BIT27 0x08000000
52#define BIT28 0x10000000
53#define BIT29 0x20000000
54#define BIT30 0x40000000
55#define BIT31 0x80000000
56
57#ifndef RTK_DMP_PLATFORM
58#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
59#ifndef bool
60typedef enum{false = 0, true} bool;
61#endif
62#endif
63#endif
64
65typedef union _QOS_TSINFO{
66 u8 charData[3];
67 struct {
68 u8 ucTrafficType:1;
69 u8 ucTSID:4;
70 u8 ucDirection:2;
71 u8 ucAccessPolicy:2;
72 u8 ucAggregation:1;
73 u8 ucPSB:1;
74 u8 ucUP:3;
75 u8 ucTSInfoAckPolicy:2;
76 u8 ucSchedule:1;
77 u8 ucReserved:7;
78 }field;
79}QOS_TSINFO, *PQOS_TSINFO;
80typedef union _TSPEC_BODY{
81 u8 charData[55];
82
83 struct
84 {
85 QOS_TSINFO TSInfo;
86 u16 NominalMSDUsize;
87 u16 MaxMSDUsize;
88 u32 MinServiceItv;
89 u32 MaxServiceItv;
90 u32 InactivityItv;
91 u32 SuspenItv;
92 u32 ServiceStartTime;
93 u32 MinDataRate;
94 u32 MeanDataRate;
95 u32 PeakDataRate;
96 u32 MaxBurstSize;
97 u32 DelayBound;
98 u32 MinPhyRate;
99 u16 SurplusBandwidthAllowance;
100 u16 MediumTime;
101 } f;
102}TSPEC_BODY, *PTSPEC_BODY;
103
104typedef struct _WMM_TSPEC{
105 u8 ID;
106 u8 Length;
107 u8 OUI[3];
108 u8 OUI_Type;
109 u8 OUI_SubType;
110 u8 Version;
111 TSPEC_BODY Body;
112} WMM_TSPEC, *PWMM_TSPEC;
113
114typedef struct _OCTET_STRING{
115 u8 *Octet;
116 u16 Length;
117}OCTET_STRING, *POCTET_STRING;
118#define MAX_WMMELE_LENGTH 64
119
120typedef u32 QOS_MODE, *PQOS_MODE;
121#define QOS_DISABLE 0
122#define QOS_WMM 1
123#define QOS_WMMSA 2
124#define QOS_EDCA 4
125#define QOS_HCCA 8
126#define QOS_WMM_UAPSD 16
127
128#define WMM_PARAM_ELE_BODY_LEN 18
129
130#define MAX_STA_TS_COUNT 16
131#define MAX_AP_TS_COUNT 32
132#define QOS_TSTREAM_KEY_SIZE 13
133
134#define WMM_ACTION_CATEGORY_CODE 17
135#define WMM_PARAM_ELE_BODY_LEN 18
136
137#define MAX_TSPEC_TSID 15
138#define SESSION_REJECT_TSID 0xfe
139#define DEFAULT_TSID 0xff
140
141#define ADDTS_TIME_SLOT 100
142
143#define ACM_TIMEOUT 1000
144#define SESSION_REJECT_TIMEOUT 60000
145
146typedef enum _ACK_POLICY{
147 eAckPlc0_ACK = 0x00,
148 eAckPlc1_NoACK = 0x01,
149}ACK_POLICY,*PACK_POLICY;
150
151
152#define SET_WMM_QOS_INFO_FIELD(_pStart, _val) WriteEF1Byte(_pStart, _val)
153
154#define GET_WMM_QOS_INFO_FIELD_PARAMETERSET_COUNT(_pStart) LE_BITS_TO_1BYTE(_pStart, 0, 4)
155#define SET_WMM_QOS_INFO_FIELD_PARAMETERSET_COUNT(_pStart, _val) SET_BITS_TO_LE_1BYTE(_pStart, 0, 4, _val)
156
157#define GET_WMM_QOS_INFO_FIELD_AP_UAPSD(_pStart) LE_BITS_TO_1BYTE(_pStart, 7, 1)
158#define SET_WMM_QOS_INFO_FIELD_AP_UAPSD(_pStart, _val) SET_BITS_TO_LE_1BYTE(_pStart, 7, 1, _val)
159
160#define GET_WMM_QOS_INFO_FIELD_STA_AC_VO_UAPSD(_pStart) LE_BITS_TO_1BYTE(_pStart, 0, 1)
161#define SET_WMM_QOS_INFO_FIELD_STA_AC_VO_UAPSD(_pStart, _val) SET_BITS_TO_LE_1BYTE(_pStart, 0, 1, _val)
162
163#define GET_WMM_QOS_INFO_FIELD_STA_AC_VI_UAPSD(_pStart) LE_BITS_TO_1BYTE(_pStart, 1, 1)
164#define SET_WMM_QOS_INFO_FIELD_STA_AC_VI_UAPSD(_pStart, _val) SET_BITS_TO_LE_1BYTE(_pStart, 1, 1, _val)
165
166#define GET_WMM_QOS_INFO_FIELD_STA_AC_BE_UAPSD(_pStart) LE_BITS_TO_1BYTE(_pStart, 2, 1)
167#define SET_WMM_QOS_INFO_FIELD_STA_AC_BE_UAPSD(_pStart, _val) SET_BITS_TO_LE_1BYTE(_pStart, 2, 1, _val)
168
169#define GET_WMM_QOS_INFO_FIELD_STA_AC_BK_UAPSD(_pStart) LE_BITS_TO_1BYTE(_pStart, 3, 1)
170#define SET_WMM_QOS_INFO_FIELD_STA_AC_BK_UAPSD(_pStart, _val) SET_BITS_TO_LE_1BYTE(_pStart, 3, 1, _val)
171
172#define GET_WMM_QOS_INFO_FIELD_STA_MAX_SP_LEN(_pStart) LE_BITS_TO_1BYTE(_pStart, 5, 2)
173#define SET_WMM_QOS_INFO_FIELD_STA_MAX_SP_LEN(_pStart, _val) SET_BITS_TO_LE_1BYTE(_pStart, 5, 2, _val)
174
175typedef enum {
176 QOSIE_SRC_ADDTSREQ,
177 QOSIE_SRC_ADDTSRSP,
178 QOSIE_SRC_REASOCREQ,
179 QOSIE_SRC_REASOCRSP,
180 QOSIE_SRC_DELTS,
181} QOSIE_SOURCE;
182
183
184typedef u32 AC_CODING;
185#define AC0_BE 0
186#define AC1_BK 1
187#define AC2_VI 2
188#define AC3_VO 3
189#define AC_MAX 4
190
191
192#define AC_PARAM_SIZE 4
193
194#define GET_WMM_AC_PARAM_AIFSN(_pStart) ( (u8)LE_BITS_TO_4BYTE(_pStart, 0, 4) )
195#define SET_WMM_AC_PARAM_AIFSN(_pStart, _val) SET_BITS_TO_LE_4BYTE(_pStart, 0, 4, _val)
196
197#define GET_WMM_AC_PARAM_ACM(_pStart) ( (u8)LE_BITS_TO_4BYTE(_pStart, 4, 1) )
198#define SET_WMM_AC_PARAM_ACM(_pStart, _val) SET_BITS_TO_LE_4BYTE(_pStart, 4, 1, _val)
199
200#define GET_WMM_AC_PARAM_ACI(_pStart) ( (u8)LE_BITS_TO_4BYTE(_pStart, 5, 2) )
201#define SET_WMM_AC_PARAM_ACI(_pStart, _val) SET_BITS_TO_LE_4BYTE(_pStart, 5, 2, _val)
202
203#define GET_WMM_AC_PARAM_ACI_AIFSN(_pStart) ( (u8)LE_BITS_TO_4BYTE(_pStart, 0, 8) )
204#define SET_WMM_AC_PARAM_ACI_AIFSN(_pStart, _val) SET_BITS_TO_LE_4BYTE(_pStart, 0, 8, _val)
205
206#define GET_WMM_AC_PARAM_ECWMIN(_pStart) ( (u8)LE_BITS_TO_4BYTE(_pStart, 8, 4) )
207#define SET_WMM_AC_PARAM_ECWMIN(_pStart, _val) SET_BITS_TO_LE_4BYTE(_pStart, 8, 4, _val)
208
209#define GET_WMM_AC_PARAM_ECWMAX(_pStart) ( (u8)LE_BITS_TO_4BYTE(_pStart, 12, 4) )
210#define SET_WMM_AC_PARAM_ECWMAX(_pStart, _val) SET_BITS_TO_LE_4BYTE(_pStart, 12, 4, _val)
211
212#define GET_WMM_AC_PARAM_TXOP_LIMIT(_pStart) ( (u8)LE_BITS_TO_4BYTE(_pStart, 16, 16) )
213#define SET_WMM_AC_PARAM_TXOP_LIMIT(_pStart, _val) SET_BITS_TO_LE_4BYTE(_pStart, 16, 16, _val)
214
215
216
217#define WMM_PARAM_ELEMENT_SIZE (8+(4*AC_PARAM_SIZE))
218
219typedef enum _QOS_ELE_SUBTYPE{
220 QOSELE_TYPE_INFO = 0x00,
221 QOSELE_TYPE_PARAM = 0x01,
222}QOS_ELE_SUBTYPE,*PQOS_ELE_SUBTYPE;
223
224
225typedef enum _DIRECTION_VALUE{
226 DIR_UP = 0,
227 DIR_DOWN = 1,
228 DIR_DIRECT = 2,
229 DIR_BI_DIR = 3,
230}DIRECTION_VALUE,*PDIRECTION_VALUE;
231
232typedef enum _ACM_METHOD{
233 eAcmWay0_SwAndHw = 0,
234 eAcmWay1_HW = 1,
235 eAcmWay2_SW = 2,
236}ACM_METHOD,*PACM_METHOD;
237
238
239typedef struct _ACM{
240 u64 UsedTime;
241 u64 MediumTime;
242 u8 HwAcmCtl;
243}ACM, *PACM;
244
245
246
247typedef u8 AC_UAPSD, *PAC_UAPSD;
248
249#define GET_VO_UAPSD(_apsd) ((_apsd) & BIT0)
250#define SET_VO_UAPSD(_apsd) ((_apsd) |= BIT0)
251
252#define GET_VI_UAPSD(_apsd) ((_apsd) & BIT1)
253#define SET_VI_UAPSD(_apsd) ((_apsd) |= BIT1)
254
255#define GET_BK_UAPSD(_apsd) ((_apsd) & BIT2)
256#define SET_BK_UAPSD(_apsd) ((_apsd) |= BIT2)
257
258#define GET_BE_UAPSD(_apsd) ((_apsd) & BIT3)
259#define SET_BE_UAPSD(_apsd) ((_apsd) |= BIT3)
260
261typedef union _QOS_TCLAS{
262
263 struct _TYPE_GENERAL{
264 u8 Priority;
265 u8 ClassifierType;
266 u8 Mask;
267 } TYPE_GENERAL;
268
269 struct _TYPE0_ETH{
270 u8 Priority;
271 u8 ClassifierType;
272 u8 Mask;
273 u8 SrcAddr[6];
274 u8 DstAddr[6];
275 u16 Type;
276 } TYPE0_ETH;
277
278 struct _TYPE1_IPV4{
279 u8 Priority;
280 u8 ClassifierType;
281 u8 Mask;
282 u8 Version;
283 u8 SrcIP[4];
284 u8 DstIP[4];
285 u16 SrcPort;
286 u16 DstPort;
287 u8 DSCP;
288 u8 Protocol;
289 u8 Reserved;
290 } TYPE1_IPV4;
291
292 struct _TYPE1_IPV6{
293 u8 Priority;
294 u8 ClassifierType;
295 u8 Mask;
296 u8 Version;
297 u8 SrcIP[16];
298 u8 DstIP[16];
299 u16 SrcPort;
300 u16 DstPort;
301 u8 FlowLabel[3];
302 } TYPE1_IPV6;
303
304 struct _TYPE2_8021Q{
305 u8 Priority;
306 u8 ClassifierType;
307 u8 Mask;
308 u16 TagType;
309 } TYPE2_8021Q;
310} QOS_TCLAS, *PQOS_TCLAS;
311
312typedef struct _QOS_TSTREAM{
313
314 bool bUsed;
315 u16 MsduLifetime;
316 bool bEstablishing;
317 u8 TimeSlotCount;
318 u8 DialogToken;
319 WMM_TSPEC TSpec;
320 WMM_TSPEC OutStandingTSpec;
321 u8 NominalPhyRate;
322} QOS_TSTREAM, *PQOS_TSTREAM;
323
324typedef struct _STA_QOS{
325 u8 WMMIEBuf[MAX_WMMELE_LENGTH];
326 u8* WMMIE;
327
328 QOS_MODE QosCapability;
329 QOS_MODE CurrentQosMode;
330
331 AC_UAPSD b4ac_Uapsd;
332 AC_UAPSD Curr4acUapsd;
333 u8 bInServicePeriod;
334 u8 MaxSPLength;
335 int NumBcnBeforeTrigger;
336
337 u8 * pWMMInfoEle;
338 u8 WMMParamEle[WMM_PARAM_ELEMENT_SIZE];
339
340 ACM acm[4];
341 ACM_METHOD AcmMethod;
342
343 QOS_TSTREAM StaTsArray[MAX_STA_TS_COUNT];
344 u8 DialogToken;
345 WMM_TSPEC TSpec;
346
347 u8 QBssWirelessMode;
348
349 bool bNoAck;
350
351 bool bEnableRxImmBA;
352
353}STA_QOS, *PSTA_QOS;
354
355#define QBSS_LOAD_SIZE 5
356#define GET_QBSS_LOAD_STA_COUNT(__pStart) ReadEF2Byte(__pStart)
357#define SET_QBSS_LOAD_STA_COUNT(__pStart, __Value) WriteEF2Byte(__pStart, __Value)
358#define GET_QBSS_LOAD_CHNL_UTILIZATION(__pStart) ReadEF1Byte((u8*)(__pStart) + 2)
359#define SET_QBSS_LOAD_CHNL_UTILIZATION(__pStart, __Value) WriteEF1Byte((u8*)(__pStart) + 2, __Value)
360#define GET_QBSS_LOAD_AVAILABLE_CAPACITY(__pStart) ReadEF2Byte((u8*)(__pStart) + 3)
361#define SET_QBSS_LOAD_AVAILABLE_CAPACITY(__pStart, __Value) WriteEF2Byte((u8*)(__pStart) + 3, __Value)
362
363typedef struct _BSS_QOS{
364
365 QOS_MODE bdQoSMode;
366 u8 bdWMMIEBuf[MAX_WMMELE_LENGTH];
367 OCTET_STRING bdWMMIE;
368
369 QOS_ELE_SUBTYPE EleSubType;
370
371 u8* pWMMInfoEle;
372 u8* pWMMParamEle;
373
374 u8 QBssLoad[QBSS_LOAD_SIZE];
375 bool bQBssLoadValid;
376}BSS_QOS, *PBSS_QOS;
377
378#define sQoSCtlLng 2
379#define QOS_CTRL_LEN(_QosMode) ( (_QosMode > QOS_DISABLE)? sQoSCtlLng : 0 )
380
381
382#define IsACValid(ac) ( ( ac>=0 && ac<=7 )? true : false )
383
384
385typedef union _ACI_AIFSN{
386 u8 charData;
387
388 struct
389 {
390 u8 AIFSN:4;
391 u8 ACM:1;
392 u8 ACI:2;
393 u8 Reserved:1;
394 }f;
395}ACI_AIFSN, *PACI_AIFSN;
396
397typedef union _ECW{
398 u8 charData;
399 struct
400 {
401 u8 ECWmin:4;
402 u8 ECWmax:4;
403 }f;
404}ECW, *PECW;
405
406typedef union _AC_PARAM{
407 u32 longData;
408 u8 charData[4];
409
410 struct
411 {
412 ACI_AIFSN AciAifsn;
413 ECW Ecw;
414 u16 TXOPLimit;
415 }f;
416}AC_PARAM, *PAC_PARAM;
417
418
419
420
421
422#endif
diff --git a/drivers/staging/rtl8192e/ieee80211/rtl819x_TS.h b/drivers/staging/rtl8192e/rtl819x_TS.h
index e7e26fd9639..095edfde6db 100644
--- a/drivers/staging/rtl8192e/ieee80211/rtl819x_TS.h
+++ b/drivers/staging/rtl8192e/rtl819x_TS.h
@@ -1,14 +1,31 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/
1#ifndef _TSTYPE_H_ 19#ifndef _TSTYPE_H_
2#define _TSTYPE_H_ 20#define _TSTYPE_H_
3#include "rtl819x_Qos.h" 21#include "rtl819x_Qos.h"
4#define TS_SETUP_TIMEOUT 60 // In millisecond 22#define TS_SETUP_TIMEOUT 60
5#define TS_INACT_TIMEOUT 60 23#define TS_INACT_TIMEOUT 60
6#define TS_ADDBA_DELAY 60 24#define TS_ADDBA_DELAY 60
7 25
8#define TOTAL_TS_NUM 16 26#define TOTAL_TS_NUM 16
9#define TCLAS_NUM 4 27#define TCLAS_NUM 4
10 28
11// This define the Tx/Rx directions
12typedef enum _TR_SELECT { 29typedef enum _TR_SELECT {
13 TX_DIR = 0, 30 TX_DIR = 0,
14 RX_DIR = 1, 31 RX_DIR = 1,
@@ -28,12 +45,12 @@ typedef struct _TS_COMMON_INFO{
28typedef struct _TX_TS_RECORD{ 45typedef struct _TX_TS_RECORD{
29 TS_COMMON_INFO TsCommonInfo; 46 TS_COMMON_INFO TsCommonInfo;
30 u16 TxCurSeq; 47 u16 TxCurSeq;
31 BA_RECORD TxPendingBARecord; // For BA Originator 48 BA_RECORD TxPendingBARecord;
32 BA_RECORD TxAdmittedBARecord; // For BA Originator 49 BA_RECORD TxAdmittedBARecord;
33// QOS_DL_RECORD DLRecord;
34 u8 bAddBaReqInProgress; 50 u8 bAddBaReqInProgress;
35 u8 bAddBaReqDelayed; 51 u8 bAddBaReqDelayed;
36 u8 bUsingBa; 52 u8 bUsingBa;
53 u8 bDisable_AddBa;
37 struct timer_list TsAddBaTimer; 54 struct timer_list TsAddBaTimer;
38 u8 num; 55 u8 num;
39} TX_TS_RECORD, *PTX_TS_RECORD; 56} TX_TS_RECORD, *PTX_TS_RECORD;
@@ -44,13 +61,11 @@ typedef struct _RX_TS_RECORD {
44 u16 RxTimeoutIndicateSeq; 61 u16 RxTimeoutIndicateSeq;
45 struct list_head RxPendingPktList; 62 struct list_head RxPendingPktList;
46 struct timer_list RxPktPendingTimer; 63 struct timer_list RxPktPendingTimer;
47 BA_RECORD RxAdmittedBARecord; // For BA Recipient 64 BA_RECORD RxAdmittedBARecord;
48 u16 RxLastSeqNum; 65 u16 RxLastSeqNum;
49 u8 RxLastFragNum; 66 u8 RxLastFragNum;
50 u8 num; 67 u8 num;
51// QOS_DL_RECORD DLRecord;
52} RX_TS_RECORD, *PRX_TS_RECORD; 68} RX_TS_RECORD, *PRX_TS_RECORD;
53 69
54 70
55#endif 71#endif
56
diff --git a/drivers/staging/rtl8192e/rtl819x_TSProc.c b/drivers/staging/rtl8192e/rtl819x_TSProc.c
new file mode 100644
index 00000000000..0900bfa5fad
--- /dev/null
+++ b/drivers/staging/rtl8192e/rtl819x_TSProc.c
@@ -0,0 +1,647 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/
19#include "rtllib.h"
20#include <linux/etherdevice.h>
21#include "rtl819x_TS.h"
22extern void _setup_timer( struct timer_list*, void*, unsigned long);
23#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
24#define list_for_each_entry_safe(pos, n, head, member) \
25 for (pos = list_entry((head)->next, typeof(*pos), member), \
26 n = list_entry(pos->member.next, typeof(*pos), member); \
27 &pos->member != (head); \
28 pos = n, n = list_entry(n->member.next, typeof(*n), member))
29#endif
30void TsSetupTimeOut(unsigned long data)
31{
32}
33
34void TsInactTimeout(unsigned long data)
35{
36}
37
38void RxPktPendingTimeout(unsigned long data)
39{
40 PRX_TS_RECORD pRxTs = (PRX_TS_RECORD)data;
41 struct rtllib_device *ieee = container_of(pRxTs, struct rtllib_device, RxTsRecord[pRxTs->num]);
42
43 PRX_REORDER_ENTRY pReorderEntry = NULL;
44
45 unsigned long flags = 0;
46 struct rtllib_rxb *stats_IndicateArray[REORDER_WIN_SIZE];
47 u8 index = 0;
48 bool bPktInBuf = false;
49
50 spin_lock_irqsave(&(ieee->reorder_spinlock), flags);
51 if (pRxTs->RxTimeoutIndicateSeq != 0xffff)
52 {
53 while(!list_empty(&pRxTs->RxPendingPktList))
54 {
55 pReorderEntry = (PRX_REORDER_ENTRY)list_entry(pRxTs->RxPendingPktList.prev,RX_REORDER_ENTRY,List);
56 if (index == 0)
57 pRxTs->RxIndicateSeq = pReorderEntry->SeqNum;
58
59 if ( SN_LESS(pReorderEntry->SeqNum, pRxTs->RxIndicateSeq) ||
60 SN_EQUAL(pReorderEntry->SeqNum, pRxTs->RxIndicateSeq) )
61 {
62 list_del_init(&pReorderEntry->List);
63
64 if (SN_EQUAL(pReorderEntry->SeqNum, pRxTs->RxIndicateSeq))
65 pRxTs->RxIndicateSeq = (pRxTs->RxIndicateSeq + 1) % 4096;
66
67 RTLLIB_DEBUG(RTLLIB_DL_REORDER,"%s(): Indicate SeqNum: %d\n",__func__, pReorderEntry->SeqNum);
68 stats_IndicateArray[index] = pReorderEntry->prxb;
69 index++;
70
71 list_add_tail(&pReorderEntry->List, &ieee->RxReorder_Unused_List);
72 }
73 else
74 {
75 bPktInBuf = true;
76 break;
77 }
78 }
79 }
80
81 if (index>0){
82 pRxTs->RxTimeoutIndicateSeq = 0xffff;
83
84 if (index > REORDER_WIN_SIZE){
85 RTLLIB_DEBUG(RTLLIB_DL_ERR, "RxReorderIndicatePacket(): Rx Reorer buffer full!! \n");
86 spin_unlock_irqrestore(&(ieee->reorder_spinlock), flags);
87 return;
88 }
89 rtllib_indicate_packets(ieee, stats_IndicateArray, index);
90 bPktInBuf = false;
91 }
92
93 if (bPktInBuf && (pRxTs->RxTimeoutIndicateSeq==0xffff)){
94 pRxTs->RxTimeoutIndicateSeq = pRxTs->RxIndicateSeq;
95 mod_timer(&pRxTs->RxPktPendingTimer, jiffies + MSECS(ieee->pHTInfo->RxReorderPendingTime));
96 }
97 spin_unlock_irqrestore(&(ieee->reorder_spinlock), flags);
98}
99
100void TsAddBaProcess(unsigned long data)
101{
102 PTX_TS_RECORD pTxTs = (PTX_TS_RECORD)data;
103 u8 num = pTxTs->num;
104 struct rtllib_device *ieee = container_of(pTxTs, struct rtllib_device, TxTsRecord[num]);
105
106 TsInitAddBA(ieee, pTxTs, BA_POLICY_IMMEDIATE, false);
107 RTLLIB_DEBUG(RTLLIB_DL_BA, "TsAddBaProcess(): ADDBA Req is started!! \n");
108}
109
110
111void ResetTsCommonInfo(PTS_COMMON_INFO pTsCommonInfo)
112{
113 memset(pTsCommonInfo->Addr, 0, 6);
114 memset(&pTsCommonInfo->TSpec, 0, sizeof(TSPEC_BODY));
115 memset(&pTsCommonInfo->TClass, 0, sizeof(QOS_TCLAS)*TCLAS_NUM);
116 pTsCommonInfo->TClasProc = 0;
117 pTsCommonInfo->TClasNum = 0;
118}
119
120void ResetTxTsEntry(PTX_TS_RECORD pTS)
121{
122 ResetTsCommonInfo(&pTS->TsCommonInfo);
123 pTS->TxCurSeq = 0;
124 pTS->bAddBaReqInProgress = false;
125 pTS->bAddBaReqDelayed = false;
126 pTS->bUsingBa = false;
127 pTS->bDisable_AddBa = false;
128 ResetBaEntry(&pTS->TxAdmittedBARecord);
129 ResetBaEntry(&pTS->TxPendingBARecord);
130}
131
132void ResetRxTsEntry(PRX_TS_RECORD pTS)
133{
134 ResetTsCommonInfo(&pTS->TsCommonInfo);
135 pTS->RxIndicateSeq = 0xffff;
136 pTS->RxTimeoutIndicateSeq = 0xffff;
137 ResetBaEntry(&pTS->RxAdmittedBARecord);
138}
139#ifdef _RTL8192_EXT_PATCH_
140void ResetAdmitTRStream(struct rtllib_device *ieee, u8 *Addr)
141{
142 u8 dir;
143 bool search_dir[4] = {0, 0, 0, 0};
144 struct list_head* psearch_list;
145 PTS_COMMON_INFO pRet = NULL;
146 PRX_TS_RECORD pRxTS = NULL;
147 PTX_TS_RECORD pTxTS = NULL;
148
149 if (ieee->iw_mode != IW_MODE_MESH)
150 return;
151
152 search_dir[DIR_DOWN] = true;
153 psearch_list = &ieee->Rx_TS_Admit_List;
154 for (dir = 0; dir <= DIR_BI_DIR; dir++)
155 {
156 if (search_dir[dir] ==false )
157 continue;
158 list_for_each_entry(pRet, psearch_list, List){
159 if ((memcmp(pRet->Addr, Addr, 6) == 0) && (pRet->TSpec.f.TSInfo.field.ucDirection == dir))
160 {
161 pRxTS = (PRX_TS_RECORD)pRet;
162 pRxTS->RxIndicateSeq = 0xffff;
163 pRxTS->RxTimeoutIndicateSeq = 0xffff;
164 }
165
166 }
167 }
168 search_dir[DIR_UP] = true;
169 psearch_list = &ieee->Tx_TS_Admit_List;
170 for (dir = 0; dir <= DIR_BI_DIR; dir++)
171 {
172 if (search_dir[dir] ==false )
173 continue;
174 list_for_each_entry(pRet, psearch_list, List){
175 if ((memcmp(pRet->Addr, Addr, 6) == 0) && (pRet->TSpec.f.TSInfo.field.ucDirection == dir))
176 {
177 pTxTS = (PTX_TS_RECORD)pRet;
178 pTxTS->TxCurSeq = 0xffff;
179 }
180
181 }
182 }
183
184 return;
185}
186#endif
187
188void TSInitialize(struct rtllib_device *ieee)
189{
190 PTX_TS_RECORD pTxTS = ieee->TxTsRecord;
191 PRX_TS_RECORD pRxTS = ieee->RxTsRecord;
192 PRX_REORDER_ENTRY pRxReorderEntry = ieee->RxReorderEntry;
193 u8 count = 0;
194 RTLLIB_DEBUG(RTLLIB_DL_TS, "==========>%s()\n", __func__);
195 INIT_LIST_HEAD(&ieee->Tx_TS_Admit_List);
196 INIT_LIST_HEAD(&ieee->Tx_TS_Pending_List);
197 INIT_LIST_HEAD(&ieee->Tx_TS_Unused_List);
198
199 for (count = 0; count < TOTAL_TS_NUM; count++)
200 {
201 pTxTS->num = count;
202 _setup_timer(&pTxTS->TsCommonInfo.SetupTimer,
203 TsSetupTimeOut,
204 (unsigned long) pTxTS);
205
206 _setup_timer(&pTxTS->TsCommonInfo.InactTimer,
207 TsInactTimeout,
208 (unsigned long) pTxTS);
209
210 _setup_timer(&pTxTS->TsAddBaTimer,
211 TsAddBaProcess,
212 (unsigned long) pTxTS);
213
214 _setup_timer(&pTxTS->TxPendingBARecord.Timer,
215 BaSetupTimeOut,
216 (unsigned long) pTxTS);
217 _setup_timer(&pTxTS->TxAdmittedBARecord.Timer,
218 TxBaInactTimeout,
219 (unsigned long) pTxTS);
220
221 ResetTxTsEntry(pTxTS);
222 list_add_tail(&pTxTS->TsCommonInfo.List,
223 &ieee->Tx_TS_Unused_List);
224 pTxTS++;
225 }
226
227 INIT_LIST_HEAD(&ieee->Rx_TS_Admit_List);
228 INIT_LIST_HEAD(&ieee->Rx_TS_Pending_List);
229 INIT_LIST_HEAD(&ieee->Rx_TS_Unused_List);
230 for (count = 0; count < TOTAL_TS_NUM; count++)
231 {
232 pRxTS->num = count;
233 INIT_LIST_HEAD(&pRxTS->RxPendingPktList);
234
235 _setup_timer(&pRxTS->TsCommonInfo.SetupTimer,
236 TsSetupTimeOut,
237 (unsigned long) pRxTS);
238
239 _setup_timer(&pRxTS->TsCommonInfo.InactTimer,
240 TsInactTimeout,
241 (unsigned long) pRxTS);
242
243 _setup_timer(&pRxTS->RxAdmittedBARecord.Timer,
244 RxBaInactTimeout,
245 (unsigned long) pRxTS);
246
247 _setup_timer(&pRxTS->RxPktPendingTimer,
248 RxPktPendingTimeout,
249 (unsigned long) pRxTS);
250
251 ResetRxTsEntry(pRxTS);
252 list_add_tail(&pRxTS->TsCommonInfo.List, &ieee->Rx_TS_Unused_List);
253 pRxTS++;
254 }
255 INIT_LIST_HEAD(&ieee->RxReorder_Unused_List);
256 for (count = 0; count < REORDER_ENTRY_NUM; count++)
257 {
258 list_add_tail( &pRxReorderEntry->List,&ieee->RxReorder_Unused_List);
259 if (count == (REORDER_ENTRY_NUM-1))
260 break;
261 pRxReorderEntry = &ieee->RxReorderEntry[count+1];
262 }
263
264}
265
266void AdmitTS(struct rtllib_device *ieee, PTS_COMMON_INFO pTsCommonInfo, u32 InactTime)
267{
268 del_timer_sync(&pTsCommonInfo->SetupTimer);
269 del_timer_sync(&pTsCommonInfo->InactTimer);
270
271 if (InactTime!=0)
272 mod_timer(&pTsCommonInfo->InactTimer, jiffies + MSECS(InactTime));
273}
274
275
276PTS_COMMON_INFO SearchAdmitTRStream(struct rtllib_device *ieee, u8* Addr, u8 TID, TR_SELECT TxRxSelect)
277{
278 u8 dir;
279 bool search_dir[4] = {0, 0, 0, 0};
280 struct list_head* psearch_list;
281 PTS_COMMON_INFO pRet = NULL;
282 if (ieee->iw_mode == IW_MODE_MASTER)
283 {
284 if (TxRxSelect == TX_DIR)
285 {
286 search_dir[DIR_DOWN] = true;
287 search_dir[DIR_BI_DIR]= true;
288 }
289 else
290 {
291 search_dir[DIR_UP] = true;
292 search_dir[DIR_BI_DIR]= true;
293 }
294 }
295 else if (ieee->iw_mode == IW_MODE_ADHOC)
296 {
297 if (TxRxSelect == TX_DIR)
298 search_dir[DIR_UP] = true;
299 else
300 search_dir[DIR_DOWN] = true;
301 }
302 else
303 {
304 if (TxRxSelect == TX_DIR)
305 {
306 search_dir[DIR_UP] = true;
307 search_dir[DIR_BI_DIR]= true;
308 search_dir[DIR_DIRECT]= true;
309 }
310 else
311 {
312 search_dir[DIR_DOWN] = true;
313 search_dir[DIR_BI_DIR]= true;
314 search_dir[DIR_DIRECT]= true;
315 }
316 }
317
318 if (TxRxSelect == TX_DIR)
319 psearch_list = &ieee->Tx_TS_Admit_List;
320 else
321 psearch_list = &ieee->Rx_TS_Admit_List;
322
323 for (dir = 0; dir <= DIR_BI_DIR; dir++)
324 {
325 if (search_dir[dir] ==false )
326 continue;
327 list_for_each_entry(pRet, psearch_list, List){
328 if (memcmp(pRet->Addr, Addr, 6) == 0)
329 if (pRet->TSpec.f.TSInfo.field.ucTSID == TID)
330 if (pRet->TSpec.f.TSInfo.field.ucDirection == dir)
331 {
332 break;
333 }
334
335 }
336 if (&pRet->List != psearch_list)
337 break;
338 }
339
340 if (&pRet->List != psearch_list){
341 return pRet ;
342 }
343 else
344 return NULL;
345}
346
347void MakeTSEntry(
348 PTS_COMMON_INFO pTsCommonInfo,
349 u8* Addr,
350 PTSPEC_BODY pTSPEC,
351 PQOS_TCLAS pTCLAS,
352 u8 TCLAS_Num,
353 u8 TCLAS_Proc
354 )
355{
356 u8 count;
357
358 if (pTsCommonInfo == NULL)
359 return;
360
361 memcpy(pTsCommonInfo->Addr, Addr, 6);
362
363 if (pTSPEC != NULL)
364 memcpy((u8*)(&(pTsCommonInfo->TSpec)), (u8*)pTSPEC, sizeof(TSPEC_BODY));
365
366 for (count = 0; count < TCLAS_Num; count++)
367 memcpy((u8*)(&(pTsCommonInfo->TClass[count])), (u8*)pTCLAS, sizeof(QOS_TCLAS));
368
369 pTsCommonInfo->TClasProc = TCLAS_Proc;
370 pTsCommonInfo->TClasNum = TCLAS_Num;
371}
372
373#ifdef _RTL8192_EXT_PATCH_
374void dump_ts_list(struct list_head * ts_list)
375{
376 PTS_COMMON_INFO pRet = NULL;
377 u8 i=0;
378 list_for_each_entry(pRet, ts_list, List){
379 printk("i=%d ADD:"MAC_FMT", TID:%d, dir:%d\n",i,MAC_ARG(pRet->Addr), pRet->TSpec.f.TSInfo.field.ucTSID, pRet->TSpec.f.TSInfo.field.ucDirection);
380 i++;
381 }
382
383}
384#endif
385
386bool GetTs(
387 struct rtllib_device* ieee,
388 PTS_COMMON_INFO *ppTS,
389 u8* Addr,
390 u8 TID,
391 TR_SELECT TxRxSelect,
392 bool bAddNewTs)
393{
394 u8 UP = 0;
395 if (is_broadcast_ether_addr(Addr) || is_multicast_ether_addr(Addr))
396 {
397 RTLLIB_DEBUG(RTLLIB_DL_ERR, "ERR! get TS for Broadcast or Multicast\n");
398 return false;
399 }
400 if (ieee->current_network.qos_data.supported == 0) {
401 UP = 0;
402 } else {
403 if (!IsACValid(TID)) {
404 RTLLIB_DEBUG(RTLLIB_DL_ERR, "ERR! in %s(), TID(%d) is not valid\n", __func__, TID);
405 return false;
406 }
407
408 switch (TID) {
409 case 0:
410 case 3:
411 UP = 0;
412 break;
413 case 1:
414 case 2:
415 UP = 2;
416 break;
417 case 4:
418 case 5:
419 UP = 5;
420 break;
421 case 6:
422 case 7:
423 UP = 7;
424 break;
425 }
426 }
427
428 *ppTS = SearchAdmitTRStream(
429 ieee,
430 Addr,
431 UP,
432 TxRxSelect);
433 if (*ppTS != NULL)
434 {
435 return true;
436 }
437 else
438 {
439 if (bAddNewTs == false)
440 {
441 RTLLIB_DEBUG(RTLLIB_DL_TS, "add new TS failed(tid:%d)\n", UP);
442 return false;
443 }
444 else
445 {
446 TSPEC_BODY TSpec;
447 PQOS_TSINFO pTSInfo = &TSpec.f.TSInfo;
448 struct list_head* pUnusedList =
449 (TxRxSelect == TX_DIR)?
450 (&ieee->Tx_TS_Unused_List):
451 (&ieee->Rx_TS_Unused_List);
452
453 struct list_head* pAddmitList =
454 (TxRxSelect == TX_DIR)?
455 (&ieee->Tx_TS_Admit_List):
456 (&ieee->Rx_TS_Admit_List);
457
458 DIRECTION_VALUE Dir = (ieee->iw_mode == IW_MODE_MASTER)?
459 ((TxRxSelect==TX_DIR)?DIR_DOWN:DIR_UP):
460 ((TxRxSelect==TX_DIR)?DIR_UP:DIR_DOWN);
461 RTLLIB_DEBUG(RTLLIB_DL_TS, "to add Ts\n");
462 if (!list_empty(pUnusedList))
463 {
464 (*ppTS) = list_entry(pUnusedList->next, TS_COMMON_INFO, List);
465 list_del_init(&(*ppTS)->List);
466 if (TxRxSelect==TX_DIR)
467 {
468 PTX_TS_RECORD tmp = container_of(*ppTS, TX_TS_RECORD, TsCommonInfo);
469 ResetTxTsEntry(tmp);
470 }
471 else{
472 PRX_TS_RECORD tmp = container_of(*ppTS, RX_TS_RECORD, TsCommonInfo);
473 ResetRxTsEntry(tmp);
474 }
475
476 RTLLIB_DEBUG(RTLLIB_DL_TS, "to init current TS, UP:%d, Dir:%d, addr:"MAC_FMT" ppTs=%p\n", UP, Dir, MAC_ARG(Addr), *ppTS);
477 pTSInfo->field.ucTrafficType = 0;
478 pTSInfo->field.ucTSID = UP;
479 pTSInfo->field.ucDirection = Dir;
480 pTSInfo->field.ucAccessPolicy = 1;
481 pTSInfo->field.ucAggregation = 0;
482 pTSInfo->field.ucPSB = 0;
483 pTSInfo->field.ucUP = UP;
484 pTSInfo->field.ucTSInfoAckPolicy = 0;
485 pTSInfo->field.ucSchedule = 0;
486
487 MakeTSEntry(*ppTS, Addr, &TSpec, NULL, 0, 0);
488 AdmitTS(ieee, *ppTS, 0);
489 list_add_tail(&((*ppTS)->List), pAddmitList);
490
491 return true;
492 }
493 else
494 {
495 RTLLIB_DEBUG(RTLLIB_DL_ERR, "ERR!!in function %s() There is not enough dir=%d(0=up down=1) TS record to be used!!", __func__,Dir);
496 return false;
497 }
498 }
499 }
500}
501
502void RemoveTsEntry(
503 struct rtllib_device* ieee,
504 PTS_COMMON_INFO pTs,
505 TR_SELECT TxRxSelect
506 )
507{
508 del_timer_sync(&pTs->SetupTimer);
509 del_timer_sync(&pTs->InactTimer);
510 TsInitDelBA(ieee, pTs, TxRxSelect);
511
512 if (TxRxSelect == RX_DIR)
513 {
514 PRX_REORDER_ENTRY pRxReorderEntry;
515 PRX_TS_RECORD pRxTS = (PRX_TS_RECORD)pTs;
516
517 if (timer_pending(&pRxTS->RxPktPendingTimer))
518 del_timer_sync(&pRxTS->RxPktPendingTimer);
519
520 while(!list_empty(&pRxTS->RxPendingPktList)){
521 pRxReorderEntry = (PRX_REORDER_ENTRY)list_entry(pRxTS->RxPendingPktList.prev,RX_REORDER_ENTRY,List);
522 RTLLIB_DEBUG(RTLLIB_DL_REORDER,"%s(): Delete SeqNum %d!\n",__func__, pRxReorderEntry->SeqNum);
523 list_del_init(&pRxReorderEntry->List);
524 {
525 int i = 0;
526 struct rtllib_rxb * prxb = pRxReorderEntry->prxb;
527 if (unlikely(!prxb)){
528 return;
529 }
530 for (i =0; i < prxb->nr_subframes; i++) {
531 dev_kfree_skb(prxb->subframes[i]);
532 }
533 kfree(prxb);
534 prxb = NULL;
535 }
536 list_add_tail(&pRxReorderEntry->List,&ieee->RxReorder_Unused_List);
537 }
538 }
539 else{
540 PTX_TS_RECORD pTxTS = (PTX_TS_RECORD)pTs;
541 del_timer_sync(&pTxTS->TsAddBaTimer);
542 }
543}
544
545void RemovePeerTS(struct rtllib_device* ieee, u8* Addr)
546{
547 PTS_COMMON_INFO pTS, pTmpTS;
548 printk("===========>RemovePeerTS,"MAC_FMT"\n", MAC_ARG(Addr));
549#if 1
550 list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Pending_List, List)
551 {
552 if (memcmp(pTS->Addr, Addr, 6) == 0)
553 {
554 RemoveTsEntry(ieee, pTS, TX_DIR);
555 list_del_init(&pTS->List);
556 list_add_tail(&pTS->List, &ieee->Tx_TS_Unused_List);
557 }
558 }
559
560 list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Admit_List, List)
561 {
562 if (memcmp(pTS->Addr, Addr, 6) == 0)
563 {
564 printk("====>remove Tx_TS_admin_list\n");
565 RemoveTsEntry(ieee, pTS, TX_DIR);
566 list_del_init(&pTS->List);
567 list_add_tail(&pTS->List, &ieee->Tx_TS_Unused_List);
568 }
569 }
570
571 list_for_each_entry_safe(pTS, pTmpTS, &ieee->Rx_TS_Pending_List, List)
572 {
573 if (memcmp(pTS->Addr, Addr, 6) == 0)
574 {
575 RemoveTsEntry(ieee, pTS, RX_DIR);
576 list_del_init(&pTS->List);
577 list_add_tail(&pTS->List, &ieee->Rx_TS_Unused_List);
578 }
579 }
580
581 list_for_each_entry_safe(pTS, pTmpTS, &ieee->Rx_TS_Admit_List, List)
582 {
583 if (memcmp(pTS->Addr, Addr, 6) == 0)
584 {
585 RemoveTsEntry(ieee, pTS, RX_DIR);
586 list_del_init(&pTS->List);
587 list_add_tail(&pTS->List, &ieee->Rx_TS_Unused_List);
588 }
589 }
590#endif
591}
592
593void RemoveAllTS(struct rtllib_device* ieee)
594{
595 PTS_COMMON_INFO pTS, pTmpTS;
596#if 1
597 list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Pending_List, List)
598 {
599 RemoveTsEntry(ieee, pTS, TX_DIR);
600 list_del_init(&pTS->List);
601 list_add_tail(&pTS->List, &ieee->Tx_TS_Unused_List);
602 }
603
604 list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Admit_List, List)
605 {
606 RemoveTsEntry(ieee, pTS, TX_DIR);
607 list_del_init(&pTS->List);
608 list_add_tail(&pTS->List, &ieee->Tx_TS_Unused_List);
609 }
610
611 list_for_each_entry_safe(pTS, pTmpTS, &ieee->Rx_TS_Pending_List, List)
612 {
613 RemoveTsEntry(ieee, pTS, RX_DIR);
614 list_del_init(&pTS->List);
615 list_add_tail(&pTS->List, &ieee->Rx_TS_Unused_List);
616 }
617
618 list_for_each_entry_safe(pTS, pTmpTS, &ieee->Rx_TS_Admit_List, List)
619 {
620 RemoveTsEntry(ieee, pTS, RX_DIR);
621 list_del_init(&pTS->List);
622 list_add_tail(&pTS->List, &ieee->Rx_TS_Unused_List);
623 }
624#endif
625}
626
627void TsStartAddBaProcess(struct rtllib_device* ieee, PTX_TS_RECORD pTxTS)
628{
629 if (pTxTS->bAddBaReqInProgress == false)
630 {
631 pTxTS->bAddBaReqInProgress = true;
632#if 1
633 if (pTxTS->bAddBaReqDelayed)
634 {
635 RTLLIB_DEBUG(RTLLIB_DL_BA, "TsStartAddBaProcess(): Delayed Start ADDBA after 60 sec!!\n");
636 mod_timer(&pTxTS->TsAddBaTimer, jiffies + MSECS(TS_ADDBA_DELAY));
637 }
638 else
639 {
640 RTLLIB_DEBUG(RTLLIB_DL_BA,"TsStartAddBaProcess(): Immediately Start ADDBA now!!\n");
641 mod_timer(&pTxTS->TsAddBaTimer, jiffies+10);
642 }
643#endif
644 }
645 else
646 RTLLIB_DEBUG(RTLLIB_DL_BA, "%s()==>BA timer is already added\n", __func__);
647}
diff --git a/drivers/staging/rtl8192e/rtl_cam.c b/drivers/staging/rtl8192e/rtl_cam.c
new file mode 100644
index 00000000000..c2d51bc5a87
--- /dev/null
+++ b/drivers/staging/rtl8192e/rtl_cam.c
@@ -0,0 +1,379 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * Based on the r8180 driver, which is:
5 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 *
19 * The full GNU General Public License is included in this distribution in the
20 * file called LICENSE.
21 *
22 * Contact Information:
23 * wlanfae <wlanfae@realtek.com>
24******************************************************************************/
25#include "rtl_core.h"
26#include "r8192E_phy.h"
27#include "r8192E_phyreg.h"
28#include "r8190P_rtl8256.h" /* RTL8225 Radio frontend */
29#include "r8192E_cmdpkt.h"
30
31extern int hwwep;
32void CamResetAllEntry(struct net_device *dev)
33{
34 u32 ulcommand = 0;
35
36 ulcommand |= BIT31|BIT30;
37 write_nic_dword(dev, RWCAM, ulcommand);
38}
39
40void write_cam(struct net_device *dev, u8 addr, u32 data)
41{
42 write_nic_dword(dev, WCAMI, data);
43 write_nic_dword(dev, RWCAM, BIT31|BIT16|(addr&0xff) );
44}
45
46u32 read_cam(struct net_device *dev, u8 addr)
47{
48 write_nic_dword(dev, RWCAM, 0x80000000|(addr&0xff) );
49 return read_nic_dword(dev, 0xa8);
50}
51
52void EnableHWSecurityConfig8192(struct net_device *dev)
53{
54 u8 SECR_value = 0x0;
55 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
56 struct rtllib_device* ieee = priv->rtllib;
57 SECR_value = SCR_TxEncEnable | SCR_RxDecEnable;
58 if (((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type)) && (priv->rtllib->auth_mode != 2))
59 {
60 SECR_value |= SCR_RxUseDK;
61 SECR_value |= SCR_TxUseDK;
62 }
63 else if ((ieee->iw_mode == IW_MODE_ADHOC) && (ieee->pairwise_key_type & (KEY_TYPE_CCMP | KEY_TYPE_TKIP)))
64 {
65 SECR_value |= SCR_RxUseDK;
66 SECR_value |= SCR_TxUseDK;
67 }
68
69
70 ieee->hwsec_active = 1;
71 if ((ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE) || !hwwep)
72 {
73 ieee->hwsec_active = 0;
74 SECR_value &= ~SCR_RxDecEnable;
75 }
76
77 RT_TRACE(COMP_SEC,"%s:, hwsec:%d, pairwise_key:%d, SECR_value:%x\n", __func__, \
78 ieee->hwsec_active, ieee->pairwise_key_type, SECR_value);
79 {
80 write_nic_byte(dev, SECR, SECR_value);
81 }
82}
83
84void set_swcam(struct net_device *dev,
85 u8 EntryNo,
86 u8 KeyIndex,
87 u16 KeyType,
88 u8 *MacAddr,
89 u8 DefaultKey,
90 u32 *KeyContent,
91 u8 is_mesh)
92{
93 struct r8192_priv *priv = rtllib_priv(dev);
94 struct rtllib_device *ieee = priv->rtllib;
95 RT_TRACE(COMP_DBG, "===========>%s():EntryNo is %d,KeyIndex is "
96 "%d,KeyType is %d,is_mesh is %d\n", __func__, EntryNo,
97 KeyIndex, KeyType, is_mesh);
98 if (is_mesh){
99 } else {
100 ieee->swcamtable[EntryNo].bused=true;
101 ieee->swcamtable[EntryNo].key_index=KeyIndex;
102 ieee->swcamtable[EntryNo].key_type=KeyType;
103 memcpy(ieee->swcamtable[EntryNo].macaddr,MacAddr,6);
104 ieee->swcamtable[EntryNo].useDK=DefaultKey;
105 memcpy(ieee->swcamtable[EntryNo].key_buf,(u8*)KeyContent,16);
106 }
107}
108
109void setKey(struct net_device *dev,
110 u8 EntryNo,
111 u8 KeyIndex,
112 u16 KeyType,
113 u8 *MacAddr,
114 u8 DefaultKey,
115 u32 *KeyContent )
116{
117 u32 TargetCommand = 0;
118 u32 TargetContent = 0;
119 u16 usConfig = 0;
120 u8 i;
121 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
122 RT_RF_POWER_STATE rtState;
123 rtState = priv->rtllib->eRFPowerState;
124 if (priv->rtllib->PowerSaveControl.bInactivePs){
125 if (rtState == eRfOff){
126 if (priv->rtllib->RfOffReason > RF_CHANGE_BY_IPS)
127 {
128 RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__func__);
129 return ;
130 }
131 else{
132 down(&priv->rtllib->ips_sem);
133 IPSLeave(dev);
134 up(&priv->rtllib->ips_sem); }
135 }
136 }
137 priv->rtllib->is_set_key = true;
138 if (EntryNo >= TOTAL_CAM_ENTRY)
139 RT_TRACE(COMP_ERR, "cam entry exceeds in setKey()\n");
140
141 RT_TRACE(COMP_SEC, "====>to setKey(), dev:%p, EntryNo:%d, KeyIndex:%d,"
142 "KeyType:%d, MacAddr"MAC_FMT"\n", dev,EntryNo, KeyIndex,
143 KeyType, MAC_ARG(MacAddr));
144
145 if (DefaultKey)
146 usConfig |= BIT15 | (KeyType<<2);
147 else
148 usConfig |= BIT15 | (KeyType<<2) | KeyIndex;
149
150
151 for (i = 0; i < CAM_CONTENT_COUNT; i++) {
152 TargetCommand = i+CAM_CONTENT_COUNT*EntryNo;
153 TargetCommand |= BIT31|BIT16;
154
155 if (i == 0) {
156 TargetContent = (u32)(*(MacAddr+0)) << 16|
157 (u32)(*(MacAddr+1)) << 24|
158 (u32)usConfig;
159
160 write_nic_dword(dev, WCAMI, TargetContent);
161 write_nic_dword(dev, RWCAM, TargetCommand);
162 } else if (i == 1) {
163 TargetContent = (u32)(*(MacAddr+2)) |
164 (u32)(*(MacAddr+3)) << 8|
165 (u32)(*(MacAddr+4)) << 16|
166 (u32)(*(MacAddr+5)) << 24;
167 write_nic_dword(dev, WCAMI, TargetContent);
168 write_nic_dword(dev, RWCAM, TargetCommand);
169 } else {
170 if (KeyContent != NULL) {
171 write_nic_dword(dev, WCAMI, (u32)(*(KeyContent+i-2)) );
172 write_nic_dword(dev, RWCAM, TargetCommand);
173#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,31))
174 udelay(100);
175#endif
176 }
177 }
178 }
179 RT_TRACE(COMP_SEC,"=========>after set key, usconfig:%x\n", usConfig);
180}
181
182void CAM_read_entry(struct net_device *dev, u32 iIndex)
183{
184 u32 target_command=0;
185 u32 target_content=0;
186 u8 entry_i=0;
187 u32 ulStatus;
188 s32 i=100;
189 for (entry_i=0;entry_i<CAM_CONTENT_COUNT;entry_i++)
190 {
191 target_command= entry_i+CAM_CONTENT_COUNT*iIndex;
192 target_command= target_command | BIT31;
193
194 while((i--)>=0)
195 {
196 ulStatus = read_nic_dword(dev, RWCAM);
197 if (ulStatus & BIT31){
198 continue;
199 }
200 else{
201 break;
202 }
203 }
204 write_nic_dword(dev, RWCAM, target_command);
205 RT_TRACE(COMP_SEC,"CAM_read_entry(): WRITE A0: %x \n",target_command);
206 target_content = read_nic_dword(dev, RCAMO);
207 RT_TRACE(COMP_SEC, "CAM_read_entry(): WRITE A8: %x \n",target_content);
208 }
209 printk("\n");
210}
211
212void CamRestoreAllEntry( struct net_device *dev)
213{
214 u8 EntryId = 0;
215 struct r8192_priv *priv = rtllib_priv(dev);
216 u8* MacAddr = priv->rtllib->current_network.bssid;
217
218 static u8 CAM_CONST_ADDR[4][6] = {
219 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
220 {0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
221 {0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
222 {0x00, 0x00, 0x00, 0x00, 0x00, 0x03}};
223 static u8 CAM_CONST_BROAD[] =
224 {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
225
226 RT_TRACE(COMP_SEC, "CamRestoreAllEntry: \n");
227
228
229 if ((priv->rtllib->pairwise_key_type == KEY_TYPE_WEP40)||
230 (priv->rtllib->pairwise_key_type == KEY_TYPE_WEP104))
231 {
232
233 for (EntryId=0; EntryId<4; EntryId++)
234 {
235 {
236 MacAddr = CAM_CONST_ADDR[EntryId];
237 if (priv->rtllib->swcamtable[EntryId].bused )
238 {
239 setKey(dev,
240 EntryId ,
241 EntryId,
242 priv->rtllib->pairwise_key_type,
243 MacAddr,
244 0,
245 (u32*)(&priv->rtllib->swcamtable[EntryId].key_buf[0])
246 );
247 }
248 }
249 }
250
251 }
252 else if (priv->rtllib->pairwise_key_type == KEY_TYPE_TKIP)
253 {
254
255 {
256 if (priv->rtllib->iw_mode == IW_MODE_ADHOC)
257 {
258 setKey(dev,
259 4,
260 0,
261 priv->rtllib->pairwise_key_type,
262 (u8*)dev->dev_addr,
263 0,
264 (u32*)(&priv->rtllib->swcamtable[4].key_buf[0])
265 );
266 }
267 else
268 {
269 setKey(dev,
270 4,
271 0,
272 priv->rtllib->pairwise_key_type,
273 MacAddr,
274 0,
275 (u32*)(&priv->rtllib->swcamtable[4].key_buf[0])
276 );
277 }
278
279 }
280 }
281 else if (priv->rtllib->pairwise_key_type == KEY_TYPE_CCMP)
282 {
283
284 {
285 if (priv->rtllib->iw_mode == IW_MODE_ADHOC)
286 {
287 setKey(dev,
288 4,
289 0,
290 priv->rtllib->pairwise_key_type,
291 (u8*)dev->dev_addr,
292 0,
293 (u32*)(&priv->rtllib->swcamtable[4].key_buf[0])
294 );
295 }
296 else
297 {
298 setKey(dev,
299 4,
300 0,
301 priv->rtllib->pairwise_key_type,
302 MacAddr,
303 0,
304 (u32*)(&priv->rtllib->swcamtable[4].key_buf[0])
305 );
306 }
307 }
308 }
309
310
311
312 if (priv->rtllib->group_key_type == KEY_TYPE_TKIP)
313 {
314 MacAddr = CAM_CONST_BROAD;
315 for (EntryId=1 ; EntryId<4 ; EntryId++)
316 {
317 if (priv->rtllib->swcamtable[EntryId].bused )
318 {
319 setKey(dev,
320 EntryId,
321 EntryId,
322 priv->rtllib->group_key_type,
323 MacAddr,
324 0,
325 (u32*)(&priv->rtllib->swcamtable[EntryId].key_buf[0])
326 );
327 }
328 }
329 if (priv->rtllib->iw_mode == IW_MODE_ADHOC)
330 {
331 if (priv->rtllib->swcamtable[0].bused ){
332 setKey(dev,
333 0,
334 0,
335 priv->rtllib->group_key_type,
336 CAM_CONST_ADDR[0],
337 0,
338 (u32*)(&priv->rtllib->swcamtable[0].key_buf[0])
339 );
340 }
341 else
342 {
343 RT_TRACE(COMP_ERR,"===>%s():ERR!! ADHOC TKIP ,but 0 entry is have no data\n",__func__);
344 return;
345 }
346 }
347 } else if (priv->rtllib->group_key_type == KEY_TYPE_CCMP) {
348 MacAddr = CAM_CONST_BROAD;
349 for (EntryId=1; EntryId<4 ; EntryId++)
350 {
351 if (priv->rtllib->swcamtable[EntryId].bused )
352 {
353 setKey(dev,
354 EntryId ,
355 EntryId,
356 priv->rtllib->group_key_type,
357 MacAddr,
358 0,
359 (u32*)(&priv->rtllib->swcamtable[EntryId].key_buf[0]));
360 }
361 }
362
363 if (priv->rtllib->iw_mode == IW_MODE_ADHOC) {
364 if (priv->rtllib->swcamtable[0].bused) {
365 setKey(dev,
366 0 ,
367 0,
368 priv->rtllib->group_key_type,
369 CAM_CONST_ADDR[0],
370 0,
371 (u32*)(&priv->rtllib->swcamtable[0].key_buf[0]));
372 } else {
373 RT_TRACE(COMP_ERR,"===>%s():ERR!! ADHOC CCMP ,but 0 entry is have no data\n",
374 __func__);
375 return;
376 }
377 }
378 }
379}
diff --git a/drivers/staging/rtl8192e/rtl_cam.h b/drivers/staging/rtl8192e/rtl_cam.h
new file mode 100644
index 00000000000..9e4d0edb21b
--- /dev/null
+++ b/drivers/staging/rtl8192e/rtl_cam.h
@@ -0,0 +1,44 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * Based on the r8180 driver, which is:
5 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 *
19 * The full GNU General Public License is included in this distribution in the
20 * file called LICENSE.
21 *
22 * Contact Information:
23 * wlanfae <wlanfae@realtek.com>
24******************************************************************************/
25#ifndef _RTL_CAM_H
26#define _RTL_CAM_H
27
28#include <linux/types.h>
29struct net_device;
30
31void CamResetAllEntry(struct net_device* dev);
32void EnableHWSecurityConfig8192(struct net_device *dev);
33void setKey(struct net_device *dev, u8 EntryNo, u8 KeyIndex, u16 KeyType, u8 *MacAddr, u8 DefaultKey, u32 *KeyContent );
34void set_swcam(struct net_device *dev, u8 EntryNo, u8 KeyIndex, u16 KeyType, u8 *MacAddr, u8 DefaultKey, u32 *KeyContent, u8 is_mesh);
35void CamPrintDbgReg(struct net_device* dev);
36
37u32 read_cam(struct net_device *dev, u8 addr);
38void write_cam(struct net_device *dev, u8 addr, u32 data);
39
40void CamRestoreAllEntry(struct net_device *dev);
41
42void CAM_read_entry(struct net_device *dev, u32 iIndex);
43
44#endif
diff --git a/drivers/staging/rtl8192e/rtl_core.c b/drivers/staging/rtl8192e/rtl_core.c
new file mode 100644
index 00000000000..81cb13fce6f
--- /dev/null
+++ b/drivers/staging/rtl8192e/rtl_core.c
@@ -0,0 +1,4084 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * Based on the r8180 driver, which is:
5 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 *
19 * The full GNU General Public License is included in this distribution in the
20 * file called LICENSE.
21 *
22 * Contact Information:
23 * wlanfae <wlanfae@realtek.com>
24******************************************************************************/
25#undef LOOP_TEST
26#undef RX_DONT_PASS_UL
27#undef DEBUG_EPROM
28#undef DEBUG_RX_VERBOSE
29#undef DUMMY_RX
30#undef DEBUG_ZERO_RX
31#undef DEBUG_RX_SKB
32#undef DEBUG_TX_FRAG
33#undef DEBUG_RX_FRAG
34#undef DEBUG_TX_FILLDESC
35#undef DEBUG_TX
36#undef DEBUG_IRQ
37#undef DEBUG_RX
38#undef DEBUG_RXALLOC
39#undef DEBUG_REGISTERS
40#undef DEBUG_RING
41#undef DEBUG_IRQ_TASKLET
42#undef DEBUG_TX_ALLOC
43#undef DEBUG_TX_DESC
44
45#include <asm/uaccess.h>
46#include <linux/pci.h>
47#include "rtl_core.h"
48#include "r8192E_phy.h"
49#include "r8192E_phyreg.h"
50#include "r8190P_rtl8256.h"
51#include "r8192E_cmdpkt.h"
52
53#include "rtl_wx.h"
54#ifndef RTL8192CE
55#include "rtl_dm.h"
56#endif
57
58#ifdef CONFIG_PM_RTL
59#include "rtl_pm.h"
60#endif
61
62int hwwep = 1;
63static int channels = 0x3fff;
64char* ifname = "wlan%d";
65
66
67struct rtl819x_ops rtl819xp_ops = {
68 .nic_type = NIC_8192E,
69 .get_eeprom_size = rtl8192_get_eeprom_size,
70 .init_adapter_variable = rtl8192_InitializeVariables,
71 .initialize_adapter = rtl8192_adapter_start,
72 .link_change = rtl8192_link_change,
73 .tx_fill_descriptor = rtl8192_tx_fill_desc,
74 .tx_fill_cmd_descriptor = rtl8192_tx_fill_cmd_desc,
75 .rx_query_status_descriptor = rtl8192_rx_query_status_desc,
76 .rx_command_packet_handler = NULL,
77 .stop_adapter = rtl8192_halt_adapter,
78 .update_ratr_table = rtl8192_update_ratr_table,
79 .irq_enable = rtl8192_EnableInterrupt,
80 .irq_disable = rtl8192_DisableInterrupt,
81 .irq_clear = rtl8192_ClearInterrupt,
82 .rx_enable = rtl8192_enable_rx,
83 .tx_enable = rtl8192_enable_tx,
84 .interrupt_recognized = rtl8192_interrupt_recognized,
85 .TxCheckStuckHandler = rtl8192_HalTxCheckStuck,
86 .RxCheckStuckHandler = rtl8192_HalRxCheckStuck,
87};
88
89static struct pci_device_id rtl8192_pci_id_tbl[] __devinitdata = {
90 {RTL_PCI_DEVICE(0x10ec, 0x8192, rtl819xp_ops)},
91 {RTL_PCI_DEVICE(0x07aa, 0x0044, rtl819xp_ops)},
92 {RTL_PCI_DEVICE(0x07aa, 0x0047, rtl819xp_ops)},
93 {}
94};
95
96MODULE_DEVICE_TABLE(pci, rtl8192_pci_id_tbl);
97
98static int __devinit rtl8192_pci_probe(struct pci_dev *pdev,
99 const struct pci_device_id *id);
100static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev);
101
102static struct pci_driver rtl8192_pci_driver = {
103 .name = DRV_NAME, /* Driver name */
104 .id_table = rtl8192_pci_id_tbl, /* PCI_ID table */
105 .probe = rtl8192_pci_probe, /* probe fn */
106 .remove = __devexit_p(rtl8192_pci_disconnect), /* remove fn */
107 .suspend = rtl8192E_suspend, /* PM suspend fn */
108 .resume = rtl8192E_resume, /* PM resume fn */
109};
110
111/****************************************************************************
112 -----------------------------IO STUFF-------------------------
113*****************************************************************************/
114bool
115PlatformIOCheckPageLegalAndGetRegMask(
116 u32 u4bPage,
117 u8* pu1bPageMask
118)
119{
120 bool bReturn = false;
121 *pu1bPageMask = 0xfe;
122
123 switch (u4bPage)
124 {
125 case 1: case 2: case 3: case 4:
126 case 8: case 9: case 10: case 12: case 13:
127 bReturn = true;
128 *pu1bPageMask = 0xf0;
129 break;
130
131 default:
132 bReturn = false;
133 break;
134 }
135
136 return bReturn;
137}
138
139void write_nic_io_byte(struct net_device *dev, int x,u8 y)
140{
141 u32 u4bPage = (x >> 8);
142 u8 u1PageMask = 0;
143 bool bIsLegalPage = false;
144
145 if (u4bPage == 0)
146 {
147 outb(y&0xff,dev->base_addr +x);
148 }else
149 {
150 bIsLegalPage = PlatformIOCheckPageLegalAndGetRegMask(u4bPage, &u1PageMask);
151 if (bIsLegalPage)
152 {
153 u8 u1bPsr = read_nic_io_byte(dev, PSR);
154
155 write_nic_io_byte(dev, PSR, ((u1bPsr & u1PageMask) | (u8)u4bPage));
156 write_nic_io_byte(dev, (x & 0xff), y);
157 write_nic_io_byte(dev, PSR, (u1bPsr & u1PageMask));
158
159 }else
160 {
161 ;
162 }
163 }
164
165
166}
167
168void write_nic_io_word(struct net_device *dev, int x,u16 y)
169{
170 u32 u4bPage = (x >> 8);
171 u8 u1PageMask = 0;
172 bool bIsLegalPage = false;
173
174 if (u4bPage == 0)
175 {
176 outw(y,dev->base_addr +x);
177 }else
178 {
179 bIsLegalPage = PlatformIOCheckPageLegalAndGetRegMask(u4bPage, &u1PageMask);
180 if (bIsLegalPage)
181 {
182 u8 u1bPsr = read_nic_io_byte(dev, PSR);
183
184 write_nic_io_byte(dev, PSR, ((u1bPsr & u1PageMask) | (u8)u4bPage));
185 write_nic_io_word(dev, (x & 0xff), y);
186 write_nic_io_byte(dev, PSR, (u1bPsr & u1PageMask));
187
188 }else
189 {
190 ;
191 }
192 }
193
194}
195
196void write_nic_io_dword(struct net_device *dev, int x,u32 y)
197{
198 u32 u4bPage = (x >> 8);
199 u8 u1PageMask = 0;
200 bool bIsLegalPage = false;
201
202 if (u4bPage == 0)
203 {
204 outl(y,dev->base_addr +x);
205 }else
206 {
207 bIsLegalPage = PlatformIOCheckPageLegalAndGetRegMask(u4bPage, &u1PageMask);
208 if (bIsLegalPage)
209 {
210 u8 u1bPsr = read_nic_io_byte(dev, PSR);
211
212 write_nic_io_byte(dev, PSR, ((u1bPsr & u1PageMask) | (u8)u4bPage));
213 write_nic_io_dword(dev, (x & 0xff), y);
214 write_nic_io_byte(dev, PSR, (u1bPsr & u1PageMask));
215
216 }else
217 {
218 ;
219 }
220 }
221
222}
223u8 read_nic_io_byte(struct net_device *dev, int x)
224{
225 u32 u4bPage = (x >> 8);
226 u8 u1PageMask = 0;
227 bool bIsLegalPage = false;
228 u8 Data = 0;
229
230 if (u4bPage == 0)
231 {
232 return 0xff&inb(dev->base_addr +x);
233 }else
234 {
235 bIsLegalPage = PlatformIOCheckPageLegalAndGetRegMask(u4bPage, &u1PageMask);
236 if (bIsLegalPage)
237 {
238 u8 u1bPsr = read_nic_io_byte(dev, PSR);
239
240 write_nic_io_byte(dev, PSR, ((u1bPsr & u1PageMask) | (u8)u4bPage));
241 Data = read_nic_io_byte(dev, (x & 0xff));
242 write_nic_io_byte(dev, PSR, (u1bPsr & u1PageMask));
243
244 }else
245 {
246 ;
247 }
248 }
249
250 return Data;
251}
252
253u16 read_nic_io_word(struct net_device *dev, int x)
254{
255 u32 u4bPage = (x >> 8);
256 u8 u1PageMask = 0;
257 bool bIsLegalPage = false;
258 u16 Data = 0;
259
260 if (u4bPage == 0)
261 {
262 return inw(dev->base_addr +x);
263 }else
264 {
265 bIsLegalPage = PlatformIOCheckPageLegalAndGetRegMask(u4bPage, &u1PageMask);
266 if (bIsLegalPage)
267 {
268 u8 u1bPsr = read_nic_io_byte(dev, PSR);
269
270 write_nic_io_byte(dev, PSR, ((u1bPsr & u1PageMask) | (u8)u4bPage));
271 Data = read_nic_io_word(dev, (x & 0xff));
272 write_nic_io_byte(dev, PSR, (u1bPsr & u1PageMask));
273
274 }else
275 {
276 ;
277 }
278 }
279
280 return Data;
281}
282
283u32 read_nic_io_dword(struct net_device *dev, int x)
284{
285 u32 u4bPage = (x >> 8);
286 u8 u1PageMask = 0;
287 bool bIsLegalPage = false;
288 u32 Data = 0;
289
290 if (u4bPage == 0)
291 {
292 return inl(dev->base_addr +x);
293 }else
294 {
295 bIsLegalPage = PlatformIOCheckPageLegalAndGetRegMask(u4bPage, &u1PageMask);
296 if (bIsLegalPage)
297 {
298 u8 u1bPsr = read_nic_io_byte(dev, PSR);
299
300 write_nic_io_byte(dev, PSR, ((u1bPsr & u1PageMask) | (u8)u4bPage));
301 Data = read_nic_io_dword(dev, (x & 0xff));
302 write_nic_io_byte(dev, PSR, (u1bPsr & u1PageMask));
303
304 }else
305 {
306 ;
307 }
308 }
309
310 return Data;
311}
312
313u8 read_nic_byte(struct net_device *dev, int x)
314{
315#ifdef CONFIG_RTL8192_IO_MAP
316 return read_nic_io_byte(dev, x);
317#else
318 return 0xff&readb((u8*)dev->mem_start +x);
319#endif
320}
321
322u32 read_nic_dword(struct net_device *dev, int x)
323{
324#ifdef CONFIG_RTL8192_IO_MAP
325 return read_nic_io_dword(dev, x);
326#else
327 return readl((u8*)dev->mem_start +x);
328#endif
329}
330
331u16 read_nic_word(struct net_device *dev, int x)
332{
333#ifdef CONFIG_RTL8192_IO_MAP
334 return read_nic_io_word(dev, x);
335#else
336 return readw((u8*)dev->mem_start +x);
337#endif
338}
339
340void write_nic_byte(struct net_device *dev, int x,u8 y)
341{
342#ifdef CONFIG_RTL8192_IO_MAP
343 write_nic_io_byte(dev, x, y);
344#else
345 writeb(y,(u8*)dev->mem_start +x);
346
347#if !(defined RTL8192SE || defined RTL8192CE)
348 udelay(20);
349#endif
350
351#if defined RTL8192CE
352 read_nic_byte(dev, x);
353#endif
354
355#endif
356}
357
358void write_nic_dword(struct net_device *dev, int x,u32 y)
359{
360#ifdef CONFIG_RTL8192_IO_MAP
361 write_nic_io_dword(dev, x, y);
362#else
363 writel(y,(u8*)dev->mem_start +x);
364
365#if !(defined RTL8192SE || defined RTL8192CE)
366 udelay(20);
367#endif
368
369#if defined RTL8192CE
370 read_nic_dword(dev, x);
371#endif
372
373#endif
374}
375
376void write_nic_word(struct net_device *dev, int x,u16 y)
377{
378#ifdef CONFIG_RTL8192_IO_MAP
379 write_nic_io_word(dev, x, y);
380#else
381 writew(y,(u8*)dev->mem_start +x);
382
383#if !(defined RTL8192SE || defined RTL8192CE)
384 udelay(20);
385#endif
386
387#if defined RTL8192CE
388 read_nic_word(dev, x);
389#endif
390
391#endif
392}
393
394/****************************************************************************
395 -----------------------------GENERAL FUNCTION-------------------------
396*****************************************************************************/
397bool
398MgntActSet_RF_State(
399 struct net_device* dev,
400 RT_RF_POWER_STATE StateToSet,
401 RT_RF_CHANGE_SOURCE ChangeSource,
402 bool ProtectOrNot
403 )
404{
405 struct r8192_priv *priv = rtllib_priv(dev);
406 struct rtllib_device * ieee = priv->rtllib;
407 bool bActionAllowed = false;
408 bool bConnectBySSID = false;
409 RT_RF_POWER_STATE rtState;
410 u16 RFWaitCounter = 0;
411 unsigned long flag;
412 RT_TRACE((COMP_PS | COMP_RF), "===>MgntActSet_RF_State(): StateToSet(%d)\n",StateToSet);
413
414#ifndef RTL8192CE
415 ProtectOrNot = false;
416#endif
417
418
419 if (!ProtectOrNot)
420 {
421 while(true)
422 {
423 spin_lock_irqsave(&priv->rf_ps_lock,flag);
424 if (priv->RFChangeInProgress)
425 {
426 spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
427 RT_TRACE((COMP_PS | COMP_RF), "MgntActSet_RF_State(): RF Change in progress! Wait to set..StateToSet(%d).\n", StateToSet);
428 #if 1
429 while(priv->RFChangeInProgress)
430 {
431 RFWaitCounter ++;
432 RT_TRACE((COMP_PS | COMP_RF), "MgntActSet_RF_State(): Wait 1 ms (%d times)...\n", RFWaitCounter);
433 mdelay(1);
434
435 if (RFWaitCounter > 100)
436 {
437 RT_TRACE(COMP_ERR, "MgntActSet_RF_State(): Wait too logn to set RF\n");
438 return false;
439 }
440 }
441 #endif
442 }
443 else
444 {
445 priv->RFChangeInProgress = true;
446 spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
447 break;
448 }
449 }
450 }
451
452 rtState = priv->rtllib->eRFPowerState;
453
454 switch (StateToSet)
455 {
456 case eRfOn:
457
458 priv->rtllib->RfOffReason &= (~ChangeSource);
459
460 if ((ChangeSource == RF_CHANGE_BY_HW) && (priv->bHwRadioOff == true)){
461 priv->bHwRadioOff = false;
462 }
463
464 if (! priv->rtllib->RfOffReason)
465 {
466 priv->rtllib->RfOffReason = 0;
467 bActionAllowed = true;
468
469
470 if (rtState == eRfOff && ChangeSource >=RF_CHANGE_BY_HW )
471 {
472 bConnectBySSID = true;
473 }
474 }
475 else{
476 RT_TRACE((COMP_PS | COMP_RF), "MgntActSet_RF_State - eRfon reject pMgntInfo->RfOffReason= 0x%x, ChangeSource=0x%X\n", priv->rtllib->RfOffReason, ChangeSource);
477 }
478
479 break;
480
481 case eRfOff:
482
483 if ((priv->rtllib->iw_mode == IW_MODE_INFRA) || (priv->rtllib->iw_mode == IW_MODE_ADHOC))
484 {
485 if ((priv->rtllib->RfOffReason > RF_CHANGE_BY_IPS) || (ChangeSource > RF_CHANGE_BY_IPS))
486 {
487 if (ieee->state == RTLLIB_LINKED)
488 priv->blinked_ingpio = true;
489 else
490 priv->blinked_ingpio = false;
491 rtllib_MgntDisconnect(priv->rtllib,disas_lv_ss);
492
493
494
495 }
496 }
497 if ((ChangeSource == RF_CHANGE_BY_HW) && (priv->bHwRadioOff == false)){
498 priv->bHwRadioOff = true;
499 }
500 priv->rtllib->RfOffReason |= ChangeSource;
501 bActionAllowed = true;
502 break;
503
504 case eRfSleep:
505 priv->rtllib->RfOffReason |= ChangeSource;
506 bActionAllowed = true;
507 break;
508
509 default:
510 break;
511 }
512
513 if (bActionAllowed)
514 {
515 RT_TRACE((COMP_PS | COMP_RF), "MgntActSet_RF_State(): Action is allowed.... StateToSet(%d), RfOffReason(%#X)\n", StateToSet, priv->rtllib->RfOffReason);
516 PHY_SetRFPowerState(dev, StateToSet);
517 if (StateToSet == eRfOn)
518 {
519
520 if (bConnectBySSID && (priv->blinked_ingpio == true))
521 {
522 queue_delayed_work_rsl(ieee->wq, &ieee->associate_procedure_wq, 0);
523 priv->blinked_ingpio = false;
524
525 }
526 }
527 } else {
528 RT_TRACE((COMP_PS | COMP_RF), "MgntActSet_RF_State(): Action is rejected.... StateToSet(%d), ChangeSource(%#X), RfOffReason(%#X)\n", StateToSet, ChangeSource, priv->rtllib->RfOffReason);
529 }
530
531 if (!ProtectOrNot)
532 {
533 spin_lock_irqsave(&priv->rf_ps_lock,flag);
534 priv->RFChangeInProgress = false;
535 spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
536 }
537
538 RT_TRACE((COMP_PS && COMP_RF), "<===MgntActSet_RF_State()\n");
539 return bActionAllowed;
540}
541
542
543short rtl8192_get_nic_desc_num(struct net_device *dev, int prio)
544{
545 struct r8192_priv *priv = rtllib_priv(dev);
546 struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
547
548 /* For now, we reserved two free descriptor as a safety boundary
549 * between the tail and the head
550 */
551 if ((prio == MGNT_QUEUE) &&(skb_queue_len(&ring->queue)>10))
552 RT_TRACE(COMP_DBG, "-----[%d]---------ring->idx=%d queue_len=%d---------\n",
553 prio,ring->idx, skb_queue_len(&ring->queue));
554 return skb_queue_len(&ring->queue);
555}
556
557short rtl8192_check_nic_enough_desc(struct net_device *dev, int prio)
558{
559 struct r8192_priv *priv = rtllib_priv(dev);
560 struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
561
562 if (ring->entries - skb_queue_len(&ring->queue) >= 2) {
563 return 1;
564 } else {
565 return 0;
566 }
567}
568
569void rtl8192_tx_timeout(struct net_device *dev)
570{
571 struct r8192_priv *priv = rtllib_priv(dev);
572
573#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
574 schedule_work(&priv->reset_wq);
575#else
576 schedule_task(&priv->reset_wq);
577#endif
578 printk("TXTIMEOUT");
579}
580
581void rtl8192_irq_enable(struct net_device *dev)
582{
583 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
584 priv->irq_enabled = 1;
585
586 priv->ops->irq_enable(dev);
587}
588
589void rtl8192_irq_disable(struct net_device *dev)
590{
591 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
592
593 priv->ops->irq_disable(dev);
594
595 priv->irq_enabled = 0;
596}
597
598void rtl8192_irq_clear(struct net_device *dev)
599{
600 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
601
602 priv->ops->irq_clear(dev);
603}
604
605
606void rtl8192_set_chan(struct net_device *dev,short ch)
607{
608 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
609
610 RT_TRACE(COMP_CH, "=====>%s()====ch:%d\n", __func__, ch);
611 if (priv->chan_forced)
612 return;
613
614 priv->chan = ch;
615
616
617#ifndef LOOP_TEST
618
619
620 if (priv->rf_set_chan)
621 priv->rf_set_chan(dev,priv->chan);
622
623#ifdef CONFIG_FW_SETCHAN
624 priv->rtllib->SetFwCmdHandler(dev, FW_CMD_CHAN_SET);
625#endif
626
627#endif
628}
629
630void rtl8192_update_cap(struct net_device* dev, u16 cap)
631{
632 struct r8192_priv *priv = rtllib_priv(dev);
633 struct rtllib_network *net = &priv->rtllib->current_network;
634
635
636 {
637 bool ShortPreamble;
638
639 if (cap & WLAN_CAPABILITY_SHORT_PREAMBLE)
640 {
641 if (priv->dot11CurrentPreambleMode != PREAMBLE_SHORT)
642 {
643 ShortPreamble = true;
644 priv->dot11CurrentPreambleMode = PREAMBLE_SHORT;
645 RT_TRACE(COMP_DBG, "%s(): WLAN_CAPABILITY_SHORT_PREAMBLE\n", __func__);
646 priv->rtllib->SetHwRegHandler( dev, HW_VAR_ACK_PREAMBLE, (unsigned char *)&ShortPreamble );
647 }
648 }
649 else
650 {
651 if (priv->dot11CurrentPreambleMode != PREAMBLE_LONG)
652 {
653 ShortPreamble = false;
654 priv->dot11CurrentPreambleMode = PREAMBLE_LONG;
655 RT_TRACE(COMP_DBG, "%s(): WLAN_CAPABILITY_LONG_PREAMBLE\n", __func__);
656 priv->rtllib->SetHwRegHandler( dev, HW_VAR_ACK_PREAMBLE, (unsigned char *)&ShortPreamble );
657 }
658 }
659 }
660
661#ifdef RTL8192CE
662 if ( net->mode & IEEE_G)
663#elif defined RTL8192SE || defined RTL8192E || defined RTL8190P
664 if (net->mode & (IEEE_G|IEEE_N_24G))
665#endif
666 {
667 u8 slot_time_val;
668 u8 CurSlotTime = priv->slot_time;
669
670#ifdef RTL8192CE
671 if ( (cap & WLAN_CAPABILITY_SHORT_SLOT_TIME) && (!(priv->rtllib->pHTInfo->RT2RT_HT_Mode & RT_HT_CAP_USE_LONG_PREAMBLE)))
672#elif defined RTL8192SE || defined RTL8192E || defined RTL8190P
673 if ((cap & WLAN_CAPABILITY_SHORT_SLOT_TIME) && (!priv->rtllib->pHTInfo->bCurrentRT2RTLongSlotTime))
674#endif
675 {
676 if (CurSlotTime != SHORT_SLOT_TIME)
677 {
678 slot_time_val = SHORT_SLOT_TIME;
679 priv->rtllib->SetHwRegHandler( dev, HW_VAR_SLOT_TIME, &slot_time_val );
680 }
681 }
682 else
683 {
684 if (CurSlotTime != NON_SHORT_SLOT_TIME)
685 {
686 slot_time_val = NON_SHORT_SLOT_TIME;
687 priv->rtllib->SetHwRegHandler( dev, HW_VAR_SLOT_TIME, &slot_time_val );
688 }
689 }
690 }
691}
692
693static struct rtllib_qos_parameters def_qos_parameters = {
694 {3,3,3,3},
695 {7,7,7,7},
696 {2,2,2,2},
697 {0,0,0,0},
698 {0,0,0,0}
699};
700
701void rtl8192_update_beacon(void *data)
702{
703#if LINUX_VERSION_CODE >=KERNEL_VERSION(2,6,20)
704 struct r8192_priv *priv = container_of_work_rsl(data, struct r8192_priv, update_beacon_wq.work);
705 struct net_device *dev = priv->rtllib->dev;
706#else
707 struct net_device *dev = (struct net_device *)data;
708 struct r8192_priv *priv = rtllib_priv(dev);
709#endif
710 struct rtllib_device* ieee = priv->rtllib;
711 struct rtllib_network* net = &ieee->current_network;
712
713 if (ieee->pHTInfo->bCurrentHTSupport)
714 HTUpdateSelfAndPeerSetting(ieee, net);
715 ieee->pHTInfo->bCurrentRT2RTLongSlotTime = net->bssht.bdRT2RTLongSlotTime;
716 ieee->pHTInfo->RT2RT_HT_Mode = net->bssht.RT2RT_HT_Mode;
717 rtl8192_update_cap(dev, net->capability);
718}
719
720#define MOVE_INTO_HANDLER
721#ifdef RTL8192CE
722int WDCAPARA_ADD[] = {REG_EDCA_BE_PARAM,REG_EDCA_BK_PARAM,REG_EDCA_VI_PARAM,REG_EDCA_VO_PARAM};
723#else
724int WDCAPARA_ADD[] = {EDCAPARA_BE,EDCAPARA_BK,EDCAPARA_VI,EDCAPARA_VO};
725#endif
726void rtl8192_qos_activate(void *data)
727{
728#if LINUX_VERSION_CODE >=KERNEL_VERSION(2,6,20)
729 struct r8192_priv *priv = container_of_work_rsl(data, struct r8192_priv, qos_activate);
730 struct net_device *dev = priv->rtllib->dev;
731#else
732 struct net_device *dev = (struct net_device *)data;
733 struct r8192_priv *priv = rtllib_priv(dev);
734#endif
735#ifndef MOVE_INTO_HANDLER
736 struct rtllib_qos_parameters *qos_parameters = &priv->rtllib->current_network.qos_data.parameters;
737 u8 mode = priv->rtllib->current_network.mode;
738 u8 u1bAIFS;
739 u32 u4bAcParam;
740#endif
741 int i;
742
743 if (priv == NULL)
744 return;
745
746#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,16))
747 down(&priv->mutex);
748#else
749 mutex_lock(&priv->mutex);
750#endif
751 if (priv->rtllib->state != RTLLIB_LINKED)
752 goto success;
753 RT_TRACE(COMP_QOS,"qos active process with associate response received\n");
754
755 for (i = 0; i < QOS_QUEUE_NUM; i++) {
756#ifndef MOVE_INTO_HANDLER
757 u1bAIFS = qos_parameters->aifs[i] * ((mode&(IEEE_G|IEEE_N_24G)) ?9:20) + aSifsTime;
758 u4bAcParam = ((((u32)(qos_parameters->tx_op_limit[i]))<< AC_PARAM_TXOP_LIMIT_OFFSET)|
759 (((u32)(qos_parameters->cw_max[i]))<< AC_PARAM_ECW_MAX_OFFSET)|
760 (((u32)(qos_parameters->cw_min[i]))<< AC_PARAM_ECW_MIN_OFFSET)|
761 ((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET));
762 RT_TRACE(COMP_DBG, "===>ACI:%d:u4bAcParam:%x\n", i, u4bAcParam);
763 write_nic_dword(dev, WDCAPARA_ADD[i], u4bAcParam);
764#else
765 priv->rtllib->SetHwRegHandler(dev, HW_VAR_AC_PARAM, (u8*)(&i));
766#endif
767 }
768
769success:
770#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,16))
771 up(&priv->mutex);
772#else
773 mutex_unlock(&priv->mutex);
774#endif
775}
776
777static int rtl8192_qos_handle_probe_response(struct r8192_priv *priv,
778 int active_network,
779 struct rtllib_network *network)
780{
781 int ret = 0;
782 u32 size = sizeof(struct rtllib_qos_parameters);
783
784 if (priv->rtllib->state !=RTLLIB_LINKED)
785 return ret;
786
787 if ((priv->rtllib->iw_mode != IW_MODE_INFRA))
788 return ret;
789
790 if (network->flags & NETWORK_HAS_QOS_MASK) {
791 if (active_network &&
792 (network->flags & NETWORK_HAS_QOS_PARAMETERS))
793 network->qos_data.active = network->qos_data.supported;
794
795 if ((network->qos_data.active == 1) && (active_network == 1) &&
796 (network->flags & NETWORK_HAS_QOS_PARAMETERS) &&
797 (network->qos_data.old_param_count !=
798 network->qos_data.param_count)) {
799 network->qos_data.old_param_count =
800 network->qos_data.param_count;
801 priv->rtllib->wmm_acm = network->qos_data.wmm_acm;
802 queue_work_rsl(priv->priv_wq, &priv->qos_activate);
803 RT_TRACE (COMP_QOS, "QoS parameters change call "
804 "qos_activate\n");
805 }
806 } else {
807 memcpy(&priv->rtllib->current_network.qos_data.parameters,\
808 &def_qos_parameters, size);
809
810 if ((network->qos_data.active == 1) && (active_network == 1)) {
811 queue_work_rsl(priv->priv_wq, &priv->qos_activate);
812 RT_TRACE(COMP_QOS, "QoS was disabled call qos_activate \n");
813 }
814 network->qos_data.active = 0;
815 network->qos_data.supported = 0;
816 }
817
818 return 0;
819}
820
821static int rtl8192_handle_beacon(struct net_device * dev,
822 struct rtllib_beacon * beacon,
823 struct rtllib_network * network)
824{
825 struct r8192_priv *priv = rtllib_priv(dev);
826
827 rtl8192_qos_handle_probe_response(priv,1,network);
828
829 queue_delayed_work_rsl(priv->priv_wq, &priv->update_beacon_wq, 0);
830 return 0;
831
832}
833
834static int rtl8192_qos_association_resp(struct r8192_priv *priv,
835 struct rtllib_network *network)
836{
837 int ret = 0;
838 unsigned long flags;
839 u32 size = sizeof(struct rtllib_qos_parameters);
840 int set_qos_param = 0;
841
842 if ((priv == NULL) || (network == NULL))
843 return ret;
844
845 if (priv->rtllib->state !=RTLLIB_LINKED)
846 return ret;
847
848 if ((priv->rtllib->iw_mode != IW_MODE_INFRA))
849 return ret;
850
851 spin_lock_irqsave(&priv->rtllib->lock, flags);
852 if (network->flags & NETWORK_HAS_QOS_PARAMETERS) {
853 memcpy(&priv->rtllib->current_network.qos_data.parameters,\
854 &network->qos_data.parameters,\
855 sizeof(struct rtllib_qos_parameters));
856 priv->rtllib->current_network.qos_data.active = 1;
857 priv->rtllib->wmm_acm = network->qos_data.wmm_acm;
858 set_qos_param = 1;
859 priv->rtllib->current_network.qos_data.old_param_count =
860 priv->rtllib->current_network.qos_data.param_count;
861 priv->rtllib->current_network.qos_data.param_count =
862 network->qos_data.param_count;
863 } else {
864 memcpy(&priv->rtllib->current_network.qos_data.parameters,
865 &def_qos_parameters, size);
866 priv->rtllib->current_network.qos_data.active = 0;
867 priv->rtllib->current_network.qos_data.supported = 0;
868 set_qos_param = 1;
869 }
870
871 spin_unlock_irqrestore(&priv->rtllib->lock, flags);
872
873 RT_TRACE(COMP_QOS, "%s: network->flags = %d,%d\n", __func__,
874 network->flags ,priv->rtllib->current_network.qos_data.active);
875 if (set_qos_param == 1) {
876 dm_init_edca_turbo(priv->rtllib->dev);
877 queue_work_rsl(priv->priv_wq, &priv->qos_activate);
878 }
879 return ret;
880}
881
882static int rtl8192_handle_assoc_response(struct net_device *dev,
883 struct rtllib_assoc_response_frame *resp,
884 struct rtllib_network *network)
885{
886 struct r8192_priv *priv = rtllib_priv(dev);
887 rtl8192_qos_association_resp(priv, network);
888 return 0;
889}
890
891void rtl8192_prepare_beacon(struct r8192_priv *priv)
892{
893 struct net_device *dev = priv->rtllib->dev;
894 struct sk_buff *pskb = NULL, *pnewskb = NULL;
895 cb_desc *tcb_desc = NULL;
896 struct rtl8192_tx_ring *ring = NULL;
897 tx_desc *pdesc = NULL;
898
899 ring = &priv->tx_ring[BEACON_QUEUE];
900 pskb = __skb_dequeue(&ring->queue);
901 if (pskb)
902 kfree_skb(pskb);
903
904 pnewskb = rtllib_get_beacon(priv->rtllib);
905 if (!pnewskb)
906 return;
907
908 tcb_desc = (cb_desc *)(pnewskb->cb + 8);
909 tcb_desc->queue_index = BEACON_QUEUE;
910 tcb_desc->data_rate = 2;
911 tcb_desc->RATRIndex = 7;
912 tcb_desc->bTxDisableRateFallBack = 1;
913 tcb_desc->bTxUseDriverAssingedRate = 1;
914 skb_push(pnewskb, priv->rtllib->tx_headroom);
915
916 pdesc = &ring->desc[0];
917 priv->ops->tx_fill_descriptor(dev, pdesc, tcb_desc, pnewskb);
918 __skb_queue_tail(&ring->queue, pnewskb);
919 pdesc->OWN = 1;
920
921 return;
922}
923
924void rtl8192_stop_beacon(struct net_device *dev)
925{
926}
927
928void rtl8192_config_rate(struct net_device* dev, u16* rate_config)
929{
930 struct r8192_priv *priv = rtllib_priv(dev);
931 struct rtllib_network *net;
932 u8 i=0, basic_rate = 0;
933 net = & priv->rtllib->current_network;
934
935 for (i = 0; i < net->rates_len; i++) {
936 basic_rate = net->rates[i] & 0x7f;
937 switch (basic_rate) {
938 case MGN_1M:
939 *rate_config |= RRSR_1M;
940 break;
941 case MGN_2M:
942 *rate_config |= RRSR_2M;
943 break;
944 case MGN_5_5M:
945 *rate_config |= RRSR_5_5M;
946 break;
947 case MGN_11M:
948 *rate_config |= RRSR_11M;
949 break;
950 case MGN_6M:
951 *rate_config |= RRSR_6M;
952 break;
953 case MGN_9M:
954 *rate_config |= RRSR_9M;
955 break;
956 case MGN_12M:
957 *rate_config |= RRSR_12M;
958 break;
959 case MGN_18M:
960 *rate_config |= RRSR_18M;
961 break;
962 case MGN_24M:
963 *rate_config |= RRSR_24M;
964 break;
965 case MGN_36M:
966 *rate_config |= RRSR_36M;
967 break;
968 case MGN_48M:
969 *rate_config |= RRSR_48M;
970 break;
971 case MGN_54M:
972 *rate_config |= RRSR_54M;
973 break;
974 }
975 }
976
977 for (i = 0; i < net->rates_ex_len; i++) {
978 basic_rate = net->rates_ex[i] & 0x7f;
979 switch (basic_rate) {
980 case MGN_1M:
981 *rate_config |= RRSR_1M;
982 break;
983 case MGN_2M:
984 *rate_config |= RRSR_2M;
985 break;
986 case MGN_5_5M:
987 *rate_config |= RRSR_5_5M;
988 break;
989 case MGN_11M:
990 *rate_config |= RRSR_11M;
991 break;
992 case MGN_6M:
993 *rate_config |= RRSR_6M;
994 break;
995 case MGN_9M:
996 *rate_config |= RRSR_9M;
997 break;
998 case MGN_12M:
999 *rate_config |= RRSR_12M;
1000 break;
1001 case MGN_18M:
1002 *rate_config |= RRSR_18M;
1003 break;
1004 case MGN_24M:
1005 *rate_config |= RRSR_24M;
1006 break;
1007 case MGN_36M:
1008 *rate_config |= RRSR_36M;
1009 break;
1010 case MGN_48M:
1011 *rate_config |= RRSR_48M;
1012 break;
1013 case MGN_54M:
1014 *rate_config |= RRSR_54M;
1015 break;
1016 }
1017 }
1018}
1019
1020void rtl8192_refresh_supportrate(struct r8192_priv* priv)
1021{
1022 struct rtllib_device* ieee = priv->rtllib;
1023 if (ieee->mode == WIRELESS_MODE_N_24G || ieee->mode == WIRELESS_MODE_N_5G) {
1024 memcpy(ieee->Regdot11HTOperationalRateSet, ieee->RegHTSuppRateSet, 16);
1025 memcpy(ieee->Regdot11TxHTOperationalRateSet, ieee->RegHTSuppRateSet, 16);
1026
1027#ifdef RTL8192CE
1028 if (priv->rf_type == RF_1T1R) {
1029 ieee->Regdot11HTOperationalRateSet[1] = 0;
1030 }
1031#endif
1032
1033#ifdef RTL8192SE
1034 if (priv->rf_type == RF_1T1R) {
1035 ieee->Regdot11HTOperationalRateSet[1] = 0;
1036 }
1037 if (priv->rf_type == RF_1T1R || priv->rf_type == RF_1T2R)
1038 {
1039 ieee->Regdot11TxHTOperationalRateSet[1] = 0;
1040 }
1041
1042 if (priv->rtllib->b1SSSupport == true) {
1043 ieee->Regdot11HTOperationalRateSet[1] = 0;
1044 }
1045#endif
1046 } else {
1047 memset(ieee->Regdot11HTOperationalRateSet, 0, 16);
1048 }
1049 return;
1050}
1051
1052u8 rtl8192_getSupportedWireleeMode(struct net_device*dev)
1053{
1054 struct r8192_priv *priv = rtllib_priv(dev);
1055 u8 ret = 0;
1056
1057 switch (priv->rf_chip) {
1058 case RF_8225:
1059 case RF_8256:
1060 case RF_6052:
1061 case RF_PSEUDO_11N:
1062 ret = (WIRELESS_MODE_N_24G|WIRELESS_MODE_G | WIRELESS_MODE_B);
1063 break;
1064 case RF_8258:
1065 ret = (WIRELESS_MODE_A | WIRELESS_MODE_N_5G);
1066 break;
1067 default:
1068 ret = WIRELESS_MODE_B;
1069 break;
1070 }
1071 return ret;
1072}
1073
1074void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode)
1075{
1076 struct r8192_priv *priv = rtllib_priv(dev);
1077 u8 bSupportMode = rtl8192_getSupportedWireleeMode(dev);
1078
1079 if ((wireless_mode == WIRELESS_MODE_AUTO) || ((wireless_mode & bSupportMode) == 0)) {
1080 if (bSupportMode & WIRELESS_MODE_N_24G) {
1081 wireless_mode = WIRELESS_MODE_N_24G;
1082 } else if (bSupportMode & WIRELESS_MODE_N_5G) {
1083 wireless_mode = WIRELESS_MODE_N_5G;
1084 } else if ((bSupportMode & WIRELESS_MODE_A)) {
1085 wireless_mode = WIRELESS_MODE_A;
1086 } else if ((bSupportMode & WIRELESS_MODE_G)) {
1087 wireless_mode = WIRELESS_MODE_G;
1088 } else if ((bSupportMode & WIRELESS_MODE_B)) {
1089 wireless_mode = WIRELESS_MODE_B;
1090 } else {
1091 RT_TRACE(COMP_ERR, "%s(), No valid wireless mode supported (%x)!!!\n",
1092 __func__, bSupportMode);
1093 wireless_mode = WIRELESS_MODE_B;
1094 }
1095 }
1096
1097 if ((wireless_mode & (WIRELESS_MODE_B | WIRELESS_MODE_G)) == (WIRELESS_MODE_G | WIRELESS_MODE_B))
1098 wireless_mode = WIRELESS_MODE_G;
1099
1100 priv->rtllib->mode = wireless_mode;
1101
1102 ActUpdateChannelAccessSetting( dev, wireless_mode, &priv->ChannelAccessSetting);
1103
1104 if ((wireless_mode == WIRELESS_MODE_N_24G) || (wireless_mode == WIRELESS_MODE_N_5G)){
1105 priv->rtllib->pHTInfo->bEnableHT = 1;
1106 RT_TRACE(COMP_DBG, "%s(), wireless_mode:%x, bEnableHT = 1\n", __func__,wireless_mode);
1107 }else{
1108 priv->rtllib->pHTInfo->bEnableHT = 0;
1109 RT_TRACE(COMP_DBG, "%s(), wireless_mode:%x, bEnableHT = 0\n", __func__,wireless_mode);
1110 }
1111
1112 RT_TRACE(COMP_INIT, "Current Wireless Mode is %x\n", wireless_mode);
1113 rtl8192_refresh_supportrate(priv);
1114}
1115
1116int _rtl8192_sta_up(struct net_device *dev,bool is_silent_reset)
1117{
1118 struct r8192_priv *priv = rtllib_priv(dev);
1119 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
1120 bool init_status = true;
1121 priv->bDriverIsGoingToUnload = false;
1122 priv->bdisable_nic = false;
1123
1124 priv->up=1;
1125 priv->rtllib->ieee_up=1;
1126
1127 priv->up_first_time = 0;
1128 RT_TRACE(COMP_INIT, "Bringing up iface");
1129 priv->bfirst_init = true;
1130 init_status = priv->ops->initialize_adapter(dev);
1131 if (init_status != true)
1132 {
1133 RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n",__func__);
1134 priv->bfirst_init = false;
1135 return -1;
1136 }
1137
1138 RT_TRACE(COMP_INIT, "start adapter finished\n");
1139 RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC);
1140 priv->bfirst_init = false;
1141#if defined RTL8192SE || defined RTL8192CE
1142 if (priv->rtllib->eRFPowerState!=eRfOn)
1143 MgntActSet_RF_State(dev, eRfOn, priv->rtllib->RfOffReason,true);
1144#endif
1145
1146#ifdef ENABLE_GPIO_RADIO_CTL
1147 if (priv->polling_timer_on == 0){
1148 check_rfctrl_gpio_timer((unsigned long)dev);
1149 }
1150#endif
1151
1152 if (priv->rtllib->state != RTLLIB_LINKED)
1153#ifndef CONFIG_MP
1154 rtllib_softmac_start_protocol(priv->rtllib, 0);
1155#endif
1156 rtllib_reset_queue(priv->rtllib);
1157#ifndef CONFIG_MP
1158 watch_dog_timer_callback((unsigned long) dev);
1159#endif
1160
1161
1162 if (!netif_queue_stopped(dev))
1163 netif_start_queue(dev);
1164 else
1165 netif_wake_queue(dev);
1166
1167 return 0;
1168}
1169
1170int rtl8192_sta_down(struct net_device *dev, bool shutdownrf)
1171{
1172 struct r8192_priv *priv = rtllib_priv(dev);
1173 unsigned long flags = 0;
1174 u8 RFInProgressTimeOut = 0;
1175
1176 if (priv->up == 0) return -1;
1177
1178 if (priv->rtllib->rtllib_ips_leave != NULL)
1179 priv->rtllib->rtllib_ips_leave(dev);
1180
1181 if (priv->rtllib->state == RTLLIB_LINKED)
1182 LeisurePSLeave(dev);
1183
1184 priv->bDriverIsGoingToUnload = true;
1185 priv->up=0;
1186 priv->rtllib->ieee_up = 0;
1187 priv->bfirst_after_down = 1;
1188 RT_TRACE(COMP_DOWN, "==========>%s()\n", __func__);
1189 if (!netif_queue_stopped(dev))
1190 netif_stop_queue(dev);
1191
1192 priv->rtllib->wpa_ie_len = 0;
1193 if (priv->rtllib->wpa_ie)
1194 kfree(priv->rtllib->wpa_ie);
1195 priv->rtllib->wpa_ie = NULL;
1196 CamResetAllEntry(dev);
1197 memset(priv->rtllib->swcamtable,0,sizeof(SW_CAM_TABLE)*32);
1198 rtl8192_irq_disable(dev);
1199
1200 del_timer_sync(&priv->watch_dog_timer);
1201 rtl8192_cancel_deferred_work(priv);
1202#ifndef RTL8190P
1203#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
1204 cancel_delayed_work(&priv->rtllib->hw_wakeup_wq);
1205#endif
1206#endif
1207
1208 rtllib_softmac_stop_protocol(priv->rtllib, 0, true);
1209 spin_lock_irqsave(&priv->rf_ps_lock,flags);
1210 while(priv->RFChangeInProgress)
1211 {
1212 spin_unlock_irqrestore(&priv->rf_ps_lock,flags);
1213 if (RFInProgressTimeOut > 100)
1214 {
1215 spin_lock_irqsave(&priv->rf_ps_lock,flags);
1216 break;
1217 }
1218 RT_TRACE(COMP_DBG, "===>%s():RF is in progress, need to wait until rf chang is done.\n",__func__);
1219 mdelay(1);
1220 RFInProgressTimeOut ++;
1221 spin_lock_irqsave(&priv->rf_ps_lock,flags);
1222 }
1223 priv->RFChangeInProgress = true;
1224 spin_unlock_irqrestore(&priv->rf_ps_lock,flags);
1225 priv->ops->stop_adapter(dev, false);
1226 spin_lock_irqsave(&priv->rf_ps_lock,flags);
1227 priv->RFChangeInProgress = false;
1228 spin_unlock_irqrestore(&priv->rf_ps_lock,flags);
1229 udelay(100);
1230 memset(&priv->rtllib->current_network, 0 , offsetof(struct rtllib_network, list));
1231#ifdef CONFIG_ASPM_OR_D3
1232 RT_ENABLE_ASPM(dev);
1233#endif
1234 RT_TRACE(COMP_DOWN, "<==========%s()\n", __func__);
1235
1236 return 0;
1237}
1238
1239static void rtl8192_init_priv_handler(struct net_device* dev)
1240{
1241 struct r8192_priv *priv = rtllib_priv(dev);
1242
1243 priv->rtllib->softmac_hard_start_xmit = rtl8192_hard_start_xmit;
1244 priv->rtllib->set_chan = rtl8192_set_chan;
1245 priv->rtllib->link_change = priv->ops->link_change;
1246 priv->rtllib->softmac_data_hard_start_xmit = rtl8192_hard_data_xmit;
1247 priv->rtllib->data_hard_stop = rtl8192_data_hard_stop;
1248 priv->rtllib->data_hard_resume = rtl8192_data_hard_resume;
1249 priv->rtllib->check_nic_enough_desc = rtl8192_check_nic_enough_desc;
1250 priv->rtllib->get_nic_desc_num = rtl8192_get_nic_desc_num;
1251 priv->rtllib->handle_assoc_response = rtl8192_handle_assoc_response;
1252 priv->rtllib->handle_beacon = rtl8192_handle_beacon;
1253 priv->rtllib->SetWirelessMode = rtl8192_SetWirelessMode;
1254 priv->rtllib->LeisurePSLeave = LeisurePSLeave;
1255 priv->rtllib->SetBWModeHandler = rtl8192_SetBWMode;
1256 priv->rf_set_chan = rtl8192_phy_SwChnl;
1257
1258#ifdef _ENABLE_SW_BEACON
1259 priv->rtllib->start_send_beacons = NULL;
1260 priv->rtllib->stop_send_beacons = NULL;
1261#else
1262 priv->rtllib->start_send_beacons = rtl8192e_start_beacon;
1263 priv->rtllib->stop_send_beacons = rtl8192_stop_beacon;
1264#endif
1265
1266 priv->rtllib->sta_wake_up = rtl8192_hw_wakeup;
1267 priv->rtllib->enter_sleep_state = rtl8192_hw_to_sleep;
1268 priv->rtllib->ps_is_queue_empty = rtl8192_is_tx_queue_empty;
1269
1270 priv->rtllib->GetNmodeSupportBySecCfg = rtl8192_GetNmodeSupportBySecCfg;
1271 priv->rtllib->GetHalfNmodeSupportByAPsHandler = rtl8192_GetHalfNmodeSupportByAPs;
1272
1273 priv->rtllib->SetHwRegHandler = rtl8192e_SetHwReg;
1274 priv->rtllib->AllowAllDestAddrHandler = rtl8192_AllowAllDestAddr;
1275 priv->rtllib->SetFwCmdHandler = NULL;
1276 priv->rtllib->InitialGainHandler = InitialGain819xPci;
1277 priv->rtllib->rtllib_ips_leave_wq = rtllib_ips_leave_wq;
1278 priv->rtllib->rtllib_ips_leave = rtllib_ips_leave;
1279
1280 priv->rtllib->LedControlHandler = NULL;
1281 priv->rtllib->UpdateBeaconInterruptHandler = NULL;
1282
1283 priv->rtllib->ScanOperationBackupHandler = PHY_ScanOperationBackup8192;
1284
1285#ifdef CONFIG_RTL_RFKILL
1286 priv->rtllib->rtllib_rfkill_poll = rtl8192_rfkill_poll;
1287#else
1288 priv->rtllib->rtllib_rfkill_poll = NULL;
1289#endif
1290}
1291
1292static void rtl8192_init_priv_constant(struct net_device* dev)
1293{
1294#if defined RTL8192SE || defined RTL8192CE || defined RTL8192E
1295 struct r8192_priv *priv = rtllib_priv(dev);
1296 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
1297#endif
1298
1299#if defined RTL8192SE || defined RTL8192CE || defined RTL8192E
1300 pPSC->RegMaxLPSAwakeIntvl = 5;
1301#endif
1302
1303#ifdef RTL8192CE
1304 priv->bWEPinNmodeFromReg = 0;
1305 priv->bTKIPinNmodeFromReg = 0;
1306
1307 priv->RegAMDPciASPM = 0;
1308
1309 priv->RegPciASPM = 3;
1310
1311 priv->RegDevicePciASPMSetting = 0x03;
1312
1313 priv->RegHostPciASPMSetting = 0x02;
1314
1315 priv->RegHwSwRfOffD3 = 0;
1316
1317 priv->RegSupportPciASPM = 1;
1318
1319#elif defined RTL8192SE
1320 priv->RegPciASPM = 2;
1321
1322 priv->RegDevicePciASPMSetting = 0x03;
1323
1324 priv->RegHostPciASPMSetting = 0x02;
1325
1326 priv->RegHwSwRfOffD3 = 2;
1327
1328 priv->RegSupportPciASPM = 2;
1329
1330#elif defined RTL8192E
1331 priv->RegPciASPM = 2;
1332
1333 priv->RegDevicePciASPMSetting = 0x03;
1334
1335 priv->RegHostPciASPMSetting = 0x02;
1336
1337 priv->RegHwSwRfOffD3 = 2;
1338
1339 priv->RegSupportPciASPM = 2;
1340
1341#elif defined RTL8190P
1342#endif
1343}
1344
1345
1346static void rtl8192_init_priv_variable(struct net_device* dev)
1347{
1348 struct r8192_priv *priv = rtllib_priv(dev);
1349 u8 i;
1350
1351 priv->AcmMethod = eAcmWay2_SW;
1352 priv->dot11CurrentPreambleMode = PREAMBLE_AUTO;
1353 priv->rtllib->hwscan_sem_up = 1;
1354 priv->rtllib->status = 0;
1355 priv->H2CTxCmdSeq = 0;
1356 priv->bDisableFrameBursting = 0;
1357 priv->bDMInitialGainEnable = 1;
1358 priv->polling_timer_on = 0;
1359 priv->up_first_time = 1;
1360 priv->blinked_ingpio = false;
1361 priv->bDriverIsGoingToUnload = false;
1362 priv->being_init_adapter = false;
1363 priv->initialized_at_probe = false;
1364 priv->sw_radio_on = true;
1365 priv->bdisable_nic = false;
1366 priv->bfirst_init = false;
1367 priv->txringcount = 64;
1368 priv->rxbuffersize = 9100;
1369 priv->rxringcount = MAX_RX_COUNT;
1370 priv->irq_enabled=0;
1371 priv->chan = 1;
1372 priv->RegWirelessMode = WIRELESS_MODE_AUTO;
1373 priv->RegChannelPlan = 0xf;
1374 priv->nrxAMPDU_size = 0;
1375 priv->nrxAMPDU_aggr_num = 0;
1376 priv->last_rxdesc_tsf_high = 0;
1377 priv->last_rxdesc_tsf_low = 0;
1378 priv->rtllib->mode = WIRELESS_MODE_AUTO;
1379 priv->rtllib->iw_mode = IW_MODE_INFRA;
1380 priv->rtllib->bNetPromiscuousMode = false;
1381 priv->rtllib->IntelPromiscuousModeInfo.bPromiscuousOn = false;
1382 priv->rtllib->IntelPromiscuousModeInfo.bFilterSourceStationFrame = false;
1383 priv->rtllib->ieee_up=0;
1384 priv->retry_rts = DEFAULT_RETRY_RTS;
1385 priv->retry_data = DEFAULT_RETRY_DATA;
1386 priv->rtllib->rts = DEFAULT_RTS_THRESHOLD;
1387 priv->rtllib->rate = 110;
1388 priv->rtllib->short_slot = 1;
1389 priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0;
1390 priv->bcck_in_ch14 = false;
1391 priv->bfsync_processing = false;
1392 priv->CCKPresentAttentuation = 0;
1393 priv->rfa_txpowertrackingindex = 0;
1394 priv->rfc_txpowertrackingindex = 0;
1395 priv->CckPwEnl = 6;
1396 priv->ScanDelay = 50;
1397 priv->ResetProgress = RESET_TYPE_NORESET;
1398 priv->bForcedSilentReset = 0;
1399 priv->bDisableNormalResetCheck = false;
1400 priv->force_reset = false;
1401 memset(priv->rtllib->swcamtable,0,sizeof(SW_CAM_TABLE)*32);
1402
1403 memset(&priv->InterruptLog,0,sizeof(LOG_INTERRUPT_8190_T));
1404 priv->RxCounter = 0;
1405 priv->rtllib->wx_set_enc = 0;
1406 priv->bHwRadioOff = false;
1407 priv->RegRfOff = 0;
1408 priv->isRFOff = false;
1409 priv->bInPowerSaveMode = false;
1410 priv->rtllib->RfOffReason = 0;
1411 priv->RFChangeInProgress = false;
1412 priv->bHwRfOffAction = 0;
1413 priv->SetRFPowerStateInProgress = false;
1414 priv->rtllib->PowerSaveControl.bInactivePs = true;
1415 priv->rtllib->PowerSaveControl.bIPSModeBackup = false;
1416 priv->rtllib->PowerSaveControl.bLeisurePs = true;
1417 priv->rtllib->PowerSaveControl.bFwCtrlLPS = false;
1418 priv->rtllib->LPSDelayCnt = 0;
1419 priv->rtllib->sta_sleep = LPS_IS_WAKE;
1420 priv->rtllib->eRFPowerState = eRfOn;
1421
1422 priv->txpower_checkcnt = 0;
1423 priv->thermal_readback_index =0;
1424 priv->txpower_tracking_callback_cnt = 0;
1425 priv->ccktxpower_adjustcnt_ch14 = 0;
1426 priv->ccktxpower_adjustcnt_not_ch14 = 0;
1427
1428#if defined RTL8192SE
1429 for (i = 0; i<PEER_MAX_ASSOC; i++){
1430 priv->rtllib->peer_assoc_list[i]=NULL;
1431 priv->rtllib->AvailableAIDTable[i] = 99;
1432 }
1433 priv->RATRTableBitmap = 0;
1434 priv->rtllib->amsdu_in_process = 0;
1435#endif
1436
1437 priv->rtllib->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
1438 priv->rtllib->iw_mode = IW_MODE_INFRA;
1439 priv->rtllib->active_scan = 1;
1440 priv->rtllib->be_scan_inprogress = false;
1441 priv->rtllib->modulation = RTLLIB_CCK_MODULATION | RTLLIB_OFDM_MODULATION;
1442 priv->rtllib->host_encrypt = 1;
1443 priv->rtllib->host_decrypt = 1;
1444
1445 priv->rtllib->dot11PowerSaveMode = eActive;
1446 priv->rtllib->fts = DEFAULT_FRAG_THRESHOLD;
1447 priv->rtllib->MaxMssDensity = 0;
1448 priv->rtllib->MinSpaceCfg = 0;
1449
1450 priv->card_type = PCI;
1451
1452 priv->AcmControl = 0;
1453 priv->pFirmware = (rt_firmware*)vmalloc(sizeof(rt_firmware));
1454 if (priv->pFirmware)
1455 memset(priv->pFirmware, 0, sizeof(rt_firmware));
1456
1457 skb_queue_head_init(&priv->rx_queue);
1458 skb_queue_head_init(&priv->skb_queue);
1459
1460 for (i = 0; i < MAX_QUEUE_SIZE; i++) {
1461 skb_queue_head_init(&priv->rtllib->skb_waitQ [i]);
1462 }
1463 for (i = 0; i < MAX_QUEUE_SIZE; i++) {
1464 skb_queue_head_init(&priv->rtllib->skb_aggQ [i]);
1465 }
1466
1467}
1468
1469static void rtl8192_init_priv_lock(struct r8192_priv* priv)
1470{
1471 spin_lock_init(&priv->fw_scan_lock);
1472 spin_lock_init(&priv->tx_lock);
1473 spin_lock_init(&priv->irq_lock);
1474 spin_lock_init(&priv->irq_th_lock);
1475 spin_lock_init(&priv->rf_ps_lock);
1476 spin_lock_init(&priv->ps_lock);
1477 spin_lock_init(&priv->rf_lock);
1478 spin_lock_init(&priv->rt_h2c_lock);
1479#ifdef CONFIG_ASPM_OR_D3
1480 spin_lock_init(&priv->D3_lock);
1481#endif
1482 sema_init(&priv->wx_sem,1);
1483 sema_init(&priv->rf_sem,1);
1484#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,16))
1485 sema_init(&priv->mutex, 1);
1486#else
1487 mutex_init(&priv->mutex);
1488#endif
1489}
1490
1491static void rtl8192_init_priv_task(struct net_device* dev)
1492{
1493 struct r8192_priv *priv = rtllib_priv(dev);
1494
1495#ifdef PF_SYNCTHREAD
1496 priv->priv_wq = create_workqueue(DRV_NAME,0);
1497#else
1498 priv->priv_wq = create_workqueue(DRV_NAME);
1499#endif
1500 INIT_WORK_RSL(&priv->reset_wq, (void*)rtl8192_restart, dev);
1501 INIT_WORK_RSL(&priv->rtllib->ips_leave_wq, (void*)IPSLeave_wq, dev);
1502 INIT_DELAYED_WORK_RSL(&priv->watch_dog_wq, (void*)rtl819x_watchdog_wqcallback, dev);
1503 INIT_DELAYED_WORK_RSL(&priv->txpower_tracking_wq, (void*)dm_txpower_trackingcallback, dev);
1504 INIT_DELAYED_WORK_RSL(&priv->rfpath_check_wq, (void*)dm_rf_pathcheck_workitemcallback, dev);
1505 INIT_DELAYED_WORK_RSL(&priv->update_beacon_wq, (void*)rtl8192_update_beacon, dev);
1506 INIT_WORK_RSL(&priv->qos_activate, (void*)rtl8192_qos_activate, dev);
1507 INIT_DELAYED_WORK_RSL(&priv->rtllib->hw_wakeup_wq,(void*) rtl8192_hw_wakeup_wq, dev);
1508 INIT_DELAYED_WORK_RSL(&priv->rtllib->hw_sleep_wq,(void*) rtl8192_hw_sleep_wq, dev);
1509 tasklet_init(&priv->irq_rx_tasklet,
1510 (void(*)(unsigned long))rtl8192_irq_rx_tasklet,
1511 (unsigned long)priv);
1512 tasklet_init(&priv->irq_tx_tasklet,
1513 (void(*)(unsigned long))rtl8192_irq_tx_tasklet,
1514 (unsigned long)priv);
1515 tasklet_init(&priv->irq_prepare_beacon_tasklet,
1516 (void(*)(unsigned long))rtl8192_prepare_beacon,
1517 (unsigned long)priv);
1518}
1519
1520short rtl8192_get_channel_map(struct net_device * dev)
1521{
1522 int i;
1523
1524#ifdef ENABLE_DOT11D
1525 struct r8192_priv *priv = rtllib_priv(dev);
1526 if ((priv->rf_chip != RF_8225) && (priv->rf_chip != RF_8256)
1527 && (priv->rf_chip != RF_6052)) {
1528 RT_TRACE(COMP_ERR, "%s: unknown rf chip, can't set channel map\n", __func__);
1529 return -1;
1530 }
1531
1532 if (priv->ChannelPlan > COUNTRY_CODE_MAX) {
1533 printk("rtl819x_init:Error channel plan! Set to default.\n");
1534 priv->ChannelPlan= COUNTRY_CODE_FCC;
1535 }
1536 RT_TRACE(COMP_INIT, "Channel plan is %d\n",priv->ChannelPlan);
1537 Dot11d_Init(priv->rtllib);
1538#ifndef CONFIG_CRDA
1539 Dot11d_Channelmap(priv->ChannelPlan, priv->rtllib);
1540#endif
1541#else
1542 struct r8192_priv *priv = rtllib_priv(dev);
1543 int ch;
1544 if (!channels){
1545 DMESG("No channels, aborting");
1546 return -1;
1547 }
1548
1549 ch = channels;
1550 priv->ChannelPlan = 0;
1551 for (i = 1; i <= 14; i++) {
1552 (priv->rtllib->channel_map)[i] = (u8)(ch & 0x01);
1553 ch >>= 1;
1554 }
1555 priv->rtllib->IbssStartChnl= 10;
1556 priv->rtllib->ibss_maxjoin_chal = 11;
1557#endif
1558 for (i = 1; i <= 11; i++) {
1559 (priv->rtllib->active_channel_map)[i] = 1;
1560 }
1561 (priv->rtllib->active_channel_map)[12] = 2;
1562 (priv->rtllib->active_channel_map)[13] = 2;
1563
1564 return 0;
1565}
1566
1567short rtl8192_init(struct net_device *dev)
1568{
1569 struct r8192_priv *priv = rtllib_priv(dev);
1570
1571 memset(&(priv->stats),0,sizeof(struct Stats));
1572#ifdef CONFIG_MP
1573 rtl8192_init_mp(dev);
1574#endif
1575
1576 rtl8192_dbgp_flag_init(dev);
1577
1578 rtl8192_init_priv_handler(dev);
1579 rtl8192_init_priv_constant(dev);
1580 rtl8192_init_priv_variable(dev);
1581 rtl8192_init_priv_lock(priv);
1582 rtl8192_init_priv_task(dev);
1583 priv->ops->get_eeprom_size(dev);
1584 priv->ops->init_adapter_variable(dev);
1585 rtl8192_get_channel_map(dev);
1586
1587#ifdef CONFIG_CFG_80211
1588 /* channel map setting for the cfg80211 style */
1589 {
1590 struct r8192_priv* priv = rtllib_priv(dev);
1591 rtllib_set_geo(priv);
1592 }
1593#endif
1594
1595 init_hal_dm(dev);
1596
1597#if defined RTL8192SE || defined RTL8192CE
1598 InitSwLeds(dev);
1599#endif
1600 init_timer(&priv->watch_dog_timer);
1601 setup_timer(&priv->watch_dog_timer,
1602 watch_dog_timer_callback,
1603 (unsigned long) dev);
1604
1605 init_timer(&priv->gpio_polling_timer);
1606 setup_timer(&priv->gpio_polling_timer,
1607 check_rfctrl_gpio_timer,
1608 (unsigned long)dev);
1609
1610 rtl8192_irq_disable(dev);
1611#if defined(IRQF_SHARED)
1612 if (request_irq(dev->irq, (void*)rtl8192_interrupt_rsl, IRQF_SHARED, dev->name, dev))
1613#else
1614 if (request_irq(dev->irq, (void *)rtl8192_interrupt_rsl, SA_SHIRQ, dev->name, dev))
1615#endif
1616 {
1617 printk("Error allocating IRQ %d",dev->irq);
1618 return -1;
1619 } else {
1620 priv->irq=dev->irq;
1621 RT_TRACE(COMP_INIT, "IRQ %d\n",dev->irq);
1622 }
1623
1624 if (rtl8192_pci_initdescring(dev) != 0) {
1625 printk("Endopoints initialization failed");
1626 return -1;
1627 }
1628
1629 return 0;
1630}
1631
1632#if defined CONFIG_ASPM_OR_D3
1633static void
1634rtl8192_update_default_setting(struct net_device *dev)
1635{
1636 struct r8192_priv *priv = rtllib_priv(dev);
1637 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
1638
1639 pPSC->RegRfPsLevel = 0;
1640 priv->bSupportASPM = 0;
1641
1642
1643 pPSC->RegAMDPciASPM = priv->RegAMDPciASPM ;
1644 switch (priv->RegPciASPM)
1645 {
1646 case 0:
1647 break;
1648
1649 case 1:
1650 pPSC->RegRfPsLevel |= RT_RF_LPS_LEVEL_ASPM;
1651 break;
1652
1653 case 2:
1654 pPSC->RegRfPsLevel |= (RT_RF_LPS_LEVEL_ASPM | RT_RF_OFF_LEVL_CLK_REQ);
1655 break;
1656
1657 case 3:
1658 pPSC->RegRfPsLevel &= ~(RT_RF_LPS_LEVEL_ASPM);
1659 pPSC->RegRfPsLevel |= (RT_RF_PS_LEVEL_ALWAYS_ASPM | RT_RF_OFF_LEVL_CLK_REQ);
1660 break;
1661
1662 case 4:
1663 pPSC->RegRfPsLevel &= ~(RT_RF_LPS_LEVEL_ASPM | RT_RF_OFF_LEVL_CLK_REQ);
1664 pPSC->RegRfPsLevel |= RT_RF_PS_LEVEL_ALWAYS_ASPM;
1665 break;
1666 }
1667
1668 pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_HALT_NIC;
1669
1670 switch (priv->RegHwSwRfOffD3)
1671 {
1672 case 1:
1673 if (pPSC->RegRfPsLevel & RT_RF_LPS_LEVEL_ASPM)
1674 pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_ASPM;
1675 break;
1676
1677 case 2:
1678 if (pPSC->RegRfPsLevel & RT_RF_LPS_LEVEL_ASPM)
1679 pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_ASPM;
1680 pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_HALT_NIC;
1681 break;
1682
1683 case 3:
1684 pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_PCI_D3;
1685 break;
1686 }
1687
1688
1689 switch (priv->RegSupportPciASPM)
1690 {
1691 case 0:
1692 {
1693 bool bSupportASPM = false;
1694 priv->bSupportASPM = bSupportASPM;
1695 }
1696 break;
1697
1698 case 1:
1699 {
1700 bool bSupportASPM = true;
1701 priv->bSupportASPM = bSupportASPM;
1702 }
1703 break;
1704
1705 case 2:
1706 if (priv->NdisAdapter.PciBridgeVendor == PCI_BRIDGE_VENDOR_INTEL)
1707 {
1708 bool bSupportASPM = true;
1709 priv->bSupportASPM = bSupportASPM;
1710 }
1711 break;
1712
1713 default:
1714 break;
1715 }
1716}
1717#endif
1718
1719#if defined CONFIG_ASPM_OR_D3
1720static void
1721rtl8192_initialize_adapter_common(struct net_device *dev)
1722{
1723 struct r8192_priv *priv = rtllib_priv(dev);
1724 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
1725
1726 rtl8192_update_default_setting(dev);
1727
1728#ifdef CONFIG_ASPM_OR_D3
1729 if (pPSC->RegRfPsLevel & RT_RF_PS_LEVEL_ALWAYS_ASPM)
1730 {
1731 RT_ENABLE_ASPM(dev);
1732 RT_SET_PS_LEVEL(pPSC, RT_RF_PS_LEVEL_ALWAYS_ASPM);
1733 }
1734#endif
1735}
1736#endif
1737
1738/***************************************************************************
1739 -------------------------------WATCHDOG STUFF---------------------------
1740***************************************************************************/
1741short rtl8192_is_tx_queue_empty(struct net_device *dev)
1742{
1743 int i=0;
1744 struct r8192_priv *priv = rtllib_priv(dev);
1745 for (i=0; i<=MGNT_QUEUE; i++)
1746 {
1747 if ((i== TXCMD_QUEUE) || (i == HCCA_QUEUE) )
1748 continue;
1749 if (skb_queue_len(&(&priv->tx_ring[i])->queue) > 0){
1750 printk("===>tx queue is not empty:%d, %d\n", i, skb_queue_len(&(&priv->tx_ring[i])->queue));
1751 return 0;
1752 }
1753 }
1754 return 1;
1755}
1756
1757RESET_TYPE
1758rtl819x_TxCheckStuck(struct net_device *dev)
1759{
1760 struct r8192_priv *priv = rtllib_priv(dev);
1761 u8 QueueID;
1762 u8 ResetThreshold = NIC_SEND_HANG_THRESHOLD_POWERSAVE;
1763 bool bCheckFwTxCnt = false;
1764 struct rtl8192_tx_ring *ring = NULL;
1765 struct sk_buff* skb = NULL;
1766 cb_desc * tcb_desc = NULL;
1767 unsigned long flags = 0;
1768
1769 switch (priv->rtllib->ps)
1770 {
1771 case RTLLIB_PS_DISABLED:
1772 ResetThreshold = NIC_SEND_HANG_THRESHOLD_NORMAL;
1773 break;
1774 case (RTLLIB_PS_MBCAST|RTLLIB_PS_UNICAST):
1775 ResetThreshold = NIC_SEND_HANG_THRESHOLD_POWERSAVE;
1776 break;
1777 default:
1778 ResetThreshold = NIC_SEND_HANG_THRESHOLD_POWERSAVE;
1779 break;
1780 }
1781 spin_lock_irqsave(&priv->irq_th_lock,flags);
1782 for (QueueID = 0; QueueID < MAX_TX_QUEUE; QueueID++)
1783 {
1784 if (QueueID == TXCMD_QUEUE)
1785 continue;
1786
1787 if (QueueID == BEACON_QUEUE)
1788 continue;
1789
1790 ring = &priv->tx_ring[QueueID];
1791
1792 if (skb_queue_len(&ring->queue) == 0)
1793 continue;
1794 else
1795 {
1796 skb = (&ring->queue)->next;
1797 tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1798 tcb_desc->nStuckCount++;
1799 bCheckFwTxCnt = true;
1800 if (tcb_desc->nStuckCount > 1)
1801 printk("%s: QueueID=%d tcb_desc->nStuckCount=%d\n",__func__,QueueID,tcb_desc->nStuckCount);
1802#if defined RTL8192SE || defined RTL8192CE
1803 if (tcb_desc->nStuckCount > ResetThreshold)
1804 {
1805 RT_TRACE( COMP_RESET, "TxCheckStuck(): Need silent reset because nStuckCount > ResetThreshold.\n" );
1806 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
1807 return RESET_TYPE_SILENT;
1808 }
1809 bCheckFwTxCnt = false;
1810 #endif
1811 }
1812 }
1813 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
1814
1815 if (bCheckFwTxCnt) {
1816 if (priv->ops->TxCheckStuckHandler(dev))
1817 {
1818 RT_TRACE(COMP_RESET, "TxCheckStuck(): Fw indicates no Tx condition! \n");
1819 return RESET_TYPE_SILENT;
1820 }
1821 }
1822
1823 return RESET_TYPE_NORESET;
1824}
1825
1826RESET_TYPE rtl819x_RxCheckStuck(struct net_device *dev)
1827{
1828 struct r8192_priv *priv = rtllib_priv(dev);
1829
1830 if (priv->ops->RxCheckStuckHandler(dev))
1831 {
1832 RT_TRACE(COMP_RESET, "RxStuck Condition\n");
1833 return RESET_TYPE_SILENT;
1834 }
1835
1836 return RESET_TYPE_NORESET;
1837}
1838
1839RESET_TYPE
1840rtl819x_ifcheck_resetornot(struct net_device *dev)
1841{
1842 struct r8192_priv *priv = rtllib_priv(dev);
1843 RESET_TYPE TxResetType = RESET_TYPE_NORESET;
1844 RESET_TYPE RxResetType = RESET_TYPE_NORESET;
1845 RT_RF_POWER_STATE rfState;
1846
1847 rfState = priv->rtllib->eRFPowerState;
1848
1849 if (rfState == eRfOn)
1850 TxResetType = rtl819x_TxCheckStuck(dev);
1851
1852 if ( rfState == eRfOn &&
1853 (priv->rtllib->iw_mode == IW_MODE_INFRA) &&
1854 (priv->rtllib->state == RTLLIB_LINKED)) {
1855
1856 RxResetType = rtl819x_RxCheckStuck(dev);
1857 }
1858
1859 if (TxResetType==RESET_TYPE_NORMAL || RxResetType==RESET_TYPE_NORMAL){
1860 printk("%s(): TxResetType is %d, RxResetType is %d\n",__func__,TxResetType,RxResetType);
1861 return RESET_TYPE_NORMAL;
1862 } else if (TxResetType==RESET_TYPE_SILENT || RxResetType==RESET_TYPE_SILENT){
1863 printk("%s(): TxResetType is %d, RxResetType is %d\n",__func__,TxResetType,RxResetType);
1864 return RESET_TYPE_SILENT;
1865 } else {
1866 return RESET_TYPE_NORESET;
1867 }
1868
1869}
1870
1871void rtl819x_silentreset_mesh_bk(struct net_device *dev, u8 IsPortal)
1872{
1873}
1874
1875void rtl819x_ifsilentreset(struct net_device *dev)
1876{
1877 struct r8192_priv *priv = rtllib_priv(dev);
1878 u8 reset_times = 0;
1879 int reset_status = 0;
1880 struct rtllib_device *ieee = priv->rtllib;
1881 unsigned long flag;
1882
1883 u8 IsPortal = 0;
1884
1885
1886 if (priv->ResetProgress==RESET_TYPE_NORESET) {
1887
1888 RT_TRACE(COMP_RESET,"=========>Reset progress!! \n");
1889
1890 priv->ResetProgress = RESET_TYPE_SILENT;
1891
1892 spin_lock_irqsave(&priv->rf_ps_lock,flag);
1893 if (priv->RFChangeInProgress)
1894 {
1895 spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
1896 goto END;
1897 }
1898 priv->RFChangeInProgress = true;
1899 priv->bResetInProgress = true;
1900 spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
1901
1902RESET_START:
1903
1904 down(&priv->wx_sem);
1905
1906 if (priv->rtllib->state == RTLLIB_LINKED)
1907 LeisurePSLeave(dev);
1908
1909 if (IS_NIC_DOWN(priv)) {
1910 RT_TRACE(COMP_ERR,"%s():the driver is not up! return\n",__func__);
1911 up(&priv->wx_sem);
1912 return ;
1913 }
1914 priv->up = 0;
1915
1916 RT_TRACE(COMP_RESET,"%s():======>start to down the driver\n",__func__);
1917 mdelay(1000);
1918 RT_TRACE(COMP_RESET,"%s():111111111111111111111111======>start to down the driver\n",__func__);
1919
1920 if (!netif_queue_stopped(dev))
1921 netif_stop_queue(dev);
1922
1923 rtl8192_irq_disable(dev);
1924 del_timer_sync(&priv->watch_dog_timer);
1925 rtl8192_cancel_deferred_work(priv);
1926 deinit_hal_dm(dev);
1927 rtllib_stop_scan_syncro(ieee);
1928
1929 if (ieee->state == RTLLIB_LINKED) {
1930 SEM_DOWN_IEEE_WX(&ieee->wx_sem);
1931 printk("ieee->state is RTLLIB_LINKED\n");
1932 rtllib_stop_send_beacons(priv->rtllib);
1933 del_timer_sync(&ieee->associate_timer);
1934 cancel_delayed_work(&ieee->associate_retry_wq);
1935 rtllib_stop_scan(ieee);
1936 netif_carrier_off(dev);
1937 SEM_UP_IEEE_WX(&ieee->wx_sem);
1938 } else {
1939 printk("ieee->state is NOT LINKED\n");
1940 rtllib_softmac_stop_protocol(priv->rtllib, 0 ,true);
1941 }
1942
1943#if !(defined RTL8192SE || defined RTL8192CE)
1944 dm_backup_dynamic_mechanism_state(dev);
1945#endif
1946
1947#ifdef RTL8190P
1948 priv->ops->stop_adapter(dev, true);
1949#endif
1950
1951 up(&priv->wx_sem);
1952 RT_TRACE(COMP_RESET,"%s():<==========down process is finished\n",__func__);
1953
1954 RT_TRACE(COMP_RESET,"%s():<===========up process start\n",__func__);
1955 reset_status = _rtl8192_up(dev,true);
1956
1957 RT_TRACE(COMP_RESET,"%s():<===========up process is finished\n",__func__);
1958 if (reset_status == -1) {
1959 if (reset_times < 3) {
1960 reset_times++;
1961 goto RESET_START;
1962 } else {
1963 RT_TRACE(COMP_ERR," ERR!!! %s(): Reset Failed!!\n",__func__);
1964 }
1965 }
1966
1967 ieee->is_silent_reset = 1;
1968
1969 spin_lock_irqsave(&priv->rf_ps_lock,flag);
1970 priv->RFChangeInProgress = false;
1971 spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
1972
1973 EnableHWSecurityConfig8192(dev);
1974
1975 if (ieee->state == RTLLIB_LINKED && ieee->iw_mode == IW_MODE_INFRA) {
1976 ieee->set_chan(ieee->dev, ieee->current_network.channel);
1977
1978 queue_work_rsl(ieee->wq, &ieee->associate_complete_wq);
1979
1980 } else if (ieee->state == RTLLIB_LINKED && ieee->iw_mode == IW_MODE_ADHOC) {
1981 ieee->set_chan(ieee->dev, ieee->current_network.channel);
1982 ieee->link_change(ieee->dev);
1983
1984 notify_wx_assoc_event(ieee);
1985
1986 rtllib_start_send_beacons(ieee);
1987
1988 if (ieee->data_hard_resume)
1989 ieee->data_hard_resume(ieee->dev);
1990 netif_carrier_on(ieee->dev);
1991 } else if (ieee->iw_mode == IW_MODE_MESH) {
1992 rtl819x_silentreset_mesh_bk(dev, IsPortal);
1993 }
1994
1995 CamRestoreAllEntry(dev);
1996#if !(defined RTL8192SE || defined RTL8192CE)
1997 dm_restore_dynamic_mechanism_state(dev);
1998#endif
1999END:
2000 priv->ResetProgress = RESET_TYPE_NORESET;
2001 priv->reset_count++;
2002
2003 priv->bForcedSilentReset =false;
2004 priv->bResetInProgress = false;
2005
2006#if !(defined RTL8192SE || defined RTL8192CE)
2007 write_nic_byte(dev, UFWP, 1);
2008#endif
2009 RT_TRACE(COMP_RESET, "Reset finished!! ====>[%d]\n", priv->reset_count);
2010 }
2011}
2012
2013void rtl819x_update_rxcounts(struct r8192_priv *priv,
2014 u32 *TotalRxBcnNum,
2015 u32 *TotalRxDataNum)
2016{
2017 u16 SlotIndex;
2018 u8 i;
2019
2020 *TotalRxBcnNum = 0;
2021 *TotalRxDataNum = 0;
2022
2023 SlotIndex = (priv->rtllib->LinkDetectInfo.SlotIndex++)%(priv->rtllib->LinkDetectInfo.SlotNum);
2024 priv->rtllib->LinkDetectInfo.RxBcnNum[SlotIndex] = priv->rtllib->LinkDetectInfo.NumRecvBcnInPeriod;
2025 priv->rtllib->LinkDetectInfo.RxDataNum[SlotIndex] = priv->rtllib->LinkDetectInfo.NumRecvDataInPeriod;
2026 for (i = 0; i < priv->rtllib->LinkDetectInfo.SlotNum; i++) {
2027 *TotalRxBcnNum += priv->rtllib->LinkDetectInfo.RxBcnNum[i];
2028 *TotalRxDataNum += priv->rtllib->LinkDetectInfo.RxDataNum[i];
2029 }
2030}
2031
2032
2033void rtl819x_watchdog_wqcallback(void *data)
2034{
2035#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
2036 struct r8192_priv *priv = container_of_dwork_rsl(data,struct r8192_priv,watch_dog_wq);
2037 struct net_device *dev = priv->rtllib->dev;
2038#else
2039 struct net_device *dev = (struct net_device *)data;
2040 struct r8192_priv *priv = rtllib_priv(dev);
2041#endif
2042 struct rtllib_device* ieee = priv->rtllib;
2043 RESET_TYPE ResetType = RESET_TYPE_NORESET;
2044 static u8 check_reset_cnt = 0;
2045 unsigned long flags;
2046 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
2047 bool bBusyTraffic = false;
2048 bool bHigherBusyTraffic = false;
2049 bool bHigherBusyRxTraffic = false;
2050 bool bEnterPS = false;
2051
2052 if (IS_NIC_DOWN(priv) || (priv->bHwRadioOff == true))
2053 return;
2054
2055 if (priv->rtllib->state >= RTLLIB_LINKED) {
2056 if (priv->rtllib->CntAfterLink<2)
2057 priv->rtllib->CntAfterLink++;
2058 } else {
2059 priv->rtllib->CntAfterLink = 0;
2060 }
2061
2062 hal_dm_watchdog(dev);
2063
2064 if (rtllib_act_scanning(priv->rtllib,false) == false){
2065 if ((ieee->iw_mode == IW_MODE_INFRA) && (ieee->state == RTLLIB_NOLINK) &&\
2066 (ieee->eRFPowerState == eRfOn)&&!ieee->is_set_key &&\
2067 (!ieee->proto_stoppping) && !ieee->wx_set_enc
2068#ifdef CONFIG_RTLWIFI_DEBUGFS
2069 && (!priv->debug->hw_holding)
2070#endif
2071 ){
2072 if ((ieee->PowerSaveControl.ReturnPoint == IPS_CALLBACK_NONE)&&
2073 (!ieee->bNetPromiscuousMode))
2074 {
2075 RT_TRACE(COMP_PS, "====================>haha:IPSEnter()\n");
2076 IPSEnter(dev);
2077 }
2078 }
2079 }
2080 {
2081 if ((ieee->state == RTLLIB_LINKED) && (ieee->iw_mode == IW_MODE_INFRA) && (!ieee->bNetPromiscuousMode))
2082 {
2083 if ( ieee->LinkDetectInfo.NumRxOkInPeriod> 100 ||
2084 ieee->LinkDetectInfo.NumTxOkInPeriod> 100 ) {
2085 bBusyTraffic = true;
2086 }
2087
2088
2089 if ( ieee->LinkDetectInfo.NumRxOkInPeriod > 4000 ||
2090 ieee->LinkDetectInfo.NumTxOkInPeriod > 4000 )
2091 {
2092 bHigherBusyTraffic = true;
2093 if (ieee->LinkDetectInfo.NumRxOkInPeriod > 5000)
2094 bHigherBusyRxTraffic = true;
2095 else
2096 bHigherBusyRxTraffic = false;
2097 }
2098
2099 if (((ieee->LinkDetectInfo.NumRxUnicastOkInPeriod + ieee->LinkDetectInfo.NumTxOkInPeriod) > 8) ||
2100 (ieee->LinkDetectInfo.NumRxUnicastOkInPeriod > 2))
2101 bEnterPS= false;
2102 else
2103 bEnterPS= true;
2104
2105 if (ieee->current_network.beacon_interval < 95)
2106 bEnterPS= false;
2107
2108 if (bEnterPS)
2109 LeisurePSEnter(dev);
2110 else
2111 LeisurePSLeave(dev);
2112
2113 } else {
2114 RT_TRACE(COMP_LPS,"====>no link LPS leave\n");
2115 LeisurePSLeave(dev);
2116 }
2117
2118 ieee->LinkDetectInfo.NumRxOkInPeriod = 0;
2119 ieee->LinkDetectInfo.NumTxOkInPeriod = 0;
2120 ieee->LinkDetectInfo.NumRxUnicastOkInPeriod = 0;
2121 ieee->LinkDetectInfo.bBusyTraffic = bBusyTraffic;
2122
2123 ieee->LinkDetectInfo.bHigherBusyTraffic = bHigherBusyTraffic;
2124 ieee->LinkDetectInfo.bHigherBusyRxTraffic = bHigherBusyRxTraffic;
2125
2126 }
2127
2128 {
2129#if defined RTL8192SE
2130 if (priv->rtllib->iw_mode == IW_MODE_ADHOC)
2131 IbssAgeFunction(ieee);
2132#endif
2133
2134 if (ieee->state == RTLLIB_LINKED && ieee->iw_mode == IW_MODE_INFRA)
2135 {
2136 u32 TotalRxBcnNum = 0;
2137 u32 TotalRxDataNum = 0;
2138
2139 rtl819x_update_rxcounts(priv, &TotalRxBcnNum, &TotalRxDataNum);
2140
2141 if ((TotalRxBcnNum+TotalRxDataNum) == 0)
2142 priv->check_roaming_cnt ++;
2143 else
2144 priv->check_roaming_cnt = 0;
2145
2146
2147 if (priv->check_roaming_cnt > 0)
2148 {
2149 if ( ieee->eRFPowerState == eRfOff)
2150 RT_TRACE(COMP_ERR,"========>%s()\n",__func__);
2151
2152 printk("===>%s(): AP is power off,chan:%d, connect another one\n",__func__, priv->chan);
2153
2154 ieee->state = RTLLIB_ASSOCIATING;
2155
2156 RemovePeerTS(priv->rtllib,priv->rtllib->current_network.bssid);
2157 ieee->is_roaming = true;
2158 ieee->is_set_key = false;
2159 ieee->link_change(dev);
2160 if (ieee->LedControlHandler)
2161 ieee->LedControlHandler(ieee->dev, LED_CTL_START_TO_LINK);
2162
2163 notify_wx_assoc_event(ieee);
2164
2165 if (!(ieee->rtllib_ap_sec_type(ieee)&(SEC_ALG_CCMP|SEC_ALG_TKIP)))
2166 queue_delayed_work_rsl(ieee->wq, &ieee->associate_procedure_wq, 0);
2167
2168 priv->check_roaming_cnt = 0;
2169 }
2170 }
2171 ieee->LinkDetectInfo.NumRecvBcnInPeriod=0;
2172 ieee->LinkDetectInfo.NumRecvDataInPeriod=0;
2173
2174 }
2175
2176 spin_lock_irqsave(&priv->tx_lock,flags);
2177 if ((check_reset_cnt++ >= 3) && (!ieee->is_roaming) &&
2178 (!priv->RFChangeInProgress) && (!pPSC->bSwRfProcessing))
2179 {
2180 ResetType = rtl819x_ifcheck_resetornot(dev);
2181 check_reset_cnt = 3;
2182 }
2183 spin_unlock_irqrestore(&priv->tx_lock,flags);
2184
2185 if (!priv->bDisableNormalResetCheck && ResetType == RESET_TYPE_NORMAL)
2186 {
2187 priv->ResetProgress = RESET_TYPE_NORMAL;
2188 RT_TRACE(COMP_RESET,"%s(): NOMAL RESET\n",__func__);
2189 return;
2190 }
2191
2192 if ( ((priv->force_reset) || (!priv->bDisableNormalResetCheck && ResetType==RESET_TYPE_SILENT)))
2193 {
2194 rtl819x_ifsilentreset(dev);
2195 }
2196 priv->force_reset = false;
2197 priv->bForcedSilentReset = false;
2198 priv->bResetInProgress = false;
2199 RT_TRACE(COMP_TRACE, " <==RtUsbCheckForHangWorkItemCallback()\n");
2200}
2201
2202void watch_dog_timer_callback(unsigned long data)
2203{
2204 struct r8192_priv *priv = rtllib_priv((struct net_device *) data);
2205 queue_delayed_work_rsl(priv->priv_wq,&priv->watch_dog_wq,0);
2206 mod_timer(&priv->watch_dog_timer, jiffies + MSECS(RTLLIB_WATCH_DOG_TIME));
2207}
2208
2209/****************************************************************************
2210 ---------------------------- NIC TX/RX STUFF---------------------------
2211*****************************************************************************/
2212void rtl8192_rx_enable(struct net_device *dev)
2213{
2214 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2215 priv->ops->rx_enable(dev);
2216}
2217
2218void rtl8192_tx_enable(struct net_device *dev)
2219{
2220 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2221
2222 priv->ops->tx_enable(dev);
2223
2224 rtllib_reset_queue(priv->rtllib);
2225}
2226
2227
2228static void rtl8192_free_rx_ring(struct net_device *dev)
2229{
2230 struct r8192_priv *priv = rtllib_priv(dev);
2231 int i,rx_queue_idx;
2232
2233 for (rx_queue_idx = 0; rx_queue_idx < MAX_RX_QUEUE; rx_queue_idx ++){
2234 for (i = 0; i < priv->rxringcount; i++) {
2235 struct sk_buff *skb = priv->rx_buf[rx_queue_idx][i];
2236 if (!skb)
2237 continue;
2238
2239 pci_unmap_single(priv->pdev,
2240 *((dma_addr_t *)skb->cb),
2241 priv->rxbuffersize, PCI_DMA_FROMDEVICE);
2242 kfree_skb(skb);
2243 }
2244
2245 pci_free_consistent(priv->pdev, sizeof(*priv->rx_ring[rx_queue_idx]) * priv->rxringcount,
2246 priv->rx_ring[rx_queue_idx], priv->rx_ring_dma[rx_queue_idx]);
2247 priv->rx_ring[rx_queue_idx] = NULL;
2248 }
2249}
2250
2251static void rtl8192_free_tx_ring(struct net_device *dev, unsigned int prio)
2252{
2253 struct r8192_priv *priv = rtllib_priv(dev);
2254 struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
2255
2256 while (skb_queue_len(&ring->queue)) {
2257 tx_desc *entry = &ring->desc[ring->idx];
2258 struct sk_buff *skb = __skb_dequeue(&ring->queue);
2259
2260 pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
2261 skb->len, PCI_DMA_TODEVICE);
2262 kfree_skb(skb);
2263 ring->idx = (ring->idx + 1) % ring->entries;
2264 }
2265
2266 pci_free_consistent(priv->pdev, sizeof(*ring->desc)*ring->entries,
2267 ring->desc, ring->dma);
2268 ring->desc = NULL;
2269}
2270
2271void rtl8192_data_hard_stop(struct net_device *dev)
2272{
2273}
2274
2275
2276void rtl8192_data_hard_resume(struct net_device *dev)
2277{
2278}
2279
2280void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int rate)
2281{
2282 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2283 int ret;
2284 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
2285 u8 queue_index = tcb_desc->queue_index;
2286
2287 if ((priv->rtllib->eRFPowerState == eRfOff) || IS_NIC_DOWN(priv) || priv->bResetInProgress){
2288 kfree_skb(skb);
2289 return;
2290 }
2291
2292 assert(queue_index != TXCMD_QUEUE);
2293
2294
2295 memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
2296 skb_push(skb, priv->rtllib->tx_headroom);
2297 ret = rtl8192_tx(dev, skb);
2298 if (ret != 0) {
2299 kfree_skb(skb);
2300 };
2301
2302 if (queue_index!=MGNT_QUEUE) {
2303 priv->rtllib->stats.tx_bytes+=(skb->len - priv->rtllib->tx_headroom);
2304 priv->rtllib->stats.tx_packets++;
2305 }
2306
2307
2308 return;
2309}
2310
2311int rtl8192_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
2312{
2313 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2314 int ret;
2315 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
2316 u8 queue_index = tcb_desc->queue_index;
2317
2318 if (queue_index != TXCMD_QUEUE){
2319 if ((priv->rtllib->eRFPowerState == eRfOff) ||IS_NIC_DOWN(priv) || priv->bResetInProgress){
2320 kfree_skb(skb);
2321 return 0;
2322 }
2323 }
2324
2325 memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
2326 if (queue_index == TXCMD_QUEUE) {
2327 rtl8192_tx_cmd(dev, skb);
2328 ret = 0;
2329 return ret;
2330 } else {
2331 tcb_desc->RATRIndex = 7;
2332 tcb_desc->bTxDisableRateFallBack = 1;
2333 tcb_desc->bTxUseDriverAssingedRate = 1;
2334 tcb_desc->bTxEnableFwCalcDur = 1;
2335 skb_push(skb, priv->rtllib->tx_headroom);
2336 ret = rtl8192_tx(dev, skb);
2337 if (ret != 0) {
2338 kfree_skb(skb);
2339 };
2340 }
2341
2342
2343
2344 return ret;
2345
2346}
2347
2348void rtl8192_tx_isr(struct net_device *dev, int prio)
2349{
2350 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2351
2352 struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
2353
2354 while (skb_queue_len(&ring->queue)) {
2355 tx_desc *entry = &ring->desc[ring->idx];
2356 struct sk_buff *skb;
2357
2358 if (prio != BEACON_QUEUE) {
2359 if (entry->OWN)
2360 return;
2361 ring->idx = (ring->idx + 1) % ring->entries;
2362 }
2363
2364 skb = __skb_dequeue(&ring->queue);
2365 pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
2366 skb->len, PCI_DMA_TODEVICE);
2367
2368 kfree_skb(skb);
2369 }
2370 if (prio != BEACON_QUEUE) {
2371 tasklet_schedule(&priv->irq_tx_tasklet);
2372 }
2373
2374}
2375
2376void rtl8192_tx_cmd(struct net_device *dev, struct sk_buff *skb)
2377{
2378 struct r8192_priv *priv = rtllib_priv(dev);
2379 struct rtl8192_tx_ring *ring;
2380 tx_desc_cmd* entry;
2381 unsigned int idx;
2382 cb_desc *tcb_desc;
2383 unsigned long flags;
2384
2385 spin_lock_irqsave(&priv->irq_th_lock,flags);
2386 ring = &priv->tx_ring[TXCMD_QUEUE];
2387
2388 idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
2389 entry = (tx_desc_cmd*) &ring->desc[idx];
2390
2391 tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
2392
2393 priv->ops->tx_fill_cmd_descriptor(dev, entry, tcb_desc, skb);
2394
2395 __skb_queue_tail(&ring->queue, skb);
2396 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
2397
2398 return;
2399}
2400
2401short rtl8192_tx(struct net_device *dev, struct sk_buff* skb)
2402{
2403 struct r8192_priv *priv = rtllib_priv(dev);
2404 struct rtl8192_tx_ring *ring;
2405 unsigned long flags;
2406 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
2407 tx_desc *pdesc = NULL;
2408 struct rtllib_hdr_1addr * header = NULL;
2409 u16 fc=0, type=0,stype=0;
2410 bool multi_addr=false,broad_addr=false,uni_addr=false;
2411 u8* pda_addr = NULL;
2412 int idx;
2413 u32 fwinfo_size = 0;
2414
2415 if (priv->bdisable_nic){
2416 RT_TRACE(COMP_ERR,"%s: ERR!! Nic is disabled! Can't tx packet len=%d qidx=%d!!!\n", __func__, skb->len, tcb_desc->queue_index);
2417 return skb->len;
2418 }
2419
2420 priv->rtllib->bAwakePktSent = true;
2421
2422#if defined RTL8192SE || defined RTL8192CE
2423 fwinfo_size = 0;
2424#else
2425 fwinfo_size = sizeof(TX_FWINFO_8190PCI);
2426#endif
2427
2428 header = (struct rtllib_hdr_1addr *)(((u8*)skb->data) + fwinfo_size);
2429 fc = header->frame_ctl;
2430 type = WLAN_FC_GET_TYPE(fc);
2431 stype = WLAN_FC_GET_STYPE(fc);
2432 pda_addr = header->addr1;
2433
2434 if (is_multicast_ether_addr(pda_addr))
2435 multi_addr = true;
2436 else if (is_broadcast_ether_addr(pda_addr))
2437 broad_addr = true;
2438 else {
2439 uni_addr = true;
2440 }
2441
2442 if (uni_addr)
2443 priv->stats.txbytesunicast += skb->len - fwinfo_size;
2444 else if (multi_addr)
2445 priv->stats.txbytesmulticast += skb->len - fwinfo_size;
2446 else
2447 priv->stats.txbytesbroadcast += skb->len - fwinfo_size;
2448
2449 spin_lock_irqsave(&priv->irq_th_lock,flags);
2450 ring = &priv->tx_ring[tcb_desc->queue_index];
2451 if (tcb_desc->queue_index != BEACON_QUEUE) {
2452 idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
2453 } else {
2454#ifdef _ENABLE_SW_BEACON
2455 idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
2456#else
2457 idx = 0;
2458#endif
2459 }
2460
2461 pdesc = &ring->desc[idx];
2462 if ((pdesc->OWN == 1) && (tcb_desc->queue_index != BEACON_QUEUE)) {
2463 RT_TRACE(COMP_ERR,"No more TX desc@%d, ring->idx = %d,idx = %d, skblen = 0x%x queuelen=%d", \
2464 tcb_desc->queue_index,ring->idx, idx,skb->len, skb_queue_len(&ring->queue));
2465 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
2466 return skb->len;
2467 }
2468
2469 if (tcb_desc->queue_index == MGNT_QUEUE){
2470 }
2471
2472 if (type == RTLLIB_FTYPE_DATA){
2473 if (priv->rtllib->LedControlHandler)
2474 priv->rtllib->LedControlHandler(dev, LED_CTL_TX);
2475 }
2476 priv->ops->tx_fill_descriptor(dev, pdesc, tcb_desc, skb);
2477 __skb_queue_tail(&ring->queue, skb);
2478 pdesc->OWN = 1;
2479 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
2480 dev->trans_start = jiffies;
2481
2482#ifdef RTL8192CE
2483 if (tcb_desc->queue_index == BEACON_QUEUE){
2484 write_nic_word(dev, REG_PCIE_CTRL_REG, BIT4);
2485 }else{
2486 write_nic_word(dev, REG_PCIE_CTRL_REG, BIT0<<(tcb_desc->queue_index));
2487 }
2488#else
2489 write_nic_word(dev,TPPoll,0x01<<tcb_desc->queue_index);
2490#endif
2491 return 0;
2492}
2493
2494short rtl8192_alloc_rx_desc_ring(struct net_device *dev)
2495{
2496 struct r8192_priv *priv = rtllib_priv(dev);
2497 rx_desc *entry = NULL;
2498 int i, rx_queue_idx;
2499
2500 for (rx_queue_idx = 0; rx_queue_idx < MAX_RX_QUEUE; rx_queue_idx ++){
2501 priv->rx_ring[rx_queue_idx] = pci_alloc_consistent(priv->pdev,
2502 sizeof(*priv->rx_ring[rx_queue_idx]) * priv->rxringcount, &priv->rx_ring_dma[rx_queue_idx]);
2503
2504 if (!priv->rx_ring[rx_queue_idx] || (unsigned long)priv->rx_ring[rx_queue_idx] & 0xFF) {
2505 RT_TRACE(COMP_ERR,"Cannot allocate RX ring\n");
2506 return -ENOMEM;
2507 }
2508
2509 memset(priv->rx_ring[rx_queue_idx], 0, sizeof(*priv->rx_ring[rx_queue_idx]) * priv->rxringcount);
2510 priv->rx_idx[rx_queue_idx] = 0;
2511
2512 for (i = 0; i < priv->rxringcount; i++) {
2513 struct sk_buff *skb = dev_alloc_skb(priv->rxbuffersize);
2514 dma_addr_t *mapping;
2515 entry = &priv->rx_ring[rx_queue_idx][i];
2516 if (!skb)
2517 return 0;
2518 skb->dev = dev;
2519 priv->rx_buf[rx_queue_idx][i] = skb;
2520 mapping = (dma_addr_t *)skb->cb;
2521 *mapping = pci_map_single(priv->pdev, skb_tail_pointer_rsl(skb),
2522 priv->rxbuffersize, PCI_DMA_FROMDEVICE);
2523
2524 entry->BufferAddress = cpu_to_le32(*mapping);
2525
2526 entry->Length = priv->rxbuffersize;
2527 entry->OWN = 1;
2528 }
2529
2530 entry->EOR = 1;
2531 }
2532 return 0;
2533}
2534
2535static int rtl8192_alloc_tx_desc_ring(struct net_device *dev,
2536 unsigned int prio, unsigned int entries)
2537{
2538 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2539 tx_desc *ring;
2540 dma_addr_t dma;
2541 int i;
2542
2543 ring = pci_alloc_consistent(priv->pdev, sizeof(*ring) * entries, &dma);
2544 if (!ring || (unsigned long)ring & 0xFF) {
2545 RT_TRACE(COMP_ERR, "Cannot allocate TX ring (prio = %d)\n", prio);
2546 return -ENOMEM;
2547 }
2548
2549 memset(ring, 0, sizeof(*ring)*entries);
2550 priv->tx_ring[prio].desc = ring;
2551 priv->tx_ring[prio].dma = dma;
2552 priv->tx_ring[prio].idx = 0;
2553 priv->tx_ring[prio].entries = entries;
2554 skb_queue_head_init(&priv->tx_ring[prio].queue);
2555
2556 for (i = 0; i < entries; i++)
2557 ring[i].NextDescAddress =
2558 cpu_to_le32((u32)dma + ((i + 1) % entries) * sizeof(*ring));
2559
2560 return 0;
2561}
2562
2563
2564short rtl8192_pci_initdescring(struct net_device *dev)
2565{
2566 u32 ret;
2567 int i;
2568 struct r8192_priv *priv = rtllib_priv(dev);
2569
2570 ret = rtl8192_alloc_rx_desc_ring(dev);
2571 if (ret) {
2572 return ret;
2573 }
2574
2575
2576 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
2577 if ((ret = rtl8192_alloc_tx_desc_ring(dev, i, priv->txringcount)))
2578 goto err_free_rings;
2579 }
2580
2581 return 0;
2582
2583err_free_rings:
2584 rtl8192_free_rx_ring(dev);
2585 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
2586 if (priv->tx_ring[i].desc)
2587 rtl8192_free_tx_ring(dev, i);
2588 return 1;
2589}
2590
2591void rtl8192_pci_resetdescring(struct net_device *dev)
2592{
2593 struct r8192_priv *priv = rtllib_priv(dev);
2594 int i,rx_queue_idx;
2595 unsigned long flags = 0;
2596
2597 for (rx_queue_idx = 0; rx_queue_idx < MAX_RX_QUEUE; rx_queue_idx ++){
2598 if (priv->rx_ring[rx_queue_idx]) {
2599 rx_desc *entry = NULL;
2600 for (i = 0; i < priv->rxringcount; i++) {
2601 entry = &priv->rx_ring[rx_queue_idx][i];
2602 entry->OWN = 1;
2603 }
2604 priv->rx_idx[rx_queue_idx] = 0;
2605 }
2606 }
2607
2608 spin_lock_irqsave(&priv->irq_th_lock,flags);
2609 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
2610 if (priv->tx_ring[i].desc) {
2611 struct rtl8192_tx_ring *ring = &priv->tx_ring[i];
2612
2613 while (skb_queue_len(&ring->queue)) {
2614 tx_desc *entry = &ring->desc[ring->idx];
2615 struct sk_buff *skb = __skb_dequeue(&ring->queue);
2616
2617 pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
2618 skb->len, PCI_DMA_TODEVICE);
2619 kfree_skb(skb);
2620 ring->idx = (ring->idx + 1) % ring->entries;
2621 }
2622 ring->idx = 0;
2623 }
2624 }
2625 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
2626}
2627
2628void rtl819x_UpdateRxPktTimeStamp (struct net_device *dev, struct rtllib_rx_stats *stats)
2629{
2630 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2631
2632 if (stats->bIsAMPDU && !stats->bFirstMPDU) {
2633 stats->mac_time[0] = priv->LastRxDescTSFLow;
2634 stats->mac_time[1] = priv->LastRxDescTSFHigh;
2635 } else {
2636 priv->LastRxDescTSFLow = stats->mac_time[0];
2637 priv->LastRxDescTSFHigh = stats->mac_time[1];
2638 }
2639}
2640
2641long rtl819x_translate_todbm(struct r8192_priv * priv, u8 signal_strength_index )
2642{
2643 long signal_power;
2644
2645 signal_power = (long)((signal_strength_index + 1) >> 1);
2646 signal_power -= 95;
2647
2648 return signal_power;
2649}
2650
2651
2652void
2653rtl819x_update_rxsignalstatistics8190pci(
2654 struct r8192_priv * priv,
2655 struct rtllib_rx_stats * pprevious_stats
2656 )
2657{
2658 int weighting = 0;
2659
2660
2661 if (priv->stats.recv_signal_power == 0)
2662 priv->stats.recv_signal_power = pprevious_stats->RecvSignalPower;
2663
2664 if (pprevious_stats->RecvSignalPower > priv->stats.recv_signal_power)
2665 weighting = 5;
2666 else if (pprevious_stats->RecvSignalPower < priv->stats.recv_signal_power)
2667 weighting = (-5);
2668 priv->stats.recv_signal_power = (priv->stats.recv_signal_power * 5 + pprevious_stats->RecvSignalPower + weighting) / 6;
2669}
2670
2671void
2672rtl819x_process_cck_rxpathsel(
2673 struct r8192_priv * priv,
2674 struct rtllib_rx_stats * pprevious_stats
2675 )
2676{
2677#ifdef RTL8190P
2678 char last_cck_adc_pwdb[4]={0,0,0,0};
2679 u8 i;
2680 if (priv->rf_type == RF_2T4R && DM_RxPathSelTable.Enable)
2681 {
2682 if (pprevious_stats->bIsCCK &&
2683 (pprevious_stats->bPacketToSelf ||pprevious_stats->bPacketBeacon))
2684 {
2685 if (priv->stats.cck_adc_pwdb.TotalNum++ >= PHY_RSSI_SLID_WIN_MAX)
2686 {
2687 priv->stats.cck_adc_pwdb.TotalNum = PHY_RSSI_SLID_WIN_MAX;
2688 for (i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
2689 {
2690 last_cck_adc_pwdb[i] = priv->stats.cck_adc_pwdb.elements[i][priv->stats.cck_adc_pwdb.index];
2691 priv->stats.cck_adc_pwdb.TotalVal[i] -= last_cck_adc_pwdb[i];
2692 }
2693 }
2694 for (i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
2695 {
2696 priv->stats.cck_adc_pwdb.TotalVal[i] += pprevious_stats->cck_adc_pwdb[i];
2697 priv->stats.cck_adc_pwdb.elements[i][priv->stats.cck_adc_pwdb.index] = pprevious_stats->cck_adc_pwdb[i];
2698 }
2699 priv->stats.cck_adc_pwdb.index++;
2700 if (priv->stats.cck_adc_pwdb.index >= PHY_RSSI_SLID_WIN_MAX)
2701 priv->stats.cck_adc_pwdb.index = 0;
2702
2703 for (i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
2704 {
2705 DM_RxPathSelTable.cck_pwdb_sta[i] = priv->stats.cck_adc_pwdb.TotalVal[i]/priv->stats.cck_adc_pwdb.TotalNum;
2706 }
2707
2708 for (i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
2709 {
2710 if (pprevious_stats->cck_adc_pwdb[i] > (char)priv->undecorated_smoothed_cck_adc_pwdb[i])
2711 {
2712 priv->undecorated_smoothed_cck_adc_pwdb[i] =
2713 ( (priv->undecorated_smoothed_cck_adc_pwdb[i]*(Rx_Smooth_Factor-1)) +
2714 (pprevious_stats->cck_adc_pwdb[i])) /(Rx_Smooth_Factor);
2715 priv->undecorated_smoothed_cck_adc_pwdb[i] = priv->undecorated_smoothed_cck_adc_pwdb[i] + 1;
2716 }
2717 else
2718 {
2719 priv->undecorated_smoothed_cck_adc_pwdb[i] =
2720 ( (priv->undecorated_smoothed_cck_adc_pwdb[i]*(Rx_Smooth_Factor-1)) +
2721 (pprevious_stats->cck_adc_pwdb[i])) /(Rx_Smooth_Factor);
2722 }
2723 }
2724 }
2725 }
2726#endif
2727}
2728
2729
2730u8 rtl819x_query_rxpwrpercentage(
2731 char antpower
2732 )
2733{
2734 if ((antpower <= -100) || (antpower >= 20))
2735 {
2736 return 0;
2737 }
2738 else if (antpower >= 0)
2739 {
2740 return 100;
2741 }
2742 else
2743 {
2744 return (100+antpower);
2745 }
2746
2747} /* QueryRxPwrPercentage */
2748
2749u8
2750rtl819x_evm_dbtopercentage(
2751 char value
2752 )
2753{
2754 char ret_val;
2755
2756 ret_val = value;
2757
2758 if (ret_val >= 0)
2759 ret_val = 0;
2760 if (ret_val <= -33)
2761 ret_val = -33;
2762 ret_val = 0 - ret_val;
2763 ret_val*=3;
2764 if (ret_val == 99)
2765 ret_val = 100;
2766 return(ret_val);
2767}
2768
2769void
2770rtl8192_record_rxdesc_forlateruse(
2771 struct rtllib_rx_stats * psrc_stats,
2772 struct rtllib_rx_stats * ptarget_stats
2773)
2774{
2775 ptarget_stats->bIsAMPDU = psrc_stats->bIsAMPDU;
2776 ptarget_stats->bFirstMPDU = psrc_stats->bFirstMPDU;
2777}
2778
2779
2780
2781void rtl8192_rx_normal(struct net_device *dev)
2782{
2783 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2784 struct rtllib_hdr_1addr *rtllib_hdr = NULL;
2785 bool unicast_packet = false;
2786 bool bLedBlinking=true;
2787 u16 fc=0, type=0;
2788 u32 skb_len = 0;
2789 int rx_queue_idx = RX_MPDU_QUEUE;
2790
2791 struct rtllib_rx_stats stats = {
2792 .signal = 0,
2793 .noise = -98,
2794 .rate = 0,
2795 .freq = RTLLIB_24GHZ_BAND,
2796 };
2797 unsigned int count = priv->rxringcount;
2798
2799 stats.nic_type = NIC_8192E;
2800
2801 while (count--) {
2802 rx_desc *pdesc = &priv->rx_ring[rx_queue_idx][priv->rx_idx[rx_queue_idx]];
2803 struct sk_buff *skb = priv->rx_buf[rx_queue_idx][priv->rx_idx[rx_queue_idx]];
2804
2805 if (pdesc->OWN){
2806 return;
2807 } else {
2808
2809 struct sk_buff *new_skb = NULL;
2810 if (!priv->ops->rx_query_status_descriptor(dev, &stats, pdesc, skb))
2811 goto done;
2812
2813 pci_unmap_single(priv->pdev,
2814 *((dma_addr_t *)skb->cb),
2815 priv->rxbuffersize,
2816 PCI_DMA_FROMDEVICE);
2817
2818 skb_put(skb, pdesc->Length);
2819 skb_reserve(skb, stats.RxDrvInfoSize + stats.RxBufShift);
2820 skb_trim(skb, skb->len - 4/*sCrcLng*/);
2821 rtllib_hdr = (struct rtllib_hdr_1addr *)skb->data;
2822 if (is_broadcast_ether_addr(rtllib_hdr->addr1)) {
2823 }else if (is_multicast_ether_addr(rtllib_hdr->addr1)){
2824 }else {
2825 /* unicast packet */
2826 unicast_packet = true;
2827 }
2828 fc = le16_to_cpu(rtllib_hdr->frame_ctl);
2829 type = WLAN_FC_GET_TYPE(fc);
2830 if (type == RTLLIB_FTYPE_MGMT)
2831 {
2832 bLedBlinking = false;
2833 }
2834 if (bLedBlinking)
2835 if (priv->rtllib->LedControlHandler)
2836 priv->rtllib->LedControlHandler(dev, LED_CTL_RX);
2837
2838 if (stats.bCRC) {
2839 if (type != RTLLIB_FTYPE_MGMT)
2840 priv->stats.rxdatacrcerr ++;
2841 else
2842 priv->stats.rxmgmtcrcerr ++;
2843 }
2844
2845 skb_len = skb->len;
2846
2847#ifdef RTL8192CE
2848 if (!stats.bCRC)
2849#else
2850 if (1)
2851#endif
2852 {
2853 if (!rtllib_rx(priv->rtllib, skb, &stats)){
2854 dev_kfree_skb_any(skb);
2855 } else {
2856 priv->stats.rxok++;
2857 if (unicast_packet) {
2858 priv->stats.rxbytesunicast += skb_len;
2859 }
2860 }
2861 }else{
2862 dev_kfree_skb_any(skb);
2863 }
2864#if 1
2865 new_skb = dev_alloc_skb(priv->rxbuffersize);
2866 if (unlikely(!new_skb))
2867 {
2868 printk("==========>can't alloc skb for rx\n");
2869 goto done;
2870 }
2871 skb=new_skb;
2872 skb->dev = dev;
2873#endif
2874 priv->rx_buf[rx_queue_idx][priv->rx_idx[rx_queue_idx]] = skb;
2875 *((dma_addr_t *) skb->cb) = pci_map_single(priv->pdev, skb_tail_pointer_rsl(skb), priv->rxbuffersize, PCI_DMA_FROMDEVICE);
2876
2877 }
2878done:
2879 pdesc->BufferAddress = cpu_to_le32(*((dma_addr_t *)skb->cb));
2880 pdesc->OWN = 1;
2881 pdesc->Length = priv->rxbuffersize;
2882 if (priv->rx_idx[rx_queue_idx] == priv->rxringcount-1)
2883 pdesc->EOR = 1;
2884 priv->rx_idx[rx_queue_idx] = (priv->rx_idx[rx_queue_idx] + 1) % priv->rxringcount;
2885 }
2886
2887}
2888
2889void rtl8192_rx_cmd(struct net_device *dev)
2890{
2891#ifdef RTL8192SE
2892 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2893
2894 unsigned int count = priv->rxringcount;
2895 int rx_queue_idx = RX_CMD_QUEUE;
2896
2897 struct rtllib_rx_stats stats = {
2898 .signal = 0,
2899 .noise = -98,
2900 .rate = 0,
2901 .freq = RTLLIB_24GHZ_BAND,
2902 };
2903 stats.nic_type = NIC_8192E;
2904
2905 while (count--) {
2906 rx_desc *pdesc = &priv->rx_ring[rx_queue_idx][priv->rx_idx[rx_queue_idx]];
2907 struct sk_buff *skb = priv->rx_buf[rx_queue_idx][priv->rx_idx[rx_queue_idx]];
2908
2909 if (pdesc->OWN){
2910 return;
2911 } else {
2912 struct sk_buff *new_skb = NULL;
2913
2914 pci_unmap_single(priv->pdev,
2915 *((dma_addr_t *)skb->cb),
2916 priv->rxbuffersize,
2917 PCI_DMA_FROMDEVICE);
2918
2919 skb_put(skb, pdesc->Length);
2920
2921 if (pdesc->MACID == 0x1e) {
2922
2923 pdesc->Length = pdesc->Length - 32;
2924 pdesc->DrvInfoSize = 4;
2925 printk(">>>>%s()CMD PKT RX, beacon_len:%d payload_len:%d\n",__func__, pdesc->Length,skb->len);
2926
2927
2928 priv->ops->rx_query_status_descriptor(dev, &stats, pdesc, skb);
2929 skb_reserve(skb, stats.RxDrvInfoSize + stats.RxBufShift);
2930 }
2931
2932 skb_trim(skb, skb->len - 4/*sCrcLng*/);
2933
2934 if (pdesc->MACID == 0x1e){
2935 if (!rtllib_rx(priv->rtllib, skb, &stats)){
2936 dev_kfree_skb_any(skb);
2937 }
2938 }else{
2939 if (priv->ops->rx_command_packet_handler != NULL)
2940 priv->ops->rx_command_packet_handler(dev, skb, pdesc);
2941 dev_kfree_skb_any(skb);
2942 }
2943
2944
2945 new_skb = dev_alloc_skb(priv->rxbuffersize);
2946 if (unlikely(!new_skb))
2947 {
2948 printk("==========>can't alloc skb for rx\n");
2949 goto done;
2950 }
2951 skb=new_skb;
2952 skb->dev = dev;
2953
2954 priv->rx_buf[rx_queue_idx][priv->rx_idx[rx_queue_idx]] = skb;
2955 *((dma_addr_t *) skb->cb) = pci_map_single(priv->pdev, skb_tail_pointer_rsl(skb), priv->rxbuffersize, PCI_DMA_FROMDEVICE);
2956
2957 }
2958done:
2959 pdesc->BufferAddress = cpu_to_le32(*((dma_addr_t *)skb->cb));
2960 pdesc->OWN = 1;
2961 pdesc->Length = priv->rxbuffersize;
2962 if (priv->rx_idx[rx_queue_idx] == priv->rxringcount-1)
2963 pdesc->EOR = 1;
2964 priv->rx_idx[rx_queue_idx] = (priv->rx_idx[rx_queue_idx] + 1) % priv->rxringcount;
2965 }
2966#endif
2967}
2968
2969
2970void rtl8192_tx_resume(struct net_device *dev)
2971{
2972 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2973 struct rtllib_device *ieee = priv->rtllib;
2974 struct sk_buff *skb;
2975 int queue_index;
2976
2977 for (queue_index = BK_QUEUE; queue_index < MAX_QUEUE_SIZE;queue_index++) {
2978 while ((!skb_queue_empty(&ieee->skb_waitQ[queue_index]))&&
2979 (priv->rtllib->check_nic_enough_desc(dev,queue_index) > 0)) {
2980 skb = skb_dequeue(&ieee->skb_waitQ[queue_index]);
2981 ieee->softmac_data_hard_start_xmit(skb,dev,0/* rate useless now*/);
2982 }
2983 }
2984}
2985
2986void rtl8192_irq_tx_tasklet(struct r8192_priv *priv)
2987{
2988 rtl8192_tx_resume(priv->rtllib->dev);
2989}
2990
2991void rtl8192_irq_rx_tasklet(struct r8192_priv *priv)
2992{
2993 rtl8192_rx_normal(priv->rtllib->dev);
2994
2995 if (MAX_RX_QUEUE > 1)
2996 rtl8192_rx_cmd(priv->rtllib->dev);
2997
2998#ifndef RTL8192CE
2999 write_nic_dword(priv->rtllib->dev, INTA_MASK,read_nic_dword(priv->rtllib->dev, INTA_MASK) | IMR_RDU);
3000#endif
3001}
3002
3003/****************************************************************************
3004 ---------------------------- NIC START/CLOSE STUFF---------------------------
3005*****************************************************************************/
3006void rtl8192_cancel_deferred_work(struct r8192_priv* priv)
3007{
3008#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
3009 cancel_delayed_work(&priv->watch_dog_wq);
3010 cancel_delayed_work(&priv->update_beacon_wq);
3011#ifndef RTL8190P
3012 cancel_delayed_work(&priv->rtllib->hw_sleep_wq);
3013#endif
3014#if defined RTL8192SE
3015 cancel_delayed_work(&priv->check_hw_scan_wq);
3016 cancel_delayed_work(&priv->hw_scan_simu_wq);
3017 cancel_delayed_work(&priv->start_hw_scan_wq);
3018 cancel_delayed_work(&priv->rtllib->update_assoc_sta_info_wq);
3019 cancel_delayed_work(&priv->rtllib->check_tsf_wq);
3020#endif
3021#endif
3022
3023#if LINUX_VERSION_CODE >=KERNEL_VERSION(2,6,22)
3024 cancel_work_sync(&priv->reset_wq);
3025 cancel_work_sync(&priv->qos_activate);
3026#elif ((LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)))
3027 cancel_delayed_work(&priv->reset_wq);
3028 cancel_delayed_work(&priv->qos_activate);
3029#if defined RTL8192SE
3030 cancel_delayed_work(&priv->rtllib->update_assoc_sta_info_wq);
3031 cancel_delayed_work(&priv->rtllib->check_tsf_wq);
3032#endif
3033#endif
3034
3035}
3036
3037int _rtl8192_up(struct net_device *dev,bool is_silent_reset)
3038{
3039 if (_rtl8192_sta_up(dev, is_silent_reset) == -1)
3040 return -1;
3041 return 0;
3042}
3043
3044
3045int rtl8192_open(struct net_device *dev)
3046{
3047 struct r8192_priv *priv = rtllib_priv(dev);
3048 int ret;
3049
3050 down(&priv->wx_sem);
3051 ret = rtl8192_up(dev);
3052 up(&priv->wx_sem);
3053 return ret;
3054
3055}
3056
3057
3058int rtl8192_up(struct net_device *dev)
3059{
3060 struct r8192_priv *priv = rtllib_priv(dev);
3061
3062 if (priv->up == 1) return -1;
3063 return _rtl8192_up(dev,false);
3064}
3065
3066
3067int rtl8192_close(struct net_device *dev)
3068{
3069 struct r8192_priv *priv = rtllib_priv(dev);
3070 int ret;
3071
3072 if ((rtllib_act_scanning(priv->rtllib, false)) &&
3073 !(priv->rtllib->softmac_features & IEEE_SOFTMAC_SCAN)){
3074 rtllib_stop_scan(priv->rtllib);
3075 }
3076
3077 down(&priv->wx_sem);
3078
3079 ret = rtl8192_down(dev,true);
3080
3081 up(&priv->wx_sem);
3082
3083 return ret;
3084
3085}
3086
3087int rtl8192_down(struct net_device *dev, bool shutdownrf)
3088{
3089#ifdef CONFIG_MP
3090 struct r8192_priv *priv = rtllib_priv(dev);
3091#endif
3092
3093 if (rtl8192_sta_down(dev, shutdownrf) == -1)
3094 return -1;
3095
3096#ifdef CONFIG_MP
3097 if (priv->bCckContTx) {
3098 RT_TRACE(COMP_DBG, "####RTL819X MP####stop single cck continious TX\n");
3099 mpt_StopCckCoNtTx(dev);
3100 }
3101 if (priv->bOfdmContTx) {
3102 RT_TRACE(COMP_DBG, "####RTL819X MP####stop single ofdm continious TX\n");
3103 mpt_StopOfdmContTx(dev);
3104 }
3105 if (priv->bSingleCarrier) {
3106 RT_TRACE(COMP_DBG, "####RTL819X MP####stop single carrier mode\n");
3107 MPT_ProSetSingleCarrier(dev, false);
3108 }
3109#endif
3110 return 0;
3111}
3112
3113void rtl8192_commit(struct net_device *dev)
3114{
3115 struct r8192_priv *priv = rtllib_priv(dev);
3116
3117 if (priv->up == 0) return ;
3118 rtllib_softmac_stop_protocol(priv->rtllib, 0 , true);
3119 rtl8192_irq_disable(dev);
3120 priv->ops->stop_adapter(dev, true);
3121 _rtl8192_up(dev,false);
3122}
3123
3124void rtl8192_restart(void *data)
3125{
3126#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3127 struct r8192_priv *priv = container_of_work_rsl(data, struct r8192_priv, reset_wq);
3128 struct net_device *dev = priv->rtllib->dev;
3129#else
3130 struct net_device *dev = (struct net_device *)data;
3131 struct r8192_priv *priv = rtllib_priv(dev);
3132#endif
3133
3134 down(&priv->wx_sem);
3135
3136 rtl8192_commit(dev);
3137
3138 up(&priv->wx_sem);
3139}
3140
3141static void r8192_set_multicast(struct net_device *dev)
3142{
3143 struct r8192_priv *priv = rtllib_priv(dev);
3144 short promisc;
3145
3146
3147
3148 promisc = (dev->flags & IFF_PROMISC) ? 1:0;
3149
3150 if (promisc != priv->promisc) {
3151 ;
3152 }
3153
3154 priv->promisc = promisc;
3155
3156}
3157
3158
3159int r8192_set_mac_adr(struct net_device *dev, void *mac)
3160{
3161 struct r8192_priv *priv = rtllib_priv(dev);
3162 struct sockaddr *addr = mac;
3163
3164 down(&priv->wx_sem);
3165
3166 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
3167
3168#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
3169 schedule_work(&priv->reset_wq);
3170#else
3171 schedule_task(&priv->reset_wq);
3172#endif
3173 up(&priv->wx_sem);
3174
3175 return 0;
3176}
3177
3178/* based on ipw2200 driver */
3179int rtl8192_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3180{
3181 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
3182 struct iwreq *wrq = (struct iwreq *)rq;
3183 int ret=-1;
3184 struct rtllib_device *ieee = priv->rtllib;
3185 u32 key[4];
3186 u8 broadcast_addr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
3187 u8 zero_addr[6] = {0};
3188 struct iw_point *p = &wrq->u.data;
3189
3190 down(&priv->wx_sem);
3191
3192 switch (cmd) {
3193 case RTL_IOCTL_WPA_SUPPLICANT:
3194 {
3195 struct ieee_param *ipw = NULL;
3196 if (p->length < sizeof(struct ieee_param) || !p->pointer){
3197 ret = -EINVAL;
3198 goto out;
3199 }
3200
3201 ipw = (struct ieee_param *)kmalloc(p->length, GFP_KERNEL);
3202 if (ipw == NULL){
3203 ret = -ENOMEM;
3204 goto out;
3205 }
3206 if (copy_from_user(ipw, p->pointer, p->length)) {
3207 kfree(ipw);
3208 ret = -EFAULT;
3209 goto out;
3210 }
3211
3212 if (ipw->cmd == IEEE_CMD_SET_ENCRYPTION)
3213 {
3214 if (ipw->u.crypt.set_tx)
3215 {
3216 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
3217 ieee->pairwise_key_type = KEY_TYPE_CCMP;
3218 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
3219 ieee->pairwise_key_type = KEY_TYPE_TKIP;
3220 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
3221 {
3222 if (ipw->u.crypt.key_len == 13)
3223 ieee->pairwise_key_type = KEY_TYPE_WEP104;
3224 else if (ipw->u.crypt.key_len == 5)
3225 ieee->pairwise_key_type = KEY_TYPE_WEP40;
3226 }
3227 else
3228 ieee->pairwise_key_type = KEY_TYPE_NA;
3229
3230 if (ieee->pairwise_key_type)
3231 {
3232 if (memcmp(ieee->ap_mac_addr, zero_addr, 6) == 0)
3233 ieee->iw_mode = IW_MODE_ADHOC;
3234
3235 memcpy((u8*)key, ipw->u.crypt.key, 16);
3236 EnableHWSecurityConfig8192(dev);
3237 set_swcam(dev, 4, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key,0);
3238 setKey(dev, 4, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
3239 if (ieee->iw_mode == IW_MODE_ADHOC){
3240 set_swcam(dev, ipw->u.crypt.idx, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key,0);
3241 setKey(dev, ipw->u.crypt.idx, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
3242 }
3243 }
3244#ifdef RTL8192E
3245 if ((ieee->pairwise_key_type == KEY_TYPE_CCMP) && ieee->pHTInfo->bCurrentHTSupport){
3246 write_nic_byte(dev, 0x173, 1);
3247 }
3248#endif
3249
3250 }
3251 else
3252 {
3253 memcpy((u8*)key, ipw->u.crypt.key, 16);
3254 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
3255 ieee->group_key_type= KEY_TYPE_CCMP;
3256 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
3257 ieee->group_key_type = KEY_TYPE_TKIP;
3258 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
3259 {
3260 if (ipw->u.crypt.key_len == 13)
3261 ieee->group_key_type = KEY_TYPE_WEP104;
3262 else if (ipw->u.crypt.key_len == 5)
3263 ieee->group_key_type = KEY_TYPE_WEP40;
3264 }
3265 else
3266 ieee->group_key_type = KEY_TYPE_NA;
3267
3268 if (ieee->group_key_type)
3269 {
3270 set_swcam( dev,
3271 ipw->u.crypt.idx,
3272 ipw->u.crypt.idx,
3273 ieee->group_key_type,
3274 broadcast_addr,
3275 0,
3276 key,
3277 0);
3278 setKey( dev,
3279 ipw->u.crypt.idx,
3280 ipw->u.crypt.idx,
3281 ieee->group_key_type,
3282 broadcast_addr,
3283 0,
3284 key);
3285 }
3286 }
3287 }
3288#ifdef JOHN_DEBUG
3289 {
3290 int i;
3291 RT_TRACE(COMP_DBG, "@@ wrq->u pointer = ");
3292 for (i=0;i<wrq->u.data.length;i++){
3293 if (i%10==0) RT_TRACE(COMP_DBG, "\n");
3294 RT_TRACE(COMP_DBG, "%8x|", ((u32*)wrq->u.data.pointer)[i] );
3295 }
3296 RT_TRACE(COMP_DBG, "\n");
3297 }
3298#endif
3299 ret = rtllib_wpa_supplicant_ioctl(priv->rtllib, &wrq->u.data, 0);
3300 kfree(ipw);
3301 break;
3302 }
3303 default:
3304 ret = -EOPNOTSUPP;
3305 break;
3306 }
3307
3308out:
3309 up(&priv->wx_sem);
3310
3311 return ret;
3312}
3313
3314void FairBeacon(struct net_device *dev)
3315{
3316 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
3317 struct rtllib_network *net = &priv->rtllib->current_network;
3318 static u8 i=100;
3319 static u8 forceturn =0;
3320 u16 beaconint = net->beacon_interval;
3321
3322 if (priv->rtllib->iw_mode != IW_MODE_ADHOC)
3323 return;
3324
3325 if (priv->bIbssCoordinator){
3326 i--;
3327
3328 if (forceturn ==2){
3329 forceturn =0;
3330 priv->rtllib->SetHwRegHandler(dev, HW_VAR_BEACON_INTERVAL, (u8*)(&beaconint));
3331 i=100;
3332 }
3333
3334 if (i<=94){
3335 beaconint=beaconint+2;
3336 priv->rtllib->SetHwRegHandler(dev, HW_VAR_BEACON_INTERVAL, (u8*)(&beaconint));
3337 forceturn =1;
3338 }
3339 } else {
3340 i++;
3341
3342 if (forceturn ==1){
3343 forceturn =0;
3344 priv->rtllib->SetHwRegHandler(dev, HW_VAR_BEACON_INTERVAL, (u8*)(&beaconint));
3345 i=100;
3346 }
3347
3348 if (i>=106){
3349 beaconint=beaconint-2;
3350 priv->rtllib->SetHwRegHandler(dev, HW_VAR_BEACON_INTERVAL, (u8*)(&beaconint));
3351 forceturn =2;
3352 }
3353 }
3354}
3355
3356
3357irqreturn_type rtl8192_interrupt(int irq, void *netdev, struct pt_regs *regs)
3358{
3359 struct net_device *dev = (struct net_device *) netdev;
3360 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
3361 unsigned long flags;
3362 u32 inta;
3363 u32 intb;
3364 intb = 0;
3365
3366 if (priv->irq_enabled == 0){
3367 goto done;
3368 }
3369
3370 spin_lock_irqsave(&priv->irq_th_lock,flags);
3371
3372 priv->ops->interrupt_recognized(dev, &inta, &intb);
3373 priv->stats.shints++;
3374
3375 if (!inta) {
3376 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
3377 goto done;
3378 }
3379
3380 if (inta == 0xffff) {
3381 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
3382 goto done;
3383 }
3384
3385 priv->stats.ints++;
3386
3387 if (!netif_running(dev)) {
3388 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
3389 goto done;
3390 }
3391
3392#if defined RTL8192SE
3393 if (intb & IMR_TBDOK){
3394 RT_TRACE(COMP_INTR, "beacon ok interrupt!\n");
3395 priv->stats.txbeaconokint++;
3396 priv->bIbssCoordinator = true;
3397 }
3398
3399 if (intb & IMR_TBDER){
3400 RT_TRACE(COMP_INTR, "beacon error interrupt!\n");
3401 priv->stats.txbeaconerr++;
3402 priv->bIbssCoordinator = false;
3403 }
3404
3405 if ((intb & IMR_TBDOK) ||(intb & IMR_TBDER))
3406 FairBeacon(dev);
3407#else
3408 if (inta & IMR_TBDOK){
3409 RT_TRACE(COMP_INTR, "beacon ok interrupt!\n");
3410 priv->stats.txbeaconokint++;
3411 }
3412
3413 if (inta & IMR_TBDER){
3414 RT_TRACE(COMP_INTR, "beacon ok interrupt!\n");
3415 priv->stats.txbeaconerr++;
3416 }
3417#endif
3418
3419 if (inta & IMR_BDOK) {
3420 RT_TRACE(COMP_INTR, "beacon interrupt!\n");
3421#ifdef _ENABLE_SW_BEACON
3422 rtl8192_tx_isr(dev, BEACON_QUEUE);
3423#endif
3424 }
3425
3426 if (inta & IMR_MGNTDOK ) {
3427 RT_TRACE(COMP_INTR, "Manage ok interrupt!\n");
3428 priv->stats.txmanageokint++;
3429 rtl8192_tx_isr(dev,MGNT_QUEUE);
3430 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
3431 if (priv->rtllib->ack_tx_to_ieee){
3432 if (rtl8192_is_tx_queue_empty(dev)){
3433 priv->rtllib->ack_tx_to_ieee = 0;
3434 rtllib_ps_tx_ack(priv->rtllib, 1);
3435 }
3436 }
3437 spin_lock_irqsave(&priv->irq_th_lock,flags);
3438 }
3439
3440#ifndef RTL8192CE
3441 if (inta & IMR_COMDOK) {
3442 priv->stats.txcmdpktokint++;
3443 rtl8192_tx_isr(dev,TXCMD_QUEUE);
3444 }
3445#endif
3446
3447 if (inta & IMR_HIGHDOK) {
3448 rtl8192_tx_isr(dev,HIGH_QUEUE);
3449 }
3450
3451#ifdef RTL8192SE
3452 if ((inta & IMR_ROK) || (inta & IMR_RXCMDOK))
3453#else
3454 if (inta & IMR_ROK)
3455#endif
3456 {
3457 priv->stats.rxint++;
3458 priv->InterruptLog.nIMR_ROK++;
3459 tasklet_schedule(&priv->irq_rx_tasklet);
3460 }
3461
3462 if (inta & IMR_BcnInt) {
3463 RT_TRACE(COMP_INTR, "prepare beacon for interrupt!\n");
3464#ifndef _ENABLE_SW_BEACON
3465 tasklet_schedule(&priv->irq_prepare_beacon_tasklet);
3466#endif
3467 }
3468
3469 if (inta & IMR_RDU) {
3470 RT_TRACE(COMP_INTR, "rx descriptor unavailable!\n");
3471 priv->stats.rxrdu++;
3472#ifndef RTL8192CE
3473 write_nic_dword(dev,INTA_MASK,read_nic_dword(dev, INTA_MASK) & ~IMR_RDU);
3474#endif
3475 tasklet_schedule(&priv->irq_rx_tasklet);
3476 }
3477
3478 if (inta & IMR_RXFOVW) {
3479 RT_TRACE(COMP_INTR, "rx overflow !\n");
3480 priv->stats.rxoverflow++;
3481 tasklet_schedule(&priv->irq_rx_tasklet);
3482 }
3483
3484 if (inta & IMR_TXFOVW) priv->stats.txoverflow++;
3485
3486 if (inta & IMR_BKDOK) {
3487 RT_TRACE(COMP_INTR, "BK Tx OK interrupt!\n");
3488 priv->stats.txbkokint++;
3489 priv->rtllib->LinkDetectInfo.NumTxOkInPeriod++;
3490 rtl8192_tx_isr(dev,BK_QUEUE);
3491 }
3492
3493 if (inta & IMR_BEDOK) {
3494 RT_TRACE(COMP_INTR, "BE TX OK interrupt!\n");
3495 priv->stats.txbeokint++;
3496 priv->rtllib->LinkDetectInfo.NumTxOkInPeriod++;
3497 rtl8192_tx_isr(dev,BE_QUEUE);
3498 }
3499
3500 if (inta & IMR_VIDOK) {
3501 RT_TRACE(COMP_INTR, "VI TX OK interrupt!\n");
3502 priv->stats.txviokint++;
3503 priv->rtllib->LinkDetectInfo.NumTxOkInPeriod++;
3504 rtl8192_tx_isr(dev,VI_QUEUE);
3505 }
3506
3507 if (inta & IMR_VODOK) {
3508 priv->stats.txvookint++;
3509 RT_TRACE(COMP_INTR, "Vo TX OK interrupt!\n");
3510 priv->rtllib->LinkDetectInfo.NumTxOkInPeriod++;
3511 rtl8192_tx_isr(dev,VO_QUEUE);
3512 }
3513
3514 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
3515
3516done:
3517
3518#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
3519 return;
3520#else
3521 return IRQ_HANDLED;
3522#endif
3523}
3524
3525
3526
3527/****************************************************************************
3528 ---------------------------- PCI_STUFF---------------------------
3529*****************************************************************************/
3530#ifdef HAVE_NET_DEVICE_OPS
3531static const struct net_device_ops rtl8192_netdev_ops = {
3532 .ndo_open = rtl8192_open,
3533 .ndo_stop = rtl8192_close,
3534 .ndo_tx_timeout = rtl8192_tx_timeout,
3535 .ndo_do_ioctl = rtl8192_ioctl,
3536 .ndo_set_multicast_list = r8192_set_multicast,
3537 .ndo_set_mac_address = r8192_set_mac_adr,
3538 .ndo_validate_addr = eth_validate_addr,
3539 .ndo_change_mtu = eth_change_mtu,
3540 .ndo_start_xmit = rtllib_xmit,
3541};
3542#endif
3543
3544static int __devinit rtl8192_pci_probe(struct pci_dev *pdev,
3545 const struct pci_device_id *id)
3546{
3547 unsigned long ioaddr = 0;
3548 struct net_device *dev = NULL;
3549 struct r8192_priv *priv= NULL;
3550#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
3551 struct rtl819x_ops *ops = (struct rtl819x_ops *)(id->driver_data);
3552#endif
3553
3554#ifdef CONFIG_RTL8192_IO_MAP
3555 unsigned long pio_start, pio_len, pio_flags;
3556#else
3557 unsigned long pmem_start, pmem_len, pmem_flags;
3558#endif
3559 int err = 0;
3560 bool bdma64 = false;
3561
3562 RT_TRACE(COMP_INIT,"Configuring chip resources");
3563
3564 if ( pci_enable_device (pdev) ){
3565 RT_TRACE(COMP_ERR,"Failed to enable PCI device");
3566 return -EIO;
3567 }
3568
3569 pci_set_master(pdev);
3570
3571#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10))
3572#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL < (n)) -1))
3573#endif
3574
3575#ifdef CONFIG_64BIT_DMA
3576 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
3577 printk("RTL819xCE: Using 64bit DMA\n");
3578 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
3579 printk( "Unable to obtain 64bit DMA for consistent allocations\n");
3580 pci_disable_device(pdev);
3581 return -ENOMEM;
3582 }
3583 bdma64 = true;
3584 } else
3585#endif
3586 {
3587 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
3588#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
3589 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
3590 printk( "Unable to obtain 32bit DMA for consistent allocations\n");
3591 pci_disable_device(pdev);
3592 return -ENOMEM;
3593 }
3594#endif
3595 }
3596 }
3597 dev = alloc_rtllib(sizeof(struct r8192_priv));
3598 if (!dev)
3599 return -ENOMEM;
3600
3601 if (bdma64){
3602 dev->features |= NETIF_F_HIGHDMA;
3603 }
3604
3605#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
3606 SET_MODULE_OWNER(dev);
3607#endif
3608
3609 pci_set_drvdata(pdev, dev);
3610#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
3611 SET_NETDEV_DEV(dev, &pdev->dev);
3612#endif
3613 priv = rtllib_priv(dev);
3614 priv->rtllib = (struct rtllib_device *)netdev_priv_rsl(dev);
3615 priv->pdev=pdev;
3616 priv->rtllib->pdev=pdev;
3617#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
3618 if ((pdev->subsystem_vendor == PCI_VENDOR_ID_DLINK)&&(pdev->subsystem_device == 0x3304)){
3619 priv->rtllib->bSupportRemoteWakeUp = 1;
3620 } else
3621#endif
3622 {
3623 priv->rtllib->bSupportRemoteWakeUp = 0;
3624 }
3625
3626#ifdef CONFIG_RTL8192_IO_MAP
3627 pio_start = (unsigned long)pci_resource_start (pdev, 0);
3628 pio_len = (unsigned long)pci_resource_len (pdev, 0);
3629 pio_flags = (unsigned long)pci_resource_flags (pdev, 0);
3630
3631 if (!(pio_flags & IORESOURCE_IO)) {
3632 RT_TRACE(COMP_ERR,"region #0 not a PIO resource, aborting");
3633 goto fail;
3634 }
3635
3636 printk("Io mapped space start: 0x%08lx \n", pio_start );
3637 if ( ! request_region( pio_start, pio_len, DRV_NAME ) ){
3638 RT_TRACE(COMP_ERR,"request_region failed!");
3639 goto fail;
3640 }
3641
3642 ioaddr = pio_start;
3643 dev->base_addr = ioaddr;
3644#else
3645#ifdef RTL8192CE
3646 pmem_start = pci_resource_start(pdev, 2);
3647 pmem_len = pci_resource_len(pdev, 2);
3648 pmem_flags = pci_resource_flags (pdev, 2);
3649#else
3650 pmem_start = pci_resource_start(pdev, 1);
3651 pmem_len = pci_resource_len(pdev, 1);
3652 pmem_flags = pci_resource_flags (pdev, 1);
3653#endif
3654
3655 if (!(pmem_flags & IORESOURCE_MEM)) {
3656 RT_TRACE(COMP_ERR,"region #1 not a MMIO resource, aborting");
3657 goto fail;
3658 }
3659
3660 printk("Memory mapped space start: 0x%08lx \n", pmem_start);
3661 if (!request_mem_region(pmem_start, pmem_len, DRV_NAME)) {
3662 RT_TRACE(COMP_ERR,"request_mem_region failed!");
3663 goto fail;
3664 }
3665
3666
3667 ioaddr = (unsigned long)ioremap_nocache( pmem_start, pmem_len);
3668 if ( ioaddr == (unsigned long)NULL ){
3669 RT_TRACE(COMP_ERR,"ioremap failed!");
3670 goto fail1;
3671 }
3672
3673 dev->mem_start = ioaddr;
3674 dev->mem_end = ioaddr + pci_resource_len(pdev, 0);
3675
3676#endif
3677#if defined RTL8192SE || defined RTL8192CE
3678 pci_write_config_byte(pdev, 0x81,0);
3679 pci_write_config_byte(pdev,0x44,0);
3680 pci_write_config_byte(pdev,0x04,0x06);
3681 pci_write_config_byte(pdev,0x04,0x07);
3682#endif
3683
3684#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
3685 priv->ops = ops;
3686#else
3687#if defined RTL8190P || defined RTL8192E
3688 priv->ops = &rtl819xp_ops;
3689#else
3690 priv->ops = &rtl8192se_ops;
3691#endif
3692#endif
3693
3694 if (rtl8192_pci_findadapter(pdev, dev) == false)
3695 goto fail1;
3696
3697 dev->irq = pdev->irq;
3698 priv->irq = 0;
3699
3700#ifdef HAVE_NET_DEVICE_OPS
3701 dev->netdev_ops = &rtl8192_netdev_ops;
3702#else
3703 dev->open = rtl8192_open;
3704 dev->stop = rtl8192_close;
3705 dev->tx_timeout = rtl8192_tx_timeout;
3706 dev->do_ioctl = rtl8192_ioctl;
3707 dev->set_multicast_list = r8192_set_multicast;
3708 dev->set_mac_address = r8192_set_mac_adr;
3709 dev->hard_start_xmit = rtllib_xmit;
3710#endif
3711
3712#if WIRELESS_EXT >= 12
3713#if WIRELESS_EXT < 17
3714 dev->get_wireless_stats = r8192_get_wireless_stats;
3715#endif
3716 dev->wireless_handlers = (struct iw_handler_def *) &r8192_wx_handlers_def;
3717#endif
3718#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
3719 dev->ethtool_ops = &rtl819x_ethtool_ops;
3720#endif
3721
3722 dev->type = ARPHRD_ETHER;
3723 dev->watchdog_timeo = HZ*3;
3724
3725 if (dev_alloc_name(dev, ifname) < 0){
3726 RT_TRACE(COMP_INIT, "Oops: devname already taken! Trying wlan%%d...\n");
3727 dev_alloc_name(dev, ifname);
3728 }
3729
3730 RT_TRACE(COMP_INIT, "Driver probe completed1\n");
3731 if (rtl8192_init(dev)!=0){
3732 RT_TRACE(COMP_ERR, "Initialization failed");
3733 goto fail1;
3734 }
3735
3736#ifdef CONFIG_CFG_80211
3737 if (!rtl8192_register_wiphy_dev(dev))
3738 goto fail1;
3739#endif
3740
3741 netif_carrier_off(dev);
3742 netif_stop_queue(dev);
3743
3744 register_netdev(dev);
3745 RT_TRACE(COMP_INIT, "dev name: %s\n",dev->name);
3746 err = rtl_debug_module_init(priv, dev->name);
3747 if (err) {
3748 RT_TRACE(COMP_DBG, "failed to create debugfs files. Ignoring error: %d\n", err);
3749 }
3750 rtl8192_proc_init_one(dev);
3751
3752#ifdef ENABLE_GPIO_RADIO_CTL
3753 if (priv->polling_timer_on == 0){
3754 check_rfctrl_gpio_timer((unsigned long)dev);
3755 }
3756#endif
3757#ifdef CONFIG_RTL_RFKILL
3758 if (priv->ops->init_before_adapter_start) {
3759 priv->ops->init_before_adapter_start(dev);
3760 priv->initialized_at_probe = true;
3761 }
3762 if (!rtl8192_rfkill_init(dev)) {
3763 goto fail1;
3764 }
3765#endif
3766
3767#if defined CONFIG_ASPM_OR_D3
3768 rtl8192_initialize_adapter_common(dev);
3769#endif
3770
3771 RT_TRACE(COMP_INIT, "Driver probe completed\n");
3772 return 0;
3773
3774fail1:
3775#ifdef CONFIG_RTL8192_IO_MAP
3776
3777 if ( dev->base_addr != 0 ){
3778
3779 release_region(dev->base_addr,
3780 pci_resource_len(pdev, 0) );
3781 }
3782#else
3783 if ( dev->mem_start != (unsigned long)NULL ){
3784 iounmap( (void *)dev->mem_start );
3785 release_mem_region( pci_resource_start(pdev, 1),
3786 pci_resource_len(pdev, 1) );
3787 }
3788#endif
3789
3790fail:
3791 if (dev){
3792
3793 if (priv->irq) {
3794 free_irq(dev->irq, dev);
3795 dev->irq=0;
3796 }
3797 free_rtllib(dev);
3798 }
3799
3800 pci_disable_device(pdev);
3801
3802 DMESG("wlan driver load failed\n");
3803 pci_set_drvdata(pdev, NULL);
3804 return -ENODEV;
3805
3806}
3807
3808static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev)
3809{
3810 struct net_device *dev = pci_get_drvdata(pdev);
3811 struct r8192_priv *priv ;
3812 if (dev){
3813#ifdef CONFIG_RTL_RFKILL
3814 rtl8192_rfkill_exit(dev);
3815#endif
3816 unregister_netdev(dev);
3817
3818 priv = rtllib_priv(dev);
3819
3820#ifdef ENABLE_GPIO_RADIO_CTL
3821 del_timer_sync(&priv->gpio_polling_timer);
3822#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
3823 cancel_delayed_work(&priv->gpio_change_rf_wq);
3824#endif
3825 priv->polling_timer_on = 0;
3826#endif
3827 rtl_debug_module_remove(priv);
3828 rtl8192_proc_remove_one(dev);
3829 rtl8192_down(dev,true);
3830 deinit_hal_dm(dev);
3831#ifdef CONFIG_ASPM_OR_D3
3832 ;
3833#endif
3834 if (priv->pFirmware)
3835 {
3836 vfree(priv->pFirmware);
3837 priv->pFirmware = NULL;
3838 }
3839#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
3840 destroy_workqueue(priv->priv_wq);
3841#endif
3842 {
3843 u32 i;
3844 rtl8192_free_rx_ring(dev);
3845 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
3846 rtl8192_free_tx_ring(dev, i);
3847 }
3848 }
3849
3850 if (priv->irq){
3851
3852 printk("Freeing irq %d\n",dev->irq);
3853 free_irq(dev->irq, dev);
3854 priv->irq=0;
3855
3856 }
3857#ifdef CONFIG_RTL8192_IO_MAP
3858 if ( dev->base_addr != 0 ){
3859
3860 release_region(dev->base_addr,
3861 pci_resource_len(pdev, 0) );
3862 }
3863#else
3864 if ( dev->mem_start != (unsigned long)NULL ){
3865 iounmap( (void *)dev->mem_start );
3866#ifdef RTL8192CE
3867 release_mem_region( pci_resource_start(pdev, 2),
3868 pci_resource_len(pdev, 2) );
3869#else
3870 release_mem_region( pci_resource_start(pdev, 1),
3871 pci_resource_len(pdev, 1) );
3872#endif
3873 }
3874#endif /*end #ifdef RTL_IO_MAP*/
3875 free_rtllib(dev);
3876
3877 if (priv->scan_cmd)
3878 kfree(priv->scan_cmd);
3879
3880 } else{
3881 priv=rtllib_priv(dev);
3882 }
3883
3884 pci_disable_device(pdev);
3885#ifdef RTL8192SE
3886 pci_write_config_byte(pdev, 0x81,1);
3887 pci_write_config_byte(pdev,0x44,3);
3888#endif
3889 RT_TRACE(COMP_DOWN, "wlan driver removed\n");
3890}
3891
3892bool NicIFEnableNIC(struct net_device* dev)
3893{
3894 bool init_status = true;
3895 struct r8192_priv* priv = rtllib_priv(dev);
3896 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
3897
3898 if (IS_NIC_DOWN(priv)){
3899 RT_TRACE(COMP_ERR, "ERR!!! %s(): Driver is already down!\n",__func__);
3900 priv->bdisable_nic = false;
3901 return RT_STATUS_FAILURE;
3902 }
3903
3904 RT_TRACE(COMP_PS, "===========>%s()\n",__func__);
3905 priv->bfirst_init = true;
3906 init_status = priv->ops->initialize_adapter(dev);
3907 if (init_status != true) {
3908 RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n",__func__);
3909 priv->bdisable_nic = false;
3910 return -1;
3911 }
3912 RT_TRACE(COMP_INIT, "start adapter finished\n");
3913 RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC);
3914 priv->bfirst_init = false;
3915
3916 rtl8192_irq_enable(dev);
3917 priv->bdisable_nic = false;
3918 RT_TRACE(COMP_PS,"<===========%s()\n",__func__);
3919 return init_status;
3920}
3921bool NicIFDisableNIC(struct net_device* dev)
3922{
3923 bool status = true;
3924 struct r8192_priv* priv = rtllib_priv(dev);
3925 u8 tmp_state = 0;
3926 RT_TRACE(COMP_PS, "=========>%s()\n",__func__);
3927 priv->bdisable_nic = true;
3928 tmp_state = priv->rtllib->state;
3929 rtllib_softmac_stop_protocol(priv->rtllib, 0, false);
3930 priv->rtllib->state = tmp_state;
3931 rtl8192_cancel_deferred_work(priv);
3932 rtl8192_irq_disable(dev);
3933
3934 priv->ops->stop_adapter(dev, false);
3935 RT_TRACE(COMP_PS, "<=========%s()\n",__func__);
3936
3937 return status;
3938}
3939
3940static int __init rtl8192_pci_module_init(void)
3941{
3942 int ret;
3943 int error;
3944
3945#ifdef BUILT_IN_CRYPTO
3946 ret = arc4_init();
3947 if (ret) {
3948 printk(KERN_ERR "arc4_init() failed %d\n", ret);
3949 return ret;
3950 }
3951
3952
3953 ret = michael_mic_init();
3954 if (ret) {
3955 printk(KERN_ERR "michael_mic_init() failed %d\n", ret);
3956 return ret;
3957 }
3958
3959 ret = aes_init();
3960 if (ret) {
3961 printk(KERN_ERR "aes_init() failed %d\n", ret);
3962 return ret;
3963 }
3964#endif
3965 ret = rtllib_init();
3966 if (ret) {
3967 printk(KERN_ERR "rtllib_init() failed %d\n", ret);
3968 return ret;
3969 }
3970 ret = rtllib_crypto_init();
3971 if (ret) {
3972 printk(KERN_ERR "rtllib_crypto_init() failed %d\n", ret);
3973 return ret;
3974 }
3975 ret = rtllib_crypto_tkip_init();
3976 if (ret) {
3977 printk(KERN_ERR "rtllib_crypto_tkip_init() failed %d\n", ret);
3978 return ret;
3979 }
3980 ret = rtllib_crypto_ccmp_init();
3981 if (ret) {
3982 printk(KERN_ERR "rtllib_crypto_ccmp_init() failed %d\n", ret);
3983 return ret;
3984 }
3985 ret = rtllib_crypto_wep_init();
3986 if (ret) {
3987 printk(KERN_ERR "rtllib_crypto_wep_init() failed %d\n", ret);
3988 return ret;
3989 }
3990#ifdef BUILT_IN_MSHCLASS
3991 ret = msh_init();
3992 if (ret) {
3993 printk(KERN_ERR "msh_init() failed %d\n", ret);
3994 return ret;
3995 }
3996#endif
3997 printk(KERN_INFO "\nLinux kernel driver for RTL8192E WLAN cards\n");
3998 printk(KERN_INFO "Copyright (c) 2007-2008, Realsil Wlan Driver\n");
3999 RT_TRACE(COMP_INIT, "Initializing module");
4000 RT_TRACE(COMP_INIT, "Wireless extensions version %d", WIRELESS_EXT);
4001
4002 error = rtl_create_debugfs_root();
4003 if (error) {
4004 RT_TRACE(COMP_DBG, "Create debugfs root fail: %d\n", error);
4005 goto err_out;
4006 }
4007
4008 rtl8192_proc_module_init();
4009#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22))
4010 if (0!=pci_module_init(&rtl8192_pci_driver))
4011#else
4012 if (0!=pci_register_driver(&rtl8192_pci_driver))
4013#endif
4014 {
4015 DMESG("No device found");
4016 /*pci_unregister_driver (&rtl8192_pci_driver);*/
4017 return -ENODEV;
4018 }
4019 return 0;
4020err_out:
4021 return error;
4022
4023}
4024
4025static void __exit rtl8192_pci_module_exit(void)
4026{
4027 pci_unregister_driver(&rtl8192_pci_driver);
4028
4029 RT_TRACE(COMP_DOWN, "Exiting");
4030 rtl8192_proc_module_remove();
4031 rtl_remove_debugfs_root();
4032 rtllib_crypto_tkip_exit();
4033 rtllib_crypto_ccmp_exit();
4034 rtllib_crypto_wep_exit();
4035 rtllib_crypto_deinit();
4036 rtllib_exit();
4037#ifdef BUILT_IN_CRYPTO
4038 arc4_exit();
4039 michael_mic_exit();
4040 aes_fini();
4041#endif
4042#ifdef BUILT_IN_MSHCLASS
4043 msh_exit();
4044#endif
4045
4046}
4047
4048void check_rfctrl_gpio_timer(unsigned long data)
4049{
4050 struct r8192_priv* priv = rtllib_priv((struct net_device *)data);
4051
4052 priv->polling_timer_on = 1;
4053
4054 queue_delayed_work_rsl(priv->priv_wq,&priv->gpio_change_rf_wq,0);
4055
4056 mod_timer(&priv->gpio_polling_timer, jiffies + MSECS(RTLLIB_WATCH_DOG_TIME));
4057}
4058
4059/***************************************************************************
4060 ------------------- module init / exit stubs ----------------
4061****************************************************************************/
4062module_init(rtl8192_pci_module_init);
4063module_exit(rtl8192_pci_module_exit);
4064
4065MODULE_DESCRIPTION("Linux driver for Realtek RTL819x WiFi cards");
4066MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
4067#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
4068MODULE_VERSION(DRV_VERSION);
4069#endif
4070MODULE_LICENSE("GPL");
4071
4072#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 9)
4073module_param(ifname, charp, S_IRUGO|S_IWUSR );
4074module_param(hwwep,int, S_IRUGO|S_IWUSR);
4075module_param(channels,int, S_IRUGO|S_IWUSR);
4076#else
4077MODULE_PARM(ifname, "s");
4078MODULE_PARM(hwwep,"i");
4079MODULE_PARM(channels,"i");
4080#endif
4081
4082MODULE_PARM_DESC(ifname," Net interface name, wlan%d=default");
4083MODULE_PARM_DESC(hwwep," Try to use hardware WEP support(default use hw. set 0 to use software security)");
4084MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
diff --git a/drivers/staging/rtl8192e/rtl_core.h b/drivers/staging/rtl8192e/rtl_core.h
new file mode 100644
index 00000000000..d858cc9eacb
--- /dev/null
+++ b/drivers/staging/rtl8192e/rtl_core.h
@@ -0,0 +1,1190 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * Based on the r8180 driver, which is:
5 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 *
19 * The full GNU General Public License is included in this distribution in the
20 * file called LICENSE.
21 *
22 * Contact Information:
23 * wlanfae <wlanfae@realtek.com>
24******************************************************************************/
25
26#ifndef _RTL_CORE_H
27#define _RTL_CORE_H
28
29#include <linux/module.h>
30#include <linux/kernel.h>
31#include <linux/init.h>
32#include <linux/ioport.h>
33#include <linux/sched.h>
34#include <linux/types.h>
35#include <linux/interrupt.h>
36#include <linux/slab.h>
37#include <linux/netdevice.h>
38#include <linux/pci.h>
39#include <linux/etherdevice.h>
40#include <linux/delay.h>
41#include <linux/rtnetlink.h>
42#include <linux/wireless.h>
43#include <linux/timer.h>
44#include <linux/proc_fs.h>
45#include <linux/if_arp.h>
46#include <linux/random.h>
47#include <linux/version.h>
48#include <asm/io.h>
49#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27))
50#include <asm/semaphore.h>
51#endif
52#include "rtllib.h"
53
54#ifdef ENABLE_DOT11D
55#include "dot11d.h"
56#endif
57
58#include "r8192E_firmware.h"
59#include "r8192E_hw.h"
60
61#include "r8190P_def.h"
62#include "r8192E_dev.h"
63
64#ifdef CONFIG_CFG_80211
65#include "rtl_regd.h"
66#endif
67
68#ifdef CONFIG_RTL_RFKILL
69#include "rtl_rfkill.h"
70#endif
71
72#include "rtl_debug.h"
73#include "rtl_eeprom.h"
74#include "rtl_ps.h"
75#include "rtl_pci.h"
76#include "rtl_cam.h"
77
78#define DRV_COPYRIGHT "Copyright(c) 2008 - 2010 Realsil Semiconductor Corporation"
79#define DRV_AUTHOR "<wlanfae@realtek.com>"
80#define DRV_VERSION "0014.0401.2010"
81
82#define DRV_NAME "rtl819xE"
83
84#define IS_HARDWARE_TYPE_819xP(_priv) ((((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8190P)||\
85 (((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8192E))
86#define IS_HARDWARE_TYPE_8192SE(_priv) (((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8192SE)
87#define IS_HARDWARE_TYPE_8192CE(_priv) (((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8192CE)
88#define IS_HARDWARE_TYPE_8192CU(_priv) (((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8192CU)
89#define IS_HARDWARE_TYPE_8192DE(_priv) (((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8192DE)
90#define IS_HARDWARE_TYPE_8192DU(_priv) (((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8192DU)
91
92#define RTL_PCI_DEVICE(vend, dev, cfg) \
93 .vendor = (vend), .device = (dev), \
94 .subvendor = PCI_ANY_ID, .subdevice =PCI_ANY_ID , \
95 .driver_data = (kernel_ulong_t)&(cfg)
96 typedef irqreturn_t irqreturn_type;
97
98#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10))
99
100#if !defined(PCI_CAP_ID_EXP)
101#define PCI_CAP_ID_EXP 0x10
102#endif
103#if !defined(PCI_EXP_LNKCTL)
104#define PCI_EXP_LNKCTL 0x10
105#endif
106
107typedef int __bitwise pci_power_t;
108#define PCI_D0 ((pci_power_t __force) 0)
109#define PCI_D1 ((pci_power_t __force) 1)
110#define PCI_D2 ((pci_power_t __force) 2)
111#define PCI_D3hot ((pci_power_t __force) 3)
112#define PCI_D3cold ((pci_power_t __force) 4)
113#define PCI_UNKNOWN ((pci_power_t __force) 5)
114#define PCI_POWER_ERROR ((pci_power_t __force) -1)
115
116#endif
117
118#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)
119 #define rtl8192_interrupt(x,y,z) rtl8192_interrupt_rsl(x,y,z)
120#else
121 #define rtl8192_interrupt(x,y,z) rtl8192_interrupt_rsl(x,y)
122#endif
123
124#define RTL_MAX_SCAN_SIZE 128
125
126#define RTL_RATE_MAX 30
127
128#define TOTAL_CAM_ENTRY 32
129#define CAM_CONTENT_COUNT 8
130
131#ifndef BIT
132#define BIT(_i) (1<<(_i))
133#endif
134
135#define IS_NIC_DOWN(priv) (!(priv)->up)
136
137#define IS_ADAPTER_SENDS_BEACON(dev) 0
138
139#define IS_UNDER_11N_AES_MODE(_rtllib) ((_rtllib->pHTInfo->bCurrentHTSupport == true) &&\
140 (_rtllib->pairwise_key_type == KEY_TYPE_CCMP))
141
142#define HAL_MEMORY_MAPPED_IO_RANGE_8190PCI 0x1000
143#define HAL_HW_PCI_REVISION_ID_8190PCI 0x00
144#define HAL_MEMORY_MAPPED_IO_RANGE_8192PCIE 0x4000
145#define HAL_HW_PCI_REVISION_ID_8192PCIE 0x01
146#define HAL_MEMORY_MAPPED_IO_RANGE_8192SE 0x4000
147#define HAL_HW_PCI_REVISION_ID_8192SE 0x10
148#define HAL_HW_PCI_REVISION_ID_8192CE 0x1
149#define HAL_MEMORY_MAPPED_IO_RANGE_8192CE 0x4000
150#define HAL_HW_PCI_REVISION_ID_8192DE 0x0
151#define HAL_MEMORY_MAPPED_IO_RANGE_8192DE 0x4000
152
153#define HAL_HW_PCI_8180_DEVICE_ID 0x8180
154#define HAL_HW_PCI_8185_DEVICE_ID 0x8185
155#define HAL_HW_PCI_8188_DEVICE_ID 0x8188
156#define HAL_HW_PCI_8198_DEVICE_ID 0x8198
157#define HAL_HW_PCI_8190_DEVICE_ID 0x8190
158#define HAL_HW_PCI_8192_DEVICE_ID 0x8192
159#define HAL_HW_PCI_8192SE_DEVICE_ID 0x8192
160#define HAL_HW_PCI_8174_DEVICE_ID 0x8174
161#define HAL_HW_PCI_8173_DEVICE_ID 0x8173
162#define HAL_HW_PCI_8172_DEVICE_ID 0x8172
163#define HAL_HW_PCI_8171_DEVICE_ID 0x8171
164#define HAL_HW_PCI_0045_DEVICE_ID 0x0045
165#define HAL_HW_PCI_0046_DEVICE_ID 0x0046
166#define HAL_HW_PCI_0044_DEVICE_ID 0x0044
167#define HAL_HW_PCI_0047_DEVICE_ID 0x0047
168#define HAL_HW_PCI_700F_DEVICE_ID 0x700F
169#define HAL_HW_PCI_701F_DEVICE_ID 0x701F
170#define HAL_HW_PCI_DLINK_DEVICE_ID 0x3304
171#define HAL_HW_PCI_8192CET_DEVICE_ID 0x8191
172#define HAL_HW_PCI_8192CE_DEVICE_ID 0x8178
173#define HAL_HW_PCI_8191CE_DEVICE_ID 0x8177
174#define HAL_HW_PCI_8188CE_DEVICE_ID 0x8176
175#define HAL_HW_PCI_8192CU_DEVICE_ID 0x8191
176#define HAL_HW_PCI_8192DE_DEVICE_ID 0x092D
177#define HAL_HW_PCI_8192DU_DEVICE_ID 0x092D
178
179#define RTL819X_DEFAULT_RF_TYPE RF_1T2R
180
181#define RTLLIB_WATCH_DOG_TIME 2000
182
183#define MAX_DEV_ADDR_SIZE 8 /* support till 64 bit bus width OS */
184#define MAX_FIRMWARE_INFORMATION_SIZE 32
185#define MAX_802_11_HEADER_LENGTH (40 + MAX_FIRMWARE_INFORMATION_SIZE)
186#define ENCRYPTION_MAX_OVERHEAD 128
187#define MAX_FRAGMENT_COUNT 8
188#define MAX_TRANSMIT_BUFFER_SIZE (1600+(MAX_802_11_HEADER_LENGTH+ENCRYPTION_MAX_OVERHEAD)*MAX_FRAGMENT_COUNT)
189
190#define scrclng 4
191
192#define DEFAULT_FRAG_THRESHOLD 2342U
193#define MIN_FRAG_THRESHOLD 256U
194#define DEFAULT_BEACONINTERVAL 0x64U
195
196#define DEFAULT_SSID ""
197#define DEFAULT_RETRY_RTS 7
198#define DEFAULT_RETRY_DATA 7
199#define PRISM_HDR_SIZE 64
200
201#define PHY_RSSI_SLID_WIN_MAX 100
202
203#define RTL_IOCTL_WPA_SUPPLICANT SIOCIWFIRSTPRIV+30
204
205#define TxBBGainTableLength 37
206#define CCKTxBBGainTableLength 23
207
208#define CHANNEL_PLAN_LEN 10
209#define sCrcLng 4
210
211#define NIC_SEND_HANG_THRESHOLD_NORMAL 4
212#define NIC_SEND_HANG_THRESHOLD_POWERSAVE 8
213
214#define MAX_TX_QUEUE 9
215
216#define MAX_RX_QUEUE 1
217
218#define MAX_RX_COUNT 64
219#define MAX_TX_QUEUE_COUNT 9
220
221enum RTL819x_PHY_PARAM {
222 RTL819X_PHY_MACPHY_REG = 0,
223 RTL819X_PHY_MACPHY_REG_PG = 1,
224 RTL8188C_PHY_MACREG =2,
225 RTL8192C_PHY_MACREG =3,
226 RTL819X_PHY_REG = 4,
227 RTL819X_PHY_REG_1T2R = 5,
228 RTL819X_PHY_REG_to1T1R = 6,
229 RTL819X_PHY_REG_to1T2R = 7,
230 RTL819X_PHY_REG_to2T2R = 8,
231 RTL819X_PHY_REG_PG = 9,
232 RTL819X_AGC_TAB = 10,
233 RTL819X_PHY_RADIO_A =11,
234 RTL819X_PHY_RADIO_A_1T =12,
235 RTL819X_PHY_RADIO_A_2T =13,
236 RTL819X_PHY_RADIO_B =14,
237 RTL819X_PHY_RADIO_B_GM =15,
238 RTL819X_PHY_RADIO_C =16,
239 RTL819X_PHY_RADIO_D =17,
240 RTL819X_EEPROM_MAP =18,
241 RTL819X_EFUSE_MAP =19,
242};
243
244enum RTL_DEBUG {
245 COMP_TRACE = BIT0,
246 COMP_DBG = BIT1,
247 COMP_INIT = BIT2,
248 COMP_RECV = BIT3,
249 COMP_SEND = BIT4,
250 COMP_CMD = BIT5,
251 COMP_POWER = BIT6,
252 COMP_EPROM = BIT7,
253 COMP_SWBW = BIT8,
254 COMP_SEC = BIT9,
255 COMP_LPS = BIT10,
256 COMP_QOS = BIT11,
257 COMP_RATE = BIT12,
258 COMP_RXDESC = BIT13,
259 COMP_PHY = BIT14,
260 COMP_DIG = BIT15,
261 COMP_TXAGC = BIT16,
262 COMP_HALDM = BIT17,
263 COMP_POWER_TRACKING = BIT18,
264 COMP_CH = BIT19,
265 COMP_RF = BIT20,
266 COMP_FIRMWARE = BIT21,
267 COMP_HT = BIT22,
268 COMP_RESET = BIT23,
269 COMP_CMDPKT = BIT24,
270 COMP_SCAN = BIT25,
271 COMP_PS = BIT26,
272 COMP_DOWN = BIT27,
273 COMP_INTR = BIT28,
274 COMP_LED = BIT29,
275 COMP_MLME = BIT30,
276 COMP_ERR = BIT31
277};
278
279typedef enum{
280 NIC_UNKNOWN = 0,
281 NIC_8192E = 1,
282 NIC_8190P = 2,
283 NIC_8192SE = 4,
284 NIC_8192CE = 5,
285 NIC_8192CU = 6,
286 NIC_8192DE = 7,
287 NIC_8192DU = 8,
288 } nic_t;
289
290typedef enum _RT_EEPROM_TYPE{
291 EEPROM_93C46,
292 EEPROM_93C56,
293 EEPROM_BOOT_EFUSE,
294}RT_EEPROM_TYPE,*PRT_EEPROM_TYPE;
295
296typedef enum _tag_TxCmd_Config_Index{
297 TXCMD_TXRA_HISTORY_CTRL = 0xFF900000,
298 TXCMD_RESET_TX_PKT_BUFF = 0xFF900001,
299 TXCMD_RESET_RX_PKT_BUFF = 0xFF900002,
300 TXCMD_SET_TX_DURATION = 0xFF900003,
301 TXCMD_SET_RX_RSSI = 0xFF900004,
302 TXCMD_SET_TX_PWR_TRACKING = 0xFF900005,
303 TXCMD_XXXX_CTRL,
304}DCMD_TXCMD_OP;
305
306typedef enum _RT_RF_TYPE_819xU{
307 RF_TYPE_MIN = 0,
308 RF_8225,
309 RF_8256,
310 RF_8258,
311 RF_6052=4,
312 RF_PSEUDO_11N = 5,
313}RT_RF_TYPE_819xU, *PRT_RF_TYPE_819xU;
314
315typedef enum tag_Rf_Operatetion_State
316{
317 RF_STEP_INIT = 0,
318 RF_STEP_NORMAL,
319 RF_STEP_MAX
320}RF_STEP_E;
321
322typedef enum _RT_STATUS{
323 RT_STATUS_SUCCESS,
324 RT_STATUS_FAILURE,
325 RT_STATUS_PENDING,
326 RT_STATUS_RESOURCE
327}RT_STATUS,*PRT_STATUS;
328
329typedef enum _RT_CUSTOMER_ID
330{
331 RT_CID_DEFAULT = 0,
332 RT_CID_8187_ALPHA0 = 1,
333 RT_CID_8187_SERCOMM_PS = 2,
334 RT_CID_8187_HW_LED = 3,
335 RT_CID_8187_NETGEAR = 4,
336 RT_CID_WHQL = 5,
337 RT_CID_819x_CAMEO = 6,
338 RT_CID_819x_RUNTOP = 7,
339 RT_CID_819x_Senao = 8,
340 RT_CID_TOSHIBA = 9,
341 RT_CID_819x_Netcore = 10,
342 RT_CID_Nettronix = 11,
343 RT_CID_DLINK = 12,
344 RT_CID_PRONET = 13,
345 RT_CID_COREGA = 14,
346 RT_CID_819x_ALPHA = 15,
347 RT_CID_819x_Sitecom = 16,
348 RT_CID_CCX = 17,
349 RT_CID_819x_Lenovo = 18,
350 RT_CID_819x_QMI = 19,
351 RT_CID_819x_Edimax_Belkin = 20,
352 RT_CID_819x_Sercomm_Belkin = 21,
353 RT_CID_819x_CAMEO1 = 22,
354 RT_CID_819x_MSI = 23,
355 RT_CID_819x_Acer = 24,
356 RT_CID_819x_HP =27,
357 RT_CID_819x_CLEVO = 28,
358 RT_CID_819x_Arcadyan_Belkin = 29,
359 RT_CID_819x_SAMSUNG = 30,
360 RT_CID_819x_WNC_COREGA = 31,
361}RT_CUSTOMER_ID, *PRT_CUSTOMER_ID;
362
363typedef enum _RESET_TYPE {
364 RESET_TYPE_NORESET = 0x00,
365 RESET_TYPE_NORMAL = 0x01,
366 RESET_TYPE_SILENT = 0x02
367} RESET_TYPE;
368
369typedef enum _IC_INFERIORITY_8192S{
370 IC_INFERIORITY_A = 0,
371 IC_INFERIORITY_B = 1,
372}IC_INFERIORITY_8192S, *PIC_INFERIORITY_8192S;
373
374typedef enum _PCI_BRIDGE_VENDOR {
375 PCI_BRIDGE_VENDOR_INTEL = 0x0,
376 PCI_BRIDGE_VENDOR_ATI,
377 PCI_BRIDGE_VENDOR_AMD,
378 PCI_BRIDGE_VENDOR_SIS ,
379 PCI_BRIDGE_VENDOR_UNKNOWN,
380 PCI_BRIDGE_VENDOR_MAX ,
381} PCI_BRIDGE_VENDOR;
382
383typedef struct buffer
384{
385 struct buffer *next;
386 u32 *buf;
387 dma_addr_t dma;
388
389} buffer;
390
391typedef struct rtl_reg_debug{
392 unsigned int cmd;
393 struct {
394 unsigned char type;
395 unsigned char addr;
396 unsigned char page;
397 unsigned char length;
398 } head;
399 unsigned char buf[0xff];
400}rtl_reg_debug;
401
402typedef struct _rt_9x_tx_rate_history {
403 u32 cck[4];
404 u32 ofdm[8];
405 u32 ht_mcs[4][16];
406}rt_tx_rahis_t, *prt_tx_rahis_t;
407
408typedef struct _RT_SMOOTH_DATA_4RF {
409 char elements[4][100];
410 u32 index;
411 u32 TotalNum;
412 u32 TotalVal[4];
413}RT_SMOOTH_DATA_4RF, *PRT_SMOOTH_DATA_4RF;
414
415typedef struct Stats
416{
417 unsigned long txrdu;
418 unsigned long rxrdu;
419 unsigned long rxok;
420 unsigned long rxframgment;
421 unsigned long rxcmdpkt[4];
422 unsigned long rxurberr;
423 unsigned long rxstaterr;
424 unsigned long rxdatacrcerr;
425 unsigned long rxmgmtcrcerr;
426 unsigned long rxcrcerrmin;
427 unsigned long rxcrcerrmid;
428 unsigned long rxcrcerrmax;
429 unsigned long received_rate_histogram[4][32];
430 unsigned long received_preamble_GI[2][32];
431 unsigned long rx_AMPDUsize_histogram[5];
432 unsigned long rx_AMPDUnum_histogram[5];
433 unsigned long numpacket_matchbssid;
434 unsigned long numpacket_toself;
435 unsigned long num_process_phyinfo;
436 unsigned long numqry_phystatus;
437 unsigned long numqry_phystatusCCK;
438 unsigned long numqry_phystatusHT;
439 unsigned long received_bwtype[5];
440 unsigned long txnperr;
441 unsigned long txnpdrop;
442 unsigned long txresumed;
443 unsigned long rxoverflow;
444 unsigned long rxint;
445 unsigned long txnpokint;
446 unsigned long ints;
447 unsigned long shints;
448 unsigned long txoverflow;
449 unsigned long txlpokint;
450 unsigned long txlpdrop;
451 unsigned long txlperr;
452 unsigned long txbeokint;
453 unsigned long txbedrop;
454 unsigned long txbeerr;
455 unsigned long txbkokint;
456 unsigned long txbkdrop;
457 unsigned long txbkerr;
458 unsigned long txviokint;
459 unsigned long txvidrop;
460 unsigned long txvierr;
461 unsigned long txvookint;
462 unsigned long txvodrop;
463 unsigned long txvoerr;
464 unsigned long txbeaconokint;
465 unsigned long txbeacondrop;
466 unsigned long txbeaconerr;
467 unsigned long txmanageokint;
468 unsigned long txmanagedrop;
469 unsigned long txmanageerr;
470 unsigned long txcmdpktokint;
471 unsigned long txdatapkt;
472 unsigned long txfeedback;
473 unsigned long txfeedbackok;
474 unsigned long txoktotal;
475 unsigned long txokbytestotal;
476 unsigned long txokinperiod;
477 unsigned long txmulticast;
478 unsigned long txbytesmulticast;
479 unsigned long txbroadcast;
480 unsigned long txbytesbroadcast;
481 unsigned long txunicast;
482 unsigned long txbytesunicast;
483 unsigned long rxbytesunicast;
484 unsigned long txfeedbackfail;
485 unsigned long txerrtotal;
486 unsigned long txerrbytestotal;
487 unsigned long txerrmulticast;
488 unsigned long txerrbroadcast;
489 unsigned long txerrunicast;
490 unsigned long txretrycount;
491 unsigned long txfeedbackretry;
492 u8 last_packet_rate;
493 unsigned long slide_signal_strength[100];
494 unsigned long slide_evm[100];
495 unsigned long slide_rssi_total;
496 unsigned long slide_evm_total;
497 long signal_strength;
498 long signal_quality;
499 long last_signal_strength_inpercent;
500 long recv_signal_power;
501 u8 rx_rssi_percentage[4];
502 u8 rx_evm_percentage[2];
503 long rxSNRdB[4];
504 rt_tx_rahis_t txrate;
505 u32 Slide_Beacon_pwdb[100];
506 u32 Slide_Beacon_Total;
507 RT_SMOOTH_DATA_4RF cck_adc_pwdb;
508 u32 CurrentShowTxate;
509} Stats;
510
511typedef struct ChnlAccessSetting {
512 u16 SIFS_Timer;
513 u16 DIFS_Timer;
514 u16 SlotTimeTimer;
515 u16 EIFS_Timer;
516 u16 CWminIndex;
517 u16 CWmaxIndex;
518}*PCHANNEL_ACCESS_SETTING,CHANNEL_ACCESS_SETTING;
519
520typedef enum _TWO_PORT_STATUS
521{
522 TWO_PORT_STATUS__DEFAULT_ONLY,
523 TWO_PORT_STATUS__EXTENSION_ONLY,
524 TWO_PORT_STATUS__EXTENSION_FOLLOW_DEFAULT,
525 TWO_PORT_STATUS__DEFAULT_G_EXTENSION_N20,
526 TWO_PORT_STATUS__ADHOC,
527 TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE
528}TWO_PORT_STATUS;
529
530typedef struct _txbbgain_struct
531{
532 long txbb_iq_amplifygain;
533 u32 txbbgain_value;
534} txbbgain_struct, *ptxbbgain_struct;
535
536typedef struct _ccktxbbgain_struct
537{
538 u8 ccktxbb_valuearray[8];
539} ccktxbbgain_struct,*pccktxbbgain_struct;
540
541typedef struct _init_gain
542{
543 u8 xaagccore1;
544 u8 xbagccore1;
545 u8 xcagccore1;
546 u8 xdagccore1;
547 u8 cca;
548
549} init_gain, *pinit_gain;
550
551typedef struct _tx_ring{
552 u32 * desc;
553 u8 nStuckCount;
554 struct _tx_ring * next;
555}__attribute__ ((packed)) tx_ring, * ptx_ring;
556
557struct rtl8192_tx_ring {
558 tx_desc *desc;
559 dma_addr_t dma;
560 unsigned int idx;
561 unsigned int entries;
562 struct sk_buff_head queue;
563};
564
565
566
567struct rtl819x_ops{
568 nic_t nic_type;
569 void (* get_eeprom_size)(struct net_device* dev);
570 void (* init_adapter_variable)(struct net_device* dev);
571 void (* init_before_adapter_start)(struct net_device* dev);
572 bool (* initialize_adapter)(struct net_device* dev);
573 void (*link_change)(struct net_device* dev);
574 void (* tx_fill_descriptor)(struct net_device* dev, tx_desc * tx_desc, cb_desc * cb_desc, struct sk_buff *skb);
575 void (* tx_fill_cmd_descriptor)(struct net_device* dev, tx_desc_cmd * entry, cb_desc * cb_desc, struct sk_buff *skb);
576 bool (* rx_query_status_descriptor)(struct net_device* dev, struct rtllib_rx_stats* stats, rx_desc *pdesc, struct sk_buff* skb);
577 bool (* rx_command_packet_handler)(struct net_device *dev, struct sk_buff* skb, rx_desc *pdesc);
578 void (* stop_adapter)(struct net_device *dev, bool reset);
579 void (* update_ratr_table)(struct net_device* dev);
580 void (* irq_enable)(struct net_device* dev);
581 void (* irq_disable)(struct net_device* dev);
582 void (* irq_clear)(struct net_device* dev);
583 void (* rx_enable)(struct net_device* dev);
584 void (* tx_enable)(struct net_device* dev);
585 void (* interrupt_recognized)(struct net_device *dev, u32 *p_inta, u32 *p_intb);
586 bool (* TxCheckStuckHandler)(struct net_device* dev);
587 bool (* RxCheckStuckHandler)(struct net_device* dev);
588};
589
590typedef struct r8192_priv
591{
592 struct pci_dev *pdev;
593 struct pci_dev *bridge_pdev;
594
595#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10))
596 u32 pci_state;
597#endif
598
599 bool bfirst_init;
600 bool bfirst_after_down;
601 bool initialized_at_probe;
602 bool being_init_adapter;
603 bool bDriverIsGoingToUnload;
604
605 int irq;
606 short irq_enabled;
607
608 short up;
609 short up_first_time;
610 delayed_work_struct_rsl update_beacon_wq;
611 delayed_work_struct_rsl watch_dog_wq;
612 delayed_work_struct_rsl txpower_tracking_wq;
613 delayed_work_struct_rsl rfpath_check_wq;
614 delayed_work_struct_rsl gpio_change_rf_wq;
615 delayed_work_struct_rsl initialgain_operate_wq;
616 delayed_work_struct_rsl check_hw_scan_wq;
617 delayed_work_struct_rsl hw_scan_simu_wq;
618 delayed_work_struct_rsl start_hw_scan_wq;
619
620 struct workqueue_struct *priv_wq;
621
622 CHANNEL_ACCESS_SETTING ChannelAccessSetting;
623
624 mp_adapter NdisAdapter;
625
626 struct rtl819x_ops *ops;
627 struct rtllib_device *rtllib;
628
629#ifdef CONFIG_BT_30
630 struct BT30Info BtInfo;
631#endif
632
633#ifdef CONFIG_RTLWIFI_DEBUGFS
634 rtl_fs_debug *debug;
635#endif /* CONFIG_IWLWIFI_DEBUGFS */
636
637 work_struct_rsl reset_wq;
638
639 LOG_INTERRUPT_8190_T InterruptLog;
640
641 RT_CUSTOMER_ID CustomerID;
642
643
644 RT_RF_TYPE_819xU rf_chip;
645 IC_INFERIORITY_8192S IC_Class;
646 HT_CHANNEL_WIDTH CurrentChannelBW;
647 BB_REGISTER_DEFINITION_T PHYRegDef[4];
648 rate_adaptive rate_adaptive;
649
650 ccktxbbgain_struct cck_txbbgain_table[CCKTxBBGainTableLength];
651 ccktxbbgain_struct cck_txbbgain_ch14_table[CCKTxBBGainTableLength];
652
653 txbbgain_struct txbbgain_table[TxBBGainTableLength];
654
655 ACM_METHOD AcmMethod;
656
657 prt_firmware pFirmware;
658 rtl819x_loopback_e LoopbackMode;
659 firmware_source_e firmware_source;
660
661 struct timer_list watch_dog_timer;
662 struct timer_list fsync_timer;
663 struct timer_list gpio_polling_timer;
664
665 spinlock_t fw_scan_lock;
666 spinlock_t irq_lock;
667 spinlock_t irq_th_lock;
668 spinlock_t tx_lock;
669 spinlock_t rf_ps_lock;
670 spinlock_t rw_lock;
671 spinlock_t rt_h2c_lock;
672#ifdef CONFIG_ASPM_OR_D3
673 spinlock_t D3_lock;
674#endif
675 spinlock_t rf_lock;
676 spinlock_t ps_lock;
677
678 struct sk_buff_head rx_queue;
679 struct sk_buff_head skb_queue;
680
681 struct tasklet_struct irq_rx_tasklet;
682 struct tasklet_struct irq_tx_tasklet;
683 struct tasklet_struct irq_prepare_beacon_tasklet;
684
685 struct semaphore wx_sem;
686 struct semaphore rf_sem;
687#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,16))
688 struct semaphore mutex;
689#else
690 struct mutex mutex;
691#endif
692
693 struct Stats stats;
694 struct iw_statistics wstats;
695 struct proc_dir_entry *dir_dev;
696
697 short (*rf_set_sens)(struct net_device *dev,short sens);
698 u8 (*rf_set_chan)(struct net_device *dev,u8 ch);
699 void (*rf_close)(struct net_device *dev);
700 void (*rf_init)(struct net_device *dev);
701
702#ifdef CONFIG_CFG_80211
703 struct ieee80211_rate rates[IEEE80211_NUM_BANDS][RTL_RATE_MAX];
704 struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS];
705#endif
706
707 rx_desc *rx_ring[MAX_RX_QUEUE];
708 struct sk_buff *rx_buf[MAX_RX_QUEUE][MAX_RX_COUNT];
709 dma_addr_t rx_ring_dma[MAX_RX_QUEUE];
710 unsigned int rx_idx[MAX_RX_QUEUE];
711 int rxringcount;
712 u16 rxbuffersize;
713
714 u32 LastRxDescTSFHigh;
715 u32 LastRxDescTSFLow;
716
717 u16 EarlyRxThreshold;
718 u32 ReceiveConfig;
719 u8 AcmControl;
720 u8 RFProgType;
721 u8 retry_data;
722 u8 retry_rts;
723 u16 rts;
724
725 struct rtl8192_tx_ring tx_ring[MAX_TX_QUEUE_COUNT];
726 int txringcount;
727 int txbuffsize;
728 int txfwbuffersize;
729 atomic_t tx_pending[0x10];
730
731 u16 ShortRetryLimit;
732 u16 LongRetryLimit;
733 u32 TransmitConfig;
734 u8 RegCWinMin;
735 u8 keepAliveLevel;
736
737#ifdef CONFIG_RTL_RFKILL
738 bool rfkill_off;
739#endif
740 bool sw_radio_on;
741 bool bHwRadioOff;
742 bool pwrdown;
743 bool blinked_ingpio;
744 u8 polling_timer_on;
745
746 /**********************************************************/
747
748 enum card_type {PCI,MINIPCI,CARDBUS,USB}card_type;
749
750 work_struct_rsl qos_activate;
751
752 u8 bIbssCoordinator;
753
754 short promisc;
755 short crcmon;
756
757 int txbeaconcount;
758
759 short chan;
760 short sens;
761 short max_sens;
762 u32 rx_prevlen;
763
764 u8 ScanDelay;
765 bool ps_force;
766
767 u32 irq_mask[2];
768
769 u8 Rf_Mode;
770 nic_t card_8192;
771 u8 card_8192_version;
772
773 short enable_gpio0;
774
775 u8 rf_type;
776 u8 IC_Cut;
777 char nick[IW_ESSID_MAX_SIZE + 1];
778
779 u8 RegBcnCtrlVal;
780 bool bHwAntDiv;
781
782 bool bTKIPinNmodeFromReg;
783 bool bWEPinNmodeFromReg;
784
785 bool bLedOpenDrain;
786
787 u8 check_roaming_cnt;
788
789 bool bIgnoreSilentReset;
790 u32 SilentResetRxSoltNum;
791 u32 SilentResetRxSlotIndex;
792 u32 SilentResetRxStuckEvent[MAX_SILENT_RESET_RX_SLOT_NUM];
793
794 void *scan_cmd;
795 u8 hwscan_bw_40;
796
797 u16 nrxAMPDU_size;
798 u8 nrxAMPDU_aggr_num;
799
800 u32 last_rxdesc_tsf_high;
801 u32 last_rxdesc_tsf_low;
802
803
804 u16 basic_rate;
805 u8 short_preamble;
806 u8 dot11CurrentPreambleMode;
807 u8 slot_time;
808 u16 SifsTime;
809
810 u8 RegWirelessMode;
811
812 u8 firmware_version;
813 u16 FirmwareSubVersion;
814 u16 rf_pathmap;
815 bool AutoloadFailFlag;
816
817 u8 RegPciASPM;
818 u8 RegAMDPciASPM;
819 u8 RegHwSwRfOffD3;
820 u8 RegSupportPciASPM;
821 bool bSupportASPM;
822
823 u32 RfRegChnlVal[2];
824
825 u8 ShowRateMode;
826 u8 RATRTableBitmap;
827
828 u8 EfuseMap[2][HWSET_MAX_SIZE_92S];
829 u16 EfuseUsedBytes;
830 u8 EfuseUsedPercentage;
831
832#ifdef EFUSE_REPG_WORKAROUND
833 bool efuse_RePGSec1Flag;
834 u8 efuse_RePGData[8];
835#endif
836
837 short epromtype;
838 u16 eeprom_vid;
839 u16 eeprom_did;
840 u16 eeprom_svid;
841 u16 eeprom_smid;
842 u8 eeprom_CustomerID;
843 u16 eeprom_ChannelPlan;
844 u8 eeprom_version;
845
846 u8 EEPROMRegulatory;
847 u8 EEPROMPwrGroup[2][3];
848 u8 EEPROMOptional;
849
850#if (EEPROM_OLD_FORMAT_SUPPORT == 1)
851 u8 EEPROMTxPowerLevelCCK[14];
852 u8 EEPROMTxPowerLevelOFDM24G[14];
853 u8 EEPROMTxPowerLevelOFDM5G[24];
854#else
855 u8 RfCckChnlAreaTxPwr[2][3];
856 u8 RfOfdmChnlAreaTxPwr1T[2][3];
857 u8 RfOfdmChnlAreaTxPwr2T[2][3];
858#endif
859 u8 EEPROMRfACCKChnl1TxPwLevel[3];
860 u8 EEPROMRfAOfdmChnlTxPwLevel[3];
861 u8 EEPROMRfCCCKChnl1TxPwLevel[3];
862 u8 EEPROMRfCOfdmChnlTxPwLevel[3];
863 u16 EEPROMTxPowerDiff;
864 u16 EEPROMAntPwDiff;
865 u8 EEPROMThermalMeter;
866 u8 EEPROMPwDiff;
867 u8 EEPROMCrystalCap;
868
869 u8 EEPROMBluetoothCoexist;
870 u8 EEPROMBluetoothType;
871 u8 EEPROMBluetoothAntNum;
872 u8 EEPROMBluetoothAntIsolation;
873 u8 EEPROMBluetoothRadioShared;
874
875
876 u8 EEPROMSupportWoWLAN;
877 u8 EEPROMBoardType;
878 u8 EEPROM_Def_Ver;
879 u8 EEPROMHT2T_TxPwr[6];
880 u8 EEPROMTSSI_A;
881 u8 EEPROMTSSI_B;
882 u8 EEPROMTxPowerLevelCCK_V1[3];
883 u8 EEPROMLegacyHTTxPowerDiff;
884
885 u8 BluetoothCoexist;
886
887 u8 CrystalCap;
888 u8 ThermalMeter[2];
889
890 u16 FwCmdIOMap;
891 u32 FwCmdIOParam;
892
893 u8 SwChnlInProgress;
894 u8 SwChnlStage;
895 u8 SwChnlStep;
896 u8 SetBWModeInProgress;
897
898 u8 nCur40MhzPrimeSC;
899
900 u32 RfReg0Value[4];
901 u8 NumTotalRFPath;
902 bool brfpath_rxenable[4];
903
904 bool bTXPowerDataReadFromEEPORM;
905
906 u16 RegChannelPlan;
907 u16 ChannelPlan;
908 bool bChnlPlanFromHW;
909
910 bool RegRfOff;
911 bool isRFOff;
912 bool bInPowerSaveMode;
913 u8 bHwRfOffAction;
914
915 bool aspm_clkreq_enable;
916 u32 pci_bridge_vendor;
917 u8 RegHostPciASPMSetting;
918 u8 RegDevicePciASPMSetting;
919
920 bool RFChangeInProgress;
921 bool SetRFPowerStateInProgress;
922 bool bdisable_nic;
923
924 u8 pwrGroupCnt;
925
926 u8 ThermalValue_LCK;
927 u8 ThermalValue_IQK;
928 bool bRfPiEnable;
929
930 u32 APKoutput[2][2];
931 bool bAPKdone;
932
933 long RegE94;
934 long RegE9C;
935 long RegEB4;
936 long RegEBC;
937
938 u32 RegC04;
939 u32 Reg874;
940 u32 RegC08;
941 u32 ADDA_backup[16];
942 u32 IQK_MAC_backup[3];
943
944 bool SetFwCmdInProgress;
945 u8 CurrentFwCmdIO;
946
947 u8 rssi_level;
948
949 bool bInformFWDriverControlDM;
950 u8 PwrGroupHT20[2][14];
951 u8 PwrGroupHT40[2][14];
952
953 u8 ThermalValue;
954 long EntryMinUndecoratedSmoothedPWDB;
955 long EntryMaxUndecoratedSmoothedPWDB;
956 u8 DynamicTxHighPowerLvl;
957 u8 LastDTPLvl;
958 u32 CurrentRATR0;
959 FALSE_ALARM_STATISTICS FalseAlmCnt;
960
961 u8 DMFlag;
962 u8 DM_Type;
963
964 u8 CckPwEnl;
965 u16 TSSI_13dBm;
966 u32 Pwr_Track;
967 u8 CCKPresentAttentuation_20Mdefault;
968 u8 CCKPresentAttentuation_40Mdefault;
969 char CCKPresentAttentuation_difference;
970 char CCKPresentAttentuation;
971 u8 bCckHighPower;
972 long undecorated_smoothed_pwdb;
973 long undecorated_smoothed_cck_adc_pwdb[4];
974
975 u32 MCSTxPowerLevelOriginalOffset[6];
976 u32 CCKTxPowerLevelOriginalOffset;
977 u8 TxPowerLevelCCK[14];
978 u8 TxPowerLevelCCK_A[14];
979 u8 TxPowerLevelCCK_C[14];
980 u8 TxPowerLevelOFDM24G[14];
981 u8 TxPowerLevelOFDM5G[14];
982 u8 TxPowerLevelOFDM24G_A[14];
983 u8 TxPowerLevelOFDM24G_C[14];
984 u8 LegacyHTTxPowerDiff;
985 u8 TxPowerDiff;
986 s8 RF_C_TxPwDiff;
987 s8 RF_B_TxPwDiff;
988 u8 RfTxPwrLevelCck[2][14];
989 u8 RfTxPwrLevelOfdm1T[2][14];
990 u8 RfTxPwrLevelOfdm2T[2][14];
991 u8 AntennaTxPwDiff[3];
992 u8 TxPwrHt20Diff[2][14];
993 u8 TxPwrLegacyHtDiff[2][14];
994 u8 TxPwrSafetyFlag;
995 u8 HT2T_TxPwr_A[14];
996 u8 HT2T_TxPwr_B[14];
997 u8 CurrentCckTxPwrIdx;
998 u8 CurrentOfdm24GTxPwrIdx;
999
1000 bool bdynamic_txpower;
1001 bool bDynamicTxHighPower;
1002 bool bDynamicTxLowPower;
1003 bool bLastDTPFlag_High;
1004 bool bLastDTPFlag_Low;
1005
1006 bool bstore_last_dtpflag;
1007 bool bstart_txctrl_bydtp;
1008
1009 u8 rfa_txpowertrackingindex;
1010 u8 rfa_txpowertrackingindex_real;
1011 u8 rfa_txpowertracking_default;
1012 u8 rfc_txpowertrackingindex;
1013 u8 rfc_txpowertrackingindex_real;
1014 u8 rfc_txpowertracking_default;
1015 bool btxpower_tracking;
1016 bool bcck_in_ch14;
1017
1018 u8 TxPowerTrackControl;
1019 u8 txpower_count;
1020 bool btxpower_trackingInit;
1021
1022 u8 OFDM_index[2];
1023 u8 CCK_index;
1024
1025 u8 Record_CCK_20Mindex;
1026 u8 Record_CCK_40Mindex;
1027
1028 init_gain initgain_backup;
1029 u8 DefaultInitialGain[4];
1030 bool bis_any_nonbepkts;
1031 bool bcurrent_turbo_EDCA;
1032 bool bis_cur_rdlstate;
1033
1034 bool bCCKinCH14;
1035
1036 u8 MidHighPwrTHR_L1;
1037 u8 MidHighPwrTHR_L2;
1038
1039 bool bfsync_processing;
1040 u32 rate_record;
1041 u32 rateCountDiffRecord;
1042 u32 ContiuneDiffCount;
1043 bool bswitch_fsync;
1044 u8 framesync;
1045 u32 framesyncC34;
1046 u8 framesyncMonitor;
1047
1048 bool bDMInitialGainEnable;
1049 bool MutualAuthenticationFail;
1050
1051 bool bDisableFrameBursting;
1052
1053 u32 reset_count;
1054 bool bpbc_pressed;
1055
1056 u32 txpower_checkcnt;
1057 u32 txpower_tracking_callback_cnt;
1058 u8 thermal_read_val[40];
1059 u8 thermal_readback_index;
1060 u32 ccktxpower_adjustcnt_not_ch14;
1061 u32 ccktxpower_adjustcnt_ch14;
1062
1063 RESET_TYPE ResetProgress;
1064 bool bForcedSilentReset;
1065 bool bDisableNormalResetCheck;
1066 u16 TxCounter;
1067 u16 RxCounter;
1068 int IrpPendingCount;
1069 bool bResetInProgress;
1070 bool force_reset;
1071 bool force_lps;
1072 u8 InitialGainOperateType;
1073
1074 bool chan_forced;
1075 bool bSingleCarrier;
1076 bool RegBoard;
1077 bool bCckContTx;
1078 bool bOfdmContTx;
1079 bool bStartContTx;
1080 u8 RegPaModel;
1081 u8 btMpCckTxPower;
1082 u8 btMpOfdmTxPower;
1083
1084 u32 MptActType;
1085 u32 MptIoOffset;
1086 u32 MptIoValue;
1087 u32 MptRfPath;
1088
1089 u32 MptBandWidth;
1090 u32 MptRateIndex;
1091 u8 MptChannelToSw;
1092 u32 MptRCR;
1093
1094 u8 PwrDomainProtect;
1095 u8 H2CTxCmdSeq;
1096
1097
1098}r8192_priv;
1099
1100extern const struct ethtool_ops rtl819x_ethtool_ops;
1101
1102void rtl8192_tx_cmd(struct net_device *dev, struct sk_buff *skb);
1103short rtl8192_tx(struct net_device *dev, struct sk_buff* skb);
1104
1105u8 read_nic_io_byte(struct net_device *dev, int x);
1106u32 read_nic_io_dword(struct net_device *dev, int x);
1107u16 read_nic_io_word(struct net_device *dev, int x) ;
1108void write_nic_io_byte(struct net_device *dev, int x,u8 y);
1109void write_nic_io_word(struct net_device *dev, int x,u16 y);
1110void write_nic_io_dword(struct net_device *dev, int x,u32 y);
1111
1112u8 read_nic_byte(struct net_device *dev, int x);
1113u32 read_nic_dword(struct net_device *dev, int x);
1114u16 read_nic_word(struct net_device *dev, int x) ;
1115void write_nic_byte(struct net_device *dev, int x,u8 y);
1116void write_nic_word(struct net_device *dev, int x,u16 y);
1117void write_nic_dword(struct net_device *dev, int x,u32 y);
1118
1119void force_pci_posting(struct net_device *dev);
1120
1121void rtl8192_rx_enable(struct net_device *);
1122void rtl8192_tx_enable(struct net_device *);
1123
1124int rtl8192_hard_start_xmit(struct sk_buff *skb,struct net_device *dev);
1125void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int rate);
1126void rtl8192_data_hard_stop(struct net_device *dev);
1127void rtl8192_data_hard_resume(struct net_device *dev);
1128void rtl8192_restart(void *data);
1129void rtl819x_watchdog_wqcallback(void *data);
1130void rtl8192_hw_sleep_wq (void *data);
1131void watch_dog_timer_callback(unsigned long data);
1132void rtl8192_irq_rx_tasklet(struct r8192_priv *priv);
1133void rtl8192_irq_tx_tasklet(struct r8192_priv *priv);
1134int rtl8192_down(struct net_device *dev,bool shutdownrf);
1135int rtl8192_up(struct net_device *dev);
1136void rtl8192_commit(struct net_device *dev);
1137void rtl8192_set_chan(struct net_device *dev,short ch);
1138
1139void check_rfctrl_gpio_timer(unsigned long data);
1140
1141void rtl8192_hw_wakeup_wq(void *data);
1142irqreturn_type rtl8192_interrupt(int irq, void *netdev, struct pt_regs *regs);
1143
1144short rtl8192_pci_initdescring(struct net_device *dev);
1145
1146void rtl8192_cancel_deferred_work(struct r8192_priv* priv);
1147
1148int _rtl8192_up(struct net_device *dev,bool is_silent_reset);
1149
1150short rtl8192_is_tx_queue_empty(struct net_device *dev);
1151void rtl8192_irq_disable(struct net_device *dev);
1152
1153void rtl8192_tx_timeout(struct net_device *dev);
1154void rtl8192_pci_resetdescring(struct net_device *dev);
1155void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode);
1156void rtl8192_irq_enable(struct net_device *dev);
1157void rtl8192_config_rate(struct net_device* dev, u16* rate_config);
1158void rtl8192_update_cap(struct net_device* dev, u16 cap);
1159void rtl8192_irq_disable(struct net_device *dev);
1160
1161void rtl819x_UpdateRxPktTimeStamp (struct net_device *dev, struct rtllib_rx_stats *stats);
1162long rtl819x_translate_todbm(struct r8192_priv * priv, u8 signal_strength_index );
1163void rtl819x_update_rxsignalstatistics8190pci(struct r8192_priv * priv,struct rtllib_rx_stats * pprevious_stats);
1164u8 rtl819x_evm_dbtopercentage(char value);
1165void rtl819x_process_cck_rxpathsel(struct r8192_priv * priv,struct rtllib_rx_stats * pprevious_stats);
1166u8 rtl819x_query_rxpwrpercentage( char antpower );
1167void rtl8192_record_rxdesc_forlateruse(struct rtllib_rx_stats * psrc_stats,struct rtllib_rx_stats * ptarget_stats);
1168
1169bool NicIFEnableNIC(struct net_device* dev);
1170bool NicIFDisableNIC(struct net_device* dev);
1171
1172bool
1173MgntActSet_RF_State(
1174 struct net_device* dev,
1175 RT_RF_POWER_STATE StateToSet,
1176 RT_RF_CHANGE_SOURCE ChangeSource,
1177 bool ProtectOrNot
1178 );
1179void
1180ActUpdateChannelAccessSetting(
1181 struct net_device* dev,
1182 WIRELESS_MODE WirelessMode,
1183 PCHANNEL_ACCESS_SETTING ChnlAccessSetting
1184 );
1185
1186#ifdef CONFIG_CFG_80211
1187struct net_device *wiphy_to_net_device(struct wiphy *wiphy);
1188#endif
1189
1190#endif
diff --git a/drivers/staging/rtl8192e/ieee80211/rtl_crypto.h b/drivers/staging/rtl8192e/rtl_crypto.h
index ccf6ae76357..6f445c58dc0 100644
--- a/drivers/staging/rtl8192e/ieee80211/rtl_crypto.h
+++ b/drivers/staging/rtl8192e/rtl_crypto.h
@@ -24,6 +24,16 @@
24#include <asm/page.h> 24#include <asm/page.h>
25#include <asm/errno.h> 25#include <asm/errno.h>
26 26
27#ifdef BUILT_IN_CRYPTO
28#ifdef CONFIG_CRYPTO_HMAC
29#undef CONFIG_CRYPTO_HMAC
30#endif
31
32#ifdef CONFIG_KMOD
33#undef CONFIG_KMOD
34#endif
35#endif /* BUILT_IN_CRYPTO */
36
27#define crypto_register_alg crypto_register_alg_rsl 37#define crypto_register_alg crypto_register_alg_rsl
28#define crypto_unregister_alg crypto_unregister_alg_rsl 38#define crypto_unregister_alg crypto_unregister_alg_rsl
29#define crypto_alloc_tfm crypto_alloc_tfm_rsl 39#define crypto_alloc_tfm crypto_alloc_tfm_rsl
@@ -52,10 +62,10 @@
52 62
53#define CRYPTO_TFM_REQ_WEAK_KEY 0x00000100 63#define CRYPTO_TFM_REQ_WEAK_KEY 0x00000100
54#define CRYPTO_TFM_RES_WEAK_KEY 0x00100000 64#define CRYPTO_TFM_RES_WEAK_KEY 0x00100000
55#define CRYPTO_TFM_RES_BAD_KEY_LEN 0x00200000 65#define CRYPTO_TFM_RES_BAD_KEY_LEN 0x00200000
56#define CRYPTO_TFM_RES_BAD_KEY_SCHED 0x00400000 66#define CRYPTO_TFM_RES_BAD_KEY_SCHED 0x00400000
57#define CRYPTO_TFM_RES_BAD_BLOCK_LEN 0x00800000 67#define CRYPTO_TFM_RES_BAD_BLOCK_LEN 0x00800000
58#define CRYPTO_TFM_RES_BAD_FLAGS 0x01000000 68#define CRYPTO_TFM_RES_BAD_FLAGS 0x01000000
59 69
60/* 70/*
61 * Miscellaneous stuff. 71 * Miscellaneous stuff.
@@ -396,4 +406,3 @@ void crypto_hmac(struct crypto_tfm *tfm, u8 *key, unsigned int *keylen,
396#endif /* CONFIG_CRYPTO_HMAC */ 406#endif /* CONFIG_CRYPTO_HMAC */
397 407
398#endif /* _LINUX_CRYPTO_H */ 408#endif /* _LINUX_CRYPTO_H */
399
diff --git a/drivers/staging/rtl8192e/rtl_debug.c b/drivers/staging/rtl8192e/rtl_debug.c
new file mode 100644
index 00000000000..68839944083
--- /dev/null
+++ b/drivers/staging/rtl8192e/rtl_debug.c
@@ -0,0 +1,1339 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * Based on the r8180 driver, which is:
5 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 *
19 * The full GNU General Public License is included in this distribution in the
20 * file called LICENSE.
21 *
22 * Contact Information:
23 * wlanfae <wlanfae@realtek.com>
24******************************************************************************/
25#include "rtl_debug.h"
26#include "rtl_core.h"
27#include "r8192E_phy.h"
28#include "r8192E_phyreg.h"
29#include "r8190P_rtl8256.h" /* RTL8225 Radio frontend */
30#include "r8192E_cmdpkt.h"
31
32u32 rt_global_debug_component = \
33 COMP_ERR ;
34
35/*------------------Declare variable-----------------------*/
36u32 DBGP_Type[DBGP_TYPE_MAX];
37
38/*-----------------------------------------------------------------------------
39 * Function: DBGP_Flag_Init
40 *
41 * Overview: Refresh all debug print control flag content to zero.
42 *
43 * Input: NONE
44 *
45 * Output: NONE
46 *
47 * Return: NONE
48 *
49 * Revised History:
50 * When Who Remark
51 * 10/20/2006 MHC Create Version 0.
52 *
53 *---------------------------------------------------------------------------*/
54void rtl8192_dbgp_flag_init(struct net_device *dev)
55{
56 u8 i;
57
58 for (i = 0; i < DBGP_TYPE_MAX; i++)
59 {
60 DBGP_Type[i] = 0;
61 }
62
63
64} /* DBGP_Flag_Init */
65
66/* this is only for debugging */
67void print_buffer(u32 *buffer, int len)
68{
69 int i;
70 u8 *buf =(u8*)buffer;
71
72 printk("ASCII BUFFER DUMP (len: %x):\n",len);
73
74 for (i=0;i<len;i++)
75 printk("%c",buf[i]);
76
77 printk("\nBINARY BUFFER DUMP (len: %x):\n",len);
78
79 for (i=0;i<len;i++)
80 printk("%x",buf[i]);
81
82 printk("\n");
83}
84
85/* this is only for debug */
86void dump_eprom(struct net_device *dev)
87{
88 int i;
89
90 for (i = 0; i < 0xff; i++) {
91 RT_TRACE(COMP_INIT, "EEPROM addr %x : %x", i, eprom_read(dev,i));
92 }
93}
94
95/* this is only for debug */
96void rtl8192_dump_reg(struct net_device *dev)
97{
98 int i;
99 int n;
100 int max = 0x5ff;
101
102 RT_TRACE(COMP_INIT, "Dumping NIC register map");
103
104 for (n = 0; n <= max; ) {
105 printk( "\nD: %2x> ", n);
106 for (i = 0; i < 16 && n <= max; i++, n++)
107 printk("%2x ", read_nic_byte(dev, n));
108 }
109 printk("\n");
110}
111
112#ifdef CONFIG_RTLWIFI_DEBUGFS
113/* debugfs related stuff */
114static struct dentry *rtl_debugfs_root;
115static int rtl_dbgfs_open(struct inode *inode, struct file *file)
116{
117 file->private_data = inode->i_private;
118 return 0;
119}
120
121static ssize_t rtl_dbgfs_register_write(struct file *file,
122 const char __user *user_buf,
123 size_t count,
124 loff_t *ppos)
125{
126 struct r8192_priv *priv = (struct r8192_priv *)file->private_data;
127 char buf[32];
128 int buf_size;
129 u32 type, offset;
130
131 memset(buf, 0, sizeof(buf));
132 buf_size = min(count, sizeof(buf) - 1);
133 if (copy_from_user(buf, user_buf, buf_size))
134 return -EFAULT;
135
136 if (sscanf(buf, "%x,%x", &type, &offset ) == 2) {
137 priv->debug->hw_type = type;
138 priv->debug->hw_offset = offset;
139 } else {
140 priv->debug->hw_type = 0;
141 priv->debug->hw_offset = 0;
142 }
143
144 return count;
145}
146
147void rtl_hardware_grab(struct net_device *dev)
148{
149 struct r8192_priv *priv = rtllib_priv(dev);
150 int t = 0;
151 int timeout = 20;
152 u32 mask = RF_CHANGE_BY_HW|RF_CHANGE_BY_PS|RF_CHANGE_BY_IPS;
153
154 priv->debug->hw_holding = true;
155 rtllib_ips_leave_wq(dev);
156 do {
157 if ((priv->rtllib->RfOffReason & mask)) {
158 msleep(100);
159 t++;
160 } else {
161 return;
162 }
163 } while (t < timeout);
164
165 return;
166}
167
168static ssize_t rtl_dbgfs_register_read(struct file *file,
169 char __user *user_buf,
170 size_t count,
171 loff_t *ppos)
172{
173 struct r8192_priv *priv = (struct r8192_priv *)file->private_data;
174 struct net_device *dev = priv->rtllib->dev;
175 ssize_t ret = 0;
176 char buf[2048];
177 int n,i;
178 u32 len = 0;
179 u32 max = 0xff;
180 u32 page_no, path;
181
182 rtl_hardware_grab(dev);
183
184 if (!priv->debug->hw_type) {
185 page_no = (priv->debug->hw_offset > 0x0f)? 0x0f: priv->debug->hw_offset;
186#ifdef RTL8192SE
187 if (page_no >= 0x08 ) {
188 len += snprintf(buf + len, count - len,
189 "\n#################### BB page- %x##################\n ", page_no);
190 for (n=0;n<=max;)
191 {
192 len += snprintf(buf + len, count - len, "\nD: %2x > ",n);
193 for (i=0;i<4 && n<=max;n+=4,i++)
194 len += snprintf(buf + len, count - len,
195 "%8.8x ",rtl8192_QueryBBReg(dev,(page_no << 8|n),
196 bMaskDWord));
197 }
198
199 } else
200#endif
201 {
202 len += snprintf(buf + len,count - len,
203 "\n#################### MAC page- %x##################\n ", page_no);
204 for (n=0;n<=max;) {
205 len += snprintf(buf + len, count - len, "\nD: %2x > ",n);
206 for (i=0;i<16 && n<=max;i++,n++)
207 len += snprintf(buf + len, count - len,
208 "%2.2x ",read_nic_byte(dev,((page_no<<8)|n)));
209 }
210 }
211 } else {
212 path = (priv->debug->hw_offset < RF90_PATH_MAX)? priv->debug->hw_offset:(RF90_PATH_MAX - 1);
213 len += snprintf(buf + len, count - len,
214 "\n#################### RF-PATH-%x ##################\n ", 0x0a+path);
215 for (n=0;n<=max;) {
216 len += snprintf(buf+ len, count - len, "\nD: %2x > ",n);
217 for (i=0;i<4 && n<=max;n+=4,i++)
218 len += snprintf(buf + len, count - len,
219 "%8.8x ",rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)path,\
220 n, bMaskDWord));
221 }
222 }
223
224 priv->debug->hw_holding = false;
225
226 len += snprintf(buf + len, count - len, "\n");
227 ret = simple_read_from_buffer(user_buf, count, ppos, buf, len);
228 return ret;
229}
230
231static const struct file_operations rtl_register_debug = {
232 .read = rtl_dbgfs_register_read,
233 .write = rtl_dbgfs_register_write,
234 .open = rtl_dbgfs_open,
235 .owner = THIS_MODULE
236};
237
238int rtl_debug_module_init(struct r8192_priv *priv, const char *name)
239{
240 rtl_fs_debug *debug;
241 int ret = 0;
242
243 if (!rtl_debugfs_root)
244 return -ENOENT;
245
246#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13))
247 debug = kzalloc(sizeof(rtl_fs_debug), GFP_KERNEL);
248#else
249 rtl_fs_debug = kmalloc(sizeof(*rtl_fs_debug), GFP_KERNEL);
250 memset(rtl_fs_debug,0,sizeof(*rtl_fs_debug));
251#endif
252 if (!debug) {
253 ret = -ENOMEM;
254 goto err;
255 }
256 priv->debug = debug;
257
258 debug->name = name;
259 debug->dir_drv = debugfs_create_dir(name, rtl_debugfs_root);
260 if (!debug->dir_drv ) {
261 ret = -ENOENT;
262 goto err;
263 }
264
265 debug->debug_register = debugfs_create_file("debug_register", S_IRUGO,
266 debug->dir_drv, priv, &rtl_register_debug);
267 if (!debug->debug_register) {
268 ret = -ENOENT;
269 goto err;
270 }
271
272 return 0;
273err:
274 RT_TRACE(COMP_DBG, "Can't open the debugfs directory\n");
275 rtl_debug_module_remove(priv);
276 return ret;
277
278}
279
280void rtl_debug_module_remove(struct r8192_priv *priv)
281{
282 if (!priv->debug)
283 return;
284 debugfs_remove(priv->debug->debug_register);
285 debugfs_remove(priv->debug->dir_drv);
286 kfree(priv->debug);
287 priv->debug = NULL;
288}
289
290int rtl_create_debugfs_root(void)
291{
292 rtl_debugfs_root = debugfs_create_dir(DRV_NAME, NULL);
293 if (!rtl_debugfs_root)
294 return -ENOENT;
295
296 return 0;
297}
298
299void rtl_remove_debugfs_root(void)
300{
301 debugfs_remove(rtl_debugfs_root);
302 rtl_debugfs_root = NULL;
303}
304#endif
305
306/****************************************************************************
307 -----------------------------PROCFS STUFF-------------------------
308*****************************************************************************/
309/*This part is related to PROC, which will record some statistics. */
310static struct proc_dir_entry *rtl8192_proc = NULL;
311
312static int proc_get_stats_ap(char *page, char **start,
313 off_t offset, int count,
314 int *eof, void *data)
315{
316 struct net_device *dev = data;
317 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
318 struct rtllib_device *ieee = priv->rtllib;
319 struct rtllib_network *target;
320
321 int len = 0;
322
323 list_for_each_entry(target, &ieee->network_list, list) {
324
325 len += snprintf(page + len, count - len,
326 "%s ", target->ssid);
327
328 if (target->wpa_ie_len>0 || target->rsn_ie_len>0){
329 len += snprintf(page + len, count - len,
330 "WPA\n");
331 }
332 else{
333 len += snprintf(page + len, count - len,
334 "non_WPA\n");
335 }
336
337 }
338
339 *eof = 1;
340 return len;
341}
342
343static int proc_get_registers_0(char *page, char **start,
344 off_t offset, int count,
345 int *eof, void *data)
346{
347 struct net_device *dev = data;
348
349 int len = 0;
350 int i,n,page0;
351
352 int max=0xff;
353 page0 = 0x000;
354
355#ifdef RTL8192SE
356 /* This dump the current register page */
357 if (!IS_BB_REG_OFFSET_92S(page0)){
358 len += snprintf(page + len, count - len,
359 "\n####################page %x##################\n ", (page0>>8));
360 for (n=0;n<=max;)
361 {
362 len += snprintf(page + len, count - len,
363 "\nD: %2x > ",n);
364 for (i=0;i<16 && n<=max;i++,n++)
365 len += snprintf(page + len, count - len,
366 "%2.2x ",read_nic_byte(dev,(page0|n)));
367 }
368 }else
369#endif
370 {
371 len += snprintf(page + len, count - len,
372 "\n####################page %x##################\n ", (page0>>8));
373 len += snprintf(page + len, count - len,
374 "\nD: OF > 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F");
375 for (n=0;n<=max;)
376 {
377 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
378 for (i=0;i<16 && n<=max;n++,i++)
379 len += snprintf(page + len, count - len,
380 "%2.2x ",read_nic_byte(dev,(page0|n)));
381 }
382 }
383 len += snprintf(page + len, count - len,"\n");
384 *eof = 1;
385 return len;
386
387}
388static int proc_get_registers_1(char *page, char **start,
389 off_t offset, int count,
390 int *eof, void *data)
391{
392 struct net_device *dev = data;
393
394 int len = 0;
395 int i,n,page0;
396
397 int max=0xff;
398 page0 = 0x100;
399
400 /* This dump the current register page */
401 len += snprintf(page + len, count - len,
402 "\n####################page %x##################\n ", (page0>>8));
403 len += snprintf(page + len, count - len,
404 "\nD: OF > 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F");
405 for (n=0;n<=max;)
406 {
407 len += snprintf(page + len, count - len,
408 "\nD: %2x > ",n);
409 for (i=0;i<16 && n<=max;i++,n++)
410 len += snprintf(page + len, count - len,
411 "%2.2x ",read_nic_byte(dev,(page0|n)));
412 }
413 len += snprintf(page + len, count - len,"\n");
414 *eof = 1;
415 return len;
416
417}
418static int proc_get_registers_2(char *page, char **start,
419 off_t offset, int count,
420 int *eof, void *data)
421{
422 struct net_device *dev = data;
423
424 int len = 0;
425 int i,n,page0;
426
427 int max=0xff;
428 page0 = 0x200;
429
430 /* This dump the current register page */
431 len += snprintf(page + len, count - len,
432 "\n####################page %x##################\n ", (page0>>8));
433 len += snprintf(page + len, count - len,
434 "\nD: OF > 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F");
435 for (n=0;n<=max;)
436 {
437 len += snprintf(page + len, count - len,
438 "\nD: %2x > ",n);
439 for (i=0;i<16 && n<=max;i++,n++)
440 len += snprintf(page + len, count - len,
441 "%2.2x ",read_nic_byte(dev,(page0|n)));
442 }
443 len += snprintf(page + len, count - len,"\n");
444 *eof = 1;
445 return len;
446
447}
448static int proc_get_registers_3(char *page, char **start,
449 off_t offset, int count,
450 int *eof, void *data)
451{
452 struct net_device *dev = data;
453
454 int len = 0;
455 int i,n,page0;
456
457 int max=0xff;
458 page0 = 0x300;
459
460 /* This dump the current register page */
461 len += snprintf(page + len, count - len,
462 "\n####################page %x##################\n ", (page0>>8));
463 len += snprintf(page + len, count - len,
464 "\nD: OF > 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F");
465 for (n=0;n<=max;)
466 {
467 len += snprintf(page + len, count - len,
468 "\nD: %2x > ",n);
469 for (i=0;i<16 && n<=max;i++,n++)
470 len += snprintf(page + len, count - len,
471 "%2.2x ",read_nic_byte(dev,(page0|n)));
472 }
473 len += snprintf(page + len, count - len,"\n");
474 *eof = 1;
475 return len;
476
477}
478static int proc_get_registers_4(char *page, char **start,
479 off_t offset, int count,
480 int *eof, void *data)
481{
482 struct net_device *dev = data;
483
484 int len = 0;
485 int i,n,page0;
486
487 int max=0xff;
488 page0 = 0x400;
489
490 /* This dump the current register page */
491 len += snprintf(page + len, count - len,
492 "\n####################page %x##################\n ", (page0>>8));
493 len += snprintf(page + len, count - len,
494 "\nD: OF > 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F");
495 for (n=0;n<=max;)
496 {
497 len += snprintf(page + len, count - len,
498 "\nD: %2x > ",n);
499 for (i=0;i<16 && n<=max;i++,n++)
500 len += snprintf(page + len, count - len,
501 "%2.2x ",read_nic_byte(dev,(page0|n)));
502 }
503 len += snprintf(page + len, count - len,"\n");
504 *eof = 1;
505 return len;
506
507}
508static int proc_get_registers_5(char *page, char **start,
509 off_t offset, int count,
510 int *eof, void *data)
511{
512 struct net_device *dev = data;
513
514 int len = 0;
515 int i,n,page0;
516
517 int max=0xff;
518 page0 = 0x500;
519
520 /* This dump the current register page */
521 len += snprintf(page + len, count - len,
522 "\n####################page %x##################\n ", (page0>>8));
523 len += snprintf(page + len, count - len,
524 "\nD: OF > 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F");
525 for (n=0;n<=max;)
526 {
527 len += snprintf(page + len, count - len,
528 "\nD: %2x > ",n);
529 for (i=0;i<16 && n<=max;i++,n++)
530 len += snprintf(page + len, count - len,
531 "%2.2x ",read_nic_byte(dev,(page0|n)));
532 }
533 len += snprintf(page + len, count - len,"\n");
534 *eof = 1;
535 return len;
536
537}
538static int proc_get_registers_6(char *page, char **start,
539 off_t offset, int count,
540 int *eof, void *data)
541{
542 struct net_device *dev = data;
543
544 int len = 0;
545 int i,n,page0;
546
547 int max=0xff;
548 page0 = 0x600;
549
550 /* This dump the current register page */
551 len += snprintf(page + len, count - len,
552 "\n####################page %x##################\n ", (page0>>8));
553 len += snprintf(page + len, count - len,
554 "\nD: OF > 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F");
555 for (n=0;n<=max;)
556 {
557 len += snprintf(page + len, count - len,
558 "\nD: %2x > ",n);
559 for (i=0;i<16 && n<=max;i++,n++)
560 len += snprintf(page + len, count - len,
561 "%2.2x ",read_nic_byte(dev,(page0|n)));
562 }
563 len += snprintf(page + len, count - len,"\n");
564 *eof = 1;
565 return len;
566
567}
568static int proc_get_registers_7(char *page, char **start,
569 off_t offset, int count,
570 int *eof, void *data)
571{
572 struct net_device *dev = data;
573
574 int len = 0;
575 int i,n,page0;
576
577 int max=0xff;
578 page0 = 0x700;
579
580 /* This dump the current register page */
581 len += snprintf(page + len, count - len,
582 "\n####################page %x##################\n ", (page0>>8));
583 len += snprintf(page + len, count - len,
584 "\nD: OF > 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F");
585 for (n=0;n<=max;)
586 {
587 len += snprintf(page + len, count - len,
588 "\nD: %2x > ",n);
589 for (i=0;i<16 && n<=max;i++,n++)
590 len += snprintf(page + len, count - len,
591 "%2.2x ",read_nic_byte(dev,(page0|n)));
592 }
593 len += snprintf(page + len, count - len,"\n");
594 *eof = 1;
595 return len;
596
597}
598static int proc_get_registers_8(char *page, char **start,
599 off_t offset, int count,
600 int *eof, void *data)
601{
602 struct net_device *dev = data;
603
604 int len = 0;
605 int i,n,page0;
606
607 int max=0xff;
608 page0 = 0x800;
609
610 /* This dump the current register page */
611 len += snprintf(page + len, count - len,
612 "\n####################page %x##################\n ", (page0>>8));
613 for (n=0;n<=max;)
614 {
615 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
616 for (i=0;i<4 && n<=max;n+=4,i++)
617 len += snprintf(page + len, count - len,
618 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
619 }
620 len += snprintf(page + len, count - len,"\n");
621 *eof = 1;
622 return len;
623
624}
625static int proc_get_registers_9(char *page, char **start,
626 off_t offset, int count,
627 int *eof, void *data)
628{
629 struct net_device *dev = data;
630
631 int len = 0;
632 int i,n,page0;
633
634 int max=0xff;
635 page0 = 0x900;
636
637 /* This dump the current register page */
638 len += snprintf(page + len, count - len,
639 "\n####################page %x##################\n ", (page0>>8));
640 for (n=0;n<=max;)
641 {
642 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
643 for (i=0;i<4 && n<=max;n+=4,i++)
644 len += snprintf(page + len, count - len,
645 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
646 }
647 len += snprintf(page + len, count - len,"\n");
648 *eof = 1;
649 return len;
650}
651static int proc_get_registers_a(char *page, char **start,
652 off_t offset, int count,
653 int *eof, void *data)
654{
655 struct net_device *dev = data;
656
657 int len = 0;
658 int i,n,page0;
659
660 int max=0xff;
661 page0 = 0xa00;
662
663 /* This dump the current register page */
664 len += snprintf(page + len, count - len,
665 "\n####################page %x##################\n ", (page0>>8));
666 for (n=0;n<=max;)
667 {
668 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
669 for (i=0;i<4 && n<=max;n+=4,i++)
670 len += snprintf(page + len, count - len,
671 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
672 }
673 len += snprintf(page + len, count - len,"\n");
674 *eof = 1;
675 return len;
676}
677static int proc_get_registers_b(char *page, char **start,
678 off_t offset, int count,
679 int *eof, void *data)
680{
681 struct net_device *dev = data;
682
683 int len = 0;
684 int i,n,page0;
685
686 int max=0xff;
687 page0 = 0xb00;
688
689 /* This dump the current register page */
690 len += snprintf(page + len, count - len,
691 "\n####################page %x##################\n ", (page0>>8));
692 for (n=0;n<=max;)
693 {
694 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
695 for (i=0;i<4 && n<=max;n+=4,i++)
696 len += snprintf(page + len, count - len,
697 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
698 }
699 len += snprintf(page + len, count - len,"\n");
700 *eof = 1;
701 return len;
702}
703static int proc_get_registers_c(char *page, char **start,
704 off_t offset, int count,
705 int *eof, void *data)
706{
707 struct net_device *dev = data;
708
709 int len = 0;
710 int i,n,page0;
711
712 int max=0xff;
713 page0 = 0xc00;
714
715 /* This dump the current register page */
716 len += snprintf(page + len, count - len,
717 "\n####################page %x##################\n ", (page0>>8));
718 for (n=0;n<=max;)
719 {
720 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
721 for (i=0;i<4 && n<=max;n+=4,i++)
722 len += snprintf(page + len, count - len,
723 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
724 }
725 len += snprintf(page + len, count - len,"\n");
726 *eof = 1;
727 return len;
728}
729static int proc_get_registers_d(char *page, char **start,
730 off_t offset, int count,
731 int *eof, void *data)
732{
733 struct net_device *dev = data;
734
735 int len = 0;
736 int i,n,page0;
737
738 int max=0xff;
739 page0 = 0xd00;
740
741 /* This dump the current register page */
742 len += snprintf(page + len, count - len,
743 "\n####################page %x##################\n ", (page0>>8));
744 for (n=0;n<=max;)
745 {
746 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
747 for (i=0;i<4 && n<=max;n+=4,i++)
748 len += snprintf(page + len, count - len,
749 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
750 }
751 len += snprintf(page + len, count - len,"\n");
752 *eof = 1;
753 return len;
754}
755static int proc_get_registers_e(char *page, char **start,
756 off_t offset, int count,
757 int *eof, void *data)
758{
759 struct net_device *dev = data;
760
761 int len = 0;
762 int i,n,page0;
763
764 int max=0xff;
765 page0 = 0xe00;
766
767 /* This dump the current register page */
768 len += snprintf(page + len, count - len,
769 "\n####################page %x##################\n ", (page0>>8));
770 for (n=0;n<=max;)
771 {
772 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
773 for (i=0;i<4 && n<=max;n+=4,i++)
774 len += snprintf(page + len, count - len,
775 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
776 }
777 len += snprintf(page + len, count - len,"\n");
778 *eof = 1;
779 return len;
780}
781
782static int proc_get_reg_rf_a(char *page, char **start,
783 off_t offset, int count,
784 int *eof, void *data)
785{
786 struct net_device *dev = data;
787
788 int len = 0;
789 int i,n;
790
791 int max=0xff;
792
793 /* This dump the current register page */
794 len += snprintf(page + len, count - len,
795 "\n#################### RF-A ##################\n ");
796 for (n=0;n<=max;)
797 {
798 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
799 for (i=0;i<4 && n<=max;n+=4,i++)
800 len += snprintf(page + len, count - len,
801 "%8.8x ",rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A,n, bMaskDWord));
802 }
803 len += snprintf(page + len, count - len,"\n");
804 *eof = 1;
805 return len;
806}
807
808static int proc_get_reg_rf_b(char *page, char **start,
809 off_t offset, int count,
810 int *eof, void *data)
811{
812 struct net_device *dev = data;
813
814 int len = 0;
815 int i,n;
816
817 int max=0xff;
818
819 /* This dump the current register page */
820 len += snprintf(page + len, count - len,
821 "\n#################### RF-B ##################\n ");
822 for (n=0;n<=max;)
823 {
824 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
825 for (i=0;i<4 && n<=max;n+=4,i++)
826 len += snprintf(page + len, count - len,
827 "%8.8x ",rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_B, n, bMaskDWord));
828 }
829 len += snprintf(page + len, count - len,"\n");
830 *eof = 1;
831 return len;
832}
833
834static int proc_get_reg_rf_c(char *page, char **start,
835 off_t offset, int count,
836 int *eof, void *data)
837{
838 struct net_device *dev = data;
839
840 int len = 0;
841 int i,n;
842
843 int max=0xff;
844
845 /* This dump the current register page */
846 len += snprintf(page + len, count - len,
847 "\n#################### RF-C ##################\n ");
848 for (n=0;n<=max;)
849 {
850 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
851 for (i=0;i<4 && n<=max;n+=4,i++)
852 len += snprintf(page + len, count - len,
853 "%8.8x ",rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_C, n, bMaskDWord));
854 }
855 len += snprintf(page + len, count - len,"\n");
856 *eof = 1;
857 return len;
858}
859
860static int proc_get_reg_rf_d(char *page, char **start,
861 off_t offset, int count,
862 int *eof, void *data)
863{
864 struct net_device *dev = data;
865
866 int len = 0;
867 int i,n;
868
869 int max=0xff;
870
871 /* This dump the current register page */
872 len += snprintf(page + len, count - len,
873 "\n#################### RF-D ##################\n ");
874 for (n=0;n<=max;)
875 {
876 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
877 for (i=0;i<4 && n<=max;n+=4,i++)
878 len += snprintf(page + len, count - len,
879 "%8.8x ",rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_D, n, bMaskDWord));
880 }
881 len += snprintf(page + len, count - len,"\n");
882 *eof = 1;
883 return len;
884}
885
886static int proc_get_cam_register_1(char *page, char **start,
887 off_t offset, int count,
888 int *eof, void *data)
889{
890 struct net_device *dev = data;
891 u32 target_command=0;
892 u32 target_content=0;
893 u8 entry_i=0;
894 u32 ulStatus;
895 int len = 0;
896 int i=100, j = 0;
897
898 /* This dump the current register page */
899 len += snprintf(page + len, count - len,
900 "\n#################### SECURITY CAM (0-10) ##################\n ");
901 for (j=0; j<11; j++)
902 {
903 len += snprintf(page + len, count - len, "\nD: %2x > ",j);
904 for (entry_i=0;entry_i<CAM_CONTENT_COUNT;entry_i++)
905 {
906 target_command= entry_i+CAM_CONTENT_COUNT*j;
907 target_command= target_command | BIT31;
908
909 while((i--)>=0)
910 {
911 ulStatus = read_nic_dword(dev, RWCAM);
912 if (ulStatus & BIT31){
913 continue;
914 }
915 else{
916 break;
917 }
918 }
919 write_nic_dword(dev, RWCAM, target_command);
920 target_content = read_nic_dword(dev, RCAMO);
921 len += snprintf(page + len, count - len,"%8.8x ",target_content);
922 }
923 }
924
925 len += snprintf(page + len, count - len,"\n");
926 *eof = 1;
927 return len;
928}
929
930static int proc_get_cam_register_2(char *page, char **start,
931 off_t offset, int count,
932 int *eof, void *data)
933{
934 struct net_device *dev = data;
935 u32 target_command=0;
936 u32 target_content=0;
937 u8 entry_i=0;
938 u32 ulStatus;
939 int len = 0;
940 int i=100, j = 0;
941
942 /* This dump the current register page */
943 len += snprintf(page + len, count - len,
944 "\n#################### SECURITY CAM (11-21) ##################\n ");
945 for (j=11; j<22; j++)
946 {
947 len += snprintf(page + len, count - len, "\nD: %2x > ",j);
948 for (entry_i=0;entry_i<CAM_CONTENT_COUNT;entry_i++)
949 {
950 target_command= entry_i+CAM_CONTENT_COUNT*j;
951 target_command= target_command | BIT31;
952
953 while((i--)>=0)
954 {
955 ulStatus = read_nic_dword(dev, RWCAM);
956 if (ulStatus & BIT31){
957 continue;
958 }
959 else{
960 break;
961 }
962 }
963 write_nic_dword(dev, RWCAM, target_command);
964 target_content = read_nic_dword(dev, RCAMO);
965 len += snprintf(page + len, count - len,"%8.8x ",target_content);
966 }
967 }
968
969 len += snprintf(page + len, count - len,"\n");
970 *eof = 1;
971 return len;
972}
973
974static int proc_get_cam_register_3(char *page, char **start,
975 off_t offset, int count,
976 int *eof, void *data)
977{
978 struct net_device *dev = data;
979 u32 target_command=0;
980 u32 target_content=0;
981 u8 entry_i=0;
982 u32 ulStatus;
983 int len = 0;
984 int i=100, j = 0;
985
986 /* This dump the current register page */
987 len += snprintf(page + len, count - len,
988 "\n#################### SECURITY CAM (22-31) ##################\n ");
989 for (j=22; j<TOTAL_CAM_ENTRY; j++)
990 {
991 len += snprintf(page + len, count - len, "\nD: %2x > ",j);
992 for (entry_i=0;entry_i<CAM_CONTENT_COUNT;entry_i++)
993 {
994 target_command= entry_i+CAM_CONTENT_COUNT*j;
995 target_command= target_command | BIT31;
996
997 while((i--)>=0)
998 {
999 ulStatus = read_nic_dword(dev, RWCAM);
1000 if (ulStatus & BIT31){
1001 continue;
1002 }
1003 else{
1004 break;
1005 }
1006 }
1007 write_nic_dword(dev, RWCAM, target_command);
1008 target_content = read_nic_dword(dev, RCAMO);
1009 len += snprintf(page + len, count - len,"%8.8x ",target_content);
1010 }
1011 }
1012
1013 len += snprintf(page + len, count - len,"\n");
1014 *eof = 1;
1015 return len;
1016}
1017static int proc_get_stats_tx(char *page, char **start,
1018 off_t offset, int count,
1019 int *eof, void *data)
1020{
1021 struct net_device *dev = data;
1022 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
1023
1024 int len = 0;
1025
1026 len += snprintf(page + len, count - len,
1027 "TX VI priority ok int: %lu\n"
1028 "TX VO priority ok int: %lu\n"
1029 "TX BE priority ok int: %lu\n"
1030 "TX BK priority ok int: %lu\n"
1031 "TX MANAGE priority ok int: %lu\n"
1032 "TX BEACON priority ok int: %lu\n"
1033 "TX BEACON priority error int: %lu\n"
1034 "TX CMDPKT priority ok int: %lu\n"
1035 "TX queue stopped?: %d\n"
1036 "TX fifo overflow: %lu\n"
1037 "TX total data packets %lu\n"
1038 "TX total data bytes :%lu\n",
1039 priv->stats.txviokint,
1040 priv->stats.txvookint,
1041 priv->stats.txbeokint,
1042 priv->stats.txbkokint,
1043 priv->stats.txmanageokint,
1044 priv->stats.txbeaconokint,
1045 priv->stats.txbeaconerr,
1046 priv->stats.txcmdpktokint,
1047 netif_queue_stopped(dev),
1048 priv->stats.txoverflow,
1049 priv->rtllib->stats.tx_packets,
1050 priv->rtllib->stats.tx_bytes
1051
1052
1053 );
1054
1055 *eof = 1;
1056 return len;
1057}
1058
1059
1060
1061static int proc_get_stats_rx(char *page, char **start,
1062 off_t offset, int count,
1063 int *eof, void *data)
1064{
1065 struct net_device *dev = data;
1066 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
1067
1068 int len = 0;
1069
1070 len += snprintf(page + len, count - len,
1071 "RX packets: %lu\n"
1072 "RX data crc err: %lu\n"
1073 "RX mgmt crc err: %lu\n"
1074 "RX desc err: %lu\n"
1075 "RX rx overflow error: %lu\n",
1076 priv->stats.rxint,
1077 priv->stats.rxdatacrcerr,
1078 priv->stats.rxmgmtcrcerr,
1079 priv->stats.rxrdu,
1080 priv->stats.rxoverflow);
1081
1082 *eof = 1;
1083 return len;
1084}
1085
1086void rtl8192_proc_module_init(void)
1087{
1088 RT_TRACE(COMP_INIT, "Initializing proc filesystem");
1089#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
1090 rtl8192_proc=create_proc_entry(DRV_NAME, S_IFDIR, proc_net);
1091#else
1092 rtl8192_proc=create_proc_entry(DRV_NAME, S_IFDIR, init_net.proc_net);
1093#endif
1094}
1095
1096
1097void rtl8192_proc_module_remove(void)
1098{
1099#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
1100 remove_proc_entry(DRV_NAME, proc_net);
1101#else
1102 remove_proc_entry(DRV_NAME, init_net.proc_net);
1103#endif
1104}
1105
1106
1107void rtl8192_proc_remove_one(struct net_device *dev)
1108{
1109 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
1110
1111 printk("dev name %s\n",dev->name);
1112
1113 if (priv->dir_dev) {
1114 remove_proc_entry("stats-tx", priv->dir_dev);
1115 remove_proc_entry("stats-rx", priv->dir_dev);
1116 remove_proc_entry("stats-ap", priv->dir_dev);
1117 remove_proc_entry("registers-0", priv->dir_dev);
1118 remove_proc_entry("registers-1", priv->dir_dev);
1119 remove_proc_entry("registers-2", priv->dir_dev);
1120 remove_proc_entry("registers-3", priv->dir_dev);
1121 remove_proc_entry("registers-4", priv->dir_dev);
1122 remove_proc_entry("registers-5", priv->dir_dev);
1123 remove_proc_entry("registers-6", priv->dir_dev);
1124 remove_proc_entry("registers-7", priv->dir_dev);
1125 remove_proc_entry("registers-8", priv->dir_dev);
1126 remove_proc_entry("registers-9", priv->dir_dev);
1127 remove_proc_entry("registers-a", priv->dir_dev);
1128 remove_proc_entry("registers-b", priv->dir_dev);
1129 remove_proc_entry("registers-c", priv->dir_dev);
1130 remove_proc_entry("registers-d", priv->dir_dev);
1131 remove_proc_entry("registers-e", priv->dir_dev);
1132 remove_proc_entry("RF-A", priv->dir_dev);
1133 remove_proc_entry("RF-B", priv->dir_dev);
1134 remove_proc_entry("RF-C", priv->dir_dev);
1135 remove_proc_entry("RF-D", priv->dir_dev);
1136 remove_proc_entry("SEC-CAM-1", priv->dir_dev);
1137 remove_proc_entry("SEC-CAM-2", priv->dir_dev);
1138 remove_proc_entry("SEC-CAM-3", priv->dir_dev);
1139 remove_proc_entry("wlan0", rtl8192_proc);
1140 priv->dir_dev = NULL;
1141 }
1142}
1143
1144
1145void rtl8192_proc_init_one(struct net_device *dev)
1146{
1147 struct proc_dir_entry *e;
1148 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
1149 priv->dir_dev = create_proc_entry(dev->name,
1150 S_IFDIR | S_IRUGO | S_IXUGO,
1151 rtl8192_proc);
1152 if (!priv->dir_dev) {
1153 RT_TRACE(COMP_ERR, "Unable to initialize /proc/net/rtl8192/%s\n",
1154 dev->name);
1155 return;
1156 }
1157 e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
1158 priv->dir_dev, proc_get_stats_rx, dev);
1159
1160 if (!e) {
1161 RT_TRACE(COMP_ERR,"Unable to initialize "
1162 "/proc/net/rtl8192/%s/stats-rx\n",
1163 dev->name);
1164 }
1165
1166
1167 e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
1168 priv->dir_dev, proc_get_stats_tx, dev);
1169
1170 if (!e) {
1171 RT_TRACE(COMP_ERR, "Unable to initialize "
1172 "/proc/net/rtl8192/%s/stats-tx\n",
1173 dev->name);
1174 }
1175
1176 e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO,
1177 priv->dir_dev, proc_get_stats_ap, dev);
1178
1179 if (!e) {
1180 RT_TRACE(COMP_ERR, "Unable to initialize "
1181 "/proc/net/rtl8192/%s/stats-ap\n",
1182 dev->name);
1183 }
1184
1185 e = create_proc_read_entry("registers-0", S_IFREG | S_IRUGO,
1186 priv->dir_dev, proc_get_registers_0, dev);
1187 if (!e) {
1188 RT_TRACE(COMP_ERR, "Unable to initialize "
1189 "/proc/net/rtl8192/%s/registers-0\n",
1190 dev->name);
1191 }
1192 e = create_proc_read_entry("registers-1", S_IFREG | S_IRUGO,
1193 priv->dir_dev, proc_get_registers_1, dev);
1194 if (!e) {
1195 RT_TRACE(COMP_ERR, "Unable to initialize "
1196 "/proc/net/rtl8192/%s/registers-1\n",
1197 dev->name);
1198 }
1199 e = create_proc_read_entry("registers-2", S_IFREG | S_IRUGO,
1200 priv->dir_dev, proc_get_registers_2, dev);
1201 if (!e) {
1202 RT_TRACE(COMP_ERR, "Unable to initialize "
1203 "/proc/net/rtl8192/%s/registers-2\n",
1204 dev->name);
1205 }
1206 e = create_proc_read_entry("registers-3", S_IFREG | S_IRUGO,
1207 priv->dir_dev, proc_get_registers_3, dev);
1208 if (!e) {
1209 RT_TRACE(COMP_ERR, "Unable to initialize "
1210 "/proc/net/rtl8192/%s/registers-3\n",
1211 dev->name);
1212 }
1213 e = create_proc_read_entry("registers-4", S_IFREG | S_IRUGO,
1214 priv->dir_dev, proc_get_registers_4, dev);
1215 if (!e) {
1216 RT_TRACE(COMP_ERR, "Unable to initialize "
1217 "/proc/net/rtl8192/%s/registers-4\n",
1218 dev->name);
1219 }
1220 e = create_proc_read_entry("registers-5", S_IFREG | S_IRUGO,
1221 priv->dir_dev, proc_get_registers_5, dev);
1222 if (!e) {
1223 RT_TRACE(COMP_ERR, "Unable to initialize "
1224 "/proc/net/rtl8192/%s/registers-5\n",
1225 dev->name);
1226 }
1227 e = create_proc_read_entry("registers-6", S_IFREG | S_IRUGO,
1228 priv->dir_dev, proc_get_registers_6, dev);
1229 if (!e) {
1230 RT_TRACE(COMP_ERR, "Unable to initialize "
1231 "/proc/net/rtl8192/%s/registers-6\n",
1232 dev->name);
1233 }
1234 e = create_proc_read_entry("registers-7", S_IFREG | S_IRUGO,
1235 priv->dir_dev, proc_get_registers_7, dev);
1236 if (!e) {
1237 RT_TRACE(COMP_ERR, "Unable to initialize "
1238 "/proc/net/rtl8192/%s/registers-7\n",
1239 dev->name);
1240 }
1241 e = create_proc_read_entry("registers-8", S_IFREG | S_IRUGO,
1242 priv->dir_dev, proc_get_registers_8, dev);
1243 if (!e) {
1244 RT_TRACE(COMP_ERR, "Unable to initialize "
1245 "/proc/net/rtl8192/%s/registers-8\n",
1246 dev->name);
1247 }
1248 e = create_proc_read_entry("registers-9", S_IFREG | S_IRUGO,
1249 priv->dir_dev, proc_get_registers_9, dev);
1250 if (!e) {
1251 RT_TRACE(COMP_ERR, "Unable to initialize "
1252 "/proc/net/rtl8192/%s/registers-9\n",
1253 dev->name);
1254 }
1255 e = create_proc_read_entry("registers-a", S_IFREG | S_IRUGO,
1256 priv->dir_dev, proc_get_registers_a, dev);
1257 if (!e) {
1258 RT_TRACE(COMP_ERR, "Unable to initialize "
1259 "/proc/net/rtl8192/%s/registers-a\n",
1260 dev->name);
1261 }
1262 e = create_proc_read_entry("registers-b", S_IFREG | S_IRUGO,
1263 priv->dir_dev, proc_get_registers_b, dev);
1264 if (!e) {
1265 RT_TRACE(COMP_ERR, "Unable to initialize "
1266 "/proc/net/rtl8192/%s/registers-b\n",
1267 dev->name);
1268 }
1269 e = create_proc_read_entry("registers-c", S_IFREG | S_IRUGO,
1270 priv->dir_dev, proc_get_registers_c, dev);
1271 if (!e) {
1272 RT_TRACE(COMP_ERR, "Unable to initialize "
1273 "/proc/net/rtl8192/%s/registers-c\n",
1274 dev->name);
1275 }
1276 e = create_proc_read_entry("registers-d", S_IFREG | S_IRUGO,
1277 priv->dir_dev, proc_get_registers_d, dev);
1278 if (!e) {
1279 RT_TRACE(COMP_ERR, "Unable to initialize "
1280 "/proc/net/rtl8192/%s/registers-d\n",
1281 dev->name);
1282 }
1283 e = create_proc_read_entry("registers-e", S_IFREG | S_IRUGO,
1284 priv->dir_dev, proc_get_registers_e, dev);
1285 if (!e) {
1286 RT_TRACE(COMP_ERR, "Unable to initialize "
1287 "/proc/net/rtl8192/%s/registers-e\n",
1288 dev->name);
1289 }
1290 e = create_proc_read_entry("RF-A", S_IFREG | S_IRUGO,
1291 priv->dir_dev, proc_get_reg_rf_a, dev);
1292 if (!e) {
1293 RT_TRACE(COMP_ERR, "Unable to initialize "
1294 "/proc/net/rtl8192/%s/RF-A\n",
1295 dev->name);
1296 }
1297 e = create_proc_read_entry("RF-B", S_IFREG | S_IRUGO,
1298 priv->dir_dev, proc_get_reg_rf_b, dev);
1299 if (!e) {
1300 RT_TRACE(COMP_ERR, "Unable to initialize "
1301 "/proc/net/rtl8192/%s/RF-B\n",
1302 dev->name);
1303 }
1304 e = create_proc_read_entry("RF-C", S_IFREG | S_IRUGO,
1305 priv->dir_dev, proc_get_reg_rf_c, dev);
1306 if (!e) {
1307 RT_TRACE(COMP_ERR, "Unable to initialize "
1308 "/proc/net/rtl8192/%s/RF-C\n",
1309 dev->name);
1310 }
1311 e = create_proc_read_entry("RF-D", S_IFREG | S_IRUGO,
1312 priv->dir_dev, proc_get_reg_rf_d, dev);
1313 if (!e) {
1314 RT_TRACE(COMP_ERR, "Unable to initialize "
1315 "/proc/net/rtl8192/%s/RF-D\n",
1316 dev->name);
1317 }
1318 e = create_proc_read_entry("SEC-CAM-1", S_IFREG | S_IRUGO,
1319 priv->dir_dev, proc_get_cam_register_1, dev);
1320 if (!e) {
1321 RT_TRACE(COMP_ERR, "Unable to initialize "
1322 "/proc/net/rtl8192/%s/SEC-CAM-1\n",
1323 dev->name);
1324 }
1325 e = create_proc_read_entry("SEC-CAM-2", S_IFREG | S_IRUGO,
1326 priv->dir_dev, proc_get_cam_register_2, dev);
1327 if (!e) {
1328 RT_TRACE(COMP_ERR, "Unable to initialize "
1329 "/proc/net/rtl8192/%s/SEC-CAM-2\n",
1330 dev->name);
1331 }
1332 e = create_proc_read_entry("SEC-CAM-3", S_IFREG | S_IRUGO,
1333 priv->dir_dev, proc_get_cam_register_3, dev);
1334 if (!e) {
1335 RT_TRACE(COMP_ERR, "Unable to initialize "
1336 "/proc/net/rtl8192/%s/SEC-CAM-3\n",
1337 dev->name);
1338 }
1339}
diff --git a/drivers/staging/rtl8192e/rtl_debug.h b/drivers/staging/rtl8192e/rtl_debug.h
new file mode 100644
index 00000000000..5ae7c7d07de
--- /dev/null
+++ b/drivers/staging/rtl8192e/rtl_debug.h
@@ -0,0 +1,319 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * Based on the r8180 driver, which is:
5 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 *
19 * The full GNU General Public License is included in this distribution in the
20 * file called LICENSE.
21 *
22 * Contact Information:
23 * wlanfae <wlanfae@realtek.com>
24******************************************************************************/
25#ifndef _RTL_DEBUG_H
26#define _RTL_DEBUG_H
27#include <linux/kernel.h>
28#include <linux/module.h>
29#include <linux/version.h>
30#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,9))
31#include <linux/debugfs.h>
32#endif
33
34struct r8192_priv;
35struct _tx_desc_8192se;
36struct _TX_DESC_8192CE;
37struct net_device;
38
39#define DBG_LOUD 4
40
41#define RT_ASSERT(_Exp,Fmt) \
42 if (!(_Exp)) \
43 { \
44 printk("Rtl819x: "); \
45 printk Fmt; \
46 }
47
48typedef enum tag_DBGP_Flag_Type_Definition
49{
50 FQoS = 0,
51 FTX = 1,
52 FRX = 2,
53 FSEC = 3,
54 FMGNT = 4,
55 FMLME = 5,
56 FRESOURCE = 6,
57 FBEACON = 7,
58 FISR = 8,
59 FPHY = 9,
60 FMP = 10,
61 FEEPROM = 11,
62 FPWR = 12,
63 FDM = 13,
64 FDBGCtrl = 14,
65 FC2H = 15,
66 FBT = 16,
67 FINIT = 17,
68 FIOCTL = 18,
69 DBGP_TYPE_MAX
70}DBGP_FLAG_E;
71
72#define QoS_INIT BIT0
73#define QoS_VISTA BIT1
74
75#define TX_DESC BIT0
76#define TX_DESC_TID BIT1
77
78#define RX_DATA BIT0
79#define RX_PHY_STS BIT1
80#define RX_PHY_SS BIT2
81#define RX_PHY_SQ BIT3
82#define RX_PHY_ASTS BIT4
83#define RX_ERR_LEN BIT5
84#define RX_DEFRAG BIT6
85#define RX_ERR_RATE BIT7
86
87
88
89#define MEDIA_STS BIT0
90#define LINK_STS BIT1
91
92#define OS_CHK BIT0
93
94#define BCN_SHOW BIT0
95#define BCN_PEER BIT1
96
97#define ISR_CHK BIT0
98
99#define PHY_BBR BIT0
100#define PHY_BBW BIT1
101#define PHY_RFR BIT2
102#define PHY_RFW BIT3
103#define PHY_MACR BIT4
104#define PHY_MACW BIT5
105#define PHY_ALLR BIT6
106#define PHY_ALLW BIT7
107#define PHY_TXPWR BIT8
108#define PHY_PWRDIFF BIT9
109
110#define MP_RX BIT0
111#define MP_SWICH_CH BIT1
112
113#define EEPROM_W BIT0
114#define EFUSE_PG BIT1
115#define EFUSE_READ_ALL BIT2
116
117#define LPS BIT0
118#define IPS BIT1
119#define PWRSW BIT2
120#define PWRHW BIT3
121#define PWRHAL BIT4
122
123#define WA_IOT BIT0
124#define DM_PWDB BIT1
125#define DM_Monitor BIT2
126#define DM_DIG BIT3
127#define DM_EDCA_Turbo BIT4
128
129#define DbgCtrl_Trace BIT0
130#define DbgCtrl_InbandNoise BIT1
131
132#define BT_TRACE BIT0
133#define BT_RFPoll BIT1
134
135#define C2H_Summary BIT0
136#define C2H_PacketData BIT1
137#define C2H_ContentData BIT2
138#define BT_TRACE BIT0
139#define BT_RFPoll BIT1
140
141#define INIT_EEPROM BIT0
142#define INIT_TxPower BIT1
143#define INIT_IQK BIT2
144#define INIT_RF BIT3
145
146#define IOCTL_TRACE BIT0
147#define IOCTL_BT_EVENT BIT1
148#define IOCTL_BT_EVENT_DETAIL BIT2
149#define IOCTL_BT_TX_ACLDATA BIT3
150#define IOCTL_BT_TX_ACLDATA_DETAIL BIT4
151#define IOCTL_BT_RX_ACLDATA BIT5
152#define IOCTL_BT_RX_ACLDATA_DETAIL BIT6
153#define IOCTL_BT_HCICMD BIT7
154#define IOCTL_BT_HCICMD_DETAIL BIT8
155#define IOCTL_IRP BIT9
156#define IOCTL_IRP_DETAIL BIT10
157#define IOCTL_CALLBACK_FUN BIT11
158#define IOCTL_STATE BIT12
159#define IOCTL_BT_TP BIT13
160#define IOCTL_BT_LOGO BIT14
161
162/* 2007/07/13 MH ------For DeBuG Print modeue------*/
163/*------------------------------Define structure----------------------------*/
164
165
166/*------------------------Export Marco Definition---------------------------*/
167#define DEBUG_PRINT 1
168
169#if (DEBUG_PRINT == 1)
170#define RTPRINT(dbgtype, dbgflag, printstr) \
171{ \
172 if (DBGP_Type[dbgtype] & dbgflag)\
173 { \
174 printk printstr; \
175 } \
176}
177
178#define RTPRINT_ADDR(dbgtype, dbgflag, printstr, _Ptr)\
179{\
180 if (DBGP_Type[dbgtype] & dbgflag)\
181 {\
182 int __i; \
183 u8* ptr = (u8*)_Ptr; \
184 printk printstr; \
185 printk(" "); \
186 for ( __i=0; __i<6; __i++ ) \
187 printk("%02X%s", ptr[__i], (__i==5)?"":"-"); \
188 printk("\n"); \
189 }\
190}
191
192#define RTPRINT_DATA(dbgtype, dbgflag, _TitleString, _HexData, _HexDataLen)\
193{\
194 if (DBGP_Type[dbgtype] & dbgflag)\
195 {\
196 int __i; \
197 u8* ptr = (u8*)_HexData; \
198 printk(_TitleString); \
199 for ( __i=0; __i<(int)_HexDataLen; __i++ ) \
200 { \
201 printk("%02X%s", ptr[__i], (((__i + 1) % 4) == 0)?" ":" ");\
202 if (((__i + 1) % 16) == 0) printk("\n");\
203 } \
204 printk("\n"); \
205 }\
206}
207#else
208#define RTPRINT(dbgtype, dbgflag, printstr)
209#define RTPRINT_ADDR(dbgtype, dbgflag, printstr, _Ptr)
210#define RTPRINT_DATA(dbgtype, dbgflag, _TitleString, _HexData, _HexDataLen)
211#endif
212
213extern u32 DBGP_Type[DBGP_TYPE_MAX];
214
215#define RT_PRINT_DATA(_Comp, _Level, _TitleString, _HexData, _HexDataLen) \
216do {\
217 if (((_Comp) & rt_global_debug_component ) && (_Level <= rt_global_debug_component )) \
218 { \
219 int __i; \
220 u8* ptr = (u8*)_HexData; \
221 printk("Rtl819x: "); \
222 printk(_TitleString); \
223 for ( __i=0; __i<(int)_HexDataLen; __i++ ) \
224 { \
225 printk("%02X%s", ptr[__i], (((__i + 1) % 4) == 0)?" ":" "); \
226 if (((__i + 1) % 16) == 0) printk("\n"); \
227 } \
228 printk("\n"); \
229 } \
230}while(0);
231
232#define DMESG(x,a...)
233#define DMESGW(x,a...)
234#define DMESGE(x,a...)
235extern u32 rt_global_debug_component;
236#define RT_TRACE(component, x, args...) \
237do { if (rt_global_debug_component & component) \
238 printk(KERN_DEBUG DRV_NAME ":" x "\n" , \
239 ##args);\
240}while(0);
241
242#define RTL819x_DEBUG
243#ifdef RTL819x_DEBUG
244#define assert(expr) \
245 if (!(expr)) { \
246 printk( "Assertion failed! %s,%s,%s,line=%d\n", \
247 #expr,__FILE__,__func__,__LINE__); \
248 }
249#define RT_DEBUG_DATA(level, data, datalen) \
250 do{ if ((rt_global_debug_component & (level)) == (level)) \
251 { \
252 int _i; \
253 u8* _pdata = (u8*) data; \
254 printk(KERN_DEBUG DRV_NAME ": %s()\n", __func__); \
255 for (_i=0; _i<(int)(datalen); _i++) \
256 { \
257 printk("%2x ", _pdata[_i]); \
258 if ((_i+1)%16 == 0) printk("\n"); \
259 } \
260 printk("\n"); \
261 } \
262 } while (0)
263#else
264#define assert(expr) do {} while (0)
265#define RT_DEBUG_DATA(level, data, datalen) do {} while(0)
266#endif
267
268typedef struct _rtl_fs_debug
269{
270 const char *name;
271 struct dentry *dir_drv;
272 struct dentry *debug_register;
273 u32 hw_type;
274 u32 hw_offset;
275#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,20))
276 bool hw_holding;
277#else
278 u8 hw_holding;
279#endif
280} rtl_fs_debug;
281
282void print_buffer(u32 *buffer, int len);
283void dump_eprom(struct net_device *dev);
284void rtl8192_dump_reg(struct net_device *dev);
285
286#ifdef RTL8192SE
287void rtl8192se_dump_tx_desc(struct _tx_desc_8192se *pDesc);
288#endif
289#ifdef RTL8192CE
290void rtl8192ce_dump_tx_desc(struct _TX_DESC_8192CE *pDesc);
291#endif
292
293/* debugfs stuff */
294#ifdef CONFIG_RTLWIFI_DEBUGFS
295int rtl_debug_module_init(struct r8192_priv *priv, const char *name);
296void rtl_debug_module_remove(struct r8192_priv *priv);
297int rtl_create_debugfs_root(void);
298void rtl_remove_debugfs_root(void);
299#else
300static inline int rtl_debug_module_init(struct r8192_priv *priv, const char *name) {
301 return 0;
302}
303static inline void rtl_debug_module_remove(struct r8192_priv *priv) {
304
305}
306static inline int rtl_create_debugfs_root(void) {
307 return 0;
308}
309static inline void rtl_remove_debugfs_root(void) {
310}
311#endif
312
313/* proc stuff */
314void rtl8192_proc_init_one(struct net_device *dev);
315void rtl8192_proc_remove_one(struct net_device *dev);
316void rtl8192_proc_module_init(void);
317void rtl8192_proc_module_remove(void);
318void rtl8192_dbgp_flag_init(struct net_device *dev);
319#endif
diff --git a/drivers/staging/rtl8192e/rtl_dm.c b/drivers/staging/rtl8192e/rtl_dm.c
new file mode 100644
index 00000000000..5ea11c520c0
--- /dev/null
+++ b/drivers/staging/rtl8192e/rtl_dm.c
@@ -0,0 +1,4854 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/
19#include "rtl_core.h"
20#include "rtl_dm.h"
21#include "r8192E_hw.h"
22#include "r8192E_phy.h"
23#include "r8192E_phyreg.h"
24#include "r8190P_rtl8256.h"
25#include "r8192E_cmdpkt.h"
26
27/*---------------------------Define Local Constant---------------------------*/
28#ifdef RTL8190P
29static u32 edca_setting_DL[HT_IOT_PEER_MAX] =
30{ 0x5e4322,
31 0x5e4322,
32 0x5ea44f,
33 0x5e4322,
34 0x604322,
35 0xa44f,
36 0x5e4322,
37 0x5e4322
38 };
39
40static u32 edca_setting_DL_GMode[HT_IOT_PEER_MAX] =
41{ 0x5e4322,
42 0x5e4322,
43 0x5e4322,
44 0x5e4322,
45 0x604322,
46 0xa44f,
47 0x5e4322,
48 0x5e4322
49};
50
51static u32 edca_setting_UL[HT_IOT_PEER_MAX] =
52{ 0x5e4322,
53 0xa44f,
54 0x5ea44f,
55 0x5e4322,
56 0x604322,
57 0x5e4322,
58 0x5e4322,
59 0x5e4322
60};
61
62#elif defined RTL8192E
63static u32 edca_setting_DL[HT_IOT_PEER_MAX] =
64{ 0x5e4322,
65 0x5e4322,
66 0x5ea44f,
67 0x5e4322,
68 0x604322,
69 0xa44f,
70 0x5e4322,
71 0x5e4332
72 };
73
74static u32 edca_setting_DL_GMode[HT_IOT_PEER_MAX] =
75{ 0x5e4322,
76 0x5e4322,
77 0x5e4322,
78 0x5e4322,
79 0x604322,
80 0xa44f,
81 0x5e4322,
82 0x5e4322
83};
84
85static u32 edca_setting_UL[HT_IOT_PEER_MAX] =
86{ 0x5e4322,
87 0xa44f,
88 0x5ea44f,
89 0x5e4322,
90 0x604322,
91 0x5e4322,
92 0x5e4322,
93 0x5e4332
94};
95
96#elif defined(RTL8192SE)
97static u32 edca_setting_DL[HT_IOT_PEER_MAX] =
98{ 0xa44f,
99 0x5ea44f,
100 0x5ea44f,
101 0xa630,
102 0xa44f,
103 0xa630,
104 0xa630,
105 0xa42b,
106 0x5e4322,
107 0x5e4322
108 };
109
110static u32 edca_setting_DL_GMode[HT_IOT_PEER_MAX] =
111
112{ 0x4322,
113 0xa44f,
114 0x5ea44f,
115 0xa42b,
116 0x5e4322,
117 0x4322,
118 0xa430,
119 0x5ea44f,
120 0x5e4322,
121 0x5e4322
122};
123
124static u32 edca_setting_UL[HT_IOT_PEER_MAX] =
125{ 0x5e4322,
126 0xa44f,
127 0x5ea44f,
128 0x5ea322,
129 0x5ea422,
130 0x5ea322,
131 0x3ea44f,
132 0x5ea44f,
133 0x5e4322,
134 0x5e4322
135 };
136#endif
137
138#define RTK_UL_EDCA 0xa44f
139#define RTK_DL_EDCA 0x5e4322
140/*---------------------------Define Local Constant---------------------------*/
141
142
143/*------------------------Define global variable-----------------------------*/
144dig_t dm_digtable;
145u8 dm_shadow[16][256] = {{0}};
146DRxPathSel DM_RxPathSelTable;
147/*------------------------Define global variable-----------------------------*/
148
149
150/*------------------------Define local variable------------------------------*/
151/*------------------------Define local variable------------------------------*/
152
153
154/*--------------------Define export function prototype-----------------------*/
155extern void init_hal_dm(struct net_device *dev);
156extern void deinit_hal_dm(struct net_device *dev);
157
158extern void hal_dm_watchdog(struct net_device *dev);
159
160
161extern void init_rate_adaptive(struct net_device *dev);
162extern void dm_txpower_trackingcallback(void *data);
163
164extern void dm_restore_dynamic_mechanism_state(struct net_device *dev);
165extern void dm_backup_dynamic_mechanism_state(struct net_device *dev);
166extern void dm_change_dynamic_initgain_thresh(struct net_device *dev,
167 u32 dm_type,
168 u32 dm_value);
169extern void DM_ChangeFsyncSetting(struct net_device *dev,
170 s32 DM_Type,
171 s32 DM_Value);
172extern void dm_force_tx_fw_info(struct net_device *dev,
173 u32 force_type,
174 u32 force_value);
175extern void dm_init_edca_turbo(struct net_device *dev);
176extern void dm_rf_operation_test_callback(unsigned long data);
177extern void dm_rf_pathcheck_workitemcallback(void *data);
178extern void dm_fsync_timer_callback(unsigned long data);
179extern void dm_check_fsync(struct net_device *dev);
180extern void dm_shadow_init(struct net_device *dev);
181extern void dm_initialize_txpower_tracking(struct net_device *dev);
182
183#if (defined RTL8192E || defined RTL8192SE)
184extern void dm_CheckRfCtrlGPIO(void *data);
185#endif
186
187#ifdef RTL8192SE
188extern void DM_TXPowerTracking92SDirectCall(struct net_device *dev);
189static void dm_CtrlInitGainByTwoPort(struct net_device *dev);
190static void dm_CtrlInitGainBeforeConnectByRssiAndFalseAlarm(struct net_device *dev);
191static void dm_initial_gain_STABeforeConnect(struct net_device *dev);
192
193void dm_InitRateAdaptiveMask(struct net_device *dev);
194void Adhoc_InitRateAdaptive(struct net_device *dev,struct sta_info *pEntry);
195#endif
196
197/*--------------------Define export function prototype-----------------------*/
198
199
200/*---------------------Define local function prototype-----------------------*/
201static void dm_check_rate_adaptive(struct net_device *dev);
202
203static void dm_init_bandwidth_autoswitch (struct net_device *dev);
204static void dm_bandwidth_autoswitch ( struct net_device *dev);
205
206
207static void dm_check_txpower_tracking(struct net_device *dev);
208
209
210
211
212
213#if defined(RTL8192E)||defined(RTL8190P)
214static void dm_bb_initialgain_restore(struct net_device *dev);
215
216
217static void dm_bb_initialgain_backup(struct net_device *dev);
218#endif
219
220static void dm_dig_init(struct net_device *dev);
221static void dm_ctrl_initgain_byrssi(struct net_device *dev);
222static void dm_ctrl_initgain_byrssi_highpwr(struct net_device *dev);
223static void dm_ctrl_initgain_byrssi_by_driverrssi( struct net_device *dev);
224static void dm_ctrl_initgain_byrssi_by_fwfalse_alarm(struct net_device *dev);
225static void dm_initial_gain(struct net_device *dev);
226static void dm_pd_th(struct net_device *dev);
227static void dm_cs_ratio(struct net_device *dev);
228
229static void dm_init_ctstoself(struct net_device *dev);
230static void dm_Init_WA_Broadcom_IOT(struct net_device *dev);
231#ifdef RTL8192SE
232static void dm_WA_Broadcom_IOT(struct net_device *dev);
233#endif
234
235static void dm_check_edca_turbo(struct net_device *dev);
236
237#ifndef RTL8190P
238#endif
239static void dm_check_pbc_gpio(struct net_device *dev);
240
241
242static void dm_check_rx_path_selection(struct net_device *dev);
243static void dm_init_rxpath_selection(struct net_device *dev);
244static void dm_rxpath_sel_byrssi(struct net_device *dev);
245
246
247static void dm_init_fsync(struct net_device *dev);
248static void dm_deInit_fsync(struct net_device *dev);
249
250static void dm_check_txrateandretrycount(struct net_device *dev);
251static void dm_check_ac_dc_power(struct net_device *dev);
252
253/*---------------------Define local function prototype-----------------------*/
254
255static void dm_init_dynamic_txpower(struct net_device *dev);
256static void dm_dynamic_txpower(struct net_device *dev);
257
258
259static void dm_send_rssi_tofw(struct net_device *dev);
260static void dm_ctstoself(struct net_device *dev);
261#if defined RTL8192SE
262static void dm_RefreshRateAdaptiveMask(struct net_device *dev);
263#endif
264/*---------------------------Define function prototype------------------------*/
265
266extern void
267init_hal_dm(struct net_device *dev)
268{
269 struct r8192_priv *priv = rtllib_priv(dev);
270 priv->DM_Type = DM_Type_ByDriver;
271
272 priv->undecorated_smoothed_pwdb = -1;
273
274 dm_init_dynamic_txpower(dev);
275
276#ifdef RTL8192SE
277 if (IS_HARDWARE_TYPE_8192SE(dev))
278 dm_InitRateAdaptiveMask(dev);
279 else
280#endif
281 init_rate_adaptive(dev);
282
283 dm_dig_init(dev);
284 dm_init_edca_turbo(dev);
285 dm_init_bandwidth_autoswitch (dev);
286 dm_init_fsync(dev);
287 dm_init_rxpath_selection(dev);
288 dm_init_ctstoself(dev);
289 if (IS_HARDWARE_TYPE_8192SE(dev))
290 dm_Init_WA_Broadcom_IOT(dev);
291
292#if (defined RTL8192E || defined RTL8192SE)
293 INIT_DELAYED_WORK_RSL(&priv->gpio_change_rf_wq, (void *)dm_CheckRfCtrlGPIO,dev);
294#endif
295
296}
297
298extern void deinit_hal_dm(struct net_device *dev)
299{
300
301 dm_deInit_fsync(dev);
302
303}
304
305
306#ifdef USB_RX_AGGREGATION_SUPPORT
307void dm_CheckRxAggregation(struct net_device *dev) {
308 struct r8192_priv *priv = rtllib_priv((struct net_device *)dev);
309 PRT_HIGH_THROUGHPUT pHTInfo = priv->rtllib->pHTInfo;
310 static unsigned long lastTxOkCnt = 0;
311 static unsigned long lastRxOkCnt = 0;
312 unsigned long curTxOkCnt = 0;
313 unsigned long curRxOkCnt = 0;
314
315 curTxOkCnt = priv->stats.txbytesunicast - lastTxOkCnt;
316 curRxOkCnt = priv->stats.rxbytesunicast - lastRxOkCnt;
317
318 if ((curTxOkCnt + curRxOkCnt) < 15000000) {
319 return;
320 }
321
322 if (curTxOkCnt > 4*curRxOkCnt) {
323 if (priv->bCurrentRxAggrEnable) {
324 write_nic_dword(dev, 0x1a8, 0);
325 priv->bCurrentRxAggrEnable = false;
326 }
327 }else{
328 if (!priv->bCurrentRxAggrEnable && !pHTInfo->bCurrentRT2RTAggregation) {
329 u32 ulValue;
330 ulValue = (pHTInfo->UsbRxFwAggrEn<<24) | (pHTInfo->UsbRxFwAggrPageNum<<16) |
331 (pHTInfo->UsbRxFwAggrPacketNum<<8) | (pHTInfo->UsbRxFwAggrTimeout);
332 write_nic_dword(dev, 0x1a8, ulValue);
333 priv->bCurrentRxAggrEnable = true;
334 }
335 }
336
337 lastTxOkCnt = priv->stats.txbytesunicast;
338 lastRxOkCnt = priv->stats.rxbytesunicast;
339}
340#endif
341
342
343
344extern void hal_dm_watchdog(struct net_device *dev)
345{
346 struct r8192_priv *priv = rtllib_priv(dev);
347 if (priv->being_init_adapter)
348 return;
349
350 dm_check_ac_dc_power(dev);
351
352 dm_check_pbc_gpio(dev);
353 dm_check_txrateandretrycount(dev);
354 dm_check_edca_turbo(dev);
355
356 if (IS_HARDWARE_TYPE_8192SE(dev)){
357#ifdef RTL8192SE
358 dm_RefreshRateAdaptiveMask(dev);
359 dm_WA_Broadcom_IOT(dev);
360 return;
361#endif
362 }
363 dm_check_rate_adaptive(dev);
364 dm_dynamic_txpower(dev);
365 dm_check_txpower_tracking(dev);
366
367 dm_ctrl_initgain_byrssi(dev);
368 dm_bandwidth_autoswitch (dev);
369
370 dm_check_rx_path_selection(dev);
371 dm_check_fsync(dev);
372
373 dm_send_rssi_tofw(dev);
374 dm_ctstoself(dev);
375
376#ifdef USB_RX_AGGREGATION_SUPPORT
377 dm_CheckRxAggregation(dev);
378#endif
379}
380
381void dm_check_ac_dc_power(struct net_device *dev)
382{
383 struct r8192_priv *priv = rtllib_priv(dev);
384 static char *ac_dc_check_script_path = "/etc/acpi/wireless-rtl-ac-dc-power.sh";
385 char *argv[] = {ac_dc_check_script_path,DRV_NAME,NULL};
386 static char *envp[] = {"HOME=/",
387 "TERM=linux",
388 "PATH=/usr/bin:/bin",
389 NULL};
390
391 if (priv->ResetProgress == RESET_TYPE_SILENT)
392 {
393 RT_TRACE((COMP_INIT | COMP_POWER | COMP_RF), "GPIOChangeRFWorkItemCallBack(): Silent Reseting!!!!!!!\n");
394 return;
395 }
396
397 if (priv->rtllib->state != RTLLIB_LINKED) {
398 return;
399 }
400 call_usermodehelper(ac_dc_check_script_path,argv,envp,1);
401
402 return;
403};
404
405
406extern void init_rate_adaptive(struct net_device * dev)
407{
408
409 struct r8192_priv *priv = rtllib_priv(dev);
410 prate_adaptive pra = (prate_adaptive)&priv->rate_adaptive;
411
412 pra->ratr_state = DM_RATR_STA_MAX;
413 pra->high2low_rssi_thresh_for_ra = RateAdaptiveTH_High;
414 pra->low2high_rssi_thresh_for_ra20M = RateAdaptiveTH_Low_20M+5;
415 pra->low2high_rssi_thresh_for_ra40M = RateAdaptiveTH_Low_40M+5;
416
417 pra->high_rssi_thresh_for_ra = RateAdaptiveTH_High+5;
418 pra->low_rssi_thresh_for_ra20M = RateAdaptiveTH_Low_20M;
419 pra->low_rssi_thresh_for_ra40M = RateAdaptiveTH_Low_40M;
420
421 if (priv->CustomerID == RT_CID_819x_Netcore)
422 pra->ping_rssi_enable = 1;
423 else
424 pra->ping_rssi_enable = 0;
425 pra->ping_rssi_thresh_for_ra = 15;
426
427
428 if (priv->rf_type == RF_2T4R)
429 {
430 pra->upper_rssi_threshold_ratr = 0x8f0f0000;
431 pra->middle_rssi_threshold_ratr = 0x8f0ff000;
432 pra->low_rssi_threshold_ratr = 0x8f0ff001;
433 pra->low_rssi_threshold_ratr_40M = 0x8f0ff005;
434 pra->low_rssi_threshold_ratr_20M = 0x8f0ff001;
435 pra->ping_rssi_ratr = 0x0000000d;
436 }
437 else if (priv->rf_type == RF_1T2R)
438 {
439 pra->upper_rssi_threshold_ratr = 0x000fc000;
440 pra->middle_rssi_threshold_ratr = 0x000ff000;
441 pra->low_rssi_threshold_ratr = 0x000ff001;
442 pra->low_rssi_threshold_ratr_40M = 0x000ff005;
443 pra->low_rssi_threshold_ratr_20M = 0x000ff001;
444 pra->ping_rssi_ratr = 0x0000000d;
445 }
446
447}
448
449
450static void dm_check_rate_adaptive(struct net_device * dev)
451{
452 struct r8192_priv *priv = rtllib_priv(dev);
453 PRT_HIGH_THROUGHPUT pHTInfo = priv->rtllib->pHTInfo;
454 prate_adaptive pra = (prate_adaptive)&priv->rate_adaptive;
455 u32 currentRATR, targetRATR = 0;
456 u32 LowRSSIThreshForRA = 0, HighRSSIThreshForRA = 0;
457 bool bshort_gi_enabled = false;
458 static u8 ping_rssi_state=0;
459
460 if (IS_NIC_DOWN(priv)){
461 RT_TRACE(COMP_RATE, "<---- dm_check_rate_adaptive(): driver is going to unload\n");
462 return;
463 }
464
465 if (pra->rate_adaptive_disabled)
466 return;
467
468 if ( !(priv->rtllib->mode == WIRELESS_MODE_N_24G ||
469 priv->rtllib->mode == WIRELESS_MODE_N_5G))
470 return;
471
472 if ( priv->rtllib->state == RTLLIB_LINKED )
473 {
474
475 bshort_gi_enabled = (pHTInfo->bCurTxBW40MHz && pHTInfo->bCurShortGI40MHz) ||
476 (!pHTInfo->bCurTxBW40MHz && pHTInfo->bCurShortGI20MHz);
477
478
479 pra->upper_rssi_threshold_ratr =
480 (pra->upper_rssi_threshold_ratr & (~BIT31)) | ((bshort_gi_enabled)? BIT31:0) ;
481
482 pra->middle_rssi_threshold_ratr =
483 (pra->middle_rssi_threshold_ratr & (~BIT31)) | ((bshort_gi_enabled)? BIT31:0) ;
484
485 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
486 {
487 pra->low_rssi_threshold_ratr =
488 (pra->low_rssi_threshold_ratr_40M & (~BIT31)) | ((bshort_gi_enabled)? BIT31:0) ;
489 }
490 else
491 {
492 pra->low_rssi_threshold_ratr =
493 (pra->low_rssi_threshold_ratr_20M & (~BIT31)) | ((bshort_gi_enabled)? BIT31:0) ;
494 }
495 pra->ping_rssi_ratr =
496 (pra->ping_rssi_ratr & (~BIT31)) | ((bshort_gi_enabled)? BIT31:0) ;
497
498 if (pra->ratr_state == DM_RATR_STA_HIGH)
499 {
500 HighRSSIThreshForRA = pra->high2low_rssi_thresh_for_ra;
501 LowRSSIThreshForRA = (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)?
502 (pra->low_rssi_thresh_for_ra40M):(pra->low_rssi_thresh_for_ra20M);
503 }
504 else if (pra->ratr_state == DM_RATR_STA_LOW)
505 {
506 HighRSSIThreshForRA = pra->high_rssi_thresh_for_ra;
507 LowRSSIThreshForRA = (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)?
508 (pra->low2high_rssi_thresh_for_ra40M):(pra->low2high_rssi_thresh_for_ra20M);
509 }
510 else
511 {
512 HighRSSIThreshForRA = pra->high_rssi_thresh_for_ra;
513 LowRSSIThreshForRA = (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)?
514 (pra->low_rssi_thresh_for_ra40M):(pra->low_rssi_thresh_for_ra20M);
515 }
516
517 if (priv->undecorated_smoothed_pwdb >= (long)HighRSSIThreshForRA)
518 {
519 pra->ratr_state = DM_RATR_STA_HIGH;
520 targetRATR = pra->upper_rssi_threshold_ratr;
521 }else if (priv->undecorated_smoothed_pwdb >= (long)LowRSSIThreshForRA)
522 {
523 pra->ratr_state = DM_RATR_STA_MIDDLE;
524 targetRATR = pra->middle_rssi_threshold_ratr;
525 }else
526 {
527 pra->ratr_state = DM_RATR_STA_LOW;
528 targetRATR = pra->low_rssi_threshold_ratr;
529 }
530
531 if (pra->ping_rssi_enable)
532 {
533 if (priv->undecorated_smoothed_pwdb < (long)(pra->ping_rssi_thresh_for_ra+5))
534 {
535 if ( (priv->undecorated_smoothed_pwdb < (long)pra->ping_rssi_thresh_for_ra) ||
536 ping_rssi_state )
537 {
538 pra->ratr_state = DM_RATR_STA_LOW;
539 targetRATR = pra->ping_rssi_ratr;
540 ping_rssi_state = 1;
541 }
542 }
543 else
544 {
545 ping_rssi_state = 0;
546 }
547 }
548
549#if 1
550 if (priv->rtllib->GetHalfNmodeSupportByAPsHandler(dev))
551 targetRATR &= 0xf00fffff;
552#endif
553
554 currentRATR = read_nic_dword(dev, RATR0);
555 if ( targetRATR != currentRATR )
556 {
557 u32 ratr_value;
558 ratr_value = targetRATR;
559 RT_TRACE(COMP_RATE,"currentRATR = %x, targetRATR = %x\n", currentRATR, targetRATR);
560 if (priv->rf_type == RF_1T2R)
561 {
562 ratr_value &= ~(RATE_ALL_OFDM_2SS);
563 }
564 write_nic_dword(dev, RATR0, ratr_value);
565 write_nic_byte(dev, UFWP, 1);
566
567 pra->last_ratr = targetRATR;
568 }
569
570 }
571 else
572 {
573 pra->ratr_state = DM_RATR_STA_MAX;
574 }
575
576}
577
578static void dm_init_bandwidth_autoswitch (struct net_device * dev)
579{
580 struct r8192_priv *priv = rtllib_priv(dev);
581
582 priv->rtllib->bandwidth_auto_switch.threshold_20Mhzto40Mhz = BW_AUTO_SWITCH_LOW_HIGH;
583 priv->rtllib->bandwidth_auto_switch.threshold_40Mhzto20Mhz = BW_AUTO_SWITCH_HIGH_LOW;
584 priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz = false;
585 priv->rtllib->bandwidth_auto_switch.bautoswitch_enable = false;
586
587}
588
589
590static void dm_bandwidth_autoswitch (struct net_device * dev)
591{
592 struct r8192_priv *priv = rtllib_priv(dev);
593
594 if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20 ||!priv->rtllib->bandwidth_auto_switch.bautoswitch_enable){
595 return;
596 }else{
597 if (priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz == false){
598 if (priv->undecorated_smoothed_pwdb <= priv->rtllib->bandwidth_auto_switch.threshold_40Mhzto20Mhz)
599 priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz = true;
600 }else{
601 if (priv->undecorated_smoothed_pwdb >= priv->rtllib->bandwidth_auto_switch.threshold_20Mhzto40Mhz)
602 priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz = false;
603
604 }
605 }
606}
607
608#ifdef Rtl8192SE
609u32 OFDMSwingTable[OFDM_Table_Length] = {
610 0x7f8001fe,
611 0x788001e2,
612 0x71c001c7,
613 0x6b8001ae,
614 0x65400195,
615 0x5fc0017f,
616 0x5a400169,
617 0x55400155,
618 0x50800142,
619 0x4c000130,
620 0x47c0011f,
621 0x43c0010f,
622 0x40000100,
623 0x3c8000f2,
624 0x390000e4,
625 0x35c000d7,
626 0x32c000cb,
627 0x300000c0,
628 0x2d4000b5,
629 0x2ac000ab,
630 0x288000a2,
631 0x26000098,
632 0x24000090,
633 0x22000088,
634 0x20000080,
635 0x1e400079,
636 0x1c800072,
637 0x1b00006c,
638 0x19800066,
639 0x18000060,
640 0x16c0005b,
641 0x15800056,
642 0x14400051,
643 0x1300004c,
644 0x12000048,
645 0x11000044,
646 0x10000040,
647};
648
649u8 CCKSwingTable_Ch1_Ch13[CCK_Table_length][8] = {
650 {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},
651 {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04},
652 {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},
653 {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03},
654 {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},
655 {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03},
656 {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},
657 {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03},
658 {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},
659 {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02},
660 {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},
661 {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02},
662 {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},
663 {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02},
664 {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},
665 {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02},
666 {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},
667 {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02},
668 {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},
669 {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
670 {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
671 {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01},
672 {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01},
673 {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01},
674 {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01},
675 {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01},
676 {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01},
677 {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01},
678 {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01},
679 {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01},
680 {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01},
681 {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01},
682 {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}
683};
684
685
686u8 CCKSwingTable_Ch14[CCK_Table_length][8] = {
687 {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},
688 {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00},
689 {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},
690 {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00},
691 {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},
692 {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00},
693 {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},
694 {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00},
695 {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},
696 {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00},
697 {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},
698 {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00},
699 {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},
700 {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00},
701 {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},
702 {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00},
703 {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},
704 {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00},
705 {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},
706 {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
707 {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
708 {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00},
709 {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00},
710 {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},
711 {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},
712 {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00},
713 {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},
714 {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},
715 {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},
716 {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},
717 {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},
718 {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},
719 {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}
720};
721#elif defined RTL8192E
722static u32 OFDMSwingTable[OFDM_Table_Length] = {
723 0x7f8001fe,
724 0x71c001c7,
725 0x65400195,
726 0x5a400169,
727 0x50800142,
728 0x47c0011f,
729 0x40000100,
730 0x390000e4,
731 0x32c000cb,
732 0x2d4000b5,
733 0x288000a2,
734 0x24000090,
735 0x20000080,
736 0x1c800072,
737 0x19800066,
738 0x26c0005b,
739 0x24400051,
740 0x12000048,
741 0x10000040
742};
743static u8 CCKSwingTable_Ch1_Ch13[CCK_Table_length][8] = {
744 {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},
745 {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},
746 {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},
747 {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},
748 {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},
749 {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},
750 {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},
751 {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},
752 {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},
753 {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},
754 {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
755 {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}
756};
757
758static u8 CCKSwingTable_Ch14[CCK_Table_length][8] = {
759 {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},
760 {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},
761 {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},
762 {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},
763 {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},
764 {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},
765 {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},
766 {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},
767 {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},
768 {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},
769 {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
770 {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}
771};
772#endif
773#define Pw_Track_Flag 0x11d
774#define Tssi_Mea_Value 0x13c
775#define Tssi_Report_Value1 0x134
776#define Tssi_Report_Value2 0x13e
777#define FW_Busy_Flag 0x13f
778
779#ifndef RTL8192SE
780static void dm_TXPowerTrackingCallback_TSSI(struct net_device * dev)
781 {
782 struct r8192_priv *priv = rtllib_priv(dev);
783 bool bHighpowerstate, viviflag = false;
784 DCMD_TXCMD_T tx_cmd;
785 u8 powerlevelOFDM24G;
786 int i =0, j = 0, k = 0;
787 u8 RF_Type, tmp_report[5]={0, 0, 0, 0, 0};
788 u32 Value;
789 u8 Pwr_Flag;
790 u16 Avg_TSSI_Meas, TSSI_13dBm, Avg_TSSI_Meas_from_driver=0;
791#ifdef RTL8192U
792 RT_STATUS rtStatus = RT_STATUS_SUCCESS;
793#endif
794 u32 delta=0;
795 RT_TRACE(COMP_POWER_TRACKING,"%s()\n",__func__);
796 write_nic_byte(dev, Pw_Track_Flag, 0);
797 write_nic_byte(dev, FW_Busy_Flag, 0);
798 priv->rtllib->bdynamic_txpower_enable = false;
799 bHighpowerstate = priv->bDynamicTxHighPower;
800
801 powerlevelOFDM24G = (u8)(priv->Pwr_Track>>24);
802 RF_Type = priv->rf_type;
803 Value = (RF_Type<<8) | powerlevelOFDM24G;
804
805 RT_TRACE(COMP_POWER_TRACKING, "powerlevelOFDM24G = %x\n", powerlevelOFDM24G);
806
807
808#ifdef RTL8190P
809 for (j = 0; j<1; j++)
810#else
811 for (j = 0; j<=30; j++)
812#endif
813{
814
815 tx_cmd.Op = TXCMD_SET_TX_PWR_TRACKING;
816 tx_cmd.Length = 4;
817 tx_cmd.Value = Value;
818#ifdef RTL8192U
819 rtStatus = SendTxCommandPacket(dev, &tx_cmd, 12);
820 if (rtStatus == RT_STATUS_FAILURE)
821 {
822 RT_TRACE(COMP_POWER_TRACKING, "Set configuration with tx cmd queue fail!\n");
823 }
824#else
825 cmpk_message_handle_tx(dev, (u8*)&tx_cmd, DESC_PACKET_TYPE_INIT, sizeof(DCMD_TXCMD_T));
826#endif
827 mdelay(1);
828 for (i = 0;i <= 30; i++)
829 {
830 Pwr_Flag = read_nic_byte(dev, Pw_Track_Flag);
831
832 if (Pwr_Flag == 0)
833 {
834 mdelay(1);
835
836 if (priv->bResetInProgress)
837 {
838 RT_TRACE(COMP_POWER_TRACKING, "we are in slient reset progress, so return\n");
839 write_nic_byte(dev, Pw_Track_Flag, 0);
840 write_nic_byte(dev, FW_Busy_Flag, 0);
841 return;
842 }
843#ifdef RTL8192E
844 if ((priv->rtllib->eRFPowerState != eRfOn))
845 {
846 RT_TRACE(COMP_POWER_TRACKING, "we are in power save, so return\n");
847 write_nic_byte(dev, Pw_Track_Flag, 0);
848 write_nic_byte(dev, FW_Busy_Flag, 0);
849 return;
850 }
851
852#endif
853 continue;
854 }
855
856 Avg_TSSI_Meas = read_nic_word(dev, Tssi_Mea_Value);
857
858 if (Avg_TSSI_Meas == 0)
859 {
860 write_nic_byte(dev, Pw_Track_Flag, 0);
861 write_nic_byte(dev, FW_Busy_Flag, 0);
862 return;
863 }
864
865 for (k = 0;k < 5; k++)
866 {
867 if (k !=4)
868 tmp_report[k] = read_nic_byte(dev, Tssi_Report_Value1+k);
869 else
870 tmp_report[k] = read_nic_byte(dev, Tssi_Report_Value2);
871
872 RT_TRACE(COMP_POWER_TRACKING, "TSSI_report_value = %d\n", tmp_report[k]);
873
874 {
875 if (tmp_report[k] <= 20)
876 {
877 viviflag =true;
878 break;
879 }
880 }
881 }
882
883 if (viviflag ==true)
884 {
885 write_nic_byte(dev, Pw_Track_Flag, 0);
886 viviflag = false;
887 RT_TRACE(COMP_POWER_TRACKING, "we filted this data\n");
888 for (k = 0;k < 5; k++)
889 tmp_report[k] = 0;
890 break;
891 }
892
893 for (k = 0;k < 5; k++)
894 {
895 Avg_TSSI_Meas_from_driver += tmp_report[k];
896 }
897
898 Avg_TSSI_Meas_from_driver = Avg_TSSI_Meas_from_driver*100/5;
899 RT_TRACE(COMP_POWER_TRACKING, "Avg_TSSI_Meas_from_driver = %d\n", Avg_TSSI_Meas_from_driver);
900 TSSI_13dBm = priv->TSSI_13dBm;
901 RT_TRACE(COMP_POWER_TRACKING, "TSSI_13dBm = %d\n", TSSI_13dBm);
902
903 if (Avg_TSSI_Meas_from_driver > TSSI_13dBm)
904 delta = Avg_TSSI_Meas_from_driver - TSSI_13dBm;
905 else
906 delta = TSSI_13dBm - Avg_TSSI_Meas_from_driver;
907
908 if (delta <= E_FOR_TX_POWER_TRACK)
909 {
910 priv->rtllib->bdynamic_txpower_enable = true;
911 write_nic_byte(dev, Pw_Track_Flag, 0);
912 write_nic_byte(dev, FW_Busy_Flag, 0);
913 RT_TRACE(COMP_POWER_TRACKING, "tx power track is done\n");
914 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex = %d\n", priv->rfa_txpowertrackingindex);
915 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_real = %d\n", priv->rfa_txpowertrackingindex_real);
916#ifdef RTL8190P
917 RT_TRACE(COMP_POWER_TRACKING, "priv->rfc_txpowertrackingindex = %d\n", priv->rfc_txpowertrackingindex);
918 RT_TRACE(COMP_POWER_TRACKING, "priv->rfc_txpowertrackingindex_real = %d\n", priv->rfc_txpowertrackingindex_real);
919#endif
920 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_difference = %d\n", priv->CCKPresentAttentuation_difference);
921 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation = %d\n", priv->CCKPresentAttentuation);
922 return;
923 }
924 else
925 {
926 if (Avg_TSSI_Meas_from_driver < TSSI_13dBm - E_FOR_TX_POWER_TRACK)
927 {
928 if (RF_Type == RF_2T4R)
929 {
930
931 if ((priv->rfa_txpowertrackingindex > 0) &&(priv->rfc_txpowertrackingindex > 0))
932 {
933 priv->rfa_txpowertrackingindex--;
934 if (priv->rfa_txpowertrackingindex_real > 4)
935 {
936 priv->rfa_txpowertrackingindex_real--;
937 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
938 }
939
940 priv->rfc_txpowertrackingindex--;
941 if (priv->rfc_txpowertrackingindex_real > 4)
942 {
943 priv->rfc_txpowertrackingindex_real--;
944 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
945 }
946 }
947 else
948 {
949 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[4].txbbgain_value);
950 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[4].txbbgain_value);
951 }
952 }
953 else
954 {
955 {
956#ifdef RTL8190P
957 {
958 if (priv->rfc_txpowertrackingindex > 0)
959 {
960 priv->rfc_txpowertrackingindex--;
961 if (priv->rfc_txpowertrackingindex_real > 4)
962 {
963 priv->rfc_txpowertrackingindex_real--;
964 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
965 }
966 }
967 else
968 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[4].txbbgain_value);
969 }
970#endif
971#ifdef RTL8192E
972 {
973 if (priv->rfa_txpowertrackingindex > 0)
974 {
975 priv->rfa_txpowertrackingindex--;
976 if (priv->rfa_txpowertrackingindex_real > 4)
977 {
978 priv->rfa_txpowertrackingindex_real--;
979 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
980 }
981 }
982 else
983 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[4].txbbgain_value);
984 }
985#endif
986 }
987
988 }
989 }
990 else
991 {
992 if (RF_Type == RF_2T4R)
993 {
994 if ((priv->rfa_txpowertrackingindex < TxBBGainTableLength - 1) &&(priv->rfc_txpowertrackingindex < TxBBGainTableLength - 1))
995 {
996 priv->rfa_txpowertrackingindex++;
997 priv->rfa_txpowertrackingindex_real++;
998 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
999 priv->rfc_txpowertrackingindex++;
1000 priv->rfc_txpowertrackingindex_real++;
1001 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
1002 }
1003 else
1004 {
1005 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[TxBBGainTableLength - 1].txbbgain_value);
1006 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[TxBBGainTableLength - 1].txbbgain_value);
1007 }
1008 }
1009 else
1010 {
1011 {
1012#ifdef RTL8190P
1013 {
1014 if (priv->rfc_txpowertrackingindex < (TxBBGainTableLength - 1))
1015 {
1016 priv->rfc_txpowertrackingindex++;
1017 priv->rfc_txpowertrackingindex_real++;
1018 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
1019 }
1020 else
1021 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[TxBBGainTableLength - 1].txbbgain_value);
1022 }
1023#endif
1024#ifdef RTL8192E
1025 {
1026 if (priv->rfa_txpowertrackingindex < (TxBBGainTableLength - 1))
1027 {
1028 priv->rfa_txpowertrackingindex++;
1029 priv->rfa_txpowertrackingindex_real++;
1030 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
1031 }
1032 else
1033 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[TxBBGainTableLength - 1].txbbgain_value);
1034 }
1035#endif
1036 }
1037 }
1038 }
1039 if (RF_Type == RF_2T4R){
1040 priv->CCKPresentAttentuation_difference
1041 = priv->rfa_txpowertrackingindex - priv->rfa_txpowertracking_default;
1042 }else{
1043 {
1044#ifdef RTL8190P
1045 priv->CCKPresentAttentuation_difference
1046 = priv->rfc_txpowertrackingindex - priv->rfc_txpowertracking_default;
1047#endif
1048#ifdef RTL8192E
1049 priv->CCKPresentAttentuation_difference
1050 = priv->rfa_txpowertrackingindex_real - priv->rfa_txpowertracking_default;
1051#endif
1052 }
1053 }
1054
1055 if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
1056 priv->CCKPresentAttentuation
1057 = priv->CCKPresentAttentuation_20Mdefault + priv->CCKPresentAttentuation_difference;
1058 else
1059 priv->CCKPresentAttentuation
1060 = priv->CCKPresentAttentuation_40Mdefault + priv->CCKPresentAttentuation_difference;
1061
1062 if (priv->CCKPresentAttentuation > (CCKTxBBGainTableLength-1))
1063 priv->CCKPresentAttentuation = CCKTxBBGainTableLength-1;
1064 if (priv->CCKPresentAttentuation < 0)
1065 priv->CCKPresentAttentuation = 0;
1066
1067 if (priv->CCKPresentAttentuation > -1&&priv->CCKPresentAttentuation < CCKTxBBGainTableLength)
1068 {
1069 if (priv->rtllib->current_network.channel == 14 && !priv->bcck_in_ch14)
1070 {
1071 priv->bcck_in_ch14 = true;
1072 dm_cck_txpower_adjust(dev,priv->bcck_in_ch14);
1073 }
1074 else if (priv->rtllib->current_network.channel != 14 && priv->bcck_in_ch14)
1075 {
1076 priv->bcck_in_ch14 = false;
1077 dm_cck_txpower_adjust(dev,priv->bcck_in_ch14);
1078 }
1079 else
1080 dm_cck_txpower_adjust(dev,priv->bcck_in_ch14);
1081 }
1082 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex = %d\n", priv->rfa_txpowertrackingindex);
1083 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_real = %d\n", priv->rfa_txpowertrackingindex_real);
1084#ifdef RTL8190P
1085 RT_TRACE(COMP_POWER_TRACKING, "priv->rfc_txpowertrackingindex = %d\n", priv->rfc_txpowertrackingindex);
1086 RT_TRACE(COMP_POWER_TRACKING, "priv->rfc_txpowertrackingindex_real = %d\n", priv->rfc_txpowertrackingindex_real);
1087#endif
1088 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_difference = %d\n", priv->CCKPresentAttentuation_difference);
1089 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation = %d\n", priv->CCKPresentAttentuation);
1090
1091 if (priv->CCKPresentAttentuation_difference <= -12||priv->CCKPresentAttentuation_difference >= 24)
1092 {
1093 priv->rtllib->bdynamic_txpower_enable = true;
1094 write_nic_byte(dev, Pw_Track_Flag, 0);
1095 write_nic_byte(dev, FW_Busy_Flag, 0);
1096 RT_TRACE(COMP_POWER_TRACKING, "tx power track--->limited\n");
1097 return;
1098 }
1099
1100
1101 }
1102 write_nic_byte(dev, Pw_Track_Flag, 0);
1103 Avg_TSSI_Meas_from_driver = 0;
1104 for (k = 0;k < 5; k++)
1105 tmp_report[k] = 0;
1106 break;
1107 }
1108 write_nic_byte(dev, FW_Busy_Flag, 0);
1109}
1110 priv->rtllib->bdynamic_txpower_enable = true;
1111 write_nic_byte(dev, Pw_Track_Flag, 0);
1112}
1113#endif
1114
1115#ifdef RTL8192E
1116static void dm_TXPowerTrackingCallback_ThermalMeter(struct net_device * dev)
1117{
1118#define ThermalMeterVal 9
1119 struct r8192_priv *priv = rtllib_priv(dev);
1120 u32 tmpRegA, TempCCk;
1121 u8 tmpOFDMindex, tmpCCKindex, tmpCCK20Mindex, tmpCCK40Mindex, tmpval;
1122 int i =0, CCKSwingNeedUpdate=0;
1123
1124 if (!priv->btxpower_trackingInit)
1125 {
1126 tmpRegA= rtl8192_QueryBBReg(dev, rOFDM0_XATxIQImbalance, bMaskDWord);
1127 for (i=0; i<OFDM_Table_Length; i++)
1128 {
1129 if (tmpRegA == OFDMSwingTable[i])
1130 {
1131 priv->OFDM_index[0]= (u8)i;
1132 RT_TRACE(COMP_POWER_TRACKING, "Initial reg0x%x = 0x%x, OFDM_index=0x%x\n",
1133 rOFDM0_XATxIQImbalance, tmpRegA, priv->OFDM_index[0]);
1134 }
1135 }
1136
1137 TempCCk = rtl8192_QueryBBReg(dev, rCCK0_TxFilter1, bMaskByte2);
1138 for (i=0 ; i<CCK_Table_length ; i++)
1139 {
1140 if (TempCCk == (u32)CCKSwingTable_Ch1_Ch13[i][0])
1141 {
1142 priv->CCK_index =(u8) i;
1143 RT_TRACE(COMP_POWER_TRACKING, "Initial reg0x%x = 0x%x, CCK_index=0x%x\n",
1144 rCCK0_TxFilter1, TempCCk, priv->CCK_index);
1145 break;
1146 }
1147}
1148 priv->btxpower_trackingInit = true;
1149 return;
1150 }
1151
1152 tmpRegA = rtl8192_phy_QueryRFReg(dev, RF90_PATH_A, 0x12, 0x078);
1153 RT_TRACE(COMP_POWER_TRACKING, "Readback ThermalMeterA = %d \n", tmpRegA);
1154 if (tmpRegA < 3 || tmpRegA > 13)
1155 return;
1156 if (tmpRegA >= 12)
1157 tmpRegA = 12;
1158 RT_TRACE(COMP_POWER_TRACKING, "Valid ThermalMeterA = %d \n", tmpRegA);
1159 priv->ThermalMeter[0] = ThermalMeterVal;
1160 priv->ThermalMeter[1] = ThermalMeterVal;
1161
1162 if (priv->ThermalMeter[0] >= (u8)tmpRegA)
1163 {
1164 tmpOFDMindex = tmpCCK20Mindex = 6+(priv->ThermalMeter[0]-(u8)tmpRegA);
1165 tmpCCK40Mindex = tmpCCK20Mindex - 6;
1166 if (tmpOFDMindex >= OFDM_Table_Length)
1167 tmpOFDMindex = OFDM_Table_Length-1;
1168 if (tmpCCK20Mindex >= CCK_Table_length)
1169 tmpCCK20Mindex = CCK_Table_length-1;
1170 if (tmpCCK40Mindex >= CCK_Table_length)
1171 tmpCCK40Mindex = CCK_Table_length-1;
1172 }
1173 else
1174 {
1175 tmpval = ((u8)tmpRegA - priv->ThermalMeter[0]);
1176 if (tmpval >= 6)
1177 tmpOFDMindex = tmpCCK20Mindex = 0;
1178 else
1179 tmpOFDMindex = tmpCCK20Mindex = 6 - tmpval;
1180 tmpCCK40Mindex = 0;
1181 }
1182 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
1183 tmpCCKindex = tmpCCK40Mindex;
1184 else
1185 tmpCCKindex = tmpCCK20Mindex;
1186
1187 priv->Record_CCK_20Mindex = tmpCCK20Mindex;
1188 priv->Record_CCK_40Mindex = tmpCCK40Mindex;
1189 RT_TRACE(COMP_POWER_TRACKING, "Record_CCK_20Mindex / Record_CCK_40Mindex = %d / %d.\n",
1190 priv->Record_CCK_20Mindex, priv->Record_CCK_40Mindex);
1191
1192 if (priv->rtllib->current_network.channel == 14 && !priv->bcck_in_ch14)
1193 {
1194 priv->bcck_in_ch14 = true;
1195 CCKSwingNeedUpdate = 1;
1196 }
1197 else if (priv->rtllib->current_network.channel != 14 && priv->bcck_in_ch14)
1198 {
1199 priv->bcck_in_ch14 = false;
1200 CCKSwingNeedUpdate = 1;
1201 }
1202
1203 if (priv->CCK_index != tmpCCKindex)
1204{
1205 priv->CCK_index = tmpCCKindex;
1206 CCKSwingNeedUpdate = 1;
1207 }
1208
1209 if (CCKSwingNeedUpdate)
1210 {
1211 dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
1212 }
1213 if (priv->OFDM_index[0] != tmpOFDMindex)
1214 {
1215 priv->OFDM_index[0] = tmpOFDMindex;
1216 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable[priv->OFDM_index[0]]);
1217 RT_TRACE(COMP_POWER_TRACKING, "Update OFDMSwing[%d] = 0x%x\n",
1218 priv->OFDM_index[0], OFDMSwingTable[priv->OFDM_index[0]]);
1219 }
1220 priv->txpower_count = 0;
1221}
1222#elif defined (RTL8192SE)
1223static void dm_TXPowerTrackingCallback_ThermalMeter(struct net_device * dev)
1224{
1225 struct r8192_priv *priv = rtllib_priv(dev);
1226 u8 ThermalValue=0;
1227 u32 FwCmdVal=0;
1228
1229 priv->btxpower_trackingInit = true;
1230
1231
1232 ThermalValue = (u8)rtl8192_phy_QueryRFReg(dev, RF90_PATH_A, RF_T_METER, 0x1f);
1233 RT_TRACE(COMP_POWER_TRACKING, "Readback Thermal Meter = 0x%x\n", ThermalValue);
1234 printk("%s()Readback Thermal Meter = 0x%x\n", __func__,ThermalValue);
1235 if (ThermalValue)
1236 {
1237 priv->ThermalValue = ThermalValue;
1238 if (priv->pFirmware->FirmwareVersion >= 0x35)
1239 {
1240 priv->rtllib->SetFwCmdHandler(dev, FW_CMD_TXPWR_TRACK_THERMAL);
1241 }
1242 else
1243 {
1244 FwCmdVal = (FW_TXPWR_TRACK_THERMAL|
1245 (priv->ThermalMeter[0]<<8)|(ThermalValue<<16));
1246 RT_TRACE(COMP_POWER_TRACKING, "Write to FW Thermal Val = 0x%x\n", FwCmdVal);
1247 write_nic_dword(dev, WFM5, FwCmdVal);
1248 ChkFwCmdIoDone(dev);
1249 }
1250 }
1251
1252 priv->txpower_count = 0;
1253}
1254#endif
1255
1256void dm_txpower_trackingcallback(void *data)
1257{
1258#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
1259 struct r8192_priv *priv = container_of_dwork_rsl(data,struct r8192_priv,txpower_tracking_wq);
1260 struct net_device *dev = priv->rtllib->dev;
1261#else
1262 struct net_device *dev = (struct net_device *)data;
1263 struct r8192_priv *priv = rtllib_priv(dev);
1264#endif
1265
1266#ifdef RTL8190P
1267 dm_TXPowerTrackingCallback_TSSI(dev);
1268#elif defined(RTL8192E)
1269 if (priv->IC_Cut >= IC_VersionCut_D)
1270 dm_TXPowerTrackingCallback_TSSI(dev);
1271 else
1272 dm_TXPowerTrackingCallback_ThermalMeter(dev);
1273#elif defined(RTL8192SE)
1274 dm_TXPowerTrackingCallback_ThermalMeter(dev);
1275#endif
1276}
1277
1278#ifndef RTL8192SE
1279static void dm_InitializeTXPowerTracking_TSSI(struct net_device *dev)
1280{
1281
1282 struct r8192_priv *priv = rtllib_priv(dev);
1283
1284 priv->txbbgain_table[0].txbb_iq_amplifygain = 12;
1285 priv->txbbgain_table[0].txbbgain_value=0x7f8001fe;
1286 priv->txbbgain_table[1].txbb_iq_amplifygain = 11;
1287 priv->txbbgain_table[1].txbbgain_value=0x788001e2;
1288 priv->txbbgain_table[2].txbb_iq_amplifygain = 10;
1289 priv->txbbgain_table[2].txbbgain_value=0x71c001c7;
1290 priv->txbbgain_table[3].txbb_iq_amplifygain = 9;
1291 priv->txbbgain_table[3].txbbgain_value=0x6b8001ae;
1292 priv->txbbgain_table[4].txbb_iq_amplifygain = 8;
1293 priv->txbbgain_table[4].txbbgain_value=0x65400195;
1294 priv->txbbgain_table[5].txbb_iq_amplifygain = 7;
1295 priv->txbbgain_table[5].txbbgain_value=0x5fc0017f;
1296 priv->txbbgain_table[6].txbb_iq_amplifygain = 6;
1297 priv->txbbgain_table[6].txbbgain_value=0x5a400169;
1298 priv->txbbgain_table[7].txbb_iq_amplifygain = 5;
1299 priv->txbbgain_table[7].txbbgain_value=0x55400155;
1300 priv->txbbgain_table[8].txbb_iq_amplifygain = 4;
1301 priv->txbbgain_table[8].txbbgain_value=0x50800142;
1302 priv->txbbgain_table[9].txbb_iq_amplifygain = 3;
1303 priv->txbbgain_table[9].txbbgain_value=0x4c000130;
1304 priv->txbbgain_table[10].txbb_iq_amplifygain = 2;
1305 priv->txbbgain_table[10].txbbgain_value=0x47c0011f;
1306 priv->txbbgain_table[11].txbb_iq_amplifygain = 1;
1307 priv->txbbgain_table[11].txbbgain_value=0x43c0010f;
1308 priv->txbbgain_table[12].txbb_iq_amplifygain = 0;
1309 priv->txbbgain_table[12].txbbgain_value=0x40000100;
1310 priv->txbbgain_table[13].txbb_iq_amplifygain = -1;
1311 priv->txbbgain_table[13].txbbgain_value=0x3c8000f2;
1312 priv->txbbgain_table[14].txbb_iq_amplifygain = -2;
1313 priv->txbbgain_table[14].txbbgain_value=0x390000e4;
1314 priv->txbbgain_table[15].txbb_iq_amplifygain = -3;
1315 priv->txbbgain_table[15].txbbgain_value=0x35c000d7;
1316 priv->txbbgain_table[16].txbb_iq_amplifygain = -4;
1317 priv->txbbgain_table[16].txbbgain_value=0x32c000cb;
1318 priv->txbbgain_table[17].txbb_iq_amplifygain = -5;
1319 priv->txbbgain_table[17].txbbgain_value=0x300000c0;
1320 priv->txbbgain_table[18].txbb_iq_amplifygain = -6;
1321 priv->txbbgain_table[18].txbbgain_value=0x2d4000b5;
1322 priv->txbbgain_table[19].txbb_iq_amplifygain = -7;
1323 priv->txbbgain_table[19].txbbgain_value=0x2ac000ab;
1324 priv->txbbgain_table[20].txbb_iq_amplifygain = -8;
1325 priv->txbbgain_table[20].txbbgain_value=0x288000a2;
1326 priv->txbbgain_table[21].txbb_iq_amplifygain = -9;
1327 priv->txbbgain_table[21].txbbgain_value=0x26000098;
1328 priv->txbbgain_table[22].txbb_iq_amplifygain = -10;
1329 priv->txbbgain_table[22].txbbgain_value=0x24000090;
1330 priv->txbbgain_table[23].txbb_iq_amplifygain = -11;
1331 priv->txbbgain_table[23].txbbgain_value=0x22000088;
1332 priv->txbbgain_table[24].txbb_iq_amplifygain = -12;
1333 priv->txbbgain_table[24].txbbgain_value=0x20000080;
1334 priv->txbbgain_table[25].txbb_iq_amplifygain = -13;
1335 priv->txbbgain_table[25].txbbgain_value=0x1a00006c;
1336 priv->txbbgain_table[26].txbb_iq_amplifygain = -14;
1337 priv->txbbgain_table[26].txbbgain_value=0x1c800072;
1338 priv->txbbgain_table[27].txbb_iq_amplifygain = -15;
1339 priv->txbbgain_table[27].txbbgain_value=0x18000060;
1340 priv->txbbgain_table[28].txbb_iq_amplifygain = -16;
1341 priv->txbbgain_table[28].txbbgain_value=0x19800066;
1342 priv->txbbgain_table[29].txbb_iq_amplifygain = -17;
1343 priv->txbbgain_table[29].txbbgain_value=0x15800056;
1344 priv->txbbgain_table[30].txbb_iq_amplifygain = -18;
1345 priv->txbbgain_table[30].txbbgain_value=0x26c0005b;
1346 priv->txbbgain_table[31].txbb_iq_amplifygain = -19;
1347 priv->txbbgain_table[31].txbbgain_value=0x14400051;
1348 priv->txbbgain_table[32].txbb_iq_amplifygain = -20;
1349 priv->txbbgain_table[32].txbbgain_value=0x24400051;
1350 priv->txbbgain_table[33].txbb_iq_amplifygain = -21;
1351 priv->txbbgain_table[33].txbbgain_value=0x1300004c;
1352 priv->txbbgain_table[34].txbb_iq_amplifygain = -22;
1353 priv->txbbgain_table[34].txbbgain_value=0x12000048;
1354 priv->txbbgain_table[35].txbb_iq_amplifygain = -23;
1355 priv->txbbgain_table[35].txbbgain_value=0x11000044;
1356 priv->txbbgain_table[36].txbb_iq_amplifygain = -24;
1357 priv->txbbgain_table[36].txbbgain_value=0x10000040;
1358
1359 priv->cck_txbbgain_table[0].ccktxbb_valuearray[0] = 0x36;
1360 priv->cck_txbbgain_table[0].ccktxbb_valuearray[1] = 0x35;
1361 priv->cck_txbbgain_table[0].ccktxbb_valuearray[2] = 0x2e;
1362 priv->cck_txbbgain_table[0].ccktxbb_valuearray[3] = 0x25;
1363 priv->cck_txbbgain_table[0].ccktxbb_valuearray[4] = 0x1c;
1364 priv->cck_txbbgain_table[0].ccktxbb_valuearray[5] = 0x12;
1365 priv->cck_txbbgain_table[0].ccktxbb_valuearray[6] = 0x09;
1366 priv->cck_txbbgain_table[0].ccktxbb_valuearray[7] = 0x04;
1367
1368 priv->cck_txbbgain_table[1].ccktxbb_valuearray[0] = 0x33;
1369 priv->cck_txbbgain_table[1].ccktxbb_valuearray[1] = 0x32;
1370 priv->cck_txbbgain_table[1].ccktxbb_valuearray[2] = 0x2b;
1371 priv->cck_txbbgain_table[1].ccktxbb_valuearray[3] = 0x23;
1372 priv->cck_txbbgain_table[1].ccktxbb_valuearray[4] = 0x1a;
1373 priv->cck_txbbgain_table[1].ccktxbb_valuearray[5] = 0x11;
1374 priv->cck_txbbgain_table[1].ccktxbb_valuearray[6] = 0x08;
1375 priv->cck_txbbgain_table[1].ccktxbb_valuearray[7] = 0x04;
1376
1377 priv->cck_txbbgain_table[2].ccktxbb_valuearray[0] = 0x30;
1378 priv->cck_txbbgain_table[2].ccktxbb_valuearray[1] = 0x2f;
1379 priv->cck_txbbgain_table[2].ccktxbb_valuearray[2] = 0x29;
1380 priv->cck_txbbgain_table[2].ccktxbb_valuearray[3] = 0x21;
1381 priv->cck_txbbgain_table[2].ccktxbb_valuearray[4] = 0x19;
1382 priv->cck_txbbgain_table[2].ccktxbb_valuearray[5] = 0x10;
1383 priv->cck_txbbgain_table[2].ccktxbb_valuearray[6] = 0x08;
1384 priv->cck_txbbgain_table[2].ccktxbb_valuearray[7] = 0x03;
1385
1386 priv->cck_txbbgain_table[3].ccktxbb_valuearray[0] = 0x2d;
1387 priv->cck_txbbgain_table[3].ccktxbb_valuearray[1] = 0x2d;
1388 priv->cck_txbbgain_table[3].ccktxbb_valuearray[2] = 0x27;
1389 priv->cck_txbbgain_table[3].ccktxbb_valuearray[3] = 0x1f;
1390 priv->cck_txbbgain_table[3].ccktxbb_valuearray[4] = 0x18;
1391 priv->cck_txbbgain_table[3].ccktxbb_valuearray[5] = 0x0f;
1392 priv->cck_txbbgain_table[3].ccktxbb_valuearray[6] = 0x08;
1393 priv->cck_txbbgain_table[3].ccktxbb_valuearray[7] = 0x03;
1394
1395 priv->cck_txbbgain_table[4].ccktxbb_valuearray[0] = 0x2b;
1396 priv->cck_txbbgain_table[4].ccktxbb_valuearray[1] = 0x2a;
1397 priv->cck_txbbgain_table[4].ccktxbb_valuearray[2] = 0x25;
1398 priv->cck_txbbgain_table[4].ccktxbb_valuearray[3] = 0x1e;
1399 priv->cck_txbbgain_table[4].ccktxbb_valuearray[4] = 0x16;
1400 priv->cck_txbbgain_table[4].ccktxbb_valuearray[5] = 0x0e;
1401 priv->cck_txbbgain_table[4].ccktxbb_valuearray[6] = 0x07;
1402 priv->cck_txbbgain_table[4].ccktxbb_valuearray[7] = 0x03;
1403
1404 priv->cck_txbbgain_table[5].ccktxbb_valuearray[0] = 0x28;
1405 priv->cck_txbbgain_table[5].ccktxbb_valuearray[1] = 0x28;
1406 priv->cck_txbbgain_table[5].ccktxbb_valuearray[2] = 0x22;
1407 priv->cck_txbbgain_table[5].ccktxbb_valuearray[3] = 0x1c;
1408 priv->cck_txbbgain_table[5].ccktxbb_valuearray[4] = 0x15;
1409 priv->cck_txbbgain_table[5].ccktxbb_valuearray[5] = 0x0d;
1410 priv->cck_txbbgain_table[5].ccktxbb_valuearray[6] = 0x07;
1411 priv->cck_txbbgain_table[5].ccktxbb_valuearray[7] = 0x03;
1412
1413 priv->cck_txbbgain_table[6].ccktxbb_valuearray[0] = 0x26;
1414 priv->cck_txbbgain_table[6].ccktxbb_valuearray[1] = 0x25;
1415 priv->cck_txbbgain_table[6].ccktxbb_valuearray[2] = 0x21;
1416 priv->cck_txbbgain_table[6].ccktxbb_valuearray[3] = 0x1b;
1417 priv->cck_txbbgain_table[6].ccktxbb_valuearray[4] = 0x14;
1418 priv->cck_txbbgain_table[6].ccktxbb_valuearray[5] = 0x0d;
1419 priv->cck_txbbgain_table[6].ccktxbb_valuearray[6] = 0x06;
1420 priv->cck_txbbgain_table[6].ccktxbb_valuearray[7] = 0x03;
1421
1422 priv->cck_txbbgain_table[7].ccktxbb_valuearray[0] = 0x24;
1423 priv->cck_txbbgain_table[7].ccktxbb_valuearray[1] = 0x23;
1424 priv->cck_txbbgain_table[7].ccktxbb_valuearray[2] = 0x1f;
1425 priv->cck_txbbgain_table[7].ccktxbb_valuearray[3] = 0x19;
1426 priv->cck_txbbgain_table[7].ccktxbb_valuearray[4] = 0x13;
1427 priv->cck_txbbgain_table[7].ccktxbb_valuearray[5] = 0x0c;
1428 priv->cck_txbbgain_table[7].ccktxbb_valuearray[6] = 0x06;
1429 priv->cck_txbbgain_table[7].ccktxbb_valuearray[7] = 0x03;
1430
1431 priv->cck_txbbgain_table[8].ccktxbb_valuearray[0] = 0x22;
1432 priv->cck_txbbgain_table[8].ccktxbb_valuearray[1] = 0x21;
1433 priv->cck_txbbgain_table[8].ccktxbb_valuearray[2] = 0x1d;
1434 priv->cck_txbbgain_table[8].ccktxbb_valuearray[3] = 0x18;
1435 priv->cck_txbbgain_table[8].ccktxbb_valuearray[4] = 0x11;
1436 priv->cck_txbbgain_table[8].ccktxbb_valuearray[5] = 0x0b;
1437 priv->cck_txbbgain_table[8].ccktxbb_valuearray[6] = 0x06;
1438 priv->cck_txbbgain_table[8].ccktxbb_valuearray[7] = 0x02;
1439
1440 priv->cck_txbbgain_table[9].ccktxbb_valuearray[0] = 0x20;
1441 priv->cck_txbbgain_table[9].ccktxbb_valuearray[1] = 0x20;
1442 priv->cck_txbbgain_table[9].ccktxbb_valuearray[2] = 0x1b;
1443 priv->cck_txbbgain_table[9].ccktxbb_valuearray[3] = 0x16;
1444 priv->cck_txbbgain_table[9].ccktxbb_valuearray[4] = 0x11;
1445 priv->cck_txbbgain_table[9].ccktxbb_valuearray[5] = 0x08;
1446 priv->cck_txbbgain_table[9].ccktxbb_valuearray[6] = 0x05;
1447 priv->cck_txbbgain_table[9].ccktxbb_valuearray[7] = 0x02;
1448
1449 priv->cck_txbbgain_table[10].ccktxbb_valuearray[0] = 0x1f;
1450 priv->cck_txbbgain_table[10].ccktxbb_valuearray[1] = 0x1e;
1451 priv->cck_txbbgain_table[10].ccktxbb_valuearray[2] = 0x1a;
1452 priv->cck_txbbgain_table[10].ccktxbb_valuearray[3] = 0x15;
1453 priv->cck_txbbgain_table[10].ccktxbb_valuearray[4] = 0x10;
1454 priv->cck_txbbgain_table[10].ccktxbb_valuearray[5] = 0x0a;
1455 priv->cck_txbbgain_table[10].ccktxbb_valuearray[6] = 0x05;
1456 priv->cck_txbbgain_table[10].ccktxbb_valuearray[7] = 0x02;
1457
1458 priv->cck_txbbgain_table[11].ccktxbb_valuearray[0] = 0x1d;
1459 priv->cck_txbbgain_table[11].ccktxbb_valuearray[1] = 0x1c;
1460 priv->cck_txbbgain_table[11].ccktxbb_valuearray[2] = 0x18;
1461 priv->cck_txbbgain_table[11].ccktxbb_valuearray[3] = 0x14;
1462 priv->cck_txbbgain_table[11].ccktxbb_valuearray[4] = 0x0f;
1463 priv->cck_txbbgain_table[11].ccktxbb_valuearray[5] = 0x0a;
1464 priv->cck_txbbgain_table[11].ccktxbb_valuearray[6] = 0x05;
1465 priv->cck_txbbgain_table[11].ccktxbb_valuearray[7] = 0x02;
1466
1467 priv->cck_txbbgain_table[12].ccktxbb_valuearray[0] = 0x1b;
1468 priv->cck_txbbgain_table[12].ccktxbb_valuearray[1] = 0x1a;
1469 priv->cck_txbbgain_table[12].ccktxbb_valuearray[2] = 0x17;
1470 priv->cck_txbbgain_table[12].ccktxbb_valuearray[3] = 0x13;
1471 priv->cck_txbbgain_table[12].ccktxbb_valuearray[4] = 0x0e;
1472 priv->cck_txbbgain_table[12].ccktxbb_valuearray[5] = 0x09;
1473 priv->cck_txbbgain_table[12].ccktxbb_valuearray[6] = 0x04;
1474 priv->cck_txbbgain_table[12].ccktxbb_valuearray[7] = 0x02;
1475
1476 priv->cck_txbbgain_table[13].ccktxbb_valuearray[0] = 0x1a;
1477 priv->cck_txbbgain_table[13].ccktxbb_valuearray[1] = 0x19;
1478 priv->cck_txbbgain_table[13].ccktxbb_valuearray[2] = 0x16;
1479 priv->cck_txbbgain_table[13].ccktxbb_valuearray[3] = 0x12;
1480 priv->cck_txbbgain_table[13].ccktxbb_valuearray[4] = 0x0d;
1481 priv->cck_txbbgain_table[13].ccktxbb_valuearray[5] = 0x09;
1482 priv->cck_txbbgain_table[13].ccktxbb_valuearray[6] = 0x04;
1483 priv->cck_txbbgain_table[13].ccktxbb_valuearray[7] = 0x02;
1484
1485 priv->cck_txbbgain_table[14].ccktxbb_valuearray[0] = 0x18;
1486 priv->cck_txbbgain_table[14].ccktxbb_valuearray[1] = 0x17;
1487 priv->cck_txbbgain_table[14].ccktxbb_valuearray[2] = 0x15;
1488 priv->cck_txbbgain_table[14].ccktxbb_valuearray[3] = 0x11;
1489 priv->cck_txbbgain_table[14].ccktxbb_valuearray[4] = 0x0c;
1490 priv->cck_txbbgain_table[14].ccktxbb_valuearray[5] = 0x08;
1491 priv->cck_txbbgain_table[14].ccktxbb_valuearray[6] = 0x04;
1492 priv->cck_txbbgain_table[14].ccktxbb_valuearray[7] = 0x02;
1493
1494 priv->cck_txbbgain_table[15].ccktxbb_valuearray[0] = 0x17;
1495 priv->cck_txbbgain_table[15].ccktxbb_valuearray[1] = 0x16;
1496 priv->cck_txbbgain_table[15].ccktxbb_valuearray[2] = 0x13;
1497 priv->cck_txbbgain_table[15].ccktxbb_valuearray[3] = 0x10;
1498 priv->cck_txbbgain_table[15].ccktxbb_valuearray[4] = 0x0c;
1499 priv->cck_txbbgain_table[15].ccktxbb_valuearray[5] = 0x08;
1500 priv->cck_txbbgain_table[15].ccktxbb_valuearray[6] = 0x04;
1501 priv->cck_txbbgain_table[15].ccktxbb_valuearray[7] = 0x02;
1502
1503 priv->cck_txbbgain_table[16].ccktxbb_valuearray[0] = 0x16;
1504 priv->cck_txbbgain_table[16].ccktxbb_valuearray[1] = 0x15;
1505 priv->cck_txbbgain_table[16].ccktxbb_valuearray[2] = 0x12;
1506 priv->cck_txbbgain_table[16].ccktxbb_valuearray[3] = 0x0f;
1507 priv->cck_txbbgain_table[16].ccktxbb_valuearray[4] = 0x0b;
1508 priv->cck_txbbgain_table[16].ccktxbb_valuearray[5] = 0x07;
1509 priv->cck_txbbgain_table[16].ccktxbb_valuearray[6] = 0x04;
1510 priv->cck_txbbgain_table[16].ccktxbb_valuearray[7] = 0x01;
1511
1512 priv->cck_txbbgain_table[17].ccktxbb_valuearray[0] = 0x14;
1513 priv->cck_txbbgain_table[17].ccktxbb_valuearray[1] = 0x14;
1514 priv->cck_txbbgain_table[17].ccktxbb_valuearray[2] = 0x11;
1515 priv->cck_txbbgain_table[17].ccktxbb_valuearray[3] = 0x0e;
1516 priv->cck_txbbgain_table[17].ccktxbb_valuearray[4] = 0x0b;
1517 priv->cck_txbbgain_table[17].ccktxbb_valuearray[5] = 0x07;
1518 priv->cck_txbbgain_table[17].ccktxbb_valuearray[6] = 0x03;
1519 priv->cck_txbbgain_table[17].ccktxbb_valuearray[7] = 0x02;
1520
1521 priv->cck_txbbgain_table[18].ccktxbb_valuearray[0] = 0x13;
1522 priv->cck_txbbgain_table[18].ccktxbb_valuearray[1] = 0x13;
1523 priv->cck_txbbgain_table[18].ccktxbb_valuearray[2] = 0x10;
1524 priv->cck_txbbgain_table[18].ccktxbb_valuearray[3] = 0x0d;
1525 priv->cck_txbbgain_table[18].ccktxbb_valuearray[4] = 0x0a;
1526 priv->cck_txbbgain_table[18].ccktxbb_valuearray[5] = 0x06;
1527 priv->cck_txbbgain_table[18].ccktxbb_valuearray[6] = 0x03;
1528 priv->cck_txbbgain_table[18].ccktxbb_valuearray[7] = 0x01;
1529
1530 priv->cck_txbbgain_table[19].ccktxbb_valuearray[0] = 0x12;
1531 priv->cck_txbbgain_table[19].ccktxbb_valuearray[1] = 0x12;
1532 priv->cck_txbbgain_table[19].ccktxbb_valuearray[2] = 0x0f;
1533 priv->cck_txbbgain_table[19].ccktxbb_valuearray[3] = 0x0c;
1534 priv->cck_txbbgain_table[19].ccktxbb_valuearray[4] = 0x09;
1535 priv->cck_txbbgain_table[19].ccktxbb_valuearray[5] = 0x06;
1536 priv->cck_txbbgain_table[19].ccktxbb_valuearray[6] = 0x03;
1537 priv->cck_txbbgain_table[19].ccktxbb_valuearray[7] = 0x01;
1538
1539 priv->cck_txbbgain_table[20].ccktxbb_valuearray[0] = 0x11;
1540 priv->cck_txbbgain_table[20].ccktxbb_valuearray[1] = 0x11;
1541 priv->cck_txbbgain_table[20].ccktxbb_valuearray[2] = 0x0f;
1542 priv->cck_txbbgain_table[20].ccktxbb_valuearray[3] = 0x0c;
1543 priv->cck_txbbgain_table[20].ccktxbb_valuearray[4] = 0x09;
1544 priv->cck_txbbgain_table[20].ccktxbb_valuearray[5] = 0x06;
1545 priv->cck_txbbgain_table[20].ccktxbb_valuearray[6] = 0x03;
1546 priv->cck_txbbgain_table[20].ccktxbb_valuearray[7] = 0x01;
1547
1548 priv->cck_txbbgain_table[21].ccktxbb_valuearray[0] = 0x10;
1549 priv->cck_txbbgain_table[21].ccktxbb_valuearray[1] = 0x10;
1550 priv->cck_txbbgain_table[21].ccktxbb_valuearray[2] = 0x0e;
1551 priv->cck_txbbgain_table[21].ccktxbb_valuearray[3] = 0x0b;
1552 priv->cck_txbbgain_table[21].ccktxbb_valuearray[4] = 0x08;
1553 priv->cck_txbbgain_table[21].ccktxbb_valuearray[5] = 0x05;
1554 priv->cck_txbbgain_table[21].ccktxbb_valuearray[6] = 0x03;
1555 priv->cck_txbbgain_table[21].ccktxbb_valuearray[7] = 0x01;
1556
1557 priv->cck_txbbgain_table[22].ccktxbb_valuearray[0] = 0x0f;
1558 priv->cck_txbbgain_table[22].ccktxbb_valuearray[1] = 0x0f;
1559 priv->cck_txbbgain_table[22].ccktxbb_valuearray[2] = 0x0d;
1560 priv->cck_txbbgain_table[22].ccktxbb_valuearray[3] = 0x0b;
1561 priv->cck_txbbgain_table[22].ccktxbb_valuearray[4] = 0x08;
1562 priv->cck_txbbgain_table[22].ccktxbb_valuearray[5] = 0x05;
1563 priv->cck_txbbgain_table[22].ccktxbb_valuearray[6] = 0x03;
1564 priv->cck_txbbgain_table[22].ccktxbb_valuearray[7] = 0x01;
1565
1566 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[0] = 0x36;
1567 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[1] = 0x35;
1568 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[2] = 0x2e;
1569 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[3] = 0x1b;
1570 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[4] = 0x00;
1571 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[5] = 0x00;
1572 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[6] = 0x00;
1573 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[7] = 0x00;
1574
1575 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[0] = 0x33;
1576 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[1] = 0x32;
1577 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[2] = 0x2b;
1578 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[3] = 0x19;
1579 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[4] = 0x00;
1580 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[5] = 0x00;
1581 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[6] = 0x00;
1582 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[7] = 0x00;
1583
1584 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[0] = 0x30;
1585 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[1] = 0x2f;
1586 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[2] = 0x29;
1587 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[3] = 0x18;
1588 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[4] = 0x00;
1589 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[5] = 0x00;
1590 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[6] = 0x00;
1591 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[7] = 0x00;
1592
1593 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[0] = 0x2d;
1594 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[1] = 0x2d;
1595 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[2] = 0x27;
1596 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[3] = 0x17;
1597 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[4] = 0x00;
1598 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[5] = 0x00;
1599 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[6] = 0x00;
1600 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[7] = 0x00;
1601
1602 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[0] = 0x2b;
1603 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[1] = 0x2a;
1604 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[2] = 0x25;
1605 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[3] = 0x15;
1606 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[4] = 0x00;
1607 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[5] = 0x00;
1608 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[6] = 0x00;
1609 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[7] = 0x00;
1610
1611 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[0] = 0x28;
1612 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[1] = 0x28;
1613 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[2] = 0x22;
1614 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[3] = 0x14;
1615 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[4] = 0x00;
1616 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[5] = 0x00;
1617 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[6] = 0x00;
1618 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[7] = 0x00;
1619
1620 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[0] = 0x26;
1621 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[1] = 0x25;
1622 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[2] = 0x21;
1623 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[3] = 0x13;
1624 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[4] = 0x00;
1625 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[5] = 0x00;
1626 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[6] = 0x00;
1627 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[7] = 0x00;
1628
1629 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[0] = 0x24;
1630 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[1] = 0x23;
1631 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[2] = 0x1f;
1632 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[3] = 0x12;
1633 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[4] = 0x00;
1634 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[5] = 0x00;
1635 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[6] = 0x00;
1636 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[7] = 0x00;
1637
1638 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[0] = 0x22;
1639 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[1] = 0x21;
1640 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[2] = 0x1d;
1641 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[3] = 0x11;
1642 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[4] = 0x00;
1643 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[5] = 0x00;
1644 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[6] = 0x00;
1645 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[7] = 0x00;
1646
1647 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[0] = 0x20;
1648 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[1] = 0x20;
1649 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[2] = 0x1b;
1650 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[3] = 0x10;
1651 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[4] = 0x00;
1652 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[5] = 0x00;
1653 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[6] = 0x00;
1654 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[7] = 0x00;
1655
1656 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[0] = 0x1f;
1657 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[1] = 0x1e;
1658 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[2] = 0x1a;
1659 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[3] = 0x0f;
1660 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[4] = 0x00;
1661 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[5] = 0x00;
1662 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[6] = 0x00;
1663 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[7] = 0x00;
1664
1665 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[0] = 0x1d;
1666 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[1] = 0x1c;
1667 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[2] = 0x18;
1668 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[3] = 0x0e;
1669 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[4] = 0x00;
1670 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[5] = 0x00;
1671 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[6] = 0x00;
1672 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[7] = 0x00;
1673
1674 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[0] = 0x1b;
1675 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[1] = 0x1a;
1676 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[2] = 0x17;
1677 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[3] = 0x0e;
1678 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[4] = 0x00;
1679 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[5] = 0x00;
1680 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[6] = 0x00;
1681 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[7] = 0x00;
1682
1683 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[0] = 0x1a;
1684 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[1] = 0x19;
1685 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[2] = 0x16;
1686 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[3] = 0x0d;
1687 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[4] = 0x00;
1688 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[5] = 0x00;
1689 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[6] = 0x00;
1690 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[7] = 0x00;
1691
1692 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[0] = 0x18;
1693 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[1] = 0x17;
1694 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[2] = 0x15;
1695 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[3] = 0x0c;
1696 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[4] = 0x00;
1697 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[5] = 0x00;
1698 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[6] = 0x00;
1699 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[7] = 0x00;
1700
1701 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[0] = 0x17;
1702 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[1] = 0x16;
1703 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[2] = 0x13;
1704 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[3] = 0x0b;
1705 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[4] = 0x00;
1706 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[5] = 0x00;
1707 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[6] = 0x00;
1708 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[7] = 0x00;
1709
1710 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[0] = 0x16;
1711 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[1] = 0x15;
1712 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[2] = 0x12;
1713 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[3] = 0x0b;
1714 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[4] = 0x00;
1715 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[5] = 0x00;
1716 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[6] = 0x00;
1717 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[7] = 0x00;
1718
1719 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[0] = 0x14;
1720 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[1] = 0x14;
1721 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[2] = 0x11;
1722 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[3] = 0x0a;
1723 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[4] = 0x00;
1724 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[5] = 0x00;
1725 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[6] = 0x00;
1726 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[7] = 0x00;
1727
1728 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[0] = 0x13;
1729 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[1] = 0x13;
1730 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[2] = 0x10;
1731 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[3] = 0x0a;
1732 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[4] = 0x00;
1733 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[5] = 0x00;
1734 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[6] = 0x00;
1735 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[7] = 0x00;
1736
1737 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[0] = 0x12;
1738 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[1] = 0x12;
1739 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[2] = 0x0f;
1740 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[3] = 0x09;
1741 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[4] = 0x00;
1742 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[5] = 0x00;
1743 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[6] = 0x00;
1744 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[7] = 0x00;
1745
1746 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[0] = 0x11;
1747 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[1] = 0x11;
1748 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[2] = 0x0f;
1749 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[3] = 0x09;
1750 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[4] = 0x00;
1751 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[5] = 0x00;
1752 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[6] = 0x00;
1753 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[7] = 0x00;
1754
1755 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[0] = 0x10;
1756 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[1] = 0x10;
1757 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[2] = 0x0e;
1758 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[3] = 0x08;
1759 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[4] = 0x00;
1760 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[5] = 0x00;
1761 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[6] = 0x00;
1762 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[7] = 0x00;
1763
1764 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[0] = 0x0f;
1765 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[1] = 0x0f;
1766 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[2] = 0x0d;
1767 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[3] = 0x08;
1768 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[4] = 0x00;
1769 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[5] = 0x00;
1770 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[6] = 0x00;
1771 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[7] = 0x00;
1772
1773 priv->btxpower_tracking = true;
1774 priv->txpower_count = 0;
1775 priv->btxpower_trackingInit = false;
1776
1777}
1778#endif
1779#ifndef RTL8190P
1780static void dm_InitializeTXPowerTracking_ThermalMeter(struct net_device *dev)
1781{
1782 struct r8192_priv *priv = rtllib_priv(dev);
1783
1784#ifdef RTL8192SE
1785 priv->btxpower_tracking = false;
1786 priv->txpower_count = 0;
1787 priv->btxpower_trackingInit = false;
1788#else
1789
1790 if (priv->rtllib->FwRWRF)
1791 priv->btxpower_tracking = true;
1792 else
1793 priv->btxpower_tracking = false;
1794 priv->txpower_count = 0;
1795 priv->btxpower_trackingInit = false;
1796#endif
1797 RT_TRACE(COMP_POWER_TRACKING, "pMgntInfo->bTXPowerTracking = %d\n", priv->btxpower_tracking);
1798}
1799#endif
1800
1801void dm_initialize_txpower_tracking(struct net_device *dev)
1802{
1803#ifdef RTL8192E
1804 struct r8192_priv *priv = rtllib_priv(dev);
1805#endif
1806#ifdef RTL8190P
1807 dm_InitializeTXPowerTracking_TSSI(dev);
1808#elif defined RTL8192E
1809 if (priv->IC_Cut >= IC_VersionCut_D)
1810 dm_InitializeTXPowerTracking_TSSI(dev);
1811 else
1812 dm_InitializeTXPowerTracking_ThermalMeter(dev);
1813#elif defined RTL8192SE
1814 dm_InitializeTXPowerTracking_ThermalMeter(dev);
1815#endif
1816}
1817
1818#if (defined RTL8192E || defined RTL8190P)
1819static void dm_CheckTXPowerTracking_TSSI(struct net_device *dev)
1820{
1821 struct r8192_priv *priv = rtllib_priv(dev);
1822 static u32 tx_power_track_counter = 0;
1823 RT_TRACE(COMP_POWER_TRACKING,"%s()\n",__func__);
1824 if (read_nic_byte(dev, 0x11e) ==1)
1825 return;
1826 if (!priv->btxpower_tracking)
1827 return;
1828 tx_power_track_counter++;
1829
1830
1831 if (tx_power_track_counter >= 180)
1832 {
1833 queue_delayed_work_rsl(priv->priv_wq,&priv->txpower_tracking_wq,0);
1834 tx_power_track_counter =0;
1835 }
1836
1837}
1838#endif
1839#ifndef RTL8190P
1840static void dm_CheckTXPowerTracking_ThermalMeter(struct net_device *dev)
1841{
1842 struct r8192_priv *priv = rtllib_priv(dev);
1843 static u8 TM_Trigger=0;
1844 u8 TxPowerCheckCnt = 0;
1845
1846 if (IS_HARDWARE_TYPE_8192SE(dev))
1847 TxPowerCheckCnt = 5;
1848 else
1849 TxPowerCheckCnt = 2;
1850 if (!priv->btxpower_tracking){
1851 return;
1852 } else {
1853 if (priv->txpower_count <= TxPowerCheckCnt) {
1854 priv->txpower_count++;
1855 return;
1856 }
1857 }
1858
1859 if (!TM_Trigger)
1860 {
1861#ifdef RTL8192SE
1862 if (IS_HARDWARE_TYPE_8192SE(dev))
1863 {
1864 rtl8192_phy_SetRFReg(dev, RF90_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60);
1865 RT_TRACE(COMP_POWER_TRACKING, "Trigger 92S Thermal Meter!!\n");
1866 }
1867 else
1868#endif
1869 {
1870 rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4d);
1871 rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4f);
1872 rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4d);
1873 rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4f);
1874 }
1875 TM_Trigger = 1;
1876 return;
1877 } else {
1878 printk("===============>Schedule TxPowerTrackingWorkItem\n");
1879#ifdef RTL8192SE
1880 DM_TXPowerTracking92SDirectCall(dev);
1881#else
1882
1883 queue_delayed_work_rsl(priv->priv_wq,&priv->txpower_tracking_wq,0);
1884#endif
1885 TM_Trigger = 0;
1886 }
1887
1888 }
1889#endif
1890
1891#ifdef RTL8192SE
1892void DM_TXPowerTracking92SDirectCall(struct net_device *dev)
1893{
1894 dm_TXPowerTrackingCallback_ThermalMeter(dev);
1895 }
1896#endif
1897
1898static void dm_check_txpower_tracking(struct net_device *dev)
1899{
1900#ifdef RTL8192E
1901 struct r8192_priv *priv = rtllib_priv(dev);
1902#endif
1903#ifdef RTL8190P
1904 dm_CheckTXPowerTracking_TSSI(dev);
1905#elif defined RTL8192E
1906 if (priv->IC_Cut >= IC_VersionCut_D)
1907 dm_CheckTXPowerTracking_TSSI(dev);
1908 else
1909 dm_CheckTXPowerTracking_ThermalMeter(dev);
1910#elif defined RTL8192SE
1911 dm_CheckTXPowerTracking_ThermalMeter(dev);
1912#endif
1913
1914}
1915
1916#ifndef RTL8192SE
1917static void dm_CCKTxPowerAdjust_TSSI(struct net_device *dev, bool bInCH14)
1918{
1919 u32 TempVal;
1920 struct r8192_priv *priv = rtllib_priv(dev);
1921 TempVal = 0;
1922 if (!bInCH14){
1923 TempVal = (u32)(priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[0] +
1924 (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[1]<<8)) ;
1925
1926 rtl8192_setBBreg(dev, rCCK0_TxFilter1,bMaskHWord, TempVal);
1927 TempVal = 0;
1928 TempVal = (u32)(priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[2] +
1929 (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[3]<<8) +
1930 (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[4]<<16 )+
1931 (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[5]<<24));
1932 rtl8192_setBBreg(dev, rCCK0_TxFilter2,bMaskDWord, TempVal);
1933 TempVal = 0;
1934 TempVal = (u32)(priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[6] +
1935 (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[7]<<8)) ;
1936
1937 rtl8192_setBBreg(dev, rCCK0_DebugPort,bMaskLWord, TempVal);
1938 }
1939 else
1940 {
1941 TempVal = (u32)(priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[0] +
1942 (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[1]<<8)) ;
1943
1944 rtl8192_setBBreg(dev, rCCK0_TxFilter1,bMaskHWord, TempVal);
1945 TempVal = 0;
1946 TempVal = (u32)(priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[2] +
1947 (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[3]<<8) +
1948 (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[4]<<16 )+
1949 (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[5]<<24));
1950 rtl8192_setBBreg(dev, rCCK0_TxFilter2,bMaskDWord, TempVal);
1951 TempVal = 0;
1952 TempVal = (u32)(priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[6] +
1953 (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[7]<<8)) ;
1954
1955 rtl8192_setBBreg(dev, rCCK0_DebugPort,bMaskLWord, TempVal);
1956 }
1957
1958
1959}
1960#endif
1961#ifdef RTL8192E
1962static void dm_CCKTxPowerAdjust_ThermalMeter(struct net_device *dev, bool bInCH14)
1963{
1964 u32 TempVal;
1965 struct r8192_priv *priv = rtllib_priv(dev);
1966
1967 TempVal = 0;
1968 if (!bInCH14)
1969 {
1970 TempVal = CCKSwingTable_Ch1_Ch13[priv->CCK_index][0] +
1971 (CCKSwingTable_Ch1_Ch13[priv->CCK_index][1]<<8) ;
1972 rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
1973 RT_TRACE(COMP_POWER_TRACKING, "CCK not chnl 14, reg 0x%x = 0x%x\n",
1974 rCCK0_TxFilter1, TempVal);
1975 TempVal = 0;
1976 TempVal = CCKSwingTable_Ch1_Ch13[priv->CCK_index][2] +
1977 (CCKSwingTable_Ch1_Ch13[priv->CCK_index][3]<<8) +
1978 (CCKSwingTable_Ch1_Ch13[priv->CCK_index][4]<<16 )+
1979 (CCKSwingTable_Ch1_Ch13[priv->CCK_index][5]<<24);
1980 rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
1981 RT_TRACE(COMP_POWER_TRACKING, "CCK not chnl 14, reg 0x%x = 0x%x\n",
1982 rCCK0_TxFilter2, TempVal);
1983 TempVal = 0;
1984 TempVal = CCKSwingTable_Ch1_Ch13[priv->CCK_index][6] +
1985 (CCKSwingTable_Ch1_Ch13[priv->CCK_index][7]<<8) ;
1986
1987 rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
1988 RT_TRACE(COMP_POWER_TRACKING, "CCK not chnl 14, reg 0x%x = 0x%x\n",
1989 rCCK0_DebugPort, TempVal);
1990 }
1991 else
1992 {
1993 TempVal = CCKSwingTable_Ch14[priv->CCK_index][0] +
1994 (CCKSwingTable_Ch14[priv->CCK_index][1]<<8) ;
1995
1996 rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
1997 RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n",
1998 rCCK0_TxFilter1, TempVal);
1999 TempVal = 0;
2000 TempVal = CCKSwingTable_Ch14[priv->CCK_index][2] +
2001 (CCKSwingTable_Ch14[priv->CCK_index][3]<<8) +
2002 (CCKSwingTable_Ch14[priv->CCK_index][4]<<16 )+
2003 (CCKSwingTable_Ch14[priv->CCK_index][5]<<24);
2004 rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
2005 RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n",
2006 rCCK0_TxFilter2, TempVal);
2007 TempVal = 0;
2008 TempVal = CCKSwingTable_Ch14[priv->CCK_index][6] +
2009 (CCKSwingTable_Ch14[priv->CCK_index][7]<<8) ;
2010
2011 rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
2012 RT_TRACE(COMP_POWER_TRACKING,"CCK chnl 14, reg 0x%x = 0x%x\n",
2013 rCCK0_DebugPort, TempVal);
2014 }
2015 }
2016#endif
2017
2018#ifndef RTL8192SE
2019extern void dm_cck_txpower_adjust(
2020 struct net_device *dev,
2021 bool binch14
2022)
2023{
2024#ifndef RTL8190P
2025 struct r8192_priv *priv = rtllib_priv(dev);
2026#endif
2027#ifdef RTL8190P
2028 dm_CCKTxPowerAdjust_TSSI(dev, binch14);
2029#else
2030 if (priv->IC_Cut >= IC_VersionCut_D)
2031 dm_CCKTxPowerAdjust_TSSI(dev, binch14);
2032 else
2033 dm_CCKTxPowerAdjust_ThermalMeter(dev, binch14);
2034#endif
2035}
2036#endif
2037
2038
2039#if defined(RTL8192E)||defined(RTL8190P)
2040static void dm_txpower_reset_recovery(
2041 struct net_device *dev
2042)
2043{
2044 struct r8192_priv *priv = rtllib_priv(dev);
2045
2046 RT_TRACE(COMP_POWER_TRACKING, "Start Reset Recovery ==>\n");
2047 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex].txbbgain_value);
2048 RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in 0xc80 is %08x\n",priv->txbbgain_table[priv->rfa_txpowertrackingindex].txbbgain_value);
2049 RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in RFA_txPowerTrackingIndex is %x\n",priv->rfa_txpowertrackingindex);
2050 RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery : RF A I/Q Amplify Gain is %ld\n",priv->txbbgain_table[priv->rfa_txpowertrackingindex].txbb_iq_amplifygain);
2051 RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: CCK Attenuation is %d dB\n",priv->CCKPresentAttentuation);
2052 dm_cck_txpower_adjust(dev,priv->bcck_in_ch14);
2053
2054 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex].txbbgain_value);
2055 RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in 0xc90 is %08x\n",priv->txbbgain_table[priv->rfc_txpowertrackingindex].txbbgain_value);
2056 RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in RFC_txPowerTrackingIndex is %x\n",priv->rfc_txpowertrackingindex);
2057 RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery : RF C I/Q Amplify Gain is %ld\n",priv->txbbgain_table[priv->rfc_txpowertrackingindex].txbb_iq_amplifygain);
2058
2059}
2060
2061extern void dm_restore_dynamic_mechanism_state(struct net_device *dev)
2062{
2063 struct r8192_priv *priv = rtllib_priv(dev);
2064 u32 reg_ratr = priv->rate_adaptive.last_ratr;
2065
2066 if (IS_NIC_DOWN(priv)){
2067 RT_TRACE(COMP_RATE, "<---- dm_restore_dynamic_mechanism_state(): driver is going to unload\n");
2068 return;
2069 }
2070
2071 if (priv->rate_adaptive.rate_adaptive_disabled)
2072 return;
2073 if ( !(priv->rtllib->mode==WIRELESS_MODE_N_24G ||
2074 priv->rtllib->mode==WIRELESS_MODE_N_5G))
2075 return;
2076 {
2077 u32 ratr_value;
2078 ratr_value = reg_ratr;
2079 if (priv->rf_type == RF_1T2R)
2080 {
2081 ratr_value &=~ (RATE_ALL_OFDM_2SS);
2082 }
2083 write_nic_dword(dev, RATR0, ratr_value);
2084 write_nic_byte(dev, UFWP, 1);
2085 }
2086 if (priv->btxpower_trackingInit && priv->btxpower_tracking){
2087 dm_txpower_reset_recovery(dev);
2088 }
2089
2090 dm_bb_initialgain_restore(dev);
2091
2092}
2093
2094static void dm_bb_initialgain_restore(struct net_device *dev)
2095{
2096 struct r8192_priv *priv = rtllib_priv(dev);
2097 u32 bit_mask = 0x7f;
2098
2099 if (dm_digtable.dig_algorithm == DIG_ALGO_BY_RSSI)
2100 return;
2101
2102 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8);
2103 rtl8192_setBBreg(dev, rOFDM0_XAAGCCore1, bit_mask, (u32)priv->initgain_backup.xaagccore1);
2104 rtl8192_setBBreg(dev, rOFDM0_XBAGCCore1, bit_mask, (u32)priv->initgain_backup.xbagccore1);
2105 rtl8192_setBBreg(dev, rOFDM0_XCAGCCore1, bit_mask, (u32)priv->initgain_backup.xcagccore1);
2106 rtl8192_setBBreg(dev, rOFDM0_XDAGCCore1, bit_mask, (u32)priv->initgain_backup.xdagccore1);
2107 bit_mask = bMaskByte2;
2108 rtl8192_setBBreg(dev, rCCK0_CCA, bit_mask, (u32)priv->initgain_backup.cca);
2109
2110 RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc50 is %x\n",priv->initgain_backup.xaagccore1);
2111 RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc58 is %x\n",priv->initgain_backup.xbagccore1);
2112 RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc60 is %x\n",priv->initgain_backup.xcagccore1);
2113 RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc68 is %x\n",priv->initgain_backup.xdagccore1);
2114 RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xa0a is %x\n",priv->initgain_backup.cca);
2115 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1);
2116
2117}
2118
2119
2120extern void dm_backup_dynamic_mechanism_state(struct net_device *dev)
2121{
2122 struct r8192_priv *priv = rtllib_priv(dev);
2123
2124 priv->bswitch_fsync = false;
2125 priv->bfsync_processing = false;
2126 dm_bb_initialgain_backup(dev);
2127
2128}
2129
2130
2131static void dm_bb_initialgain_backup(struct net_device *dev)
2132{
2133 struct r8192_priv *priv = rtllib_priv(dev);
2134 u32 bit_mask = bMaskByte0;
2135
2136 if (dm_digtable.dig_algorithm == DIG_ALGO_BY_RSSI)
2137 return;
2138
2139 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8);
2140 priv->initgain_backup.xaagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XAAGCCore1, bit_mask);
2141 priv->initgain_backup.xbagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XBAGCCore1, bit_mask);
2142 priv->initgain_backup.xcagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XCAGCCore1, bit_mask);
2143 priv->initgain_backup.xdagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XDAGCCore1, bit_mask);
2144 bit_mask = bMaskByte2;
2145 priv->initgain_backup.cca = (u8)rtl8192_QueryBBReg(dev, rCCK0_CCA, bit_mask);
2146
2147 RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc50 is %x\n",priv->initgain_backup.xaagccore1);
2148 RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc58 is %x\n",priv->initgain_backup.xbagccore1);
2149 RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc60 is %x\n",priv->initgain_backup.xcagccore1);
2150 RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc68 is %x\n",priv->initgain_backup.xdagccore1);
2151 RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xa0a is %x\n",priv->initgain_backup.cca);
2152
2153}
2154
2155#endif
2156extern void dm_change_dynamic_initgain_thresh(struct net_device *dev,
2157 u32 dm_type,
2158 u32 dm_value)
2159{
2160#ifdef RTL8192SE
2161 struct r8192_priv *priv = rtllib_priv(dev);
2162 if (dm_type == DIG_TYPE_THRESH_HIGHPWR_HIGH)
2163 priv->MidHighPwrTHR_L2 = (u8)dm_value;
2164 else if (dm_type == DIG_TYPE_THRESH_HIGHPWR_LOW)
2165 priv->MidHighPwrTHR_L1 = (u8)dm_value;
2166 return;
2167#endif
2168 if (dm_type == DIG_TYPE_THRESH_HIGH)
2169 {
2170 dm_digtable.rssi_high_thresh = dm_value;
2171 }
2172 else if (dm_type == DIG_TYPE_THRESH_LOW)
2173 {
2174 dm_digtable.rssi_low_thresh = dm_value;
2175 }
2176 else if (dm_type == DIG_TYPE_THRESH_HIGHPWR_HIGH)
2177 {
2178 dm_digtable.rssi_high_power_highthresh = dm_value;
2179 }
2180 else if (dm_type == DIG_TYPE_THRESH_HIGHPWR_HIGH)
2181 {
2182 dm_digtable.rssi_high_power_highthresh = dm_value;
2183 }
2184 else if (dm_type == DIG_TYPE_ENABLE)
2185 {
2186 dm_digtable.dig_state = DM_STA_DIG_MAX;
2187 dm_digtable.dig_enable_flag = true;
2188 }
2189 else if (dm_type == DIG_TYPE_DISABLE)
2190 {
2191 dm_digtable.dig_state = DM_STA_DIG_MAX;
2192 dm_digtable.dig_enable_flag = false;
2193 }
2194 else if (dm_type == DIG_TYPE_DBG_MODE)
2195 {
2196 if (dm_value >= DM_DBG_MAX)
2197 dm_value = DM_DBG_OFF;
2198 dm_digtable.dbg_mode = (u8)dm_value;
2199 }
2200 else if (dm_type == DIG_TYPE_RSSI)
2201 {
2202 if (dm_value > 100)
2203 dm_value = 30;
2204 dm_digtable.rssi_val = (long)dm_value;
2205 }
2206 else if (dm_type == DIG_TYPE_ALGORITHM)
2207 {
2208 if (dm_value >= DIG_ALGO_MAX)
2209 dm_value = DIG_ALGO_BY_FALSE_ALARM;
2210 if (dm_digtable.dig_algorithm != (u8)dm_value)
2211 dm_digtable.dig_algorithm_switch = 1;
2212 dm_digtable.dig_algorithm = (u8)dm_value;
2213 }
2214 else if (dm_type == DIG_TYPE_BACKOFF)
2215 {
2216 if (dm_value > 30)
2217 dm_value = 30;
2218 dm_digtable.backoff_val = (u8)dm_value;
2219 }
2220 else if (dm_type == DIG_TYPE_RX_GAIN_MIN)
2221 {
2222 if (dm_value == 0)
2223 dm_value = 0x1;
2224 dm_digtable.rx_gain_range_min = (u8)dm_value;
2225 }
2226 else if (dm_type == DIG_TYPE_RX_GAIN_MAX)
2227 {
2228 if (dm_value > 0x50)
2229 dm_value = 0x50;
2230 dm_digtable.rx_gain_range_max = (u8)dm_value;
2231 }
2232}
2233extern void
2234dm_change_fsync_setting(
2235 struct net_device *dev,
2236 s32 DM_Type,
2237 s32 DM_Value)
2238{
2239 struct r8192_priv *priv = rtllib_priv(dev);
2240
2241 if (DM_Type == 0)
2242 {
2243 if (DM_Value > 1)
2244 DM_Value = 1;
2245 priv->framesyncMonitor = (u8)DM_Value;
2246 }
2247}
2248
2249extern void
2250dm_change_rxpath_selection_setting(
2251 struct net_device *dev,
2252 s32 DM_Type,
2253 s32 DM_Value)
2254{
2255 struct r8192_priv *priv = rtllib_priv(dev);
2256 prate_adaptive pRA = (prate_adaptive)&(priv->rate_adaptive);
2257
2258
2259 if (DM_Type == 0)
2260 {
2261 if (DM_Value > 1)
2262 DM_Value = 1;
2263 DM_RxPathSelTable.Enable = (u8)DM_Value;
2264 }
2265 else if (DM_Type == 1)
2266 {
2267 if (DM_Value > 1)
2268 DM_Value = 1;
2269 DM_RxPathSelTable.DbgMode = (u8)DM_Value;
2270 }
2271 else if (DM_Type == 2)
2272 {
2273 if (DM_Value > 40)
2274 DM_Value = 40;
2275 DM_RxPathSelTable.SS_TH_low = (u8)DM_Value;
2276 }
2277 else if (DM_Type == 3)
2278 {
2279 if (DM_Value > 25)
2280 DM_Value = 25;
2281 DM_RxPathSelTable.diff_TH = (u8)DM_Value;
2282 }
2283 else if (DM_Type == 4)
2284 {
2285 if (DM_Value >= CCK_Rx_Version_MAX)
2286 DM_Value = CCK_Rx_Version_1;
2287 DM_RxPathSelTable.cck_method= (u8)DM_Value;
2288 }
2289 else if (DM_Type == 10)
2290 {
2291 if (DM_Value > 100)
2292 DM_Value = 50;
2293 DM_RxPathSelTable.rf_rssi[0] = (u8)DM_Value;
2294 }
2295 else if (DM_Type == 11)
2296 {
2297 if (DM_Value > 100)
2298 DM_Value = 50;
2299 DM_RxPathSelTable.rf_rssi[1] = (u8)DM_Value;
2300 }
2301 else if (DM_Type == 12)
2302 {
2303 if (DM_Value > 100)
2304 DM_Value = 50;
2305 DM_RxPathSelTable.rf_rssi[2] = (u8)DM_Value;
2306 }
2307 else if (DM_Type == 13)
2308 {
2309 if (DM_Value > 100)
2310 DM_Value = 50;
2311 DM_RxPathSelTable.rf_rssi[3] = (u8)DM_Value;
2312 }
2313 else if (DM_Type == 20)
2314 {
2315 if (DM_Value > 1)
2316 DM_Value = 1;
2317 pRA->ping_rssi_enable = (u8)DM_Value;
2318 }
2319 else if (DM_Type == 21)
2320 {
2321 if (DM_Value > 30)
2322 DM_Value = 30;
2323 pRA->ping_rssi_thresh_for_ra = DM_Value;
2324 }
2325}
2326
2327static void dm_dig_init(struct net_device *dev)
2328{
2329 struct r8192_priv *priv = rtllib_priv(dev);
2330 dm_digtable.dig_enable_flag = true;
2331 dm_digtable.Backoff_Enable_Flag = true;
2332
2333#ifdef RTL8192SE
2334 if ((priv->DM_Type == DM_Type_ByDriver) && (priv->pFirmware->FirmwareVersion >= 0x3c))
2335 dm_digtable.dig_algorithm = DIG_ALGO_BY_TOW_PORT;
2336 else
2337 dm_digtable.dig_algorithm = DIG_ALGO_BEFORE_CONNECT_BY_RSSI_AND_ALARM;
2338#else
2339 dm_digtable.dig_algorithm = DIG_ALGO_BY_RSSI;
2340#endif
2341
2342 dm_digtable.Dig_TwoPort_Algorithm = DIG_TWO_PORT_ALGO_RSSI;
2343 dm_digtable.Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX;
2344 dm_digtable.dbg_mode = DM_DBG_OFF;
2345 dm_digtable.dig_algorithm_switch = 0;
2346
2347 dm_digtable.dig_state = DM_STA_DIG_MAX;
2348 dm_digtable.dig_highpwr_state = DM_STA_DIG_MAX;
2349 dm_digtable.CurSTAConnectState = dm_digtable.PreSTAConnectState = DIG_STA_DISCONNECT;
2350 dm_digtable.CurAPConnectState = dm_digtable.PreAPConnectState = DIG_AP_DISCONNECT;
2351 dm_digtable.initialgain_lowerbound_state = false;
2352
2353 dm_digtable.rssi_low_thresh = DM_DIG_THRESH_LOW;
2354 dm_digtable.rssi_high_thresh = DM_DIG_THRESH_HIGH;
2355
2356 dm_digtable.FALowThresh = DM_FALSEALARM_THRESH_LOW;
2357 dm_digtable.FAHighThresh = DM_FALSEALARM_THRESH_HIGH;
2358
2359 dm_digtable.rssi_high_power_lowthresh = DM_DIG_HIGH_PWR_THRESH_LOW;
2360 dm_digtable.rssi_high_power_highthresh = DM_DIG_HIGH_PWR_THRESH_HIGH;
2361
2362 dm_digtable.rssi_val = 50;
2363 dm_digtable.backoff_val = DM_DIG_BACKOFF;
2364 dm_digtable.rx_gain_range_max = DM_DIG_MAX;
2365 if (priv->CustomerID == RT_CID_819x_Netcore)
2366 dm_digtable.rx_gain_range_min = DM_DIG_MIN_Netcore;
2367 else
2368 dm_digtable.rx_gain_range_min = DM_DIG_MIN;
2369
2370 dm_digtable.BackoffVal_range_max = DM_DIG_BACKOFF_MAX;
2371 dm_digtable.BackoffVal_range_min = DM_DIG_BACKOFF_MIN;
2372}
2373
2374void dm_FalseAlarmCounterStatistics(struct net_device *dev)
2375{
2376 struct r8192_priv *priv = rtllib_priv(dev);
2377 u32 ret_value;
2378 PFALSE_ALARM_STATISTICS FalseAlmCnt = &(priv->FalseAlmCnt);
2379
2380 ret_value = rtl8192_QueryBBReg(dev, rOFDM_PHYCounter1, bMaskDWord);
2381 FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16);
2382
2383 ret_value = rtl8192_QueryBBReg(dev, rOFDM_PHYCounter2, bMaskDWord);
2384 FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff);
2385 FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16);
2386 ret_value = rtl8192_QueryBBReg(dev, rOFDM_PHYCounter3, bMaskDWord);
2387 FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff);
2388
2389 FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal +
2390 FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail;
2391
2392 ret_value = rtl8192_QueryBBReg(dev, 0xc64, bMaskDWord);
2393 FalseAlmCnt->Cnt_Cck_fail = (ret_value&0xffff);
2394 FalseAlmCnt->Cnt_all = (FalseAlmCnt->Cnt_Parity_Fail +
2395 FalseAlmCnt->Cnt_Rate_Illegal +
2396 FalseAlmCnt->Cnt_Crc8_fail +
2397 FalseAlmCnt->Cnt_Mcs_fail +
2398 FalseAlmCnt->Cnt_Cck_fail);
2399
2400 RT_TRACE(COMP_DIG, "Cnt_Ofdm_fail = %d, Cnt_Cck_fail = %d, Cnt_all = %d\n",
2401 FalseAlmCnt->Cnt_Ofdm_fail, FalseAlmCnt->Cnt_Cck_fail , FalseAlmCnt->Cnt_all);
2402}
2403
2404#ifdef RTL8192SE
2405static void dm_CtrlInitGainAPByFalseAlarm(struct net_device *dev)
2406{
2407 static u8 binitialized = false;
2408
2409 {
2410 binitialized = false;
2411 dm_digtable.Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX;
2412 return;
2413 }
2414}
2415#endif
2416
2417static void dm_ctrl_initgain_byrssi(struct net_device *dev)
2418{
2419
2420 if (dm_digtable.dig_enable_flag == false)
2421 return;
2422
2423 if (dm_digtable.dig_algorithm == DIG_ALGO_BY_FALSE_ALARM)
2424 dm_ctrl_initgain_byrssi_by_fwfalse_alarm(dev);
2425 else if (dm_digtable.dig_algorithm == DIG_ALGO_BY_RSSI)
2426 dm_ctrl_initgain_byrssi_by_driverrssi(dev);
2427#ifdef RTL8192SE
2428 else if (dm_digtable.dig_algorithm == DIG_ALGO_BEFORE_CONNECT_BY_RSSI_AND_ALARM)
2429 dm_CtrlInitGainBeforeConnectByRssiAndFalseAlarm(dev);
2430 else if (dm_digtable.dig_algorithm == DIG_ALGO_BY_TOW_PORT)
2431 dm_CtrlInitGainByTwoPort(dev);
2432#endif
2433 else
2434 return;
2435}
2436
2437#ifdef RTL8192SE
2438static void dm_CtrlInitGainByTwoPort(struct net_device *dev)
2439{
2440 struct r8192_priv *priv = rtllib_priv(dev);
2441
2442 if (rtllib_act_scanning(priv->rtllib,true) == true)
2443 return;
2444
2445 if ((priv->rtllib->state > RTLLIB_NOLINK) && (priv->rtllib->state < RTLLIB_LINKED))
2446 dm_digtable.CurSTAConnectState = DIG_STA_BEFORE_CONNECT;
2447 else if ((priv->rtllib->state == RTLLIB_LINKED) ||(priv->rtllib->state == RTLLIB_LINKED_SCANNING))
2448 dm_digtable.CurSTAConnectState = DIG_STA_CONNECT;
2449 else
2450 dm_digtable.CurSTAConnectState = DIG_STA_DISCONNECT;
2451
2452 dm_digtable.rssi_val = priv->undecorated_smoothed_pwdb;
2453
2454 if (dm_digtable.CurSTAConnectState != DIG_STA_DISCONNECT)
2455 {
2456 if (dm_digtable.Dig_TwoPort_Algorithm == DIG_TWO_PORT_ALGO_FALSE_ALARM)
2457 {
2458 dm_digtable.Dig_TwoPort_Algorithm = DIG_TWO_PORT_ALGO_RSSI;
2459 priv->rtllib->SetFwCmdHandler(dev, FW_CMD_DIG_MODE_SS);
2460 }
2461 }
2462
2463 dm_FalseAlarmCounterStatistics(dev);
2464 dm_initial_gain_STABeforeConnect(dev);
2465 dm_CtrlInitGainAPByFalseAlarm(dev);
2466
2467 dm_digtable.PreSTAConnectState = dm_digtable.CurSTAConnectState;
2468}
2469#endif
2470
2471/*-----------------------------------------------------------------------------
2472 * Function: dm_CtrlInitGainBeforeConnectByRssiAndFalseAlarm()
2473 *
2474 * Overview: Driver monitor RSSI and False Alarm to change initial gain.
2475 Only change initial gain during link in progress.
2476 *
2477 * Input: IN PADAPTER pAdapter
2478 *
2479 * Output: NONE
2480 *
2481 * Return: NONE
2482 *
2483 * Revised History:
2484 * When Who Remark
2485 * 03/04/2009 hpfan Create Version 0.
2486 *
2487 *---------------------------------------------------------------------------*/
2488
2489#ifdef RTL8192SE
2490static void dm_CtrlInitGainBeforeConnectByRssiAndFalseAlarm(struct net_device *dev)
2491{
2492 struct r8192_priv *priv = rtllib_priv(dev);
2493
2494 if (rtllib_act_scanning(priv->rtllib,true) == true)
2495 return;
2496
2497 if ((priv->rtllib->state > RTLLIB_NOLINK) && (priv->rtllib->state < RTLLIB_LINKED))
2498 dm_digtable.CurSTAConnectState = DIG_STA_BEFORE_CONNECT;
2499 else if ((priv->rtllib->state == RTLLIB_LINKED) ||(priv->rtllib->state == RTLLIB_LINKED_SCANNING))
2500 dm_digtable.CurSTAConnectState = DIG_STA_CONNECT;
2501 else
2502 dm_digtable.CurSTAConnectState = DIG_STA_DISCONNECT;
2503
2504 if (dm_digtable.dbg_mode == DM_DBG_OFF)
2505 dm_digtable.rssi_val = priv->undecorated_smoothed_pwdb;
2506
2507 dm_FalseAlarmCounterStatistics(dev);
2508 dm_initial_gain_STABeforeConnect(dev);
2509 dm_digtable.PreSTAConnectState = dm_digtable.CurSTAConnectState;
2510
2511}
2512#endif
2513static void dm_ctrl_initgain_byrssi_by_driverrssi(
2514 struct net_device *dev)
2515{
2516 struct r8192_priv *priv = rtllib_priv(dev);
2517 u8 i;
2518 static u8 fw_dig=0;
2519
2520 if (dm_digtable.dig_enable_flag == false)
2521 return;
2522
2523 if (dm_digtable.dig_algorithm_switch)
2524 fw_dig = 0;
2525 if (fw_dig <= 3)
2526 {
2527 for (i=0; i<3; i++)
2528 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8);
2529 fw_dig++;
2530 dm_digtable.dig_state = DM_STA_DIG_OFF;
2531 }
2532
2533 if (priv->rtllib->state == RTLLIB_LINKED)
2534 dm_digtable.CurSTAConnectState = DIG_STA_CONNECT;
2535 else
2536 dm_digtable.CurSTAConnectState = DIG_STA_DISCONNECT;
2537
2538
2539 if (dm_digtable.dbg_mode == DM_DBG_OFF)
2540 dm_digtable.rssi_val = priv->undecorated_smoothed_pwdb;
2541 dm_initial_gain(dev);
2542 dm_pd_th(dev);
2543 dm_cs_ratio(dev);
2544 if (dm_digtable.dig_algorithm_switch)
2545 dm_digtable.dig_algorithm_switch = 0;
2546 dm_digtable.PreSTAConnectState = dm_digtable.CurSTAConnectState;
2547
2548}
2549
2550static void dm_ctrl_initgain_byrssi_by_fwfalse_alarm(
2551 struct net_device *dev)
2552{
2553 struct r8192_priv *priv = rtllib_priv(dev);
2554 static u32 reset_cnt = 0;
2555 u8 i;
2556
2557 if (dm_digtable.dig_enable_flag == false)
2558 return;
2559
2560 if (dm_digtable.dig_algorithm_switch)
2561 {
2562 dm_digtable.dig_state = DM_STA_DIG_MAX;
2563 for (i=0; i<3; i++)
2564 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1);
2565 dm_digtable.dig_algorithm_switch = 0;
2566 }
2567
2568 if (priv->rtllib->state != RTLLIB_LINKED)
2569 return;
2570
2571 if ((priv->undecorated_smoothed_pwdb > dm_digtable.rssi_low_thresh) &&
2572 (priv->undecorated_smoothed_pwdb < dm_digtable.rssi_high_thresh))
2573 {
2574 return;
2575 }
2576 if ((priv->undecorated_smoothed_pwdb <= dm_digtable.rssi_low_thresh))
2577 {
2578 if (dm_digtable.dig_state == DM_STA_DIG_OFF &&
2579 (priv->reset_count == reset_cnt))
2580 {
2581 return;
2582 }
2583 else
2584 {
2585 reset_cnt = priv->reset_count;
2586 }
2587
2588 dm_digtable.dig_highpwr_state = DM_STA_DIG_MAX;
2589 dm_digtable.dig_state = DM_STA_DIG_OFF;
2590
2591 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8);
2592
2593 write_nic_byte(dev, rOFDM0_XAAGCCore1, 0x17);
2594 write_nic_byte(dev, rOFDM0_XBAGCCore1, 0x17);
2595 write_nic_byte(dev, rOFDM0_XCAGCCore1, 0x17);
2596 write_nic_byte(dev, rOFDM0_XDAGCCore1, 0x17);
2597
2598 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
2599 {
2600 #ifdef RTL8190P
2601 write_nic_byte(dev, rOFDM0_RxDetector1, 0x40);
2602 #else
2603 write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x00);
2604 #endif
2605 /*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
2606 write_nic_byte(pAdapter, rOFDM0_RxDetector1, 0x40);
2607 */
2608
2609
2610 }
2611 else
2612 write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
2613
2614 write_nic_byte(dev, 0xa0a, 0x08);
2615
2616 return;
2617
2618 }
2619
2620 if ((priv->undecorated_smoothed_pwdb >= dm_digtable.rssi_high_thresh) )
2621 {
2622 u8 reset_flag = 0;
2623
2624 if (dm_digtable.dig_state == DM_STA_DIG_ON &&
2625 (priv->reset_count == reset_cnt))
2626 {
2627 dm_ctrl_initgain_byrssi_highpwr(dev);
2628 return;
2629 }
2630 else
2631 {
2632 if (priv->reset_count != reset_cnt)
2633 reset_flag = 1;
2634
2635 reset_cnt = priv->reset_count;
2636 }
2637
2638 dm_digtable.dig_state = DM_STA_DIG_ON;
2639
2640 if (reset_flag == 1)
2641 {
2642 write_nic_byte(dev, rOFDM0_XAAGCCore1, 0x2c);
2643 write_nic_byte(dev, rOFDM0_XBAGCCore1, 0x2c);
2644 write_nic_byte(dev, rOFDM0_XCAGCCore1, 0x2c);
2645 write_nic_byte(dev, rOFDM0_XDAGCCore1, 0x2c);
2646 }
2647 else
2648 {
2649 write_nic_byte(dev, rOFDM0_XAAGCCore1, 0x20);
2650 write_nic_byte(dev, rOFDM0_XBAGCCore1, 0x20);
2651 write_nic_byte(dev, rOFDM0_XCAGCCore1, 0x20);
2652 write_nic_byte(dev, rOFDM0_XDAGCCore1, 0x20);
2653 }
2654
2655 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
2656 {
2657 #ifdef RTL8190P
2658 write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
2659 #else
2660 write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x20);
2661 #endif
2662 /*
2663 else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
2664 write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
2665 */
2666
2667 }
2668 else
2669 write_nic_byte(dev, rOFDM0_RxDetector1, 0x44);
2670
2671 write_nic_byte(dev, 0xa0a, 0xcd);
2672
2673
2674 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1);
2675
2676 }
2677
2678 dm_ctrl_initgain_byrssi_highpwr(dev);
2679
2680}
2681
2682
2683static void dm_ctrl_initgain_byrssi_highpwr(
2684 struct net_device * dev)
2685{
2686 struct r8192_priv *priv = rtllib_priv(dev);
2687 static u32 reset_cnt_highpwr = 0;
2688
2689 if ((priv->undecorated_smoothed_pwdb > dm_digtable.rssi_high_power_lowthresh) &&
2690 (priv->undecorated_smoothed_pwdb < dm_digtable.rssi_high_power_highthresh))
2691 {
2692 return;
2693 }
2694
2695 if (priv->undecorated_smoothed_pwdb >= dm_digtable.rssi_high_power_highthresh)
2696 {
2697 if (dm_digtable.dig_highpwr_state == DM_STA_DIG_ON &&
2698 (priv->reset_count == reset_cnt_highpwr))
2699 return;
2700 else
2701 dm_digtable.dig_highpwr_state = DM_STA_DIG_ON;
2702
2703 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
2704 {
2705 #ifdef RTL8190P
2706 write_nic_byte(dev, rOFDM0_RxDetector1, 0x41);
2707 #else
2708 write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x10);
2709 #endif
2710
2711 /*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
2712 write_nic_byte(dev, rOFDM0_RxDetector1, 0x41);
2713 */
2714
2715 }
2716 else
2717 write_nic_byte(dev, rOFDM0_RxDetector1, 0x43);
2718 }
2719 else
2720 {
2721 if (dm_digtable.dig_highpwr_state == DM_STA_DIG_OFF&&
2722 (priv->reset_count == reset_cnt_highpwr))
2723 return;
2724 else
2725 dm_digtable.dig_highpwr_state = DM_STA_DIG_OFF;
2726
2727 if (priv->undecorated_smoothed_pwdb < dm_digtable.rssi_high_power_lowthresh &&
2728 priv->undecorated_smoothed_pwdb >= dm_digtable.rssi_high_thresh)
2729 {
2730 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
2731 {
2732 #ifdef RTL8190P
2733 write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
2734 #else
2735 write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x20);
2736 #endif
2737 /*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
2738 write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
2739 */
2740
2741 }
2742 else
2743 write_nic_byte(dev, rOFDM0_RxDetector1, 0x44);
2744 }
2745 }
2746
2747 reset_cnt_highpwr = priv->reset_count;
2748
2749}
2750
2751
2752static void dm_initial_gain(
2753 struct net_device * dev)
2754{
2755 struct r8192_priv *priv = rtllib_priv(dev);
2756 u8 initial_gain=0;
2757 static u8 initialized=0, force_write=0;
2758 static u32 reset_cnt=0;
2759
2760 if (dm_digtable.dig_algorithm_switch)
2761 {
2762 initialized = 0;
2763 reset_cnt = 0;
2764 }
2765
2766 if (rtllib_act_scanning(priv->rtllib,true) == true)
2767 {
2768 force_write = 1;
2769 return;
2770 }
2771
2772 if (dm_digtable.PreSTAConnectState == dm_digtable.CurSTAConnectState)
2773 {
2774 if (dm_digtable.CurSTAConnectState == DIG_STA_CONNECT)
2775 {
2776 if ((dm_digtable.rssi_val+10-dm_digtable.backoff_val) > dm_digtable.rx_gain_range_max)
2777 dm_digtable.cur_ig_value = dm_digtable.rx_gain_range_max;
2778 else if ((dm_digtable.rssi_val+10-dm_digtable.backoff_val) < dm_digtable.rx_gain_range_min)
2779 dm_digtable.cur_ig_value = dm_digtable.rx_gain_range_min;
2780 else
2781 dm_digtable.cur_ig_value = dm_digtable.rssi_val+10-dm_digtable.backoff_val;
2782 }
2783 else
2784 {
2785 if (dm_digtable.cur_ig_value == 0)
2786 dm_digtable.cur_ig_value = priv->DefaultInitialGain[0];
2787 else
2788 dm_digtable.cur_ig_value = dm_digtable.pre_ig_value;
2789 }
2790 }
2791 else
2792 {
2793 dm_digtable.cur_ig_value = priv->DefaultInitialGain[0];
2794 dm_digtable.pre_ig_value = 0;
2795 }
2796
2797 if (priv->reset_count != reset_cnt)
2798 {
2799 force_write = 1;
2800 reset_cnt = priv->reset_count;
2801 }
2802
2803 if (dm_digtable.pre_ig_value != read_nic_byte(dev, rOFDM0_XAAGCCore1))
2804 force_write = 1;
2805
2806 {
2807 if ((dm_digtable.pre_ig_value != dm_digtable.cur_ig_value)
2808 || !initialized || force_write)
2809 {
2810 initial_gain = (u8)dm_digtable.cur_ig_value;
2811 write_nic_byte(dev, rOFDM0_XAAGCCore1, initial_gain);
2812 write_nic_byte(dev, rOFDM0_XBAGCCore1, initial_gain);
2813 write_nic_byte(dev, rOFDM0_XCAGCCore1, initial_gain);
2814 write_nic_byte(dev, rOFDM0_XDAGCCore1, initial_gain);
2815 dm_digtable.pre_ig_value = dm_digtable.cur_ig_value;
2816 initialized = 1;
2817 force_write = 0;
2818 }
2819 }
2820}
2821
2822void dm_initial_gain_STABeforeConnect(
2823 struct net_device * dev)
2824{
2825 struct r8192_priv *priv = rtllib_priv(dev);
2826 u8 initial_gain=0;
2827 static u8 initialized=0, force_write=0;
2828
2829 RT_TRACE(COMP_DIG, "PreSTAConnectState = %x, CurSTAConnectState = %x\n",
2830 dm_digtable.PreSTAConnectState, dm_digtable.CurSTAConnectState);
2831
2832
2833 if ((dm_digtable.PreSTAConnectState == dm_digtable.CurSTAConnectState) ||
2834 (dm_digtable.CurSTAConnectState == DIG_STA_BEFORE_CONNECT))
2835 {
2836 if (dm_digtable.CurSTAConnectState == DIG_STA_BEFORE_CONNECT)
2837 {
2838 if (priv->rtllib->eRFPowerState != eRfOn)
2839 return;
2840
2841 if (dm_digtable.Backoff_Enable_Flag == true)
2842 {
2843 if (priv->FalseAlmCnt.Cnt_all > dm_digtable.FAHighThresh)
2844 {
2845 if ((dm_digtable.backoff_val -6) < dm_digtable.BackoffVal_range_min)
2846 dm_digtable.backoff_val = dm_digtable.BackoffVal_range_min;
2847 else
2848 dm_digtable.backoff_val -= 6;
2849 }
2850 else if (priv->FalseAlmCnt.Cnt_all < dm_digtable.FALowThresh)
2851 {
2852 if ((dm_digtable.backoff_val+6) > dm_digtable.BackoffVal_range_max)
2853 dm_digtable.backoff_val = dm_digtable.BackoffVal_range_max;
2854 else
2855 dm_digtable.backoff_val +=6;
2856 }
2857 }
2858 else
2859 dm_digtable.backoff_val =DM_DIG_BACKOFF;
2860
2861 if ((dm_digtable.rssi_val+10-dm_digtable.backoff_val) > dm_digtable.rx_gain_range_max)
2862 dm_digtable.cur_ig_value = dm_digtable.rx_gain_range_max;
2863 else if ((dm_digtable.rssi_val+10-dm_digtable.backoff_val) < dm_digtable.rx_gain_range_min)
2864 dm_digtable.cur_ig_value = dm_digtable.rx_gain_range_min;
2865 else
2866 dm_digtable.cur_ig_value = dm_digtable.rssi_val+10-dm_digtable.backoff_val;
2867
2868 if (priv->FalseAlmCnt.Cnt_all > 10000)
2869 dm_digtable.cur_ig_value = (dm_digtable.cur_ig_value>0x33)?dm_digtable.cur_ig_value:0x33;
2870
2871 if (priv->FalseAlmCnt.Cnt_all > 16000)
2872 dm_digtable.cur_ig_value = dm_digtable.rx_gain_range_max;
2873
2874 }
2875 else
2876 {
2877 return;
2878 }
2879 }
2880 else
2881 {
2882 dm_digtable.Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX;
2883 priv->rtllib->SetFwCmdHandler(dev, FW_CMD_DIG_ENABLE);
2884
2885 dm_digtable.backoff_val = DM_DIG_BACKOFF;
2886 dm_digtable.cur_ig_value = priv->DefaultInitialGain[0];
2887 dm_digtable.pre_ig_value = 0;
2888 return;
2889 }
2890
2891 if (dm_digtable.pre_ig_value != rtl8192_QueryBBReg(dev, rOFDM0_XAAGCCore1, bMaskByte0))
2892 force_write = 1;
2893
2894 if ((dm_digtable.pre_ig_value != dm_digtable.cur_ig_value) || !initialized || force_write)
2895 {
2896 priv->rtllib->SetFwCmdHandler(dev, FW_CMD_DIG_DISABLE);
2897
2898 initial_gain = (u8)dm_digtable.cur_ig_value;
2899
2900 rtl8192_setBBreg(dev, rOFDM0_XAAGCCore1, bMaskByte0, initial_gain);
2901 rtl8192_setBBreg(dev, rOFDM0_XBAGCCore1, bMaskByte0, initial_gain);
2902 dm_digtable.pre_ig_value = dm_digtable.cur_ig_value;
2903 initialized = 1;
2904 force_write = 0;
2905 }
2906
2907 RT_TRACE(COMP_DIG, "CurIGValue = 0x%x, pre_ig_value = 0x%x, backoff_val = %d\n",
2908 dm_digtable.cur_ig_value, dm_digtable.pre_ig_value, dm_digtable.backoff_val);
2909
2910}
2911
2912static void dm_pd_th(
2913 struct net_device * dev)
2914{
2915 struct r8192_priv *priv = rtllib_priv(dev);
2916 static u8 initialized=0, force_write=0;
2917 static u32 reset_cnt = 0;
2918
2919 if (dm_digtable.dig_algorithm_switch)
2920 {
2921 initialized = 0;
2922 reset_cnt = 0;
2923 }
2924
2925 if (dm_digtable.PreSTAConnectState == dm_digtable.CurSTAConnectState)
2926 {
2927 if (dm_digtable.CurSTAConnectState == DIG_STA_CONNECT)
2928 {
2929 if (dm_digtable.rssi_val >= dm_digtable.rssi_high_power_highthresh)
2930 dm_digtable.curpd_thstate = DIG_PD_AT_HIGH_POWER;
2931 else if ((dm_digtable.rssi_val <= dm_digtable.rssi_low_thresh))
2932 dm_digtable.curpd_thstate = DIG_PD_AT_LOW_POWER;
2933 else if ((dm_digtable.rssi_val >= dm_digtable.rssi_high_thresh) &&
2934 (dm_digtable.rssi_val < dm_digtable.rssi_high_power_lowthresh))
2935 dm_digtable.curpd_thstate = DIG_PD_AT_NORMAL_POWER;
2936 else
2937 dm_digtable.curpd_thstate = dm_digtable.prepd_thstate;
2938 }
2939 else
2940 {
2941 dm_digtable.curpd_thstate = DIG_PD_AT_LOW_POWER;
2942 }
2943 }
2944 else
2945 {
2946 dm_digtable.curpd_thstate = DIG_PD_AT_LOW_POWER;
2947 }
2948
2949 if (priv->reset_count != reset_cnt)
2950 {
2951 force_write = 1;
2952 reset_cnt = priv->reset_count;
2953 }
2954
2955 {
2956 if ((dm_digtable.prepd_thstate != dm_digtable.curpd_thstate) ||
2957 (initialized<=3) || force_write)
2958 {
2959 if (dm_digtable.curpd_thstate == DIG_PD_AT_LOW_POWER)
2960 {
2961 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
2962 {
2963 #ifdef RTL8190P
2964 write_nic_byte(dev, rOFDM0_RxDetector1, 0x40);
2965 #else
2966 write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x00);
2967 #endif
2968 /*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
2969 write_nic_byte(dev, rOFDM0_RxDetector1, 0x40);
2970 */
2971 }
2972 else
2973 write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
2974 }
2975 else if (dm_digtable.curpd_thstate == DIG_PD_AT_NORMAL_POWER)
2976 {
2977 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
2978 {
2979 #ifdef RTL8190P
2980 write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
2981 #else
2982 write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x20);
2983 #endif
2984 /*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
2985 write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
2986 */
2987 }
2988 else
2989 write_nic_byte(dev, rOFDM0_RxDetector1, 0x44);
2990 }
2991 else if (dm_digtable.curpd_thstate == DIG_PD_AT_HIGH_POWER)
2992 {
2993 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
2994 {
2995 #ifdef RTL8190P
2996 write_nic_byte(dev, rOFDM0_RxDetector1, 0x41);
2997 #else
2998 write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x10);
2999 #endif
3000 /*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
3001 write_nic_byte(dev, rOFDM0_RxDetector1, 0x41);
3002 */
3003 }
3004 else
3005 write_nic_byte(dev, rOFDM0_RxDetector1, 0x43);
3006 }
3007 dm_digtable.prepd_thstate = dm_digtable.curpd_thstate;
3008 if (initialized <= 3)
3009 initialized++;
3010 force_write = 0;
3011 }
3012 }
3013}
3014
3015static void dm_cs_ratio(
3016 struct net_device * dev)
3017{
3018 struct r8192_priv *priv = rtllib_priv(dev);
3019 static u8 initialized=0,force_write=0;
3020 static u32 reset_cnt = 0;
3021
3022 if (dm_digtable.dig_algorithm_switch)
3023 {
3024 initialized = 0;
3025 reset_cnt = 0;
3026 }
3027
3028 if (dm_digtable.PreSTAConnectState == dm_digtable.CurSTAConnectState)
3029 {
3030 if (dm_digtable.CurSTAConnectState == DIG_STA_CONNECT)
3031 {
3032 if ((dm_digtable.rssi_val <= dm_digtable.rssi_low_thresh))
3033 dm_digtable.curcs_ratio_state = DIG_CS_RATIO_LOWER;
3034 else if ((dm_digtable.rssi_val >= dm_digtable.rssi_high_thresh) )
3035 dm_digtable.curcs_ratio_state = DIG_CS_RATIO_HIGHER;
3036 else
3037 dm_digtable.curcs_ratio_state = dm_digtable.precs_ratio_state;
3038 }
3039 else
3040 {
3041 dm_digtable.curcs_ratio_state = DIG_CS_RATIO_LOWER;
3042 }
3043 }
3044 else
3045 {
3046 dm_digtable.curcs_ratio_state = DIG_CS_RATIO_LOWER;
3047 }
3048
3049 if (priv->reset_count != reset_cnt)
3050 {
3051 force_write = 1;
3052 reset_cnt = priv->reset_count;
3053 }
3054
3055
3056 {
3057 if ((dm_digtable.precs_ratio_state != dm_digtable.curcs_ratio_state) ||
3058 !initialized || force_write)
3059 {
3060 if (dm_digtable.curcs_ratio_state == DIG_CS_RATIO_LOWER)
3061 {
3062 write_nic_byte(dev, 0xa0a, 0x08);
3063 }
3064 else if (dm_digtable.curcs_ratio_state == DIG_CS_RATIO_HIGHER)
3065 {
3066 write_nic_byte(dev, 0xa0a, 0xcd);
3067 }
3068 dm_digtable.precs_ratio_state = dm_digtable.curcs_ratio_state;
3069 initialized = 1;
3070 force_write = 0;
3071 }
3072 }
3073}
3074
3075extern void dm_init_edca_turbo(struct net_device * dev)
3076{
3077 struct r8192_priv *priv = rtllib_priv(dev);
3078
3079 priv->bcurrent_turbo_EDCA = false;
3080 priv->rtllib->bis_any_nonbepkts = false;
3081 priv->bis_cur_rdlstate = false;
3082}
3083
3084#if 1
3085static void dm_check_edca_turbo(
3086 struct net_device * dev)
3087{
3088 struct r8192_priv *priv = rtllib_priv(dev);
3089 PRT_HIGH_THROUGHPUT pHTInfo = priv->rtllib->pHTInfo;
3090
3091 static unsigned long lastTxOkCnt = 0;
3092 static unsigned long lastRxOkCnt = 0;
3093 unsigned long curTxOkCnt = 0;
3094 unsigned long curRxOkCnt = 0;
3095
3096 if (priv->rtllib->iw_mode == IW_MODE_ADHOC)
3097 {
3098 goto dm_CheckEdcaTurbo_EXIT;
3099 }
3100 if (priv->rtllib->state != RTLLIB_LINKED)
3101 {
3102 goto dm_CheckEdcaTurbo_EXIT;
3103 }
3104 if (priv->rtllib->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_EDCA_TURBO)
3105 {
3106 goto dm_CheckEdcaTurbo_EXIT;
3107 }
3108
3109 {
3110 u8* peername[11] = {"unknown", "realtek_90", "realtek_92se","broadcom", "ralink", "atheros", "cisco", "marvell", "92u_softap", "self_softap"};
3111 static int wb_tmp = 0;
3112 if (wb_tmp == 0){
3113 printk("%s():iot peer is %s, bssid:"MAC_FMT"\n",__func__,peername[pHTInfo->IOTPeer], MAC_ARG(priv->rtllib->current_network.bssid));
3114 wb_tmp = 1;
3115 }
3116 }
3117 if (!priv->rtllib->bis_any_nonbepkts)
3118 {
3119 curTxOkCnt = priv->stats.txbytesunicast - lastTxOkCnt;
3120 curRxOkCnt = priv->stats.rxbytesunicast - lastRxOkCnt;
3121 if (pHTInfo->IOTAction & HT_IOT_ACT_EDCA_BIAS_ON_RX)
3122 {
3123 if (curTxOkCnt > 4*curRxOkCnt)
3124 {
3125 if (priv->bis_cur_rdlstate || !priv->bcurrent_turbo_EDCA)
3126 {
3127 write_nic_dword(dev, EDCAPARA_BE, edca_setting_UL[pHTInfo->IOTPeer]);
3128 priv->bis_cur_rdlstate = false;
3129 }
3130 }
3131 else
3132 {
3133 if (!priv->bis_cur_rdlstate || !priv->bcurrent_turbo_EDCA)
3134 {
3135 if (priv->rtllib->mode == WIRELESS_MODE_G)
3136 write_nic_dword(dev, EDCAPARA_BE, edca_setting_DL_GMode[pHTInfo->IOTPeer]);
3137 else
3138 write_nic_dword(dev, EDCAPARA_BE, edca_setting_DL[pHTInfo->IOTPeer]);
3139 priv->bis_cur_rdlstate = true;
3140 }
3141 }
3142 priv->bcurrent_turbo_EDCA = true;
3143 }
3144 else
3145 {
3146 if (curRxOkCnt > 4*curTxOkCnt)
3147 {
3148 if (!priv->bis_cur_rdlstate || !priv->bcurrent_turbo_EDCA)
3149 {
3150 if (priv->rtllib->mode == WIRELESS_MODE_G)
3151 write_nic_dword(dev, EDCAPARA_BE, edca_setting_DL_GMode[pHTInfo->IOTPeer]);
3152 else
3153 write_nic_dword(dev, EDCAPARA_BE, edca_setting_DL[pHTInfo->IOTPeer]);
3154 priv->bis_cur_rdlstate = true;
3155 }
3156 }
3157 else
3158 {
3159 if (priv->bis_cur_rdlstate || !priv->bcurrent_turbo_EDCA)
3160 {
3161 write_nic_dword(dev, EDCAPARA_BE, edca_setting_UL[pHTInfo->IOTPeer]);
3162 priv->bis_cur_rdlstate = false;
3163 }
3164
3165 }
3166
3167 priv->bcurrent_turbo_EDCA = true;
3168 }
3169 }
3170 else
3171 {
3172 if (priv->bcurrent_turbo_EDCA)
3173 {
3174
3175 u8 tmp = AC0_BE;
3176 priv->rtllib->SetHwRegHandler(dev, HW_VAR_AC_PARAM, (u8*)(&tmp) );
3177 priv->bcurrent_turbo_EDCA = false;
3178 }
3179 }
3180
3181
3182dm_CheckEdcaTurbo_EXIT:
3183 priv->rtllib->bis_any_nonbepkts = false;
3184 lastTxOkCnt = priv->stats.txbytesunicast;
3185 lastRxOkCnt = priv->stats.rxbytesunicast;
3186}
3187#endif
3188
3189extern void DM_CTSToSelfSetting(struct net_device * dev,u32 DM_Type, u32 DM_Value)
3190{
3191 struct r8192_priv *priv = rtllib_priv((struct net_device *)dev);
3192
3193 if (DM_Type == 0)
3194 {
3195 if (DM_Value > 1)
3196 DM_Value = 1;
3197 priv->rtllib->bCTSToSelfEnable = (bool)DM_Value;
3198 }
3199 else if (DM_Type == 1)
3200 {
3201 if (DM_Value >= 50)
3202 DM_Value = 50;
3203 priv->rtllib->CTSToSelfTH = (u8)DM_Value;
3204 }
3205}
3206
3207static void dm_init_ctstoself(struct net_device * dev)
3208{
3209 struct r8192_priv *priv = rtllib_priv((struct net_device *)dev);
3210
3211 priv->rtllib->bCTSToSelfEnable = true;
3212 priv->rtllib->CTSToSelfTH = CTSToSelfTHVal;
3213}
3214
3215static void dm_ctstoself(struct net_device *dev)
3216{
3217 struct r8192_priv *priv = rtllib_priv((struct net_device *)dev);
3218 PRT_HIGH_THROUGHPUT pHTInfo = priv->rtllib->pHTInfo;
3219 static unsigned long lastTxOkCnt = 0;
3220 static unsigned long lastRxOkCnt = 0;
3221 unsigned long curTxOkCnt = 0;
3222 unsigned long curRxOkCnt = 0;
3223
3224 if (priv->rtllib->bCTSToSelfEnable != true)
3225 {
3226 pHTInfo->IOTAction &= ~HT_IOT_ACT_FORCED_CTS2SELF;
3227 return;
3228 }
3229 if (pHTInfo->IOTPeer == HT_IOT_PEER_BROADCOM)
3230 {
3231 curTxOkCnt = priv->stats.txbytesunicast - lastTxOkCnt;
3232 curRxOkCnt = priv->stats.rxbytesunicast - lastRxOkCnt;
3233 if (curRxOkCnt > 4*curTxOkCnt)
3234 {
3235 pHTInfo->IOTAction &= ~HT_IOT_ACT_FORCED_CTS2SELF;
3236 }
3237 else
3238 {
3239 #if 1
3240 pHTInfo->IOTAction |= HT_IOT_ACT_FORCED_CTS2SELF;
3241 #else
3242 if (priv->undecorated_smoothed_pwdb < priv->rtllib->CTSToSelfTH)
3243 {
3244 pHTInfo->IOTAction &= ~HT_IOT_ACT_FORCED_CTS2SELF;
3245 }
3246 else if (priv->undecorated_smoothed_pwdb >= (priv->rtllib->CTSToSelfTH+5))
3247 {
3248 pHTInfo->IOTAction |= HT_IOT_ACT_FORCED_CTS2SELF;
3249 }
3250 #endif
3251 }
3252
3253 lastTxOkCnt = priv->stats.txbytesunicast;
3254 lastRxOkCnt = priv->stats.rxbytesunicast;
3255 }
3256}
3257
3258
3259static void
3260dm_Init_WA_Broadcom_IOT(struct net_device * dev)
3261{
3262 struct r8192_priv *priv = rtllib_priv((struct net_device *)dev);
3263 PRT_HIGH_THROUGHPUT pHTInfo = priv->rtllib->pHTInfo;
3264
3265 pHTInfo->bWAIotBroadcom = false;
3266 pHTInfo->WAIotTH = WAIotTHVal;
3267}
3268
3269#ifdef RTL8192SE
3270static void
3271dm_WA_Broadcom_IOT(struct net_device * dev)
3272{
3273 struct r8192_priv *priv = rtllib_priv((struct net_device *)dev);
3274 PRT_HIGH_THROUGHPUT pHTInfo = priv->rtllib->pHTInfo;
3275 u8 update=0;
3276 static enum rtllib_state connectState = RTLLIB_NOLINK;
3277
3278 if ( (pHTInfo->bWAIotBroadcom != true) ||
3279 (priv->rtllib->mode == WIRELESS_MODE_B) ||
3280 (pHTInfo->bCurBW40MHz))
3281 {
3282 if (pHTInfo->IOTAction & HT_IOT_ACT_WA_IOT_Broadcom)
3283 {
3284 pHTInfo->IOTAction &= ~HT_IOT_ACT_WA_IOT_Broadcom;
3285 update = 1;
3286 printk(" dm_WA_Broadcom_IOT(), disable HT_IOT_ACT_WA_IOT_Broadcom\n");
3287 }
3288 else
3289 return;
3290 }
3291
3292 if (connectState == RTLLIB_LINKED && priv->rtllib->state == RTLLIB_LINKED)
3293 {
3294 if (pHTInfo->IOTAction & HT_IOT_ACT_WA_IOT_Broadcom)
3295 {
3296 pHTInfo->IOTAction &= ~HT_IOT_ACT_WA_IOT_Broadcom;
3297 update = 1;
3298 pHTInfo->bWAIotBroadcom = false;
3299 printk("dm_WA_Broadcom_IOT(), from connect to disconnected, disable HT_IOT_ACT_WA_IOT_Broadcom\n");
3300 }
3301 }
3302 connectState = priv->rtllib->state;
3303
3304 if (!update && pHTInfo->IOTPeer == HT_IOT_PEER_BROADCOM)
3305 {
3306 if (priv->undecorated_smoothed_pwdb < pHTInfo->WAIotTH)
3307 {
3308 if (pHTInfo->IOTAction & HT_IOT_ACT_WA_IOT_Broadcom)
3309 {
3310 pHTInfo->IOTAction &= ~HT_IOT_ACT_WA_IOT_Broadcom;
3311 update = 1;
3312 printk("dm_WA_Broadcom_IOT() ==> WA_IOT enable cck rates\n");
3313 }
3314 }
3315 else if (priv->undecorated_smoothed_pwdb >= (priv->rtllib->CTSToSelfTH+5))
3316 {
3317 if ((pHTInfo->IOTAction & HT_IOT_ACT_WA_IOT_Broadcom) == 0)
3318 {
3319 pHTInfo->IOTAction |= HT_IOT_ACT_WA_IOT_Broadcom;
3320 update = 1;
3321 printk("dm_WA_Broadcom_IOT() ==> WA_IOT disable cck rates\n");
3322 }
3323 }
3324 }
3325
3326 if (update){
3327 if (priv->rtllib->bUseRAMask){
3328 priv->rtllib->UpdateHalRAMaskHandler(
3329 dev,
3330 false,
3331 0,
3332 priv->rtllib->pHTInfo->PeerMimoPs,
3333 priv->rtllib->mode,
3334 priv->rtllib->pHTInfo->bCurTxBW40MHz,
3335 0);
3336 }else{
3337 priv->ops->update_ratr_table(dev, priv->rtllib->dot11HTOperationalRateSet, NULL);
3338 }
3339 priv->rtllib->SetHwRegHandler( dev, HW_VAR_BASIC_RATE, (u8*)(&priv->basic_rate));
3340 }
3341}
3342#endif
3343
3344static void dm_check_pbc_gpio(struct net_device *dev)
3345{
3346#ifdef RTL8192U
3347 struct r8192_priv *priv = rtllib_priv(dev);
3348 u8 tmp1byte;
3349
3350
3351 tmp1byte = read_nic_byte(dev,GPI);
3352 if (tmp1byte == 0xff)
3353 return;
3354
3355 if (tmp1byte&BIT6 || tmp1byte&BIT0)
3356 {
3357 RT_TRACE(COMP_IO, "CheckPbcGPIO - PBC is pressed\n");
3358 priv->bpbc_pressed = true;
3359 }
3360#endif
3361
3362}
3363
3364#ifdef RTL8192E
3365
3366extern void dm_CheckRfCtrlGPIO(void *data)
3367{
3368#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3369 struct r8192_priv *priv = container_of_dwork_rsl(data,struct r8192_priv,gpio_change_rf_wq);
3370 struct net_device *dev = priv->rtllib->dev;
3371#else
3372 struct r8192_priv *priv = rtllib_priv((struct net_device *)data);
3373 struct net_device *dev = priv->rtllib->dev;
3374#endif
3375 u8 tmp1byte;
3376 RT_RF_POWER_STATE eRfPowerStateToSet;
3377 bool bActuallySet = false;
3378
3379 char *argv[3];
3380 static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
3381 static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL};
3382
3383 bActuallySet=false;
3384
3385 if ((priv->up_first_time == 1) || (priv->being_init_adapter))
3386 {
3387 return;
3388 }
3389
3390 if (priv->bfirst_after_down){
3391 priv->bfirst_after_down = 1;
3392 return;
3393 }
3394
3395
3396
3397 {
3398 tmp1byte = read_nic_byte(dev,GPI);
3399
3400 eRfPowerStateToSet = (tmp1byte&BIT1) ? eRfOn : eRfOff;
3401
3402 if ( (priv->bHwRadioOff == true) && (eRfPowerStateToSet == eRfOn))
3403 {
3404 RT_TRACE(COMP_RF, "gpiochangeRF - HW Radio ON\n");
3405 printk("gpiochangeRF - HW Radio ON\n");
3406 priv->bHwRadioOff = false;
3407 bActuallySet = true;
3408 }
3409 else if ( (priv->bHwRadioOff == false) && (eRfPowerStateToSet == eRfOff))
3410 {
3411 RT_TRACE(COMP_RF, "gpiochangeRF - HW Radio OFF\n");
3412 printk("gpiochangeRF - HW Radio OFF\n");
3413 priv->bHwRadioOff = true;
3414 bActuallySet = true;
3415 }
3416
3417 if (bActuallySet)
3418 {
3419 mdelay(1000);
3420 priv->bHwRfOffAction = 1;
3421 MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW,true);
3422 {
3423 if (priv->bHwRadioOff == true)
3424 argv[1] = "RFOFF";
3425 else
3426 argv[1] = "RFON";
3427
3428 argv[0] = RadioPowerPath;
3429 argv[2] = NULL;
3430 call_usermodehelper(RadioPowerPath,argv,envp,1);
3431 }
3432
3433 }
3434 }
3435
3436}
3437#elif defined RTL8192SE
3438extern void Power_DomainInit92SE(struct net_device *dev)
3439{
3440 struct r8192_priv *priv = rtllib_priv(dev);
3441 u8 tmpU1b;
3442 u16 tmpU2b;
3443
3444
3445
3446 priv->PwrDomainProtect = true;
3447
3448 tmpU1b = read_nic_byte(dev, (SYS_CLKR + 1));
3449 if (tmpU1b & BIT7)
3450 {
3451 tmpU1b &= ~(BIT6 | BIT7);
3452 if (!HalSetSysClk8192SE(dev, tmpU1b)){
3453 priv->PwrDomainProtect = false;
3454 return;
3455 }
3456 }
3457
3458 write_nic_byte(dev, AFE_PLL_CTRL, 0x0);
3459 write_nic_byte(dev, LDOA15_CTRL, 0x34);
3460
3461 tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
3462 if (priv->rtllib->RfOffReason & (RF_CHANGE_BY_IPS | RF_CHANGE_BY_HW)) {
3463 tmpU1b &= 0xFB;
3464 } else {
3465 tmpU1b &= 0x73;
3466 }
3467
3468 write_nic_byte(dev, SYS_FUNC_EN+1, tmpU1b);
3469 udelay(1000);
3470
3471 write_nic_byte(dev, CMDR, 0);
3472 write_nic_byte(dev, TCR, 0);
3473
3474 tmpU1b = read_nic_byte(dev, 0x562);
3475 tmpU1b |= 0x08;
3476 write_nic_byte(dev, 0x562, tmpU1b);
3477 tmpU1b &= ~(BIT3);
3478 write_nic_byte(dev, 0x562, tmpU1b);
3479
3480 tmpU1b = read_nic_byte(dev, AFE_XTAL_CTRL);
3481 write_nic_byte(dev, AFE_XTAL_CTRL, (tmpU1b|0x01));
3482 udelay(1500);
3483 tmpU1b = read_nic_byte(dev, AFE_XTAL_CTRL+1);
3484 write_nic_byte(dev, AFE_XTAL_CTRL+1, (tmpU1b&0xfb));
3485
3486
3487 tmpU1b = read_nic_byte(dev, AFE_MISC);
3488 write_nic_byte(dev, AFE_MISC, (tmpU1b|BIT0));
3489 udelay(1000);
3490
3491 tmpU1b = read_nic_byte(dev, AFE_MISC);
3492 write_nic_byte(dev, AFE_MISC, (tmpU1b|0x02));
3493 udelay(1000);
3494
3495 tmpU1b = read_nic_byte(dev, LDOA15_CTRL);
3496 write_nic_byte(dev, LDOA15_CTRL, (tmpU1b|BIT0));
3497
3498 tmpU2b = read_nic_word(dev, SYS_ISO_CTRL);
3499 write_nic_word(dev, SYS_ISO_CTRL, (tmpU2b|BIT11));
3500
3501
3502 tmpU2b = read_nic_word(dev, SYS_FUNC_EN);
3503 write_nic_word(dev, SYS_FUNC_EN, (tmpU2b |BIT13));
3504
3505 write_nic_byte(dev, SYS_ISO_CTRL+1, 0x68);
3506
3507 tmpU1b = read_nic_byte(dev, AFE_PLL_CTRL);
3508 write_nic_byte(dev, AFE_PLL_CTRL, (tmpU1b|BIT0|BIT4));
3509 tmpU1b = read_nic_byte(dev, AFE_PLL_CTRL+1);
3510 write_nic_byte(dev, AFE_PLL_CTRL+1, (tmpU1b|BIT0));
3511 udelay(1000);
3512
3513 write_nic_byte(dev, SYS_ISO_CTRL, 0xA6);
3514
3515 tmpU2b = read_nic_word(dev, SYS_CLKR);
3516 write_nic_word(dev, SYS_CLKR, (tmpU2b|BIT12|BIT11));
3517
3518 tmpU2b = read_nic_word(dev, SYS_FUNC_EN);
3519 write_nic_word(dev, SYS_FUNC_EN, (tmpU2b|BIT11));
3520 write_nic_word(dev, SYS_FUNC_EN, (tmpU2b|BIT11|BIT15));
3521
3522 tmpU2b = read_nic_word(dev, SYS_CLKR);
3523 write_nic_word(dev, SYS_CLKR, (tmpU2b&(~BIT2)));
3524
3525 tmpU1b = read_nic_byte(dev, (SYS_CLKR + 1));
3526 tmpU1b = ((tmpU1b | BIT7) & (~BIT6));
3527 if (!HalSetSysClk8192SE(dev, tmpU1b))
3528 {
3529 priv->PwrDomainProtect = false;
3530 return;
3531 }
3532
3533 write_nic_word(dev, CMDR, 0x37FC);
3534
3535 gen_RefreshLedState(dev);
3536
3537 priv->PwrDomainProtect = false;
3538
3539}
3540
3541void SET_RTL8192SE_RF_HALT(struct net_device *dev)
3542{
3543 u8 u1bTmp;
3544 struct r8192_priv *priv = rtllib_priv(dev);
3545
3546 if (priv->rtllib->RfOffReason == RF_CHANGE_BY_IPS && priv->LedStrategy == SW_LED_MODE8)
3547 {
3548 SET_RTL8192SE_RF_SLEEP(dev);
3549 return;
3550 }
3551
3552 u1bTmp = read_nic_byte(dev, LDOV12D_CTRL);
3553 u1bTmp |= BIT0;
3554 write_nic_byte(dev, LDOV12D_CTRL, u1bTmp);
3555 write_nic_byte(dev, SPS1_CTRL, 0x0);
3556 write_nic_byte(dev, TXPAUSE, 0xFF);
3557 write_nic_word(dev, CMDR, 0x57FC);
3558 udelay(100);
3559 write_nic_word(dev, CMDR, 0x77FC);
3560 write_nic_byte(dev, PHY_CCA, 0x0);
3561 udelay(10);
3562 write_nic_word(dev, CMDR, 0x37FC);
3563 udelay(10);
3564 write_nic_word(dev, CMDR, 0x77FC);
3565 udelay(10);
3566 write_nic_word(dev, CMDR, 0x57FC);
3567 write_nic_word(dev, CMDR, 0x0000);
3568 u1bTmp = read_nic_byte(dev, (SYS_CLKR + 1));
3569 if (u1bTmp & BIT7)
3570 {
3571 u1bTmp &= ~(BIT6 | BIT7);
3572 if (!HalSetSysClk8192SE(dev, u1bTmp))
3573 return;
3574 }
3575 if (priv->rtllib->RfOffReason==RF_CHANGE_BY_IPS )
3576 {
3577 write_nic_byte(dev, 0x03, 0xF9);
3578 }
3579 else
3580 {
3581 write_nic_byte(dev, 0x03, 0x71);
3582 }
3583 write_nic_byte(dev, SYS_CLKR+1, 0x70);
3584 write_nic_byte(dev, AFE_PLL_CTRL+1, 0x68);
3585 write_nic_byte(dev, AFE_PLL_CTRL, 0x00);
3586 write_nic_byte(dev, LDOA15_CTRL, 0x34);
3587 write_nic_byte(dev, AFE_XTAL_CTRL, 0x0E);
3588
3589}
3590
3591u8 RfOnOffDetect(struct net_device *dev)
3592{
3593 struct r8192_priv *priv = rtllib_priv(dev);
3594 u8 u1Tmp;
3595 u8 retval=eRfOn;
3596
3597 if (priv->pwrdown)
3598 {
3599 u1Tmp = read_nic_byte(dev, 0x06);
3600 printk("pwrdown, 0x6(BIT6)=%02x\n", u1Tmp);
3601 retval = (u1Tmp & BIT6) ? eRfOn: eRfOff;
3602 }
3603 else
3604 {
3605#ifdef CONFIG_BT_COEXIST
3606 if (pHalData->bt_coexist.BluetoothCoexist)
3607 {
3608 if (pHalData->bt_coexist.BT_CoexistType == BT_2Wire)
3609 {
3610 PlatformEFIOWrite1Byte(pAdapter, MAC_PINMUX_CFG, 0xa);
3611 u1Tmp = PlatformEFIORead1Byte(pAdapter, GPIO_IO_SEL);
3612 delay_us(100);
3613 u1Tmp = PlatformEFIORead1Byte(pAdapter, GPIO_IN);
3614 RTPRINT(FPWR, PWRHW, ("GPIO_IN=%02x\n", u1Tmp));
3615 retval = (u1Tmp & HAL_8192S_HW_GPIO_OFF_BIT) ? eRfOn : eRfOff;
3616 }
3617 else if ( (pHalData->bt_coexist.BT_CoexistType == BT_ISSC_3Wire) ||
3618 (pHalData->bt_coexist.BT_CoexistType == BT_Accel) ||
3619 (pHalData->bt_coexist.BT_CoexistType == BT_CSR) )
3620 {
3621 u4tmp = PHY_QueryBBReg(pAdapter, 0x87c, bMaskDWord);
3622 if ((u4tmp & BIT17) != 0)
3623 {
3624 PHY_SetBBReg(pAdapter, 0x87c, bMaskDWord, u4tmp & ~BIT17);
3625 delay_us(50);
3626 RTPRINT(FBT, BT_RFPoll, ("BT write 0x87c (~BIT17) = 0x%x\n", u4tmp &~BIT17));
3627 }
3628 u4tmp = PHY_QueryBBReg(pAdapter, 0x8e0, bMaskDWord);
3629 RTPRINT(FBT, BT_RFPoll, ("BT read 0x8e0 (BIT24)= 0x%x\n", u4tmp));
3630 retval = (u4tmp & BIT24) ? eRfOn : eRfOff;
3631 RTPRINT(FBT, BT_RFPoll, ("BT check RF state to %s\n", (retval==eRfOn)? "ON":"OFF"));
3632 }
3633 }
3634 else
3635#endif
3636 {
3637 write_nic_byte(dev, MAC_PINMUX_CFG, (GPIOMUX_EN | GPIOSEL_GPIO));
3638 u1Tmp = read_nic_byte(dev, GPIO_IO_SEL);
3639
3640 u1Tmp &= HAL_8192S_HW_GPIO_OFF_MASK;
3641 write_nic_byte(dev, GPIO_IO_SEL, u1Tmp);
3642
3643 mdelay(10);
3644
3645 u1Tmp = read_nic_byte(dev, GPIO_IN);
3646 retval = (u1Tmp & HAL_8192S_HW_GPIO_OFF_BIT) ? eRfOn : eRfOff;
3647 }
3648 }
3649
3650 return retval;
3651}
3652
3653extern void dm_CheckRfCtrlGPIO(void *data)
3654{
3655#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3656 struct r8192_priv *priv = container_of_dwork_rsl(data,struct r8192_priv,gpio_change_rf_wq);
3657 struct net_device *dev = priv->rtllib->dev;
3658#else
3659 struct net_device *dev = (struct net_device *)data;
3660 struct r8192_priv *priv = rtllib_priv(dev);
3661#endif
3662
3663 RT_RF_POWER_STATE eRfPowerStateToSet, CurRfState;
3664 bool bActuallySet = false;
3665 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
3666 unsigned long flag = 0;
3667 bool turnonbypowerdomain = false;
3668
3669
3670#ifdef CONFIG_RTL_RFKILL
3671 return;
3672#endif
3673 if ((priv->up_first_time == 1) || (priv->being_init_adapter))
3674 {
3675 ;
3676 return;
3677 }
3678
3679 if (priv->ResetProgress == RESET_TYPE_SILENT)
3680 {
3681 RT_TRACE((COMP_INIT | COMP_POWER | COMP_RF), "GPIOChangeRFWorkItemCallBack(): Silent Reseting!!!!!!!\n");
3682 return;
3683 }
3684
3685
3686 if (pPSC->bSwRfProcessing)
3687 {
3688 RT_TRACE(COMP_SCAN, "GPIOChangeRFWorkItemCallBack(): Rf is in switching state.\n");
3689 return;
3690 }
3691
3692 RT_TRACE(COMP_RF, "GPIOChangeRFWorkItemCallBack() ---------> \n");
3693
3694 spin_lock_irqsave(&priv->rf_ps_lock,flag);
3695 if (priv->RFChangeInProgress) {
3696 spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
3697 RT_TRACE(COMP_RF, "GPIOChangeRFWorkItemCallBack(): RF Change in progress! \n");
3698 return;
3699 } else {
3700 priv->RFChangeInProgress = true;
3701 spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
3702 }
3703 CurRfState = priv->rtllib->eRFPowerState;
3704#ifdef CONFIG_ASPM_OR_D3
3705 if ((pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_ASPM) && RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_ASPM))
3706 {
3707 RT_DISABLE_ASPM(dev);
3708 RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_ASPM);
3709 }
3710 else if ((pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_PCI_D3) && RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_PCI_D3))
3711 {
3712#ifdef TODO
3713 RT_LEAVE_D3(dev, false);
3714 RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_PCI_D3);
3715#endif
3716 }
3717
3718#endif
3719 if (RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC))
3720 {
3721 Power_DomainInit92SE(dev);
3722 turnonbypowerdomain = true;
3723 }
3724
3725 eRfPowerStateToSet = RfOnOffDetect(dev);
3726 if (priv->bResetInProgress) {
3727 spin_lock_irqsave(&priv->rf_ps_lock,flag);
3728 priv->RFChangeInProgress = false;
3729 spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
3730 return;
3731 }
3732
3733 if ( (priv->bHwRadioOff == true) && \
3734 (((eRfPowerStateToSet == eRfOn)&&(priv->sw_radio_on == true))
3735#ifdef CONFIG_RTLWIFI_DEBUGFS
3736 ||priv->debug->hw_holding
3737#endif
3738 ))
3739 {
3740 RT_TRACE(COMP_RF, "GPIOChangeRF - HW Radio ON, RF ON\n");
3741 printk("GPIOChangeRF - HW Radio ON, RF ON\n");
3742 eRfPowerStateToSet = eRfOn;
3743 bActuallySet = true;
3744 } else if ((priv->bHwRadioOff == false) &&
3745 ((eRfPowerStateToSet == eRfOff) || (priv->sw_radio_on == false)))
3746 {
3747 RT_TRACE(COMP_RF, "GPIOChangeRF - HW Radio OFF\n");
3748 printk("GPIOChangeRF - HW Radio OFF\n");
3749 eRfPowerStateToSet = eRfOff;
3750 bActuallySet = true;
3751 }
3752
3753 if (bActuallySet) {
3754 priv->bHwRfOffAction = 1;
3755#ifdef CONFIG_ASPM_OR_D3
3756 if (eRfPowerStateToSet == eRfOn)
3757 {
3758 if ((pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_ASPM) && RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_ASPM))
3759 {
3760 RT_DISABLE_ASPM(dev);
3761 RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_ASPM);
3762 }
3763#ifdef TODO
3764 else if ((pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_PCI_D3) && RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_PCI_D3))
3765 {
3766 RT_LEAVE_D3(dev, false);
3767 RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_PCI_D3);
3768 }
3769#endif
3770 }
3771#endif
3772 spin_lock_irqsave(&priv->rf_ps_lock,flag);
3773 priv->RFChangeInProgress = false;
3774 spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
3775 MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW,true);
3776
3777 {
3778#ifdef CONFIG_CFG_80211
3779 struct wireless_dev *wdev = &priv->rtllib->wdev;
3780 wiphy_rfkill_set_hw_state(wdev->wiphy, priv->bHwRadioOff);
3781#else
3782 char *argv[3];
3783 static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
3784 static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL};
3785
3786 if (priv->bHwRadioOff == true)
3787 argv[1] = "RFOFF";
3788 else
3789 argv[1] = "RFON";
3790
3791 argv[0] = RadioPowerPath;
3792 argv[2] = NULL;
3793 call_usermodehelper(RadioPowerPath,argv,envp,1);
3794
3795#endif
3796 }
3797
3798 if (eRfPowerStateToSet == eRfOff)
3799 {
3800 if (priv->pwrdown){
3801
3802 write_nic_byte(dev, SYS_FUNC_EN+1, 0x31);
3803 }
3804#ifdef CONFIG_ASPM_OR_D3
3805 if (pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_ASPM)
3806 {
3807 RT_ENABLE_ASPM(dev);
3808 RT_SET_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_ASPM);
3809 }
3810#ifdef TODO
3811 else if (pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_PCI_D3)
3812 {
3813 RT_ENTER_D3(dev, false);
3814 RT_SET_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_PCI_D3);
3815 }
3816#endif
3817#endif
3818 }
3819 }
3820 else if (eRfPowerStateToSet == eRfOff || CurRfState == eRfOff || priv->bDriverIsGoingToUnload)
3821 {
3822
3823 if (pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_HALT_NIC && turnonbypowerdomain)
3824 {
3825 PHY_SetRtl8192seRfHalt(dev);
3826 RT_SET_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC);
3827 }
3828#ifdef CONFIG_ASPM_OR_D3
3829 if (pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_ASPM)
3830 {
3831 RT_ENABLE_ASPM(dev);
3832 RT_SET_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_ASPM);
3833 }
3834#ifdef TODO
3835 else if (pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_PCI_D3)
3836 {
3837 RT_ENTER_D3(dev, false);
3838 RT_SET_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_PCI_D3);
3839 }
3840#endif
3841#endif
3842 spin_lock_irqsave(&priv->rf_ps_lock,flag);
3843 priv->RFChangeInProgress = false;
3844 spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
3845 }
3846 else
3847 {
3848 spin_lock_irqsave(&priv->rf_ps_lock,flag);
3849 priv->RFChangeInProgress = false;
3850 spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
3851 }
3852 RT_TRACE(COMP_RF, "GPIOChangeRFWorkItemCallBack() <--------- \n");
3853}
3854#endif
3855void dm_rf_pathcheck_workitemcallback(void *data)
3856{
3857#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3858 struct r8192_priv *priv = container_of_dwork_rsl(data,struct r8192_priv,rfpath_check_wq);
3859 struct net_device *dev =priv->rtllib->dev;
3860#else
3861 struct net_device *dev = (struct net_device *)data;
3862 struct r8192_priv *priv = rtllib_priv(dev);
3863#endif
3864 u8 rfpath = 0, i;
3865
3866
3867 rfpath = read_nic_byte(dev, 0xc04);
3868
3869 for (i = 0; i < RF90_PATH_MAX; i++)
3870 {
3871 if (rfpath & (0x01<<i))
3872 priv->brfpath_rxenable[i] = 1;
3873 else
3874 priv->brfpath_rxenable[i] = 0;
3875 }
3876 if (!DM_RxPathSelTable.Enable)
3877 return;
3878
3879 dm_rxpath_sel_byrssi(dev);
3880}
3881
3882static void dm_init_rxpath_selection(struct net_device * dev)
3883{
3884 u8 i;
3885 struct r8192_priv *priv = rtllib_priv(dev);
3886 DM_RxPathSelTable.Enable = 1;
3887 DM_RxPathSelTable.SS_TH_low = RxPathSelection_SS_TH_low;
3888 DM_RxPathSelTable.diff_TH = RxPathSelection_diff_TH;
3889 if (priv->CustomerID == RT_CID_819x_Netcore)
3890 DM_RxPathSelTable.cck_method = CCK_Rx_Version_2;
3891 else
3892 DM_RxPathSelTable.cck_method = CCK_Rx_Version_1;
3893 DM_RxPathSelTable.DbgMode = DM_DBG_OFF;
3894 DM_RxPathSelTable.disabledRF = 0;
3895 for (i=0; i<4; i++)
3896 {
3897 DM_RxPathSelTable.rf_rssi[i] = 50;
3898 DM_RxPathSelTable.cck_pwdb_sta[i] = -64;
3899 DM_RxPathSelTable.rf_enable_rssi_th[i] = 100;
3900 }
3901}
3902
3903static void dm_rxpath_sel_byrssi(struct net_device * dev)
3904{
3905 struct r8192_priv *priv = rtllib_priv(dev);
3906 u8 i, max_rssi_index=0, min_rssi_index=0, sec_rssi_index=0, rf_num=0;
3907 u8 tmp_max_rssi=0, tmp_min_rssi=0, tmp_sec_rssi=0;
3908 u8 cck_default_Rx=0x2;
3909 u8 cck_optional_Rx=0x3;
3910 long tmp_cck_max_pwdb=0, tmp_cck_min_pwdb=0, tmp_cck_sec_pwdb=0;
3911 u8 cck_rx_ver2_max_index=0, cck_rx_ver2_min_index=0, cck_rx_ver2_sec_index=0;
3912 u8 cur_rf_rssi;
3913 long cur_cck_pwdb;
3914 static u8 disabled_rf_cnt=0, cck_Rx_Path_initialized=0;
3915 u8 update_cck_rx_path;
3916
3917 if (priv->rf_type != RF_2T4R)
3918 return;
3919
3920 if (!cck_Rx_Path_initialized)
3921 {
3922 DM_RxPathSelTable.cck_Rx_path = (read_nic_byte(dev, 0xa07)&0xf);
3923 cck_Rx_Path_initialized = 1;
3924 }
3925
3926 DM_RxPathSelTable.disabledRF = 0xf;
3927 DM_RxPathSelTable.disabledRF &=~ (read_nic_byte(dev, 0xc04));
3928
3929 if (priv->rtllib->mode == WIRELESS_MODE_B)
3930 {
3931 DM_RxPathSelTable.cck_method = CCK_Rx_Version_2;
3932 }
3933
3934 for (i=0; i<RF90_PATH_MAX; i++)
3935 {
3936 if (!DM_RxPathSelTable.DbgMode)
3937 DM_RxPathSelTable.rf_rssi[i] = priv->stats.rx_rssi_percentage[i];
3938
3939 if (priv->brfpath_rxenable[i])
3940 {
3941 rf_num++;
3942 cur_rf_rssi = DM_RxPathSelTable.rf_rssi[i];
3943
3944 if (rf_num == 1)
3945 {
3946 max_rssi_index = min_rssi_index = sec_rssi_index = i;
3947 tmp_max_rssi = tmp_min_rssi = tmp_sec_rssi = cur_rf_rssi;
3948 }
3949 else if (rf_num == 2)
3950 {
3951 if (cur_rf_rssi >= tmp_max_rssi)
3952 {
3953 tmp_max_rssi = cur_rf_rssi;
3954 max_rssi_index = i;
3955 }
3956 else
3957 {
3958 tmp_sec_rssi = tmp_min_rssi = cur_rf_rssi;
3959 sec_rssi_index = min_rssi_index = i;
3960 }
3961 }
3962 else
3963 {
3964 if (cur_rf_rssi > tmp_max_rssi)
3965 {
3966 tmp_sec_rssi = tmp_max_rssi;
3967 sec_rssi_index = max_rssi_index;
3968 tmp_max_rssi = cur_rf_rssi;
3969 max_rssi_index = i;
3970 }
3971 else if (cur_rf_rssi == tmp_max_rssi)
3972 {
3973 tmp_sec_rssi = cur_rf_rssi;
3974 sec_rssi_index = i;
3975 }
3976 else if ((cur_rf_rssi < tmp_max_rssi) &&(cur_rf_rssi > tmp_sec_rssi))
3977 {
3978 tmp_sec_rssi = cur_rf_rssi;
3979 sec_rssi_index = i;
3980 }
3981 else if (cur_rf_rssi == tmp_sec_rssi)
3982 {
3983 if (tmp_sec_rssi == tmp_min_rssi)
3984 {
3985 tmp_sec_rssi = cur_rf_rssi;
3986 sec_rssi_index = i;
3987 }
3988 else
3989 {
3990 }
3991 }
3992 else if ((cur_rf_rssi < tmp_sec_rssi) && (cur_rf_rssi > tmp_min_rssi))
3993 {
3994 }
3995 else if (cur_rf_rssi == tmp_min_rssi)
3996 {
3997 if (tmp_sec_rssi == tmp_min_rssi)
3998 {
3999 tmp_min_rssi = cur_rf_rssi;
4000 min_rssi_index = i;
4001 }
4002 else
4003 {
4004 }
4005 }
4006 else if (cur_rf_rssi < tmp_min_rssi)
4007 {
4008 tmp_min_rssi = cur_rf_rssi;
4009 min_rssi_index = i;
4010 }
4011 }
4012 }
4013 }
4014
4015 rf_num = 0;
4016 if (DM_RxPathSelTable.cck_method == CCK_Rx_Version_2)
4017 {
4018 for (i=0; i<RF90_PATH_MAX; i++)
4019 {
4020 if (priv->brfpath_rxenable[i])
4021 {
4022 rf_num++;
4023 cur_cck_pwdb = DM_RxPathSelTable.cck_pwdb_sta[i];
4024
4025 if (rf_num == 1)
4026 {
4027 cck_rx_ver2_max_index = cck_rx_ver2_min_index = cck_rx_ver2_sec_index = i;
4028 tmp_cck_max_pwdb = tmp_cck_min_pwdb = tmp_cck_sec_pwdb = cur_cck_pwdb;
4029 }
4030 else if (rf_num == 2)
4031 {
4032 if (cur_cck_pwdb >= tmp_cck_max_pwdb)
4033 {
4034 tmp_cck_max_pwdb = cur_cck_pwdb;
4035 cck_rx_ver2_max_index = i;
4036 }
4037 else
4038 {
4039 tmp_cck_sec_pwdb = tmp_cck_min_pwdb = cur_cck_pwdb;
4040 cck_rx_ver2_sec_index = cck_rx_ver2_min_index = i;
4041 }
4042 }
4043 else
4044 {
4045 if (cur_cck_pwdb > tmp_cck_max_pwdb)
4046 {
4047 tmp_cck_sec_pwdb = tmp_cck_max_pwdb;
4048 cck_rx_ver2_sec_index = cck_rx_ver2_max_index;
4049 tmp_cck_max_pwdb = cur_cck_pwdb;
4050 cck_rx_ver2_max_index = i;
4051 }
4052 else if (cur_cck_pwdb == tmp_cck_max_pwdb)
4053 {
4054 tmp_cck_sec_pwdb = cur_cck_pwdb;
4055 cck_rx_ver2_sec_index = i;
4056 }
4057 else if ((cur_cck_pwdb < tmp_cck_max_pwdb) &&(cur_cck_pwdb > tmp_cck_sec_pwdb))
4058 {
4059 tmp_cck_sec_pwdb = cur_cck_pwdb;
4060 cck_rx_ver2_sec_index = i;
4061 }
4062 else if (cur_cck_pwdb == tmp_cck_sec_pwdb)
4063 {
4064 if (tmp_cck_sec_pwdb == tmp_cck_min_pwdb)
4065 {
4066 tmp_cck_sec_pwdb = cur_cck_pwdb;
4067 cck_rx_ver2_sec_index = i;
4068 }
4069 else
4070 {
4071 }
4072 }
4073 else if ((cur_cck_pwdb < tmp_cck_sec_pwdb) && (cur_cck_pwdb > tmp_cck_min_pwdb))
4074 {
4075 }
4076 else if (cur_cck_pwdb == tmp_cck_min_pwdb)
4077 {
4078 if (tmp_cck_sec_pwdb == tmp_cck_min_pwdb)
4079 {
4080 tmp_cck_min_pwdb = cur_cck_pwdb;
4081 cck_rx_ver2_min_index = i;
4082 }
4083 else
4084 {
4085 }
4086 }
4087 else if (cur_cck_pwdb < tmp_cck_min_pwdb)
4088 {
4089 tmp_cck_min_pwdb = cur_cck_pwdb;
4090 cck_rx_ver2_min_index = i;
4091 }
4092 }
4093
4094 }
4095 }
4096 }
4097
4098
4099 update_cck_rx_path = 0;
4100 if (DM_RxPathSelTable.cck_method == CCK_Rx_Version_2)
4101 {
4102 cck_default_Rx = cck_rx_ver2_max_index;
4103 cck_optional_Rx = cck_rx_ver2_sec_index;
4104 if (tmp_cck_max_pwdb != -64)
4105 update_cck_rx_path = 1;
4106 }
4107
4108 if (tmp_min_rssi < DM_RxPathSelTable.SS_TH_low && disabled_rf_cnt < 2)
4109 {
4110 if ((tmp_max_rssi - tmp_min_rssi) >= DM_RxPathSelTable.diff_TH)
4111 {
4112 DM_RxPathSelTable.rf_enable_rssi_th[min_rssi_index] = tmp_max_rssi+5;
4113 rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0x1<<min_rssi_index, 0x0);
4114 rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0x1<<min_rssi_index, 0x0);
4115 disabled_rf_cnt++;
4116 }
4117 if (DM_RxPathSelTable.cck_method == CCK_Rx_Version_1)
4118 {
4119 cck_default_Rx = max_rssi_index;
4120 cck_optional_Rx = sec_rssi_index;
4121 if (tmp_max_rssi)
4122 update_cck_rx_path = 1;
4123 }
4124 }
4125
4126 if (update_cck_rx_path)
4127 {
4128 DM_RxPathSelTable.cck_Rx_path = (cck_default_Rx<<2)|(cck_optional_Rx);
4129 rtl8192_setBBreg(dev, rCCK0_AFESetting, 0x0f000000, DM_RxPathSelTable.cck_Rx_path);
4130 }
4131
4132 if (DM_RxPathSelTable.disabledRF)
4133 {
4134 for (i=0; i<4; i++)
4135 {
4136 if ((DM_RxPathSelTable.disabledRF>>i) & 0x1)
4137 {
4138 if (tmp_max_rssi >= DM_RxPathSelTable.rf_enable_rssi_th[i])
4139 {
4140 rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0x1<<i, 0x1);
4141 rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0x1<<i, 0x1);
4142 DM_RxPathSelTable.rf_enable_rssi_th[i] = 100;
4143 disabled_rf_cnt--;
4144 }
4145 }
4146 }
4147 }
4148}
4149
4150static void dm_check_rx_path_selection(struct net_device *dev)
4151{
4152 struct r8192_priv *priv = rtllib_priv(dev);
4153 queue_delayed_work_rsl(priv->priv_wq,&priv->rfpath_check_wq,0);
4154}
4155
4156
4157static void dm_init_fsync (struct net_device *dev)
4158{
4159 struct r8192_priv *priv = rtllib_priv(dev);
4160
4161 priv->rtllib->fsync_time_interval = 500;
4162 priv->rtllib->fsync_rate_bitmap = 0x0f000800;
4163 priv->rtllib->fsync_rssi_threshold = 30;
4164#ifdef RTL8190P
4165 priv->rtllib->bfsync_enable = true;
4166#elif defined RTL8192E || defined RTL8192SE
4167 priv->rtllib->bfsync_enable = false;
4168#endif
4169 priv->rtllib->fsync_multiple_timeinterval = 3;
4170 priv->rtllib->fsync_firstdiff_ratethreshold= 100;
4171 priv->rtllib->fsync_seconddiff_ratethreshold= 200;
4172 priv->rtllib->fsync_state = Default_Fsync;
4173
4174#ifdef RTL8192SE
4175 priv->framesyncMonitor = 0;
4176#elif defined RTL8192E || defined RTL8190P
4177 priv->framesyncMonitor = 1;
4178#endif
4179
4180 init_timer(&priv->fsync_timer);
4181 setup_timer(&priv->fsync_timer, dm_fsync_timer_callback,(unsigned long) dev);
4182}
4183
4184
4185static void dm_deInit_fsync(struct net_device *dev)
4186{
4187 struct r8192_priv *priv = rtllib_priv(dev);
4188 del_timer_sync(&priv->fsync_timer);
4189}
4190
4191extern void dm_fsync_timer_callback(unsigned long data)
4192{
4193 struct net_device *dev = (struct net_device *)data;
4194 struct r8192_priv *priv = rtllib_priv((struct net_device *)data);
4195 u32 rate_index, rate_count = 0, rate_count_diff=0;
4196 bool bSwitchFromCountDiff = false;
4197 bool bDoubleTimeInterval = false;
4198
4199 if ( priv->rtllib->state == RTLLIB_LINKED &&
4200 priv->rtllib->bfsync_enable &&
4201 (priv->rtllib->pHTInfo->IOTAction & HT_IOT_ACT_CDD_FSYNC))
4202 {
4203 u32 rate_bitmap;
4204 for (rate_index = 0; rate_index <= 27; rate_index++)
4205 {
4206 rate_bitmap = 1 << rate_index;
4207 if (priv->rtllib->fsync_rate_bitmap & rate_bitmap)
4208 rate_count+= priv->stats.received_rate_histogram[1][rate_index];
4209 }
4210
4211 if (rate_count < priv->rate_record)
4212 rate_count_diff = 0xffffffff - rate_count + priv->rate_record;
4213 else
4214 rate_count_diff = rate_count - priv->rate_record;
4215 if (rate_count_diff < priv->rateCountDiffRecord)
4216 {
4217
4218 u32 DiffNum = priv->rateCountDiffRecord - rate_count_diff;
4219 if (DiffNum >= priv->rtllib->fsync_seconddiff_ratethreshold)
4220 priv->ContiuneDiffCount++;
4221 else
4222 priv->ContiuneDiffCount = 0;
4223
4224 if (priv->ContiuneDiffCount >=2)
4225 {
4226 bSwitchFromCountDiff = true;
4227 priv->ContiuneDiffCount = 0;
4228 }
4229 }
4230 else
4231 {
4232 priv->ContiuneDiffCount = 0;
4233 }
4234
4235 if (rate_count_diff <= priv->rtllib->fsync_firstdiff_ratethreshold)
4236 {
4237 bSwitchFromCountDiff = true;
4238 priv->ContiuneDiffCount = 0;
4239 }
4240 priv->rate_record = rate_count;
4241 priv->rateCountDiffRecord = rate_count_diff;
4242 RT_TRACE(COMP_HALDM, "rateRecord %d rateCount %d, rateCountdiff %d bSwitchFsync %d\n", priv->rate_record, rate_count, rate_count_diff , priv->bswitch_fsync);
4243 if (priv->undecorated_smoothed_pwdb > priv->rtllib->fsync_rssi_threshold && bSwitchFromCountDiff)
4244 {
4245 bDoubleTimeInterval = true;
4246 priv->bswitch_fsync = !priv->bswitch_fsync;
4247 if (priv->bswitch_fsync)
4248 {
4249 #ifdef RTL8190P
4250 write_nic_byte(dev,0xC36, 0x00);
4251#elif defined RTL8192E
4252 write_nic_byte(dev,0xC36, 0x1c);
4253 #endif
4254 write_nic_byte(dev, 0xC3e, 0x90);
4255 }
4256 else
4257 {
4258 #ifdef RTL8190P
4259 write_nic_byte(dev, 0xC36, 0x40);
4260 #else
4261 write_nic_byte(dev, 0xC36, 0x5c);
4262 #endif
4263 write_nic_byte(dev, 0xC3e, 0x96);
4264 }
4265 }
4266 else if (priv->undecorated_smoothed_pwdb <= priv->rtllib->fsync_rssi_threshold)
4267 {
4268 if (priv->bswitch_fsync)
4269 {
4270 priv->bswitch_fsync = false;
4271 #ifdef RTL8190P
4272 write_nic_byte(dev, 0xC36, 0x40);
4273#elif defined RTL8192E
4274 write_nic_byte(dev, 0xC36, 0x5c);
4275 #endif
4276 write_nic_byte(dev, 0xC3e, 0x96);
4277 }
4278 }
4279 if (bDoubleTimeInterval){
4280 if (timer_pending(&priv->fsync_timer))
4281 del_timer_sync(&priv->fsync_timer);
4282 priv->fsync_timer.expires = jiffies + MSECS(priv->rtllib->fsync_time_interval*priv->rtllib->fsync_multiple_timeinterval);
4283 add_timer(&priv->fsync_timer);
4284 }
4285 else{
4286 if (timer_pending(&priv->fsync_timer))
4287 del_timer_sync(&priv->fsync_timer);
4288 priv->fsync_timer.expires = jiffies + MSECS(priv->rtllib->fsync_time_interval);
4289 add_timer(&priv->fsync_timer);
4290 }
4291 }
4292 else
4293 {
4294 if (priv->bswitch_fsync)
4295 {
4296 priv->bswitch_fsync = false;
4297 #ifdef RTL8190P
4298 write_nic_byte(dev, 0xC36, 0x40);
4299#elif defined RTL8192E
4300 write_nic_byte(dev, 0xC36, 0x5c);
4301 #endif
4302 write_nic_byte(dev, 0xC3e, 0x96);
4303 }
4304 priv->ContiuneDiffCount = 0;
4305 #ifdef RTL8190P
4306 write_nic_dword(dev, rOFDM0_RxDetector2, 0x164052cd);
4307#elif defined RTL8192E
4308 write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c52cd);
4309 #endif
4310 }
4311 RT_TRACE(COMP_HALDM, "ContiuneDiffCount %d\n", priv->ContiuneDiffCount);
4312 RT_TRACE(COMP_HALDM, "rateRecord %d rateCount %d, rateCountdiff %d bSwitchFsync %d\n", priv->rate_record, rate_count, rate_count_diff , priv->bswitch_fsync);
4313}
4314
4315static void dm_StartHWFsync(struct net_device *dev)
4316{
4317#if defined RTL8192E
4318 u8 rf_timing = 0x77;
4319 struct r8192_priv *priv = rtllib_priv(dev);
4320 RT_TRACE(COMP_HALDM, "%s\n", __func__);
4321 write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c12cf);
4322 priv->rtllib->SetHwRegHandler(dev, HW_VAR_RF_TIMING, (u8*)(&rf_timing));
4323 write_nic_byte(dev, 0xc3b, 0x41);
4324#elif defined RTL8192SE
4325 write_nic_byte(dev, rOFDM0_RxDetector3, 0x96);
4326#endif
4327}
4328
4329static void dm_EndHWFsync(struct net_device *dev)
4330{
4331#if defined RTL8192E
4332 u8 rf_timing = 0xaa;
4333 struct r8192_priv *priv = rtllib_priv(dev);
4334 RT_TRACE(COMP_HALDM,"%s\n", __func__);
4335 write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c52cd);
4336 priv->rtllib->SetHwRegHandler(dev, HW_VAR_RF_TIMING, (u8*)(&rf_timing));
4337 write_nic_byte(dev, 0xc3b, 0x49);
4338#elif defined RTL8192SE
4339 write_nic_byte(dev, rOFDM0_RxDetector3, 0x94);
4340#endif
4341
4342}
4343
4344static void dm_EndSWFsync(struct net_device *dev)
4345{
4346 struct r8192_priv *priv = rtllib_priv(dev);
4347
4348 RT_TRACE(COMP_HALDM, "%s\n", __func__);
4349 del_timer_sync(&(priv->fsync_timer));
4350
4351 if (priv->bswitch_fsync)
4352 {
4353 priv->bswitch_fsync = false;
4354
4355 #ifdef RTL8190P
4356 write_nic_byte(dev, 0xC36, 0x40);
4357#elif defined RTL8192E
4358 write_nic_byte(dev, 0xC36, 0x5c);
4359#endif
4360
4361 write_nic_byte(dev, 0xC3e, 0x96);
4362 }
4363
4364 priv->ContiuneDiffCount = 0;
4365#ifdef RTL8192E
4366 write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c52cd);
4367#endif
4368
4369}
4370
4371static void dm_StartSWFsync(struct net_device *dev)
4372{
4373 struct r8192_priv *priv = rtllib_priv(dev);
4374 u32 rateIndex;
4375 u32 rateBitmap;
4376
4377 RT_TRACE(COMP_HALDM,"%s\n", __func__);
4378 priv->rate_record = 0;
4379 priv->ContiuneDiffCount = 0;
4380 priv->rateCountDiffRecord = 0;
4381 priv->bswitch_fsync = false;
4382
4383 if (priv->rtllib->mode == WIRELESS_MODE_N_24G)
4384 {
4385 priv->rtllib->fsync_firstdiff_ratethreshold= 600;
4386 priv->rtllib->fsync_seconddiff_ratethreshold = 0xffff;
4387 }
4388 else
4389 {
4390 priv->rtllib->fsync_firstdiff_ratethreshold= 200;
4391 priv->rtllib->fsync_seconddiff_ratethreshold = 200;
4392 }
4393 for (rateIndex = 0; rateIndex <= 27; rateIndex++)
4394 {
4395 rateBitmap = 1 << rateIndex;
4396 if (priv->rtllib->fsync_rate_bitmap & rateBitmap)
4397 priv->rate_record += priv->stats.received_rate_histogram[1][rateIndex];
4398 }
4399 if (timer_pending(&priv->fsync_timer))
4400 del_timer_sync(&priv->fsync_timer);
4401 priv->fsync_timer.expires = jiffies + MSECS(priv->rtllib->fsync_time_interval);
4402 add_timer(&priv->fsync_timer);
4403
4404#ifdef RTL8192E
4405 write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c12cd);
4406#endif
4407
4408}
4409
4410void dm_check_fsync(struct net_device *dev)
4411{
4412#define RegC38_Default 0
4413#define RegC38_NonFsync_Other_AP 1
4414#define RegC38_Fsync_AP_BCM 2
4415 struct r8192_priv *priv = rtllib_priv(dev);
4416 static u8 reg_c38_State=RegC38_Default;
4417 static u32 reset_cnt=0;
4418
4419 RT_TRACE(COMP_HALDM, "RSSI %d TimeInterval %d MultipleTimeInterval %d\n", priv->rtllib->fsync_rssi_threshold, priv->rtllib->fsync_time_interval, priv->rtllib->fsync_multiple_timeinterval);
4420 RT_TRACE(COMP_HALDM, "RateBitmap 0x%x FirstDiffRateThreshold %d SecondDiffRateThreshold %d\n", priv->rtllib->fsync_rate_bitmap, priv->rtllib->fsync_firstdiff_ratethreshold, priv->rtllib->fsync_seconddiff_ratethreshold);
4421
4422 if ( priv->rtllib->state == RTLLIB_LINKED &&
4423 priv->rtllib->pHTInfo->IOTPeer == HT_IOT_PEER_BROADCOM)
4424 {
4425 if (priv->rtllib->bfsync_enable == 0)
4426 {
4427 switch (priv->rtllib->fsync_state)
4428 {
4429 case Default_Fsync:
4430 dm_StartHWFsync(dev);
4431 priv->rtllib->fsync_state = HW_Fsync;
4432 break;
4433 case SW_Fsync:
4434 dm_EndSWFsync(dev);
4435 dm_StartHWFsync(dev);
4436 priv->rtllib->fsync_state = HW_Fsync;
4437 break;
4438 case HW_Fsync:
4439 default:
4440 break;
4441 }
4442 }
4443 else
4444 {
4445 switch (priv->rtllib->fsync_state)
4446 {
4447 case Default_Fsync:
4448 dm_StartSWFsync(dev);
4449 priv->rtllib->fsync_state = SW_Fsync;
4450 break;
4451 case HW_Fsync:
4452 dm_EndHWFsync(dev);
4453 dm_StartSWFsync(dev);
4454 priv->rtllib->fsync_state = SW_Fsync;
4455 break;
4456 case SW_Fsync:
4457 default:
4458 break;
4459
4460 }
4461 }
4462 if (priv->framesyncMonitor)
4463 {
4464 if (reg_c38_State != RegC38_Fsync_AP_BCM)
4465 {
4466 #ifdef RTL8190P
4467 write_nic_byte(dev, rOFDM0_RxDetector3, 0x15);
4468 #else
4469 write_nic_byte(dev, rOFDM0_RxDetector3, 0x95);
4470 #endif
4471
4472 reg_c38_State = RegC38_Fsync_AP_BCM;
4473 }
4474 }
4475 } else {
4476 switch (priv->rtllib->fsync_state) {
4477 case HW_Fsync:
4478 dm_EndHWFsync(dev);
4479 priv->rtllib->fsync_state = Default_Fsync;
4480 break;
4481 case SW_Fsync:
4482 dm_EndSWFsync(dev);
4483 priv->rtllib->fsync_state = Default_Fsync;
4484 break;
4485 case Default_Fsync:
4486 default:
4487 break;
4488 }
4489
4490 if (priv->framesyncMonitor) {
4491 if (priv->rtllib->state == RTLLIB_LINKED) {
4492 if (priv->undecorated_smoothed_pwdb <= RegC38_TH) {
4493 if (reg_c38_State != RegC38_NonFsync_Other_AP) {
4494#ifdef RTL8190P
4495 write_nic_byte(dev, rOFDM0_RxDetector3, 0x10);
4496#else
4497 write_nic_byte(dev, rOFDM0_RxDetector3, 0x90);
4498#endif
4499
4500 reg_c38_State = RegC38_NonFsync_Other_AP;
4501 }
4502 } else if (priv->undecorated_smoothed_pwdb >= (RegC38_TH+5)) {
4503 if (reg_c38_State) {
4504 write_nic_byte(dev, rOFDM0_RxDetector3, priv->framesync);
4505 reg_c38_State = RegC38_Default;
4506 }
4507 }
4508 } else {
4509 if (reg_c38_State) {
4510 write_nic_byte(dev, rOFDM0_RxDetector3, priv->framesync);
4511 reg_c38_State = RegC38_Default;
4512 }
4513 }
4514 }
4515 }
4516 if (priv->framesyncMonitor) {
4517 if (priv->reset_count != reset_cnt) {
4518 write_nic_byte(dev, rOFDM0_RxDetector3, priv->framesync);
4519 reg_c38_State = RegC38_Default;
4520 reset_cnt = priv->reset_count;
4521 }
4522 } else {
4523 if (reg_c38_State) {
4524 write_nic_byte(dev, rOFDM0_RxDetector3, priv->framesync);
4525 reg_c38_State = RegC38_Default;
4526 }
4527 }
4528}
4529
4530extern void dm_shadow_init(struct net_device *dev)
4531{
4532 u8 page;
4533 u16 offset;
4534
4535 for (page = 0; page < 5; page++)
4536 for (offset = 0; offset < 256; offset++)
4537 dm_shadow[page][offset] = read_nic_byte(dev, offset+page*256);
4538
4539 for (page = 8; page < 11; page++)
4540 for (offset = 0; offset < 256; offset++)
4541 dm_shadow[page][offset] = read_nic_byte(dev, offset+page*256);
4542
4543 for (page = 12; page < 15; page++)
4544 for (offset = 0; offset < 256; offset++)
4545 dm_shadow[page][offset] = read_nic_byte(dev, offset+page*256);
4546
4547}
4548
4549/*---------------------------Define function prototype------------------------*/
4550static void dm_init_dynamic_txpower(struct net_device *dev)
4551{
4552 struct r8192_priv *priv = rtllib_priv(dev);
4553
4554 priv->rtllib->bdynamic_txpower_enable = true;
4555 priv->bLastDTPFlag_High = false;
4556 priv->bLastDTPFlag_Low = false;
4557 priv->bDynamicTxHighPower = false;
4558 priv->bDynamicTxLowPower = false;
4559}
4560
4561static void dm_dynamic_txpower(struct net_device *dev)
4562{
4563 struct r8192_priv *priv = rtllib_priv(dev);
4564 unsigned int txhipower_threshhold=0;
4565 unsigned int txlowpower_threshold=0;
4566 if (priv->rtllib->bdynamic_txpower_enable != true)
4567 {
4568 priv->bDynamicTxHighPower = false;
4569 priv->bDynamicTxLowPower = false;
4570 return;
4571 }
4572 if ((priv->rtllib->pHTInfo->IOTPeer == HT_IOT_PEER_ATHEROS) && (priv->rtllib->mode == IEEE_G)){
4573 txhipower_threshhold = TX_POWER_ATHEROAP_THRESH_HIGH;
4574 txlowpower_threshold = TX_POWER_ATHEROAP_THRESH_LOW;
4575 }
4576 else
4577 {
4578 txhipower_threshhold = TX_POWER_NEAR_FIELD_THRESH_HIGH;
4579 txlowpower_threshold = TX_POWER_NEAR_FIELD_THRESH_LOW;
4580 }
4581
4582
4583 RT_TRACE(COMP_TXAGC,"priv->undecorated_smoothed_pwdb = %ld \n" , priv->undecorated_smoothed_pwdb);
4584
4585 if (priv->rtllib->state == RTLLIB_LINKED)
4586 {
4587 if (priv->undecorated_smoothed_pwdb >= txhipower_threshhold)
4588 {
4589 priv->bDynamicTxHighPower = true;
4590 priv->bDynamicTxLowPower = false;
4591 }
4592 else
4593 {
4594 if (priv->undecorated_smoothed_pwdb < txlowpower_threshold && priv->bDynamicTxHighPower == true)
4595 {
4596 priv->bDynamicTxHighPower = false;
4597 }
4598 if (priv->undecorated_smoothed_pwdb < 35)
4599 {
4600 priv->bDynamicTxLowPower = true;
4601 }
4602 else if (priv->undecorated_smoothed_pwdb >= 40)
4603 {
4604 priv->bDynamicTxLowPower = false;
4605 }
4606 }
4607 }
4608 else
4609 {
4610 priv->bDynamicTxHighPower = false;
4611 priv->bDynamicTxLowPower = false;
4612 }
4613
4614 if ( (priv->bDynamicTxHighPower != priv->bLastDTPFlag_High ) ||
4615 (priv->bDynamicTxLowPower != priv->bLastDTPFlag_Low ) )
4616 {
4617 RT_TRACE(COMP_TXAGC,"SetTxPowerLevel8190() channel = %d \n" , priv->rtllib->current_network.channel);
4618
4619 rtl8192_phy_setTxPower(dev,priv->rtllib->current_network.channel);
4620 }
4621 priv->bLastDTPFlag_High = priv->bDynamicTxHighPower;
4622 priv->bLastDTPFlag_Low = priv->bDynamicTxLowPower;
4623
4624}
4625
4626static void dm_check_txrateandretrycount(struct net_device * dev)
4627{
4628 struct r8192_priv *priv = rtllib_priv(dev);
4629 struct rtllib_device* ieee = priv->rtllib;
4630
4631 ieee->softmac_stats.CurrentShowTxate = read_nic_byte(dev, Current_Tx_Rate_Reg);
4632
4633 ieee->softmac_stats.last_packet_rate = read_nic_byte(dev ,Initial_Tx_Rate_Reg);
4634
4635 ieee->softmac_stats.txretrycount = read_nic_dword(dev, Tx_Retry_Count_Reg);
4636}
4637
4638static void dm_send_rssi_tofw(struct net_device *dev)
4639{
4640 DCMD_TXCMD_T tx_cmd;
4641 struct r8192_priv *priv = rtllib_priv(dev);
4642
4643 write_nic_byte(dev, DRIVER_RSSI, (u8)priv->undecorated_smoothed_pwdb);
4644 return;
4645 tx_cmd.Op = TXCMD_SET_RX_RSSI;
4646 tx_cmd.Length = 4;
4647 tx_cmd.Value = priv->undecorated_smoothed_pwdb;
4648
4649 cmpk_message_handle_tx(dev, (u8*)&tx_cmd,
4650 DESC_PACKET_TYPE_INIT, sizeof(DCMD_TXCMD_T));
4651}
4652
4653#if defined RTL8192SE
4654/*-----------------------------------------------------------------------------
4655 * Function: dm_RefreshRateAdaptiveMask()
4656 *
4657 * Overview: Update rate table mask according to rssi
4658 *
4659 * Input: NONE
4660 *
4661 * Output: NONE
4662 *
4663 * Return: NONE
4664 *
4665 * Revised History:
4666 * When Who Remark
4667 * 05/27/2009 hpfan Create Version 0.
4668 *
4669 *---------------------------------------------------------------------------*/
4670static void dm_RefreshRateAdaptiveMask(struct net_device *dev)
4671{
4672 struct r8192_priv *priv = rtllib_priv(dev);
4673 prate_adaptive pRA = (prate_adaptive)&priv->rate_adaptive;
4674 u32 LowRSSIThreshForRA = 0, HighRSSIThreshForRA = 0;
4675 u8 rssi_level;
4676
4677 if (IS_NIC_DOWN(priv)){
4678 RT_TRACE(COMP_RATE,"<---- dm_RefreshRateAdaptiveMask(): driver is going to unload\n");
4679 return;
4680 }
4681
4682 if (!priv->rtllib->bUseRAMask){
4683 return;
4684 }
4685
4686 if (priv->pFirmware->FirmwareVersion >= 61 && !priv->bInformFWDriverControlDM){
4687 RT_TRACE(COMP_RATE, "<---- dm_RefreshRateAdaptiveMask(): inform fw driver control dm\n");
4688 priv->rtllib->SetFwCmdHandler(dev, FW_CMD_CTRL_DM_BY_DRIVER);
4689 priv->bInformFWDriverControlDM = true;
4690 }
4691
4692 if ((priv->rtllib->state == RTLLIB_LINKED &&
4693 (priv->rtllib->iw_mode == IW_MODE_INFRA))) {
4694
4695 switch (pRA->PreRATRState){
4696 case DM_RATR_STA_HIGH:
4697 HighRSSIThreshForRA = 50;
4698 LowRSSIThreshForRA = 20;
4699 break;
4700 case DM_RATR_STA_MIDDLE:
4701 HighRSSIThreshForRA = 55;
4702 LowRSSIThreshForRA = 20;
4703 break;
4704 case DM_RATR_STA_LOW:
4705 HighRSSIThreshForRA = 50;
4706 LowRSSIThreshForRA = 25;
4707 break;
4708 default:
4709 HighRSSIThreshForRA = 50;
4710 LowRSSIThreshForRA = 20;
4711 break;
4712 }
4713
4714 if (priv->undecorated_smoothed_pwdb > (long)HighRSSIThreshForRA) {
4715 pRA->ratr_state = DM_RATR_STA_HIGH;
4716 rssi_level = 1;
4717 } else if (priv->undecorated_smoothed_pwdb > (long)LowRSSIThreshForRA) {
4718 pRA->ratr_state = DM_RATR_STA_MIDDLE;
4719 rssi_level = 2;
4720 } else {
4721 pRA->ratr_state = DM_RATR_STA_LOW;
4722 rssi_level = 3;
4723 }
4724 if ((pRA->PreRATRState != pRA->ratr_state) ||
4725 ((pRA->PreRATRState == pRA->ratr_state) &&
4726 (rssi_level != priv->rssi_level))) {
4727 RT_TRACE(COMP_RATE, "Target AP addr : "MAC_FMT"\n",
4728 MAC_ARG(priv->rtllib->current_network.bssid));
4729 RT_TRACE(COMP_RATE, "RSSI = %ld\n",
4730 priv->undecorated_smoothed_pwdb);
4731 RT_TRACE(COMP_RATE, "RSSI_LEVEL = %d\n", rssi_level);
4732 RT_TRACE(COMP_RATE, "PreState = %d, CurState = %d\n",
4733 pRA->PreRATRState, pRA->ratr_state);
4734 priv->rtllib->UpdateHalRAMaskHandler(dev, false, 0,
4735 priv->rtllib->pHTInfo->PeerMimoPs,
4736 priv->rtllib->mode,
4737 priv->rtllib->pHTInfo->bCurTxBW40MHz,
4738 rssi_level);
4739 priv->rssi_level = rssi_level;
4740 pRA->PreRATRState = pRA->ratr_state;
4741 }
4742 }
4743 if ((priv->rtllib->state == RTLLIB_LINKED) &&
4744 (priv->rtllib->iw_mode == IW_MODE_ADHOC)) {
4745 int i;
4746 struct sta_info *pEntry;
4747
4748 for (i = 0; i < PEER_MAX_ASSOC; i++) {
4749 pEntry = priv->rtllib->peer_assoc_list[i];
4750 if (NULL != pEntry) {
4751 pRA = &pEntry->rate_adaptive;
4752 switch (pRA->PreRATRState){
4753 case DM_RATR_STA_HIGH:
4754 HighRSSIThreshForRA = 50;
4755 LowRSSIThreshForRA = 20;
4756 break;
4757 case DM_RATR_STA_MIDDLE:
4758 HighRSSIThreshForRA = 55;
4759 LowRSSIThreshForRA = 20;
4760 break;
4761 case DM_RATR_STA_LOW:
4762 HighRSSIThreshForRA = 50;
4763 LowRSSIThreshForRA = 25;
4764 break;
4765 default:
4766 HighRSSIThreshForRA = 50;
4767 LowRSSIThreshForRA = 20;
4768 break;
4769 }
4770
4771 if (pEntry->rssi_stat.UndecoratedSmoothedPWDB > HighRSSIThreshForRA) {
4772 pRA->ratr_state = DM_RATR_STA_HIGH;
4773 rssi_level = 1;
4774 } else if (pEntry->rssi_stat.UndecoratedSmoothedPWDB > LowRSSIThreshForRA) {
4775 pRA->ratr_state = DM_RATR_STA_MIDDLE;
4776 rssi_level = 2;
4777 } else {
4778 pRA->ratr_state = DM_RATR_STA_LOW;
4779 rssi_level = 3;
4780 }
4781
4782 if (pRA->PreRATRState != pRA->ratr_state) {
4783 RT_TRACE(COMP_RATE, "AsocEntry addr : "
4784 MAC_FMT"\n",
4785 MAC_ARG(pEntry->macaddr));
4786 RT_TRACE(COMP_RATE, "RSSI = %ld\n",
4787 pEntry->rssi_stat.UndecoratedSmoothedPWDB);
4788 RT_TRACE(COMP_RATE,
4789 "RSSI_LEVEL = %d\n",
4790 rssi_level);
4791 RT_TRACE(COMP_RATE,
4792 "PreState = %d, CurState = %d\n",
4793 pRA->PreRATRState,
4794 pRA->ratr_state);
4795 priv->rtllib->UpdateHalRAMaskHandler(
4796 dev, false,
4797 pEntry->aid+1,
4798 pEntry->htinfo.MimoPs,
4799 pEntry->wireless_mode,
4800 pEntry->htinfo.bCurTxBW40MHz,
4801 rssi_level);
4802 pRA->PreRATRState = pRA->ratr_state;
4803 }
4804
4805 }
4806 }
4807 }
4808}
4809
4810void Adhoc_InitRateAdaptive(struct net_device *dev,struct sta_info *pEntry)
4811{
4812 prate_adaptive pRA = (prate_adaptive)&pEntry->rate_adaptive;
4813 struct r8192_priv *priv = rtllib_priv(dev);
4814
4815 pRA->ratr_state = DM_RATR_STA_MAX;
4816 pRA->high2low_rssi_thresh_for_ra = RateAdaptiveTH_High;
4817 pRA->low2high_rssi_thresh_for_ra20M = RateAdaptiveTH_Low_20M+5;
4818 pRA->low2high_rssi_thresh_for_ra40M = RateAdaptiveTH_Low_40M+5;
4819
4820 pRA->high_rssi_thresh_for_ra = RateAdaptiveTH_High+5;
4821 pRA->low_rssi_thresh_for_ra20M = RateAdaptiveTH_Low_20M;
4822 pRA->low_rssi_thresh_for_ra40M = RateAdaptiveTH_Low_40M;
4823
4824 if (priv->rf_type == RF_2T4R) {
4825 /* 2008/01/11 MH Modify 2T RATR table for different RSSI. */
4826 pRA->upper_rssi_threshold_ratr = 0x8f0f0000;
4827 pRA->middle_rssi_threshold_ratr = 0x8d0ff000;
4828 pRA->low_rssi_threshold_ratr = 0x8f0ff003;
4829 pRA->low_rssi_threshold_ratr_40M = 0x8f0ff007;
4830 pRA->low_rssi_threshold_ratr_20M = 0x8f0ff003;
4831 }
4832 else if (priv->rf_type == RF_1T2R)
4833 {
4834 pRA->upper_rssi_threshold_ratr = 0x000f0000;
4835 pRA->middle_rssi_threshold_ratr = 0x000ff000;
4836 pRA->low_rssi_threshold_ratr = 0x000ff003;
4837 pRA->low_rssi_threshold_ratr_40M = 0x000ff007;
4838 pRA->low_rssi_threshold_ratr_20M = 0x000ff003;
4839 }
4840
4841}
4842
4843
4844void Adhoc_InitRateAdaptiveState(struct net_device *dev,struct sta_info *pEntry)
4845{
4846 prate_adaptive pRA = (prate_adaptive)&pEntry->rate_adaptive;
4847
4848 pRA->ratr_state = DM_RATR_STA_MAX;
4849 pRA->PreRATRState = DM_RATR_STA_MAX;
4850}
4851
4852
4853#endif
4854/*---------------------------Define function prototype------------------------*/
diff --git a/drivers/staging/rtl8192e/rtl_dm.h b/drivers/staging/rtl8192e/rtl_dm.h
new file mode 100644
index 00000000000..1af0dc3b1cc
--- /dev/null
+++ b/drivers/staging/rtl8192e/rtl_dm.h
@@ -0,0 +1,331 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/
19#ifndef __R8192UDM_H__
20#define __R8192UDM_H__
21
22
23/*--------------------------Define Parameters-------------------------------*/
24#define OFDM_Table_Length 19
25#define CCK_Table_length 12
26
27#define DM_DIG_THRESH_HIGH 40
28#define DM_DIG_THRESH_LOW 35
29
30#define DM_FALSEALARM_THRESH_LOW 40
31#define DM_FALSEALARM_THRESH_HIGH 1000
32
33#define DM_DIG_HIGH_PWR_THRESH_HIGH 75
34#define DM_DIG_HIGH_PWR_THRESH_LOW 70
35
36#define BW_AUTO_SWITCH_HIGH_LOW 25
37#define BW_AUTO_SWITCH_LOW_HIGH 30
38
39#define DM_check_fsync_time_interval 500
40
41
42#define DM_DIG_BACKOFF 12
43#ifdef RTL8192SE
44#define DM_DIG_MAX 0x3e
45#elif defined RTL8190P || defined RTL8192E
46#define DM_DIG_MAX 0x36
47#endif
48#define DM_DIG_MIN 0x1c
49#define DM_DIG_MIN_Netcore 0x12
50
51#define DM_DIG_BACKOFF_MAX 12
52#define DM_DIG_BACKOFF_MIN -4
53
54#define RxPathSelection_SS_TH_low 30
55#define RxPathSelection_diff_TH 18
56
57#define RateAdaptiveTH_High 50
58#define RateAdaptiveTH_Low_20M 30
59#define RateAdaptiveTH_Low_40M 10
60#define VeryLowRSSI 15
61
62#ifdef RTL8192SE
63#define CTSToSelfTHVal 30
64#elif defined RTL8190P || defined RTL8192E
65#define CTSToSelfTHVal 35
66#endif
67
68#define WAIotTHVal 25
69
70#define E_FOR_TX_POWER_TRACK 300
71#define TX_POWER_NEAR_FIELD_THRESH_HIGH 68
72#define TX_POWER_NEAR_FIELD_THRESH_LOW 62
73#define TX_POWER_ATHEROAP_THRESH_HIGH 78
74#define TX_POWER_ATHEROAP_THRESH_LOW 72
75
76#define Current_Tx_Rate_Reg 0x1e0
77#define Initial_Tx_Rate_Reg 0x1e1
78#define Tx_Retry_Count_Reg 0x1ac
79#define RegC38_TH 20
80
81#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
82#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67
83
84#define TxHighPwrLevel_Normal 0
85#define TxHighPwrLevel_Level1 1
86#define TxHighPwrLevel_Level2 2
87
88#define DM_Type_ByFW 0
89#define DM_Type_ByDriver 1
90
91/*--------------------------Define Parameters-------------------------------*/
92
93
94/*------------------------------Define structure----------------------------*/
95typedef struct _dynamic_initial_gain_threshold_
96{
97 u8 dig_enable_flag;
98 u8 dig_algorithm;
99 u8 Dig_TwoPort_Algorithm;
100 u8 Dig_Ext_Port_Stage;
101 u8 dbg_mode;
102 u8 dig_algorithm_switch;
103
104 long rssi_low_thresh;
105 long rssi_high_thresh;
106
107 u32 FALowThresh;
108 u32 FAHighThresh;
109
110 long rssi_high_power_lowthresh;
111 long rssi_high_power_highthresh;
112
113 u8 dig_state;
114 u8 dig_highpwr_state;
115 u8 CurSTAConnectState;
116 u8 PreSTAConnectState;
117 u8 CurAPConnectState;
118 u8 PreAPConnectState;
119
120 u8 curpd_thstate;
121 u8 prepd_thstate;
122 u8 curcs_ratio_state;
123 u8 precs_ratio_state;
124
125 u32 pre_ig_value;
126 u32 cur_ig_value;
127
128 u8 Backoff_Enable_Flag;
129 u8 backoff_val;
130 char BackoffVal_range_max;
131 char BackoffVal_range_min;
132 u8 rx_gain_range_max;
133 u8 rx_gain_range_min;
134 bool initialgain_lowerbound_state;
135
136 long rssi_val;
137}dig_t;
138
139typedef enum tag_dynamic_init_gain_state_definition
140{
141 DM_STA_DIG_OFF = 0,
142 DM_STA_DIG_ON,
143 DM_STA_DIG_MAX
144}dm_dig_sta_e;
145
146
147typedef enum tag_dynamic_ratr_state_definition
148{
149 DM_RATR_STA_HIGH = 0,
150 DM_RATR_STA_MIDDLE = 1,
151 DM_RATR_STA_LOW = 2,
152 DM_RATR_STA_MAX
153}dm_ratr_sta_e;
154
155typedef enum tag_dynamic_init_gain_operation_type_definition
156{
157 DIG_TYPE_THRESH_HIGH = 0,
158 DIG_TYPE_THRESH_LOW = 1,
159 DIG_TYPE_THRESH_HIGHPWR_HIGH = 2,
160 DIG_TYPE_THRESH_HIGHPWR_LOW = 3,
161 DIG_TYPE_DBG_MODE = 4,
162 DIG_TYPE_RSSI = 5,
163 DIG_TYPE_ALGORITHM = 6,
164 DIG_TYPE_BACKOFF = 7,
165 DIG_TYPE_PWDB_FACTOR = 8,
166 DIG_TYPE_RX_GAIN_MIN = 9,
167 DIG_TYPE_RX_GAIN_MAX = 10,
168 DIG_TYPE_ENABLE = 20,
169 DIG_TYPE_DISABLE = 30,
170 DIG_OP_TYPE_MAX
171}dm_dig_op_e;
172
173typedef enum tag_dig_algorithm_definition
174{
175 DIG_ALGO_BY_FALSE_ALARM = 0,
176 DIG_ALGO_BY_RSSI = 1,
177 DIG_ALGO_BEFORE_CONNECT_BY_RSSI_AND_ALARM = 2,
178 DIG_ALGO_BY_TOW_PORT = 3,
179 DIG_ALGO_MAX
180}dm_dig_alg_e;
181
182typedef enum tag_DIG_TWO_PORT_ALGO_Definition
183{
184 DIG_TWO_PORT_ALGO_RSSI = 0,
185 DIG_TWO_PORT_ALGO_FALSE_ALARM = 1,
186}DM_DIG_TWO_PORT_ALG_E;
187
188
189typedef enum tag_DIG_EXT_PORT_ALGO_Definition
190{
191 DIG_EXT_PORT_STAGE_0 = 0,
192 DIG_EXT_PORT_STAGE_1 = 1,
193 DIG_EXT_PORT_STAGE_2 = 2,
194 DIG_EXT_PORT_STAGE_3 = 3,
195 DIG_EXT_PORT_STAGE_MAX = 4,
196}DM_DIG_EXT_PORT_ALG_E;
197
198typedef enum tag_dig_dbgmode_definition
199{
200 DIG_DBG_OFF = 0,
201 DIG_DBG_ON = 1,
202 DIG_DBG_MAX
203}dm_dig_dbg_e;
204
205typedef enum tag_dig_connect_definition
206{
207 DIG_STA_DISCONNECT = 0,
208 DIG_STA_CONNECT = 1,
209 DIG_STA_BEFORE_CONNECT = 2,
210 DIG_AP_DISCONNECT = 3,
211 DIG_AP_CONNECT = 4,
212 DIG_AP_ADD_STATION = 5,
213 DIG_CONNECT_MAX
214}dm_dig_connect_e;
215
216typedef enum tag_dig_packetdetection_threshold_definition
217{
218 DIG_PD_AT_LOW_POWER = 0,
219 DIG_PD_AT_NORMAL_POWER = 1,
220 DIG_PD_AT_HIGH_POWER = 2,
221 DIG_PD_MAX
222}dm_dig_pd_th_e;
223
224typedef enum tag_dig_cck_cs_ratio_state_definition
225{
226 DIG_CS_RATIO_LOWER = 0,
227 DIG_CS_RATIO_HIGHER = 1,
228 DIG_CS_MAX
229}dm_dig_cs_ratio_e;
230typedef struct _Dynamic_Rx_Path_Selection_
231{
232 u8 Enable;
233 u8 DbgMode;
234 u8 cck_method;
235 u8 cck_Rx_path;
236
237 u8 SS_TH_low;
238 u8 diff_TH;
239 u8 disabledRF;
240 u8 reserved;
241
242 u8 rf_rssi[4];
243 u8 rf_enable_rssi_th[4];
244 long cck_pwdb_sta[4];
245}DRxPathSel;
246
247typedef enum tag_CCK_Rx_Path_Method_Definition
248{
249 CCK_Rx_Version_1 = 0,
250 CCK_Rx_Version_2= 1,
251 CCK_Rx_Version_MAX
252}DM_CCK_Rx_Path_Method;
253
254
255typedef enum tag_DM_DbgMode_Definition
256{
257 DM_DBG_OFF = 0,
258 DM_DBG_ON = 1,
259 DM_DBG_MAX
260}DM_DBG_E;
261
262typedef struct tag_Tx_Config_Cmd_Format
263{
264 u32 Op;
265 u32 Length;
266 u32 Value;
267}DCMD_TXCMD_T, *PDCMD_TXCMD_T;
268/*------------------------------Define structure----------------------------*/
269
270
271/*------------------------Export global variable----------------------------*/
272extern dig_t dm_digtable;
273extern u8 dm_shadow[16][256];
274extern DRxPathSel DM_RxPathSelTable;
275
276extern u8 test_flag;
277/*------------------------Export global variable----------------------------*/
278
279
280/*------------------------Export Marco Definition---------------------------*/
281#define DM_APInitGainChangeNotify(Event) {dm_digtable.CurAPConnectState = Event;}
282/*------------------------Export Marco Definition---------------------------*/
283
284
285/*--------------------------Exported Function prototype---------------------*/
286/*--------------------------Exported Function prototype---------------------*/
287extern void init_hal_dm(struct net_device *dev);
288extern void deinit_hal_dm(struct net_device *dev);
289
290extern void hal_dm_watchdog(struct net_device *dev);
291
292
293extern void init_rate_adaptive(struct net_device *dev);
294extern void dm_txpower_trackingcallback(void *data);
295
296#ifndef RTL8192SE
297extern void dm_cck_txpower_adjust(struct net_device *dev,bool binch14);
298#endif
299
300extern void dm_restore_dynamic_mechanism_state(struct net_device *dev);
301extern void dm_backup_dynamic_mechanism_state(struct net_device *dev);
302extern void dm_change_dynamic_initgain_thresh(struct net_device *dev,
303 u32 dm_type,
304 u32 dm_value);
305extern void DM_ChangeFsyncSetting(struct net_device *dev,
306 s32 DM_Type,
307 s32 DM_Value);
308extern void dm_force_tx_fw_info(struct net_device *dev,
309 u32 force_type,
310 u32 force_value);
311extern void dm_init_edca_turbo(struct net_device *dev);
312extern void dm_rf_operation_test_callback(unsigned long data);
313extern void dm_rf_pathcheck_workitemcallback(void *data);
314extern void dm_fsync_timer_callback(unsigned long data);
315extern void dm_check_fsync(struct net_device *dev);
316extern void dm_shadow_init(struct net_device *dev);
317extern void dm_initialize_txpower_tracking(struct net_device *dev);
318
319#if (defined RTL8192E || defined RTL8192SE)
320extern void dm_CheckRfCtrlGPIO(void *data);
321#endif
322
323#ifdef RTL8192SE
324extern void Power_DomainInit92SE(struct net_device *dev);
325#endif
326
327extern void dm_InitRateAdaptiveMask(struct net_device * dev);
328
329#endif /*__R8192UDM_H__ */
330
331/* End of r8192U_dm.h */
diff --git a/drivers/staging/rtl8192e/rtl_eeprom.c b/drivers/staging/rtl8192e/rtl_eeprom.c
new file mode 100644
index 00000000000..14a8c1d13e2
--- /dev/null
+++ b/drivers/staging/rtl8192e/rtl_eeprom.c
@@ -0,0 +1,141 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * Based on the r8180 driver, which is:
5 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 *
19 * The full GNU General Public License is included in this distribution in the
20 * file called LICENSE.
21 *
22 * Contact Information:
23 * wlanfae <wlanfae@realtek.com>
24******************************************************************************/
25#include "rtl_core.h"
26#include "rtl_eeprom.h"
27
28void eprom_cs(struct net_device *dev, short bit)
29{
30 if (bit)
31 write_nic_byte(dev, EPROM_CMD,
32 (1<<EPROM_CS_SHIFT) | \
33 read_nic_byte(dev, EPROM_CMD));
34 else
35 write_nic_byte(dev, EPROM_CMD, read_nic_byte(dev, EPROM_CMD)\
36 &~(1<<EPROM_CS_SHIFT));
37
38 udelay(EPROM_DELAY);
39}
40
41
42void eprom_ck_cycle(struct net_device *dev)
43{
44 write_nic_byte(dev, EPROM_CMD,
45 (1<<EPROM_CK_SHIFT) | read_nic_byte(dev,EPROM_CMD));
46 udelay(EPROM_DELAY);
47 write_nic_byte(dev, EPROM_CMD,
48 read_nic_byte(dev, EPROM_CMD) &~ (1<<EPROM_CK_SHIFT));
49 udelay(EPROM_DELAY);
50}
51
52
53void eprom_w(struct net_device *dev,short bit)
54{
55 if (bit)
56 write_nic_byte(dev, EPROM_CMD, (1<<EPROM_W_SHIFT) | \
57 read_nic_byte(dev,EPROM_CMD));
58 else
59 write_nic_byte(dev, EPROM_CMD, read_nic_byte(dev,EPROM_CMD)\
60 &~(1<<EPROM_W_SHIFT));
61
62 udelay(EPROM_DELAY);
63}
64
65
66short eprom_r(struct net_device *dev)
67{
68 short bit;
69
70 bit=(read_nic_byte(dev, EPROM_CMD) & (1<<EPROM_R_SHIFT) );
71 udelay(EPROM_DELAY);
72
73 if (bit)
74 return 1;
75 return 0;
76}
77
78
79void eprom_send_bits_string(struct net_device *dev, short b[], int len)
80{
81 int i;
82
83 for (i=0; i<len; i++){
84 eprom_w(dev, b[i]);
85 eprom_ck_cycle(dev);
86 }
87}
88
89
90u32 eprom_read(struct net_device *dev, u32 addr)
91{
92 struct r8192_priv *priv = rtllib_priv(dev);
93 short read_cmd[]={1,1,0};
94 short addr_str[8];
95 int i;
96 int addr_len;
97 u32 ret;
98
99 ret=0;
100 write_nic_byte(dev, EPROM_CMD,
101 (EPROM_CMD_PROGRAM<<EPROM_CMD_OPERATING_MODE_SHIFT));
102 udelay(EPROM_DELAY);
103
104 if (priv->epromtype==EEPROM_93C56){
105 addr_str[7]=addr & 1;
106 addr_str[6]=addr & (1<<1);
107 addr_str[5]=addr & (1<<2);
108 addr_str[4]=addr & (1<<3);
109 addr_str[3]=addr & (1<<4);
110 addr_str[2]=addr & (1<<5);
111 addr_str[1]=addr & (1<<6);
112 addr_str[0]=addr & (1<<7);
113 addr_len=8;
114 }else{
115 addr_str[5]=addr & 1;
116 addr_str[4]=addr & (1<<1);
117 addr_str[3]=addr & (1<<2);
118 addr_str[2]=addr & (1<<3);
119 addr_str[1]=addr & (1<<4);
120 addr_str[0]=addr & (1<<5);
121 addr_len=6;
122 }
123 eprom_cs(dev, 1);
124 eprom_ck_cycle(dev);
125 eprom_send_bits_string(dev, read_cmd, 3);
126 eprom_send_bits_string(dev, addr_str, addr_len);
127
128 eprom_w(dev, 0);
129
130 for (i = 0; i < 16; i++){
131 eprom_ck_cycle(dev);
132 ret |= (eprom_r(dev)<<(15-i));
133 }
134
135 eprom_cs(dev, 0);
136 eprom_ck_cycle(dev);
137
138 write_nic_byte(dev, EPROM_CMD,
139 (EPROM_CMD_NORMAL<<EPROM_CMD_OPERATING_MODE_SHIFT));
140 return ret;
141}
diff --git a/drivers/staging/rtl8192e/rtl_eeprom.h b/drivers/staging/rtl8192e/rtl_eeprom.h
new file mode 100644
index 00000000000..f765efbf809
--- /dev/null
+++ b/drivers/staging/rtl8192e/rtl_eeprom.h
@@ -0,0 +1,29 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * Based on the r8180 driver, which is:
5 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 *
19 * The full GNU General Public License is included in this distribution in the
20 * file called LICENSE.
21 *
22 * Contact Information:
23 * wlanfae <wlanfae@realtek.com>
24******************************************************************************/
25
26
27#define EPROM_DELAY 10
28
29u32 eprom_read(struct net_device *dev,u32 addr);
diff --git a/drivers/staging/rtl8192e/rtl_ethtool.c b/drivers/staging/rtl8192e/rtl_ethtool.c
new file mode 100644
index 00000000000..6c732e18540
--- /dev/null
+++ b/drivers/staging/rtl8192e/rtl_ethtool.c
@@ -0,0 +1,59 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * Based on the r8180 driver, which is:
5 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 *
19 * The full GNU General Public License is included in this distribution in the
20 * file called LICENSE.
21 *
22 * Contact Information:
23 * wlanfae <wlanfae@realtek.com>
24 *****************************************************************************
25 */
26#include <linux/netdevice.h>
27#include <linux/ethtool.h>
28#include <linux/delay.h>
29
30#include "rtl_core.h"
31
32#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
33static void rtl819x_ethtool_get_drvinfo(struct net_device *dev,
34 struct ethtool_drvinfo *info)
35{
36 struct r8192_priv *priv = rtllib_priv(dev);
37
38 strcpy(info->driver, DRV_NAME);
39 strcpy(info->version, DRV_VERSION);
40#if defined RTL8192SE
41 snprintf(info->fw_version, sizeof(info->fw_version), "%d",
42 priv->pFirmware->FirmwareVersion);
43#endif
44 strcpy(info->bus_info, pci_name(priv->pdev));
45}
46
47static u32 rtl819x_ethtool_get_link(struct net_device *dev)
48{
49 struct r8192_priv *priv = rtllib_priv(dev);
50
51 return ((priv->rtllib->state == RTLLIB_LINKED) ||
52 (priv->rtllib->state == RTLLIB_LINKED_SCANNING));
53}
54
55const struct ethtool_ops rtl819x_ethtool_ops = {
56 .get_drvinfo = rtl819x_ethtool_get_drvinfo,
57 .get_link = rtl819x_ethtool_get_link,
58};
59#endif
diff --git a/drivers/staging/rtl8192e/rtl_pci.c b/drivers/staging/rtl8192e/rtl_pci.c
new file mode 100644
index 00000000000..39b96c12af5
--- /dev/null
+++ b/drivers/staging/rtl8192e/rtl_pci.c
@@ -0,0 +1,444 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * Based on the r8180 driver, which is:
5 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 *
19 * The full GNU General Public License is included in this distribution in the
20 * file called LICENSE.
21 *
22 * Contact Information:
23 * wlanfae <wlanfae@realtek.com>
24 *****************************************************************************/
25#include "rtl_pci.h"
26#include "rtl_core.h"
27
28#if defined RTL8192CE || defined RTL8192SE
29bool
30rtl8192_get_LinkControl_field(
31 struct net_device *dev,
32 u8 BusNum,
33 u8 DevNum,
34 u8 FuncNum
35 )
36{
37 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
38
39 RT_PCI_CAPABILITIES_HEADER CapabilityHdr;
40 unsigned char CapabilityOffset, Num4Bytes;
41 u32 PciCfgAddrPort=0;
42 u8 LinkCtrlReg;
43 bool Status = false;
44
45 if ( BusNum == 0xff && DevNum == 0xff && FuncNum == 0xff ){
46 printk("GetLinkControlField(): Fail to find PCIe Capability\n");
47 return false;
48 }
49
50
51 PciCfgAddrPort= (BusNum<< 16)|(DevNum << 11)|(FuncNum << 8)|(1 << 31);
52
53
54 Num4Bytes = 0x34/4;
55 NdisRawWritePortUlong(PCI_CONF_ADDRESS , PciCfgAddrPort+( Num4Bytes<< 2));
56 NdisRawReadPortUchar(PCI_CONF_DATA, &CapabilityOffset);
57
58
59 while (CapabilityOffset != 0)
60 {
61 Num4Bytes = CapabilityOffset/4;
62
63
64 NdisRawWritePortUlong(PCI_CONF_ADDRESS , PciCfgAddrPort+( Num4Bytes<< 2));
65 NdisRawReadPortUshort(PCI_CONF_DATA, (u16*)&CapabilityHdr);
66
67 if (CapabilityHdr.CapabilityID == PCI_CAPABILITY_ID_PCI_EXPRESS)
68 {
69 break;
70 }
71 else
72 {
73 CapabilityOffset = CapabilityHdr.Next;
74 }
75 }
76
77
78 if (CapabilityHdr.CapabilityID == PCI_CAPABILITY_ID_PCI_EXPRESS)
79 {
80 Num4Bytes = (CapabilityOffset+0x10)/4;
81
82 NdisRawWritePortUlong(PCI_CONF_ADDRESS , PciCfgAddrPort+(Num4Bytes << 2));
83 NdisRawReadPortUchar(PCI_CONF_DATA, &LinkCtrlReg);
84
85 priv->NdisAdapter.PciBridgePCIeHdrOffset = CapabilityOffset;
86 priv->NdisAdapter.PciBridgeLinkCtrlReg = LinkCtrlReg;
87
88 Status = true;
89 }
90 else
91 {
92 printk("GetLinkControlField(): Cannot Find PCIe Capability\n");
93 }
94
95 return Status;
96}
97
98bool
99rtl8192_get_pci_BusInfo(
100 struct net_device *dev,
101 u16 VendorId,
102 u16 DeviceId,
103 u8 IRQL,
104 u8 BaseCode,
105 u8 SubClass,
106 u8 filed19val,
107 u8* BusNum,
108 u8* DevNum,
109 u8* FuncNum
110 )
111{
112
113 u8 busNumIdx, deviceNumIdx, functionNumIdx;
114 u32 PciCfgAddrPort=0;
115 u32 devVenID = 0, classCode, field19, headertype;
116 u16 venId, devId;
117 u8 basec, subc, irqLine;
118 u16 RegOffset;
119 bool bSingleFunc = false;
120 bool bBridgeChk = false;
121
122 *BusNum = 0xFF;
123 *DevNum = 0xFF;
124 *FuncNum = 0xFF;
125
126 if ((BaseCode == PCI_CLASS_BRIDGE_DEV) && (SubClass==PCI_SUBCLASS_BR_PCI_TO_PCI) && (filed19val==U1DONTCARE))
127 bBridgeChk = true;
128
129 for (busNumIdx = 0; busNumIdx < PCI_MAX_BRIDGE_NUMBER ; busNumIdx++)
130 {
131 for (deviceNumIdx = 0; deviceNumIdx < PCI_MAX_DEVICES; deviceNumIdx ++)
132 {
133 bSingleFunc = false;
134 for (functionNumIdx = 0; functionNumIdx < PCI_MAX_FUNCTION; functionNumIdx++)
135 {
136
137 if (functionNumIdx == 0)
138 {
139 PciCfgAddrPort= (busNumIdx << 16)|(deviceNumIdx << 11)|(functionNumIdx << 8)|(1 << 31);
140 NdisRawWritePortUlong(PCI_CONF_ADDRESS , PciCfgAddrPort + (3 << 2));
141 NdisRawReadPortUlong(PCI_CONF_DATA, &headertype);
142 headertype = ((headertype >> 16) & 0x0080) >> 7;
143 if ( headertype == 0)
144 bSingleFunc = true;
145 }
146 else
147 {
148 if (bSingleFunc == true) break;
149 }
150
151 PciCfgAddrPort= (busNumIdx << 16)|(deviceNumIdx << 11)|(functionNumIdx << 8)|(1 << 31);
152
153 NdisRawWritePortUlong(PCI_CONF_ADDRESS , PciCfgAddrPort);
154 NdisRawReadPortUlong(PCI_CONF_DATA, &devVenID);
155
156 if ( devVenID == 0xFFFFFFFF||devVenID == 0 ) continue;
157
158 RegOffset = 0x3C;
159 PciCfgAddrPort= (busNumIdx << 16)|(deviceNumIdx << 11)|(functionNumIdx << 8)|(1 << 31)|(RegOffset & 0xFFFFFFFC);
160 NdisRawWritePortUlong(PCI_CONF_ADDRESS , PciCfgAddrPort);
161 NdisRawReadPortUchar((PCI_CONF_DATA+ (RegOffset & 0x3)), &irqLine);
162
163 venId = (u16)(devVenID >> 0)& 0xFFFF;
164 devId = (u16)(devVenID >> 16)& 0xFFFF;
165
166 if (!bBridgeChk && (venId != VendorId) && (VendorId != U2DONTCARE))
167 continue;
168
169 if (!bBridgeChk && (devId != DeviceId) && (DeviceId != U2DONTCARE))
170 continue;
171
172 if (!bBridgeChk && (irqLine != IRQL) && (IRQL != U1DONTCARE))
173 continue;
174
175 PciCfgAddrPort= (busNumIdx << 16)|(deviceNumIdx << 11)|(functionNumIdx << 8)|(1 << 31);
176 NdisRawWritePortUlong(PCI_CONF_ADDRESS , PciCfgAddrPort + (2 << 2));
177 NdisRawReadPortUlong(PCI_CONF_DATA, &classCode);
178 classCode = classCode >> 8;
179
180 basec = (u8)(classCode >>16 ) & 0xFF;
181 subc = (u8)(classCode >>8 ) & 0xFF;
182 if (bBridgeChk && (venId != VendorId) &&(basec == BaseCode) && (subc== SubClass ) )
183 return true;
184
185 if (bBridgeChk && (venId != VendorId) && (VendorId != U2DONTCARE))
186 continue;
187
188 if (bBridgeChk && (devId != DeviceId) && (DeviceId != U2DONTCARE))
189 continue;
190
191 if (bBridgeChk && (irqLine != IRQL) && (IRQL != U1DONTCARE))
192 continue;
193
194
195 NdisRawWritePortUlong(PCI_CONF_ADDRESS , PciCfgAddrPort + (6 << 2));
196 NdisRawReadPortUlong(PCI_CONF_DATA, &field19);
197 field19 = (field19 >> 8)& 0xFF;
198
199 if ((basec == BaseCode) && (subc== SubClass ) && ((field19 == filed19val) ||(filed19val==U1DONTCARE) ))
200 {
201 *BusNum = busNumIdx;
202 *DevNum = deviceNumIdx;
203 *FuncNum = functionNumIdx;
204
205 printk( "GetPciBusInfo(): Find Device(%X:%X) bus=%d dev=%d, func=%d\n",VendorId, DeviceId, busNumIdx, deviceNumIdx, functionNumIdx);
206 return true;
207 }
208 }
209 }
210 }
211
212 printk( "GetPciBusInfo(): Cannot Find Device(%X:%X:%X)\n",VendorId, DeviceId, devVenID);
213 return false;
214}
215
216bool rtl8192_get_pci_BridegInfo(
217 struct net_device *dev,
218 u8 BaseCode,
219 u8 SubClass,
220 u8 filed19val,
221 u8* BusNum,
222 u8* DevNum,
223 u8* FuncNum,
224 u16* VendorId,
225 u16* DeviceId
226 )
227
228{
229
230 u8 busNumIdx, deviceNumIdx, functionNumIdx;
231 u32 PciCfgAddrPort=0;
232 u32 devVenID, classCode, field19, headertype;
233 u16 venId, devId;
234 u8 basec, subc, irqLine;
235 u16 RegOffset;
236 bool bSingleFunc = false;
237
238 *BusNum = 0xFF;
239 *DevNum = 0xFF;
240 *FuncNum = 0xFF;
241
242 for (busNumIdx = 0; busNumIdx < PCI_MAX_BRIDGE_NUMBER ; busNumIdx++)
243 {
244 for (deviceNumIdx = 0; deviceNumIdx < PCI_MAX_DEVICES; deviceNumIdx ++)
245 {
246 bSingleFunc = false;
247 for (functionNumIdx = 0; functionNumIdx < PCI_MAX_FUNCTION; functionNumIdx++)
248 {
249
250 if (functionNumIdx == 0)
251 {
252 PciCfgAddrPort= (busNumIdx << 16)|(deviceNumIdx << 11)|(functionNumIdx << 8)|(1 << 31);
253 NdisRawWritePortUlong(PCI_CONF_ADDRESS , PciCfgAddrPort + (3 << 2));
254 NdisRawReadPortUlong(PCI_CONF_DATA, &headertype);
255 headertype = ((headertype >> 16) & 0x0080) >> 7;
256 if ( headertype == 0)
257 bSingleFunc = true;
258 }
259 else
260 {
261 if ( bSingleFunc ==true ) break;
262 }
263
264 PciCfgAddrPort= (busNumIdx << 16)|(deviceNumIdx << 11)|(functionNumIdx << 8)|(1 << 31);
265
266 NdisRawWritePortUlong(PCI_CONF_ADDRESS , PciCfgAddrPort);
267 NdisRawReadPortUlong(PCI_CONF_DATA, &devVenID);
268
269 RegOffset = 0x3C;
270 PciCfgAddrPort= (busNumIdx << 16)|(deviceNumIdx << 11)|(functionNumIdx << 8)|(1 << 31)|(RegOffset & 0xFFFFFFFC);
271 NdisRawWritePortUlong(PCI_CONF_ADDRESS , PciCfgAddrPort);
272 NdisRawReadPortUchar((PCI_CONF_DATA+ (RegOffset & 0x3)), &irqLine);
273
274 venId = (u16)(devVenID >> 0)& 0xFFFF;
275 devId = (u16)(devVenID >> 16)& 0xFFFF;
276
277 PciCfgAddrPort= (busNumIdx << 16)|(deviceNumIdx << 11)|(functionNumIdx << 8)|(1 << 31);
278 NdisRawWritePortUlong(PCI_CONF_ADDRESS , PciCfgAddrPort + (2 << 2));
279 NdisRawReadPortUlong(PCI_CONF_DATA, &classCode);
280 classCode = classCode >> 8;
281
282 basec = (u8)(classCode >>16 ) & 0xFF;
283 subc = (u8)(classCode >>8 ) & 0xFF;
284
285 NdisRawWritePortUlong(PCI_CONF_ADDRESS , PciCfgAddrPort + (6 << 2));
286 NdisRawReadPortUlong(PCI_CONF_DATA, &field19);
287 field19 = (field19 >> 8)& 0xFF;
288
289 if ((basec == BaseCode) && (subc== SubClass ) && ((field19 == filed19val) ||(filed19val==U1DONTCARE) ))
290 {
291 *BusNum = busNumIdx;
292 *DevNum = deviceNumIdx;
293 *FuncNum = functionNumIdx;
294 *VendorId = venId;
295 *DeviceId = devId;
296
297 printk("GetPciBridegInfo : Find Device(%X:%X) bus=%d dev=%d, func=%d\n",
298 venId, devId, busNumIdx, deviceNumIdx, functionNumIdx);
299
300 return true;
301 }
302 }
303 }
304 }
305
306 printk( "GetPciBridegInfo(): Cannot Find PciBridge for Device\n");
307
308 return false;
309}
310
311
312static u16 PciBridgeVendorArray[PCI_BRIDGE_VENDOR_MAX]
313 = {INTEL_VENDOR_ID,ATI_VENDOR_ID,AMD_VENDOR_ID,SIS_VENDOR_ID};
314
315void
316rtl8192_pci_find_BridgeInfo(struct net_device *dev)
317{
318 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
319
320 u8 PciBridgeBusNum = 0xff;
321 u8 PciBridgeDevNum = 0xff;
322 u8 PciBridgeFuncNum = 0xff;
323 u16 PciBridgeVendorId= 0xff;
324 u16 PciBridgeDeviceId = 0xff;
325 u8 tmp = 0;
326
327 rtl8192_get_pci_BridegInfo(dev,
328 PCI_CLASS_BRIDGE_DEV,
329 PCI_SUBCLASS_BR_PCI_TO_PCI ,
330 priv->NdisAdapter.BusNumber,
331 &PciBridgeBusNum,
332 &PciBridgeDevNum,
333 &PciBridgeFuncNum,
334 &PciBridgeVendorId,
335 &PciBridgeDeviceId);
336
337
338 priv->NdisAdapter.PciBridgeVendor = PCI_BRIDGE_VENDOR_UNKNOWN;
339
340 for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) {
341 if (PciBridgeVendorId == PciBridgeVendorArray[tmp]) {
342 priv->NdisAdapter.PciBridgeVendor = tmp;
343 printk("Pci Bridge Vendor is found index: %d\n",tmp);
344 break;
345 }
346 }
347 printk("Pci Bridge Vendor is %x\n",PciBridgeVendorArray[tmp]);
348
349 priv->NdisAdapter.PciBridgeBusNum = PciBridgeBusNum;
350 priv->NdisAdapter.PciBridgeDevNum = PciBridgeDevNum;
351 priv->NdisAdapter.PciBridgeFuncNum = PciBridgeFuncNum;
352 priv->NdisAdapter.PciBridgeVendorId = PciBridgeVendorId;
353 priv->NdisAdapter.PciBridgeDeviceId = PciBridgeDeviceId;
354
355
356}
357#endif
358
359static void rtl8192_parse_pci_configuration(struct pci_dev *pdev, struct net_device *dev)
360{
361 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
362
363 u8 tmp;
364 int pos;
365 u8 LinkCtrlReg;
366
367 pos = pci_find_capability(priv->pdev, PCI_CAP_ID_EXP);
368 pci_read_config_byte(priv->pdev, pos + PCI_EXP_LNKCTL, &LinkCtrlReg);
369 priv->NdisAdapter.LinkCtrlReg = LinkCtrlReg;
370
371 RT_TRACE(COMP_INIT, "Link Control Register =%x\n", priv->NdisAdapter.LinkCtrlReg);
372
373 pci_read_config_byte(pdev, 0x98, &tmp);
374 tmp |=BIT4;
375 pci_write_config_byte(pdev, 0x98, tmp);
376
377 tmp = 0x17;
378 pci_write_config_byte(pdev, 0x70f, tmp);
379}
380
381bool rtl8192_pci_findadapter(struct pci_dev *pdev, struct net_device *dev)
382{
383 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
384 u16 VenderID;
385 u16 DeviceID;
386 u8 RevisionID;
387 u16 IrqLine;
388
389 VenderID = pdev->vendor;
390 DeviceID = pdev->device;
391 RevisionID = pdev->revision;
392 pci_read_config_word(pdev, 0x3C, &IrqLine);
393
394 priv->card_8192 = priv->ops->nic_type;
395
396 if (DeviceID == 0x8172) {
397 switch (RevisionID) {
398 case HAL_HW_PCI_REVISION_ID_8192PCIE:
399 printk("Adapter(8192 PCI-E) is found - DeviceID=%x\n", DeviceID);
400 priv->card_8192 = NIC_8192E;
401 break;
402 case HAL_HW_PCI_REVISION_ID_8192SE:
403 printk("Adapter(8192SE) is found - DeviceID=%x\n", DeviceID);
404 priv->card_8192 = NIC_8192SE;
405 break;
406 default:
407 printk("UNKNOWN nic type(%4x:%4x)\n", pdev->vendor, pdev->device);
408 priv->card_8192 = NIC_UNKNOWN;
409 return false;
410 }
411 }
412
413 if (priv->ops->nic_type != priv->card_8192) {
414 printk("Detect info(%x) and hardware info(%x) not match!\n",
415 priv->ops->nic_type, priv->card_8192);
416 printk("Please select proper driver before install!!!!\n");
417 return false;
418 }
419
420#if defined RTL8192CE || defined RTL8192SE
421 rtl8192_get_pci_BusInfo(dev,
422 VenderID,
423 DeviceID,
424 (u8)IrqLine,
425 0x02,0x80, U1DONTCARE,
426 &priv->NdisAdapter.BusNumber,
427 &priv->NdisAdapter.DevNumber,
428 &priv->NdisAdapter.FuncNumber);
429
430 rtl8192_pci_find_BridgeInfo(dev);
431
432#ifdef RTL8192SE
433 if (priv->NdisAdapter.PciBridgeVendor != PCI_BRIDGE_VENDOR_UNKNOWN)
434#endif
435 {
436 rtl8192_get_LinkControl_field(dev, priv->NdisAdapter.PciBridgeBusNum,
437 priv->NdisAdapter.PciBridgeDevNum, priv->NdisAdapter.PciBridgeFuncNum);
438 }
439#endif
440
441 rtl8192_parse_pci_configuration(pdev, dev);
442
443 return true;
444}
diff --git a/drivers/staging/rtl8192e/rtl_pci.h b/drivers/staging/rtl8192e/rtl_pci.h
new file mode 100644
index 00000000000..22662725b40
--- /dev/null
+++ b/drivers/staging/rtl8192e/rtl_pci.h
@@ -0,0 +1,104 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * Based on the r8180 driver, which is:
5 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 *
19 * The full GNU General Public License is included in this distribution in the
20 * file called LICENSE.
21 *
22 * Contact Information:
23 * wlanfae <wlanfae@realtek.com>
24 ******************************************************************************/
25#ifndef _RTL_PCI_H
26#define _RTL_PCI_H
27
28#include <linux/types.h>
29#include <linux/pci.h>
30#include "rtllib.h"
31
32static inline void NdisRawWritePortUlong(u32 port, u32 val)
33{
34 outl(val, port);
35}
36
37static inline void NdisRawWritePortUchar(u32 port, u8 val)
38{
39 outb(val, port);
40}
41
42static inline void NdisRawReadPortUchar(u32 port, u8 *pval)
43{
44 *pval = inb(port);
45}
46
47static inline void NdisRawReadPortUshort(u32 port, u16 *pval)
48{
49 *pval = inw(port);
50}
51
52static inline void NdisRawReadPortUlong(u32 port, u32 *pval)
53{
54 *pval = inl(port);
55}
56
57typedef struct _mp_adapter{
58 u8 LinkCtrlReg;
59
60 u8 BusNumber;
61 u8 DevNumber;
62 u8 FuncNumber;
63
64 u8 PciBridgeBusNum;
65 u8 PciBridgeDevNum;
66 u8 PciBridgeFuncNum;
67 u8 PciBridgeVendor;
68 u16 PciBridgeVendorId;
69 u16 PciBridgeDeviceId;
70 u8 PciBridgePCIeHdrOffset;
71 u8 PciBridgeLinkCtrlReg;
72}mp_adapter,*pmp_adapter;
73
74typedef struct _RT_PCI_CAPABILITIES_HEADER {
75 unsigned char CapabilityID;
76 unsigned char Next;
77} RT_PCI_CAPABILITIES_HEADER, *PRT_PCI_CAPABILITIES_HEADER;
78
79#define PCI_MAX_BRIDGE_NUMBER 255
80#define PCI_MAX_DEVICES 32
81#define PCI_MAX_FUNCTION 8
82
83#define PCI_CONF_ADDRESS 0x0CF8
84#define PCI_CONF_DATA 0x0CFC
85
86#define PCI_CLASS_BRIDGE_DEV 0x06
87#define PCI_SUBCLASS_BR_PCI_TO_PCI 0x04
88
89#define U1DONTCARE 0xFF
90#define U2DONTCARE 0xFFFF
91#define U4DONTCARE 0xFFFFFFFF
92
93#define INTEL_VENDOR_ID 0x8086
94#define SIS_VENDOR_ID 0x1039
95#define ATI_VENDOR_ID 0x1002
96#define ATI_DEVICE_ID 0x7914
97#define AMD_VENDOR_ID 0x1022
98
99#define PCI_CAPABILITY_ID_PCI_EXPRESS 0x10
100
101struct net_device;
102bool rtl8192_pci_findadapter(struct pci_dev *pdev, struct net_device *dev);
103
104#endif
diff --git a/drivers/staging/rtl8192e/rtl_pm.c b/drivers/staging/rtl8192e/rtl_pm.c
new file mode 100644
index 00000000000..4fbe819b59c
--- /dev/null
+++ b/drivers/staging/rtl8192e/rtl_pm.c
@@ -0,0 +1,168 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/
19
20#ifdef CONFIG_PM_RTL
21#include "rtl_core.h"
22#include "r8192E_hw.h"
23#include "r8190P_rtl8256.h"
24#include "rtl_pm.h"
25
26int rtl8192E_save_state (struct pci_dev *dev, pm_message_t state)
27{
28 printk(KERN_NOTICE "r8192E save state call (state %u).\n", state.event);
29 return(-EAGAIN);
30}
31
32
33int rtl8192E_suspend (struct pci_dev *pdev, pm_message_t state)
34{
35 struct net_device *dev = pci_get_drvdata(pdev);
36 struct r8192_priv *priv = rtllib_priv(dev);
37#if !(defined RTL8192SE || defined RTL8192CE)
38 u32 ulRegRead;
39#endif
40
41 RT_TRACE(COMP_POWER, "============> r8192E suspend call.\n");
42 printk("============> r8192E suspend call.\n");
43#ifdef ENABLE_GPIO_RADIO_CTL
44 del_timer_sync(&priv->gpio_polling_timer);
45 cancel_delayed_work(&priv->gpio_change_rf_wq);
46 priv->polling_timer_on = 0;
47#endif
48
49 if (!netif_running(dev)){
50 printk("RTL819XE:UI is open out of suspend function\n");
51 goto out_pci_suspend;
52 }
53
54#ifdef HAVE_NET_DEVICE_OPS
55 if (dev->netdev_ops->ndo_stop)
56 dev->netdev_ops->ndo_stop(dev);
57#else
58 dev->stop(dev);
59#endif
60 netif_device_detach(dev);
61
62#if !(defined RTL8192SE || defined RTL8192CE)
63 if (!priv->rtllib->bSupportRemoteWakeUp) {
64 MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_INIT,true);
65 ulRegRead = read_nic_dword(dev, CPU_GEN);
66 ulRegRead|=CPU_GEN_SYSTEM_RESET;
67 write_nic_dword(dev, CPU_GEN, ulRegRead);
68 } else {
69 write_nic_dword(dev, WFCRC0, 0xffffffff);
70 write_nic_dword(dev, WFCRC1, 0xffffffff);
71 write_nic_dword(dev, WFCRC2, 0xffffffff);
72#ifdef RTL8190P
73 {
74 u8 ucRegRead;
75 ucRegRead = read_nic_byte(dev, GPO);
76 ucRegRead |= BIT0;
77 write_nic_byte(dev, GPO, ucRegRead);
78 }
79#endif
80 write_nic_byte(dev, PMR, 0x5);
81 write_nic_byte(dev, MacBlkCtrl, 0xa);
82 }
83#endif
84out_pci_suspend:
85 RT_TRACE(COMP_POWER, "r8192E support WOL call??????????????????????\n");
86 printk("r8192E support WOL call??????????????????????\n");
87 if (priv->rtllib->bSupportRemoteWakeUp) {
88 RT_TRACE(COMP_POWER, "r8192E support WOL call!!!!!!!!!!!!!!!!!!.\n");
89 }
90 pci_save_state(pdev);
91 pci_disable_device(pdev);
92 pci_enable_wake(pdev, pci_choose_state(pdev,state),\
93 priv->rtllib->bSupportRemoteWakeUp?1:0);
94 pci_set_power_state(pdev,pci_choose_state(pdev,state));
95
96 mdelay(20);
97
98 return 0;
99}
100
101int rtl8192E_resume (struct pci_dev *pdev)
102{
103 struct net_device *dev = pci_get_drvdata(pdev);
104#if defined ENABLE_GPIO_RADIO_CTL || !(defined RTL8192SE || defined RTL8192CE)
105 struct r8192_priv *priv = rtllib_priv(dev);
106#endif
107 int err;
108 u32 val;
109
110 RT_TRACE(COMP_POWER, "================>r8192E resume call.");
111 printk("================>r8192E resume call.\n");
112
113 pci_set_power_state(pdev, PCI_D0);
114
115 err = pci_enable_device(pdev);
116 if (err) {
117 printk(KERN_ERR "%s: pci_enable_device failed on resume\n",
118 dev->name);
119 return err;
120 }
121 pci_restore_state(pdev);
122
123 pci_read_config_dword(pdev, 0x40, &val);
124 if ((val & 0x0000ff00) != 0) {
125 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
126 }
127
128 pci_enable_wake(pdev, PCI_D0, 0);
129
130#ifdef ENABLE_GPIO_RADIO_CTL
131 if (priv->polling_timer_on == 0){
132 check_rfctrl_gpio_timer((unsigned long)dev);
133 }
134#endif
135
136 if (!netif_running(dev)){
137 printk("RTL819XE:UI is open out of resume function\n");
138 goto out;
139 }
140
141 netif_device_attach(dev);
142#ifdef HAVE_NET_DEVICE_OPS
143 if (dev->netdev_ops->ndo_open)
144 dev->netdev_ops->ndo_open(dev);
145#else
146 dev->open(dev);
147#endif
148
149#if !(defined RTL8192SE || defined RTL8192CE)
150 if (!priv->rtllib->bSupportRemoteWakeUp) {
151 MgntActSet_RF_State(dev, eRfOn, RF_CHANGE_BY_INIT,true);
152 }
153#endif
154
155out:
156 RT_TRACE(COMP_POWER, "<================r8192E resume call.\n");
157 return 0;
158}
159
160
161int rtl8192E_enable_wake (struct pci_dev *dev, pm_message_t state, int enable)
162{
163 printk(KERN_NOTICE "r8192E enable wake call (state %u, enable %d).\n",
164 state.event, enable);
165 return(-EAGAIN);
166}
167
168#endif
diff --git a/drivers/staging/rtl8192e/rtl_pm.h b/drivers/staging/rtl8192e/rtl_pm.h
new file mode 100644
index 00000000000..edf8427dd81
--- /dev/null
+++ b/drivers/staging/rtl8192e/rtl_pm.h
@@ -0,0 +1,39 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/
19
20#ifdef CONFIG_PM_RTL
21
22#ifndef R8192E_PM_H
23#define R8192E_PM_H
24
25#include <linux/types.h>
26#include <linux/pci.h>
27
28#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10))
29#define pm_message_t u32
30#endif
31
32int rtl8192E_save_state (struct pci_dev *dev, pm_message_t state);
33int rtl8192E_suspend (struct pci_dev *dev, pm_message_t state);
34int rtl8192E_resume (struct pci_dev *dev);
35int rtl8192E_enable_wake (struct pci_dev *dev, pm_message_t state, int enable);
36
37#endif
38
39#endif
diff --git a/drivers/staging/rtl8192e/rtl_ps.c b/drivers/staging/rtl8192e/rtl_ps.c
new file mode 100644
index 00000000000..cf401352c62
--- /dev/null
+++ b/drivers/staging/rtl8192e/rtl_ps.c
@@ -0,0 +1,649 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * Based on the r8180 driver, which is:
5 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 *
19 * The full GNU General Public License is included in this distribution in the
20 * file called LICENSE.
21 *
22 * Contact Information:
23 * wlanfae <wlanfae@realtek.com>
24 *****************************************************************************/
25#include "rtl_ps.h"
26#include "rtl_core.h"
27#include "r8192E_phy.h"
28#include "r8192E_phyreg.h"
29#include "r8190P_rtl8256.h" /* RTL8225 Radio frontend */
30#include "r8192E_cmdpkt.h"
31
32void rtl8192_hw_sleep_down(struct net_device *dev)
33{
34 struct r8192_priv *priv = rtllib_priv(dev);
35 unsigned long flags = 0;
36#ifdef CONFIG_ASPM_OR_D3
37 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
38#endif
39 spin_lock_irqsave(&priv->rf_ps_lock,flags);
40 if (priv->RFChangeInProgress) {
41 spin_unlock_irqrestore(&priv->rf_ps_lock,flags);
42 RT_TRACE(COMP_DBG, "rtl8192_hw_sleep_down(): RF Change in progress! \n");
43 return;
44 }
45 spin_unlock_irqrestore(&priv->rf_ps_lock,flags);
46 RT_TRACE(COMP_DBG, "%s()============>come to sleep down\n", __func__);
47
48#ifdef CONFIG_RTLWIFI_DEBUGFS
49 if (priv->debug->hw_holding) {
50 return;
51 }
52#endif
53 MgntActSet_RF_State(dev, eRfSleep, RF_CHANGE_BY_PS,false);
54#ifdef CONFIG_ASPM_OR_D3
55 if (pPSC->RegRfPsLevel & RT_RF_LPS_LEVEL_ASPM)
56 {
57 RT_ENABLE_ASPM(dev);
58 RT_SET_PS_LEVEL(pPSC, RT_RF_LPS_LEVEL_ASPM);
59 }
60#endif
61}
62
63void rtl8192_hw_sleep_wq(void *data)
64{
65 struct rtllib_device *ieee = container_of_dwork_rsl(data,struct rtllib_device,hw_sleep_wq);
66 struct net_device *dev = ieee->dev;
67 rtl8192_hw_sleep_down(dev);
68}
69
70void rtl8192_hw_wakeup(struct net_device* dev)
71{
72 struct r8192_priv *priv = rtllib_priv(dev);
73 unsigned long flags = 0;
74#ifdef CONFIG_ASPM_OR_D3
75 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
76#endif
77 spin_lock_irqsave(&priv->rf_ps_lock,flags);
78 if (priv->RFChangeInProgress) {
79 spin_unlock_irqrestore(&priv->rf_ps_lock,flags);
80 RT_TRACE(COMP_DBG, "rtl8192_hw_wakeup(): RF Change in progress! \n");
81 queue_delayed_work_rsl(priv->rtllib->wq,&priv->rtllib->hw_wakeup_wq,MSECS(10));
82 return;
83 }
84 spin_unlock_irqrestore(&priv->rf_ps_lock,flags);
85#ifdef CONFIG_ASPM_OR_D3
86 if (pPSC->RegRfPsLevel & RT_RF_LPS_LEVEL_ASPM) {
87 RT_DISABLE_ASPM(dev);
88 RT_CLEAR_PS_LEVEL(pPSC, RT_RF_LPS_LEVEL_ASPM);
89 }
90#endif
91 RT_TRACE(COMP_PS, "%s()============>come to wake up\n", __func__);
92 MgntActSet_RF_State(dev, eRfOn, RF_CHANGE_BY_PS,false);
93}
94
95void rtl8192_hw_wakeup_wq(void *data)
96{
97 struct rtllib_device *ieee = container_of_dwork_rsl(data,struct rtllib_device,hw_wakeup_wq);
98 struct net_device *dev = ieee->dev;
99 rtl8192_hw_wakeup(dev);
100
101}
102
103#define MIN_SLEEP_TIME 50
104#define MAX_SLEEP_TIME 10000
105void rtl8192_hw_to_sleep(struct net_device *dev, u32 th, u32 tl)
106{
107 struct r8192_priv *priv = rtllib_priv(dev);
108
109 u32 rb = jiffies;
110 unsigned long flags;
111
112 spin_lock_irqsave(&priv->ps_lock,flags);
113
114 tl -= MSECS(8+16+7);
115
116 if (((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME))
117 ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
118 spin_unlock_irqrestore(&priv->ps_lock,flags);
119 printk("too short to sleep::%x, %x, %lx\n",tl, rb, MSECS(MIN_SLEEP_TIME));
120 return;
121 }
122
123 if (((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))||
124 ((tl < rb) && (tl>MSECS(69)) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))||
125 ((tl<rb)&&(tl<MSECS(69))&&((tl+0xffffffff-rb)>MSECS(MAX_SLEEP_TIME)))) {
126 printk("========>too long to sleep:%x, %x, %lx\n", tl, rb, MSECS(MAX_SLEEP_TIME));
127 spin_unlock_irqrestore(&priv->ps_lock,flags);
128 return;
129 }
130 {
131 u32 tmp = (tl>rb)?(tl-rb):(rb-tl);
132 queue_delayed_work_rsl(priv->rtllib->wq,
133 &priv->rtllib->hw_wakeup_wq,tmp);
134 }
135 queue_delayed_work_rsl(priv->rtllib->wq,
136 (void *)&priv->rtllib->hw_sleep_wq,0);
137 spin_unlock_irqrestore(&priv->ps_lock,flags);
138}
139
140void InactivePsWorkItemCallback(struct net_device *dev)
141{
142 struct r8192_priv *priv = rtllib_priv(dev);
143 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
144
145 RT_TRACE(COMP_PS, "InactivePsWorkItemCallback() ---------> \n");
146 pPSC->bSwRfProcessing = true;
147
148 RT_TRACE(COMP_PS, "InactivePsWorkItemCallback(): Set RF to %s.\n", \
149 pPSC->eInactivePowerState == eRfOff?"OFF":"ON");
150#ifdef CONFIG_ASPM_OR_D3
151 if (pPSC->eInactivePowerState == eRfOn)
152 {
153
154 if ((pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_ASPM) && RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_ASPM))
155 {
156 RT_DISABLE_ASPM(dev);
157 RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_ASPM);
158 }
159#ifdef TODO
160 else if ((pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_PCI_D3) && RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_PCI_D3))
161 {
162 RT_LEAVE_D3(dev, false);
163 RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_PCI_D3);
164 }
165#endif
166 }
167#endif
168 MgntActSet_RF_State(dev, pPSC->eInactivePowerState, RF_CHANGE_BY_IPS,false);
169
170#ifdef CONFIG_ASPM_OR_D3
171 if (pPSC->eInactivePowerState == eRfOff)
172 {
173 if (pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_ASPM)
174 {
175 RT_ENABLE_ASPM(dev);
176 RT_SET_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_ASPM);
177 }
178#ifdef TODO
179 else if (pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_PCI_D3)
180 {
181 RT_ENTER_D3(dev, false);
182 RT_SET_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_PCI_D3);
183 }
184#endif
185 }
186#endif
187
188 pPSC->bSwRfProcessing = false;
189 RT_TRACE(COMP_PS, "InactivePsWorkItemCallback() <--------- \n");
190}
191
192void
193IPSEnter(struct net_device *dev)
194{
195 struct r8192_priv *priv = rtllib_priv(dev);
196 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
197 RT_RF_POWER_STATE rtState;
198
199 if (pPSC->bInactivePs)
200 {
201 rtState = priv->rtllib->eRFPowerState;
202 if (rtState == eRfOn && !pPSC->bSwRfProcessing &&\
203 (priv->rtllib->state != RTLLIB_LINKED)&&\
204 (priv->rtllib->iw_mode != IW_MODE_MASTER))
205 {
206 RT_TRACE(COMP_PS,"IPSEnter(): Turn off RF.\n");
207 pPSC->eInactivePowerState = eRfOff;
208 priv->isRFOff = true;
209 priv->bInPowerSaveMode = true;
210 InactivePsWorkItemCallback(dev);
211 }
212 }
213}
214
215void
216IPSLeave(struct net_device *dev)
217{
218 struct r8192_priv *priv = rtllib_priv(dev);
219 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
220 RT_RF_POWER_STATE rtState;
221
222 if (pPSC->bInactivePs)
223 {
224 rtState = priv->rtllib->eRFPowerState;
225 if (rtState != eRfOn && !pPSC->bSwRfProcessing && priv->rtllib->RfOffReason <= RF_CHANGE_BY_IPS)
226 {
227 RT_TRACE(COMP_PS, "IPSLeave(): Turn on RF.\n");
228 pPSC->eInactivePowerState = eRfOn;
229 priv->bInPowerSaveMode = false;
230 InactivePsWorkItemCallback(dev);
231 }
232 }
233}
234void IPSLeave_wq(void *data)
235{
236 struct rtllib_device *ieee = container_of_work_rsl(data,struct rtllib_device,ips_leave_wq);
237 struct net_device *dev = ieee->dev;
238 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
239 down(&priv->rtllib->ips_sem);
240 IPSLeave(dev);
241 up(&priv->rtllib->ips_sem);
242}
243
244void rtllib_ips_leave_wq(struct net_device *dev)
245{
246 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
247 RT_RF_POWER_STATE rtState;
248 rtState = priv->rtllib->eRFPowerState;
249
250 if (priv->rtllib->PowerSaveControl.bInactivePs){
251 if (rtState == eRfOff){
252 if (priv->rtllib->RfOffReason > RF_CHANGE_BY_IPS)
253 {
254 RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__func__);
255 return;
256 }
257 else{
258 printk("=========>%s(): IPSLeave\n",__func__);
259 queue_work_rsl(priv->rtllib->wq,&priv->rtllib->ips_leave_wq);
260 }
261 }
262 }
263}
264void rtllib_ips_leave(struct net_device *dev)
265{
266 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
267 down(&priv->rtllib->ips_sem);
268 IPSLeave(dev);
269 up(&priv->rtllib->ips_sem);
270}
271
272bool MgntActSet_802_11_PowerSaveMode(struct net_device *dev, u8 rtPsMode)
273{
274 struct r8192_priv *priv = rtllib_priv(dev);
275
276 if (priv->rtllib->iw_mode == IW_MODE_ADHOC)
277 return false;
278
279 RT_TRACE(COMP_LPS,"%s(): set ieee->ps = %x\n",__func__,rtPsMode);
280 if (!priv->ps_force) {
281 priv->rtllib->ps = rtPsMode;
282 }
283 if (priv->rtllib->sta_sleep != LPS_IS_WAKE && rtPsMode == RTLLIB_PS_DISABLED) {
284 unsigned long flags;
285
286 rtl8192_hw_wakeup(dev);
287 priv->rtllib->sta_sleep = LPS_IS_WAKE;
288
289 spin_lock_irqsave(&(priv->rtllib->mgmt_tx_lock), flags);
290 RT_TRACE(COMP_DBG, "LPS leave: notify AP we are awaked"
291 " ++++++++++ SendNullFunctionData\n");
292 rtllib_sta_ps_send_null_frame(priv->rtllib, 0);
293 spin_unlock_irqrestore(&(priv->rtllib->mgmt_tx_lock), flags);
294 }
295
296 return true;
297}
298
299
300void LeisurePSEnter(struct net_device *dev)
301{
302 struct r8192_priv *priv = rtllib_priv(dev);
303 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
304
305 RT_TRACE(COMP_PS, "LeisurePSEnter()...\n");
306 RT_TRACE(COMP_PS, "pPSC->bLeisurePs = %d, ieee->ps = %d,pPSC->LpsIdleCount is %d,RT_CHECK_FOR_HANG_PERIOD is %d\n",
307 pPSC->bLeisurePs, priv->rtllib->ps,pPSC->LpsIdleCount,RT_CHECK_FOR_HANG_PERIOD);
308
309 if (!((priv->rtllib->iw_mode == IW_MODE_INFRA) && (priv->rtllib->state == RTLLIB_LINKED))
310 || (priv->rtllib->iw_mode == IW_MODE_ADHOC) || (priv->rtllib->iw_mode == IW_MODE_MASTER))
311 return;
312
313 if (pPSC->bLeisurePs) {
314 if (pPSC->LpsIdleCount >= RT_CHECK_FOR_HANG_PERIOD) {
315
316 if (priv->rtllib->ps == RTLLIB_PS_DISABLED) {
317
318 RT_TRACE(COMP_LPS, "LeisurePSEnter(): Enter 802.11 power save mode...\n");
319
320 if (!pPSC->bFwCtrlLPS) {
321 if (priv->rtllib->SetFwCmdHandler)
322 priv->rtllib->SetFwCmdHandler(dev, FW_CMD_LPS_ENTER);
323 }
324 MgntActSet_802_11_PowerSaveMode(dev, RTLLIB_PS_MBCAST|RTLLIB_PS_UNICAST);
325 }
326 } else
327 pPSC->LpsIdleCount++;
328 }
329}
330
331
332void LeisurePSLeave(struct net_device *dev)
333{
334 struct r8192_priv *priv = rtllib_priv(dev);
335 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
336
337
338 RT_TRACE(COMP_PS, "LeisurePSLeave()...\n");
339 RT_TRACE(COMP_PS, "pPSC->bLeisurePs = %d, ieee->ps = %d\n",
340 pPSC->bLeisurePs, priv->rtllib->ps);
341
342 if (pPSC->bLeisurePs)
343 {
344 if (priv->rtllib->ps != RTLLIB_PS_DISABLED)
345 {
346#ifdef CONFIG_ASPM_OR_D3
347 if (pPSC->RegRfPsLevel & RT_RF_LPS_LEVEL_ASPM && RT_IN_PS_LEVEL(pPSC, RT_RF_LPS_LEVEL_ASPM))
348 {
349 RT_DISABLE_ASPM(dev);
350 RT_CLEAR_PS_LEVEL(pPSC, RT_RF_LPS_LEVEL_ASPM);
351 }
352#endif
353 RT_TRACE(COMP_LPS, "LeisurePSLeave(): Busy Traffic , Leave 802.11 power save..\n");
354 MgntActSet_802_11_PowerSaveMode(dev, RTLLIB_PS_DISABLED);
355
356 if (!pPSC->bFwCtrlLPS)
357 {
358 if (priv->rtllib->SetFwCmdHandler)
359 {
360 priv->rtllib->SetFwCmdHandler(dev, FW_CMD_LPS_LEAVE);
361 }
362 }
363 }
364 }
365}
366
367#ifdef CONFIG_ASPM_OR_D3
368
369void
370PlatformDisableHostL0s(struct net_device *dev)
371{
372 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
373 u32 PciCfgAddrPort=0;
374 u8 Num4Bytes;
375 u8 uPciBridgeASPMSetting = 0;
376
377
378 if ( (priv->NdisAdapter.BusNumber == 0xff && priv->NdisAdapter.DevNumber == 0xff && priv->NdisAdapter.FuncNumber == 0xff) ||
379 (priv->NdisAdapter.PciBridgeBusNum == 0xff && priv->NdisAdapter.PciBridgeDevNum == 0xff && priv->NdisAdapter.PciBridgeFuncNum == 0xff) )
380 {
381 printk("PlatformDisableHostL0s(): Fail to enable ASPM. Cannot find the Bus of PCI(Bridge).\n");
382 return;
383 }
384
385 PciCfgAddrPort= (priv->NdisAdapter.PciBridgeBusNum << 16)|(priv->NdisAdapter.PciBridgeDevNum<< 11)|(priv->NdisAdapter.PciBridgeFuncNum << 8)|(1 << 31);
386 Num4Bytes = (priv->NdisAdapter.PciBridgePCIeHdrOffset+0x10)/4;
387
388
389 NdisRawWritePortUlong(PCI_CONF_ADDRESS , PciCfgAddrPort+(Num4Bytes << 2));
390
391 NdisRawReadPortUchar(PCI_CONF_DATA, &uPciBridgeASPMSetting);
392
393 if (uPciBridgeASPMSetting & BIT0)
394 uPciBridgeASPMSetting &= ~(BIT0);
395
396 NdisRawWritePortUlong(PCI_CONF_ADDRESS , PciCfgAddrPort+(Num4Bytes << 2));
397 NdisRawWritePortUchar(PCI_CONF_DATA, uPciBridgeASPMSetting);
398
399 udelay(50);
400
401 printk("PlatformDisableHostL0s():PciBridge BusNumber[%x], DevNumbe[%x], FuncNumber[%x], Write reg[%x] = %x\n",
402 priv->NdisAdapter.PciBridgeBusNum, priv->NdisAdapter.PciBridgeDevNum, priv->NdisAdapter.PciBridgeFuncNum,
403 (priv->NdisAdapter.PciBridgePCIeHdrOffset+0x10), (priv->NdisAdapter.PciBridgeLinkCtrlReg | (priv->RegDevicePciASPMSetting&~BIT0)));
404}
405
406bool
407PlatformEnable92CEBackDoor(struct net_device *dev)
408{
409 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
410 bool bResult = true;
411 u8 value;
412
413 if ( (priv->NdisAdapter.BusNumber == 0xff && priv->NdisAdapter.DevNumber == 0xff && priv->NdisAdapter.FuncNumber == 0xff) ||
414 (priv->NdisAdapter.PciBridgeBusNum == 0xff && priv->NdisAdapter.PciBridgeDevNum == 0xff && priv->NdisAdapter.PciBridgeFuncNum == 0xff) )
415 {
416 RT_TRACE(COMP_INIT, "PlatformEnableASPM(): Fail to enable ASPM. Cannot find the Bus of PCI(Bridge).\n");
417 return false;
418 }
419
420 pci_read_config_byte(priv->pdev, 0x70f, &value);
421
422 if (priv->NdisAdapter.PciBridgeVendor == PCI_BRIDGE_VENDOR_INTEL)
423 {
424 value |= BIT7;
425 }
426 else
427 {
428 value = 0x23;
429 }
430
431 pci_write_config_byte(priv->pdev, 0x70f, value);
432
433
434 pci_read_config_byte(priv->pdev, 0x719, &value);
435 value |= (BIT3|BIT4);
436 pci_write_config_byte(priv->pdev, 0x719, value);
437
438
439 return bResult;
440}
441
442bool PlatformSwitchDevicePciASPM(struct net_device *dev, u8 value)
443{
444 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
445 bool bResult = false;
446
447 pci_write_config_byte(priv->pdev, 0x80, value);
448
449 return bResult;
450}
451
452bool PlatformSwitchClkReq(struct net_device *dev, u8 value)
453{
454 bool bResult = false;
455 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
456 u8 Buffer;
457
458 Buffer= value;
459
460#ifdef MERGE_TO_DO
461 if (Adapter->bDriverIsGoingToPnpSetPowerSleep && pDevice->RegSupportLowPowerState
462 && value == 0x0)
463 return false;
464#endif
465
466 pci_write_config_byte(priv->pdev,0x81,value);
467 bResult = true;
468
469#ifdef TODO
470 if (Buffer) {
471 priv->ClkReqState = true;
472 } else {
473 priv->ClkReqState = false;
474 }
475#endif
476
477#ifdef RTL8192SE
478 udelay(100);
479#endif
480
481 return bResult;
482}
483
484void
485PlatformDisableASPM(struct net_device *dev)
486{
487 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
488 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
489#if 1
490 u32 PciCfgAddrPort=0;
491 u8 Num4Bytes;
492#endif
493 u8 LinkCtrlReg;
494 u16 PciBridgeLinkCtrlReg, ASPMLevel=0;
495
496 if (priv->NdisAdapter.PciBridgeVendor == PCI_BRIDGE_VENDOR_UNKNOWN)
497 {
498 RT_TRACE(COMP_POWER, "%s(): Disable ASPM. Recognize the Bus of PCI(Bridge) as UNKNOWN.\n",__func__);
499 }
500
501
502 LinkCtrlReg = priv->NdisAdapter.LinkCtrlReg;
503 PciBridgeLinkCtrlReg = priv->NdisAdapter.PciBridgeLinkCtrlReg;
504
505 ASPMLevel |= BIT0|BIT1;
506 LinkCtrlReg &=~ASPMLevel;
507 PciBridgeLinkCtrlReg &=~(BIT0|BIT1);
508
509 if ( (priv->NdisAdapter.BusNumber == 0xff && priv->NdisAdapter.DevNumber == 0xff && priv->NdisAdapter.FuncNumber == 0xff) ||
510 (priv->NdisAdapter.PciBridgeBusNum == 0xff && priv->NdisAdapter.PciBridgeDevNum == 0xff && priv->NdisAdapter.PciBridgeFuncNum == 0xff) )
511 {
512 } else {
513 PciCfgAddrPort= (priv->NdisAdapter.PciBridgeBusNum << 16)|(priv->NdisAdapter.PciBridgeDevNum<< 11)|(priv->NdisAdapter.PciBridgeFuncNum << 8)|(1 << 31);
514 Num4Bytes = (priv->NdisAdapter.PciBridgePCIeHdrOffset+0x10)/4;
515
516 NdisRawWritePortUlong(PCI_CONF_ADDRESS , PciCfgAddrPort+(Num4Bytes << 2));
517
518 NdisRawWritePortUchar(PCI_CONF_DATA, PciBridgeLinkCtrlReg);
519 RT_TRACE(COMP_POWER, "PlatformDisableASPM():PciBridge BusNumber[%x], DevNumbe[%x], FuncNumber[%x], Write reg[%x] = %x\n",
520 priv->NdisAdapter.PciBridgeBusNum, priv->NdisAdapter.PciBridgeDevNum, priv->NdisAdapter.PciBridgeFuncNum,
521 (priv->NdisAdapter.PciBridgePCIeHdrOffset+0x10), PciBridgeLinkCtrlReg);
522
523 udelay(50);
524 }
525}
526
527void PlatformEnableASPM(struct net_device *dev)
528{
529 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
530 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
531 u16 ASPMLevel = 0;
532 u32 PciCfgAddrPort=0;
533 u8 Num4Bytes;
534 u8 uPciBridgeASPMSetting = 0;
535 u8 uDeviceASPMSetting = 0;
536
537
538 if ( (priv->NdisAdapter.BusNumber == 0xff && priv->NdisAdapter.DevNumber == 0xff && priv->NdisAdapter.FuncNumber == 0xff) ||
539 (priv->NdisAdapter.PciBridgeBusNum == 0xff && priv->NdisAdapter.PciBridgeDevNum == 0xff && priv->NdisAdapter.PciBridgeFuncNum == 0xff) )
540 {
541 RT_TRACE(COMP_INIT, "PlatformEnableASPM(): Fail to enable ASPM. Cannot find the Bus of PCI(Bridge).\n");
542 return;
543 }
544
545#ifdef RTL8192SE
546 if (priv->NdisAdapter.PciBridgeVendor != PCI_BRIDGE_VENDOR_INTEL )
547 {
548 RT_TRACE(COMP_POWER, "%s(): Dont modify ASPM for non intel chipset. For Bridge Vendor %d.\n"
549 ,__func__,priv->NdisAdapter.PciBridgeVendor);
550 return;
551 }
552#endif
553
554 ASPMLevel |= priv->RegDevicePciASPMSetting;
555 uDeviceASPMSetting = priv->NdisAdapter.LinkCtrlReg;
556
557 uDeviceASPMSetting |= ASPMLevel;
558
559 PlatformSwitchDevicePciASPM(dev, uDeviceASPMSetting);
560
561 if (pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_CLK_REQ) {
562 PlatformSwitchClkReq(dev,(pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0);
563 RT_SET_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_CLK_REQ);
564 }
565 udelay(100);
566
567 udelay(100);
568}
569
570u32 PlatformResetPciSpace(struct net_device *dev,u8 Value)
571{
572 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
573
574 pci_write_config_byte(priv->pdev,0x04,Value);
575
576 return 1;
577
578}
579bool PlatformSetPMCSR(struct net_device *dev,u8 value,bool bTempSetting)
580{
581 bool bResult = false;
582 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
583 u8 Buffer;
584 bool bActuallySet=false, bSetFunc=false;
585 unsigned long flag;
586
587 Buffer= value;
588 spin_lock_irqsave(&priv->D3_lock,flag);
589#ifdef TODO
590 if (bTempSetting)
591 {
592 if (Buffer==0x00)
593 {
594 priv->LeaveD3Cnt++;
595
596 {
597 bActuallySet =true;
598 }
599 }
600 else
601 {
602 priv->LeaveD3Cnt--;
603
604 if (priv->LeaveD3Cnt == 0)
605 {
606 bActuallySet=true;
607 }
608 }
609 }
610 else
611 {
612 priv->LeaveD3Cnt=0;
613 bActuallySet=true;
614 bSetFunc=true;
615 }
616#endif
617 if (bActuallySet) {
618 if (Buffer) {
619 PlatformSwitchClkReq(dev, 0x01);
620 } else {
621 PlatformSwitchClkReq(dev, 0x00);
622 }
623
624 pci_write_config_byte(priv->pdev,0x44,Buffer);
625 RT_TRACE(COMP_POWER, "PlatformSetPMCSR(): D3(value: %d)\n", Buffer);
626
627 bResult = true;
628 if (!Buffer) {
629 PlatformResetPciSpace(dev, 0x06);
630 PlatformResetPciSpace(dev, 0x07);
631 }
632
633 if (bSetFunc) {
634 if (Buffer) {
635#ifdef TO_DO_LIST
636 RT_DISABLE_FUNC(Adapter, DF_IO_D3_BIT);
637#endif
638 } else {
639#ifdef TO_DO_LIST
640 RT_ENABLE_FUNC(Adapter, DF_IO_D3_BIT);
641#endif
642 }
643 }
644
645 }
646 spin_unlock_irqrestore(&priv->D3_lock,flag);
647 return bResult;
648}
649#endif
diff --git a/drivers/staging/rtl8192e/rtl_ps.h b/drivers/staging/rtl8192e/rtl_ps.h
new file mode 100644
index 00000000000..71f20424278
--- /dev/null
+++ b/drivers/staging/rtl8192e/rtl_ps.h
@@ -0,0 +1,64 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * Based on the r8180 driver, which is:
5 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 *
19 * The full GNU General Public License is included in this distribution in the
20 * file called LICENSE.
21 *
22 * Contact Information:
23 * wlanfae <wlanfae@realtek.com>
24 ******************************************************************************/
25#ifndef _RTL_PS_H
26#define _RTL_PS_H
27
28#include <linux/types.h>
29#include "rtllib.h"
30struct net_device;
31
32#define RT_CHECK_FOR_HANG_PERIOD 2
33#define INIT_DEFAULT_CHAN 1
34
35#if defined CONFIG_ASPM_OR_D3
36#define RT_DISABLE_ASPM(dev) PlatformDisableASPM(dev)
37#define RT_ENABLE_ASPM(dev) PlatformEnableASPM(dev)
38#define RT_ENTER_D3(dev, _bTempSetting) PlatformSetPMCSR(dev, 0x03, _bTempSetting)
39#define RT_LEAVE_D3(dev, _bTempSetting) PlatformSetPMCSR(dev, 0, _bTempSetting)
40
41#define RT_DISABLE_HOST_L0S(_PADAPTER) PlatformDisableHostL0s(dev)
42
43void PlatformDisableHostL0s(struct net_device *dev);
44bool PlatformEnable92CEBackDoor(struct net_device *dev);
45void PlatformDisableASPM(struct net_device *dev);
46void PlatformEnableASPM(struct net_device *dev);
47u32 PlatformResetPciSpace(struct net_device *dev,u8 Value);
48#endif
49
50#if defined(RTL8192E) || defined(RTL8192SE) || defined RTL8192CE
51void rtl8192_hw_wakeup(struct net_device *dev);
52void rtl8192_hw_to_sleep(struct net_device *dev, u32 th, u32 tl);
53void rtllib_ips_leave_wq(struct net_device *dev);
54void rtllib_ips_leave(struct net_device *dev);
55void IPSLeave_wq (void *data);
56#endif
57
58void IPSEnter(struct net_device *dev);
59void IPSLeave(struct net_device *dev);
60
61void LeisurePSEnter(struct net_device *dev);
62void LeisurePSLeave(struct net_device *dev);
63
64#endif
diff --git a/drivers/staging/rtl8192e/rtl_wx.c b/drivers/staging/rtl8192e/rtl_wx.c
new file mode 100644
index 00000000000..79ac60decbe
--- /dev/null
+++ b/drivers/staging/rtl8192e/rtl_wx.c
@@ -0,0 +1,1509 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/
19
20#include <linux/string.h>
21#include "rtl_core.h"
22#ifdef ENABLE_DOT11D
23#include "dot11d.h"
24#endif
25
26#ifdef CONFIG_MP
27#include "r8192S_mp.h"
28#endif
29
30#define RATE_COUNT 12
31u32 rtl8192_rates[] = {1000000,2000000,5500000,11000000,
32 6000000,9000000,12000000,18000000,24000000,36000000,48000000,54000000};
33
34
35#ifndef ENETDOWN
36#define ENETDOWN 1
37#endif
38extern int hwwep;
39
40static int r8192_wx_get_freq(struct net_device *dev,
41 struct iw_request_info *a,
42 union iwreq_data *wrqu, char *b)
43{
44 struct r8192_priv *priv = rtllib_priv(dev);
45
46 return rtllib_wx_get_freq(priv->rtllib,a,wrqu,b);
47}
48
49
50static int r8192_wx_get_mode(struct net_device *dev, struct iw_request_info *a,
51 union iwreq_data *wrqu, char *b)
52{
53 struct r8192_priv *priv=rtllib_priv(dev);
54
55 return rtllib_wx_get_mode(priv->rtllib,a,wrqu,b);
56}
57
58static int r8192_wx_get_rate(struct net_device *dev,
59 struct iw_request_info *info,
60 union iwreq_data *wrqu, char *extra)
61{
62 struct r8192_priv *priv = rtllib_priv(dev);
63 return rtllib_wx_get_rate(priv->rtllib,info,wrqu,extra);
64}
65
66
67
68static int r8192_wx_set_rate(struct net_device *dev,
69 struct iw_request_info *info,
70 union iwreq_data *wrqu, char *extra)
71{
72 int ret;
73 struct r8192_priv *priv = rtllib_priv(dev);
74
75 if (priv->bHwRadioOff == true)
76 return 0;
77
78 down(&priv->wx_sem);
79
80 ret = rtllib_wx_set_rate(priv->rtllib,info,wrqu,extra);
81
82 up(&priv->wx_sem);
83
84 return ret;
85}
86
87
88static int r8192_wx_set_rts(struct net_device *dev,
89 struct iw_request_info *info,
90 union iwreq_data *wrqu, char *extra)
91{
92 int ret;
93 struct r8192_priv *priv = rtllib_priv(dev);
94
95 if (priv->bHwRadioOff == true)
96 return 0;
97
98 down(&priv->wx_sem);
99
100 ret = rtllib_wx_set_rts(priv->rtllib,info,wrqu,extra);
101
102 up(&priv->wx_sem);
103
104 return ret;
105}
106
107static int r8192_wx_get_rts(struct net_device *dev,
108 struct iw_request_info *info,
109 union iwreq_data *wrqu, char *extra)
110{
111 struct r8192_priv *priv = rtllib_priv(dev);
112 return rtllib_wx_get_rts(priv->rtllib,info,wrqu,extra);
113}
114
115static int r8192_wx_set_power(struct net_device *dev,
116 struct iw_request_info *info,
117 union iwreq_data *wrqu, char *extra)
118{
119 int ret;
120 struct r8192_priv *priv = rtllib_priv(dev);
121
122 if (priv->bHwRadioOff == true){
123 RT_TRACE(COMP_ERR,"%s():Hw is Radio Off, we can't set Power,return\n",__func__);
124 return 0;
125 }
126 down(&priv->wx_sem);
127
128 ret = rtllib_wx_set_power(priv->rtllib,info,wrqu,extra);
129
130 up(&priv->wx_sem);
131
132 return ret;
133}
134
135static int r8192_wx_get_power(struct net_device *dev,
136 struct iw_request_info *info,
137 union iwreq_data *wrqu, char *extra)
138{
139 struct r8192_priv *priv = rtllib_priv(dev);
140 return rtllib_wx_get_power(priv->rtllib,info,wrqu,extra);
141}
142
143static int r8192_wx_set_rawtx(struct net_device *dev,
144 struct iw_request_info *info,
145 union iwreq_data *wrqu, char *extra)
146{
147 struct r8192_priv *priv = rtllib_priv(dev);
148 int ret;
149
150 if (priv->bHwRadioOff == true)
151 return 0;
152
153 down(&priv->wx_sem);
154
155 ret = rtllib_wx_set_rawtx(priv->rtllib, info, wrqu, extra);
156
157 up(&priv->wx_sem);
158
159 return ret;
160
161}
162
163static int r8192_wx_force_reset(struct net_device *dev,
164 struct iw_request_info *info,
165 union iwreq_data *wrqu, char *extra)
166{
167 struct r8192_priv *priv = rtllib_priv(dev);
168
169 down(&priv->wx_sem);
170
171 RT_TRACE(COMP_DBG, "%s(): force reset ! extra is %d\n", __func__, *extra);
172 priv->force_reset = *extra;
173 up(&priv->wx_sem);
174 return 0;
175
176}
177
178static int r8192_wx_force_mic_error(struct net_device *dev,
179 struct iw_request_info *info,
180 union iwreq_data *wrqu, char *extra)
181{
182 struct r8192_priv *priv = rtllib_priv(dev);
183 struct rtllib_device* ieee = priv->rtllib;
184
185 down(&priv->wx_sem);
186
187 RT_TRACE(COMP_DBG, "%s(): force mic error ! \n", __func__);
188 ieee->force_mic_error = true;
189 up(&priv->wx_sem);
190 return 0;
191
192}
193
194#define MAX_ADHOC_PEER_NUM 64
195typedef struct
196{
197 unsigned char MacAddr[ETH_ALEN];
198 unsigned char WirelessMode;
199 unsigned char bCurTxBW40MHz;
200} adhoc_peer_entry_t, *p_adhoc_peer_entry_t;
201typedef struct
202{
203 adhoc_peer_entry_t Entry[MAX_ADHOC_PEER_NUM];
204 unsigned char num;
205} adhoc_peers_info_t, *p_adhoc_peers_info_t;
206int r8192_wx_get_adhoc_peers(struct net_device *dev,
207 struct iw_request_info *info,
208 union iwreq_data *wrqu, char *extra)
209{
210#ifndef RTL8192SE
211 return 0;
212#else
213 struct r8192_priv *priv = rtllib_priv(dev);
214 struct sta_info * psta = NULL;
215 adhoc_peers_info_t adhoc_peers_info;
216 p_adhoc_peers_info_t padhoc_peers_info = &adhoc_peers_info;
217 p_adhoc_peer_entry_t padhoc_peer_entry = NULL;
218 int k=0;
219
220
221 memset(extra, 0, 2047);
222 padhoc_peers_info->num = 0;
223
224 down(&priv->wx_sem);
225
226 for (k=0; k<PEER_MAX_ASSOC; k++)
227 {
228 psta = priv->rtllib->peer_assoc_list[k];
229 if (NULL != psta)
230 {
231 padhoc_peer_entry = &padhoc_peers_info->Entry[padhoc_peers_info->num];
232 memset(padhoc_peer_entry,0, sizeof(adhoc_peer_entry_t));
233 memcpy(padhoc_peer_entry->MacAddr, psta->macaddr, ETH_ALEN);
234 padhoc_peer_entry->WirelessMode = psta->wireless_mode;
235 padhoc_peer_entry->bCurTxBW40MHz = psta->htinfo.bCurTxBW40MHz;
236 padhoc_peers_info->num ++;
237 printk("[%d] MacAddr:"MAC_FMT" \tWirelessMode:%d \tBW40MHz:%d \n", \
238 k, MAC_ARG(padhoc_peer_entry->MacAddr), padhoc_peer_entry->WirelessMode, padhoc_peer_entry->bCurTxBW40MHz);
239 sprintf(extra, "[%d] MacAddr:"MAC_FMT" \tWirelessMode:%d \tBW40MHz:%d \n", \
240 k, MAC_ARG(padhoc_peer_entry->MacAddr), padhoc_peer_entry->WirelessMode, padhoc_peer_entry->bCurTxBW40MHz);
241 }
242 }
243
244 up(&priv->wx_sem);
245
246 wrqu->data.length = strlen(extra);
247 wrqu->data.flags = 0;
248 return 0;
249
250#endif
251}
252
253
254static int r8191se_wx_get_firm_version(struct net_device *dev,
255 struct iw_request_info *info,
256 struct iw_param *wrqu, char *extra)
257{
258 return 0;
259}
260
261static int r8192_wx_adapter_power_status(struct net_device *dev,
262 struct iw_request_info *info,
263 union iwreq_data *wrqu, char *extra)
264{
265 struct r8192_priv *priv = rtllib_priv(dev);
266 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
267 struct rtllib_device* ieee = priv->rtllib;
268
269 down(&priv->wx_sem);
270
271 RT_TRACE(COMP_POWER, "%s(): %s\n",__func__, (*extra == 6)?"DC power":"AC power");
272 if (*extra || priv->force_lps) {
273 priv->ps_force = false;
274 pPSC->bLeisurePs = true;
275 } else {
276 if (priv->rtllib->state == RTLLIB_LINKED)
277 LeisurePSLeave(dev);
278
279 priv->ps_force = true;
280 pPSC->bLeisurePs = false;
281 ieee->ps = *extra;
282 }
283
284 up(&priv->wx_sem);
285
286 return 0;
287}
288
289static int r8192se_wx_set_radio(struct net_device *dev,
290 struct iw_request_info *info,
291 union iwreq_data *wrqu, char *extra)
292{
293 struct r8192_priv *priv = rtllib_priv(dev);
294
295 down(&priv->wx_sem);
296
297 printk("%s(): set radio ! extra is %d\n",__func__, *extra);
298 if ((*extra != 0) && (*extra != 1))
299 {
300 RT_TRACE(COMP_ERR, "%s(): set radio an err value,must 0(radio off) or 1(radio on)\n",__func__);
301 return -1;
302 }
303 priv->sw_radio_on = *extra;
304 up(&priv->wx_sem);
305 return 0;
306
307}
308
309static int r8192se_wx_set_lps_awake_interval(struct net_device *dev,
310 struct iw_request_info *info,
311 union iwreq_data *wrqu, char *extra)
312{
313 struct r8192_priv *priv = rtllib_priv(dev);
314 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
315
316 down(&priv->wx_sem);
317
318 printk("%s(): set lps awake interval ! extra is %d\n",__func__, *extra);
319
320 pPSC->RegMaxLPSAwakeIntvl = *extra;
321 up(&priv->wx_sem);
322 return 0;
323
324}
325
326static int r8192se_wx_set_force_lps(struct net_device *dev,
327 struct iw_request_info *info,
328 union iwreq_data *wrqu, char *extra)
329{
330 struct r8192_priv *priv = rtllib_priv(dev);
331
332 down(&priv->wx_sem);
333
334 printk("%s(): force LPS ! extra is %d (1 is open 0 is close)\n",__func__, *extra);
335 priv->force_lps = *extra;
336 up(&priv->wx_sem);
337 return 0;
338
339}
340
341static int r8192_wx_set_debugflag(struct net_device *dev,
342 struct iw_request_info *info,
343 union iwreq_data *wrqu, char *extra)
344{
345 struct r8192_priv *priv = rtllib_priv(dev);
346 u8 c = *extra;
347
348 if (priv->bHwRadioOff == true)
349 return 0;
350
351 printk("=====>%s(), *extra:%x, debugflag:%x\n", __func__, *extra, rt_global_debug_component);
352 if (c > 0) {
353 rt_global_debug_component |= (1<<c);
354 } else {
355 rt_global_debug_component &= BIT31;
356 }
357 return 0;
358}
359
360static int r8192_wx_set_mode(struct net_device *dev, struct iw_request_info *a,
361 union iwreq_data *wrqu, char *b)
362{
363 struct r8192_priv *priv = rtllib_priv(dev);
364 struct rtllib_device* ieee = netdev_priv_rsl(dev);
365
366 RT_RF_POWER_STATE rtState;
367 int ret;
368
369 if (priv->bHwRadioOff == true)
370 return 0;
371 rtState = priv->rtllib->eRFPowerState;
372 down(&priv->wx_sem);
373 if (wrqu->mode == IW_MODE_ADHOC || wrqu->mode == IW_MODE_MONITOR
374 || ieee->bNetPromiscuousMode )
375 {
376 if (priv->rtllib->PowerSaveControl.bInactivePs){
377 if (rtState == eRfOff){
378 if (priv->rtllib->RfOffReason > RF_CHANGE_BY_IPS)
379 {
380 RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__func__);
381 up(&priv->wx_sem);
382 return -1;
383 } else {
384 printk("=========>%s(): IPSLeave\n",__func__);
385 down(&priv->rtllib->ips_sem);
386 IPSLeave(dev);
387 up(&priv->rtllib->ips_sem);
388 }
389 }
390 }
391 }
392 ret = rtllib_wx_set_mode(priv->rtllib,a,wrqu,b);
393
394 up(&priv->wx_sem);
395 return ret;
396}
397
398struct iw_range_with_scan_capa
399{
400 /* Informative stuff (to choose between different interface) */
401 __u32 throughput; /* To give an idea... */
402 /* In theory this value should be the maximum benchmarked
403 * TCP/IP throughput, because with most of these devices the
404 * bit rate is meaningless (overhead an co) to estimate how
405 * fast the connection will go and pick the fastest one.
406 * I suggest people to play with Netperf or any benchmark...
407 */
408
409 /* NWID (or domain id) */
410 __u32 min_nwid; /* Minimal NWID we are able to set */
411 __u32 max_nwid; /* Maximal NWID we are able to set */
412
413 /* Old Frequency (backward compat - moved lower ) */
414 __u16 old_num_channels;
415 __u8 old_num_frequency;
416
417 /* Scan capabilities */
418 __u8 scan_capa;
419};
420
421static int rtl8192_wx_get_range(struct net_device *dev,
422 struct iw_request_info *info,
423 union iwreq_data *wrqu, char *extra)
424{
425 struct iw_range *range = (struct iw_range *)extra;
426 struct r8192_priv *priv = rtllib_priv(dev);
427 u16 val;
428 int i;
429
430 wrqu->data.length = sizeof(*range);
431 memset(range, 0, sizeof(*range));
432
433 /* ~130 Mb/s real (802.11n) */
434 range->throughput = 130 * 1000 * 1000;
435
436 if (priv->rf_set_sens != NULL)
437 range->sensitivity = priv->max_sens; /* signal level threshold range */
438
439 range->max_qual.qual = 100;
440 range->max_qual.level = 0;
441 range->max_qual.noise = 0;
442 range->max_qual.updated = 7; /* Updated all three */
443
444 range->avg_qual.qual = 70; /* > 8% missed beacons is 'bad' */
445 range->avg_qual.level = 0;
446 range->avg_qual.noise = 0;
447 range->avg_qual.updated = 7; /* Updated all three */
448
449 range->num_bitrates = min(RATE_COUNT, IW_MAX_BITRATES);
450
451 for (i = 0; i < range->num_bitrates; i++) {
452 range->bitrate[i] = rtl8192_rates[i];
453 }
454
455 range->max_rts = DEFAULT_RTS_THRESHOLD;
456 range->min_frag = MIN_FRAG_THRESHOLD;
457 range->max_frag = MAX_FRAG_THRESHOLD;
458
459 range->min_pmp = 0;
460 range->max_pmp = 5000000;
461 range->min_pmt = 0;
462 range->max_pmt = 65535*1000;
463 range->pmp_flags = IW_POWER_PERIOD;
464 range->pmt_flags = IW_POWER_TIMEOUT;
465 range->pm_capa = IW_POWER_PERIOD | IW_POWER_TIMEOUT | IW_POWER_ALL_R;
466 range->we_version_compiled = WIRELESS_EXT;
467 range->we_version_source = 18;
468
469 for (i = 0, val = 0; i < 14; i++) {
470 if ((priv->rtllib->active_channel_map)[i+1]) {
471 range->freq[val].i = i + 1;
472 range->freq[val].m = rtllib_wlan_frequencies[i] * 100000;
473 range->freq[val].e = 1;
474 val++;
475 } else {
476 }
477
478 if (val == IW_MAX_FREQUENCIES)
479 break;
480 }
481 range->num_frequency = val;
482 range->num_channels = val;
483#if WIRELESS_EXT > 17
484 range->enc_capa = IW_ENC_CAPA_WPA|IW_ENC_CAPA_WPA2|
485 IW_ENC_CAPA_CIPHER_TKIP|IW_ENC_CAPA_CIPHER_CCMP;
486#endif
487 range->scan_capa = IW_SCAN_CAPA_ESSID | IW_SCAN_CAPA_TYPE;
488
489 /* Event capability (kernel + driver) */
490
491 return 0;
492}
493
494static int r8192_wx_set_scan(struct net_device *dev, struct iw_request_info *a,
495 union iwreq_data *wrqu, char *b)
496{
497 struct r8192_priv *priv = rtllib_priv(dev);
498 struct rtllib_device* ieee = priv->rtllib;
499 RT_RF_POWER_STATE rtState;
500 int ret;
501
502#ifdef CONFIG_MP
503 printk("######################%s(): In MP Test Can not Scan\n",__func__);
504 return 0;
505#endif
506 if (!(ieee->softmac_features & IEEE_SOFTMAC_SCAN)){
507 if ((ieee->state >= RTLLIB_ASSOCIATING) && (ieee->state <= RTLLIB_ASSOCIATING_AUTHENTICATED)){
508 return 0;
509 }
510 if ((priv->rtllib->state == RTLLIB_LINKED) && (priv->rtllib->CntAfterLink<2)){
511 return 0;
512 }
513 }
514
515 if (priv->bHwRadioOff == true){
516 printk("================>%s(): hwradio off\n",__func__);
517 return 0;
518 }
519 rtState = priv->rtllib->eRFPowerState;
520 if (!priv->up) return -ENETDOWN;
521 if (priv->rtllib->LinkDetectInfo.bBusyTraffic == true)
522 return -EAGAIN;
523
524#if WIRELESS_EXT > 17
525 if (wrqu->data.flags & IW_SCAN_THIS_ESSID)
526 {
527 struct iw_scan_req* req = (struct iw_scan_req*)b;
528 if (req->essid_len)
529 {
530 ieee->current_network.ssid_len = req->essid_len;
531 memcpy(ieee->current_network.ssid, req->essid, req->essid_len);
532 }
533 }
534#endif
535
536 down(&priv->wx_sem);
537
538 priv->rtllib->FirstIe_InScan = true;
539
540 if (priv->rtllib->state != RTLLIB_LINKED){
541 if (priv->rtllib->PowerSaveControl.bInactivePs){
542 if (rtState == eRfOff){
543 if (priv->rtllib->RfOffReason > RF_CHANGE_BY_IPS){
544 RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__func__);
545 up(&priv->wx_sem);
546 return -1;
547 }else{
548 RT_TRACE(COMP_PS, "=========>%s(): IPSLeave\n",__func__);
549 down(&priv->rtllib->ips_sem);
550 IPSLeave(dev);
551 up(&priv->rtllib->ips_sem);
552 }
553 }
554 }
555 rtllib_stop_scan(priv->rtllib);
556 if (priv->rtllib->LedControlHandler)
557 priv->rtllib->LedControlHandler(dev, LED_CTL_SITE_SURVEY);
558
559 if (priv->rtllib->eRFPowerState != eRfOff){
560 priv->rtllib->actscanning = true;
561
562 if (ieee->ScanOperationBackupHandler)
563 ieee->ScanOperationBackupHandler(ieee->dev,SCAN_OPT_BACKUP);
564
565 rtllib_start_scan_syncro(priv->rtllib, 0);
566
567 if (ieee->ScanOperationBackupHandler)
568 ieee->ScanOperationBackupHandler(ieee->dev,SCAN_OPT_RESTORE);
569 }
570 ret = 0;
571 } else {
572 priv->rtllib->actscanning = true;
573 ret = rtllib_wx_set_scan(priv->rtllib,a,wrqu,b);
574 }
575
576 up(&priv->wx_sem);
577 return ret;
578}
579
580
581static int r8192_wx_get_scan(struct net_device *dev, struct iw_request_info *a,
582 union iwreq_data *wrqu, char *b)
583{
584
585 int ret;
586 struct r8192_priv *priv = rtllib_priv(dev);
587
588 if (!priv->up) return -ENETDOWN;
589
590 if (priv->bHwRadioOff == true)
591 return 0;
592
593
594 down(&priv->wx_sem);
595
596 ret = rtllib_wx_get_scan(priv->rtllib,a,wrqu,b);
597
598 up(&priv->wx_sem);
599
600 return ret;
601}
602
603static int r8192_wx_set_essid(struct net_device *dev,
604 struct iw_request_info *a,
605 union iwreq_data *wrqu, char *b)
606{
607 struct r8192_priv *priv = rtllib_priv(dev);
608 int ret;
609
610 if ((rtllib_act_scanning(priv->rtllib, false)) && !(priv->rtllib->softmac_features & IEEE_SOFTMAC_SCAN)){
611 ;
612 }
613#ifdef CONFIG_MP
614 printk("######################%s(): In MP Test Can not Set Essid\n",__func__);
615 return 0;
616#endif
617 if (priv->bHwRadioOff == true){
618 printk("=========>%s():hw radio off,or Rf state is eRfOff, return\n",__func__);
619 return 0;
620 }
621 down(&priv->wx_sem);
622 ret = rtllib_wx_set_essid(priv->rtllib,a,wrqu,b);
623
624 up(&priv->wx_sem);
625
626 return ret;
627}
628
629static int r8192_wx_get_essid(struct net_device *dev,
630 struct iw_request_info *a,
631 union iwreq_data *wrqu, char *b)
632{
633 int ret;
634 struct r8192_priv *priv = rtllib_priv(dev);
635
636 down(&priv->wx_sem);
637
638 ret = rtllib_wx_get_essid(priv->rtllib, a, wrqu, b);
639
640 up(&priv->wx_sem);
641
642 return ret;
643}
644
645static int r8192_wx_set_nick(struct net_device *dev,
646 struct iw_request_info *info,
647 union iwreq_data *wrqu, char *extra)
648{
649 struct r8192_priv *priv = rtllib_priv(dev);
650
651 if (wrqu->data.length > IW_ESSID_MAX_SIZE)
652 return -E2BIG;
653 down(&priv->wx_sem);
654 wrqu->data.length = min((size_t) wrqu->data.length, sizeof(priv->nick));
655 memset(priv->nick, 0, sizeof(priv->nick));
656 memcpy(priv->nick, extra, wrqu->data.length);
657 up(&priv->wx_sem);
658 return 0;
659
660}
661
662static int r8192_wx_get_nick(struct net_device *dev,
663 struct iw_request_info *info,
664 union iwreq_data *wrqu, char *extra)
665{
666 struct r8192_priv *priv = rtllib_priv(dev);
667
668 down(&priv->wx_sem);
669 wrqu->data.length = strlen(priv->nick);
670 memcpy(extra, priv->nick, wrqu->data.length);
671 wrqu->data.flags = 1; /* active */
672 up(&priv->wx_sem);
673 return 0;
674}
675
676static int r8192_wx_set_freq(struct net_device *dev, struct iw_request_info *a,
677 union iwreq_data *wrqu, char *b)
678{
679 int ret;
680 struct r8192_priv *priv = rtllib_priv(dev);
681
682 if (priv->bHwRadioOff == true)
683 return 0;
684
685 down(&priv->wx_sem);
686
687 ret = rtllib_wx_set_freq(priv->rtllib, a, wrqu, b);
688
689 up(&priv->wx_sem);
690 return ret;
691}
692
693static int r8192_wx_get_name(struct net_device *dev,
694 struct iw_request_info *info,
695 union iwreq_data *wrqu, char *extra)
696{
697 struct r8192_priv *priv = rtllib_priv(dev);
698 return rtllib_wx_get_name(priv->rtllib, info, wrqu, extra);
699}
700
701
702static int r8192_wx_set_frag(struct net_device *dev,
703 struct iw_request_info *info,
704 union iwreq_data *wrqu, char *extra)
705{
706 struct r8192_priv *priv = rtllib_priv(dev);
707
708 if (priv->bHwRadioOff == true)
709 return 0;
710
711 if (wrqu->frag.disabled)
712 priv->rtllib->fts = DEFAULT_FRAG_THRESHOLD;
713 else {
714 if (wrqu->frag.value < MIN_FRAG_THRESHOLD ||
715 wrqu->frag.value > MAX_FRAG_THRESHOLD)
716 return -EINVAL;
717
718 priv->rtllib->fts = wrqu->frag.value & ~0x1;
719 }
720
721 return 0;
722}
723
724
725static int r8192_wx_get_frag(struct net_device *dev,
726 struct iw_request_info *info,
727 union iwreq_data *wrqu, char *extra)
728{
729 struct r8192_priv *priv = rtllib_priv(dev);
730
731 wrqu->frag.value = priv->rtllib->fts;
732 wrqu->frag.fixed = 0; /* no auto select */
733 wrqu->frag.disabled = (wrqu->frag.value == DEFAULT_FRAG_THRESHOLD);
734
735 return 0;
736}
737
738
739static int r8192_wx_set_wap(struct net_device *dev,
740 struct iw_request_info *info,
741 union iwreq_data *awrq,
742 char *extra)
743{
744
745 int ret;
746 struct r8192_priv *priv = rtllib_priv(dev);
747
748 if ((rtllib_act_scanning(priv->rtllib, false)) && !(priv->rtllib->softmac_features & IEEE_SOFTMAC_SCAN)){
749 ;
750 }
751
752 if (priv->bHwRadioOff == true)
753 return 0;
754
755 down(&priv->wx_sem);
756
757 ret = rtllib_wx_set_wap(priv->rtllib,info,awrq,extra);
758
759 up(&priv->wx_sem);
760
761 return ret;
762
763}
764
765
766static int r8192_wx_get_wap(struct net_device *dev,
767 struct iw_request_info *info,
768 union iwreq_data *wrqu, char *extra)
769{
770 struct r8192_priv *priv = rtllib_priv(dev);
771
772 return rtllib_wx_get_wap(priv->rtllib,info,wrqu,extra);
773}
774
775
776static int r8192_wx_get_enc(struct net_device *dev,
777 struct iw_request_info *info,
778 union iwreq_data *wrqu, char *key)
779{
780 struct r8192_priv *priv = rtllib_priv(dev);
781
782 return rtllib_wx_get_encode(priv->rtllib, info, wrqu, key);
783}
784
785static int r8192_wx_set_enc(struct net_device *dev,
786 struct iw_request_info *info,
787 union iwreq_data *wrqu, char *key)
788{
789 struct r8192_priv *priv = rtllib_priv(dev);
790 int ret;
791
792 struct rtllib_device *ieee = priv->rtllib;
793 u32 hwkey[4]={0,0,0,0};
794 u8 mask=0xff;
795 u32 key_idx=0;
796 u8 zero_addr[4][6] ={ {0x00,0x00,0x00,0x00,0x00,0x00},
797 {0x00,0x00,0x00,0x00,0x00,0x01},
798 {0x00,0x00,0x00,0x00,0x00,0x02},
799 {0x00,0x00,0x00,0x00,0x00,0x03} };
800 int i;
801
802 if ((rtllib_act_scanning(priv->rtllib, false)) && !(priv->rtllib->softmac_features & IEEE_SOFTMAC_SCAN)){
803 ;
804 }
805#ifdef CONFIG_MP
806 printk("######################%s(): In MP Test Can not Set Enc\n",__func__);
807 return 0;
808#endif
809 if (priv->bHwRadioOff == true)
810 return 0;
811
812 if (!priv->up) return -ENETDOWN;
813
814 priv->rtllib->wx_set_enc = 1;
815 down(&priv->rtllib->ips_sem);
816 IPSLeave(dev);
817 up(&priv->rtllib->ips_sem);
818 down(&priv->wx_sem);
819
820 RT_TRACE(COMP_SEC, "Setting SW wep key");
821 ret = rtllib_wx_set_encode(priv->rtllib,info,wrqu,key);
822 up(&priv->wx_sem);
823
824
825 if (wrqu->encoding.flags & IW_ENCODE_DISABLED) {
826 ieee->pairwise_key_type = ieee->group_key_type = KEY_TYPE_NA;
827 CamResetAllEntry(dev);
828 memset(priv->rtllib->swcamtable,0,sizeof(SW_CAM_TABLE)*32);
829 goto end_hw_sec;
830 }
831 if (wrqu->encoding.length!=0){
832
833 for (i=0 ; i<4 ; i++){
834 hwkey[i] |= key[4*i+0]&mask;
835 if (i==1&&(4*i+1)==wrqu->encoding.length) mask=0x00;
836 if (i==3&&(4*i+1)==wrqu->encoding.length) mask=0x00;
837 hwkey[i] |= (key[4*i+1]&mask)<<8;
838 hwkey[i] |= (key[4*i+2]&mask)<<16;
839 hwkey[i] |= (key[4*i+3]&mask)<<24;
840 }
841
842 #define CONF_WEP40 0x4
843 #define CONF_WEP104 0x14
844
845 switch (wrqu->encoding.flags & IW_ENCODE_INDEX){
846 case 0: key_idx = ieee->tx_keyidx; break;
847 case 1: key_idx = 0; break;
848 case 2: key_idx = 1; break;
849 case 3: key_idx = 2; break;
850 case 4: key_idx = 3; break;
851 default: break;
852 }
853 if (wrqu->encoding.length==0x5){
854 ieee->pairwise_key_type = KEY_TYPE_WEP40;
855 EnableHWSecurityConfig8192(dev);
856 }
857
858 else if (wrqu->encoding.length==0xd){
859 ieee->pairwise_key_type = KEY_TYPE_WEP104;
860 EnableHWSecurityConfig8192(dev);
861 setKey( dev,
862 key_idx,
863 key_idx,
864 KEY_TYPE_WEP104,
865 zero_addr[key_idx],
866 0,
867 hwkey);
868 set_swcam( dev,
869 key_idx,
870 key_idx,
871 KEY_TYPE_WEP104,
872 zero_addr[key_idx],
873 0,
874 hwkey,
875 0);
876 } else {
877 printk("wrong type in WEP, not WEP40 and WEP104\n");
878 }
879 }
880
881end_hw_sec:
882 priv->rtllib->wx_set_enc = 0;
883 return ret;
884}
885
886
887static int r8192_wx_set_scan_type(struct net_device *dev, struct iw_request_info *aa, union
888 iwreq_data *wrqu, char *p){
889
890 struct r8192_priv *priv = rtllib_priv(dev);
891 int *parms=(int*)p;
892 int mode=parms[0];
893
894 if (priv->bHwRadioOff == true)
895 return 0;
896
897 priv->rtllib->active_scan = mode;
898
899 return 1;
900}
901
902
903
904#define R8192_MAX_RETRY 255
905static int r8192_wx_set_retry(struct net_device *dev,
906 struct iw_request_info *info,
907 union iwreq_data *wrqu, char *extra)
908{
909 struct r8192_priv *priv = rtllib_priv(dev);
910 int err = 0;
911
912 if (priv->bHwRadioOff == true)
913 return 0;
914
915 down(&priv->wx_sem);
916
917 if (wrqu->retry.flags & IW_RETRY_LIFETIME ||
918 wrqu->retry.disabled){
919 err = -EINVAL;
920 goto exit;
921 }
922 if (!(wrqu->retry.flags & IW_RETRY_LIMIT)){
923 err = -EINVAL;
924 goto exit;
925 }
926
927 if (wrqu->retry.value > R8192_MAX_RETRY){
928 err= -EINVAL;
929 goto exit;
930 }
931 if (wrqu->retry.flags & IW_RETRY_MAX) {
932 priv->retry_rts = wrqu->retry.value;
933 DMESG("Setting retry for RTS/CTS data to %d", wrqu->retry.value);
934
935 }else {
936 priv->retry_data = wrqu->retry.value;
937 DMESG("Setting retry for non RTS/CTS data to %d", wrqu->retry.value);
938 }
939
940
941 rtl8192_commit(dev);
942 /*
943 if (priv->up){
944 rtl8180_halt_adapter(dev);
945 rtl8180_rx_enable(dev);
946 rtl8180_tx_enable(dev);
947
948 }
949 */
950exit:
951 up(&priv->wx_sem);
952
953 return err;
954}
955
956static int r8192_wx_get_retry(struct net_device *dev,
957 struct iw_request_info *info,
958 union iwreq_data *wrqu, char *extra)
959{
960 struct r8192_priv *priv = rtllib_priv(dev);
961
962
963 wrqu->retry.disabled = 0; /* can't be disabled */
964
965 if ((wrqu->retry.flags & IW_RETRY_TYPE) ==
966 IW_RETRY_LIFETIME)
967 return -EINVAL;
968
969 if (wrqu->retry.flags & IW_RETRY_MAX) {
970 wrqu->retry.flags = IW_RETRY_LIMIT & IW_RETRY_MAX;
971 wrqu->retry.value = priv->retry_rts;
972 } else {
973 wrqu->retry.flags = IW_RETRY_LIMIT & IW_RETRY_MIN;
974 wrqu->retry.value = priv->retry_data;
975 }
976
977
978 return 0;
979}
980
981static int r8192_wx_get_sens(struct net_device *dev,
982 struct iw_request_info *info,
983 union iwreq_data *wrqu, char *extra)
984{
985 struct r8192_priv *priv = rtllib_priv(dev);
986 if (priv->rf_set_sens == NULL)
987 return -1; /* we have not this support for this radio */
988 wrqu->sens.value = priv->sens;
989 return 0;
990}
991
992
993static int r8192_wx_set_sens(struct net_device *dev,
994 struct iw_request_info *info,
995 union iwreq_data *wrqu, char *extra)
996{
997
998 struct r8192_priv *priv = rtllib_priv(dev);
999
1000 short err = 0;
1001
1002 if (priv->bHwRadioOff == true)
1003 return 0;
1004
1005 down(&priv->wx_sem);
1006 if (priv->rf_set_sens == NULL) {
1007 err= -1; /* we have not this support for this radio */
1008 goto exit;
1009 }
1010 if (priv->rf_set_sens(dev, wrqu->sens.value) == 0)
1011 priv->sens = wrqu->sens.value;
1012 else
1013 err= -EINVAL;
1014
1015exit:
1016 up(&priv->wx_sem);
1017
1018 return err;
1019}
1020
1021#if (WIRELESS_EXT >= 18)
1022
1023static int r8192_wx_set_enc_ext(struct net_device *dev,
1024 struct iw_request_info *info,
1025 union iwreq_data *wrqu, char *extra)
1026{
1027 int ret=0;
1028 struct r8192_priv *priv = rtllib_priv(dev);
1029 struct rtllib_device* ieee = priv->rtllib;
1030
1031 if (priv->bHwRadioOff == true)
1032 return 0;
1033
1034 down(&priv->wx_sem);
1035
1036 priv->rtllib->wx_set_enc = 1;
1037 down(&priv->rtllib->ips_sem);
1038 IPSLeave(dev);
1039 up(&priv->rtllib->ips_sem);
1040
1041 ret = rtllib_wx_set_encode_ext(ieee, info, wrqu, extra);
1042
1043 {
1044 u8 broadcast_addr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
1045 u8 zero[6] = {0};
1046 u32 key[4] = {0};
1047 struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
1048 struct iw_point *encoding = &wrqu->encoding;
1049 u8 idx = 0, alg = 0, group = 0;
1050 if ((encoding->flags & IW_ENCODE_DISABLED) ||
1051 ext->alg == IW_ENCODE_ALG_NONE)
1052 {
1053 ieee->pairwise_key_type = ieee->group_key_type = KEY_TYPE_NA;
1054 CamResetAllEntry(dev);
1055 memset(priv->rtllib->swcamtable,0,sizeof(SW_CAM_TABLE)*32);
1056 goto end_hw_sec;
1057 }
1058 alg = (ext->alg == IW_ENCODE_ALG_CCMP)?KEY_TYPE_CCMP:ext->alg;
1059 idx = encoding->flags & IW_ENCODE_INDEX;
1060 if (idx)
1061 idx --;
1062 group = ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY;
1063
1064 if ((!group) || (IW_MODE_ADHOC == ieee->iw_mode) || (alg == KEY_TYPE_WEP40))
1065 {
1066 if ((ext->key_len == 13) && (alg == KEY_TYPE_WEP40) )
1067 alg = KEY_TYPE_WEP104;
1068 ieee->pairwise_key_type = alg;
1069 EnableHWSecurityConfig8192(dev);
1070 }
1071 memcpy((u8*)key, ext->key, 16);
1072
1073 if ((alg & KEY_TYPE_WEP40) && (ieee->auth_mode !=2) )
1074 {
1075 if (ext->key_len == 13)
1076 ieee->pairwise_key_type = alg = KEY_TYPE_WEP104;
1077 setKey( dev,
1078 idx,
1079 idx,
1080 alg,
1081 zero,
1082 0,
1083 key);
1084 set_swcam( dev,
1085 idx,
1086 idx,
1087 alg,
1088 zero,
1089 0,
1090 key,
1091 0);
1092 }
1093 else if (group)
1094 {
1095 ieee->group_key_type = alg;
1096 setKey( dev,
1097 idx,
1098 idx,
1099 alg,
1100 broadcast_addr,
1101 0,
1102 key);
1103 set_swcam( dev,
1104 idx,
1105 idx,
1106 alg,
1107 broadcast_addr,
1108 0,
1109 key,
1110 0);
1111 }
1112 else
1113 {
1114 #ifdef RTL8192E
1115 if ((ieee->pairwise_key_type == KEY_TYPE_CCMP) && ieee->pHTInfo->bCurrentHTSupport){
1116 write_nic_byte(dev, 0x173, 1);
1117 }
1118 #endif
1119 setKey( dev,
1120 4,
1121 idx,
1122 alg,
1123 (u8*)ieee->ap_mac_addr,
1124 0,
1125 key);
1126 set_swcam( dev,
1127 4,
1128 idx,
1129 alg,
1130 (u8*)ieee->ap_mac_addr,
1131 0,
1132 key,
1133 0);
1134 }
1135
1136
1137 }
1138
1139end_hw_sec:
1140 priv->rtllib->wx_set_enc = 0;
1141 up(&priv->wx_sem);
1142 return ret;
1143
1144}
1145static int r8192_wx_set_auth(struct net_device *dev,
1146 struct iw_request_info *info,
1147 union iwreq_data *data, char *extra)
1148{
1149 int ret=0;
1150
1151 struct r8192_priv *priv = rtllib_priv(dev);
1152
1153 if (priv->bHwRadioOff == true)
1154 return 0;
1155
1156 down(&priv->wx_sem);
1157 ret = rtllib_wx_set_auth(priv->rtllib, info, &(data->param), extra);
1158 up(&priv->wx_sem);
1159 return ret;
1160}
1161
1162static int r8192_wx_set_mlme(struct net_device *dev,
1163 struct iw_request_info *info,
1164 union iwreq_data *wrqu, char *extra)
1165{
1166
1167 int ret=0;
1168
1169 struct r8192_priv *priv = rtllib_priv(dev);
1170
1171 if (priv->bHwRadioOff == true)
1172 return 0;
1173
1174 down(&priv->wx_sem);
1175 ret = rtllib_wx_set_mlme(priv->rtllib, info, wrqu, extra);
1176 up(&priv->wx_sem);
1177 return ret;
1178}
1179#endif
1180
1181static int r8192_wx_set_gen_ie(struct net_device *dev,
1182 struct iw_request_info *info,
1183 union iwreq_data *data, char *extra)
1184{
1185 int ret = 0;
1186
1187 struct r8192_priv *priv = rtllib_priv(dev);
1188
1189 if (priv->bHwRadioOff == true)
1190 return 0;
1191
1192 down(&priv->wx_sem);
1193 ret = rtllib_wx_set_gen_ie(priv->rtllib, extra, data->data.length);
1194 up(&priv->wx_sem);
1195 return ret;
1196}
1197
1198static int r8192_wx_get_gen_ie(struct net_device *dev,
1199 struct iw_request_info *info,
1200 union iwreq_data *data, char *extra)
1201{
1202 int ret = 0;
1203 struct r8192_priv *priv = rtllib_priv(dev);
1204 struct rtllib_device* ieee = priv->rtllib;
1205
1206 if (ieee->wpa_ie_len == 0 || ieee->wpa_ie == NULL) {
1207 data->data.length = 0;
1208 return 0;
1209 }
1210
1211 if (data->data.length < ieee->wpa_ie_len) {
1212 return -E2BIG;
1213 }
1214
1215 data->data.length = ieee->wpa_ie_len;
1216 memcpy(extra, ieee->wpa_ie, ieee->wpa_ie_len);
1217 return ret;
1218}
1219
1220#define OID_RT_INTEL_PROMISCUOUS_MODE 0xFF0101F6
1221
1222static int r8192_wx_set_PromiscuousMode(struct net_device *dev,
1223 struct iw_request_info *info,
1224 union iwreq_data *wrqu, char *extra)
1225{
1226 struct r8192_priv *priv = rtllib_priv(dev);
1227 struct rtllib_device* ieee = priv->rtllib;
1228
1229 u32 *info_buf = (u32*)(wrqu->data.pointer);
1230
1231 u32 oid = info_buf[0];
1232 u32 bPromiscuousOn = info_buf[1];
1233 u32 bFilterSourceStationFrame = info_buf[2];
1234
1235 if (OID_RT_INTEL_PROMISCUOUS_MODE == oid)
1236 {
1237 ieee->IntelPromiscuousModeInfo.bPromiscuousOn =
1238 (bPromiscuousOn)? (true) : (false);
1239 ieee->IntelPromiscuousModeInfo.bFilterSourceStationFrame =
1240 (bFilterSourceStationFrame)? (true) : (false);
1241
1242 (bPromiscuousOn) ? (rtllib_EnableIntelPromiscuousMode(dev, false)) :
1243 (rtllib_DisableIntelPromiscuousMode(dev, false));
1244
1245 printk("=======>%s(), on = %d, filter src sta = %d\n", __func__,
1246 bPromiscuousOn, bFilterSourceStationFrame);
1247 } else {
1248 return -1;
1249 }
1250
1251 return 0;
1252}
1253
1254
1255static int r8192_wx_get_PromiscuousMode(struct net_device *dev,
1256 struct iw_request_info *info,
1257 union iwreq_data *wrqu, char *extra)
1258{
1259 struct r8192_priv *priv = rtllib_priv(dev);
1260 struct rtllib_device* ieee = priv->rtllib;
1261
1262 down(&priv->wx_sem);
1263
1264 snprintf(extra, 45, "PromiscuousMode:%d, FilterSrcSTAFrame:%d",\
1265 ieee->IntelPromiscuousModeInfo.bPromiscuousOn,\
1266 ieee->IntelPromiscuousModeInfo.bFilterSourceStationFrame);
1267 wrqu->data.length = strlen(extra) + 1;
1268
1269 up(&priv->wx_sem);
1270
1271 return 0;
1272}
1273
1274
1275#define IW_IOCTL(x) [(x)-SIOCSIWCOMMIT]
1276static iw_handler r8192_wx_handlers[] =
1277{
1278 IW_IOCTL(SIOCGIWNAME) = r8192_wx_get_name,
1279 IW_IOCTL(SIOCSIWFREQ) = r8192_wx_set_freq,
1280 IW_IOCTL(SIOCGIWFREQ) = r8192_wx_get_freq,
1281 IW_IOCTL(SIOCSIWMODE) = r8192_wx_set_mode,
1282 IW_IOCTL(SIOCGIWMODE) = r8192_wx_get_mode,
1283 IW_IOCTL(SIOCSIWSENS) = r8192_wx_set_sens,
1284 IW_IOCTL(SIOCGIWSENS) = r8192_wx_get_sens,
1285 IW_IOCTL(SIOCGIWRANGE) = rtl8192_wx_get_range,
1286 IW_IOCTL(SIOCSIWAP) = r8192_wx_set_wap,
1287 IW_IOCTL(SIOCGIWAP) = r8192_wx_get_wap,
1288 IW_IOCTL(SIOCSIWSCAN) = r8192_wx_set_scan,
1289 IW_IOCTL(SIOCGIWSCAN) = r8192_wx_get_scan,
1290 IW_IOCTL(SIOCSIWESSID) = r8192_wx_set_essid,
1291 IW_IOCTL(SIOCGIWESSID) = r8192_wx_get_essid,
1292 IW_IOCTL(SIOCSIWNICKN) = r8192_wx_set_nick,
1293 IW_IOCTL(SIOCGIWNICKN) = r8192_wx_get_nick,
1294 IW_IOCTL(SIOCSIWRATE) = r8192_wx_set_rate,
1295 IW_IOCTL(SIOCGIWRATE) = r8192_wx_get_rate,
1296 IW_IOCTL(SIOCSIWRTS) = r8192_wx_set_rts,
1297 IW_IOCTL(SIOCGIWRTS) = r8192_wx_get_rts,
1298 IW_IOCTL(SIOCSIWFRAG) = r8192_wx_set_frag,
1299 IW_IOCTL(SIOCGIWFRAG) = r8192_wx_get_frag,
1300 IW_IOCTL(SIOCSIWRETRY) = r8192_wx_set_retry,
1301 IW_IOCTL(SIOCGIWRETRY) = r8192_wx_get_retry,
1302 IW_IOCTL(SIOCSIWENCODE) = r8192_wx_set_enc,
1303 IW_IOCTL(SIOCGIWENCODE) = r8192_wx_get_enc,
1304 IW_IOCTL(SIOCSIWPOWER) = r8192_wx_set_power,
1305 IW_IOCTL(SIOCGIWPOWER) = r8192_wx_get_power,
1306#if (WIRELESS_EXT >= 18)
1307 IW_IOCTL(SIOCSIWGENIE) = r8192_wx_set_gen_ie,
1308 IW_IOCTL(SIOCGIWGENIE) = r8192_wx_get_gen_ie,
1309 IW_IOCTL(SIOCSIWMLME) = r8192_wx_set_mlme,
1310 IW_IOCTL(SIOCSIWAUTH) = r8192_wx_set_auth,
1311 IW_IOCTL(SIOCSIWENCODEEXT) = r8192_wx_set_enc_ext,
1312#endif
1313};
1314
1315/*
1316 * the following rule need to be follwing,
1317 * Odd : get (world access),
1318 * even : set (root access)
1319 * */
1320static const struct iw_priv_args r8192_private_args[] = {
1321 {
1322 SIOCIWFIRSTPRIV + 0x0,
1323 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "set_debugflag"
1324 },
1325 {
1326 SIOCIWFIRSTPRIV + 0x1,
1327 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "activescan"
1328 },
1329 {
1330 SIOCIWFIRSTPRIV + 0x2,
1331 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "rawtx"
1332 }
1333 ,
1334 {
1335 SIOCIWFIRSTPRIV + 0x3,
1336 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "forcereset"
1337 }
1338 ,
1339 {
1340 SIOCIWFIRSTPRIV + 0x4,
1341 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "force_mic_error"
1342 }
1343 ,
1344 {
1345 SIOCIWFIRSTPRIV + 0x5,
1346 IW_PRIV_TYPE_NONE, IW_PRIV_TYPE_INT|IW_PRIV_SIZE_FIXED|1,
1347 "firm_ver"
1348 }
1349 ,
1350 {
1351 SIOCIWFIRSTPRIV + 0x6,
1352 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED|1, IW_PRIV_TYPE_NONE,
1353 "set_power"
1354 }
1355 ,
1356 {
1357 SIOCIWFIRSTPRIV + 0x9,
1358 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED|1, IW_PRIV_TYPE_NONE,
1359 "radio"
1360 }
1361 ,
1362 {
1363 SIOCIWFIRSTPRIV + 0xa,
1364 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED|1, IW_PRIV_TYPE_NONE,
1365 "lps_interv"
1366 }
1367 ,
1368 {
1369 SIOCIWFIRSTPRIV + 0xb,
1370 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED|1, IW_PRIV_TYPE_NONE,
1371 "lps_force"
1372 }
1373 ,
1374 {
1375 SIOCIWFIRSTPRIV + 0xc,
1376 0, IW_PRIV_TYPE_CHAR|2047, "adhoc_peer_list"
1377 }
1378#ifdef CONFIG_MP
1379 ,
1380 {
1381 SIOCIWFIRSTPRIV + 0xe,
1382 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "SetChan"
1383 }
1384 ,
1385 {
1386 SIOCIWFIRSTPRIV + 0xf,
1387 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "SetRate"
1388 }
1389 ,
1390 {
1391 SIOCIWFIRSTPRIV + 0x10,
1392 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "SetTxPower"
1393 }
1394 ,
1395 {
1396 SIOCIWFIRSTPRIV + 0x11,
1397 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "SetBW"
1398 }
1399 ,
1400 {
1401 SIOCIWFIRSTPRIV + 0x12,
1402 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "TxStart"
1403 }
1404 ,
1405 {
1406 SIOCIWFIRSTPRIV + 0x13,
1407 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1,0, "SetSingleCarrier"
1408 }
1409 ,
1410 {
1411 SIOCIWFIRSTPRIV + 0x14,
1412 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 3, 0, "WriteRF"
1413 }
1414 ,
1415 {
1416 SIOCIWFIRSTPRIV + 0x15,
1417 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 3, 0, "WriteMAC"
1418 }
1419#endif
1420 ,
1421 {
1422 SIOCIWFIRSTPRIV + 0x16,
1423 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 3, 0, "setpromisc"
1424 }
1425 ,
1426 {
1427 SIOCIWFIRSTPRIV + 0x17,
1428 0,IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | 45, "getpromisc"
1429 }
1430
1431};
1432
1433static iw_handler r8192_private_handler[] = {
1434 (iw_handler)r8192_wx_set_debugflag, /*SIOCIWSECONDPRIV*/
1435 (iw_handler)r8192_wx_set_scan_type,
1436 (iw_handler)r8192_wx_set_rawtx,
1437 (iw_handler)r8192_wx_force_reset,
1438 (iw_handler)r8192_wx_force_mic_error,
1439 (iw_handler)r8191se_wx_get_firm_version,
1440 (iw_handler)r8192_wx_adapter_power_status,
1441 (iw_handler)NULL,
1442 (iw_handler)NULL,
1443 (iw_handler)r8192se_wx_set_radio,
1444 (iw_handler)r8192se_wx_set_lps_awake_interval,
1445 (iw_handler)r8192se_wx_set_force_lps,
1446 (iw_handler)r8192_wx_get_adhoc_peers,
1447 (iw_handler)NULL,
1448#ifdef CONFIG_MP
1449 (iw_handler)r8192_wx_mp_set_chan,
1450 (iw_handler)r8192_wx_mp_set_txrate,
1451 (iw_handler)r8192_wx_mp_set_txpower,
1452 (iw_handler)r8192_wx_mp_set_bw,
1453 (iw_handler)r8192_wx_mp_set_txstart,
1454 (iw_handler)r8192_wx_mp_set_singlecarrier,
1455 (iw_handler)r8192_wx_mp_write_rf,
1456 (iw_handler)r8192_wx_mp_write_mac,
1457#else
1458 (iw_handler)NULL,
1459 (iw_handler)NULL,
1460 (iw_handler)NULL,
1461 (iw_handler)NULL,
1462 (iw_handler)NULL,
1463 (iw_handler)NULL,
1464 (iw_handler)NULL,
1465 (iw_handler)NULL,
1466#endif
1467 (iw_handler)r8192_wx_set_PromiscuousMode,
1468 (iw_handler)r8192_wx_get_PromiscuousMode,
1469};
1470
1471struct iw_statistics *r8192_get_wireless_stats(struct net_device *dev)
1472{
1473 struct r8192_priv *priv = rtllib_priv(dev);
1474 struct rtllib_device* ieee = priv->rtllib;
1475 struct iw_statistics* wstats = &priv->wstats;
1476 int tmp_level = 0;
1477 int tmp_qual = 0;
1478 int tmp_noise = 0;
1479 if (ieee->state < RTLLIB_LINKED)
1480 {
1481 wstats->qual.qual = 10;
1482 wstats->qual.level = 0;
1483 wstats->qual.noise = -100;
1484 wstats->qual.updated = IW_QUAL_ALL_UPDATED | IW_QUAL_DBM;
1485 return wstats;
1486 }
1487
1488 tmp_level = (&ieee->current_network)->stats.rssi;
1489 tmp_qual = (&ieee->current_network)->stats.signal;
1490 tmp_noise = (&ieee->current_network)->stats.noise;
1491
1492 wstats->qual.level = tmp_level;
1493 wstats->qual.qual = tmp_qual;
1494 wstats->qual.noise = tmp_noise;
1495 wstats->qual.updated = IW_QUAL_ALL_UPDATED | IW_QUAL_DBM;
1496 return wstats;
1497}
1498
1499struct iw_handler_def r8192_wx_handlers_def={
1500 .standard = r8192_wx_handlers,
1501 .num_standard = sizeof(r8192_wx_handlers) / sizeof(iw_handler),
1502 .private = r8192_private_handler,
1503 .num_private = sizeof(r8192_private_handler) / sizeof(iw_handler),
1504 .num_private_args = sizeof(r8192_private_args) / sizeof(struct iw_priv_args),
1505#if WIRELESS_EXT >= 17
1506 .get_wireless_stats = r8192_get_wireless_stats,
1507#endif
1508 .private_args = (struct iw_priv_args *)r8192_private_args,
1509};
diff --git a/drivers/staging/rtl8192e/rtl_wx.h b/drivers/staging/rtl8192e/rtl_wx.h
new file mode 100644
index 00000000000..94d42a82211
--- /dev/null
+++ b/drivers/staging/rtl8192e/rtl_wx.h
@@ -0,0 +1,31 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/
19
20#ifndef R819x_WX_H
21#define R819x_WX_H
22
23struct net_device;
24struct iw_handler_def;
25struct iw_statistics;
26
27extern struct iw_handler_def r8192_wx_handlers_def;
28struct iw_statistics *r8192_get_wireless_stats(struct net_device *dev);
29u16 rtl8192_11n_user_show_rates(struct net_device* dev);
30
31#endif
diff --git a/drivers/staging/rtl8192e/rtllib.h b/drivers/staging/rtl8192e/rtllib.h
new file mode 100644
index 00000000000..61780a2caa2
--- /dev/null
+++ b/drivers/staging/rtl8192e/rtllib.h
@@ -0,0 +1,3452 @@
1/*
2 * Merged with mainline rtllib.h in Aug 2004. Original ieee802_11
3 * remains copyright by the original authors
4 *
5 * Portions of the merged code are based on Host AP (software wireless
6 * LAN access point) driver for Intersil Prism2/2.5/3.
7 *
8 * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
9 * <jkmaline@cc.hut.fi>
10 * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
11 *
12 * Adaption to a generic IEEE 802.11 stack by James Ketrenos
13 * <jketreno@linux.intel.com>
14 * Copyright (c) 2004, Intel Corporation
15 *
16 * Modified for Realtek's wi-fi cards by Andrea Merello
17 * <andreamrl@tiscali.it>
18 *
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License version 2 as
21 * published by the Free Software Foundation. See README and COPYING for
22 * more details.
23 */
24#ifndef RTLLIB_H
25#define RTLLIB_H
26#include <linux/if_ether.h> /* ETH_ALEN */
27#include <linux/kernel.h> /* ARRAY_SIZE */
28#include <linux/version.h>
29#include <linux/module.h>
30#include <linux/interrupt.h>
31#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
32#include <linux/jiffies.h>
33#else
34#include <linux/jffs.h>
35#include <linux/tqueue.h>
36#endif
37#include <linux/timer.h>
38#include <linux/sched.h>
39
40#include <linux/delay.h>
41#include <linux/wireless.h>
42
43#ifdef CONFIG_CFG_80211
44#include <net/cfg80211.h>
45#endif
46
47#include "rtl819x_HT.h"
48#include "rtl819x_BA.h"
49#include "rtl819x_TS.h"
50
51#include <linux/netdevice.h>
52#include <linux/if_arp.h> /* ARPHRD_ETHER */
53
54#ifndef WIRELESS_SPY
55#define WIRELESS_SPY
56#endif
57#include <net/iw_handler.h>
58
59#ifndef IEEE80211_RADIOTAP_F_BADFCS
60#define IEEE80211_RADIOTAP_F_BADFCS 0x40 /* bad FCS */
61#endif
62
63#ifndef IW_MODE_MONITOR
64#define IW_MODE_MONITOR 6
65#endif
66
67#ifndef IWEVCUSTOM
68#define IWEVCUSTOM 0x8c02
69#endif
70
71#ifndef IW_CUSTOM_MAX
72/* Max number of char in custom event - use multiple of them if needed */
73#define IW_CUSTOM_MAX 256 /* In bytes */
74#endif
75
76#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
77#define jiffies_to_msecs(t) ((t) * 1000 / HZ)
78#ifndef __bitwise
79#define __bitwise __attribute__((bitwise))
80#endif
81typedef __u16 __le16;
82
83#if (WIRELESS_EXT < 16)
84struct iw_spy_data{
85 /* --- Standard spy support --- */
86 int spy_number;
87 u_char spy_address[IW_MAX_SPY][ETH_ALEN];
88 struct iw_quality spy_stat[IW_MAX_SPY];
89 /* --- Enhanced spy support (event) */
90 struct iw_quality spy_thr_low; /* Low threshold */
91 struct iw_quality spy_thr_high; /* High threshold */
92 u_char spy_thr_under[IW_MAX_SPY];
93};
94#endif
95#endif
96
97#ifndef container_of
98/**
99 * container_of - cast a member of a structure out to the containing structure
100 *
101 * @ptr: the pointer to the member.
102 * @type: the type of the container struct this is embedded in.
103 * @member: the name of the member within the struct.
104 *
105 */
106#define container_of(ptr, type, member) ({ \
107 const typeof( ((type *)0)->member ) *__mptr = (ptr); \
108 (type *)( (char *)__mptr - offsetof(type,member) );})
109#endif
110
111#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18))
112#define skb_tail_pointer_rsl(skb) skb_tail_pointer(skb)
113#else
114#define skb_tail_pointer_rsl(skb) skb->tail
115#endif
116
117#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
118 #define EXPORT_SYMBOL_RSL(x) EXPORT_SYMBOL(x)
119#else
120 #define EXPORT_SYMBOL_RSL(x) EXPORT_SYMBOL_NOVERS(x)
121#endif
122#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
123static inline void tq_init(struct tq_struct * task, void(*func)(void *), void *data)
124{
125 task->routine = func;
126 task->data = data;
127 INIT_LIST_HEAD(&task->list);
128 task->sync = 0;
129}
130#endif
131
132#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10))
133static inline void setup_timer(struct timer_list * timer, void(*function)(unsigned long), unsigned long data)
134{
135 timer->function = function;
136 timer->data = data;
137}
138#endif
139
140#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
141 typedef struct delayed_work delayed_work_struct_rsl;
142 #define queue_delayed_work_rsl(x,y,z) queue_delayed_work(x,y,z)
143 #define INIT_DELAYED_WORK_RSL(x,y,z) INIT_DELAYED_WORK(x,y)
144#elif LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,40)
145 typedef struct tq_struct delayed_work_struct_rsl;
146 #define queue_delayed_work_rsl(x,y,z) schedule_task(y)
147 #define INIT_DELAYED_WORK_RSL(x,y,z) tq_init(x,y,z)
148#else
149 typedef struct work_struct delayed_work_struct_rsl;
150 #define queue_delayed_work_rsl(x,y,z) queue_delayed_work(x,y,z)
151 #define INIT_DELAYED_WORK_RSL(x,y,z) INIT_WORK(x,y,z)
152#endif
153
154#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
155 typedef struct work_struct work_struct_rsl;
156 #define queue_work_rsl(x,y) queue_work(x,y)
157 #define INIT_WORK_RSL(x,y,z) INIT_WORK(x,y)
158#elif LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,40)
159 typedef struct tq_struct work_struct_rsl;
160 #define queue_work_rsl(x,y) schedule_task(y)
161 #define INIT_WORK_RSL(x,y,z) tq_init(x,y,z)
162#else
163 typedef struct work_struct work_struct_rsl;
164 #define queue_work_rsl(x,y) queue_work(x,y)
165 #define INIT_WORK_RSL(x,y,z) INIT_WORK(x,y,z)
166#endif
167
168#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
169 #define container_of_work_rsl(x,y,z) container_of(x,y,z)
170 #define container_of_dwork_rsl(x,y,z) container_of(container_of(x, struct delayed_work, work), y, z)
171#else
172 #define container_of_work_rsl(x,y,z) (x)
173 #define container_of_dwork_rsl(x,y,z) (x)
174#endif
175
176#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,4,20)) && (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
177static inline char *
178iwe_stream_add_event_rsl(struct iw_request_info *info,
179 char * stream, /* Stream of events */
180 char * ends, /* End of stream */
181 struct iw_event *iwe, /* Payload */
182 int event_len) /* Real size of payload */
183{
184 /* Check if it's possible */
185 if ((stream + event_len) < ends) {
186 iwe->len = event_len;
187 ndelay(1);
188 memcpy(stream, (char *) iwe, event_len);
189 stream += event_len;
190 }
191 return stream;
192}
193#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
194 #define iwe_stream_add_event_rsl(info,start,stop,iwe,len) iwe_stream_add_event(info,start,stop,iwe,len)
195#else
196 #define iwe_stream_add_event_rsl(info,start,stop,iwe,len) iwe_stream_add_event(start,stop,iwe,len)
197#endif
198
199#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
200 #define iwe_stream_add_point_rsl(info,start,stop,iwe,p) iwe_stream_add_point(info,start,stop,iwe,p)
201#else
202 #define iwe_stream_add_point_rsl(info,start,stop,iwe,p) iwe_stream_add_point(start,stop,iwe,p)
203#endif
204
205#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
206 #define usb_alloc_urb_rsl(x,y) usb_alloc_urb(x,y)
207 #define usb_submit_urb_rsl(x,y) usb_submit_urb(x,y)
208#else
209 #define usb_alloc_urb_rsl(x,y) usb_alloc_urb(x)
210 #define usb_submit_urb_rsl(x,y) usb_submit_urb(x)
211#endif
212
213static inline void *netdev_priv_rsl(struct net_device *dev)
214{
215#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
216 return netdev_priv(dev);
217#else
218 return dev->priv;
219#endif
220}
221
222#define KEY_TYPE_NA 0x0
223#define KEY_TYPE_WEP40 0x1
224#define KEY_TYPE_TKIP 0x2
225#define KEY_TYPE_CCMP 0x4
226#define KEY_TYPE_WEP104 0x5
227/* added for rtl819x tx procedure */
228#define MAX_QUEUE_SIZE 0x10
229
230#if defined(RTL8192SU) || defined(RTL8190P) ||defined(RTL8192U) ||defined(RTL8192E)
231#define BK_QUEUE 0
232#define BE_QUEUE 1
233#define VI_QUEUE 2
234#define VO_QUEUE 3
235#define HCCA_QUEUE 4
236#define TXCMD_QUEUE 5
237#define MGNT_QUEUE 6
238#define HIGH_QUEUE 7
239#define BEACON_QUEUE 8
240#elif defined(RTL8192SE)
241#define BK_QUEUE 0
242#define BE_QUEUE 1
243#define VI_QUEUE 2
244#define VO_QUEUE 3
245#define BEACON_QUEUE 4
246#define TXCMD_QUEUE 5
247#define MGNT_QUEUE 6
248#define HIGH_QUEUE 7
249#define HCCA_QUEUE 8
250
251#endif
252
253#define LOW_QUEUE BE_QUEUE
254#define NORMAL_QUEUE MGNT_QUEUE
255
256#ifndef IW_MODE_MESH
257#define IW_MODE_MESH 7
258#endif
259#define AMSDU_SUBHEADER_LEN 14
260#define SWRF_TIMEOUT 50
261
262#define IE_CISCO_FLAG_POSITION 0x08
263#define SUPPORT_CKIP_MIC 0x08
264#define SUPPORT_CKIP_PK 0x10
265#define RT_RF_OFF_LEVL_ASPM BIT0
266#define RT_RF_OFF_LEVL_CLK_REQ BIT1
267#define RT_RF_OFF_LEVL_PCI_D3 BIT2
268#define RT_RF_OFF_LEVL_HALT_NIC BIT3
269#define RT_RF_OFF_LEVL_FREE_FW BIT4
270#define RT_RF_OFF_LEVL_FW_32K BIT5
271#define RT_RF_PS_LEVEL_ALWAYS_ASPM BIT6
272#define RT_RF_LPS_DISALBE_2R BIT30
273#define RT_RF_LPS_LEVEL_ASPM BIT31
274#define RT_IN_PS_LEVEL(pPSC, _PS_FLAG) ((pPSC->CurPsLevel & _PS_FLAG) ? true : false)
275#define RT_CLEAR_PS_LEVEL(pPSC, _PS_FLAG) (pPSC->CurPsLevel &= (~(_PS_FLAG)))
276#define RT_SET_PS_LEVEL(pPSC, _PS_FLAG) (pPSC->CurPsLevel |= _PS_FLAG)
277
278/* defined for skb cb field */
279/* At most 28 byte */
280typedef struct cb_desc {
281 /* Tx Desc Related flags (8-9) */
282 u8 bLastIniPkt:1;
283 u8 bCmdOrInit:1;
284 u8 bFirstSeg:1;
285 u8 bLastSeg:1;
286 u8 bEncrypt:1;
287 u8 bTxDisableRateFallBack:1;
288 u8 bTxUseDriverAssingedRate:1;
289 u8 bHwSec:1;
290
291 u8 nStuckCount;
292
293 /* Tx Firmware Relaged flags (10-11)*/
294 u8 bCTSEnable:1;
295 u8 bRTSEnable:1;
296 u8 bUseShortGI:1;
297 u8 bUseShortPreamble:1;
298 u8 bTxEnableFwCalcDur:1;
299 u8 bAMPDUEnable:1;
300 u8 bRTSSTBC:1;
301 u8 RTSSC:1;
302
303 u8 bRTSBW:1;
304 u8 bPacketBW:1;
305 u8 bRTSUseShortPreamble:1;
306 u8 bRTSUseShortGI:1;
307 u8 bMulticast:1;
308 u8 bBroadcast:1;
309 u8 drv_agg_enable:1;
310 u8 reserved2:1;
311
312 /* Tx Desc related element(12-19) */
313 u8 rata_index;
314 u8 queue_index;
315 u16 txbuf_size;
316 u8 RATRIndex;
317 u8 bAMSDU:1;
318 u8 bFromAggrQ:1;
319 u8 reserved6:6;
320 u8 macId;
321 u8 priority;
322
323 /* Tx firmware related element(20-27) */
324 u8 data_rate;
325 u8 rts_rate;
326 u8 ampdu_factor;
327 u8 ampdu_density;
328 u8 DrvAggrNum;
329 u8 bdhcp;
330 u16 pkt_size;
331 u8 bIsSpecialDataFrame;
332
333 u8 bBTTxPacket;
334 u8 bIsBTProbRsp;
335}cb_desc, *pcb_desc;
336
337/*--------------------------Define -------------------------------------------*/
338#define MGN_1M 0x02
339#define MGN_2M 0x04
340#define MGN_5_5M 0x0b
341#define MGN_11M 0x16
342
343#define MGN_6M 0x0c
344#define MGN_9M 0x12
345#define MGN_12M 0x18
346#define MGN_18M 0x24
347#define MGN_24M 0x30
348#define MGN_36M 0x48
349#define MGN_48M 0x60
350#define MGN_54M 0x6c
351
352#define MGN_MCS0 0x80
353#define MGN_MCS1 0x81
354#define MGN_MCS2 0x82
355#define MGN_MCS3 0x83
356#define MGN_MCS4 0x84
357#define MGN_MCS5 0x85
358#define MGN_MCS6 0x86
359#define MGN_MCS7 0x87
360#define MGN_MCS8 0x88
361#define MGN_MCS9 0x89
362#define MGN_MCS10 0x8a
363#define MGN_MCS11 0x8b
364#define MGN_MCS12 0x8c
365#define MGN_MCS13 0x8d
366#define MGN_MCS14 0x8e
367#define MGN_MCS15 0x8f
368#define MGN_MCS0_SG 0x90
369#define MGN_MCS1_SG 0x91
370#define MGN_MCS2_SG 0x92
371#define MGN_MCS3_SG 0x93
372#define MGN_MCS4_SG 0x94
373#define MGN_MCS5_SG 0x95
374#define MGN_MCS6_SG 0x96
375#define MGN_MCS7_SG 0x97
376#define MGN_MCS8_SG 0x98
377#define MGN_MCS9_SG 0x99
378#define MGN_MCS10_SG 0x9a
379#define MGN_MCS11_SG 0x9b
380#define MGN_MCS12_SG 0x9c
381#define MGN_MCS13_SG 0x9d
382#define MGN_MCS14_SG 0x9e
383#define MGN_MCS15_SG 0x9f
384
385
386enum _ReasonCode{
387 unspec_reason = 0x1,
388 auth_not_valid = 0x2,
389 deauth_lv_ss = 0x3,
390 inactivity = 0x4,
391 ap_overload = 0x5,
392 class2_err = 0x6,
393 class3_err = 0x7,
394 disas_lv_ss = 0x8,
395 asoc_not_auth = 0x9,
396
397 mic_failure = 0xe,
398
399 invalid_IE = 0x0d,
400 four_way_tmout = 0x0f,
401 two_way_tmout = 0x10,
402 IE_dismatch = 0x11,
403 invalid_Gcipher = 0x12,
404 invalid_Pcipher = 0x13,
405 invalid_AKMP = 0x14,
406 unsup_RSNIEver = 0x15,
407 invalid_RSNIE = 0x16,
408 auth_802_1x_fail= 0x17,
409 ciper_reject = 0x18,
410
411 QoS_unspec = 0x20,
412 QAP_bandwidth = 0x21,
413 poor_condition = 0x22,
414 no_facility = 0x23,
415 req_declined = 0x25,
416 invalid_param = 0x26,
417 req_not_honored= 0x27,
418 TS_not_created = 0x2F,
419 DL_not_allowed = 0x30,
420 dest_not_exist = 0x31,
421 dest_not_QSTA = 0x32,
422};
423
424typedef enum _HAL_DEF_VARIABLE{
425 HAL_DEF_TPC_ENABLE,
426 HAL_DEF_INIT_GAIN,
427 HAL_DEF_PROT_IMP_MODE,
428 HAL_DEF_HIGH_POWER_MECHANISM,
429 HAL_DEF_RATE_ADAPTIVE_MECHANISM,
430 HAL_DEF_ANTENNA_DIVERSITY_MECHANISM,
431 HAL_DEF_LED,
432 HAL_DEF_CW_MAX_MIN,
433
434 HAL_DEF_WOWLAN,
435 HAL_DEF_ENDPOINTS,
436 HAL_DEF_MIN_TX_POWER_DBM,
437 HAL_DEF_MAX_TX_POWER_DBM,
438 HW_DEF_EFUSE_REPG_SECTION1_FLAG,
439 HW_DEF_EFUSE_REPG_DATA,
440 HW_DEF_GPIO,
441 HAL_DEF_PCI_SUPPORT_ASPM,
442 HAL_DEF_THERMAL_VALUE,
443 HAL_DEF_USB_IN_TOKEN_REV,
444}HAL_DEF_VARIABLE;
445
446
447typedef enum _HW_VARIABLES{
448 HW_VAR_ETHER_ADDR,
449 HW_VAR_MULTICAST_REG,
450 HW_VAR_BASIC_RATE,
451 HW_VAR_BSSID,
452 HW_VAR_MEDIA_STATUS,
453 HW_VAR_SECURITY_CONF,
454 HW_VAR_BEACON_INTERVAL,
455 HW_VAR_ATIM_WINDOW,
456 HW_VAR_LISTEN_INTERVAL,
457 HW_VAR_CS_COUNTER,
458 HW_VAR_DEFAULTKEY0,
459 HW_VAR_DEFAULTKEY1,
460 HW_VAR_DEFAULTKEY2,
461 HW_VAR_DEFAULTKEY3,
462 HW_VAR_SIFS,
463 HW_VAR_DIFS,
464 HW_VAR_EIFS,
465 HW_VAR_SLOT_TIME,
466 HW_VAR_ACK_PREAMBLE,
467 HW_VAR_CW_CONFIG,
468 HW_VAR_CW_VALUES,
469 HW_VAR_RATE_FALLBACK_CONTROL,
470 HW_VAR_CONTENTION_WINDOW,
471 HW_VAR_RETRY_COUNT,
472 HW_VAR_TR_SWITCH,
473 HW_VAR_COMMAND,
474 HW_VAR_WPA_CONFIG,
475 HW_VAR_AMPDU_MIN_SPACE,
476 HW_VAR_SHORTGI_DENSITY,
477 HW_VAR_AMPDU_FACTOR,
478 HW_VAR_MCS_RATE_AVAILABLE,
479 HW_VAR_AC_PARAM,
480 HW_VAR_ACM_CTRL,
481 HW_VAR_DIS_Req_Qsize,
482 HW_VAR_CCX_CHNL_LOAD,
483 HW_VAR_CCX_NOISE_HISTOGRAM,
484 HW_VAR_CCX_CLM_NHM,
485 HW_VAR_TxOPLimit,
486 HW_VAR_TURBO_MODE,
487 HW_VAR_RF_STATE,
488 HW_VAR_RF_OFF_BY_HW,
489 HW_VAR_BUS_SPEED,
490 HW_VAR_SET_DEV_POWER,
491
492 HW_VAR_RCR,
493 HW_VAR_RATR_0,
494 HW_VAR_RRSR,
495 HW_VAR_CPU_RST,
496 HW_VAR_CECHK_BSSID,
497 HW_VAR_LBK_MODE,
498 HW_VAR_AES_11N_FIX,
499 HW_VAR_USB_RX_AGGR,
500 HW_VAR_USER_CONTROL_TURBO_MODE,
501 HW_VAR_RETRY_LIMIT,
502 HW_VAR_INIT_TX_RATE,
503 HW_VAR_TX_RATE_REG,
504 HW_VAR_EFUSE_USAGE,
505 HW_VAR_EFUSE_BYTES,
506 HW_VAR_AUTOLOAD_STATUS,
507 HW_VAR_RF_2R_DISABLE,
508 HW_VAR_SET_RPWM,
509 HW_VAR_H2C_FW_PWRMODE,
510 HW_VAR_H2C_FW_JOINBSSRPT,
511 HW_VAR_1X1_RECV_COMBINE,
512 HW_VAR_STOP_SEND_BEACON,
513 HW_VAR_TSF_TIMER,
514 HW_VAR_IO_CMD,
515
516 HW_VAR_RF_RECOVERY,
517 HW_VAR_H2C_FW_UPDATE_GTK,
518 HW_VAR_WF_MASK,
519 HW_VAR_WF_CRC,
520 HW_VAR_WF_IS_MAC_ADDR,
521 HW_VAR_H2C_FW_OFFLOAD,
522 HW_VAR_RESET_WFCRC,
523
524 HW_VAR_HANDLE_FW_C2H,
525 HW_VAR_DL_FW_RSVD_PAGE,
526 HW_VAR_AID,
527 HW_VAR_HW_SEQ_ENABLE,
528 HW_VAR_CORRECT_TSF,
529 HW_VAR_BCN_VALID,
530 HW_VAR_FWLPS_RF_ON,
531 HW_VAR_DUAL_TSF_RST,
532 HW_VAR_SWITCH_EPHY_WoWLAN,
533 HW_VAR_INT_MIGRATION,
534 HW_VAR_INT_AC,
535 HW_VAR_RF_TIMING,
536}HW_VARIABLES;
537
538typedef enum _RT_OP_MODE{
539 RT_OP_MODE_AP,
540 RT_OP_MODE_INFRASTRUCTURE,
541 RT_OP_MODE_IBSS,
542 RT_OP_MODE_NO_LINK,
543}RT_OP_MODE, *PRT_OP_MODE;
544
545
546#define aSifsTime (((priv->rtllib->current_network.mode == IEEE_A)||(priv->rtllib->current_network.mode == IEEE_N_24G)||(priv->rtllib->current_network.mode == IEEE_N_5G))? 16 : 10)
547
548#define MGMT_QUEUE_NUM 5
549
550#define IEEE_CMD_SET_WPA_PARAM 1
551#define IEEE_CMD_SET_WPA_IE 2
552#define IEEE_CMD_SET_ENCRYPTION 3
553#define IEEE_CMD_MLME 4
554
555#define IEEE_PARAM_WPA_ENABLED 1
556#define IEEE_PARAM_TKIP_COUNTERMEASURES 2
557#define IEEE_PARAM_DROP_UNENCRYPTED 3
558#define IEEE_PARAM_PRIVACY_INVOKED 4
559#define IEEE_PARAM_AUTH_ALGS 5
560#define IEEE_PARAM_IEEE_802_1X 6
561#define IEEE_PARAM_WPAX_SELECT 7
562#define IEEE_PROTO_WPA 1
563#define IEEE_PROTO_RSN 2
564#define IEEE_WPAX_USEGROUP 0
565#define IEEE_WPAX_WEP40 1
566#define IEEE_WPAX_TKIP 2
567#define IEEE_WPAX_WRAP 3
568#define IEEE_WPAX_CCMP 4
569#define IEEE_WPAX_WEP104 5
570
571#define IEEE_KEY_MGMT_IEEE8021X 1
572#define IEEE_KEY_MGMT_PSK 2
573
574#define IEEE_MLME_STA_DEAUTH 1
575#define IEEE_MLME_STA_DISASSOC 2
576
577
578#define IEEE_CRYPT_ERR_UNKNOWN_ALG 2
579#define IEEE_CRYPT_ERR_UNKNOWN_ADDR 3
580#define IEEE_CRYPT_ERR_CRYPT_INIT_FAILED 4
581#define IEEE_CRYPT_ERR_KEY_SET_FAILED 5
582#define IEEE_CRYPT_ERR_TX_KEY_SET_FAILED 6
583#define IEEE_CRYPT_ERR_CARD_CONF_FAILED 7
584#define IEEE_CRYPT_ALG_NAME_LEN 16
585
586#define MAX_IE_LEN 0xff
587#ifdef ENABLE_NULL_PT_DEBUG
588#define RT_ASSERT_RET(_Exp) \
589 if (!(_Exp)) \
590 { \
591 printk("Rtl819x: "); \
592 printk( "Assertion failed! %s,%s,line=%d\n", \
593 #_Exp,__func__,__LINE__); \
594 return; \
595 }
596#define RT_ASSERT_RET_VALUE(_Exp,Ret) \
597 if (!(_Exp)) \
598 { \
599 printk("Rtl819x: "); \
600 printk( "Assertion failed! %s,%s,line=%d\n", \
601 #_Exp,__func__,__LINE__); \
602 return (Ret); \
603 }
604#else
605#define RT_ASSERT_RET(_Exp) do {} while(0)
606#define RT_ASSERT_RET_VALUE(_Exp,Ret) do {} while(0)
607#endif
608
609typedef struct ieee_param {
610 u32 cmd;
611 u8 sta_addr[ETH_ALEN];
612 union {
613 struct {
614 u8 name;
615 u32 value;
616 } wpa_param;
617 struct {
618 u32 len;
619 u8 reserved[32];
620 u8 data[0];
621 } wpa_ie;
622 struct{
623 int command;
624 int reason_code;
625 } mlme;
626 struct {
627 u8 alg[IEEE_CRYPT_ALG_NAME_LEN];
628 u8 set_tx;
629 u32 err;
630 u8 idx;
631 u8 seq[8]; /* sequence counter (set: RX, get: TX) */
632 u16 key_len;
633 u8 key[0];
634 } crypt;
635 } u;
636}ieee_param;
637
638
639#if WIRELESS_EXT < 17
640#define IW_QUAL_QUAL_INVALID 0x10
641#define IW_QUAL_LEVEL_INVALID 0x20
642#define IW_QUAL_NOISE_INVALID 0x40
643#define IW_QUAL_QUAL_UPDATED 0x1
644#define IW_QUAL_LEVEL_UPDATED 0x2
645#define IW_QUAL_NOISE_UPDATED 0x4
646#endif
647
648#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9))
649#define MSECS(t) (HZ * ((t) / 1000) + (HZ * ((t) % 1000)) / 1000)
650static inline unsigned long msleep_interruptible_rsl(unsigned int msecs)
651{
652 unsigned long timeout = MSECS(msecs) + 1;
653
654 while (timeout) {
655 set_current_state(TASK_INTERRUPTIBLE);
656 timeout = schedule_timeout(timeout);
657 }
658 return timeout;
659}
660
661#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,31))
662static inline void msleep(unsigned int msecs)
663{
664 unsigned long timeout = MSECS(msecs) + 1;
665
666 while (timeout) {
667 set_current_state(TASK_UNINTERRUPTIBLE);
668 timeout = schedule_timeout(timeout);
669 }
670}
671#endif
672#else
673#define MSECS(t) msecs_to_jiffies(t)
674#define msleep_interruptible_rsl msleep_interruptible
675#endif
676
677#define RTLLIB_DATA_LEN 2304
678/* Maximum size for the MA-UNITDATA primitive, 802.11 standard section
679 6.2.1.1.2.
680
681 The figure in section 7.1.2 suggests a body size of up to 2312
682 bytes is allowed, which is a bit confusing, I suspect this
683 represents the 2304 bytes of real data, plus a possible 8 bytes of
684 WEP IV and ICV. (this interpretation suggested by Ramiro Barreiro) */
685#define RTLLIB_1ADDR_LEN 10
686#define RTLLIB_2ADDR_LEN 16
687#define RTLLIB_3ADDR_LEN 24
688#define RTLLIB_4ADDR_LEN 30
689#define RTLLIB_FCS_LEN 4
690#define RTLLIB_HLEN (RTLLIB_4ADDR_LEN)
691#define RTLLIB_FRAME_LEN (RTLLIB_DATA_LEN + RTLLIB_HLEN)
692#define RTLLIB_MGMT_HDR_LEN 24
693#define RTLLIB_DATA_HDR3_LEN 24
694#define RTLLIB_DATA_HDR4_LEN 30
695
696#define RTLLIB_SKBBUFFER_SIZE 2500
697
698#define MIN_FRAG_THRESHOLD 256U
699#define MAX_FRAG_THRESHOLD 2346U
700#define MAX_HT_DATA_FRAG_THRESHOLD 0x2000
701
702#define HT_AMSDU_SIZE_4K 3839
703#define HT_AMSDU_SIZE_8K 7935
704
705/* Frame control field constants */
706#define RTLLIB_FCTL_VERS 0x0003
707#define RTLLIB_FCTL_FTYPE 0x000c
708#define RTLLIB_FCTL_STYPE 0x00f0
709#define RTLLIB_FCTL_FRAMETYPE 0x00fc
710#define RTLLIB_FCTL_TODS 0x0100
711#define RTLLIB_FCTL_FROMDS 0x0200
712#define RTLLIB_FCTL_DSTODS 0x0300
713#define RTLLIB_FCTL_MOREFRAGS 0x0400
714#define RTLLIB_FCTL_RETRY 0x0800
715#define RTLLIB_FCTL_PM 0x1000
716#define RTLLIB_FCTL_MOREDATA 0x2000
717#define RTLLIB_FCTL_WEP 0x4000
718#define RTLLIB_FCTL_ORDER 0x8000
719
720#define RTLLIB_FTYPE_MGMT 0x0000
721#define RTLLIB_FTYPE_CTL 0x0004
722#define RTLLIB_FTYPE_DATA 0x0008
723
724/* management */
725#define RTLLIB_STYPE_ASSOC_REQ 0x0000
726#define RTLLIB_STYPE_ASSOC_RESP 0x0010
727#define RTLLIB_STYPE_REASSOC_REQ 0x0020
728#define RTLLIB_STYPE_REASSOC_RESP 0x0030
729#define RTLLIB_STYPE_PROBE_REQ 0x0040
730#define RTLLIB_STYPE_PROBE_RESP 0x0050
731#define RTLLIB_STYPE_BEACON 0x0080
732#define RTLLIB_STYPE_ATIM 0x0090
733#define RTLLIB_STYPE_DISASSOC 0x00A0
734#define RTLLIB_STYPE_AUTH 0x00B0
735#define RTLLIB_STYPE_DEAUTH 0x00C0
736#define RTLLIB_STYPE_MANAGE_ACT 0x00D0
737
738/* control */
739#define RTLLIB_STYPE_PSPOLL 0x00A0
740#define RTLLIB_STYPE_RTS 0x00B0
741#define RTLLIB_STYPE_CTS 0x00C0
742#define RTLLIB_STYPE_ACK 0x00D0
743#define RTLLIB_STYPE_CFEND 0x00E0
744#define RTLLIB_STYPE_CFENDACK 0x00F0
745#define RTLLIB_STYPE_BLOCKACK 0x0094
746
747/* data */
748#define RTLLIB_STYPE_DATA 0x0000
749#define RTLLIB_STYPE_DATA_CFACK 0x0010
750#define RTLLIB_STYPE_DATA_CFPOLL 0x0020
751#define RTLLIB_STYPE_DATA_CFACKPOLL 0x0030
752#define RTLLIB_STYPE_NULLFUNC 0x0040
753#define RTLLIB_STYPE_CFACK 0x0050
754#define RTLLIB_STYPE_CFPOLL 0x0060
755#define RTLLIB_STYPE_CFACKPOLL 0x0070
756#define RTLLIB_STYPE_QOS_DATA 0x0080
757#define RTLLIB_STYPE_QOS_NULL 0x00C0
758
759#define RTLLIB_SCTL_FRAG 0x000F
760#define RTLLIB_SCTL_SEQ 0xFFF0
761
762/* QOS control */
763#define RTLLIB_QCTL_TID 0x000F
764
765#define FC_QOS_BIT BIT7
766#define IsDataFrame(pdu) ( ((pdu[0] & 0x0C)==0x08) ? true : false )
767#define IsLegacyDataFrame(pdu) (IsDataFrame(pdu) && (!(pdu[0]&FC_QOS_BIT)) )
768#define IsQoSDataFrame(pframe) ((*(u16*)pframe&(RTLLIB_STYPE_QOS_DATA|RTLLIB_FTYPE_DATA)) == (RTLLIB_STYPE_QOS_DATA|RTLLIB_FTYPE_DATA))
769#define Frame_Order(pframe) (*(u16*)pframe&RTLLIB_FCTL_ORDER)
770#define SN_LESS(a, b) (((a-b)&0x800)!=0)
771#define SN_EQUAL(a, b) (a == b)
772#define MAX_DEV_ADDR_SIZE 8
773
774typedef enum _ACT_CATEGORY{
775 ACT_CAT_QOS = 1,
776 ACT_CAT_DLS = 2,
777 ACT_CAT_BA = 3,
778 ACT_CAT_HT = 7,
779 ACT_CAT_WMM = 17,
780} ACT_CATEGORY, *PACT_CATEGORY;
781
782typedef enum _TS_ACTION{
783 ACT_ADDTSREQ = 0,
784 ACT_ADDTSRSP = 1,
785 ACT_DELTS = 2,
786 ACT_SCHEDULE = 3,
787} TS_ACTION, *PTS_ACTION;
788
789typedef enum _BA_ACTION{
790 ACT_ADDBAREQ = 0,
791 ACT_ADDBARSP = 1,
792 ACT_DELBA = 2,
793} BA_ACTION, *PBA_ACTION;
794
795typedef enum _InitialGainOpType{
796 IG_Backup=0,
797 IG_Restore,
798 IG_Max
799}InitialGainOpType;
800typedef enum _LED_CTL_MODE{
801 LED_CTL_POWER_ON = 1,
802 LED_CTL_LINK = 2,
803 LED_CTL_NO_LINK = 3,
804 LED_CTL_TX = 4,
805 LED_CTL_RX = 5,
806 LED_CTL_SITE_SURVEY = 6,
807 LED_CTL_POWER_OFF = 7,
808 LED_CTL_START_TO_LINK = 8,
809 LED_CTL_START_WPS = 9,
810 LED_CTL_STOP_WPS = 10,
811 LED_CTL_START_WPS_BOTTON = 11,
812 LED_CTL_STOP_WPS_FAIL = 12,
813 LED_CTL_STOP_WPS_FAIL_OVERLAP = 13,
814}LED_CTL_MODE;
815
816typedef enum _RT_RF_TYPE_DEF
817{
818 RF_1T2R = 0,
819 RF_2T4R,
820 RF_2T2R,
821 RF_1T1R,
822 RF_2T2R_GREEN,
823 RF_819X_MAX_TYPE
824}RT_RF_TYPE_DEF;
825
826typedef enum _WIRELESS_MODE {
827 WIRELESS_MODE_UNKNOWN = 0x00,
828 WIRELESS_MODE_A = 0x01,
829 WIRELESS_MODE_B = 0x02,
830 WIRELESS_MODE_G = 0x04,
831 WIRELESS_MODE_AUTO = 0x08,
832 WIRELESS_MODE_N_24G = 0x10,
833 WIRELESS_MODE_N_5G = 0x20
834} WIRELESS_MODE;
835
836typedef enum _NETWORK_TYPE{
837 WIRELESS_11B = 1,
838 WIRELESS_11G = 2,
839 WIRELESS_11A = 4,
840 WIRELESS_11N = 8
841} WIRELESS_NETWORK_TYPE;
842
843#define OUI_SUBTYPE_WMM_INFO 0
844#define OUI_SUBTYPE_WMM_PARAM 1
845#define OUI_SUBTYPE_QOS_CAPABI 5
846
847/* debug macros */
848#define CONFIG_RTLLIB_DEBUG
849#ifdef CONFIG_RTLLIB_DEBUG
850extern u32 rtllib_debug_level;
851#define RTLLIB_DEBUG(level, fmt, args...) \
852do { if (rtllib_debug_level & (level)) \
853 printk(KERN_DEBUG "rtllib: " fmt, ## args); } while (0)
854#define RTLLIB_DEBUG_DATA(level, data, datalen) \
855 do{ if ((rtllib_debug_level & (level)) == (level)) \
856 { \
857 int i; \
858 u8* pdata = (u8*) data; \
859 printk(KERN_DEBUG "rtllib: %s()\n", __func__); \
860 for (i=0; i<(int)(datalen); i++) \
861 { \
862 printk("%2.2x ", pdata[i]); \
863 if ((i+1)%16 == 0) printk("\n"); \
864 } \
865 printk("\n"); \
866 } \
867 } while (0)
868#else
869#define RTLLIB_DEBUG(level, fmt, args...) do {} while (0)
870#define RTLLIB_DEBUG_DATA(level, data, datalen) do {} while(0)
871#endif /* CONFIG_RTLLIB_DEBUG */
872
873/* debug macros not dependent on CONFIG_RTLLIB_DEBUG */
874
875#define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x"
876#define MAC_ARG(x) ((u8*)(x))[0],((u8*)(x))[1],((u8*)(x))[2],((u8*)(x))[3],((u8*)(x))[4],((u8*)(x))[5]
877
878/*
879 * To use the debug system;
880 *
881 * If you are defining a new debug classification, simply add it to the #define
882 * list here in the form of:
883 *
884 * #define RTLLIB_DL_xxxx VALUE
885 *
886 * shifting value to the left one bit from the previous entry. xxxx should be
887 * the name of the classification (for example, WEP)
888 *
889 * You then need to either add a RTLLIB_xxxx_DEBUG() macro definition for your
890 * classification, or use RTLLIB_DEBUG(RTLLIB_DL_xxxx, ...) whenever you want
891 * to send output to that classification.
892 *
893 * To add your debug level to the list of levels seen when you perform
894 *
895 * % cat /proc/net/ipw/debug_level
896 *
897 * you simply need to add your entry to the ipw_debug_levels array.
898 *
899 * If you do not see debug_level in /proc/net/ipw then you do not have
900 * CONFIG_RTLLIB_DEBUG defined in your kernel configuration
901 *
902 */
903
904#define RTLLIB_DL_INFO (1<<0)
905#define RTLLIB_DL_WX (1<<1)
906#define RTLLIB_DL_SCAN (1<<2)
907#define RTLLIB_DL_STATE (1<<3)
908#define RTLLIB_DL_MGMT (1<<4)
909#define RTLLIB_DL_FRAG (1<<5)
910#define RTLLIB_DL_EAP (1<<6)
911#define RTLLIB_DL_DROP (1<<7)
912
913#define RTLLIB_DL_TX (1<<8)
914#define RTLLIB_DL_RX (1<<9)
915
916#define RTLLIB_DL_HT (1<<10)
917#define RTLLIB_DL_BA (1<<11)
918#define RTLLIB_DL_TS (1<<12)
919#define RTLLIB_DL_QOS (1<<13)
920#define RTLLIB_DL_REORDER (1<<14)
921#define RTLLIB_DL_IOT (1<<15)
922#define RTLLIB_DL_IPS (1<<16)
923#define RTLLIB_DL_TRACE (1<<29)
924#define RTLLIB_DL_DATA (1<<30)
925#define RTLLIB_DL_ERR (1<<31)
926#define RTLLIB_ERROR(f, a...) printk(KERN_ERR "rtllib: " f, ## a)
927#define RTLLIB_WARNING(f, a...) printk(KERN_WARNING "rtllib: " f, ## a)
928#define RTLLIB_DEBUG_INFO(f, a...) RTLLIB_DEBUG(RTLLIB_DL_INFO, f, ## a)
929
930#define RTLLIB_DEBUG_WX(f, a...) RTLLIB_DEBUG(RTLLIB_DL_WX, f, ## a)
931#define RTLLIB_DEBUG_SCAN(f, a...) RTLLIB_DEBUG(RTLLIB_DL_SCAN, f, ## a)
932#define RTLLIB_DEBUG_STATE(f, a...) RTLLIB_DEBUG(RTLLIB_DL_STATE, f, ## a)
933#define RTLLIB_DEBUG_MGMT(f, a...) RTLLIB_DEBUG(RTLLIB_DL_MGMT, f, ## a)
934#define RTLLIB_DEBUG_FRAG(f, a...) RTLLIB_DEBUG(RTLLIB_DL_FRAG, f, ## a)
935#define RTLLIB_DEBUG_EAP(f, a...) RTLLIB_DEBUG(RTLLIB_DL_EAP, f, ## a)
936#define RTLLIB_DEBUG_DROP(f, a...) RTLLIB_DEBUG(RTLLIB_DL_DROP, f, ## a)
937#define RTLLIB_DEBUG_TX(f, a...) RTLLIB_DEBUG(RTLLIB_DL_TX, f, ## a)
938#define RTLLIB_DEBUG_RX(f, a...) RTLLIB_DEBUG(RTLLIB_DL_RX, f, ## a)
939#define RTLLIB_DEBUG_QOS(f, a...) RTLLIB_DEBUG(RTLLIB_DL_QOS, f, ## a)
940
941#ifdef CONFIG_RTLLIB_DEBUG
942/* Added by Annie, 2005-11-22. */
943#define MAX_STR_LEN 64
944/* I want to see ASCII 33 to 126 only. Otherwise, I print '?'. Annie, 2005-11-22.*/
945#define PRINTABLE(_ch) (_ch>'!' && _ch<'~')
946#define RTLLIB_PRINT_STR(_Comp, _TitleString, _Ptr, _Len) \
947 if ((_Comp) & level) \
948 { \
949 int __i; \
950 u8 buffer[MAX_STR_LEN]; \
951 int length = (_Len<MAX_STR_LEN)? _Len : (MAX_STR_LEN-1) ; \
952 memset(buffer, 0, MAX_STR_LEN); \
953 memcpy(buffer, (u8 *)_Ptr, length ); \
954 for ( __i=0; __i<MAX_STR_LEN; __i++ ) \
955 { \
956 if ( !PRINTABLE(buffer[__i]) ) buffer[__i] = '?'; \
957 } \
958 buffer[length] = '\0'; \
959 printk("Rtl819x: "); \
960 printk(_TitleString); \
961 printk(": %d, <%s>\n", _Len, buffer); \
962 }
963#else
964#define RTLLIB_PRINT_STR(_Comp, _TitleString, _Ptr, _Len) do {} while (0)
965#endif
966
967#ifndef ETH_P_PAE
968#define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */
969#define ETH_P_IP 0x0800 /* Internet Protocol packet */
970#define ETH_P_ARP 0x0806 /* Address Resolution packet */
971#endif /* ETH_P_PAE */
972
973#define ETH_P_PREAUTH 0x88C7 /* IEEE 802.11i pre-authentication */
974
975#ifndef ETH_P_80211_RAW
976#define ETH_P_80211_RAW (ETH_P_ECONET + 1)
977#endif
978
979/* IEEE 802.11 defines */
980
981#define P80211_OUI_LEN 3
982
983struct rtllib_snap_hdr {
984
985 u8 dsap; /* always 0xAA */
986 u8 ssap; /* always 0xAA */
987 u8 ctrl; /* always 0x03 */
988 u8 oui[P80211_OUI_LEN]; /* organizational universal id */
989
990} __attribute__ ((packed));
991
992enum _REG_PREAMBLE_MODE{
993 PREAMBLE_LONG = 1,
994 PREAMBLE_AUTO = 2,
995 PREAMBLE_SHORT= 3,
996};
997
998#define SNAP_SIZE sizeof(struct rtllib_snap_hdr)
999
1000#define WLAN_FC_GET_VERS(fc) ((fc) & RTLLIB_FCTL_VERS)
1001#define WLAN_FC_GET_TYPE(fc) ((fc) & RTLLIB_FCTL_FTYPE)
1002#define WLAN_FC_GET_STYPE(fc) ((fc) & RTLLIB_FCTL_STYPE)
1003#define WLAN_FC_MORE_DATA(fc) ((fc) & RTLLIB_FCTL_MOREDATA)
1004
1005#define WLAN_FC_GET_FRAMETYPE(fc) ((fc) & RTLLIB_FCTL_FRAMETYPE)
1006#define WLAN_GET_SEQ_FRAG(seq) ((seq) & RTLLIB_SCTL_FRAG)
1007#define WLAN_GET_SEQ_SEQ(seq) (((seq) & RTLLIB_SCTL_SEQ) >> 4)
1008
1009#ifndef CONFIG_CFG_80211
1010/* Authentication algorithms */
1011#define WLAN_AUTH_OPEN 0
1012#define WLAN_AUTH_SHARED_KEY 1
1013#define WLAN_AUTH_LEAP 128
1014
1015#define WLAN_AUTH_CHALLENGE_LEN 128
1016
1017#define WLAN_CAPABILITY_ESS (1<<0)
1018#define WLAN_CAPABILITY_IBSS (1<<1)
1019#define WLAN_CAPABILITY_CF_POLLABLE (1<<2)
1020#define WLAN_CAPABILITY_CF_POLL_REQUEST (1<<3)
1021#define WLAN_CAPABILITY_PRIVACY (1<<4)
1022#define WLAN_CAPABILITY_SHORT_PREAMBLE (1<<5)
1023#define WLAN_CAPABILITY_PBCC (1<<6)
1024#define WLAN_CAPABILITY_CHANNEL_AGILITY (1<<7)
1025#define WLAN_CAPABILITY_SPECTRUM_MGMT (1<<8)
1026#define WLAN_CAPABILITY_QOS (1<<9)
1027#define WLAN_CAPABILITY_SHORT_SLOT_TIME (1<<10)
1028#define WLAN_CAPABILITY_DSSS_OFDM (1<<13)
1029
1030/* 802.11g ERP information element */
1031#define WLAN_ERP_NON_ERP_PRESENT (1<<0)
1032#define WLAN_ERP_USE_PROTECTION (1<<1)
1033#define WLAN_ERP_BARKER_PREAMBLE (1<<2)
1034
1035/* Status codes */
1036enum rtllib_statuscode {
1037 WLAN_STATUS_SUCCESS = 0,
1038 WLAN_STATUS_UNSPECIFIED_FAILURE = 1,
1039 WLAN_STATUS_CAPS_UNSUPPORTED = 10,
1040 WLAN_STATUS_REASSOC_NO_ASSOC = 11,
1041 WLAN_STATUS_ASSOC_DENIED_UNSPEC = 12,
1042 WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG = 13,
1043 WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION = 14,
1044 WLAN_STATUS_CHALLENGE_FAIL = 15,
1045 WLAN_STATUS_AUTH_TIMEOUT = 16,
1046 WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA = 17,
1047 WLAN_STATUS_ASSOC_DENIED_RATES = 18,
1048 /* 802.11b */
1049 WLAN_STATUS_ASSOC_DENIED_NOSHORTPREAMBLE = 19,
1050 WLAN_STATUS_ASSOC_DENIED_NOPBCC = 20,
1051 WLAN_STATUS_ASSOC_DENIED_NOAGILITY = 21,
1052 /* 802.11h */
1053 WLAN_STATUS_ASSOC_DENIED_NOSPECTRUM = 22,
1054 WLAN_STATUS_ASSOC_REJECTED_BAD_POWER = 23,
1055 WLAN_STATUS_ASSOC_REJECTED_BAD_SUPP_CHAN = 24,
1056 /* 802.11g */
1057 WLAN_STATUS_ASSOC_DENIED_NOSHORTTIME = 25,
1058 WLAN_STATUS_ASSOC_DENIED_NODSSSOFDM = 26,
1059 /* 802.11i */
1060 WLAN_STATUS_INVALID_IE = 40,
1061 WLAN_STATUS_INVALID_GROUP_CIPHER = 41,
1062 WLAN_STATUS_INVALID_PAIRWISE_CIPHER = 42,
1063 WLAN_STATUS_INVALID_AKMP = 43,
1064 WLAN_STATUS_UNSUPP_RSN_VERSION = 44,
1065 WLAN_STATUS_INVALID_RSN_IE_CAP = 45,
1066 WLAN_STATUS_CIPHER_SUITE_REJECTED = 46,
1067};
1068
1069/* Reason codes */
1070enum rtllib_reasoncode {
1071 WLAN_REASON_UNSPECIFIED = 1,
1072 WLAN_REASON_PREV_AUTH_NOT_VALID = 2,
1073 WLAN_REASON_DEAUTH_LEAVING = 3,
1074 WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY = 4,
1075 WLAN_REASON_DISASSOC_AP_BUSY = 5,
1076 WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA = 6,
1077 WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA = 7,
1078 WLAN_REASON_DISASSOC_STA_HAS_LEFT = 8,
1079 WLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH = 9,
1080 /* 802.11h */
1081 WLAN_REASON_DISASSOC_BAD_POWER = 10,
1082 WLAN_REASON_DISASSOC_BAD_SUPP_CHAN = 11,
1083 /* 802.11i */
1084 WLAN_REASON_INVALID_IE = 13,
1085 WLAN_REASON_MIC_FAILURE = 14,
1086 WLAN_REASON_4WAY_HANDSHAKE_TIMEOUT = 15,
1087 WLAN_REASON_GROUP_KEY_HANDSHAKE_TIMEOUT = 16,
1088 WLAN_REASON_IE_DIFFERENT = 17,
1089 WLAN_REASON_INVALID_GROUP_CIPHER = 18,
1090 WLAN_REASON_INVALID_PAIRWISE_CIPHER = 19,
1091 WLAN_REASON_INVALID_AKMP = 20,
1092 WLAN_REASON_UNSUPP_RSN_VERSION = 21,
1093 WLAN_REASON_INVALID_RSN_IE_CAP = 22,
1094 WLAN_REASON_IEEE8021X_FAILED = 23,
1095 WLAN_REASON_CIPHER_SUITE_REJECTED = 24,
1096};
1097#endif
1098
1099#define RTLLIB_STATMASK_SIGNAL (1<<0)
1100#define RTLLIB_STATMASK_RSSI (1<<1)
1101#define RTLLIB_STATMASK_NOISE (1<<2)
1102#define RTLLIB_STATMASK_RATE (1<<3)
1103#define RTLLIB_STATMASK_WEMASK 0x7
1104
1105#define RTLLIB_CCK_MODULATION (1<<0)
1106#define RTLLIB_OFDM_MODULATION (1<<1)
1107
1108#define RTLLIB_24GHZ_BAND (1<<0)
1109#define RTLLIB_52GHZ_BAND (1<<1)
1110
1111#define RTLLIB_CCK_RATE_LEN 4
1112#define RTLLIB_CCK_RATE_1MB 0x02
1113#define RTLLIB_CCK_RATE_2MB 0x04
1114#define RTLLIB_CCK_RATE_5MB 0x0B
1115#define RTLLIB_CCK_RATE_11MB 0x16
1116#define RTLLIB_OFDM_RATE_LEN 8
1117#define RTLLIB_OFDM_RATE_6MB 0x0C
1118#define RTLLIB_OFDM_RATE_9MB 0x12
1119#define RTLLIB_OFDM_RATE_12MB 0x18
1120#define RTLLIB_OFDM_RATE_18MB 0x24
1121#define RTLLIB_OFDM_RATE_24MB 0x30
1122#define RTLLIB_OFDM_RATE_36MB 0x48
1123#define RTLLIB_OFDM_RATE_48MB 0x60
1124#define RTLLIB_OFDM_RATE_54MB 0x6C
1125#define RTLLIB_BASIC_RATE_MASK 0x80
1126
1127#define RTLLIB_CCK_RATE_1MB_MASK (1<<0)
1128#define RTLLIB_CCK_RATE_2MB_MASK (1<<1)
1129#define RTLLIB_CCK_RATE_5MB_MASK (1<<2)
1130#define RTLLIB_CCK_RATE_11MB_MASK (1<<3)
1131#define RTLLIB_OFDM_RATE_6MB_MASK (1<<4)
1132#define RTLLIB_OFDM_RATE_9MB_MASK (1<<5)
1133#define RTLLIB_OFDM_RATE_12MB_MASK (1<<6)
1134#define RTLLIB_OFDM_RATE_18MB_MASK (1<<7)
1135#define RTLLIB_OFDM_RATE_24MB_MASK (1<<8)
1136#define RTLLIB_OFDM_RATE_36MB_MASK (1<<9)
1137#define RTLLIB_OFDM_RATE_48MB_MASK (1<<10)
1138#define RTLLIB_OFDM_RATE_54MB_MASK (1<<11)
1139
1140#define RTLLIB_CCK_RATES_MASK 0x0000000F
1141#define RTLLIB_CCK_BASIC_RATES_MASK (RTLLIB_CCK_RATE_1MB_MASK | \
1142 RTLLIB_CCK_RATE_2MB_MASK)
1143#define RTLLIB_CCK_DEFAULT_RATES_MASK (RTLLIB_CCK_BASIC_RATES_MASK | \
1144 RTLLIB_CCK_RATE_5MB_MASK | \
1145 RTLLIB_CCK_RATE_11MB_MASK)
1146
1147#define RTLLIB_OFDM_RATES_MASK 0x00000FF0
1148#define RTLLIB_OFDM_BASIC_RATES_MASK (RTLLIB_OFDM_RATE_6MB_MASK | \
1149 RTLLIB_OFDM_RATE_12MB_MASK | \
1150 RTLLIB_OFDM_RATE_24MB_MASK)
1151#define RTLLIB_OFDM_DEFAULT_RATES_MASK (RTLLIB_OFDM_BASIC_RATES_MASK | \
1152 RTLLIB_OFDM_RATE_9MB_MASK | \
1153 RTLLIB_OFDM_RATE_18MB_MASK | \
1154 RTLLIB_OFDM_RATE_36MB_MASK | \
1155 RTLLIB_OFDM_RATE_48MB_MASK | \
1156 RTLLIB_OFDM_RATE_54MB_MASK)
1157#define RTLLIB_DEFAULT_RATES_MASK (RTLLIB_OFDM_DEFAULT_RATES_MASK | \
1158 RTLLIB_CCK_DEFAULT_RATES_MASK)
1159
1160#define RTLLIB_NUM_OFDM_RATES 8
1161#define RTLLIB_NUM_CCK_RATES 4
1162#define RTLLIB_OFDM_SHIFT_MASK_A 4
1163
1164
1165/* this is stolen and modified from the madwifi driver*/
1166#define RTLLIB_FC0_TYPE_MASK 0x0c
1167#define RTLLIB_FC0_TYPE_DATA 0x08
1168#define RTLLIB_FC0_SUBTYPE_MASK 0xB0
1169#define RTLLIB_FC0_SUBTYPE_QOS 0x80
1170
1171#define RTLLIB_QOS_HAS_SEQ(fc) \
1172 (((fc) & (RTLLIB_FC0_TYPE_MASK | RTLLIB_FC0_SUBTYPE_MASK)) == \
1173 (RTLLIB_FC0_TYPE_DATA | RTLLIB_FC0_SUBTYPE_QOS))
1174
1175/* this is stolen from ipw2200 driver */
1176#define IEEE_IBSS_MAC_HASH_SIZE 31
1177struct ieee_ibss_seq {
1178 u8 mac[ETH_ALEN];
1179 u16 seq_num[17];
1180 u16 frag_num[17];
1181 unsigned long packet_time[17];
1182 struct list_head list;
1183};
1184
1185/* NOTE: This data is for statistical purposes; not all hardware provides this
1186 * information for frames received. Not setting these will not cause
1187 * any adverse affects. */
1188struct rtllib_rx_stats {
1189#if 1
1190 u32 mac_time[2];
1191 s8 rssi;
1192 u8 signal;
1193 u8 noise;
1194 u16 rate; /* in 100 kbps */
1195 u8 received_channel;
1196 u8 control;
1197 u8 mask;
1198 u8 freq;
1199 u16 len;
1200 u64 tsf;
1201 u32 beacon_time;
1202 u8 nic_type;
1203 u16 Length;
1204 u8 SignalQuality;
1205 s32 RecvSignalPower;
1206 s8 RxPower;
1207 u8 SignalStrength;
1208 u16 bHwError:1;
1209 u16 bCRC:1;
1210 u16 bICV:1;
1211 u16 bShortPreamble:1;
1212 u16 Antenna:1;
1213 u16 Decrypted:1;
1214 u16 Wakeup:1;
1215 u16 Reserved0:1;
1216 u8 AGC;
1217 u32 TimeStampLow;
1218 u32 TimeStampHigh;
1219 bool bShift;
1220 bool bIsQosData;
1221 u8 UserPriority;
1222
1223 u8 RxDrvInfoSize;
1224 u8 RxBufShift;
1225 bool bIsAMPDU;
1226 bool bFirstMPDU;
1227 bool bContainHTC;
1228 bool RxIs40MHzPacket;
1229 u32 RxPWDBAll;
1230 u8 RxMIMOSignalStrength[4];
1231 s8 RxMIMOSignalQuality[2];
1232 bool bPacketMatchBSSID;
1233 bool bIsCCK;
1234 bool bPacketToSelf;
1235 u8* virtual_address;
1236 u16 packetlength;
1237 u16 fraglength;
1238 u16 fragoffset;
1239 u16 ntotalfrag;
1240 bool bisrxaggrsubframe;
1241 bool bPacketBeacon;
1242 bool bToSelfBA;
1243 char cck_adc_pwdb[4];
1244 u16 Seq_Num;
1245 u8 nTotalAggPkt;
1246#ifdef TCP_CSUM_OFFLOAD_RX
1247 u8 tcp_csum_valid;
1248#endif
1249#endif
1250
1251};
1252
1253/* IEEE 802.11 requires that STA supports concurrent reception of at least
1254 * three fragmented frames. This define can be increased to support more
1255 * concurrent frames, but it should be noted that each entry can consume about
1256 * 2 kB of RAM and increasing cache size will slow down frame reassembly. */
1257#define RTLLIB_FRAG_CACHE_LEN 4
1258
1259struct rtllib_frag_entry {
1260 unsigned long first_frag_time;
1261 unsigned int seq;
1262 unsigned int last_frag;
1263 struct sk_buff *skb;
1264 u8 src_addr[ETH_ALEN];
1265 u8 dst_addr[ETH_ALEN];
1266};
1267
1268struct rtllib_stats {
1269 unsigned int tx_unicast_frames;
1270 unsigned int tx_multicast_frames;
1271 unsigned int tx_fragments;
1272 unsigned int tx_unicast_octets;
1273 unsigned int tx_multicast_octets;
1274 unsigned int tx_deferred_transmissions;
1275 unsigned int tx_single_retry_frames;
1276 unsigned int tx_multiple_retry_frames;
1277 unsigned int tx_retry_limit_exceeded;
1278 unsigned int tx_discards;
1279 unsigned int rx_unicast_frames;
1280 unsigned int rx_multicast_frames;
1281 unsigned int rx_fragments;
1282 unsigned int rx_unicast_octets;
1283 unsigned int rx_multicast_octets;
1284 unsigned int rx_fcs_errors;
1285 unsigned int rx_discards_no_buffer;
1286 unsigned int tx_discards_wrong_sa;
1287 unsigned int rx_discards_undecryptable;
1288 unsigned int rx_message_in_msg_fragments;
1289 unsigned int rx_message_in_bad_msg_fragments;
1290};
1291
1292struct rtllib_device;
1293
1294#include "rtllib_crypt.h"
1295
1296#define SEC_KEY_1 (1<<0)
1297#define SEC_KEY_2 (1<<1)
1298#define SEC_KEY_3 (1<<2)
1299#define SEC_KEY_4 (1<<3)
1300#define SEC_ACTIVE_KEY (1<<4)
1301#define SEC_AUTH_MODE (1<<5)
1302#define SEC_UNICAST_GROUP (1<<6)
1303#define SEC_LEVEL (1<<7)
1304#define SEC_ENABLED (1<<8)
1305#define SEC_ENCRYPT (1<<9)
1306
1307#define SEC_LEVEL_0 0 /* None */
1308#define SEC_LEVEL_1 1 /* WEP 40 and 104 bit */
1309#define SEC_LEVEL_2 2 /* Level 1 + TKIP */
1310#define SEC_LEVEL_2_CKIP 3 /* Level 1 + CKIP */
1311#define SEC_LEVEL_3 4 /* Level 2 + CCMP */
1312
1313#define SEC_ALG_NONE 0
1314#define SEC_ALG_WEP 1
1315#define SEC_ALG_TKIP 2
1316#define SEC_ALG_CCMP 4
1317
1318#define WEP_KEYS 4
1319#define WEP_KEY_LEN 13
1320#define SCM_KEY_LEN 32
1321#define SCM_TEMPORAL_KEY_LENGTH 16
1322
1323struct rtllib_security {
1324 u16 active_key:2,
1325 enabled:1,
1326 auth_mode:2,
1327 auth_algo:4,
1328 unicast_uses_group:1,
1329 encrypt:1;
1330 u8 key_sizes[WEP_KEYS];
1331 u8 keys[WEP_KEYS][SCM_KEY_LEN];
1332 u8 level;
1333 u16 flags;
1334} __attribute__ ((packed));
1335
1336
1337/*
1338 802.11 data frame from AP
1339 ,-------------------------------------------------------------------.
1340Bytes | 2 | 2 | 6 | 6 | 6 | 2 | 0..2312 | 4 |
1341 |------|------|---------|---------|---------|------|---------|------|
1342Desc. | ctrl | dura | DA/RA | TA | SA | Sequ | frame | fcs |
1343 | | tion | (BSSID) | | | ence | data | |
1344 `-------------------------------------------------------------------'
1345Total: 28-2340 bytes
1346*/
1347
1348/* Management Frame Information Element Types */
1349enum rtllib_mfie {
1350 MFIE_TYPE_SSID = 0,
1351 MFIE_TYPE_RATES = 1,
1352 MFIE_TYPE_FH_SET = 2,
1353 MFIE_TYPE_DS_SET = 3,
1354 MFIE_TYPE_CF_SET = 4,
1355 MFIE_TYPE_TIM = 5,
1356 MFIE_TYPE_IBSS_SET = 6,
1357 MFIE_TYPE_COUNTRY = 7,
1358 MFIE_TYPE_HOP_PARAMS = 8,
1359 MFIE_TYPE_HOP_TABLE = 9,
1360 MFIE_TYPE_REQUEST = 10,
1361 MFIE_TYPE_CHALLENGE = 16,
1362 MFIE_TYPE_POWER_CONSTRAINT = 32,
1363 MFIE_TYPE_POWER_CAPABILITY = 33,
1364 MFIE_TYPE_TPC_REQUEST = 34,
1365 MFIE_TYPE_TPC_REPORT = 35,
1366 MFIE_TYPE_SUPP_CHANNELS = 36,
1367 MFIE_TYPE_CSA = 37,
1368 MFIE_TYPE_MEASURE_REQUEST = 38,
1369 MFIE_TYPE_MEASURE_REPORT = 39,
1370 MFIE_TYPE_QUIET = 40,
1371 MFIE_TYPE_IBSS_DFS = 41,
1372 MFIE_TYPE_ERP = 42,
1373 MFIE_TYPE_HT_CAP= 45,
1374 MFIE_TYPE_RSN = 48,
1375 MFIE_TYPE_RATES_EX = 50,
1376 MFIE_TYPE_HT_INFO= 61,
1377 MFIE_TYPE_AIRONET=133,
1378 MFIE_TYPE_GENERIC = 221,
1379 MFIE_TYPE_QOS_PARAMETER = 222,
1380};
1381
1382/* Minimal header; can be used for passing 802.11 frames with sufficient
1383 * information to determine what type of underlying data type is actually
1384 * stored in the data. */
1385struct rtllib_pspoll_hdr {
1386 __le16 frame_ctl;
1387 __le16 aid;
1388 u8 bssid[ETH_ALEN];
1389 u8 ta[ETH_ALEN];
1390} __attribute__ ((packed));
1391
1392struct rtllib_hdr {
1393 __le16 frame_ctl;
1394 __le16 duration_id;
1395 u8 payload[0];
1396} __attribute__ ((packed));
1397
1398struct rtllib_hdr_1addr {
1399 __le16 frame_ctl;
1400 __le16 duration_id;
1401 u8 addr1[ETH_ALEN];
1402 u8 payload[0];
1403} __attribute__ ((packed));
1404
1405struct rtllib_hdr_2addr {
1406 __le16 frame_ctl;
1407 __le16 duration_id;
1408 u8 addr1[ETH_ALEN];
1409 u8 addr2[ETH_ALEN];
1410 u8 payload[0];
1411} __attribute__ ((packed));
1412
1413struct rtllib_hdr_3addr {
1414 __le16 frame_ctl;
1415 __le16 duration_id;
1416 u8 addr1[ETH_ALEN];
1417 u8 addr2[ETH_ALEN];
1418 u8 addr3[ETH_ALEN];
1419 __le16 seq_ctl;
1420 u8 payload[0];
1421} __attribute__ ((packed));
1422
1423struct rtllib_hdr_4addr {
1424 __le16 frame_ctl;
1425 __le16 duration_id;
1426 u8 addr1[ETH_ALEN];
1427 u8 addr2[ETH_ALEN];
1428 u8 addr3[ETH_ALEN];
1429 __le16 seq_ctl;
1430 u8 addr4[ETH_ALEN];
1431 u8 payload[0];
1432} __attribute__ ((packed));
1433
1434struct rtllib_hdr_3addrqos {
1435 __le16 frame_ctl;
1436 __le16 duration_id;
1437 u8 addr1[ETH_ALEN];
1438 u8 addr2[ETH_ALEN];
1439 u8 addr3[ETH_ALEN];
1440 __le16 seq_ctl;
1441 __le16 qos_ctl;
1442 u8 payload[0];
1443} __attribute__ ((packed));
1444
1445struct rtllib_hdr_4addrqos {
1446 __le16 frame_ctl;
1447 __le16 duration_id;
1448 u8 addr1[ETH_ALEN];
1449 u8 addr2[ETH_ALEN];
1450 u8 addr3[ETH_ALEN];
1451 __le16 seq_ctl;
1452 u8 addr4[ETH_ALEN];
1453 __le16 qos_ctl;
1454 u8 payload[0];
1455} __attribute__ ((packed));
1456
1457struct rtllib_info_element {
1458 u8 id;
1459 u8 len;
1460 u8 data[0];
1461} __attribute__ ((packed));
1462
1463struct rtllib_authentication {
1464 struct rtllib_hdr_3addr header;
1465 __le16 algorithm;
1466 __le16 transaction;
1467 __le16 status;
1468 /*challenge*/
1469 struct rtllib_info_element info_element[0];
1470} __attribute__ ((packed));
1471
1472struct rtllib_disauth {
1473 struct rtllib_hdr_3addr header;
1474 __le16 reason;
1475} __attribute__ ((packed));
1476
1477struct rtllib_disassoc {
1478 struct rtllib_hdr_3addr header;
1479 __le16 reason;
1480} __attribute__ ((packed));
1481
1482struct rtllib_probe_request {
1483 struct rtllib_hdr_3addr header;
1484 /* SSID, supported rates */
1485 struct rtllib_info_element info_element[0];
1486} __attribute__ ((packed));
1487
1488struct rtllib_probe_response {
1489 struct rtllib_hdr_3addr header;
1490 u32 time_stamp[2];
1491 __le16 beacon_interval;
1492 __le16 capability;
1493 /* SSID, supported rates, FH params, DS params,
1494 * CF params, IBSS params, TIM (if beacon), RSN */
1495 struct rtllib_info_element info_element[0];
1496} __attribute__ ((packed));
1497
1498/* Alias beacon for probe_response */
1499#define rtllib_beacon rtllib_probe_response
1500
1501struct rtllib_assoc_request_frame {
1502 struct rtllib_hdr_3addr header;
1503 __le16 capability;
1504 __le16 listen_interval;
1505 /* SSID, supported rates, RSN */
1506 struct rtllib_info_element info_element[0];
1507} __attribute__ ((packed));
1508
1509struct rtllib_reassoc_request_frame {
1510 struct rtllib_hdr_3addr header;
1511 __le16 capability;
1512 __le16 listen_interval;
1513 u8 current_ap[ETH_ALEN];
1514 /* SSID, supported rates, RSN */
1515 struct rtllib_info_element info_element[0];
1516} __attribute__ ((packed));
1517
1518struct rtllib_assoc_response_frame {
1519 struct rtllib_hdr_3addr header;
1520 __le16 capability;
1521 __le16 status;
1522 __le16 aid;
1523 struct rtllib_info_element info_element[0]; /* supported rates */
1524} __attribute__ ((packed));
1525
1526struct rtllib_txb {
1527 u8 nr_frags;
1528 u8 encrypted;
1529 u8 queue_index;
1530 u8 rts_included;
1531 u16 reserved;
1532 __le16 frag_size;
1533 __le16 payload_size;
1534 struct sk_buff *fragments[0];
1535};
1536
1537#define MAX_TX_AGG_COUNT 16
1538struct rtllib_drv_agg_txb {
1539 u8 nr_drv_agg_frames;
1540 struct sk_buff *tx_agg_frames[MAX_TX_AGG_COUNT];
1541}__attribute__((packed));
1542
1543#define MAX_SUBFRAME_COUNT 64
1544struct rtllib_rxb {
1545 u8 nr_subframes;
1546 struct sk_buff *subframes[MAX_SUBFRAME_COUNT];
1547 u8 dst[ETH_ALEN];
1548 u8 src[ETH_ALEN];
1549#ifdef TCP_CSUM_OFFLOAD_RX
1550 u8 tcp_csum_valid;
1551#endif
1552}__attribute__((packed));
1553
1554typedef union _frameqos {
1555 u16 shortdata;
1556 u8 chardata[2];
1557 struct {
1558 u16 tid:4;
1559 u16 eosp:1;
1560 u16 ack_policy:2;
1561 u16 reserved:1;
1562 u16 txop:8;
1563 }field;
1564}frameqos,*pframeqos;
1565
1566/* SWEEP TABLE ENTRIES NUMBER*/
1567#define MAX_SWEEP_TAB_ENTRIES 42
1568#define MAX_SWEEP_TAB_ENTRIES_PER_PACKET 7
1569/* MAX_RATES_LENGTH needs to be 12. The spec says 8, and many APs
1570 * only use 8, and then use extended rates for the remaining supported
1571 * rates. Other APs, however, stick all of their supported rates on the
1572 * main rates information element... */
1573#define MAX_RATES_LENGTH ((u8)12)
1574#define MAX_RATES_EX_LENGTH ((u8)16)
1575#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
1576#define MAX_NETWORK_COUNT 16
1577#else
1578#define MAX_NETWORK_COUNT 96
1579#endif
1580
1581#define MAX_CHANNEL_NUMBER 161
1582#define RTLLIB_SOFTMAC_SCAN_TIME 100
1583#define RTLLIB_SOFTMAC_ASSOC_RETRY_TIME (HZ * 2)
1584
1585#define CRC_LENGTH 4U
1586
1587#define MAX_WPA_IE_LEN 64
1588#define MAX_WZC_IE_LEN 256
1589
1590#define NETWORK_EMPTY_ESSID (1<<0)
1591#define NETWORK_HAS_OFDM (1<<1)
1592#define NETWORK_HAS_CCK (1<<2)
1593
1594/* QoS structure */
1595#define NETWORK_HAS_QOS_PARAMETERS (1<<3)
1596#define NETWORK_HAS_QOS_INFORMATION (1<<4)
1597#define NETWORK_HAS_QOS_MASK (NETWORK_HAS_QOS_PARAMETERS | \
1598 NETWORK_HAS_QOS_INFORMATION)
1599/* 802.11h */
1600#define NETWORK_HAS_POWER_CONSTRAINT (1<<5)
1601#define NETWORK_HAS_CSA (1<<6)
1602#define NETWORK_HAS_QUIET (1<<7)
1603#define NETWORK_HAS_IBSS_DFS (1<<8)
1604#define NETWORK_HAS_TPC_REPORT (1<<9)
1605
1606#define NETWORK_HAS_ERP_VALUE (1<<10)
1607
1608#define QOS_QUEUE_NUM 4
1609#define QOS_OUI_LEN 3
1610#define QOS_OUI_TYPE 2
1611#define QOS_ELEMENT_ID 221
1612#define QOS_OUI_INFO_SUB_TYPE 0
1613#define QOS_OUI_PARAM_SUB_TYPE 1
1614#define QOS_VERSION_1 1
1615#define QOS_AIFSN_MIN_VALUE 2
1616#if 1
1617struct rtllib_qos_information_element {
1618 u8 elementID;
1619 u8 length;
1620 u8 qui[QOS_OUI_LEN];
1621 u8 qui_type;
1622 u8 qui_subtype;
1623 u8 version;
1624 u8 ac_info;
1625} __attribute__ ((packed));
1626
1627struct rtllib_qos_ac_parameter {
1628 u8 aci_aifsn;
1629 u8 ecw_min_max;
1630 __le16 tx_op_limit;
1631} __attribute__ ((packed));
1632
1633struct rtllib_qos_parameter_info {
1634 struct rtllib_qos_information_element info_element;
1635 u8 reserved;
1636 struct rtllib_qos_ac_parameter ac_params_record[QOS_QUEUE_NUM];
1637} __attribute__ ((packed));
1638
1639struct rtllib_qos_parameters {
1640 __le16 cw_min[QOS_QUEUE_NUM];
1641 __le16 cw_max[QOS_QUEUE_NUM];
1642 u8 aifs[QOS_QUEUE_NUM];
1643 u8 flag[QOS_QUEUE_NUM];
1644 __le16 tx_op_limit[QOS_QUEUE_NUM];
1645} __attribute__ ((packed));
1646
1647struct rtllib_qos_data {
1648 struct rtllib_qos_parameters parameters;
1649 unsigned int wmm_acm;
1650 int active;
1651 int supported;
1652 u8 param_count;
1653 u8 old_param_count;
1654};
1655
1656struct rtllib_tim_parameters {
1657 u8 tim_count;
1658 u8 tim_period;
1659} __attribute__ ((packed));
1660
1661struct rtllib_wmm_ac_param {
1662 u8 ac_aci_acm_aifsn;
1663 u8 ac_ecwmin_ecwmax;
1664 u16 ac_txop_limit;
1665};
1666
1667struct rtllib_wmm_ts_info {
1668 u8 ac_dir_tid;
1669 u8 ac_up_psb;
1670 u8 reserved;
1671} __attribute__ ((packed));
1672
1673struct rtllib_wmm_tspec_elem {
1674 struct rtllib_wmm_ts_info ts_info;
1675 u16 norm_msdu_size;
1676 u16 max_msdu_size;
1677 u32 min_serv_inter;
1678 u32 max_serv_inter;
1679 u32 inact_inter;
1680 u32 suspen_inter;
1681 u32 serv_start_time;
1682 u32 min_data_rate;
1683 u32 mean_data_rate;
1684 u32 peak_data_rate;
1685 u32 max_burst_size;
1686 u32 delay_bound;
1687 u32 min_phy_rate;
1688 u16 surp_band_allow;
1689 u16 medium_time;
1690}__attribute__((packed));
1691#endif
1692enum eap_type {
1693 EAP_PACKET = 0,
1694 EAPOL_START,
1695 EAPOL_LOGOFF,
1696 EAPOL_KEY,
1697 EAPOL_ENCAP_ASF_ALERT
1698};
1699
1700static const char *eap_types[] = {
1701 [EAP_PACKET] = "EAP-Packet",
1702 [EAPOL_START] = "EAPOL-Start",
1703 [EAPOL_LOGOFF] = "EAPOL-Logoff",
1704 [EAPOL_KEY] = "EAPOL-Key",
1705 [EAPOL_ENCAP_ASF_ALERT] = "EAPOL-Encap-ASF-Alert"
1706};
1707
1708static inline const char *eap_get_type(int type)
1709{
1710 return ((u32)type >= ARRAY_SIZE(eap_types)) ? "Unknown" : eap_types[type];
1711}
1712static inline u8 Frame_QoSTID(u8* buf)
1713{
1714 struct rtllib_hdr_3addr *hdr;
1715 u16 fc;
1716 hdr = (struct rtllib_hdr_3addr *)buf;
1717 fc = le16_to_cpu(hdr->frame_ctl);
1718 return (u8)((frameqos*)(buf + (((fc & RTLLIB_FCTL_TODS)&&(fc & RTLLIB_FCTL_FROMDS))? 30 : 24)))->field.tid;
1719}
1720
1721
1722struct eapol {
1723 u8 snap[6];
1724 u16 ethertype;
1725 u8 version;
1726 u8 type;
1727 u16 length;
1728} __attribute__ ((packed));
1729
1730struct rtllib_softmac_stats{
1731 unsigned int rx_ass_ok;
1732 unsigned int rx_ass_err;
1733 unsigned int rx_probe_rq;
1734 unsigned int tx_probe_rs;
1735 unsigned int tx_beacons;
1736 unsigned int rx_auth_rq;
1737 unsigned int rx_auth_rs_ok;
1738 unsigned int rx_auth_rs_err;
1739 unsigned int tx_auth_rq;
1740 unsigned int no_auth_rs;
1741 unsigned int no_ass_rs;
1742 unsigned int tx_ass_rq;
1743 unsigned int rx_ass_rq;
1744 unsigned int tx_probe_rq;
1745 unsigned int reassoc;
1746 unsigned int swtxstop;
1747 unsigned int swtxawake;
1748 unsigned char CurrentShowTxate;
1749 unsigned char last_packet_rate;
1750 unsigned int txretrycount;
1751};
1752
1753#define BEACON_PROBE_SSID_ID_POSITION 12
1754
1755struct rtllib_info_element_hdr {
1756 u8 id;
1757 u8 len;
1758} __attribute__ ((packed));
1759
1760/*
1761 * These are the data types that can make up management packets
1762 *
1763 u16 auth_algorithm;
1764 u16 auth_sequence;
1765 u16 beacon_interval;
1766 u16 capability;
1767 u8 current_ap[ETH_ALEN];
1768 u16 listen_interval;
1769 struct {
1770 u16 association_id:14, reserved:2;
1771 } __attribute__ ((packed));
1772 u32 time_stamp[2];
1773 u16 reason;
1774 u16 status;
1775*/
1776
1777#define RTLLIB_DEFAULT_TX_ESSID "Penguin"
1778#define RTLLIB_DEFAULT_BASIC_RATE 2
1779
1780enum {WMM_all_frame, WMM_two_frame, WMM_four_frame, WMM_six_frame};
1781#define MAX_SP_Len (WMM_all_frame << 4)
1782#define RTLLIB_QOS_TID 0x0f
1783#define QOS_CTL_NOTCONTAIN_ACK (0x01 << 5)
1784
1785#define RTLLIB_DTIM_MBCAST 4
1786#define RTLLIB_DTIM_UCAST 2
1787#define RTLLIB_DTIM_VALID 1
1788#define RTLLIB_DTIM_INVALID 0
1789
1790#define RTLLIB_PS_DISABLED 0
1791#define RTLLIB_PS_UNICAST RTLLIB_DTIM_UCAST
1792#define RTLLIB_PS_MBCAST RTLLIB_DTIM_MBCAST
1793
1794#ifdef WMM_Hang_8187
1795#undef WMM_Hang_8187
1796#endif
1797
1798#define WME_AC_BK 0x00
1799#define WME_AC_BE 0x01
1800#define WME_AC_VI 0x02
1801#define WME_AC_VO 0x03
1802#define WME_ACI_MASK 0x03
1803#define WME_AIFSN_MASK 0x03
1804#define WME_AC_PRAM_LEN 16
1805
1806#define MAX_RECEIVE_BUFFER_SIZE 9100
1807
1808#if 1
1809#define UP2AC(up) ( \
1810 ((up) < 1) ? WME_AC_BE : \
1811 ((up) < 3) ? WME_AC_BK : \
1812 ((up) < 4) ? WME_AC_BE : \
1813 ((up) < 6) ? WME_AC_VI : \
1814 WME_AC_VO)
1815#endif
1816#define AC2UP(_ac) ( \
1817 ((_ac) == WME_AC_VO) ? 6 : \
1818 ((_ac) == WME_AC_VI) ? 5 : \
1819 ((_ac) == WME_AC_BK) ? 1 : \
1820 0)
1821
1822#define ETHER_ADDR_LEN 6 /* length of an Ethernet address */
1823#define ETHERNET_HEADER_SIZE 14 /* length of two Ethernet address plus ether type*/
1824
1825struct ether_header {
1826 u8 ether_dhost[ETHER_ADDR_LEN];
1827 u8 ether_shost[ETHER_ADDR_LEN];
1828 u16 ether_type;
1829} __attribute__((packed));
1830
1831#ifndef ETHERTYPE_PAE
1832#define ETHERTYPE_PAE 0x888e /* EAPOL PAE/802.1x */
1833#endif
1834#ifndef ETHERTYPE_IP
1835#define ETHERTYPE_IP 0x0800 /* IP protocol */
1836#endif
1837
1838
1839typedef enum _erp_t{
1840 ERP_NonERPpresent = 0x01,
1841 ERP_UseProtection = 0x02,
1842 ERP_BarkerPreambleMode = 0x04,
1843} erp_t;
1844
1845struct rtllib_network {
1846 /* These entries are used to identify a unique network */
1847 u8 bssid[ETH_ALEN];
1848 u8 channel;
1849 /* Ensure null-terminated for any debug msgs */
1850 u8 ssid[IW_ESSID_MAX_SIZE + 1];
1851 u8 ssid_len;
1852 u8 hidden_ssid[IW_ESSID_MAX_SIZE + 1];
1853 u8 hidden_ssid_len;
1854 struct rtllib_qos_data qos_data;
1855
1856 bool bWithAironetIE;
1857 bool bCkipSupported;
1858 bool bCcxRmEnable;
1859 u16 CcxRmState[2];
1860 bool bMBssidValid;
1861 u8 MBssidMask;
1862 u8 MBssid[6];
1863 bool bWithCcxVerNum;
1864 u8 BssCcxVerNumber;
1865 /* These are network statistics */
1866 struct rtllib_rx_stats stats;
1867 u16 capability;
1868 u8 rates[MAX_RATES_LENGTH];
1869 u8 rates_len;
1870 u8 rates_ex[MAX_RATES_EX_LENGTH];
1871 u8 rates_ex_len;
1872 unsigned long last_scanned;
1873 u8 mode;
1874 u32 flags;
1875 u32 last_associate;
1876 u32 time_stamp[2];
1877 u16 beacon_interval;
1878 u16 listen_interval;
1879 u16 atim_window;
1880 u8 erp_value;
1881 u8 wpa_ie[MAX_WPA_IE_LEN];
1882 size_t wpa_ie_len;
1883 u8 rsn_ie[MAX_WPA_IE_LEN];
1884 size_t rsn_ie_len;
1885 u8 wzc_ie[MAX_WZC_IE_LEN];
1886 size_t wzc_ie_len;
1887
1888 struct rtllib_tim_parameters tim;
1889 u8 dtim_period;
1890 u8 dtim_data;
1891 u32 last_dtim_sta_time[2];
1892
1893 u8 wmm_info;
1894 struct rtllib_wmm_ac_param wmm_param[4];
1895 u8 Turbo_Enable;
1896#ifdef ENABLE_DOT11D
1897 u16 CountryIeLen;
1898 u8 CountryIeBuf[MAX_IE_LEN];
1899#endif
1900 BSS_HT bssht;
1901 bool broadcom_cap_exist;
1902 bool realtek_cap_exit;
1903 bool marvell_cap_exist;
1904 bool ralink_cap_exist;
1905 bool atheros_cap_exist;
1906 bool cisco_cap_exist;
1907 bool airgo_cap_exist;
1908 bool unknown_cap_exist;
1909 bool berp_info_valid;
1910 bool buseprotection;
1911 bool bIsNetgear854T;
1912 u8 SignalStrength;
1913 u8 RSSI;
1914 struct list_head list;
1915};
1916
1917#if 1
1918enum rtllib_state {
1919
1920 /* the card is not linked at all */
1921 RTLLIB_NOLINK = 0,
1922
1923 /* RTLLIB_ASSOCIATING* are for BSS client mode
1924 * the driver shall not perform RX filtering unless
1925 * the state is LINKED.
1926 * The driver shall just check for the state LINKED and
1927 * defaults to NOLINK for ALL the other states (including
1928 * LINKED_SCANNING)
1929 */
1930
1931 /* the association procedure will start (wq scheduling)*/
1932 RTLLIB_ASSOCIATING,
1933 RTLLIB_ASSOCIATING_RETRY,
1934
1935 /* the association procedure is sending AUTH request*/
1936 RTLLIB_ASSOCIATING_AUTHENTICATING,
1937
1938 /* the association procedure has successfully authentcated
1939 * and is sending association request
1940 */
1941 RTLLIB_ASSOCIATING_AUTHENTICATED,
1942
1943 /* the link is ok. the card associated to a BSS or linked
1944 * to a ibss cell or acting as an AP and creating the bss
1945 */
1946 RTLLIB_LINKED,
1947
1948 /* same as LINKED, but the driver shall apply RX filter
1949 * rules as we are in NO_LINK mode. As the card is still
1950 * logically linked, but it is doing a syncro site survey
1951 * then it will be back to LINKED state.
1952 */
1953 RTLLIB_LINKED_SCANNING,
1954};
1955#else
1956enum rtllib_state {
1957 RTLLIB_UNINITIALIZED = 0,
1958 RTLLIB_INITIALIZED,
1959 RTLLIB_ASSOCIATING,
1960 RTLLIB_ASSOCIATED,
1961 RTLLIB_AUTHENTICATING,
1962 RTLLIB_AUTHENTICATED,
1963 RTLLIB_SHUTDOWN
1964};
1965#endif
1966
1967#define DEFAULT_MAX_SCAN_AGE (15 * HZ)
1968#define DEFAULT_FTS 2346
1969
1970#define CFG_RTLLIB_RESERVE_FCS (1<<0)
1971#define CFG_RTLLIB_COMPUTE_FCS (1<<1)
1972#define CFG_RTLLIB_RTS (1<<2)
1973
1974#define RTLLIB_24GHZ_MIN_CHANNEL 1
1975#define RTLLIB_24GHZ_MAX_CHANNEL 14
1976#define RTLLIB_24GHZ_CHANNELS (RTLLIB_24GHZ_MAX_CHANNEL - \
1977 RTLLIB_24GHZ_MIN_CHANNEL + 1)
1978
1979#define RTLLIB_52GHZ_MIN_CHANNEL 34
1980#define RTLLIB_52GHZ_MAX_CHANNEL 165
1981#define RTLLIB_52GHZ_CHANNELS (RTLLIB_52GHZ_MAX_CHANNEL - \
1982 RTLLIB_52GHZ_MIN_CHANNEL + 1)
1983
1984#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,11))
1985extern inline int is_multicast_ether_addr(const u8 *addr)
1986{
1987 return ((addr[0] != 0xff) && (0x01 & addr[0]));
1988}
1989#endif
1990
1991#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,13))
1992extern inline int is_broadcast_ether_addr(const u8 *addr)
1993{
1994 return ((addr[0] == 0xff) && (addr[1] == 0xff) && (addr[2] == 0xff) && \
1995 (addr[3] == 0xff) && (addr[4] == 0xff) && (addr[5] == 0xff));
1996}
1997#endif
1998#ifndef eqMacAddr
1999#define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
2000#endif
2001typedef struct tx_pending_t{
2002 int frag;
2003 struct rtllib_txb *txb;
2004}tx_pending_t;
2005
2006typedef struct _bandwidth_autoswitch
2007{
2008 long threshold_20Mhzto40Mhz;
2009 long threshold_40Mhzto20Mhz;
2010 bool bforced_tx20Mhz;
2011 bool bautoswitch_enable;
2012}bandwidth_autoswitch,*pbandwidth_autoswitch;
2013
2014
2015
2016#define REORDER_WIN_SIZE 128
2017#define REORDER_ENTRY_NUM 128
2018typedef struct _RX_REORDER_ENTRY
2019{
2020 struct list_head List;
2021 u16 SeqNum;
2022 struct rtllib_rxb* prxb;
2023} RX_REORDER_ENTRY, *PRX_REORDER_ENTRY;
2024typedef enum _Fsync_State{
2025 Default_Fsync,
2026 HW_Fsync,
2027 SW_Fsync
2028}Fsync_State;
2029
2030typedef enum _RT_PS_MODE
2031{
2032 eActive,
2033 eMaxPs,
2034 eFastPs,
2035 eAutoPs,
2036}RT_PS_MODE;
2037
2038typedef enum _IPS_CALLBACK_FUNCION
2039{
2040 IPS_CALLBACK_NONE = 0,
2041 IPS_CALLBACK_MGNT_LINK_REQUEST = 1,
2042 IPS_CALLBACK_JOIN_REQUEST = 2,
2043}IPS_CALLBACK_FUNCION;
2044
2045typedef enum _RT_JOIN_ACTION{
2046 RT_JOIN_INFRA = 1,
2047 RT_JOIN_IBSS = 2,
2048 RT_START_IBSS = 3,
2049 RT_NO_ACTION = 4,
2050}RT_JOIN_ACTION;
2051
2052typedef struct _IbssParms{
2053 u16 atimWin;
2054}IbssParms, *PIbssParms;
2055#define MAX_NUM_RATES 264
2056
2057typedef enum _RT_RF_POWER_STATE
2058{
2059 eRfOn,
2060 eRfSleep,
2061 eRfOff
2062}RT_RF_POWER_STATE;
2063
2064#define MAX_SUPPORT_WOL_PATTERN_NUM 8
2065
2066#define MAX_WOL_BIT_MASK_SIZE 16
2067#define MAX_WOL_PATTERN_SIZE 128
2068
2069typedef enum _WOLPATTERN_TYPE
2070{
2071 eNetBIOS = 0,
2072 eIPv4IPv6ARP,
2073 eIPv4IPv6TCPSYN,
2074 eMACIDOnly,
2075 eNoDefined,
2076}WOLPATTERN_TYPE;
2077
2078typedef struct _RT_PM_WOL_PATTERN_INFO
2079{
2080 u32 PatternId;
2081 u32 Mask[4];
2082 u16 CrcRemainder;
2083 u8 WFMIndex;
2084 WOLPATTERN_TYPE PatternType;
2085}RT_PM_WOL_PATTERN_INFO, *PRT_PM_WOL_PATTERN_INFO;
2086
2087typedef struct _RT_POWER_SAVE_CONTROL
2088{
2089
2090 bool bInactivePs;
2091 bool bIPSModeBackup;
2092 bool bHaltAdapterClkRQ;
2093 bool bSwRfProcessing;
2094 RT_RF_POWER_STATE eInactivePowerState;
2095 work_struct_rsl InactivePsWorkItem;
2096 struct timer_list InactivePsTimer;
2097
2098 IPS_CALLBACK_FUNCION ReturnPoint;
2099
2100 bool bTmpBssDesc;
2101 RT_JOIN_ACTION tmpJoinAction;
2102 struct rtllib_network tmpBssDesc;
2103
2104 bool bTmpScanOnly;
2105 bool bTmpActiveScan;
2106 bool bTmpFilterHiddenAP;
2107 bool bTmpUpdateParms;
2108 u8 tmpSsidBuf[33];
2109 OCTET_STRING tmpSsid2Scan;
2110 bool bTmpSsid2Scan;
2111 u8 tmpNetworkType;
2112 u8 tmpChannelNumber;
2113 u16 tmpBcnPeriod;
2114 u8 tmpDtimPeriod;
2115 u16 tmpmCap;
2116 OCTET_STRING tmpSuppRateSet;
2117 u8 tmpSuppRateBuf[MAX_NUM_RATES];
2118 bool bTmpSuppRate;
2119 IbssParms tmpIbpm;
2120 bool bTmpIbpm;
2121
2122 bool bLeisurePs;
2123 u32 PowerProfile;
2124 u8 LpsIdleCount;
2125 u8 RegMaxLPSAwakeIntvl;
2126 u8 LPSAwakeIntvl;
2127
2128 u32 CurPsLevel;
2129 u32 RegRfPsLevel;
2130
2131 bool bFwCtrlLPS;
2132 u8 FWCtrlPSMode;
2133
2134 bool LinkReqInIPSRFOffPgs;
2135 bool BufConnectinfoBefore;
2136
2137
2138 bool bGpioRfSw;
2139
2140 u8 RegAMDPciASPM;
2141
2142 u8 oWLANMode;
2143 RT_PM_WOL_PATTERN_INFO PmWoLPatternInfo[MAX_SUPPORT_WOL_PATTERN_NUM];
2144
2145}RT_POWER_SAVE_CONTROL,*PRT_POWER_SAVE_CONTROL;
2146
2147typedef u32 RT_RF_CHANGE_SOURCE;
2148#define RF_CHANGE_BY_SW BIT31
2149#define RF_CHANGE_BY_HW BIT30
2150#define RF_CHANGE_BY_PS BIT29
2151#define RF_CHANGE_BY_IPS BIT28
2152#define RF_CHANGE_BY_INIT 0
2153
2154typedef enum
2155{
2156 COUNTRY_CODE_FCC = 0,
2157 COUNTRY_CODE_IC = 1,
2158 COUNTRY_CODE_ETSI = 2,
2159 COUNTRY_CODE_SPAIN = 3,
2160 COUNTRY_CODE_FRANCE = 4,
2161 COUNTRY_CODE_MKK = 5,
2162 COUNTRY_CODE_MKK1 = 6,
2163 COUNTRY_CODE_ISRAEL = 7,
2164 COUNTRY_CODE_TELEC = 8,
2165 COUNTRY_CODE_MIC = 9,
2166 COUNTRY_CODE_GLOBAL_DOMAIN = 10,
2167 COUNTRY_CODE_WORLD_WIDE_13 = 11,
2168 COUNTRY_CODE_TELEC_NETGEAR = 12,
2169 COUNTRY_CODE_MAX
2170}country_code_type_t;
2171
2172typedef enum _SCAN_OPERATION_BACKUP_OPT{
2173 SCAN_OPT_BACKUP=0,
2174 SCAN_OPT_RESTORE,
2175 SCAN_OPT_MAX
2176}SCAN_OPERATION_BACKUP_OPT;
2177
2178typedef enum _FW_CMD_IO_TYPE{
2179 FW_CMD_DIG_ENABLE = 0,
2180 FW_CMD_DIG_DISABLE = 1,
2181 FW_CMD_DIG_HALT = 2,
2182 FW_CMD_DIG_RESUME = 3,
2183 FW_CMD_HIGH_PWR_ENABLE = 4,
2184 FW_CMD_HIGH_PWR_DISABLE = 5,
2185 FW_CMD_RA_RESET = 6,
2186 FW_CMD_RA_ACTIVE= 7,
2187 FW_CMD_RA_REFRESH_N= 8,
2188 FW_CMD_RA_REFRESH_BG= 9,
2189 FW_CMD_RA_INIT= 10,
2190 FW_CMD_IQK_ENABLE = 11,
2191 FW_CMD_TXPWR_TRACK_ENABLE = 12,
2192 FW_CMD_TXPWR_TRACK_DISABLE = 13,
2193 FW_CMD_TXPWR_TRACK_THERMAL = 14,
2194 FW_CMD_PAUSE_DM_BY_SCAN = 15,
2195 FW_CMD_RESUME_DM_BY_SCAN = 16,
2196 FW_CMD_RA_REFRESH_N_COMB = 17,
2197 FW_CMD_RA_REFRESH_BG_COMB = 18,
2198 FW_CMD_ANTENNA_SW_ENABLE = 19,
2199 FW_CMD_ANTENNA_SW_DISABLE = 20,
2200 FW_CMD_TX_FEEDBACK_CCX_ENABLE = 21,
2201 FW_CMD_LPS_ENTER = 22,
2202 FW_CMD_LPS_LEAVE = 23,
2203 FW_CMD_DIG_MODE_SS = 24,
2204 FW_CMD_DIG_MODE_FA = 25,
2205 FW_CMD_ADD_A2_ENTRY = 26,
2206 FW_CMD_CTRL_DM_BY_DRIVER = 27,
2207 FW_CMD_CTRL_DM_BY_DRIVER_NEW = 28,
2208 FW_CMD_PAPE_CONTROL = 29,
2209 FW_CMD_CHAN_SET = 30,
2210}FW_CMD_IO_TYPE,*PFW_CMD_IO_TYPE;
2211
2212#define RT_MAX_LD_SLOT_NUM 10
2213typedef struct _RT_LINK_DETECT_T{
2214
2215 u32 NumRecvBcnInPeriod;
2216 u32 NumRecvDataInPeriod;
2217
2218 u32 RxBcnNum[RT_MAX_LD_SLOT_NUM];
2219 u32 RxDataNum[RT_MAX_LD_SLOT_NUM];
2220 u16 SlotNum;
2221 u16 SlotIndex;
2222
2223 u32 NumTxOkInPeriod;
2224 u32 NumRxOkInPeriod;
2225 u32 NumRxUnicastOkInPeriod;
2226 bool bBusyTraffic;
2227 bool bHigherBusyTraffic;
2228 bool bHigherBusyRxTraffic;
2229 u8 IdleCount;
2230 u32 NumTxUnicastOkInPeriod;
2231 u32 LastNumTxUnicast;
2232 u32 LastNumRxUnicast;
2233}RT_LINK_DETECT_T, *PRT_LINK_DETECT_T;
2234
2235typedef struct _SW_CAM_TABLE{
2236
2237 u8 macaddr[6];
2238 bool bused;
2239 u8 key_buf[16];
2240 u16 key_type;
2241 u8 useDK;
2242 u8 key_index;
2243
2244}SW_CAM_TABLE,*PSW_CAM_TABLE;
2245#define TOTAL_CAM_ENTRY 32
2246typedef struct _rate_adaptive
2247{
2248 u8 rate_adaptive_disabled;
2249 u8 ratr_state;
2250 u16 reserve;
2251
2252 u32 high_rssi_thresh_for_ra;
2253 u32 high2low_rssi_thresh_for_ra;
2254 u8 low2high_rssi_thresh_for_ra40M;
2255 u32 low_rssi_thresh_for_ra40M;
2256 u8 low2high_rssi_thresh_for_ra20M;
2257 u32 low_rssi_thresh_for_ra20M;
2258 u32 upper_rssi_threshold_ratr;
2259 u32 middle_rssi_threshold_ratr;
2260 u32 low_rssi_threshold_ratr;
2261 u32 low_rssi_threshold_ratr_40M;
2262 u32 low_rssi_threshold_ratr_20M;
2263 u8 ping_rssi_enable;
2264 u32 ping_rssi_ratr;
2265 u32 ping_rssi_thresh_for_ra;
2266 u32 last_ratr;
2267 u8 PreRATRState;
2268
2269} rate_adaptive, *prate_adaptive;
2270typedef enum _RATR_TABLE_MODE_8192S{
2271 RATR_INX_WIRELESS_NGB = 0,
2272 RATR_INX_WIRELESS_NG = 1,
2273 RATR_INX_WIRELESS_NB = 2,
2274 RATR_INX_WIRELESS_N = 3,
2275 RATR_INX_WIRELESS_GB = 4,
2276 RATR_INX_WIRELESS_G = 5,
2277 RATR_INX_WIRELESS_B = 6,
2278 RATR_INX_WIRELESS_MC = 7,
2279 RATR_INX_WIRELESS_A = 8,
2280}RATR_TABLE_MODE_8192S, *PRATR_TABLE_MODE_8192S;
2281
2282#define NUM_PMKID_CACHE 16
2283typedef struct _RT_PMKID_LIST
2284{
2285 u8 bUsed;
2286 u8 Bssid[6];
2287 u8 PMKID[16];
2288 u8 SsidBuf[33];
2289 u8* ssid_octet;
2290 u16 ssid_length;
2291} RT_PMKID_LIST, *PRT_PMKID_LIST;
2292
2293#ifdef CONFIG_CFG_80211
2294enum {
2295 LIBIPW_CH_PASSIVE_ONLY = (1 << 0),
2296 LIBIPW_CH_80211H_RULES = (1 << 1),
2297 LIBIPW_CH_B_ONLY = (1 << 2),
2298 LIBIPW_CH_NO_IBSS = (1 << 3),
2299 LIBIPW_CH_UNIFORM_SPREADING = (1 << 4),
2300 LIBIPW_CH_RADAR_DETECT = (1 << 5),
2301 LIBIPW_CH_INVALID = (1 << 6),
2302};
2303struct rtllib_channel {
2304 u32 freq;
2305 u8 channel;
2306 u8 flags;
2307 u8 max_power;
2308};
2309
2310#define RTLLIB_24GHZ_MIN_CHANNEL 1
2311#define RTLLIB_24GHZ_MAX_CHANNEL 14
2312#define RTLLIB_24GHZ_CHANNELS (RTLLIB_24GHZ_MAX_CHANNEL - \
2313 RTLLIB_24GHZ_MIN_CHANNEL + 1)
2314
2315struct reg_dmn_pair_mapping {
2316 u16 regDmnEnum;
2317 u16 reg_5ghz_ctl;
2318 u16 reg_2ghz_ctl;
2319};
2320
2321struct rtl_regulatory {
2322 char alpha2[2];
2323 u16 country_code;
2324 u16 max_power_level;
2325 u32 tp_scale;
2326 u16 current_rd;
2327 u16 current_rd_ext;
2328 int16_t power_limit;
2329 struct reg_dmn_pair_mapping *regpair;
2330};
2331
2332struct ieee80211_bss {
2333 /* Yes, this is a hack */
2334 struct cfg80211_bss cbss;
2335
2336 /* don't want to look up all the time */
2337 size_t ssid_len;
2338 u8 ssid[IEEE80211_MAX_SSID_LEN];
2339
2340 u8 dtim_period;
2341
2342 bool wmm_used;
2343
2344 unsigned long last_probe_resp;
2345
2346#ifdef CONFIG_MAC80211_MESH
2347 u8 *mesh_id;
2348 size_t mesh_id_len;
2349 u8 *mesh_cfg;
2350#endif
2351
2352 #define IEEE80211_MAX_SUPP_RATES 32
2353 u8 supp_rates[IEEE80211_MAX_SUPP_RATES];
2354 size_t supp_rates_len;
2355
2356 /*
2357 * During assocation, we save an ERP value from a probe response so
2358 * that we can feed ERP info to the driver when handling the
2359 * association completes. these fields probably won't be up-to-date
2360 * otherwise, you probably don't want to use them.
2361 */
2362 bool has_erp_value;
2363 u8 erp_value;
2364};
2365
2366/* Parsed Information Elements */
2367struct ieee802_11_elems {
2368 u8 *ie_start;
2369 size_t total_len;
2370
2371 /* pointers to IEs */
2372 u8 *ssid;
2373 u8 *supp_rates;
2374 u8 *fh_params;
2375 u8 *ds_params;
2376 u8 *cf_params;
2377 struct ieee80211_tim_ie *tim;
2378 u8 *ibss_params;
2379 u8 *challenge;
2380 u8 *wpa;
2381 u8 *rsn;
2382 u8 *erp_info;
2383 u8 *ext_supp_rates;
2384 u8 *wmm_info;
2385 u8 *wmm_param;
2386 struct ieee80211_ht_cap *ht_cap_elem;
2387 struct ieee80211_ht_info *ht_info_elem;
2388 u8 *mesh_config;
2389 u8 *mesh_id;
2390 u8 *peer_link;
2391 u8 *preq;
2392 u8 *prep;
2393 u8 *perr;
2394 u8 *ch_switch_elem;
2395 u8 *country_elem;
2396 u8 *pwr_constr_elem;
2397 u8 *quiet_elem; /* first quite element */
2398 u8 *timeout_int;
2399
2400 /* length of them, respectively */
2401 u8 ssid_len;
2402 u8 supp_rates_len;
2403 u8 fh_params_len;
2404 u8 ds_params_len;
2405 u8 cf_params_len;
2406 u8 tim_len;
2407 u8 ibss_params_len;
2408 u8 challenge_len;
2409 u8 wpa_len;
2410 u8 rsn_len;
2411 u8 erp_info_len;
2412 u8 ext_supp_rates_len;
2413 u8 wmm_info_len;
2414 u8 wmm_param_len;
2415 u8 mesh_config_len;
2416 u8 mesh_id_len;
2417 u8 peer_link_len;
2418 u8 preq_len;
2419 u8 prep_len;
2420 u8 perr_len;
2421 u8 ch_switch_elem_len;
2422 u8 country_elem_len;
2423 u8 pwr_constr_elem_len;
2424 u8 quiet_elem_len;
2425 u8 num_of_quiet_elem; /* can be more the one */
2426 u8 timeout_int_len;
2427};
2428
2429#endif
2430
2431
2432typedef struct _RT_INTEL_PROMISCUOUS_MODE_INFO {
2433 bool bPromiscuousOn;
2434 bool bFilterSourceStationFrame;
2435} RT_INTEL_PROMISCUOUS_MODE_INFO, *PRT_INTEL_PROMISCUOUS_MODE_INFO;
2436
2437
2438/*************** DRIVER STATUS *****/
2439#define STATUS_SCANNING 0
2440#define STATUS_SCAN_HW 1
2441#define STATUS_SCAN_ABORTING 2
2442#define STATUS_SETTING_CHAN 3
2443/*************** DRIVER STATUS *****/
2444
2445enum {
2446 NO_USE = 0,
2447 USED = 1,
2448 HW_SEC = 2,
2449 SW_SEC = 3,
2450};
2451
2452enum {
2453 LPS_IS_WAKE = 0,
2454 LPS_IS_SLEEP = 1,
2455 LPS_WAIT_NULL_DATA_SEND =2,
2456};
2457
2458struct rtllib_device {
2459 struct pci_dev *pdev;
2460 struct net_device *dev;
2461 struct rtllib_security sec;
2462
2463 bool disable_mgnt_queue;
2464
2465 unsigned long status;
2466 short hwscan_ch_bk;
2467 HT_EXTCHNL_OFFSET chan_offset_bk;
2468 HT_CHANNEL_WIDTH bandwidth_bk;
2469 u8 hwscan_sem_up;
2470#ifdef CONFIG_CFG_80211
2471 struct wireless_dev wdev;
2472 struct rtl_regulatory regulatory;
2473#endif
2474 u8 CntAfterLink;
2475
2476 RT_OP_MODE OpMode;
2477
2478 u8 VersionID;
2479 /* The last AssocReq/Resp IEs */
2480 u8 *assocreq_ies, *assocresp_ies;
2481 size_t assocreq_ies_len, assocresp_ies_len;
2482
2483 bool b_customer_lenovo_id;
2484 bool bForcedShowRxRate;
2485 bool bForcedShowRateStill;
2486 u8 SystemQueryDataRateCount;
2487 bool bForcedBgMode;
2488 bool bUseRAMask;
2489 bool b1x1RecvCombine;
2490 u8 RF_Type;
2491 bool b1SSSupport;
2492
2493 u8 hwsec_active;
2494 bool is_silent_reset;
2495 bool force_mic_error;
2496 bool is_roaming;
2497 bool ieee_up;
2498 bool cannot_notify;
2499 bool bSupportRemoteWakeUp;
2500 RT_PS_MODE dot11PowerSaveMode;
2501 bool actscanning;
2502 bool FirstIe_InScan;
2503 bool be_scan_inprogress;
2504 bool beinretry;
2505 RT_RF_POWER_STATE eRFPowerState;
2506 RT_RF_CHANGE_SOURCE RfOffReason;
2507 bool is_set_key;
2508 bool wx_set_enc;
2509 PRT_HIGH_THROUGHPUT pHTInfo;
2510 spinlock_t bw_spinlock;
2511
2512 spinlock_t reorder_spinlock;
2513 u8 Regdot11HTOperationalRateSet[16];
2514 u8 Regdot11TxHTOperationalRateSet[16];
2515 u8 dot11HTOperationalRateSet[16];
2516 u8 RegHTSuppRateSet[16];
2517 u8 HTCurrentOperaRate;
2518 u8 HTHighestOperaRate;
2519 u8 MinSpaceCfg;
2520 u8 MaxMssDensity;
2521 u8 bTxDisableRateFallBack;
2522 u8 bTxUseDriverAssingedRate;
2523 u8 bTxEnableFwCalcDur;
2524 atomic_t atm_chnlop;
2525 atomic_t atm_swbw;
2526
2527 struct list_head Tx_TS_Admit_List;
2528 struct list_head Tx_TS_Pending_List;
2529 struct list_head Tx_TS_Unused_List;
2530 TX_TS_RECORD TxTsRecord[TOTAL_TS_NUM];
2531 struct list_head Rx_TS_Admit_List;
2532 struct list_head Rx_TS_Pending_List;
2533 struct list_head Rx_TS_Unused_List;
2534 RX_TS_RECORD RxTsRecord[TOTAL_TS_NUM];
2535 RX_REORDER_ENTRY RxReorderEntry[128];
2536 struct list_head RxReorder_Unused_List;
2537 u8 ForcedPriority;
2538
2539
2540 /* Bookkeeping structures */
2541 struct net_device_stats stats;
2542 struct rtllib_stats ieee_stats;
2543 struct rtllib_softmac_stats softmac_stats;
2544
2545 /* Probe / Beacon management */
2546 struct list_head network_free_list;
2547 struct list_head network_list;
2548#ifdef RTL8192U
2549 struct list_head network_bssid_free_list;
2550 struct list_head network_bssid_list;
2551#endif
2552 struct rtllib_network *networks;
2553 int scans;
2554 int scan_age;
2555
2556 int iw_mode; /* operating mode (IW_MODE_*) */
2557 bool bNetPromiscuousMode;
2558 RT_INTEL_PROMISCUOUS_MODE_INFO IntelPromiscuousModeInfo;
2559
2560 struct iw_spy_data spy_data;
2561
2562 spinlock_t lock;
2563 spinlock_t wpax_suitlist_lock;
2564
2565 int tx_headroom; /* Set to size of any additional room needed at front
2566 * of allocated Tx SKBs */
2567 u32 config;
2568
2569 /* WEP and other encryption related settings at the device level */
2570 int open_wep; /* Set to 1 to allow unencrypted frames */
2571 int auth_mode;
2572 int reset_on_keychange; /* Set to 1 if the HW needs to be reset on
2573 * WEP key changes */
2574
2575 /* If the host performs {en,de}cryption, then set to 1 */
2576 int host_encrypt;
2577 int host_encrypt_msdu;
2578 int host_decrypt;
2579 /* host performs multicast decryption */
2580 int host_mc_decrypt;
2581
2582 /* host should strip IV and ICV from protected frames */
2583 /* meaningful only when hardware decryption is being used */
2584 int host_strip_iv_icv;
2585
2586 int host_open_frag;
2587 int host_build_iv;
2588 int ieee802_1x; /* is IEEE 802.1X used */
2589
2590 /* WPA data */
2591 bool bHalfNMode;
2592 bool bHalfWirelessN24GMode;
2593 int wpa_enabled;
2594 int drop_unencrypted;
2595 int tkip_countermeasures;
2596 int privacy_invoked;
2597 size_t wpa_ie_len;
2598 u8 *wpa_ie;
2599 size_t wps_ie_len;
2600 u8 *wps_ie;
2601 u8 ap_mac_addr[6];
2602 u16 pairwise_key_type;
2603 u16 group_key_type;
2604 struct list_head crypt_deinit_list;
2605 struct rtllib_crypt_data *crypt[WEP_KEYS];
2606
2607 int tx_keyidx; /* default TX key index (crypt[tx_keyidx]) */
2608 SW_CAM_TABLE swcamtable[TOTAL_CAM_ENTRY];
2609 struct timer_list crypt_deinit_timer;
2610 int crypt_quiesced;
2611
2612 int bcrx_sta_key; /* use individual keys to override default keys even
2613 * with RX of broad/multicast frames */
2614
2615 RT_PMKID_LIST PMKIDList[NUM_PMKID_CACHE];
2616
2617 /* Fragmentation structures */
2618 struct rtllib_frag_entry frag_cache[17][RTLLIB_FRAG_CACHE_LEN];
2619 unsigned int frag_next_idx[17];
2620 u16 fts; /* Fragmentation Threshold */
2621#define DEFAULT_RTS_THRESHOLD 2346U
2622#define MIN_RTS_THRESHOLD 1
2623#define MAX_RTS_THRESHOLD 2346U
2624 u16 rts; /* RTS threshold */
2625
2626 /* Association info */
2627 u8 bssid[ETH_ALEN];
2628
2629 /* This stores infos for the current network.
2630 * Either the network we are associated in INFRASTRUCTURE
2631 * or the network that we are creating in MASTER mode.
2632 * ad-hoc is a mixture ;-).
2633 * Note that in infrastructure mode, even when not associated,
2634 * fields bssid and essid may be valid (if wpa_set and essid_set
2635 * are true) as thy carry the value set by the user via iwconfig
2636 */
2637 struct rtllib_network current_network;
2638
2639 enum rtllib_state state;
2640
2641 int short_slot;
2642 int reg_mode;
2643 int mode; /* A, B, G */
2644 int modulation; /* CCK, OFDM */
2645 int freq_band; /* 2.4Ghz, 5.2Ghz, Mixed */
2646 int abg_true; /* ABG flag */
2647
2648 /* used for forcing the ibss workqueue to terminate
2649 * without wait for the syncro scan to terminate
2650 */
2651 short sync_scan_hurryup;
2652 u16 scan_watch_dog;
2653 int perfect_rssi;
2654 int worst_rssi;
2655
2656 u16 prev_seq_ctl; /* used to drop duplicate frames */
2657
2658 /* map of allowed channels. 0 is dummy */
2659#ifdef ENABLE_DOT11D
2660 void* pDot11dInfo;
2661 bool bGlobalDomain;
2662#else
2663 u8 channel_map[MAX_CHANNEL_NUMBER+1];
2664#endif
2665 u8 active_channel_map[MAX_CHANNEL_NUMBER+1];
2666
2667 u8 IbssStartChnl;
2668 u8 ibss_maxjoin_chal;
2669
2670 int rate; /* current rate */
2671 int basic_rate;
2672 u32 currentRate;
2673
2674 short active_scan;
2675
2676 /* this contains flags for selectively enable softmac support */
2677 u16 softmac_features;
2678
2679 /* if the sequence control field is not filled by HW */
2680 u16 seq_ctrl[5];
2681
2682 /* association procedure transaction sequence number */
2683 u16 associate_seq;
2684
2685 /* AID for RTXed association responses */
2686 u16 assoc_id;
2687
2688 /* power save mode related*/
2689 u8 ack_tx_to_ieee;
2690 short ps;
2691 short sta_sleep;
2692 int ps_timeout;
2693 int ps_period;
2694 struct tasklet_struct ps_task;
2695 u32 ps_th;
2696 u32 ps_tl;
2697 bool polling;
2698
2699 short raw_tx;
2700 /* used if IEEE_SOFTMAC_TX_QUEUE is set */
2701 short queue_stop;
2702 short scanning_continue ;
2703 short proto_started;
2704 short proto_stoppping;
2705
2706 struct semaphore wx_sem;
2707 struct semaphore scan_sem;
2708 struct semaphore ips_sem;
2709
2710 spinlock_t mgmt_tx_lock;
2711 spinlock_t beacon_lock;
2712
2713 short beacon_txing;
2714
2715 short wap_set;
2716 short ssid_set;
2717
2718 /* set on initialization */
2719 u8 qos_support;
2720 unsigned int wmm_acm;
2721
2722 /* for discarding duplicated packets in IBSS */
2723 struct list_head ibss_mac_hash[IEEE_IBSS_MAC_HASH_SIZE];
2724
2725 /* for discarding duplicated packets in BSS */
2726 u16 last_rxseq_num[17]; /* rx seq previous per-tid */
2727 u16 last_rxfrag_num[17];/* tx frag previous per-tid */
2728 unsigned long last_packet_time[17];
2729
2730 /* for PS mode */
2731 unsigned long last_rx_ps_time;
2732 bool bAwakePktSent;
2733 u8 LPSDelayCnt;
2734
2735 /* used if IEEE_SOFTMAC_SINGLE_QUEUE is set */
2736 struct sk_buff *mgmt_queue_ring[MGMT_QUEUE_NUM];
2737 int mgmt_queue_head;
2738 int mgmt_queue_tail;
2739#define RTLLIB_QUEUE_LIMIT 128
2740 u8 AsocRetryCount;
2741 unsigned int hw_header;
2742 struct sk_buff_head skb_waitQ[MAX_QUEUE_SIZE];
2743 struct sk_buff_head skb_aggQ[MAX_QUEUE_SIZE];
2744 struct sk_buff_head skb_drv_aggQ[MAX_QUEUE_SIZE];
2745 u32 sta_edca_param[4];
2746 bool aggregation;
2747 bool enable_rx_imm_BA;
2748 bool bibsscoordinator;
2749
2750 bool bdynamic_txpower_enable;
2751
2752 bool bCTSToSelfEnable;
2753 u8 CTSToSelfTH;
2754
2755 u32 fsync_time_interval;
2756 u32 fsync_rate_bitmap;
2757 u8 fsync_rssi_threshold;
2758 bool bfsync_enable;
2759
2760 u8 fsync_multiple_timeinterval;
2761 u32 fsync_firstdiff_ratethreshold;
2762 u32 fsync_seconddiff_ratethreshold;
2763 Fsync_State fsync_state;
2764 bool bis_any_nonbepkts;
2765 bandwidth_autoswitch bandwidth_auto_switch;
2766 bool FwRWRF;
2767
2768 RT_LINK_DETECT_T LinkDetectInfo;
2769 bool bIsAggregateFrame;
2770 RT_POWER_SAVE_CONTROL PowerSaveControl;
2771 u8 amsdu_in_process;
2772
2773 /* used if IEEE_SOFTMAC_TX_QUEUE is set */
2774 struct tx_pending_t tx_pending;
2775
2776 /* used if IEEE_SOFTMAC_ASSOCIATE is set */
2777 struct timer_list associate_timer;
2778
2779 /* used if IEEE_SOFTMAC_BEACONS is set */
2780 struct timer_list beacon_timer;
2781 u8 need_sw_enc;
2782 work_struct_rsl associate_complete_wq;
2783 work_struct_rsl ips_leave_wq;
2784 delayed_work_struct_rsl associate_procedure_wq;
2785 delayed_work_struct_rsl softmac_scan_wq;
2786 delayed_work_struct_rsl softmac_hint11d_wq;
2787 delayed_work_struct_rsl associate_retry_wq;
2788 delayed_work_struct_rsl start_ibss_wq;
2789 delayed_work_struct_rsl hw_wakeup_wq;
2790 delayed_work_struct_rsl hw_sleep_wq;
2791 delayed_work_struct_rsl link_change_wq;
2792 work_struct_rsl wx_sync_scan_wq;
2793
2794 struct workqueue_struct *wq;
2795
2796 /* Callback functions */
2797 void (*set_security)(struct net_device *dev,
2798 struct rtllib_security *sec);
2799
2800 /* Used to TX data frame by using txb structs.
2801 * this is not used if in the softmac_features
2802 * is set the flag IEEE_SOFTMAC_TX_QUEUE
2803 */
2804 int (*hard_start_xmit)(struct rtllib_txb *txb,
2805 struct net_device *dev);
2806
2807 int (*reset_port)(struct net_device *dev);
2808 int (*is_queue_full) (struct net_device * dev, int pri);
2809
2810 int (*handle_management) (struct net_device * dev,
2811 struct rtllib_network * network, u16 type);
2812 int (*is_qos_active) (struct net_device *dev, struct sk_buff *skb);
2813
2814 /* Softmac-generated frames (mamagement) are TXed via this
2815 * callback if the flag IEEE_SOFTMAC_SINGLE_QUEUE is
2816 * not set. As some cards may have different HW queues that
2817 * one might want to use for data and management frames
2818 * the option to have two callbacks might be useful.
2819 * This fucntion can't sleep.
2820 */
2821 int (*softmac_hard_start_xmit)(struct sk_buff *skb,
2822 struct net_device *dev);
2823
2824 /* used instead of hard_start_xmit (not softmac_hard_start_xmit)
2825 * if the IEEE_SOFTMAC_TX_QUEUE feature is used to TX data
2826 * frames. I the option IEEE_SOFTMAC_SINGLE_QUEUE is also set
2827 * then also management frames are sent via this callback.
2828 * This function can't sleep.
2829 */
2830 void (*softmac_data_hard_start_xmit)(struct sk_buff *skb,
2831 struct net_device *dev,int rate);
2832
2833 /* stops the HW queue for DATA frames. Useful to avoid
2834 * waste time to TX data frame when we are reassociating
2835 * This function can sleep.
2836 */
2837 void (*data_hard_stop)(struct net_device *dev);
2838
2839 /* OK this is complementar to data_poll_hard_stop */
2840 void (*data_hard_resume)(struct net_device *dev);
2841
2842 /* ask to the driver to retune the radio .
2843 * This function can sleep. the driver should ensure
2844 * the radio has been swithced before return.
2845 */
2846 void (*set_chan)(struct net_device *dev,short ch);
2847
2848 /* These are not used if the ieee stack takes care of
2849 * scanning (IEEE_SOFTMAC_SCAN feature set).
2850 * In this case only the set_chan is used.
2851 *
2852 * The syncro version is similar to the start_scan but
2853 * does not return until all channels has been scanned.
2854 * this is called in user context and should sleep,
2855 * it is called in a work_queue when swithcing to ad-hoc mode
2856 * or in behalf of iwlist scan when the card is associated
2857 * and root user ask for a scan.
2858 * the fucntion stop_scan should stop both the syncro and
2859 * background scanning and can sleep.
2860 * The fucntion start_scan should initiate the background
2861 * scanning and can't sleep.
2862 */
2863 void (*scan_syncro)(struct net_device *dev);
2864 void (*start_scan)(struct net_device *dev);
2865 void (*stop_scan)(struct net_device *dev);
2866
2867 void (*rtllib_start_hw_scan)(struct net_device *dev);
2868 void (*rtllib_stop_hw_scan)(struct net_device *dev);
2869
2870 /* indicate the driver that the link state is changed
2871 * for example it may indicate the card is associated now.
2872 * Driver might be interested in this to apply RX filter
2873 * rules or simply light the LINK led
2874 */
2875 void (*link_change)(struct net_device *dev);
2876
2877 /* these two function indicates to the HW when to start
2878 * and stop to send beacons. This is used when the
2879 * IEEE_SOFTMAC_BEACONS is not set. For now the
2880 * stop_send_bacons is NOT guaranteed to be called only
2881 * after start_send_beacons.
2882 */
2883 void (*start_send_beacons) (struct net_device *dev);
2884 void (*stop_send_beacons) (struct net_device *dev);
2885
2886 /* power save mode related */
2887 void (*sta_wake_up) (struct net_device *dev);
2888 void (*enter_sleep_state) (struct net_device *dev, u32 th, u32 tl);
2889 short (*ps_is_queue_empty) (struct net_device *dev);
2890 int (*handle_beacon) (struct net_device * dev, struct rtllib_beacon * beacon, struct rtllib_network * network);
2891 int (*handle_assoc_response) (struct net_device * dev, struct rtllib_assoc_response_frame * resp, struct rtllib_network * network);
2892
2893
2894 /* check whether Tx hw resouce available */
2895 short (*check_nic_enough_desc)(struct net_device *dev, int queue_index);
2896 short (*get_nic_desc_num)(struct net_device *dev, int queue_index);
2897 void (*SetBWModeHandler)(struct net_device *dev, HT_CHANNEL_WIDTH Bandwidth, HT_EXTCHNL_OFFSET Offset);
2898 bool (*GetNmodeSupportBySecCfg)(struct net_device* dev);
2899 void (*SetWirelessMode)(struct net_device* dev, u8 wireless_mode);
2900 bool (*GetHalfNmodeSupportByAPsHandler)(struct net_device* dev);
2901 u8 (*rtllib_ap_sec_type)(struct rtllib_device *ieee);
2902 void (*HalUsbRxAggrHandler)(struct net_device *dev, bool Value);
2903 void (*InitialGainHandler)(struct net_device *dev, u8 Operation);
2904 bool (*SetFwCmdHandler)(struct net_device *dev, FW_CMD_IO_TYPE FwCmdIO);
2905 void (*UpdateHalRAMaskHandler)(struct net_device* dev, bool bMulticast, u8 macId, u8 MimoPs, u8 WirelessMode, u8 bCurTxBW40MHz, u8 rssi_level);
2906 void (*UpdateBeaconInterruptHandler)(struct net_device* dev, bool start);
2907 void (*UpdateInterruptMaskHandler)(struct net_device* dev, u32 AddMSR, u32 RemoveMSR);
2908 u16 (*rtl_11n_user_show_rates)(struct net_device *dev);
2909 void (*ScanOperationBackupHandler)(struct net_device *dev, u8 Operation);
2910 void (*LedControlHandler)(struct net_device * dev, LED_CTL_MODE LedAction);
2911 void (*SetHwRegHandler)(struct net_device *dev,u8 variable,u8* val);
2912 void (*GetHwRegHandler)(struct net_device *dev,u8 variable,u8* val);
2913
2914 void (*AllowAllDestAddrHandler)(struct net_device *dev, bool bAllowAllDA, bool WriteIntoReg);
2915
2916 void (*rtllib_ips_leave_wq) (struct net_device *dev);
2917 void (*rtllib_ips_leave)(struct net_device *dev);
2918 void (*LeisurePSLeave)(struct net_device *dev);
2919 void (*rtllib_rfkill_poll)(struct net_device *dev);
2920
2921 /* This must be the last item so that it points to the data
2922 * allocated beyond this structure by alloc_rtllib */
2923 u8 priv[0];
2924};
2925
2926#define IEEE_A (1<<0)
2927#define IEEE_B (1<<1)
2928#define IEEE_G (1<<2)
2929#define IEEE_N_24G (1<<4)
2930#define IEEE_N_5G (1<<5)
2931#define IEEE_MODE_MASK (IEEE_A|IEEE_B|IEEE_G)
2932
2933/* Generate a 802.11 header */
2934
2935/* Uses the channel change callback directly
2936 * instead of [start/stop] scan callbacks
2937 */
2938#define IEEE_SOFTMAC_SCAN (1<<2)
2939
2940/* Perform authentication and association handshake */
2941#define IEEE_SOFTMAC_ASSOCIATE (1<<3)
2942
2943/* Generate probe requests */
2944#define IEEE_SOFTMAC_PROBERQ (1<<4)
2945
2946/* Generate respones to probe requests */
2947#define IEEE_SOFTMAC_PROBERS (1<<5)
2948
2949/* The ieee802.11 stack will manages the netif queue
2950 * wake/stop for the driver, taking care of 802.11
2951 * fragmentation. See softmac.c for details. */
2952#define IEEE_SOFTMAC_TX_QUEUE (1<<7)
2953
2954/* Uses only the softmac_data_hard_start_xmit
2955 * even for TX management frames.
2956 */
2957#define IEEE_SOFTMAC_SINGLE_QUEUE (1<<8)
2958
2959/* Generate beacons. The stack will enqueue beacons
2960 * to the card
2961 */
2962#define IEEE_SOFTMAC_BEACONS (1<<6)
2963
2964
2965static inline void *rtllib_priv(struct net_device *dev)
2966{
2967 return ((struct rtllib_device *)netdev_priv(dev))->priv;
2968}
2969
2970extern inline int rtllib_is_empty_essid(const char *essid, int essid_len)
2971{
2972 /* Single white space is for Linksys APs */
2973 if (essid_len == 1 && essid[0] == ' ')
2974 return 1;
2975
2976 /* Otherwise, if the entire essid is 0, we assume it is hidden */
2977 while (essid_len) {
2978 essid_len--;
2979 if (essid[essid_len] != '\0')
2980 return 0;
2981 }
2982
2983 return 1;
2984}
2985
2986extern inline int rtllib_is_valid_mode(struct rtllib_device *ieee, int mode)
2987{
2988 /*
2989 * It is possible for both access points and our device to support
2990 * combinations of modes, so as long as there is one valid combination
2991 * of ap/device supported modes, then return success
2992 *
2993 */
2994 if ((mode & IEEE_A) &&
2995 (ieee->modulation & RTLLIB_OFDM_MODULATION) &&
2996 (ieee->freq_band & RTLLIB_52GHZ_BAND))
2997 return 1;
2998
2999 if ((mode & IEEE_G) &&
3000 (ieee->modulation & RTLLIB_OFDM_MODULATION) &&
3001 (ieee->freq_band & RTLLIB_24GHZ_BAND))
3002 return 1;
3003
3004 if ((mode & IEEE_B) &&
3005 (ieee->modulation & RTLLIB_CCK_MODULATION) &&
3006 (ieee->freq_band & RTLLIB_24GHZ_BAND))
3007 return 1;
3008
3009 return 0;
3010}
3011
3012extern inline int rtllib_get_hdrlen(u16 fc)
3013{
3014 int hdrlen = RTLLIB_3ADDR_LEN;
3015
3016 switch (WLAN_FC_GET_TYPE(fc)) {
3017 case RTLLIB_FTYPE_DATA:
3018 if ((fc & RTLLIB_FCTL_FROMDS) && (fc & RTLLIB_FCTL_TODS))
3019 hdrlen = RTLLIB_4ADDR_LEN; /* Addr4 */
3020 if (RTLLIB_QOS_HAS_SEQ(fc))
3021 hdrlen += 2; /* QOS ctrl*/
3022 break;
3023 case RTLLIB_FTYPE_CTL:
3024 switch (WLAN_FC_GET_STYPE(fc)) {
3025 case RTLLIB_STYPE_CTS:
3026 case RTLLIB_STYPE_ACK:
3027 hdrlen = RTLLIB_1ADDR_LEN;
3028 break;
3029 default:
3030 hdrlen = RTLLIB_2ADDR_LEN;
3031 break;
3032 }
3033 break;
3034 }
3035
3036 return hdrlen;
3037}
3038
3039static inline u8 *rtllib_get_payload(struct rtllib_hdr *hdr)
3040{
3041 switch (rtllib_get_hdrlen(le16_to_cpu(hdr->frame_ctl))) {
3042 case RTLLIB_1ADDR_LEN:
3043 return ((struct rtllib_hdr_1addr *)hdr)->payload;
3044 case RTLLIB_2ADDR_LEN:
3045 return ((struct rtllib_hdr_2addr *)hdr)->payload;
3046 case RTLLIB_3ADDR_LEN:
3047 return ((struct rtllib_hdr_3addr *)hdr)->payload;
3048 case RTLLIB_4ADDR_LEN:
3049 return ((struct rtllib_hdr_4addr *)hdr)->payload;
3050 }
3051 return NULL;
3052}
3053
3054static inline int rtllib_is_ofdm_rate(u8 rate)
3055{
3056 switch (rate & ~RTLLIB_BASIC_RATE_MASK) {
3057 case RTLLIB_OFDM_RATE_6MB:
3058 case RTLLIB_OFDM_RATE_9MB:
3059 case RTLLIB_OFDM_RATE_12MB:
3060 case RTLLIB_OFDM_RATE_18MB:
3061 case RTLLIB_OFDM_RATE_24MB:
3062 case RTLLIB_OFDM_RATE_36MB:
3063 case RTLLIB_OFDM_RATE_48MB:
3064 case RTLLIB_OFDM_RATE_54MB:
3065 return 1;
3066 }
3067 return 0;
3068}
3069
3070static inline int rtllib_is_cck_rate(u8 rate)
3071{
3072 switch (rate & ~RTLLIB_BASIC_RATE_MASK) {
3073 case RTLLIB_CCK_RATE_1MB:
3074 case RTLLIB_CCK_RATE_2MB:
3075 case RTLLIB_CCK_RATE_5MB:
3076 case RTLLIB_CCK_RATE_11MB:
3077 return 1;
3078 }
3079 return 0;
3080}
3081
3082
3083#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10))
3084static inline unsigned compare_ether_addr(const u8 *addr1, const u8 *addr2)
3085{
3086 const u16 *a = (const u16 *) addr1;
3087 const u16 *b = (const u16 *) addr2;
3088
3089 BUILD_BUG_ON(ETH_ALEN != 6);
3090 return ((a[0] ^ b[0]) | (a[1] ^ b[1]) | (a[2] ^ b[2])) != 0;
3091}
3092#endif
3093
3094/* rtllib.c */
3095extern void free_rtllib(struct net_device *dev);
3096extern struct net_device *alloc_rtllib(int sizeof_priv);
3097
3098extern int rtllib_set_encryption(struct rtllib_device *ieee);
3099
3100/* rtllib_tx.c */
3101
3102extern int rtllib_encrypt_fragment(
3103 struct rtllib_device *ieee,
3104 struct sk_buff *frag,
3105 int hdr_len);
3106
3107extern int rtllib_xmit(struct sk_buff *skb, struct net_device *dev);
3108extern int rtllib_xmit_inter(struct sk_buff *skb, struct net_device *dev);
3109extern void rtllib_txb_free(struct rtllib_txb *);
3110
3111/* rtllib_rx.c */
3112extern int rtllib_rx(struct rtllib_device *ieee, struct sk_buff *skb,
3113 struct rtllib_rx_stats *rx_stats);
3114extern void rtllib_rx_mgt(struct rtllib_device *ieee,
3115 struct sk_buff *skb,
3116 struct rtllib_rx_stats *stats);
3117extern void rtllib_rx_probe_rq(struct rtllib_device *ieee,
3118 struct sk_buff *skb);
3119extern int IsLegalChannel( struct rtllib_device *rtllib, u8 channel);
3120
3121/* rtllib_wx.c */
3122extern int rtllib_wx_get_scan(struct rtllib_device *ieee,
3123 struct iw_request_info *info,
3124 union iwreq_data *wrqu, char *key);
3125extern int rtllib_wx_set_encode(struct rtllib_device *ieee,
3126 struct iw_request_info *info,
3127 union iwreq_data *wrqu, char *key);
3128extern int rtllib_wx_get_encode(struct rtllib_device *ieee,
3129 struct iw_request_info *info,
3130 union iwreq_data *wrqu, char *key);
3131#if WIRELESS_EXT >= 18
3132extern int rtllib_wx_get_encode_ext(struct rtllib_device *ieee,
3133 struct iw_request_info *info,
3134 union iwreq_data* wrqu, char *extra);
3135extern int rtllib_wx_set_encode_ext(struct rtllib_device *ieee,
3136 struct iw_request_info *info,
3137 union iwreq_data* wrqu, char *extra);
3138#endif
3139extern int rtllib_wx_set_auth(struct rtllib_device *ieee,
3140 struct iw_request_info *info,
3141 struct iw_param *data, char *extra);
3142extern int rtllib_wx_set_mlme(struct rtllib_device *ieee,
3143 struct iw_request_info *info,
3144 union iwreq_data *wrqu, char *extra);
3145extern int rtllib_wx_set_gen_ie(struct rtllib_device *ieee, u8 *ie, size_t len);
3146
3147/* rtllib_softmac.c */
3148extern short rtllib_is_54g(struct rtllib_network *net);
3149extern short rtllib_is_shortslot(struct rtllib_network net);
3150extern int rtllib_rx_frame_softmac(struct rtllib_device *ieee, struct sk_buff *skb,
3151 struct rtllib_rx_stats *rx_stats, u16 type,
3152 u16 stype);
3153extern void rtllib_softmac_new_net(struct rtllib_device *ieee, struct rtllib_network *net);
3154
3155void SendDisassociation(struct rtllib_device *ieee, bool deauth, u16 asRsn);
3156extern void rtllib_softmac_xmit(struct rtllib_txb *txb, struct rtllib_device *ieee);
3157
3158extern void rtllib_stop_send_beacons(struct rtllib_device *ieee);
3159extern void notify_wx_assoc_event(struct rtllib_device *ieee);
3160extern void rtllib_softmac_check_all_nets(struct rtllib_device *ieee);
3161extern void rtllib_start_bss(struct rtllib_device *ieee);
3162extern void rtllib_start_master_bss(struct rtllib_device *ieee);
3163extern void rtllib_start_ibss(struct rtllib_device *ieee);
3164extern void rtllib_softmac_init(struct rtllib_device *ieee);
3165extern void rtllib_softmac_free(struct rtllib_device *ieee);
3166extern void rtllib_associate_abort(struct rtllib_device *ieee);
3167extern void rtllib_disassociate(struct rtllib_device *ieee);
3168extern void rtllib_stop_scan(struct rtllib_device *ieee);
3169extern bool rtllib_act_scanning(struct rtllib_device *ieee, bool sync_scan);
3170extern void rtllib_stop_scan_syncro(struct rtllib_device *ieee);
3171extern void rtllib_start_scan_syncro(struct rtllib_device *ieee, u8 is_mesh);
3172extern inline struct sk_buff *rtllib_probe_req(struct rtllib_device *ieee);
3173extern u8 MgntQuery_MgntFrameTxRate(struct rtllib_device *ieee);
3174extern void rtllib_sta_ps_send_null_frame(struct rtllib_device *ieee, short pwr);
3175extern void rtllib_sta_wakeup(struct rtllib_device *ieee, short nl);
3176extern void rtllib_sta_ps_send_pspoll_frame(struct rtllib_device *ieee);
3177extern void rtllib_check_all_nets(struct rtllib_device *ieee);
3178extern void rtllib_start_protocol(struct rtllib_device *ieee);
3179extern void rtllib_stop_protocol(struct rtllib_device *ieee, u8 shutdown);
3180
3181extern void rtllib_EnableNetMonitorMode(struct net_device* dev, bool bInitState);
3182extern void rtllib_DisableNetMonitorMode(struct net_device* dev, bool bInitState);
3183extern void rtllib_EnableIntelPromiscuousMode(struct net_device* dev, bool bInitState);
3184extern void rtllib_DisableIntelPromiscuousMode(struct net_device* dev, bool bInitState);
3185extern void rtllib_send_probe_requests(struct rtllib_device *ieee, u8 is_mesh);
3186
3187extern void rtllib_softmac_stop_protocol(struct rtllib_device *ieee, u8 mesh_flag, u8 shutdown);
3188extern void rtllib_softmac_start_protocol(struct rtllib_device *ieee,u8 mesh_flag);
3189
3190extern void rtllib_reset_queue(struct rtllib_device *ieee);
3191extern void rtllib_wake_queue(struct rtllib_device *ieee);
3192extern void rtllib_stop_queue(struct rtllib_device *ieee);
3193extern void rtllib_wake_all_queues(struct rtllib_device *ieee);
3194extern void rtllib_stop_all_queues(struct rtllib_device *ieee);
3195extern struct sk_buff *rtllib_get_beacon(struct rtllib_device *ieee);
3196extern void rtllib_start_send_beacons(struct rtllib_device *ieee);
3197extern void rtllib_stop_send_beacons(struct rtllib_device *ieee);
3198extern int rtllib_wpa_supplicant_ioctl(struct rtllib_device *ieee, struct iw_point *p, u8 is_mesh);
3199
3200extern void notify_wx_assoc_event(struct rtllib_device *ieee);
3201extern void rtllib_ps_tx_ack(struct rtllib_device *ieee, short success);
3202
3203extern void softmac_mgmt_xmit(struct sk_buff *skb, struct rtllib_device *ieee);
3204extern u16 rtllib_query_seqnum(struct rtllib_device*ieee, struct sk_buff* skb, u8* dst);
3205extern u8 rtllib_ap_sec_type(struct rtllib_device *ieee);
3206
3207/* rtllib_crypt_ccmp&tkip&wep.c */
3208extern void rtllib_tkip_null(void);
3209extern void rtllib_wep_null(void);
3210extern void rtllib_ccmp_null(void);
3211
3212/* rtllib_softmac_wx.c */
3213
3214extern int rtllib_wx_get_wap(struct rtllib_device *ieee,
3215 struct iw_request_info *info,
3216 union iwreq_data *wrqu, char *ext);
3217
3218extern int rtllib_wx_set_wap(struct rtllib_device *ieee,
3219 struct iw_request_info *info,
3220 union iwreq_data *awrq,
3221 char *extra);
3222
3223extern int rtllib_wx_get_essid(struct rtllib_device *ieee, struct iw_request_info *a,union iwreq_data *wrqu,char *b);
3224
3225extern int rtllib_wx_set_rate(struct rtllib_device *ieee,
3226 struct iw_request_info *info,
3227 union iwreq_data *wrqu, char *extra);
3228
3229extern int rtllib_wx_get_rate(struct rtllib_device *ieee,
3230 struct iw_request_info *info,
3231 union iwreq_data *wrqu, char *extra);
3232
3233extern int rtllib_wx_set_mode(struct rtllib_device *ieee, struct iw_request_info *a,
3234 union iwreq_data *wrqu, char *b);
3235
3236extern int rtllib_wx_set_scan(struct rtllib_device *ieee, struct iw_request_info *a,
3237 union iwreq_data *wrqu, char *b);
3238
3239extern int rtllib_wx_set_essid(struct rtllib_device *ieee,
3240 struct iw_request_info *a,
3241 union iwreq_data *wrqu, char *extra);
3242
3243extern int rtllib_wx_get_mode(struct rtllib_device *ieee, struct iw_request_info *a,
3244 union iwreq_data *wrqu, char *b);
3245
3246extern int rtllib_wx_set_freq(struct rtllib_device *ieee, struct iw_request_info *a,
3247 union iwreq_data *wrqu, char *b);
3248
3249extern int rtllib_wx_get_freq(struct rtllib_device *ieee, struct iw_request_info *a,
3250 union iwreq_data *wrqu, char *b);
3251extern void rtllib_wx_sync_scan_wq(void *data);
3252
3253extern int rtllib_wx_set_rawtx(struct rtllib_device *ieee,
3254 struct iw_request_info *info,
3255 union iwreq_data *wrqu, char *extra);
3256
3257extern int rtllib_wx_get_name(struct rtllib_device *ieee,
3258 struct iw_request_info *info,
3259 union iwreq_data *wrqu, char *extra);
3260
3261extern int rtllib_wx_set_power(struct rtllib_device *ieee,
3262 struct iw_request_info *info,
3263 union iwreq_data *wrqu, char *extra);
3264
3265extern int rtllib_wx_get_power(struct rtllib_device *ieee,
3266 struct iw_request_info *info,
3267 union iwreq_data *wrqu, char *extra);
3268
3269extern int rtllib_wx_set_rts(struct rtllib_device *ieee,
3270 struct iw_request_info *info,
3271 union iwreq_data *wrqu, char *extra);
3272
3273extern int rtllib_wx_get_rts(struct rtllib_device *ieee,
3274 struct iw_request_info *info,
3275 union iwreq_data *wrqu, char *extra);
3276#define MAX_RECEIVE_BUFFER_SIZE 9100
3277extern void HTDebugHTCapability(u8* CapIE, u8* TitleString );
3278extern void HTDebugHTInfo(u8* InfoIE, u8* TitleString);
3279
3280void HTSetConnectBwMode(struct rtllib_device* ieee, HT_CHANNEL_WIDTH Bandwidth, HT_EXTCHNL_OFFSET Offset);
3281extern void HTUpdateDefaultSetting(struct rtllib_device* ieee);
3282extern void HTConstructCapabilityElement(struct rtllib_device* ieee, u8* posHTCap, u8* len, u8 isEncrypt,bool bAssoc);
3283extern void HTConstructInfoElement(struct rtllib_device* ieee, u8* posHTInfo, u8* len, u8 isEncrypt);
3284extern void HTConstructRT2RTAggElement(struct rtllib_device* ieee, u8* posRT2RTAgg, u8* len);
3285extern void HTOnAssocRsp(struct rtllib_device *ieee);
3286extern void HTInitializeHTInfo(struct rtllib_device* ieee);
3287extern void HTInitializeBssDesc(PBSS_HT pBssHT);
3288extern void HTResetSelfAndSavePeerSetting(struct rtllib_device* ieee, struct rtllib_network * pNetwork);
3289extern void HTUpdateSelfAndPeerSetting(struct rtllib_device* ieee, struct rtllib_network * pNetwork);
3290extern u8 HTGetHighestMCSRate(struct rtllib_device* ieee, u8* pMCSRateSet, u8* pMCSFilter);
3291extern u8 MCS_FILTER_ALL[];
3292extern u16 MCS_DATA_RATE[2][2][77] ;
3293extern u8 HTCCheck(struct rtllib_device* ieee, u8* pFrame);
3294extern void HTResetIOTSetting(PRT_HIGH_THROUGHPUT pHTInfo);
3295extern bool IsHTHalfNmodeAPs(struct rtllib_device* ieee);
3296extern u16 HTHalfMcsToDataRate(struct rtllib_device* ieee, u8 nMcsRate);
3297extern u16 HTMcsToDataRate( struct rtllib_device* ieee, u8 nMcsRate);
3298extern u16 TxCountToDataRate( struct rtllib_device* ieee, u8 nDataRate);
3299extern int rtllib_rx_ADDBAReq( struct rtllib_device* ieee, struct sk_buff *skb);
3300extern int rtllib_rx_ADDBARsp( struct rtllib_device* ieee, struct sk_buff *skb);
3301extern int rtllib_rx_DELBA(struct rtllib_device* ieee,struct sk_buff *skb);
3302extern void TsInitAddBA( struct rtllib_device* ieee, PTX_TS_RECORD pTS, u8 Policy, u8 bOverwritePending);
3303extern void TsInitDelBA( struct rtllib_device* ieee, PTS_COMMON_INFO pTsCommonInfo, TR_SELECT TxRxSelect);
3304extern void BaSetupTimeOut(unsigned long data);
3305extern void TxBaInactTimeout(unsigned long data);
3306extern void RxBaInactTimeout(unsigned long data);
3307extern void ResetBaEntry( PBA_RECORD pBA);
3308extern bool GetTs(
3309 struct rtllib_device* ieee,
3310 PTS_COMMON_INFO *ppTS,
3311 u8* Addr,
3312 u8 TID,
3313 TR_SELECT TxRxSelect,
3314 bool bAddNewTs
3315 );
3316extern void TSInitialize(struct rtllib_device *ieee);
3317extern void TsStartAddBaProcess(struct rtllib_device* ieee, PTX_TS_RECORD pTxTS);
3318extern void RemovePeerTS(struct rtllib_device* ieee, u8* Addr);
3319extern void RemoveAllTS(struct rtllib_device* ieee);
3320void rtllib_softmac_scan_syncro(struct rtllib_device *ieee, u8 is_mesh);
3321
3322extern const long rtllib_wlan_frequencies[];
3323
3324extern inline void rtllib_increment_scans(struct rtllib_device *ieee)
3325{
3326 ieee->scans++;
3327}
3328
3329extern inline int rtllib_get_scans(struct rtllib_device *ieee)
3330{
3331 return ieee->scans;
3332}
3333
3334static inline const char *escape_essid(const char *essid, u8 essid_len) {
3335 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
3336 const char *s = essid;
3337 char *d = escaped;
3338
3339 if (rtllib_is_empty_essid(essid, essid_len)) {
3340 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
3341 return escaped;
3342 }
3343
3344 essid_len = min(essid_len, (u8)IW_ESSID_MAX_SIZE);
3345 while (essid_len--) {
3346 if (*s == '\0') {
3347 *d++ = '\\';
3348 *d++ = '0';
3349 s++;
3350 } else {
3351 *d++ = *s++;
3352 }
3353 }
3354 *d = '\0';
3355 return escaped;
3356}
3357
3358#define CONVERT_RATE(_ieee, _MGN_RATE) (_MGN_RATE<MGN_MCS0)?(_MGN_RATE):(HTMcsToDataRate(_ieee, (u8)_MGN_RATE))
3359
3360/* fun with the built-in rtllib stack... */
3361int rtllib_init(void);
3362void rtllib_exit(void);
3363int rtllib_crypto_init(void);
3364void rtllib_crypto_deinit(void);
3365int rtllib_crypto_tkip_init(void);
3366void rtllib_crypto_tkip_exit(void);
3367int rtllib_crypto_ccmp_init(void);
3368void rtllib_crypto_ccmp_exit(void);
3369int rtllib_crypto_wep_init(void);
3370void rtllib_crypto_wep_exit(void);
3371
3372void rtllib_MgntDisconnectIBSS(struct rtllib_device* rtllib);
3373void rtllib_MlmeDisassociateRequest(struct rtllib_device* rtllib, u8* asSta,u8 asRsn);
3374void rtllib_MgntDisconnectAP(struct rtllib_device* rtllib, u8 asRsn);
3375bool rtllib_MgntDisconnect(struct rtllib_device* rtllib,u8 asRsn);
3376
3377
3378/* For the function is more related to hardware setting, it's better to use the
3379 * ieee handler to refer to it.
3380 */
3381extern void rtllib_update_active_chan_map(struct rtllib_device *ieee);
3382extern void rtllib_FlushRxTsPendingPkts(struct rtllib_device *ieee, PRX_TS_RECORD pTS);
3383extern int rtllib_data_xmit(struct sk_buff *skb, struct net_device *dev);
3384extern int rtllib_parse_info_param(struct rtllib_device *ieee,
3385 struct rtllib_info_element *info_element,
3386 u16 length,
3387 struct rtllib_network *network,
3388 struct rtllib_rx_stats *stats);
3389
3390void rtllib_indicate_packets(struct rtllib_device *ieee, struct rtllib_rxb** prxbIndicateArray,u8 index);
3391#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
3392extern void IbssAgeFunction(struct rtllib_device *ieee);
3393extern struct sta_info *GetStaInfo(struct rtllib_device *ieee, u8 *addr);
3394extern void DelStaInfoList(struct rtllib_device *ieee);
3395extern void DelStaInfo(struct rtllib_device *ieee, u8 *addr);
3396#endif
3397extern u8 HTFilterMCSRate( struct rtllib_device* ieee, u8* pSupportMCS, u8* pOperateMCS);
3398extern void HTUseDefaultSetting(struct rtllib_device* ieee);
3399#define RT_ASOC_RETRY_LIMIT 5
3400u8 MgntQuery_TxRateExcludeCCKRates(struct rtllib_device *ieee);
3401extern void rtllib_TURBO_Info(struct rtllib_device *ieee, u8 **tag_p);
3402#ifndef ENABLE_LOCK_DEBUG
3403#define SPIN_LOCK_IEEE(plock) spin_lock_irqsave((plock), flags)
3404#define SPIN_UNLOCK_IEEE(plock) spin_unlock_irqrestore((plock), flags)
3405#define SPIN_LOCK_IEEE_REORDER(plock) spin_lock_irqsave((plock), flags)
3406#define SPIN_UNLOCK_IEEE_REORDER(plock) spin_unlock_irqrestore((plock), flags)
3407#define SPIN_LOCK_IEEE_WPAX(plock) spin_lock_irqsave((plock), flags)
3408#define SPIN_UNLOCK_IEEE_WPAX(plock) spin_unlock_irqrestore((plock), flags)
3409#define SPIN_LOCK_IEEE_MGNTTX(plock) spin_lock_irqsave((plock), flags)
3410#define SPIN_UNLOCK_IEEE_MGNTTX(plock) spin_unlock_irqrestore((plock), flags)
3411#define SPIN_LOCK_IEEE_BCN(plock) spin_lock_irqsave((plock), flags)
3412#define SPIN_UNLOCK_IEEE_BCN(plock) spin_unlock_irqrestore((plock), flags)
3413#define SPIN_LOCK_MSH_STAINFO(plock) spin_lock_irqsave((plock), flags)
3414#define SPIN_UNLOCK_MSH_STAINFO(plock) spin_unlock_irqrestore((plock), flags)
3415#define SPIN_LOCK_MSH_PREQ(plock) spin_lock_irqsave((plock), flags)
3416#define SPIN_UNLOCK_MSH_PREQ(plock) spin_unlock_irqrestore((plock), flags)
3417#define SPIN_LOCK_MSH_QUEUE(plock) spin_lock_irqsave((plock), flags)
3418#define SPIN_UNLOCK_MSH_QUEUE(plock) spin_unlock_irqrestore((plock), flags)
3419#define SPIN_LOCK_PRIV_RFPS(plock) spin_lock_irqsave((plock), flags)
3420#define SPIN_UNLOCK_PRIV_RFPS(plock) spin_unlock_irqrestore((plock), flags)
3421#define SPIN_LOCK_PRIV_IRQTH(plock) spin_lock_irqsave((plock), flags)
3422#define SPIN_UNLOCK_PRIV_IRQTH(plock) spin_unlock_irqrestore((plock), flags)
3423#define SPIN_LOCK_PRIV_TX(plock) spin_lock_irqsave((plock), flags)
3424#define SPIN_UNLOCK_PRIV_TX(plock) spin_unlock_irqrestore((plock), flags)
3425#define SPIN_LOCK_PRIV_D3(plock) spin_lock_irqsave((plock), flags)
3426#define SPIN_UNLOCK_PRIV_D3(plock) spin_unlock_irqrestore((plock), flags)
3427#define SPIN_LOCK_PRIV_RF(plock) spin_lock_irqsave((plock), flags)
3428#define SPIN_UNLOCK_PRIV_RF(plock) spin_unlock_irqrestore((plock), flags)
3429#define SPIN_LOCK_PRIV_PS(plock) spin_lock_irqsave((plock), flags)
3430#define SPIN_UNLOCK_PRIV_PS(plock) spin_unlock_irqrestore((plock), flags)
3431#define SEM_DOWN_IEEE_WX(psem) down(psem)
3432#define SEM_UP_IEEE_WX(psem) up(psem)
3433#define SEM_DOWN_IEEE_SCAN(psem) down(psem)
3434#define SEM_UP_IEEE_SCAN(psem) up(psem)
3435#define SEM_DOWN_IEEE_IPS(psem) down(psem)
3436#define SEM_UP_IEEE_IPS(psem) up(psem)
3437#define SEM_DOWN_PRIV_WX(psem) down(psem)
3438#define SEM_UP_PRIV_WX(psem) up(psem)
3439#define SEM_DOWN_PRIV_RF(psem) down(psem)
3440#define SEM_UP_PRIV_RF(psem) up(psem)
3441#define MUTEX_LOCK_PRIV(pmutex) mutex_lock(pmutex)
3442#define MUTEX_UNLOCK_PRIV(pmutex) mutex_unlock(pmutex)
3443#endif
3444static inline void dump_buf(u8 *buf, u32 len)
3445{
3446 u32 i;
3447 printk("-----------------Len %d----------------\n", len);
3448 for (i=0; i<len; i++)
3449 printk("%2.2x-", *(buf+i));
3450 printk("\n");
3451}
3452#endif /* RTLLIB_H */
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt.c b/drivers/staging/rtl8192e/rtllib_crypt.c
index 61fd4ced452..225d28a7754 100644
--- a/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt.c
+++ b/drivers/staging/rtl8192e/rtllib_crypt.c
@@ -11,41 +11,37 @@
11 * 11 *
12 */ 12 */
13 13
14//#include <linux/config.h> 14#include <linux/version.h>
15#include <linux/module.h> 15#include <linux/module.h>
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/slab.h> 17#include <linux/slab.h>
18#include <asm/string.h> 18#include <asm/string.h>
19#include <asm/errno.h> 19#include <asm/errno.h>
20 20
21#include "ieee80211.h" 21#include "rtllib.h"
22 22
23//MODULE_AUTHOR("Jouni Malinen"); 23struct rtllib_crypto_alg {
24//MODULE_DESCRIPTION("HostAP crypto");
25//MODULE_LICENSE("GPL");
26
27struct ieee80211_crypto_alg {
28 struct list_head list; 24 struct list_head list;
29 struct ieee80211_crypto_ops *ops; 25 struct rtllib_crypto_ops *ops;
30}; 26};
31 27
32 28
33struct ieee80211_crypto { 29struct rtllib_crypto {
34 struct list_head algs; 30 struct list_head algs;
35 spinlock_t lock; 31 spinlock_t lock;
36}; 32};
37 33
38static struct ieee80211_crypto *hcrypt; 34static struct rtllib_crypto *hcrypt;
39 35
40void ieee80211_crypt_deinit_entries(struct ieee80211_device *ieee, 36void rtllib_crypt_deinit_entries(struct rtllib_device *ieee,
41 int force) 37 int force)
42{ 38{
43 struct list_head *ptr, *n; 39 struct list_head *ptr, *n;
44 struct ieee80211_crypt_data *entry; 40 struct rtllib_crypt_data *entry;
45 41
46 for (ptr = ieee->crypt_deinit_list.next, n = ptr->next; 42 for (ptr = ieee->crypt_deinit_list.next, n = ptr->next;
47 ptr != &ieee->crypt_deinit_list; ptr = n, n = ptr->next) { 43 ptr != &ieee->crypt_deinit_list; ptr = n, n = ptr->next) {
48 entry = list_entry(ptr, struct ieee80211_crypt_data, list); 44 entry = list_entry(ptr, struct rtllib_crypt_data, list);
49 45
50 if (atomic_read(&entry->refcnt) != 0 && !force) 46 if (atomic_read(&entry->refcnt) != 0 && !force)
51 continue; 47 continue;
@@ -58,13 +54,13 @@ void ieee80211_crypt_deinit_entries(struct ieee80211_device *ieee,
58 } 54 }
59} 55}
60 56
61void ieee80211_crypt_deinit_handler(unsigned long data) 57void rtllib_crypt_deinit_handler(unsigned long data)
62{ 58{
63 struct ieee80211_device *ieee = (struct ieee80211_device *)data; 59 struct rtllib_device *ieee = (struct rtllib_device *)data;
64 unsigned long flags; 60 unsigned long flags;
65 61
66 spin_lock_irqsave(&ieee->lock, flags); 62 spin_lock_irqsave(&ieee->lock, flags);
67 ieee80211_crypt_deinit_entries(ieee, 0); 63 rtllib_crypt_deinit_entries(ieee, 0);
68 if (!list_empty(&ieee->crypt_deinit_list)) { 64 if (!list_empty(&ieee->crypt_deinit_list)) {
69 printk(KERN_DEBUG "%s: entries remaining in delayed crypt " 65 printk(KERN_DEBUG "%s: entries remaining in delayed crypt "
70 "deletion list\n", ieee->dev->name); 66 "deletion list\n", ieee->dev->name);
@@ -75,10 +71,10 @@ void ieee80211_crypt_deinit_handler(unsigned long data)
75 71
76} 72}
77 73
78void ieee80211_crypt_delayed_deinit(struct ieee80211_device *ieee, 74void rtllib_crypt_delayed_deinit(struct rtllib_device *ieee,
79 struct ieee80211_crypt_data **crypt) 75 struct rtllib_crypt_data **crypt)
80{ 76{
81 struct ieee80211_crypt_data *tmp; 77 struct rtllib_crypt_data *tmp;
82 unsigned long flags; 78 unsigned long flags;
83 79
84 if (*crypt == NULL) 80 if (*crypt == NULL)
@@ -100,43 +96,44 @@ void ieee80211_crypt_delayed_deinit(struct ieee80211_device *ieee,
100 spin_unlock_irqrestore(&ieee->lock, flags); 96 spin_unlock_irqrestore(&ieee->lock, flags);
101} 97}
102 98
103int ieee80211_register_crypto_ops(struct ieee80211_crypto_ops *ops) 99int rtllib_register_crypto_ops(struct rtllib_crypto_ops *ops)
104{ 100{
105 unsigned long flags; 101 unsigned long flags;
106 struct ieee80211_crypto_alg *alg; 102 struct rtllib_crypto_alg *alg;
107 103
108 if (hcrypt == NULL) 104 if (hcrypt == NULL)
109 return -1; 105 return -1;
110 106
111 alg = kzalloc(sizeof(*alg), GFP_KERNEL); 107 alg = kmalloc(sizeof(*alg), GFP_KERNEL);
112 if (alg == NULL) 108 if (alg == NULL)
113 return -ENOMEM; 109 return -ENOMEM;
114 110
111 memset(alg, 0, sizeof(*alg));
115 alg->ops = ops; 112 alg->ops = ops;
116 113
117 spin_lock_irqsave(&hcrypt->lock, flags); 114 spin_lock_irqsave(&hcrypt->lock, flags);
118 list_add(&alg->list, &hcrypt->algs); 115 list_add(&alg->list, &hcrypt->algs);
119 spin_unlock_irqrestore(&hcrypt->lock, flags); 116 spin_unlock_irqrestore(&hcrypt->lock, flags);
120 117
121 printk(KERN_DEBUG "ieee80211_crypt: registered algorithm '%s'\n", 118 printk(KERN_DEBUG "rtllib_crypt: registered algorithm '%s'\n",
122 ops->name); 119 ops->name);
123 120
124 return 0; 121 return 0;
125} 122}
126 123
127int ieee80211_unregister_crypto_ops(struct ieee80211_crypto_ops *ops) 124int rtllib_unregister_crypto_ops(struct rtllib_crypto_ops *ops)
128{ 125{
129 unsigned long flags; 126 unsigned long flags;
130 struct list_head *ptr; 127 struct list_head *ptr;
131 struct ieee80211_crypto_alg *del_alg = NULL; 128 struct rtllib_crypto_alg *del_alg = NULL;
132 129
133 if (hcrypt == NULL) 130 if (hcrypt == NULL)
134 return -1; 131 return -1;
135 132
136 spin_lock_irqsave(&hcrypt->lock, flags); 133 spin_lock_irqsave(&hcrypt->lock, flags);
137 for (ptr = hcrypt->algs.next; ptr != &hcrypt->algs; ptr = ptr->next) { 134 for (ptr = hcrypt->algs.next; ptr != &hcrypt->algs; ptr = ptr->next) {
138 struct ieee80211_crypto_alg *alg = 135 struct rtllib_crypto_alg *alg =
139 (struct ieee80211_crypto_alg *) ptr; 136 (struct rtllib_crypto_alg *) ptr;
140 if (alg->ops == ops) { 137 if (alg->ops == ops) {
141 list_del(&alg->list); 138 list_del(&alg->list);
142 del_alg = alg; 139 del_alg = alg;
@@ -146,7 +143,7 @@ int ieee80211_unregister_crypto_ops(struct ieee80211_crypto_ops *ops)
146 spin_unlock_irqrestore(&hcrypt->lock, flags); 143 spin_unlock_irqrestore(&hcrypt->lock, flags);
147 144
148 if (del_alg) { 145 if (del_alg) {
149 printk(KERN_DEBUG "ieee80211_crypt: unregistered algorithm " 146 printk(KERN_DEBUG "rtllib_crypt: unregistered algorithm "
150 "'%s'\n", ops->name); 147 "'%s'\n", ops->name);
151 kfree(del_alg); 148 kfree(del_alg);
152 } 149 }
@@ -155,19 +152,19 @@ int ieee80211_unregister_crypto_ops(struct ieee80211_crypto_ops *ops)
155} 152}
156 153
157 154
158struct ieee80211_crypto_ops * ieee80211_get_crypto_ops(const char *name) 155struct rtllib_crypto_ops * rtllib_get_crypto_ops(const char *name)
159{ 156{
160 unsigned long flags; 157 unsigned long flags;
161 struct list_head *ptr; 158 struct list_head *ptr;
162 struct ieee80211_crypto_alg *found_alg = NULL; 159 struct rtllib_crypto_alg *found_alg = NULL;
163 160
164 if (hcrypt == NULL) 161 if (hcrypt == NULL)
165 return NULL; 162 return NULL;
166 163
167 spin_lock_irqsave(&hcrypt->lock, flags); 164 spin_lock_irqsave(&hcrypt->lock, flags);
168 for (ptr = hcrypt->algs.next; ptr != &hcrypt->algs; ptr = ptr->next) { 165 for (ptr = hcrypt->algs.next; ptr != &hcrypt->algs; ptr = ptr->next) {
169 struct ieee80211_crypto_alg *alg = 166 struct rtllib_crypto_alg *alg =
170 (struct ieee80211_crypto_alg *) ptr; 167 (struct rtllib_crypto_alg *) ptr;
171 if (strcmp(alg->ops->name, name) == 0) { 168 if (strcmp(alg->ops->name, name) == 0) {
172 found_alg = alg; 169 found_alg = alg;
173 break; 170 break;
@@ -182,13 +179,13 @@ struct ieee80211_crypto_ops * ieee80211_get_crypto_ops(const char *name)
182} 179}
183 180
184 181
185static void * ieee80211_crypt_null_init(int keyidx) { return (void *) 1; } 182static void * rtllib_crypt_null_init(int keyidx) { return (void *) 1; }
186static void ieee80211_crypt_null_deinit(void *priv) {} 183static void rtllib_crypt_null_deinit(void *priv) {}
187 184
188static struct ieee80211_crypto_ops ieee80211_crypt_null = { 185static struct rtllib_crypto_ops rtllib_crypt_null = {
189 .name = "NULL", 186 .name = "NULL",
190 .init = ieee80211_crypt_null_init, 187 .init = rtllib_crypt_null_init,
191 .deinit = ieee80211_crypt_null_deinit, 188 .deinit = rtllib_crypt_null_deinit,
192 .encrypt_mpdu = NULL, 189 .encrypt_mpdu = NULL,
193 .decrypt_mpdu = NULL, 190 .decrypt_mpdu = NULL,
194 .encrypt_msdu = NULL, 191 .encrypt_msdu = NULL,
@@ -201,18 +198,19 @@ static struct ieee80211_crypto_ops ieee80211_crypt_null = {
201}; 198};
202 199
203 200
204int __init ieee80211_crypto_init(void) 201int __init rtllib_crypto_init(void)
205{ 202{
206 int ret = -ENOMEM; 203 int ret = -ENOMEM;
207 204
208 hcrypt = kzalloc(sizeof(*hcrypt), GFP_KERNEL); 205 hcrypt = kmalloc(sizeof(*hcrypt), GFP_KERNEL);
209 if (!hcrypt) 206 if (!hcrypt)
210 goto out; 207 goto out;
211 208
209 memset(hcrypt, 0, sizeof(*hcrypt));
212 INIT_LIST_HEAD(&hcrypt->algs); 210 INIT_LIST_HEAD(&hcrypt->algs);
213 spin_lock_init(&hcrypt->lock); 211 spin_lock_init(&hcrypt->lock);
214 212
215 ret = ieee80211_register_crypto_ops(&ieee80211_crypt_null); 213 ret = rtllib_register_crypto_ops(&rtllib_crypt_null);
216 if (ret < 0) { 214 if (ret < 0) {
217 kfree(hcrypt); 215 kfree(hcrypt);
218 hcrypt = NULL; 216 hcrypt = NULL;
@@ -222,7 +220,7 @@ out:
222} 220}
223 221
224 222
225void ieee80211_crypto_deinit(void) 223void __exit rtllib_crypto_deinit(void)
226{ 224{
227 struct list_head *ptr, *n; 225 struct list_head *ptr, *n;
228 226
@@ -231,14 +229,13 @@ void ieee80211_crypto_deinit(void)
231 229
232 for (ptr = hcrypt->algs.next, n = ptr->next; ptr != &hcrypt->algs; 230 for (ptr = hcrypt->algs.next, n = ptr->next; ptr != &hcrypt->algs;
233 ptr = n, n = ptr->next) { 231 ptr = n, n = ptr->next) {
234 struct ieee80211_crypto_alg *alg = 232 struct rtllib_crypto_alg *alg =
235 (struct ieee80211_crypto_alg *) ptr; 233 (struct rtllib_crypto_alg *) ptr;
236 list_del(ptr); 234 list_del(ptr);
237 printk(KERN_DEBUG "ieee80211_crypt: unregistered algorithm " 235 printk(KERN_DEBUG "rtllib_crypt: unregistered algorithm "
238 "'%s' (deinit)\n", alg->ops->name); 236 "'%s' (deinit)\n", alg->ops->name);
239 kfree(alg); 237 kfree(alg);
240 } 238 }
241 239
242 kfree(hcrypt); 240 kfree(hcrypt);
243} 241}
244
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt.h b/drivers/staging/rtl8192e/rtllib_crypt.h
index ca7dd0dda82..5f8990c2ae0 100644
--- a/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt.h
+++ b/drivers/staging/rtl8192e/rtllib_crypt.h
@@ -18,14 +18,14 @@
18 */ 18 */
19 19
20/* 20/*
21 * This file defines the interface to the ieee80211 crypto module. 21 * This file defines the interface to the rtllib crypto module.
22 */ 22 */
23#ifndef IEEE80211_CRYPT_H 23#ifndef RTLLIB_CRYPT_H
24#define IEEE80211_CRYPT_H 24#define RTLLIB_CRYPT_H
25 25
26#include <linux/skbuff.h> 26#include <linux/skbuff.h>
27 27
28struct ieee80211_crypto_ops { 28struct rtllib_crypto_ops {
29 const char *name; 29 const char *name;
30 30
31 /* init new crypto context (e.g., allocate private data space, 31 /* init new crypto context (e.g., allocate private data space,
@@ -49,7 +49,7 @@ struct ieee80211_crypto_ops {
49 * These can be NULL if full MSDU operations are not needed. */ 49 * These can be NULL if full MSDU operations are not needed. */
50 int (*encrypt_msdu)(struct sk_buff *skb, int hdr_len, void *priv); 50 int (*encrypt_msdu)(struct sk_buff *skb, int hdr_len, void *priv);
51 int (*decrypt_msdu)(struct sk_buff *skb, int keyidx, int hdr_len, 51 int (*decrypt_msdu)(struct sk_buff *skb, int keyidx, int hdr_len,
52 void *priv); 52 void *priv, struct rtllib_device* ieee);
53 53
54 int (*set_key)(void *key, int len, u8 *seq, void *priv); 54 int (*set_key)(void *key, int len, u8 *seq, void *priv);
55 int (*get_key)(void *key, int len, u8 *seq, void *priv); 55 int (*get_key)(void *key, int len, u8 *seq, void *priv);
@@ -68,18 +68,26 @@ struct ieee80211_crypto_ops {
68 struct module *owner; 68 struct module *owner;
69}; 69};
70 70
71struct ieee80211_crypt_data { 71struct rtllib_crypt_data {
72 struct list_head list; /* delayed deletion list */ 72 struct list_head list; /* delayed deletion list */
73 struct ieee80211_crypto_ops *ops; 73 struct rtllib_crypto_ops *ops;
74 void *priv; 74 void *priv;
75 atomic_t refcnt; 75 atomic_t refcnt;
76}; 76};
77 77
78int ieee80211_register_crypto_ops(struct ieee80211_crypto_ops *ops); 78int rtllib_register_crypto_ops(struct rtllib_crypto_ops *ops);
79int ieee80211_unregister_crypto_ops(struct ieee80211_crypto_ops *ops); 79int rtllib_unregister_crypto_ops(struct rtllib_crypto_ops *ops);
80struct ieee80211_crypto_ops * ieee80211_get_crypto_ops(const char *name); 80struct rtllib_crypto_ops * rtllib_get_crypto_ops(const char *name);
81void ieee80211_crypt_deinit_entries(struct ieee80211_device *, int); 81void rtllib_crypt_deinit_entries(struct rtllib_device *, int);
82void ieee80211_crypt_deinit_handler(unsigned long); 82void rtllib_crypt_deinit_handler(unsigned long);
83void ieee80211_crypt_delayed_deinit(struct ieee80211_device *ieee, 83void rtllib_crypt_delayed_deinit(struct rtllib_device *ieee,
84 struct ieee80211_crypt_data **crypt); 84 struct rtllib_crypt_data **crypt);
85#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
86#define offset_in_page(p) ((unsigned long)(p) & ~PAGE_MASK)
87#endif
88#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,31))
89#define crypto_alloc_tfm crypto_alloc_tfm_rsl
90#define crypto_free_tfm crypto_free_tfm_rsl
91#endif
92
85#endif 93#endif
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_ccmp.c b/drivers/staging/rtl8192e/rtllib_crypt_ccmp.c
index 48267a058d1..80b56b4e60b 100644
--- a/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_ccmp.c
+++ b/drivers/staging/rtl8192e/rtllib_crypt_ccmp.c
@@ -9,7 +9,7 @@
9 * more details. 9 * more details.
10 */ 10 */
11 11
12//#include <linux/config.h> 12#include <linux/version.h>
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/slab.h> 15#include <linux/slab.h>
@@ -20,19 +20,18 @@
20#include <linux/if_arp.h> 20#include <linux/if_arp.h>
21#include <asm/string.h> 21#include <asm/string.h>
22#include <linux/wireless.h> 22#include <linux/wireless.h>
23#include "rtllib.h"
23 24
24#include "ieee80211.h" 25#if defined(BUILT_IN_CRYPTO) || (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
25 26#include "rtl_crypto.h"
27#else
26#include <linux/crypto.h> 28#include <linux/crypto.h>
29#endif
27 30
31#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
32 #include <asm/scatterlist.h>
33#else
28 #include <linux/scatterlist.h> 34 #include <linux/scatterlist.h>
29
30MODULE_AUTHOR("Jouni Malinen");
31MODULE_DESCRIPTION("Host AP crypt: CCMP");
32MODULE_LICENSE("GPL");
33
34#ifndef OPENSUSE_SLED
35#define OPENSUSE_SLED 0
36#endif 35#endif
37 36
38#define AES_BLOCK_LEN 16 37#define AES_BLOCK_LEN 16
@@ -41,7 +40,7 @@ MODULE_LICENSE("GPL");
41#define CCMP_TK_LEN 16 40#define CCMP_TK_LEN 16
42#define CCMP_PN_LEN 6 41#define CCMP_PN_LEN 6
43 42
44struct ieee80211_ccmp_data { 43struct rtllib_ccmp_data {
45 u8 key[CCMP_TK_LEN]; 44 u8 key[CCMP_TK_LEN];
46 int key_set; 45 int key_set;
47 46
@@ -62,34 +61,68 @@ struct ieee80211_ccmp_data {
62 u8 rx_b0[AES_BLOCK_LEN], rx_b[AES_BLOCK_LEN], rx_a[AES_BLOCK_LEN]; 61 u8 rx_b0[AES_BLOCK_LEN], rx_b[AES_BLOCK_LEN], rx_a[AES_BLOCK_LEN];
63}; 62};
64 63
65void ieee80211_ccmp_aes_encrypt(struct crypto_tfm *tfm, 64void rtllib_ccmp_aes_encrypt(struct crypto_tfm *tfm,
66 const u8 pt[16], u8 ct[16]) 65 const u8 pt[16], u8 ct[16])
67{ 66{
67#if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
68 struct scatterlist src, dst;
69
70#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
71 src.page = virt_to_page(pt);
72 src.offset = offset_in_page(pt);
73 src.length = AES_BLOCK_LEN;
74
75 dst.page = virt_to_page(ct);
76 dst.offset = offset_in_page(ct);
77 dst.length = AES_BLOCK_LEN;
78
79#else
80 sg_init_one(&src, pt, AES_BLOCK_LEN);
81 sg_init_one(&dst, ct, AES_BLOCK_LEN);
82#endif
83
84 crypto_cipher_encrypt(tfm, &dst, &src, AES_BLOCK_LEN);
85#else
68 crypto_cipher_encrypt_one((void*)tfm, ct, pt); 86 crypto_cipher_encrypt_one((void*)tfm, ct, pt);
87#endif
69} 88}
70 89
71static void * ieee80211_ccmp_init(int key_idx) 90static void * rtllib_ccmp_init(int key_idx)
72{ 91{
73 struct ieee80211_ccmp_data *priv; 92 struct rtllib_ccmp_data *priv;
74 93
75 priv = kzalloc(sizeof(*priv), GFP_ATOMIC); 94 priv = kmalloc(sizeof(*priv), GFP_ATOMIC);
76 if (priv == NULL) 95 if (priv == NULL)
77 goto fail; 96 goto fail;
97 memset(priv, 0, sizeof(*priv));
78 priv->key_idx = key_idx; 98 priv->key_idx = key_idx;
79 99
100#if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
101 priv->tfm = crypto_alloc_tfm("aes", 0);
102 if (priv->tfm == NULL) {
103 printk(KERN_DEBUG "rtllib_crypt_ccmp: could not allocate "
104 "crypto API aes\n");
105 goto fail;
106 }
107 #else
80 priv->tfm = (void*)crypto_alloc_cipher("aes", 0, CRYPTO_ALG_ASYNC); 108 priv->tfm = (void*)crypto_alloc_cipher("aes", 0, CRYPTO_ALG_ASYNC);
81 if (IS_ERR(priv->tfm)) { 109 if (IS_ERR(priv->tfm)) {
82 printk(KERN_DEBUG "ieee80211_crypt_ccmp: could not allocate " 110 printk(KERN_DEBUG "rtllib_crypt_ccmp: could not allocate "
83 "crypto API aes\n"); 111 "crypto API aes\n");
84 priv->tfm = NULL; 112 priv->tfm = NULL;
85 goto fail; 113 goto fail;
86 } 114 }
115 #endif
87 return priv; 116 return priv;
88 117
89fail: 118fail:
90 if (priv) { 119 if (priv) {
91 if (priv->tfm) 120 if (priv->tfm)
121 #if defined(BUILT_IN_CRYPTO) || (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
122 crypto_free_tfm(priv->tfm);
123 #else
92 crypto_free_cipher((void*)priv->tfm); 124 crypto_free_cipher((void*)priv->tfm);
125 #endif
93 kfree(priv); 126 kfree(priv);
94 } 127 }
95 128
@@ -97,11 +130,15 @@ fail:
97} 130}
98 131
99 132
100static void ieee80211_ccmp_deinit(void *priv) 133static void rtllib_ccmp_deinit(void *priv)
101{ 134{
102 struct ieee80211_ccmp_data *_priv = priv; 135 struct rtllib_ccmp_data *_priv = priv;
103 if (_priv && _priv->tfm) 136 if (_priv && _priv->tfm)
137#if defined(BUILT_IN_CRYPTO) || (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
138 crypto_free_tfm(_priv->tfm);
139#else
104 crypto_free_cipher((void*)_priv->tfm); 140 crypto_free_cipher((void*)_priv->tfm);
141#endif
105 kfree(priv); 142 kfree(priv);
106} 143}
107 144
@@ -116,7 +153,7 @@ static inline void xor_block(u8 *b, u8 *a, size_t len)
116 153
117 154
118static void ccmp_init_blocks(struct crypto_tfm *tfm, 155static void ccmp_init_blocks(struct crypto_tfm *tfm,
119 struct ieee80211_hdr_4addr *hdr, 156 struct rtllib_hdr_4addr *hdr,
120 u8 *pn, size_t dlen, u8 *b0, u8 *auth, 157 u8 *pn, size_t dlen, u8 *b0, u8 *auth,
121 u8 *s0) 158 u8 *s0)
122{ 159{
@@ -127,14 +164,13 @@ static void ccmp_init_blocks(struct crypto_tfm *tfm,
127 u8 aad[2 * AES_BLOCK_LEN]; 164 u8 aad[2 * AES_BLOCK_LEN];
128 165
129 fc = le16_to_cpu(hdr->frame_ctl); 166 fc = le16_to_cpu(hdr->frame_ctl);
130 a4_included = ((fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) == 167 a4_included = ((fc & (RTLLIB_FCTL_TODS | RTLLIB_FCTL_FROMDS)) ==
131 (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)); 168 (RTLLIB_FCTL_TODS | RTLLIB_FCTL_FROMDS));
132 /* 169 /*
133 qc_included = ((WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_DATA) && 170 qc_included = ((WLAN_FC_GET_TYPE(fc) == RTLLIB_FTYPE_DATA) &&
134 (WLAN_FC_GET_STYPE(fc) & 0x08)); 171 (WLAN_FC_GET_STYPE(fc) & 0x08));
135 */ 172 */
136 // fixed by David :2006.9.6 173 qc_included = ((WLAN_FC_GET_TYPE(fc) == RTLLIB_FTYPE_DATA) &&
137 qc_included = ((WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_DATA) &&
138 (WLAN_FC_GET_STYPE(fc) & 0x80)); 174 (WLAN_FC_GET_STYPE(fc) & 0x80));
139 aad_len = 22; 175 aad_len = 22;
140 if (a4_included) 176 if (a4_included)
@@ -183,26 +219,25 @@ static void ccmp_init_blocks(struct crypto_tfm *tfm,
183 } 219 }
184 220
185 /* Start with the first block and AAD */ 221 /* Start with the first block and AAD */
186 ieee80211_ccmp_aes_encrypt(tfm, b0, auth); 222 rtllib_ccmp_aes_encrypt(tfm, b0, auth);
187 xor_block(auth, aad, AES_BLOCK_LEN); 223 xor_block(auth, aad, AES_BLOCK_LEN);
188 ieee80211_ccmp_aes_encrypt(tfm, auth, auth); 224 rtllib_ccmp_aes_encrypt(tfm, auth, auth);
189 xor_block(auth, &aad[AES_BLOCK_LEN], AES_BLOCK_LEN); 225 xor_block(auth, &aad[AES_BLOCK_LEN], AES_BLOCK_LEN);
190 ieee80211_ccmp_aes_encrypt(tfm, auth, auth); 226 rtllib_ccmp_aes_encrypt(tfm, auth, auth);
191 b0[0] &= 0x07; 227 b0[0] &= 0x07;
192 b0[14] = b0[15] = 0; 228 b0[14] = b0[15] = 0;
193 ieee80211_ccmp_aes_encrypt(tfm, b0, s0); 229 rtllib_ccmp_aes_encrypt(tfm, b0, s0);
194} 230}
195 231
196 232
197 233
198static int ieee80211_ccmp_encrypt(struct sk_buff *skb, int hdr_len, void *priv) 234static int rtllib_ccmp_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
199{ 235{
200 struct ieee80211_ccmp_data *key = priv; 236 struct rtllib_ccmp_data *key = priv;
201 int data_len, i; 237 int data_len, i;
202 u8 *pos; 238 u8 *pos;
203 struct ieee80211_hdr_4addr *hdr; 239 struct rtllib_hdr_4addr *hdr;
204 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE); 240 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
205
206 if (skb_headroom(skb) < CCMP_HDR_LEN || 241 if (skb_headroom(skb) < CCMP_HDR_LEN ||
207 skb_tailroom(skb) < CCMP_MIC_LEN || 242 skb_tailroom(skb) < CCMP_MIC_LEN ||
208 skb->len < hdr_len) 243 skb->len < hdr_len)
@@ -212,7 +247,6 @@ static int ieee80211_ccmp_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
212 pos = skb_push(skb, CCMP_HDR_LEN); 247 pos = skb_push(skb, CCMP_HDR_LEN);
213 memmove(pos, pos + CCMP_HDR_LEN, hdr_len); 248 memmove(pos, pos + CCMP_HDR_LEN, hdr_len);
214 pos += hdr_len; 249 pos += hdr_len;
215// mic = skb_put(skb, CCMP_MIC_LEN);
216 250
217 i = CCMP_PN_LEN - 1; 251 i = CCMP_PN_LEN - 1;
218 while (i >= 0) { 252 while (i >= 0) {
@@ -232,9 +266,8 @@ static int ieee80211_ccmp_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
232 *pos++ = key->tx_pn[0]; 266 *pos++ = key->tx_pn[0];
233 267
234 268
235 hdr = (struct ieee80211_hdr_4addr *) skb->data; 269 hdr = (struct rtllib_hdr_4addr *) skb->data;
236 if (!tcb_desc->bHwSec) 270 if (!tcb_desc->bHwSec) {
237 {
238 int blocks, last, len; 271 int blocks, last, len;
239 u8 *mic; 272 u8 *mic;
240 u8 *b0 = key->tx_b0; 273 u8 *b0 = key->tx_b0;
@@ -242,7 +275,6 @@ static int ieee80211_ccmp_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
242 u8 *e = key->tx_e; 275 u8 *e = key->tx_e;
243 u8 *s0 = key->tx_s0; 276 u8 *s0 = key->tx_s0;
244 277
245 //mic is moved to here by john
246 mic = skb_put(skb, CCMP_MIC_LEN); 278 mic = skb_put(skb, CCMP_MIC_LEN);
247 279
248 ccmp_init_blocks(key->tfm, hdr, key->tx_pn, data_len, b0, b, s0); 280 ccmp_init_blocks(key->tfm, hdr, key->tx_pn, data_len, b0, b, s0);
@@ -254,11 +286,11 @@ static int ieee80211_ccmp_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
254 len = (i == blocks && last) ? last : AES_BLOCK_LEN; 286 len = (i == blocks && last) ? last : AES_BLOCK_LEN;
255 /* Authentication */ 287 /* Authentication */
256 xor_block(b, pos, len); 288 xor_block(b, pos, len);
257 ieee80211_ccmp_aes_encrypt(key->tfm, b, b); 289 rtllib_ccmp_aes_encrypt(key->tfm, b, b);
258 /* Encryption, with counter */ 290 /* Encryption, with counter */
259 b0[14] = (i >> 8) & 0xff; 291 b0[14] = (i >> 8) & 0xff;
260 b0[15] = i & 0xff; 292 b0[15] = i & 0xff;
261 ieee80211_ccmp_aes_encrypt(key->tfm, b0, e); 293 rtllib_ccmp_aes_encrypt(key->tfm, b0, e);
262 xor_block(pos, e, len); 294 xor_block(pos, e, len);
263 pos += len; 295 pos += len;
264 } 296 }
@@ -270,11 +302,11 @@ static int ieee80211_ccmp_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
270} 302}
271 303
272 304
273static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv) 305static int rtllib_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
274{ 306{
275 struct ieee80211_ccmp_data *key = priv; 307 struct rtllib_ccmp_data *key = priv;
276 u8 keyidx, *pos; 308 u8 keyidx, *pos;
277 struct ieee80211_hdr_4addr *hdr; 309 struct rtllib_hdr_4addr *hdr;
278 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE); 310 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
279 u8 pn[6]; 311 u8 pn[6];
280 312
@@ -283,13 +315,13 @@ static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
283 return -1; 315 return -1;
284 } 316 }
285 317
286 hdr = (struct ieee80211_hdr_4addr *) skb->data; 318 hdr = (struct rtllib_hdr_4addr *) skb->data;
287 pos = skb->data + hdr_len; 319 pos = skb->data + hdr_len;
288 keyidx = pos[3]; 320 keyidx = pos[3];
289 if (!(keyidx & (1 << 5))) { 321 if (!(keyidx & (1 << 5))) {
290 if (net_ratelimit()) { 322 if (net_ratelimit()) {
291 printk(KERN_DEBUG "CCMP: received packet without ExtIV" 323 printk(KERN_DEBUG "CCMP: received packet without ExtIV"
292 " flag from %pM\n", hdr->addr2); 324 " flag from " MAC_FMT "\n", MAC_ARG(hdr->addr2));
293 } 325 }
294 key->dot11RSNAStatsCCMPFormatErrors++; 326 key->dot11RSNAStatsCCMPFormatErrors++;
295 return -2; 327 return -2;
@@ -302,9 +334,9 @@ static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
302 } 334 }
303 if (!key->key_set) { 335 if (!key->key_set) {
304 if (net_ratelimit()) { 336 if (net_ratelimit()) {
305 printk(KERN_DEBUG "CCMP: received packet from %pM" 337 printk(KERN_DEBUG "CCMP: received packet from " MAC_FMT
306 " with keyid=%d that does not have a configured" 338 " with keyid=%d that does not have a configured"
307 " key\n", hdr->addr2, keyidx); 339 " key\n", MAC_ARG(hdr->addr2), keyidx);
308 } 340 }
309 return -3; 341 return -3;
310 } 342 }
@@ -316,13 +348,11 @@ static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
316 pn[4] = pos[1]; 348 pn[4] = pos[1];
317 pn[5] = pos[0]; 349 pn[5] = pos[0];
318 pos += 8; 350 pos += 8;
319
320 if (memcmp(pn, key->rx_pn, CCMP_PN_LEN) <= 0) { 351 if (memcmp(pn, key->rx_pn, CCMP_PN_LEN) <= 0) {
321 key->dot11RSNAStatsCCMPReplays++; 352 key->dot11RSNAStatsCCMPReplays++;
322 return -4; 353 return -4;
323 } 354 }
324 if (!tcb_desc->bHwSec) 355 if (!tcb_desc->bHwSec) {
325 {
326 size_t data_len = skb->len - hdr_len - CCMP_HDR_LEN - CCMP_MIC_LEN; 356 size_t data_len = skb->len - hdr_len - CCMP_HDR_LEN - CCMP_MIC_LEN;
327 u8 *mic = skb->data + skb->len - CCMP_MIC_LEN; 357 u8 *mic = skb->data + skb->len - CCMP_MIC_LEN;
328 u8 *b0 = key->rx_b0; 358 u8 *b0 = key->rx_b0;
@@ -342,18 +372,18 @@ static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
342 /* Decrypt, with counter */ 372 /* Decrypt, with counter */
343 b0[14] = (i >> 8) & 0xff; 373 b0[14] = (i >> 8) & 0xff;
344 b0[15] = i & 0xff; 374 b0[15] = i & 0xff;
345 ieee80211_ccmp_aes_encrypt(key->tfm, b0, b); 375 rtllib_ccmp_aes_encrypt(key->tfm, b0, b);
346 xor_block(pos, b, len); 376 xor_block(pos, b, len);
347 /* Authentication */ 377 /* Authentication */
348 xor_block(a, pos, len); 378 xor_block(a, pos, len);
349 ieee80211_ccmp_aes_encrypt(key->tfm, a, a); 379 rtllib_ccmp_aes_encrypt(key->tfm, a, a);
350 pos += len; 380 pos += len;
351 } 381 }
352 382
353 if (memcmp(mic, a, CCMP_MIC_LEN) != 0) { 383 if (memcmp(mic, a, CCMP_MIC_LEN) != 0) {
354 if (net_ratelimit()) { 384 if (net_ratelimit()) {
355 printk(KERN_DEBUG "CCMP: decrypt failed: STA=" 385 printk(KERN_DEBUG "CCMP: decrypt failed: STA="
356 "%pM\n", hdr->addr2); 386 MAC_FMT "\n", MAC_ARG(hdr->addr2));
357 } 387 }
358 key->dot11RSNAStatsCCMPDecryptErrors++; 388 key->dot11RSNAStatsCCMPDecryptErrors++;
359 return -5; 389 return -5;
@@ -370,9 +400,9 @@ static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
370} 400}
371 401
372 402
373static int ieee80211_ccmp_set_key(void *key, int len, u8 *seq, void *priv) 403static int rtllib_ccmp_set_key(void *key, int len, u8 *seq, void *priv)
374{ 404{
375 struct ieee80211_ccmp_data *data = priv; 405 struct rtllib_ccmp_data *data = priv;
376 int keyidx; 406 int keyidx;
377 struct crypto_tfm *tfm = data->tfm; 407 struct crypto_tfm *tfm = data->tfm;
378 408
@@ -401,9 +431,9 @@ static int ieee80211_ccmp_set_key(void *key, int len, u8 *seq, void *priv)
401} 431}
402 432
403 433
404static int ieee80211_ccmp_get_key(void *key, int len, u8 *seq, void *priv) 434static int rtllib_ccmp_get_key(void *key, int len, u8 *seq, void *priv)
405{ 435{
406 struct ieee80211_ccmp_data *data = priv; 436 struct rtllib_ccmp_data *data = priv;
407 437
408 if (len < CCMP_TK_LEN) 438 if (len < CCMP_TK_LEN)
409 return -1; 439 return -1;
@@ -425,22 +455,15 @@ static int ieee80211_ccmp_get_key(void *key, int len, u8 *seq, void *priv)
425} 455}
426 456
427 457
428static char * ieee80211_ccmp_print_stats(char *p, void *priv) 458static char * rtllib_ccmp_print_stats(char *p, void *priv)
429{ 459{
430 struct ieee80211_ccmp_data *ccmp = priv; 460 struct rtllib_ccmp_data *ccmp = priv;
431 int i; 461 p += sprintf(p, "key[%d] alg=CCMP key_set=%d "
432 462 "tx_pn=%02x%02x%02x%02x%02x%02x "
433 p += sprintf(p, "key[%d] alg=CCMP key_set=%d tx_pn=", 463 "rx_pn=%02x%02x%02x%02x%02x%02x "
434 ccmp->key_idx, ccmp->key_set); 464 "format_errors=%d replays=%d decrypt_errors=%d\n",
435 465 ccmp->key_idx, ccmp->key_set,
436 for (i = 0; i < ARRAY_SIZE(ccmp->tx_pn); i++) 466 MAC_ARG(ccmp->tx_pn), MAC_ARG(ccmp->rx_pn),
437 p += sprintf(p, "%02x", ccmp->tx_pn[i]);
438
439 sprintf(p, " rx_pn=");
440 for (i = 0; i < ARRAY_SIZE(ccmp->rx_pn); i++)
441 p += sprintf(p, "%02x", ccmp->tx_pn[i]);
442
443 p += sprintf(p, " format_errors=%d replays=%d decrypt_errors=%d\n",
444 ccmp->dot11RSNAStatsCCMPFormatErrors, 467 ccmp->dot11RSNAStatsCCMPFormatErrors,
445 ccmp->dot11RSNAStatsCCMPReplays, 468 ccmp->dot11RSNAStatsCCMPReplays,
446 ccmp->dot11RSNAStatsCCMPDecryptErrors); 469 ccmp->dot11RSNAStatsCCMPDecryptErrors);
@@ -448,36 +471,35 @@ static char * ieee80211_ccmp_print_stats(char *p, void *priv)
448 return p; 471 return p;
449} 472}
450 473
451void ieee80211_ccmp_null(void) 474void rtllib_ccmp_null(void)
452{ 475{
453 return; 476 return;
454} 477}
455 478
456static struct ieee80211_crypto_ops ieee80211_crypt_ccmp = { 479static struct rtllib_crypto_ops rtllib_crypt_ccmp = {
457 .name = "CCMP", 480 .name = "CCMP",
458 .init = ieee80211_ccmp_init, 481 .init = rtllib_ccmp_init,
459 .deinit = ieee80211_ccmp_deinit, 482 .deinit = rtllib_ccmp_deinit,
460 .encrypt_mpdu = ieee80211_ccmp_encrypt, 483 .encrypt_mpdu = rtllib_ccmp_encrypt,
461 .decrypt_mpdu = ieee80211_ccmp_decrypt, 484 .decrypt_mpdu = rtllib_ccmp_decrypt,
462 .encrypt_msdu = NULL, 485 .encrypt_msdu = NULL,
463 .decrypt_msdu = NULL, 486 .decrypt_msdu = NULL,
464 .set_key = ieee80211_ccmp_set_key, 487 .set_key = rtllib_ccmp_set_key,
465 .get_key = ieee80211_ccmp_get_key, 488 .get_key = rtllib_ccmp_get_key,
466 .print_stats = ieee80211_ccmp_print_stats, 489 .print_stats = rtllib_ccmp_print_stats,
467 .extra_prefix_len = CCMP_HDR_LEN, 490 .extra_prefix_len = CCMP_HDR_LEN,
468 .extra_postfix_len = CCMP_MIC_LEN, 491 .extra_postfix_len = CCMP_MIC_LEN,
469 .owner = THIS_MODULE, 492 .owner = THIS_MODULE,
470}; 493};
471 494
472 495
473int __init ieee80211_crypto_ccmp_init(void) 496int __init rtllib_crypto_ccmp_init(void)
474{ 497{
475 return ieee80211_register_crypto_ops(&ieee80211_crypt_ccmp); 498 return rtllib_register_crypto_ops(&rtllib_crypt_ccmp);
476} 499}
477 500
478 501
479void ieee80211_crypto_ccmp_exit(void) 502void __exit rtllib_crypto_ccmp_exit(void)
480{ 503{
481 ieee80211_unregister_crypto_ops(&ieee80211_crypt_ccmp); 504 rtllib_unregister_crypto_ops(&rtllib_crypt_ccmp);
482} 505}
483
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_tkip.c b/drivers/staging/rtl8192e/rtllib_crypt_tkip.c
index ed623a911e4..ad9a62f4c39 100644
--- a/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_tkip.c
+++ b/drivers/staging/rtl8192e/rtllib_crypt_tkip.c
@@ -9,7 +9,7 @@
9 * more details. 9 * more details.
10 */ 10 */
11 11
12//#include <linux/config.h> 12#include <linux/version.h>
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/slab.h> 15#include <linux/slab.h>
@@ -19,24 +19,23 @@
19#include <linux/if_ether.h> 19#include <linux/if_ether.h>
20#include <linux/if_arp.h> 20#include <linux/if_arp.h>
21#include <asm/string.h> 21#include <asm/string.h>
22 22#include "rtllib.h"
23#include "ieee80211.h"
24 23
25 24
25#if defined(BUILT_IN_CRYPTO) || (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
26#include "rtl_crypto.h"
27#else
26#include <linux/crypto.h> 28#include <linux/crypto.h>
27#include <linux/scatterlist.h> 29#endif
30#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
31 #include <asm/scatterlist.h>
32#else
33 #include <linux/scatterlist.h>
34#endif
28 35
29#include <linux/crc32.h> 36#include <linux/crc32.h>
30 37
31MODULE_AUTHOR("Jouni Malinen"); 38struct rtllib_tkip_data {
32MODULE_DESCRIPTION("Host AP crypt: TKIP");
33MODULE_LICENSE("GPL");
34
35#ifndef OPENSUSE_SLED
36#define OPENSUSE_SLED 0
37#endif
38
39struct ieee80211_tkip_data {
40#define TKIP_KEY_LEN 32 39#define TKIP_KEY_LEN 32
41 u8 key[TKIP_KEY_LEN]; 40 u8 key[TKIP_KEY_LEN];
42 int key_set; 41 int key_set;
@@ -48,6 +47,7 @@ struct ieee80211_tkip_data {
48 47
49 u32 rx_iv32; 48 u32 rx_iv32;
50 u16 rx_iv16; 49 u16 rx_iv16;
50 bool initialized;
51 u16 rx_ttak[5]; 51 u16 rx_ttak[5];
52 int rx_phase1_done; 52 int rx_phase1_done;
53 u32 rx_iv32_new; 53 u32 rx_iv32_new;
@@ -58,26 +58,63 @@ struct ieee80211_tkip_data {
58 u32 dot11RSNAStatsTKIPLocalMICFailures; 58 u32 dot11RSNAStatsTKIPLocalMICFailures;
59 59
60 int key_idx; 60 int key_idx;
61#if ( !defined(BUILT_IN_CRYPTO) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21)) || (OPENSUSE_SLED)) )
61 struct crypto_blkcipher *rx_tfm_arc4; 62 struct crypto_blkcipher *rx_tfm_arc4;
62 struct crypto_hash *rx_tfm_michael; 63 struct crypto_hash *rx_tfm_michael;
63 struct crypto_blkcipher *tx_tfm_arc4; 64 struct crypto_blkcipher *tx_tfm_arc4;
64 struct crypto_hash *tx_tfm_michael; 65 struct crypto_hash *tx_tfm_michael;
66#else
67 struct crypto_tfm *tx_tfm_arc4;
68 struct crypto_tfm *tx_tfm_michael;
69 struct crypto_tfm *rx_tfm_arc4;
70 struct crypto_tfm *rx_tfm_michael;
71#endif
65 /* scratch buffers for virt_to_page() (crypto API) */ 72 /* scratch buffers for virt_to_page() (crypto API) */
66 u8 rx_hdr[16], tx_hdr[16]; 73 u8 rx_hdr[16], tx_hdr[16];
67}; 74};
68 75
69static void * ieee80211_tkip_init(int key_idx) 76static void * rtllib_tkip_init(int key_idx)
70{ 77{
71 struct ieee80211_tkip_data *priv; 78 struct rtllib_tkip_data *priv;
72 79
73 priv = kzalloc(sizeof(*priv), GFP_ATOMIC); 80 priv = kmalloc(sizeof(*priv), GFP_ATOMIC);
74 if (priv == NULL) 81 if (priv == NULL)
75 goto fail; 82 goto fail;
83 memset(priv, 0, sizeof(*priv));
76 priv->key_idx = key_idx; 84 priv->key_idx = key_idx;
85#if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
86 priv->tx_tfm_arc4 = crypto_alloc_tfm("arc4", 0);
87 if (priv->tx_tfm_arc4 == NULL) {
88 printk(KERN_DEBUG "rtllib_crypt_tkip: could not allocate "
89 "crypto API arc4\n");
90 goto fail;
91 }
92
93 priv->tx_tfm_michael = crypto_alloc_tfm("michael_mic", 0);
94 if (priv->tx_tfm_michael == NULL) {
95 printk(KERN_DEBUG "rtllib_crypt_tkip: could not allocate "
96 "crypto API michael_mic\n");
97 goto fail;
98 }
99
100 priv->rx_tfm_arc4 = crypto_alloc_tfm("arc4", 0);
101 if (priv->rx_tfm_arc4 == NULL) {
102 printk(KERN_DEBUG "rtllib_crypt_tkip: could not allocate "
103 "crypto API arc4\n");
104 goto fail;
105 }
106
107 priv->rx_tfm_michael = crypto_alloc_tfm("michael_mic", 0);
108 if (priv->rx_tfm_michael == NULL) {
109 printk(KERN_DEBUG "rtllib_crypt_tkip: could not allocate "
110 "crypto API michael_mic\n");
111 goto fail;
112 }
113#else
77 priv->tx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0, 114 priv->tx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0,
78 CRYPTO_ALG_ASYNC); 115 CRYPTO_ALG_ASYNC);
79 if (IS_ERR(priv->tx_tfm_arc4)) { 116 if (IS_ERR(priv->tx_tfm_arc4)) {
80 printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate " 117 printk(KERN_DEBUG "rtllib_crypt_tkip: could not allocate "
81 "crypto API arc4\n"); 118 "crypto API arc4\n");
82 priv->tx_tfm_arc4 = NULL; 119 priv->tx_tfm_arc4 = NULL;
83 goto fail; 120 goto fail;
@@ -86,7 +123,7 @@ static void * ieee80211_tkip_init(int key_idx)
86 priv->tx_tfm_michael = crypto_alloc_hash("michael_mic", 0, 123 priv->tx_tfm_michael = crypto_alloc_hash("michael_mic", 0,
87 CRYPTO_ALG_ASYNC); 124 CRYPTO_ALG_ASYNC);
88 if (IS_ERR(priv->tx_tfm_michael)) { 125 if (IS_ERR(priv->tx_tfm_michael)) {
89 printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate " 126 printk(KERN_DEBUG "rtllib_crypt_tkip: could not allocate "
90 "crypto API michael_mic\n"); 127 "crypto API michael_mic\n");
91 priv->tx_tfm_michael = NULL; 128 priv->tx_tfm_michael = NULL;
92 goto fail; 129 goto fail;
@@ -95,7 +132,7 @@ static void * ieee80211_tkip_init(int key_idx)
95 priv->rx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0, 132 priv->rx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0,
96 CRYPTO_ALG_ASYNC); 133 CRYPTO_ALG_ASYNC);
97 if (IS_ERR(priv->rx_tfm_arc4)) { 134 if (IS_ERR(priv->rx_tfm_arc4)) {
98 printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate " 135 printk(KERN_DEBUG "rtllib_crypt_tkip: could not allocate "
99 "crypto API arc4\n"); 136 "crypto API arc4\n");
100 priv->rx_tfm_arc4 = NULL; 137 priv->rx_tfm_arc4 = NULL;
101 goto fail; 138 goto fail;
@@ -104,15 +141,27 @@ static void * ieee80211_tkip_init(int key_idx)
104 priv->rx_tfm_michael = crypto_alloc_hash("michael_mic", 0, 141 priv->rx_tfm_michael = crypto_alloc_hash("michael_mic", 0,
105 CRYPTO_ALG_ASYNC); 142 CRYPTO_ALG_ASYNC);
106 if (IS_ERR(priv->rx_tfm_michael)) { 143 if (IS_ERR(priv->rx_tfm_michael)) {
107 printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate " 144 printk(KERN_DEBUG "rtllib_crypt_tkip: could not allocate "
108 "crypto API michael_mic\n"); 145 "crypto API michael_mic\n");
109 priv->rx_tfm_michael = NULL; 146 priv->rx_tfm_michael = NULL;
110 goto fail; 147 goto fail;
111 } 148 }
149#endif
112 return priv; 150 return priv;
113 151
114fail: 152fail:
115 if (priv) { 153 if (priv) {
154#if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
155 if (priv->tx_tfm_michael)
156 crypto_free_tfm(priv->tx_tfm_michael);
157 if (priv->tx_tfm_arc4)
158 crypto_free_tfm(priv->tx_tfm_arc4);
159 if (priv->rx_tfm_michael)
160 crypto_free_tfm(priv->rx_tfm_michael);
161 if (priv->rx_tfm_arc4)
162 crypto_free_tfm(priv->rx_tfm_arc4);
163
164#else
116 if (priv->tx_tfm_michael) 165 if (priv->tx_tfm_michael)
117 crypto_free_hash(priv->tx_tfm_michael); 166 crypto_free_hash(priv->tx_tfm_michael);
118 if (priv->tx_tfm_arc4) 167 if (priv->tx_tfm_arc4)
@@ -121,6 +170,7 @@ fail:
121 crypto_free_hash(priv->rx_tfm_michael); 170 crypto_free_hash(priv->rx_tfm_michael);
122 if (priv->rx_tfm_arc4) 171 if (priv->rx_tfm_arc4)
123 crypto_free_blkcipher(priv->rx_tfm_arc4); 172 crypto_free_blkcipher(priv->rx_tfm_arc4);
173#endif
124 kfree(priv); 174 kfree(priv);
125 } 175 }
126 176
@@ -128,9 +178,19 @@ fail:
128} 178}
129 179
130 180
131static void ieee80211_tkip_deinit(void *priv) 181static void rtllib_tkip_deinit(void *priv)
132{ 182{
133 struct ieee80211_tkip_data *_priv = priv; 183 struct rtllib_tkip_data *_priv = priv;
184#if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
185 if (_priv->tx_tfm_michael)
186 crypto_free_tfm(_priv->tx_tfm_michael);
187 if (_priv->tx_tfm_arc4)
188 crypto_free_tfm(_priv->tx_tfm_arc4);
189 if (_priv->rx_tfm_michael)
190 crypto_free_tfm(_priv->rx_tfm_michael);
191 if (_priv->rx_tfm_arc4)
192 crypto_free_tfm(_priv->rx_tfm_arc4);
193#else
134 if (_priv) { 194 if (_priv) {
135 if (_priv->tx_tfm_michael) 195 if (_priv->tx_tfm_michael)
136 crypto_free_hash(_priv->tx_tfm_michael); 196 crypto_free_hash(_priv->tx_tfm_michael);
@@ -141,6 +201,7 @@ static void ieee80211_tkip_deinit(void *priv)
141 if (_priv->rx_tfm_arc4) 201 if (_priv->rx_tfm_arc4)
142 crypto_free_blkcipher(_priv->rx_tfm_arc4); 202 crypto_free_blkcipher(_priv->rx_tfm_arc4);
143 } 203 }
204#endif
144 kfree(priv); 205 kfree(priv);
145} 206}
146 207
@@ -303,16 +364,18 @@ static void tkip_mixing_phase2(u8 *WEPSeed, const u8 *TK, const u16 *TTAK,
303} 364}
304 365
305 366
306static int ieee80211_tkip_encrypt(struct sk_buff *skb, int hdr_len, void *priv) 367static int rtllib_tkip_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
307{ 368{
308 struct ieee80211_tkip_data *tkey = priv; 369 struct rtllib_tkip_data *tkey = priv;
309 int len; 370 int len;
310 u8 *pos; 371 u8 *pos;
311 struct ieee80211_hdr_4addr *hdr; 372 struct rtllib_hdr_4addr *hdr;
312 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE); 373 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
313 374
375 #if ( !defined(BUILT_IN_CRYPTO) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21)) || (OPENSUSE_SLED)) )
314 struct blkcipher_desc desc = {.tfm = tkey->tx_tfm_arc4}; 376 struct blkcipher_desc desc = {.tfm = tkey->tx_tfm_arc4};
315 int ret = 0; 377 int ret = 0;
378 #endif
316 u8 rc4key[16], *icv; 379 u8 rc4key[16], *icv;
317 u32 crc; 380 u32 crc;
318 struct scatterlist sg; 381 struct scatterlist sg;
@@ -321,18 +384,16 @@ static int ieee80211_tkip_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
321 skb->len < hdr_len) 384 skb->len < hdr_len)
322 return -1; 385 return -1;
323 386
324 hdr = (struct ieee80211_hdr_4addr *) skb->data; 387 hdr = (struct rtllib_hdr_4addr *) skb->data;
325 388
326 if (!tcb_desc->bHwSec) 389 if (!tcb_desc->bHwSec) {
327 {
328 if (!tkey->tx_phase1_done) { 390 if (!tkey->tx_phase1_done) {
329 tkip_mixing_phase1(tkey->tx_ttak, tkey->key, hdr->addr2, 391 tkip_mixing_phase1(tkey->tx_ttak, tkey->key, hdr->addr2,
330 tkey->tx_iv32); 392 tkey->tx_iv32);
331 tkey->tx_phase1_done = 1; 393 tkey->tx_phase1_done = 1;
332 } 394 }
333 tkip_mixing_phase2(rc4key, tkey->key, tkey->tx_ttak, tkey->tx_iv16); 395 tkip_mixing_phase2(rc4key, tkey->key, tkey->tx_ttak, tkey->tx_iv16);
334 } 396 } else
335 else
336 tkey->tx_phase1_done = 1; 397 tkey->tx_phase1_done = 1;
337 398
338 399
@@ -341,14 +402,11 @@ static int ieee80211_tkip_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
341 memmove(pos, pos + 8, hdr_len); 402 memmove(pos, pos + 8, hdr_len);
342 pos += hdr_len; 403 pos += hdr_len;
343 404
344 if (tcb_desc->bHwSec) 405 if (tcb_desc->bHwSec) {
345 {
346 *pos++ = Hi8(tkey->tx_iv16); 406 *pos++ = Hi8(tkey->tx_iv16);
347 *pos++ = (Hi8(tkey->tx_iv16) | 0x20) & 0x7F; 407 *pos++ = (Hi8(tkey->tx_iv16) | 0x20) & 0x7F;
348 *pos++ = Lo8(tkey->tx_iv16); 408 *pos++ = Lo8(tkey->tx_iv16);
349 } 409 } else {
350 else
351 {
352 *pos++ = rc4key[0]; 410 *pos++ = rc4key[0];
353 *pos++ = rc4key[1]; 411 *pos++ = rc4key[1];
354 *pos++ = rc4key[2]; 412 *pos++ = rc4key[2];
@@ -360,17 +418,30 @@ static int ieee80211_tkip_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
360 *pos++ = (tkey->tx_iv32 >> 16) & 0xff; 418 *pos++ = (tkey->tx_iv32 >> 16) & 0xff;
361 *pos++ = (tkey->tx_iv32 >> 24) & 0xff; 419 *pos++ = (tkey->tx_iv32 >> 24) & 0xff;
362 420
363 if (!tcb_desc->bHwSec) 421 if (!tcb_desc->bHwSec) {
364 {
365 icv = skb_put(skb, 4); 422 icv = skb_put(skb, 4);
366 crc = ~crc32_le(~0, pos, len); 423 crc = ~crc32_le(~0, pos, len);
367 icv[0] = crc; 424 icv[0] = crc;
368 icv[1] = crc >> 8; 425 icv[1] = crc >> 8;
369 icv[2] = crc >> 16; 426 icv[2] = crc >> 16;
370 icv[3] = crc >> 24; 427 icv[3] = crc >> 24;
371 crypto_blkcipher_setkey(tkey->tx_tfm_arc4, rc4key, 16); 428
429#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
430 sg.page = virt_to_page(pos);
431 sg.offset = offset_in_page(pos);
432 sg.length = len + 4;
433#else
372 sg_init_one(&sg, pos, len+4); 434 sg_init_one(&sg, pos, len+4);
435#endif
436
437
438#if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
439 crypto_cipher_setkey(tkey->tx_tfm_arc4, rc4key, 16);
440 crypto_cipher_encrypt(tkey->tx_tfm_arc4, &sg, &sg, len + 4);
441#else
442 crypto_blkcipher_setkey(tkey->tx_tfm_arc4, rc4key, 16);
373 ret= crypto_blkcipher_encrypt(&desc, &sg, &sg, len + 4); 443 ret= crypto_blkcipher_encrypt(&desc, &sg, &sg, len + 4);
444#endif
374 445
375 } 446 }
376 447
@@ -381,22 +452,28 @@ static int ieee80211_tkip_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
381 } 452 }
382 453
383 if (!tcb_desc->bHwSec) 454 if (!tcb_desc->bHwSec)
455 #if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
456 return 0;
457 #else
384 return ret; 458 return ret;
459 #endif
385 else 460 else
386 return 0; 461 return 0;
387 462
388 463
389} 464}
390 465
391static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv) 466static int rtllib_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
392{ 467{
393 struct ieee80211_tkip_data *tkey = priv; 468 struct rtllib_tkip_data *tkey = priv;
394 u8 keyidx, *pos; 469 u8 keyidx, *pos;
395 u32 iv32; 470 u32 iv32;
396 u16 iv16; 471 u16 iv16;
397 struct ieee80211_hdr_4addr *hdr; 472 struct rtllib_hdr_4addr *hdr;
398 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE); 473 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
474 #if ( !defined(BUILT_IN_CRYPTO) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21)) || (OPENSUSE_SLED)) )
399 struct blkcipher_desc desc = {.tfm = tkey->rx_tfm_arc4}; 475 struct blkcipher_desc desc = {.tfm = tkey->rx_tfm_arc4};
476 #endif
400 u8 rc4key[16]; 477 u8 rc4key[16];
401 u8 icv[4]; 478 u8 icv[4];
402 u32 crc; 479 u32 crc;
@@ -405,13 +482,13 @@ static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
405 if (skb->len < hdr_len + 8 + 4) 482 if (skb->len < hdr_len + 8 + 4)
406 return -1; 483 return -1;
407 484
408 hdr = (struct ieee80211_hdr_4addr *) skb->data; 485 hdr = (struct rtllib_hdr_4addr *) skb->data;
409 pos = skb->data + hdr_len; 486 pos = skb->data + hdr_len;
410 keyidx = pos[3]; 487 keyidx = pos[3];
411 if (!(keyidx & (1 << 5))) { 488 if (!(keyidx & (1 << 5))) {
412 if (net_ratelimit()) { 489 if (net_ratelimit()) {
413 printk(KERN_DEBUG "TKIP: received packet without ExtIV" 490 printk(KERN_DEBUG "TKIP: received packet without ExtIV"
414 " flag from %pM\n", hdr->addr2); 491 " flag from " MAC_FMT "\n", MAC_ARG(hdr->addr2));
415 } 492 }
416 return -2; 493 return -2;
417 } 494 }
@@ -423,9 +500,9 @@ static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
423 } 500 }
424 if (!tkey->key_set) { 501 if (!tkey->key_set) {
425 if (net_ratelimit()) { 502 if (net_ratelimit()) {
426 printk(KERN_DEBUG "TKIP: received packet from %pM" 503 printk(KERN_DEBUG "TKIP: received packet from " MAC_FMT
427 " with keyid=%d that does not have a configured" 504 " with keyid=%d that does not have a configured"
428 " key\n", hdr->addr2, keyidx); 505 " key\n", MAC_ARG(hdr->addr2), keyidx);
429 } 506 }
430 return -3; 507 return -3;
431 } 508 }
@@ -433,19 +510,20 @@ static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
433 iv32 = pos[4] | (pos[5] << 8) | (pos[6] << 16) | (pos[7] << 24); 510 iv32 = pos[4] | (pos[5] << 8) | (pos[6] << 16) | (pos[7] << 24);
434 pos += 8; 511 pos += 8;
435 512
436 if (!tcb_desc->bHwSec) 513 if (!tcb_desc->bHwSec || (skb->cb[0] == 1))
437 { 514 {
438 if (iv32 < tkey->rx_iv32 || 515 if ((iv32 < tkey->rx_iv32 ||
439 (iv32 == tkey->rx_iv32 && iv16 <= tkey->rx_iv16)) { 516 (iv32 == tkey->rx_iv32 && iv16 <= tkey->rx_iv16))&&tkey->initialized) {
440 if (net_ratelimit()) { 517 if (net_ratelimit()) {
441 printk(KERN_DEBUG "TKIP: replay detected: STA=%pM" 518 printk(KERN_DEBUG "TKIP: replay detected: STA=" MAC_FMT
442 " previous TSC %08x%04x received TSC " 519 " previous TSC %08x%04x received TSC "
443 "%08x%04x\n", hdr->addr2, 520 "%08x%04x\n", MAC_ARG(hdr->addr2),
444 tkey->rx_iv32, tkey->rx_iv16, iv32, iv16); 521 tkey->rx_iv32, tkey->rx_iv16, iv32, iv16);
445 } 522 }
446 tkey->dot11RSNAStatsTKIPReplays++; 523 tkey->dot11RSNAStatsTKIPReplays++;
447 return -4; 524 return -4;
448 } 525 }
526 tkey->initialized = true;
449 527
450 if (iv32 != tkey->rx_iv32 || !tkey->rx_phase1_done) { 528 if (iv32 != tkey->rx_iv32 || !tkey->rx_phase1_done) {
451 tkip_mixing_phase1(tkey->rx_ttak, tkey->key, hdr->addr2, iv32); 529 tkip_mixing_phase1(tkey->rx_ttak, tkey->key, hdr->addr2, iv32);
@@ -455,18 +533,34 @@ static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
455 533
456 plen = skb->len - hdr_len - 12; 534 plen = skb->len - hdr_len - 12;
457 535
458 crypto_blkcipher_setkey(tkey->rx_tfm_arc4, rc4key, 16); 536#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
537 sg.page = virt_to_page(pos);
538 sg.offset = offset_in_page(pos);
539 sg.length = plen + 4;
540#else
459 sg_init_one(&sg, pos, plen+4); 541 sg_init_one(&sg, pos, plen+4);
542#endif
543
544#if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
545 crypto_cipher_setkey(tkey->rx_tfm_arc4, rc4key, 16);
546 crypto_cipher_decrypt(tkey->rx_tfm_arc4, &sg, &sg, plen + 4);
547#else
548 crypto_blkcipher_setkey(tkey->rx_tfm_arc4, rc4key, 16);
460 if (crypto_blkcipher_decrypt(&desc, &sg, &sg, plen + 4)) { 549 if (crypto_blkcipher_decrypt(&desc, &sg, &sg, plen + 4)) {
461 if (net_ratelimit()) { 550 if (net_ratelimit()) {
462 printk(KERN_DEBUG ": TKIP: failed to decrypt " 551 printk(KERN_DEBUG ": TKIP: failed to decrypt "
463 "received packet from %pM\n", 552 "received packet from " MAC_FMT "\n",
464 hdr->addr2); 553 MAC_ARG(hdr->addr2));
465 } 554 }
466 return -7; 555 return -7;
467 } 556 }
557#endif
468 558
559 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
469 crc = ~crc32_le(~0, pos, plen); 560 crc = ~crc32_le(~0, pos, plen);
561 #else
562 crc = ~ether_crc_le(plen, pos);
563 #endif
470 icv[0] = crc; 564 icv[0] = crc;
471 icv[1] = crc >> 8; 565 icv[1] = crc >> 8;
472 icv[2] = crc >> 16; 566 icv[2] = crc >> 16;
@@ -479,9 +573,8 @@ static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
479 tkey->rx_phase1_done = 0; 573 tkey->rx_phase1_done = 0;
480 } 574 }
481 if (net_ratelimit()) { 575 if (net_ratelimit()) {
482 printk(KERN_DEBUG 576 printk(KERN_DEBUG "TKIP: ICV error detected: STA="
483 "TKIP: ICV error detected: STA=%pM\n", 577 MAC_FMT "\n", MAC_ARG(hdr->addr2));
484 hdr->addr2);
485 } 578 }
486 tkey->dot11RSNAStatsTKIPICVErrors++; 579 tkey->dot11RSNAStatsTKIPICVErrors++;
487 return -5; 580 return -5;
@@ -499,10 +592,66 @@ static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
499 skb_pull(skb, 8); 592 skb_pull(skb, 8);
500 skb_trim(skb, skb->len - 4); 593 skb_trim(skb, skb->len - 4);
501 594
595#ifdef JOHN_DUMP
596if ( ((u16*)skb->data)[0] & 0x4000){
597 printk("@@ rx decrypted skb->data");
598 int i;
599 for (i = 0; i < skb->len; i++) {
600 if ( (i%24)==0 ) printk("\n");
601 printk("%2x ", ((u8*)skb->data)[i]);
602 }
603 printk("\n");
604}
605#endif /*JOHN_DUMP*/
502 return keyidx; 606 return keyidx;
503} 607}
504 608
505 609
610#if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
611static int michael_mic(struct crypto_tfm * tfm_michael, u8 *key, u8 *hdr,
612 u8 *data, size_t data_len, u8 *mic)
613{
614 struct scatterlist sg[2];
615#if ( !defined(BUILT_IN_CRYPTO) && LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20) )
616 struct hash_desc desc;
617 int ret = 0;
618#endif
619
620 if (tfm_michael == NULL){
621 printk(KERN_WARNING "michael_mic: tfm_michael == NULL\n");
622 return -1;
623 }
624#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
625 sg[0].page = virt_to_page(hdr);
626 sg[0].offset = offset_in_page(hdr);
627 sg[0].length = 16;
628
629 sg[1].page = virt_to_page(data);
630 sg[1].offset = offset_in_page(data);
631 sg[1].length = data_len;
632#else
633 sg_init_table(sg, 2);
634 sg_set_buf(&sg[0], hdr, 16);
635 sg_set_buf(&sg[1], data, data_len);
636#endif
637
638#if ( defined(BUILT_IN_CRYPTO) || LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) )
639 crypto_digest_init(tfm_michael);
640 crypto_digest_setkey(tfm_michael, key, 8);
641 crypto_digest_update(tfm_michael, sg, 2);
642 crypto_digest_final(tfm_michael, mic);
643 return 0;
644#else
645if (crypto_hash_setkey(tkey->tfm_michael, key, 8))
646 return -1;
647
648 desc.tfm = tkey->tfm_michael;
649 desc.flags = 0;
650 ret = crypto_hash_digest(&desc, sg, data_len + 16, mic);
651 return ret;
652#endif
653}
654#else
506static int michael_mic(struct crypto_hash *tfm_michael, u8 * key, u8 * hdr, 655static int michael_mic(struct crypto_hash *tfm_michael, u8 * key, u8 * hdr,
507 u8 * data, size_t data_len, u8 * mic) 656 u8 * data, size_t data_len, u8 * mic)
508{ 657{
@@ -513,9 +662,19 @@ static int michael_mic(struct crypto_hash *tfm_michael, u8 * key, u8 * hdr,
513 printk(KERN_WARNING "michael_mic: tfm_michael == NULL\n"); 662 printk(KERN_WARNING "michael_mic: tfm_michael == NULL\n");
514 return -1; 663 return -1;
515 } 664 }
665#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
666 sg[0].page = virt_to_page(hdr);
667 sg[0].offset = offset_in_page(hdr);
668 sg[0].length = 16;
669
670 sg[1].page = virt_to_page(data);
671 sg[1].offset = offset_in_page(data);
672 sg[1].length = data_len;
673#else
516 sg_init_table(sg, 2); 674 sg_init_table(sg, 2);
517 sg_set_buf(&sg[0], hdr, 16); 675 sg_set_buf(&sg[0], hdr, 16);
518 sg_set_buf(&sg[1], data, data_len); 676 sg_set_buf(&sg[1], data, data_len);
677#endif
519 678
520 if (crypto_hash_setkey(tfm_michael, key, 8)) 679 if (crypto_hash_setkey(tfm_michael, key, 8))
521 return -1; 680 return -1;
@@ -524,25 +683,26 @@ static int michael_mic(struct crypto_hash *tfm_michael, u8 * key, u8 * hdr,
524 desc.flags = 0; 683 desc.flags = 0;
525 return crypto_hash_digest(&desc, sg, data_len + 16, mic); 684 return crypto_hash_digest(&desc, sg, data_len + 16, mic);
526} 685}
686#endif
527 687
528 688
529 689
530static void michael_mic_hdr(struct sk_buff *skb, u8 *hdr) 690static void michael_mic_hdr(struct sk_buff *skb, u8 *hdr)
531{ 691{
532 struct ieee80211_hdr_4addr *hdr11; 692 struct rtllib_hdr_4addr *hdr11;
533 693
534 hdr11 = (struct ieee80211_hdr_4addr *) skb->data; 694 hdr11 = (struct rtllib_hdr_4addr *) skb->data;
535 switch (le16_to_cpu(hdr11->frame_ctl) & 695 switch (le16_to_cpu(hdr11->frame_ctl) &
536 (IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS)) { 696 (RTLLIB_FCTL_FROMDS | RTLLIB_FCTL_TODS)) {
537 case IEEE80211_FCTL_TODS: 697 case RTLLIB_FCTL_TODS:
538 memcpy(hdr, hdr11->addr3, ETH_ALEN); /* DA */ 698 memcpy(hdr, hdr11->addr3, ETH_ALEN); /* DA */
539 memcpy(hdr + ETH_ALEN, hdr11->addr2, ETH_ALEN); /* SA */ 699 memcpy(hdr + ETH_ALEN, hdr11->addr2, ETH_ALEN); /* SA */
540 break; 700 break;
541 case IEEE80211_FCTL_FROMDS: 701 case RTLLIB_FCTL_FROMDS:
542 memcpy(hdr, hdr11->addr1, ETH_ALEN); /* DA */ 702 memcpy(hdr, hdr11->addr1, ETH_ALEN); /* DA */
543 memcpy(hdr + ETH_ALEN, hdr11->addr3, ETH_ALEN); /* SA */ 703 memcpy(hdr + ETH_ALEN, hdr11->addr3, ETH_ALEN); /* SA */
544 break; 704 break;
545 case IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS: 705 case RTLLIB_FCTL_FROMDS | RTLLIB_FCTL_TODS:
546 memcpy(hdr, hdr11->addr3, ETH_ALEN); /* DA */ 706 memcpy(hdr, hdr11->addr3, ETH_ALEN); /* DA */
547 memcpy(hdr + ETH_ALEN, hdr11->addr4, ETH_ALEN); /* SA */ 707 memcpy(hdr + ETH_ALEN, hdr11->addr4, ETH_ALEN); /* SA */
548 break; 708 break;
@@ -558,13 +718,13 @@ static void michael_mic_hdr(struct sk_buff *skb, u8 *hdr)
558} 718}
559 719
560 720
561static int ieee80211_michael_mic_add(struct sk_buff *skb, int hdr_len, void *priv) 721static int rtllib_michael_mic_add(struct sk_buff *skb, int hdr_len, void *priv)
562{ 722{
563 struct ieee80211_tkip_data *tkey = priv; 723 struct rtllib_tkip_data *tkey = priv;
564 u8 *pos; 724 u8 *pos;
565 struct ieee80211_hdr_4addr *hdr; 725 struct rtllib_hdr_4addr *hdr;
566 726
567 hdr = (struct ieee80211_hdr_4addr *) skb->data; 727 hdr = (struct rtllib_hdr_4addr *) skb->data;
568 728
569 if (skb_tailroom(skb) < 8 || skb->len < hdr_len) { 729 if (skb_tailroom(skb) < 8 || skb->len < hdr_len) {
570 printk(KERN_DEBUG "Invalid packet for Michael MIC add " 730 printk(KERN_DEBUG "Invalid packet for Michael MIC add "
@@ -575,15 +735,17 @@ static int ieee80211_michael_mic_add(struct sk_buff *skb, int hdr_len, void *pri
575 735
576 michael_mic_hdr(skb, tkey->tx_hdr); 736 michael_mic_hdr(skb, tkey->tx_hdr);
577 737
578 // { david, 2006.9.1 738 if (RTLLIB_QOS_HAS_SEQ(le16_to_cpu(hdr->frame_ctl))) {
579 // fix the wpa process with wmm enabled.
580 if(IEEE80211_QOS_HAS_SEQ(le16_to_cpu(hdr->frame_ctl))) {
581 tkey->tx_hdr[12] = *(skb->data + hdr_len - 2) & 0x07; 739 tkey->tx_hdr[12] = *(skb->data + hdr_len - 2) & 0x07;
582 } 740 }
583 // }
584 pos = skb_put(skb, 8); 741 pos = skb_put(skb, 8);
742#if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
585 if (michael_mic(tkey->tx_tfm_michael, &tkey->key[16], tkey->tx_hdr, 743 if (michael_mic(tkey->tx_tfm_michael, &tkey->key[16], tkey->tx_hdr,
586 skb->data + hdr_len, skb->len - 8 - hdr_len, pos)) 744 skb->data + hdr_len, skb->len - 8 - hdr_len, pos))
745#else
746 if (michael_mic(tkey->tx_tfm_michael, &tkey->key[16], tkey->tx_hdr,
747 skb->data + hdr_len, skb->len - 8 - hdr_len, pos))
748#endif
587 return -1; 749 return -1;
588 750
589 return 0; 751 return 0;
@@ -591,8 +753,8 @@ static int ieee80211_michael_mic_add(struct sk_buff *skb, int hdr_len, void *pri
591 753
592 754
593#if WIRELESS_EXT >= 18 755#if WIRELESS_EXT >= 18
594static void ieee80211_michael_mic_failure(struct net_device *dev, 756static void rtllib_michael_mic_failure(struct net_device *dev,
595 struct ieee80211_hdr_4addr *hdr, 757 struct rtllib_hdr_4addr *hdr,
596 int keyidx) 758 int keyidx)
597{ 759{
598 union iwreq_data wrqu; 760 union iwreq_data wrqu;
@@ -612,8 +774,8 @@ static void ieee80211_michael_mic_failure(struct net_device *dev,
612 wireless_send_event(dev, IWEVMICHAELMICFAILURE, &wrqu, (char *) &ev); 774 wireless_send_event(dev, IWEVMICHAELMICFAILURE, &wrqu, (char *) &ev);
613} 775}
614#elif WIRELESS_EXT >= 15 776#elif WIRELESS_EXT >= 15
615static void ieee80211_michael_mic_failure(struct net_device *dev, 777static void rtllib_michael_mic_failure(struct net_device *dev,
616 struct ieee80211_hdr_4addr *hdr, 778 struct rtllib_hdr_4addr *hdr,
617 int keyidx) 779 int keyidx)
618{ 780{
619 union iwreq_data wrqu; 781 union iwreq_data wrqu;
@@ -621,53 +783,61 @@ static void ieee80211_michael_mic_failure(struct net_device *dev,
621 783
622 /* TODO: needed parameters: count, keyid, key type, TSC */ 784 /* TODO: needed parameters: count, keyid, key type, TSC */
623 sprintf(buf, "MLME-MICHAELMICFAILURE.indication(keyid=%d %scast addr=" 785 sprintf(buf, "MLME-MICHAELMICFAILURE.indication(keyid=%d %scast addr="
624 "%pM)", keyidx, hdr->addr1[0] & 0x01 ? "broad" : "uni", 786 MAC_FMT ")", keyidx, hdr->addr1[0] & 0x01 ? "broad" : "uni",
625 hdr->addr2); 787 MAC_ARG(hdr->addr2));
626 memset(&wrqu, 0, sizeof(wrqu)); 788 memset(&wrqu, 0, sizeof(wrqu));
627 wrqu.data.length = strlen(buf); 789 wrqu.data.length = strlen(buf);
628 wireless_send_event(dev, IWEVCUSTOM, &wrqu, buf); 790 wireless_send_event(dev, IWEVCUSTOM, &wrqu, buf);
629} 791}
630#else /* WIRELESS_EXT >= 15 */ 792#else /* WIRELESS_EXT >= 15 */
631static inline void ieee80211_michael_mic_failure(struct net_device *dev, 793static inline void rtllib_michael_mic_failure(struct net_device *dev,
632 struct ieee80211_hdr_4addr *hdr, 794 struct rtllib_hdr_4addr *hdr,
633 int keyidx) 795 int keyidx)
634{ 796{
635} 797}
636#endif /* WIRELESS_EXT >= 15 */ 798#endif /* WIRELESS_EXT >= 15 */
637 799
638static int ieee80211_michael_mic_verify(struct sk_buff *skb, int keyidx, 800static int rtllib_michael_mic_verify(struct sk_buff *skb, int keyidx,
639 int hdr_len, void *priv) 801 int hdr_len, void *priv, struct rtllib_device* ieee)
640{ 802{
641 struct ieee80211_tkip_data *tkey = priv; 803 struct rtllib_tkip_data *tkey = priv;
642 u8 mic[8]; 804 u8 mic[8];
643 struct ieee80211_hdr_4addr *hdr; 805 struct rtllib_hdr_4addr *hdr;
644 806
645 hdr = (struct ieee80211_hdr_4addr *) skb->data; 807 hdr = (struct rtllib_hdr_4addr *) skb->data;
646 808
647 if (!tkey->key_set) 809 if (!tkey->key_set)
648 return -1; 810 return -1;
649 811
650 michael_mic_hdr(skb, tkey->rx_hdr); 812 michael_mic_hdr(skb, tkey->rx_hdr);
651 // { david, 2006.9.1 813 if (RTLLIB_QOS_HAS_SEQ(le16_to_cpu(hdr->frame_ctl))) {
652 // fix the wpa process with wmm enabled.
653 if(IEEE80211_QOS_HAS_SEQ(le16_to_cpu(hdr->frame_ctl))) {
654 tkey->rx_hdr[12] = *(skb->data + hdr_len - 2) & 0x07; 814 tkey->rx_hdr[12] = *(skb->data + hdr_len - 2) & 0x07;
655 } 815 }
656 // }
657 816
817#if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
818 if (michael_mic(tkey->rx_tfm_michael, &tkey->key[24], tkey->rx_hdr,
819 skb->data + hdr_len, skb->len - 8 - hdr_len, mic))
820#else
658 if (michael_mic(tkey->rx_tfm_michael, &tkey->key[24], tkey->rx_hdr, 821 if (michael_mic(tkey->rx_tfm_michael, &tkey->key[24], tkey->rx_hdr,
659 skb->data + hdr_len, skb->len - 8 - hdr_len, mic)) 822 skb->data + hdr_len, skb->len - 8 - hdr_len, mic))
660 return -1; 823#endif
661 if (memcmp(mic, skb->data + skb->len - 8, 8) != 0) { 824 return -1;
662 struct ieee80211_hdr_4addr *hdr; 825
663 hdr = (struct ieee80211_hdr_4addr *) skb->data; 826 if ((memcmp(mic, skb->data + skb->len - 8, 8) != 0)||(ieee->force_mic_error)) {
827 struct rtllib_hdr_4addr *hdr;
828 hdr = (struct rtllib_hdr_4addr *) skb->data;
664 printk(KERN_DEBUG "%s: Michael MIC verification failed for " 829 printk(KERN_DEBUG "%s: Michael MIC verification failed for "
665 "MSDU from %pM keyidx=%d\n", 830 "MSDU from " MAC_FMT " keyidx=%d\n",
666 skb->dev ? skb->dev->name : "N/A", hdr->addr2, 831 skb->dev ? skb->dev->name : "N/A", MAC_ARG(hdr->addr2),
667 keyidx); 832 keyidx);
668 if (skb->dev) 833 printk("%d, force_mic_error = %d\n", (memcmp(mic, skb->data + skb->len - 8, 8) != 0),\
669 ieee80211_michael_mic_failure(skb->dev, hdr, keyidx); 834 ieee->force_mic_error);
835 if (skb->dev) {
836 printk("skb->dev != NULL\n");
837 rtllib_michael_mic_failure(skb->dev, hdr, keyidx);
838 }
670 tkey->dot11RSNAStatsTKIPLocalMICFailures++; 839 tkey->dot11RSNAStatsTKIPLocalMICFailures++;
840 ieee->force_mic_error = false;
671 return -1; 841 return -1;
672 } 842 }
673 843
@@ -682,22 +852,36 @@ static int ieee80211_michael_mic_verify(struct sk_buff *skb, int keyidx,
682} 852}
683 853
684 854
685static int ieee80211_tkip_set_key(void *key, int len, u8 *seq, void *priv) 855static int rtllib_tkip_set_key(void *key, int len, u8 *seq, void *priv)
686{ 856{
687 struct ieee80211_tkip_data *tkey = priv; 857 struct rtllib_tkip_data *tkey = priv;
688 int keyidx; 858 int keyidx;
859#if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
860 struct crypto_tfm *tfm = tkey->tx_tfm_michael;
861 struct crypto_tfm *tfm2 = tkey->tx_tfm_arc4;
862 struct crypto_tfm *tfm3 = tkey->rx_tfm_michael;
863 struct crypto_tfm *tfm4 = tkey->rx_tfm_arc4;
864#else
689 struct crypto_hash *tfm = tkey->tx_tfm_michael; 865 struct crypto_hash *tfm = tkey->tx_tfm_michael;
690 struct crypto_blkcipher *tfm2 = tkey->tx_tfm_arc4; 866 struct crypto_blkcipher *tfm2 = tkey->tx_tfm_arc4;
691 struct crypto_hash *tfm3 = tkey->rx_tfm_michael; 867 struct crypto_hash *tfm3 = tkey->rx_tfm_michael;
692 struct crypto_blkcipher *tfm4 = tkey->rx_tfm_arc4; 868 struct crypto_blkcipher *tfm4 = tkey->rx_tfm_arc4;
869#endif
693 870
694 keyidx = tkey->key_idx; 871 keyidx = tkey->key_idx;
695 memset(tkey, 0, sizeof(*tkey)); 872 memset(tkey, 0, sizeof(*tkey));
696 tkey->key_idx = keyidx; 873 tkey->key_idx = keyidx;
874#if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
875 tkey->tx_tfm_michael = tfm;
876 tkey->tx_tfm_arc4 = tfm2;
877 tkey->rx_tfm_michael = tfm3;
878 tkey->rx_tfm_arc4 = tfm4;
879#else
697 tkey->tx_tfm_michael = tfm; 880 tkey->tx_tfm_michael = tfm;
698 tkey->tx_tfm_arc4 = tfm2; 881 tkey->tx_tfm_arc4 = tfm2;
699 tkey->rx_tfm_michael = tfm3; 882 tkey->rx_tfm_michael = tfm3;
700 tkey->rx_tfm_arc4 = tfm4; 883 tkey->rx_tfm_arc4 = tfm4;
884#endif
701 885
702 if (len == TKIP_KEY_LEN) { 886 if (len == TKIP_KEY_LEN) {
703 memcpy(tkey->key, key, TKIP_KEY_LEN); 887 memcpy(tkey->key, key, TKIP_KEY_LEN);
@@ -717,9 +901,9 @@ static int ieee80211_tkip_set_key(void *key, int len, u8 *seq, void *priv)
717} 901}
718 902
719 903
720static int ieee80211_tkip_get_key(void *key, int len, u8 *seq, void *priv) 904static int rtllib_tkip_get_key(void *key, int len, u8 *seq, void *priv)
721{ 905{
722 struct ieee80211_tkip_data *tkey = priv; 906 struct rtllib_tkip_data *tkey = priv;
723 907
724 if (len < TKIP_KEY_LEN) 908 if (len < TKIP_KEY_LEN)
725 return -1; 909 return -1;
@@ -747,9 +931,9 @@ static int ieee80211_tkip_get_key(void *key, int len, u8 *seq, void *priv)
747} 931}
748 932
749 933
750static char * ieee80211_tkip_print_stats(char *p, void *priv) 934static char * rtllib_tkip_print_stats(char *p, void *priv)
751{ 935{
752 struct ieee80211_tkip_data *tkip = priv; 936 struct rtllib_tkip_data *tkip = priv;
753 p += sprintf(p, "key[%d] alg=TKIP key_set=%d " 937 p += sprintf(p, "key[%d] alg=TKIP key_set=%d "
754 "tx_pn=%02x%02x%02x%02x%02x%02x " 938 "tx_pn=%02x%02x%02x%02x%02x%02x "
755 "rx_pn=%02x%02x%02x%02x%02x%02x " 939 "rx_pn=%02x%02x%02x%02x%02x%02x "
@@ -774,36 +958,35 @@ static char * ieee80211_tkip_print_stats(char *p, void *priv)
774} 958}
775 959
776 960
777static struct ieee80211_crypto_ops ieee80211_crypt_tkip = { 961static struct rtllib_crypto_ops rtllib_crypt_tkip = {
778 .name = "TKIP", 962 .name = "TKIP",
779 .init = ieee80211_tkip_init, 963 .init = rtllib_tkip_init,
780 .deinit = ieee80211_tkip_deinit, 964 .deinit = rtllib_tkip_deinit,
781 .encrypt_mpdu = ieee80211_tkip_encrypt, 965 .encrypt_mpdu = rtllib_tkip_encrypt,
782 .decrypt_mpdu = ieee80211_tkip_decrypt, 966 .decrypt_mpdu = rtllib_tkip_decrypt,
783 .encrypt_msdu = ieee80211_michael_mic_add, 967 .encrypt_msdu = rtllib_michael_mic_add,
784 .decrypt_msdu = ieee80211_michael_mic_verify, 968 .decrypt_msdu = rtllib_michael_mic_verify,
785 .set_key = ieee80211_tkip_set_key, 969 .set_key = rtllib_tkip_set_key,
786 .get_key = ieee80211_tkip_get_key, 970 .get_key = rtllib_tkip_get_key,
787 .print_stats = ieee80211_tkip_print_stats, 971 .print_stats = rtllib_tkip_print_stats,
788 .extra_prefix_len = 4 + 4, /* IV + ExtIV */ 972 .extra_prefix_len = 4 + 4, /* IV + ExtIV */
789 .extra_postfix_len = 8 + 4, /* MIC + ICV */ 973 .extra_postfix_len = 8 + 4, /* MIC + ICV */
790 .owner = THIS_MODULE, 974 .owner = THIS_MODULE,
791}; 975};
792 976
793 977
794int __init ieee80211_crypto_tkip_init(void) 978int __init rtllib_crypto_tkip_init(void)
795{ 979{
796 return ieee80211_register_crypto_ops(&ieee80211_crypt_tkip); 980 return rtllib_register_crypto_ops(&rtllib_crypt_tkip);
797} 981}
798 982
799 983
800void ieee80211_crypto_tkip_exit(void) 984void __exit rtllib_crypto_tkip_exit(void)
801{ 985{
802 ieee80211_unregister_crypto_ops(&ieee80211_crypt_tkip); 986 rtllib_unregister_crypto_ops(&rtllib_crypt_tkip);
803} 987}
804 988
805void ieee80211_tkip_null(void) 989void rtllib_tkip_null(void)
806{ 990{
807 return; 991 return;
808} 992}
809
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_wep.c b/drivers/staging/rtl8192e/rtllib_crypt_wep.c
index 55043913afc..38679223fa5 100644
--- a/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_wep.c
+++ b/drivers/staging/rtl8192e/rtllib_crypt_wep.c
@@ -9,36 +9,53 @@
9 * more details. 9 * more details.
10 */ 10 */
11 11
12#include <linux/version.h>
12#include <linux/module.h> 13#include <linux/module.h>
13#include <linux/init.h> 14#include <linux/init.h>
14#include <linux/slab.h> 15#include <linux/slab.h>
15#include <linux/random.h> 16#include <linux/random.h>
16#include <linux/skbuff.h> 17#include <linux/skbuff.h>
17#include <asm/string.h> 18#include <asm/string.h>
19#include "rtllib.h"
18 20
19#include "ieee80211.h" 21#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,20))
22#endif
20 23
21 24
25#if defined(BUILT_IN_CRYPTO) || (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
26#include "rtl_crypto.h"
27#else
22#include <linux/crypto.h> 28#include <linux/crypto.h>
29#endif
23 30
24#include <linux/scatterlist.h> 31#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
32 #include <asm/scatterlist.h>
33#else
34 #include <linux/scatterlist.h>
35#endif
25#include <linux/crc32.h> 36#include <linux/crc32.h>
26 37/*
27MODULE_AUTHOR("Jouni Malinen"); 38#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
28MODULE_DESCRIPTION("Host AP crypt: WEP"); 39#include "rtl_crypto.h"
29MODULE_LICENSE("GPL"); 40#else
30#ifndef OPENSUSE_SLED 41#include <linux/crypto.h>
31#define OPENSUSE_SLED 0
32#endif 42#endif
33 43
44#include <asm/scatterlist.h>
45#include <linux/crc32.h>
46*/
34struct prism2_wep_data { 47struct prism2_wep_data {
35 u32 iv; 48 u32 iv;
36#define WEP_KEY_LEN 13 49#define WEP_KEY_LEN 13
37 u8 key[WEP_KEY_LEN + 1]; 50 u8 key[WEP_KEY_LEN + 1];
38 u8 key_len; 51 u8 key_len;
39 u8 key_idx; 52 u8 key_idx;
53 #if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
54 struct crypto_tfm *tfm;
55 #else
40 struct crypto_blkcipher *tx_tfm; 56 struct crypto_blkcipher *tx_tfm;
41 struct crypto_blkcipher *rx_tfm; 57 struct crypto_blkcipher *rx_tfm;
58 #endif
42}; 59};
43 60
44 61
@@ -46,25 +63,35 @@ static void * prism2_wep_init(int keyidx)
46{ 63{
47 struct prism2_wep_data *priv; 64 struct prism2_wep_data *priv;
48 65
49 priv = kzalloc(sizeof(*priv), GFP_ATOMIC); 66 priv = kmalloc(sizeof(*priv), GFP_ATOMIC);
50 if (priv == NULL) 67 if (priv == NULL)
51 goto fail; 68 goto fail;
69 memset(priv, 0, sizeof(*priv));
52 priv->key_idx = keyidx; 70 priv->key_idx = keyidx;
53 71
72 #if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
73 priv->tfm = crypto_alloc_tfm("arc4", 0);
74 if (priv->tfm == NULL) {
75 printk(KERN_DEBUG "rtllib_crypt_wep: could not allocate "
76 "crypto API arc4\n");
77 goto fail;
78 }
79 #else
54 priv->tx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC); 80 priv->tx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
55 if (IS_ERR(priv->tx_tfm)) { 81 if (IS_ERR(priv->tx_tfm)) {
56 printk(KERN_DEBUG "ieee80211_crypt_wep: could not allocate " 82 printk(KERN_DEBUG "rtllib_crypt_wep: could not allocate "
57 "crypto API arc4\n"); 83 "crypto API arc4\n");
58 priv->tx_tfm = NULL; 84 priv->tx_tfm = NULL;
59 goto fail; 85 goto fail;
60 } 86 }
61 priv->rx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC); 87 priv->rx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
62 if (IS_ERR(priv->rx_tfm)) { 88 if (IS_ERR(priv->rx_tfm)) {
63 printk(KERN_DEBUG "ieee80211_crypt_wep: could not allocate " 89 printk(KERN_DEBUG "rtllib_crypt_wep: could not allocate "
64 "crypto API arc4\n"); 90 "crypto API arc4\n");
65 priv->rx_tfm = NULL; 91 priv->rx_tfm = NULL;
66 goto fail; 92 goto fail;
67 } 93 }
94 #endif
68 95
69 /* start WEP IV from a random value */ 96 /* start WEP IV from a random value */
70 get_random_bytes(&priv->iv, 4); 97 get_random_bytes(&priv->iv, 4);
@@ -72,6 +99,13 @@ static void * prism2_wep_init(int keyidx)
72 return priv; 99 return priv;
73 100
74fail: 101fail:
102 #if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
103 if (priv) {
104 if (priv->tfm)
105 crypto_free_tfm(priv->tfm);
106 kfree(priv);
107 }
108 #else
75 if (priv) { 109 if (priv) {
76 if (priv->tx_tfm) 110 if (priv->tx_tfm)
77 crypto_free_blkcipher(priv->tx_tfm); 111 crypto_free_blkcipher(priv->tx_tfm);
@@ -79,6 +113,7 @@ fail:
79 crypto_free_blkcipher(priv->rx_tfm); 113 crypto_free_blkcipher(priv->rx_tfm);
80 kfree(priv); 114 kfree(priv);
81 } 115 }
116 #endif
82 return NULL; 117 return NULL;
83} 118}
84 119
@@ -86,12 +121,17 @@ fail:
86static void prism2_wep_deinit(void *priv) 121static void prism2_wep_deinit(void *priv)
87{ 122{
88 struct prism2_wep_data *_priv = priv; 123 struct prism2_wep_data *_priv = priv;
124 #if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
125 if (_priv && _priv->tfm)
126 crypto_free_tfm(_priv->tfm);
127 #else
89 if (_priv) { 128 if (_priv) {
90 if (_priv->tx_tfm) 129 if (_priv->tx_tfm)
91 crypto_free_blkcipher(_priv->tx_tfm); 130 crypto_free_blkcipher(_priv->tx_tfm);
92 if (_priv->rx_tfm) 131 if (_priv->rx_tfm)
93 crypto_free_blkcipher(_priv->rx_tfm); 132 crypto_free_blkcipher(_priv->rx_tfm);
94 } 133 }
134 #endif
95 kfree(priv); 135 kfree(priv);
96} 136}
97 137
@@ -108,14 +148,17 @@ static int prism2_wep_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
108 u8 key[WEP_KEY_LEN + 3]; 148 u8 key[WEP_KEY_LEN + 3];
109 u8 *pos; 149 u8 *pos;
110 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE); 150 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
151 #if ( !defined(BUILT_IN_CRYPTO) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21)) || (OPENSUSE_SLED)) )
111 struct blkcipher_desc desc = {.tfm = wep->tx_tfm}; 152 struct blkcipher_desc desc = {.tfm = wep->tx_tfm};
153 #endif
112 u32 crc; 154 u32 crc;
113 u8 *icv; 155 u8 *icv;
114 struct scatterlist sg; 156 struct scatterlist sg;
115 if (skb_headroom(skb) < 4 || skb_tailroom(skb) < 4 || 157 if (skb_headroom(skb) < 4 || skb_tailroom(skb) < 4 ||
116 skb->len < hdr_len) 158 skb->len < hdr_len){
159 printk("Error!!!headroom=%d tailroom=%d skblen=%d hdr_len=%d\n",skb_headroom(skb),skb_tailroom(skb),skb->len,hdr_len);
117 return -1; 160 return -1;
118 161 }
119 len = skb->len - hdr_len; 162 len = skb->len - hdr_len;
120 pos = skb_push(skb, 4); 163 pos = skb_push(skb, 4);
121 memmove(pos, pos + 4, hdr_len); 164 memmove(pos, pos + 4, hdr_len);
@@ -147,16 +190,32 @@ static int prism2_wep_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
147 { 190 {
148 191
149 /* Append little-endian CRC32 and encrypt it to produce ICV */ 192 /* Append little-endian CRC32 and encrypt it to produce ICV */
193 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
150 crc = ~crc32_le(~0, pos, len); 194 crc = ~crc32_le(~0, pos, len);
195 #else
196 crc = ~ether_crc_le(len, pos);
197 #endif
151 icv = skb_put(skb, 4); 198 icv = skb_put(skb, 4);
152 icv[0] = crc; 199 icv[0] = crc;
153 icv[1] = crc >> 8; 200 icv[1] = crc >> 8;
154 icv[2] = crc >> 16; 201 icv[2] = crc >> 16;
155 icv[3] = crc >> 24; 202 icv[3] = crc >> 24;
156 203
157 crypto_blkcipher_setkey(wep->tx_tfm, key, klen); 204 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
205 sg.page = virt_to_page(pos);
206 sg.offset = offset_in_page(pos);
207 sg.length = len + 4;
208 #else
158 sg_init_one(&sg, pos, len+4); 209 sg_init_one(&sg, pos, len+4);
210 #endif
211 #if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
212 crypto_cipher_setkey(wep->tfm, key, klen);
213 crypto_cipher_encrypt(wep->tfm, &sg, &sg, len + 4);
214 return 0;
215 #else
216 crypto_blkcipher_setkey(wep->tx_tfm, key, klen);
159 return crypto_blkcipher_encrypt(&desc, &sg, &sg, len + 4); 217 return crypto_blkcipher_encrypt(&desc, &sg, &sg, len + 4);
218 #endif
160 } 219 }
161 220
162 return 0; 221 return 0;
@@ -177,7 +236,9 @@ static int prism2_wep_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
177 u8 key[WEP_KEY_LEN + 3]; 236 u8 key[WEP_KEY_LEN + 3];
178 u8 keyidx, *pos; 237 u8 keyidx, *pos;
179 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE); 238 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
239 #if ( !defined(BUILT_IN_CRYPTO) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21)) || (OPENSUSE_SLED)) )
180 struct blkcipher_desc desc = {.tfm = wep->rx_tfm}; 240 struct blkcipher_desc desc = {.tfm = wep->rx_tfm};
241 #endif
181 u32 crc; 242 u32 crc;
182 u8 icv[4]; 243 u8 icv[4];
183 struct scatterlist sg; 244 struct scatterlist sg;
@@ -202,11 +263,26 @@ static int prism2_wep_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
202 263
203 if (!tcb_desc->bHwSec) 264 if (!tcb_desc->bHwSec)
204 { 265 {
205 crypto_blkcipher_setkey(wep->rx_tfm, key, klen); 266 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
267 sg.page = virt_to_page(pos);
268 sg.offset = offset_in_page(pos);
269 sg.length = plen + 4;
270 #else
206 sg_init_one(&sg, pos, plen+4); 271 sg_init_one(&sg, pos, plen+4);
272 #endif
273 #if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
274 crypto_cipher_setkey(wep->tfm, key, klen);
275 crypto_cipher_decrypt(wep->tfm, &sg, &sg, plen + 4);
276 #else
277 crypto_blkcipher_setkey(wep->rx_tfm, key, klen);
207 if (crypto_blkcipher_decrypt(&desc, &sg, &sg, plen + 4)) 278 if (crypto_blkcipher_decrypt(&desc, &sg, &sg, plen + 4))
208 return -7; 279 return -7;
280 #endif
281 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
209 crc = ~crc32_le(~0, pos, plen); 282 crc = ~crc32_le(~0, pos, plen);
283 #else
284 crc = ~ether_crc_le(plen, pos);
285 #endif
210 icv[0] = crc; 286 icv[0] = crc;
211 icv[1] = crc >> 8; 287 icv[1] = crc >> 8;
212 icv[2] = crc >> 16; 288 icv[2] = crc >> 16;
@@ -261,7 +337,7 @@ static char * prism2_wep_print_stats(char *p, void *priv)
261} 337}
262 338
263 339
264static struct ieee80211_crypto_ops ieee80211_crypt_wep = { 340static struct rtllib_crypto_ops rtllib_crypt_wep = {
265 .name = "WEP", 341 .name = "WEP",
266 .init = prism2_wep_init, 342 .init = prism2_wep_init,
267 .deinit = prism2_wep_deinit, 343 .deinit = prism2_wep_deinit,
@@ -278,19 +354,18 @@ static struct ieee80211_crypto_ops ieee80211_crypt_wep = {
278}; 354};
279 355
280 356
281int __init ieee80211_crypto_wep_init(void) 357int __init rtllib_crypto_wep_init(void)
282{ 358{
283 return ieee80211_register_crypto_ops(&ieee80211_crypt_wep); 359 return rtllib_register_crypto_ops(&rtllib_crypt_wep);
284} 360}
285 361
286 362
287void __exit ieee80211_crypto_wep_exit(void) 363void __exit rtllib_crypto_wep_exit(void)
288{ 364{
289 ieee80211_unregister_crypto_ops(&ieee80211_crypt_wep); 365 rtllib_unregister_crypto_ops(&rtllib_crypt_wep);
290} 366}
291 367
292void ieee80211_wep_null(void) 368void rtllib_wep_null(void)
293{ 369{
294 return; 370 return;
295} 371}
296
diff --git a/drivers/staging/rtl8192e/rtllib_endianfree.h b/drivers/staging/rtl8192e/rtllib_endianfree.h
new file mode 100644
index 00000000000..46d8f196248
--- /dev/null
+++ b/drivers/staging/rtl8192e/rtllib_endianfree.h
@@ -0,0 +1,156 @@
1#ifndef __INC_ENDIANFREE_H
2#define __INC_ENDIANFREE_H
3
4/*
5 * Call endian free function when
6 * 1. Read/write packet content.
7 * 2. Before write integer to IO.
8 * 3. After read integer from IO.
9 */
10
11#define __MACHINE_LITTLE_ENDIAN 1234 /* LSB first: i386, vax */
12#define __MACHINE_BIG_ENDIAN 4321 /* MSB first: 68000, ibm, net, ppc */
13
14#define BYTE_ORDER __MACHINE_LITTLE_ENDIAN
15
16#if BYTE_ORDER == __MACHINE_LITTLE_ENDIAN
17#define EF1Byte(_val) ((u8)(_val))
18#define EF2Byte(_val) ((u16)(_val))
19#define EF4Byte(_val) ((u32)(_val))
20
21#else
22#define EF1Byte(_val) ((u8)(_val))
23#define EF2Byte(_val) (((((u16)(_val))&0x00ff)<<8)|((((u16)(_val))&0xff00)>>8))
24#define EF4Byte(_val) (((((u32)(_val))&0x000000ff)<<24)|\
25 ((((u32)(_val))&0x0000ff00)<<8)|\
26 ((((u32)(_val))&0x00ff0000)>>8)|\
27 ((((u32)(_val))&0xff000000)>>24))
28#endif
29
30#define ReadEF1Byte(_ptr) EF1Byte(*((u8 *)(_ptr)))
31#define ReadEF2Byte(_ptr) EF2Byte(*((u16 *)(_ptr)))
32#define ReadEF4Byte(_ptr) EF4Byte(*((u32 *)(_ptr)))
33
34#define WriteEF1Byte(_ptr, _val) (*((u8 *)(_ptr)))=EF1Byte(_val)
35#define WriteEF2Byte(_ptr, _val) (*((u16 *)(_ptr)))=EF2Byte(_val)
36#define WriteEF4Byte(_ptr, _val) (*((u32 *)(_ptr)))=EF4Byte(_val)
37#if BYTE_ORDER == __MACHINE_LITTLE_ENDIAN
38#define H2N1BYTE(_val) ((u8)(_val))
39#define H2N2BYTE(_val) (((((u16)(_val))&0x00ff)<<8)|\
40 ((((u16)(_val))&0xff00)>>8))
41#define H2N4BYTE(_val) (((((u32)(_val))&0x000000ff)<<24)|\
42 ((((u32)(_val))&0x0000ff00)<<8) |\
43 ((((u32)(_val))&0x00ff0000)>>8) |\
44 ((((u32)(_val))&0xff000000)>>24))
45#else
46#define H2N1BYTE(_val) ((u8)(_val))
47#define H2N2BYTE(_val) ((u16)(_val))
48#define H2N4BYTE(_val) ((u32)(_val))
49#endif
50
51#if BYTE_ORDER == __MACHINE_LITTLE_ENDIAN
52#define N2H1BYTE(_val) ((u8)(_val))
53#define N2H2BYTE(_val) (((((u16)(_val))&0x00ff)<<8)|\
54 ((((u16)(_val))&0xff00)>>8))
55#define N2H4BYTE(_val) (((((u32)(_val))&0x000000ff)<<24)|\
56 ((((u32)(_val))&0x0000ff00)<<8) |\
57 ((((u32)(_val))&0x00ff0000)>>8) |\
58 ((((u32)(_val))&0xff000000)>>24))
59#else
60#define N2H1BYTE(_val) ((u8)(_val))
61#define N2H2BYTE(_val) ((u16)(_val))
62#define N2H4BYTE(_val) ((u32)(_val))
63#endif
64
65#define BIT_LEN_MASK_32(__BitLen) (0xFFFFFFFF >> (32 - (__BitLen)))
66#define BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen) (BIT_LEN_MASK_32(__BitLen) << (__BitOffset))
67
68#define LE_P4BYTE_TO_HOST_4BYTE(__pStart) (EF4Byte(*((u32 *)(__pStart))))
69
70#define LE_BITS_TO_4BYTE(__pStart, __BitOffset, __BitLen) \
71 ( \
72 ( LE_P4BYTE_TO_HOST_4BYTE(__pStart) >> (__BitOffset) ) \
73 & \
74 BIT_LEN_MASK_32(__BitLen) \
75 )
76
77#define LE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \
78 ( \
79 LE_P4BYTE_TO_HOST_4BYTE(__pStart) \
80 & \
81 ( ~BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen) ) \
82 )
83
84#define SET_BITS_TO_LE_4BYTE(__pStart, __BitOffset, __BitLen, __Value) \
85 *((u32 *)(__pStart)) = \
86 EF4Byte( \
87 LE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \
88 | \
89 ( (((u32)__Value) & BIT_LEN_MASK_32(__BitLen)) << (__BitOffset) ) \
90 );
91
92
93#define BIT_LEN_MASK_16(__BitLen) \
94 (0xFFFF >> (16 - (__BitLen)))
95
96#define BIT_OFFSET_LEN_MASK_16(__BitOffset, __BitLen) \
97 (BIT_LEN_MASK_16(__BitLen) << (__BitOffset))
98
99#define LE_P2BYTE_TO_HOST_2BYTE(__pStart) \
100 (EF2Byte(*((u16 *)(__pStart))))
101
102#define LE_BITS_TO_2BYTE(__pStart, __BitOffset, __BitLen) \
103 ( \
104 ( LE_P2BYTE_TO_HOST_2BYTE(__pStart) >> (__BitOffset) ) \
105 & \
106 BIT_LEN_MASK_16(__BitLen) \
107 )
108
109#define LE_BITS_CLEARED_TO_2BYTE(__pStart, __BitOffset, __BitLen) \
110 ( \
111 LE_P2BYTE_TO_HOST_2BYTE(__pStart) \
112 & \
113 ( ~BIT_OFFSET_LEN_MASK_16(__BitOffset, __BitLen) ) \
114 )
115
116#define SET_BITS_TO_LE_2BYTE(__pStart, __BitOffset, __BitLen, __Value) \
117 *((u16 *)(__pStart)) = \
118 EF2Byte( \
119 LE_BITS_CLEARED_TO_2BYTE(__pStart, __BitOffset, __BitLen) \
120 | \
121 ( (((u16)__Value) & BIT_LEN_MASK_16(__BitLen)) << (__BitOffset) ) \
122 );
123
124#define BIT_LEN_MASK_8(__BitLen) \
125 (0xFF >> (8 - (__BitLen)))
126
127#define BIT_OFFSET_LEN_MASK_8(__BitOffset, __BitLen) \
128 (BIT_LEN_MASK_8(__BitLen) << (__BitOffset))
129
130#define LE_P1BYTE_TO_HOST_1BYTE(__pStart) \
131 (EF1Byte(*((u8 *)(__pStart))))
132
133#define LE_BITS_TO_1BYTE(__pStart, __BitOffset, __BitLen) \
134 ( \
135 ( LE_P1BYTE_TO_HOST_1BYTE(__pStart) >> (__BitOffset) ) \
136 & \
137 BIT_LEN_MASK_8(__BitLen) \
138 )
139
140#define LE_BITS_CLEARED_TO_1BYTE(__pStart, __BitOffset, __BitLen) \
141 ( \
142 LE_P1BYTE_TO_HOST_1BYTE(__pStart) \
143 & \
144 ( ~BIT_OFFSET_LEN_MASK_8(__BitOffset, __BitLen) ) \
145 )
146
147#define SET_BITS_TO_LE_1BYTE(__pStart, __BitOffset, __BitLen, __Value) \
148 *((u8 *)(__pStart)) = \
149 EF1Byte( \
150 LE_BITS_CLEARED_TO_1BYTE(__pStart, __BitOffset, __BitLen) \
151 | \
152 ( (((u8)__Value) & BIT_LEN_MASK_8(__BitLen)) << (__BitOffset) ) \
153 );
154
155#define N_BYTE_ALIGMENT(__Value, __Aligment) ((__Aligment == 1) ? (__Value) : (((__Value + __Aligment - 1) / __Aligment) * __Aligment))
156#endif
diff --git a/drivers/staging/rtl8192e/rtllib_module.c b/drivers/staging/rtl8192e/rtllib_module.c
new file mode 100644
index 00000000000..5373de60ab0
--- /dev/null
+++ b/drivers/staging/rtl8192e/rtllib_module.c
@@ -0,0 +1,374 @@
1/*******************************************************************************
2
3 Copyright(c) 2004 Intel Corporation. All rights reserved.
4
5 Portions of this file are based on the WEP enablement code provided by the
6 Host AP project hostap-drivers v0.1.3
7 Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
8 <jkmaline@cc.hut.fi>
9 Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
10
11 This program is free software; you can redistribute it and/or modify it
12 under the terms of version 2 of the GNU General Public License as
13 published by the Free Software Foundation.
14
15 This program is distributed in the hope that it will be useful, but WITHOUT
16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
17 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
18 more details.
19
20 You should have received a copy of the GNU General Public License along with
21 this program; if not, write to the Free Software Foundation, Inc., 59
22 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23
24 The full GNU General Public License is included in this distribution in the
25 file called LICENSE.
26
27 Contact Information:
28 James P. Ketrenos <ipw2100-admin@linux.intel.com>
29 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30
31*******************************************************************************/
32
33#include <linux/compiler.h>
34#include <linux/errno.h>
35#include <linux/if_arp.h>
36#include <linux/in6.h>
37#include <linux/in.h>
38#include <linux/ip.h>
39#include <linux/kernel.h>
40#include <linux/module.h>
41#include <linux/netdevice.h>
42#include <linux/pci.h>
43#include <linux/proc_fs.h>
44#include <linux/skbuff.h>
45#include <linux/slab.h>
46#include <linux/tcp.h>
47#include <linux/types.h>
48#include <linux/version.h>
49#include <linux/wireless.h>
50#include <linux/etherdevice.h>
51#include <asm/uaccess.h>
52#include <net/arp.h>
53
54#include "rtllib.h"
55
56
57#define DRV_NAME "rtllib_92e"
58
59#ifdef CONFIG_CFG_80211
60#ifdef CONFIG_RTL_RFKILL
61static inline void rtllib_rfkill_poll(struct wiphy *wiphy)
62{
63 struct rtllib_device *rtllib = NULL;
64
65 rtllib = (struct rtllib_device *)wiphy_priv(wiphy);
66
67 rtllib = (struct rtllib_device *)netdev_priv_rsl(rtllib->dev);
68
69 if (rtllib->rtllib_rfkill_poll)
70 rtllib->rtllib_rfkill_poll(rtllib->dev);
71}
72#else
73static inline void rtllib_rfkill_poll(struct wiphy *wiphy) {}
74#endif
75struct cfg80211_ops rtllib_config_ops = {.rfkill_poll = rtllib_rfkill_poll };
76void *rtllib_wiphy_privid = &rtllib_wiphy_privid;
77#endif
78
79void _setup_timer( struct timer_list* ptimer, void* fun, unsigned long data )
80{
81 ptimer->function = fun;
82 ptimer->data = data;
83 init_timer( ptimer );
84}
85
86static inline int rtllib_networks_allocate(struct rtllib_device *ieee)
87{
88 if (ieee->networks)
89 return 0;
90
91#ifndef RTK_DMP_PLATFORM
92 ieee->networks = kmalloc(
93 MAX_NETWORK_COUNT * sizeof(struct rtllib_network),
94 GFP_KERNEL);
95#else
96 ieee->networks = dvr_malloc(MAX_NETWORK_COUNT * sizeof(struct rtllib_network));
97#endif
98 if (!ieee->networks) {
99 printk(KERN_WARNING "%s: Out of memory allocating beacons\n",
100 ieee->dev->name);
101 return -ENOMEM;
102 }
103
104 memset(ieee->networks, 0,
105 MAX_NETWORK_COUNT * sizeof(struct rtllib_network));
106
107 return 0;
108}
109
110static inline void rtllib_networks_free(struct rtllib_device *ieee)
111{
112 if (!ieee->networks)
113 return;
114#ifndef RTK_DMP_PLATFORM
115 kfree(ieee->networks);
116#else
117 dvr_free(ieee->networks);
118#endif
119 ieee->networks = NULL;
120}
121
122static inline void rtllib_networks_initialize(struct rtllib_device *ieee)
123{
124 int i;
125
126 INIT_LIST_HEAD(&ieee->network_free_list);
127 INIT_LIST_HEAD(&ieee->network_list);
128 for (i = 0; i < MAX_NETWORK_COUNT; i++)
129 list_add_tail(&ieee->networks[i].list, &ieee->network_free_list);
130}
131
132#if defined CONFIG_CFG_80211
133static bool rtllib_wdev_alloc(struct rtllib_device *ieee, int sizeof_priv)
134{
135 int priv_size;
136 struct rtllib_device *rtllib = NULL;
137
138 priv_size = ALIGN(sizeof(struct rtllib_device),NETDEV_ALIGN) + sizeof_priv;
139
140 ieee->wdev.wiphy = wiphy_new(&rtllib_config_ops, priv_size);
141 if (!ieee->wdev.wiphy) {
142 RTLLIB_ERROR("Unable to allocate wiphy.\n");
143 goto out_err_new;
144 }
145
146 rtllib = (struct rtllib_device *)wiphy_priv(ieee->wdev.wiphy);
147 rtllib->dev = ieee->dev;
148
149 ieee->dev->ieee80211_ptr = &ieee->wdev;
150 ieee->wdev.iftype = NL80211_IFTYPE_STATION;
151
152 /* Fill-out wiphy structure bits we know... Not enough info
153 * here to call set_wiphy_dev or set MAC address or channel info
154 * -- have to do that in ->ndo_init... */
155 ieee->wdev.wiphy->privid = rtllib_wiphy_privid;
156
157 ieee->wdev.wiphy->max_scan_ssids = 1;
158 ieee->wdev.wiphy->max_scan_ie_len = 0;
159 ieee->wdev.wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC);
160
161 return true;
162
163out_err_new:
164 wiphy_free(ieee->wdev.wiphy);
165 return false;
166}
167#endif
168
169struct net_device *alloc_rtllib(int sizeof_priv)
170{
171 struct rtllib_device *ieee = NULL;
172 struct net_device *dev;
173 int i,err;
174
175 RTLLIB_DEBUG_INFO("Initializing...\n");
176
177 dev = alloc_etherdev(sizeof(struct rtllib_device) + sizeof_priv);
178 if (!dev) {
179 RTLLIB_ERROR("Unable to network device.\n");
180 goto failed;
181 }
182 ieee = (struct rtllib_device *)netdev_priv_rsl(dev);
183 memset(ieee, 0, sizeof(struct rtllib_device)+sizeof_priv);
184 ieee->dev = dev;
185
186#ifdef CONFIG_CFG_80211
187 if (!rtllib_wdev_alloc(ieee, sizeof_priv))
188 goto failed;
189#endif
190 err = rtllib_networks_allocate(ieee);
191 if (err) {
192 RTLLIB_ERROR("Unable to allocate beacon storage: %d\n",
193 err);
194 goto failed;
195 }
196 rtllib_networks_initialize(ieee);
197
198
199 /* Default fragmentation threshold is maximum payload size */
200 ieee->fts = DEFAULT_FTS;
201 ieee->scan_age = DEFAULT_MAX_SCAN_AGE;
202 ieee->open_wep = 1;
203
204 /* Default to enabling full open WEP with host based encrypt/decrypt */
205 ieee->host_encrypt = 1;
206 ieee->host_decrypt = 1;
207 ieee->ieee802_1x = 1; /* Default to supporting 802.1x */
208
209 INIT_LIST_HEAD(&ieee->crypt_deinit_list);
210 _setup_timer(&ieee->crypt_deinit_timer,
211 rtllib_crypt_deinit_handler,
212 (unsigned long) ieee);
213 ieee->rtllib_ap_sec_type = rtllib_ap_sec_type;
214
215 spin_lock_init(&ieee->lock);
216 spin_lock_init(&ieee->wpax_suitlist_lock);
217 spin_lock_init(&ieee->bw_spinlock);
218 spin_lock_init(&ieee->reorder_spinlock);
219 atomic_set(&(ieee->atm_chnlop), 0);
220 atomic_set(&(ieee->atm_swbw), 0);
221
222 ieee->bHalfNMode = false;
223 ieee->wpa_enabled = 0;
224 ieee->tkip_countermeasures = 0;
225 ieee->drop_unencrypted = 0;
226 ieee->privacy_invoked = 0;
227 ieee->ieee802_1x = 1;
228 ieee->raw_tx = 0;
229 ieee->hwsec_active = 0;
230
231 memset(ieee->swcamtable,0,sizeof(SW_CAM_TABLE)*32);
232 rtllib_softmac_init(ieee);
233
234 ieee->pHTInfo = (RT_HIGH_THROUGHPUT*)kzalloc(sizeof(RT_HIGH_THROUGHPUT), GFP_KERNEL);
235 if (ieee->pHTInfo == NULL)
236 {
237 RTLLIB_DEBUG(RTLLIB_DL_ERR, "can't alloc memory for HTInfo\n");
238 return NULL;
239 }
240 HTUpdateDefaultSetting(ieee);
241 HTInitializeHTInfo(ieee);
242 TSInitialize(ieee);
243 for (i = 0; i < IEEE_IBSS_MAC_HASH_SIZE; i++)
244 INIT_LIST_HEAD(&ieee->ibss_mac_hash[i]);
245
246 for (i = 0; i < 17; i++) {
247 ieee->last_rxseq_num[i] = -1;
248 ieee->last_rxfrag_num[i] = -1;
249 ieee->last_packet_time[i] = 0;
250 }
251
252 rtllib_tkip_null();
253 rtllib_wep_null();
254 rtllib_ccmp_null();
255
256 return dev;
257
258 failed:
259 if (dev)
260 free_netdev(dev);
261 return NULL;
262}
263
264
265void free_rtllib(struct net_device *dev)
266{
267 struct rtllib_device *ieee = (struct rtllib_device *)netdev_priv_rsl(dev);
268 int i;
269 if (ieee->pHTInfo != NULL) {
270 kfree(ieee->pHTInfo);
271 ieee->pHTInfo = NULL;
272 }
273 rtllib_softmac_free(ieee);
274 del_timer_sync(&ieee->crypt_deinit_timer);
275 rtllib_crypt_deinit_entries(ieee, 1);
276
277 for (i = 0; i < WEP_KEYS; i++) {
278 struct rtllib_crypt_data *crypt = ieee->crypt[i];
279 if (crypt) {
280 if (crypt->ops)
281 crypt->ops->deinit(crypt->priv);
282 kfree(crypt);
283 ieee->crypt[i] = NULL;
284 }
285 }
286
287 rtllib_networks_free(ieee);
288#ifdef CONFIG_CFG_80211
289 wiphy_unregister(ieee->wdev.wiphy);
290 wiphy_free(ieee->wdev.wiphy);
291#endif
292 free_netdev(dev);
293}
294
295#ifdef CONFIG_RTLLIB_DEBUG
296
297u32 rtllib_debug_level = 0;
298static int debug = \
299 RTLLIB_DL_ERR
300 ;
301struct proc_dir_entry *rtllib_proc = NULL;
302
303static int show_debug_level(char *page, char **start, off_t offset,
304 int count, int *eof, void *data)
305{
306 return snprintf(page, count, "0x%08X\n", rtllib_debug_level);
307}
308
309static int store_debug_level(struct file *file, const char *buffer,
310 unsigned long count, void *data)
311{
312 char buf[] = "0x00000000";
313 unsigned long len = min((unsigned long)sizeof(buf) - 1, count);
314 char *p = (char *)buf;
315 unsigned long val;
316
317 if (copy_from_user(buf, buffer, len))
318 return count;
319 buf[len] = 0;
320 if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
321 p++;
322 if (p[0] == 'x' || p[0] == 'X')
323 p++;
324 val = simple_strtoul(p, &p, 16);
325 } else
326 val = simple_strtoul(p, &p, 10);
327 if (p == buf)
328 printk(KERN_INFO DRV_NAME
329 ": %s is not in hex or decimal form.\n", buf);
330 else
331 rtllib_debug_level = val;
332
333 return strnlen(buf, count);
334}
335
336int __init rtllib_init(void)
337{
338#ifdef CONFIG_RTLLIB_DEBUG
339 struct proc_dir_entry *e;
340
341 rtllib_debug_level = debug;
342 rtllib_proc = create_proc_entry(DRV_NAME, S_IFDIR, init_net.proc_net);
343 if (rtllib_proc == NULL) {
344 RTLLIB_ERROR("Unable to create " DRV_NAME
345 " proc directory\n");
346 return -EIO;
347 }
348 e = create_proc_entry("debug_level", S_IFREG | S_IRUGO | S_IWUSR,
349 rtllib_proc);
350 if (!e) {
351 remove_proc_entry(DRV_NAME, init_net.proc_net);
352 rtllib_proc = NULL;
353 return -EIO;
354 }
355 e->read_proc = show_debug_level;
356 e->write_proc = store_debug_level;
357 e->data = NULL;
358#endif
359
360 return 0;
361}
362
363void __exit rtllib_exit(void)
364{
365#ifdef CONFIG_RTLLIB_DEBUG
366 if (rtllib_proc) {
367 remove_proc_entry("debug_level", rtllib_proc);
368 remove_proc_entry(DRV_NAME, init_net.proc_net);
369 rtllib_proc = NULL;
370 }
371#endif
372}
373
374#endif
diff --git a/drivers/staging/rtl8192e/rtllib_rx.c b/drivers/staging/rtl8192e/rtllib_rx.c
new file mode 100644
index 00000000000..2a7133c6ef3
--- /dev/null
+++ b/drivers/staging/rtl8192e/rtllib_rx.c
@@ -0,0 +1,4234 @@
1/*
2 * Original code based Host AP (software wireless LAN access point) driver
3 * for Intersil Prism2/2.5/3 - hostap.o module, common routines
4 *
5 * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
6 * <jkmaline@cc.hut.fi>
7 * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
8 * Copyright (c) 2004, Intel Corporation
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation. See README and COPYING for
13 * more details.
14 ******************************************************************************
15
16 Few modifications for Realtek's Wi-Fi drivers by
17 Andrea Merello <andreamrl@tiscali.it>
18
19 A special thanks goes to Realtek for their support !
20
21******************************************************************************/
22
23
24#include <linux/compiler.h>
25#include <linux/errno.h>
26#include <linux/if_arp.h>
27#include <linux/in6.h>
28#include <linux/in.h>
29#include <linux/ip.h>
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/netdevice.h>
33#include <linux/pci.h>
34#include <linux/proc_fs.h>
35#include <linux/skbuff.h>
36#include <linux/slab.h>
37#include <linux/tcp.h>
38#include <linux/types.h>
39#include <linux/version.h>
40#include <linux/wireless.h>
41#include <linux/etherdevice.h>
42#include <asm/uaccess.h>
43#include <linux/ctype.h>
44
45#include "rtllib.h"
46#ifdef ENABLE_DOT11D
47#include "dot11d.h"
48#endif
49
50#if defined(RTLLIB_RADIOTAP) && (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,10))
51#include <net/ieee80211_radiotap.h>
52#endif
53
54#if defined CONFIG_CFG_80211
55#include <linux/crc32.h>
56
57struct ieee80211_channel *rtllib_get_channel(struct wiphy *wiphy,
58 int freq)
59{
60 enum ieee80211_band band;
61 struct ieee80211_supported_band *sband;
62 int i;
63
64 for (band = 0; band < IEEE80211_NUM_BANDS; band++) {
65 sband = wiphy->bands[band];
66
67 if (!sband)
68 continue;
69
70 for (i = 0; i < sband->n_channels; i++) {
71 if (sband->channels[i].center_freq == freq)
72 return &sband->channels[i];
73 }
74 }
75
76 return NULL;
77}
78
79int rtllib_channel_to_frequency(int chan)
80{
81 if (chan < 14)
82 return 2407 + chan * 5;
83
84 if (chan == 14)
85 return 2484;
86
87 /* FIXME: 802.11j 17.3.8.3.2 */
88 return (chan + 1000) * 5;
89}
90
91u32 rtllib_parse_elems_crc(u8 *start, size_t len,
92 struct ieee802_11_elems *elems,
93 u64 filter, u32 crc)
94{
95 size_t left = len;
96 u8 *pos = start;
97 bool calc_crc = filter != 0;
98
99 memset(elems, 0, sizeof(*elems));
100 elems->ie_start = start;
101 elems->total_len = len;
102
103 while (left >= 2) {
104 u8 id, elen;
105
106 id = *pos++;
107 elen = *pos++;
108 left -= 2;
109
110 if (elen > left)
111 break;
112
113 if (calc_crc && id < 64 && (filter & BIT(id)))
114 crc = crc32_be(crc, pos - 2, elen + 2);
115
116 switch (id) {
117 case WLAN_EID_SSID:
118 elems->ssid = pos;
119 elems->ssid_len = elen;
120 break;
121 case WLAN_EID_SUPP_RATES:
122 elems->supp_rates = pos;
123 elems->supp_rates_len = elen;
124 break;
125 case WLAN_EID_FH_PARAMS:
126 elems->fh_params = pos;
127 elems->fh_params_len = elen;
128 break;
129 case WLAN_EID_DS_PARAMS:
130 elems->ds_params = pos;
131 elems->ds_params_len = elen;
132 break;
133 case WLAN_EID_CF_PARAMS:
134 elems->cf_params = pos;
135 elems->cf_params_len = elen;
136 break;
137 case WLAN_EID_TIM:
138 if (elen >= sizeof(struct ieee80211_tim_ie)) {
139 elems->tim = (void *)pos;
140 elems->tim_len = elen;
141 }
142 break;
143 case WLAN_EID_IBSS_PARAMS:
144 elems->ibss_params = pos;
145 elems->ibss_params_len = elen;
146 break;
147 case WLAN_EID_CHALLENGE:
148 elems->challenge = pos;
149 elems->challenge_len = elen;
150 break;
151 case WLAN_EID_VENDOR_SPECIFIC:
152 if (elen >= 4 && pos[0] == 0x00 && pos[1] == 0x50 &&
153 pos[2] == 0xf2) {
154 /* Microsoft OUI (00:50:F2) */
155
156 if (calc_crc)
157 crc = crc32_be(crc, pos - 2, elen + 2);
158
159 if (pos[3] == 1) {
160 /* OUI Type 1 - WPA IE */
161 elems->wpa = pos;
162 elems->wpa_len = elen;
163 } else if (elen >= 5 && pos[3] == 2) {
164 /* OUI Type 2 - WMM IE */
165 if (pos[4] == 0) {
166 elems->wmm_info = pos;
167 elems->wmm_info_len = elen;
168 } else if (pos[4] == 1) {
169 elems->wmm_param = pos;
170 elems->wmm_param_len = elen;
171 }
172 }
173 }
174 break;
175 case WLAN_EID_RSN:
176 elems->rsn = pos;
177 elems->rsn_len = elen;
178 break;
179 case WLAN_EID_ERP_INFO:
180 elems->erp_info = pos;
181 elems->erp_info_len = elen;
182 break;
183 case WLAN_EID_EXT_SUPP_RATES:
184 elems->ext_supp_rates = pos;
185 elems->ext_supp_rates_len = elen;
186 break;
187 case WLAN_EID_HT_CAPABILITY:
188 if (elen >= sizeof(struct ieee80211_ht_cap))
189 elems->ht_cap_elem = (void *)pos;
190 break;
191 case WLAN_EID_HT_INFORMATION:
192 if (elen >= sizeof(struct ieee80211_ht_info))
193 elems->ht_info_elem = (void *)pos;
194 break;
195 case WLAN_EID_MESH_ID:
196 elems->mesh_id = pos;
197 elems->mesh_id_len = elen;
198 break;
199 case WLAN_EID_MESH_CONFIG:
200 elems->mesh_config = pos;
201 elems->mesh_config_len = elen;
202 break;
203 case WLAN_EID_PEER_LINK:
204 elems->peer_link = pos;
205 elems->peer_link_len = elen;
206 break;
207 case WLAN_EID_PREQ:
208 elems->preq = pos;
209 elems->preq_len = elen;
210 break;
211 case WLAN_EID_PREP:
212 elems->prep = pos;
213 elems->prep_len = elen;
214 break;
215 case WLAN_EID_PERR:
216 elems->perr = pos;
217 elems->perr_len = elen;
218 break;
219 case WLAN_EID_CHANNEL_SWITCH:
220 elems->ch_switch_elem = pos;
221 elems->ch_switch_elem_len = elen;
222 break;
223 case WLAN_EID_QUIET:
224 if (!elems->quiet_elem) {
225 elems->quiet_elem = pos;
226 elems->quiet_elem_len = elen;
227 }
228 elems->num_of_quiet_elem++;
229 break;
230 case WLAN_EID_COUNTRY:
231 elems->country_elem = pos;
232 elems->country_elem_len = elen;
233 break;
234 case WLAN_EID_PWR_CONSTRAINT:
235 elems->pwr_constr_elem = pos;
236 elems->pwr_constr_elem_len = elen;
237 break;
238 case WLAN_EID_TIMEOUT_INTERVAL:
239 elems->timeout_int = pos;
240 elems->timeout_int_len = elen;
241 break;
242 default:
243 break;
244 }
245
246 left -= elen;
247 pos += elen;
248 }
249
250 return crc;
251}
252
253void rtllib_parse_elems(u8 *start, size_t len,
254 struct ieee802_11_elems *elems)
255{
256 rtllib_parse_elems_crc(start, len, elems, 0, 0);
257}
258
259void ieee80211_scan_rx(struct rtllib_device *ieee, struct sk_buff *skb, struct rtllib_rx_stats *rx_status)
260{
261 struct rtllib_hdr_4addr *header = (struct rtllib_hdr_4addr *)skb->data ;
262 struct ieee80211_mgmt *mgmt;
263 struct ieee80211_bss *bss;
264 u8 *elements;
265 struct ieee80211_channel *channel;
266 size_t baselen;
267 int freq;
268 __le16 fc;
269 bool presp, beacon = false;
270 struct ieee802_11_elems elems;
271 s32 signal = 0;
272
273 if (skb->len < 2)
274 return;
275
276 mgmt = (struct ieee80211_mgmt *) skb->data;
277 fc = mgmt->frame_control;
278
279 if (skb->len < 24)
280 return;
281
282 presp = (WLAN_FC_GET_STYPE(header->frame_ctl) == RTLLIB_STYPE_PROBE_RESP);
283 if (presp) {
284 /* ignore ProbeResp to foreign address */
285 if (memcmp(mgmt->da, ieee->dev->dev_addr, ETH_ALEN))
286 return ;;
287
288 presp = true;
289 elements = mgmt->u.probe_resp.variable;
290 baselen = offsetof(struct ieee80211_mgmt, u.probe_resp.variable);
291 } else {
292 beacon = (WLAN_FC_GET_STYPE(header->frame_ctl) == RTLLIB_STYPE_BEACON);
293 baselen = offsetof(struct ieee80211_mgmt, u.beacon.variable);
294 elements = mgmt->u.beacon.variable;
295 }
296
297 if (!presp && !beacon)
298 return;
299
300 if (baselen > skb->len)
301 return;
302
303 rtllib_parse_elems(elements, skb->len - baselen, &elems);
304
305 if (elems.ds_params && elems.ds_params_len == 1)
306 freq = rtllib_channel_to_frequency(elems.ds_params[0]);
307 else
308 return;
309
310 channel = rtllib_get_channel(ieee->wdev.wiphy, freq);
311
312 if (!channel || channel->flags & IEEE80211_CHAN_DISABLED)
313 return;
314
315 signal = rx_status->signal * 100;
316
317 bss = (void *)cfg80211_inform_bss_frame(ieee->wdev.wiphy, channel,
318 mgmt, skb->len, signal, GFP_ATOMIC);
319
320 return;
321}
322#endif
323
324
325#if defined(RTLLIB_RADIOTAP) && (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,10))
326static int rtllib_rx_radiotap_len(struct rtllib_device *ieee, struct rtllib_rx_stats *rx_status)
327{
328 int len;
329
330 /* always present fields */
331 len = sizeof(struct ieee80211_radiotap_header) +
332 8 + /* TSFT */
333 1 + /* FLAGS */
334 1 + /* RATE */
335 2 + /* CHANNEL IN MHZ */
336 2 + /* CHANNEL BITFIELD */
337 1 + /* HW SIGNAL DBM */
338 1 + /* HW NOISE DBM */
339 1; /* ANTENNA NUMBER */
340
341
342 if (len & 1) /* padding for RX_FLAGS if necessary */
343 len++;
344
345 /* make sure radiotap starts at a naturally aligned address */
346 if (len % 8)
347 len = roundup(len, 8);
348
349 return len;
350}
351
352static void rtllib_add_rx_radiotap_header(struct rtllib_device *ieee,
353 struct sk_buff *skb, int rtap_len, struct rtllib_rx_stats *rx_status)
354{
355 struct ieee80211_radiotap_header *rthdr;
356 unsigned char *pos;
357 printk("add header!\n");
358 rthdr = (struct ieee80211_radiotap_header *)skb_push(skb, rtap_len);
359 memset(rthdr, 0, rtap_len);
360
361 rthdr->it_version = PKTHDR_RADIOTAP_VERSION;
362 rthdr->it_pad = 0;
363 rthdr->it_len = cpu_to_le16(rtap_len);
364 /* radiotap header, set always present flags */
365 rthdr->it_present = cpu_to_le32(
366 (1 << IEEE80211_RADIOTAP_TSFT) |
367 (1 << IEEE80211_RADIOTAP_FLAGS) |
368 (1 << IEEE80211_RADIOTAP_RATE) |
369 (1 << IEEE80211_RADIOTAP_CHANNEL) |
370 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
371 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
372 (1 << IEEE80211_RADIOTAP_ANTENNA));
373
374 pos = (unsigned char *)(rthdr+1);
375 /* the order of the following fields is important */
376 /* IEEE80211_RADIOTAP_TSFT */
377 *(__le64 *)pos = cpu_to_le64(rx_status->TimeStampLow);
378 pos += 8;
379
380 /* IEEE80211_RADIOTAP_FLAGS */
381 if (rx_status->bCRC)
382 *pos |= IEEE80211_RADIOTAP_F_BADFCS;
383 if (rx_status->bShortPreamble)
384 *pos |= IEEE80211_RADIOTAP_F_SHORTPRE;
385 pos++;
386
387 /* IEEE80211_RADIOTAP_RATE */
388 *pos = rx_status->rate / 5;
389 pos++;
390
391 /* IEEE80211_RADIOTAP_CHANNEL */
392 *(__le16 *)pos = cpu_to_le16(rx_status->received_channel);
393 pos += 2;
394 pos += 2;
395
396
397 /* IEEE80211_RADIOTAP_DBM_ANTSIGNAL */
398 *pos = rx_status->RxPower;
399 pos++;
400
401 /* IEEE80211_RADIOTAP_DBM_ANTNOISE */
402 *pos = rx_status->noise;
403 pos++;
404
405 /* IEEE80211_RADIOTAP_ANTENNA */
406 *pos = rx_status->Antenna;
407 pos++;
408
409 /* IEEE80211_RADIOTAP_DB_ANTNOISE is not used */
410
411 /* IEEE80211_RADIOTAP_RX_FLAGS */
412 /* ensure 2 byte alignment for the 2 byte field as required */
413}
414#endif
415
416static inline void rtllib_monitor_rx(struct rtllib_device *ieee,
417 struct sk_buff *skb,struct rtllib_rx_stats *rx_status,
418 size_t hdr_length)
419{
420
421#if defined(RTLLIB_RADIOTAP) && (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,10))
422 int needed_headroom = 0;
423 struct sk_buff *radiotap_skb;
424
425 needed_headroom = rtllib_rx_radiotap_len(ieee, rx_status);
426 printk("needed_headroom = %d\n", needed_headroom);
427 radiotap_skb = skb_copy_expand(skb, needed_headroom, 0, GFP_ATOMIC);
428 dev_kfree_skb(skb);
429 if (!radiotap_skb) {
430 return;
431 }
432
433 rtllib_add_rx_radiotap_header(ieee, radiotap_skb, needed_headroom, rx_status);
434 radiotap_skb->dev = ieee->dev;
435#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
436 skb_reset_mac_header(radiotap_skb);
437#else
438 radiotap_skb->mac.raw = radiotap_skb->data;
439#endif
440 radiotap_skb->ip_summed = CHECKSUM_UNNECESSARY;
441 radiotap_skb->pkt_type = PACKET_OTHERHOST;
442 radiotap_skb->protocol = htons(ETH_P_802_2);
443 memset(radiotap_skb->cb, 0, sizeof(radiotap_skb->cb));
444 netif_rx(radiotap_skb);
445#else
446 skb->dev = ieee->dev;
447#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
448 skb_reset_mac_header(skb);
449#else
450 skb->mac.raw = skb->data;
451#endif
452 skb_pull(skb, hdr_length);
453 skb->pkt_type = PACKET_OTHERHOST;
454 skb->protocol = __constant_htons(ETH_P_80211_RAW);
455 memset(skb->cb, 0, sizeof(skb->cb));
456 netif_rx(skb);
457#endif
458}
459
460/* Called only as a tasklet (software IRQ) */
461static struct rtllib_frag_entry *
462rtllib_frag_cache_find(struct rtllib_device *ieee, unsigned int seq,
463 unsigned int frag, u8 tid,u8 *src, u8 *dst)
464{
465 struct rtllib_frag_entry *entry;
466 int i;
467
468 for (i = 0; i < RTLLIB_FRAG_CACHE_LEN; i++) {
469 entry = &ieee->frag_cache[tid][i];
470 if (entry->skb != NULL &&
471 time_after(jiffies, entry->first_frag_time + 2 * HZ)) {
472 RTLLIB_DEBUG_FRAG(
473 "expiring fragment cache entry "
474 "seq=%u last_frag=%u\n",
475 entry->seq, entry->last_frag);
476 dev_kfree_skb_any(entry->skb);
477 entry->skb = NULL;
478 }
479
480 if (entry->skb != NULL && entry->seq == seq &&
481 (entry->last_frag + 1 == frag || frag == -1) &&
482 memcmp(entry->src_addr, src, ETH_ALEN) == 0 &&
483 memcmp(entry->dst_addr, dst, ETH_ALEN) == 0)
484 return entry;
485 }
486
487 return NULL;
488}
489
490/* Called only as a tasklet (software IRQ) */
491static struct sk_buff *
492rtllib_frag_cache_get(struct rtllib_device *ieee,
493 struct rtllib_hdr_4addr *hdr)
494{
495 struct sk_buff *skb = NULL;
496 u16 fc = le16_to_cpu(hdr->frame_ctl);
497 u16 sc = le16_to_cpu(hdr->seq_ctl);
498 unsigned int frag = WLAN_GET_SEQ_FRAG(sc);
499 unsigned int seq = WLAN_GET_SEQ_SEQ(sc);
500 struct rtllib_frag_entry *entry;
501 struct rtllib_hdr_3addrqos *hdr_3addrqos;
502 struct rtllib_hdr_4addrqos *hdr_4addrqos;
503 u8 tid;
504
505 if (((fc & RTLLIB_FCTL_DSTODS) == RTLLIB_FCTL_DSTODS)&&RTLLIB_QOS_HAS_SEQ(fc)) {
506 hdr_4addrqos = (struct rtllib_hdr_4addrqos *)hdr;
507 tid = le16_to_cpu(hdr_4addrqos->qos_ctl) & RTLLIB_QCTL_TID;
508 tid = UP2AC(tid);
509 tid ++;
510 } else if (RTLLIB_QOS_HAS_SEQ(fc)) {
511 hdr_3addrqos = (struct rtllib_hdr_3addrqos *)hdr;
512 tid = le16_to_cpu(hdr_3addrqos->qos_ctl) & RTLLIB_QCTL_TID;
513 tid = UP2AC(tid);
514 tid ++;
515 } else {
516 tid = 0;
517 }
518
519 if (frag == 0) {
520 /* Reserve enough space to fit maximum frame length */
521 skb = dev_alloc_skb(ieee->dev->mtu +
522 sizeof(struct rtllib_hdr_4addr) +
523 8 /* LLC */ +
524 2 /* alignment */ +
525 8 /* WEP */ +
526 ETH_ALEN /* WDS */ +
527 (RTLLIB_QOS_HAS_SEQ(fc)?2:0) /* QOS Control */);
528 if (skb == NULL)
529 return NULL;
530
531 entry = &ieee->frag_cache[tid][ieee->frag_next_idx[tid]];
532 ieee->frag_next_idx[tid]++;
533 if (ieee->frag_next_idx[tid] >= RTLLIB_FRAG_CACHE_LEN)
534 ieee->frag_next_idx[tid] = 0;
535
536 if (entry->skb != NULL)
537 dev_kfree_skb_any(entry->skb);
538
539 entry->first_frag_time = jiffies;
540 entry->seq = seq;
541 entry->last_frag = frag;
542 entry->skb = skb;
543 memcpy(entry->src_addr, hdr->addr2, ETH_ALEN);
544 memcpy(entry->dst_addr, hdr->addr1, ETH_ALEN);
545 } else {
546 /* received a fragment of a frame for which the head fragment
547 * should have already been received */
548 entry = rtllib_frag_cache_find(ieee, seq, frag, tid,hdr->addr2,
549 hdr->addr1);
550 if (entry != NULL) {
551 entry->last_frag = frag;
552 skb = entry->skb;
553 }
554 }
555
556 return skb;
557}
558
559
560/* Called only as a tasklet (software IRQ) */
561static int rtllib_frag_cache_invalidate(struct rtllib_device *ieee,
562 struct rtllib_hdr_4addr *hdr)
563{
564 u16 fc = le16_to_cpu(hdr->frame_ctl);
565 u16 sc = le16_to_cpu(hdr->seq_ctl);
566 unsigned int seq = WLAN_GET_SEQ_SEQ(sc);
567 struct rtllib_frag_entry *entry;
568 struct rtllib_hdr_3addrqos *hdr_3addrqos;
569 struct rtllib_hdr_4addrqos *hdr_4addrqos;
570 u8 tid;
571
572 if (((fc & RTLLIB_FCTL_DSTODS) == RTLLIB_FCTL_DSTODS)&&RTLLIB_QOS_HAS_SEQ(fc)) {
573 hdr_4addrqos = (struct rtllib_hdr_4addrqos *)hdr;
574 tid = le16_to_cpu(hdr_4addrqos->qos_ctl) & RTLLIB_QCTL_TID;
575 tid = UP2AC(tid);
576 tid ++;
577 } else if (RTLLIB_QOS_HAS_SEQ(fc)) {
578 hdr_3addrqos = (struct rtllib_hdr_3addrqos *)hdr;
579 tid = le16_to_cpu(hdr_3addrqos->qos_ctl) & RTLLIB_QCTL_TID;
580 tid = UP2AC(tid);
581 tid ++;
582 } else {
583 tid = 0;
584 }
585
586 entry = rtllib_frag_cache_find(ieee, seq, -1, tid,hdr->addr2,
587 hdr->addr1);
588
589 if (entry == NULL) {
590 RTLLIB_DEBUG_FRAG(
591 "could not invalidate fragment cache "
592 "entry (seq=%u)\n", seq);
593 return -1;
594 }
595
596 entry->skb = NULL;
597 return 0;
598}
599
600
601
602/* rtllib_rx_frame_mgtmt
603 *
604 * Responsible for handling management control frames
605 *
606 * Called by rtllib_rx */
607static inline int
608rtllib_rx_frame_mgmt(struct rtllib_device *ieee, struct sk_buff *skb,
609 struct rtllib_rx_stats *rx_stats, u16 type,
610 u16 stype)
611{
612 /* On the struct stats definition there is written that
613 * this is not mandatory.... but seems that the probe
614 * response parser uses it
615 */
616 struct rtllib_hdr_3addr * hdr = (struct rtllib_hdr_3addr *)skb->data;
617
618 rx_stats->len = skb->len;
619 rtllib_rx_mgt(ieee,skb,rx_stats);
620 if ((memcmp(hdr->addr1, ieee->dev->dev_addr, ETH_ALEN))) {
621 dev_kfree_skb_any(skb);
622 return 0;
623 }
624 rtllib_rx_frame_softmac(ieee, skb, rx_stats, type, stype);
625
626 dev_kfree_skb_any(skb);
627
628 return 0;
629
630#ifdef NOT_YET
631 if (ieee->iw_mode == IW_MODE_MASTER) {
632 printk(KERN_DEBUG "%s: Master mode not yet suppported.\n",
633 ieee->dev->name);
634 return 0;
635/*
636 hostap_update_sta_ps(ieee, (struct hostap_rtllib_hdr_4addr *)
637 skb->data);*/
638 }
639
640 if (ieee->hostapd && type == RTLLIB_TYPE_MGMT) {
641 if (stype == WLAN_FC_STYPE_BEACON &&
642 ieee->iw_mode == IW_MODE_MASTER) {
643 struct sk_buff *skb2;
644 /* Process beacon frames also in kernel driver to
645 * update STA(AP) table statistics */
646 skb2 = skb_clone(skb, GFP_ATOMIC);
647 if (skb2)
648 hostap_rx(skb2->dev, skb2, rx_stats);
649 }
650
651 /* send management frames to the user space daemon for
652 * processing */
653 ieee->apdevstats.rx_packets++;
654 ieee->apdevstats.rx_bytes += skb->len;
655 prism2_rx_80211(ieee->apdev, skb, rx_stats, PRISM2_RX_MGMT);
656 return 0;
657 }
658
659 if (ieee->iw_mode == IW_MODE_MASTER) {
660 if (type != WLAN_FC_TYPE_MGMT && type != WLAN_FC_TYPE_CTRL) {
661 printk(KERN_DEBUG "%s: unknown management frame "
662 "(type=0x%02x, stype=0x%02x) dropped\n",
663 skb->dev->name, type, stype);
664 return -1;
665 }
666
667 hostap_rx(skb->dev, skb, rx_stats);
668 return 0;
669 }
670
671 printk(KERN_DEBUG "%s: hostap_rx_frame_mgmt: management frame "
672 "received in non-Host AP mode\n", skb->dev->name);
673 return -1;
674#endif
675}
676
677#ifndef CONFIG_CFG_80211
678/* See IEEE 802.1H for LLC/SNAP encapsulation/decapsulation */
679/* Ethernet-II snap header (RFC1042 for most EtherTypes) */
680static unsigned char rfc1042_header[] =
681{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 };
682/* Bridge-Tunnel header (for EtherTypes ETH_P_AARP and ETH_P_IPX) */
683static unsigned char bridge_tunnel_header[] =
684{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0xf8 };
685/* No encapsulation header if EtherType < 0x600 (=length) */
686#endif
687
688/* Called by rtllib_rx_frame_decrypt */
689static int rtllib_is_eapol_frame(struct rtllib_device *ieee,
690 struct sk_buff *skb, size_t hdrlen)
691{
692 struct net_device *dev = ieee->dev;
693 u16 fc, ethertype;
694 struct rtllib_hdr_4addr *hdr;
695 u8 *pos;
696
697 if (skb->len < 24)
698 return 0;
699
700 hdr = (struct rtllib_hdr_4addr *) skb->data;
701 fc = le16_to_cpu(hdr->frame_ctl);
702
703 /* check that the frame is unicast frame to us */
704 if ((fc & (RTLLIB_FCTL_TODS | RTLLIB_FCTL_FROMDS)) ==
705 RTLLIB_FCTL_TODS &&
706 memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN) == 0 &&
707 memcmp(hdr->addr3, dev->dev_addr, ETH_ALEN) == 0) {
708 /* ToDS frame with own addr BSSID and DA */
709 } else if ((fc & (RTLLIB_FCTL_TODS | RTLLIB_FCTL_FROMDS)) ==
710 RTLLIB_FCTL_FROMDS &&
711 memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN) == 0) {
712 /* FromDS frame with own addr as DA */
713 } else
714 return 0;
715
716 if (skb->len < 24 + 8)
717 return 0;
718
719 /* check for port access entity Ethernet type */
720 pos = skb->data + hdrlen;
721 ethertype = (pos[6] << 8) | pos[7];
722 if (ethertype == ETH_P_PAE)
723 return 1;
724
725 return 0;
726}
727
728/* Called only as a tasklet (software IRQ), by rtllib_rx */
729static inline int
730rtllib_rx_frame_decrypt(struct rtllib_device* ieee, struct sk_buff *skb,
731 struct rtllib_crypt_data *crypt)
732{
733 struct rtllib_hdr_4addr *hdr;
734 int res, hdrlen;
735
736 if (crypt == NULL || crypt->ops->decrypt_mpdu == NULL)
737 return 0;
738#if 1
739 if (ieee->hwsec_active)
740 {
741 cb_desc *tcb_desc = (cb_desc *)(skb->cb+ MAX_DEV_ADDR_SIZE);
742 tcb_desc->bHwSec = 1;
743
744 if (ieee->need_sw_enc)
745 tcb_desc->bHwSec = 0;
746 }
747#endif
748 hdr = (struct rtllib_hdr_4addr *) skb->data;
749 hdrlen = rtllib_get_hdrlen(le16_to_cpu(hdr->frame_ctl));
750
751#ifdef CONFIG_RTLLIB_CRYPT_TKIP
752 if (ieee->tkip_countermeasures &&
753 strcmp(crypt->ops->name, "TKIP") == 0) {
754 if (net_ratelimit()) {
755 printk(KERN_DEBUG "%s: TKIP countermeasures: dropped "
756 "received packet from " MAC_FMT "\n",
757 ieee->dev->name, MAC_ARG(hdr->addr2));
758 }
759 return -1;
760 }
761#endif
762
763 atomic_inc(&crypt->refcnt);
764 res = crypt->ops->decrypt_mpdu(skb, hdrlen, crypt->priv);
765 atomic_dec(&crypt->refcnt);
766 if (res < 0) {
767 RTLLIB_DEBUG_DROP(
768 "decryption failed (SA=" MAC_FMT
769 ") res=%d\n", MAC_ARG(hdr->addr2), res);
770 if (res == -2)
771 RTLLIB_DEBUG_DROP("Decryption failed ICV "
772 "mismatch (key %d)\n",
773 skb->data[hdrlen + 3] >> 6);
774 ieee->ieee_stats.rx_discards_undecryptable++;
775 return -1;
776 }
777
778 return res;
779}
780
781
782/* Called only as a tasklet (software IRQ), by rtllib_rx */
783static inline int
784rtllib_rx_frame_decrypt_msdu(struct rtllib_device* ieee, struct sk_buff *skb,
785 int keyidx, struct rtllib_crypt_data *crypt)
786{
787 struct rtllib_hdr_4addr *hdr;
788 int res, hdrlen;
789
790 if (crypt == NULL || crypt->ops->decrypt_msdu == NULL)
791 return 0;
792 if (ieee->hwsec_active)
793 {
794 cb_desc *tcb_desc = (cb_desc *)(skb->cb+ MAX_DEV_ADDR_SIZE);
795 tcb_desc->bHwSec = 1;
796
797 if (ieee->need_sw_enc)
798 tcb_desc->bHwSec = 0;
799 }
800
801 hdr = (struct rtllib_hdr_4addr *) skb->data;
802 hdrlen = rtllib_get_hdrlen(le16_to_cpu(hdr->frame_ctl));
803
804 atomic_inc(&crypt->refcnt);
805 res = crypt->ops->decrypt_msdu(skb, keyidx, hdrlen, crypt->priv,ieee);
806 atomic_dec(&crypt->refcnt);
807 if (res < 0) {
808 printk(KERN_DEBUG "%s: MSDU decryption/MIC verification failed"
809 " (SA=" MAC_FMT " keyidx=%d)\n",
810 ieee->dev->name, MAC_ARG(hdr->addr2), keyidx);
811 return -1;
812 }
813
814 return 0;
815}
816
817
818/* this function is stolen from ipw2200 driver*/
819#define IEEE_PACKET_RETRY_TIME (5*HZ)
820static int is_duplicate_packet(struct rtllib_device *ieee,
821 struct rtllib_hdr_4addr *header)
822{
823 u16 fc = le16_to_cpu(header->frame_ctl);
824 u16 sc = le16_to_cpu(header->seq_ctl);
825 u16 seq = WLAN_GET_SEQ_SEQ(sc);
826 u16 frag = WLAN_GET_SEQ_FRAG(sc);
827 u16 *last_seq, *last_frag;
828 unsigned long *last_time;
829 struct rtllib_hdr_3addrqos *hdr_3addrqos;
830 struct rtllib_hdr_4addrqos *hdr_4addrqos;
831 u8 tid;
832
833 if (((fc & RTLLIB_FCTL_DSTODS) == RTLLIB_FCTL_DSTODS)&&RTLLIB_QOS_HAS_SEQ(fc)) {
834 hdr_4addrqos = (struct rtllib_hdr_4addrqos *)header;
835 tid = le16_to_cpu(hdr_4addrqos->qos_ctl) & RTLLIB_QCTL_TID;
836 tid = UP2AC(tid);
837 tid ++;
838 } else if (RTLLIB_QOS_HAS_SEQ(fc)) {
839 hdr_3addrqos = (struct rtllib_hdr_3addrqos*)header;
840 tid = le16_to_cpu(hdr_3addrqos->qos_ctl) & RTLLIB_QCTL_TID;
841 tid = UP2AC(tid);
842 tid ++;
843 } else {
844 tid = 0;
845 }
846
847 switch (ieee->iw_mode) {
848 case IW_MODE_ADHOC:
849 {
850 struct list_head *p;
851 struct ieee_ibss_seq *entry = NULL;
852 u8 *mac = header->addr2;
853 int index = mac[5] % IEEE_IBSS_MAC_HASH_SIZE;
854 list_for_each(p, &ieee->ibss_mac_hash[index]) {
855 entry = list_entry(p, struct ieee_ibss_seq, list);
856 if (!memcmp(entry->mac, mac, ETH_ALEN))
857 break;
858 }
859 if (p == &ieee->ibss_mac_hash[index]) {
860 entry = kmalloc(sizeof(struct ieee_ibss_seq), GFP_ATOMIC);
861 if (!entry) {
862 printk(KERN_WARNING "Cannot malloc new mac entry\n");
863 return 0;
864 }
865 memcpy(entry->mac, mac, ETH_ALEN);
866 entry->seq_num[tid] = seq;
867 entry->frag_num[tid] = frag;
868 entry->packet_time[tid] = jiffies;
869 list_add(&entry->list, &ieee->ibss_mac_hash[index]);
870 return 0;
871 }
872 last_seq = &entry->seq_num[tid];
873 last_frag = &entry->frag_num[tid];
874 last_time = &entry->packet_time[tid];
875 break;
876 }
877
878 case IW_MODE_INFRA:
879 last_seq = &ieee->last_rxseq_num[tid];
880 last_frag = &ieee->last_rxfrag_num[tid];
881 last_time = &ieee->last_packet_time[tid];
882 break;
883 default:
884 return 0;
885 }
886
887 if ((*last_seq == seq) &&
888 time_after(*last_time + IEEE_PACKET_RETRY_TIME, jiffies)) {
889 if (*last_frag == frag){
890 goto drop;
891
892 }
893 if (*last_frag + 1 != frag)
894 /* out-of-order fragment */
895 goto drop;
896 } else
897 *last_seq = seq;
898
899 *last_frag = frag;
900 *last_time = jiffies;
901 return 0;
902
903drop:
904
905 return 1;
906}
907bool
908AddReorderEntry(
909 PRX_TS_RECORD pTS,
910 PRX_REORDER_ENTRY pReorderEntry
911 )
912{
913 struct list_head *pList = &pTS->RxPendingPktList;
914
915 while(pList->next != &pTS->RxPendingPktList)
916 {
917 if ( SN_LESS(pReorderEntry->SeqNum, ((PRX_REORDER_ENTRY)list_entry(pList->next,RX_REORDER_ENTRY,List))->SeqNum) )
918 {
919 pList = pList->next;
920 }
921 else if ( SN_EQUAL(pReorderEntry->SeqNum, ((PRX_REORDER_ENTRY)list_entry(pList->next,RX_REORDER_ENTRY,List))->SeqNum) )
922 {
923 return false;
924 }
925 else
926 {
927 break;
928 }
929 }
930 pReorderEntry->List.next = pList->next;
931 pReorderEntry->List.next->prev = &pReorderEntry->List;
932 pReorderEntry->List.prev = pList;
933 pList->next = &pReorderEntry->List;
934
935 return true;
936}
937
938void rtllib_indicate_packets(struct rtllib_device *ieee, struct rtllib_rxb** prxbIndicateArray,u8 index)
939{
940 struct net_device_stats *stats = &ieee->stats;
941 u8 i = 0 , j=0;
942 u16 ethertype;
943 for (j = 0; j < index; j++) {
944 struct rtllib_rxb* prxb = prxbIndicateArray[j];
945 for (i = 0; i<prxb->nr_subframes; i++) {
946 struct sk_buff *sub_skb = prxb->subframes[i];
947
948 /* convert hdr + possible LLC headers into Ethernet header */
949 ethertype = (sub_skb->data[6] << 8) | sub_skb->data[7];
950 if (sub_skb->len >= 8 &&
951 ((memcmp(sub_skb->data, rfc1042_header, SNAP_SIZE) == 0 &&
952 ethertype != ETH_P_AARP && ethertype != ETH_P_IPX) ||
953 memcmp(sub_skb->data, bridge_tunnel_header, SNAP_SIZE) == 0)) {
954 /* remove RFC1042 or Bridge-Tunnel encapsulation and
955 * replace EtherType */
956 skb_pull(sub_skb, SNAP_SIZE);
957 memcpy(skb_push(sub_skb, ETH_ALEN), prxb->src, ETH_ALEN);
958 memcpy(skb_push(sub_skb, ETH_ALEN), prxb->dst, ETH_ALEN);
959 } else {
960 u16 len;
961 /* Leave Ethernet header part of hdr and full payload */
962 len = htons(sub_skb->len);
963 memcpy(skb_push(sub_skb, 2), &len, 2);
964 memcpy(skb_push(sub_skb, ETH_ALEN), prxb->src, ETH_ALEN);
965 memcpy(skb_push(sub_skb, ETH_ALEN), prxb->dst, ETH_ALEN);
966 }
967
968 /* Indicat the packets to upper layer */
969 if (sub_skb) {
970 stats->rx_packets++;
971 stats->rx_bytes += sub_skb->len;
972
973 memset(sub_skb->cb, 0, sizeof(sub_skb->cb));
974 sub_skb->protocol = eth_type_trans(sub_skb, ieee->dev);
975 sub_skb->dev = ieee->dev;
976 sub_skb->dev->stats.rx_packets++;
977 sub_skb->dev->stats.rx_bytes += sub_skb->len;
978#ifdef TCP_CSUM_OFFLOAD_RX
979 if ( prxb->tcp_csum_valid)
980 sub_skb->ip_summed = CHECKSUM_UNNECESSARY;
981 else
982 sub_skb->ip_summed = CHECKSUM_NONE;
983
984#else
985 sub_skb->ip_summed = CHECKSUM_NONE; /* 802.11 crc not sufficient */
986#endif
987 ieee->last_rx_ps_time = jiffies;
988 netif_rx(sub_skb);
989 }
990 }
991 kfree(prxb);
992 prxb = NULL;
993 }
994}
995
996void
997rtllib_FlushRxTsPendingPkts(struct rtllib_device *ieee, PRX_TS_RECORD pTS)
998{
999 PRX_REORDER_ENTRY pRxReorderEntry;
1000 struct rtllib_rxb* RfdArray[REORDER_WIN_SIZE];
1001 u8 RfdCnt = 0;
1002
1003
1004 del_timer_sync(&pTS->RxPktPendingTimer);
1005 while(!list_empty(&pTS->RxPendingPktList))
1006 {
1007 if (RfdCnt >= REORDER_WIN_SIZE){
1008 printk("-------------->%s() error! RfdCnt >= REORDER_WIN_SIZE\n", __func__);
1009 break;
1010 }
1011
1012 pRxReorderEntry = (PRX_REORDER_ENTRY)list_entry(pTS->RxPendingPktList.prev,RX_REORDER_ENTRY,List);
1013 RTLLIB_DEBUG(RTLLIB_DL_REORDER,"%s(): Indicate SeqNum %d!\n",__func__, pRxReorderEntry->SeqNum);
1014 list_del_init(&pRxReorderEntry->List);
1015
1016 RfdArray[RfdCnt] = pRxReorderEntry->prxb;
1017
1018 RfdCnt = RfdCnt + 1;
1019 list_add_tail(&pRxReorderEntry->List, &ieee->RxReorder_Unused_List);
1020 }
1021 rtllib_indicate_packets(ieee, RfdArray, RfdCnt);
1022
1023 pTS->RxIndicateSeq = 0xffff;
1024
1025#ifdef MERGE_TO_DO
1026#endif
1027}
1028
1029
1030void RxReorderIndicatePacket( struct rtllib_device *ieee,
1031 struct rtllib_rxb* prxb,
1032 PRX_TS_RECORD pTS,
1033 u16 SeqNum)
1034{
1035 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
1036 PRX_REORDER_ENTRY pReorderEntry = NULL;
1037 struct rtllib_rxb* prxbIndicateArray[REORDER_WIN_SIZE];
1038 u8 WinSize = pHTInfo->RxReorderWinSize;
1039 u16 WinEnd = 0;
1040 u8 index = 0;
1041 bool bMatchWinStart = false, bPktInBuf = false;
1042 unsigned long flags;
1043
1044 RTLLIB_DEBUG(RTLLIB_DL_REORDER,"%s(): Seq is %d,pTS->RxIndicateSeq is %d, WinSize is %d\n",__func__,SeqNum,pTS->RxIndicateSeq,WinSize);
1045
1046 spin_lock_irqsave(&(ieee->reorder_spinlock), flags);
1047
1048 WinEnd = (pTS->RxIndicateSeq + WinSize -1)%4096;
1049 /* Rx Reorder initialize condition.*/
1050 if (pTS->RxIndicateSeq == 0xffff) {
1051 pTS->RxIndicateSeq = SeqNum;
1052 }
1053
1054 /* Drop out the packet which SeqNum is smaller than WinStart */
1055 if (SN_LESS(SeqNum, pTS->RxIndicateSeq)) {
1056 RTLLIB_DEBUG(RTLLIB_DL_REORDER,"Packet Drop! IndicateSeq: %d, NewSeq: %d\n",
1057 pTS->RxIndicateSeq, SeqNum);
1058 pHTInfo->RxReorderDropCounter++;
1059 {
1060 int i;
1061 for (i =0; i < prxb->nr_subframes; i++) {
1062 dev_kfree_skb(prxb->subframes[i]);
1063 }
1064 kfree(prxb);
1065 prxb = NULL;
1066 }
1067 spin_unlock_irqrestore(&(ieee->reorder_spinlock), flags);
1068 return;
1069 }
1070
1071 /*
1072 * Sliding window manipulation. Conditions includes:
1073 * 1. Incoming SeqNum is equal to WinStart =>Window shift 1
1074 * 2. Incoming SeqNum is larger than the WinEnd => Window shift N
1075 */
1076 if (SN_EQUAL(SeqNum, pTS->RxIndicateSeq)) {
1077 pTS->RxIndicateSeq = (pTS->RxIndicateSeq + 1) % 4096;
1078 bMatchWinStart = true;
1079 } else if (SN_LESS(WinEnd, SeqNum)) {
1080 if (SeqNum >= (WinSize - 1)) {
1081 pTS->RxIndicateSeq = SeqNum + 1 -WinSize;
1082 } else {
1083 pTS->RxIndicateSeq = 4095 - (WinSize - (SeqNum +1)) + 1;
1084 }
1085 RTLLIB_DEBUG(RTLLIB_DL_REORDER, "Window Shift! IndicateSeq: %d, NewSeq: %d\n",pTS->RxIndicateSeq, SeqNum);
1086 }
1087
1088 /*
1089 * Indication process.
1090 * After Packet dropping and Sliding Window shifting as above, we can now just indicate the packets
1091 * with the SeqNum smaller than latest WinStart and buffer other packets.
1092 */
1093 /* For Rx Reorder condition:
1094 * 1. All packets with SeqNum smaller than WinStart => Indicate
1095 * 2. All packets with SeqNum larger than or equal to WinStart => Buffer it.
1096 */
1097 if (bMatchWinStart) {
1098 /* Current packet is going to be indicated.*/
1099 RTLLIB_DEBUG(RTLLIB_DL_REORDER, "Packets indication!! IndicateSeq: %d, NewSeq: %d\n",\
1100 pTS->RxIndicateSeq, SeqNum);
1101 prxbIndicateArray[0] = prxb;
1102 index = 1;
1103 } else {
1104 /* Current packet is going to be inserted into pending list.*/
1105 if (!list_empty(&ieee->RxReorder_Unused_List)) {
1106 pReorderEntry = (PRX_REORDER_ENTRY)list_entry(ieee->RxReorder_Unused_List.next,RX_REORDER_ENTRY,List);
1107 list_del_init(&pReorderEntry->List);
1108
1109 /* Make a reorder entry and insert into a the packet list.*/
1110 pReorderEntry->SeqNum = SeqNum;
1111 pReorderEntry->prxb = prxb;
1112
1113#if 1
1114 if (!AddReorderEntry(pTS, pReorderEntry)) {
1115 RTLLIB_DEBUG(RTLLIB_DL_REORDER, "%s(): Duplicate packet is dropped!! IndicateSeq: %d, NewSeq: %d\n",
1116 __func__, pTS->RxIndicateSeq, SeqNum);
1117 list_add_tail(&pReorderEntry->List,&ieee->RxReorder_Unused_List);
1118 {
1119 int i;
1120 for (i =0; i < prxb->nr_subframes; i++) {
1121 dev_kfree_skb(prxb->subframes[i]);
1122 }
1123 kfree(prxb);
1124 prxb = NULL;
1125 }
1126 } else {
1127 RTLLIB_DEBUG(RTLLIB_DL_REORDER,
1128 "Pkt insert into buffer!! IndicateSeq: %d, NewSeq: %d\n",pTS->RxIndicateSeq, SeqNum);
1129 }
1130#endif
1131 }
1132 else {
1133 /*
1134 * Packets are dropped if there is not enough reorder entries.
1135 * This part shall be modified!! We can just indicate all the
1136 * packets in buffer and get reorder entries.
1137 */
1138 RTLLIB_DEBUG(RTLLIB_DL_ERR, "RxReorderIndicatePacket(): There is no reorder entry!! Packet is dropped!!\n");
1139 {
1140 int i;
1141 for (i =0; i < prxb->nr_subframes; i++) {
1142 dev_kfree_skb(prxb->subframes[i]);
1143 }
1144 kfree(prxb);
1145 prxb = NULL;
1146 }
1147 }
1148 }
1149
1150 /* Check if there is any packet need indicate.*/
1151 while(!list_empty(&pTS->RxPendingPktList)) {
1152 RTLLIB_DEBUG(RTLLIB_DL_REORDER,"%s(): start RREORDER indicate\n",__func__);
1153#if 1
1154 pReorderEntry = (PRX_REORDER_ENTRY)list_entry(pTS->RxPendingPktList.prev,RX_REORDER_ENTRY,List);
1155 if ( SN_LESS(pReorderEntry->SeqNum, pTS->RxIndicateSeq) ||
1156 SN_EQUAL(pReorderEntry->SeqNum, pTS->RxIndicateSeq))
1157 {
1158 /* This protect buffer from overflow. */
1159 if (index >= REORDER_WIN_SIZE) {
1160 RTLLIB_DEBUG(RTLLIB_DL_ERR, "RxReorderIndicatePacket(): Buffer overflow!! \n");
1161 bPktInBuf = true;
1162 break;
1163 }
1164
1165 list_del_init(&pReorderEntry->List);
1166
1167 if (SN_EQUAL(pReorderEntry->SeqNum, pTS->RxIndicateSeq))
1168 pTS->RxIndicateSeq = (pTS->RxIndicateSeq + 1) % 4096;
1169
1170 prxbIndicateArray[index] = pReorderEntry->prxb;
1171 RTLLIB_DEBUG(RTLLIB_DL_REORDER,"%s(): Indicate SeqNum %d!\n",__func__, pReorderEntry->SeqNum);
1172 index++;
1173
1174 list_add_tail(&pReorderEntry->List,&ieee->RxReorder_Unused_List);
1175 } else {
1176 bPktInBuf = true;
1177 break;
1178 }
1179#endif
1180 }
1181
1182 /* Handling pending timer. Set this timer to prevent from long time Rx buffering.*/
1183 if (index>0) {
1184 if (timer_pending(&pTS->RxPktPendingTimer)){
1185 del_timer_sync(&pTS->RxPktPendingTimer);
1186 }
1187 pTS->RxTimeoutIndicateSeq = 0xffff;
1188
1189 if (index>REORDER_WIN_SIZE){
1190 RTLLIB_DEBUG(RTLLIB_DL_ERR, "RxReorderIndicatePacket(): Rx Reorer buffer full!! \n");
1191 spin_unlock_irqrestore(&(ieee->reorder_spinlock), flags);
1192 return;
1193 }
1194 rtllib_indicate_packets(ieee, prxbIndicateArray, index);
1195 bPktInBuf = false;
1196 }
1197
1198 if (bPktInBuf && pTS->RxTimeoutIndicateSeq==0xffff) {
1199 RTLLIB_DEBUG(RTLLIB_DL_REORDER,"%s(): SET rx timeout timer\n", __func__);
1200 pTS->RxTimeoutIndicateSeq = pTS->RxIndicateSeq;
1201 mod_timer(&pTS->RxPktPendingTimer, jiffies + MSECS(pHTInfo->RxReorderPendingTime));
1202 }
1203 spin_unlock_irqrestore(&(ieee->reorder_spinlock), flags);
1204}
1205
1206u8 parse_subframe(struct rtllib_device* ieee,struct sk_buff *skb,
1207 struct rtllib_rx_stats *rx_stats,
1208 struct rtllib_rxb *rxb,u8* src,u8* dst)
1209{
1210 struct rtllib_hdr_3addr *hdr = (struct rtllib_hdr_3addr* )skb->data;
1211 u16 fc = le16_to_cpu(hdr->frame_ctl);
1212
1213 u16 LLCOffset= sizeof(struct rtllib_hdr_3addr);
1214 u16 ChkLength;
1215 bool bIsAggregateFrame = false;
1216 u16 nSubframe_Length;
1217 u8 nPadding_Length = 0;
1218 u16 SeqNum=0;
1219 struct sk_buff *sub_skb;
1220 u8 *data_ptr;
1221 /* just for debug purpose */
1222 SeqNum = WLAN_GET_SEQ_SEQ(le16_to_cpu(hdr->seq_ctl));
1223 if ((RTLLIB_QOS_HAS_SEQ(fc))&&\
1224 (((frameqos *)(skb->data + RTLLIB_3ADDR_LEN))->field.reserved)) {
1225 bIsAggregateFrame = true;
1226 }
1227
1228 if (RTLLIB_QOS_HAS_SEQ(fc)) {
1229 LLCOffset += 2;
1230 }
1231 if (rx_stats->bContainHTC) {
1232 LLCOffset += sHTCLng;
1233 }
1234
1235 ChkLength = LLCOffset;/* + (Frame_WEP(frame)!=0 ?Adapter->MgntInfo.SecurityInfo.EncryptionHeadOverhead:0);*/
1236
1237 if ( skb->len <= ChkLength ) {
1238 return 0;
1239 }
1240
1241 skb_pull(skb, LLCOffset);
1242 ieee->bIsAggregateFrame = bIsAggregateFrame;
1243 if (!bIsAggregateFrame) {
1244 rxb->nr_subframes = 1;
1245
1246 /* altered by clark 3/30/2010
1247 * The buffer size of the skb indicated to upper layer
1248 * must be less than 5000, or the defraged IP datagram
1249 * in the IP layer will exceed "ipfrag_high_tresh" and be
1250 * discarded. so there must not use the function
1251 * "skb_copy" and "skb_clone" for "skb".
1252 */
1253
1254 /* Allocate new skb for releasing to upper layer */
1255 sub_skb = dev_alloc_skb(RTLLIB_SKBBUFFER_SIZE);
1256 skb_reserve(sub_skb, 12);
1257 data_ptr = (u8 *)skb_put(sub_skb, skb->len);
1258 memcpy(data_ptr, skb->data, skb->len);
1259 sub_skb->dev = ieee->dev;
1260
1261 rxb->subframes[0] = sub_skb;
1262
1263 memcpy(rxb->src,src,ETH_ALEN);
1264 memcpy(rxb->dst,dst,ETH_ALEN);
1265 rxb->subframes[0]->dev = ieee->dev;
1266 return 1;
1267 } else {
1268 rxb->nr_subframes = 0;
1269 memcpy(rxb->src,src,ETH_ALEN);
1270 memcpy(rxb->dst,dst,ETH_ALEN);
1271 while(skb->len > ETHERNET_HEADER_SIZE) {
1272 /* Offset 12 denote 2 mac address */
1273 nSubframe_Length = *((u16*)(skb->data + 12));
1274 nSubframe_Length = (nSubframe_Length>>8) + (nSubframe_Length<<8);
1275
1276 if (skb->len<(ETHERNET_HEADER_SIZE + nSubframe_Length)) {
1277 printk("%s: A-MSDU parse error!! pRfd->nTotalSubframe : %d\n",\
1278 __func__,rxb->nr_subframes);
1279 printk("%s: A-MSDU parse error!! Subframe Length: %d\n",__func__, nSubframe_Length);
1280 printk("nRemain_Length is %d and nSubframe_Length is : %d\n",skb->len,nSubframe_Length);
1281 printk("The Packet SeqNum is %d\n",SeqNum);
1282 return 0;
1283 }
1284
1285 /* move the data point to data content */
1286 skb_pull(skb, ETHERNET_HEADER_SIZE);
1287
1288 /* altered by clark 3/30/2010
1289 * The buffer size of the skb indicated to upper layer
1290 * must be less than 5000, or the defraged IP datagram
1291 * in the IP layer will exceed "ipfrag_high_tresh" and be
1292 * discarded. so there must not use the function
1293 * "skb_copy" and "skb_clone" for "skb".
1294 */
1295
1296 /* Allocate new skb for releasing to upper layer */
1297 sub_skb = dev_alloc_skb(nSubframe_Length + 12);
1298 skb_reserve(sub_skb, 12);
1299 data_ptr = (u8 *)skb_put(sub_skb, nSubframe_Length);
1300 memcpy(data_ptr,skb->data,nSubframe_Length);
1301
1302 sub_skb->dev = ieee->dev;
1303 rxb->subframes[rxb->nr_subframes++] = sub_skb;
1304 if (rxb->nr_subframes >= MAX_SUBFRAME_COUNT) {
1305 RTLLIB_DEBUG_RX("ParseSubframe(): Too many Subframes! Packets dropped!\n");
1306 break;
1307 }
1308 skb_pull(skb,nSubframe_Length);
1309
1310 if (skb->len != 0) {
1311 nPadding_Length = 4 - ((nSubframe_Length + ETHERNET_HEADER_SIZE) % 4);
1312 if (nPadding_Length == 4) {
1313 nPadding_Length = 0;
1314 }
1315
1316 if (skb->len < nPadding_Length) {
1317 return 0;
1318 }
1319
1320 skb_pull(skb,nPadding_Length);
1321 }
1322 }
1323
1324 return rxb->nr_subframes;
1325 }
1326}
1327
1328
1329size_t rtllib_rx_get_hdrlen(struct rtllib_device *ieee, struct sk_buff *skb,
1330 struct rtllib_rx_stats *rx_stats)
1331{
1332 struct rtllib_hdr_4addr *hdr = (struct rtllib_hdr_4addr *)skb->data;
1333 u16 fc = le16_to_cpu(hdr->frame_ctl);
1334 size_t hdrlen = 0;
1335
1336 hdrlen = rtllib_get_hdrlen(fc);
1337 if (HTCCheck(ieee, skb->data)) {
1338 if (net_ratelimit())
1339 printk("%s: find HTCControl!\n", __func__);
1340 hdrlen += 4;
1341 rx_stats->bContainHTC = 1;
1342 }
1343
1344 if (RTLLIB_QOS_HAS_SEQ(fc))
1345 rx_stats->bIsQosData = 1;
1346
1347 return hdrlen;
1348}
1349
1350int rtllib_rx_check_duplicate(struct rtllib_device *ieee, struct sk_buff *skb, u8 multicast)
1351{
1352 struct rtllib_hdr_4addr *hdr = (struct rtllib_hdr_4addr *)skb->data;
1353 u16 fc, sc;
1354 u8 frag, type, stype;
1355
1356 fc = le16_to_cpu(hdr->frame_ctl);
1357 type = WLAN_FC_GET_TYPE(fc);
1358 stype = WLAN_FC_GET_STYPE(fc);
1359 sc = le16_to_cpu(hdr->seq_ctl);
1360 frag = WLAN_GET_SEQ_FRAG(sc);
1361
1362 if ( (ieee->pHTInfo->bCurRxReorderEnable == false) ||
1363 !ieee->current_network.qos_data.active ||
1364 !IsDataFrame(skb->data) ||
1365 IsLegacyDataFrame(skb->data)) {
1366 if (!((type == RTLLIB_FTYPE_MGMT) && (stype == RTLLIB_STYPE_BEACON))){
1367 if (is_duplicate_packet(ieee, hdr)){
1368 return -1;
1369 }
1370 }
1371 } else {
1372 PRX_TS_RECORD pRxTS = NULL;
1373 if (GetTs(ieee, (PTS_COMMON_INFO*) &pRxTS, hdr->addr2,
1374 (u8)Frame_QoSTID((u8*)(skb->data)), RX_DIR, true)) {
1375 if ((fc & (1<<11)) && (frag == pRxTS->RxLastFragNum) &&
1376 (WLAN_GET_SEQ_SEQ(sc) == pRxTS->RxLastSeqNum)) {
1377 return -1;
1378 } else {
1379 pRxTS->RxLastFragNum = frag;
1380 pRxTS->RxLastSeqNum = WLAN_GET_SEQ_SEQ(sc);
1381 }
1382 } else {
1383 RTLLIB_DEBUG(RTLLIB_DL_ERR, "ERR!!%s(): No TS!! Skip the check!!\n",__func__);
1384 return -1;
1385 }
1386 }
1387
1388 return 0;
1389}
1390void rtllib_rx_extract_addr(struct rtllib_device *ieee, struct rtllib_hdr_4addr *hdr, u8 *dst, u8 *src, u8 *bssid)
1391{
1392 u16 fc = le16_to_cpu(hdr->frame_ctl);
1393
1394 switch (fc & (RTLLIB_FCTL_FROMDS | RTLLIB_FCTL_TODS)) {
1395 case RTLLIB_FCTL_FROMDS:
1396 memcpy(dst, hdr->addr1, ETH_ALEN);
1397 memcpy(src, hdr->addr3, ETH_ALEN);
1398 memcpy(bssid, hdr->addr2, ETH_ALEN);
1399 break;
1400 case RTLLIB_FCTL_TODS:
1401 memcpy(dst, hdr->addr3, ETH_ALEN);
1402 memcpy(src, hdr->addr2, ETH_ALEN);
1403 memcpy(bssid, hdr->addr1, ETH_ALEN);
1404 break;
1405 case RTLLIB_FCTL_FROMDS | RTLLIB_FCTL_TODS:
1406 memcpy(dst, hdr->addr3, ETH_ALEN);
1407 memcpy(src, hdr->addr4, ETH_ALEN);
1408 memcpy(bssid, ieee->current_network.bssid, ETH_ALEN);
1409 break;
1410 case 0:
1411 memcpy(dst, hdr->addr1, ETH_ALEN);
1412 memcpy(src, hdr->addr2, ETH_ALEN);
1413 memcpy(bssid, hdr->addr3, ETH_ALEN);
1414 break;
1415 }
1416}
1417int rtllib_rx_data_filter(struct rtllib_device *ieee, u16 fc, u8 *dst, u8 *src, u8 *bssid, u8 *addr2)
1418{
1419 u8 zero_addr[ETH_ALEN] = {0};
1420 u8 type, stype;
1421
1422 type = WLAN_FC_GET_TYPE(fc);
1423 stype = WLAN_FC_GET_STYPE(fc);
1424
1425 /* Filter frames from different BSS */
1426 if (((fc & RTLLIB_FCTL_DSTODS) != RTLLIB_FCTL_DSTODS)
1427 && (compare_ether_addr(ieee->current_network.bssid, bssid) != 0)
1428 && memcmp(ieee->current_network.bssid, zero_addr, ETH_ALEN)) {
1429 return -1;
1430 }
1431
1432 /* Filter packets sent by an STA that will be forwarded by AP */
1433 if ( ieee->IntelPromiscuousModeInfo.bPromiscuousOn &&
1434 ieee->IntelPromiscuousModeInfo.bFilterSourceStationFrame ) {
1435 if ((fc & RTLLIB_FCTL_TODS) && !(fc & RTLLIB_FCTL_FROMDS) &&
1436 (compare_ether_addr(dst, ieee->current_network.bssid) != 0) &&
1437 (compare_ether_addr(bssid, ieee->current_network.bssid) == 0)) {
1438 return -1;
1439 }
1440 }
1441
1442 /* Nullfunc frames may have PS-bit set, so they must be passed to
1443 * hostap_handle_sta_rx() before being dropped here. */
1444 if (!ieee->IntelPromiscuousModeInfo.bPromiscuousOn){
1445 if (stype != RTLLIB_STYPE_DATA &&
1446 stype != RTLLIB_STYPE_DATA_CFACK &&
1447 stype != RTLLIB_STYPE_DATA_CFPOLL &&
1448 stype != RTLLIB_STYPE_DATA_CFACKPOLL&&
1449 stype != RTLLIB_STYPE_QOS_DATA
1450 ) {
1451 if (stype != RTLLIB_STYPE_NULLFUNC)
1452 RTLLIB_DEBUG_DROP(
1453 "RX: dropped data frame "
1454 "with no data (type=0x%02x, "
1455 "subtype=0x%02x)\n",
1456 type, stype);
1457 return -1;
1458 }
1459 }
1460
1461 if (ieee->iw_mode != IW_MODE_MESH) {
1462 /* packets from our adapter are dropped (echo) */
1463 if (!memcmp(src, ieee->dev->dev_addr, ETH_ALEN))
1464 return -1;
1465
1466 /* {broad,multi}cast packets to our BSS go through */
1467 if (is_multicast_ether_addr(dst) || is_broadcast_ether_addr(dst)) {
1468 if (memcmp(bssid, ieee->current_network.bssid, ETH_ALEN)) {
1469 return -1;
1470 }
1471 }
1472 }
1473 return 0;
1474}
1475int rtllib_rx_get_crypt(
1476 struct rtllib_device *ieee,
1477 struct sk_buff *skb,
1478 struct rtllib_crypt_data **crypt,
1479 size_t hdrlen)
1480{
1481 struct rtllib_hdr_4addr *hdr = (struct rtllib_hdr_4addr *)skb->data;
1482 u16 fc = le16_to_cpu(hdr->frame_ctl);
1483 int idx = 0;
1484
1485 if (ieee->host_decrypt) {
1486 if (skb->len >= hdrlen + 3)
1487 idx = skb->data[hdrlen + 3] >> 6;
1488
1489 *crypt = ieee->crypt[idx];
1490 /* allow NULL decrypt to indicate an station specific override
1491 * for default encryption */
1492 if (*crypt && ((*crypt)->ops == NULL ||
1493 (*crypt)->ops->decrypt_mpdu == NULL))
1494 *crypt = NULL;
1495
1496 if (!*crypt && (fc & RTLLIB_FCTL_WEP)) {
1497 /* This seems to be triggered by some (multicast?)
1498 * frames from other than current BSS, so just drop the
1499 * frames silently instead of filling system log with
1500 * these reports. */
1501 RTLLIB_DEBUG_DROP("Decryption failed (not set)"
1502 " (SA=" MAC_FMT ")\n",
1503 MAC_ARG(hdr->addr2));
1504 ieee->ieee_stats.rx_discards_undecryptable++;
1505 return -1;
1506 }
1507 }
1508
1509 return 0;
1510}
1511int rtllib_rx_decrypt(
1512 struct rtllib_device *ieee,
1513 struct sk_buff *skb,
1514 struct rtllib_rx_stats *rx_stats,
1515 struct rtllib_crypt_data *crypt,
1516 size_t hdrlen)
1517{
1518 struct rtllib_hdr_4addr *hdr;
1519 int keyidx = 0;
1520 u16 fc, sc;
1521 u8 frag;
1522
1523 hdr = (struct rtllib_hdr_4addr *)skb->data;
1524 fc = le16_to_cpu(hdr->frame_ctl);
1525 sc = le16_to_cpu(hdr->seq_ctl);
1526 frag = WLAN_GET_SEQ_FRAG(sc);
1527
1528 if ((!rx_stats->Decrypted)){
1529 ieee->need_sw_enc = 1;
1530 }else{
1531 ieee->need_sw_enc = 0;
1532 }
1533
1534 if (ieee->host_decrypt && (fc & RTLLIB_FCTL_WEP) &&
1535 ((keyidx = rtllib_rx_frame_decrypt(ieee, skb, crypt)) < 0)) {
1536 printk("%s: decrypt frame error\n", __func__);
1537 return -1;
1538 }
1539
1540 hdr = (struct rtllib_hdr_4addr *) skb->data;
1541 if ((frag != 0 || (fc & RTLLIB_FCTL_MOREFRAGS))) {
1542 int flen;
1543 struct sk_buff *frag_skb = rtllib_frag_cache_get(ieee, hdr);
1544 RTLLIB_DEBUG_FRAG("Rx Fragment received (%u)\n", frag);
1545
1546 if (!frag_skb) {
1547 RTLLIB_DEBUG(RTLLIB_DL_RX | RTLLIB_DL_FRAG,
1548 "Rx cannot get skb from fragment "
1549 "cache (morefrag=%d seq=%u frag=%u)\n",
1550 (fc & RTLLIB_FCTL_MOREFRAGS) != 0,
1551 WLAN_GET_SEQ_SEQ(sc), frag);
1552 return -1;
1553 }
1554 flen = skb->len;
1555 if (frag != 0)
1556 flen -= hdrlen;
1557
1558 if (frag_skb->tail + flen > frag_skb->end) {
1559 printk(KERN_WARNING "%s: host decrypted and "
1560 "reassembled frame did not fit skb\n",
1561 __func__);
1562 rtllib_frag_cache_invalidate(ieee, hdr);
1563 return -1;
1564 }
1565
1566 if (frag == 0) {
1567 /* copy first fragment (including full headers) into
1568 * beginning of the fragment cache skb */
1569 memcpy(skb_put(frag_skb, flen), skb->data, flen);
1570 } else {
1571 /* append frame payload to the end of the fragment
1572 * cache skb */
1573 memcpy(skb_put(frag_skb, flen), skb->data + hdrlen,
1574 flen);
1575 }
1576 dev_kfree_skb_any(skb);
1577 skb = NULL;
1578
1579 if (fc & RTLLIB_FCTL_MOREFRAGS) {
1580 /* more fragments expected - leave the skb in fragment
1581 * cache for now; it will be delivered to upper layers
1582 * after all fragments have been received */
1583 return -2;
1584 }
1585
1586 /* this was the last fragment and the frame will be
1587 * delivered, so remove skb from fragment cache */
1588 skb = frag_skb;
1589 hdr = (struct rtllib_hdr_4addr *) skb->data;
1590 rtllib_frag_cache_invalidate(ieee, hdr);
1591 }
1592
1593 /* skb: hdr + (possible reassembled) full MSDU payload; possibly still
1594 * encrypted/authenticated */
1595 if (ieee->host_decrypt && (fc & RTLLIB_FCTL_WEP) &&
1596 rtllib_rx_frame_decrypt_msdu(ieee, skb, keyidx, crypt))
1597 {
1598 printk("%s: ==>decrypt msdu error\n", __func__);
1599 return -1;
1600 }
1601
1602 hdr = (struct rtllib_hdr_4addr *) skb->data;
1603 if (crypt && !(fc & RTLLIB_FCTL_WEP) && !ieee->open_wep) {
1604 if (/*ieee->ieee802_1x &&*/
1605 rtllib_is_eapol_frame(ieee, skb, hdrlen)) {
1606
1607#ifdef CONFIG_RTLLIB_DEBUG
1608 /* pass unencrypted EAPOL frames even if encryption is
1609 * configured */
1610 struct eapol *eap = (struct eapol *)(skb->data +
1611 24);
1612 RTLLIB_DEBUG_EAP("RX: IEEE 802.1X EAPOL frame: %s\n",
1613 eap_get_type(eap->type));
1614#endif
1615 } else {
1616 RTLLIB_DEBUG_DROP(
1617 "encryption configured, but RX "
1618 "frame not encrypted (SA=" MAC_FMT ")\n",
1619 MAC_ARG(hdr->addr2));
1620 return -1;
1621 }
1622 }
1623
1624#ifdef CONFIG_RTLLIB_DEBUG
1625 if (crypt && !(fc & RTLLIB_FCTL_WEP) &&
1626 rtllib_is_eapol_frame(ieee, skb, hdrlen)) {
1627 struct eapol *eap = (struct eapol *)(skb->data +
1628 24);
1629 RTLLIB_DEBUG_EAP("RX: IEEE 802.1X EAPOL frame: %s\n",
1630 eap_get_type(eap->type));
1631 }
1632#endif
1633
1634 if (crypt && !(fc & RTLLIB_FCTL_WEP) && !ieee->open_wep &&
1635 !rtllib_is_eapol_frame(ieee, skb, hdrlen)) {
1636 RTLLIB_DEBUG_DROP(
1637 "dropped unencrypted RX data "
1638 "frame from " MAC_FMT
1639 " (drop_unencrypted=1)\n",
1640 MAC_ARG(hdr->addr2));
1641 return -1;
1642 }
1643
1644 if (rtllib_is_eapol_frame(ieee, skb, hdrlen)) {
1645 printk(KERN_WARNING "RX: IEEE802.1X EAPOL frame!\n");
1646 }
1647
1648 return 0;
1649}
1650void rtllib_rx_check_leave_lps(struct rtllib_device *ieee, u8 unicast, u8 nr_subframes)
1651{
1652#if !defined(RTL8192SU) && !defined(RTL8192U)
1653 if (unicast){
1654
1655 if ((ieee->state == RTLLIB_LINKED) /*&& !MgntInitAdapterInProgress(pMgntInfo)*/)
1656 {
1657 if ( ((ieee->LinkDetectInfo.NumRxUnicastOkInPeriod +ieee->LinkDetectInfo.NumTxOkInPeriod) > 8 ) ||
1658 (ieee->LinkDetectInfo.NumRxUnicastOkInPeriod > 2) )
1659 {
1660 if (ieee->LeisurePSLeave)
1661 ieee->LeisurePSLeave(ieee->dev);
1662 }
1663 }
1664 }
1665#endif
1666 ieee->last_rx_ps_time = jiffies;
1667}
1668void rtllib_rx_indicate_pkt_legacy(
1669 struct rtllib_device *ieee,
1670 struct rtllib_rx_stats *rx_stats,
1671 struct rtllib_rxb* rxb,
1672 u8 *dst,
1673 u8 *src)
1674{
1675 struct net_device *dev = ieee->dev;
1676 u16 ethertype;
1677 int i = 0;
1678
1679 if (rxb == NULL){
1680 printk("%s: rxb is NULL!!\n", __func__);
1681 return ;
1682 }
1683
1684 for (i = 0; i<rxb->nr_subframes; i++) {
1685 struct sk_buff *sub_skb = rxb->subframes[i];
1686
1687 if (sub_skb) {
1688 /* convert hdr + possible LLC headers into Ethernet header */
1689 ethertype = (sub_skb->data[6] << 8) | sub_skb->data[7];
1690 if (sub_skb->len >= 8 &&
1691 ((memcmp(sub_skb->data, rfc1042_header, SNAP_SIZE) == 0 &&
1692 ethertype != ETH_P_AARP && ethertype != ETH_P_IPX) ||
1693 memcmp(sub_skb->data, bridge_tunnel_header, SNAP_SIZE) == 0)) {
1694 /* remove RFC1042 or Bridge-Tunnel encapsulation and
1695 * replace EtherType */
1696 skb_pull(sub_skb, SNAP_SIZE);
1697 memcpy(skb_push(sub_skb, ETH_ALEN), src, ETH_ALEN);
1698 memcpy(skb_push(sub_skb, ETH_ALEN), dst, ETH_ALEN);
1699 } else {
1700 u16 len;
1701 /* Leave Ethernet header part of hdr and full payload */
1702 len = htons(sub_skb->len);
1703 memcpy(skb_push(sub_skb, 2), &len, 2);
1704 memcpy(skb_push(sub_skb, ETH_ALEN), src, ETH_ALEN);
1705 memcpy(skb_push(sub_skb, ETH_ALEN), dst, ETH_ALEN);
1706 }
1707
1708 ieee->stats.rx_packets++;
1709 ieee->stats.rx_bytes += sub_skb->len;
1710
1711 if (is_multicast_ether_addr(dst)) {
1712 ieee->stats.multicast++;
1713 }
1714
1715 /* Indicat the packets to upper layer */
1716 memset(sub_skb->cb, 0, sizeof(sub_skb->cb));
1717 sub_skb->protocol = eth_type_trans(sub_skb, dev);
1718 sub_skb->dev = dev;
1719 sub_skb->dev->stats.rx_packets++;
1720 sub_skb->dev->stats.rx_bytes += sub_skb->len;
1721#ifdef TCP_CSUM_OFFLOAD_RX
1722 if ( rx_stats->tcp_csum_valid)
1723 sub_skb->ip_summed = CHECKSUM_UNNECESSARY;
1724 else
1725 sub_skb->ip_summed = CHECKSUM_NONE;
1726#else
1727 sub_skb->ip_summed = CHECKSUM_NONE; /* 802.11 crc not sufficient */
1728#endif
1729 netif_rx(sub_skb);
1730 }
1731 }
1732 kfree(rxb);
1733 rxb = NULL;
1734}
1735int rtllib_rx_InfraAdhoc(struct rtllib_device *ieee, struct sk_buff *skb,
1736 struct rtllib_rx_stats *rx_stats)
1737{
1738 struct net_device *dev = ieee->dev;
1739 struct rtllib_hdr_4addr *hdr = (struct rtllib_hdr_4addr *)skb->data;
1740 struct rtllib_crypt_data *crypt = NULL;
1741#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
1742 struct sta_info * psta = NULL;
1743#endif
1744 struct rtllib_rxb* rxb = NULL;
1745 PRX_TS_RECORD pTS = NULL;
1746 u16 fc, sc, SeqNum = 0;
1747 u8 type, stype, multicast = 0, unicast = 0, nr_subframes = 0, TID = 0;
1748 u8 dst[ETH_ALEN], src[ETH_ALEN], bssid[ETH_ALEN] = {0}, *payload;
1749 size_t hdrlen = 0;
1750 bool bToOtherSTA = false;
1751 int ret = 0, i = 0;
1752
1753 hdr = (struct rtllib_hdr_4addr *)skb->data;
1754 fc = le16_to_cpu(hdr->frame_ctl);
1755 type = WLAN_FC_GET_TYPE(fc);
1756 stype = WLAN_FC_GET_STYPE(fc);
1757 sc = le16_to_cpu(hdr->seq_ctl);
1758
1759 /*Filter pkt not to me*/
1760 multicast = is_multicast_ether_addr(hdr->addr1)|is_broadcast_ether_addr(hdr->addr1);
1761 unicast = !multicast;
1762 if (unicast && (compare_ether_addr(dev->dev_addr, hdr->addr1) != 0)) {
1763 if (ieee->bNetPromiscuousMode)
1764 bToOtherSTA = true;
1765 else
1766 goto rx_dropped;
1767 }
1768
1769 /*Filter pkt has too small length */
1770 hdrlen = rtllib_rx_get_hdrlen(ieee, skb, rx_stats);
1771 if (skb->len < hdrlen){
1772 printk("%s():ERR!!! skb->len is smaller than hdrlen\n",__func__);
1773 goto rx_dropped;
1774 }
1775
1776 /* Filter Duplicate pkt */
1777 ret = rtllib_rx_check_duplicate(ieee, skb, multicast);
1778 if (ret < 0)
1779 goto rx_dropped;
1780
1781 /* Filter CTRL Frame */
1782 if (type == RTLLIB_FTYPE_CTL) {
1783 goto rx_dropped;
1784 }
1785
1786 /* Filter MGNT Frame */
1787 if (type == RTLLIB_FTYPE_MGMT) {
1788 if (bToOtherSTA)
1789 goto rx_dropped;
1790 if (rtllib_rx_frame_mgmt(ieee, skb, rx_stats, type, stype))
1791 goto rx_dropped;
1792 else
1793 goto rx_exit;
1794 }
1795
1796 /* Filter WAPI DATA Frame */
1797
1798 /* Update statstics for AP roaming */
1799 if (!bToOtherSTA){
1800 ieee->LinkDetectInfo.NumRecvDataInPeriod++;
1801 ieee->LinkDetectInfo.NumRxOkInPeriod++;
1802 }
1803 dev->last_rx = jiffies;
1804
1805 /* Data frame - extract src/dst addresses */
1806 rtllib_rx_extract_addr(ieee, hdr, dst, src, bssid);
1807
1808 /* Filter Data frames */
1809 ret = rtllib_rx_data_filter(ieee, fc, dst, src, bssid, hdr->addr2);
1810 if (ret < 0)
1811 goto rx_dropped;
1812
1813 if (skb->len == hdrlen){
1814 goto rx_dropped;
1815 }
1816
1817 /* Send pspoll based on moredata */
1818 if ((ieee->iw_mode == IW_MODE_INFRA) && (ieee->sta_sleep == LPS_IS_SLEEP)
1819 && (ieee->polling) && (!bToOtherSTA)) {
1820 if (WLAN_FC_MORE_DATA(fc)) {
1821 /* more data bit is set, let's request a new frame from the AP */
1822 rtllib_sta_ps_send_pspoll_frame(ieee);
1823 } else {
1824 ieee->polling = false;
1825 }
1826 }
1827
1828#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
1829 if (ieee->iw_mode == IW_MODE_ADHOC){
1830 psta = GetStaInfo(ieee, src);
1831 if (NULL != psta)
1832 psta->LastActiveTime = jiffies;
1833 }
1834#endif
1835
1836 /* Get crypt if encrypted */
1837 ret = rtllib_rx_get_crypt(ieee, skb, &crypt, hdrlen);
1838 if (ret == -1)
1839 goto rx_dropped;
1840
1841 /* Decrypt data frame (including reassemble) */
1842 ret = rtllib_rx_decrypt(ieee, skb, rx_stats, crypt, hdrlen);
1843 if (ret == -1)
1844 goto rx_dropped;
1845 else if (ret == -2)
1846 goto rx_exit;
1847
1848 /* Get TS for Rx Reorder */
1849 hdr = (struct rtllib_hdr_4addr *) skb->data;
1850 if (ieee->current_network.qos_data.active && IsQoSDataFrame(skb->data)
1851 && !is_multicast_ether_addr(hdr->addr1) && !is_broadcast_ether_addr(hdr->addr1)
1852 && (!bToOtherSTA))
1853 {
1854 TID = Frame_QoSTID(skb->data);
1855 SeqNum = WLAN_GET_SEQ_SEQ(sc);
1856 GetTs(ieee,(PTS_COMMON_INFO*) &pTS,hdr->addr2,TID,RX_DIR,true);
1857 if (TID !=0 && TID !=3){
1858 ieee->bis_any_nonbepkts = true;
1859 }
1860 }
1861
1862 /* Parse rx data frame (For AMSDU) */
1863 /* skb: hdr + (possible reassembled) full plaintext payload */
1864 payload = skb->data + hdrlen;
1865 rxb = (struct rtllib_rxb*)kmalloc(sizeof(struct rtllib_rxb),GFP_ATOMIC);
1866 if (rxb == NULL)
1867 {
1868 RTLLIB_DEBUG(RTLLIB_DL_ERR,"%s(): kmalloc rxb error\n",__func__);
1869 goto rx_dropped;
1870 }
1871 /* to parse amsdu packets */
1872 /* qos data packets & reserved bit is 1 */
1873 if (parse_subframe(ieee,skb,rx_stats,rxb,src,dst) == 0) {
1874 /* only to free rxb, and not submit the packets to upper layer */
1875 for (i =0; i < rxb->nr_subframes; i++) {
1876 dev_kfree_skb(rxb->subframes[i]);
1877 }
1878 kfree(rxb);
1879 rxb = NULL;
1880 goto rx_dropped;
1881 }
1882
1883 /* Update WAPI PN */
1884
1885 /* Check if leave LPS */
1886 if (!bToOtherSTA){
1887 if (ieee->bIsAggregateFrame)
1888 nr_subframes = rxb->nr_subframes;
1889 else
1890 nr_subframes = 1;
1891 if (unicast)
1892 ieee->LinkDetectInfo.NumRxUnicastOkInPeriod += nr_subframes;
1893 rtllib_rx_check_leave_lps(ieee, unicast, nr_subframes);
1894 }
1895
1896 /* Indicate packets to upper layer or Rx Reorder */
1897 if (ieee->pHTInfo->bCurRxReorderEnable == false ||pTS == NULL || bToOtherSTA){
1898 rtllib_rx_indicate_pkt_legacy(ieee, rx_stats, rxb, dst, src);
1899 }else{
1900#ifdef TCP_CSUM_OFFLOAD_RX
1901 rxb->tcp_csum_valid = rx_stats->tcp_csum_valid;
1902#endif
1903 RxReorderIndicatePacket(ieee, rxb, pTS, SeqNum);
1904 }
1905
1906 dev_kfree_skb(skb);
1907
1908 rx_exit:
1909 return 1;
1910
1911 rx_dropped:
1912 if (rxb != NULL)
1913 {
1914 kfree(rxb);
1915 rxb = NULL;
1916 }
1917 ieee->stats.rx_dropped++;
1918
1919 /* Returning 0 indicates to caller that we have not handled the SKB--
1920 * so it is still allocated and can be used again by underlying
1921 * hardware as a DMA target */
1922 return 0;
1923}
1924
1925int rtllib_rx_Master(struct rtllib_device *ieee, struct sk_buff *skb,
1926 struct rtllib_rx_stats *rx_stats)
1927{
1928 return 0;
1929}
1930int rtllib_rx_Monitor(struct rtllib_device *ieee, struct sk_buff *skb,
1931 struct rtllib_rx_stats *rx_stats)
1932{
1933 struct rtllib_hdr_4addr *hdr = (struct rtllib_hdr_4addr *)skb->data;
1934 u16 fc = le16_to_cpu(hdr->frame_ctl);
1935 size_t hdrlen = rtllib_get_hdrlen(fc);
1936
1937 if (skb->len < hdrlen){
1938 printk("%s():ERR!!! skb->len is smaller than hdrlen\n", __func__);
1939 return 0;
1940 }
1941
1942 if (HTCCheck(ieee, skb->data)) {
1943 if (net_ratelimit())
1944 printk("%s: Find HTCControl!\n", __func__);
1945 hdrlen += 4;
1946 }
1947
1948#if WIRELESS_EXT > 15
1949 rtllib_monitor_rx(ieee, skb, rx_stats, hdrlen);
1950 ieee->stats.rx_packets++;
1951 ieee->stats.rx_bytes += skb->len;
1952#endif
1953 return 1;
1954}
1955
1956int rtllib_rx_Mesh(struct rtllib_device *ieee, struct sk_buff *skb,
1957 struct rtllib_rx_stats *rx_stats)
1958{
1959 return 0;
1960}
1961
1962#if 1
1963/* All received frames are sent to this function. @skb contains the frame in
1964 * IEEE 802.11 format, i.e., in the format it was sent over air.
1965 * This function is called only as a tasklet (software IRQ). */
1966int rtllib_rx(struct rtllib_device *ieee, struct sk_buff *skb,
1967 struct rtllib_rx_stats *rx_stats)
1968{
1969 int ret = 0;
1970
1971 if ((NULL==ieee) || (NULL==skb) || (NULL==rx_stats)){
1972 printk(KERN_INFO "%s: Input parameters NULL!\n", __func__);
1973 goto rx_dropped;
1974 }
1975 if (skb->len < 10) {
1976 printk(KERN_INFO "%s: SKB length < 10 \n", __func__);
1977 goto rx_dropped;
1978 }
1979
1980 switch (ieee->iw_mode) {
1981 case IW_MODE_ADHOC:
1982 case IW_MODE_INFRA:
1983 ret = rtllib_rx_InfraAdhoc(ieee, skb, rx_stats);
1984 break;
1985 case IW_MODE_MASTER:
1986 case IW_MODE_REPEAT:
1987 ret = rtllib_rx_Master(ieee, skb, rx_stats);
1988 break;
1989 case IW_MODE_MONITOR:
1990 ret = rtllib_rx_Monitor(ieee, skb, rx_stats);
1991 break;
1992 case IW_MODE_MESH:
1993 ret = rtllib_rx_Mesh(ieee, skb, rx_stats);
1994 break;
1995 default:
1996 printk(KERN_INFO"%s: ERR iw mode!!!\n", __func__);
1997 break;
1998 }
1999
2000 return ret;
2001
2002 rx_dropped:
2003 ieee->stats.rx_dropped++;
2004 return 0;
2005}
2006#else
2007int rtllib_rx(struct rtllib_device *ieee, struct sk_buff *skb,
2008 struct rtllib_rx_stats *rx_stats)
2009{
2010 struct net_device *dev = ieee->dev;
2011 struct rtllib_hdr_4addr *hdr;
2012 size_t hdrlen;
2013 u16 fc, type, stype, sc;
2014 struct net_device_stats *stats = NULL;
2015 unsigned int frag;
2016 u8 *payload;
2017 u16 ethertype;
2018 u8 TID = 0;
2019 u16 SeqNum = 0;
2020 PRX_TS_RECORD pTS = NULL;
2021#ifdef NOT_YET
2022 struct net_device *wds = NULL;
2023 struct sk_buff *skb2 = NULL;
2024 struct net_device *wds = NULL;
2025 int frame_authorized = 0;
2026 int from_assoc_ap = 0;
2027 void *sta = NULL;
2028#endif
2029 u8 dst[ETH_ALEN];
2030 u8 src[ETH_ALEN];
2031 u8 bssid[ETH_ALEN] = {0};
2032 u8 zero_addr[ETH_ALEN] = {0};
2033 struct rtllib_crypt_data *crypt = NULL;
2034 int keyidx = 0;
2035#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
2036 struct sta_info * psta = NULL;
2037#endif
2038 bool unicast_packet = false;
2039 int i;
2040 struct rtllib_rxb* rxb = NULL;
2041 int multicast = 0;
2042 bool tmp_dump = false;
2043 bool bToOtherSTA = false;
2044 hdr = (struct rtllib_hdr_4addr *)skb->data;
2045 stats = &ieee->stats;
2046
2047 multicast = is_multicast_ether_addr(hdr->addr1)|is_broadcast_ether_addr(hdr->addr1);
2048 if (!multicast && (compare_ether_addr(dev->dev_addr, hdr->addr1) != 0)) {
2049 if ((ieee->iw_mode == IW_MODE_MONITOR) || ieee->bNetPromiscuousMode){
2050 bToOtherSTA = true;
2051 }else{
2052 goto rx_dropped;
2053 }
2054 }
2055
2056 fc = le16_to_cpu(hdr->frame_ctl);
2057 type = WLAN_FC_GET_TYPE(fc);
2058 stype = WLAN_FC_GET_STYPE(fc);
2059 sc = le16_to_cpu(hdr->seq_ctl);
2060 frag = WLAN_GET_SEQ_FRAG(sc);
2061
2062 ieee->need_sw_enc = 0;
2063
2064 hdrlen = rtllib_get_hdrlen(fc);
2065 if (skb->len < hdrlen){
2066 printk("%s():ERR!!! skb->len is smaller than hdrlen\n",__func__);
2067 goto rx_dropped;
2068 }
2069
2070 if (HTCCheck(ieee, skb->data)) {
2071 if (net_ratelimit())
2072 printk("find HTCControl\n");
2073 hdrlen += 4;
2074 rx_stats->bContainHTC = 1;
2075 }
2076 if (RTLLIB_QOS_HAS_SEQ(fc))
2077 rx_stats->bIsQosData = 1;
2078 if ((0) && (type == RTLLIB_FTYPE_DATA) && ((is_broadcast_ether_addr(hdr->addr1)) || (compare_ether_addr(dev->dev_addr, hdr->addr1) == 0))) {
2079 printk("===>RX data before decrypt\n");
2080 tmp_dump = true;
2081 dump_buf(skb->data,skb->len);
2082 }
2083#ifdef NOT_YET
2084 hostap_update_rx_stats(local->ap, hdr, rx_stats);
2085#endif
2086
2087 if (ieee->host_decrypt) {
2088 int idx = 0;
2089 if (skb->len >= hdrlen + 3)
2090 idx = skb->data[hdrlen + 3] >> 6;
2091 crypt = ieee->crypt[idx];
2092#ifdef NOT_YET
2093 sta = NULL;
2094
2095 /* Use station specific key to override default keys if the
2096 * receiver address is a unicast address ("individual RA"). If
2097 * bcrx_sta_key parameter is set, station specific key is used
2098 * even with broad/multicast targets (this is against IEEE
2099 * 802.11, but makes it easier to use different keys with
2100 * stations that do not support WEP key mapping). */
2101
2102 if (!(hdr->addr1[0] & 0x01) || local->bcrx_sta_key)
2103 (void) hostap_handle_sta_crypto(local, hdr, &crypt,
2104 &sta);
2105#endif
2106
2107 /* allow NULL decrypt to indicate an station specific override
2108 * for default encryption */
2109 if (crypt && (crypt->ops == NULL ||
2110 crypt->ops->decrypt_mpdu == NULL))
2111 crypt = NULL;
2112
2113 if (!crypt && (fc & RTLLIB_FCTL_WEP)) {
2114 /* This seems to be triggered by some (multicast?)
2115 * frames from other than current BSS, so just drop the
2116 * frames silently instead of filling system log with
2117 * these reports. */
2118 RTLLIB_DEBUG_DROP("Decryption failed (not set)"
2119 " (SA=" MAC_FMT ")\n",
2120 MAC_ARG(hdr->addr2));
2121 ieee->ieee_stats.rx_discards_undecryptable++;
2122 goto rx_dropped;
2123 }
2124 }
2125
2126 if (skb->len < RTLLIB_DATA_HDR3_LEN)
2127 goto rx_dropped;
2128
2129 if ( (ieee->pHTInfo->bCurRxReorderEnable == false) ||
2130 !ieee->current_network.qos_data.active ||
2131 !IsDataFrame(skb->data) ||
2132 IsLegacyDataFrame(skb->data)) {
2133 if (!((type == RTLLIB_FTYPE_MGMT) && (stype == RTLLIB_STYPE_BEACON))){
2134 if (is_duplicate_packet(ieee, hdr)){
2135 goto rx_dropped;
2136 }
2137 }
2138 } else {
2139 PRX_TS_RECORD pRxTS = NULL;
2140 if (GetTs(ieee, (PTS_COMMON_INFO*) &pRxTS, hdr->addr2,
2141 (u8)Frame_QoSTID((u8*)(skb->data)), RX_DIR, true)) {
2142 if ((fc & (1<<11)) && (frag == pRxTS->RxLastFragNum) &&
2143 (WLAN_GET_SEQ_SEQ(sc) == pRxTS->RxLastSeqNum)) {
2144 goto rx_dropped;
2145 } else {
2146 pRxTS->RxLastFragNum = frag;
2147 pRxTS->RxLastSeqNum = WLAN_GET_SEQ_SEQ(sc);
2148 }
2149 } else {
2150 RTLLIB_DEBUG(RTLLIB_DL_ERR, "ERR!!%s(): No TS!! Skip the check!!\n",__func__);
2151 goto rx_dropped;
2152 }
2153 }
2154 if (type == RTLLIB_FTYPE_MGMT) {
2155 if (bToOtherSTA)
2156 goto rx_dropped;
2157 if (rtllib_rx_frame_mgmt(ieee, skb, rx_stats, type, stype))
2158 goto rx_dropped;
2159 else
2160 goto rx_exit;
2161 }
2162 if (type == RTLLIB_FTYPE_CTL) {
2163 goto rx_dropped;
2164 }
2165 /* Data frame - extract src/dst addresses */
2166 switch (fc & (RTLLIB_FCTL_FROMDS | RTLLIB_FCTL_TODS)) {
2167 case RTLLIB_FCTL_FROMDS:
2168 memcpy(dst, hdr->addr1, ETH_ALEN);
2169 memcpy(src, hdr->addr3, ETH_ALEN);
2170 memcpy(bssid, hdr->addr2, ETH_ALEN);
2171 break;
2172 case RTLLIB_FCTL_TODS:
2173 memcpy(dst, hdr->addr3, ETH_ALEN);
2174 memcpy(src, hdr->addr2, ETH_ALEN);
2175 memcpy(bssid, hdr->addr1, ETH_ALEN);
2176 break;
2177 case RTLLIB_FCTL_FROMDS | RTLLIB_FCTL_TODS:
2178 if (skb->len < RTLLIB_DATA_HDR4_LEN)
2179 goto rx_dropped;
2180 memcpy(dst, hdr->addr3, ETH_ALEN);
2181 memcpy(src, hdr->addr4, ETH_ALEN);
2182 memcpy(bssid, ieee->current_network.bssid, ETH_ALEN);
2183 break;
2184 case 0:
2185 memcpy(dst, hdr->addr1, ETH_ALEN);
2186 memcpy(src, hdr->addr2, ETH_ALEN);
2187 memcpy(bssid, hdr->addr3, ETH_ALEN);
2188 break;
2189 }
2190
2191 /* Filter frames from different BSS */
2192 if ((type != RTLLIB_FTYPE_CTL) && ((fc & RTLLIB_FCTL_DSTODS) != RTLLIB_FCTL_DSTODS)
2193 && (compare_ether_addr(ieee->current_network.bssid, bssid) != 0) && memcmp(ieee->current_network.bssid, zero_addr, ETH_ALEN)) {
2194 goto rx_dropped;
2195 }
2196
2197 /* Filter packets sent by an STA that will be forwarded by AP */
2198 if ( ieee->IntelPromiscuousModeInfo.bPromiscuousOn &&
2199 ieee->IntelPromiscuousModeInfo.bFilterSourceStationFrame ) {
2200 if ((fc & RTLLIB_FCTL_TODS) && !(fc & RTLLIB_FCTL_FROMDS) &&
2201 (compare_ether_addr(dst, ieee->current_network.bssid) != 0) &&
2202 (compare_ether_addr(bssid, ieee->current_network.bssid) == 0)) {
2203 goto rx_dropped;
2204 }
2205 }
2206
2207#ifdef NOT_YET
2208 if (hostap_rx_frame_wds(ieee, hdr, fc, &wds))
2209 goto rx_dropped;
2210 if (wds) {
2211 skb->dev = dev = wds;
2212 stats = hostap_get_stats(dev);
2213 }
2214
2215 if (ieee->iw_mode == IW_MODE_MASTER && !wds &&
2216 (fc & (RTLLIB_FCTL_TODS | RTLLIB_FCTL_FROMDS)) == RTLLIB_FCTL_FROMDS &&
2217 ieee->stadev &&
2218 memcmp(hdr->addr2, ieee->assoc_ap_addr, ETH_ALEN) == 0) {
2219 /* Frame from BSSID of the AP for which we are a client */
2220 skb->dev = dev = ieee->stadev;
2221 stats = hostap_get_stats(dev);
2222 from_assoc_ap = 1;
2223 }
2224#endif
2225
2226 dev->last_rx = jiffies;
2227
2228#ifdef NOT_YET
2229 if ((ieee->iw_mode == IW_MODE_MASTER ||
2230 ieee->iw_mode == IW_MODE_REPEAT) &&
2231 !from_assoc_ap) {
2232 switch (hostap_handle_sta_rx(ieee, dev, skb, rx_stats,
2233 wds != NULL)) {
2234 case AP_RX_CONTINUE_NOT_AUTHORIZED:
2235 frame_authorized = 0;
2236 break;
2237 case AP_RX_CONTINUE:
2238 frame_authorized = 1;
2239 break;
2240 case AP_RX_DROP:
2241 goto rx_dropped;
2242 case AP_RX_EXIT:
2243 goto rx_exit;
2244 }
2245 }
2246#endif
2247 /* Nullfunc frames may have PS-bit set, so they must be passed to
2248 * hostap_handle_sta_rx() before being dropped here. */
2249 if (stype != RTLLIB_STYPE_DATA &&
2250 stype != RTLLIB_STYPE_DATA_CFACK &&
2251 stype != RTLLIB_STYPE_DATA_CFPOLL &&
2252 stype != RTLLIB_STYPE_DATA_CFACKPOLL&&
2253 stype != RTLLIB_STYPE_QOS_DATA
2254 ) {
2255 if (stype != RTLLIB_STYPE_NULLFUNC)
2256 RTLLIB_DEBUG_DROP(
2257 "RX: dropped data frame "
2258 "with no data (type=0x%02x, "
2259 "subtype=0x%02x, len=%d)\n",
2260 type, stype, skb->len);
2261 goto rx_dropped;
2262 }
2263
2264 if (skb->len == hdrlen){
2265 goto rx_dropped;
2266 }
2267
2268 {
2269 /* network filter more precisely */
2270 switch (ieee->iw_mode) {
2271 case IW_MODE_ADHOC:
2272 /* packets from our adapter are dropped (echo) */
2273 if (!memcmp(hdr->addr2, dev->dev_addr, ETH_ALEN))
2274 goto rx_dropped;
2275
2276 /* {broad,multi}cast packets to our BSSID go through */
2277 if (is_multicast_ether_addr(hdr->addr1)) {
2278 if (!memcmp(hdr->addr3, ieee->current_network.bssid, ETH_ALEN))
2279 break;
2280 else
2281 goto rx_dropped;
2282 }
2283
2284 /* packets not to our adapter, just discard it */
2285 if (memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN)) {
2286 if (bToOtherSTA)
2287 break;
2288 else
2289 goto rx_dropped;
2290 }
2291
2292 break;
2293
2294 case IW_MODE_INFRA:
2295 /* packets from our adapter are dropped (echo) */
2296 if (!memcmp(hdr->addr3, dev->dev_addr, ETH_ALEN))
2297 goto rx_dropped;
2298
2299 /* {broad,multi}cast packets to our BSS go through */
2300 if (is_multicast_ether_addr(hdr->addr1)) {
2301 if (!memcmp(hdr->addr2, ieee->current_network.bssid, ETH_ALEN))
2302 break;
2303 else
2304 goto rx_dropped;
2305 }
2306
2307 /* packets to our adapter go through */
2308 if (memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN)) {
2309 if (bToOtherSTA)
2310 break;
2311 else
2312 goto rx_dropped;
2313 }
2314
2315 break;
2316 }
2317
2318
2319 }
2320
2321 if ((ieee->iw_mode == IW_MODE_INFRA) && (ieee->sta_sleep == LPS_IS_SLEEP)
2322 && (ieee->polling)) {
2323 if (WLAN_FC_MORE_DATA(fc)) {
2324 /* more data bit is set, let's request a new frame from the AP */
2325 rtllib_sta_ps_send_pspoll_frame(ieee);
2326 } else {
2327 ieee->polling = false;
2328 }
2329 }
2330
2331#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
2332 if (ieee->iw_mode == IW_MODE_ADHOC){
2333 psta = GetStaInfo(ieee, src);
2334 if (NULL != psta)
2335 psta->LastActiveTime = jiffies;
2336 }
2337#endif
2338 /* skb: hdr + (possibly fragmented, possibly encrypted) payload */
2339 if ((!rx_stats->Decrypted)){
2340 ieee->need_sw_enc = 1;
2341 }
2342
2343 if (ieee->host_decrypt && (fc & RTLLIB_FCTL_WEP) &&
2344 ((keyidx = rtllib_rx_frame_decrypt(ieee, skb, crypt)) < 0)) {
2345 printk("decrypt frame error\n");
2346 goto rx_dropped;
2347 }
2348 if (tmp_dump) {
2349 printk("************after decrypt\n");
2350 dump_buf(skb->data,skb->len);
2351 }
2352 hdr = (struct rtllib_hdr_4addr *) skb->data;
2353
2354 /* skb: hdr + (possibly fragmented) plaintext payload */
2355 if ((frag != 0 || (fc & RTLLIB_FCTL_MOREFRAGS))) {
2356 int flen;
2357 struct sk_buff *frag_skb = rtllib_frag_cache_get(ieee, hdr);
2358 RTLLIB_DEBUG_FRAG("Rx Fragment received (%u)\n", frag);
2359
2360 if (!frag_skb) {
2361 RTLLIB_DEBUG(RTLLIB_DL_RX | RTLLIB_DL_FRAG,
2362 "Rx cannot get skb from fragment "
2363 "cache (morefrag=%d seq=%u frag=%u)\n",
2364 (fc & RTLLIB_FCTL_MOREFRAGS) != 0,
2365 WLAN_GET_SEQ_SEQ(sc), frag);
2366 goto rx_dropped;
2367 }
2368 flen = skb->len;
2369 if (frag != 0)
2370 flen -= hdrlen;
2371
2372 if (frag_skb->tail + flen > frag_skb->end) {
2373 printk(KERN_WARNING "%s: host decrypted and "
2374 "reassembled frame did not fit skb\n",
2375 dev->name);
2376 rtllib_frag_cache_invalidate(ieee, hdr);
2377 goto rx_dropped;
2378 }
2379
2380 if (frag == 0) {
2381 /* copy first fragment (including full headers) into
2382 * beginning of the fragment cache skb */
2383 memcpy(skb_put(frag_skb, flen), skb->data, flen);
2384 } else {
2385 /* append frame payload to the end of the fragment
2386 * cache skb */
2387 memcpy(skb_put(frag_skb, flen), skb->data + hdrlen,
2388 flen);
2389 }
2390 dev_kfree_skb_any(skb);
2391 skb = NULL;
2392
2393 if (fc & RTLLIB_FCTL_MOREFRAGS) {
2394 /* more fragments expected - leave the skb in fragment
2395 * cache for now; it will be delivered to upper layers
2396 * after all fragments have been received */
2397 goto rx_exit;
2398 }
2399
2400 /* this was the last fragment and the frame will be
2401 * delivered, so remove skb from fragment cache */
2402 skb = frag_skb;
2403 hdr = (struct rtllib_hdr_4addr *) skb->data;
2404 rtllib_frag_cache_invalidate(ieee, hdr);
2405 }
2406
2407 /* skb: hdr + (possible reassembled) full MSDU payload; possibly still
2408 * encrypted/authenticated */
2409 if (ieee->host_decrypt && (fc & RTLLIB_FCTL_WEP) &&
2410 rtllib_rx_frame_decrypt_msdu(ieee, skb, keyidx, crypt)) {
2411 printk("==>decrypt msdu error\n");
2412 goto rx_dropped;
2413 }
2414
2415 ieee->LinkDetectInfo.NumRecvDataInPeriod++;
2416 ieee->LinkDetectInfo.NumRxOkInPeriod++;
2417
2418 hdr = (struct rtllib_hdr_4addr *) skb->data;
2419 if ((!is_multicast_ether_addr(hdr->addr1)) && (!is_broadcast_ether_addr(hdr->addr1)))
2420 unicast_packet = true;
2421 if (crypt && !(fc & RTLLIB_FCTL_WEP) && !ieee->open_wep) {
2422 if (/*ieee->ieee802_1x &&*/
2423 rtllib_is_eapol_frame(ieee, skb, hdrlen)) {
2424
2425#ifdef CONFIG_RTLLIB_DEBUG
2426 /* pass unencrypted EAPOL frames even if encryption is
2427 * configured */
2428 struct eapol *eap = (struct eapol *)(skb->data +
2429 24);
2430 RTLLIB_DEBUG_EAP("RX: IEEE 802.1X EAPOL frame: %s\n",
2431 eap_get_type(eap->type));
2432#endif
2433 } else {
2434 RTLLIB_DEBUG_DROP(
2435 "encryption configured, but RX "
2436 "frame not encrypted (SA=" MAC_FMT ")\n",
2437 MAC_ARG(hdr->addr2));
2438 goto rx_dropped;
2439 }
2440 }
2441
2442#ifdef CONFIG_RTLLIB_DEBUG
2443 if (crypt && !(fc & RTLLIB_FCTL_WEP) &&
2444 rtllib_is_eapol_frame(ieee, skb, hdrlen)) {
2445 struct eapol *eap = (struct eapol *)(skb->data +
2446 24);
2447 RTLLIB_DEBUG_EAP("RX: IEEE 802.1X EAPOL frame: %s\n",
2448 eap_get_type(eap->type));
2449 }
2450#endif
2451
2452 if (crypt && !(fc & RTLLIB_FCTL_WEP) && !ieee->open_wep &&
2453 !rtllib_is_eapol_frame(ieee, skb, hdrlen)) {
2454 RTLLIB_DEBUG_DROP(
2455 "dropped unencrypted RX data "
2456 "frame from " MAC_FMT
2457 " (drop_unencrypted=1)\n",
2458 MAC_ARG(hdr->addr2));
2459 goto rx_dropped;
2460 }
2461 if (ieee->current_network.qos_data.active && IsQoSDataFrame(skb->data)
2462 && !is_multicast_ether_addr(hdr->addr1) && !is_broadcast_ether_addr(hdr->addr1)) {
2463 TID = Frame_QoSTID(skb->data);
2464 SeqNum = WLAN_GET_SEQ_SEQ(sc);
2465 GetTs(ieee,(PTS_COMMON_INFO*) &pTS,hdr->addr2,TID,RX_DIR,true);
2466 if (TID !=0 && TID !=3)
2467 ieee->bis_any_nonbepkts = true;
2468 }
2469 /* skb: hdr + (possible reassembled) full plaintext payload */
2470 payload = skb->data + hdrlen;
2471 rxb = (struct rtllib_rxb*)kmalloc(sizeof(struct rtllib_rxb),GFP_ATOMIC);
2472 if (rxb == NULL) {
2473 RTLLIB_DEBUG(RTLLIB_DL_ERR,"%s(): kmalloc rxb error\n",__func__);
2474 goto rx_dropped;
2475 }
2476 /* to parse amsdu packets */
2477 /* qos data packets & reserved bit is 1 */
2478 if (parse_subframe(ieee,skb,rx_stats,rxb,src,dst) == 0) {
2479 /* only to free rxb, and not submit the packets to upper layer */
2480 for (i =0; i < rxb->nr_subframes; i++) {
2481 dev_kfree_skb(rxb->subframes[i]);
2482 }
2483 kfree(rxb);
2484 rxb = NULL;
2485 goto rx_dropped;
2486 }
2487#if !defined(RTL8192SU) && !defined(RTL8192U)
2488 if (unicast_packet) {
2489 if (type == RTLLIB_FTYPE_DATA) {
2490 if (ieee->bIsAggregateFrame)
2491 ieee->LinkDetectInfo.NumRxUnicastOkInPeriod+=rxb->nr_subframes;
2492 else
2493 ieee->LinkDetectInfo.NumRxUnicastOkInPeriod++;
2494
2495 if ((ieee->state == RTLLIB_LINKED) /*&& !MgntInitAdapterInProgress(pMgntInfo)*/) {
2496 if (((ieee->LinkDetectInfo.NumRxUnicastOkInPeriod +ieee->LinkDetectInfo.NumTxOkInPeriod) > 8 ) ||
2497 (ieee->LinkDetectInfo.NumRxUnicastOkInPeriod > 2)) {
2498 if (ieee->LeisurePSLeave)
2499 ieee->LeisurePSLeave(dev);
2500 }
2501 }
2502 }
2503 }
2504#endif
2505 ieee->last_rx_ps_time = jiffies;
2506 if (ieee->pHTInfo->bCurRxReorderEnable == false ||pTS == NULL || bToOtherSTA ){
2507 for (i = 0; i<rxb->nr_subframes; i++) {
2508 struct sk_buff *sub_skb = rxb->subframes[i];
2509
2510 if (sub_skb) {
2511 /* convert hdr + possible LLC headers into Ethernet header */
2512 ethertype = (sub_skb->data[6] << 8) | sub_skb->data[7];
2513 if (sub_skb->len >= 8 &&
2514 ((memcmp(sub_skb->data, rfc1042_header, SNAP_SIZE) == 0 &&
2515 ethertype != ETH_P_AARP && ethertype != ETH_P_IPX) ||
2516 memcmp(sub_skb->data, bridge_tunnel_header, SNAP_SIZE) == 0)) {
2517 /* remove RFC1042 or Bridge-Tunnel encapsulation and
2518 * replace EtherType */
2519 skb_pull(sub_skb, SNAP_SIZE);
2520 memcpy(skb_push(sub_skb, ETH_ALEN), src, ETH_ALEN);
2521 memcpy(skb_push(sub_skb, ETH_ALEN), dst, ETH_ALEN);
2522 } else {
2523 u16 len;
2524 /* Leave Ethernet header part of hdr and full payload */
2525 len = htons(sub_skb->len);
2526 memcpy(skb_push(sub_skb, 2), &len, 2);
2527 memcpy(skb_push(sub_skb, ETH_ALEN), src, ETH_ALEN);
2528 memcpy(skb_push(sub_skb, ETH_ALEN), dst, ETH_ALEN);
2529 }
2530
2531 stats->rx_packets++;
2532 stats->rx_bytes += sub_skb->len;
2533
2534 if (is_multicast_ether_addr(dst)) {
2535 stats->multicast++;
2536 }
2537
2538 /* Indicat the packets to upper layer */
2539 memset(sub_skb->cb, 0, sizeof(sub_skb->cb));
2540 sub_skb->protocol = eth_type_trans(sub_skb, dev);
2541 sub_skb->dev = dev;
2542 sub_skb->dev->stats.rx_packets++;
2543 sub_skb->dev->stats.rx_bytes += sub_skb->len;
2544#ifdef TCP_CSUM_OFFLOAD_RX
2545 if ( rx_stats->tcp_csum_valid)
2546 sub_skb->ip_summed = CHECKSUM_UNNECESSARY;
2547 else
2548 sub_skb->ip_summed = CHECKSUM_NONE;
2549#else
2550 sub_skb->ip_summed = CHECKSUM_NONE; /* 802.11 crc not sufficient */
2551#endif
2552
2553 netif_rx(sub_skb);
2554 }
2555 }
2556 kfree(rxb);
2557 rxb = NULL;
2558
2559 }
2560 else
2561 {
2562 RTLLIB_DEBUG(RTLLIB_DL_REORDER,"%s(): REORDER ENABLE AND PTS not NULL, and we will enter RxReorderIndicatePacket()\n",__func__);
2563#ifdef TCP_CSUM_OFFLOAD_RX
2564 rxb->tcp_csum_valid = rx_stats->tcp_csum_valid;
2565#endif
2566 RxReorderIndicatePacket(ieee, rxb, pTS, SeqNum);
2567 }
2568#ifndef JOHN_NOCPY
2569 dev_kfree_skb(skb);
2570#endif
2571
2572 rx_exit:
2573#ifdef NOT_YET
2574 if (sta)
2575 hostap_handle_sta_release(sta);
2576#endif
2577 return 1;
2578
2579 rx_dropped:
2580 if (rxb != NULL)
2581 {
2582 kfree(rxb);
2583 rxb = NULL;
2584 }
2585 stats->rx_dropped++;
2586
2587 /* Returning 0 indicates to caller that we have not handled the SKB--
2588 * so it is still allocated and can be used again by underlying
2589 * hardware as a DMA target */
2590 return 0;
2591}
2592#endif
2593
2594#define MGMT_FRAME_FIXED_PART_LENGTH 0x24
2595
2596static u8 qos_oui[QOS_OUI_LEN] = { 0x00, 0x50, 0xF2 };
2597
2598/*
2599* Make ther structure we read from the beacon packet has
2600* the right values
2601*/
2602static int rtllib_verify_qos_info(struct rtllib_qos_information_element
2603 *info_element, int sub_type)
2604{
2605
2606 if (info_element->qui_subtype != sub_type)
2607 return -1;
2608 if (memcmp(info_element->qui, qos_oui, QOS_OUI_LEN))
2609 return -1;
2610 if (info_element->qui_type != QOS_OUI_TYPE)
2611 return -1;
2612 if (info_element->version != QOS_VERSION_1)
2613 return -1;
2614
2615 return 0;
2616}
2617
2618
2619/*
2620 * Parse a QoS parameter element
2621 */
2622static int rtllib_read_qos_param_element(struct rtllib_qos_parameter_info
2623 *element_param, struct rtllib_info_element
2624 *info_element)
2625{
2626 int ret = 0;
2627 u16 size = sizeof(struct rtllib_qos_parameter_info) - 2;
2628
2629 if ((info_element == NULL) || (element_param == NULL))
2630 return -1;
2631
2632 if (info_element->id == QOS_ELEMENT_ID && info_element->len == size) {
2633 memcpy(element_param->info_element.qui, info_element->data,
2634 info_element->len);
2635 element_param->info_element.elementID = info_element->id;
2636 element_param->info_element.length = info_element->len;
2637 } else
2638 ret = -1;
2639 if (ret == 0)
2640 ret = rtllib_verify_qos_info(&element_param->info_element,
2641 QOS_OUI_PARAM_SUB_TYPE);
2642 return ret;
2643}
2644
2645/*
2646 * Parse a QoS information element
2647 */
2648static int rtllib_read_qos_info_element(struct
2649 rtllib_qos_information_element
2650 *element_info, struct rtllib_info_element
2651 *info_element)
2652{
2653 int ret = 0;
2654 u16 size = sizeof(struct rtllib_qos_information_element) - 2;
2655
2656 if (element_info == NULL)
2657 return -1;
2658 if (info_element == NULL)
2659 return -1;
2660
2661 if ((info_element->id == QOS_ELEMENT_ID) && (info_element->len == size)) {
2662 memcpy(element_info->qui, info_element->data,
2663 info_element->len);
2664 element_info->elementID = info_element->id;
2665 element_info->length = info_element->len;
2666 } else
2667 ret = -1;
2668
2669 if (ret == 0)
2670 ret = rtllib_verify_qos_info(element_info,
2671 QOS_OUI_INFO_SUB_TYPE);
2672 return ret;
2673}
2674
2675
2676/*
2677 * Write QoS parameters from the ac parameters.
2678 */
2679static int rtllib_qos_convert_ac_to_parameters(struct rtllib_qos_parameter_info *param_elm,
2680 struct rtllib_qos_data *qos_data)
2681{
2682 struct rtllib_qos_ac_parameter *ac_params;
2683 struct rtllib_qos_parameters *qos_param = &(qos_data->parameters);
2684 int rc = 0;
2685 int i;
2686 u8 aci;
2687 u8 acm;
2688
2689 qos_data->wmm_acm = 0;
2690 for (i = 0; i < QOS_QUEUE_NUM; i++) {
2691 ac_params = &(param_elm->ac_params_record[i]);
2692
2693 aci = (ac_params->aci_aifsn & 0x60) >> 5;
2694 acm = (ac_params->aci_aifsn & 0x10) >> 4;
2695
2696 if (aci >= QOS_QUEUE_NUM)
2697 continue;
2698 switch (aci) {
2699 case 1:
2700 /* BIT(0) | BIT(3) */
2701 if (acm)
2702 qos_data->wmm_acm |= (0x01<<0)|(0x01<<3);
2703 break;
2704 case 2:
2705 /* BIT(4) | BIT(5) */
2706 if (acm)
2707 qos_data->wmm_acm |= (0x01<<4)|(0x01<<5);
2708 break;
2709 case 3:
2710 /* BIT(6) | BIT(7) */
2711 if (acm)
2712 qos_data->wmm_acm |= (0x01<<6)|(0x01<<7);
2713 break;
2714 case 0:
2715 default:
2716 /* BIT(1) | BIT(2) */
2717 if (acm)
2718 qos_data->wmm_acm |= (0x01<<1)|(0x01<<2);
2719 break;
2720 }
2721
2722 qos_param->aifs[aci] = (ac_params->aci_aifsn) & 0x0f;
2723
2724 /* WMM spec P.11: The minimum value for AIFSN shall be 2 */
2725 qos_param->aifs[aci] = (qos_param->aifs[aci] < 2) ? 2:qos_param->aifs[aci];
2726
2727 qos_param->cw_min[aci] = ac_params->ecw_min_max & 0x0F;
2728
2729 qos_param->cw_max[aci] = (ac_params->ecw_min_max & 0xF0) >> 4;
2730
2731 qos_param->flag[aci] =
2732 (ac_params->aci_aifsn & 0x10) ? 0x01 : 0x00;
2733 qos_param->tx_op_limit[aci] = le16_to_cpu(ac_params->tx_op_limit);
2734 }
2735 return rc;
2736}
2737
2738/*
2739 * we have a generic data element which it may contain QoS information or
2740 * parameters element. check the information element length to decide
2741 * which type to read
2742 */
2743static int rtllib_parse_qos_info_param_IE(struct rtllib_info_element
2744 *info_element,
2745 struct rtllib_network *network)
2746{
2747 int rc = 0;
2748 struct rtllib_qos_information_element qos_info_element;
2749
2750 rc = rtllib_read_qos_info_element(&qos_info_element, info_element);
2751
2752 if (rc == 0) {
2753 network->qos_data.param_count = qos_info_element.ac_info & 0x0F;
2754 network->flags |= NETWORK_HAS_QOS_INFORMATION;
2755 } else {
2756 struct rtllib_qos_parameter_info param_element;
2757
2758 rc = rtllib_read_qos_param_element(&param_element,
2759 info_element);
2760 if (rc == 0) {
2761 rtllib_qos_convert_ac_to_parameters(&param_element,
2762 &(network->qos_data));
2763 network->flags |= NETWORK_HAS_QOS_PARAMETERS;
2764 network->qos_data.param_count =
2765 param_element.info_element.ac_info & 0x0F;
2766 }
2767 }
2768
2769 if (rc == 0) {
2770 RTLLIB_DEBUG_QOS("QoS is supported\n");
2771 network->qos_data.supported = 1;
2772 }
2773 return rc;
2774}
2775
2776#ifdef CONFIG_RTLLIB_DEBUG
2777#define MFIE_STRING(x) case MFIE_TYPE_ ##x: return #x
2778
2779static const char *get_info_element_string(u16 id)
2780{
2781 switch (id) {
2782 MFIE_STRING(SSID);
2783 MFIE_STRING(RATES);
2784 MFIE_STRING(FH_SET);
2785 MFIE_STRING(DS_SET);
2786 MFIE_STRING(CF_SET);
2787 MFIE_STRING(TIM);
2788 MFIE_STRING(IBSS_SET);
2789 MFIE_STRING(COUNTRY);
2790 MFIE_STRING(HOP_PARAMS);
2791 MFIE_STRING(HOP_TABLE);
2792 MFIE_STRING(REQUEST);
2793 MFIE_STRING(CHALLENGE);
2794 MFIE_STRING(POWER_CONSTRAINT);
2795 MFIE_STRING(POWER_CAPABILITY);
2796 MFIE_STRING(TPC_REQUEST);
2797 MFIE_STRING(TPC_REPORT);
2798 MFIE_STRING(SUPP_CHANNELS);
2799 MFIE_STRING(CSA);
2800 MFIE_STRING(MEASURE_REQUEST);
2801 MFIE_STRING(MEASURE_REPORT);
2802 MFIE_STRING(QUIET);
2803 MFIE_STRING(IBSS_DFS);
2804 MFIE_STRING(RSN);
2805 MFIE_STRING(RATES_EX);
2806 MFIE_STRING(GENERIC);
2807 MFIE_STRING(QOS_PARAMETER);
2808 default:
2809 return "UNKNOWN";
2810 }
2811}
2812#endif
2813
2814#ifdef ENABLE_DOT11D
2815static inline void rtllib_extract_country_ie(
2816 struct rtllib_device *ieee,
2817 struct rtllib_info_element *info_element,
2818 struct rtllib_network *network,
2819 u8 * addr2)
2820{
2821 if (IS_DOT11D_ENABLE(ieee)) {
2822 if (info_element->len!= 0) {
2823 memcpy(network->CountryIeBuf, info_element->data, info_element->len);
2824 network->CountryIeLen = info_element->len;
2825
2826 if (!IS_COUNTRY_IE_VALID(ieee))
2827 {
2828 if ((rtllib_act_scanning(ieee,false) == true) && (ieee->FirstIe_InScan == 1))
2829 printk("Received beacon ContryIE, SSID: <%s>\n",network->ssid);
2830 Dot11d_UpdateCountryIe(ieee, addr2, info_element->len, info_element->data);
2831 }
2832 }
2833
2834 if (IS_EQUAL_CIE_SRC(ieee, addr2)) {
2835 UPDATE_CIE_WATCHDOG(ieee);
2836 }
2837 }
2838
2839}
2840#endif
2841
2842int rtllib_parse_info_param(struct rtllib_device *ieee,
2843 struct rtllib_info_element *info_element,
2844 u16 length,
2845 struct rtllib_network *network,
2846 struct rtllib_rx_stats *stats)
2847{
2848 u8 i;
2849 short offset;
2850 u16 tmp_htcap_len=0;
2851 u16 tmp_htinfo_len=0;
2852 u16 ht_realtek_agg_len=0;
2853 u8 ht_realtek_agg_buf[MAX_IE_LEN];
2854#ifdef CONFIG_RTLLIB_DEBUG
2855 char rates_str[64];
2856 char *p;
2857#endif
2858 while (length >= sizeof(*info_element)) {
2859 if (sizeof(*info_element) + info_element->len > length) {
2860 RTLLIB_DEBUG_MGMT("Info elem: parse failed: "
2861 "info_element->len + 2 > left : "
2862 "info_element->len+2=%zd left=%d, id=%d.\n",
2863 info_element->len +
2864 sizeof(*info_element),
2865 length, info_element->id);
2866 /* We stop processing but don't return an error here
2867 * because some misbehaviour APs break this rule. ie.
2868 * Orinoco AP1000. */
2869 break;
2870 }
2871
2872 switch (info_element->id) {
2873 case MFIE_TYPE_SSID:
2874 if (rtllib_is_empty_essid(info_element->data,
2875 info_element->len)) {
2876 network->flags |= NETWORK_EMPTY_ESSID;
2877 break;
2878 }
2879
2880 network->ssid_len = min(info_element->len,
2881 (u8) IW_ESSID_MAX_SIZE);
2882 memcpy(network->ssid, info_element->data, network->ssid_len);
2883 if (network->ssid_len < IW_ESSID_MAX_SIZE)
2884 memset(network->ssid + network->ssid_len, 0,
2885 IW_ESSID_MAX_SIZE - network->ssid_len);
2886
2887 RTLLIB_DEBUG_MGMT("MFIE_TYPE_SSID: '%s' len=%d.\n",
2888 network->ssid, network->ssid_len);
2889 break;
2890
2891 case MFIE_TYPE_RATES:
2892#ifdef CONFIG_RTLLIB_DEBUG
2893 p = rates_str;
2894#endif
2895 network->rates_len = min(info_element->len,
2896 MAX_RATES_LENGTH);
2897 for (i = 0; i < network->rates_len; i++) {
2898 network->rates[i] = info_element->data[i];
2899#ifdef CONFIG_RTLLIB_DEBUG
2900 p += snprintf(p, sizeof(rates_str) -
2901 (p - rates_str), "%02X ",
2902 network->rates[i]);
2903#endif
2904 if (rtllib_is_ofdm_rate
2905 (info_element->data[i])) {
2906 network->flags |= NETWORK_HAS_OFDM;
2907 if (info_element->data[i] &
2908 RTLLIB_BASIC_RATE_MASK)
2909 network->flags &=
2910 ~NETWORK_HAS_CCK;
2911 }
2912
2913 if (rtllib_is_cck_rate
2914 (info_element->data[i])) {
2915 network->flags |= NETWORK_HAS_CCK;
2916 }
2917 }
2918
2919 RTLLIB_DEBUG_MGMT("MFIE_TYPE_RATES: '%s' (%d)\n",
2920 rates_str, network->rates_len);
2921 break;
2922
2923 case MFIE_TYPE_RATES_EX:
2924#ifdef CONFIG_RTLLIB_DEBUG
2925 p = rates_str;
2926#endif
2927 network->rates_ex_len = min(info_element->len,
2928 MAX_RATES_EX_LENGTH);
2929 for (i = 0; i < network->rates_ex_len; i++) {
2930 network->rates_ex[i] = info_element->data[i];
2931#ifdef CONFIG_RTLLIB_DEBUG
2932 p += snprintf(p, sizeof(rates_str) -
2933 (p - rates_str), "%02X ",
2934 network->rates[i]);
2935#endif
2936 if (rtllib_is_ofdm_rate
2937 (info_element->data[i])) {
2938 network->flags |= NETWORK_HAS_OFDM;
2939 if (info_element->data[i] &
2940 RTLLIB_BASIC_RATE_MASK)
2941 network->flags &=
2942 ~NETWORK_HAS_CCK;
2943 }
2944 }
2945
2946 RTLLIB_DEBUG_MGMT("MFIE_TYPE_RATES_EX: '%s' (%d)\n",
2947 rates_str, network->rates_ex_len);
2948 break;
2949
2950 case MFIE_TYPE_DS_SET:
2951 RTLLIB_DEBUG_MGMT("MFIE_TYPE_DS_SET: %d\n",
2952 info_element->data[0]);
2953 network->channel = info_element->data[0];
2954 break;
2955
2956 case MFIE_TYPE_FH_SET:
2957 RTLLIB_DEBUG_MGMT("MFIE_TYPE_FH_SET: ignored\n");
2958 break;
2959
2960 case MFIE_TYPE_CF_SET:
2961 RTLLIB_DEBUG_MGMT("MFIE_TYPE_CF_SET: ignored\n");
2962 break;
2963
2964 case MFIE_TYPE_TIM:
2965 if (info_element->len < 4)
2966 break;
2967
2968 network->tim.tim_count = info_element->data[0];
2969 network->tim.tim_period = info_element->data[1];
2970
2971 network->dtim_period = info_element->data[1];
2972 if (ieee->state != RTLLIB_LINKED)
2973 break;
2974 network->last_dtim_sta_time[0] = jiffies;
2975 network->last_dtim_sta_time[1] = stats->mac_time[1];
2976
2977 network->dtim_data = RTLLIB_DTIM_VALID;
2978
2979
2980 if (info_element->data[2] & 1)
2981 network->dtim_data |= RTLLIB_DTIM_MBCAST;
2982
2983#if 1
2984 offset = (info_element->data[2] >> 1)*2;
2985
2986
2987 if (ieee->assoc_id < 8*offset ||
2988 ieee->assoc_id > 8*(offset + info_element->len -3))
2989
2990 break;
2991
2992 offset = (ieee->assoc_id / 8) - offset;
2993 if (info_element->data[3+offset] & (1<<(ieee->assoc_id%8)))
2994 network->dtim_data |= RTLLIB_DTIM_UCAST;
2995#else
2996 {
2997 u16 numSta = 0;
2998 u16 offset_byte = 0;
2999 u16 offset_bit = 0;
3000
3001 numSta = (info_element->data[2] &0xFE)*8;
3002
3003 if (ieee->assoc_id < numSta ||
3004 ieee->assoc_id > (numSta + (info_element->len -3)*8))
3005 break;
3006
3007 offset = ieee->assoc_id - numSta;
3008 offset_byte = offset / 8;
3009 offset_bit = offset % 8;
3010 if (info_element->data[3+offset_byte] & (0x01<<offset_bit))
3011 network->dtim_data |= RTLLIB_DTIM_UCAST;
3012 }
3013#endif
3014
3015 network->listen_interval = network->dtim_period;
3016 break;
3017
3018 case MFIE_TYPE_ERP:
3019 network->erp_value = info_element->data[0];
3020 network->flags |= NETWORK_HAS_ERP_VALUE;
3021 RTLLIB_DEBUG_MGMT("MFIE_TYPE_ERP_SET: %d\n",
3022 network->erp_value);
3023 break;
3024 case MFIE_TYPE_IBSS_SET:
3025 network->atim_window = info_element->data[0];
3026 RTLLIB_DEBUG_MGMT("MFIE_TYPE_IBSS_SET: %d\n",
3027 network->atim_window);
3028 break;
3029
3030 case MFIE_TYPE_CHALLENGE:
3031 RTLLIB_DEBUG_MGMT("MFIE_TYPE_CHALLENGE: ignored\n");
3032 break;
3033
3034 case MFIE_TYPE_GENERIC:
3035 RTLLIB_DEBUG_MGMT("MFIE_TYPE_GENERIC: %d bytes\n",
3036 info_element->len);
3037 if (!rtllib_parse_qos_info_param_IE(info_element,
3038 network))
3039 break;
3040 if (info_element->len >= 4 &&
3041 info_element->data[0] == 0x00 &&
3042 info_element->data[1] == 0x50 &&
3043 info_element->data[2] == 0xf2 &&
3044 info_element->data[3] == 0x01) {
3045 network->wpa_ie_len = min(info_element->len + 2,
3046 MAX_WPA_IE_LEN);
3047 memcpy(network->wpa_ie, info_element,
3048 network->wpa_ie_len);
3049 break;
3050 }
3051 if (info_element->len == 7 &&
3052 info_element->data[0] == 0x00 &&
3053 info_element->data[1] == 0xe0 &&
3054 info_element->data[2] == 0x4c &&
3055 info_element->data[3] == 0x01 &&
3056 info_element->data[4] == 0x02)
3057 network->Turbo_Enable = 1;
3058
3059 if (tmp_htcap_len == 0) {
3060 if (info_element->len >= 4 &&
3061 info_element->data[0] == 0x00 &&
3062 info_element->data[1] == 0x90 &&
3063 info_element->data[2] == 0x4c &&
3064 info_element->data[3] == 0x033) {
3065
3066 tmp_htcap_len = min(info_element->len,(u8)MAX_IE_LEN);
3067 if (tmp_htcap_len != 0){
3068 network->bssht.bdHTSpecVer = HT_SPEC_VER_EWC;
3069 network->bssht.bdHTCapLen = tmp_htcap_len > sizeof(network->bssht.bdHTCapBuf)?\
3070 sizeof(network->bssht.bdHTCapBuf):tmp_htcap_len;
3071 memcpy(network->bssht.bdHTCapBuf,info_element->data,network->bssht.bdHTCapLen);
3072 }
3073 }
3074 if (tmp_htcap_len != 0){
3075 network->bssht.bdSupportHT = true;
3076 network->bssht.bdHT1R = ((((PHT_CAPABILITY_ELE)(network->bssht.bdHTCapBuf))->MCS[1]) == 0);
3077 }else{
3078 network->bssht.bdSupportHT = false;
3079 network->bssht.bdHT1R = false;
3080 }
3081 }
3082
3083
3084 if (tmp_htinfo_len == 0){
3085 if (info_element->len >= 4 &&
3086 info_element->data[0] == 0x00 &&
3087 info_element->data[1] == 0x90 &&
3088 info_element->data[2] == 0x4c &&
3089 info_element->data[3] == 0x034){
3090
3091 tmp_htinfo_len = min(info_element->len,(u8)MAX_IE_LEN);
3092 if (tmp_htinfo_len != 0){
3093 network->bssht.bdHTSpecVer = HT_SPEC_VER_EWC;
3094 if (tmp_htinfo_len){
3095 network->bssht.bdHTInfoLen = tmp_htinfo_len > sizeof(network->bssht.bdHTInfoBuf)?\
3096 sizeof(network->bssht.bdHTInfoBuf):tmp_htinfo_len;
3097 memcpy(network->bssht.bdHTInfoBuf,info_element->data,network->bssht.bdHTInfoLen);
3098 }
3099
3100 }
3101
3102 }
3103 }
3104
3105 if (ieee->aggregation){
3106 if (network->bssht.bdSupportHT){
3107 if (info_element->len >= 4 &&
3108 info_element->data[0] == 0x00 &&
3109 info_element->data[1] == 0xe0 &&
3110 info_element->data[2] == 0x4c &&
3111 info_element->data[3] == 0x02){
3112
3113 ht_realtek_agg_len = min(info_element->len,(u8)MAX_IE_LEN);
3114 memcpy(ht_realtek_agg_buf,info_element->data,info_element->len);
3115
3116 }
3117 if (ht_realtek_agg_len >= 5){
3118 network->realtek_cap_exit = true;
3119 network->bssht.bdRT2RTAggregation = true;
3120
3121 if ((ht_realtek_agg_buf[4] == 1) && (ht_realtek_agg_buf[5] & 0x02))
3122 network->bssht.bdRT2RTLongSlotTime = true;
3123
3124 if ((ht_realtek_agg_buf[4]==1) && (ht_realtek_agg_buf[5] & RT_HT_CAP_USE_92SE))
3125 {
3126 network->bssht.RT2RT_HT_Mode |= RT_HT_CAP_USE_92SE;
3127 }
3128 }
3129 }
3130 if (ht_realtek_agg_len >= 5){
3131 if ((ht_realtek_agg_buf[5] & RT_HT_CAP_USE_SOFTAP))
3132 network->bssht.RT2RT_HT_Mode |= RT_HT_CAP_USE_SOFTAP;
3133 }
3134 }
3135
3136 {
3137 if ((info_element->len >= 3 &&
3138 info_element->data[0] == 0x00 &&
3139 info_element->data[1] == 0x05 &&
3140 info_element->data[2] == 0xb5) ||
3141 (info_element->len >= 3 &&
3142 info_element->data[0] == 0x00 &&
3143 info_element->data[1] == 0x0a &&
3144 info_element->data[2] == 0xf7) ||
3145 (info_element->len >= 3 &&
3146 info_element->data[0] == 0x00 &&
3147 info_element->data[1] == 0x10 &&
3148 info_element->data[2] == 0x18)){
3149
3150 network->broadcom_cap_exist = true;
3151
3152 }
3153 }
3154 if (info_element->len >= 3 &&
3155 info_element->data[0] == 0x00 &&
3156 info_element->data[1] == 0x0c &&
3157 info_element->data[2] == 0x43)
3158 {
3159 network->ralink_cap_exist = true;
3160 }
3161 if ((info_element->len >= 3 &&
3162 info_element->data[0] == 0x00 &&
3163 info_element->data[1] == 0x03 &&
3164 info_element->data[2] == 0x7f) ||
3165 (info_element->len >= 3 &&
3166 info_element->data[0] == 0x00 &&
3167 info_element->data[1] == 0x13 &&
3168 info_element->data[2] == 0x74))
3169 {
3170 network->atheros_cap_exist = true;
3171 }
3172
3173 if ((info_element->len >= 3 &&
3174 info_element->data[0] == 0x00 &&
3175 info_element->data[1] == 0x50 &&
3176 info_element->data[2] == 0x43) )
3177 {
3178 network->marvell_cap_exist = true;
3179 }
3180 if (info_element->len >= 3 &&
3181 info_element->data[0] == 0x00 &&
3182 info_element->data[1] == 0x40 &&
3183 info_element->data[2] == 0x96)
3184 {
3185 network->cisco_cap_exist = true;
3186 }
3187
3188
3189 if (info_element->len >= 3 &&
3190 info_element->data[0] == 0x00 &&
3191 info_element->data[1] == 0x0a &&
3192 info_element->data[2] == 0xf5)
3193 {
3194 network->airgo_cap_exist = true;
3195 }
3196
3197 if (info_element->len > 4 &&
3198 info_element->data[0] == 0x00 &&
3199 info_element->data[1] == 0x40 &&
3200 info_element->data[2] == 0x96 &&
3201 info_element->data[3] == 0x01)
3202 {
3203 if (info_element->len == 6)
3204 {
3205 memcpy(network->CcxRmState, &info_element[4], 2);
3206 if (network->CcxRmState[0] != 0)
3207 {
3208 network->bCcxRmEnable = true;
3209 }
3210 else
3211 network->bCcxRmEnable = false;
3212 network->MBssidMask = network->CcxRmState[1] & 0x07;
3213 if (network->MBssidMask != 0)
3214 {
3215 network->bMBssidValid = true;
3216 network->MBssidMask = 0xff << (network->MBssidMask);
3217 memcpy(network->MBssid, network->bssid, ETH_ALEN);
3218 network->MBssid[5] &= network->MBssidMask;
3219 }
3220 else
3221 {
3222 network->bMBssidValid = false;
3223 }
3224 }
3225 else
3226 {
3227 network->bCcxRmEnable = false;
3228 }
3229 }
3230 if (info_element->len > 4 &&
3231 info_element->data[0] == 0x00 &&
3232 info_element->data[1] == 0x40 &&
3233 info_element->data[2] == 0x96 &&
3234 info_element->data[3] == 0x03)
3235 {
3236 if (info_element->len == 5)
3237 {
3238 network->bWithCcxVerNum = true;
3239 network->BssCcxVerNumber = info_element->data[4];
3240 }
3241 else
3242 {
3243 network->bWithCcxVerNum = false;
3244 network->BssCcxVerNumber = 0;
3245 }
3246 }
3247 if (info_element->len > 4 &&
3248 info_element->data[0] == 0x00 &&
3249 info_element->data[1] == 0x50 &&
3250 info_element->data[2] == 0xf2 &&
3251 info_element->data[3] == 0x04)
3252 {
3253 RTLLIB_DEBUG_MGMT("MFIE_TYPE_WZC: %d bytes\n",
3254 info_element->len);
3255#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
3256 network->wzc_ie_len = min(info_element->len+2,
3257 MAX_WZC_IE_LEN);
3258 memcpy(network->wzc_ie, info_element,
3259 network->wzc_ie_len);
3260#endif
3261 }
3262 break;
3263
3264 case MFIE_TYPE_RSN:
3265 RTLLIB_DEBUG_MGMT("MFIE_TYPE_RSN: %d bytes\n",
3266 info_element->len);
3267 network->rsn_ie_len = min(info_element->len + 2,
3268 MAX_WPA_IE_LEN);
3269 memcpy(network->rsn_ie, info_element,
3270 network->rsn_ie_len);
3271 break;
3272
3273 case MFIE_TYPE_HT_CAP:
3274 RTLLIB_DEBUG_SCAN("MFIE_TYPE_HT_CAP: %d bytes\n",
3275 info_element->len);
3276 tmp_htcap_len = min(info_element->len,(u8)MAX_IE_LEN);
3277 if (tmp_htcap_len != 0){
3278 network->bssht.bdHTSpecVer = HT_SPEC_VER_EWC;
3279 network->bssht.bdHTCapLen = tmp_htcap_len > sizeof(network->bssht.bdHTCapBuf)?\
3280 sizeof(network->bssht.bdHTCapBuf):tmp_htcap_len;
3281 memcpy(network->bssht.bdHTCapBuf,info_element->data,network->bssht.bdHTCapLen);
3282
3283 network->bssht.bdSupportHT = true;
3284 network->bssht.bdHT1R = ((((PHT_CAPABILITY_ELE)(network->bssht.bdHTCapBuf))->MCS[1]) == 0);
3285
3286 network->bssht.bdBandWidth = (HT_CHANNEL_WIDTH)(((PHT_CAPABILITY_ELE)(network->bssht.bdHTCapBuf))->ChlWidth);
3287 }
3288 else{
3289 network->bssht.bdSupportHT = false;
3290 network->bssht.bdHT1R = false;
3291 network->bssht.bdBandWidth = HT_CHANNEL_WIDTH_20 ;
3292 }
3293 break;
3294
3295
3296 case MFIE_TYPE_HT_INFO:
3297 RTLLIB_DEBUG_SCAN("MFIE_TYPE_HT_INFO: %d bytes\n",
3298 info_element->len);
3299 tmp_htinfo_len = min(info_element->len,(u8)MAX_IE_LEN);
3300 if (tmp_htinfo_len){
3301 network->bssht.bdHTSpecVer = HT_SPEC_VER_IEEE;
3302 network->bssht.bdHTInfoLen = tmp_htinfo_len > sizeof(network->bssht.bdHTInfoBuf)?\
3303 sizeof(network->bssht.bdHTInfoBuf):tmp_htinfo_len;
3304 memcpy(network->bssht.bdHTInfoBuf,info_element->data,network->bssht.bdHTInfoLen);
3305 }
3306 break;
3307
3308 case MFIE_TYPE_AIRONET:
3309 RTLLIB_DEBUG_SCAN("MFIE_TYPE_AIRONET: %d bytes\n",
3310 info_element->len);
3311 if (info_element->len >IE_CISCO_FLAG_POSITION)
3312 {
3313 network->bWithAironetIE = true;
3314
3315 if ( (info_element->data[IE_CISCO_FLAG_POSITION]&SUPPORT_CKIP_MIC) ||
3316 (info_element->data[IE_CISCO_FLAG_POSITION]&SUPPORT_CKIP_PK) )
3317 {
3318 network->bCkipSupported = true;
3319 }
3320 else
3321 {
3322 network->bCkipSupported = false;
3323 }
3324 }
3325 else
3326 {
3327 network->bWithAironetIE = false;
3328 network->bCkipSupported = false;
3329 }
3330 break;
3331 case MFIE_TYPE_QOS_PARAMETER:
3332 printk(KERN_ERR
3333 "QoS Error need to parse QOS_PARAMETER IE\n");
3334 break;
3335
3336#ifdef ENABLE_DOT11D
3337 case MFIE_TYPE_COUNTRY:
3338 RTLLIB_DEBUG_SCAN("MFIE_TYPE_COUNTRY: %d bytes\n",
3339 info_element->len);
3340 rtllib_extract_country_ie(ieee, info_element, network, network->bssid);
3341 break;
3342#endif
3343/* TODO */
3344 default:
3345 RTLLIB_DEBUG_MGMT
3346 ("Unsupported info element: %s (%d)\n",
3347 get_info_element_string(info_element->id),
3348 info_element->id);
3349 break;
3350 }
3351
3352 length -= sizeof(*info_element) + info_element->len;
3353 info_element =
3354 (struct rtllib_info_element *)&info_element->
3355 data[info_element->len];
3356 }
3357
3358 if (!network->atheros_cap_exist && !network->broadcom_cap_exist &&
3359 !network->cisco_cap_exist && !network->ralink_cap_exist && !network->bssht.bdRT2RTAggregation)
3360 {
3361 network->unknown_cap_exist = true;
3362 }
3363 else
3364 {
3365 network->unknown_cap_exist = false;
3366 }
3367 return 0;
3368}
3369
3370static inline u8 rtllib_SignalStrengthTranslate(
3371 u8 CurrSS
3372 )
3373{
3374 u8 RetSS;
3375
3376 if (CurrSS >= 71 && CurrSS <= 100)
3377 {
3378 RetSS = 90 + ((CurrSS - 70) / 3);
3379 }
3380 else if (CurrSS >= 41 && CurrSS <= 70)
3381 {
3382 RetSS = 78 + ((CurrSS - 40) / 3);
3383 }
3384 else if (CurrSS >= 31 && CurrSS <= 40)
3385 {
3386 RetSS = 66 + (CurrSS - 30);
3387 }
3388 else if (CurrSS >= 21 && CurrSS <= 30)
3389 {
3390 RetSS = 54 + (CurrSS - 20);
3391 }
3392 else if (CurrSS >= 5 && CurrSS <= 20)
3393 {
3394 RetSS = 42 + (((CurrSS - 5) * 2) / 3);
3395 }
3396 else if (CurrSS == 4)
3397 {
3398 RetSS = 36;
3399 }
3400 else if (CurrSS == 3)
3401 {
3402 RetSS = 27;
3403 }
3404 else if (CurrSS == 2)
3405 {
3406 RetSS = 18;
3407 }
3408 else if (CurrSS == 1)
3409 {
3410 RetSS = 9;
3411 }
3412 else
3413 {
3414 RetSS = CurrSS;
3415 }
3416
3417
3418
3419 return RetSS;
3420}
3421
3422long rtllib_translate_todbm(u8 signal_strength_index )
3423{
3424 long signal_power;
3425
3426 signal_power = (long)((signal_strength_index + 1) >> 1);
3427 signal_power -= 95;
3428
3429 return signal_power;
3430}
3431
3432static inline int rtllib_network_init(
3433 struct rtllib_device *ieee,
3434 struct rtllib_probe_response *beacon,
3435 struct rtllib_network *network,
3436 struct rtllib_rx_stats *stats)
3437{
3438#ifdef CONFIG_RTLLIB_DEBUG
3439#endif
3440
3441 /*
3442 network->qos_data.active = 0;
3443 network->qos_data.supported = 0;
3444 network->qos_data.param_count = 0;
3445 network->qos_data.old_param_count = 0;
3446 */
3447 memset(&network->qos_data, 0, sizeof(struct rtllib_qos_data));
3448
3449 /* Pull out fixed field data */
3450 memcpy(network->bssid, beacon->header.addr3, ETH_ALEN);
3451 network->capability = le16_to_cpu(beacon->capability);
3452 network->last_scanned = jiffies;
3453 network->time_stamp[0] = le32_to_cpu(beacon->time_stamp[0]);
3454 network->time_stamp[1] = le32_to_cpu(beacon->time_stamp[1]);
3455 network->beacon_interval = le32_to_cpu(beacon->beacon_interval);
3456 /* Where to pull this? beacon->listen_interval;*/
3457 network->listen_interval = 0x0A;
3458 network->rates_len = network->rates_ex_len = 0;
3459 network->last_associate = 0;
3460 network->ssid_len = 0;
3461 network->hidden_ssid_len = 0;
3462 memset(network->hidden_ssid, 0, sizeof(network->hidden_ssid));
3463 network->flags = 0;
3464 network->atim_window = 0;
3465 network->erp_value = (network->capability & WLAN_CAPABILITY_IBSS) ?
3466 0x3 : 0x0;
3467 network->berp_info_valid = false;
3468 network->broadcom_cap_exist = false;
3469 network->ralink_cap_exist = false;
3470 network->atheros_cap_exist = false;
3471 network->cisco_cap_exist = false;
3472 network->unknown_cap_exist = false;
3473 network->realtek_cap_exit = false;
3474 network->marvell_cap_exist = false;
3475 network->airgo_cap_exist = false;
3476 network->Turbo_Enable = 0;
3477 network->SignalStrength = stats->SignalStrength;
3478 network->RSSI = stats->SignalStrength;
3479#ifdef ENABLE_DOT11D
3480 network->CountryIeLen = 0;
3481 memset(network->CountryIeBuf, 0, MAX_IE_LEN);
3482#endif
3483 HTInitializeBssDesc(&network->bssht);
3484 if (stats->freq == RTLLIB_52GHZ_BAND) {
3485 /* for A band (No DS info) */
3486 network->channel = stats->received_channel;
3487 } else
3488 network->flags |= NETWORK_HAS_CCK;
3489
3490 network->wpa_ie_len = 0;
3491 network->rsn_ie_len = 0;
3492#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
3493 network->wzc_ie_len = 0;
3494#endif
3495
3496 if (rtllib_parse_info_param(ieee,
3497 beacon->info_element,
3498 (stats->len - sizeof(*beacon)),
3499 network,
3500 stats))
3501 return 1;
3502
3503 network->mode = 0;
3504 if (stats->freq == RTLLIB_52GHZ_BAND)
3505 network->mode = IEEE_A;
3506 else {
3507 if (network->flags & NETWORK_HAS_OFDM)
3508 network->mode |= IEEE_G;
3509 if (network->flags & NETWORK_HAS_CCK)
3510 network->mode |= IEEE_B;
3511 }
3512
3513 if (network->mode == 0) {
3514 RTLLIB_DEBUG_SCAN("Filtered out '%s (" MAC_FMT ")' "
3515 "network.\n",
3516 escape_essid(network->ssid,
3517 network->ssid_len),
3518 MAC_ARG(network->bssid));
3519 return 1;
3520 }
3521
3522 if (network->bssht.bdSupportHT){
3523 if (network->mode == IEEE_A)
3524 network->mode = IEEE_N_5G;
3525 else if (network->mode & (IEEE_G | IEEE_B))
3526 network->mode = IEEE_N_24G;
3527 }
3528 if (rtllib_is_empty_essid(network->ssid, network->ssid_len))
3529 network->flags |= NETWORK_EMPTY_ESSID;
3530 stats->signal = 30 + (stats->SignalStrength * 70) / 100;
3531 stats->noise = rtllib_translate_todbm((u8)(100-stats->signal)) -25;
3532
3533 memcpy(&network->stats, stats, sizeof(network->stats));
3534
3535 return 0;
3536}
3537
3538static inline int is_same_network(struct rtllib_network *src,
3539 struct rtllib_network *dst, u8 ssidbroad)
3540{
3541 /* A network is only a duplicate if the channel, BSSID, ESSID
3542 * and the capability field (in particular IBSS and BSS) all match.
3543 * We treat all <hidden> with the same BSSID and channel
3544 * as one network */
3545 return
3546 (((src->ssid_len == dst->ssid_len) || (!ssidbroad)) &&
3547 (src->channel == dst->channel) &&
3548 !memcmp(src->bssid, dst->bssid, ETH_ALEN) &&
3549 (!memcmp(src->ssid, dst->ssid, src->ssid_len) || (!ssidbroad)) &&
3550 ((src->capability & WLAN_CAPABILITY_IBSS) ==
3551 (dst->capability & WLAN_CAPABILITY_IBSS)) &&
3552 ((src->capability & WLAN_CAPABILITY_ESS) ==
3553 (dst->capability & WLAN_CAPABILITY_ESS)));
3554}
3555
3556static inline void update_ibss_network(struct rtllib_network *dst,
3557 struct rtllib_network *src)
3558{
3559 memcpy(&dst->stats, &src->stats, sizeof(struct rtllib_rx_stats));
3560 dst->last_scanned = jiffies;
3561}
3562
3563
3564static inline void update_network(struct rtllib_network *dst,
3565 struct rtllib_network *src)
3566{
3567 int qos_active;
3568 u8 old_param;
3569
3570 memcpy(&dst->stats, &src->stats, sizeof(struct rtllib_rx_stats));
3571 dst->capability = src->capability;
3572 memcpy(dst->rates, src->rates, src->rates_len);
3573 dst->rates_len = src->rates_len;
3574 memcpy(dst->rates_ex, src->rates_ex, src->rates_ex_len);
3575 dst->rates_ex_len = src->rates_ex_len;
3576 if (src->ssid_len > 0)
3577 {
3578 if (dst->ssid_len == 0)
3579 {
3580 memset(dst->hidden_ssid, 0, sizeof(dst->hidden_ssid));
3581 dst->hidden_ssid_len = src->ssid_len;
3582 memcpy(dst->hidden_ssid, src->ssid, src->ssid_len);
3583 }else{
3584 memset(dst->ssid, 0, dst->ssid_len);
3585 dst->ssid_len = src->ssid_len;
3586 memcpy(dst->ssid, src->ssid, src->ssid_len);
3587 }
3588 }
3589 dst->mode = src->mode;
3590 dst->flags = src->flags;
3591 dst->time_stamp[0] = src->time_stamp[0];
3592 dst->time_stamp[1] = src->time_stamp[1];
3593 if (src->flags & NETWORK_HAS_ERP_VALUE)
3594 {
3595 dst->erp_value = src->erp_value;
3596 dst->berp_info_valid = src->berp_info_valid = true;
3597 }
3598 dst->beacon_interval = src->beacon_interval;
3599 dst->listen_interval = src->listen_interval;
3600 dst->atim_window = src->atim_window;
3601 dst->dtim_period = src->dtim_period;
3602 dst->dtim_data = src->dtim_data;
3603 dst->last_dtim_sta_time[0] = src->last_dtim_sta_time[0];
3604 dst->last_dtim_sta_time[1] = src->last_dtim_sta_time[1];
3605 memcpy(&dst->tim, &src->tim, sizeof(struct rtllib_tim_parameters));
3606
3607 dst->bssht.bdSupportHT = src->bssht.bdSupportHT;
3608 dst->bssht.bdRT2RTAggregation = src->bssht.bdRT2RTAggregation;
3609 dst->bssht.bdHTCapLen= src->bssht.bdHTCapLen;
3610 memcpy(dst->bssht.bdHTCapBuf,src->bssht.bdHTCapBuf,src->bssht.bdHTCapLen);
3611 dst->bssht.bdHTInfoLen= src->bssht.bdHTInfoLen;
3612 memcpy(dst->bssht.bdHTInfoBuf,src->bssht.bdHTInfoBuf,src->bssht.bdHTInfoLen);
3613 dst->bssht.bdHTSpecVer = src->bssht.bdHTSpecVer;
3614 dst->bssht.bdRT2RTLongSlotTime = src->bssht.bdRT2RTLongSlotTime;
3615 dst->broadcom_cap_exist = src->broadcom_cap_exist;
3616 dst->ralink_cap_exist = src->ralink_cap_exist;
3617 dst->atheros_cap_exist = src->atheros_cap_exist;
3618 dst->realtek_cap_exit = src->realtek_cap_exit;
3619 dst->marvell_cap_exist = src->marvell_cap_exist;
3620 dst->cisco_cap_exist = src->cisco_cap_exist;
3621 dst->airgo_cap_exist = src->airgo_cap_exist;
3622 dst->unknown_cap_exist = src->unknown_cap_exist;
3623 memcpy(dst->wpa_ie, src->wpa_ie, src->wpa_ie_len);
3624 dst->wpa_ie_len = src->wpa_ie_len;
3625 memcpy(dst->rsn_ie, src->rsn_ie, src->rsn_ie_len);
3626 dst->rsn_ie_len = src->rsn_ie_len;
3627#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
3628 memcpy(dst->wzc_ie, src->wzc_ie, src->wzc_ie_len);
3629 dst->wzc_ie_len = src->wzc_ie_len;
3630#endif
3631
3632 dst->last_scanned = jiffies;
3633 /* qos related parameters */
3634 qos_active = dst->qos_data.active;
3635 old_param = dst->qos_data.param_count;
3636 dst->qos_data.supported = src->qos_data.supported;
3637 if (dst->flags & NETWORK_HAS_QOS_PARAMETERS)
3638 memcpy(&dst->qos_data, &src->qos_data, sizeof(struct rtllib_qos_data));
3639 if (dst->qos_data.supported == 1) {
3640 if (dst->ssid_len)
3641 RTLLIB_DEBUG_QOS
3642 ("QoS the network %s is QoS supported\n",
3643 dst->ssid);
3644 else
3645 RTLLIB_DEBUG_QOS
3646 ("QoS the network is QoS supported\n");
3647 }
3648 dst->qos_data.active = qos_active;
3649 dst->qos_data.old_param_count = old_param;
3650
3651 /* dst->last_associate is not overwritten */
3652 dst->wmm_info = src->wmm_info;
3653 if (src->wmm_param[0].ac_aci_acm_aifsn|| \
3654 src->wmm_param[1].ac_aci_acm_aifsn|| \
3655 src->wmm_param[2].ac_aci_acm_aifsn|| \
3656 src->wmm_param[1].ac_aci_acm_aifsn) {
3657 memcpy(dst->wmm_param, src->wmm_param, WME_AC_PRAM_LEN);
3658 }
3659
3660 dst->SignalStrength = src->SignalStrength;
3661 dst->RSSI = src->RSSI;
3662 dst->Turbo_Enable = src->Turbo_Enable;
3663
3664#ifdef ENABLE_DOT11D
3665 dst->CountryIeLen = src->CountryIeLen;
3666 memcpy(dst->CountryIeBuf, src->CountryIeBuf, src->CountryIeLen);
3667#endif
3668
3669 dst->bWithAironetIE = src->bWithAironetIE;
3670 dst->bCkipSupported = src->bCkipSupported;
3671 memcpy(dst->CcxRmState,src->CcxRmState,2);
3672 dst->bCcxRmEnable = src->bCcxRmEnable;
3673 dst->MBssidMask = src->MBssidMask;
3674 dst->bMBssidValid = src->bMBssidValid;
3675 memcpy(dst->MBssid,src->MBssid,6);
3676 dst->bWithCcxVerNum = src->bWithCcxVerNum;
3677 dst->BssCcxVerNumber = src->BssCcxVerNumber;
3678
3679}
3680static inline int is_beacon(__le16 fc)
3681{
3682 return (WLAN_FC_GET_STYPE(le16_to_cpu(fc)) == RTLLIB_STYPE_BEACON);
3683}
3684
3685#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
3686u8 AsocEntry_ComputeSum(u8 *paddr)
3687{
3688 u32 sum;
3689
3690 sum = paddr[0]+
3691 paddr[1]+
3692 paddr[2]+
3693 paddr[3]+
3694 paddr[4]+
3695 paddr[5];
3696
3697 return (u8)(sum % PEER_MAX_ASSOC);
3698}
3699u8 AsocEntry_AssignAvailableAID(struct rtllib_device *ieee, u8 *paddr)
3700{
3701 int i;
3702
3703 for (i = 0; i < PEER_MAX_ASSOC; i++)
3704 {
3705 if (ieee->AvailableAIDTable[i] == 99)
3706 {
3707 ieee->AvailableAIDTable[i] = AsocEntry_ComputeSum(paddr);
3708 return i+1;
3709 }
3710 }
3711
3712 return 1;
3713}
3714
3715void InitStaInfo(struct rtllib_device *ieee,int index)
3716{
3717 int idx = index;
3718 ieee->peer_assoc_list[idx]->StaDataRate = 0;
3719 ieee->peer_assoc_list[idx]->StaSS = 0;
3720 ieee->peer_assoc_list[idx]->RetryFrameCnt = 0;
3721 ieee->peer_assoc_list[idx]->NoRetryFrameCnt = 0;
3722 ieee->peer_assoc_list[idx]->LastRetryCnt = 0;
3723 ieee->peer_assoc_list[idx]->LastNoRetryCnt = 0;
3724 ieee->peer_assoc_list[idx]->AvgRetryRate = 0;
3725 ieee->peer_assoc_list[idx]->LastRetryRate = 0;
3726 ieee->peer_assoc_list[idx]->txRateIndex = 11;
3727 ieee->peer_assoc_list[idx]->APDataRate = 0x2;
3728 ieee->peer_assoc_list[idx]->ForcedDataRate = 0x2;
3729
3730}
3731static u8 IsStaInfoExist(struct rtllib_device *ieee, u8 *addr)
3732{
3733 int k=0;
3734 struct sta_info * psta = NULL;
3735 u8 sta_idx = PEER_MAX_ASSOC;
3736
3737 for (k=0; k<PEER_MAX_ASSOC; k++)
3738 {
3739 psta = ieee->peer_assoc_list[k];
3740 if (NULL != psta)
3741 {
3742 if (memcmp(addr, psta->macaddr, ETH_ALEN) == 0)
3743 {
3744 sta_idx = k;
3745 break;
3746 }
3747 }
3748 }
3749 return sta_idx;
3750}
3751static u8 GetFreeStaInfoIdx(struct rtllib_device *ieee, u8 *addr)
3752{
3753 int k = 0;
3754 while((ieee->peer_assoc_list[k] != NULL) && (k < PEER_MAX_ASSOC))
3755 k++;
3756 printk("%s: addr:"MAC_FMT" index: %d\n", __func__, MAC_ARG(addr), k);
3757 return k;
3758}
3759struct sta_info *GetStaInfo(struct rtllib_device *ieee, u8 *addr)
3760{
3761 int k=0;
3762 struct sta_info * psta = NULL;
3763 struct sta_info * psta_find = NULL;
3764
3765 for (k=0; k<PEER_MAX_ASSOC; k++)
3766 {
3767 psta = ieee->peer_assoc_list[k];
3768 if (NULL != psta)
3769 {
3770 if (memcmp(addr, psta->macaddr, ETH_ALEN) == 0)
3771 {
3772 psta_find = psta;
3773 break;
3774 }
3775 }
3776 }
3777 return psta_find;
3778}
3779void DelStaInfoList(struct rtllib_device *ieee)
3780{
3781 int idx = 0;
3782 struct sta_info * AsocEntry = NULL;
3783
3784 atomic_set(&ieee->AsocEntryNum, 0);
3785 for (idx=0; idx<PEER_MAX_ASSOC; idx++){
3786 AsocEntry = ieee->peer_assoc_list[idx];
3787 if (NULL != AsocEntry){
3788 kfree(AsocEntry);
3789 ieee->peer_assoc_list[idx] = NULL;
3790 }
3791 ieee->AvailableAIDTable[idx] = 99;
3792 }
3793}
3794void DelStaInfo(struct rtllib_device *ieee, u8 *addr)
3795{
3796 struct sta_info * psta = NULL;
3797 int k=0;
3798
3799 for (k=0; k<PEER_MAX_ASSOC; k++)
3800 {
3801 psta = ieee->peer_assoc_list[k];
3802 if (NULL != psta){
3803 if (memcmp(addr, psta->macaddr, ETH_ALEN) == 0){
3804 if (psta->aid > 0 && psta->aid-1 < PEER_MAX_ASSOC)
3805 ieee->AvailableAIDTable[psta->aid-1] = 99;
3806 else
3807 printk("%s(): clear non-existing entry AID\n", __func__);
3808
3809 kfree(psta);
3810 ieee->peer_assoc_list[k] = NULL;
3811 atomic_dec(&ieee->AsocEntryNum);
3812 }
3813 }
3814 }
3815}
3816void IbssAgeFunction(struct rtllib_device *ieee)
3817{
3818 struct sta_info* AsocEntry = NULL;
3819 int idx;
3820 unsigned long CurrentTime;
3821 signed long TimeDifference;
3822 struct rtllib_network *target;
3823
3824 CurrentTime = jiffies;
3825
3826 for (idx = 0; idx < PEER_MAX_ASSOC; idx++)
3827 {
3828 AsocEntry = ieee->peer_assoc_list[idx];
3829 if (AsocEntry)
3830 {
3831 TimeDifference = jiffies_to_msecs(CurrentTime - AsocEntry->LastActiveTime);
3832
3833 if (TimeDifference > 20000)
3834 {
3835 printk("IbssAgeFunction(): "MAC_FMT" timeout\n", MAC_ARG(AsocEntry->macaddr));
3836 kfree(AsocEntry);
3837 ieee->peer_assoc_list[idx] = NULL;
3838 atomic_dec(&ieee->AsocEntryNum);
3839
3840 if (atomic_read(&ieee->AsocEntryNum) == 0){
3841
3842 down(&ieee->wx_sem);
3843 rtllib_stop_protocol(ieee,true);
3844
3845 list_for_each_entry(target, &ieee->network_list, list) {
3846 if (is_same_network(target, &ieee->current_network,(target->ssid_len?1:0))){
3847 printk("delete sta of previous Ad-hoc\n");
3848 list_del(&target->list);
3849 break;
3850 }
3851 }
3852
3853 rtllib_start_protocol(ieee);
3854 up(&ieee->wx_sem);
3855 }
3856 }
3857 }
3858 }
3859
3860#ifdef TO_DO_LIST
3861 if (AsocEntry_AnyStationAssociated(pMgntInfo)==false)
3862 DrvIFIndicateDisassociation(Adapter, unspec_reason);
3863
3864 if (pMgntInfo->dot11CurrentWirelessMode == WIRELESS_MODE_G ||
3865 (IS_WIRELESS_MODE_N_24G(Adapter) && pMgntInfo->pHTInfo->bCurSuppCCK) )
3866 {
3867 if (nBModeStaCnt == 0)
3868 {
3869 pMgntInfo->bUseProtection = false;
3870 ActUpdate_mCapInfo(Adapter, pMgntInfo->mCap);
3871 }
3872 }
3873
3874 if (IS_WIRELESS_MODE_N_24G(Adapter) || IS_WIRELESS_MODE_N_5G(Adapter) )
3875 {
3876 if (nLegacyStaCnt > 0)
3877 {
3878 pMgntInfo->pHTInfo->CurrentOpMode = HT_OPMODE_MIXED;
3879 }
3880 else
3881 {
3882 if ((pMgntInfo->pHTInfo->bCurBW40MHz) && (n20MHzStaCnt > 0))
3883 pMgntInfo->pHTInfo->CurrentOpMode = HT_OPMODE_40MHZ_PROTECT;
3884 else
3885 pMgntInfo->pHTInfo->CurrentOpMode = HT_OPMODE_NO_PROTECT;
3886
3887 }
3888 }
3889
3890 if (IS_WIRELESS_MODE_G(Adapter) ||
3891 (IS_WIRELESS_MODE_N_24G(Adapter) && pMgntInfo->pHTInfo->bCurSuppCCK))
3892 {
3893 if (pMgntInfo->bUseProtection)
3894 {
3895 u8 CckRate[4] = { MGN_1M, MGN_2M, MGN_5_5M, MGN_11M };
3896 OCTET_STRING osCckRate;
3897 FillOctetString(osCckRate, CckRate, 4);
3898 FilterSupportRate(pMgntInfo->mBrates, &osCckRate, false);
3899 Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_BASIC_RATE, (pu1Byte)&osCckRate);
3900 }
3901 else
3902 {
3903 Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_BASIC_RATE, (pu1Byte)(&pMgntInfo->mBrates) );
3904 }
3905 }
3906#endif
3907}
3908#endif
3909
3910static int IsPassiveChannel( struct rtllib_device *rtllib, u8 channel)
3911{
3912 if (MAX_CHANNEL_NUMBER < channel) {
3913 printk("%s(): Invalid Channel\n", __func__);
3914 return 0;
3915 }
3916
3917 if (rtllib->active_channel_map[channel] == 2)
3918 return 1;
3919
3920 return 0;
3921}
3922
3923int IsLegalChannel( struct rtllib_device *rtllib, u8 channel)
3924{
3925 if (MAX_CHANNEL_NUMBER < channel) {
3926 printk("%s(): Invalid Channel\n", __func__);
3927 return 0;
3928 }
3929 if (rtllib->active_channel_map[channel] > 0)
3930 return 1;
3931
3932 return 0;
3933}
3934
3935
3936static inline void rtllib_process_probe_response(
3937 struct rtllib_device *ieee,
3938 struct rtllib_probe_response *beacon,
3939 struct rtllib_rx_stats *stats)
3940{
3941 struct rtllib_network *target;
3942 struct rtllib_network *oldest = NULL;
3943#ifdef CONFIG_RTLLIB_DEBUG
3944 struct rtllib_info_element *info_element = &beacon->info_element[0];
3945#endif
3946 unsigned long flags;
3947 short renew;
3948#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13))
3949 struct rtllib_network *network = kzalloc(sizeof(struct rtllib_network), GFP_ATOMIC);
3950#else
3951 struct rtllib_network *network = kmalloc(sizeof(*network), GFP_ATOMIC);
3952 memset(network,0,sizeof(*network));
3953#endif
3954
3955 if (!network) {
3956 return;
3957 }
3958
3959 RTLLIB_DEBUG_SCAN(
3960 "'%s' (" MAC_FMT "): %c%c%c%c %c%c%c%c-%c%c%c%c %c%c%c%c\n",
3961 escape_essid(info_element->data, info_element->len),
3962 MAC_ARG(beacon->header.addr3),
3963 (beacon->capability & (1<<0xf)) ? '1' : '0',
3964 (beacon->capability & (1<<0xe)) ? '1' : '0',
3965 (beacon->capability & (1<<0xd)) ? '1' : '0',
3966 (beacon->capability & (1<<0xc)) ? '1' : '0',
3967 (beacon->capability & (1<<0xb)) ? '1' : '0',
3968 (beacon->capability & (1<<0xa)) ? '1' : '0',
3969 (beacon->capability & (1<<0x9)) ? '1' : '0',
3970 (beacon->capability & (1<<0x8)) ? '1' : '0',
3971 (beacon->capability & (1<<0x7)) ? '1' : '0',
3972 (beacon->capability & (1<<0x6)) ? '1' : '0',
3973 (beacon->capability & (1<<0x5)) ? '1' : '0',
3974 (beacon->capability & (1<<0x4)) ? '1' : '0',
3975 (beacon->capability & (1<<0x3)) ? '1' : '0',
3976 (beacon->capability & (1<<0x2)) ? '1' : '0',
3977 (beacon->capability & (1<<0x1)) ? '1' : '0',
3978 (beacon->capability & (1<<0x0)) ? '1' : '0');
3979
3980 if (rtllib_network_init(ieee, beacon, network, stats)) {
3981 RTLLIB_DEBUG_SCAN("Dropped '%s' (" MAC_FMT ") via %s.\n",
3982 escape_essid(info_element->data,
3983 info_element->len),
3984 MAC_ARG(beacon->header.addr3),
3985 WLAN_FC_GET_STYPE(beacon->header.frame_ctl) ==
3986 RTLLIB_STYPE_PROBE_RESP ?
3987 "PROBE RESPONSE" : "BEACON");
3988 goto free_network;
3989 }
3990
3991
3992 if (!IsLegalChannel(ieee, network->channel))
3993 goto free_network;
3994
3995 if (WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == RTLLIB_STYPE_PROBE_RESP) {
3996 if (IsPassiveChannel(ieee, network->channel)) {
3997 printk("GetScanInfo(): For Global Domain, "
3998 "filter probe response at channel(%d).\n", network->channel);
3999 goto free_network;
4000 }
4001 }
4002
4003 /* The network parsed correctly -- so now we scan our known networks
4004 * to see if we can find it in our list.
4005 *
4006 * NOTE: This search is definitely not optimized. Once its doing
4007 * the "right thing" we'll optimize it for efficiency if
4008 * necessary */
4009
4010 /* Search for this entry in the list and update it if it is
4011 * already there. */
4012
4013 spin_lock_irqsave(&ieee->lock, flags);
4014#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
4015 if (is_beacon(beacon->header.frame_ctl)){
4016 if ((ieee->iw_mode == IW_MODE_ADHOC) && (ieee->state == RTLLIB_LINKED))
4017 {
4018 if ((network->ssid_len == ieee->current_network.ssid_len)
4019 && (!memcmp(network->ssid,ieee->current_network.ssid,ieee->current_network.ssid_len))
4020 && (network->channel == ieee->current_network.channel)
4021 && (ieee->current_network.channel > 0)
4022 && (ieee->current_network.channel <= 14))
4023 {
4024 if (!memcmp(ieee->current_network.bssid,network->bssid,6))
4025 {
4026 int idx = 0;
4027 struct rtllib_hdr_3addr* header = NULL;
4028 int idx_exist = 0;
4029 if (timer_pending(&ieee->ibss_wait_timer))
4030 del_timer_sync(&ieee->ibss_wait_timer);
4031 header = (struct rtllib_hdr_3addr*)&(beacon->header);
4032 idx_exist = IsStaInfoExist(ieee,header->addr2);
4033 if (idx_exist >= PEER_MAX_ASSOC) {
4034 idx = GetFreeStaInfoIdx(ieee, header->addr2);
4035 } else {
4036 ieee->peer_assoc_list[idx_exist]->LastActiveTime = jiffies;
4037 goto no_alloc;
4038 }
4039 if (idx >= PEER_MAX_ASSOC - 1) {
4040 printk("\n%s():ERR!!!Buffer overflow - could not append!!!",__func__);
4041 goto free_network;
4042 } else {
4043 ieee->peer_assoc_list[idx] = (struct sta_info *)kmalloc(sizeof(struct sta_info), GFP_ATOMIC);
4044 memset(ieee->peer_assoc_list[idx], 0, sizeof(struct sta_info));
4045 ieee->peer_assoc_list[idx]->LastActiveTime = jiffies;
4046 memcpy(ieee->peer_assoc_list[idx]->macaddr,header->addr2,ETH_ALEN);
4047 ieee->peer_assoc_list[idx]->ratr_index = 8;
4048 InitStaInfo(ieee,idx);
4049 atomic_inc(&ieee->AsocEntryNum);
4050 ieee->peer_assoc_list[idx]->aid = AsocEntry_AssignAvailableAID(ieee, ieee->peer_assoc_list[idx]->macaddr);
4051 ieee->check_ht_cap(ieee->dev,ieee->peer_assoc_list[idx],network);
4052 queue_delayed_work_rsl(ieee->wq, &ieee->update_assoc_sta_info_wq, 0);
4053 ieee->Adhoc_InitRateAdaptive(ieee->dev,ieee->peer_assoc_list[idx]);
4054 }
4055 }
4056 }
4057 }
4058 }
4059 if (ieee->iw_mode == IW_MODE_ADHOC){
4060 if ((network->ssid_len == ieee->current_network.ssid_len)
4061 && (!memcmp(network->ssid,ieee->current_network.ssid,ieee->current_network.ssid_len))
4062 && (network->capability & WLAN_CAPABILITY_IBSS)
4063 && (ieee->state == RTLLIB_LINKED_SCANNING))
4064 {
4065 if (memcmp(ieee->current_network.bssid,network->bssid,6))
4066 {
4067 printk("%s(): SSID matched but BSSID mismatched.\n",__func__);
4068
4069 ieee->TargetTsf = beacon->time_stamp[1];
4070 ieee->TargetTsf <<= 32;
4071 ieee->TargetTsf |= beacon->time_stamp[0];
4072
4073 ieee->CurrTsf = stats->TimeStampLow;
4074
4075 queue_delayed_work_rsl(ieee->wq, &ieee->check_tsf_wq, 0);
4076 }
4077 }
4078 }
4079#endif
4080#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
4081no_alloc:
4082 if (ieee->iw_mode == IW_MODE_INFRA)
4083#endif
4084 {
4085 if (is_same_network(&ieee->current_network, network, (network->ssid_len?1:0))) {
4086 update_network(&ieee->current_network, network);
4087 if ((ieee->current_network.mode == IEEE_N_24G || ieee->current_network.mode == IEEE_G)
4088 && ieee->current_network.berp_info_valid){
4089 if (ieee->current_network.erp_value& ERP_UseProtection)
4090 ieee->current_network.buseprotection = true;
4091 else
4092 ieee->current_network.buseprotection = false;
4093 }
4094 if (is_beacon(beacon->header.frame_ctl))
4095 {
4096 if (ieee->state >= RTLLIB_LINKED)
4097 ieee->LinkDetectInfo.NumRecvBcnInPeriod++;
4098 }
4099 }
4100 }
4101#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
4102 else if (ieee->iw_mode == IW_MODE_ADHOC)
4103 {
4104 if (is_same_network(&ieee->current_network, network, (network->ssid_len?1:0))) {
4105 update_ibss_network(&ieee->current_network, network);
4106 }
4107 }
4108#endif
4109 list_for_each_entry(target, &ieee->network_list, list) {
4110 if (is_same_network(target, network,(target->ssid_len?1:0)))
4111 break;
4112 if ((oldest == NULL) ||
4113 (target->last_scanned < oldest->last_scanned))
4114 oldest = target;
4115 }
4116
4117 /* If we didn't find a match, then get a new network slot to initialize
4118 * with this beacon's information */
4119 if (&target->list == &ieee->network_list) {
4120 if (list_empty(&ieee->network_free_list)) {
4121 /* If there are no more slots, expire the oldest */
4122 list_del(&oldest->list);
4123 target = oldest;
4124 RTLLIB_DEBUG_SCAN("Expired '%s' (" MAC_FMT ") from "
4125 "network list.\n",
4126 escape_essid(target->ssid,
4127 target->ssid_len),
4128 MAC_ARG(target->bssid));
4129 } else {
4130 /* Otherwise just pull from the free list */
4131 target = list_entry(ieee->network_free_list.next,
4132 struct rtllib_network, list);
4133 list_del(ieee->network_free_list.next);
4134 }
4135
4136
4137#ifdef CONFIG_RTLLIB_DEBUG
4138 RTLLIB_DEBUG_SCAN("Adding '%s' (" MAC_FMT ") via %s.\n",
4139 escape_essid(network->ssid,
4140 network->ssid_len),
4141 MAC_ARG(network->bssid),
4142 WLAN_FC_GET_STYPE(beacon->header.frame_ctl) ==
4143 RTLLIB_STYPE_PROBE_RESP ?
4144 "PROBE RESPONSE" : "BEACON");
4145#endif
4146 memcpy(target, network, sizeof(*target));
4147 list_add_tail(&target->list, &ieee->network_list);
4148 if (ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE)
4149 rtllib_softmac_new_net(ieee, network);
4150 } else {
4151 RTLLIB_DEBUG_SCAN("Updating '%s' (" MAC_FMT ") via %s.\n",
4152 escape_essid(target->ssid,
4153 target->ssid_len),
4154 MAC_ARG(target->bssid),
4155 WLAN_FC_GET_STYPE(beacon->header.frame_ctl) ==
4156 RTLLIB_STYPE_PROBE_RESP ?
4157 "PROBE RESPONSE" : "BEACON");
4158
4159 /* we have an entry and we are going to update it. But this entry may
4160 * be already expired. In this case we do the same as we found a new
4161 * net and call the new_net handler
4162 */
4163 renew = !time_after(target->last_scanned + ieee->scan_age, jiffies);
4164 if ((!target->ssid_len) &&
4165 (((network->ssid_len > 0) && (target->hidden_ssid_len == 0))
4166 || ((ieee->current_network.ssid_len == network->ssid_len) &&
4167 (strncmp(ieee->current_network.ssid, network->ssid, network->ssid_len) == 0) &&
4168 (ieee->state == RTLLIB_NOLINK)))
4169 ) {
4170 renew = 1;
4171 }
4172 update_network(target, network);
4173 if (renew && (ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE))
4174 rtllib_softmac_new_net(ieee, network);
4175 }
4176
4177 spin_unlock_irqrestore(&ieee->lock, flags);
4178 if (is_beacon(beacon->header.frame_ctl)&&is_same_network(&ieee->current_network, network, (network->ssid_len?1:0))&&\
4179 (ieee->state == RTLLIB_LINKED)) {
4180 if (ieee->handle_beacon != NULL) {
4181 ieee->handle_beacon(ieee->dev,beacon,&ieee->current_network);
4182 }
4183 }
4184free_network:
4185 kfree(network);
4186 return;
4187}
4188
4189void rtllib_rx_mgt(struct rtllib_device *ieee,
4190 struct sk_buff *skb,
4191 struct rtllib_rx_stats *stats)
4192{
4193 struct rtllib_hdr_4addr *header = (struct rtllib_hdr_4addr *)skb->data ;
4194 if (WLAN_FC_GET_STYPE(header->frame_ctl) != RTLLIB_STYPE_PROBE_RESP &&
4195 WLAN_FC_GET_STYPE(header->frame_ctl) != RTLLIB_STYPE_BEACON)
4196 ieee->last_rx_ps_time = jiffies;
4197
4198 switch (WLAN_FC_GET_STYPE(header->frame_ctl)) {
4199
4200 case RTLLIB_STYPE_BEACON:
4201 RTLLIB_DEBUG_MGMT("received BEACON (%d)\n",
4202 WLAN_FC_GET_STYPE(header->frame_ctl));
4203 RTLLIB_DEBUG_SCAN("Beacon\n");
4204 rtllib_process_probe_response(
4205 ieee, (struct rtllib_probe_response *)header, stats);
4206
4207 if (ieee->sta_sleep || (ieee->ps != RTLLIB_PS_DISABLED &&
4208 ieee->iw_mode == IW_MODE_INFRA &&
4209 ieee->state == RTLLIB_LINKED))
4210 tasklet_schedule(&ieee->ps_task);
4211
4212 break;
4213
4214 case RTLLIB_STYPE_PROBE_RESP:
4215 RTLLIB_DEBUG_MGMT("received PROBE RESPONSE (%d)\n",
4216 WLAN_FC_GET_STYPE(header->frame_ctl));
4217 RTLLIB_DEBUG_SCAN("Probe response\n");
4218 rtllib_process_probe_response(
4219 ieee, (struct rtllib_probe_response *)header, stats);
4220 break;
4221 case RTLLIB_STYPE_PROBE_REQ:
4222 RTLLIB_DEBUG_MGMT("received PROBE RESQUEST (%d)\n",
4223 WLAN_FC_GET_STYPE(header->frame_ctl));
4224 RTLLIB_DEBUG_SCAN("Probe request\n");
4225 if ((ieee->softmac_features & IEEE_SOFTMAC_PROBERS) &&
4226 ((ieee->iw_mode == IW_MODE_ADHOC ||
4227 ieee->iw_mode == IW_MODE_MASTER) &&
4228 ieee->state == RTLLIB_LINKED)){
4229 rtllib_rx_probe_rq(ieee, skb);
4230 }
4231 break;
4232 }
4233
4234}
diff --git a/drivers/staging/rtl8192e/rtllib_softmac.c b/drivers/staging/rtl8192e/rtllib_softmac.c
new file mode 100644
index 00000000000..a843de99ed3
--- /dev/null
+++ b/drivers/staging/rtl8192e/rtllib_softmac.c
@@ -0,0 +1,4150 @@
1/* IEEE 802.11 SoftMAC layer
2 * Copyright (c) 2005 Andrea Merello <andreamrl@tiscali.it>
3 *
4 * Mostly extracted from the rtl8180-sa2400 driver for the
5 * in-kernel generic ieee802.11 stack.
6 *
7 * Few lines might be stolen from other part of the rtllib
8 * stack. Copyright who own it's copyright
9 *
10 * WPA code stolen from the ipw2200 driver.
11 * Copyright who own it's copyright.
12 *
13 * released under the GPL
14 */
15
16
17#include "rtllib.h"
18#include "rtl_core.h"
19
20#include <linux/random.h>
21#include <linux/delay.h>
22#include <linux/version.h>
23#include <asm/uaccess.h>
24#ifdef ENABLE_DOT11D
25#include "dot11d.h"
26#endif
27
28#ifdef RTK_DMP_PLATFORM
29#include <linux/usb_setting.h>
30#endif
31extern void _setup_timer( struct timer_list*, void*, unsigned long );
32u8 rsn_authen_cipher_suite[16][4] = {
33 {0x00,0x0F,0xAC,0x00},
34 {0x00,0x0F,0xAC,0x01},
35 {0x00,0x0F,0xAC,0x02},
36 {0x00,0x0F,0xAC,0x03},
37 {0x00,0x0F,0xAC,0x04},
38 {0x00,0x0F,0xAC,0x05},
39};
40
41short rtllib_is_54g(struct rtllib_network *net)
42{
43 return ((net->rates_ex_len > 0) || (net->rates_len > 4));
44}
45
46short rtllib_is_shortslot(struct rtllib_network net)
47{
48 return (net.capability & WLAN_CAPABILITY_SHORT_SLOT_TIME);
49}
50
51/* returns the total length needed for pleacing the RATE MFIE
52 * tag and the EXTENDED RATE MFIE tag if needed.
53 * It encludes two bytes per tag for the tag itself and its len
54 */
55unsigned int rtllib_MFIE_rate_len(struct rtllib_device *ieee)
56{
57 unsigned int rate_len = 0;
58
59 if (ieee->modulation & RTLLIB_CCK_MODULATION)
60 rate_len = RTLLIB_CCK_RATE_LEN + 2;
61
62 if (ieee->modulation & RTLLIB_OFDM_MODULATION)
63
64 rate_len += RTLLIB_OFDM_RATE_LEN + 2;
65
66 return rate_len;
67}
68
69/* pleace the MFIE rate, tag to the memory (double) poined.
70 * Then it updates the pointer so that
71 * it points after the new MFIE tag added.
72 */
73void rtllib_MFIE_Brate(struct rtllib_device *ieee, u8 **tag_p)
74{
75 u8 *tag = *tag_p;
76
77 if (ieee->modulation & RTLLIB_CCK_MODULATION){
78 *tag++ = MFIE_TYPE_RATES;
79 *tag++ = 4;
80 *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_1MB;
81 *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_2MB;
82 *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_5MB;
83 *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_11MB;
84 }
85
86 /* We may add an option for custom rates that specific HW might support */
87 *tag_p = tag;
88}
89
90void rtllib_MFIE_Grate(struct rtllib_device *ieee, u8 **tag_p)
91{
92 u8 *tag = *tag_p;
93
94 if (ieee->modulation & RTLLIB_OFDM_MODULATION){
95
96 *tag++ = MFIE_TYPE_RATES_EX;
97 *tag++ = 8;
98 *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_6MB;
99 *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_9MB;
100 *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_12MB;
101 *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_18MB;
102 *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_24MB;
103 *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_36MB;
104 *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_48MB;
105 *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_54MB;
106
107 }
108
109 /* We may add an option for custom rates that specific HW might support */
110 *tag_p = tag;
111}
112
113void rtllib_WMM_Info(struct rtllib_device *ieee, u8 **tag_p) {
114 u8 *tag = *tag_p;
115
116 *tag++ = MFIE_TYPE_GENERIC;
117 *tag++ = 7;
118 *tag++ = 0x00;
119 *tag++ = 0x50;
120 *tag++ = 0xf2;
121 *tag++ = 0x02;
122 *tag++ = 0x00;
123 *tag++ = 0x01;
124#ifdef SUPPORT_USPD
125 if (ieee->current_network.wmm_info & 0x80) {
126 *tag++ = 0x0f|MAX_SP_Len;
127 } else {
128 *tag++ = MAX_SP_Len;
129 }
130#else
131 *tag++ = MAX_SP_Len;
132#endif
133 *tag_p = tag;
134}
135
136void rtllib_TURBO_Info(struct rtllib_device *ieee, u8 **tag_p) {
137 u8 *tag = *tag_p;
138
139 *tag++ = MFIE_TYPE_GENERIC;
140 *tag++ = 7;
141 *tag++ = 0x00;
142 *tag++ = 0xe0;
143 *tag++ = 0x4c;
144 *tag++ = 0x01;
145 *tag++ = 0x02;
146 *tag++ = 0x11;
147 *tag++ = 0x00;
148
149 *tag_p = tag;
150 printk(KERN_ALERT "This is enable turbo mode IE process\n");
151}
152
153void enqueue_mgmt(struct rtllib_device *ieee, struct sk_buff *skb)
154{
155 int nh;
156 nh = (ieee->mgmt_queue_head +1) % MGMT_QUEUE_NUM;
157
158/*
159 * if the queue is full but we have newer frames then
160 * just overwrites the oldest.
161 *
162 * if (nh == ieee->mgmt_queue_tail)
163 * return -1;
164 */
165 ieee->mgmt_queue_head = nh;
166 ieee->mgmt_queue_ring[nh] = skb;
167
168}
169
170struct sk_buff *dequeue_mgmt(struct rtllib_device *ieee)
171{
172 struct sk_buff *ret;
173
174 if (ieee->mgmt_queue_tail == ieee->mgmt_queue_head)
175 return NULL;
176
177 ret = ieee->mgmt_queue_ring[ieee->mgmt_queue_tail];
178
179 ieee->mgmt_queue_tail =
180 (ieee->mgmt_queue_tail+1) % MGMT_QUEUE_NUM;
181
182 return ret;
183}
184
185void init_mgmt_queue(struct rtllib_device *ieee)
186{
187 ieee->mgmt_queue_tail = ieee->mgmt_queue_head = 0;
188}
189
190
191u8
192MgntQuery_TxRateExcludeCCKRates(struct rtllib_device *ieee)
193{
194 u16 i;
195 u8 QueryRate = 0;
196 u8 BasicRate;
197
198
199 for ( i = 0; i < ieee->current_network.rates_len; i++)
200 {
201 BasicRate = ieee->current_network.rates[i]&0x7F;
202 if (!rtllib_is_cck_rate(BasicRate))
203 {
204 if (QueryRate == 0)
205 {
206 QueryRate = BasicRate;
207 }
208 else
209 {
210 if (BasicRate < QueryRate)
211 {
212 QueryRate = BasicRate;
213 }
214 }
215 }
216 }
217
218 if (QueryRate == 0)
219 {
220 QueryRate = 12;
221 printk("No BasicRate found!!\n");
222 }
223 return QueryRate;
224}
225
226u8 MgntQuery_MgntFrameTxRate(struct rtllib_device *ieee)
227{
228 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
229 u8 rate;
230
231 if (pHTInfo->IOTAction & HT_IOT_ACT_MGNT_USE_CCK_6M)
232 rate = 0x0c;
233 else
234 rate = ieee->basic_rate & 0x7f;
235
236 if (rate == 0){
237 if (ieee->mode == IEEE_A||
238 ieee->mode== IEEE_N_5G||
239 (ieee->mode== IEEE_N_24G&&!pHTInfo->bCurSuppCCK))
240 rate = 0x0c;
241 else
242 rate = 0x02;
243 }
244
245 return rate;
246}
247
248
249void rtllib_sta_wakeup(struct rtllib_device *ieee, short nl);
250
251inline void softmac_mgmt_xmit(struct sk_buff *skb, struct rtllib_device *ieee)
252{
253 unsigned long flags;
254 short single = ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE;
255 struct rtllib_hdr_3addr *header=
256 (struct rtllib_hdr_3addr *) skb->data;
257
258 cb_desc *tcb_desc = (cb_desc *)(skb->cb + 8);
259 spin_lock_irqsave(&ieee->lock, flags);
260
261 /* called with 2nd param 0, no mgmt lock required */
262 rtllib_sta_wakeup(ieee,0);
263
264 if (header->frame_ctl == RTLLIB_STYPE_BEACON)
265 tcb_desc->queue_index = BEACON_QUEUE;
266 else
267 tcb_desc->queue_index = MGNT_QUEUE;
268
269 if (ieee->disable_mgnt_queue)
270 tcb_desc->queue_index = HIGH_QUEUE;
271
272 tcb_desc->data_rate = MgntQuery_MgntFrameTxRate(ieee);
273 tcb_desc->RATRIndex = 7;
274 tcb_desc->bTxDisableRateFallBack = 1;
275 tcb_desc->bTxUseDriverAssingedRate = 1;
276 if (single) {
277 if (ieee->queue_stop){
278 enqueue_mgmt(ieee,skb);
279 }else{
280 header->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0]<<4);
281
282 if (ieee->seq_ctrl[0] == 0xFFF)
283 ieee->seq_ctrl[0] = 0;
284 else
285 ieee->seq_ctrl[0]++;
286
287 /* avoid watchdog triggers */
288 ieee->softmac_data_hard_start_xmit(skb,ieee->dev,ieee->basic_rate);
289 }
290
291 spin_unlock_irqrestore(&ieee->lock, flags);
292 }else{
293 spin_unlock_irqrestore(&ieee->lock, flags);
294 spin_lock_irqsave(&ieee->mgmt_tx_lock, flags);
295
296 header->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
297
298 if (ieee->seq_ctrl[0] == 0xFFF)
299 ieee->seq_ctrl[0] = 0;
300 else
301 ieee->seq_ctrl[0]++;
302
303 /* check wether the managed packet queued greater than 5 */
304 if (!ieee->check_nic_enough_desc(ieee->dev,tcb_desc->queue_index)||\
305 (skb_queue_len(&ieee->skb_waitQ[tcb_desc->queue_index]) != 0)||\
306 (ieee->queue_stop) ) {
307 /* insert the skb packet to the management queue */
308 /* as for the completion function, it does not need
309 * to check it any more.
310 * */
311 printk("%s():insert to waitqueue, queue_index:%d!\n",__func__,tcb_desc->queue_index);
312 skb_queue_tail(&ieee->skb_waitQ[tcb_desc->queue_index], skb);
313 } else {
314 ieee->softmac_hard_start_xmit(skb,ieee->dev);
315 }
316 spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags);
317 }
318}
319
320inline void softmac_ps_mgmt_xmit(struct sk_buff *skb,
321 struct rtllib_device *ieee)
322{
323 short single = ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE;
324 struct rtllib_hdr_3addr *header =
325 (struct rtllib_hdr_3addr *) skb->data;
326 u16 fc,type,stype;
327 cb_desc *tcb_desc = (cb_desc *)(skb->cb + 8);
328
329 fc = header->frame_ctl;
330 type = WLAN_FC_GET_TYPE(fc);
331 stype = WLAN_FC_GET_STYPE(fc);
332
333
334 if (stype != RTLLIB_STYPE_PSPOLL)
335 tcb_desc->queue_index = MGNT_QUEUE;
336 else
337 tcb_desc->queue_index = HIGH_QUEUE;
338
339 if (ieee->disable_mgnt_queue)
340 tcb_desc->queue_index = HIGH_QUEUE;
341
342
343 tcb_desc->data_rate = MgntQuery_MgntFrameTxRate(ieee);
344 tcb_desc->RATRIndex = 7;
345 tcb_desc->bTxDisableRateFallBack = 1;
346 tcb_desc->bTxUseDriverAssingedRate = 1;
347 if (single) {
348 if (type != RTLLIB_FTYPE_CTL) {
349 header->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
350
351 if (ieee->seq_ctrl[0] == 0xFFF)
352 ieee->seq_ctrl[0] = 0;
353 else
354 ieee->seq_ctrl[0]++;
355
356 }
357 /* avoid watchdog triggers */
358 ieee->softmac_data_hard_start_xmit(skb,ieee->dev,ieee->basic_rate);
359
360 } else {
361 if (type != RTLLIB_FTYPE_CTL) {
362 header->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
363
364 if (ieee->seq_ctrl[0] == 0xFFF)
365 ieee->seq_ctrl[0] = 0;
366 else
367 ieee->seq_ctrl[0]++;
368 }
369 ieee->softmac_hard_start_xmit(skb,ieee->dev);
370
371 }
372}
373
374inline struct sk_buff *rtllib_probe_req(struct rtllib_device *ieee)
375{
376 unsigned int len,rate_len;
377 u8 *tag;
378 struct sk_buff *skb;
379 struct rtllib_probe_request *req;
380
381 len = ieee->current_network.ssid_len;
382
383 rate_len = rtllib_MFIE_rate_len(ieee);
384
385#ifdef USB_USE_ALIGNMENT
386 u32 Tmpaddr;
387 int alignment;
388 skb = dev_alloc_skb(sizeof(struct rtllib_probe_request) +
389 2 + len + rate_len + ieee->tx_headroom + USB_512B_ALIGNMENT_SIZE);
390#else
391 skb = dev_alloc_skb(sizeof(struct rtllib_probe_request) +
392 2 + len + rate_len + ieee->tx_headroom);
393#endif
394
395 if (!skb)
396 return NULL;
397
398#ifdef USB_USE_ALIGNMENT
399 Tmpaddr = (u32)skb->data;
400 alignment = Tmpaddr & 0x1ff;
401 skb_reserve(skb,(USB_512B_ALIGNMENT_SIZE - alignment));
402#endif
403
404 skb_reserve(skb, ieee->tx_headroom);
405
406 req = (struct rtllib_probe_request *) skb_put(skb,sizeof(struct rtllib_probe_request));
407 req->header.frame_ctl = cpu_to_le16(RTLLIB_STYPE_PROBE_REQ);
408 req->header.duration_id = 0;
409
410 memset(req->header.addr1, 0xff, ETH_ALEN);
411 memcpy(req->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
412 memset(req->header.addr3, 0xff, ETH_ALEN);
413
414 tag = (u8 *) skb_put(skb,len+2+rate_len);
415
416 *tag++ = MFIE_TYPE_SSID;
417 *tag++ = len;
418 memcpy(tag, ieee->current_network.ssid, len);
419 tag += len;
420
421 rtllib_MFIE_Brate(ieee,&tag);
422 rtllib_MFIE_Grate(ieee,&tag);
423
424 return skb;
425}
426
427struct sk_buff *rtllib_get_beacon_(struct rtllib_device *ieee);
428
429void rtllib_send_beacon(struct rtllib_device *ieee)
430{
431 struct sk_buff *skb;
432 if (!ieee->ieee_up)
433 return;
434 skb = rtllib_get_beacon_(ieee);
435
436 if (skb){
437 softmac_mgmt_xmit(skb, ieee);
438 ieee->softmac_stats.tx_beacons++;
439 }
440
441 if (ieee->beacon_txing && ieee->ieee_up){
442 mod_timer(&ieee->beacon_timer,jiffies+(MSECS(ieee->current_network.beacon_interval-5)));
443 }
444}
445
446
447void rtllib_send_beacon_cb(unsigned long _ieee)
448{
449 struct rtllib_device *ieee =
450 (struct rtllib_device *) _ieee;
451 unsigned long flags;
452
453 spin_lock_irqsave(&ieee->beacon_lock, flags);
454 rtllib_send_beacon(ieee);
455 spin_unlock_irqrestore(&ieee->beacon_lock, flags);
456}
457
458/*
459 * Description:
460 * Enable network monitor mode, all rx packets will be received.
461 */
462void rtllib_EnableNetMonitorMode(struct net_device* dev,
463 bool bInitState)
464{
465 struct rtllib_device* ieee = netdev_priv_rsl(dev);
466
467 printk("========>Enter Monitor Mode\n");
468
469 ieee->AllowAllDestAddrHandler(dev, true, !bInitState);
470}
471
472
473/*
474 * Description:
475 * Disable network network monitor mode, only packets destinated to
476 * us will be received.
477 */
478void rtllib_DisableNetMonitorMode(struct net_device* dev,
479 bool bInitState)
480{
481 struct rtllib_device* ieee = netdev_priv_rsl(dev);
482
483 printk("========>Exit Monitor Mode\n");
484
485 ieee->AllowAllDestAddrHandler(dev, false, !bInitState);
486}
487
488
489/*
490 * Description:
491 * This enables the specialized promiscuous mode required by Intel.
492 * In this mode, Intel intends to hear traffics from/to other STAs in the same BSS.
493 * Therefore we don't have to disable checking BSSID and we only need to allow all dest.
494 * BUT: if we enable checking BSSID then we can't recv packets from other STA.
495 */
496void rtllib_EnableIntelPromiscuousMode(struct net_device* dev,
497 bool bInitState)
498{
499 bool bFilterOutNonAssociatedBSSID = false;
500
501 struct rtllib_device* ieee = netdev_priv_rsl(dev);
502
503 printk("========>Enter Intel Promiscuous Mode\n");
504
505 ieee->AllowAllDestAddrHandler(dev, true, !bInitState);
506 ieee->SetHwRegHandler(dev, HW_VAR_CECHK_BSSID, (u8*)&bFilterOutNonAssociatedBSSID);
507
508 ieee->bNetPromiscuousMode = true;
509}
510
511
512/*
513 * Description:
514 * This disables the specialized promiscuous mode required by Intel.
515 * See MgntEnableIntelPromiscuousMode for detail.
516 */
517void rtllib_DisableIntelPromiscuousMode(struct net_device* dev,
518 bool bInitState)
519{
520 bool bFilterOutNonAssociatedBSSID = true;
521
522 struct rtllib_device* ieee = netdev_priv_rsl(dev);
523
524 printk("========>Exit Intel Promiscuous Mode\n");
525
526 ieee->AllowAllDestAddrHandler(dev, false, !bInitState);
527 ieee->SetHwRegHandler(dev, HW_VAR_CECHK_BSSID, (u8*)&bFilterOutNonAssociatedBSSID);
528
529 ieee->bNetPromiscuousMode = false;
530}
531
532void rtllib_send_probe(struct rtllib_device *ieee, u8 is_mesh)
533{
534 struct sk_buff *skb;
535 skb = rtllib_probe_req(ieee);
536 if (skb){
537 softmac_mgmt_xmit(skb, ieee);
538 ieee->softmac_stats.tx_probe_rq++;
539 }
540}
541
542
543void rtllib_send_probe_requests(struct rtllib_device *ieee, u8 is_mesh)
544{
545 if (ieee->active_scan && (ieee->softmac_features &
546 IEEE_SOFTMAC_PROBERQ)) {
547 rtllib_send_probe(ieee, 0);
548 rtllib_send_probe(ieee, 0);
549 }
550}
551
552void rtllib_softmac_hint11d_wq(void *data)
553{
554#ifdef CONFIG_CRDA
555 struct rtllib_device *ieee = container_of_dwork_rsl(data, struct rtllib_device, softmac_hint11d_wq);
556 PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(ieee);
557 struct wireless_dev *wdev = &ieee->wdev;
558
559 regulatory_hint_11d(wdev->wiphy, pDot11dInfo->CountryIeBuf, pDot11dInfo->CountryIeLen);
560#endif
561}
562
563void rtllib_update_active_chan_map(struct rtllib_device *ieee)
564{
565#ifdef ENABLE_DOT11D
566 memcpy(ieee->active_channel_map, GET_DOT11D_INFO(ieee)->channel_map, MAX_CHANNEL_NUMBER+1);
567#else
568 memcpy(ieee->active_channel_map, ieee->channel_map, MAX_CHANNEL_NUMBER+1);
569#endif
570}
571
572/* this performs syncro scan blocking the caller until all channels
573 * in the allowed channel map has been checked.
574 */
575void rtllib_softmac_scan_syncro(struct rtllib_device *ieee, u8 is_mesh)
576{
577 short ch = 0;
578
579 rtllib_update_active_chan_map(ieee);
580
581 ieee->be_scan_inprogress = true;
582
583 down(&ieee->scan_sem);
584
585 while(1)
586 {
587
588 do {
589 ch++;
590 if (ch > MAX_CHANNEL_NUMBER)
591 goto out; /* scan completed */
592 } while(!ieee->active_channel_map[ch]);
593
594 /* this fuction can be called in two situations
595 * 1- We have switched to ad-hoc mode and we are
596 * performing a complete syncro scan before conclude
597 * there are no interesting cell and to create a
598 * new one. In this case the link state is
599 * RTLLIB_NOLINK until we found an interesting cell.
600 * If so the ieee8021_new_net, called by the RX path
601 * will set the state to RTLLIB_LINKED, so we stop
602 * scanning
603 * 2- We are linked and the root uses run iwlist scan.
604 * So we switch to RTLLIB_LINKED_SCANNING to remember
605 * that we are still logically linked (not interested in
606 * new network events, despite for updating the net list,
607 * but we are temporarly 'unlinked' as the driver shall
608 * not filter RX frames and the channel is changing.
609 * So the only situation in witch are interested is to check
610 * if the state become LINKED because of the #1 situation
611 */
612
613 if (ieee->state == RTLLIB_LINKED)
614 goto out;
615 if (ieee->sync_scan_hurryup){
616 printk("============>sync_scan_hurryup out\n");
617 goto out;
618 }
619
620 ieee->set_chan(ieee->dev, ch);
621 if (ieee->active_channel_map[ch] == 1)
622 rtllib_send_probe_requests(ieee, 0);
623
624 /* this prevent excessive time wait when we
625 * need to wait for a syncro scan to end..
626 */
627 msleep_interruptible_rsl(RTLLIB_SOFTMAC_SCAN_TIME);
628 }
629out:
630 ieee->actscanning = false;
631 ieee->sync_scan_hurryup = 0;
632
633 if (ieee->state >= RTLLIB_LINKED){
634#ifdef ENABLE_DOT11D
635 if (IS_DOT11D_ENABLE(ieee))
636 DOT11D_ScanComplete(ieee);
637#endif
638 }
639 up(&ieee->scan_sem);
640
641 ieee->be_scan_inprogress = false;
642
643#ifndef FOR_MOBLIN
644 {
645 union iwreq_data wrqu;
646 memset(&wrqu, 0, sizeof(wrqu));
647 wireless_send_event(ieee->dev,SIOCGIWSCAN,&wrqu,NULL);
648 }
649#endif
650}
651
652void rtllib_softmac_scan_wq(void *data)
653{
654 struct rtllib_device *ieee = container_of_dwork_rsl(data, struct rtllib_device, softmac_scan_wq);
655 u8 last_channel = ieee->current_network.channel;
656
657 rtllib_update_active_chan_map(ieee);
658
659 if (!ieee->ieee_up)
660 return;
661 if (rtllib_act_scanning(ieee,true) == true)
662 return;
663
664 down(&ieee->scan_sem);
665
666 if (ieee->eRFPowerState == eRfOff)
667 {
668 printk("======>%s():rf state is eRfOff, return\n",__func__);
669 goto out1;
670 }
671
672 do{
673 ieee->current_network.channel =
674 (ieee->current_network.channel + 1) % MAX_CHANNEL_NUMBER;
675 if (ieee->scan_watch_dog++ > MAX_CHANNEL_NUMBER)
676 {
677 if (!ieee->active_channel_map[ieee->current_network.channel])
678 ieee->current_network.channel = 6;
679 goto out; /* no good chans */
680 }
681 } while(!ieee->active_channel_map[ieee->current_network.channel]);
682
683 if (ieee->scanning_continue == 0 )
684 goto out;
685
686 ieee->set_chan(ieee->dev, ieee->current_network.channel);
687
688 if (ieee->active_channel_map[ieee->current_network.channel] == 1)
689 rtllib_send_probe_requests(ieee, 0);
690
691 queue_delayed_work_rsl(ieee->wq, &ieee->softmac_scan_wq, MSECS(RTLLIB_SOFTMAC_SCAN_TIME));
692
693 up(&ieee->scan_sem);
694 return;
695
696out:
697#ifdef ENABLE_DOT11D
698 if (IS_DOT11D_ENABLE(ieee))
699 DOT11D_ScanComplete(ieee);
700#endif
701 ieee->current_network.channel = last_channel;
702
703out1:
704 ieee->actscanning = false;
705 ieee->scan_watch_dog = 0;
706 ieee->scanning_continue = 0;
707 up(&ieee->scan_sem);
708}
709
710
711
712void rtllib_beacons_start(struct rtllib_device *ieee)
713{
714 unsigned long flags;
715 spin_lock_irqsave(&ieee->beacon_lock,flags);
716
717 ieee->beacon_txing = 1;
718 rtllib_send_beacon(ieee);
719
720 spin_unlock_irqrestore(&ieee->beacon_lock,flags);
721}
722
723void rtllib_beacons_stop(struct rtllib_device *ieee)
724{
725 unsigned long flags;
726
727 spin_lock_irqsave(&ieee->beacon_lock,flags);
728
729 ieee->beacon_txing = 0;
730 del_timer_sync(&ieee->beacon_timer);
731
732 spin_unlock_irqrestore(&ieee->beacon_lock,flags);
733
734}
735
736
737void rtllib_stop_send_beacons(struct rtllib_device *ieee)
738{
739 if (ieee->stop_send_beacons)
740 ieee->stop_send_beacons(ieee->dev);
741 if (ieee->softmac_features & IEEE_SOFTMAC_BEACONS)
742 rtllib_beacons_stop(ieee);
743}
744
745
746void rtllib_start_send_beacons(struct rtllib_device *ieee)
747{
748 if (ieee->start_send_beacons)
749 ieee->start_send_beacons(ieee->dev);
750 if (ieee->softmac_features & IEEE_SOFTMAC_BEACONS)
751 rtllib_beacons_start(ieee);
752}
753
754
755void rtllib_softmac_stop_scan(struct rtllib_device *ieee)
756{
757
758
759 down(&ieee->scan_sem);
760 ieee->scan_watch_dog = 0;
761 if (ieee->scanning_continue == 1){
762 ieee->scanning_continue = 0;
763 ieee->actscanning = 0;
764
765#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,40)
766#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,67)
767 cancel_delayed_work(&ieee->softmac_scan_wq);
768#endif
769#else
770 del_timer_sync(&ieee->scan_timer);
771#endif
772 }
773
774 up(&ieee->scan_sem);
775}
776
777void rtllib_stop_scan(struct rtllib_device *ieee)
778{
779 if (ieee->softmac_features & IEEE_SOFTMAC_SCAN){
780 rtllib_softmac_stop_scan(ieee);
781 }else{
782 if (ieee->rtllib_stop_hw_scan)
783 ieee->rtllib_stop_hw_scan(ieee->dev);
784 }
785}
786
787void rtllib_stop_scan_syncro(struct rtllib_device *ieee)
788{
789 if (ieee->softmac_features & IEEE_SOFTMAC_SCAN){
790 ieee->sync_scan_hurryup = 1;
791 }else{
792 if (ieee->rtllib_stop_hw_scan)
793 ieee->rtllib_stop_hw_scan(ieee->dev);
794 }
795}
796
797bool rtllib_act_scanning(struct rtllib_device *ieee, bool sync_scan)
798{
799 if (ieee->softmac_features & IEEE_SOFTMAC_SCAN){
800 if (sync_scan){
801 return ieee->be_scan_inprogress;
802 }else{
803 return (ieee->actscanning ||ieee->be_scan_inprogress);
804 }
805 }else{
806 return test_bit(STATUS_SCANNING, &ieee->status);
807 }
808}
809
810/* called with ieee->lock held */
811void rtllib_start_scan(struct rtllib_device *ieee)
812{
813 RT_TRACE(COMP_DBG, "===>%s()\n",__func__);
814 if (ieee->rtllib_ips_leave_wq != NULL)
815 ieee->rtllib_ips_leave_wq(ieee->dev);
816
817
818#ifdef ENABLE_DOT11D
819 if (IS_DOT11D_ENABLE(ieee) )
820 {
821 if (IS_COUNTRY_IE_VALID(ieee))
822 {
823 RESET_CIE_WATCHDOG(ieee);
824 }
825 }
826#endif
827 if (ieee->softmac_features & IEEE_SOFTMAC_SCAN) {
828 if (ieee->scanning_continue == 0) {
829 ieee->actscanning = true;
830 ieee->scanning_continue = 1;
831 queue_delayed_work_rsl(ieee->wq, &ieee->softmac_scan_wq, 0);
832 }
833 } else {
834 if (ieee->rtllib_start_hw_scan)
835 ieee->rtllib_start_hw_scan(ieee->dev);
836 }
837
838}
839
840#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,40)
841void rtllib_softmac_scan_cb(unsigned long _dev)
842{
843 unsigned long flags;
844 struct rtllib_device *ieee = (struct rtllib_device *)_dev;
845
846 spin_lock_irqsave(&ieee->lock, flags);
847 rtllib_start_scan(ieee);
848 spin_unlock_irqrestore(&ieee->lock, flags);
849}
850#endif
851
852/* called with wx_sem held */
853void rtllib_start_scan_syncro(struct rtllib_device *ieee, u8 is_mesh)
854{
855#ifdef ENABLE_DOT11D
856 if (IS_DOT11D_ENABLE(ieee) )
857 {
858 if (IS_COUNTRY_IE_VALID(ieee))
859 {
860 RESET_CIE_WATCHDOG(ieee);
861 }
862 }
863#endif
864 ieee->sync_scan_hurryup = 0;
865 if (ieee->softmac_features & IEEE_SOFTMAC_SCAN){
866 rtllib_softmac_scan_syncro(ieee, is_mesh);
867 }else{
868 if (ieee->rtllib_start_hw_scan)
869 ieee->rtllib_start_hw_scan(ieee->dev);
870 }
871
872}
873
874inline struct sk_buff *rtllib_authentication_req(struct rtllib_network *beacon,
875 struct rtllib_device *ieee, int challengelen,u8 * daddr)
876{
877 struct sk_buff *skb;
878 struct rtllib_authentication *auth;
879 int len = 0;
880 len = sizeof(struct rtllib_authentication) + challengelen + ieee->tx_headroom + 4;
881#ifdef USB_USE_ALIGNMENT
882 u32 Tmpaddr;
883 int alignment;
884 skb = dev_alloc_skb(len + USB_512B_ALIGNMENT_SIZE);
885#else
886 skb = dev_alloc_skb(len);
887#endif
888
889 if (!skb) return NULL;
890
891#ifdef USB_USE_ALIGNMENT
892 Tmpaddr = (u32)skb->data;
893 alignment = Tmpaddr & 0x1ff;
894 skb_reserve(skb,(USB_512B_ALIGNMENT_SIZE - alignment));
895#endif
896
897 skb_reserve(skb, ieee->tx_headroom);
898
899 auth = (struct rtllib_authentication *)
900 skb_put(skb, sizeof(struct rtllib_authentication));
901
902 auth->header.frame_ctl = RTLLIB_STYPE_AUTH;
903 if (challengelen) auth->header.frame_ctl |= RTLLIB_FCTL_WEP;
904
905 auth->header.duration_id = 0x013a;
906 memcpy(auth->header.addr1, beacon->bssid, ETH_ALEN);
907 memcpy(auth->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
908 memcpy(auth->header.addr3, beacon->bssid, ETH_ALEN);
909 if (ieee->auth_mode == 0)
910 auth->algorithm = WLAN_AUTH_OPEN;
911 else if (ieee->auth_mode == 1)
912 auth->algorithm = WLAN_AUTH_SHARED_KEY;
913 else if (ieee->auth_mode == 2)
914 auth->algorithm = WLAN_AUTH_OPEN;
915 auth->transaction = cpu_to_le16(ieee->associate_seq);
916 ieee->associate_seq++;
917
918 auth->status = cpu_to_le16(WLAN_STATUS_SUCCESS);
919
920 return skb;
921
922}
923
924void constructWMMIE(u8* wmmie, u8* wmm_len,u8 oui_subtype)
925{
926 u8 szQoSOUI[] ={221, 0, 0x00, 0x50, 0xf2, 0x02, 0, 1};
927
928 if (oui_subtype == OUI_SUBTYPE_QOS_CAPABI)
929 {
930 szQoSOUI[0] = 46;
931 szQoSOUI[1] = *wmm_len;
932 memcpy(wmmie,szQoSOUI,3);
933 *wmm_len = 3;
934 }
935 else
936 {
937 szQoSOUI[1] = *wmm_len + 6;
938 szQoSOUI[6] = oui_subtype;
939 memcpy(wmmie, szQoSOUI, 8);
940 *(wmmie+8) = 0;
941 *wmm_len = 9;
942 }
943}
944
945static struct sk_buff* rtllib_probe_resp(struct rtllib_device *ieee, u8 *dest)
946{
947 u8 *tag;
948 int beacon_size;
949 struct rtllib_probe_response *beacon_buf;
950 struct sk_buff *skb = NULL;
951 int encrypt;
952 int atim_len,erp_len;
953 struct rtllib_crypt_data* crypt;
954
955 char *ssid = ieee->current_network.ssid;
956 int ssid_len = ieee->current_network.ssid_len;
957 int rate_len = ieee->current_network.rates_len+2;
958 int rate_ex_len = ieee->current_network.rates_ex_len;
959 int wpa_ie_len = ieee->wpa_ie_len;
960 u8 erpinfo_content = 0;
961
962 u8* tmp_ht_cap_buf = NULL;
963 u8 tmp_ht_cap_len = 0;
964 u8* tmp_ht_info_buf = NULL;
965 u8 tmp_ht_info_len = 0;
966 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
967 u8* tmp_generic_ie_buf = NULL;
968 u8 tmp_generic_ie_len = 0;
969
970 if (rate_ex_len > 0)
971 rate_ex_len+=2;
972
973 if (ieee->current_network.capability & WLAN_CAPABILITY_IBSS)
974 atim_len = 4;
975 else
976 atim_len = 0;
977
978 if ((ieee->current_network.mode == IEEE_G)
979 ||( ieee->current_network.mode == IEEE_N_24G && ieee->pHTInfo->bCurSuppCCK)) {
980 erp_len = 3;
981 erpinfo_content = 0;
982 if (ieee->current_network.buseprotection)
983 erpinfo_content |= ERP_UseProtection;
984 }
985 else
986 erp_len = 0;
987
988 crypt = ieee->crypt[ieee->tx_keyidx];
989 encrypt = ieee->host_encrypt && crypt && crypt->ops &&
990 ((0 == strcmp(crypt->ops->name, "WEP") || wpa_ie_len));
991 if (ieee->pHTInfo->bCurrentHTSupport){
992 tmp_ht_cap_buf =(u8*) &(ieee->pHTInfo->SelfHTCap);
993 tmp_ht_cap_len = sizeof(ieee->pHTInfo->SelfHTCap);
994 tmp_ht_info_buf =(u8*) &(ieee->pHTInfo->SelfHTInfo);
995 tmp_ht_info_len = sizeof(ieee->pHTInfo->SelfHTInfo);
996 HTConstructCapabilityElement(ieee, tmp_ht_cap_buf, &tmp_ht_cap_len,encrypt, false);
997 HTConstructInfoElement(ieee,tmp_ht_info_buf,&tmp_ht_info_len, encrypt);
998
999
1000 if (pHTInfo->bRegRT2RTAggregation)
1001 {
1002 tmp_generic_ie_buf = ieee->pHTInfo->szRT2RTAggBuffer;
1003 tmp_generic_ie_len = sizeof(ieee->pHTInfo->szRT2RTAggBuffer);
1004 HTConstructRT2RTAggElement(ieee, tmp_generic_ie_buf, &tmp_generic_ie_len);
1005 }
1006 }
1007
1008 beacon_size = sizeof(struct rtllib_probe_response)+2+
1009 ssid_len
1010 +3
1011 +rate_len
1012 +rate_ex_len
1013 +atim_len
1014 +erp_len
1015 +wpa_ie_len
1016 +ieee->tx_headroom;
1017#ifdef USB_USE_ALIGNMENT
1018 u32 Tmpaddr=0;
1019 int alignment=0;
1020 skb = dev_alloc_skb(beacon_size + USB_512B_ALIGNMENT_SIZE);
1021#else
1022 skb = dev_alloc_skb(beacon_size);
1023#endif
1024 if (!skb)
1025 return NULL;
1026
1027#ifdef USB_USE_ALIGNMENT
1028 Tmpaddr = (u32)skb->data;
1029 alignment = Tmpaddr & 0x1ff;
1030 skb_reserve(skb,(USB_512B_ALIGNMENT_SIZE - alignment));
1031#endif
1032
1033 skb_reserve(skb, ieee->tx_headroom);
1034
1035 beacon_buf = (struct rtllib_probe_response*) skb_put(skb, (beacon_size - ieee->tx_headroom));
1036 memcpy (beacon_buf->header.addr1, dest,ETH_ALEN);
1037 memcpy (beacon_buf->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
1038 memcpy (beacon_buf->header.addr3, ieee->current_network.bssid, ETH_ALEN);
1039
1040 beacon_buf->header.duration_id = 0;
1041 beacon_buf->beacon_interval =
1042 cpu_to_le16(ieee->current_network.beacon_interval);
1043 beacon_buf->capability =
1044 cpu_to_le16(ieee->current_network.capability & WLAN_CAPABILITY_IBSS);
1045 beacon_buf->capability |=
1046 cpu_to_le16(ieee->current_network.capability & WLAN_CAPABILITY_SHORT_PREAMBLE);
1047
1048 if (ieee->short_slot && (ieee->current_network.capability & WLAN_CAPABILITY_SHORT_SLOT_TIME))
1049 cpu_to_le16((beacon_buf->capability |= WLAN_CAPABILITY_SHORT_SLOT_TIME));
1050
1051 crypt = ieee->crypt[ieee->tx_keyidx];
1052 if (encrypt)
1053 beacon_buf->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
1054
1055
1056 beacon_buf->header.frame_ctl = cpu_to_le16(RTLLIB_STYPE_PROBE_RESP);
1057 beacon_buf->info_element[0].id = MFIE_TYPE_SSID;
1058 beacon_buf->info_element[0].len = ssid_len;
1059
1060 tag = (u8*) beacon_buf->info_element[0].data;
1061
1062 memcpy(tag, ssid, ssid_len);
1063
1064 tag += ssid_len;
1065
1066 *(tag++) = MFIE_TYPE_RATES;
1067 *(tag++) = rate_len-2;
1068 memcpy(tag,ieee->current_network.rates,rate_len-2);
1069 tag+=rate_len-2;
1070
1071 *(tag++) = MFIE_TYPE_DS_SET;
1072 *(tag++) = 1;
1073 *(tag++) = ieee->current_network.channel;
1074
1075 if (atim_len){
1076 u16 val16;
1077 *(tag++) = MFIE_TYPE_IBSS_SET;
1078 *(tag++) = 2;
1079 val16 = cpu_to_le16(ieee->current_network.atim_window);
1080 memcpy((u8 *)tag, (u8 *)&val16, 2);
1081 tag+=2;
1082 }
1083
1084 if (erp_len){
1085 *(tag++) = MFIE_TYPE_ERP;
1086 *(tag++) = 1;
1087 *(tag++) = erpinfo_content;
1088 }
1089#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
1090 if (tmp_ht_cap_len){
1091 *(tag++) = MFIE_TYPE_HT_CAP;
1092 *(tag++) = tmp_ht_cap_len - 2;
1093 memcpy(tag, tmp_ht_cap_buf, tmp_ht_cap_len - 2);
1094 tag += tmp_ht_cap_len - 2;
1095 }
1096#endif
1097 if (rate_ex_len){
1098 *(tag++) = MFIE_TYPE_RATES_EX;
1099 *(tag++) = rate_ex_len-2;
1100 memcpy(tag,ieee->current_network.rates_ex,rate_ex_len-2);
1101 tag+=rate_ex_len-2;
1102 }
1103
1104#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
1105 if (tmp_ht_info_len){
1106 *(tag++) = MFIE_TYPE_HT_INFO;
1107 *(tag++) = tmp_ht_info_len - 2;
1108 memcpy(tag, tmp_ht_info_buf, tmp_ht_info_len -2);
1109 tag += tmp_ht_info_len - 2;
1110 }
1111#endif
1112
1113 if (wpa_ie_len)
1114 {
1115 if (ieee->iw_mode == IW_MODE_ADHOC)
1116 {
1117 memcpy(&ieee->wpa_ie[14], &ieee->wpa_ie[8], 4);
1118 }
1119 memcpy(tag, ieee->wpa_ie, ieee->wpa_ie_len);
1120 tag += ieee->wpa_ie_len;
1121 }
1122
1123#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
1124 if (tmp_generic_ie_len)
1125 {
1126 (*tag++) = 0xdd;
1127 (*tag++) = tmp_generic_ie_len - 2;
1128 memcpy(tag,tmp_generic_ie_buf,tmp_generic_ie_len -2);
1129 tag += tmp_generic_ie_len -2;
1130
1131 }
1132#endif
1133
1134#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
1135 if (wmm_len) {
1136 memcpy(tag,wmmie,wmm_len);
1137 tag += wmm_len;
1138 }
1139#endif
1140 return skb;
1141}
1142
1143struct sk_buff* rtllib_assoc_resp(struct rtllib_device *ieee, u8 *dest)
1144{
1145 struct sk_buff *skb;
1146 u8* tag;
1147
1148 struct rtllib_crypt_data* crypt;
1149 struct rtllib_assoc_response_frame *assoc;
1150 short encrypt;
1151
1152 unsigned int rate_len = rtllib_MFIE_rate_len(ieee);
1153 int len = sizeof(struct rtllib_assoc_response_frame) + rate_len + ieee->tx_headroom;
1154
1155#ifdef USB_USE_ALIGNMENT
1156 u32 Tmpaddr=0;
1157 int alignment=0;
1158 skb = dev_alloc_skb(len + USB_512B_ALIGNMENT_SIZE);
1159#else
1160 skb = dev_alloc_skb(len);
1161#endif
1162
1163 if (!skb)
1164 return NULL;
1165
1166#ifdef USB_USE_ALIGNMENT
1167 Tmpaddr = (u32)skb->data;
1168 alignment = Tmpaddr & 0x1ff;
1169 skb_reserve(skb,(USB_512B_ALIGNMENT_SIZE - alignment));
1170#endif
1171
1172 skb_reserve(skb, ieee->tx_headroom);
1173
1174 assoc = (struct rtllib_assoc_response_frame *)
1175 skb_put(skb,sizeof(struct rtllib_assoc_response_frame));
1176
1177 assoc->header.frame_ctl = cpu_to_le16(RTLLIB_STYPE_ASSOC_RESP);
1178 memcpy(assoc->header.addr1, dest,ETH_ALEN);
1179 memcpy(assoc->header.addr3, ieee->dev->dev_addr, ETH_ALEN);
1180 memcpy(assoc->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
1181 assoc->capability = cpu_to_le16(ieee->iw_mode == IW_MODE_MASTER ?
1182 WLAN_CAPABILITY_ESS : WLAN_CAPABILITY_IBSS);
1183
1184
1185 if (ieee->short_slot)
1186 assoc->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_SLOT_TIME);
1187
1188 if (ieee->host_encrypt)
1189 crypt = ieee->crypt[ieee->tx_keyidx];
1190 else
1191 crypt = NULL;
1192
1193 encrypt = ( crypt && crypt->ops);
1194
1195 if (encrypt)
1196 assoc->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
1197
1198 assoc->status = 0;
1199 assoc->aid = cpu_to_le16(ieee->assoc_id);
1200 if (ieee->assoc_id == 0x2007)
1201 ieee->assoc_id=0;
1202 else
1203 ieee->assoc_id++;
1204
1205 tag = (u8*) skb_put(skb, rate_len);
1206 rtllib_MFIE_Brate(ieee, &tag);
1207 rtllib_MFIE_Grate(ieee, &tag);
1208
1209 return skb;
1210}
1211
1212struct sk_buff* rtllib_auth_resp(struct rtllib_device *ieee,int status, u8 *dest)
1213{
1214 struct sk_buff *skb = NULL;
1215 struct rtllib_authentication *auth;
1216 int len = ieee->tx_headroom + sizeof(struct rtllib_authentication)+1;
1217#ifdef USB_USE_ALIGNMENT
1218 u32 Tmpaddr=0;
1219 int alignment=0;
1220 skb = dev_alloc_skb(len + USB_512B_ALIGNMENT_SIZE);
1221#else
1222 skb = dev_alloc_skb(len);
1223#endif
1224 if (!skb)
1225 return NULL;
1226
1227 skb->len = sizeof(struct rtllib_authentication);
1228
1229#ifdef USB_USE_ALIGNMENT
1230 Tmpaddr = (u32)skb->data;
1231 alignment = Tmpaddr & 0x1ff;
1232 skb_reserve(skb,(USB_512B_ALIGNMENT_SIZE - alignment));
1233#endif
1234
1235 skb_reserve(skb, ieee->tx_headroom);
1236
1237 auth = (struct rtllib_authentication *)
1238 skb_put(skb, sizeof(struct rtllib_authentication));
1239
1240 auth->status = cpu_to_le16(status);
1241 auth->transaction = cpu_to_le16(2);
1242 auth->algorithm = cpu_to_le16(WLAN_AUTH_OPEN);
1243
1244 memcpy(auth->header.addr3, ieee->dev->dev_addr, ETH_ALEN);
1245 memcpy(auth->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
1246 memcpy(auth->header.addr1, dest, ETH_ALEN);
1247 auth->header.frame_ctl = cpu_to_le16(RTLLIB_STYPE_AUTH);
1248 return skb;
1249
1250
1251}
1252
1253struct sk_buff* rtllib_null_func(struct rtllib_device *ieee,short pwr)
1254{
1255 struct sk_buff *skb;
1256 struct rtllib_hdr_3addr* hdr;
1257
1258#ifdef USB_USE_ALIGNMENT
1259 u32 Tmpaddr=0;
1260 int alignment=0;
1261 skb = dev_alloc_skb(sizeof(struct rtllib_hdr_3addr) + ieee->tx_headroom + USB_512B_ALIGNMENT_SIZE);
1262#else
1263 skb = dev_alloc_skb(sizeof(struct rtllib_hdr_3addr)+ieee->tx_headroom);
1264#endif
1265 if (!skb)
1266 return NULL;
1267
1268#ifdef USB_USE_ALIGNMENT
1269 Tmpaddr = (u32)skb->data;
1270 alignment = Tmpaddr & 0x1ff;
1271 skb_reserve(skb,(USB_512B_ALIGNMENT_SIZE - alignment));
1272#endif
1273 skb_reserve(skb, ieee->tx_headroom);
1274
1275 hdr = (struct rtllib_hdr_3addr*)skb_put(skb,sizeof(struct rtllib_hdr_3addr));
1276
1277 memcpy(hdr->addr1, ieee->current_network.bssid, ETH_ALEN);
1278 memcpy(hdr->addr2, ieee->dev->dev_addr, ETH_ALEN);
1279 memcpy(hdr->addr3, ieee->current_network.bssid, ETH_ALEN);
1280
1281 hdr->frame_ctl = cpu_to_le16(RTLLIB_FTYPE_DATA |
1282 RTLLIB_STYPE_NULLFUNC | RTLLIB_FCTL_TODS |
1283 (pwr ? RTLLIB_FCTL_PM:0));
1284
1285 return skb;
1286
1287
1288}
1289
1290struct sk_buff* rtllib_pspoll_func(struct rtllib_device *ieee)
1291{
1292 struct sk_buff *skb;
1293 struct rtllib_pspoll_hdr* hdr;
1294
1295#ifdef USB_USE_ALIGNMENT
1296 u32 Tmpaddr=0;
1297 int alignment=0;
1298 skb = dev_alloc_skb(sizeof(struct rtllib_pspoll_hdr) + ieee->tx_headroom + USB_512B_ALIGNMENT_SIZE);
1299#else
1300 skb = dev_alloc_skb(sizeof(struct rtllib_pspoll_hdr)+ieee->tx_headroom);
1301#endif
1302 if (!skb)
1303 return NULL;
1304
1305#ifdef USB_USE_ALIGNMENT
1306 Tmpaddr = (u32)skb->data;
1307 alignment = Tmpaddr & 0x1ff;
1308 skb_reserve(skb,(USB_512B_ALIGNMENT_SIZE - alignment));
1309#endif
1310 skb_reserve(skb, ieee->tx_headroom);
1311
1312 hdr = (struct rtllib_pspoll_hdr*)skb_put(skb,sizeof(struct rtllib_pspoll_hdr));
1313
1314 memcpy(hdr->bssid, ieee->current_network.bssid, ETH_ALEN);
1315 memcpy(hdr->ta, ieee->dev->dev_addr, ETH_ALEN);
1316
1317 hdr->aid = cpu_to_le16(ieee->assoc_id | 0xc000);
1318 hdr->frame_ctl = cpu_to_le16(RTLLIB_FTYPE_CTL |RTLLIB_STYPE_PSPOLL | RTLLIB_FCTL_PM);
1319
1320 return skb;
1321
1322}
1323
1324void rtllib_resp_to_assoc_rq(struct rtllib_device *ieee, u8* dest)
1325{
1326 struct sk_buff *buf = rtllib_assoc_resp(ieee, dest);
1327
1328 if (buf)
1329 softmac_mgmt_xmit(buf, ieee);
1330}
1331
1332
1333void rtllib_resp_to_auth(struct rtllib_device *ieee, int s, u8* dest)
1334{
1335 struct sk_buff *buf = rtllib_auth_resp(ieee, s, dest);
1336
1337 if (buf)
1338 softmac_mgmt_xmit(buf, ieee);
1339}
1340
1341
1342void rtllib_resp_to_probe(struct rtllib_device *ieee, u8 *dest)
1343{
1344
1345 struct sk_buff *buf = rtllib_probe_resp(ieee, dest);
1346 if (buf)
1347 softmac_mgmt_xmit(buf, ieee);
1348}
1349
1350
1351inline int SecIsInPMKIDList(struct rtllib_device *ieee, u8 *bssid)
1352{
1353 int i = 0;
1354
1355 do
1356 {
1357 if ((ieee->PMKIDList[i].bUsed) && (memcmp(ieee->PMKIDList[i].Bssid, bssid, ETH_ALEN) == 0))
1358 {
1359 break;
1360 }
1361 else
1362 {
1363 i++;
1364 }
1365 } while (i < NUM_PMKID_CACHE);
1366
1367 if (i == NUM_PMKID_CACHE)
1368 {
1369 i = -1;
1370 }
1371 else
1372 {
1373 }
1374
1375 return (i);
1376
1377}
1378
1379
1380inline struct sk_buff *rtllib_association_req(struct rtllib_network *beacon,struct rtllib_device *ieee)
1381{
1382 struct sk_buff *skb;
1383
1384 struct rtllib_assoc_request_frame *hdr;
1385 u8 *tag, *ies;
1386 int i;
1387 u8* ht_cap_buf = NULL;
1388 u8 ht_cap_len=0;
1389 u8* realtek_ie_buf=NULL;
1390 u8 realtek_ie_len=0;
1391 int wpa_ie_len= ieee->wpa_ie_len;
1392 int wps_ie_len = ieee->wps_ie_len;
1393 unsigned int ckip_ie_len=0;
1394 unsigned int ccxrm_ie_len=0;
1395 unsigned int cxvernum_ie_len=0;
1396 struct rtllib_crypt_data* crypt;
1397 int encrypt;
1398 int PMKCacheIdx;
1399
1400 unsigned int rate_len = (beacon->rates_len?(beacon->rates_len+2):0) + (beacon->rates_ex_len?(beacon->rates_ex_len)+2:0);
1401
1402 unsigned int wmm_info_len = beacon->qos_data.supported?9:0;
1403 unsigned int turbo_info_len = beacon->Turbo_Enable?9:0;
1404
1405 int len = 0;
1406 crypt = ieee->crypt[ieee->tx_keyidx];
1407 if (crypt != NULL) {
1408 encrypt = ieee->host_encrypt && crypt && crypt->ops && ((0 == strcmp(crypt->ops->name,"WEP") || wpa_ie_len));
1409 } else {
1410 encrypt = 0;
1411 }
1412
1413#ifdef ENABLE_TKIP11N
1414 if (ieee->bForcedBgMode == true)
1415#else
1416 if ((ieee->rtllib_ap_sec_type && (ieee->rtllib_ap_sec_type(ieee)&SEC_ALG_TKIP)) ||(ieee->bForcedBgMode == true))
1417#endif
1418 {
1419 ieee->pHTInfo->bEnableHT = 0;
1420 ieee->mode = WIRELESS_MODE_G;
1421 }
1422
1423 if (ieee->pHTInfo->bCurrentHTSupport&&ieee->pHTInfo->bEnableHT)
1424 {
1425 ht_cap_buf = (u8*)&(ieee->pHTInfo->SelfHTCap);
1426 ht_cap_len = sizeof(ieee->pHTInfo->SelfHTCap);
1427 HTConstructCapabilityElement(ieee, ht_cap_buf, &ht_cap_len, encrypt, true);
1428 if (ieee->pHTInfo->bCurrentRT2RTAggregation) {
1429 realtek_ie_buf = ieee->pHTInfo->szRT2RTAggBuffer;
1430 realtek_ie_len = sizeof( ieee->pHTInfo->szRT2RTAggBuffer);
1431 HTConstructRT2RTAggElement(ieee, realtek_ie_buf, &realtek_ie_len);
1432
1433 }
1434 }
1435
1436 if (beacon->bCkipSupported)
1437 {
1438 ckip_ie_len = 30+2;
1439 }
1440 if (beacon->bCcxRmEnable)
1441 {
1442 ccxrm_ie_len = 6+2;
1443 }
1444 if ( beacon->BssCcxVerNumber >= 2 )
1445 {
1446 cxvernum_ie_len = 5+2;
1447 }
1448
1449 PMKCacheIdx = SecIsInPMKIDList(ieee, ieee->current_network.bssid);
1450 if (PMKCacheIdx >= 0)
1451 {
1452 wpa_ie_len += 18;
1453 printk("[PMK cache]: WPA2 IE length: %x\n", wpa_ie_len);
1454 }
1455 len = sizeof(struct rtllib_assoc_request_frame)+ 2
1456 + beacon->ssid_len
1457 + rate_len
1458 + wpa_ie_len
1459 + wps_ie_len
1460 + wmm_info_len
1461 + turbo_info_len
1462 + ht_cap_len
1463 + realtek_ie_len
1464 + ckip_ie_len
1465 + ccxrm_ie_len
1466 + cxvernum_ie_len
1467 + ieee->tx_headroom;
1468
1469#ifdef USB_USE_ALIGNMENT
1470 u32 Tmpaddr=0;
1471 int alignment=0;
1472 skb = dev_alloc_skb(len + USB_512B_ALIGNMENT_SIZE);
1473#else
1474 skb = dev_alloc_skb(len);
1475#endif
1476
1477 if (!skb)
1478 return NULL;
1479
1480#ifdef USB_USE_ALIGNMENT
1481 Tmpaddr = (u32)skb->data;
1482 alignment = Tmpaddr & 0x1ff;
1483 skb_reserve(skb,(USB_512B_ALIGNMENT_SIZE - alignment));
1484#endif
1485
1486 skb_reserve(skb, ieee->tx_headroom);
1487
1488 hdr = (struct rtllib_assoc_request_frame *)
1489 skb_put(skb, sizeof(struct rtllib_assoc_request_frame)+2);
1490
1491
1492 hdr->header.frame_ctl = RTLLIB_STYPE_ASSOC_REQ;
1493 hdr->header.duration_id= 37;
1494 memcpy(hdr->header.addr1, beacon->bssid, ETH_ALEN);
1495 memcpy(hdr->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
1496 memcpy(hdr->header.addr3, beacon->bssid, ETH_ALEN);
1497
1498 memcpy(ieee->ap_mac_addr, beacon->bssid, ETH_ALEN);
1499
1500 hdr->capability = cpu_to_le16(WLAN_CAPABILITY_ESS);
1501 if (beacon->capability & WLAN_CAPABILITY_PRIVACY )
1502 hdr->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
1503
1504 if (beacon->capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
1505 hdr->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_PREAMBLE);
1506
1507 if (ieee->short_slot && (beacon->capability&WLAN_CAPABILITY_SHORT_SLOT_TIME))
1508 hdr->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_SLOT_TIME);
1509
1510
1511 hdr->listen_interval = beacon->listen_interval;
1512
1513 hdr->info_element[0].id = MFIE_TYPE_SSID;
1514
1515 hdr->info_element[0].len = beacon->ssid_len;
1516 tag = skb_put(skb, beacon->ssid_len);
1517 memcpy(tag, beacon->ssid, beacon->ssid_len);
1518
1519 tag = skb_put(skb, rate_len);
1520
1521 if (beacon->rates_len){
1522 *tag++ = MFIE_TYPE_RATES;
1523 *tag++ = beacon->rates_len;
1524 for (i=0;i<beacon->rates_len;i++){
1525 *tag++ = beacon->rates[i];
1526 }
1527 }
1528
1529 if (beacon->rates_ex_len){
1530 *tag++ = MFIE_TYPE_RATES_EX;
1531 *tag++ = beacon->rates_ex_len;
1532 for (i=0;i<beacon->rates_ex_len;i++){
1533 *tag++ = beacon->rates_ex[i];
1534 }
1535 }
1536
1537 if ( beacon->bCkipSupported )
1538 {
1539 static u8 AironetIeOui[] = {0x00, 0x01, 0x66};
1540 u8 CcxAironetBuf[30];
1541 OCTET_STRING osCcxAironetIE;
1542
1543 memset(CcxAironetBuf, 0,30);
1544 osCcxAironetIE.Octet = CcxAironetBuf;
1545 osCcxAironetIE.Length = sizeof(CcxAironetBuf);
1546 memcpy(osCcxAironetIE.Octet, AironetIeOui, sizeof(AironetIeOui));
1547
1548 osCcxAironetIE.Octet[IE_CISCO_FLAG_POSITION] |= (SUPPORT_CKIP_PK|SUPPORT_CKIP_MIC) ;
1549 tag = skb_put(skb, ckip_ie_len);
1550 *tag++ = MFIE_TYPE_AIRONET;
1551 *tag++ = osCcxAironetIE.Length;
1552 memcpy(tag,osCcxAironetIE.Octet,osCcxAironetIE.Length);
1553 tag += osCcxAironetIE.Length;
1554 }
1555
1556 if (beacon->bCcxRmEnable)
1557 {
1558 static u8 CcxRmCapBuf[] = {0x00, 0x40, 0x96, 0x01, 0x01, 0x00};
1559 OCTET_STRING osCcxRmCap;
1560
1561 osCcxRmCap.Octet = CcxRmCapBuf;
1562 osCcxRmCap.Length = sizeof(CcxRmCapBuf);
1563 tag = skb_put(skb,ccxrm_ie_len);
1564 *tag++ = MFIE_TYPE_GENERIC;
1565 *tag++ = osCcxRmCap.Length;
1566 memcpy(tag,osCcxRmCap.Octet,osCcxRmCap.Length);
1567 tag += osCcxRmCap.Length;
1568 }
1569
1570 if ( beacon->BssCcxVerNumber >= 2 )
1571 {
1572 u8 CcxVerNumBuf[] = {0x00, 0x40, 0x96, 0x03, 0x00};
1573 OCTET_STRING osCcxVerNum;
1574 CcxVerNumBuf[4] = beacon->BssCcxVerNumber;
1575 osCcxVerNum.Octet = CcxVerNumBuf;
1576 osCcxVerNum.Length = sizeof(CcxVerNumBuf);
1577 tag = skb_put(skb,cxvernum_ie_len);
1578 *tag++ = MFIE_TYPE_GENERIC;
1579 *tag++ = osCcxVerNum.Length;
1580 memcpy(tag,osCcxVerNum.Octet,osCcxVerNum.Length);
1581 tag += osCcxVerNum.Length;
1582 }
1583 if (ieee->pHTInfo->bCurrentHTSupport&&ieee->pHTInfo->bEnableHT){
1584 if (ieee->pHTInfo->ePeerHTSpecVer != HT_SPEC_VER_EWC)
1585 {
1586 tag = skb_put(skb, ht_cap_len);
1587 *tag++ = MFIE_TYPE_HT_CAP;
1588 *tag++ = ht_cap_len - 2;
1589 memcpy(tag, ht_cap_buf,ht_cap_len -2);
1590 tag += ht_cap_len -2;
1591 }
1592 }
1593
1594
1595 if (wpa_ie_len){
1596 tag = skb_put(skb, ieee->wpa_ie_len);
1597 memcpy(tag, ieee->wpa_ie, ieee->wpa_ie_len);
1598
1599 if (PMKCacheIdx >= 0)
1600 {
1601 tag = skb_put(skb, 18);
1602 *tag = 1;
1603 *(tag + 1) = 0;
1604 memcpy((tag + 2), &ieee->PMKIDList[PMKCacheIdx].PMKID, 16);
1605 }
1606 }
1607 if (wmm_info_len) {
1608 tag = skb_put(skb,wmm_info_len);
1609 rtllib_WMM_Info(ieee, &tag);
1610 }
1611
1612 if (wps_ie_len && ieee->wps_ie) {
1613 tag = skb_put(skb, wps_ie_len);
1614 memcpy(tag, ieee->wps_ie, wps_ie_len);
1615 }
1616
1617 tag = skb_put(skb,turbo_info_len);
1618 if (turbo_info_len)
1619 rtllib_TURBO_Info(ieee, &tag);
1620
1621 if (ieee->pHTInfo->bCurrentHTSupport&&ieee->pHTInfo->bEnableHT){
1622 if (ieee->pHTInfo->ePeerHTSpecVer == HT_SPEC_VER_EWC)
1623 {
1624 tag = skb_put(skb, ht_cap_len);
1625 *tag++ = MFIE_TYPE_GENERIC;
1626 *tag++ = ht_cap_len - 2;
1627 memcpy(tag, ht_cap_buf,ht_cap_len - 2);
1628 tag += ht_cap_len -2;
1629 }
1630
1631 if (ieee->pHTInfo->bCurrentRT2RTAggregation){
1632 tag = skb_put(skb, realtek_ie_len);
1633 *tag++ = MFIE_TYPE_GENERIC;
1634 *tag++ = realtek_ie_len - 2;
1635 memcpy(tag, realtek_ie_buf,realtek_ie_len -2 );
1636 }
1637 }
1638
1639 if (ieee->assocreq_ies){
1640 kfree(ieee->assocreq_ies);
1641 ieee->assocreq_ies = NULL;
1642 }
1643 ies = &(hdr->info_element[0].id);
1644 ieee->assocreq_ies_len = (skb->data + skb->len) - ies;
1645 ieee->assocreq_ies = kmalloc(ieee->assocreq_ies_len, GFP_ATOMIC);
1646 if (ieee->assocreq_ies)
1647 memcpy(ieee->assocreq_ies, ies, ieee->assocreq_ies_len);
1648 else{
1649 printk("%s()Warning: can't alloc memory for assocreq_ies\n", __func__);
1650 ieee->assocreq_ies_len = 0;
1651 }
1652
1653 return skb;
1654}
1655
1656void rtllib_associate_abort(struct rtllib_device *ieee)
1657{
1658
1659 unsigned long flags;
1660 spin_lock_irqsave(&ieee->lock, flags);
1661
1662 ieee->associate_seq++;
1663
1664 /* don't scan, and avoid to have the RX path possibily
1665 * try again to associate. Even do not react to AUTH or
1666 * ASSOC response. Just wait for the retry wq to be scheduled.
1667 * Here we will check if there are good nets to associate
1668 * with, so we retry or just get back to NO_LINK and scanning
1669 */
1670 if (ieee->state == RTLLIB_ASSOCIATING_AUTHENTICATING){
1671 RTLLIB_DEBUG_MGMT("Authentication failed\n");
1672 ieee->softmac_stats.no_auth_rs++;
1673 }else{
1674 RTLLIB_DEBUG_MGMT("Association failed\n");
1675 ieee->softmac_stats.no_ass_rs++;
1676 }
1677
1678 ieee->state = RTLLIB_ASSOCIATING_RETRY;
1679
1680 queue_delayed_work_rsl(ieee->wq, &ieee->associate_retry_wq, \
1681 RTLLIB_SOFTMAC_ASSOC_RETRY_TIME);
1682
1683 spin_unlock_irqrestore(&ieee->lock, flags);
1684}
1685
1686void rtllib_associate_abort_cb(unsigned long dev)
1687{
1688 rtllib_associate_abort((struct rtllib_device *) dev);
1689}
1690
1691void rtllib_associate_step1(struct rtllib_device *ieee,u8 * daddr)
1692{
1693 struct rtllib_network *beacon = &ieee->current_network;
1694 struct sk_buff *skb;
1695
1696 RTLLIB_DEBUG_MGMT("Stopping scan\n");
1697
1698 ieee->softmac_stats.tx_auth_rq++;
1699
1700 skb=rtllib_authentication_req(beacon, ieee, 0,daddr);
1701
1702 if (!skb)
1703 rtllib_associate_abort(ieee);
1704 else{
1705 ieee->state = RTLLIB_ASSOCIATING_AUTHENTICATING ;
1706 RTLLIB_DEBUG_MGMT("Sending authentication request\n");
1707 softmac_mgmt_xmit(skb, ieee);
1708 if (!timer_pending(&ieee->associate_timer)){
1709 ieee->associate_timer.expires = jiffies + (HZ / 2);
1710 add_timer(&ieee->associate_timer);
1711 }
1712 }
1713}
1714
1715void rtllib_auth_challenge(struct rtllib_device *ieee, u8 *challenge, int chlen)
1716{
1717 u8 *c;
1718 struct sk_buff *skb;
1719 struct rtllib_network *beacon = &ieee->current_network;
1720
1721 ieee->associate_seq++;
1722 ieee->softmac_stats.tx_auth_rq++;
1723
1724 skb = rtllib_authentication_req(beacon, ieee, chlen+2,beacon->bssid);
1725
1726 if (!skb)
1727 rtllib_associate_abort(ieee);
1728 else{
1729 c = skb_put(skb, chlen+2);
1730 *(c++) = MFIE_TYPE_CHALLENGE;
1731 *(c++) = chlen;
1732 memcpy(c, challenge, chlen);
1733
1734 RTLLIB_DEBUG_MGMT("Sending authentication challenge response\n");
1735
1736 rtllib_encrypt_fragment(ieee, skb, sizeof(struct rtllib_hdr_3addr ));
1737
1738 softmac_mgmt_xmit(skb, ieee);
1739 mod_timer(&ieee->associate_timer, jiffies + (HZ/2));
1740 }
1741 kfree(challenge);
1742}
1743
1744void rtllib_associate_step2(struct rtllib_device *ieee)
1745{
1746 struct sk_buff* skb;
1747 struct rtllib_network *beacon = &ieee->current_network;
1748
1749 del_timer_sync(&ieee->associate_timer);
1750
1751 RTLLIB_DEBUG_MGMT("Sending association request\n");
1752
1753 ieee->softmac_stats.tx_ass_rq++;
1754 skb=rtllib_association_req(beacon, ieee);
1755 if (!skb)
1756 rtllib_associate_abort(ieee);
1757 else{
1758 softmac_mgmt_xmit(skb, ieee);
1759 mod_timer(&ieee->associate_timer, jiffies + (HZ/2));
1760 }
1761}
1762
1763#define CANCELLED 2
1764void rtllib_associate_complete_wq(void *data)
1765{
1766 struct rtllib_device *ieee = (struct rtllib_device *)container_of_work_rsl(data, struct rtllib_device, associate_complete_wq);
1767 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(ieee->PowerSaveControl));
1768 printk(KERN_INFO "Associated successfully\n");
1769 if (ieee->is_silent_reset == 0){
1770 printk("normal associate\n");
1771 notify_wx_assoc_event(ieee);
1772 }
1773
1774 netif_carrier_on(ieee->dev);
1775 ieee->is_roaming = false;
1776 if (rtllib_is_54g(&ieee->current_network) &&
1777 (ieee->modulation & RTLLIB_OFDM_MODULATION)){
1778
1779 ieee->rate = 108;
1780 printk(KERN_INFO"Using G rates:%d\n", ieee->rate);
1781 }else{
1782 ieee->rate = 22;
1783 ieee->SetWirelessMode(ieee->dev, IEEE_B);
1784 printk(KERN_INFO"Using B rates:%d\n", ieee->rate);
1785 }
1786 if (ieee->pHTInfo->bCurrentHTSupport&&ieee->pHTInfo->bEnableHT)
1787 {
1788 printk("Successfully associated, ht enabled\n");
1789 HTOnAssocRsp(ieee);
1790 } else {
1791 printk("Successfully associated, ht not enabled(%d, %d)\n",
1792 ieee->pHTInfo->bCurrentHTSupport, ieee->pHTInfo->bEnableHT);
1793 memset(ieee->dot11HTOperationalRateSet, 0, 16);
1794 }
1795 ieee->LinkDetectInfo.SlotNum = 2 * (1 + ieee->current_network.beacon_interval/500);
1796 if (ieee->LinkDetectInfo.NumRecvBcnInPeriod==0||ieee->LinkDetectInfo.NumRecvDataInPeriod==0 )
1797 {
1798 ieee->LinkDetectInfo.NumRecvBcnInPeriod = 1;
1799 ieee->LinkDetectInfo.NumRecvDataInPeriod= 1;
1800 }
1801 pPSC->LpsIdleCount = 0;
1802 ieee->link_change(ieee->dev);
1803
1804 if (ieee->is_silent_reset == 1) {
1805 printk("silent reset associate\n");
1806 ieee->is_silent_reset = 0;
1807 }
1808
1809 if (ieee->data_hard_resume)
1810 ieee->data_hard_resume(ieee->dev);
1811
1812#ifdef RTK_DMP_PLATFORM
1813 kobject_hotplug(&ieee->dev->class_dev.kobj, KOBJ_LINKUP);
1814#endif
1815}
1816
1817static void rtllib_sta_send_associnfo(struct rtllib_device *ieee)
1818{
1819 char *buf;
1820 size_t len;
1821 int i;
1822 union iwreq_data wrqu;
1823
1824 return;
1825
1826
1827 buf = kmalloc(50 + 2 * (ieee->assocreq_ies_len + ieee->assocresp_ies_len), GFP_ATOMIC);
1828 if (!buf)
1829 return;
1830
1831 len = sprintf(buf, "ASSOCINFO(");
1832 if (ieee->assocreq_ies) {
1833 len += sprintf(buf + len, "ReqIEs=");
1834 for (i = 0; i < ieee->assocreq_ies_len; i++) {
1835 len += sprintf(buf + len, "%02x", ieee->assocreq_ies[i]);
1836 }
1837 }
1838 if (ieee->assocresp_ies) {
1839 if (ieee->assocreq_ies)
1840 len += sprintf(buf + len, " ");
1841 len += sprintf(buf + len, "RespIEs=");
1842 for (i = 0; i < ieee->assocresp_ies_len; i++) {
1843 len += sprintf(buf + len, "%02x", ieee->assocresp_ies[i]);
1844 }
1845 }
1846 len += sprintf(buf + len, ")");
1847
1848 if (len > IW_CUSTOM_MAX) {
1849 len = sprintf(buf, "ASSOCRESPIE=");
1850 for (i = 0; i < ieee->assocresp_ies_len; i++) {
1851 len += sprintf(buf + len, "%02x", ieee->assocresp_ies[i]);
1852 }
1853 }
1854
1855 if (len <= IW_CUSTOM_MAX) {
1856 memset(&wrqu, 0, sizeof(wrqu));
1857 wrqu.data.length = len;
1858 wireless_send_event(ieee->dev, IWEVCUSTOM, &wrqu, buf);
1859 }
1860
1861 kfree(buf);
1862}
1863
1864void rtllib_associate_complete(struct rtllib_device *ieee)
1865{
1866 del_timer_sync(&ieee->associate_timer);
1867
1868 ieee->state = RTLLIB_LINKED;
1869 rtllib_sta_send_associnfo(ieee);
1870
1871 queue_work_rsl(ieee->wq, &ieee->associate_complete_wq);
1872}
1873
1874void rtllib_associate_procedure_wq(void *data)
1875{
1876 struct rtllib_device *ieee = container_of_dwork_rsl(data, struct rtllib_device, associate_procedure_wq);
1877 rtllib_stop_scan_syncro(ieee);
1878 if (ieee->rtllib_ips_leave != NULL)
1879 ieee->rtllib_ips_leave(ieee->dev);
1880 down(&ieee->wx_sem);
1881
1882 if (ieee->data_hard_stop)
1883 ieee->data_hard_stop(ieee->dev);
1884
1885 rtllib_stop_scan(ieee);
1886 RT_TRACE(COMP_DBG, "===>%s(), chan:%d\n", __func__, ieee->current_network.channel);
1887 HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, HT_EXTCHNL_OFFSET_NO_EXT);
1888 if (ieee->eRFPowerState == eRfOff)
1889 {
1890 RT_TRACE(COMP_DBG, "=============>%s():Rf state is eRfOff, schedule ipsleave wq again,return\n",__func__);
1891 if (ieee->rtllib_ips_leave_wq != NULL)
1892 ieee->rtllib_ips_leave_wq(ieee->dev);
1893 up(&ieee->wx_sem);
1894 return;
1895 }
1896 ieee->associate_seq = 1;
1897
1898 rtllib_associate_step1(ieee, ieee->current_network.bssid);
1899
1900 up(&ieee->wx_sem);
1901}
1902
1903inline void rtllib_softmac_new_net(struct rtllib_device *ieee, struct rtllib_network *net)
1904{
1905 u8 tmp_ssid[IW_ESSID_MAX_SIZE+1];
1906 int tmp_ssid_len = 0;
1907
1908 short apset,ssidset,ssidbroad,apmatch,ssidmatch;
1909
1910 /* we are interested in new new only if we are not associated
1911 * and we are not associating / authenticating
1912 */
1913 if (ieee->state != RTLLIB_NOLINK)
1914 return;
1915
1916 if ((ieee->iw_mode == IW_MODE_INFRA) && !(net->capability & WLAN_CAPABILITY_ESS))
1917 return;
1918
1919 if ((ieee->iw_mode == IW_MODE_ADHOC) && !(net->capability & WLAN_CAPABILITY_IBSS))
1920 return;
1921
1922 if ((ieee->iw_mode == IW_MODE_ADHOC) && (net->channel > ieee->ibss_maxjoin_chal)) {
1923 return;
1924 }
1925 if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC)
1926 {
1927 /* if the user specified the AP MAC, we need also the essid
1928 * This could be obtained by beacons or, if the network does not
1929 * broadcast it, it can be put manually.
1930 */
1931 apset = ieee->wap_set;
1932 ssidset = ieee->ssid_set;
1933 ssidbroad = !(net->ssid_len == 0 || net->ssid[0]== '\0');
1934 apmatch = (memcmp(ieee->current_network.bssid, net->bssid, ETH_ALEN)==0);
1935 if (!ssidbroad){
1936 ssidmatch = (ieee->current_network.ssid_len == net->hidden_ssid_len)&&\
1937 (!strncmp(ieee->current_network.ssid, net->hidden_ssid, net->hidden_ssid_len));
1938 if (net->hidden_ssid_len > 0)
1939 {
1940 strncpy(net->ssid, net->hidden_ssid, net->hidden_ssid_len);
1941 net->ssid_len = net->hidden_ssid_len;
1942 ssidbroad = 1;
1943 }
1944 }
1945 else
1946 ssidmatch = (ieee->current_network.ssid_len == net->ssid_len)&&\
1947 (!strncmp(ieee->current_network.ssid, net->ssid, net->ssid_len));
1948
1949 if ( /* if the user set the AP check if match.
1950 * if the network does not broadcast essid we check the user supplyed ANY essid
1951 * if the network does broadcast and the user does not set essid it is OK
1952 * if the network does broadcast and the user did set essid chech if essid match
1953 */
1954 ( apset && apmatch &&
1955 ((ssidset && ssidbroad && ssidmatch) || (ssidbroad && !ssidset) || (!ssidbroad && ssidset)) )
1956 /* if the ap is not set, check that the user set the bssid
1957 * and the network does bradcast and that those two bssid matches
1958 */
1959 || (!apset && ssidset && ssidbroad && ssidmatch) || (ieee->is_roaming && ssidset && ssidbroad && ssidmatch)
1960 ){
1961 /* if the essid is hidden replace it with the
1962 * essid provided by the user.
1963 */
1964 if (!ssidbroad){
1965 strncpy(tmp_ssid, ieee->current_network.ssid, IW_ESSID_MAX_SIZE);
1966 tmp_ssid_len = ieee->current_network.ssid_len;
1967 }
1968 memcpy(&ieee->current_network, net, sizeof(struct rtllib_network));
1969 if (!ssidbroad){
1970 strncpy(ieee->current_network.ssid, tmp_ssid, IW_ESSID_MAX_SIZE);
1971 ieee->current_network.ssid_len = tmp_ssid_len;
1972 }
1973 printk(KERN_INFO"Linking with %s,channel:%d, qos:%d, myHT:%d, networkHT:%d, mode:%x cur_net.flags:0x%x\n",ieee->current_network.ssid,ieee->current_network.channel, ieee->current_network.qos_data.supported, ieee->pHTInfo->bEnableHT, ieee->current_network.bssht.bdSupportHT, ieee->current_network.mode, ieee->current_network.flags);
1974
1975 if ((rtllib_act_scanning(ieee, false)) && !(ieee->softmac_features & IEEE_SOFTMAC_SCAN)){
1976 rtllib_stop_scan_syncro(ieee);
1977 }
1978
1979 ieee->hwscan_ch_bk = ieee->current_network.channel;
1980 HTResetIOTSetting(ieee->pHTInfo);
1981 ieee->wmm_acm = 0;
1982 if (ieee->iw_mode == IW_MODE_INFRA) {
1983 /* Join the network for the first time */
1984 ieee->AsocRetryCount = 0;
1985 if ((ieee->current_network.qos_data.supported == 1) &&
1986 ieee->current_network.bssht.bdSupportHT)
1987 HTResetSelfAndSavePeerSetting(ieee, &(ieee->current_network));
1988 else
1989 ieee->pHTInfo->bCurrentHTSupport = false;
1990
1991 ieee->state = RTLLIB_ASSOCIATING;
1992 if (ieee->LedControlHandler != NULL)
1993 ieee->LedControlHandler(ieee->dev, LED_CTL_START_TO_LINK);
1994 queue_delayed_work_rsl(ieee->wq, &ieee->associate_procedure_wq, 0);
1995 } else {
1996 if (rtllib_is_54g(&ieee->current_network) &&
1997 (ieee->modulation & RTLLIB_OFDM_MODULATION)){
1998 ieee->rate = 108;
1999 ieee->SetWirelessMode(ieee->dev, IEEE_G);
2000 printk(KERN_INFO"Using G rates\n");
2001 }else{
2002 ieee->rate = 22;
2003 ieee->SetWirelessMode(ieee->dev, IEEE_B);
2004 printk(KERN_INFO"Using B rates\n");
2005 }
2006 memset(ieee->dot11HTOperationalRateSet, 0, 16);
2007 ieee->state = RTLLIB_LINKED;
2008 }
2009
2010 }
2011 }
2012
2013}
2014
2015void rtllib_softmac_check_all_nets(struct rtllib_device *ieee)
2016{
2017 unsigned long flags;
2018 struct rtllib_network *target;
2019
2020 spin_lock_irqsave(&ieee->lock, flags);
2021
2022 list_for_each_entry(target, &ieee->network_list, list) {
2023
2024 /* if the state become different that NOLINK means
2025 * we had found what we are searching for
2026 */
2027
2028 if (ieee->state != RTLLIB_NOLINK)
2029 break;
2030
2031 if (ieee->scan_age == 0 || time_after(target->last_scanned + ieee->scan_age, jiffies))
2032 rtllib_softmac_new_net(ieee, target);
2033 }
2034
2035 spin_unlock_irqrestore(&ieee->lock, flags);
2036
2037}
2038
2039
2040static inline u16 auth_parse(struct sk_buff *skb, u8** challenge, int *chlen)
2041{
2042 struct rtllib_authentication *a;
2043 u8 *t;
2044 if (skb->len < (sizeof(struct rtllib_authentication)-sizeof(struct rtllib_info_element))){
2045 RTLLIB_DEBUG_MGMT("invalid len in auth resp: %d\n",skb->len);
2046 return 0xcafe;
2047 }
2048 *challenge = NULL;
2049 a = (struct rtllib_authentication*) skb->data;
2050 if (skb->len > (sizeof(struct rtllib_authentication) +3)){
2051 t = skb->data + sizeof(struct rtllib_authentication);
2052
2053 if (*(t++) == MFIE_TYPE_CHALLENGE){
2054 *chlen = *(t++);
2055 *challenge = (u8*)kmalloc(*chlen, GFP_ATOMIC);
2056 memcpy(*challenge, t, *chlen);
2057 }
2058 }
2059
2060 return cpu_to_le16(a->status);
2061
2062}
2063
2064
2065int auth_rq_parse(struct sk_buff *skb,u8* dest)
2066{
2067 struct rtllib_authentication *a;
2068
2069 if (skb->len < (sizeof(struct rtllib_authentication)-sizeof(struct rtllib_info_element))){
2070 RTLLIB_DEBUG_MGMT("invalid len in auth request: %d\n",skb->len);
2071 return -1;
2072 }
2073 a = (struct rtllib_authentication*) skb->data;
2074
2075 memcpy(dest,a->header.addr2, ETH_ALEN);
2076
2077 if (le16_to_cpu(a->algorithm) != WLAN_AUTH_OPEN)
2078 return WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG;
2079
2080 return WLAN_STATUS_SUCCESS;
2081}
2082
2083static short probe_rq_parse(struct rtllib_device *ieee, struct sk_buff *skb, u8 *src)
2084{
2085 u8 *tag;
2086 u8 *skbend;
2087 u8 *ssid=NULL;
2088 u8 ssidlen = 0;
2089
2090 struct rtllib_hdr_3addr *header =
2091 (struct rtllib_hdr_3addr *) skb->data;
2092
2093 if (skb->len < sizeof (struct rtllib_hdr_3addr ))
2094 return -1; /* corrupted */
2095 if ((memcmp(header->addr3,ieee->current_network.bssid,ETH_ALEN) != 0)&&
2096 (memcmp(header->addr3,"\xff\xff\xff\xff\xff\xff",ETH_ALEN) != 0)) {
2097 return -1;
2098 }
2099
2100 if (memcmp(header->addr3,ieee->current_network.bssid,ETH_ALEN) == 0) {
2101 }
2102
2103 if (memcmp(header->addr3,"\xff\xff\xff\xff\xff\xff",ETH_ALEN) == 0) {
2104 }
2105 memcpy(src,header->addr2, ETH_ALEN);
2106
2107 skbend = (u8*)skb->data + skb->len;
2108
2109 tag = skb->data + sizeof (struct rtllib_hdr_3addr );
2110
2111 while (tag+1 < skbend){
2112 if (*tag == 0){
2113 ssid = tag+2;
2114 ssidlen = *(tag+1);
2115 break;
2116 }
2117 tag++; /* point to the len field */
2118 tag = tag + *(tag); /* point to the last data byte of the tag */
2119 tag++; /* point to the next tag */
2120 }
2121
2122 if (ssidlen == 0) return 1;
2123
2124 if (!ssid) return 1; /* ssid not found in tagged param */
2125 return (!strncmp(ssid, ieee->current_network.ssid, ssidlen));
2126
2127}
2128
2129int assoc_rq_parse(struct sk_buff *skb,u8* dest)
2130{
2131 struct rtllib_assoc_request_frame *a;
2132
2133 if (skb->len < (sizeof(struct rtllib_assoc_request_frame) -
2134 sizeof(struct rtllib_info_element))) {
2135
2136 RTLLIB_DEBUG_MGMT("invalid len in auth request:%d \n", skb->len);
2137 return -1;
2138 }
2139
2140 a = (struct rtllib_assoc_request_frame*) skb->data;
2141
2142 memcpy(dest,a->header.addr2,ETH_ALEN);
2143
2144 return 0;
2145}
2146
2147static inline u16 assoc_parse(struct rtllib_device *ieee, struct sk_buff *skb, int *aid)
2148{
2149 struct rtllib_assoc_response_frame *response_head;
2150 u16 status_code;
2151
2152 if (skb->len < sizeof(struct rtllib_assoc_response_frame)){
2153 RTLLIB_DEBUG_MGMT("invalid len in auth resp: %d\n", skb->len);
2154 return 0xcafe;
2155 }
2156
2157 response_head = (struct rtllib_assoc_response_frame*) skb->data;
2158 *aid = le16_to_cpu(response_head->aid) & 0x3fff;
2159
2160 status_code = le16_to_cpu(response_head->status);
2161 if ((status_code==WLAN_STATUS_ASSOC_DENIED_RATES || \
2162 status_code==WLAN_STATUS_CAPS_UNSUPPORTED)&&
2163 ((ieee->mode == IEEE_G) &&
2164 (ieee->current_network.mode == IEEE_N_24G) &&
2165 (ieee->AsocRetryCount++ < (RT_ASOC_RETRY_LIMIT-1)))) {
2166 ieee->pHTInfo->IOTAction |= HT_IOT_ACT_PURE_N_MODE;
2167 }else {
2168 ieee->AsocRetryCount = 0;
2169 }
2170
2171 return le16_to_cpu(response_head->status);
2172}
2173
2174void rtllib_rx_probe_rq(struct rtllib_device *ieee, struct sk_buff *skb)
2175{
2176 u8 dest[ETH_ALEN];
2177#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
2178 struct sta_info *psta = NULL;
2179#endif
2180 ieee->softmac_stats.rx_probe_rq++;
2181 if (probe_rq_parse(ieee, skb, dest) > 0){
2182 ieee->softmac_stats.tx_probe_rs++;
2183 rtllib_resp_to_probe(ieee, dest);
2184#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
2185 if (ieee->iw_mode == IW_MODE_ADHOC){
2186 psta = GetStaInfo(ieee, dest);
2187 if (NULL != psta)
2188 psta->LastActiveTime = jiffies;
2189 }
2190#endif
2191 }
2192}
2193
2194static inline void rtllib_rx_auth_rq(struct rtllib_device *ieee, struct sk_buff *skb)
2195{
2196 u8 dest[ETH_ALEN];
2197 int status;
2198 ieee->softmac_stats.rx_auth_rq++;
2199
2200 if ((status = auth_rq_parse(skb, dest))!= -1){
2201 rtllib_resp_to_auth(ieee, status, dest);
2202 }
2203
2204}
2205
2206static inline void rtllib_rx_assoc_rq(struct rtllib_device *ieee, struct sk_buff *skb)
2207{
2208
2209 u8 dest[ETH_ALEN];
2210
2211 ieee->softmac_stats.rx_ass_rq++;
2212 if (assoc_rq_parse(skb,dest) != -1){
2213 rtllib_resp_to_assoc_rq(ieee, dest);
2214 }
2215
2216 printk(KERN_INFO"New client associated: "MAC_FMT"\n", MAC_ARG(dest));
2217}
2218
2219
2220void rtllib_sta_ps_send_null_frame(struct rtllib_device *ieee, short pwr)
2221{
2222
2223 struct sk_buff *buf = rtllib_null_func(ieee, pwr);
2224
2225 if (buf)
2226 softmac_ps_mgmt_xmit(buf, ieee);
2227
2228}
2229
2230void rtllib_sta_ps_send_pspoll_frame(struct rtllib_device *ieee)
2231{
2232
2233 struct sk_buff *buf = rtllib_pspoll_func(ieee);
2234
2235 if (buf)
2236 softmac_ps_mgmt_xmit(buf, ieee);
2237
2238}
2239
2240short rtllib_sta_ps_sleep(struct rtllib_device *ieee, u32 *time_h, u32 *time_l)
2241{
2242 int timeout = ieee->ps_timeout;
2243 u8 dtim;
2244 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(ieee->PowerSaveControl));
2245 /*if (ieee->ps == RTLLIB_PS_DISABLED ||
2246 ieee->iw_mode != IW_MODE_INFRA ||
2247 ieee->state != RTLLIB_LINKED)
2248
2249 return 0;
2250 */
2251
2252 if (ieee->LPSDelayCnt)
2253 {
2254 ieee->LPSDelayCnt --;
2255 return 0;
2256 }
2257
2258 dtim = ieee->current_network.dtim_data;
2259 if (!(dtim & RTLLIB_DTIM_VALID))
2260 return 0;
2261 timeout = ieee->current_network.beacon_interval;
2262 ieee->current_network.dtim_data = RTLLIB_DTIM_INVALID;
2263 /* there's no need to nofity AP that I find you buffered with broadcast packet */
2264 if (dtim & (RTLLIB_DTIM_UCAST & ieee->ps))
2265 return 2;
2266
2267 if (!time_after(jiffies, ieee->dev->trans_start + MSECS(timeout))){
2268 return 0;
2269 }
2270 if (!time_after(jiffies, ieee->last_rx_ps_time + MSECS(timeout))){
2271 return 0;
2272 }
2273 if ((ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE ) &&
2274 (ieee->mgmt_queue_tail != ieee->mgmt_queue_head))
2275 return 0;
2276
2277 if (time_l){
2278 if (ieee->bAwakePktSent == true) {
2279 pPSC->LPSAwakeIntvl = 1;
2280 } else {
2281 u8 MaxPeriod = 1;
2282
2283 if (pPSC->LPSAwakeIntvl == 0)
2284 pPSC->LPSAwakeIntvl = 1;
2285 if (pPSC->RegMaxLPSAwakeIntvl == 0)
2286 MaxPeriod = 1;
2287 else if (pPSC->RegMaxLPSAwakeIntvl == 0xFF)
2288 MaxPeriod = ieee->current_network.dtim_period;
2289 else
2290 MaxPeriod = pPSC->RegMaxLPSAwakeIntvl;
2291 pPSC->LPSAwakeIntvl = (pPSC->LPSAwakeIntvl >= MaxPeriod) ? MaxPeriod : (pPSC->LPSAwakeIntvl + 1);
2292 }
2293 {
2294 u8 LPSAwakeIntvl_tmp = 0;
2295 u8 period = ieee->current_network.dtim_period;
2296 u8 count = ieee->current_network.tim.tim_count;
2297 if (count == 0 ) {
2298 if (pPSC->LPSAwakeIntvl > period)
2299 LPSAwakeIntvl_tmp = period + (pPSC->LPSAwakeIntvl - period) -((pPSC->LPSAwakeIntvl-period)%period);
2300 else
2301 LPSAwakeIntvl_tmp = pPSC->LPSAwakeIntvl;
2302
2303 } else {
2304 if (pPSC->LPSAwakeIntvl > ieee->current_network.tim.tim_count)
2305 LPSAwakeIntvl_tmp = count + (pPSC->LPSAwakeIntvl - count) -((pPSC->LPSAwakeIntvl-count)%period);
2306 else
2307 LPSAwakeIntvl_tmp = pPSC->LPSAwakeIntvl;
2308 }
2309
2310 *time_l = ieee->current_network.last_dtim_sta_time[0]
2311 + MSECS(ieee->current_network.beacon_interval * LPSAwakeIntvl_tmp);
2312 }
2313 }
2314
2315 if (time_h) {
2316 *time_h = ieee->current_network.last_dtim_sta_time[1];
2317 if (time_l && *time_l < ieee->current_network.last_dtim_sta_time[0])
2318 *time_h += 1;
2319 }
2320
2321 return 1;
2322
2323
2324}
2325
2326inline void rtllib_sta_ps(struct rtllib_device *ieee)
2327{
2328
2329 u32 th,tl;
2330 short sleep;
2331
2332 unsigned long flags,flags2;
2333
2334 spin_lock_irqsave(&ieee->lock, flags);
2335
2336 if ((ieee->ps == RTLLIB_PS_DISABLED ||
2337 ieee->iw_mode != IW_MODE_INFRA ||
2338 ieee->state != RTLLIB_LINKED)){
2339
2340 RT_TRACE(COMP_DBG, "=====>%s(): no need to ps,wake up!! ieee->ps is %d,ieee->iw_mode is %d,ieee->state is %d\n",
2341 __func__,ieee->ps,ieee->iw_mode,ieee->state);
2342 spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2);
2343
2344 rtllib_sta_wakeup(ieee, 1);
2345
2346 spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2);
2347 }
2348
2349 sleep = rtllib_sta_ps_sleep(ieee,&th, &tl);
2350 /* 2 wake, 1 sleep, 0 do nothing */
2351 if (sleep == 0)
2352 {
2353 goto out;
2354 }
2355 if (sleep == 1){
2356 if (ieee->sta_sleep == LPS_IS_SLEEP){
2357 ieee->enter_sleep_state(ieee->dev,th,tl);
2358 }
2359
2360 else if (ieee->sta_sleep == LPS_IS_WAKE){
2361 spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2);
2362
2363 if (ieee->ps_is_queue_empty(ieee->dev)){
2364 ieee->sta_sleep = LPS_WAIT_NULL_DATA_SEND;
2365 ieee->ack_tx_to_ieee = 1;
2366 rtllib_sta_ps_send_null_frame(ieee,1);
2367 ieee->ps_th = th;
2368 ieee->ps_tl = tl;
2369 }
2370 spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2);
2371
2372 }
2373
2374 ieee->bAwakePktSent = false;
2375
2376 }else if (sleep == 2){
2377 spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2);
2378
2379 rtllib_sta_wakeup(ieee,1);
2380
2381 spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2);
2382 }
2383
2384out:
2385 spin_unlock_irqrestore(&ieee->lock, flags);
2386
2387}
2388
2389void rtllib_sta_wakeup(struct rtllib_device *ieee, short nl)
2390{
2391 if (ieee->sta_sleep == LPS_IS_WAKE){
2392 if (nl){
2393 if (ieee->pHTInfo->IOTAction & HT_IOT_ACT_NULL_DATA_POWER_SAVING)
2394 {
2395 ieee->ack_tx_to_ieee = 1;
2396 rtllib_sta_ps_send_null_frame(ieee, 0);
2397 }
2398 else
2399 {
2400 ieee->ack_tx_to_ieee = 1;
2401 rtllib_sta_ps_send_pspoll_frame(ieee);
2402 }
2403 }
2404 return;
2405
2406 }
2407
2408 if (ieee->sta_sleep == LPS_IS_SLEEP)
2409 ieee->sta_wake_up(ieee->dev);
2410 if (nl){
2411 /*
2412 ieee->ack_tx_to_ieee = 1;
2413 printk("%s(3): notify AP we are awaked ++++++++++ SendNullFunctionData\n", __func__);
2414 rtllib_sta_ps_send_null_frame(ieee, 0);
2415 */
2416 if (ieee->pHTInfo->IOTAction & HT_IOT_ACT_NULL_DATA_POWER_SAVING)
2417 {
2418 ieee->ack_tx_to_ieee = 1;
2419 rtllib_sta_ps_send_null_frame(ieee, 0);
2420 }
2421 else
2422 {
2423 ieee->ack_tx_to_ieee = 1;
2424 ieee->polling = true;
2425 rtllib_sta_ps_send_pspoll_frame(ieee);
2426 }
2427
2428 } else {
2429 ieee->sta_sleep = LPS_IS_WAKE;
2430 ieee->polling = false;
2431 }
2432}
2433
2434void rtllib_ps_tx_ack(struct rtllib_device *ieee, short success)
2435{
2436 unsigned long flags,flags2;
2437
2438 spin_lock_irqsave(&ieee->lock, flags);
2439
2440 if (ieee->sta_sleep == LPS_WAIT_NULL_DATA_SEND){
2441 /* Null frame with PS bit set */
2442 if (success){
2443 ieee->sta_sleep = LPS_IS_SLEEP;
2444 ieee->enter_sleep_state(ieee->dev,ieee->ps_th,ieee->ps_tl);
2445 }
2446 /* if the card report not success we can't be sure the AP
2447 * has not RXed so we can't assume the AP believe us awake
2448 */
2449 } else {/* 21112005 - tx again null without PS bit if lost */
2450
2451 if ((ieee->sta_sleep == LPS_IS_WAKE) && !success){
2452 spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2);
2453 if (ieee->pHTInfo->IOTAction & HT_IOT_ACT_NULL_DATA_POWER_SAVING)
2454 {
2455 rtllib_sta_ps_send_null_frame(ieee, 0);
2456 }
2457 else
2458 {
2459 rtllib_sta_ps_send_pspoll_frame(ieee);
2460 }
2461 spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2);
2462 }
2463 }
2464 spin_unlock_irqrestore(&ieee->lock, flags);
2465}
2466
2467void rtllib_process_action(struct rtllib_device* ieee, struct sk_buff* skb)
2468{
2469 struct rtllib_hdr_3addr *header = (struct rtllib_hdr_3addr *) skb->data;
2470 u8* act = rtllib_get_payload((struct rtllib_hdr *)header);
2471 u8 category = 0;
2472
2473 if (act == NULL) {
2474 RTLLIB_DEBUG(RTLLIB_DL_ERR, "error to get payload of action frame\n");
2475 return;
2476 }
2477
2478 category = *act;
2479 act ++;
2480 switch (category) {
2481 case ACT_CAT_BA:
2482 switch (*act) {
2483 case ACT_ADDBAREQ:
2484 rtllib_rx_ADDBAReq(ieee, skb);
2485 break;
2486 case ACT_ADDBARSP:
2487 rtllib_rx_ADDBARsp(ieee, skb);
2488 break;
2489 case ACT_DELBA:
2490 rtllib_rx_DELBA(ieee, skb);
2491 break;
2492 }
2493 break;
2494 default:
2495 break;
2496 }
2497 return;
2498}
2499
2500inline int rtllib_rx_assoc_resp(struct rtllib_device *ieee, struct sk_buff *skb, struct rtllib_rx_stats *rx_stats)
2501{
2502 u16 errcode;
2503 int aid;
2504 u8* ies;
2505 struct rtllib_assoc_response_frame *assoc_resp;
2506 struct rtllib_hdr_3addr *header = (struct rtllib_hdr_3addr *) skb->data;
2507
2508 RTLLIB_DEBUG_MGMT("received [RE]ASSOCIATION RESPONSE (%d)\n",
2509 WLAN_FC_GET_STYPE(header->frame_ctl));
2510
2511 if ((ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) &&
2512 ieee->state == RTLLIB_ASSOCIATING_AUTHENTICATED &&
2513 (ieee->iw_mode == IW_MODE_INFRA))
2514 {
2515 if (0 == (errcode=assoc_parse(ieee,skb, &aid))){
2516 struct rtllib_network *network = kzalloc(sizeof(struct rtllib_network), GFP_ATOMIC);
2517
2518 if (!network)
2519 return 1;
2520 memset(network,0,sizeof(*network));
2521 ieee->state=RTLLIB_LINKED;
2522 ieee->assoc_id = aid;
2523 ieee->softmac_stats.rx_ass_ok++;
2524 /* station support qos */
2525 /* Let the register setting defaultly with Legacy station */
2526 assoc_resp = (struct rtllib_assoc_response_frame*)skb->data;
2527 if (ieee->current_network.qos_data.supported == 1) {
2528 if (rtllib_parse_info_param(ieee,assoc_resp->info_element,\
2529 rx_stats->len - sizeof(*assoc_resp),\
2530 network,rx_stats)){
2531 kfree(network);
2532 return 1;
2533 }
2534 else
2535 {
2536 memcpy(ieee->pHTInfo->PeerHTCapBuf, network->bssht.bdHTCapBuf, network->bssht.bdHTCapLen);
2537 memcpy(ieee->pHTInfo->PeerHTInfoBuf, network->bssht.bdHTInfoBuf, network->bssht.bdHTInfoLen);
2538 }
2539 if (ieee->handle_assoc_response != NULL)
2540 ieee->handle_assoc_response(ieee->dev, (struct rtllib_assoc_response_frame*)header, network);
2541 kfree(network);
2542 }
2543
2544 if (ieee->assocresp_ies){
2545 kfree(ieee->assocresp_ies);
2546 ieee->assocresp_ies = NULL;
2547 }
2548 ies = &(assoc_resp->info_element[0].id);
2549 ieee->assocresp_ies_len = (skb->data + skb->len) - ies;
2550 ieee->assocresp_ies = kmalloc(ieee->assocresp_ies_len, GFP_ATOMIC);
2551 if (ieee->assocresp_ies)
2552 memcpy(ieee->assocresp_ies, ies, ieee->assocresp_ies_len);
2553 else{
2554 printk("%s()Warning: can't alloc memory for assocresp_ies\n", __func__);
2555 ieee->assocresp_ies_len = 0;
2556 }
2557 rtllib_associate_complete(ieee);
2558 } else {
2559 /* aid could not been allocated */
2560 ieee->softmac_stats.rx_ass_err++;
2561 printk(
2562 "Association response status code 0x%x\n",
2563 errcode);
2564 RTLLIB_DEBUG_MGMT(
2565 "Association response status code 0x%x\n",
2566 errcode);
2567 if (ieee->AsocRetryCount < RT_ASOC_RETRY_LIMIT) {
2568 queue_delayed_work_rsl(ieee->wq, &ieee->associate_procedure_wq, 0);
2569 } else {
2570 rtllib_associate_abort(ieee);
2571 }
2572 }
2573 }
2574
2575 return 0;
2576}
2577
2578inline int rtllib_rx_auth(struct rtllib_device *ieee, struct sk_buff *skb, struct rtllib_rx_stats *rx_stats)
2579{
2580 u16 errcode;
2581 u8* challenge;
2582 int chlen=0;
2583 bool bSupportNmode = true, bHalfSupportNmode = false;
2584
2585 if (ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE){
2586 if (ieee->state == RTLLIB_ASSOCIATING_AUTHENTICATING &&
2587 (ieee->iw_mode == IW_MODE_INFRA)) {
2588 RTLLIB_DEBUG_MGMT("Received authentication response");
2589
2590 if (0 == (errcode=auth_parse(skb, &challenge, &chlen))) {
2591 if (ieee->open_wep || !challenge){
2592 ieee->state = RTLLIB_ASSOCIATING_AUTHENTICATED;
2593 ieee->softmac_stats.rx_auth_rs_ok++;
2594 if (!(ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE))
2595 {
2596 if (!ieee->GetNmodeSupportBySecCfg(ieee->dev))
2597 {
2598 if (IsHTHalfNmodeAPs(ieee))
2599 {
2600 bSupportNmode = true;
2601 bHalfSupportNmode = true;
2602 }
2603 else
2604 {
2605 bSupportNmode = false;
2606 bHalfSupportNmode = false;
2607 }
2608 }
2609 }
2610 /* Dummy wirless mode setting to avoid encryption issue */
2611 if (bSupportNmode) {
2612 ieee->SetWirelessMode(ieee->dev, \
2613 ieee->current_network.mode);
2614 }else{
2615 /*TODO*/
2616 ieee->SetWirelessMode(ieee->dev, IEEE_G);
2617 }
2618
2619 if (ieee->current_network.mode == IEEE_N_24G && bHalfSupportNmode == true)
2620 {
2621 printk("===============>entern half N mode\n");
2622 ieee->bHalfWirelessN24GMode = true;
2623 }
2624 else
2625 ieee->bHalfWirelessN24GMode = false;
2626
2627 rtllib_associate_step2(ieee);
2628 }else{
2629 rtllib_auth_challenge(ieee, challenge, chlen);
2630 }
2631 }else{
2632 ieee->softmac_stats.rx_auth_rs_err++;
2633 RTLLIB_DEBUG_MGMT("Authentication respose status code 0x%x",errcode);
2634
2635 printk("Authentication respose status code 0x%x",errcode);
2636 rtllib_associate_abort(ieee);
2637 }
2638
2639 }else if (ieee->iw_mode == IW_MODE_MASTER){
2640 rtllib_rx_auth_rq(ieee, skb);
2641 }
2642 }
2643
2644 return 0;
2645}
2646
2647inline int rtllib_rx_deauth(struct rtllib_device *ieee, struct sk_buff *skb)
2648{
2649 struct rtllib_hdr_3addr *header = (struct rtllib_hdr_3addr *) skb->data;
2650
2651 if (memcmp(header->addr3, ieee->current_network.bssid, ETH_ALEN) != 0)
2652 return 0;
2653
2654 /* FIXME for now repeat all the association procedure
2655 * both for disassociation and deauthentication
2656 */
2657 if ((ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) &&
2658 ieee->state == RTLLIB_LINKED &&
2659 (ieee->iw_mode == IW_MODE_INFRA)) {
2660 printk(KERN_INFO "==========>received disassoc/deauth(%x) "
2661 "frame, reason code:%x\n",
2662 WLAN_FC_GET_STYPE(header->frame_ctl),
2663 ((struct rtllib_disassoc*)skb->data)->reason);
2664 ieee->state = RTLLIB_ASSOCIATING;
2665 ieee->softmac_stats.reassoc++;
2666 ieee->is_roaming = true;
2667 ieee->LinkDetectInfo.bBusyTraffic = false;
2668 rtllib_disassociate(ieee);
2669 RemovePeerTS(ieee, header->addr2);
2670 if (ieee->LedControlHandler != NULL)
2671 ieee->LedControlHandler(ieee->dev, LED_CTL_START_TO_LINK);
2672
2673 if (!(ieee->rtllib_ap_sec_type(ieee)&(SEC_ALG_CCMP|SEC_ALG_TKIP)))
2674 queue_delayed_work_rsl(ieee->wq, &ieee->associate_procedure_wq, 5);
2675 }
2676
2677 return 0;
2678}
2679
2680inline int rtllib_rx_frame_softmac(struct rtllib_device *ieee, struct sk_buff *skb,
2681 struct rtllib_rx_stats *rx_stats, u16 type,
2682 u16 stype)
2683{
2684 struct rtllib_hdr_3addr *header = (struct rtllib_hdr_3addr *) skb->data;
2685
2686 if (!ieee->proto_started)
2687 return 0;
2688
2689 switch (WLAN_FC_GET_STYPE(header->frame_ctl)) {
2690
2691 case RTLLIB_STYPE_ASSOC_RESP:
2692 case RTLLIB_STYPE_REASSOC_RESP:
2693
2694 if (rtllib_rx_assoc_resp(ieee, skb, rx_stats) == 1)
2695 return 1;
2696
2697 break;
2698
2699 case RTLLIB_STYPE_ASSOC_REQ:
2700 case RTLLIB_STYPE_REASSOC_REQ:
2701
2702 if ((ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) &&
2703 ieee->iw_mode == IW_MODE_MASTER)
2704
2705 rtllib_rx_assoc_rq(ieee, skb);
2706 break;
2707
2708 case RTLLIB_STYPE_AUTH:
2709
2710 rtllib_rx_auth(ieee, skb, rx_stats);
2711
2712 break;
2713 case RTLLIB_STYPE_DISASSOC:
2714 case RTLLIB_STYPE_DEAUTH:
2715
2716 rtllib_rx_deauth(ieee, skb);
2717
2718 break;
2719
2720 case RTLLIB_STYPE_MANAGE_ACT:
2721 rtllib_process_action(ieee,skb);
2722 break;
2723#ifdef COMPATIBLE_WITH_RALINK_MESH
2724 case RTLLIB_STYPE_MESH_ACT:
2725 rtllib_process_action_mesh(ieee,skb,rx_stats);
2726 break;
2727#endif
2728 default:
2729 return -1;
2730 break;
2731 }
2732
2733 return 0;
2734}
2735
2736/* following are for a simplier TX queue management.
2737 * Instead of using netif_[stop/wake]_queue the driver
2738 * will uses these two function (plus a reset one), that
2739 * will internally uses the kernel netif_* and takes
2740 * care of the ieee802.11 fragmentation.
2741 * So the driver receives a fragment per time and might
2742 * call the stop function when it want without take care
2743 * to have enought room to TX an entire packet.
2744 * This might be useful if each fragment need it's own
2745 * descriptor, thus just keep a total free memory > than
2746 * the max fragmentation treshold is not enought.. If the
2747 * ieee802.11 stack passed a TXB struct then you needed
2748 * to keep N free descriptors where
2749 * N = MAX_PACKET_SIZE / MIN_FRAG_TRESHOLD
2750 * In this way you need just one and the 802.11 stack
2751 * will take care of buffering fragments and pass them to
2752 * to the driver later, when it wakes the queue.
2753 */
2754void rtllib_softmac_xmit(struct rtllib_txb *txb, struct rtllib_device *ieee)
2755{
2756
2757 unsigned int queue_index = txb->queue_index;
2758 unsigned long flags;
2759 int i;
2760 cb_desc *tcb_desc = NULL;
2761 unsigned long queue_len = 0;
2762
2763 spin_lock_irqsave(&ieee->lock,flags);
2764
2765 /* called with 2nd parm 0, no tx mgmt lock required */
2766 rtllib_sta_wakeup(ieee,0);
2767
2768 /* update the tx status */
2769 tcb_desc = (cb_desc *)(txb->fragments[0]->cb + MAX_DEV_ADDR_SIZE);
2770 if (tcb_desc->bMulticast) {
2771 ieee->stats.multicast++;
2772 }
2773#if 1
2774 /* if xmit available, just xmit it immediately, else just insert it to the wait queue */
2775 for (i = 0; i < txb->nr_frags; i++) {
2776#ifdef USB_TX_DRIVER_AGGREGATION_ENABLE
2777 queue_len = skb_queue_len(&ieee->skb_drv_aggQ[queue_index]);
2778#else
2779 queue_len = skb_queue_len(&ieee->skb_waitQ[queue_index]);
2780#endif
2781 if ((queue_len != 0) ||\
2782 (!ieee->check_nic_enough_desc(ieee->dev,queue_index))||\
2783 (ieee->queue_stop)) {
2784 /* insert the skb packet to the wait queue */
2785 /* as for the completion function, it does not need
2786 * to check it any more.
2787 * */
2788#ifdef WIFI_TEST
2789 if (1)
2790#else
2791 if (queue_len < 200)
2792#endif
2793 {
2794#ifdef USB_TX_DRIVER_AGGREGATION_ENABLE
2795 skb_queue_tail(&ieee->skb_drv_aggQ[queue_index], txb->fragments[i]);
2796#else
2797 skb_queue_tail(&ieee->skb_waitQ[queue_index], txb->fragments[i]);
2798#endif
2799 }else{
2800 kfree_skb(txb->fragments[i]);
2801 }
2802 }else{
2803 ieee->softmac_data_hard_start_xmit(
2804 txb->fragments[i],
2805 ieee->dev,ieee->rate);
2806 }
2807 }
2808#endif
2809 rtllib_txb_free(txb);
2810
2811 spin_unlock_irqrestore(&ieee->lock,flags);
2812
2813}
2814
2815/* called with ieee->lock acquired */
2816void rtllib_resume_tx(struct rtllib_device *ieee)
2817{
2818 int i;
2819 for (i = ieee->tx_pending.frag; i < ieee->tx_pending.txb->nr_frags; i++) {
2820
2821 if (ieee->queue_stop){
2822 ieee->tx_pending.frag = i;
2823 return;
2824 }else{
2825
2826 ieee->softmac_data_hard_start_xmit(
2827 ieee->tx_pending.txb->fragments[i],
2828 ieee->dev,ieee->rate);
2829 ieee->stats.tx_packets++;
2830 }
2831 }
2832
2833 rtllib_txb_free(ieee->tx_pending.txb);
2834 ieee->tx_pending.txb = NULL;
2835}
2836
2837
2838void rtllib_reset_queue(struct rtllib_device *ieee)
2839{
2840 unsigned long flags;
2841
2842 spin_lock_irqsave(&ieee->lock,flags);
2843 init_mgmt_queue(ieee);
2844 if (ieee->tx_pending.txb){
2845 rtllib_txb_free(ieee->tx_pending.txb);
2846 ieee->tx_pending.txb = NULL;
2847 }
2848 ieee->queue_stop = 0;
2849 spin_unlock_irqrestore(&ieee->lock,flags);
2850
2851}
2852
2853void rtllib_wake_queue(struct rtllib_device *ieee)
2854{
2855
2856 unsigned long flags;
2857 struct sk_buff *skb;
2858 struct rtllib_hdr_3addr *header;
2859
2860 spin_lock_irqsave(&ieee->lock,flags);
2861 if (! ieee->queue_stop) goto exit;
2862
2863 ieee->queue_stop = 0;
2864
2865 if (ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE){
2866 while (!ieee->queue_stop && (skb = dequeue_mgmt(ieee))){
2867
2868 header = (struct rtllib_hdr_3addr *) skb->data;
2869
2870 header->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
2871
2872 if (ieee->seq_ctrl[0] == 0xFFF)
2873 ieee->seq_ctrl[0] = 0;
2874 else
2875 ieee->seq_ctrl[0]++;
2876
2877 ieee->softmac_data_hard_start_xmit(skb,ieee->dev,ieee->basic_rate);
2878 }
2879 }
2880 if (!ieee->queue_stop && ieee->tx_pending.txb)
2881 rtllib_resume_tx(ieee);
2882
2883 if (!ieee->queue_stop && netif_queue_stopped(ieee->dev)){
2884 ieee->softmac_stats.swtxawake++;
2885 netif_wake_queue(ieee->dev);
2886 }
2887
2888exit :
2889 spin_unlock_irqrestore(&ieee->lock,flags);
2890}
2891
2892
2893void rtllib_stop_queue(struct rtllib_device *ieee)
2894{
2895
2896 if (! netif_queue_stopped(ieee->dev)){
2897 netif_stop_queue(ieee->dev);
2898 ieee->softmac_stats.swtxstop++;
2899 }
2900 ieee->queue_stop = 1;
2901
2902}
2903
2904void rtllib_stop_all_queues(struct rtllib_device *ieee)
2905{
2906#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,30)
2907 unsigned int i;
2908 for (i=0; i < ieee->dev->num_tx_queues; i++)
2909 netdev_get_tx_queue(ieee->dev,i)->trans_start = jiffies;
2910#else
2911 ieee->dev->trans_start = jiffies;
2912#endif
2913
2914#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27)
2915 netif_carrier_off(ieee->dev);
2916#else
2917 netif_tx_stop_all_queues(ieee->dev);
2918#endif
2919}
2920
2921void rtllib_wake_all_queues(struct rtllib_device *ieee)
2922{
2923#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27)
2924 netif_carrier_on(ieee->dev);
2925#else
2926 netif_tx_wake_all_queues(ieee->dev);
2927#endif
2928}
2929
2930inline void rtllib_randomize_cell(struct rtllib_device *ieee)
2931{
2932
2933 get_random_bytes(ieee->current_network.bssid, ETH_ALEN);
2934
2935 /* an IBSS cell address must have the two less significant
2936 * bits of the first byte = 2
2937 */
2938 ieee->current_network.bssid[0] &= ~0x01;
2939 ieee->current_network.bssid[0] |= 0x02;
2940}
2941
2942/* called in user context only */
2943void rtllib_start_master_bss(struct rtllib_device *ieee)
2944{
2945 ieee->assoc_id = 1;
2946
2947 if (ieee->current_network.ssid_len == 0){
2948 strncpy(ieee->current_network.ssid,
2949 RTLLIB_DEFAULT_TX_ESSID,
2950 IW_ESSID_MAX_SIZE);
2951
2952 ieee->current_network.ssid_len = strlen(RTLLIB_DEFAULT_TX_ESSID);
2953 ieee->ssid_set = 1;
2954 }
2955
2956 memcpy(ieee->current_network.bssid, ieee->dev->dev_addr, ETH_ALEN);
2957
2958 ieee->set_chan(ieee->dev, ieee->current_network.channel);
2959 ieee->state = RTLLIB_LINKED;
2960 ieee->link_change(ieee->dev);
2961 notify_wx_assoc_event(ieee);
2962
2963 if (ieee->data_hard_resume)
2964 ieee->data_hard_resume(ieee->dev);
2965
2966 netif_carrier_on(ieee->dev);
2967}
2968
2969void rtllib_start_monitor_mode(struct rtllib_device *ieee)
2970{
2971 /* reset hardware status */
2972 if (ieee->raw_tx){
2973 if (ieee->data_hard_resume)
2974 ieee->data_hard_resume(ieee->dev);
2975
2976 netif_carrier_on(ieee->dev);
2977 }
2978}
2979
2980void rtllib_start_ibss_wq(void *data)
2981{
2982 struct rtllib_device *ieee = container_of_dwork_rsl(data, struct rtllib_device, start_ibss_wq);
2983 /* iwconfig mode ad-hoc will schedule this and return
2984 * on the other hand this will block further iwconfig SET
2985 * operations because of the wx_sem hold.
2986 * Anyway some most set operations set a flag to speed-up
2987 * (abort) this wq (when syncro scanning) before sleeping
2988 * on the semaphore
2989 */
2990 if (!ieee->proto_started){
2991 printk("==========oh driver down return\n");
2992 return;
2993 }
2994 down(&ieee->wx_sem);
2995
2996 if (ieee->current_network.ssid_len == 0){
2997 strcpy(ieee->current_network.ssid,RTLLIB_DEFAULT_TX_ESSID);
2998 ieee->current_network.ssid_len = strlen(RTLLIB_DEFAULT_TX_ESSID);
2999 ieee->ssid_set = 1;
3000 }
3001
3002 ieee->state = RTLLIB_NOLINK;
3003#ifdef ADHOC_11N
3004 ieee->mode = IEEE_N_24G;
3005#else
3006 ieee->mode = IEEE_G;
3007#endif
3008 /* check if we have this cell in our network list */
3009 rtllib_softmac_check_all_nets(ieee);
3010
3011
3012 /* if not then the state is not linked. Maybe the user swithced to
3013 * ad-hoc mode just after being in monitor mode, or just after
3014 * being very few time in managed mode (so the card have had no
3015 * time to scan all the chans..) or we have just run up the iface
3016 * after setting ad-hoc mode. So we have to give another try..
3017 * Here, in ibss mode, should be safe to do this without extra care
3018 * (in bss mode we had to make sure no-one tryed to associate when
3019 * we had just checked the ieee->state and we was going to start the
3020 * scan) beacause in ibss mode the rtllib_new_net function, when
3021 * finds a good net, just set the ieee->state to RTLLIB_LINKED,
3022 * so, at worst, we waste a bit of time to initiate an unneeded syncro
3023 * scan, that will stop at the first round because it sees the state
3024 * associated.
3025 */
3026 if (ieee->state == RTLLIB_NOLINK)
3027 rtllib_start_scan_syncro(ieee, 0);
3028
3029 /* the network definitively is not here.. create a new cell */
3030 if (ieee->state == RTLLIB_NOLINK){
3031 printk("creating new IBSS cell\n");
3032 ieee->current_network.channel = ieee->IbssStartChnl;
3033 if (!ieee->wap_set)
3034 rtllib_randomize_cell(ieee);
3035
3036 if (ieee->modulation & RTLLIB_CCK_MODULATION){
3037
3038 ieee->current_network.rates_len = 4;
3039
3040 ieee->current_network.rates[0] = RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_1MB;
3041 ieee->current_network.rates[1] = RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_2MB;
3042 ieee->current_network.rates[2] = RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_5MB;
3043 ieee->current_network.rates[3] = RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_11MB;
3044
3045 }else
3046 ieee->current_network.rates_len = 0;
3047
3048 if (ieee->modulation & RTLLIB_OFDM_MODULATION){
3049 ieee->current_network.rates_ex_len = 8;
3050
3051 /*ieee->current_network.rates_ex[0] = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_6MB;
3052 ieee->current_network.rates_ex[1] = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_9MB;
3053 ieee->current_network.rates_ex[2] = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_12MB;
3054 ieee->current_network.rates_ex[3] = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_18MB;
3055 ieee->current_network.rates_ex[4] = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_24MB;
3056 ieee->current_network.rates_ex[5] = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_36MB;
3057 ieee->current_network.rates_ex[6] = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_48MB;
3058 ieee->current_network.rates_ex[7] = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_54MB;*/
3059
3060 ieee->current_network.rates_ex[0] = RTLLIB_OFDM_RATE_6MB;
3061 ieee->current_network.rates_ex[1] = RTLLIB_OFDM_RATE_9MB;
3062 ieee->current_network.rates_ex[2] = RTLLIB_OFDM_RATE_12MB;
3063 ieee->current_network.rates_ex[3] = RTLLIB_OFDM_RATE_18MB;
3064 ieee->current_network.rates_ex[4] = RTLLIB_OFDM_RATE_24MB;
3065 ieee->current_network.rates_ex[5] = RTLLIB_OFDM_RATE_36MB;
3066 ieee->current_network.rates_ex[6] = RTLLIB_OFDM_RATE_48MB;
3067 ieee->current_network.rates_ex[7] = RTLLIB_OFDM_RATE_54MB;
3068
3069 ieee->rate = 108;
3070 }else{
3071 ieee->current_network.rates_ex_len = 0;
3072 ieee->rate = 22;
3073 }
3074
3075#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
3076#ifdef ADHOC_11N
3077 ieee->current_network.qos_data.supported = 1;
3078#else
3079 ieee->current_network.qos_data.supported = 0;
3080#endif
3081 ieee->SetWirelessMode(ieee->dev, ieee->mode);
3082#else
3083 ieee->current_network.qos_data.supported = 0;
3084 ieee->SetWirelessMode(ieee->dev, IEEE_G);
3085#endif
3086 ieee->current_network.mode = ieee->mode;
3087 ieee->current_network.atim_window = 0;
3088 ieee->current_network.capability = WLAN_CAPABILITY_IBSS;
3089 }
3090
3091 printk("%s(): ieee->mode = %d\n", __func__, ieee->mode);
3092 if ((ieee->mode == IEEE_N_24G) || (ieee->mode == IEEE_N_5G))
3093 HTUseDefaultSetting(ieee);
3094 else
3095 ieee->pHTInfo->bCurrentHTSupport = false;
3096
3097 ieee->SetHwRegHandler(ieee->dev, HW_VAR_MEDIA_STATUS, (u8 *)(&ieee->state));
3098
3099 ieee->state = RTLLIB_LINKED;
3100 ieee->link_change(ieee->dev);
3101
3102 HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, HT_EXTCHNL_OFFSET_NO_EXT);
3103 if (ieee->LedControlHandler != NULL)
3104 ieee->LedControlHandler(ieee->dev,LED_CTL_LINK);
3105
3106 rtllib_start_send_beacons(ieee);
3107
3108 notify_wx_assoc_event(ieee);
3109
3110 if (ieee->data_hard_resume)
3111 ieee->data_hard_resume(ieee->dev);
3112
3113 netif_carrier_on(ieee->dev);
3114
3115 up(&ieee->wx_sem);
3116}
3117
3118inline void rtllib_start_ibss(struct rtllib_device *ieee)
3119{
3120 queue_delayed_work_rsl(ieee->wq, &ieee->start_ibss_wq, MSECS(150));
3121}
3122
3123/* this is called only in user context, with wx_sem held */
3124void rtllib_start_bss(struct rtllib_device *ieee)
3125{
3126 unsigned long flags;
3127#ifdef ENABLE_DOT11D
3128 if (IS_DOT11D_ENABLE(ieee) && !IS_COUNTRY_IE_VALID(ieee))
3129 {
3130 if (! ieee->bGlobalDomain)
3131 {
3132 return;
3133 }
3134 }
3135#endif
3136 /* check if we have already found the net we
3137 * are interested in (if any).
3138 * if not (we are disassociated and we are not
3139 * in associating / authenticating phase) start the background scanning.
3140 */
3141 rtllib_softmac_check_all_nets(ieee);
3142
3143 /* ensure no-one start an associating process (thus setting
3144 * the ieee->state to rtllib_ASSOCIATING) while we
3145 * have just cheked it and we are going to enable scan.
3146 * The rtllib_new_net function is always called with
3147 * lock held (from both rtllib_softmac_check_all_nets and
3148 * the rx path), so we cannot be in the middle of such function
3149 */
3150 spin_lock_irqsave(&ieee->lock, flags);
3151
3152 if (ieee->state == RTLLIB_NOLINK) {
3153 rtllib_start_scan(ieee);
3154 }
3155 spin_unlock_irqrestore(&ieee->lock, flags);
3156}
3157
3158void rtllib_link_change_wq(void *data)
3159{
3160 struct rtllib_device *ieee = container_of_dwork_rsl(data, struct rtllib_device, link_change_wq);
3161 ieee->link_change(ieee->dev);
3162}
3163/* called only in userspace context */
3164void rtllib_disassociate(struct rtllib_device *ieee)
3165{
3166 netif_carrier_off(ieee->dev);
3167 if (ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE)
3168 rtllib_reset_queue(ieee);
3169
3170 if (ieee->data_hard_stop)
3171 ieee->data_hard_stop(ieee->dev);
3172#ifdef ENABLE_DOT11D
3173 if (IS_DOT11D_ENABLE(ieee))
3174 Dot11d_Reset(ieee);
3175#endif
3176 ieee->state = RTLLIB_NOLINK;
3177 ieee->is_set_key = false;
3178 ieee->wap_set = 0;
3179
3180 queue_delayed_work_rsl(ieee->wq, &ieee->link_change_wq, 0);
3181
3182
3183#ifndef FOR_ANDROID_X86
3184 notify_wx_assoc_event(ieee);
3185#endif
3186}
3187
3188void rtllib_associate_retry_wq(void *data)
3189{
3190 struct rtllib_device *ieee = container_of_dwork_rsl(data, struct rtllib_device, associate_retry_wq);
3191 unsigned long flags;
3192
3193 down(&ieee->wx_sem);
3194 if (!ieee->proto_started)
3195 goto exit;
3196
3197 if (ieee->state != RTLLIB_ASSOCIATING_RETRY)
3198 goto exit;
3199
3200 /* until we do not set the state to RTLLIB_NOLINK
3201 * there are no possibility to have someone else trying
3202 * to start an association procdure (we get here with
3203 * ieee->state = RTLLIB_ASSOCIATING).
3204 * When we set the state to RTLLIB_NOLINK it is possible
3205 * that the RX path run an attempt to associate, but
3206 * both rtllib_softmac_check_all_nets and the
3207 * RX path works with ieee->lock held so there are no
3208 * problems. If we are still disassociated then start a scan.
3209 * the lock here is necessary to ensure no one try to start
3210 * an association procedure when we have just checked the
3211 * state and we are going to start the scan.
3212 */
3213 ieee->beinretry = true;
3214 ieee->state = RTLLIB_NOLINK;
3215
3216 rtllib_softmac_check_all_nets(ieee);
3217
3218 spin_lock_irqsave(&ieee->lock, flags);
3219
3220 if (ieee->state == RTLLIB_NOLINK)
3221 {
3222 rtllib_start_scan(ieee);
3223 }
3224 spin_unlock_irqrestore(&ieee->lock, flags);
3225
3226 ieee->beinretry = false;
3227exit:
3228 up(&ieee->wx_sem);
3229}
3230
3231struct sk_buff *rtllib_get_beacon_(struct rtllib_device *ieee)
3232{
3233 u8 broadcast_addr[] = {0xff,0xff,0xff,0xff,0xff,0xff};
3234
3235 struct sk_buff *skb;
3236 struct rtllib_probe_response *b;
3237 skb = rtllib_probe_resp(ieee, broadcast_addr);
3238
3239 if (!skb)
3240 return NULL;
3241
3242 b = (struct rtllib_probe_response *) skb->data;
3243 b->header.frame_ctl = cpu_to_le16(RTLLIB_STYPE_BEACON);
3244
3245 return skb;
3246
3247}
3248
3249struct sk_buff *rtllib_get_beacon(struct rtllib_device *ieee)
3250{
3251 struct sk_buff *skb;
3252 struct rtllib_probe_response *b;
3253
3254 skb = rtllib_get_beacon_(ieee);
3255 if (!skb)
3256 return NULL;
3257
3258 b = (struct rtllib_probe_response *) skb->data;
3259 b->header.seq_ctl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
3260
3261 if (ieee->seq_ctrl[0] == 0xFFF)
3262 ieee->seq_ctrl[0] = 0;
3263 else
3264 ieee->seq_ctrl[0]++;
3265
3266 return skb;
3267}
3268
3269void rtllib_softmac_stop_protocol(struct rtllib_device *ieee, u8 mesh_flag, u8 shutdown)
3270{
3271 rtllib_stop_scan_syncro(ieee);
3272 down(&ieee->wx_sem);
3273 rtllib_stop_protocol(ieee,shutdown);
3274 up(&ieee->wx_sem);
3275}
3276
3277
3278void rtllib_stop_protocol(struct rtllib_device *ieee, u8 shutdown)
3279{
3280 if (!ieee->proto_started)
3281 return;
3282
3283 if (shutdown){
3284 ieee->proto_started = 0;
3285 ieee->proto_stoppping = 1;
3286 if (ieee->rtllib_ips_leave != NULL)
3287 ieee->rtllib_ips_leave(ieee->dev);
3288 }
3289
3290 rtllib_stop_send_beacons(ieee);
3291 del_timer_sync(&ieee->associate_timer);
3292 cancel_delayed_work(&ieee->associate_retry_wq);
3293 cancel_delayed_work(&ieee->start_ibss_wq);
3294 cancel_delayed_work(&ieee->link_change_wq);
3295 rtllib_stop_scan(ieee);
3296
3297 if (ieee->state <= RTLLIB_ASSOCIATING_AUTHENTICATED)
3298 ieee->state = RTLLIB_NOLINK;
3299
3300 if (ieee->state == RTLLIB_LINKED){
3301 if (ieee->iw_mode == IW_MODE_INFRA)
3302 SendDisassociation(ieee,1,deauth_lv_ss);
3303 rtllib_disassociate(ieee);
3304 }
3305
3306 if (shutdown){
3307 RemoveAllTS(ieee);
3308 ieee->proto_stoppping = 0;
3309 }
3310 if (ieee->assocreq_ies) {
3311 kfree(ieee->assocreq_ies);
3312 ieee->assocreq_ies = NULL;
3313 ieee->assocreq_ies_len = 0;
3314 }
3315 if (ieee->assocresp_ies) {
3316 kfree(ieee->assocresp_ies);
3317 ieee->assocresp_ies = NULL;
3318 ieee->assocresp_ies_len = 0;
3319 }
3320}
3321
3322void rtllib_softmac_start_protocol(struct rtllib_device *ieee, u8 mesh_flag)
3323{
3324 down(&ieee->wx_sem);
3325 rtllib_start_protocol(ieee);
3326 up(&ieee->wx_sem);
3327}
3328
3329void rtllib_start_protocol(struct rtllib_device *ieee)
3330{
3331 short ch = 0;
3332 int i = 0;
3333
3334 rtllib_update_active_chan_map(ieee);
3335
3336 if (ieee->proto_started)
3337 return;
3338
3339 ieee->proto_started = 1;
3340
3341 if (ieee->current_network.channel == 0) {
3342 do {
3343 ch++;
3344 if (ch > MAX_CHANNEL_NUMBER)
3345 return; /* no channel found */
3346 } while(!ieee->active_channel_map[ch]);
3347 ieee->current_network.channel = ch;
3348 }
3349
3350 if (ieee->current_network.beacon_interval == 0)
3351 ieee->current_network.beacon_interval = 100;
3352
3353 for (i = 0; i < 17; i++) {
3354 ieee->last_rxseq_num[i] = -1;
3355 ieee->last_rxfrag_num[i] = -1;
3356 ieee->last_packet_time[i] = 0;
3357 }
3358
3359 if (ieee->UpdateBeaconInterruptHandler)
3360 ieee->UpdateBeaconInterruptHandler(ieee->dev, false);
3361
3362 ieee->wmm_acm = 0;
3363 /* if the user set the MAC of the ad-hoc cell and then
3364 * switch to managed mode, shall we make sure that association
3365 * attempts does not fail just because the user provide the essid
3366 * and the nic is still checking for the AP MAC ??
3367 */
3368 if (ieee->iw_mode == IW_MODE_INFRA) {
3369 rtllib_start_bss(ieee);
3370 } else if (ieee->iw_mode == IW_MODE_ADHOC) {
3371 if (ieee->UpdateBeaconInterruptHandler)
3372 ieee->UpdateBeaconInterruptHandler(ieee->dev, true);
3373
3374 rtllib_start_ibss(ieee);
3375
3376 } else if (ieee->iw_mode == IW_MODE_MASTER) {
3377 rtllib_start_master_bss(ieee);
3378 } else if (ieee->iw_mode == IW_MODE_MONITOR) {
3379 rtllib_start_monitor_mode(ieee);
3380 }
3381}
3382
3383void rtllib_softmac_init(struct rtllib_device *ieee)
3384{
3385 int i;
3386 memset(&ieee->current_network, 0, sizeof(struct rtllib_network));
3387
3388 ieee->state = RTLLIB_NOLINK;
3389 for (i = 0; i < 5; i++) {
3390 ieee->seq_ctrl[i] = 0;
3391 }
3392#ifdef ENABLE_DOT11D
3393 ieee->pDot11dInfo = kmalloc(sizeof(struct rt_dot11d_info), GFP_ATOMIC);
3394 if (!ieee->pDot11dInfo)
3395 RTLLIB_DEBUG(RTLLIB_DL_ERR, "can't alloc memory for DOT11D\n");
3396 memset(ieee->pDot11dInfo, 0, sizeof(struct rt_dot11d_info));
3397#endif
3398 ieee->LinkDetectInfo.SlotIndex = 0;
3399 ieee->LinkDetectInfo.SlotNum = 2;
3400 ieee->LinkDetectInfo.NumRecvBcnInPeriod=0;
3401 ieee->LinkDetectInfo.NumRecvDataInPeriod=0;
3402 ieee->LinkDetectInfo.NumTxOkInPeriod =0;
3403 ieee->LinkDetectInfo.NumRxOkInPeriod =0;
3404 ieee->LinkDetectInfo.NumRxUnicastOkInPeriod=0;
3405 ieee->bIsAggregateFrame = false;
3406 ieee->assoc_id = 0;
3407 ieee->queue_stop = 0;
3408 ieee->scanning_continue = 0;
3409 ieee->softmac_features = 0;
3410 ieee->wap_set = 0;
3411 ieee->ssid_set = 0;
3412 ieee->proto_started = 0;
3413 ieee->proto_stoppping = 0;
3414 ieee->basic_rate = RTLLIB_DEFAULT_BASIC_RATE;
3415 ieee->rate = 22;
3416 ieee->ps = RTLLIB_PS_DISABLED;
3417 ieee->sta_sleep = LPS_IS_WAKE;
3418
3419 ieee->Regdot11HTOperationalRateSet[0]= 0xff;
3420 ieee->Regdot11HTOperationalRateSet[1]= 0xff;
3421 ieee->Regdot11HTOperationalRateSet[4]= 0x01;
3422
3423 ieee->Regdot11TxHTOperationalRateSet[0]= 0xff;
3424 ieee->Regdot11TxHTOperationalRateSet[1]= 0xff;
3425 ieee->Regdot11TxHTOperationalRateSet[4]= 0x01;
3426
3427 ieee->FirstIe_InScan = false;
3428 ieee->actscanning = false;
3429 ieee->beinretry = false;
3430 ieee->is_set_key = false;
3431 init_mgmt_queue(ieee);
3432
3433 ieee->sta_edca_param[0] = 0x0000A403;
3434 ieee->sta_edca_param[1] = 0x0000A427;
3435 ieee->sta_edca_param[2] = 0x005E4342;
3436 ieee->sta_edca_param[3] = 0x002F3262;
3437 ieee->aggregation = true;
3438 ieee->enable_rx_imm_BA = 1;
3439#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,40)
3440 _setup_timer(&ieee->scan_timer,
3441 rtllib_softmac_scan_cb,
3442 (unsigned long) ieee);
3443#endif
3444 ieee->tx_pending.txb = NULL;
3445
3446 _setup_timer(&ieee->associate_timer,
3447 rtllib_associate_abort_cb,
3448 (unsigned long) ieee);
3449
3450 _setup_timer(&ieee->beacon_timer,
3451 rtllib_send_beacon_cb,
3452 (unsigned long) ieee);
3453
3454#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
3455 _setup_timer(&ieee->ibss_wait_timer,
3456 rtllib_ibss_wait_timeout,
3457 (unsigned long) ieee);
3458#endif
3459
3460#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
3461#ifdef PF_SYNCTHREAD
3462 ieee->wq = create_workqueue(DRV_NAME,0);
3463#else
3464 ieee->wq = create_workqueue(DRV_NAME);
3465#endif
3466#endif
3467
3468 INIT_DELAYED_WORK_RSL(&ieee->link_change_wq,(void*)rtllib_link_change_wq,ieee);
3469 INIT_DELAYED_WORK_RSL(&ieee->start_ibss_wq,(void*)rtllib_start_ibss_wq,ieee);
3470 INIT_WORK_RSL(&ieee->associate_complete_wq, (void*)rtllib_associate_complete_wq,ieee);
3471 INIT_DELAYED_WORK_RSL(&ieee->associate_procedure_wq, (void*)rtllib_associate_procedure_wq,ieee);
3472 INIT_DELAYED_WORK_RSL(&ieee->softmac_scan_wq,(void*)rtllib_softmac_scan_wq,ieee);
3473 INIT_DELAYED_WORK_RSL(&ieee->softmac_hint11d_wq,(void*)rtllib_softmac_hint11d_wq,ieee);
3474 INIT_DELAYED_WORK_RSL(&ieee->associate_retry_wq, (void*)rtllib_associate_retry_wq,ieee);
3475 INIT_WORK_RSL(&ieee->wx_sync_scan_wq,(void*)rtllib_wx_sync_scan_wq,ieee);
3476
3477 sema_init(&ieee->wx_sem, 1);
3478 sema_init(&ieee->scan_sem, 1);
3479 sema_init(&ieee->ips_sem,1);
3480
3481 spin_lock_init(&ieee->mgmt_tx_lock);
3482 spin_lock_init(&ieee->beacon_lock);
3483
3484 tasklet_init(&ieee->ps_task,
3485 (void(*)(unsigned long)) rtllib_sta_ps,
3486 (unsigned long)ieee);
3487
3488}
3489
3490void rtllib_softmac_free(struct rtllib_device *ieee)
3491{
3492 down(&ieee->wx_sem);
3493#ifdef ENABLE_DOT11D
3494 if (NULL != ieee->pDot11dInfo)
3495 {
3496 kfree(ieee->pDot11dInfo);
3497 ieee->pDot11dInfo = NULL;
3498 }
3499#endif
3500 del_timer_sync(&ieee->associate_timer);
3501
3502#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
3503 cancel_delayed_work(&ieee->associate_retry_wq);
3504 destroy_workqueue(ieee->wq);
3505#endif
3506
3507 up(&ieee->wx_sem);
3508}
3509
3510/********************************************************
3511 * Start of WPA code. *
3512 * this is stolen from the ipw2200 driver *
3513 ********************************************************/
3514
3515
3516static int rtllib_wpa_enable(struct rtllib_device *ieee, int value)
3517{
3518 /* This is called when wpa_supplicant loads and closes the driver
3519 * interface. */
3520 printk("%s WPA\n",value ? "enabling" : "disabling");
3521 ieee->wpa_enabled = value;
3522 memset(ieee->ap_mac_addr, 0, 6);
3523 return 0;
3524}
3525
3526
3527void rtllib_wpa_assoc_frame(struct rtllib_device *ieee, char *wpa_ie, int wpa_ie_len)
3528{
3529 /* make sure WPA is enabled */
3530 rtllib_wpa_enable(ieee, 1);
3531
3532 rtllib_disassociate(ieee);
3533}
3534
3535
3536static int rtllib_wpa_mlme(struct rtllib_device *ieee, int command, int reason)
3537{
3538
3539 int ret = 0;
3540
3541 switch (command) {
3542 case IEEE_MLME_STA_DEAUTH:
3543 break;
3544
3545 case IEEE_MLME_STA_DISASSOC:
3546 rtllib_disassociate(ieee);
3547 break;
3548
3549 default:
3550 printk("Unknown MLME request: %d\n", command);
3551 ret = -EOPNOTSUPP;
3552 }
3553
3554 return ret;
3555}
3556
3557
3558static int rtllib_wpa_set_wpa_ie(struct rtllib_device *ieee,
3559 struct ieee_param *param, int plen)
3560{
3561 u8 *buf;
3562
3563 if (param->u.wpa_ie.len > MAX_WPA_IE_LEN ||
3564 (param->u.wpa_ie.len && param->u.wpa_ie.data == NULL))
3565 return -EINVAL;
3566
3567 if (param->u.wpa_ie.len) {
3568 buf = kmalloc(param->u.wpa_ie.len, GFP_KERNEL);
3569 if (buf == NULL)
3570 return -ENOMEM;
3571
3572 memcpy(buf, param->u.wpa_ie.data, param->u.wpa_ie.len);
3573 kfree(ieee->wpa_ie);
3574 ieee->wpa_ie = buf;
3575 ieee->wpa_ie_len = param->u.wpa_ie.len;
3576 } else {
3577 kfree(ieee->wpa_ie);
3578 ieee->wpa_ie = NULL;
3579 ieee->wpa_ie_len = 0;
3580 }
3581
3582 rtllib_wpa_assoc_frame(ieee, ieee->wpa_ie, ieee->wpa_ie_len);
3583 return 0;
3584}
3585
3586#define AUTH_ALG_OPEN_SYSTEM 0x1
3587#define AUTH_ALG_SHARED_KEY 0x2
3588#define AUTH_ALG_LEAP 0x4
3589static int rtllib_wpa_set_auth_algs(struct rtllib_device *ieee, int value)
3590{
3591
3592 struct rtllib_security sec = {
3593 .flags = SEC_AUTH_MODE,
3594 };
3595 int ret = 0;
3596
3597 if (value & AUTH_ALG_SHARED_KEY) {
3598 sec.auth_mode = WLAN_AUTH_SHARED_KEY;
3599 ieee->open_wep = 0;
3600 ieee->auth_mode = 1;
3601 } else if (value & AUTH_ALG_OPEN_SYSTEM){
3602 sec.auth_mode = WLAN_AUTH_OPEN;
3603 ieee->open_wep = 1;
3604 ieee->auth_mode = 0;
3605 }
3606 else if (value & AUTH_ALG_LEAP){
3607 sec.auth_mode = WLAN_AUTH_LEAP >> 6;
3608 ieee->open_wep = 1;
3609 ieee->auth_mode = 2;
3610 }
3611
3612
3613 if (ieee->set_security)
3614 ieee->set_security(ieee->dev, &sec);
3615
3616 return ret;
3617}
3618
3619static int rtllib_wpa_set_param(struct rtllib_device *ieee, u8 name, u32 value)
3620{
3621 int ret=0;
3622 unsigned long flags;
3623
3624 switch (name) {
3625 case IEEE_PARAM_WPA_ENABLED:
3626 ret = rtllib_wpa_enable(ieee, value);
3627 break;
3628
3629 case IEEE_PARAM_TKIP_COUNTERMEASURES:
3630 ieee->tkip_countermeasures=value;
3631 break;
3632
3633 case IEEE_PARAM_DROP_UNENCRYPTED:
3634 {
3635 /* HACK:
3636 *
3637 * wpa_supplicant calls set_wpa_enabled when the driver
3638 * is loaded and unloaded, regardless of if WPA is being
3639 * used. No other calls are made which can be used to
3640 * determine if encryption will be used or not prior to
3641 * association being expected. If encryption is not being
3642 * used, drop_unencrypted is set to false, else true -- we
3643 * can use this to determine if the CAP_PRIVACY_ON bit should
3644 * be set.
3645 */
3646 struct rtllib_security sec = {
3647 .flags = SEC_ENABLED,
3648 .enabled = value,
3649 };
3650 ieee->drop_unencrypted = value;
3651 /* We only change SEC_LEVEL for open mode. Others
3652 * are set by ipw_wpa_set_encryption.
3653 */
3654 if (!value) {
3655 sec.flags |= SEC_LEVEL;
3656 sec.level = SEC_LEVEL_0;
3657 }
3658 else {
3659 sec.flags |= SEC_LEVEL;
3660 sec.level = SEC_LEVEL_1;
3661 }
3662 if (ieee->set_security)
3663 ieee->set_security(ieee->dev, &sec);
3664 break;
3665 }
3666
3667 case IEEE_PARAM_PRIVACY_INVOKED:
3668 ieee->privacy_invoked=value;
3669 break;
3670
3671 case IEEE_PARAM_AUTH_ALGS:
3672 ret = rtllib_wpa_set_auth_algs(ieee, value);
3673 break;
3674
3675 case IEEE_PARAM_IEEE_802_1X:
3676 ieee->ieee802_1x=value;
3677 break;
3678 case IEEE_PARAM_WPAX_SELECT:
3679 spin_lock_irqsave(&ieee->wpax_suitlist_lock,flags);
3680 spin_unlock_irqrestore(&ieee->wpax_suitlist_lock,flags);
3681 break;
3682
3683 default:
3684 printk("Unknown WPA param: %d\n",name);
3685 ret = -EOPNOTSUPP;
3686 }
3687
3688 return ret;
3689}
3690
3691/* implementation borrowed from hostap driver */
3692static int rtllib_wpa_set_encryption(struct rtllib_device *ieee,
3693 struct ieee_param *param, int param_len, u8 is_mesh)
3694{
3695 int ret = 0;
3696 struct rtllib_crypto_ops *ops;
3697 struct rtllib_crypt_data **crypt;
3698
3699 struct rtllib_security sec = {
3700 .flags = 0,
3701 };
3702
3703 param->u.crypt.err = 0;
3704 param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0';
3705
3706 if (param_len !=
3707 (int) ((char *) param->u.crypt.key - (char *) param) +
3708 param->u.crypt.key_len) {
3709 printk("Len mismatch %d, %d\n", param_len,
3710 param->u.crypt.key_len);
3711 return -EINVAL;
3712 }
3713 if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff &&
3714 param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff &&
3715 param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) {
3716 if (param->u.crypt.idx >= WEP_KEYS)
3717 return -EINVAL;
3718 crypt = &ieee->crypt[param->u.crypt.idx];
3719 } else {
3720 return -EINVAL;
3721 }
3722
3723 if (strcmp(param->u.crypt.alg, "none") == 0) {
3724 if (crypt) {
3725 sec.enabled = 0;
3726 sec.level = SEC_LEVEL_0;
3727 sec.flags |= SEC_ENABLED | SEC_LEVEL;
3728 rtllib_crypt_delayed_deinit(ieee, crypt);
3729 }
3730 goto done;
3731 }
3732 sec.enabled = 1;
3733 sec.flags |= SEC_ENABLED;
3734
3735 /* IPW HW cannot build TKIP MIC, host decryption still needed. */
3736 if (!(ieee->host_encrypt || ieee->host_decrypt) &&
3737 strcmp(param->u.crypt.alg, "TKIP"))
3738 goto skip_host_crypt;
3739
3740 ops = rtllib_get_crypto_ops(param->u.crypt.alg);
3741 if (ops == NULL && strcmp(param->u.crypt.alg, "WEP") == 0) {
3742 request_module("rtllib_crypt_wep");
3743 ops = rtllib_get_crypto_ops(param->u.crypt.alg);
3744 } else if (ops == NULL && strcmp(param->u.crypt.alg, "TKIP") == 0) {
3745 request_module("rtllib_crypt_tkip");
3746 ops = rtllib_get_crypto_ops(param->u.crypt.alg);
3747 } else if (ops == NULL && strcmp(param->u.crypt.alg, "CCMP") == 0) {
3748 request_module("rtllib_crypt_ccmp");
3749 ops = rtllib_get_crypto_ops(param->u.crypt.alg);
3750 }
3751 if (ops == NULL) {
3752 printk("unknown crypto alg '%s'\n", param->u.crypt.alg);
3753 param->u.crypt.err = IEEE_CRYPT_ERR_UNKNOWN_ALG;
3754 ret = -EINVAL;
3755 goto done;
3756 }
3757 if (*crypt == NULL || (*crypt)->ops != ops) {
3758 struct rtllib_crypt_data *new_crypt;
3759
3760 rtllib_crypt_delayed_deinit(ieee, crypt);
3761
3762 new_crypt = (struct rtllib_crypt_data *)
3763 kmalloc(sizeof(*new_crypt), GFP_KERNEL);
3764 if (new_crypt == NULL) {
3765 ret = -ENOMEM;
3766 goto done;
3767 }
3768 memset(new_crypt, 0, sizeof(struct rtllib_crypt_data));
3769 new_crypt->ops = ops;
3770 if (new_crypt->ops)
3771 new_crypt->priv =
3772 new_crypt->ops->init(param->u.crypt.idx);
3773
3774 if (new_crypt->priv == NULL) {
3775 kfree(new_crypt);
3776 param->u.crypt.err = IEEE_CRYPT_ERR_CRYPT_INIT_FAILED;
3777 ret = -EINVAL;
3778 goto done;
3779 }
3780
3781 *crypt = new_crypt;
3782 }
3783
3784 if (param->u.crypt.key_len > 0 && (*crypt)->ops->set_key &&
3785 (*crypt)->ops->set_key(param->u.crypt.key,
3786 param->u.crypt.key_len, param->u.crypt.seq,
3787 (*crypt)->priv) < 0) {
3788 printk("key setting failed\n");
3789 param->u.crypt.err = IEEE_CRYPT_ERR_KEY_SET_FAILED;
3790 ret = -EINVAL;
3791 goto done;
3792 }
3793
3794 skip_host_crypt:
3795 if (param->u.crypt.set_tx) {
3796 ieee->tx_keyidx = param->u.crypt.idx;
3797 sec.active_key = param->u.crypt.idx;
3798 sec.flags |= SEC_ACTIVE_KEY;
3799 } else
3800 sec.flags &= ~SEC_ACTIVE_KEY;
3801
3802 if (param->u.crypt.alg != NULL) {
3803 memcpy(sec.keys[param->u.crypt.idx],
3804 param->u.crypt.key,
3805 param->u.crypt.key_len);
3806 sec.key_sizes[param->u.crypt.idx] = param->u.crypt.key_len;
3807 sec.flags |= (1 << param->u.crypt.idx);
3808
3809 if (strcmp(param->u.crypt.alg, "WEP") == 0) {
3810 sec.flags |= SEC_LEVEL;
3811 sec.level = SEC_LEVEL_1;
3812 } else if (strcmp(param->u.crypt.alg, "TKIP") == 0) {
3813 sec.flags |= SEC_LEVEL;
3814 sec.level = SEC_LEVEL_2;
3815 } else if (strcmp(param->u.crypt.alg, "CCMP") == 0) {
3816 sec.flags |= SEC_LEVEL;
3817 sec.level = SEC_LEVEL_3;
3818 }
3819 }
3820 done:
3821 if (ieee->set_security)
3822 ieee->set_security(ieee->dev, &sec);
3823
3824 /* Do not reset port if card is in Managed mode since resetting will
3825 * generate new IEEE 802.11 authentication which may end up in looping
3826 * with IEEE 802.1X. If your hardware requires a reset after WEP
3827 * configuration (for example... Prism2), implement the reset_port in
3828 * the callbacks structures used to initialize the 802.11 stack. */
3829 if (ieee->reset_on_keychange &&
3830 ieee->iw_mode != IW_MODE_INFRA &&
3831 ieee->reset_port &&
3832 ieee->reset_port(ieee->dev)) {
3833 printk("reset_port failed\n");
3834 param->u.crypt.err = IEEE_CRYPT_ERR_CARD_CONF_FAILED;
3835 return -EINVAL;
3836 }
3837
3838 return ret;
3839}
3840
3841inline struct sk_buff *rtllib_disauth_skb( struct rtllib_network *beacon,
3842 struct rtllib_device *ieee, u16 asRsn)
3843{
3844 struct sk_buff *skb;
3845 struct rtllib_disauth *disauth;
3846#ifdef USB_USE_ALIGNMENT
3847 u32 Tmpaddr=0;
3848 int alignment=0;
3849 int len = sizeof(struct rtllib_disauth) + ieee->tx_headroom + USB_512B_ALIGNMENT_SIZE;
3850#else
3851 int len = sizeof(struct rtllib_disauth) + ieee->tx_headroom;
3852
3853#endif
3854 skb = dev_alloc_skb(len);
3855 if (!skb) {
3856 return NULL;
3857 }
3858
3859#ifdef USB_USE_ALIGNMENT
3860 Tmpaddr = (u32)skb->data;
3861 alignment = Tmpaddr & 0x1ff;
3862 skb_reserve(skb,(USB_512B_ALIGNMENT_SIZE - alignment));
3863#endif
3864 skb_reserve(skb, ieee->tx_headroom);
3865
3866 disauth = (struct rtllib_disauth *) skb_put(skb,sizeof(struct rtllib_disauth));
3867 disauth->header.frame_ctl = cpu_to_le16(RTLLIB_STYPE_DEAUTH);
3868 disauth->header.duration_id = 0;
3869
3870 memcpy(disauth->header.addr1, beacon->bssid, ETH_ALEN);
3871 memcpy(disauth->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
3872 memcpy(disauth->header.addr3, beacon->bssid, ETH_ALEN);
3873
3874 disauth->reason = cpu_to_le16(asRsn);
3875 return skb;
3876}
3877
3878inline struct sk_buff *rtllib_disassociate_skb( struct rtllib_network *beacon,
3879 struct rtllib_device *ieee, u16 asRsn)
3880{
3881 struct sk_buff *skb;
3882 struct rtllib_disassoc *disass;
3883#ifdef USB_USE_ALIGNMENT
3884 u32 Tmpaddr=0;
3885 int alignment=0;
3886 int len = sizeof(struct rtllib_disassoc) + ieee->tx_headroom + USB_512B_ALIGNMENT_SIZE;
3887#else
3888 int len = sizeof(struct rtllib_disassoc) + ieee->tx_headroom;
3889#endif
3890 skb = dev_alloc_skb(len);
3891
3892 if (!skb) {
3893 return NULL;
3894 }
3895
3896#ifdef USB_USE_ALIGNMENT
3897 Tmpaddr = (u32)skb->data;
3898 alignment = Tmpaddr & 0x1ff;
3899 skb_reserve(skb,(USB_512B_ALIGNMENT_SIZE - alignment));
3900#endif
3901 skb_reserve(skb, ieee->tx_headroom);
3902
3903 disass = (struct rtllib_disassoc *) skb_put(skb,sizeof(struct rtllib_disassoc));
3904 disass->header.frame_ctl = cpu_to_le16(RTLLIB_STYPE_DISASSOC);
3905 disass->header.duration_id = 0;
3906
3907 memcpy(disass->header.addr1, beacon->bssid, ETH_ALEN);
3908 memcpy(disass->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
3909 memcpy(disass->header.addr3, beacon->bssid, ETH_ALEN);
3910
3911 disass->reason = cpu_to_le16(asRsn);
3912 return skb;
3913}
3914
3915void SendDisassociation(struct rtllib_device *ieee, bool deauth, u16 asRsn)
3916{
3917 struct rtllib_network *beacon = &ieee->current_network;
3918 struct sk_buff *skb;
3919
3920 if (deauth) {
3921 skb = rtllib_disauth_skb(beacon,ieee,asRsn);
3922 } else {
3923 skb = rtllib_disassociate_skb(beacon,ieee,asRsn);
3924 }
3925
3926 if (skb){
3927 softmac_mgmt_xmit(skb, ieee);
3928 }
3929}
3930
3931u8 rtllib_ap_sec_type(struct rtllib_device *ieee)
3932{
3933 static u8 ccmp_ie[4] = {0x00,0x50,0xf2,0x04};
3934 static u8 ccmp_rsn_ie[4] = {0x00, 0x0f, 0xac, 0x04};
3935 int wpa_ie_len= ieee->wpa_ie_len;
3936 struct rtllib_crypt_data* crypt;
3937 int encrypt;
3938
3939 crypt = ieee->crypt[ieee->tx_keyidx];
3940 encrypt = (ieee->current_network.capability & WLAN_CAPABILITY_PRIVACY) ||\
3941 (ieee->host_encrypt && crypt && crypt->ops && \
3942 (0 == strcmp(crypt->ops->name,"WEP")));
3943
3944 /* simply judge */
3945 if (encrypt && (wpa_ie_len == 0)) {
3946 return SEC_ALG_WEP;
3947 } else if ((wpa_ie_len != 0)) {
3948 if (((ieee->wpa_ie[0] == 0xdd) && (!memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) ||
3949 ((ieee->wpa_ie[0] == 0x30) && (!memcmp(&ieee->wpa_ie[10],ccmp_rsn_ie, 4))))
3950 return SEC_ALG_CCMP;
3951 else
3952 return SEC_ALG_TKIP;
3953 } else {
3954 return SEC_ALG_NONE;
3955 }
3956}
3957
3958int rtllib_wpa_supplicant_ioctl(struct rtllib_device *ieee, struct iw_point *p, u8 is_mesh)
3959{
3960 struct ieee_param *param;
3961 int ret=0;
3962
3963 down(&ieee->wx_sem);
3964
3965 if (p->length < sizeof(struct ieee_param) || !p->pointer){
3966 ret = -EINVAL;
3967 goto out;
3968 }
3969
3970 param = (struct ieee_param *)kmalloc(p->length, GFP_KERNEL);
3971 if (param == NULL){
3972 ret = -ENOMEM;
3973 goto out;
3974 }
3975 if (copy_from_user(param, p->pointer, p->length)) {
3976 kfree(param);
3977 ret = -EFAULT;
3978 goto out;
3979 }
3980
3981 switch (param->cmd) {
3982
3983 case IEEE_CMD_SET_WPA_PARAM:
3984 ret = rtllib_wpa_set_param(ieee, param->u.wpa_param.name,
3985 param->u.wpa_param.value);
3986 break;
3987
3988 case IEEE_CMD_SET_WPA_IE:
3989 ret = rtllib_wpa_set_wpa_ie(ieee, param, p->length);
3990 break;
3991
3992 case IEEE_CMD_SET_ENCRYPTION:
3993 ret = rtllib_wpa_set_encryption(ieee, param, p->length, 0);
3994 break;
3995
3996 case IEEE_CMD_MLME:
3997 ret = rtllib_wpa_mlme(ieee, param->u.mlme.command,
3998 param->u.mlme.reason_code);
3999 break;
4000
4001 default:
4002 printk("Unknown WPA supplicant request: %d\n",param->cmd);
4003 ret = -EOPNOTSUPP;
4004 break;
4005 }
4006
4007 if (ret == 0 && copy_to_user(p->pointer, param, p->length))
4008 ret = -EFAULT;
4009
4010 kfree(param);
4011out:
4012 up(&ieee->wx_sem);
4013
4014 return ret;
4015}
4016
4017void
4018rtllib_MgntDisconnectIBSS(struct rtllib_device* rtllib)
4019{
4020 u8 OpMode;
4021 u8 i;
4022 bool bFilterOutNonAssociatedBSSID = false;
4023
4024 rtllib->state = RTLLIB_NOLINK;
4025
4026 for (i=0;i<6;i++) rtllib->current_network.bssid[i]= 0x55;
4027
4028 rtllib->OpMode = RT_OP_MODE_NO_LINK;
4029 rtllib->SetHwRegHandler(rtllib->dev, HW_VAR_BSSID, rtllib->current_network.bssid);
4030 OpMode = RT_OP_MODE_NO_LINK;
4031 rtllib->SetHwRegHandler(rtllib->dev, HW_VAR_MEDIA_STATUS, &OpMode);
4032 rtllib_stop_send_beacons(rtllib);
4033
4034 bFilterOutNonAssociatedBSSID = false;
4035 rtllib->SetHwRegHandler(rtllib->dev, HW_VAR_CECHK_BSSID, (u8*)(&bFilterOutNonAssociatedBSSID));
4036 notify_wx_assoc_event(rtllib);
4037
4038}
4039
4040void
4041rtllib_MlmeDisassociateRequest(
4042 struct rtllib_device* rtllib,
4043 u8* asSta,
4044 u8 asRsn
4045 )
4046{
4047 u8 i;
4048 u8 OpMode;
4049
4050 RemovePeerTS(rtllib, asSta);
4051
4052
4053 if (memcpy(rtllib->current_network.bssid,asSta,6) == 0)
4054 {
4055 rtllib->state = RTLLIB_NOLINK;
4056
4057 for (i=0;i<6;i++) rtllib->current_network.bssid[i] = 0x22;
4058 OpMode = RT_OP_MODE_NO_LINK;
4059 rtllib->OpMode = RT_OP_MODE_NO_LINK;
4060 rtllib->SetHwRegHandler(rtllib->dev, HW_VAR_MEDIA_STATUS, (u8 *)(&OpMode) );
4061 rtllib_disassociate(rtllib);
4062
4063 rtllib->SetHwRegHandler(rtllib->dev, HW_VAR_BSSID, rtllib->current_network.bssid);
4064
4065 }
4066
4067}
4068
4069void
4070rtllib_MgntDisconnectAP(
4071 struct rtllib_device* rtllib,
4072 u8 asRsn
4073)
4074{
4075 bool bFilterOutNonAssociatedBSSID = false;
4076
4077
4078#ifdef TO_DO
4079 if ( pMgntInfo->SecurityInfo.AuthMode > RT_802_11AuthModeAutoSwitch ||
4080 (pMgntInfo->bAPSuportCCKM && pMgntInfo->bCCX8021xenable) )
4081 {
4082 SecClearAllKeys(rtllib->dev);
4083 RT_TRACE(COMP_SEC, DBG_LOUD,("======>CCKM clear key..."))
4084 }
4085#endif
4086 bFilterOutNonAssociatedBSSID = false;
4087 rtllib->SetHwRegHandler(rtllib->dev, HW_VAR_CECHK_BSSID, (u8*)(&bFilterOutNonAssociatedBSSID));
4088 rtllib_MlmeDisassociateRequest( rtllib, rtllib->current_network.bssid, asRsn );
4089
4090 rtllib->state = RTLLIB_NOLINK;
4091}
4092
4093bool
4094rtllib_MgntDisconnect(
4095 struct rtllib_device* rtllib,
4096 u8 asRsn
4097)
4098{
4099 if (rtllib->ps != RTLLIB_PS_DISABLED)
4100 {
4101#ifndef RTL8190P
4102 rtllib->sta_wake_up(rtllib->dev);
4103#endif
4104 }
4105
4106#ifdef TO_DO
4107 if (pMgntInfo->mActingAsAp)
4108 {
4109 RT_TRACE(COMP_MLME, DBG_LOUD, ("MgntDisconnect() ===> AP_DisassociateAllStation\n"));
4110 AP_DisassociateAllStation(rtllib->dev, unspec_reason);
4111 return true;
4112 }
4113#endif
4114
4115 if ( rtllib->state == RTLLIB_LINKED )
4116 {
4117 if ( rtllib->iw_mode == IW_MODE_ADHOC )
4118 {
4119 rtllib_MgntDisconnectIBSS(rtllib);
4120 }
4121 if ( rtllib->iw_mode == IW_MODE_INFRA )
4122 {
4123#ifdef TO_DO_LIST
4124 SecClearAllKeys(Adapter);
4125#endif
4126 rtllib_MgntDisconnectAP(rtllib, asRsn);
4127 }
4128
4129 }
4130
4131 return true;
4132}
4133
4134void notify_wx_assoc_event(struct rtllib_device *ieee)
4135{
4136 union iwreq_data wrqu;
4137
4138 if (ieee->cannot_notify)
4139 return;
4140
4141 wrqu.ap_addr.sa_family = ARPHRD_ETHER;
4142 if (ieee->state == RTLLIB_LINKED)
4143 memcpy(wrqu.ap_addr.sa_data, ieee->current_network.bssid, ETH_ALEN);
4144 else{
4145
4146 printk("%s(): Tell user space disconnected\n",__func__);
4147 memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
4148 }
4149 wireless_send_event(ieee->dev, SIOCGIWAP, &wrqu, NULL);
4150}
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac_wx.c b/drivers/staging/rtl8192e/rtllib_softmac_wx.c
index d8a068e32e5..7cda2908bae 100644
--- a/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac_wx.c
+++ b/drivers/staging/rtl8192e/rtllib_softmac_wx.c
@@ -14,13 +14,14 @@
14 */ 14 */
15 15
16 16
17#include "ieee80211.h" 17#include "rtllib.h"
18#include "rtl_core.h"
18#ifdef ENABLE_DOT11D 19#ifdef ENABLE_DOT11D
19#include "dot11d.h" 20#include "dot11d.h"
20#endif 21#endif
21/* FIXME: add A freqs */ 22/* FIXME: add A freqs */
22 23
23const long ieee80211_wlan_frequencies[] = { 24const long rtllib_wlan_frequencies[] = {
24 2412, 2417, 2422, 2427, 25 2412, 2417, 2422, 2427,
25 2432, 2437, 2442, 2447, 26 2432, 2437, 2442, 2447,
26 2452, 2457, 2462, 2467, 27 2452, 2457, 2462, 2467,
@@ -28,7 +29,7 @@ const long ieee80211_wlan_frequencies[] = {
28}; 29};
29 30
30 31
31int ieee80211_wx_set_freq(struct ieee80211_device *ieee, struct iw_request_info *a, 32int rtllib_wx_set_freq(struct rtllib_device *ieee, struct iw_request_info *a,
32 union iwreq_data *wrqu, char *b) 33 union iwreq_data *wrqu, char *b)
33{ 34{
34 int ret; 35 int ret;
@@ -36,8 +37,8 @@ int ieee80211_wx_set_freq(struct ieee80211_device *ieee, struct iw_request_info
36 37
37 down(&ieee->wx_sem); 38 down(&ieee->wx_sem);
38 39
39 if(ieee->iw_mode == IW_MODE_INFRA){ 40 if (ieee->iw_mode == IW_MODE_INFRA){
40 ret = -EOPNOTSUPP; 41 ret = 0;
41 goto out; 42 goto out;
42 } 43 }
43 44
@@ -48,7 +49,7 @@ int ieee80211_wx_set_freq(struct ieee80211_device *ieee, struct iw_request_info
48 int f = fwrq->m / 100000; 49 int f = fwrq->m / 100000;
49 int c = 0; 50 int c = 0;
50 51
51 while ((c < 14) && (f != ieee80211_wlan_frequencies[c])) 52 while ((c < 14) && (f != rtllib_wlan_frequencies[c]))
52 c++; 53 c++;
53 54
54 /* hack to fall through */ 55 /* hack to fall through */
@@ -64,19 +65,19 @@ int ieee80211_wx_set_freq(struct ieee80211_device *ieee, struct iw_request_info
64 }else { /* Set the channel */ 65 }else { /* Set the channel */
65 66
66#ifdef ENABLE_DOT11D 67#ifdef ENABLE_DOT11D
67 if (!(GET_DOT11D_INFO(ieee)->channel_map)[fwrq->m]) { 68 if (ieee->active_channel_map[fwrq->m] != 1) {
68 ret = -EINVAL; 69 ret = -EINVAL;
69 goto out; 70 goto out;
70 } 71 }
71#endif 72#endif
72 ieee->current_network.channel = fwrq->m; 73 ieee->current_network.channel = fwrq->m;
73 ieee->set_chan(ieee, ieee->current_network.channel); 74 ieee->set_chan(ieee->dev, ieee->current_network.channel);
74 75
75 if(ieee->iw_mode == IW_MODE_ADHOC || ieee->iw_mode == IW_MODE_MASTER) 76 if (ieee->iw_mode == IW_MODE_ADHOC || ieee->iw_mode == IW_MODE_MASTER)
76 if(ieee->state == IEEE80211_LINKED){ 77 if (ieee->state == RTLLIB_LINKED){
77 78
78 ieee80211_stop_send_beacons(ieee); 79 rtllib_stop_send_beacons(ieee);
79 ieee80211_start_send_beacons(ieee); 80 rtllib_start_send_beacons(ieee);
80 } 81 }
81 } 82 }
82 83
@@ -87,7 +88,7 @@ out:
87} 88}
88 89
89 90
90int ieee80211_wx_get_freq(struct ieee80211_device *ieee, 91int rtllib_wx_get_freq(struct rtllib_device *ieee,
91 struct iw_request_info *a, 92 struct iw_request_info *a,
92 union iwreq_data *wrqu, char *b) 93 union iwreq_data *wrqu, char *b)
93{ 94{
@@ -95,18 +96,17 @@ int ieee80211_wx_get_freq(struct ieee80211_device *ieee,
95 96
96 if (ieee->current_network.channel == 0) 97 if (ieee->current_network.channel == 0)
97 return -1; 98 return -1;
98 //NM 0.7.0 will not accept channel any more. 99 fwrq->m = rtllib_wlan_frequencies[ieee->current_network.channel-1] * 100000;
99 fwrq->m = ieee80211_wlan_frequencies[ieee->current_network.channel-1] * 100000;
100 fwrq->e = 1; 100 fwrq->e = 1;
101
102 return 0; 101 return 0;
103} 102}
104 103
105int ieee80211_wx_get_wap(struct ieee80211_device *ieee, 104int rtllib_wx_get_wap(struct rtllib_device *ieee,
106 struct iw_request_info *info, 105 struct iw_request_info *info,
107 union iwreq_data *wrqu, char *extra) 106 union iwreq_data *wrqu, char *extra)
108{ 107{
109 unsigned long flags; 108 unsigned long flags;
109
110 wrqu->ap_addr.sa_family = ARPHRD_ETHER; 110 wrqu->ap_addr.sa_family = ARPHRD_ETHER;
111 111
112 if (ieee->iw_mode == IW_MODE_MONITOR) 112 if (ieee->iw_mode == IW_MODE_MONITOR)
@@ -115,8 +115,8 @@ int ieee80211_wx_get_wap(struct ieee80211_device *ieee,
115 /* We want avoid to give to the user inconsistent infos*/ 115 /* We want avoid to give to the user inconsistent infos*/
116 spin_lock_irqsave(&ieee->lock, flags); 116 spin_lock_irqsave(&ieee->lock, flags);
117 117
118 if (ieee->state != IEEE80211_LINKED && 118 if (ieee->state != RTLLIB_LINKED &&
119 ieee->state != IEEE80211_LINKED_SCANNING && 119 ieee->state != RTLLIB_LINKED_SCANNING &&
120 ieee->wap_set == 0) 120 ieee->wap_set == 0)
121 121
122 memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN); 122 memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN);
@@ -130,7 +130,7 @@ int ieee80211_wx_get_wap(struct ieee80211_device *ieee,
130} 130}
131 131
132 132
133int ieee80211_wx_set_wap(struct ieee80211_device *ieee, 133int rtllib_wx_set_wap(struct rtllib_device *ieee,
134 struct iw_request_info *info, 134 struct iw_request_info *info,
135 union iwreq_data *awrq, 135 union iwreq_data *awrq,
136 char *extra) 136 char *extra)
@@ -140,10 +140,10 @@ int ieee80211_wx_set_wap(struct ieee80211_device *ieee,
140 u8 zero[] = {0,0,0,0,0,0}; 140 u8 zero[] = {0,0,0,0,0,0};
141 unsigned long flags; 141 unsigned long flags;
142 142
143 short ifup = ieee->proto_started;//dev->flags & IFF_UP; 143 short ifup = ieee->proto_started;
144 struct sockaddr *temp = (struct sockaddr *)awrq; 144 struct sockaddr *temp = (struct sockaddr *)awrq;
145 145
146 ieee->sync_scan_hurryup = 1; 146 rtllib_stop_scan_syncro(ieee);
147 147
148 down(&ieee->wx_sem); 148 down(&ieee->wx_sem);
149 /* use ifconfig hw ether */ 149 /* use ifconfig hw ether */
@@ -157,27 +157,38 @@ int ieee80211_wx_set_wap(struct ieee80211_device *ieee,
157 goto out; 157 goto out;
158 } 158 }
159 159
160 if (memcmp(temp->sa_data, zero,ETH_ALEN) == 0){
161 spin_lock_irqsave(&ieee->lock, flags);
162 memcpy(ieee->current_network.bssid, temp->sa_data, ETH_ALEN);
163 ieee->wap_set = 0;
164 spin_unlock_irqrestore(&ieee->lock, flags);
165 ret = -1;
166 goto out;
167 }
168
169
160 if (ifup) 170 if (ifup)
161 ieee80211_stop_protocol(ieee,true); 171 rtllib_stop_protocol(ieee,true);
162 172
163 /* just to avoid to give inconsistent infos in the 173 /* just to avoid to give inconsistent infos in the
164 * get wx method. not really needed otherwise 174 * get wx method. not really needed otherwise
165 */ 175 */
166 spin_lock_irqsave(&ieee->lock, flags); 176 spin_lock_irqsave(&ieee->lock, flags);
167 177
178 ieee->cannot_notify = false;
168 memcpy(ieee->current_network.bssid, temp->sa_data, ETH_ALEN); 179 memcpy(ieee->current_network.bssid, temp->sa_data, ETH_ALEN);
169 ieee->wap_set = memcmp(temp->sa_data, zero,ETH_ALEN)!=0; 180 ieee->wap_set = (memcmp(temp->sa_data, zero,ETH_ALEN)!=0);
170 181
171 spin_unlock_irqrestore(&ieee->lock, flags); 182 spin_unlock_irqrestore(&ieee->lock, flags);
172 183
173 if (ifup) 184 if (ifup)
174 ieee80211_start_protocol(ieee); 185 rtllib_start_protocol(ieee);
175out: 186out:
176 up(&ieee->wx_sem); 187 up(&ieee->wx_sem);
177 return ret; 188 return ret;
178} 189}
179 190
180 int ieee80211_wx_get_essid(struct ieee80211_device *ieee, struct iw_request_info *a,union iwreq_data *wrqu,char *b) 191 int rtllib_wx_get_essid(struct rtllib_device *ieee, struct iw_request_info *a,union iwreq_data *wrqu,char *b)
181{ 192{
182 int len,ret = 0; 193 int len,ret = 0;
183 unsigned long flags; 194 unsigned long flags;
@@ -194,8 +205,8 @@ out:
194 goto out; 205 goto out;
195 } 206 }
196 207
197 if (ieee->state != IEEE80211_LINKED && 208 if (ieee->state != RTLLIB_LINKED &&
198 ieee->state != IEEE80211_LINKED_SCANNING && 209 ieee->state != RTLLIB_LINKED_SCANNING &&
199 ieee->ssid_set == 0){ 210 ieee->ssid_set == 0){
200 ret = -1; 211 ret = -1;
201 goto out; 212 goto out;
@@ -212,7 +223,7 @@ out:
212 223
213} 224}
214 225
215int ieee80211_wx_set_rate(struct ieee80211_device *ieee, 226int rtllib_wx_set_rate(struct rtllib_device *ieee,
216 struct iw_request_info *info, 227 struct iw_request_info *info,
217 union iwreq_data *wrqu, char *extra) 228 union iwreq_data *wrqu, char *extra)
218{ 229{
@@ -220,26 +231,37 @@ int ieee80211_wx_set_rate(struct ieee80211_device *ieee,
220 u32 target_rate = wrqu->bitrate.value; 231 u32 target_rate = wrqu->bitrate.value;
221 232
222 ieee->rate = target_rate/100000; 233 ieee->rate = target_rate/100000;
223 //FIXME: we might want to limit rate also in management protocols.
224 return 0; 234 return 0;
225} 235}
226 236
227 237int rtllib_wx_get_rate(struct rtllib_device *ieee,
228
229int ieee80211_wx_get_rate(struct ieee80211_device *ieee,
230 struct iw_request_info *info, 238 struct iw_request_info *info,
231 union iwreq_data *wrqu, char *extra) 239 union iwreq_data *wrqu, char *extra)
232{ 240{
233 u32 tmp_rate; 241 u32 tmp_rate = 0;
234 tmp_rate = TxCountToDataRate(ieee, ieee->softmac_stats.CurrentShowTxate); 242#if defined RTL8192SU
235 243 if (ieee->mode & (IEEE_A | IEEE_B | IEEE_G))
244 tmp_rate = ieee->rate;
245 else if (ieee->mode & IEEE_N_5G)
246 tmp_rate = 580;
247 else if (ieee->mode & IEEE_N_24G) {
248 if (ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev))
249 tmp_rate = HTHalfMcsToDataRate(ieee, 15);
250 else
251 tmp_rate = HTMcsToDataRate(ieee, 15);
252 }
253#elif defined RTL8192SE || defined RTL8192CE
254 tmp_rate = ieee->rtl_11n_user_show_rates(ieee->dev);
255#else
256 tmp_rate = TxCountToDataRate(ieee, ieee->softmac_stats.CurrentShowTxate);
257#endif
236 wrqu->bitrate.value = tmp_rate * 500000; 258 wrqu->bitrate.value = tmp_rate * 500000;
237 259
238 return 0; 260 return 0;
239} 261}
240 262
241 263
242int ieee80211_wx_set_rts(struct ieee80211_device *ieee, 264int rtllib_wx_set_rts(struct rtllib_device *ieee,
243 struct iw_request_info *info, 265 struct iw_request_info *info,
244 union iwreq_data *wrqu, char *extra) 266 union iwreq_data *wrqu, char *extra)
245{ 267{
@@ -255,7 +277,7 @@ int ieee80211_wx_set_rts(struct ieee80211_device *ieee,
255 return 0; 277 return 0;
256} 278}
257 279
258int ieee80211_wx_get_rts(struct ieee80211_device *ieee, 280int rtllib_wx_get_rts(struct rtllib_device *ieee,
259 struct iw_request_info *info, 281 struct iw_request_info *info,
260 union iwreq_data *wrqu, char *extra) 282 union iwreq_data *wrqu, char *extra)
261{ 283{
@@ -264,113 +286,145 @@ int ieee80211_wx_get_rts(struct ieee80211_device *ieee,
264 wrqu->rts.disabled = (wrqu->rts.value == DEFAULT_RTS_THRESHOLD); 286 wrqu->rts.disabled = (wrqu->rts.value == DEFAULT_RTS_THRESHOLD);
265 return 0; 287 return 0;
266} 288}
267int ieee80211_wx_set_mode(struct ieee80211_device *ieee, struct iw_request_info *a, 289
290int rtllib_wx_set_mode(struct rtllib_device *ieee, struct iw_request_info *a,
268 union iwreq_data *wrqu, char *b) 291 union iwreq_data *wrqu, char *b)
269{ 292{
293 int set_mode_status = 0;
270 294
271 ieee->sync_scan_hurryup = 1; 295 rtllib_stop_scan_syncro(ieee);
272
273 down(&ieee->wx_sem); 296 down(&ieee->wx_sem);
297 switch (wrqu->mode) {
298 case IW_MODE_MONITOR:
299 case IW_MODE_ADHOC:
300 case IW_MODE_INFRA:
301 break;
302 case IW_MODE_AUTO:
303 wrqu->mode = IW_MODE_INFRA;
304 break;
305 default:
306 set_mode_status = -EINVAL;
307 goto out;
308 }
274 309
275 if (wrqu->mode == ieee->iw_mode) 310 if (wrqu->mode == ieee->iw_mode)
276 goto out; 311 goto out;
277 312
278 if (wrqu->mode == IW_MODE_MONITOR){ 313 if (wrqu->mode == IW_MODE_MONITOR) {
279 314#if defined(RTLLIB_RADIOTAP) && (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,10))
315 ieee->dev->type = ARPHRD_IEEE80211_RADIOTAP;
316#else
280 ieee->dev->type = ARPHRD_IEEE80211; 317 ieee->dev->type = ARPHRD_IEEE80211;
281 }else{ 318#endif
319 rtllib_EnableNetMonitorMode(ieee->dev,false);
320
321 } else {
282 ieee->dev->type = ARPHRD_ETHER; 322 ieee->dev->type = ARPHRD_ETHER;
323 if (ieee->iw_mode == IW_MODE_MONITOR)
324 rtllib_DisableNetMonitorMode(ieee->dev,false);
283 } 325 }
284 326
285 if (!ieee->proto_started){ 327 if (!ieee->proto_started) {
286 ieee->iw_mode = wrqu->mode; 328 ieee->iw_mode = wrqu->mode;
287 }else{ 329 } else {
288 ieee80211_stop_protocol(ieee,true); 330 rtllib_stop_protocol(ieee,true);
289 ieee->iw_mode = wrqu->mode; 331 ieee->iw_mode = wrqu->mode;
290 ieee80211_start_protocol(ieee); 332 rtllib_start_protocol(ieee);
291 } 333 }
292 334
293out: 335out:
294 up(&ieee->wx_sem); 336 up(&ieee->wx_sem);
295 return 0; 337 return set_mode_status;
296} 338}
297 339
298void ieee80211_wx_sync_scan_wq(struct work_struct *work) 340void rtllib_wx_sync_scan_wq(void *data)
299{ 341{
300 struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, wx_sync_scan_wq); 342 struct rtllib_device *ieee = container_of_work_rsl(data, struct rtllib_device, wx_sync_scan_wq);
301 short chan; 343 short chan;
302 HT_EXTCHNL_OFFSET chan_offset=0; 344 HT_EXTCHNL_OFFSET chan_offset=0;
303 HT_CHANNEL_WIDTH bandwidth=0; 345 HT_CHANNEL_WIDTH bandwidth=0;
304 int b40M = 0; 346 int b40M = 0;
305 static int count = 0; 347 static int count = 0;
306 chan = ieee->current_network.channel;
307 348
308#ifdef ENABLE_LPS 349 if (!(ieee->softmac_features & IEEE_SOFTMAC_SCAN)){
309 if (ieee->LeisurePSLeave) { 350 rtllib_start_scan_syncro(ieee, 0);
310 ieee->LeisurePSLeave(ieee); 351 goto out;
311 } 352 }
312 353
354 chan = ieee->current_network.channel;
355
356 if (ieee->LeisurePSLeave)
357 ieee->LeisurePSLeave(ieee->dev);
313 /* notify AP to be in PS mode */ 358 /* notify AP to be in PS mode */
314 ieee80211_sta_ps_send_null_frame(ieee, 1); 359 rtllib_sta_ps_send_null_frame(ieee, 1);
315 ieee80211_sta_ps_send_null_frame(ieee, 1); 360 rtllib_sta_ps_send_null_frame(ieee, 1);
316#endif 361
362 rtllib_stop_all_queues(ieee);
317 363
318 if (ieee->data_hard_stop) 364 if (ieee->data_hard_stop)
319 ieee->data_hard_stop(ieee); 365 ieee->data_hard_stop(ieee->dev);
366 rtllib_stop_send_beacons(ieee);
367 ieee->state = RTLLIB_LINKED_SCANNING;
368 ieee->link_change(ieee->dev);
369 /* wait for ps packet to be kicked out successfully */
370 msleep(50);
320 371
321 ieee80211_stop_send_beacons(ieee); 372 if (ieee->ScanOperationBackupHandler)
373 ieee->ScanOperationBackupHandler(ieee->dev,SCAN_OPT_BACKUP);
322 374
323 ieee->state = IEEE80211_LINKED_SCANNING;
324 ieee->link_change(ieee);
325 ieee->InitialGainHandler(ieee, IG_Backup);
326 if (ieee->pHTInfo->bCurrentHTSupport && ieee->pHTInfo->bEnableHT && ieee->pHTInfo->bCurBW40MHz) { 375 if (ieee->pHTInfo->bCurrentHTSupport && ieee->pHTInfo->bEnableHT && ieee->pHTInfo->bCurBW40MHz) {
327 b40M = 1; 376 b40M = 1;
328 chan_offset = ieee->pHTInfo->CurSTAExtChnlOffset; 377 chan_offset = ieee->pHTInfo->CurSTAExtChnlOffset;
329 bandwidth = (HT_CHANNEL_WIDTH)ieee->pHTInfo->bCurBW40MHz; 378 bandwidth = (HT_CHANNEL_WIDTH)ieee->pHTInfo->bCurBW40MHz;
330 printk("Scan in 40M, force to 20M first:%d, %d\n", chan_offset, bandwidth); 379 RT_TRACE(COMP_DBG, "Scan in 40M, force to 20M first:%d, %d\n", chan_offset, bandwidth);
331 ieee->SetBWModeHandler(ieee, HT_CHANNEL_WIDTH_20, HT_EXTCHNL_OFFSET_NO_EXT); 380 ieee->SetBWModeHandler(ieee->dev, HT_CHANNEL_WIDTH_20, HT_EXTCHNL_OFFSET_NO_EXT);
332 } 381 }
333 ieee80211_start_scan_syncro(ieee); 382
383 rtllib_start_scan_syncro(ieee, 0);
384
334 if (b40M) { 385 if (b40M) {
335 printk("Scan in 20M, back to 40M\n"); 386 RT_TRACE(COMP_DBG, "Scan in 20M, back to 40M\n");
336 if (chan_offset == HT_EXTCHNL_OFFSET_UPPER) 387 if (chan_offset == HT_EXTCHNL_OFFSET_UPPER)
337 ieee->set_chan(ieee, chan + 2); 388 ieee->set_chan(ieee->dev, chan + 2);
338 else if (chan_offset == HT_EXTCHNL_OFFSET_LOWER) 389 else if (chan_offset == HT_EXTCHNL_OFFSET_LOWER)
339 ieee->set_chan(ieee, chan - 2); 390 ieee->set_chan(ieee->dev, chan - 2);
340 else 391 else
341 ieee->set_chan(ieee, chan); 392 ieee->set_chan(ieee->dev, chan);
342 ieee->SetBWModeHandler(ieee, bandwidth, chan_offset); 393 ieee->SetBWModeHandler(ieee->dev, bandwidth, chan_offset);
343 } else { 394 } else {
344 ieee->set_chan(ieee, chan); 395 ieee->set_chan(ieee->dev, chan);
345 } 396 }
346 397
347 ieee->InitialGainHandler(ieee, IG_Restore); 398 if (ieee->ScanOperationBackupHandler)
348 ieee->state = IEEE80211_LINKED; 399 ieee->ScanOperationBackupHandler(ieee->dev,SCAN_OPT_RESTORE);
349 ieee->link_change(ieee); 400
401 ieee->state = RTLLIB_LINKED;
402 ieee->link_change(ieee->dev);
350 403
351#ifdef ENABLE_LPS
352 /* Notify AP that I wake up again */ 404 /* Notify AP that I wake up again */
353 ieee80211_sta_ps_send_null_frame(ieee, 0); 405 rtllib_sta_ps_send_null_frame(ieee, 0);
354#endif
355 406
356 // To prevent the immediately calling watch_dog after scan. 407 if (ieee->LinkDetectInfo.NumRecvBcnInPeriod == 0 ||
357 if(ieee->LinkDetectInfo.NumRecvBcnInPeriod==0||ieee->LinkDetectInfo.NumRecvDataInPeriod==0 ) 408 ieee->LinkDetectInfo.NumRecvDataInPeriod == 0 ) {
358 {
359 ieee->LinkDetectInfo.NumRecvBcnInPeriod = 1; 409 ieee->LinkDetectInfo.NumRecvBcnInPeriod = 1;
360 ieee->LinkDetectInfo.NumRecvDataInPeriod= 1; 410 ieee->LinkDetectInfo.NumRecvDataInPeriod= 1;
361 } 411 }
412
362 if (ieee->data_hard_resume) 413 if (ieee->data_hard_resume)
363 ieee->data_hard_resume(ieee); 414 ieee->data_hard_resume(ieee->dev);
364 415
365 if(ieee->iw_mode == IW_MODE_ADHOC || ieee->iw_mode == IW_MODE_MASTER) 416 if (ieee->iw_mode == IW_MODE_ADHOC || ieee->iw_mode == IW_MODE_MASTER)
366 ieee80211_start_send_beacons(ieee); 417 rtllib_start_send_beacons(ieee);
418
419 rtllib_wake_all_queues(ieee);
367 420
368 count = 0; 421 count = 0;
422out:
369 up(&ieee->wx_sem); 423 up(&ieee->wx_sem);
370 424
371} 425}
372 426
373int ieee80211_wx_set_scan(struct ieee80211_device *ieee, struct iw_request_info *a, 427int rtllib_wx_set_scan(struct rtllib_device *ieee, struct iw_request_info *a,
374 union iwreq_data *wrqu, char *b) 428 union iwreq_data *wrqu, char *b)
375{ 429{
376 int ret = 0; 430 int ret = 0;
@@ -382,8 +436,8 @@ int ieee80211_wx_set_scan(struct ieee80211_device *ieee, struct iw_request_info
382 goto out; 436 goto out;
383 } 437 }
384 438
385 if ( ieee->state == IEEE80211_LINKED){ 439 if ( ieee->state == RTLLIB_LINKED){
386 queue_work(ieee->wq, &ieee->wx_sync_scan_wq); 440 queue_work_rsl(ieee->wq, &ieee->wx_sync_scan_wq);
387 /* intentionally forget to up sem */ 441 /* intentionally forget to up sem */
388 return 0; 442 return 0;
389 } 443 }
@@ -393,21 +447,27 @@ out:
393 return ret; 447 return ret;
394} 448}
395 449
396int ieee80211_wx_set_essid(struct ieee80211_device *ieee, 450int rtllib_wx_set_essid(struct rtllib_device *ieee,
397 struct iw_request_info *a, 451 struct iw_request_info *a,
398 union iwreq_data *wrqu, char *extra) 452 union iwreq_data *wrqu, char *extra)
399{ 453{
400 454
401 int ret=0,len; 455 int ret=0,len,i;
402 short proto_started; 456 short proto_started;
403 unsigned long flags; 457 unsigned long flags;
404 458
405 ieee->sync_scan_hurryup = 1; 459 rtllib_stop_scan_syncro(ieee);
406 down(&ieee->wx_sem); 460 down(&ieee->wx_sem);
407 461
408 proto_started = ieee->proto_started; 462 proto_started = ieee->proto_started;
409 463
410 if (wrqu->essid.length > IW_ESSID_MAX_SIZE){ 464#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
465 len = ((wrqu->essid.length-1) < IW_ESSID_MAX_SIZE) ? (wrqu->essid.length-1) : IW_ESSID_MAX_SIZE;
466#else
467 len = (wrqu->essid.length < IW_ESSID_MAX_SIZE) ? wrqu->essid.length : IW_ESSID_MAX_SIZE;
468#endif
469
470 if (len > IW_ESSID_MAX_SIZE){
411 ret= -E2BIG; 471 ret= -E2BIG;
412 goto out; 472 goto out;
413 } 473 }
@@ -417,10 +477,16 @@ int ieee80211_wx_set_essid(struct ieee80211_device *ieee,
417 goto out; 477 goto out;
418 } 478 }
419 479
420 if(proto_started){ 480 for (i=0; i<len; i++){
421 ieee80211_stop_protocol(ieee,true); 481 if (extra[i] < 0){
482 ret= -1;
483 goto out;
484 }
422 } 485 }
423 486
487 if (proto_started)
488 rtllib_stop_protocol(ieee,true);
489
424 490
425 /* this is just to be sure that the GET wx callback 491 /* this is just to be sure that the GET wx callback
426 * has consisten infos. not needed otherwise 492 * has consisten infos. not needed otherwise
@@ -428,10 +494,9 @@ int ieee80211_wx_set_essid(struct ieee80211_device *ieee,
428 spin_lock_irqsave(&ieee->lock, flags); 494 spin_lock_irqsave(&ieee->lock, flags);
429 495
430 if (wrqu->essid.flags && wrqu->essid.length) { 496 if (wrqu->essid.flags && wrqu->essid.length) {
431 //first flush current network.ssid 497 strncpy(ieee->current_network.ssid, extra, len);
432 len = ((wrqu->essid.length-1) < IW_ESSID_MAX_SIZE) ? (wrqu->essid.length-1) : IW_ESSID_MAX_SIZE; 498 ieee->current_network.ssid_len = len;
433 strncpy(ieee->current_network.ssid, extra, len+1); 499 ieee->cannot_notify = false;
434 ieee->current_network.ssid_len = len+1;
435 ieee->ssid_set = 1; 500 ieee->ssid_set = 1;
436 } 501 }
437 else{ 502 else{
@@ -442,21 +507,20 @@ int ieee80211_wx_set_essid(struct ieee80211_device *ieee,
442 spin_unlock_irqrestore(&ieee->lock, flags); 507 spin_unlock_irqrestore(&ieee->lock, flags);
443 508
444 if (proto_started) 509 if (proto_started)
445 ieee80211_start_protocol(ieee); 510 rtllib_start_protocol(ieee);
446out: 511out:
447 up(&ieee->wx_sem); 512 up(&ieee->wx_sem);
448 return ret; 513 return ret;
449} 514}
450 515
451 int ieee80211_wx_get_mode(struct ieee80211_device *ieee, struct iw_request_info *a, 516 int rtllib_wx_get_mode(struct rtllib_device *ieee, struct iw_request_info *a,
452 union iwreq_data *wrqu, char *b) 517 union iwreq_data *wrqu, char *b)
453{ 518{
454
455 wrqu->mode = ieee->iw_mode; 519 wrqu->mode = ieee->iw_mode;
456 return 0; 520 return 0;
457} 521}
458 522
459 int ieee80211_wx_set_rawtx(struct ieee80211_device *ieee, 523 int rtllib_wx_set_rawtx(struct rtllib_device *ieee,
460 struct iw_request_info *info, 524 struct iw_request_info *info,
461 union iwreq_data *wrqu, char *extra) 525 union iwreq_data *wrqu, char *extra)
462{ 526{
@@ -467,7 +531,7 @@ out:
467 531
468 down(&ieee->wx_sem); 532 down(&ieee->wx_sem);
469 533
470 if(enable) 534 if (enable)
471 ieee->raw_tx = 1; 535 ieee->raw_tx = 1;
472 else 536 else
473 ieee->raw_tx = 0; 537 ieee->raw_tx = 0;
@@ -475,16 +539,16 @@ out:
475 printk(KERN_INFO"raw TX is %s\n", 539 printk(KERN_INFO"raw TX is %s\n",
476 ieee->raw_tx ? "enabled" : "disabled"); 540 ieee->raw_tx ? "enabled" : "disabled");
477 541
478 if(ieee->iw_mode == IW_MODE_MONITOR) 542 if (ieee->iw_mode == IW_MODE_MONITOR)
479 { 543 {
480 if(prev == 0 && ieee->raw_tx){ 544 if (prev == 0 && ieee->raw_tx){
481 if (ieee->data_hard_resume) 545 if (ieee->data_hard_resume)
482 ieee->data_hard_resume(ieee); 546 ieee->data_hard_resume(ieee->dev);
483 547
484 netif_carrier_on(ieee->dev); 548 netif_carrier_on(ieee->dev);
485 } 549 }
486 550
487 if(prev && ieee->raw_tx == 1) 551 if (prev && ieee->raw_tx == 1)
488 netif_carrier_off(ieee->dev); 552 netif_carrier_off(ieee->dev);
489 } 553 }
490 554
@@ -493,14 +557,15 @@ out:
493 return 0; 557 return 0;
494} 558}
495 559
496int ieee80211_wx_get_name(struct ieee80211_device *ieee, 560int rtllib_wx_get_name(struct rtllib_device *ieee,
497 struct iw_request_info *info, 561 struct iw_request_info *info,
498 union iwreq_data *wrqu, char *extra) 562 union iwreq_data *wrqu, char *extra)
499{ 563{
500 strcpy(wrqu->name, "802.11"); 564 strcpy(wrqu->name, "802.11");
501 if(ieee->modulation & IEEE80211_CCK_MODULATION) 565
566 if (ieee->modulation & RTLLIB_CCK_MODULATION)
502 strcat(wrqu->name, "b"); 567 strcat(wrqu->name, "b");
503 if(ieee->modulation & IEEE80211_OFDM_MODULATION) 568 if (ieee->modulation & RTLLIB_OFDM_MODULATION)
504 strcat(wrqu->name, "g"); 569 strcat(wrqu->name, "g");
505 if (ieee->mode & (IEEE_N_24G | IEEE_N_5G)) 570 if (ieee->mode & (IEEE_N_24G | IEEE_N_5G))
506 strcat(wrqu->name, "n"); 571 strcat(wrqu->name, "n");
@@ -509,42 +574,48 @@ int ieee80211_wx_get_name(struct ieee80211_device *ieee,
509 574
510 575
511/* this is mostly stolen from hostap */ 576/* this is mostly stolen from hostap */
512int ieee80211_wx_set_power(struct ieee80211_device *ieee, 577int rtllib_wx_set_power(struct rtllib_device *ieee,
513 struct iw_request_info *info, 578 struct iw_request_info *info,
514 union iwreq_data *wrqu, char *extra) 579 union iwreq_data *wrqu, char *extra)
515{ 580{
516 int ret = 0; 581 int ret = 0;
517 582#if 1
518 if( 583 if (
519 (!ieee->sta_wake_up) || 584 (!ieee->sta_wake_up) ||
520 (!ieee->enter_sleep_state) || 585 (!ieee->enter_sleep_state) ||
521 (!ieee->ps_is_queue_empty)){ 586 (!ieee->ps_is_queue_empty)){
522 587
588 RTLLIB_DEBUG(RTLLIB_DL_ERR,"%s(): PS mode is tryied to be use but driver missed a callback\n\n",__func__);
589
523 return -1; 590 return -1;
524 } 591 }
525 592#endif
526 down(&ieee->wx_sem); 593 down(&ieee->wx_sem);
527 594
528 if (wrqu->power.disabled){ 595 if (wrqu->power.disabled){
529 ieee->ps = IEEE80211_PS_DISABLED; 596 RT_TRACE(COMP_DBG, "===>%s(): power disable\n",__func__);
597 ieee->ps = RTLLIB_PS_DISABLED;
530 goto exit; 598 goto exit;
531 } 599 }
532 if (wrqu->power.flags & IW_POWER_TIMEOUT) { 600 if (wrqu->power.flags & IW_POWER_TIMEOUT) {
533 ieee->ps_timeout = wrqu->power.value / 1000; 601 ieee->ps_timeout = wrqu->power.value / 1000;
602 RT_TRACE(COMP_DBG, "===>%s():ps_timeout is %d\n",__func__,ieee->ps_timeout);
534 } 603 }
535 604
536 if (wrqu->power.flags & IW_POWER_PERIOD) { 605 if (wrqu->power.flags & IW_POWER_PERIOD) {
606
537 ieee->ps_period = wrqu->power.value / 1000; 607 ieee->ps_period = wrqu->power.value / 1000;
608
538 } 609 }
539 switch (wrqu->power.flags & IW_POWER_MODE) { 610 switch (wrqu->power.flags & IW_POWER_MODE) {
540 case IW_POWER_UNICAST_R: 611 case IW_POWER_UNICAST_R:
541 ieee->ps = IEEE80211_PS_UNICAST; 612 ieee->ps = RTLLIB_PS_UNICAST;
542 break; 613 break;
543 case IW_POWER_MULTICAST_R: 614 case IW_POWER_MULTICAST_R:
544 ieee->ps = IEEE80211_PS_MBCAST; 615 ieee->ps = RTLLIB_PS_MBCAST;
545 break; 616 break;
546 case IW_POWER_ALL_R: 617 case IW_POWER_ALL_R:
547 ieee->ps = IEEE80211_PS_UNICAST | IEEE80211_PS_MBCAST; 618 ieee->ps = RTLLIB_PS_UNICAST | RTLLIB_PS_MBCAST;
548 break; 619 break;
549 620
550 case IW_POWER_ON: 621 case IW_POWER_ON:
@@ -562,7 +633,7 @@ exit:
562} 633}
563 634
564/* this is stolen from hostap */ 635/* this is stolen from hostap */
565int ieee80211_wx_get_power(struct ieee80211_device *ieee, 636int rtllib_wx_get_power(struct rtllib_device *ieee,
566 struct iw_request_info *info, 637 struct iw_request_info *info,
567 union iwreq_data *wrqu, char *extra) 638 union iwreq_data *wrqu, char *extra)
568{ 639{
@@ -570,7 +641,7 @@ int ieee80211_wx_get_power(struct ieee80211_device *ieee,
570 641
571 down(&ieee->wx_sem); 642 down(&ieee->wx_sem);
572 643
573 if(ieee->ps == IEEE80211_PS_DISABLED){ 644 if (ieee->ps == RTLLIB_PS_DISABLED) {
574 wrqu->power.disabled = 1; 645 wrqu->power.disabled = 1;
575 goto exit; 646 goto exit;
576 } 647 }
@@ -585,9 +656,9 @@ int ieee80211_wx_get_power(struct ieee80211_device *ieee,
585 wrqu->power.value = ieee->ps_period * 1000; 656 wrqu->power.value = ieee->ps_period * 1000;
586 } 657 }
587 658
588 if ((ieee->ps & (IEEE80211_PS_MBCAST | IEEE80211_PS_UNICAST)) == (IEEE80211_PS_MBCAST | IEEE80211_PS_UNICAST)) 659 if ((ieee->ps & (RTLLIB_PS_MBCAST | RTLLIB_PS_UNICAST)) == (RTLLIB_PS_MBCAST | RTLLIB_PS_UNICAST))
589 wrqu->power.flags |= IW_POWER_ALL_R; 660 wrqu->power.flags |= IW_POWER_ALL_R;
590 else if (ieee->ps & IEEE80211_PS_MBCAST) 661 else if (ieee->ps & RTLLIB_PS_MBCAST)
591 wrqu->power.flags |= IW_POWER_MULTICAST_R; 662 wrqu->power.flags |= IW_POWER_MULTICAST_R;
592 else 663 else
593 wrqu->power.flags |= IW_POWER_UNICAST_R; 664 wrqu->power.flags |= IW_POWER_UNICAST_R;
@@ -597,4 +668,3 @@ exit:
597 return ret; 668 return ret;
598 669
599} 670}
600
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_tx.c b/drivers/staging/rtl8192e/rtllib_tx.c
index 424dd48da66..3cc066eb530 100644
--- a/drivers/staging/rtl8192e/ieee80211/ieee80211_tx.c
+++ b/drivers/staging/rtl8192e/rtllib_tx.c
@@ -46,13 +46,17 @@
46#include <linux/slab.h> 46#include <linux/slab.h>
47#include <linux/tcp.h> 47#include <linux/tcp.h>
48#include <linux/types.h> 48#include <linux/types.h>
49#include <linux/version.h>
49#include <linux/wireless.h> 50#include <linux/wireless.h>
50#include <linux/etherdevice.h> 51#include <linux/etherdevice.h>
51#include <asm/uaccess.h> 52#include <asm/uaccess.h>
52#include <linux/if_vlan.h> 53#include <linux/if_vlan.h>
53 54
54#include "ieee80211.h" 55#include "rtllib.h"
55 56
57#ifdef RTK_DMP_PLATFORM
58#include <linux/usb_setting.h>
59#endif
56 60
57/* 61/*
58 62
@@ -154,12 +158,12 @@ payload of each frame is reduced to 492 bytes.
154static u8 P802_1H_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0xf8 }; 158static u8 P802_1H_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0xf8 };
155static u8 RFC1042_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0x00 }; 159static u8 RFC1042_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0x00 };
156 160
157static inline int ieee80211_put_snap(u8 *data, u16 h_proto) 161inline int rtllib_put_snap(u8 *data, u16 h_proto)
158{ 162{
159 struct ieee80211_snap_hdr *snap; 163 struct rtllib_snap_hdr *snap;
160 u8 *oui; 164 u8 *oui;
161 165
162 snap = (struct ieee80211_snap_hdr *)data; 166 snap = (struct rtllib_snap_hdr *)data;
163 snap->dsap = 0xaa; 167 snap->dsap = 0xaa;
164 snap->ssap = 0xaa; 168 snap->ssap = 0xaa;
165 snap->ctrl = 0x03; 169 snap->ctrl = 0x03;
@@ -177,29 +181,31 @@ static inline int ieee80211_put_snap(u8 *data, u16 h_proto)
177 return SNAP_SIZE + sizeof(u16); 181 return SNAP_SIZE + sizeof(u16);
178} 182}
179 183
180int ieee80211_encrypt_fragment( 184int rtllib_encrypt_fragment(
181 struct ieee80211_device *ieee, 185 struct rtllib_device *ieee,
182 struct sk_buff *frag, 186 struct sk_buff *frag,
183 int hdr_len) 187 int hdr_len)
184{ 188{
185 struct ieee80211_crypt_data* crypt = ieee->crypt[ieee->tx_keyidx]; 189 struct rtllib_crypt_data* crypt = NULL;
186 int res; 190 int res;
187 191
192 crypt = ieee->crypt[ieee->tx_keyidx];
193
188 if (!(crypt && crypt->ops)) 194 if (!(crypt && crypt->ops))
189 { 195 {
190 printk("=========>%s(), crypt is null\n", __FUNCTION__); 196 printk("=========>%s(), crypt is null\n", __func__);
191 return -1; 197 return -1;
192 } 198 }
193#ifdef CONFIG_IEEE80211_CRYPT_TKIP 199#ifdef CONFIG_RTLLIB_CRYPT_TKIP
194 struct ieee80211_hdr *header; 200 struct rtllib_hdr_1addr *header;
195 201
196 if (ieee->tkip_countermeasures && 202 if (ieee->tkip_countermeasures &&
197 crypt && crypt->ops && strcmp(crypt->ops->name, "TKIP") == 0) { 203 crypt && crypt->ops && strcmp(crypt->ops->name, "TKIP") == 0) {
198 header = (struct ieee80211_hdr *) frag->data; 204 header = (struct rtllib_hdr_1addr *) frag->data;
199 if (net_ratelimit()) { 205 if (net_ratelimit()) {
200 printk(KERN_DEBUG "%s: TKIP countermeasures: dropped " 206 printk(KERN_DEBUG "%s: TKIP countermeasures: dropped "
201 "TX packet to %pM\n", 207 "TX packet to " MAC_FMT "\n",
202 ieee->dev->name, header->addr1); 208 ieee->dev->name, MAC_ARG(header->addr1));
203 } 209 }
204 return -1; 210 return -1;
205 } 211 }
@@ -207,7 +213,6 @@ int ieee80211_encrypt_fragment(
207 /* To encrypt, frame format is: 213 /* To encrypt, frame format is:
208 * IV (4 bytes), clear payload (including SNAP), ICV (4 bytes) */ 214 * IV (4 bytes), clear payload (including SNAP), ICV (4 bytes) */
209 215
210 // PR: FIXME: Copied from hostap. Check fragmentation/MSDU/MPDU encryption.
211 /* Host-based IEEE 802.11 fragmentation for TX is not yet supported, so 216 /* Host-based IEEE 802.11 fragmentation for TX is not yet supported, so
212 * call both MSDU and MPDU encryption functions from here. */ 217 * call both MSDU and MPDU encryption functions from here. */
213 atomic_inc(&crypt->refcnt); 218 atomic_inc(&crypt->refcnt);
@@ -229,33 +234,46 @@ int ieee80211_encrypt_fragment(
229} 234}
230 235
231 236
232void ieee80211_txb_free(struct ieee80211_txb *txb) { 237void rtllib_txb_free(struct rtllib_txb *txb) {
233 if (unlikely(!txb)) 238 if (unlikely(!txb))
234 return; 239 return;
235 kfree(txb); 240 kfree(txb);
236} 241}
237 242
238struct ieee80211_txb *ieee80211_alloc_txb(int nr_frags, int txb_size, 243struct rtllib_txb *rtllib_alloc_txb(int nr_frags, int txb_size,
239 int gfp_mask) 244 int gfp_mask)
240{ 245{
241 struct ieee80211_txb *txb; 246#ifdef USB_USE_ALIGNMENT
247 u32 Tmpaddr=0;
248 int alignment=0;
249#endif
250 struct rtllib_txb *txb;
242 int i; 251 int i;
243 txb = kmalloc( 252 txb = kmalloc(
244 sizeof(struct ieee80211_txb) + (sizeof(u8*) * nr_frags), 253 sizeof(struct rtllib_txb) + (sizeof(u8*) * nr_frags),
245 gfp_mask); 254 gfp_mask);
246 if (!txb) 255 if (!txb)
247 return NULL; 256 return NULL;
248 257
249 memset(txb, 0, sizeof(struct ieee80211_txb)); 258 memset(txb, 0, sizeof(struct rtllib_txb));
250 txb->nr_frags = nr_frags; 259 txb->nr_frags = nr_frags;
251 txb->frag_size = txb_size; 260 txb->frag_size = txb_size;
252 261
253 for (i = 0; i < nr_frags; i++) { 262 for (i = 0; i < nr_frags; i++) {
263#ifdef USB_USE_ALIGNMENT
264 txb->fragments[i] = dev_alloc_skb(txb_size+USB_512B_ALIGNMENT_SIZE);
265#else
254 txb->fragments[i] = dev_alloc_skb(txb_size); 266 txb->fragments[i] = dev_alloc_skb(txb_size);
267#endif
255 if (unlikely(!txb->fragments[i])) { 268 if (unlikely(!txb->fragments[i])) {
256 i--; 269 i--;
257 break; 270 break;
258 } 271 }
272#ifdef USB_USE_ALIGNMENT
273 Tmpaddr = (u32)(txb->fragments[i]->data);
274 alignment = Tmpaddr & 0x1ff;
275 skb_reserve(txb->fragments[i],(USB_512B_ALIGNMENT_SIZE - alignment));
276#endif
259 memset(txb->fragments[i]->cb, 0, sizeof(txb->fragments[i]->cb)); 277 memset(txb->fragments[i]->cb, 0, sizeof(txb->fragments[i]->cb));
260 } 278 }
261 if (unlikely(i != nr_frags)) { 279 if (unlikely(i != nr_frags)) {
@@ -267,107 +285,97 @@ struct ieee80211_txb *ieee80211_alloc_txb(int nr_frags, int txb_size,
267 return txb; 285 return txb;
268} 286}
269 287
270// Classify the to-be send data packet 288int
271// Need to acquire the sent queue index. 289rtllib_classify(struct sk_buff *skb, u8 bIsAmsdu)
272static int
273ieee80211_classify(struct sk_buff *skb, struct ieee80211_network *network)
274{ 290{
275 struct ethhdr *eth; 291 struct ethhdr *eth;
276 struct iphdr *ip; 292 struct iphdr *ip;
293
277 eth = (struct ethhdr *)skb->data; 294 eth = (struct ethhdr *)skb->data;
278 if (eth->h_proto != htons(ETH_P_IP)) 295 if (eth->h_proto != htons(ETH_P_IP))
279 return 0; 296 return 0;
280 297
298 RTLLIB_DEBUG_DATA(RTLLIB_DL_DATA, skb->data, skb->len);
281 ip = ip_hdr(skb); 299 ip = ip_hdr(skb);
282 switch (ip->tos & 0xfc) { 300 switch (ip->tos & 0xfc) {
283 case 0x20: 301 case 0x20:
284 return 2; 302 return 2;
285 case 0x40: 303 case 0x40:
286 return 1; 304 return 1;
287 case 0x60: 305 case 0x60:
288 return 3; 306 return 3;
289 case 0x80: 307 case 0x80:
290 return 4; 308 return 4;
291 case 0xa0: 309 case 0xa0:
292 return 5; 310 return 5;
293 case 0xc0: 311 case 0xc0:
294 return 6; 312 return 6;
295 case 0xe0: 313 case 0xe0:
296 return 7; 314 return 7;
297 default: 315 default:
298 return 0; 316 return 0;
299 } 317 }
300} 318}
301 319
302#define SN_LESS(a, b) (((a-b)&0x800)!=0) 320#define SN_LESS(a, b) (((a-b)&0x800)!=0)
303void ieee80211_tx_query_agg_cap(struct ieee80211_device* ieee, struct sk_buff* skb, cb_desc* tcb_desc) 321void rtllib_tx_query_agg_cap(struct rtllib_device* ieee, struct sk_buff* skb, cb_desc* tcb_desc)
304{ 322{
305 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo; 323 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
306 PTX_TS_RECORD pTxTs = NULL; 324 PTX_TS_RECORD pTxTs = NULL;
307 struct ieee80211_hdr_1addr* hdr = (struct ieee80211_hdr_1addr*)skb->data; 325 struct rtllib_hdr_1addr* hdr = (struct rtllib_hdr_1addr*)skb->data;
326
327 if (rtllib_act_scanning(ieee,false))
328 return;
308 329
309 if (!pHTInfo->bCurrentHTSupport||!pHTInfo->bEnableHT) 330 if (!pHTInfo->bCurrentHTSupport||!pHTInfo->bEnableHT)
310 return; 331 return;
311 if (!IsQoSDataFrame(skb->data)) 332 if (!IsQoSDataFrame(skb->data))
312 return; 333 return;
313
314 if (is_multicast_ether_addr(hdr->addr1) || is_broadcast_ether_addr(hdr->addr1)) 334 if (is_multicast_ether_addr(hdr->addr1) || is_broadcast_ether_addr(hdr->addr1))
315 return; 335 return;
316 //check packet and mode later
317#ifdef TO_DO_LIST 336#ifdef TO_DO_LIST
318 if(pTcb->PacketLength >= 4096) 337 if (pTcb->PacketLength >= 4096)
319 return; 338 return;
320 // For RTL819X, if pairwisekey = wep/tkip, we don't aggrregation. 339 if (!Adapter->HalFunc.GetNmodeSupportBySecCfgHandler(Adapter))
321 if(!Adapter->HalFunc.GetNmodeSupportBySecCfgHandler(Adapter))
322 return; 340 return;
323#endif 341#endif
324 342
325 if(tcb_desc->bdhcp)// || ieee->CntAfterLink<2) 343 if (tcb_desc->bdhcp || ieee->CntAfterLink<2)
326 { 344 return;
327 return;
328 }
329 345
346 if (pHTInfo->IOTAction & HT_IOT_ACT_TX_NO_AGGREGATION)
347 return;
330 348
331#if 1 349 if (!ieee->GetNmodeSupportBySecCfg(ieee->dev))
332 if (!ieee->GetNmodeSupportBySecCfg(ieee))
333 {
334 return; 350 return;
335 } 351 if (pHTInfo->bCurrentAMPDUEnable){
336#endif 352 if (!GetTs(ieee, (PTS_COMMON_INFO*)(&pTxTs), hdr->addr1, skb->priority, TX_DIR, true)){
337 if(pHTInfo->bCurrentAMPDUEnable) 353 printk("%s: can't get TS\n", __func__);
338 {
339 if (!GetTs(ieee, (PTS_COMMON_INFO*)(&pTxTs), hdr->addr1, skb->priority, TX_DIR, true))
340 {
341 printk("===>can't get TS\n");
342 return; 354 return;
343 } 355 }
344 if (pTxTs->TxAdmittedBARecord.bValid == false) 356 if (pTxTs->TxAdmittedBARecord.bValid == false){
345 { 357 if (ieee->wpa_ie_len && (ieee->pairwise_key_type == KEY_TYPE_NA)) {
346 //as some AP will refuse our action frame until key handshake has been finished. WB 358 ;
347 if (ieee->wpa_ie_len && (ieee->pairwise_key_type == KEY_TYPE_NA)) 359 } else if (tcb_desc->bdhcp == 1){
348 ; 360 ;
349 else 361 } else if (!pTxTs->bDisable_AddBa){
350 TsStartAddBaProcess(ieee, pTxTs); 362 TsStartAddBaProcess(ieee, pTxTs);
363 }
351 goto FORCED_AGG_SETTING; 364 goto FORCED_AGG_SETTING;
352 } 365 } else if (pTxTs->bUsingBa == false) {
353 else if (pTxTs->bUsingBa == false)
354 {
355 if (SN_LESS(pTxTs->TxAdmittedBARecord.BaStartSeqCtrl.field.SeqNum, (pTxTs->TxCurSeq+1)%4096)) 366 if (SN_LESS(pTxTs->TxAdmittedBARecord.BaStartSeqCtrl.field.SeqNum, (pTxTs->TxCurSeq+1)%4096))
356 pTxTs->bUsingBa = true; 367 pTxTs->bUsingBa = true;
357 else 368 else
358 goto FORCED_AGG_SETTING; 369 goto FORCED_AGG_SETTING;
359 } 370 }
360 371 if (ieee->iw_mode == IW_MODE_INFRA) {
361 if (ieee->iw_mode == IW_MODE_INFRA)
362 {
363 tcb_desc->bAMPDUEnable = true; 372 tcb_desc->bAMPDUEnable = true;
364 tcb_desc->ampdu_factor = pHTInfo->CurrentAMPDUFactor; 373 tcb_desc->ampdu_factor = pHTInfo->CurrentAMPDUFactor;
365 tcb_desc->ampdu_density = pHTInfo->CurrentMPDUDensity; 374 tcb_desc->ampdu_density = pHTInfo->CurrentMPDUDensity;
366 } 375 }
367 } 376 }
368FORCED_AGG_SETTING: 377FORCED_AGG_SETTING:
369 switch(pHTInfo->ForcedAMPDUMode ) 378 switch (pHTInfo->ForcedAMPDUMode) {
370 {
371 case HT_AGG_AUTO: 379 case HT_AGG_AUTO:
372 break; 380 break;
373 381
@@ -387,11 +395,11 @@ FORCED_AGG_SETTING:
387 return; 395 return;
388} 396}
389 397
390extern void ieee80211_qurey_ShortPreambleMode(struct ieee80211_device* ieee, cb_desc* tcb_desc) 398extern void rtllib_qurey_ShortPreambleMode(struct rtllib_device* ieee, cb_desc* tcb_desc)
391{ 399{
392 tcb_desc->bUseShortPreamble = false; 400 tcb_desc->bUseShortPreamble = false;
393 if (tcb_desc->data_rate == 2) 401 if (tcb_desc->data_rate == 2)
394 {//// 1M can only use Long Preamble. 11B spec 402 {
395 return; 403 return;
396 } 404 }
397 else if (ieee->current_network.capability & WLAN_CAPABILITY_SHORT_PREAMBLE) 405 else if (ieee->current_network.capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
@@ -400,69 +408,110 @@ extern void ieee80211_qurey_ShortPreambleMode(struct ieee80211_device* ieee, cb_
400 } 408 }
401 return; 409 return;
402} 410}
411
403extern void 412extern void
404ieee80211_query_HTCapShortGI(struct ieee80211_device *ieee, cb_desc *tcb_desc) 413rtllib_query_HTCapShortGI(struct rtllib_device *ieee, cb_desc *tcb_desc)
405{ 414{
406 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo; 415 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
407 416
408 tcb_desc->bUseShortGI = false; 417 tcb_desc->bUseShortGI = false;
409 418
410 if(!pHTInfo->bCurrentHTSupport||!pHTInfo->bEnableHT) 419 if (!pHTInfo->bCurrentHTSupport||!pHTInfo->bEnableHT)
411 return; 420 return;
412 421
413 if(pHTInfo->bForcedShortGI) 422 if (pHTInfo->bForcedShortGI)
414 { 423 {
415 tcb_desc->bUseShortGI = true; 424 tcb_desc->bUseShortGI = true;
416 return; 425 return;
417 } 426 }
418 427
419 if((pHTInfo->bCurBW40MHz==true) && pHTInfo->bCurShortGI40MHz) 428 if ((pHTInfo->bCurBW40MHz==true) && pHTInfo->bCurShortGI40MHz)
420 tcb_desc->bUseShortGI = true; 429 tcb_desc->bUseShortGI = true;
421 else if((pHTInfo->bCurBW40MHz==false) && pHTInfo->bCurShortGI20MHz) 430 else if ((pHTInfo->bCurBW40MHz==false) && pHTInfo->bCurShortGI20MHz)
422 tcb_desc->bUseShortGI = true; 431 tcb_desc->bUseShortGI = true;
423} 432}
424 433
425void ieee80211_query_BandwidthMode(struct ieee80211_device* ieee, cb_desc *tcb_desc) 434void rtllib_query_BandwidthMode(struct rtllib_device* ieee, cb_desc *tcb_desc)
426{ 435{
427 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo; 436 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
428 437
429 tcb_desc->bPacketBW = false; 438 tcb_desc->bPacketBW = false;
430 439
431 if(!pHTInfo->bCurrentHTSupport||!pHTInfo->bEnableHT) 440 if (!pHTInfo->bCurrentHTSupport||!pHTInfo->bEnableHT)
432 return; 441 return;
433 442
434 if(tcb_desc->bMulticast || tcb_desc->bBroadcast) 443 if (tcb_desc->bMulticast || tcb_desc->bBroadcast)
435 return; 444 return;
436 445
437 if((tcb_desc->data_rate & 0x80)==0) // If using legacy rate, it shall use 20MHz channel. 446 if ((tcb_desc->data_rate & 0x80)==0)
438 return; 447 return;
439 //BandWidthAutoSwitch is for auto switch to 20 or 40 in long distance 448 if (pHTInfo->bCurBW40MHz && pHTInfo->bCurTxBW40MHz && !ieee->bandwidth_auto_switch.bforced_tx20Mhz)
440 if(pHTInfo->bCurBW40MHz && pHTInfo->bCurTxBW40MHz && !ieee->bandwidth_auto_switch.bforced_tx20Mhz)
441 tcb_desc->bPacketBW = true; 449 tcb_desc->bPacketBW = true;
442 return; 450 return;
443} 451}
452#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
453extern void rtllib_ibss_query_HTCapShortGI(struct rtllib_device *ieee, cb_desc *tcb_desc,u8 is_peer_shortGI_40M,u8 is_peer_shortGI_20M)
454{
455 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
456
457 tcb_desc->bUseShortGI = false;
458
459 if (!pHTInfo->bCurrentHTSupport||!pHTInfo->bEnableHT || (ieee->iw_mode != IW_MODE_ADHOC))
460 {
461 return;
462 }
463
464 if (pHTInfo->bForcedShortGI)
465 {
466 tcb_desc->bUseShortGI = true;
467 return;
468 }
469 if ((pHTInfo->bCurBW40MHz==true) && is_peer_shortGI_40M)
470 tcb_desc->bUseShortGI = true;
471 else if ((pHTInfo->bCurBW40MHz==false) && is_peer_shortGI_20M)
472 tcb_desc->bUseShortGI = true;
473}
474void rtllib_ibss_query_BandwidthMode(struct rtllib_device* ieee, cb_desc *tcb_desc, u8 is_peer_40M)
475{
476 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
477
478 tcb_desc->bPacketBW = false;
479
480 if (!pHTInfo->bCurrentHTSupport||!pHTInfo->bEnableHT || (ieee->iw_mode != IW_MODE_ADHOC))
481 {
482 return;
483 }
484
485 if (tcb_desc->bMulticast || tcb_desc->bBroadcast)
486 {
487 return;
488 }
444 489
445void ieee80211_query_protectionmode(struct ieee80211_device* ieee, cb_desc* tcb_desc, struct sk_buff* skb) 490 if ((tcb_desc->data_rate & 0x80)==0)
491 {
492 return;
493 }
494 if (pHTInfo->bCurBW40MHz && is_peer_40M && !ieee->bandwidth_auto_switch.bforced_tx20Mhz)
495 tcb_desc->bPacketBW = true;
496 return;
497}
498#endif
499void rtllib_query_protectionmode(struct rtllib_device* ieee, cb_desc* tcb_desc, struct sk_buff* skb)
446{ 500{
447 // Common Settings
448 tcb_desc->bRTSSTBC = false; 501 tcb_desc->bRTSSTBC = false;
449 tcb_desc->bRTSUseShortGI = false; // Since protection frames are always sent by legacy rate, ShortGI will never be used. 502 tcb_desc->bRTSUseShortGI = false;
450 tcb_desc->bCTSEnable = false; // Most of protection using RTS/CTS 503 tcb_desc->bCTSEnable = false;
451 tcb_desc->RTSSC = 0; // 20MHz: Don't care; 40MHz: Duplicate. 504 tcb_desc->RTSSC = 0;
452 tcb_desc->bRTSBW = false; // RTS frame bandwidth is always 20MHz 505 tcb_desc->bRTSBW = false;
453 506
454 if(tcb_desc->bBroadcast || tcb_desc->bMulticast)//only unicast frame will use rts/cts 507 if (tcb_desc->bBroadcast || tcb_desc->bMulticast)
455 return; 508 return;
456 509
457 if (is_broadcast_ether_addr(skb->data+16)) //check addr3 as infrastructure add3 is DA. 510 if (is_broadcast_ether_addr(skb->data+16))
458 return; 511 return;
459 512
460 if (ieee->mode < IEEE_N_24G) //b, g mode 513 if (ieee->mode < IEEE_N_24G)
461 { 514 {
462 // (1) RTS_Threshold is compared to the MPDU, not MSDU.
463 // (2) If there are more than one frag in this MSDU, only the first frag uses protection frame.
464 // Other fragments are protected by previous fragment.
465 // So we only need to check the length of first fragment.
466 if (skb->len > ieee->rts) 515 if (skb->len > ieee->rts)
467 { 516 {
468 tcb_desc->bRTSEnable = true; 517 tcb_desc->bRTSEnable = true;
@@ -470,78 +519,72 @@ void ieee80211_query_protectionmode(struct ieee80211_device* ieee, cb_desc* tcb_
470 } 519 }
471 else if (ieee->current_network.buseprotection) 520 else if (ieee->current_network.buseprotection)
472 { 521 {
473 // Use CTS-to-SELF in protection mode.
474 tcb_desc->bRTSEnable = true; 522 tcb_desc->bRTSEnable = true;
475 tcb_desc->bCTSEnable = true; 523 tcb_desc->bCTSEnable = true;
476 tcb_desc->rts_rate = MGN_24M; 524 tcb_desc->rts_rate = MGN_24M;
477 } 525 }
478 //otherwise return;
479 return; 526 return;
480 } 527 }
481 else 528 else
482 {// 11n High throughput case. 529 {
483 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo; 530 PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
484 while (true) 531 while (true)
485 { 532 {
486 //check ERP protection 533 if (pHTInfo->IOTAction & HT_IOT_ACT_FORCED_CTS2SELF)
534 {
535 tcb_desc->bCTSEnable = true;
536 tcb_desc->rts_rate = MGN_24M;
537 tcb_desc->bRTSEnable = true;
538 break;
539 }
540 else if (pHTInfo->IOTAction & (HT_IOT_ACT_FORCED_RTS|HT_IOT_ACT_PURE_N_MODE))
541 {
542 tcb_desc->bRTSEnable = true;
543 tcb_desc->rts_rate = MGN_24M;
544 break;
545 }
487 if (ieee->current_network.buseprotection) 546 if (ieee->current_network.buseprotection)
488 {// CTS-to-SELF 547 {
489 tcb_desc->bRTSEnable = true; 548 tcb_desc->bRTSEnable = true;
490 tcb_desc->bCTSEnable = true; 549 tcb_desc->bCTSEnable = true;
491 tcb_desc->rts_rate = MGN_24M; 550 tcb_desc->rts_rate = MGN_24M;
492 break; 551 break;
493 } 552 }
494 //check HT op mode 553 if (pHTInfo->bCurrentHTSupport && pHTInfo->bEnableHT)
495 if(pHTInfo->bCurrentHTSupport && pHTInfo->bEnableHT)
496 { 554 {
497 u8 HTOpMode = pHTInfo->CurrentOpMode; 555 u8 HTOpMode = pHTInfo->CurrentOpMode;
498 if((pHTInfo->bCurBW40MHz && (HTOpMode == 2 || HTOpMode == 3)) || 556 if ((pHTInfo->bCurBW40MHz && (HTOpMode == 2 || HTOpMode == 3)) ||
499 (!pHTInfo->bCurBW40MHz && HTOpMode == 3) ) 557 (!pHTInfo->bCurBW40MHz && HTOpMode == 3) )
500 { 558 {
501 tcb_desc->rts_rate = MGN_24M; // Rate is 24Mbps. 559 tcb_desc->rts_rate = MGN_24M;
502 tcb_desc->bRTSEnable = true; 560 tcb_desc->bRTSEnable = true;
503 break; 561 break;
504 } 562 }
505 } 563 }
506 //check rts
507 if (skb->len > ieee->rts) 564 if (skb->len > ieee->rts)
508 { 565 {
509 tcb_desc->rts_rate = MGN_24M; // Rate is 24Mbps. 566 tcb_desc->rts_rate = MGN_24M;
510 tcb_desc->bRTSEnable = true; 567 tcb_desc->bRTSEnable = true;
511 break; 568 break;
512 } 569 }
513 //to do list: check MIMO power save condition. 570 if (tcb_desc->bAMPDUEnable)
514 //check AMPDU aggregation for TXOP
515 if(tcb_desc->bAMPDUEnable)
516 { 571 {
517 tcb_desc->rts_rate = MGN_24M; // Rate is 24Mbps. 572 tcb_desc->rts_rate = MGN_24M;
518 // According to 8190 design, firmware sends CF-End only if RTS/CTS is enabled. However, it degrads
519 // throughput around 10M, so we disable of this mechanism. 2007.08.03 by Emily
520 tcb_desc->bRTSEnable = false; 573 tcb_desc->bRTSEnable = false;
521 break; 574 break;
522 } 575 }
523 //check IOT action
524 if(pHTInfo->IOTAction & HT_IOT_ACT_FORCED_CTS2SELF)
525 {
526 tcb_desc->bCTSEnable = true;
527 tcb_desc->rts_rate = MGN_24M;
528 tcb_desc->bRTSEnable = true;
529 break;
530 }
531 // Totally no protection case!!
532 goto NO_PROTECTION; 576 goto NO_PROTECTION;
533 } 577 }
534 } 578 }
535 // For test , CTS replace with RTS 579 if ( 0 )
536 if( 0 )
537 { 580 {
538 tcb_desc->bCTSEnable = true; 581 tcb_desc->bCTSEnable = true;
539 tcb_desc->rts_rate = MGN_24M; 582 tcb_desc->rts_rate = MGN_24M;
540 tcb_desc->bRTSEnable = true; 583 tcb_desc->bRTSEnable = true;
541 } 584 }
542 if (ieee->current_network.capability & WLAN_CAPABILITY_SHORT_PREAMBLE) 585 if (ieee->current_network.capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
543 tcb_desc->bUseShortPreamble = true; 586 tcb_desc->bUseShortPreamble = true;
544 if (ieee->mode == IW_MODE_MASTER) 587 if (ieee->iw_mode == IW_MODE_MASTER)
545 goto NO_PROTECTION; 588 goto NO_PROTECTION;
546 return; 589 return;
547NO_PROTECTION: 590NO_PROTECTION:
@@ -553,75 +596,104 @@ NO_PROTECTION:
553} 596}
554 597
555 598
556void ieee80211_txrate_selectmode(struct ieee80211_device* ieee, cb_desc* tcb_desc) 599#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
600void rtllib_txrate_selectmode(struct rtllib_device* ieee, cb_desc* tcb_desc,struct sta_info *psta)
601#else
602void rtllib_txrate_selectmode(struct rtllib_device* ieee, cb_desc* tcb_desc)
603#endif
557{ 604{
558#ifdef TO_DO_LIST 605#ifdef TO_DO_LIST
559 if(!IsDataFrame(pFrame)) 606 if (!IsDataFrame(pFrame))
560 { 607 {
561 pTcb->bTxDisableRateFallBack = TRUE; 608 pTcb->bTxDisableRateFallBack = true;
562 pTcb->bTxUseDriverAssingedRate = TRUE; 609 pTcb->bTxUseDriverAssingedRate = true;
563 pTcb->RATRIndex = 7; 610 pTcb->RATRIndex = 7;
564 return; 611 return;
565 } 612 }
566 613
567 if(pMgntInfo->ForcedDataRate!= 0) 614 if (pMgntInfo->ForcedDataRate!= 0)
568 { 615 {
569 pTcb->bTxDisableRateFallBack = TRUE; 616 pTcb->bTxDisableRateFallBack = true;
570 pTcb->bTxUseDriverAssingedRate = TRUE; 617 pTcb->bTxUseDriverAssingedRate = true;
571 return; 618 return;
572 } 619 }
573#endif 620#endif
574 if(ieee->bTxDisableRateFallBack) 621 if (ieee->bTxDisableRateFallBack)
575 tcb_desc->bTxDisableRateFallBack = true; 622 tcb_desc->bTxDisableRateFallBack = true;
576 623
577 if(ieee->bTxUseDriverAssingedRate) 624 if (ieee->bTxUseDriverAssingedRate)
578 tcb_desc->bTxUseDriverAssingedRate = true; 625 tcb_desc->bTxUseDriverAssingedRate = true;
579 if(!tcb_desc->bTxDisableRateFallBack || !tcb_desc->bTxUseDriverAssingedRate) 626 if (!tcb_desc->bTxDisableRateFallBack || !tcb_desc->bTxUseDriverAssingedRate)
580 { 627 {
581 if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC) 628 if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC)
582 tcb_desc->RATRIndex = 0; 629 tcb_desc->RATRIndex = 0;
583 } 630 }
584} 631}
585 632
586void ieee80211_query_seqnum(struct ieee80211_device*ieee, struct sk_buff* skb, u8* dst) 633u16 rtllib_query_seqnum(struct rtllib_device*ieee, struct sk_buff* skb, u8* dst)
587{ 634{
635 u16 seqnum = 0;
636
588 if (is_multicast_ether_addr(dst) || is_broadcast_ether_addr(dst)) 637 if (is_multicast_ether_addr(dst) || is_broadcast_ether_addr(dst))
589 return; 638 return 0;
590 if (IsQoSDataFrame(skb->data)) //we deal qos data only 639 if (IsQoSDataFrame(skb->data))
591 { 640 {
592 PTX_TS_RECORD pTS = NULL; 641 PTX_TS_RECORD pTS = NULL;
593 if (!GetTs(ieee, (PTS_COMMON_INFO*)(&pTS), dst, skb->priority, TX_DIR, true)) 642 if (!GetTs(ieee, (PTS_COMMON_INFO*)(&pTS), dst, skb->priority, TX_DIR, true))
594 { 643 {
595 return; 644 return 0;
596 } 645 }
646 seqnum = pTS->TxCurSeq;
597 pTS->TxCurSeq = (pTS->TxCurSeq+1)%4096; 647 pTS->TxCurSeq = (pTS->TxCurSeq+1)%4096;
648 return seqnum;
649 }
650 return 0;
651}
652
653static int wme_downgrade_ac(struct sk_buff *skb)
654{
655 switch (skb->priority) {
656 case 6:
657 case 7:
658 skb->priority = 5; /* VO -> VI */
659 return 0;
660 case 4:
661 case 5:
662 skb->priority = 3; /* VI -> BE */
663 return 0;
664 case 0:
665 case 3:
666 skb->priority = 1; /* BE -> BK */
667 return 0;
668 default:
669 return -1;
598 } 670 }
599} 671}
600 672
601int ieee80211_rtl_xmit(struct sk_buff *skb, struct net_device *dev) 673int rtllib_xmit_inter(struct sk_buff *skb, struct net_device *dev)
602{ 674{
603 struct ieee80211_device *ieee = netdev_priv(dev); 675 struct rtllib_device *ieee = (struct rtllib_device *)netdev_priv_rsl(dev);
604 struct ieee80211_txb *txb = NULL; 676 struct rtllib_txb *txb = NULL;
605 struct ieee80211_hdr_3addrqos *frag_hdr; 677 struct rtllib_hdr_3addrqos *frag_hdr;
606 int i, bytes_per_frag, nr_frags, bytes_last_frag, frag_size; 678 int i, bytes_per_frag, nr_frags, bytes_last_frag, frag_size;
607 unsigned long flags; 679 unsigned long flags;
608 struct net_device_stats *stats = &ieee->stats; 680 struct net_device_stats *stats = &ieee->stats;
609 int ether_type = 0, encrypt; 681 int ether_type = 0, encrypt;
610 int bytes, fc, qos_ctl = 0, hdr_len; 682 int bytes, fc, qos_ctl = 0, hdr_len;
611 struct sk_buff *skb_frag; 683 struct sk_buff *skb_frag;
612 struct ieee80211_hdr_3addrqos header = { /* Ensure zero initialized */ 684 struct rtllib_hdr_3addrqos header = { /* Ensure zero initialized */
613 .duration_id = 0, 685 .duration_id = 0,
614 .seq_ctl = 0, 686 .seq_ctl = 0,
615 .qos_ctl = 0 687 .qos_ctl = 0
616 }; 688 };
617 u8 dest[ETH_ALEN], src[ETH_ALEN]; 689 u8 dest[ETH_ALEN], src[ETH_ALEN];
618 int qos_actived = ieee->current_network.qos_data.active; 690 int qos_actived = ieee->current_network.qos_data.active;
619 691 struct rtllib_crypt_data* crypt = NULL;
620 struct ieee80211_crypt_data* crypt;
621 bool bdhcp =false;
622
623 cb_desc *tcb_desc; 692 cb_desc *tcb_desc;
693 u8 bIsMulticast = false;
694 u8 IsAmsdu = false;
624 695
696 bool bdhcp =false;
625 spin_lock_irqsave(&ieee->lock, flags); 697 spin_lock_irqsave(&ieee->lock, flags);
626 698
627 /* If there is no driver handler to take the TXB, dont' bother 699 /* If there is no driver handler to take the TXB, dont' bother
@@ -634,92 +706,101 @@ int ieee80211_rtl_xmit(struct sk_buff *skb, struct net_device *dev)
634 } 706 }
635 707
636 708
637 if(likely(ieee->raw_tx == 0)){ 709 if (likely(ieee->raw_tx == 0)){
638 if (unlikely(skb->len < SNAP_SIZE + sizeof(u16))) { 710 if (unlikely(skb->len < SNAP_SIZE + sizeof(u16))) {
639 printk(KERN_WARNING "%s: skb too small (%d).\n", 711 printk(KERN_WARNING "%s: skb too small (%d).\n",
640 ieee->dev->name, skb->len); 712 ieee->dev->name, skb->len);
641 goto success; 713 goto success;
642 } 714 }
715 /* Save source and destination addresses */
716 memcpy(dest, skb->data, ETH_ALEN);
717 memcpy(src, skb->data+ETH_ALEN, ETH_ALEN);
643 718
644 memset(skb->cb, 0, sizeof(skb->cb)); 719 memset(skb->cb, 0, sizeof(skb->cb));
645 ether_type = ntohs(((struct ethhdr *)skb->data)->h_proto); 720 ether_type = ntohs(((struct ethhdr *)skb->data)->h_proto);
646 721
647 crypt = ieee->crypt[ieee->tx_keyidx]; 722 if (ieee->iw_mode == IW_MODE_MONITOR)
723 {
724 txb = rtllib_alloc_txb(1, skb->len, GFP_ATOMIC);
725 if (unlikely(!txb)) {
726 printk(KERN_WARNING "%s: Could not allocate TXB\n",
727 ieee->dev->name);
728 goto failed;
729 }
648 730
649 encrypt = !(ether_type == ETH_P_PAE && ieee->ieee802_1x) && 731 txb->encrypted = 0;
650 ieee->host_encrypt && crypt && crypt->ops; 732 txb->payload_size = skb->len;
733 memcpy(skb_put(txb->fragments[0],skb->len), skb->data, skb->len);
651 734
652 if (!encrypt && ieee->ieee802_1x &&
653 ieee->drop_unencrypted && ether_type != ETH_P_PAE) {
654 stats->tx_dropped++;
655 goto success; 735 goto success;
656 } 736 }
657 #ifdef CONFIG_IEEE80211_DEBUG
658 if (crypt && !encrypt && ether_type == ETH_P_PAE) {
659 struct eapol *eap = (struct eapol *)(skb->data +
660 sizeof(struct ethhdr) - SNAP_SIZE - sizeof(u16));
661 IEEE80211_DEBUG_EAP("TX: IEEE 802.11 EAPOL frame: %s\n",
662 eap_get_type(eap->type));
663 }
664 #endif
665 737
666 // The following is for DHCP and ARP packet, we use cck1M to tx these packets and let LPS awake some time 738 if (skb->len > 282){
667 // to prevent DHCP protocol fail 739 if (ETH_P_IP == ether_type) {
668 if (skb->len > 282){//MINIMUM_DHCP_PACKET_SIZE) {
669 if (ETH_P_IP == ether_type) {// IP header
670 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14); 740 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
671 if (IPPROTO_UDP == ip->protocol) {//FIXME windows is 11 but here UDP in linux kernel is 17. 741 if (IPPROTO_UDP == ip->protocol) {
672 struct udphdr *udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2)); 742 struct udphdr *udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
673 if(((((u8 *)udp)[1] == 68) && (((u8 *)udp)[3] == 67)) || 743 if (((((u8 *)udp)[1] == 68) && (((u8 *)udp)[3] == 67)) ||
674 ((((u8 *)udp)[1] == 67) && (((u8 *)udp)[3] == 68))) { 744 ((((u8 *)udp)[1] == 67) && (((u8 *)udp)[3] == 68))) {
675 // 68 : UDP BOOTP client
676 // 67 : UDP BOOTP server
677 printk("DHCP pkt src port:%d, dest port:%d!!\n", ((u8 *)udp)[1],((u8 *)udp)[3]); 745 printk("DHCP pkt src port:%d, dest port:%d!!\n", ((u8 *)udp)[1],((u8 *)udp)[3]);
678 746
679 bdhcp = true; 747 bdhcp = true;
680#ifdef _RTL8192_EXT_PATCH_ 748 ieee->LPSDelayCnt = 200;
681 ieee->LPSDelayCnt = 100;//pPSC->LPSAwakeIntvl*2; //AMY,090701
682#else
683 ieee->LPSDelayCnt = 100;//pPSC->LPSAwakeIntvl*2;
684#endif
685 } 749 }
686 } 750 }
687 }else if(ETH_P_ARP == ether_type){// IP ARP packet 751 }else if (ETH_P_ARP == ether_type){
688 printk("=================>DHCP Protocol start tx ARP pkt!!\n"); 752 printk("=================>DHCP Protocol start tx ARP pkt!!\n");
689 bdhcp = true; 753 bdhcp = true;
690 ieee->LPSDelayCnt = ieee->current_network.tim.tim_count; 754 ieee->LPSDelayCnt = ieee->current_network.tim.tim_count;
755
691 756
692 }
693 } 757 }
758 }
694 759
695 /* Save source and destination addresses */ 760 skb->priority = rtllib_classify(skb, IsAmsdu);
696 memcpy(&dest, skb->data, ETH_ALEN); 761 crypt = ieee->crypt[ieee->tx_keyidx];
697 memcpy(&src, skb->data+ETH_ALEN, ETH_ALEN); 762 encrypt = !(ether_type == ETH_P_PAE && ieee->ieee802_1x) &&
763 ieee->host_encrypt && crypt && crypt->ops;
764 if (!encrypt && ieee->ieee802_1x &&
765 ieee->drop_unencrypted && ether_type != ETH_P_PAE) {
766 stats->tx_dropped++;
767 goto success;
768 }
769 #ifdef CONFIG_RTLLIB_DEBUG
770 if (crypt && !encrypt && ether_type == ETH_P_PAE) {
771 struct eapol *eap = (struct eapol *)(skb->data +
772 sizeof(struct ethhdr) - SNAP_SIZE - sizeof(u16));
773 RTLLIB_DEBUG_EAP("TX: IEEE 802.11 EAPOL frame: %s\n",
774 eap_get_type(eap->type));
775 }
776 #endif
698 777
699 /* Advance the SKB to the start of the payload */ 778 /* Advance the SKB to the start of the payload */
700 skb_pull(skb, sizeof(struct ethhdr)); 779 skb_pull(skb, sizeof(struct ethhdr));
701 780
702 /* Determine total amount of storage required for TXB packets */ 781 /* Determine total amount of storage required for TXB packets */
703 bytes = skb->len + SNAP_SIZE + sizeof(u16); 782 bytes = skb->len + SNAP_SIZE + sizeof(u16);
704 783
705 if (encrypt) 784 if (encrypt)
706 fc = IEEE80211_FTYPE_DATA | IEEE80211_FCTL_WEP; 785 fc = RTLLIB_FTYPE_DATA | RTLLIB_FCTL_WEP;
707 else 786 else
787 fc = RTLLIB_FTYPE_DATA;
708 788
709 fc = IEEE80211_FTYPE_DATA; 789 if (qos_actived)
710 790 fc |= RTLLIB_STYPE_QOS_DATA;
711 if(qos_actived)
712 fc |= IEEE80211_STYPE_QOS_DATA;
713 else 791 else
714 fc |= IEEE80211_STYPE_DATA; 792 fc |= RTLLIB_STYPE_DATA;
715 793
716 if (ieee->iw_mode == IW_MODE_INFRA) { 794 if (ieee->iw_mode == IW_MODE_INFRA) {
717 fc |= IEEE80211_FCTL_TODS; 795 fc |= RTLLIB_FCTL_TODS;
718 /* To DS: Addr1 = BSSID, Addr2 = SA, 796 /* To DS: Addr1 = BSSID, Addr2 = SA,
719 Addr3 = DA */ 797 Addr3 = DA */
720 memcpy(&header.addr1, ieee->current_network.bssid, ETH_ALEN); 798 memcpy(&header.addr1, ieee->current_network.bssid, ETH_ALEN);
721 memcpy(&header.addr2, &src, ETH_ALEN); 799 memcpy(&header.addr2, &src, ETH_ALEN);
722 memcpy(&header.addr3, &dest, ETH_ALEN); 800 if (IsAmsdu)
801 memcpy(&header.addr3, ieee->current_network.bssid, ETH_ALEN);
802 else
803 memcpy(&header.addr3, &dest, ETH_ALEN);
723 } else if (ieee->iw_mode == IW_MODE_ADHOC) { 804 } else if (ieee->iw_mode == IW_MODE_ADHOC) {
724 /* not From/To DS: Addr1 = DA, Addr2 = SA, 805 /* not From/To DS: Addr1 = DA, Addr2 = SA,
725 Addr3 = BSSID */ 806 Addr3 = BSSID */
@@ -728,29 +809,35 @@ int ieee80211_rtl_xmit(struct sk_buff *skb, struct net_device *dev)
728 memcpy(&header.addr3, ieee->current_network.bssid, ETH_ALEN); 809 memcpy(&header.addr3, ieee->current_network.bssid, ETH_ALEN);
729 } 810 }
730 811
812 bIsMulticast = is_broadcast_ether_addr(header.addr1) ||is_multicast_ether_addr(header.addr1);
813
731 header.frame_ctl = cpu_to_le16(fc); 814 header.frame_ctl = cpu_to_le16(fc);
732 815
733 /* Determine fragmentation size based on destination (multicast 816 /* Determine fragmentation size based on destination (multicast
734 * and broadcast are not fragmented) */ 817 * and broadcast are not fragmented) */
735 if (is_multicast_ether_addr(header.addr1) || 818 if (bIsMulticast) {
736 is_broadcast_ether_addr(header.addr1)) {
737 frag_size = MAX_FRAG_THRESHOLD; 819 frag_size = MAX_FRAG_THRESHOLD;
738 qos_ctl |= QOS_CTL_NOTCONTAIN_ACK; 820 qos_ctl |= QOS_CTL_NOTCONTAIN_ACK;
739 } 821 } else {
740 else { 822 frag_size = ieee->fts;
741 frag_size = ieee->fts;//default:392
742 qos_ctl = 0; 823 qos_ctl = 0;
743 } 824 }
744 825
745 if(qos_actived) 826 if (qos_actived) {
746 { 827 hdr_len = RTLLIB_3ADDR_LEN + 2;
747 hdr_len = IEEE80211_3ADDR_LEN + 2; 828
748 829 /* in case we are a client verify acm is not set for this ac */
749 skb->priority = ieee80211_classify(skb, &ieee->current_network); 830 while (unlikely(ieee->wmm_acm & (0x01 << skb->priority))) {
750 qos_ctl |= skb->priority; //set in the ieee80211_classify 831 printk("skb->priority = %x\n", skb->priority);
751 header.qos_ctl = cpu_to_le16(qos_ctl & IEEE80211_QOS_TID); 832 if (wme_downgrade_ac(skb)) {
833 break;
834 }
835 printk("converted skb->priority = %x\n", skb->priority);
836 }
837 qos_ctl |= skb->priority;
838 header.qos_ctl = cpu_to_le16(qos_ctl & RTLLIB_QOS_TID);
752 } else { 839 } else {
753 hdr_len = IEEE80211_3ADDR_LEN; 840 hdr_len = RTLLIB_3ADDR_LEN;
754 } 841 }
755 /* Determine amount of payload per fragment. Regardless of if 842 /* Determine amount of payload per fragment. Regardless of if
756 * this stack is providing the full 802.11 header, one will 843 * this stack is providing the full 802.11 header, one will
@@ -758,14 +845,14 @@ int ieee80211_rtl_xmit(struct sk_buff *skb, struct net_device *dev)
758 * it when determining the amount of payload space. */ 845 * it when determining the amount of payload space. */
759 bytes_per_frag = frag_size - hdr_len; 846 bytes_per_frag = frag_size - hdr_len;
760 if (ieee->config & 847 if (ieee->config &
761 (CFG_IEEE80211_COMPUTE_FCS | CFG_IEEE80211_RESERVE_FCS)) 848 (CFG_RTLLIB_COMPUTE_FCS | CFG_RTLLIB_RESERVE_FCS))
762 bytes_per_frag -= IEEE80211_FCS_LEN; 849 bytes_per_frag -= RTLLIB_FCS_LEN;
763 850
764 /* Each fragment may need to have room for encryption pre/postfix */ 851 /* Each fragment may need to have room for encryptiong pre/postfix */
765 if (encrypt) 852 if (encrypt) {
766 bytes_per_frag -= crypt->ops->extra_prefix_len + 853 bytes_per_frag -= crypt->ops->extra_prefix_len +
767 crypt->ops->extra_postfix_len; 854 crypt->ops->extra_postfix_len;
768 855 }
769 /* Number of fragments is the total bytes_per_frag / 856 /* Number of fragments is the total bytes_per_frag /
770 * payload_per_fragment */ 857 * payload_per_fragment */
771 nr_frags = bytes / bytes_per_frag; 858 nr_frags = bytes / bytes_per_frag;
@@ -778,7 +865,7 @@ int ieee80211_rtl_xmit(struct sk_buff *skb, struct net_device *dev)
778 /* When we allocate the TXB we allocate enough space for the reserve 865 /* When we allocate the TXB we allocate enough space for the reserve
779 * and full fragment bytes (bytes_per_frag doesn't include prefix, 866 * and full fragment bytes (bytes_per_frag doesn't include prefix,
780 * postfix, header, FCS, etc.) */ 867 * postfix, header, FCS, etc.) */
781 txb = ieee80211_alloc_txb(nr_frags, frag_size + ieee->tx_headroom, GFP_ATOMIC); 868 txb = rtllib_alloc_txb(nr_frags, frag_size + ieee->tx_headroom, GFP_ATOMIC);
782 if (unlikely(!txb)) { 869 if (unlikely(!txb)) {
783 printk(KERN_WARNING "%s: Could not allocate TXB\n", 870 printk(KERN_WARNING "%s: Could not allocate TXB\n",
784 ieee->dev->name); 871 ieee->dev->name);
@@ -787,24 +874,22 @@ int ieee80211_rtl_xmit(struct sk_buff *skb, struct net_device *dev)
787 txb->encrypted = encrypt; 874 txb->encrypted = encrypt;
788 txb->payload_size = bytes; 875 txb->payload_size = bytes;
789 876
790 if(qos_actived) 877 if (qos_actived)
791 { 878 {
792 txb->queue_index = UP2AC(skb->priority); 879 txb->queue_index = UP2AC(skb->priority);
793 } else { 880 } else {
794 txb->queue_index = WME_AC_BK; 881 txb->queue_index = WME_AC_BE;;
795 } 882 }
796 883
797
798
799 for (i = 0; i < nr_frags; i++) { 884 for (i = 0; i < nr_frags; i++) {
800 skb_frag = txb->fragments[i]; 885 skb_frag = txb->fragments[i];
801 tcb_desc = (cb_desc *)(skb_frag->cb + MAX_DEV_ADDR_SIZE); 886 tcb_desc = (cb_desc *)(skb_frag->cb + MAX_DEV_ADDR_SIZE);
802 if(qos_actived){ 887 if (qos_actived){
803 skb_frag->priority = skb->priority;//UP2AC(skb->priority); 888 skb_frag->priority = skb->priority;
804 tcb_desc->queue_index = UP2AC(skb->priority); 889 tcb_desc->queue_index = UP2AC(skb->priority);
805 } else { 890 } else {
806 skb_frag->priority = WME_AC_BK; 891 skb_frag->priority = WME_AC_BE;
807 tcb_desc->queue_index = WME_AC_BK; 892 tcb_desc->queue_index = WME_AC_BE;
808 } 893 }
809 skb_reserve(skb_frag, ieee->tx_headroom); 894 skb_reserve(skb_frag, ieee->tx_headroom);
810 895
@@ -814,37 +899,33 @@ int ieee80211_rtl_xmit(struct sk_buff *skb, struct net_device *dev)
814 else 899 else
815 tcb_desc->bHwSec = 0; 900 tcb_desc->bHwSec = 0;
816 skb_reserve(skb_frag, crypt->ops->extra_prefix_len); 901 skb_reserve(skb_frag, crypt->ops->extra_prefix_len);
817 } 902 } else {
818 else
819 {
820 tcb_desc->bHwSec = 0; 903 tcb_desc->bHwSec = 0;
821 } 904 }
822 frag_hdr = (struct ieee80211_hdr_3addrqos *)skb_put(skb_frag, hdr_len); 905 frag_hdr = (struct rtllib_hdr_3addrqos *)skb_put(skb_frag, hdr_len);
823 memcpy(frag_hdr, &header, hdr_len); 906 memcpy(frag_hdr, &header, hdr_len);
824 907
825 /* If this is not the last fragment, then add the MOREFRAGS 908 /* If this is not the last fragment, then add the MOREFRAGS
826 * bit to the frame control */ 909 * bit to the frame control */
827 if (i != nr_frags - 1) { 910 if (i != nr_frags - 1) {
828 frag_hdr->frame_ctl = cpu_to_le16( 911 frag_hdr->frame_ctl = cpu_to_le16(
829 fc | IEEE80211_FCTL_MOREFRAGS); 912 fc | RTLLIB_FCTL_MOREFRAGS);
830 bytes = bytes_per_frag; 913 bytes = bytes_per_frag;
831 914
832 } else { 915 } else {
833 /* The last fragment takes the remaining length */ 916 /* The last fragment takes the remaining length */
834 bytes = bytes_last_frag; 917 bytes = bytes_last_frag;
835 } 918 }
836 919 if ((qos_actived) && (!bIsMulticast))
837 if(qos_actived)
838 { 920 {
839 // add 1 only indicate to corresponding seq number control 2006/7/12 921 frag_hdr->seq_ctl = rtllib_query_seqnum(ieee, skb_frag, header.addr1);
840 frag_hdr->seq_ctl = cpu_to_le16(ieee->seq_ctrl[UP2AC(skb->priority)+1]<<4 | i); 922 frag_hdr->seq_ctl = cpu_to_le16(frag_hdr->seq_ctl<<4 | i);
841 } else { 923 } else {
842 frag_hdr->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0]<<4 | i); 924 frag_hdr->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0]<<4 | i);
843 } 925 }
844
845 /* Put a SNAP header on the first fragment */ 926 /* Put a SNAP header on the first fragment */
846 if (i == 0) { 927 if (i == 0) {
847 ieee80211_put_snap( 928 rtllib_put_snap(
848 skb_put(skb_frag, SNAP_SIZE + sizeof(u16)), 929 skb_put(skb_frag, SNAP_SIZE + sizeof(u16)),
849 ether_type); 930 ether_type);
850 bytes -= SNAP_SIZE + sizeof(u16); 931 bytes -= SNAP_SIZE + sizeof(u16);
@@ -858,33 +939,32 @@ int ieee80211_rtl_xmit(struct sk_buff *skb, struct net_device *dev)
858 /* Encryption routine will move the header forward in order 939 /* Encryption routine will move the header forward in order
859 * to insert the IV between the header and the payload */ 940 * to insert the IV between the header and the payload */
860 if (encrypt) 941 if (encrypt)
861 ieee80211_encrypt_fragment(ieee, skb_frag, hdr_len); 942 rtllib_encrypt_fragment(ieee, skb_frag, hdr_len);
862 if (ieee->config & 943 if (ieee->config &
863 (CFG_IEEE80211_COMPUTE_FCS | CFG_IEEE80211_RESERVE_FCS)) 944 (CFG_RTLLIB_COMPUTE_FCS | CFG_RTLLIB_RESERVE_FCS))
864 skb_put(skb_frag, 4); 945 skb_put(skb_frag, 4);
865 } 946 }
866 947
867 if(qos_actived) 948 if ((qos_actived) && (!bIsMulticast)) {
868 {
869 if (ieee->seq_ctrl[UP2AC(skb->priority) + 1] == 0xFFF) 949 if (ieee->seq_ctrl[UP2AC(skb->priority) + 1] == 0xFFF)
870 ieee->seq_ctrl[UP2AC(skb->priority) + 1] = 0; 950 ieee->seq_ctrl[UP2AC(skb->priority) + 1] = 0;
871 else 951 else
872 ieee->seq_ctrl[UP2AC(skb->priority) + 1]++; 952 ieee->seq_ctrl[UP2AC(skb->priority) + 1]++;
873 } else { 953 } else {
874 if (ieee->seq_ctrl[0] == 0xFFF) 954 if (ieee->seq_ctrl[0] == 0xFFF)
875 ieee->seq_ctrl[0] = 0; 955 ieee->seq_ctrl[0] = 0;
876 else 956 else
877 ieee->seq_ctrl[0]++; 957 ieee->seq_ctrl[0]++;
878 } 958 }
879 }else{ 959 }else{
880 if (unlikely(skb->len < sizeof(struct ieee80211_hdr_3addr))) { 960 if (unlikely(skb->len < sizeof(struct rtllib_hdr_3addr))) {
881 printk(KERN_WARNING "%s: skb too small (%d).\n", 961 printk(KERN_WARNING "%s: skb too small (%d).\n",
882 ieee->dev->name, skb->len); 962 ieee->dev->name, skb->len);
883 goto success; 963 goto success;
884 } 964 }
885 965
886 txb = ieee80211_alloc_txb(1, skb->len, GFP_ATOMIC); 966 txb = rtllib_alloc_txb(1, skb->len, GFP_ATOMIC);
887 if(!txb){ 967 if (!txb){
888 printk(KERN_WARNING "%s: Could not allocate TXB\n", 968 printk(KERN_WARNING "%s: Could not allocate TXB\n",
889 ieee->dev->name); 969 ieee->dev->name);
890 goto failed; 970 goto failed;
@@ -896,50 +976,132 @@ int ieee80211_rtl_xmit(struct sk_buff *skb, struct net_device *dev)
896 } 976 }
897 977
898 success: 978 success:
899//WB add to fill data tcb_desc here. only first fragment is considered, need to change, and you may remove to other place.
900 if (txb) 979 if (txb)
901 { 980 {
981#if 1
902 cb_desc *tcb_desc = (cb_desc *)(txb->fragments[0]->cb + MAX_DEV_ADDR_SIZE); 982 cb_desc *tcb_desc = (cb_desc *)(txb->fragments[0]->cb + MAX_DEV_ADDR_SIZE);
903 tcb_desc->bTxEnableFwCalcDur = 1; 983 tcb_desc->bTxEnableFwCalcDur = 1;
904 if (is_multicast_ether_addr(header.addr1)) 984 tcb_desc->priority = skb->priority;
905 tcb_desc->bMulticast = 1;
906 if (is_broadcast_ether_addr(header.addr1))
907 tcb_desc->bBroadcast = 1;
908 ieee80211_txrate_selectmode(ieee, tcb_desc);
909 if ( tcb_desc->bMulticast || tcb_desc->bBroadcast)
910 tcb_desc->data_rate = ieee->basic_rate;
911 else
912 tcb_desc->data_rate = CURRENT_RATE(ieee->mode, ieee->rate, ieee->HTCurrentOperaRate);
913 985
914 if(bdhcp == true){ 986 if (ether_type == ETH_P_PAE) {
915 tcb_desc->data_rate = MGN_1M; 987 if (ieee->pHTInfo->IOTAction & HT_IOT_ACT_WA_IOT_Broadcom)
988 {
989 tcb_desc->data_rate = MgntQuery_TxRateExcludeCCKRates(ieee);
990 tcb_desc->bTxDisableRateFallBack = false;
991 }else{
992 tcb_desc->data_rate = ieee->basic_rate;
916 tcb_desc->bTxDisableRateFallBack = 1; 993 tcb_desc->bTxDisableRateFallBack = 1;
994 }
995
917 996
918 tcb_desc->RATRIndex = 7; 997 tcb_desc->RATRIndex = 7;
919 tcb_desc->bTxUseDriverAssingedRate = 1; 998 tcb_desc->bTxUseDriverAssingedRate = 1;
920 tcb_desc->bdhcp = 1; 999 } else {
921 } 1000 if (is_multicast_ether_addr(header.addr1))
1001 tcb_desc->bMulticast = 1;
1002 if (is_broadcast_ether_addr(header.addr1))
1003 tcb_desc->bBroadcast = 1;
1004#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
1005 if ( tcb_desc->bMulticast || tcb_desc->bBroadcast){
1006 rtllib_txrate_selectmode(ieee, tcb_desc, p_sta);
1007 tcb_desc->data_rate = ieee->basic_rate;
1008 }
1009 else
1010 {
1011 if (ieee->iw_mode == IW_MODE_ADHOC)
1012 {
1013 u8 is_peer_shortGI_40M = 0;
1014 u8 is_peer_shortGI_20M = 0;
1015 u8 is_peer_BW_40M = 0;
1016 p_sta = GetStaInfo(ieee, header.addr1);
1017 if (NULL == p_sta)
1018 {
1019 rtllib_txrate_selectmode(ieee, tcb_desc, p_sta);
1020 tcb_desc->data_rate = ieee->rate;
1021 }
1022 else
1023 {
1024 rtllib_txrate_selectmode(ieee, tcb_desc, p_sta);
1025 tcb_desc->data_rate = CURRENT_RATE(p_sta->wireless_mode, p_sta->CurDataRate, p_sta->htinfo.HTHighestOperaRate);
1026 is_peer_shortGI_40M = p_sta->htinfo.bCurShortGI40MHz;
1027 is_peer_shortGI_20M = p_sta->htinfo.bCurShortGI20MHz;
1028 is_peer_BW_40M = p_sta->htinfo.bCurTxBW40MHz;
1029 }
1030 rtllib_qurey_ShortPreambleMode(ieee, tcb_desc);
1031 rtllib_tx_query_agg_cap(ieee, txb->fragments[0], tcb_desc);
1032 rtllib_ibss_query_HTCapShortGI(ieee, tcb_desc,is_peer_shortGI_40M,is_peer_shortGI_20M);
1033 rtllib_ibss_query_BandwidthMode(ieee, tcb_desc,is_peer_BW_40M);
1034 rtllib_query_protectionmode(ieee, tcb_desc, txb->fragments[0]);
1035 }
1036 else {
1037 rtllib_txrate_selectmode(ieee, tcb_desc, p_sta);
1038 tcb_desc->data_rate = CURRENT_RATE(ieee->mode, ieee->rate, ieee->HTCurrentOperaRate);
1039 if (bdhcp == true){
1040 if (ieee->pHTInfo->IOTAction & HT_IOT_ACT_WA_IOT_Broadcom) {
1041 tcb_desc->data_rate = MGN_1M;
1042 tcb_desc->bTxDisableRateFallBack = false;
1043 }else{
1044 tcb_desc->data_rate = MGN_1M;
1045 tcb_desc->bTxDisableRateFallBack = 1;
1046 }
1047
1048 tcb_desc->RATRIndex = 7;
1049 tcb_desc->bTxUseDriverAssingedRate = 1;
1050 tcb_desc->bdhcp = 1;
1051 }
1052 rtllib_qurey_ShortPreambleMode(ieee, tcb_desc);
1053 rtllib_tx_query_agg_cap(ieee, txb->fragments[0], tcb_desc);
1054 rtllib_query_HTCapShortGI(ieee, tcb_desc);
1055 rtllib_query_BandwidthMode(ieee, tcb_desc);
1056 rtllib_query_protectionmode(ieee, tcb_desc, txb->fragments[0]);
1057 }
1058 }
1059#else
1060 rtllib_txrate_selectmode(ieee, tcb_desc);
1061 if ( tcb_desc->bMulticast || tcb_desc->bBroadcast)
1062 tcb_desc->data_rate = ieee->basic_rate;
1063 else
1064 tcb_desc->data_rate = CURRENT_RATE(ieee->mode, ieee->rate, ieee->HTCurrentOperaRate);
1065
1066 if (bdhcp == true){
1067 if (ieee->pHTInfo->IOTAction & HT_IOT_ACT_WA_IOT_Broadcom)
1068 {
1069 tcb_desc->data_rate = MgntQuery_TxRateExcludeCCKRates(ieee);
1070 tcb_desc->bTxDisableRateFallBack = false;
1071 }else{
1072 tcb_desc->data_rate = MGN_1M;
1073 tcb_desc->bTxDisableRateFallBack = 1;
1074 }
922 1075
923 1076
924 ieee80211_qurey_ShortPreambleMode(ieee, tcb_desc); 1077 tcb_desc->RATRIndex = 7;
925 ieee80211_tx_query_agg_cap(ieee, txb->fragments[0], tcb_desc); 1078 tcb_desc->bTxUseDriverAssingedRate = 1;
926 ieee80211_query_HTCapShortGI(ieee, tcb_desc); 1079 tcb_desc->bdhcp = 1;
927 ieee80211_query_BandwidthMode(ieee, tcb_desc); 1080 }
928 ieee80211_query_protectionmode(ieee, tcb_desc, txb->fragments[0]); 1081
929 ieee80211_query_seqnum(ieee, txb->fragments[0], header.addr1); 1082 rtllib_qurey_ShortPreambleMode(ieee, tcb_desc);
1083 rtllib_tx_query_agg_cap(ieee, txb->fragments[0], tcb_desc);
1084 rtllib_query_HTCapShortGI(ieee, tcb_desc);
1085 rtllib_query_BandwidthMode(ieee, tcb_desc);
1086 rtllib_query_protectionmode(ieee, tcb_desc, txb->fragments[0]);
1087#endif
1088 }
1089#endif
930 } 1090 }
931 spin_unlock_irqrestore(&ieee->lock, flags); 1091 spin_unlock_irqrestore(&ieee->lock, flags);
932 dev_kfree_skb_any(skb); 1092 dev_kfree_skb_any(skb);
933 if (txb) { 1093 if (txb) {
934 if (ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE){ 1094 if (ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE){
935 ieee80211_softmac_xmit(txb, ieee); 1095 dev->stats.tx_packets++;
1096 dev->stats.tx_bytes += txb->payload_size;
1097 rtllib_softmac_xmit(txb, ieee);
936 }else{ 1098 }else{
937 if ((*ieee->hard_start_xmit)(txb, ieee) == 0) { 1099 if ((*ieee->hard_start_xmit)(txb, dev) == 0) {
938 stats->tx_packets++; 1100 stats->tx_packets++;
939 stats->tx_bytes += txb->payload_size; 1101 stats->tx_bytes += txb->payload_size;
940 return 0; 1102 return 0;
941 } 1103 }
942 ieee80211_txb_free(txb); 1104 rtllib_txb_free(txb);
943 } 1105 }
944 } 1106 }
945 1107
@@ -952,4 +1114,8 @@ int ieee80211_rtl_xmit(struct sk_buff *skb, struct net_device *dev)
952 return 1; 1114 return 1;
953 1115
954} 1116}
955 1117int rtllib_xmit(struct sk_buff *skb, struct net_device *dev)
1118{
1119 memset(skb->cb, 0, sizeof(skb->cb));
1120 return rtllib_xmit_inter(skb, dev);
1121}
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_wx.c b/drivers/staging/rtl8192e/rtllib_wx.c
index 6530d9b6829..7f3f5b05840 100644
--- a/drivers/staging/rtl8192e/ieee80211/ieee80211_wx.c
+++ b/drivers/staging/rtl8192e/rtllib_wx.c
@@ -32,16 +32,14 @@
32#include <linux/wireless.h> 32#include <linux/wireless.h>
33#include <linux/version.h> 33#include <linux/version.h>
34#include <linux/kmod.h> 34#include <linux/kmod.h>
35#include <linux/slab.h>
36#include <linux/module.h> 35#include <linux/module.h>
37 36
38#include "ieee80211.h" 37#include "rtllib.h"
39
40struct modes_unit { 38struct modes_unit {
41 char *mode_string; 39 char *mode_string;
42 int mode_size; 40 int mode_size;
43}; 41};
44struct modes_unit ieee80211_modes[] = { 42static struct modes_unit rtllib_modes[] = {
45 {"a",1}, 43 {"a",1},
46 {"b",1}, 44 {"b",1},
47 {"g",1}, 45 {"g",1},
@@ -50,12 +48,10 @@ struct modes_unit ieee80211_modes[] = {
50 {"N-5G",4}, 48 {"N-5G",4},
51}; 49};
52 50
53#define iwe_stream_add_event_rsl iwe_stream_add_event
54
55#define MAX_CUSTOM_LEN 64 51#define MAX_CUSTOM_LEN 64
56static inline char *rtl819x_translate_scan(struct ieee80211_device *ieee, 52static inline char *rtl819x_translate_scan(struct rtllib_device *ieee,
57 char *start, char *stop, 53 char *start, char *stop,
58 struct ieee80211_network *network, 54 struct rtllib_network *network,
59 struct iw_request_info *info) 55 struct iw_request_info *info)
60{ 56{
61 char custom[MAX_CUSTOM_LEN]; 57 char custom[MAX_CUSTOM_LEN];
@@ -77,20 +73,22 @@ static inline char *rtl819x_translate_scan(struct ieee80211_device *ieee,
77 /* Add the ESSID */ 73 /* Add the ESSID */
78 iwe.cmd = SIOCGIWESSID; 74 iwe.cmd = SIOCGIWESSID;
79 iwe.u.data.flags = 1; 75 iwe.u.data.flags = 1;
80// if (network->flags & NETWORK_EMPTY_ESSID) { 76 if (network->ssid_len > 0){
81 if (network->ssid_len == 0) {
82 iwe.u.data.length = sizeof("<hidden>");
83 start = iwe_stream_add_point(info, start, stop, &iwe, "<hidden>");
84 } else {
85 iwe.u.data.length = min(network->ssid_len, (u8)32); 77 iwe.u.data.length = min(network->ssid_len, (u8)32);
86 start = iwe_stream_add_point(info, start, stop, &iwe, network->ssid); 78 start = iwe_stream_add_point_rsl(info, start, stop, &iwe, network->ssid);
87 } 79 }else if (network->hidden_ssid_len == 0){
80 iwe.u.data.length = sizeof("<hidden>");
81 start = iwe_stream_add_point_rsl(info, start, stop, &iwe, "<hidden>");
82 }else {
83 iwe.u.data.length = min(network->hidden_ssid_len, (u8)32);
84 start = iwe_stream_add_point_rsl(info, start, stop, &iwe, network->hidden_ssid);
85 }
88 /* Add the protocol name */ 86 /* Add the protocol name */
89 iwe.cmd = SIOCGIWNAME; 87 iwe.cmd = SIOCGIWNAME;
90 for(i=0; i<ARRAY_SIZE(ieee80211_modes); i++) { 88 for (i=0; i<(sizeof(rtllib_modes)/sizeof(rtllib_modes[0])); i++) {
91 if(network->mode&(1<<i)) { 89 if (network->mode&(1<<i)) {
92 sprintf(pname,ieee80211_modes[i].mode_string,ieee80211_modes[i].mode_size); 90 sprintf(pname,rtllib_modes[i].mode_string,rtllib_modes[i].mode_size);
93 pname +=ieee80211_modes[i].mode_size; 91 pname +=rtllib_modes[i].mode_size;
94 } 92 }
95 } 93 }
96 *pname = '\0'; 94 *pname = '\0';
@@ -99,22 +97,23 @@ static inline char *rtl819x_translate_scan(struct ieee80211_device *ieee,
99 /* Add mode */ 97 /* Add mode */
100 iwe.cmd = SIOCGIWMODE; 98 iwe.cmd = SIOCGIWMODE;
101 if (network->capability & 99 if (network->capability &
102 (WLAN_CAPABILITY_BSS | WLAN_CAPABILITY_IBSS)) { 100 (WLAN_CAPABILITY_ESS | WLAN_CAPABILITY_IBSS)) {
103 if (network->capability & WLAN_CAPABILITY_BSS) 101 if (network->capability & WLAN_CAPABILITY_ESS)
104 iwe.u.mode = IW_MODE_MASTER; 102 iwe.u.mode = IW_MODE_MASTER;
105 else 103 else
106 iwe.u.mode = IW_MODE_ADHOC; 104 iwe.u.mode = IW_MODE_ADHOC;
107 start = iwe_stream_add_event_rsl(info, start, stop, &iwe, IW_EV_UINT_LEN); 105 start = iwe_stream_add_event_rsl(info, start, stop, &iwe, IW_EV_UINT_LEN);
108 } 106 }
109 107
110 /* Add frequency/channel */ 108 /* Add frequency/channel */
111 iwe.cmd = SIOCGIWFREQ; 109 iwe.cmd = SIOCGIWFREQ;
112/* iwe.u.freq.m = ieee80211_frequency(network->channel, network->mode); 110/* iwe.u.freq.m = rtllib_frequency(network->channel, network->mode);
113 iwe.u.freq.e = 3; */ 111 iwe.u.freq.e = 3; */
114 iwe.u.freq.m = network->channel; 112 iwe.u.freq.m = network->channel;
115 iwe.u.freq.e = 0; 113 iwe.u.freq.e = 0;
116 iwe.u.freq.i = 0; 114 iwe.u.freq.i = 0;
117 start = iwe_stream_add_event_rsl(info, start, stop, &iwe, IW_EV_FREQ_LEN); 115 start = iwe_stream_add_event_rsl(info, start, stop, &iwe, IW_EV_FREQ_LEN);
116
118 /* Add encryption capability */ 117 /* Add encryption capability */
119 iwe.cmd = SIOCGIWENCODE; 118 iwe.cmd = SIOCGIWENCODE;
120 if (network->capability & WLAN_CAPABILITY_PRIVACY) 119 if (network->capability & WLAN_CAPABILITY_PRIVACY)
@@ -122,7 +121,7 @@ static inline char *rtl819x_translate_scan(struct ieee80211_device *ieee,
122 else 121 else
123 iwe.u.data.flags = IW_ENCODE_DISABLED; 122 iwe.u.data.flags = IW_ENCODE_DISABLED;
124 iwe.u.data.length = 0; 123 iwe.u.data.length = 0;
125 start = iwe_stream_add_point(info, start, stop, &iwe, network->ssid); 124 start = iwe_stream_add_point_rsl(info, start, stop, &iwe, network->ssid);
126 /* Add basic and extended rates */ 125 /* Add basic and extended rates */
127 max_rate = 0; 126 max_rate = 0;
128 p = custom; 127 p = custom;
@@ -147,7 +146,7 @@ static inline char *rtl819x_translate_scan(struct ieee80211_device *ieee,
147 max_rate = rate; 146 max_rate = rate;
148 } 147 }
149 148
150 if (network->mode >= IEEE_N_24G)//add N rate here; 149 if (network->mode >= IEEE_N_24G)
151 { 150 {
152 PHT_CAPABILITY_ELE ht_cap = NULL; 151 PHT_CAPABILITY_ELE ht_cap = NULL;
153 bool is40M = false, isShortGI = false; 152 bool is40M = false, isShortGI = false;
@@ -169,33 +168,33 @@ static inline char *rtl819x_translate_scan(struct ieee80211_device *ieee,
169 iwe.cmd = SIOCGIWRATE; 168 iwe.cmd = SIOCGIWRATE;
170 iwe.u.bitrate.fixed = iwe.u.bitrate.disabled = 0; 169 iwe.u.bitrate.fixed = iwe.u.bitrate.disabled = 0;
171 iwe.u.bitrate.value = max_rate * 500000; 170 iwe.u.bitrate.value = max_rate * 500000;
172 start = iwe_stream_add_event_rsl(info, start, stop, &iwe, 171 start = iwe_stream_add_event_rsl(info, start, stop, &iwe,
173 IW_EV_PARAM_LEN); 172 IW_EV_PARAM_LEN);
174 iwe.cmd = IWEVCUSTOM; 173 iwe.cmd = IWEVCUSTOM;
175 iwe.u.data.length = p - custom; 174 iwe.u.data.length = p - custom;
176 if (iwe.u.data.length) 175 if (iwe.u.data.length)
177 start = iwe_stream_add_point(info, start, stop, &iwe, custom); 176 start = iwe_stream_add_point_rsl(info, start, stop, &iwe, custom);
178 /* Add quality statistics */ 177 /* Add quality statistics */
179 /* TODO: Fix these values... */ 178 /* TODO: Fix these values... */
180 iwe.cmd = IWEVQUAL; 179 iwe.cmd = IWEVQUAL;
181 iwe.u.qual.qual = network->stats.signal; 180 iwe.u.qual.qual = network->stats.signal;
182 iwe.u.qual.level = network->stats.rssi; 181 iwe.u.qual.level = network->stats.rssi;
183 iwe.u.qual.noise = network->stats.noise; 182 iwe.u.qual.noise = network->stats.noise;
184 iwe.u.qual.updated = network->stats.mask & IEEE80211_STATMASK_WEMASK; 183 iwe.u.qual.updated = network->stats.mask & RTLLIB_STATMASK_WEMASK;
185 if (!(network->stats.mask & IEEE80211_STATMASK_RSSI)) 184 if (!(network->stats.mask & RTLLIB_STATMASK_RSSI))
186 iwe.u.qual.updated |= IW_QUAL_LEVEL_INVALID; 185 iwe.u.qual.updated |= IW_QUAL_LEVEL_INVALID;
187 if (!(network->stats.mask & IEEE80211_STATMASK_NOISE)) 186 if (!(network->stats.mask & RTLLIB_STATMASK_NOISE))
188 iwe.u.qual.updated |= IW_QUAL_NOISE_INVALID; 187 iwe.u.qual.updated |= IW_QUAL_NOISE_INVALID;
189 if (!(network->stats.mask & IEEE80211_STATMASK_SIGNAL)) 188 if (!(network->stats.mask & RTLLIB_STATMASK_SIGNAL))
190 iwe.u.qual.updated |= IW_QUAL_QUAL_INVALID; 189 iwe.u.qual.updated |= IW_QUAL_QUAL_INVALID;
191 iwe.u.qual.updated = 7; 190 iwe.u.qual.updated = 7;
192 start = iwe_stream_add_event_rsl(info, start, stop, &iwe, IW_EV_QUAL_LEN); 191 start = iwe_stream_add_event_rsl(info, start, stop, &iwe, IW_EV_QUAL_LEN);
192
193 iwe.cmd = IWEVCUSTOM; 193 iwe.cmd = IWEVCUSTOM;
194 p = custom; 194 p = custom;
195
196 iwe.u.data.length = p - custom; 195 iwe.u.data.length = p - custom;
197 if (iwe.u.data.length) 196 if (iwe.u.data.length)
198 start = iwe_stream_add_point(info, start, stop, &iwe, custom); 197 start = iwe_stream_add_point_rsl(info, start, stop, &iwe, custom);
199#if (WIRELESS_EXT < 18) 198#if (WIRELESS_EXT < 18)
200 if (ieee->wpa_enabled && network->wpa_ie_len){ 199 if (ieee->wpa_enabled && network->wpa_ie_len){
201 char buf[MAX_WPA_IE_LEN * 2 + 30]; 200 char buf[MAX_WPA_IE_LEN * 2 + 30];
@@ -208,7 +207,7 @@ static inline char *rtl819x_translate_scan(struct ieee80211_device *ieee,
208 memset(&iwe, 0, sizeof(iwe)); 207 memset(&iwe, 0, sizeof(iwe));
209 iwe.cmd = IWEVCUSTOM; 208 iwe.cmd = IWEVCUSTOM;
210 iwe.u.data.length = strlen(buf); 209 iwe.u.data.length = strlen(buf);
211 start = iwe_stream_add_point(info, start, stop, &iwe, buf); 210 start = iwe_stream_add_point_rsl(info, start, stop, &iwe, buf);
212 } 211 }
213 212
214 if (ieee->wpa_enabled && network->rsn_ie_len){ 213 if (ieee->wpa_enabled && network->rsn_ie_len){
@@ -223,7 +222,7 @@ static inline char *rtl819x_translate_scan(struct ieee80211_device *ieee,
223 memset(&iwe, 0, sizeof(iwe)); 222 memset(&iwe, 0, sizeof(iwe));
224 iwe.cmd = IWEVCUSTOM; 223 iwe.cmd = IWEVCUSTOM;
225 iwe.u.data.length = strlen(buf); 224 iwe.u.data.length = strlen(buf);
226 start = iwe_stream_add_point(info, start, stop, &iwe, buf); 225 start = iwe_stream_add_point_rsl(info, start, stop, &iwe, buf);
227 } 226 }
228#else 227#else
229 memset(&iwe, 0, sizeof(iwe)); 228 memset(&iwe, 0, sizeof(iwe));
@@ -233,7 +232,7 @@ static inline char *rtl819x_translate_scan(struct ieee80211_device *ieee,
233 memcpy(buf, network->wpa_ie, network->wpa_ie_len); 232 memcpy(buf, network->wpa_ie, network->wpa_ie_len);
234 iwe.cmd = IWEVGENIE; 233 iwe.cmd = IWEVGENIE;
235 iwe.u.data.length = network->wpa_ie_len; 234 iwe.u.data.length = network->wpa_ie_len;
236 start = iwe_stream_add_point(info, start, stop, &iwe, buf); 235 start = iwe_stream_add_point_rsl(info, start, stop, &iwe, buf);
237 } 236 }
238 memset(&iwe, 0, sizeof(iwe)); 237 memset(&iwe, 0, sizeof(iwe));
239 if (network->rsn_ie_len) 238 if (network->rsn_ie_len)
@@ -242,10 +241,22 @@ static inline char *rtl819x_translate_scan(struct ieee80211_device *ieee,
242 memcpy(buf, network->rsn_ie, network->rsn_ie_len); 241 memcpy(buf, network->rsn_ie, network->rsn_ie_len);
243 iwe.cmd = IWEVGENIE; 242 iwe.cmd = IWEVGENIE;
244 iwe.u.data.length = network->rsn_ie_len; 243 iwe.u.data.length = network->rsn_ie_len;
245 start = iwe_stream_add_point(info, start, stop, &iwe, buf); 244 start = iwe_stream_add_point_rsl(info, start, stop, &iwe, buf);
246 } 245 }
247#endif
248 246
247#ifndef CUSTOMER_ID_INTEL_CMPC
248 /* add info for WZC */
249 memset(&iwe, 0, sizeof(iwe));
250 if (network->wzc_ie_len)
251 {
252 char buf[MAX_WZC_IE_LEN];
253 memcpy(buf, network->wzc_ie, network->wzc_ie_len);
254 iwe.cmd = IWEVGENIE;
255 iwe.u.data.length = network->wzc_ie_len;
256 start = iwe_stream_add_point_rsl(info, start, stop, &iwe, buf);
257 }
258#endif
259#endif
249 260
250 /* Add EXTRA: Age to display seconds since last beacon/probe response 261 /* Add EXTRA: Age to display seconds since last beacon/probe response
251 * for given network. */ 262 * for given network. */
@@ -255,31 +266,29 @@ static inline char *rtl819x_translate_scan(struct ieee80211_device *ieee,
255 " Last beacon: %lums ago", (jiffies - network->last_scanned) / (HZ / 100)); 266 " Last beacon: %lums ago", (jiffies - network->last_scanned) / (HZ / 100));
256 iwe.u.data.length = p - custom; 267 iwe.u.data.length = p - custom;
257 if (iwe.u.data.length) 268 if (iwe.u.data.length)
258 start = iwe_stream_add_point(info, start, stop, &iwe, custom); 269 start = iwe_stream_add_point_rsl(info, start, stop, &iwe, custom);
259 270
260 return start; 271 return start;
261} 272}
262 273
263int ieee80211_wx_get_scan(struct ieee80211_device *ieee, 274int rtllib_wx_get_scan(struct rtllib_device *ieee,
264 struct iw_request_info *info, 275 struct iw_request_info *info,
265 union iwreq_data *wrqu, char *extra) 276 union iwreq_data *wrqu, char *extra)
266{ 277{
267 struct ieee80211_network *network; 278 struct rtllib_network *network;
268 unsigned long flags; 279 unsigned long flags;
269 280
270 char *ev = extra; 281 char *ev = extra;
271// char *stop = ev + IW_SCAN_MAX_DATA; 282 char *stop = ev + wrqu->data.length;
272 char *stop = ev + wrqu->data.length;//IW_SCAN_MAX_DATA;
273 //char *stop = ev + IW_SCAN_MAX_DATA;
274 int i = 0; 283 int i = 0;
275 int err = 0; 284 int err = 0;
276 IEEE80211_DEBUG_WX("Getting scan\n"); 285 RTLLIB_DEBUG_WX("Getting scan\n");
277 down(&ieee->wx_sem); 286 down(&ieee->wx_sem);
278 spin_lock_irqsave(&ieee->lock, flags); 287 spin_lock_irqsave(&ieee->lock, flags);
279 288
280 list_for_each_entry(network, &ieee->network_list, list) { 289 list_for_each_entry(network, &ieee->network_list, list) {
281 i++; 290 i++;
282 if((stop-ev)<200) 291 if ((stop-ev)<200)
283 { 292 {
284 err = -E2BIG; 293 err = -E2BIG;
285 break; 294 break;
@@ -288,12 +297,12 @@ int ieee80211_wx_get_scan(struct ieee80211_device *ieee,
288 time_after(network->last_scanned + ieee->scan_age, jiffies)) 297 time_after(network->last_scanned + ieee->scan_age, jiffies))
289 ev = rtl819x_translate_scan(ieee, ev, stop, network, info); 298 ev = rtl819x_translate_scan(ieee, ev, stop, network, info);
290 else 299 else
291 IEEE80211_DEBUG_SCAN( 300 RTLLIB_DEBUG_SCAN(
292 "Not showing network '%s (" 301 "Not showing network '%s ("
293 "%pM)' due to age (%lums).\n", 302 MAC_FMT ")' due to age (%lums).\n",
294 escape_essid(network->ssid, 303 escape_essid(network->ssid,
295 network->ssid_len), 304 network->ssid_len),
296 network->bssid, 305 MAC_ARG(network->bssid),
297 (jiffies - network->last_scanned) / (HZ / 100)); 306 (jiffies - network->last_scanned) / (HZ / 100));
298 } 307 }
299 308
@@ -302,24 +311,24 @@ int ieee80211_wx_get_scan(struct ieee80211_device *ieee,
302 wrqu->data.length = ev - extra; 311 wrqu->data.length = ev - extra;
303 wrqu->data.flags = 0; 312 wrqu->data.flags = 0;
304 313
305 IEEE80211_DEBUG_WX("exit: %d networks returned.\n", i); 314 RTLLIB_DEBUG_WX("exit: %d networks returned.\n", i);
306 315
307 return err; 316 return err;
308} 317}
309 318
310int ieee80211_wx_set_encode(struct ieee80211_device *ieee, 319int rtllib_wx_set_encode(struct rtllib_device *ieee,
311 struct iw_request_info *info, 320 struct iw_request_info *info,
312 union iwreq_data *wrqu, char *keybuf) 321 union iwreq_data *wrqu, char *keybuf)
313{ 322{
314 struct iw_point *erq = &(wrqu->encoding); 323 struct iw_point *erq = &(wrqu->encoding);
315 struct net_device *dev = ieee->dev; 324 struct net_device *dev = ieee->dev;
316 struct ieee80211_security sec = { 325 struct rtllib_security sec = {
317 .flags = 0 326 .flags = 0
318 }; 327 };
319 int i, key, key_provided, len; 328 int i, key, key_provided, len;
320 struct ieee80211_crypt_data **crypt; 329 struct rtllib_crypt_data **crypt;
321 330
322 IEEE80211_DEBUG_WX("SET_ENCODE\n"); 331 RTLLIB_DEBUG_WX("SET_ENCODE\n");
323 332
324 key = erq->flags & IW_ENCODE_INDEX; 333 key = erq->flags & IW_ENCODE_INDEX;
325 if (key) { 334 if (key) {
@@ -332,17 +341,16 @@ int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
332 key = ieee->tx_keyidx; 341 key = ieee->tx_keyidx;
333 } 342 }
334 343
335 IEEE80211_DEBUG_WX("Key: %d [%s]\n", key, key_provided ? 344 RTLLIB_DEBUG_WX("Key: %d [%s]\n", key, key_provided ?
336 "provided" : "default"); 345 "provided" : "default");
337 crypt = &ieee->crypt[key]; 346 crypt = &ieee->crypt[key];
338
339 if (erq->flags & IW_ENCODE_DISABLED) { 347 if (erq->flags & IW_ENCODE_DISABLED) {
340 if (key_provided && *crypt) { 348 if (key_provided && *crypt) {
341 IEEE80211_DEBUG_WX("Disabling encryption on key %d.\n", 349 RTLLIB_DEBUG_WX("Disabling encryption on key %d.\n",
342 key); 350 key);
343 ieee80211_crypt_delayed_deinit(ieee, crypt); 351 rtllib_crypt_delayed_deinit(ieee, crypt);
344 } else 352 } else
345 IEEE80211_DEBUG_WX("Disabling encryption.\n"); 353 RTLLIB_DEBUG_WX("Disabling encryption.\n");
346 354
347 /* Check all the keys to see if any are still configured, 355 /* Check all the keys to see if any are still configured,
348 * and if no key index was provided, de-init them all */ 356 * and if no key index was provided, de-init them all */
@@ -350,8 +358,7 @@ int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
350 if (ieee->crypt[i] != NULL) { 358 if (ieee->crypt[i] != NULL) {
351 if (key_provided) 359 if (key_provided)
352 break; 360 break;
353 ieee80211_crypt_delayed_deinit( 361 rtllib_crypt_delayed_deinit(ieee, &ieee->crypt[i]);
354 ieee, &ieee->crypt[i]);
355 } 362 }
356 } 363 }
357 364
@@ -373,20 +380,24 @@ int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
373 strcmp((*crypt)->ops->name, "WEP") != 0) { 380 strcmp((*crypt)->ops->name, "WEP") != 0) {
374 /* changing to use WEP; deinit previously used algorithm 381 /* changing to use WEP; deinit previously used algorithm
375 * on this key */ 382 * on this key */
376 ieee80211_crypt_delayed_deinit(ieee, crypt); 383 rtllib_crypt_delayed_deinit(ieee, crypt);
377 } 384 }
378 385
379 if (*crypt == NULL) { 386 if (*crypt == NULL) {
380 struct ieee80211_crypt_data *new_crypt; 387 struct rtllib_crypt_data *new_crypt;
381 388
382 /* take WEP into use */ 389 /* take WEP into use */
383 new_crypt = kzalloc(sizeof(struct ieee80211_crypt_data), 390 new_crypt = kmalloc(sizeof(struct rtllib_crypt_data),
384 GFP_KERNEL); 391 GFP_KERNEL);
385 if (new_crypt == NULL) 392 if (new_crypt == NULL)
386 return -ENOMEM; 393 return -ENOMEM;
387 new_crypt->ops = ieee80211_get_crypto_ops("WEP"); 394 memset(new_crypt, 0, sizeof(struct rtllib_crypt_data));
388 if (!new_crypt->ops) 395 new_crypt->ops = rtllib_get_crypto_ops("WEP");
389 new_crypt->ops = ieee80211_get_crypto_ops("WEP"); 396 if (!new_crypt->ops) {
397 request_module("rtllib_crypt_wep");
398 new_crypt->ops = rtllib_get_crypto_ops("WEP");
399 }
400
390 if (new_crypt->ops) 401 if (new_crypt->ops)
391 new_crypt->priv = new_crypt->ops->init(key); 402 new_crypt->priv = new_crypt->ops->init(key);
392 403
@@ -395,7 +406,7 @@ int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
395 new_crypt = NULL; 406 new_crypt = NULL;
396 407
397 printk(KERN_WARNING "%s: could not initialize WEP: " 408 printk(KERN_WARNING "%s: could not initialize WEP: "
398 "load module ieee80211_crypt_wep\n", 409 "load module rtllib_crypt_wep\n",
399 dev->name); 410 dev->name);
400 return -EOPNOTSUPP; 411 return -EOPNOTSUPP;
401 } 412 }
@@ -409,11 +420,11 @@ int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
409 if (len > erq->length) 420 if (len > erq->length)
410 memset(sec.keys[key] + erq->length, 0, 421 memset(sec.keys[key] + erq->length, 0,
411 len - erq->length); 422 len - erq->length);
412 IEEE80211_DEBUG_WX("Setting key %d to '%s' (%d:%d bytes)\n", 423 RTLLIB_DEBUG_WX("Setting key %d to '%s' (%d:%d bytes)\n",
413 key, escape_essid(sec.keys[key], len), 424 key, escape_essid(sec.keys[key], len),
414 erq->length, len); 425 erq->length, len);
415 sec.key_sizes[key] = len; 426 sec.key_sizes[key] = len;
416 (*crypt)->ops->set_key(sec.keys[key], len, NULL, 427 (*crypt)->ops->set_key(sec.keys[key], len, NULL,
417 (*crypt)->priv); 428 (*crypt)->priv);
418 sec.flags |= (1 << key); 429 sec.flags |= (1 << key);
419 /* This ensures a key will be activated if no key is 430 /* This ensures a key will be activated if no key is
@@ -430,7 +441,7 @@ int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
430 printk("Setting key %d to all zero.\n", 441 printk("Setting key %d to all zero.\n",
431 key); 442 key);
432 443
433 IEEE80211_DEBUG_WX("Setting key %d to all zero.\n", 444 RTLLIB_DEBUG_WX("Setting key %d to all zero.\n",
434 key); 445 key);
435 memset(sec.keys[key], 0, 13); 446 memset(sec.keys[key], 0, 13);
436 (*crypt)->ops->set_key(sec.keys[key], 13, NULL, 447 (*crypt)->ops->set_key(sec.keys[key], 13, NULL,
@@ -441,20 +452,19 @@ int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
441 452
442 /* No key data - just set the default TX key index */ 453 /* No key data - just set the default TX key index */
443 if (key_provided) { 454 if (key_provided) {
444 IEEE80211_DEBUG_WX( 455 RTLLIB_DEBUG_WX(
445 "Setting key %d to default Tx key.\n", key); 456 "Setting key %d to default Tx key.\n", key);
446 ieee->tx_keyidx = key; 457 ieee->tx_keyidx = key;
447 sec.active_key = key; 458 sec.active_key = key;
448 sec.flags |= SEC_ACTIVE_KEY; 459 sec.flags |= SEC_ACTIVE_KEY;
449 } 460 }
450 } 461 }
451
452 done: 462 done:
453 ieee->open_wep = !(erq->flags & IW_ENCODE_RESTRICTED); 463 ieee->open_wep = !(erq->flags & IW_ENCODE_RESTRICTED);
454 ieee->auth_mode = ieee->open_wep ? WLAN_AUTH_OPEN : WLAN_AUTH_SHARED_KEY; 464 ieee->auth_mode = ieee->open_wep ? WLAN_AUTH_OPEN : WLAN_AUTH_SHARED_KEY;
455 sec.auth_mode = ieee->open_wep ? WLAN_AUTH_OPEN : WLAN_AUTH_SHARED_KEY; 465 sec.auth_mode = ieee->open_wep ? WLAN_AUTH_OPEN : WLAN_AUTH_SHARED_KEY;
456 sec.flags |= SEC_AUTH_MODE; 466 sec.flags |= SEC_AUTH_MODE;
457 IEEE80211_DEBUG_WX("Auth: %s\n", sec.auth_mode == WLAN_AUTH_OPEN ? 467 RTLLIB_DEBUG_WX("Auth: %s\n", sec.auth_mode == WLAN_AUTH_OPEN ?
458 "OPEN" : "SHARED KEY"); 468 "OPEN" : "SHARED KEY");
459 469
460 /* For now we just support WEP, so only set that security level... 470 /* For now we just support WEP, so only set that security level...
@@ -463,7 +473,7 @@ int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
463 sec.level = SEC_LEVEL_1; /* 40 and 104 bit WEP */ 473 sec.level = SEC_LEVEL_1; /* 40 and 104 bit WEP */
464 474
465 if (ieee->set_security) 475 if (ieee->set_security)
466 ieee->set_security(ieee, &sec); 476 ieee->set_security(dev, &sec);
467 477
468 /* Do not reset port if card is in Managed mode since resetting will 478 /* Do not reset port if card is in Managed mode since resetting will
469 * generate new IEEE 802.11 authentication which may end up in looping 479 * generate new IEEE 802.11 authentication which may end up in looping
@@ -472,24 +482,24 @@ int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
472 * the callbacks structures used to initialize the 802.11 stack. */ 482 * the callbacks structures used to initialize the 802.11 stack. */
473 if (ieee->reset_on_keychange && 483 if (ieee->reset_on_keychange &&
474 ieee->iw_mode != IW_MODE_INFRA && 484 ieee->iw_mode != IW_MODE_INFRA &&
475 ieee->reset_port && ieee->reset_port(ieee)) { 485 ieee->reset_port && ieee->reset_port(dev)) {
476 printk(KERN_DEBUG "%s: reset_port failed\n", dev->name); 486 printk(KERN_DEBUG "%s: reset_port failed\n", dev->name);
477 return -EINVAL; 487 return -EINVAL;
478 } 488 }
479 return 0; 489 return 0;
480} 490}
481 491
482int ieee80211_wx_get_encode(struct ieee80211_device *ieee, 492int rtllib_wx_get_encode(struct rtllib_device *ieee,
483 struct iw_request_info *info, 493 struct iw_request_info *info,
484 union iwreq_data *wrqu, char *keybuf) 494 union iwreq_data *wrqu, char *keybuf)
485{ 495{
486 struct iw_point *erq = &(wrqu->encoding); 496 struct iw_point *erq = &(wrqu->encoding);
487 int len, key; 497 int len, key;
488 struct ieee80211_crypt_data *crypt; 498 struct rtllib_crypt_data *crypt;
489 499
490 IEEE80211_DEBUG_WX("GET_ENCODE\n"); 500 RTLLIB_DEBUG_WX("GET_ENCODE\n");
491 501
492 if(ieee->iw_mode == IW_MODE_MONITOR) 502 if (ieee->iw_mode == IW_MODE_MONITOR)
493 return -1; 503 return -1;
494 504
495 key = erq->flags & IW_ENCODE_INDEX; 505 key = erq->flags & IW_ENCODE_INDEX;
@@ -497,10 +507,11 @@ int ieee80211_wx_get_encode(struct ieee80211_device *ieee,
497 if (key > WEP_KEYS) 507 if (key > WEP_KEYS)
498 return -EINVAL; 508 return -EINVAL;
499 key--; 509 key--;
500 } else 510 } else {
501 key = ieee->tx_keyidx; 511 key = ieee->tx_keyidx;
502 512 }
503 crypt = ieee->crypt[key]; 513 crypt = ieee->crypt[key];
514
504 erq->flags = key + 1; 515 erq->flags = key + 1;
505 516
506 if (crypt == NULL || crypt->ops == NULL) { 517 if (crypt == NULL || crypt->ops == NULL) {
@@ -508,15 +519,6 @@ int ieee80211_wx_get_encode(struct ieee80211_device *ieee,
508 erq->flags |= IW_ENCODE_DISABLED; 519 erq->flags |= IW_ENCODE_DISABLED;
509 return 0; 520 return 0;
510 } 521 }
511#if 0
512 if (strcmp(crypt->ops->name, "WEP") != 0) {
513 /* only WEP is supported with wireless extensions, so just
514 * report that encryption is used */
515 erq->length = 0;
516 erq->flags |= IW_ENCODE_ENABLED;
517 return 0;
518 }
519#endif
520 len = crypt->ops->get_key(keybuf, SCM_KEY_LEN, NULL, crypt->priv); 522 len = crypt->ops->get_key(keybuf, SCM_KEY_LEN, NULL, crypt->priv);
521 erq->length = (len >= 0 ? len : 0); 523 erq->length = (len >= 0 ? len : 0);
522 524
@@ -530,7 +532,7 @@ int ieee80211_wx_get_encode(struct ieee80211_device *ieee,
530 return 0; 532 return 0;
531} 533}
532#if (WIRELESS_EXT >= 18) 534#if (WIRELESS_EXT >= 18)
533int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee, 535int rtllib_wx_set_encode_ext(struct rtllib_device *ieee,
534 struct iw_request_info *info, 536 struct iw_request_info *info,
535 union iwreq_data *wrqu, char *extra) 537 union iwreq_data *wrqu, char *extra)
536{ 538{
@@ -540,11 +542,11 @@ int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,
540 struct iw_encode_ext *ext = (struct iw_encode_ext *)extra; 542 struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
541 int i, idx; 543 int i, idx;
542 int group_key = 0; 544 int group_key = 0;
543 const char *alg; 545 const char *alg, *module;
544 struct ieee80211_crypto_ops *ops; 546 struct rtllib_crypto_ops *ops;
545 struct ieee80211_crypt_data **crypt; 547 struct rtllib_crypt_data **crypt;
546 548
547 struct ieee80211_security sec = { 549 struct rtllib_security sec = {
548 .flags = 0, 550 .flags = 0,
549 }; 551 };
550 idx = encoding->flags & IW_ENCODE_INDEX; 552 idx = encoding->flags & IW_ENCODE_INDEX;
@@ -552,78 +554,73 @@ int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,
552 if (idx < 1 || idx > WEP_KEYS) 554 if (idx < 1 || idx > WEP_KEYS)
553 return -EINVAL; 555 return -EINVAL;
554 idx--; 556 idx--;
555 } else 557 } else{
556 idx = ieee->tx_keyidx; 558 idx = ieee->tx_keyidx;
557 559 }
558 if (ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY) { 560 if (ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY) {
559 561 crypt = &ieee->crypt[idx];
560 crypt = &ieee->crypt[idx]; 562 group_key = 1;
561 563 } else {
562 group_key = 1; 564 /* some Cisco APs use idx>0 for unicast in dynamic WEP */
563 } else { 565 if (idx != 0 && ext->alg != IW_ENCODE_ALG_WEP)
564 /* some Cisco APs use idx>0 for unicast in dynamic WEP */
565 if (idx != 0 && ext->alg != IW_ENCODE_ALG_WEP)
566 return -EINVAL;
567 if (ieee->iw_mode == IW_MODE_INFRA)
568
569 crypt = &ieee->crypt[idx];
570
571 else
572 return -EINVAL; 566 return -EINVAL;
573 } 567 if (ieee->iw_mode == IW_MODE_INFRA)
568 crypt = &ieee->crypt[idx];
569 else
570 return -EINVAL;
571 }
574 572
575 sec.flags |= SEC_ENABLED;// | SEC_ENCRYPT; 573 sec.flags |= SEC_ENABLED;
576 if ((encoding->flags & IW_ENCODE_DISABLED) || 574 if ((encoding->flags & IW_ENCODE_DISABLED) ||
577 ext->alg == IW_ENCODE_ALG_NONE) { 575 ext->alg == IW_ENCODE_ALG_NONE) {
578 if (*crypt) 576 if (*crypt)
579 ieee80211_crypt_delayed_deinit(ieee, crypt); 577 rtllib_crypt_delayed_deinit(ieee, crypt);
580
581 for (i = 0; i < WEP_KEYS; i++)
582 578
579 for (i = 0; i < WEP_KEYS; i++) {
583 if (ieee->crypt[i] != NULL) 580 if (ieee->crypt[i] != NULL)
584 581 break;
585 break; 582 }
586 583 if (i == WEP_KEYS) {
587 if (i == WEP_KEYS) { 584 sec.enabled = 0;
588 sec.enabled = 0; 585 sec.level = SEC_LEVEL_0;
589 // sec.encrypt = 0; 586 sec.flags |= SEC_LEVEL;
590 sec.level = SEC_LEVEL_0; 587 }
591 sec.flags |= SEC_LEVEL; 588 goto done;
592 } 589 }
593 goto done;
594 }
595 590
596 sec.enabled = 1; 591 sec.enabled = 1;
597 // sec.encrypt = 1;
598#if 0
599 if (group_key ? !ieee->host_mc_decrypt :
600 !(ieee->host_encrypt || ieee->host_decrypt ||
601 ieee->host_encrypt_msdu))
602 goto skip_host_crypt;
603#endif
604 switch (ext->alg) { 592 switch (ext->alg) {
605 case IW_ENCODE_ALG_WEP: 593 case IW_ENCODE_ALG_WEP:
606 alg = "WEP"; 594 alg = "WEP";
595 module = "rtllib_crypt_wep";
607 break; 596 break;
608 case IW_ENCODE_ALG_TKIP: 597 case IW_ENCODE_ALG_TKIP:
609 alg = "TKIP"; 598 alg = "TKIP";
599 module = "rtllib_crypt_tkip";
610 break; 600 break;
611 case IW_ENCODE_ALG_CCMP: 601 case IW_ENCODE_ALG_CCMP:
612 alg = "CCMP"; 602 alg = "CCMP";
603 module = "rtllib_crypt_ccmp";
613 break; 604 break;
614 default: 605 default:
615 IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n", 606 RTLLIB_DEBUG_WX("%s: unknown crypto alg %d\n",
616 dev->name, ext->alg); 607 dev->name, ext->alg);
617 ret = -EINVAL; 608 ret = -EINVAL;
618 goto done; 609 goto done;
619 } 610 }
620 printk("alg name:%s\n",alg); 611 printk("alg name:%s\n",alg);
621 612
622 ops = ieee80211_get_crypto_ops(alg); 613 ops = rtllib_get_crypto_ops(alg);
623 if (ops == NULL)
624 ops = ieee80211_get_crypto_ops(alg);
625 if (ops == NULL) { 614 if (ops == NULL) {
626 IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n", 615 char tempbuf[100];
616
617 memset( tempbuf, 0x00, 100 );
618 sprintf( tempbuf, "%s", module);
619 request_module("%s",tempbuf);
620 ops = rtllib_get_crypto_ops(alg);
621 }
622 if (ops == NULL) {
623 RTLLIB_DEBUG_WX("%s: unknown crypto alg %d\n",
627 dev->name, ext->alg); 624 dev->name, ext->alg);
628 printk("========>unknown crypto alg %d\n", ext->alg); 625 printk("========>unknown crypto alg %d\n", ext->alg);
629 ret = -EINVAL; 626 ret = -EINVAL;
@@ -631,23 +628,19 @@ int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,
631 } 628 }
632 629
633 if (*crypt == NULL || (*crypt)->ops != ops) { 630 if (*crypt == NULL || (*crypt)->ops != ops) {
634 struct ieee80211_crypt_data *new_crypt; 631 struct rtllib_crypt_data *new_crypt;
635 632
636 ieee80211_crypt_delayed_deinit(ieee, crypt); 633 rtllib_crypt_delayed_deinit(ieee, crypt);
637 634
638#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13))
639 new_crypt = kzalloc(sizeof(*new_crypt), GFP_KERNEL); 635 new_crypt = kzalloc(sizeof(*new_crypt), GFP_KERNEL);
640#else
641 new_crypt = kmalloc(sizeof(*new_crypt), GFP_KERNEL);
642 memset(new_crypt,0,sizeof(*new_crypt));
643#endif
644 if (new_crypt == NULL) { 636 if (new_crypt == NULL) {
645 ret = -ENOMEM; 637 ret = -ENOMEM;
646 goto done; 638 goto done;
647 } 639 }
648 new_crypt->ops = ops; 640 new_crypt->ops = ops;
649 if (new_crypt->ops) 641 if (new_crypt->ops)
650 new_crypt->priv = new_crypt->ops->init(idx); 642 new_crypt->priv = new_crypt->ops->init(idx);
643
651 if (new_crypt->priv == NULL) { 644 if (new_crypt->priv == NULL) {
652 kfree(new_crypt); 645 kfree(new_crypt);
653 ret = -EINVAL; 646 ret = -EINVAL;
@@ -655,37 +648,31 @@ int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,
655 } 648 }
656 *crypt = new_crypt; 649 *crypt = new_crypt;
657 650
658 } 651 }
659 652
660 if (ext->key_len > 0 && (*crypt)->ops->set_key && 653 if (ext->key_len > 0 && (*crypt)->ops->set_key &&
661 (*crypt)->ops->set_key(ext->key, ext->key_len, ext->rx_seq, 654 (*crypt)->ops->set_key(ext->key, ext->key_len, ext->rx_seq,
662 (*crypt)->priv) < 0) { 655 (*crypt)->priv) < 0) {
663 IEEE80211_DEBUG_WX("%s: key setting failed\n", dev->name); 656 RTLLIB_DEBUG_WX("%s: key setting failed\n", dev->name);
664 printk("key setting failed\n"); 657 printk("key setting failed\n");
665 ret = -EINVAL; 658 ret = -EINVAL;
666 goto done; 659 goto done;
667 } 660 }
668#if 1
669 if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) { 661 if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) {
670 ieee->tx_keyidx = idx; 662 ieee->tx_keyidx = idx;
671 sec.active_key = idx; 663 sec.active_key = idx;
672 sec.flags |= SEC_ACTIVE_KEY; 664 sec.flags |= SEC_ACTIVE_KEY;
673 } 665 }
674
675 if (ext->alg != IW_ENCODE_ALG_NONE) { 666 if (ext->alg != IW_ENCODE_ALG_NONE) {
676 //memcpy(sec.keys[idx], ext->key, ext->key_len);
677 sec.key_sizes[idx] = ext->key_len; 667 sec.key_sizes[idx] = ext->key_len;
678 sec.flags |= (1 << idx); 668 sec.flags |= (1 << idx);
679 if (ext->alg == IW_ENCODE_ALG_WEP) { 669 if (ext->alg == IW_ENCODE_ALG_WEP) {
680 // sec.encode_alg[idx] = SEC_ALG_WEP;
681 sec.flags |= SEC_LEVEL; 670 sec.flags |= SEC_LEVEL;
682 sec.level = SEC_LEVEL_1; 671 sec.level = SEC_LEVEL_1;
683 } else if (ext->alg == IW_ENCODE_ALG_TKIP) { 672 } else if (ext->alg == IW_ENCODE_ALG_TKIP) {
684 // sec.encode_alg[idx] = SEC_ALG_TKIP;
685 sec.flags |= SEC_LEVEL; 673 sec.flags |= SEC_LEVEL;
686 sec.level = SEC_LEVEL_2; 674 sec.level = SEC_LEVEL_2;
687 } else if (ext->alg == IW_ENCODE_ALG_CCMP) { 675 } else if (ext->alg == IW_ENCODE_ALG_CCMP) {
688 // sec.encode_alg[idx] = SEC_ALG_CCMP;
689 sec.flags |= SEC_LEVEL; 676 sec.flags |= SEC_LEVEL;
690 sec.level = SEC_LEVEL_3; 677 sec.level = SEC_LEVEL_3;
691 } 678 }
@@ -693,27 +680,26 @@ int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,
693 if (group_key) 680 if (group_key)
694 sec.flags &= ~SEC_LEVEL; 681 sec.flags &= ~SEC_LEVEL;
695 } 682 }
696#endif
697done: 683done:
698 if (ieee->set_security) 684 if (ieee->set_security)
699 ieee->set_security(ieee, &sec); 685 ieee->set_security(ieee->dev, &sec);
700 686
701 if (ieee->reset_on_keychange && 687 if (ieee->reset_on_keychange &&
702 ieee->iw_mode != IW_MODE_INFRA && 688 ieee->iw_mode != IW_MODE_INFRA &&
703 ieee->reset_port && ieee->reset_port(ieee)) { 689 ieee->reset_port && ieee->reset_port(dev)) {
704 IEEE80211_DEBUG_WX("%s: reset_port failed\n", dev->name); 690 RTLLIB_DEBUG_WX("%s: reset_port failed\n", dev->name);
705 return -EINVAL; 691 return -EINVAL;
706 } 692 }
707 return ret; 693 return ret;
708} 694}
709 695
710int ieee80211_wx_get_encode_ext(struct ieee80211_device *ieee, 696int rtllib_wx_get_encode_ext(struct rtllib_device *ieee,
711 struct iw_request_info *info, 697 struct iw_request_info *info,
712 union iwreq_data *wrqu, char *extra) 698 union iwreq_data *wrqu, char *extra)
713{ 699{
714 struct iw_point *encoding = &wrqu->encoding; 700 struct iw_point *encoding = &wrqu->encoding;
715 struct iw_encode_ext *ext = (struct iw_encode_ext *)extra; 701 struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
716 struct ieee80211_crypt_data *crypt; 702 struct rtllib_crypt_data *crypt;
717 int idx, max_key_len; 703 int idx, max_key_len;
718 704
719 max_key_len = encoding->length - sizeof(*ext); 705 max_key_len = encoding->length - sizeof(*ext);
@@ -725,15 +711,16 @@ int ieee80211_wx_get_encode_ext(struct ieee80211_device *ieee,
725 if (idx < 1 || idx > WEP_KEYS) 711 if (idx < 1 || idx > WEP_KEYS)
726 return -EINVAL; 712 return -EINVAL;
727 idx--; 713 idx--;
728 } else 714 } else {
729 idx = ieee->tx_keyidx; 715 idx = ieee->tx_keyidx;
730 716 }
731 if (!(ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY) && 717 if (!(ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY) &&
732 ext->alg != IW_ENCODE_ALG_WEP) 718 (ext->alg != IW_ENCODE_ALG_WEP))
733 if (idx != 0 || ieee->iw_mode != IW_MODE_INFRA) 719 if (idx != 0 || (ieee->iw_mode != IW_MODE_INFRA))
734 return -EINVAL; 720 return -EINVAL;
735 721
736 crypt = ieee->crypt[idx]; 722 crypt = ieee->crypt[idx];
723
737 encoding->flags = idx + 1; 724 encoding->flags = idx + 1;
738 memset(ext, 0, sizeof(*ext)); 725 memset(ext, 0, sizeof(*ext));
739 726
@@ -762,37 +749,67 @@ int ieee80211_wx_get_encode_ext(struct ieee80211_device *ieee,
762 return 0; 749 return 0;
763} 750}
764 751
765int ieee80211_wx_set_mlme(struct ieee80211_device *ieee, 752int rtllib_wx_set_mlme(struct rtllib_device *ieee,
766 struct iw_request_info *info, 753 struct iw_request_info *info,
767 union iwreq_data *wrqu, char *extra) 754 union iwreq_data *wrqu, char *extra)
768{ 755{
756 u8 i = 0;
757 bool deauth = false;
769 struct iw_mlme *mlme = (struct iw_mlme *) extra; 758 struct iw_mlme *mlme = (struct iw_mlme *) extra;
759
760 if (ieee->state != RTLLIB_LINKED)
761 return -ENOLINK;
762
763 down(&ieee->wx_sem);
764
770 switch (mlme->cmd) { 765 switch (mlme->cmd) {
771 case IW_MLME_DEAUTH: 766 case IW_MLME_DEAUTH:
772 case IW_MLME_DISASSOC: 767 deauth = true;
773 ieee80211_disassociate(ieee); 768 /* leave break out intentionly */
769
770 case IW_MLME_DISASSOC:
771 if (deauth == true)
772 printk("disauth packet !\n");
773 else
774 printk("dis associate packet!\n");
775
776 ieee->cannot_notify = true;
777
778 SendDisassociation(ieee,deauth,mlme->reason_code);
779 rtllib_disassociate(ieee);
780
781 ieee->wap_set = 0;
782 for (i = 0; i < 6; i++)
783 ieee->current_network.bssid[i]= 0x55;
784
785 ieee->ssid_set = 0;
786 ieee->current_network.ssid[0] = '\0';
787 ieee->current_network.ssid_len = 0;
774 break; 788 break;
775 default: 789 default:
776 return -EOPNOTSUPP; 790 up(&ieee->wx_sem);
777 } 791 return -EOPNOTSUPP;
792 }
793
794 up(&ieee->wx_sem);
795
778 return 0; 796 return 0;
779} 797}
780 798
781int ieee80211_wx_set_auth(struct ieee80211_device *ieee, 799int rtllib_wx_set_auth(struct rtllib_device *ieee,
782 struct iw_request_info *info, 800 struct iw_request_info *info,
783 struct iw_param *data, char *extra) 801 struct iw_param *data, char *extra)
784{ 802{
785 switch (data->flags & IW_AUTH_INDEX) { 803 switch (data->flags & IW_AUTH_INDEX) {
786 case IW_AUTH_WPA_VERSION: 804 case IW_AUTH_WPA_VERSION:
787 /*need to support wpa2 here*/
788 break; 805 break;
789 case IW_AUTH_CIPHER_PAIRWISE: 806 case IW_AUTH_CIPHER_PAIRWISE:
790 case IW_AUTH_CIPHER_GROUP: 807 case IW_AUTH_CIPHER_GROUP:
791 case IW_AUTH_KEY_MGMT: 808 case IW_AUTH_KEY_MGMT:
792 /* 809 /*
793 * * Host AP driver does not use these parameters and allows 810 * Host AP driver does not use these parameters and allows
794 * * wpa_supplicant to control them internally. 811 * wpa_supplicant to control them internally.
795 * */ 812 */
796 break; 813 break;
797 case IW_AUTH_TKIP_COUNTERMEASURES: 814 case IW_AUTH_TKIP_COUNTERMEASURES:
798 ieee->tkip_countermeasures = data->value; 815 ieee->tkip_countermeasures = data->value;
@@ -802,15 +819,15 @@ int ieee80211_wx_set_auth(struct ieee80211_device *ieee,
802 break; 819 break;
803 820
804 case IW_AUTH_80211_AUTH_ALG: 821 case IW_AUTH_80211_AUTH_ALG:
805 if(data->value & IW_AUTH_ALG_SHARED_KEY){ 822 if (data->value & IW_AUTH_ALG_SHARED_KEY){
806 ieee->open_wep = 0; 823 ieee->open_wep = 0;
807 ieee->auth_mode = 1; 824 ieee->auth_mode = 1;
808 } 825 }
809 else if(data->value & IW_AUTH_ALG_OPEN_SYSTEM){ 826 else if (data->value & IW_AUTH_ALG_OPEN_SYSTEM){
810 ieee->open_wep = 1; 827 ieee->open_wep = 1;
811 ieee->auth_mode = 0; 828 ieee->auth_mode = 0;
812 } 829 }
813 else if(data->value & IW_AUTH_ALG_LEAP){ 830 else if (data->value & IW_AUTH_ALG_LEAP){
814 ieee->open_wep = 1; 831 ieee->open_wep = 1;
815 ieee->auth_mode = 2; 832 ieee->auth_mode = 2;
816 } 833 }
@@ -818,12 +835,10 @@ int ieee80211_wx_set_auth(struct ieee80211_device *ieee,
818 return -EINVAL; 835 return -EINVAL;
819 break; 836 break;
820 837
821#if 1
822 case IW_AUTH_WPA_ENABLED: 838 case IW_AUTH_WPA_ENABLED:
823 ieee->wpa_enabled = (data->value)?1:0; 839 ieee->wpa_enabled = (data->value)?1:0;
824 break; 840 break;
825 841
826#endif
827 case IW_AUTH_RX_UNENCRYPTED_EAPOL: 842 case IW_AUTH_RX_UNENCRYPTED_EAPOL:
828 ieee->ieee802_1x = data->value; 843 ieee->ieee802_1x = data->value;
829 break; 844 break;
@@ -836,37 +851,51 @@ int ieee80211_wx_set_auth(struct ieee80211_device *ieee,
836 return 0; 851 return 0;
837} 852}
838#endif 853#endif
839#if 1 854
840int ieee80211_wx_set_gen_ie(struct ieee80211_device *ieee, u8 *ie, size_t len) 855int rtllib_wx_set_gen_ie(struct rtllib_device *ieee, u8 *ie, size_t len)
841{ 856{
857#if (WIRELESS_EXT >= 18 )
842 u8 *buf; 858 u8 *buf;
859 u8 eid, wps_oui[4]={0x0,0x50,0xf2,0x04};
843 860
844 if (len>MAX_WPA_IE_LEN || (len && ie == NULL)) 861 if (len > MAX_WPA_IE_LEN || (len && ie == NULL)) {
845 { 862 return -EINVAL;
846 return -EINVAL;
847 } 863 }
848 864
849 865 if (len) {
850 if (len) 866 eid = ie[0];
851 { 867 if ((eid == MFIE_TYPE_GENERIC) && (!memcmp(&ie[2], wps_oui, 4))) {
852 if (len != ie[1]+2) 868
853 { 869 ieee->wps_ie_len = (len < MAX_WZC_IE_LEN) ? (len):(MAX_WZC_IE_LEN);
854 printk("len:%zu, ie:%d\n", len, ie[1]); 870 buf = kmalloc(ieee->wps_ie_len, GFP_KERNEL);
871 if (buf == NULL)
872 return -ENOMEM;
873 memcpy(buf, ie, ieee->wps_ie_len);
874 ieee->wps_ie = buf;
875 return 0;
876 }
877 }
878 ieee->wps_ie_len = 0;
879 if (ieee->wps_ie)
880 kfree(ieee->wps_ie);
881 ieee->wps_ie = NULL;
882 if (len) {
883 if (len != ie[1]+2) {
855 return -EINVAL; 884 return -EINVAL;
856 } 885 }
857 buf = kmemdup(ie, len, GFP_KERNEL); 886 buf = kmalloc(len, GFP_KERNEL);
858 if (buf == NULL) 887 if (buf == NULL)
859 return -ENOMEM; 888 return -ENOMEM;
889 memcpy(buf, ie, len);
860 kfree(ieee->wpa_ie); 890 kfree(ieee->wpa_ie);
861 ieee->wpa_ie = buf; 891 ieee->wpa_ie = buf;
862 ieee->wpa_ie_len = len; 892 ieee->wpa_ie_len = len;
863 } 893 } else {
864 else{ 894 if (ieee->wpa_ie)
865 kfree(ieee->wpa_ie); 895 kfree(ieee->wpa_ie);
866 ieee->wpa_ie = NULL; 896 ieee->wpa_ie = NULL;
867 ieee->wpa_ie_len = 0; 897 ieee->wpa_ie_len = 0;
868 } 898 }
899#endif
869 return 0; 900 return 0;
870
871} 901}
872#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-21 16:51:13 -0400