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authorThomas Bogendoerfer <tsbogend@alpha.franken.de>2008-07-12 16:43:50 -0400
committerJaroslav Kysela <perex@perex.cz>2008-07-14 03:01:02 -0400
commit862c2c0a61c515f2e9f63f689215bcf99a607eaf (patch)
treee1d40973f3d96a3a171fe5bd770e1ef893fb0581
parent1e066322c26562621811effb1eb14097bc67a9ee (diff)
ALSA: ALSA driver for SGI O2 audio board
This patch adds a new ALSA driver for the audio device found inside most of the SGI O2 workstation. The hardware uses a SGI custom chip, which feeds a AD codec chip. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Jaroslav Kysela <perex@perex.cz>
Diffstat
-rw-r--r--include/sound/ad1843.h46
-rw-r--r--sound/mips/Kconfig6
-rw-r--r--sound/mips/Makefile2
-rw-r--r--sound/mips/ad1843.c561
-rw-r--r--sound/mips/sgio2audio.c1006
5 files changed, 1621 insertions, 0 deletions
diff --git a/include/sound/ad1843.h b/include/sound/ad1843.h
new file mode 100644
index 00000000000..b236a9d1d6e
--- /dev/null
+++ b/include/sound/ad1843.h
@@ -0,0 +1,46 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright 2003 Vivien Chappelier <vivien.chappelier@linux-mips.org>
7 * Copyright 2008 Thomas Bogendoerfer <tsbogend@franken.de>
8 */
9
10#ifndef __SOUND_AD1843_H
11#define __SOUND_AD1843_H
12
13struct snd_ad1843 {
14 void *chip;
15 int (*read)(void *chip, int reg);
16 int (*write)(void *chip, int reg, int val);
17};
18
19#define AD1843_GAIN_RECLEV 0
20#define AD1843_GAIN_LINE 1
21#define AD1843_GAIN_LINE_2 2
22#define AD1843_GAIN_MIC 3
23#define AD1843_GAIN_PCM_0 4
24#define AD1843_GAIN_PCM_1 5
25#define AD1843_GAIN_SIZE (AD1843_GAIN_PCM_1+1)
26
27int ad1843_get_gain_max(struct snd_ad1843 *ad1843, int id);
28int ad1843_get_gain(struct snd_ad1843 *ad1843, int id);
29int ad1843_set_gain(struct snd_ad1843 *ad1843, int id, int newval);
30int ad1843_get_recsrc(struct snd_ad1843 *ad1843);
31int ad1843_set_recsrc(struct snd_ad1843 *ad1843, int newsrc);
32void ad1843_setup_dac(struct snd_ad1843 *ad1843,
33 unsigned int id,
34 unsigned int framerate,
35 snd_pcm_format_t fmt,
36 unsigned int channels);
37void ad1843_shutdown_dac(struct snd_ad1843 *ad1843,
38 unsigned int id);
39void ad1843_setup_adc(struct snd_ad1843 *ad1843,
40 unsigned int framerate,
41 snd_pcm_format_t fmt,
42 unsigned int channels);
43void ad1843_shutdown_adc(struct snd_ad1843 *ad1843);
44int ad1843_init(struct snd_ad1843 *ad1843);
45
46#endif /* __SOUND_AD1843_H */
diff --git a/sound/mips/Kconfig b/sound/mips/Kconfig
index 2a61cade4ac..a9823fad85c 100644
--- a/sound/mips/Kconfig
+++ b/sound/mips/Kconfig
@@ -9,6 +9,12 @@ menuconfig SND_MIPS
9 9
10if SND_MIPS 10if SND_MIPS
11 11
12config SND_SGI_O2
13 tristate "SGI O2 Audio"
14 depends on SGI_IP32
15 help
16 Sound support for the SGI O2 Workstation.
17
12config SND_SGI_HAL2 18config SND_SGI_HAL2
13 tristate "SGI HAL2 Audio" 19 tristate "SGI HAL2 Audio"
14 depends on SGI_HAS_HAL2 20 depends on SGI_HAS_HAL2
diff --git a/sound/mips/Makefile b/sound/mips/Makefile
index 63f4a9c0a8d..861ec0a574b 100644
--- a/sound/mips/Makefile
+++ b/sound/mips/Makefile
@@ -3,8 +3,10 @@
3# 3#
4 4
5snd-au1x00-objs := au1x00.o 5snd-au1x00-objs := au1x00.o
6snd-sgi-o2-objs := sgio2audio.o ad1843.o
6snd-sgi-hal2-objs := hal2.o 7snd-sgi-hal2-objs := hal2.o
7 8
8# Toplevel Module Dependency 9# Toplevel Module Dependency
9obj-$(CONFIG_SND_AU1X00) += snd-au1x00.o 10obj-$(CONFIG_SND_AU1X00) += snd-au1x00.o
11obj-$(CONFIG_SND_SGI_O2) += snd-sgi-o2.o
10obj-$(CONFIG_SND_SGI_HAL2) += snd-sgi-hal2.o 12obj-$(CONFIG_SND_SGI_HAL2) += snd-sgi-hal2.o
diff --git a/sound/mips/ad1843.c b/sound/mips/ad1843.c
new file mode 100644
index 00000000000..c624510ec37
--- /dev/null
+++ b/sound/mips/ad1843.c
@@ -0,0 +1,561 @@
1/*
2 * AD1843 low level driver
3 *
4 * Copyright 2003 Vivien Chappelier <vivien.chappelier@linux-mips.org>
5 * Copyright 2008 Thomas Bogendoerfer <tsbogend@alpha.franken.de>
6 *
7 * inspired from vwsnd.c (SGI VW audio driver)
8 * Copyright 1999 Silicon Graphics, Inc. All rights reserved.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 *
24 */
25
26#include <linux/init.h>
27#include <linux/sched.h>
28#include <linux/errno.h>
29#include <sound/core.h>
30#include <sound/pcm.h>
31#include <sound/ad1843.h>
32
33/*
34 * AD1843 bitfield definitions. All are named as in the AD1843 data
35 * sheet, with ad1843_ prepended and individual bit numbers removed.
36 *
37 * E.g., bits LSS0 through LSS2 become ad1843_LSS.
38 *
39 * Only the bitfields we need are defined.
40 */
41
42struct ad1843_bitfield {
43 char reg;
44 char lo_bit;
45 char nbits;
46};
47
48static const struct ad1843_bitfield
49 ad1843_PDNO = { 0, 14, 1 }, /* Converter Power-Down Flag */
50 ad1843_INIT = { 0, 15, 1 }, /* Clock Initialization Flag */
51 ad1843_RIG = { 2, 0, 4 }, /* Right ADC Input Gain */
52 ad1843_RMGE = { 2, 4, 1 }, /* Right ADC Mic Gain Enable */
53 ad1843_RSS = { 2, 5, 3 }, /* Right ADC Source Select */
54 ad1843_LIG = { 2, 8, 4 }, /* Left ADC Input Gain */
55 ad1843_LMGE = { 2, 12, 1 }, /* Left ADC Mic Gain Enable */
56 ad1843_LSS = { 2, 13, 3 }, /* Left ADC Source Select */
57 ad1843_RD2M = { 3, 0, 5 }, /* Right DAC 2 Mix Gain/Atten */
58 ad1843_RD2MM = { 3, 7, 1 }, /* Right DAC 2 Mix Mute */
59 ad1843_LD2M = { 3, 8, 5 }, /* Left DAC 2 Mix Gain/Atten */
60 ad1843_LD2MM = { 3, 15, 1 }, /* Left DAC 2 Mix Mute */
61 ad1843_RX1M = { 4, 0, 5 }, /* Right Aux 1 Mix Gain/Atten */
62 ad1843_RX1MM = { 4, 7, 1 }, /* Right Aux 1 Mix Mute */
63 ad1843_LX1M = { 4, 8, 5 }, /* Left Aux 1 Mix Gain/Atten */
64 ad1843_LX1MM = { 4, 15, 1 }, /* Left Aux 1 Mix Mute */
65 ad1843_RX2M = { 5, 0, 5 }, /* Right Aux 2 Mix Gain/Atten */
66 ad1843_RX2MM = { 5, 7, 1 }, /* Right Aux 2 Mix Mute */
67 ad1843_LX2M = { 5, 8, 5 }, /* Left Aux 2 Mix Gain/Atten */
68 ad1843_LX2MM = { 5, 15, 1 }, /* Left Aux 2 Mix Mute */
69 ad1843_RMCM = { 7, 0, 5 }, /* Right Mic Mix Gain/Atten */
70 ad1843_RMCMM = { 7, 7, 1 }, /* Right Mic Mix Mute */
71 ad1843_LMCM = { 7, 8, 5 }, /* Left Mic Mix Gain/Atten */
72 ad1843_LMCMM = { 7, 15, 1 }, /* Left Mic Mix Mute */
73 ad1843_HPOS = { 8, 4, 1 }, /* Headphone Output Voltage Swing */
74 ad1843_HPOM = { 8, 5, 1 }, /* Headphone Output Mute */
75 ad1843_MPOM = { 8, 6, 1 }, /* Mono Output Mute */
76 ad1843_RDA1G = { 9, 0, 6 }, /* Right DAC1 Analog/Digital Gain */
77 ad1843_RDA1GM = { 9, 7, 1 }, /* Right DAC1 Analog Mute */
78 ad1843_LDA1G = { 9, 8, 6 }, /* Left DAC1 Analog/Digital Gain */
79 ad1843_LDA1GM = { 9, 15, 1 }, /* Left DAC1 Analog Mute */
80 ad1843_RDA2G = { 10, 0, 6 }, /* Right DAC2 Analog/Digital Gain */
81 ad1843_RDA2GM = { 10, 7, 1 }, /* Right DAC2 Analog Mute */
82 ad1843_LDA2G = { 10, 8, 6 }, /* Left DAC2 Analog/Digital Gain */
83 ad1843_LDA2GM = { 10, 15, 1 }, /* Left DAC2 Analog Mute */
84 ad1843_RDA1AM = { 11, 7, 1 }, /* Right DAC1 Digital Mute */
85 ad1843_LDA1AM = { 11, 15, 1 }, /* Left DAC1 Digital Mute */
86 ad1843_RDA2AM = { 12, 7, 1 }, /* Right DAC2 Digital Mute */
87 ad1843_LDA2AM = { 12, 15, 1 }, /* Left DAC2 Digital Mute */
88 ad1843_ADLC = { 15, 0, 2 }, /* ADC Left Sample Rate Source */
89 ad1843_ADRC = { 15, 2, 2 }, /* ADC Right Sample Rate Source */
90 ad1843_DA1C = { 15, 8, 2 }, /* DAC1 Sample Rate Source */
91 ad1843_DA2C = { 15, 10, 2 }, /* DAC2 Sample Rate Source */
92 ad1843_C1C = { 17, 0, 16 }, /* Clock 1 Sample Rate Select */
93 ad1843_C2C = { 20, 0, 16 }, /* Clock 2 Sample Rate Select */
94 ad1843_C3C = { 23, 0, 16 }, /* Clock 3 Sample Rate Select */
95 ad1843_DAADL = { 25, 4, 2 }, /* Digital ADC Left Source Select */
96 ad1843_DAADR = { 25, 6, 2 }, /* Digital ADC Right Source Select */
97 ad1843_DAMIX = { 25, 14, 1 }, /* DAC Digital Mix Enable */
98 ad1843_DRSFLT = { 25, 15, 1 }, /* Digital Reampler Filter Mode */
99 ad1843_ADLF = { 26, 0, 2 }, /* ADC Left Channel Data Format */
100 ad1843_ADRF = { 26, 2, 2 }, /* ADC Right Channel Data Format */
101 ad1843_ADTLK = { 26, 4, 1 }, /* ADC Transmit Lock Mode Select */
102 ad1843_SCF = { 26, 7, 1 }, /* SCLK Frequency Select */
103 ad1843_DA1F = { 26, 8, 2 }, /* DAC1 Data Format Select */
104 ad1843_DA2F = { 26, 10, 2 }, /* DAC2 Data Format Select */
105 ad1843_DA1SM = { 26, 14, 1 }, /* DAC1 Stereo/Mono Mode Select */
106 ad1843_DA2SM = { 26, 15, 1 }, /* DAC2 Stereo/Mono Mode Select */
107 ad1843_ADLEN = { 27, 0, 1 }, /* ADC Left Channel Enable */
108 ad1843_ADREN = { 27, 1, 1 }, /* ADC Right Channel Enable */
109 ad1843_AAMEN = { 27, 4, 1 }, /* Analog to Analog Mix Enable */
110 ad1843_ANAEN = { 27, 7, 1 }, /* Analog Channel Enable */
111 ad1843_DA1EN = { 27, 8, 1 }, /* DAC1 Enable */
112 ad1843_DA2EN = { 27, 9, 1 }, /* DAC2 Enable */
113 ad1843_DDMEN = { 27, 12, 1 }, /* DAC2 to DAC1 Mix Enable */
114 ad1843_C1EN = { 28, 11, 1 }, /* Clock Generator 1 Enable */
115 ad1843_C2EN = { 28, 12, 1 }, /* Clock Generator 2 Enable */
116 ad1843_C3EN = { 28, 13, 1 }, /* Clock Generator 3 Enable */
117 ad1843_PDNI = { 28, 15, 1 }; /* Converter Power Down */
118
119/*
120 * The various registers of the AD1843 use three different formats for
121 * specifying gain. The ad1843_gain structure parameterizes the
122 * formats.
123 */
124
125struct ad1843_gain {
126 int negative; /* nonzero if gain is negative. */
127 const struct ad1843_bitfield *lfield;
128 const struct ad1843_bitfield *rfield;
129 const struct ad1843_bitfield *lmute;
130 const struct ad1843_bitfield *rmute;
131};
132
133static const struct ad1843_gain ad1843_gain_RECLEV = {
134 .negative = 0,
135 .lfield = &ad1843_LIG,
136 .rfield = &ad1843_RIG
137};
138static const struct ad1843_gain ad1843_gain_LINE = {
139 .negative = 1,
140 .lfield = &ad1843_LX1M,
141 .rfield = &ad1843_RX1M,
142 .lmute = &ad1843_LX1MM,
143 .rmute = &ad1843_RX1MM
144};
145static const struct ad1843_gain ad1843_gain_LINE_2 = {
146 .negative = 1,
147 .lfield = &ad1843_LDA2G,
148 .rfield = &ad1843_RDA2G,
149 .lmute = &ad1843_LDA2GM,
150 .rmute = &ad1843_RDA2GM
151};
152static const struct ad1843_gain ad1843_gain_MIC = {
153 .negative = 1,
154 .lfield = &ad1843_LMCM,
155 .rfield = &ad1843_RMCM,
156 .lmute = &ad1843_LMCMM,
157 .rmute = &ad1843_RMCMM
158};
159static const struct ad1843_gain ad1843_gain_PCM_0 = {
160 .negative = 1,
161 .lfield = &ad1843_LDA1G,
162 .rfield = &ad1843_RDA1G,
163 .lmute = &ad1843_LDA1GM,
164 .rmute = &ad1843_RDA1GM
165};
166static const struct ad1843_gain ad1843_gain_PCM_1 = {
167 .negative = 1,
168 .lfield = &ad1843_LD2M,
169 .rfield = &ad1843_RD2M,
170 .lmute = &ad1843_LD2MM,
171 .rmute = &ad1843_RD2MM
172};
173
174static const struct ad1843_gain *ad1843_gain[AD1843_GAIN_SIZE] =
175{
176 &ad1843_gain_RECLEV,
177 &ad1843_gain_LINE,
178 &ad1843_gain_LINE_2,
179 &ad1843_gain_MIC,
180 &ad1843_gain_PCM_0,
181 &ad1843_gain_PCM_1,
182};
183
184/* read the current value of an AD1843 bitfield. */
185
186static int ad1843_read_bits(struct snd_ad1843 *ad1843,
187 const struct ad1843_bitfield *field)
188{
189 int w;
190
191 w = ad1843->read(ad1843->chip, field->reg);
192 return w >> field->lo_bit & ((1 << field->nbits) - 1);
193}
194
195/*
196 * write a new value to an AD1843 bitfield and return the old value.
197 */
198
199static int ad1843_write_bits(struct snd_ad1843 *ad1843,
200 const struct ad1843_bitfield *field,
201 int newval)
202{
203 int w, mask, oldval, newbits;
204
205 w = ad1843->read(ad1843->chip, field->reg);
206 mask = ((1 << field->nbits) - 1) << field->lo_bit;
207 oldval = (w & mask) >> field->lo_bit;
208 newbits = (newval << field->lo_bit) & mask;
209 w = (w & ~mask) | newbits;
210 ad1843->write(ad1843->chip, field->reg, w);
211
212 return oldval;
213}
214
215/*
216 * ad1843_read_multi reads multiple bitfields from the same AD1843
217 * register. It uses a single read cycle to do it. (Reading the
218 * ad1843 requires 256 bit times at 12.288 MHz, or nearly 20
219 * microseconds.)
220 *
221 * Called like this.
222 *
223 * ad1843_read_multi(ad1843, nfields,
224 * &ad1843_FIELD1, &val1,
225 * &ad1843_FIELD2, &val2, ...);
226 */
227
228static void ad1843_read_multi(struct snd_ad1843 *ad1843, int argcount, ...)
229{
230 va_list ap;
231 const struct ad1843_bitfield *fp;
232 int w = 0, mask, *value, reg = -1;
233
234 va_start(ap, argcount);
235 while (--argcount >= 0) {
236 fp = va_arg(ap, const struct ad1843_bitfield *);
237 value = va_arg(ap, int *);
238 if (reg == -1) {
239 reg = fp->reg;
240 w = ad1843->read(ad1843->chip, reg);
241 }
242
243 mask = (1 << fp->nbits) - 1;
244 *value = w >> fp->lo_bit & mask;
245 }
246 va_end(ap);
247}
248
249/*
250 * ad1843_write_multi stores multiple bitfields into the same AD1843
251 * register. It uses one read and one write cycle to do it.
252 *
253 * Called like this.
254 *
255 * ad1843_write_multi(ad1843, nfields,
256 * &ad1843_FIELD1, val1,
257 * &ad1843_FIELF2, val2, ...);
258 */
259
260static void ad1843_write_multi(struct snd_ad1843 *ad1843, int argcount, ...)
261{
262 va_list ap;
263 int reg;
264 const struct ad1843_bitfield *fp;
265 int value;
266 int w, m, mask, bits;
267
268 mask = 0;
269 bits = 0;
270 reg = -1;
271
272 va_start(ap, argcount);
273 while (--argcount >= 0) {
274 fp = va_arg(ap, const struct ad1843_bitfield *);
275 value = va_arg(ap, int);
276 if (reg == -1)
277 reg = fp->reg;
278 else
279 BUG_ON(reg != fp->reg);
280 m = ((1 << fp->nbits) - 1) << fp->lo_bit;
281 mask |= m;
282 bits |= (value << fp->lo_bit) & m;
283 }
284 va_end(ap);
285
286 if (~mask & 0xFFFF)
287 w = ad1843->read(ad1843->chip, reg);
288 else
289 w = 0;
290 w = (w & ~mask) | bits;
291 ad1843->write(ad1843->chip, reg, w);
292}
293
294int ad1843_get_gain_max(struct snd_ad1843 *ad1843, int id)
295{
296 const struct ad1843_gain *gp = ad1843_gain[id];
297 int ret;
298
299 ret = (1 << gp->lfield->nbits);
300 if (!gp->lmute)
301 ret -= 1;
302 return ret;
303}
304
305/*
306 * ad1843_get_gain reads the specified register and extracts the gain value
307 * using the supplied gain type.
308 */
309
310int ad1843_get_gain(struct snd_ad1843 *ad1843, int id)
311{
312 int lg, rg, lm, rm;
313 const struct ad1843_gain *gp = ad1843_gain[id];
314 unsigned short mask = (1 << gp->lfield->nbits) - 1;
315
316 ad1843_read_multi(ad1843, 2, gp->lfield, &lg, gp->rfield, &rg);
317 if (gp->negative) {
318 lg = mask - lg;
319 rg = mask - rg;
320 }
321 if (gp->lmute) {
322 ad1843_read_multi(ad1843, 2, gp->lmute, &lm, gp->rmute, &rm);
323 if (lm)
324 lg = 0;
325 if (rm)
326 rg = 0;
327 }
328 return lg << 0 | rg << 8;
329}
330
331/*
332 * Set an audio channel's gain.
333 *
334 * Returns the new gain, which may be lower than the old gain.
335 */
336
337int ad1843_set_gain(struct snd_ad1843 *ad1843, int id, int newval)
338{
339 const struct ad1843_gain *gp = ad1843_gain[id];
340 unsigned short mask = (1 << gp->lfield->nbits) - 1;
341
342 int lg = (newval >> 0) & mask;
343 int rg = (newval >> 8) & mask;
344 int lm = (lg == 0) ? 1 : 0;
345 int rm = (rg == 0) ? 1 : 0;
346
347 if (gp->negative) {
348 lg = mask - lg;
349 rg = mask - rg;
350 }
351 if (gp->lmute)
352 ad1843_write_multi(ad1843, 2, gp->lmute, lm, gp->rmute, rm);
353 ad1843_write_multi(ad1843, 2, gp->lfield, lg, gp->rfield, rg);
354 return ad1843_get_gain(ad1843, id);
355}
356
357/* Returns the current recording source */
358
359int ad1843_get_recsrc(struct snd_ad1843 *ad1843)
360{
361 int val = ad1843_read_bits(ad1843, &ad1843_LSS);
362
363 if (val < 0 || val > 2) {
364 val = 2;
365 ad1843_write_multi(ad1843, 2,
366 &ad1843_LSS, val, &ad1843_RSS, val);
367 }
368 return val;
369}
370
371/*
372 * Set recording source.
373 *
374 * Returns newsrc on success, -errno on failure.
375 */
376
377int ad1843_set_recsrc(struct snd_ad1843 *ad1843, int newsrc)
378{
379 if (newsrc < 0 || newsrc > 2)
380 return -EINVAL;
381
382 ad1843_write_multi(ad1843, 2, &ad1843_LSS, newsrc, &ad1843_RSS, newsrc);
383 return newsrc;
384}
385
386/* Setup ad1843 for D/A conversion. */
387
388void ad1843_setup_dac(struct snd_ad1843 *ad1843,
389 unsigned int id,
390 unsigned int framerate,
391 snd_pcm_format_t fmt,
392 unsigned int channels)
393{
394 int ad_fmt = 0, ad_mode = 0;
395
396 switch (fmt) {
397 case SNDRV_PCM_FORMAT_S8:
398 ad_fmt = 0;
399 break;
400 case SNDRV_PCM_FORMAT_U8:
401 ad_fmt = 0;
402 break;
403 case SNDRV_PCM_FORMAT_S16_LE:
404 ad_fmt = 1;
405 break;
406 case SNDRV_PCM_FORMAT_MU_LAW:
407 ad_fmt = 2;
408 break;
409 case SNDRV_PCM_FORMAT_A_LAW:
410 ad_fmt = 3;
411 break;
412 default:
413 break;
414 }
415
416 switch (channels) {
417 case 2:
418 ad_mode = 0;
419 break;
420 case 1:
421 ad_mode = 1;
422 break;
423 default:
424 break;
425 }
426
427 if (id) {
428 ad1843_write_bits(ad1843, &ad1843_C2C, framerate);
429 ad1843_write_multi(ad1843, 2,
430 &ad1843_DA2SM, ad_mode,
431 &ad1843_DA2F, ad_fmt);
432 } else {
433 ad1843_write_bits(ad1843, &ad1843_C1C, framerate);
434 ad1843_write_multi(ad1843, 2,
435 &ad1843_DA1SM, ad_mode,
436 &ad1843_DA1F, ad_fmt);
437 }
438}
439
440void ad1843_shutdown_dac(struct snd_ad1843 *ad1843, unsigned int id)
441{
442 if (id)
443 ad1843_write_bits(ad1843, &ad1843_DA2F, 1);
444 else
445 ad1843_write_bits(ad1843, &ad1843_DA1F, 1);
446}
447
448void ad1843_setup_adc(struct snd_ad1843 *ad1843,
449 unsigned int framerate,
450 snd_pcm_format_t fmt,
451 unsigned int channels)
452{
453 int da_fmt = 0;
454
455 switch (fmt) {
456 case SNDRV_PCM_FORMAT_S8: da_fmt = 0; break;
457 case SNDRV_PCM_FORMAT_U8: da_fmt = 0; break;
458 case SNDRV_PCM_FORMAT_S16_LE: da_fmt = 1; break;
459 case SNDRV_PCM_FORMAT_MU_LAW: da_fmt = 2; break;
460 case SNDRV_PCM_FORMAT_A_LAW: da_fmt = 3; break;
461 default: break;
462 }
463
464 ad1843_write_bits(ad1843, &ad1843_C3C, framerate);
465 ad1843_write_multi(ad1843, 2,
466 &ad1843_ADLF, da_fmt, &ad1843_ADRF, da_fmt);
467}
468
469void ad1843_shutdown_adc(struct snd_ad1843 *ad1843)
470{
471 /* nothing to do */
472}
473
474/*
475 * Fully initialize the ad1843. As described in the AD1843 data
476 * sheet, section "START-UP SEQUENCE". The numbered comments are
477 * subsection headings from the data sheet. See the data sheet, pages
478 * 52-54, for more info.
479 *
480 * return 0 on success, -errno on failure. */
481
482int ad1843_init(struct snd_ad1843 *ad1843)
483{
484 unsigned long later;
485
486 if (ad1843_read_bits(ad1843, &ad1843_INIT) != 0) {
487 printk(KERN_ERR "ad1843: AD1843 won't initialize\n");
488 return -EIO;
489 }
490
491 ad1843_write_bits(ad1843, &ad1843_SCF, 1);
492
493 /* 4. Put the conversion resources into standby. */
494 ad1843_write_bits(ad1843, &ad1843_PDNI, 0);
495 later = jiffies + msecs_to_jiffies(500);
496
497 while (ad1843_read_bits(ad1843, &ad1843_PDNO)) {
498 if (time_after(jiffies, later)) {
499 printk(KERN_ERR
500 "ad1843: AD1843 won't power up\n");
501 return -EIO;
502 }
503 schedule_timeout_interruptible(5);
504 }
505
506 /* 5. Power up the clock generators and enable clock output pins. */
507 ad1843_write_multi(ad1843, 3,
508 &ad1843_C1EN, 1,
509 &ad1843_C2EN, 1,
510 &ad1843_C3EN, 1);
511
512 /* 6. Configure conversion resources while they are in standby. */
513
514 /* DAC1/2 use clock 1/2 as source, ADC uses clock 3. Always. */
515 ad1843_write_multi(ad1843, 4,
516 &ad1843_DA1C, 1,
517 &ad1843_DA2C, 2,
518 &ad1843_ADLC, 3,
519 &ad1843_ADRC, 3);
520
521 /* 7. Enable conversion resources. */
522 ad1843_write_bits(ad1843, &ad1843_ADTLK, 1);
523 ad1843_write_multi(ad1843, 7,
524 &ad1843_ANAEN, 1,
525 &ad1843_AAMEN, 1,
526 &ad1843_DA1EN, 1,
527 &ad1843_DA2EN, 1,
528 &ad1843_DDMEN, 1,
529 &ad1843_ADLEN, 1,
530 &ad1843_ADREN, 1);
531
532 /* 8. Configure conversion resources while they are enabled. */
533
534 /* set gain to 0 for all channels */
535 ad1843_set_gain(ad1843, AD1843_GAIN_RECLEV, 0);
536 ad1843_set_gain(ad1843, AD1843_GAIN_LINE, 0);
537 ad1843_set_gain(ad1843, AD1843_GAIN_LINE_2, 0);
538 ad1843_set_gain(ad1843, AD1843_GAIN_MIC, 0);
539 ad1843_set_gain(ad1843, AD1843_GAIN_PCM_0, 0);
540 ad1843_set_gain(ad1843, AD1843_GAIN_PCM_1, 0);
541
542 /* Unmute all channels. */
543 /* DAC1 */
544 ad1843_write_multi(ad1843, 2, &ad1843_LDA1GM, 0, &ad1843_RDA1GM, 0);
545 /* DAC2 */
546 ad1843_write_multi(ad1843, 2, &ad1843_LDA2GM, 0, &ad1843_RDA2GM, 0);
547
548 /* Set default recording source to Line In and set
549 * mic gain to +20 dB.
550 */
551 ad1843_set_recsrc(ad1843, 2);
552 ad1843_write_multi(ad1843, 2, &ad1843_LMGE, 1, &ad1843_RMGE, 1);
553
554 /* Set Speaker Out level to +/- 4V and unmute it. */
555 ad1843_write_multi(ad1843, 3,
556 &ad1843_HPOS, 1,
557 &ad1843_HPOM, 0,
558 &ad1843_MPOM, 0);
559
560 return 0;
561}
diff --git a/sound/mips/sgio2audio.c b/sound/mips/sgio2audio.c
new file mode 100644
index 00000000000..4c63504348d
--- /dev/null
+++ b/sound/mips/sgio2audio.c
@@ -0,0 +1,1006 @@
1/*
2 * Sound driver for Silicon Graphics O2 Workstations A/V board audio.
3 *
4 * Copyright 2003 Vivien Chappelier <vivien.chappelier@linux-mips.org>
5 * Copyright 2008 Thomas Bogendoerfer <tsbogend@alpha.franken.de>
6 * Mxier part taken from mace_audio.c:
7 * Copyright 2007 Thorben Jändling <tj.trevelyan@gmail.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 */
24
25#include <linux/init.h>
26#include <linux/delay.h>
27#include <linux/spinlock.h>
28#include <linux/gfp.h>
29#include <linux/vmalloc.h>
30#include <linux/interrupt.h>
31#include <linux/dma-mapping.h>
32#include <linux/platform_device.h>
33#include <linux/io.h>
34
35#include <asm/ip32/ip32_ints.h>
36#include <asm/ip32/mace.h>
37
38#include <sound/core.h>
39#include <sound/control.h>
40#include <sound/pcm.h>
41#define SNDRV_GET_ID
42#include <sound/initval.h>
43#include <sound/ad1843.h>
44
45
46MODULE_AUTHOR("Vivien Chappelier <vivien.chappelier@linux-mips.org>");
47MODULE_DESCRIPTION("SGI O2 Audio");
48MODULE_LICENSE("GPL");
49MODULE_SUPPORTED_DEVICE("{{Silicon Graphics, O2 Audio}}");
50
51static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */
52static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
53
54module_param(index, int, 0444);
55MODULE_PARM_DESC(index, "Index value for SGI O2 soundcard.");
56module_param(id, charp, 0444);
57MODULE_PARM_DESC(id, "ID string for SGI O2 soundcard.");
58
59
60#define AUDIO_CONTROL_RESET BIT(0) /* 1: reset audio interface */
61#define AUDIO_CONTROL_CODEC_PRESENT BIT(1) /* 1: codec detected */
62
63#define CODEC_CONTROL_WORD_SHIFT 0
64#define CODEC_CONTROL_READ BIT(16)
65#define CODEC_CONTROL_ADDRESS_SHIFT 17
66
67#define CHANNEL_CONTROL_RESET BIT(10) /* 1: reset channel */
68#define CHANNEL_DMA_ENABLE BIT(9) /* 1: enable DMA transfer */
69#define CHANNEL_INT_THRESHOLD_DISABLED (0 << 5) /* interrupt disabled */
70#define CHANNEL_INT_THRESHOLD_25 (1 << 5) /* int on buffer >25% full */
71#define CHANNEL_INT_THRESHOLD_50 (2 << 5) /* int on buffer >50% full */
72#define CHANNEL_INT_THRESHOLD_75 (3 << 5) /* int on buffer >75% full */
73#define CHANNEL_INT_THRESHOLD_EMPTY (4 << 5) /* int on buffer empty */
74#define CHANNEL_INT_THRESHOLD_NOT_EMPTY (5 << 5) /* int on buffer !empty */
75#define CHANNEL_INT_THRESHOLD_FULL (6 << 5) /* int on buffer empty */
76#define CHANNEL_INT_THRESHOLD_NOT_FULL (7 << 5) /* int on buffer !empty */
77
78#define CHANNEL_RING_SHIFT 12
79#define CHANNEL_RING_SIZE (1 << CHANNEL_RING_SHIFT)
80#define CHANNEL_RING_MASK (CHANNEL_RING_SIZE - 1)
81
82#define CHANNEL_LEFT_SHIFT 40
83#define CHANNEL_RIGHT_SHIFT 8
84
85struct snd_sgio2audio_chan {
86 int idx;
87 struct snd_pcm_substream *substream;
88 int pos;
89 snd_pcm_uframes_t size;
90 spinlock_t lock;
91};
92
93/* definition of the chip-specific record */
94struct snd_sgio2audio {
95 struct snd_card *card;
96
97 /* codec */
98 struct snd_ad1843 ad1843;
99 spinlock_t ad1843_lock;
100
101 /* channels */
102 struct snd_sgio2audio_chan channel[3];
103
104 /* resources */
105 void *ring_base;
106 dma_addr_t ring_base_dma;
107};
108
109/* AD1843 access */
110
111/*
112 * read_ad1843_reg returns the current contents of a 16 bit AD1843 register.
113 *
114 * Returns unsigned register value on success, -errno on failure.
115 */
116static int read_ad1843_reg(void *priv, int reg)
117{
118 struct snd_sgio2audio *chip = priv;
119 int val;
120 unsigned long flags;
121
122 spin_lock_irqsave(&chip->ad1843_lock, flags);
123
124 writeq((reg << CODEC_CONTROL_ADDRESS_SHIFT) |
125 CODEC_CONTROL_READ, &mace->perif.audio.codec_control);
126 wmb();
127 val = readq(&mace->perif.audio.codec_control); /* flush bus */
128 udelay(200);
129
130 val = readq(&mace->perif.audio.codec_read);
131
132 spin_unlock_irqrestore(&chip->ad1843_lock, flags);
133 return val;
134}
135
136/*
137 * write_ad1843_reg writes the specified value to a 16 bit AD1843 register.
138 */
139static int write_ad1843_reg(void *priv, int reg, int word)
140{
141 struct snd_sgio2audio *chip = priv;
142 int val;
143 unsigned long flags;
144
145 spin_lock_irqsave(&chip->ad1843_lock, flags);
146
147 writeq((reg << CODEC_CONTROL_ADDRESS_SHIFT) |
148 (word << CODEC_CONTROL_WORD_SHIFT),
149 &mace->perif.audio.codec_control);
150 wmb();
151 val = readq(&mace->perif.audio.codec_control); /* flush bus */
152 udelay(200);
153
154 spin_unlock_irqrestore(&chip->ad1843_lock, flags);
155 return 0;
156}
157
158static int sgio2audio_gain_info(struct snd_kcontrol *kcontrol,
159 struct snd_ctl_elem_info *uinfo)
160{
161 struct snd_sgio2audio *chip = snd_kcontrol_chip(kcontrol);
162
163 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
164 uinfo->count = 2;
165 uinfo->value.integer.min = 0;
166 uinfo->value.integer.max = ad1843_get_gain_max(&chip->ad1843,
167 (int)kcontrol->private_value);
168 return 0;
169}
170
171static int sgio2audio_gain_get(struct snd_kcontrol *kcontrol,
172 struct snd_ctl_elem_value *ucontrol)
173{
174 struct snd_sgio2audio *chip = snd_kcontrol_chip(kcontrol);
175 int vol;
176
177 vol = ad1843_get_gain(&chip->ad1843, (int)kcontrol->private_value);
178
179 ucontrol->value.integer.value[0] = (vol >> 8) & 0xFF;
180 ucontrol->value.integer.value[1] = vol & 0xFF;
181
182 return 0;
183}
184
185static int sgio2audio_gain_put(struct snd_kcontrol *kcontrol,
186 struct snd_ctl_elem_value *ucontrol)
187{
188 struct snd_sgio2audio *chip = snd_kcontrol_chip(kcontrol);
189 int newvol, oldvol;
190
191 oldvol = ad1843_get_gain(&chip->ad1843, kcontrol->private_value);
192 newvol = (ucontrol->value.integer.value[0] << 8) |
193 ucontrol->value.integer.value[1];
194
195 newvol = ad1843_set_gain(&chip->ad1843, kcontrol->private_value,
196 newvol);
197
198 return newvol != oldvol;
199}
200
201static int sgio2audio_source_info(struct snd_kcontrol *kcontrol,
202 struct snd_ctl_elem_info *uinfo)
203{
204 static const char *texts[3] = {
205 "Cam Mic", "Mic", "Line"
206 };
207 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
208 uinfo->count = 1;
209 uinfo->value.enumerated.items = 3;
210 if (uinfo->value.enumerated.item >= 3)
211 uinfo->value.enumerated.item = 1;
212 strcpy(uinfo->value.enumerated.name,
213 texts[uinfo->value.enumerated.item]);
214 return 0;
215}
216
217static int sgio2audio_source_get(struct snd_kcontrol *kcontrol,
218 struct snd_ctl_elem_value *ucontrol)
219{
220 struct snd_sgio2audio *chip = snd_kcontrol_chip(kcontrol);
221
222 ucontrol->value.enumerated.item[0] = ad1843_get_recsrc(&chip->ad1843);
223 return 0;
224}
225
226static int sgio2audio_source_put(struct snd_kcontrol *kcontrol,
227 struct snd_ctl_elem_value *ucontrol)
228{
229 struct snd_sgio2audio *chip = snd_kcontrol_chip(kcontrol);
230 int newsrc, oldsrc;
231
232 oldsrc = ad1843_get_recsrc(&chip->ad1843);
233 newsrc = ad1843_set_recsrc(&chip->ad1843,
234 ucontrol->value.enumerated.item[0]);
235
236 return newsrc != oldsrc;
237}
238
239/* dac1/pcm0 mixer control */
240static struct snd_kcontrol_new sgio2audio_ctrl_pcm0 __devinitdata = {
241 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
242 .name = "PCM Playback Volume",
243 .index = 0,
244 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
245 .private_value = AD1843_GAIN_PCM_0,
246 .info = sgio2audio_gain_info,
247 .get = sgio2audio_gain_get,
248 .put = sgio2audio_gain_put,
249};
250
251/* dac2/pcm1 mixer control */
252static struct snd_kcontrol_new sgio2audio_ctrl_pcm1 __devinitdata = {
253 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
254 .name = "PCM Playback Volume",
255 .index = 1,
256 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
257 .private_value = AD1843_GAIN_PCM_1,
258 .info = sgio2audio_gain_info,
259 .get = sgio2audio_gain_get,
260 .put = sgio2audio_gain_put,
261};
262
263/* record level mixer control */
264static struct snd_kcontrol_new sgio2audio_ctrl_reclevel __devinitdata = {
265 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
266 .name = "Capture Volume",
267 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
268 .private_value = AD1843_GAIN_RECLEV,
269 .info = sgio2audio_gain_info,
270 .get = sgio2audio_gain_get,
271 .put = sgio2audio_gain_put,
272};
273
274/* record level source control */
275static struct snd_kcontrol_new sgio2audio_ctrl_recsource __devinitdata = {
276 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
277 .name = "Capture Source",
278 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
279 .info = sgio2audio_source_info,
280 .get = sgio2audio_source_get,
281 .put = sgio2audio_source_put,
282};
283
284/* line mixer control */
285static struct snd_kcontrol_new sgio2audio_ctrl_line __devinitdata = {
286 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
287 .name = "Line Playback Volume",
288 .index = 0,
289 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
290 .private_value = AD1843_GAIN_LINE,
291 .info = sgio2audio_gain_info,
292 .get = sgio2audio_gain_get,
293 .put = sgio2audio_gain_put,
294};
295
296/* cd mixer control */
297static struct snd_kcontrol_new sgio2audio_ctrl_cd __devinitdata = {
298 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
299 .name = "Line Playback Volume",
300 .index = 1,
301 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
302 .private_value = AD1843_GAIN_LINE_2,
303 .info = sgio2audio_gain_info,
304 .get = sgio2audio_gain_get,
305 .put = sgio2audio_gain_put,
306};
307
308/* mic mixer control */
309static struct snd_kcontrol_new sgio2audio_ctrl_mic __devinitdata = {
310 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
311 .name = "Mic Playback Volume",
312 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
313 .private_value = AD1843_GAIN_MIC,
314 .info = sgio2audio_gain_info,
315 .get = sgio2audio_gain_get,
316 .put = sgio2audio_gain_put,
317};
318
319
320static int __devinit snd_sgio2audio_new_mixer(struct snd_sgio2audio *chip)
321{
322 int err;
323
324 err = snd_ctl_add(chip->card,
325 snd_ctl_new1(&sgio2audio_ctrl_pcm0, chip));
326 if (err < 0)
327 return err;
328
329 err = snd_ctl_add(chip->card,
330 snd_ctl_new1(&sgio2audio_ctrl_pcm1, chip));
331 if (err < 0)
332 return err;
333
334 err = snd_ctl_add(chip->card,
335 snd_ctl_new1(&sgio2audio_ctrl_reclevel, chip));
336 if (err < 0)
337 return err;
338
339 err = snd_ctl_add(chip->card,
340 snd_ctl_new1(&sgio2audio_ctrl_recsource, chip));
341 if (err < 0)
342 return err;
343 err = snd_ctl_add(chip->card,
344 snd_ctl_new1(&sgio2audio_ctrl_line, chip));
345 if (err < 0)
346 return err;
347
348 err = snd_ctl_add(chip->card,
349 snd_ctl_new1(&sgio2audio_ctrl_cd, chip));
350 if (err < 0)
351 return err;
352
353 err = snd_ctl_add(chip->card,
354 snd_ctl_new1(&sgio2audio_ctrl_mic, chip));
355 if (err < 0)
356 return err;
357
358 return 0;
359}
360
361/* low-level audio interface DMA */
362
363/* get data out of bounce buffer, count must be a multiple of 32 */
364/* returns 1 if a period has elapsed */
365static int snd_sgio2audio_dma_pull_frag(struct snd_sgio2audio *chip,
366 unsigned int ch, unsigned int count)
367{
368 int ret;
369 unsigned long src_base, src_pos, dst_mask;
370 unsigned char *dst_base;
371 int dst_pos;
372 u64 *src;
373 s16 *dst;
374 u64 x;
375 unsigned long flags;
376 struct snd_pcm_runtime *runtime = chip->channel[ch].substream->runtime;
377
378 spin_lock_irqsave(&chip->channel[ch].lock, flags);
379
380 src_base = (unsigned long) chip->ring_base | (ch << CHANNEL_RING_SHIFT);
381 src_pos = readq(&mace->perif.audio.chan[ch].read_ptr);
382 dst_base = runtime->dma_area;
383 dst_pos = chip->channel[ch].pos;
384 dst_mask = frames_to_bytes(runtime, runtime->buffer_size) - 1;
385
386 /* check if a period has elapsed */
387 chip->channel[ch].size += (count >> 3); /* in frames */
388 ret = chip->channel[ch].size >= runtime->period_size;
389 chip->channel[ch].size %= runtime->period_size;
390
391 while (count) {
392 src = (u64 *)(src_base + src_pos);
393 dst = (s16 *)(dst_base + dst_pos);
394
395 x = *src;
396 dst[0] = (x >> CHANNEL_LEFT_SHIFT) & 0xffff;
397 dst[1] = (x >> CHANNEL_RIGHT_SHIFT) & 0xffff;
398
399 src_pos = (src_pos + sizeof(u64)) & CHANNEL_RING_MASK;
400 dst_pos = (dst_pos + 2 * sizeof(s16)) & dst_mask;
401 count -= sizeof(u64);
402 }
403
404 writeq(src_pos, &mace->perif.audio.chan[ch].read_ptr); /* in bytes */
405 chip->channel[ch].pos = dst_pos;
406
407 spin_unlock_irqrestore(&chip->channel[ch].lock, flags);
408 return ret;
409}
410
411/* put some DMA data in bounce buffer, count must be a multiple of 32 */
412/* returns 1 if a period has elapsed */
413static int snd_sgio2audio_dma_push_frag(struct snd_sgio2audio *chip,
414 unsigned int ch, unsigned int count)
415{
416 int ret;
417 s64 l, r;
418 unsigned long dst_base, dst_pos, src_mask;
419 unsigned char *src_base;
420 int src_pos;
421 u64 *dst;
422 s16 *src;
423 unsigned long flags;
424 struct snd_pcm_runtime *runtime = chip->channel[ch].substream->runtime;
425
426 spin_lock_irqsave(&chip->channel[ch].lock, flags);
427
428 dst_base = (unsigned long)chip->ring_base | (ch << CHANNEL_RING_SHIFT);
429 dst_pos = readq(&mace->perif.audio.chan[ch].write_ptr);
430 src_base = runtime->dma_area;
431 src_pos = chip->channel[ch].pos;
432 src_mask = frames_to_bytes(runtime, runtime->buffer_size) - 1;
433
434 /* check if a period has elapsed */
435 chip->channel[ch].size += (count >> 3); /* in frames */
436 ret = chip->channel[ch].size >= runtime->period_size;
437 chip->channel[ch].size %= runtime->period_size;
438
439 while (count) {
440 src = (s16 *)(src_base + src_pos);
441 dst = (u64 *)(dst_base + dst_pos);
442
443 l = src[0]; /* sign extend */
444 r = src[1]; /* sign extend */
445
446 *dst = ((l & 0x00ffffff) << CHANNEL_LEFT_SHIFT) |
447 ((r & 0x00ffffff) << CHANNEL_RIGHT_SHIFT);
448
449 dst_pos = (dst_pos + sizeof(u64)) & CHANNEL_RING_MASK;
450 src_pos = (src_pos + 2 * sizeof(s16)) & src_mask;
451 count -= sizeof(u64);
452 }
453
454 writeq(dst_pos, &mace->perif.audio.chan[ch].write_ptr); /* in bytes */
455 chip->channel[ch].pos = src_pos;
456
457 spin_unlock_irqrestore(&chip->channel[ch].lock, flags);
458 return ret;
459}
460
461static int snd_sgio2audio_dma_start(struct snd_pcm_substream *substream)
462{
463 struct snd_sgio2audio *chip = snd_pcm_substream_chip(substream);
464 struct snd_sgio2audio_chan *chan = substream->runtime->private_data;
465 int ch = chan->idx;
466
467 /* reset DMA channel */
468 writeq(CHANNEL_CONTROL_RESET, &mace->perif.audio.chan[ch].control);
469 udelay(10);
470 writeq(0, &mace->perif.audio.chan[ch].control);
471
472 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
473 /* push a full buffer */
474 snd_sgio2audio_dma_push_frag(chip, ch, CHANNEL_RING_SIZE - 32);
475 }
476 /* set DMA to wake on 50% empty and enable interrupt */
477 writeq(CHANNEL_DMA_ENABLE | CHANNEL_INT_THRESHOLD_50,
478 &mace->perif.audio.chan[ch].control);
479 return 0;
480}
481
482static int snd_sgio2audio_dma_stop(struct snd_pcm_substream *substream)
483{
484 struct snd_sgio2audio_chan *chan = substream->runtime->private_data;
485
486 writeq(0, &mace->perif.audio.chan[chan->idx].control);
487 return 0;
488}
489
490static irqreturn_t snd_sgio2audio_dma_in_isr(int irq, void *dev_id)
491{
492 struct snd_sgio2audio_chan *chan = dev_id;
493 struct snd_pcm_substream *substream;
494 struct snd_sgio2audio *chip;
495 int count, ch;
496
497 substream = chan->substream;
498 chip = snd_pcm_substream_chip(substream);
499 ch = chan->idx;
500
501 /* empty the ring */
502 count = CHANNEL_RING_SIZE -
503 readq(&mace->perif.audio.chan[ch].depth) - 32;
504 if (snd_sgio2audio_dma_pull_frag(chip, ch, count))
505 snd_pcm_period_elapsed(substream);
506
507 return IRQ_HANDLED;
508}
509
510static irqreturn_t snd_sgio2audio_dma_out_isr(int irq, void *dev_id)
511{
512 struct snd_sgio2audio_chan *chan = dev_id;
513 struct snd_pcm_substream *substream;
514 struct snd_sgio2audio *chip;
515 int count, ch;
516
517 substream = chan->substream;
518 chip = snd_pcm_substream_chip(substream);
519 ch = chan->idx;
520 /* fill the ring */
521 count = CHANNEL_RING_SIZE -
522 readq(&mace->perif.audio.chan[ch].depth) - 32;
523 if (snd_sgio2audio_dma_push_frag(chip, ch, count))
524 snd_pcm_period_elapsed(substream);
525
526 return IRQ_HANDLED;
527}
528
529static irqreturn_t snd_sgio2audio_error_isr(int irq, void *dev_id)
530{
531 struct snd_sgio2audio_chan *chan = dev_id;
532 struct snd_pcm_substream *substream;
533
534 substream = chan->substream;
535 snd_sgio2audio_dma_stop(substream);
536 snd_sgio2audio_dma_start(substream);
537 return IRQ_HANDLED;
538}
539
540/* PCM part */
541/* PCM hardware definition */
542static struct snd_pcm_hardware snd_sgio2audio_pcm_hw = {
543 .info = (SNDRV_PCM_INFO_MMAP |
544 SNDRV_PCM_INFO_MMAP_VALID |
545 SNDRV_PCM_INFO_INTERLEAVED |
546 SNDRV_PCM_INFO_BLOCK_TRANSFER),
547 .formats = SNDRV_PCM_FMTBIT_S16_BE,
548 .rates = SNDRV_PCM_RATE_8000_48000,
549 .rate_min = 8000,
550 .rate_max = 48000,
551 .channels_min = 2,
552 .channels_max = 2,
553 .buffer_bytes_max = 65536,
554 .period_bytes_min = 32768,
555 .period_bytes_max = 65536,
556 .periods_min = 1,
557 .periods_max = 1024,
558};
559
560/* PCM playback open callback */
561static int snd_sgio2audio_playback1_open(struct snd_pcm_substream *substream)
562{
563 struct snd_sgio2audio *chip = snd_pcm_substream_chip(substream);
564 struct snd_pcm_runtime *runtime = substream->runtime;
565
566 runtime->hw = snd_sgio2audio_pcm_hw;
567 runtime->private_data = &chip->channel[1];
568 return 0;
569}
570
571static int snd_sgio2audio_playback2_open(struct snd_pcm_substream *substream)
572{
573 struct snd_sgio2audio *chip = snd_pcm_substream_chip(substream);
574 struct snd_pcm_runtime *runtime = substream->runtime;
575
576 runtime->hw = snd_sgio2audio_pcm_hw;
577 runtime->private_data = &chip->channel[2];
578 return 0;
579}
580
581/* PCM capture open callback */
582static int snd_sgio2audio_capture_open(struct snd_pcm_substream *substream)
583{
584 struct snd_sgio2audio *chip = snd_pcm_substream_chip(substream);
585 struct snd_pcm_runtime *runtime = substream->runtime;
586
587 runtime->hw = snd_sgio2audio_pcm_hw;
588 runtime->private_data = &chip->channel[0];
589 return 0;
590}
591
592/* PCM close callback */
593static int snd_sgio2audio_pcm_close(struct snd_pcm_substream *substream)
594{
595 struct snd_pcm_runtime *runtime = substream->runtime;
596
597 runtime->private_data = NULL;
598 return 0;
599}
600
601
602/* hw_params callback */
603static int snd_sgio2audio_pcm_hw_params(struct snd_pcm_substream *substream,
604 struct snd_pcm_hw_params *hw_params)
605{
606 struct snd_pcm_runtime *runtime = substream->runtime;
607 int size = params_buffer_bytes(hw_params);
608
609 /* alloc virtual 'dma' area */
610 if (runtime->dma_area)
611 vfree(runtime->dma_area);
612 runtime->dma_area = vmalloc(size);
613 if (runtime->dma_area == NULL)
614 return -ENOMEM;
615 runtime->dma_bytes = size;
616 return 0;
617}
618
619/* hw_free callback */
620static int snd_sgio2audio_pcm_hw_free(struct snd_pcm_substream *substream)
621{
622 if (substream->runtime->dma_area)
623 vfree(substream->runtime->dma_area);
624 substream->runtime->dma_area = NULL;
625 return 0;
626}
627
628/* prepare callback */
629static int snd_sgio2audio_pcm_prepare(struct snd_pcm_substream *substream)
630{
631 struct snd_sgio2audio *chip = snd_pcm_substream_chip(substream);
632 struct snd_pcm_runtime *runtime = substream->runtime;
633 struct snd_sgio2audio_chan *chan = substream->runtime->private_data;
634 int ch = chan->idx;
635 unsigned long flags;
636
637 spin_lock_irqsave(&chip->channel[ch].lock, flags);
638
639 /* Setup the pseudo-dma transfer pointers. */
640 chip->channel[ch].pos = 0;
641 chip->channel[ch].size = 0;
642 chip->channel[ch].substream = substream;
643
644 /* set AD1843 format */
645 /* hardware format is always S16_LE */
646 switch (substream->stream) {
647 case SNDRV_PCM_STREAM_PLAYBACK:
648 ad1843_setup_dac(&chip->ad1843,
649 ch - 1,
650 runtime->rate,
651 SNDRV_PCM_FORMAT_S16_LE,
652 runtime->channels);
653 break;
654 case SNDRV_PCM_STREAM_CAPTURE:
655 ad1843_setup_adc(&chip->ad1843,
656 runtime->rate,
657 SNDRV_PCM_FORMAT_S16_LE,
658 runtime->channels);
659 break;
660 }
661 spin_unlock_irqrestore(&chip->channel[ch].lock, flags);
662 return 0;
663}
664
665/* trigger callback */
666static int snd_sgio2audio_pcm_trigger(struct snd_pcm_substream *substream,
667 int cmd)
668{
669 switch (cmd) {
670 case SNDRV_PCM_TRIGGER_START:
671 /* start the PCM engine */
672 snd_sgio2audio_dma_start(substream);
673 break;
674 case SNDRV_PCM_TRIGGER_STOP:
675 /* stop the PCM engine */
676 snd_sgio2audio_dma_stop(substream);
677 break;
678 default:
679 return -EINVAL;
680 }
681 return 0;
682}
683
684/* pointer callback */
685static snd_pcm_uframes_t
686snd_sgio2audio_pcm_pointer(struct snd_pcm_substream *substream)
687{
688 struct snd_sgio2audio *chip = snd_pcm_substream_chip(substream);
689 struct snd_sgio2audio_chan *chan = substream->runtime->private_data;
690
691 /* get the current hardware pointer */
692 return bytes_to_frames(substream->runtime,
693 chip->channel[chan->idx].pos);
694}
695
696/* get the physical page pointer on the given offset */
697static struct page *snd_sgio2audio_page(struct snd_pcm_substream *substream,
698 unsigned long offset)
699{
700 return vmalloc_to_page(substream->runtime->dma_area + offset);
701}
702
703/* operators */
704static struct snd_pcm_ops snd_sgio2audio_playback1_ops = {
705 .open = snd_sgio2audio_playback1_open,
706 .close = snd_sgio2audio_pcm_close,
707 .ioctl = snd_pcm_lib_ioctl,
708 .hw_params = snd_sgio2audio_pcm_hw_params,
709 .hw_free = snd_sgio2audio_pcm_hw_free,
710 .prepare = snd_sgio2audio_pcm_prepare,
711 .trigger = snd_sgio2audio_pcm_trigger,
712 .pointer = snd_sgio2audio_pcm_pointer,
713 .page = snd_sgio2audio_page,
714};
715
716static struct snd_pcm_ops snd_sgio2audio_playback2_ops = {
717 .open = snd_sgio2audio_playback2_open,
718 .close = snd_sgio2audio_pcm_close,
719 .ioctl = snd_pcm_lib_ioctl,
720 .hw_params = snd_sgio2audio_pcm_hw_params,
721 .hw_free = snd_sgio2audio_pcm_hw_free,
722 .prepare = snd_sgio2audio_pcm_prepare,
723 .trigger = snd_sgio2audio_pcm_trigger,
724 .pointer = snd_sgio2audio_pcm_pointer,
725 .page = snd_sgio2audio_page,
726};
727
728static struct snd_pcm_ops snd_sgio2audio_capture_ops = {
729 .open = snd_sgio2audio_capture_open,
730 .close = snd_sgio2audio_pcm_close,
731 .ioctl = snd_pcm_lib_ioctl,
732 .hw_params = snd_sgio2audio_pcm_hw_params,
733 .hw_free = snd_sgio2audio_pcm_hw_free,
734 .prepare = snd_sgio2audio_pcm_prepare,
735 .trigger = snd_sgio2audio_pcm_trigger,
736 .pointer = snd_sgio2audio_pcm_pointer,
737 .page = snd_sgio2audio_page,
738};
739
740/*
741 * definitions of capture are omitted here...
742 */
743
744/* create a pcm device */
745static int __devinit snd_sgio2audio_new_pcm(struct snd_sgio2audio *chip)
746{
747 struct snd_pcm *pcm;
748 int err;
749
750 /* create first pcm device with one outputs and one input */
751 err = snd_pcm_new(chip->card, "SGI O2 Audio", 0, 1, 1, &pcm);
752 if (err < 0)
753 return err;
754
755 pcm->private_data = chip;
756 strcpy(pcm->name, "SGI O2 DAC1");
757
758 /* set operators */
759 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
760 &snd_sgio2audio_playback1_ops);
761 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
762 &snd_sgio2audio_capture_ops);
763
764 /* create second pcm device with one outputs and no input */
765 err = snd_pcm_new(chip->card, "SGI O2 Audio", 1, 1, 0, &pcm);
766 if (err < 0)
767 return err;
768
769 pcm->private_data = chip;
770 strcpy(pcm->name, "SGI O2 DAC2");
771
772 /* set operators */
773 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
774 &snd_sgio2audio_playback2_ops);
775
776 return 0;
777}
778
779static struct {
780 int idx;
781 int irq;
782 irqreturn_t (*isr)(int, void *);
783 const char *desc;
784} snd_sgio2_isr_table[] = {
785 {
786 .idx = 0,
787 .irq = MACEISA_AUDIO1_DMAT_IRQ,
788 .isr = snd_sgio2audio_dma_in_isr,
789 .desc = "Capture DMA Channel 0"
790 }, {
791 .idx = 0,
792 .irq = MACEISA_AUDIO1_OF_IRQ,
793 .isr = snd_sgio2audio_error_isr,
794 .desc = "Capture Overflow"
795 }, {
796 .idx = 1,
797 .irq = MACEISA_AUDIO2_DMAT_IRQ,
798 .isr = snd_sgio2audio_dma_out_isr,
799 .desc = "Playback DMA Channel 1"
800 }, {
801 .idx = 1,
802 .irq = MACEISA_AUDIO2_MERR_IRQ,
803 .isr = snd_sgio2audio_error_isr,
804 .desc = "Memory Error Channel 1"
805 }, {
806 .idx = 2,
807 .irq = MACEISA_AUDIO3_DMAT_IRQ,
808 .isr = snd_sgio2audio_dma_out_isr,
809 .desc = "Playback DMA Channel 2"
810 }, {
811 .idx = 2,
812 .irq = MACEISA_AUDIO3_MERR_IRQ,
813 .isr = snd_sgio2audio_error_isr,
814 .desc = "Memory Error Channel 2"
815 }
816};
817
818/* ALSA driver */
819
820static int snd_sgio2audio_free(struct snd_sgio2audio *chip)
821{
822 int i;
823
824 /* reset interface */
825 writeq(AUDIO_CONTROL_RESET, &mace->perif.audio.control);
826 udelay(1);
827 writeq(0, &mace->perif.audio.control);
828
829 /* release IRQ's */
830 for (i = 0; i < ARRAY_SIZE(snd_sgio2_isr_table); i++)
831 free_irq(snd_sgio2_isr_table[i].irq,
832 &chip->channel[snd_sgio2_isr_table[i].idx]);
833
834 dma_free_coherent(NULL, MACEISA_RINGBUFFERS_SIZE,
835 chip->ring_base, chip->ring_base_dma);
836
837 /* release card data */
838 kfree(chip);
839 return 0;
840}
841
842static int snd_sgio2audio_dev_free(struct snd_device *device)
843{
844 struct snd_sgio2audio *chip = device->device_data;
845
846 return snd_sgio2audio_free(chip);
847}
848
849static struct snd_device_ops ops = {
850 .dev_free = snd_sgio2audio_dev_free,
851};
852
853static int __devinit snd_sgio2audio_create(struct snd_card *card,
854 struct snd_sgio2audio **rchip)
855{
856 struct snd_sgio2audio *chip;
857 int i, err;
858
859 *rchip = NULL;
860
861 /* check if a codec is attached to the interface */
862 /* (Audio or Audio/Video board present) */
863 if (!(readq(&mace->perif.audio.control) & AUDIO_CONTROL_CODEC_PRESENT))
864 return -ENOENT;
865
866 chip = kzalloc(sizeof(struct snd_sgio2audio), GFP_KERNEL);
867 if (chip == NULL)
868 return -ENOMEM;
869
870 chip->card = card;
871
872 chip->ring_base = dma_alloc_coherent(NULL, MACEISA_RINGBUFFERS_SIZE,
873 &chip->ring_base_dma, GFP_USER);
874 if (chip->ring_base == NULL) {
875 printk(KERN_ERR
876 "sgio2audio: could not allocate ring buffers\n");
877 kfree(chip);
878 return -ENOMEM;
879 }
880
881 spin_lock_init(&chip->ad1843_lock);
882
883 /* initialize channels */
884 for (i = 0; i < 3; i++) {
885 spin_lock_init(&chip->channel[i].lock);
886 chip->channel[i].idx = i;
887 }
888
889 /* allocate IRQs */
890 for (i = 0; i < ARRAY_SIZE(snd_sgio2_isr_table); i++) {
891 if (request_irq(snd_sgio2_isr_table[i].irq,
892 snd_sgio2_isr_table[i].isr,
893 0,
894 snd_sgio2_isr_table[i].desc,
895 &chip->channel[snd_sgio2_isr_table[i].idx])) {
896 snd_sgio2audio_free(chip);
897 printk(KERN_ERR "sgio2audio: cannot allocate irq %d\n",
898 snd_sgio2_isr_table[i].irq);
899 return -EBUSY;
900 }
901 }
902
903 /* reset the interface */
904 writeq(AUDIO_CONTROL_RESET, &mace->perif.audio.control);
905 udelay(1);
906 writeq(0, &mace->perif.audio.control);
907 msleep_interruptible(1); /* give time to recover */
908
909 /* set ring base */
910 writeq(chip->ring_base_dma, &mace->perif.ctrl.ringbase);
911
912 /* attach the AD1843 codec */
913 chip->ad1843.read = read_ad1843_reg;
914 chip->ad1843.write = write_ad1843_reg;
915 chip->ad1843.chip = chip;
916
917 /* initialize the AD1843 codec */
918 err = ad1843_init(&chip->ad1843);
919 if (err < 0) {
920 snd_sgio2audio_free(chip);
921 return err;
922 }
923
924 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
925 if (err < 0) {
926 snd_sgio2audio_free(chip);
927 return err;
928 }
929 *rchip = chip;
930 return 0;
931}
932
933static int __devinit snd_sgio2audio_probe(struct platform_device *pdev)
934{
935 struct snd_card *card;
936 struct snd_sgio2audio *chip;
937 int err;
938
939 card = snd_card_new(index, id, THIS_MODULE, 0);
940 if (card == NULL)
941 return -ENOMEM;
942
943 err = snd_sgio2audio_create(card, &chip);
944 if (err < 0) {
945 snd_card_free(card);
946 return err;
947 }
948 snd_card_set_dev(card, &pdev->dev);
949
950 err = snd_sgio2audio_new_pcm(chip);
951 if (err < 0) {
952 snd_card_free(card);
953 return err;
954 }
955 err = snd_sgio2audio_new_mixer(chip);
956 if (err < 0) {
957 snd_card_free(card);
958 return err;
959 }
960
961 strcpy(card->driver, "SGI O2 Audio");
962 strcpy(card->shortname, "SGI O2 Audio");
963 sprintf(card->longname, "%s irq %i-%i",
964 card->shortname,
965 MACEISA_AUDIO1_DMAT_IRQ,
966 MACEISA_AUDIO3_MERR_IRQ);
967
968 err = snd_card_register(card);
969 if (err < 0) {
970 snd_card_free(card);
971 return err;
972 }
973 platform_set_drvdata(pdev, card);
974 return 0;
975}
976
977static int __exit snd_sgio2audio_remove(struct platform_device *pdev)
978{
979 struct snd_card *card = platform_get_drvdata(pdev);
980
981 snd_card_free(card);
982 platform_set_drvdata(pdev, NULL);
983 return 0;
984}
985
986static struct platform_driver sgio2audio_driver = {
987 .probe = snd_sgio2audio_probe,
988 .remove = __devexit_p(snd_sgio2audio_remove),
989 .driver = {
990 .name = "sgio2audio",
991 .owner = THIS_MODULE,
992 }
993};
994
995static int __init alsa_card_sgio2audio_init(void)
996{
997 return platform_driver_register(&sgio2audio_driver);
998}
999
1000static void __exit alsa_card_sgio2audio_exit(void)
1001{
1002 platform_driver_unregister(&sgio2audio_driver);
1003}
1004
1005module_init(alsa_card_sgio2audio_init)
1006module_exit(alsa_card_sgio2audio_exit)
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-27 01:52:04 -0500