aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorCharulatha V <charu@ti.com>2011-02-17 12:53:10 -0500
committerTony Lindgren <tony@atomide.com>2011-02-17 12:53:10 -0500
commit7f904c78d65e5cff8d9e76567797a7a7fe2fd774 (patch)
tree6dce826887c939b6bd0a238cd9a074e8f6d2203f
parent617871deacea4e1a5713dd37564dc94a392d80c3 (diff)
OMAP2430: hwmod data: Add McSPI
Update the 2430 hwmod data file with McSPI info. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Govindraj.R <govindraj.raja@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2430_data.c219
1 files changed, 219 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index 8ecfbcde13b..60fe4aac1f5 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -18,6 +18,7 @@
18#include <plat/serial.h> 18#include <plat/serial.h>
19#include <plat/i2c.h> 19#include <plat/i2c.h>
20#include <plat/gpio.h> 20#include <plat/gpio.h>
21#include <plat/mcspi.h>
21 22
22#include "omap_hwmod_common_data.h" 23#include "omap_hwmod_common_data.h"
23 24
@@ -45,6 +46,9 @@ static struct omap_hwmod omap2430_gpio3_hwmod;
45static struct omap_hwmod omap2430_gpio4_hwmod; 46static struct omap_hwmod omap2430_gpio4_hwmod;
46static struct omap_hwmod omap2430_gpio5_hwmod; 47static struct omap_hwmod omap2430_gpio5_hwmod;
47static struct omap_hwmod omap2430_dma_system_hwmod; 48static struct omap_hwmod omap2430_dma_system_hwmod;
49static struct omap_hwmod omap2430_mcspi1_hwmod;
50static struct omap_hwmod omap2430_mcspi2_hwmod;
51static struct omap_hwmod omap2430_mcspi3_hwmod;
48 52
49/* L3 -> L4_CORE interface */ 53/* L3 -> L4_CORE interface */
50static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = { 54static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = {
@@ -223,6 +227,60 @@ static struct omap_hwmod_ocp_if *omap2430_l4_wkup_slaves[] = {
223static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = { 227static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = {
224}; 228};
225 229
230/* l4 core -> mcspi1 interface */
231static struct omap_hwmod_addr_space omap2430_mcspi1_addr_space[] = {
232 {
233 .pa_start = 0x48098000,
234 .pa_end = 0x480980ff,
235 .flags = ADDR_TYPE_RT,
236 },
237};
238
239static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = {
240 .master = &omap2430_l4_core_hwmod,
241 .slave = &omap2430_mcspi1_hwmod,
242 .clk = "mcspi1_ick",
243 .addr = omap2430_mcspi1_addr_space,
244 .addr_cnt = ARRAY_SIZE(omap2430_mcspi1_addr_space),
245 .user = OCP_USER_MPU | OCP_USER_SDMA,
246};
247
248/* l4 core -> mcspi2 interface */
249static struct omap_hwmod_addr_space omap2430_mcspi2_addr_space[] = {
250 {
251 .pa_start = 0x4809a000,
252 .pa_end = 0x4809a0ff,
253 .flags = ADDR_TYPE_RT,
254 },
255};
256
257static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi2 = {
258 .master = &omap2430_l4_core_hwmod,
259 .slave = &omap2430_mcspi2_hwmod,
260 .clk = "mcspi2_ick",
261 .addr = omap2430_mcspi2_addr_space,
262 .addr_cnt = ARRAY_SIZE(omap2430_mcspi2_addr_space),
263 .user = OCP_USER_MPU | OCP_USER_SDMA,
264};
265
266/* l4 core -> mcspi3 interface */
267static struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = {
268 {
269 .pa_start = 0x480b8000,
270 .pa_end = 0x480b80ff,
271 .flags = ADDR_TYPE_RT,
272 },
273};
274
275static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = {
276 .master = &omap2430_l4_core_hwmod,
277 .slave = &omap2430_mcspi3_hwmod,
278 .clk = "mcspi3_ick",
279 .addr = omap2430_mcspi3_addr_space,
280 .addr_cnt = ARRAY_SIZE(omap2430_mcspi3_addr_space),
281 .user = OCP_USER_MPU | OCP_USER_SDMA,
282};
283
226/* L4 WKUP */ 284/* L4 WKUP */
227static struct omap_hwmod omap2430_l4_wkup_hwmod = { 285static struct omap_hwmod omap2430_l4_wkup_hwmod = {
228 .name = "l4_wkup", 286 .name = "l4_wkup",
@@ -919,6 +977,162 @@ static struct omap_hwmod omap2430_dma_system_hwmod = {
919 .flags = HWMOD_NO_IDLEST, 977 .flags = HWMOD_NO_IDLEST,
920}; 978};
921 979
980/*
981 * 'mcspi' class
982 * multichannel serial port interface (mcspi) / master/slave synchronous serial
983 * bus
984 */
985
986static struct omap_hwmod_class_sysconfig omap2430_mcspi_sysc = {
987 .rev_offs = 0x0000,
988 .sysc_offs = 0x0010,
989 .syss_offs = 0x0014,
990 .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
991 SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
992 SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
993 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
994 .sysc_fields = &omap_hwmod_sysc_type1,
995};
996
997static struct omap_hwmod_class omap2430_mcspi_class = {
998 .name = "mcspi",
999 .sysc = &omap2430_mcspi_sysc,
1000 .rev = OMAP2_MCSPI_REV,
1001};
1002
1003/* mcspi1 */
1004static struct omap_hwmod_irq_info omap2430_mcspi1_mpu_irqs[] = {
1005 { .irq = 65 },
1006};
1007
1008static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = {
1009 { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */
1010 { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */
1011 { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */
1012 { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */
1013 { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */
1014 { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */
1015 { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */
1016 { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */
1017};
1018
1019static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = {
1020 &omap2430_l4_core__mcspi1,
1021};
1022
1023static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = {
1024 .num_chipselect = 4,
1025};
1026
1027static struct omap_hwmod omap2430_mcspi1_hwmod = {
1028 .name = "mcspi1_hwmod",
1029 .mpu_irqs = omap2430_mcspi1_mpu_irqs,
1030 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi1_mpu_irqs),
1031 .sdma_reqs = omap2430_mcspi1_sdma_reqs,
1032 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs),
1033 .main_clk = "mcspi1_fck",
1034 .prcm = {
1035 .omap2 = {
1036 .module_offs = CORE_MOD,
1037 .prcm_reg_id = 1,
1038 .module_bit = OMAP24XX_EN_MCSPI1_SHIFT,
1039 .idlest_reg_id = 1,
1040 .idlest_idle_bit = OMAP24XX_ST_MCSPI1_SHIFT,
1041 },
1042 },
1043 .slaves = omap2430_mcspi1_slaves,
1044 .slaves_cnt = ARRAY_SIZE(omap2430_mcspi1_slaves),
1045 .class = &omap2430_mcspi_class,
1046 .dev_attr = &omap_mcspi1_dev_attr,
1047 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1048};
1049
1050/* mcspi2 */
1051static struct omap_hwmod_irq_info omap2430_mcspi2_mpu_irqs[] = {
1052 { .irq = 66 },
1053};
1054
1055static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = {
1056 { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */
1057 { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */
1058 { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */
1059 { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */
1060};
1061
1062static struct omap_hwmod_ocp_if *omap2430_mcspi2_slaves[] = {
1063 &omap2430_l4_core__mcspi2,
1064};
1065
1066static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = {
1067 .num_chipselect = 2,
1068};
1069
1070static struct omap_hwmod omap2430_mcspi2_hwmod = {
1071 .name = "mcspi2_hwmod",
1072 .mpu_irqs = omap2430_mcspi2_mpu_irqs,
1073 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi2_mpu_irqs),
1074 .sdma_reqs = omap2430_mcspi2_sdma_reqs,
1075 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs),
1076 .main_clk = "mcspi2_fck",
1077 .prcm = {
1078 .omap2 = {
1079 .module_offs = CORE_MOD,
1080 .prcm_reg_id = 1,
1081 .module_bit = OMAP24XX_EN_MCSPI2_SHIFT,
1082 .idlest_reg_id = 1,
1083 .idlest_idle_bit = OMAP24XX_ST_MCSPI2_SHIFT,
1084 },
1085 },
1086 .slaves = omap2430_mcspi2_slaves,
1087 .slaves_cnt = ARRAY_SIZE(omap2430_mcspi2_slaves),
1088 .class = &omap2430_mcspi_class,
1089 .dev_attr = &omap_mcspi2_dev_attr,
1090 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1091};
1092
1093/* mcspi3 */
1094static struct omap_hwmod_irq_info omap2430_mcspi3_mpu_irqs[] = {
1095 { .irq = 91 },
1096};
1097
1098static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = {
1099 { .name = "tx0", .dma_req = 15 }, /* DMA_SPI3_TX0 */
1100 { .name = "rx0", .dma_req = 16 }, /* DMA_SPI3_RX0 */
1101 { .name = "tx1", .dma_req = 23 }, /* DMA_SPI3_TX1 */
1102 { .name = "rx1", .dma_req = 24 }, /* DMA_SPI3_RX1 */
1103};
1104
1105static struct omap_hwmod_ocp_if *omap2430_mcspi3_slaves[] = {
1106 &omap2430_l4_core__mcspi3,
1107};
1108
1109static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = {
1110 .num_chipselect = 2,
1111};
1112
1113static struct omap_hwmod omap2430_mcspi3_hwmod = {
1114 .name = "mcspi3_hwmod",
1115 .mpu_irqs = omap2430_mcspi3_mpu_irqs,
1116 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi3_mpu_irqs),
1117 .sdma_reqs = omap2430_mcspi3_sdma_reqs,
1118 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi3_sdma_reqs),
1119 .main_clk = "mcspi3_fck",
1120 .prcm = {
1121 .omap2 = {
1122 .module_offs = CORE_MOD,
1123 .prcm_reg_id = 2,
1124 .module_bit = OMAP2430_EN_MCSPI3_SHIFT,
1125 .idlest_reg_id = 2,
1126 .idlest_idle_bit = OMAP2430_ST_MCSPI3_SHIFT,
1127 },
1128 },
1129 .slaves = omap2430_mcspi3_slaves,
1130 .slaves_cnt = ARRAY_SIZE(omap2430_mcspi3_slaves),
1131 .class = &omap2430_mcspi_class,
1132 .dev_attr = &omap_mcspi3_dev_attr,
1133 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1134};
1135
922static __initdata struct omap_hwmod *omap2430_hwmods[] = { 1136static __initdata struct omap_hwmod *omap2430_hwmods[] = {
923 &omap2430_l3_main_hwmod, 1137 &omap2430_l3_main_hwmod,
924 &omap2430_l4_core_hwmod, 1138 &omap2430_l4_core_hwmod,
@@ -941,6 +1155,11 @@ static __initdata struct omap_hwmod *omap2430_hwmods[] = {
941 1155
942 /* dma_system class*/ 1156 /* dma_system class*/
943 &omap2430_dma_system_hwmod, 1157 &omap2430_dma_system_hwmod,
1158
1159 /* mcspi class */
1160 &omap2430_mcspi1_hwmod,
1161 &omap2430_mcspi2_hwmod,
1162 &omap2430_mcspi3_hwmod,
944 NULL, 1163 NULL,
945}; 1164};
946 1165