diff options
author | Wolfram Sang <w.sang@pengutronix.de> | 2012-02-02 12:48:09 -0500 |
---|---|---|
committer | Wim Van Sebroeck <wim@iguana.be> | 2012-03-27 13:59:09 -0400 |
commit | 7cbc353540c31ffaf65ad44d89b955be0f1d04dc (patch) | |
tree | bb2a51366102f4d900a051f36ab0a3e23978f027 | |
parent | 19f505f09c60d637c695a8e8c4768570e2309631 (diff) |
watchdog: pnx4008: don't use __raw_-accessors
__raw_readl/__raw_writel are not meant for drivers [1].
[1] http://thread.gmane.org/gmane.linux.ports.arm.kernel/117626
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
-rw-r--r-- | drivers/watchdog/pnx4008_wdt.c | 23 |
1 files changed, 11 insertions, 12 deletions
diff --git a/drivers/watchdog/pnx4008_wdt.c b/drivers/watchdog/pnx4008_wdt.c index 55c5224bf19..1d1de919d61 100644 --- a/drivers/watchdog/pnx4008_wdt.c +++ b/drivers/watchdog/pnx4008_wdt.c | |||
@@ -95,22 +95,21 @@ static void wdt_enable(void) | |||
95 | spin_lock(&io_lock); | 95 | spin_lock(&io_lock); |
96 | 96 | ||
97 | /* stop counter, initiate counter reset */ | 97 | /* stop counter, initiate counter reset */ |
98 | __raw_writel(RESET_COUNT, WDTIM_CTRL(wdt_base)); | 98 | writel(RESET_COUNT, WDTIM_CTRL(wdt_base)); |
99 | /*wait for reset to complete. 100% guarantee event */ | 99 | /*wait for reset to complete. 100% guarantee event */ |
100 | while (__raw_readl(WDTIM_COUNTER(wdt_base))) | 100 | while (readl(WDTIM_COUNTER(wdt_base))) |
101 | cpu_relax(); | 101 | cpu_relax(); |
102 | /* internal and external reset, stop after that */ | 102 | /* internal and external reset, stop after that */ |
103 | __raw_writel(M_RES2 | STOP_COUNT0 | RESET_COUNT0, | 103 | writel(M_RES2 | STOP_COUNT0 | RESET_COUNT0, WDTIM_MCTRL(wdt_base)); |
104 | WDTIM_MCTRL(wdt_base)); | ||
105 | /* configure match output */ | 104 | /* configure match output */ |
106 | __raw_writel(MATCH_OUTPUT_HIGH, WDTIM_EMR(wdt_base)); | 105 | writel(MATCH_OUTPUT_HIGH, WDTIM_EMR(wdt_base)); |
107 | /* clear interrupt, just in case */ | 106 | /* clear interrupt, just in case */ |
108 | __raw_writel(MATCH_INT, WDTIM_INT(wdt_base)); | 107 | writel(MATCH_INT, WDTIM_INT(wdt_base)); |
109 | /* the longest pulse period 65541/(13*10^6) seconds ~ 5 ms. */ | 108 | /* the longest pulse period 65541/(13*10^6) seconds ~ 5 ms. */ |
110 | __raw_writel(0xFFFF, WDTIM_PULSE(wdt_base)); | 109 | writel(0xFFFF, WDTIM_PULSE(wdt_base)); |
111 | __raw_writel(heartbeat * WDOG_COUNTER_RATE, WDTIM_MATCH0(wdt_base)); | 110 | writel(heartbeat * WDOG_COUNTER_RATE, WDTIM_MATCH0(wdt_base)); |
112 | /*enable counter, stop when debugger active */ | 111 | /*enable counter, stop when debugger active */ |
113 | __raw_writel(COUNT_ENAB | DEBUG_EN, WDTIM_CTRL(wdt_base)); | 112 | writel(COUNT_ENAB | DEBUG_EN, WDTIM_CTRL(wdt_base)); |
114 | 113 | ||
115 | spin_unlock(&io_lock); | 114 | spin_unlock(&io_lock); |
116 | } | 115 | } |
@@ -119,7 +118,7 @@ static void wdt_disable(void) | |||
119 | { | 118 | { |
120 | spin_lock(&io_lock); | 119 | spin_lock(&io_lock); |
121 | 120 | ||
122 | __raw_writel(0, WDTIM_CTRL(wdt_base)); /*stop counter */ | 121 | writel(0, WDTIM_CTRL(wdt_base)); /*stop counter */ |
123 | 122 | ||
124 | spin_unlock(&io_lock); | 123 | spin_unlock(&io_lock); |
125 | } | 124 | } |
@@ -269,8 +268,8 @@ static int __devinit pnx4008_wdt_probe(struct platform_device *pdev) | |||
269 | if (ret) | 268 | if (ret) |
270 | goto out; | 269 | goto out; |
271 | 270 | ||
272 | boot_status = (__raw_readl(WDTIM_RES(wdt_base)) & | 271 | boot_status = (readl(WDTIM_RES(wdt_base)) & WDOG_RESET) ? |
273 | WDOG_RESET) ? WDIOF_CARDRESET : 0; | 272 | WDIOF_CARDRESET : 0; |
274 | wdt_disable(); /*disable for now */ | 273 | wdt_disable(); /*disable for now */ |
275 | clk_disable(wdt_clk); | 274 | clk_disable(wdt_clk); |
276 | 275 | ||