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authorFUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>2010-05-24 17:32:54 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2010-05-25 11:07:02 -0400
commit69dcf3db03626c4f18de624e8632454ea12ff260 (patch)
tree615c72af11acf7153bd60808e970e55398f19593
parent7ca8b9c0dafd1cb36289aa4c92c7beae7adcd34f (diff)
frv: set ARCH_KMALLOC_MINALIGN
Architectures that handle DMA-non-coherent memory need to set ARCH_KMALLOC_MINALIGN to make sure that kmalloc'ed buffer is DMA-safe: the buffer doesn't share a cache with the others. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: David Howells <dhowells@redhat.com> Acked-by: Pekka Enberg <penberg@cs.helsinki.fi> Cc: <stable@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
-rw-r--r--arch/frv/include/asm/cache.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/frv/include/asm/cache.h b/arch/frv/include/asm/cache.h
index 2797163b8f4..7dc0f0f85b7 100644
--- a/arch/frv/include/asm/cache.h
+++ b/arch/frv/include/asm/cache.h
@@ -17,6 +17,8 @@
17#define L1_CACHE_SHIFT (CONFIG_FRV_L1_CACHE_SHIFT) 17#define L1_CACHE_SHIFT (CONFIG_FRV_L1_CACHE_SHIFT)
18#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) 18#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
19 19
20#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
21
20#define __cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES))) 22#define __cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES)))
21#define ____cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES))) 23#define ____cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES)))
22 24