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authorJon Mason <jdmason@kudzu.us>2011-06-27 03:42:49 -0400
committerDavid S. Miller <davem@davemloft.net>2011-06-28 00:40:44 -0400
commit6532e9cb33221a31c8514441a972486af713ad6e (patch)
tree20ed7a03e85691ff1516076af6ad76518d01d439
parenta875a4c7404c8e259236b650136b8a603923daf9 (diff)
cxgb3: remove unnecessary read of PCI_CAP_ID_EXP
The PCIE capability offset is saved during PCI bus walking. It will remove an unnecessary search in the PCI configuration space if this value is referenced instead of reacquiring it. Signed-off-by: Jon Mason <jdmason@kudzu.us> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/cxgb3/common.h1
-rw-r--r--drivers/net/cxgb3/t3_hw.c11
2 files changed, 4 insertions, 8 deletions
diff --git a/drivers/net/cxgb3/common.h b/drivers/net/cxgb3/common.h
index 056ee8c831f..df01b634324 100644
--- a/drivers/net/cxgb3/common.h
+++ b/drivers/net/cxgb3/common.h
@@ -367,7 +367,6 @@ struct vpd_params {
367 367
368struct pci_params { 368struct pci_params {
369 unsigned int vpd_cap_addr; 369 unsigned int vpd_cap_addr;
370 unsigned int pcie_cap_addr;
371 unsigned short speed; 370 unsigned short speed;
372 unsigned char width; 371 unsigned char width;
373 unsigned char variant; 372 unsigned char variant;
diff --git a/drivers/net/cxgb3/t3_hw.c b/drivers/net/cxgb3/t3_hw.c
index c688421da9c..44ac2f40b64 100644
--- a/drivers/net/cxgb3/t3_hw.c
+++ b/drivers/net/cxgb3/t3_hw.c
@@ -3290,22 +3290,20 @@ static void config_pcie(struct adapter *adap)
3290 unsigned int fst_trn_rx, fst_trn_tx, acklat, rpllmt; 3290 unsigned int fst_trn_rx, fst_trn_tx, acklat, rpllmt;
3291 3291
3292 pci_read_config_word(adap->pdev, 3292 pci_read_config_word(adap->pdev,
3293 adap->params.pci.pcie_cap_addr + PCI_EXP_DEVCTL, 3293 adap->pdev->pcie_cap + PCI_EXP_DEVCTL,
3294 &val); 3294 &val);
3295 pldsize = (val & PCI_EXP_DEVCTL_PAYLOAD) >> 5; 3295 pldsize = (val & PCI_EXP_DEVCTL_PAYLOAD) >> 5;
3296 3296
3297 pci_read_config_word(adap->pdev, 0x2, &devid); 3297 pci_read_config_word(adap->pdev, 0x2, &devid);
3298 if (devid == 0x37) { 3298 if (devid == 0x37) {
3299 pci_write_config_word(adap->pdev, 3299 pci_write_config_word(adap->pdev,
3300 adap->params.pci.pcie_cap_addr + 3300 adap->pdev->pcie_cap + PCI_EXP_DEVCTL,
3301 PCI_EXP_DEVCTL,
3302 val & ~PCI_EXP_DEVCTL_READRQ & 3301 val & ~PCI_EXP_DEVCTL_READRQ &
3303 ~PCI_EXP_DEVCTL_PAYLOAD); 3302 ~PCI_EXP_DEVCTL_PAYLOAD);
3304 pldsize = 0; 3303 pldsize = 0;
3305 } 3304 }
3306 3305
3307 pci_read_config_word(adap->pdev, 3306 pci_read_config_word(adap->pdev, adap->pdev->pcie_cap + PCI_EXP_LNKCTL,
3308 adap->params.pci.pcie_cap_addr + PCI_EXP_LNKCTL,
3309 &val); 3307 &val);
3310 3308
3311 fst_trn_tx = G_NUMFSTTRNSEQ(t3_read_reg(adap, A_PCIE_PEX_CTRL0)); 3309 fst_trn_tx = G_NUMFSTTRNSEQ(t3_read_reg(adap, A_PCIE_PEX_CTRL0));
@@ -3429,12 +3427,11 @@ static void get_pci_mode(struct adapter *adapter, struct pci_params *p)
3429 static unsigned short speed_map[] = { 33, 66, 100, 133 }; 3427 static unsigned short speed_map[] = { 33, 66, 100, 133 };
3430 u32 pci_mode, pcie_cap; 3428 u32 pci_mode, pcie_cap;
3431 3429
3432 pcie_cap = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP); 3430 pcie_cap = pci_pcie_cap(adapter->pdev);
3433 if (pcie_cap) { 3431 if (pcie_cap) {
3434 u16 val; 3432 u16 val;
3435 3433
3436 p->variant = PCI_VARIANT_PCIE; 3434 p->variant = PCI_VARIANT_PCIE;
3437 p->pcie_cap_addr = pcie_cap;
3438 pci_read_config_word(adapter->pdev, pcie_cap + PCI_EXP_LNKSTA, 3435 pci_read_config_word(adapter->pdev, pcie_cap + PCI_EXP_LNKSTA,
3439 &val); 3436 &val);
3440 p->width = (val >> 4) & 0x3f; 3437 p->width = (val >> 4) & 0x3f;