spi/topcliff: cleanups for style and conciseness

This patch makes multiple cleanups to the new topcliff pch spi driver
including, but not limited to,
- removing superfluous brackets around variables
- open coding functions that are only used once
- removing unnecessary line breaks
- removing unused functions
- simplifying the interrupt enable/disable code
- remove unnecessary (void *) casts.
- remove b_mem_fail from pch_spi_set_tx to code it more cleanly
- shorten dev_dbg() messages for conciseness and readability

More cleanups are still needed in this driver.  In particular,
- the driver filename should be changed to spi_topcliff_pch.c
- many of the dev_dbg() lines should be trimmed (particularly the ones
  on unconditional code paths).
- I suspect that the locking model not correct.  I'd like to know what
  drivers' critical regions are, and how they are protected.
- get_resources and release_resources probably should be open coded in
  .probe and .release respectively.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>

1 files changed, 138 insertions, 364 deletions

diff --git a/drivers/spi/spi_topcliff_pch.c b/drivers/spi/spi_topcliff_pch.c
index 58b183f6eec..97746232741 100644
--- a/drivers/spi/spi_topcliff_pch.c
+++ b/drivers/spi/spi_topcliff_pch.c
@@ -1,8 +1,6 @@
 /*
  * SPI bus driver for the Topcliff PCH used by Intel SoCs
- */
-
-/*
+ *
  * Copyright (C) 2010 OKI SEMICONDUCTOR Co., LTD.
  *
  * This program is free software; you can redistribute it and/or modify
@@ -19,6 +17,7 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307, USA.
  */
 
+#include <linux/delay.h>
 #include <linux/pci.h>
 #include <linux/wait.h>
 #include <linux/spi/spi.h>
@@ -45,17 +44,7 @@
 
 #define PCH_RX_THOLD            7
 #define PCH_RX_THOLD_MAX        15
-#define PCH_RX                  1
-#define PCH_TX                  2
-
-/* various interrupts */
-#define PCH_TFI                 0x1
-#define PCH_RFI                 0x2
-#define PCH_FI                  0x4
-#define PCH_ORI                 0x8
-#define PCH_MDFI                0x10
 
-#define PCH_ALL                 (PCH_TFI|PCH_RFI|PCH_FI|PCH_ORI|PCH_MDFI)
 #define PCH_MAX_BAUDRATE        5000000
 #define PCH_MAX_FIFO_DEPTH      16
 
@@ -86,6 +75,8 @@
 #define SPSR_FI_BIT             (1 << 2)
 #define SPBRR_SIZE_BIT          (1 << 10)
 
+#define PCH_ALL                 (SPCR_TFIE_BIT|SPCR_RFIE_BIT|SPCR_FIE_BIT|SPCR_ORIE_BIT|SPCR_MDFIE_BIT)
+
 #define SPCR_RFIC_FIELD         20
 #define SPCR_TFIC_FIELD         16
 
@@ -176,16 +167,6 @@ static struct pci_device_id pch_spi_pcidev_id[] = {
         {0,}
 };
 
-static inline void pch_set_bitmsk(u32 *var, u32 bitmask)
-{
-        *var |= bitmask;
-}
-
-static inline void pch_clr_bitmsk(u32 *var, u32 bitmask)
-{
-        *var &= (~(bitmask));
-}
-
 /**
  * pch_spi_writereg() - Performs  register writes
  * @master:     Pointer to struct spi_master.
@@ -194,9 +175,7 @@ static inline void pch_clr_bitmsk(u32 *var, u32 bitmask)
  */
 static inline void pch_spi_writereg(struct spi_master *master, int idx, u32 val)
 {
-
         struct pch_spi_data *data = spi_master_get_devdata(master);
-
         iowrite32(val, (data->io_remap_addr + idx));
 }
 
@@ -208,19 +187,9 @@ static inline void pch_spi_writereg(struct spi_master *master, int idx, u32 val)
 static inline u32 pch_spi_readreg(struct spi_master *master, int idx)
 {
         struct pch_spi_data *data = spi_master_get_devdata(master);
-
         return ioread32(data->io_remap_addr + idx);
 }
 
-/* ope==true:Set bit, ope==false:Clear bit */
-static inline void pch_spi_setclr_bit(u32 *val, u32 pos, bool ope)
-{
-        if (ope)
-                *val |= pos;
-        else
-                *val &= (~(pos));
-}
-
 static inline void pch_spi_setclr_reg(struct spi_master *master, int idx,
                                       u32 set, u32 clr)
 {
@@ -229,7 +198,6 @@ static inline void pch_spi_setclr_reg(struct spi_master *master, int idx,
         pch_spi_writereg(master, idx, tmp);
 }
 
-
 static void pch_spi_set_master_mode(struct spi_master *master)
 {
         pch_spi_setclr_reg(master, PCH_SPCR, SPCR_MSTR_BIT, 0);
@@ -245,35 +213,6 @@ static void pch_spi_clear_fifo(struct spi_master *master)
         pch_spi_setclr_reg(master, PCH_SPCR, 0, SPCR_FICLR_BIT);
 }
 
-/**
- * ch_spi_disable_interrupts() - Disables specified interrupts
- * @master:     Pointer to struct spi_master.
- * @interrupt:  Interrups to be enabled.
- */
-static void pch_spi_disable_interrupts(struct spi_master *master, u8 interrupt)
-{
-        u32 clr_flags = 0;
-
-        if (interrupt & PCH_RFI)
-                clr_flags |= SPCR_RFIE_BIT;
-
-        if (interrupt & PCH_TFI)
-                clr_flags |= SPCR_TFIE_BIT;
-
-        if (interrupt & PCH_FI)
-                clr_flags |= SPCR_FIE_BIT;
-
-        if (interrupt & PCH_ORI)
-                clr_flags |= SPCR_ORIE_BIT;
-
-        if (interrupt & PCH_MDFI)
-                clr_flags |= SPCR_MDFIE_BIT;
-
-        pch_spi_setclr_reg(master, PCH_SPCR, 0, clr_flags);
-
-        dev_dbg(&master->dev, "%s clearing bits =%x\n", __func__, clr_flags);
-}
-
 static void pch_spi_handler_sub(struct pch_spi_data *data, u32 reg_spsr_val,
                                 void __iomem *io_remap_addr)
 {
@@ -309,9 +248,7 @@ static void pch_spi_handler_sub(struct pch_spi_data *data, u32 reg_spsr_val,
                 /* disable RFI if not needed */
                 if ((bpw_len - rx_index) <= PCH_MAX_FIFO_DEPTH) {
                         reg_spcr_val = ioread32(io_remap_addr + PCH_SPCR);
-
-                        /* disable RFI */
-                        pch_clr_bitmsk(&reg_spcr_val, SPCR_RFIE_BIT);
+                        reg_spcr_val &= ~SPCR_RFIE_BIT; /* disable RFI */
 
                         /* reset rx threshold */
                         reg_spcr_val &= MASK_RFIC_SPCR_BITS;
@@ -329,7 +266,8 @@ static void pch_spi_handler_sub(struct pch_spi_data *data, u32 reg_spsr_val,
         /* if transfer complete interrupt */
         if (reg_spsr_val & SPSR_FI_BIT) {
                 /* disable FI & RFI interrupts */
-                pch_spi_disable_interrupts(data->master, PCH_FI | PCH_RFI);
+                pch_spi_setclr_reg(data->master, PCH_SPCR, 0,
+                                   SPCR_FIE_BIT | SPCR_TFIE_BIT);
 
                 /* transfer is completed;inform pch_spi_process_messages */
                 data->transfer_complete = true;
@@ -337,7 +275,6 @@ static void pch_spi_handler_sub(struct pch_spi_data *data, u32 reg_spsr_val,
         }
 }
 
-
 /**
  * pch_spi_handler() - Interrupt handler
  * @irq:        The interrupt number.
@@ -350,7 +287,6 @@ static irqreturn_t pch_spi_handler(int irq, void *dev_id)
         void __iomem *spsr;
         void __iomem *io_remap_addr;
         irqreturn_t ret = IRQ_NONE;
-
         struct pch_spi_board_data *board_dat = dev_id;