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authorAndy Green <andy@warmcat.com>2011-05-30 10:43:07 -0400
committerBen Dooks <ben-linux@fluff.org>2011-10-29 04:37:08 -0400
commit4e80f727bf59e8c1ea8e47c45c9ef368d353d835 (patch)
treece1984cbc14dc5b143c86e30e2557ca594cb05af
parent6314f09e9517ed3d7d951525a111df858a6dd1a4 (diff)
I2C: OMAP2+: address confused probed version naming
The driver reflects the confusion that probed I2C revision from the hardware of 0x40 means it is on an OMAP4430. However, you will probe the same 0x40 ID on an OMAP3530. So this patch changes the name to reflect that. It also clarifies that the original name OMAP_I2C_REV_2 is referring to some ancient OMAP1 revision number, not to be confused with the IP revisions this patch series introduces. Similarly the term "rev" is used in the ancient OMAP1 ISR, the term is changed to use omap1 instead. Cc: patches@linaro.org Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andy Green <andy.green@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Acked-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Kevin Hilman <khilman@ti.com>
-rw-r--r--drivers/i2c/busses/i2c-omap.c21
1 files changed, 12 insertions, 9 deletions
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index e6792abfc2b..0254da47952 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -42,12 +42,12 @@
42#include <linux/pm_runtime.h> 42#include <linux/pm_runtime.h>
43 43
44/* I2C controller revisions */ 44/* I2C controller revisions */
45#define OMAP_I2C_REV_2 0x20 45#define OMAP_I2C_OMAP1_REV_2 0x20
46 46
47/* I2C controller revisions present on specific hardware */ 47/* I2C controller revisions present on specific hardware */
48#define OMAP_I2C_REV_ON_2430 0x36 48#define OMAP_I2C_REV_ON_2430 0x36
49#define OMAP_I2C_REV_ON_3430 0x3C 49#define OMAP_I2C_REV_ON_3430 0x3C
50#define OMAP_I2C_REV_ON_4430 0x40 50#define OMAP_I2C_REV_ON_3530_4430 0x40
51 51
52/* timeout waiting for the controller to respond */ 52/* timeout waiting for the controller to respond */
53#define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000)) 53#define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000))
@@ -314,7 +314,7 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev)
314 else 314 else
315 omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0); 315 omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);
316 316
317 if (dev->rev < OMAP_I2C_REV_2) { 317 if (dev->rev < OMAP_I2C_OMAP1_REV_2) {
318 iv = omap_i2c_read_reg(dev, OMAP_I2C_IV_REG); /* Read clears */ 318 iv = omap_i2c_read_reg(dev, OMAP_I2C_IV_REG); /* Read clears */
319 } else { 319 } else {
320 omap_i2c_write_reg(dev, OMAP_I2C_STAT_REG, dev->iestate); 320 omap_i2c_write_reg(dev, OMAP_I2C_STAT_REG, dev->iestate);
@@ -336,7 +336,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
336 unsigned long internal_clk = 0; 336 unsigned long internal_clk = 0;
337 struct clk *fclk; 337 struct clk *fclk;
338 338
339 if (dev->rev >= OMAP_I2C_REV_2) { 339 if (dev->rev >= OMAP_I2C_OMAP1_REV_2) {
340 /* Disable I2C controller before soft reset */ 340 /* Disable I2C controller before soft reset */
341 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 341 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG,
342 omap_i2c_read_reg(dev, OMAP_I2C_CON_REG) & 342 omap_i2c_read_reg(dev, OMAP_I2C_CON_REG) &
@@ -379,7 +379,9 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
379 * REVISIT: Some wkup sources might not be needed. 379 * REVISIT: Some wkup sources might not be needed.
380 */ 380 */
381 dev->westate = OMAP_I2C_WE_ALL; 381 dev->westate = OMAP_I2C_WE_ALL;
382 omap_i2c_write_reg(dev, OMAP_I2C_WE_REG, dev->westate); 382 if (dev->rev < OMAP_I2C_REV_ON_3530_4430)
383 omap_i2c_write_reg(dev, OMAP_I2C_WE_REG,
384 dev->westate);
383 } 385 }
384 } 386 }
385 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); 387 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
@@ -721,7 +723,7 @@ static inline void i2c_omap_errata_i207(struct omap_i2c_dev *dev, u16 stat)
721#ifdef CONFIG_ARCH_OMAP15XX 723#ifdef CONFIG_ARCH_OMAP15XX
722 724
723static irqreturn_t 725static irqreturn_t
724omap_i2c_rev1_isr(int this_irq, void *dev_id) 726omap_i2c_omap1_isr(int this_irq, void *dev_id)
725{ 727{
726 struct omap_i2c_dev *dev = dev_id; 728 struct omap_i2c_dev *dev = dev_id;
727 u16 iv, w; 729 u16 iv, w;
@@ -775,7 +777,7 @@ omap_i2c_rev1_isr(int this_irq, void *dev_id)
775 return IRQ_HANDLED; 777 return IRQ_HANDLED;
776} 778}
777#else 779#else
778#define omap_i2c_rev1_isr NULL 780#define omap_i2c_omap1_isr NULL
779#endif 781#endif
780 782
781/* 783/*
@@ -1060,7 +1062,7 @@ omap_i2c_probe(struct platform_device *pdev)
1060 * size. This is to ensure that we can handle the status on int 1062 * size. This is to ensure that we can handle the status on int
1061 * call back latencies. 1063 * call back latencies.
1062 */ 1064 */
1063 if (dev->rev >= OMAP_I2C_REV_ON_4430) { 1065 if (dev->rev >= OMAP_I2C_REV_ON_3530_4430) {
1064 dev->fifo_size = 0; 1066 dev->fifo_size = 0;
1065 dev->b_hw = 0; /* Disable hardware fixes */ 1067 dev->b_hw = 0; /* Disable hardware fixes */
1066 } else { 1068 } else {
@@ -1076,7 +1078,8 @@ omap_i2c_probe(struct platform_device *pdev)
1076 /* reset ASAP, clearing any IRQs */ 1078 /* reset ASAP, clearing any IRQs */
1077 omap_i2c_init(dev); 1079 omap_i2c_init(dev);
1078 1080
1079 isr = (dev->rev < OMAP_I2C_REV_2) ? omap_i2c_rev1_isr : omap_i2c_isr; 1081 isr = (dev->rev < OMAP_I2C_OMAP1_REV_2) ? omap_i2c_omap1_isr :
1082 omap_i2c_isr;
1080 r = request_irq(dev->irq, isr, 0, pdev->name, dev); 1083 r = request_irq(dev->irq, isr, 0, pdev->name, dev);
1081 1084
1082 if (r) { 1085 if (r) {