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authorAlan Cox <alan@linux.intel.com>2009-10-06 10:47:22 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2009-12-11 15:23:05 -0500
commit4e02b4b57df1ac5e040e9b70391dfcc2929c9958 (patch)
tree828a378864fd92d1e845b9b5a013d14bcdd15716
parentb802ce0c705f537286da6084ec6503ba41bf7a0a (diff)
Staging: et131x: extract the eeprom setup logic from initpci
This puts all the eeprom handling in one place and cleans up the interfaces Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-rw-r--r--drivers/staging/et131x/et1310_eeprom.c73
-rw-r--r--drivers/staging/et131x/et1310_eeprom.h5
-rw-r--r--drivers/staging/et131x/et131x_initpci.c67
3 files changed, 73 insertions, 72 deletions
diff --git a/drivers/staging/et131x/et1310_eeprom.c b/drivers/staging/et131x/et1310_eeprom.c
index a80b3df5b96..bcca1f86f51 100644
--- a/drivers/staging/et131x/et1310_eeprom.c
+++ b/drivers/staging/et131x/et1310_eeprom.c
@@ -132,7 +132,7 @@ static int eeprom_wait_ready(struct pci_dev *pdev, u32 *status)
132 * 132 *
133 * Returns 1 for a successful write. 133 * Returns 1 for a successful write.
134 */ 134 */
135int eeprom_write(struct et131x_adapter *etdev, u32 addr, u8 data) 135static int eeprom_write(struct et131x_adapter *etdev, u32 addr, u8 data)
136{ 136{
137 struct pci_dev *pdev = etdev->pdev; 137 struct pci_dev *pdev = etdev->pdev;
138 int index = 0; 138 int index = 0;
@@ -264,7 +264,7 @@ int eeprom_write(struct et131x_adapter *etdev, u32 addr, u8 data)
264 * 264 *
265 * Returns 1 for a successful read 265 * Returns 1 for a successful read
266 */ 266 */
267int eeprom_read(struct et131x_adapter *etdev, u32 addr, u8 *pdata) 267static int eeprom_read(struct et131x_adapter *etdev, u32 addr, u8 *pdata)
268{ 268{
269 struct pci_dev *pdev = etdev->pdev; 269 struct pci_dev *pdev = etdev->pdev;
270 int err; 270 int err;
@@ -312,3 +312,72 @@ int eeprom_read(struct et131x_adapter *etdev, u32 addr, u8 *pdata)
312 */ 312 */
313 return (status & LBCIF_STATUS_ACK_ERROR) ? -EIO : 0; 313 return (status & LBCIF_STATUS_ACK_ERROR) ? -EIO : 0;
314} 314}
315
316int et131x_init_eeprom(struct et131x_adapter *etdev)
317{
318 struct pci_dev *pdev = etdev->pdev;
319 u8 eestatus;
320
321 /* We first need to check the EEPROM Status code located at offset
322 * 0xB2 of config space
323 */
324 pci_read_config_byte(pdev, ET1310_PCI_EEPROM_STATUS,
325 &eestatus);
326
327 /* THIS IS A WORKAROUND:
328 * I need to call this function twice to get my card in a
329 * LG M1 Express Dual running. I tried also a msleep before this
330 * function, because I thougth there could be some time condidions
331 * but it didn't work. Call the whole function twice also work.
332 */
333 if (pci_read_config_byte(pdev, ET1310_PCI_EEPROM_STATUS, &eestatus)) {
334 dev_err(&pdev->dev,
335 "Could not read PCI config space for EEPROM Status\n");
336 return -EIO;
337 }
338
339 /* Determine if the error(s) we care about are present. If they are
340 * present we need to fail.
341 */
342 if (eestatus & 0x4C) {
343 int write_failed = 0;
344 if (pdev->revision == 0x01) {
345 int i;
346 static const u8 eedata[4] = { 0xFE, 0x13, 0x10, 0xFF };
347
348 /* Re-write the first 4 bytes if we have an eeprom
349 * present and the revision id is 1, this fixes the
350 * corruption seen with 1310 B Silicon
351 */
352 for (i = 0; i < 3; i++)
353 if (eeprom_write(etdev, i, eedata[i]) < 0)
354 write_failed = 1;
355 }
356 if (pdev->revision != 0x01 || write_failed) {
357 dev_err(&pdev->dev,
358 "Fatal EEPROM Status Error - 0x%04x\n", eestatus);
359
360 /* This error could mean that there was an error
361 * reading the eeprom or that the eeprom doesn't exist.
362 * We will treat each case the same and not try to gather
363 * additional information that normally would come from the
364 * eeprom, like MAC Address
365 */
366 etdev->has_eeprom = 0;
367 return -EIO;
368 }
369 }
370 etdev->has_eeprom = 1;
371
372 /* Read the EEPROM for information regarding LED behavior. Refer to
373 * ET1310_phy.c, et131x_xcvr_init(), for its use.
374 */
375 eeprom_read(etdev, 0x70, &etdev->eepromData[0]);
376 eeprom_read(etdev, 0x71, &etdev->eepromData[1]);
377
378 if (etdev->eepromData[0] != 0xcd)
379 /* Disable all optional features */
380 etdev->eepromData[1] = 0x00;
381
382 return 0;
383}
diff --git a/drivers/staging/et131x/et1310_eeprom.h b/drivers/staging/et131x/et1310_eeprom.h
index eaa5c1f20d8..6a6c6a632a8 100644
--- a/drivers/staging/et131x/et1310_eeprom.h
+++ b/drivers/staging/et131x/et1310_eeprom.h
@@ -98,9 +98,6 @@
98/* Forward declaration of the private adapter structure */ 98/* Forward declaration of the private adapter structure */
99struct et131x_adapter; 99struct et131x_adapter;
100 100
101int eeprom_write(struct et131x_adapter *adapter, u32 unAddress, 101int et131x_init_eeprom(struct et131x_adapter *etdev);
102 u8 bData);
103int eeprom_read(struct et131x_adapter *adapter, u32 unAddress,
104 u8 *pbData);
105 102
106#endif /* _ET1310_EEPROM_H_ */ 103#endif /* _ET1310_EEPROM_H_ */
diff --git a/drivers/staging/et131x/et131x_initpci.c b/drivers/staging/et131x/et131x_initpci.c
index cc1957ba147..363162cf988 100644
--- a/drivers/staging/et131x/et131x_initpci.c
+++ b/drivers/staging/et131x/et131x_initpci.c
@@ -140,10 +140,8 @@ MODULE_PARM_DESC(et131x_speed_set,
140int et131x_find_adapter(struct et131x_adapter *adapter, struct pci_dev *pdev) 140int et131x_find_adapter(struct et131x_adapter *adapter, struct pci_dev *pdev)
141{ 141{
142 int result; 142 int result;
143 uint8_t eepromStat;
144 uint8_t maxPayload = 0; 143 uint8_t maxPayload = 0;
145 uint8_t read_size_reg; 144 uint8_t read_size_reg;
146 u8 rev;
147 145
148 /* Allow disabling of Non-Maskable Interrupts in I/O space, to 146 /* Allow disabling of Non-Maskable Interrupts in I/O space, to
149 * support validation. 147 * support validation.
@@ -160,71 +158,8 @@ int et131x_find_adapter(struct et131x_adapter *adapter, struct pci_dev *pdev)
160 outb(ET1310_NMI_DISABLE, RegisterVal); 158 outb(ET1310_NMI_DISABLE, RegisterVal);
161 } 159 }
162 160
163 /* We first need to check the EEPROM Status code located at offset 161 if (et131x_init_eeprom(adapter) < 0)
164 * 0xB2 of config space
165 */
166 result = pci_read_config_byte(pdev, ET1310_PCI_EEPROM_STATUS,
167 &eepromStat);
168
169 /* THIS IS A WORKAROUND:
170 * I need to call this function twice to get my card in a
171 * LG M1 Express Dual running. I tried also a msleep before this
172 * function, because I thougth there could be some time condidions
173 * but it didn't work. Call the whole function twice also work.
174 */
175 result = pci_read_config_byte(pdev, ET1310_PCI_EEPROM_STATUS,
176 &eepromStat);
177 if (result != PCIBIOS_SUCCESSFUL) {
178 dev_err(&pdev->dev, "Could not read PCI config space for "
179 "EEPROM Status\n");
180 return -EIO;
181 }
182
183 /* Determine if the error(s) we care about are present. If they are
184 * present, we need to fail.
185 */
186 if (eepromStat & 0x4C) {
187 result = pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
188 if (result != PCIBIOS_SUCCESSFUL) {
189 dev_err(&pdev->dev,
190 "Could not read PCI config space for "
191 "Revision ID\n");
192 return -EIO;
193 } else if (rev == 0x01) {
194 int32_t nLoop;
195 uint8_t temp[4] = { 0xFE, 0x13, 0x10, 0xFF };
196
197 /* Re-write the first 4 bytes if we have an eeprom
198 * present and the revision id is 1, this fixes the
199 * corruption seen with 1310 B Silicon
200 */
201 for (nLoop = 0; nLoop < 3; nLoop++) {
202 eeprom_write(adapter, nLoop, temp[nLoop]);
203 }
204 }
205
206 dev_err(&pdev->dev, "Fatal EEPROM Status Error - 0x%04x\n", eepromStat);
207
208 /* This error could mean that there was an error reading the
209 * eeprom or that the eeprom doesn't exist. We will treat
210 * each case the same and not try to gather additional
211 * information that normally would come from the eeprom, like
212 * MAC Address
213 */
214 adapter->has_eeprom = 0;
215 return -EIO; 162 return -EIO;
216 } else
217 adapter->has_eeprom = 1;
218
219 /* Read the EEPROM for information regarding LED behavior. Refer to
220 * ET1310_phy.c, et131x_xcvr_init(), for its use.
221 */
222 eeprom_read(adapter, 0x70, &adapter->eepromData[0]);
223 eeprom_read(adapter, 0x71, &adapter->eepromData[1]);
224
225 if (adapter->eepromData[0] != 0xcd)
226 /* Disable all optional features */
227 adapter->eepromData[1] = 0x00;
228 163
229 /* Let's set up the PORT LOGIC Register. First we need to know what 164 /* Let's set up the PORT LOGIC Register. First we need to know what
230 * the max_payload_size is 165 * the max_payload_size is