diff options
author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2010-08-04 20:17:29 -0400 |
---|---|---|
committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2010-08-04 20:17:29 -0400 |
commit | 42a0ae2282b512d1a8f6f020327f5f7b8f31a5ea (patch) | |
tree | 1af6ca28b88e052f9603790b259278904d2936be | |
parent | 412a4ac5e9cf7fdeb6af562c25547a9b9da7674f (diff) | |
parent | c4b6a77663f5879de20561144716cfb675815e82 (diff) |
Merge commit 'kumar/next' into next
36 files changed, 3185 insertions, 186 deletions
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index ae29761469b..e4545f85ee9 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig | |||
@@ -352,7 +352,7 @@ config ARCH_ENABLE_MEMORY_HOTREMOVE | |||
352 | 352 | ||
353 | config KEXEC | 353 | config KEXEC |
354 | bool "kexec system call (EXPERIMENTAL)" | 354 | bool "kexec system call (EXPERIMENTAL)" |
355 | depends on (PPC_BOOK3S || (FSL_BOOKE && !SMP)) && EXPERIMENTAL | 355 | depends on (PPC_BOOK3S || FSL_BOOKE) && EXPERIMENTAL |
356 | help | 356 | help |
357 | kexec is a system call that implements the ability to shutdown your | 357 | kexec is a system call that implements the ability to shutdown your |
358 | current kernel, and to start another kernel. It is like a reboot | 358 | current kernel, and to start another kernel. It is like a reboot |
@@ -369,8 +369,8 @@ config KEXEC | |||
369 | 369 | ||
370 | config CRASH_DUMP | 370 | config CRASH_DUMP |
371 | bool "Build a kdump crash kernel" | 371 | bool "Build a kdump crash kernel" |
372 | depends on PPC64 || 6xx | 372 | depends on PPC64 || 6xx || FSL_BOOKE |
373 | select RELOCATABLE if PPC64 | 373 | select RELOCATABLE if PPC64 || FSL_BOOKE |
374 | help | 374 | help |
375 | Build a kernel suitable for use as a kdump capture kernel. | 375 | Build a kernel suitable for use as a kdump capture kernel. |
376 | The same kernel binary can be used as production kernel and dump | 376 | The same kernel binary can be used as production kernel and dump |
@@ -898,7 +898,7 @@ config KERNEL_START_BOOL | |||
898 | config KERNEL_START | 898 | config KERNEL_START |
899 | hex "Virtual address of kernel base" if KERNEL_START_BOOL | 899 | hex "Virtual address of kernel base" if KERNEL_START_BOOL |
900 | default PAGE_OFFSET if PAGE_OFFSET_BOOL | 900 | default PAGE_OFFSET if PAGE_OFFSET_BOOL |
901 | default "0xc2000000" if CRASH_DUMP | 901 | default "0xc2000000" if CRASH_DUMP && !RELOCATABLE |
902 | default "0xc0000000" | 902 | default "0xc0000000" |
903 | 903 | ||
904 | config PHYSICAL_START_BOOL | 904 | config PHYSICAL_START_BOOL |
@@ -911,7 +911,7 @@ config PHYSICAL_START_BOOL | |||
911 | 911 | ||
912 | config PHYSICAL_START | 912 | config PHYSICAL_START |
913 | hex "Physical address where the kernel is loaded" if PHYSICAL_START_BOOL | 913 | hex "Physical address where the kernel is loaded" if PHYSICAL_START_BOOL |
914 | default "0x02000000" if PPC_STD_MMU && CRASH_DUMP | 914 | default "0x02000000" if PPC_STD_MMU && CRASH_DUMP && !RELOCATABLE |
915 | default "0x00000000" | 915 | default "0x00000000" |
916 | 916 | ||
917 | config PHYSICAL_ALIGN | 917 | config PHYSICAL_ALIGN |
diff --git a/arch/powerpc/boot/dts/mpc8308rdb.dts b/arch/powerpc/boot/dts/mpc8308rdb.dts new file mode 100644 index 00000000000..a97eb2db5a1 --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8308rdb.dts | |||
@@ -0,0 +1,303 @@ | |||
1 | /* | ||
2 | * MPC8308RDB Device Tree Source | ||
3 | * | ||
4 | * Copyright 2009 Freescale Semiconductor Inc. | ||
5 | * Copyright 2010 Ilya Yanok, Emcraft Systems, yanok@emcraft.com | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License as published by the | ||
9 | * Free Software Foundation; either version 2 of the License, or (at your | ||
10 | * option) any later version. | ||
11 | */ | ||
12 | |||
13 | /dts-v1/; | ||
14 | |||
15 | / { | ||
16 | compatible = "fsl,mpc8308rdb"; | ||
17 | #address-cells = <1>; | ||
18 | #size-cells = <1>; | ||
19 | |||
20 | aliases { | ||
21 | ethernet0 = &enet0; | ||
22 | ethernet1 = &enet1; | ||
23 | serial0 = &serial0; | ||
24 | serial1 = &serial1; | ||
25 | pci0 = &pci0; | ||
26 | }; | ||
27 | |||
28 | cpus { | ||
29 | #address-cells = <1>; | ||
30 | #size-cells = <0>; | ||
31 | |||
32 | PowerPC,8308@0 { | ||
33 | device_type = "cpu"; | ||
34 | reg = <0x0>; | ||
35 | d-cache-line-size = <32>; | ||
36 | i-cache-line-size = <32>; | ||
37 | d-cache-size = <16384>; | ||
38 | i-cache-size = <16384>; | ||
39 | timebase-frequency = <0>; // from bootloader | ||
40 | bus-frequency = <0>; // from bootloader | ||
41 | clock-frequency = <0>; // from bootloader | ||
42 | }; | ||
43 | }; | ||
44 | |||
45 | memory { | ||
46 | device_type = "memory"; | ||
47 | reg = <0x00000000 0x08000000>; // 128MB at 0 | ||
48 | }; | ||
49 | |||
50 | localbus@e0005000 { | ||
51 | #address-cells = <2>; | ||
52 | #size-cells = <1>; | ||
53 | compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus"; | ||
54 | reg = <0xe0005000 0x1000>; | ||
55 | interrupts = <77 0x8>; | ||
56 | interrupt-parent = <&ipic>; | ||
57 | |||
58 | // CS0 and CS1 are swapped when | ||
59 | // booting from nand, but the | ||
60 | // addresses are the same. | ||
61 | ranges = <0x0 0x0 0xfe000000 0x00800000 | ||
62 | 0x1 0x0 0xe0600000 0x00002000 | ||
63 | 0x2 0x0 0xf0000000 0x00020000 | ||
64 | 0x3 0x0 0xfa000000 0x00008000>; | ||
65 | |||
66 | flash@0,0 { | ||
67 | #address-cells = <1>; | ||
68 | #size-cells = <1>; | ||
69 | compatible = "cfi-flash"; | ||
70 | reg = <0x0 0x0 0x800000>; | ||
71 | bank-width = <2>; | ||
72 | device-width = <1>; | ||
73 | |||
74 | u-boot@0 { | ||
75 | reg = <0x0 0x60000>; | ||
76 | read-only; | ||
77 | }; | ||
78 | env@60000 { | ||
79 | reg = <0x60000 0x10000>; | ||
80 | }; | ||
81 | env1@70000 { | ||
82 | reg = <0x70000 0x10000>; | ||
83 | }; | ||
84 | kernel@80000 { | ||
85 | reg = <0x80000 0x200000>; | ||
86 | }; | ||
87 | dtb@280000 { | ||
88 | reg = <0x280000 0x10000>; | ||
89 | }; | ||
90 | ramdisk@290000 { | ||
91 | reg = <0x290000 0x570000>; | ||
92 | }; | ||
93 | }; | ||
94 | |||
95 | nand@1,0 { | ||
96 | #address-cells = <1>; | ||
97 | #size-cells = <1>; | ||
98 | compatible = "fsl,mpc8315-fcm-nand", | ||
99 | "fsl,elbc-fcm-nand"; | ||
100 | reg = <0x1 0x0 0x2000>; | ||
101 | |||
102 | jffs2@0 { | ||
103 | reg = <0x0 0x2000000>; | ||
104 | }; | ||
105 | }; | ||
106 | }; | ||
107 | |||
108 | immr@e0000000 { | ||
109 | #address-cells = <1>; | ||
110 | #size-cells = <1>; | ||
111 | device_type = "soc"; | ||
112 | compatible = "fsl,mpc8315-immr", "simple-bus"; | ||
113 | ranges = <0 0xe0000000 0x00100000>; | ||
114 | reg = <0xe0000000 0x00000200>; | ||
115 | bus-frequency = <0>; | ||
116 | |||
117 | i2c@3000 { | ||
118 | #address-cells = <1>; | ||
119 | #size-cells = <0>; | ||
120 | cell-index = <0>; | ||
121 | compatible = "fsl-i2c"; | ||
122 | reg = <0x3000 0x100>; | ||
123 | interrupts = <14 0x8>; | ||
124 | interrupt-parent = <&ipic>; | ||
125 | dfsrr; | ||
126 | rtc@68 { | ||
127 | compatible = "dallas,ds1339"; | ||
128 | reg = <0x68>; | ||
129 | }; | ||
130 | }; | ||
131 | |||
132 | usb@23000 { | ||
133 | compatible = "fsl-usb2-dr"; | ||
134 | reg = <0x23000 0x1000>; | ||
135 | #address-cells = <1>; | ||
136 | #size-cells = <0>; | ||
137 | interrupt-parent = <&ipic>; | ||
138 | interrupts = <38 0x8>; | ||
139 | dr_mode = "peripheral"; | ||
140 | phy_type = "ulpi"; | ||
141 | }; | ||
142 | |||
143 | enet0: ethernet@24000 { | ||
144 | #address-cells = <1>; | ||
145 | #size-cells = <1>; | ||
146 | ranges = <0x0 0x24000 0x1000>; | ||
147 | |||
148 | cell-index = <0>; | ||
149 | device_type = "network"; | ||
150 | model = "eTSEC"; | ||
151 | compatible = "gianfar"; | ||
152 | reg = <0x24000 0x1000>; | ||
153 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
154 | interrupts = <32 0x8 33 0x8 34 0x8>; | ||
155 | interrupt-parent = <&ipic>; | ||
156 | tbi-handle = < &tbi0 >; | ||
157 | phy-handle = < &phy2 >; | ||
158 | fsl,magic-packet; | ||
159 | |||
160 | mdio@520 { | ||
161 | #address-cells = <1>; | ||
162 | #size-cells = <0>; | ||
163 | compatible = "fsl,gianfar-mdio"; | ||
164 | reg = <0x520 0x20>; | ||
165 | phy2: ethernet-phy@2 { | ||
166 | interrupt-parent = <&ipic>; | ||
167 | interrupts = <17 0x8>; | ||
168 | reg = <0x2>; | ||
169 | device_type = "ethernet-phy"; | ||
170 | }; | ||
171 | tbi0: tbi-phy@11 { | ||
172 | reg = <0x11>; | ||
173 | device_type = "tbi-phy"; | ||
174 | }; | ||
175 | }; | ||
176 | }; | ||
177 | |||
178 | enet1: ethernet@25000 { | ||
179 | #address-cells = <1>; | ||
180 | #size-cells = <1>; | ||
181 | cell-index = <1>; | ||
182 | device_type = "network"; | ||
183 | model = "eTSEC"; | ||
184 | compatible = "gianfar"; | ||
185 | reg = <0x25000 0x1000>; | ||
186 | ranges = <0x0 0x25000 0x1000>; | ||
187 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
188 | interrupts = <35 0x8 36 0x8 37 0x8>; | ||
189 | interrupt-parent = <&ipic>; | ||
190 | tbi-handle = < &tbi1 >; | ||
191 | /* Vitesse 7385 isn't on the MDIO bus */ | ||
192 | fixed-link = <1 1 1000 0 0>; | ||
193 | fsl,magic-packet; | ||
194 | |||
195 | mdio@520 { | ||
196 | #address-cells = <1>; | ||
197 | #size-cells = <0>; | ||
198 | compatible = "fsl,gianfar-tbi"; | ||
199 | reg = <0x520 0x20>; | ||
200 | |||
201 | tbi1: tbi-phy@11 { | ||
202 | reg = <0x11>; | ||
203 | device_type = "tbi-phy"; | ||
204 | }; | ||
205 | }; | ||
206 | }; | ||
207 | |||
208 | serial0: serial@4500 { | ||
209 | cell-index = <0>; | ||
210 | device_type = "serial"; | ||
211 | compatible = "ns16550"; | ||
212 | reg = <0x4500 0x100>; | ||
213 | clock-frequency = <133333333>; | ||
214 | interrupts = <9 0x8>; | ||
215 | interrupt-parent = <&ipic>; | ||
216 | }; | ||
217 | |||
218 | serial1: serial@4600 { | ||
219 | cell-index = <1>; | ||
220 | device_type = "serial"; | ||
221 | compatible = "ns16550"; | ||
222 | reg = <0x4600 0x100>; | ||
223 | clock-frequency = <133333333>; | ||
224 | interrupts = <10 0x8>; | ||
225 | interrupt-parent = <&ipic>; | ||
226 | }; | ||
227 | |||
228 | gpio@c00 { | ||
229 | #gpio-cells = <2>; | ||
230 | device_type = "gpio"; | ||
231 | compatible = "fsl,mpc8308-gpio", "fsl,mpc8349-gpio"; | ||
232 | reg = <0xc00 0x18>; | ||
233 | interrupts = <74 0x8>; | ||
234 | interrupt-parent = <&ipic>; | ||
235 | gpio-controller; | ||
236 | }; | ||
237 | |||
238 | /* IPIC | ||
239 | * interrupts cell = <intr #, sense> | ||
240 | * sense values match linux IORESOURCE_IRQ_* defines: | ||
241 | * sense == 8: Level, low assertion | ||
242 | * sense == 2: Edge, high-to-low change | ||
243 | */ | ||
244 | ipic: interrupt-controller@700 { | ||
245 | compatible = "fsl,ipic"; | ||
246 | interrupt-controller; | ||
247 | #address-cells = <0>; | ||
248 | #interrupt-cells = <2>; | ||
249 | reg = <0x700 0x100>; | ||
250 | device_type = "ipic"; | ||
251 | }; | ||
252 | |||
253 | ipic-msi@7c0 { | ||
254 | compatible = "fsl,ipic-msi"; | ||
255 | reg = <0x7c0 0x40>; | ||
256 | msi-available-ranges = <0x0 0x100>; | ||
257 | interrupts = < 0x43 0x8 | ||
258 | 0x4 0x8 | ||
259 | 0x51 0x8 | ||
260 | 0x52 0x8 | ||
261 | 0x56 0x8 | ||
262 | 0x57 0x8 | ||
263 | 0x58 0x8 | ||
264 | 0x59 0x8 >; | ||
265 | interrupt-parent = < &ipic >; | ||
266 | }; | ||
267 | |||
268 | }; | ||
269 | |||
270 | pci0: pcie@e0009000 { | ||
271 | #address-cells = <3>; | ||
272 | #size-cells = <2>; | ||
273 | #interrupt-cells = <1>; | ||
274 | device_type = "pci"; | ||
275 | compatible = "fsl,mpc8308-pcie", "fsl,mpc8314-pcie"; | ||
276 | reg = <0xe0009000 0x00001000 | ||
277 | 0xb0000000 0x01000000>; | ||
278 | ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 | ||
279 | 0x01000000 0 0x00000000 0xb1000000 0 0x00800000>; | ||
280 | bus-range = <0 0>; | ||
281 | interrupt-map-mask = <0xf800 0 0 7>; | ||
282 | interrupt-map = <0 0 0 1 &ipic 1 8 | ||
283 | 0 0 0 2 &ipic 1 8 | ||
284 | 0 0 0 3 &ipic 1 8 | ||
285 | 0 0 0 4 &ipic 1 8>; | ||
286 | interrupts = <0x1 0x8>; | ||
287 | interrupt-parent = <&ipic>; | ||
288 | clock-frequency = <0>; | ||
289 | |||
290 | pcie@0 { | ||
291 | #address-cells = <3>; | ||
292 | #size-cells = <2>; | ||
293 | device_type = "pci"; | ||
294 | reg = <0 0 0 0 0>; | ||
295 | ranges = <0x02000000 0 0xa0000000 | ||
296 | 0x02000000 0 0xa0000000 | ||
297 | 0 0x10000000 | ||
298 | 0x01000000 0 0x00000000 | ||
299 | 0x01000000 0 0x00000000 | ||
300 | 0 0x00800000>; | ||
301 | }; | ||
302 | }; | ||
303 | }; | ||
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts index 9dc292962a9..8d1bf0fd926 100644 --- a/arch/powerpc/boot/dts/mpc8540ads.dts +++ b/arch/powerpc/boot/dts/mpc8540ads.dts | |||
@@ -71,14 +71,14 @@ | |||
71 | }; | 71 | }; |
72 | 72 | ||
73 | memory-controller@2000 { | 73 | memory-controller@2000 { |
74 | compatible = "fsl,8540-memory-controller"; | 74 | compatible = "fsl,mpc8540-memory-controller"; |
75 | reg = <0x2000 0x1000>; | 75 | reg = <0x2000 0x1000>; |
76 | interrupt-parent = <&mpic>; | 76 | interrupt-parent = <&mpic>; |
77 | interrupts = <18 2>; | 77 | interrupts = <18 2>; |
78 | }; | 78 | }; |
79 | 79 | ||
80 | L2: l2-cache-controller@20000 { | 80 | L2: l2-cache-controller@20000 { |
81 | compatible = "fsl,8540-l2-cache-controller"; | 81 | compatible = "fsl,mpc8540-l2-cache-controller"; |
82 | reg = <0x20000 0x1000>; | 82 | reg = <0x20000 0x1000>; |
83 | cache-line-size = <32>; // 32 bytes | 83 | cache-line-size = <32>; // 32 bytes |
84 | cache-size = <0x40000>; // L2, 256K | 84 | cache-size = <0x40000>; // L2, 256K |
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts index 9a3ad311aed..87ff96549fa 100644 --- a/arch/powerpc/boot/dts/mpc8541cds.dts +++ b/arch/powerpc/boot/dts/mpc8541cds.dts | |||
@@ -71,14 +71,14 @@ | |||
71 | }; | 71 | }; |
72 | 72 | ||
73 | memory-controller@2000 { | 73 | memory-controller@2000 { |
74 | compatible = "fsl,8541-memory-controller"; | 74 | compatible = "fsl,mpc8541-memory-controller"; |
75 | reg = <0x2000 0x1000>; | 75 | reg = <0x2000 0x1000>; |
76 | interrupt-parent = <&mpic>; | 76 | interrupt-parent = <&mpic>; |
77 | interrupts = <18 2>; | 77 | interrupts = <18 2>; |
78 | }; | 78 | }; |
79 | 79 | ||
80 | L2: l2-cache-controller@20000 { | 80 | L2: l2-cache-controller@20000 { |
81 | compatible = "fsl,8541-l2-cache-controller"; | 81 | compatible = "fsl,mpc8541-l2-cache-controller"; |
82 | reg = <0x20000 0x1000>; | 82 | reg = <0x20000 0x1000>; |
83 | cache-line-size = <32>; // 32 bytes | 83 | cache-line-size = <32>; // 32 bytes |
84 | cache-size = <0x40000>; // L2, 256K | 84 | cache-size = <0x40000>; // L2, 256K |
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts index 98e94b46566..d793968743c 100644 --- a/arch/powerpc/boot/dts/mpc8544ds.dts +++ b/arch/powerpc/boot/dts/mpc8544ds.dts | |||
@@ -73,14 +73,14 @@ | |||
73 | }; | 73 | }; |
74 | 74 | ||
75 | memory-controller@2000 { | 75 | memory-controller@2000 { |
76 | compatible = "fsl,8544-memory-controller"; | 76 | compatible = "fsl,mpc8544-memory-controller"; |
77 | reg = <0x2000 0x1000>; | 77 | reg = <0x2000 0x1000>; |
78 | interrupt-parent = <&mpic>; | 78 | interrupt-parent = <&mpic>; |
79 | interrupts = <18 2>; | 79 | interrupts = <18 2>; |
80 | }; | 80 | }; |
81 | 81 | ||
82 | L2: l2-cache-controller@20000 { | 82 | L2: l2-cache-controller@20000 { |
83 | compatible = "fsl,8544-l2-cache-controller"; | 83 | compatible = "fsl,mpc8544-l2-cache-controller"; |
84 | reg = <0x20000 0x1000>; | 84 | reg = <0x20000 0x1000>; |
85 | cache-line-size = <32>; // 32 bytes | 85 | cache-line-size = <32>; // 32 bytes |
86 | cache-size = <0x40000>; // L2, 256K | 86 | cache-size = <0x40000>; // L2, 256K |
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts index 0f526245268..a17a5572fb7 100644 --- a/arch/powerpc/boot/dts/mpc8548cds.dts +++ b/arch/powerpc/boot/dts/mpc8548cds.dts | |||
@@ -74,14 +74,14 @@ | |||
74 | }; | 74 | }; |
75 | 75 | ||
76 | memory-controller@2000 { | 76 | memory-controller@2000 { |
77 | compatible = "fsl,8548-memory-controller"; | 77 | compatible = "fsl,mpc8548-memory-controller"; |
78 | reg = <0x2000 0x1000>; | 78 | reg = <0x2000 0x1000>; |
79 | interrupt-parent = <&mpic>; | 79 | interrupt-parent = <&mpic>; |
80 | interrupts = <18 2>; | 80 | interrupts = <18 2>; |
81 | }; | 81 | }; |
82 | 82 | ||
83 | L2: l2-cache-controller@20000 { | 83 | L2: l2-cache-controller@20000 { |
84 | compatible = "fsl,8548-l2-cache-controller"; | 84 | compatible = "fsl,mpc8548-l2-cache-controller"; |
85 | reg = <0x20000 0x1000>; | 85 | reg = <0x20000 0x1000>; |
86 | cache-line-size = <32>; // 32 bytes | 86 | cache-line-size = <32>; // 32 bytes |
87 | cache-size = <0x80000>; // L2, 512K | 87 | cache-size = <0x80000>; // L2, 512K |
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts index 065b2f093de..5c5614f9eb1 100644 --- a/arch/powerpc/boot/dts/mpc8555cds.dts +++ b/arch/powerpc/boot/dts/mpc8555cds.dts | |||
@@ -71,14 +71,14 @@ | |||
71 | }; | 71 | }; |
72 | 72 | ||
73 | memory-controller@2000 { | 73 | memory-controller@2000 { |
74 | compatible = "fsl,8555-memory-controller"; | 74 | compatible = "fsl,mpc8555-memory-controller"; |
75 | reg = <0x2000 0x1000>; | 75 | reg = <0x2000 0x1000>; |
76 | interrupt-parent = <&mpic>; | 76 | interrupt-parent = <&mpic>; |
77 | interrupts = <18 2>; | 77 | interrupts = <18 2>; |
78 | }; | 78 | }; |
79 | 79 | ||
80 | L2: l2-cache-controller@20000 { | 80 | L2: l2-cache-controller@20000 { |
81 | compatible = "fsl,8555-l2-cache-controller"; | 81 | compatible = "fsl,mpc8555-l2-cache-controller"; |
82 | reg = <0x20000 0x1000>; | 82 | reg = <0x20000 0x1000>; |
83 | cache-line-size = <32>; // 32 bytes | 83 | cache-line-size = <32>; // 32 bytes |
84 | cache-size = <0x40000>; // L2, 256K | 84 | cache-size = <0x40000>; // L2, 256K |
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts index a5bb1ec70a5..6e85e1ba085 100644 --- a/arch/powerpc/boot/dts/mpc8560ads.dts +++ b/arch/powerpc/boot/dts/mpc8560ads.dts | |||
@@ -71,14 +71,14 @@ | |||
71 | }; | 71 | }; |
72 | 72 | ||
73 | memory-controller@2000 { | 73 | memory-controller@2000 { |
74 | compatible = "fsl,8540-memory-controller"; | 74 | compatible = "fsl,mpc8540-memory-controller"; |
75 | reg = <0x2000 0x1000>; | 75 | reg = <0x2000 0x1000>; |
76 | interrupt-parent = <&mpic>; | 76 | interrupt-parent = <&mpic>; |
77 | interrupts = <18 2>; | 77 | interrupts = <18 2>; |
78 | }; | 78 | }; |
79 | 79 | ||
80 | L2: l2-cache-controller@20000 { | 80 | L2: l2-cache-controller@20000 { |
81 | compatible = "fsl,8540-l2-cache-controller"; | 81 | compatible = "fsl,mpc8540-l2-cache-controller"; |
82 | reg = <0x20000 0x1000>; | 82 | reg = <0x20000 0x1000>; |
83 | cache-line-size = <32>; // 32 bytes | 83 | cache-line-size = <32>; // 32 bytes |
84 | cache-size = <0x40000>; // L2, 256K | 84 | cache-size = <0x40000>; // L2, 256K |
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts index 92fb17876e7..30cf0e098bb 100644 --- a/arch/powerpc/boot/dts/mpc8568mds.dts +++ b/arch/powerpc/boot/dts/mpc8568mds.dts | |||
@@ -124,14 +124,14 @@ | |||
124 | }; | 124 | }; |
125 | 125 | ||
126 | memory-controller@2000 { | 126 | memory-controller@2000 { |
127 | compatible = "fsl,8568-memory-controller"; | 127 | compatible = "fsl,mpc8568-memory-controller"; |
128 | reg = <0x2000 0x1000>; | 128 | reg = <0x2000 0x1000>; |
129 | interrupt-parent = <&mpic>; | 129 | interrupt-parent = <&mpic>; |
130 | interrupts = <18 2>; | 130 | interrupts = <18 2>; |
131 | }; | 131 | }; |
132 | 132 | ||
133 | L2: l2-cache-controller@20000 { | 133 | L2: l2-cache-controller@20000 { |
134 | compatible = "fsl,8568-l2-cache-controller"; | 134 | compatible = "fsl,mpc8568-l2-cache-controller"; |
135 | reg = <0x20000 0x1000>; | 135 | reg = <0x20000 0x1000>; |
136 | cache-line-size = <32>; // 32 bytes | 136 | cache-line-size = <32>; // 32 bytes |
137 | cache-size = <0x80000>; // L2, 512K | 137 | cache-size = <0x80000>; // L2, 512K |
diff --git a/arch/powerpc/boot/dts/p1021mds.dts b/arch/powerpc/boot/dts/p1021mds.dts index 7fad2df2598..ad5b8526900 100644 --- a/arch/powerpc/boot/dts/p1021mds.dts +++ b/arch/powerpc/boot/dts/p1021mds.dts | |||
@@ -617,6 +617,7 @@ | |||
617 | bus-frequency = <0>; | 617 | bus-frequency = <0>; |
618 | fsl,qe-num-riscs = <1>; | 618 | fsl,qe-num-riscs = <1>; |
619 | fsl,qe-num-snums = <28>; | 619 | fsl,qe-num-snums = <28>; |
620 | status = "disabled"; /* no firmware loaded */ | ||
620 | 621 | ||
621 | qeic: interrupt-controller@80 { | 622 | qeic: interrupt-controller@80 { |
622 | interrupt-controller; | 623 | interrupt-controller; |
diff --git a/arch/powerpc/boot/dts/p1022ds.dts b/arch/powerpc/boot/dts/p1022ds.dts new file mode 100644 index 00000000000..8bcb10b9267 --- /dev/null +++ b/arch/powerpc/boot/dts/p1022ds.dts | |||
@@ -0,0 +1,633 @@ | |||
1 | /* | ||
2 | * P1022 DS 36Bit Physical Address Map Device Tree Source | ||
3 | * | ||
4 | * Copyright 2010 Freescale Semiconductor, Inc. | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public License | ||
7 | * version 2. This program is licensed "as is" without any warranty of any | ||
8 | * kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | /dts-v1/; | ||
12 | / { | ||
13 | model = "fsl,P1022"; | ||
14 | compatible = "fsl,P1022DS"; | ||
15 | #address-cells = <2>; | ||
16 | #size-cells = <2>; | ||
17 | interrupt-parent = <&mpic>; | ||
18 | |||
19 | aliases { | ||
20 | ethernet0 = &enet0; | ||
21 | ethernet1 = &enet1; | ||
22 | serial0 = &serial0; | ||
23 | serial1 = &serial1; | ||
24 | pci0 = &pci0; | ||
25 | pci1 = &pci1; | ||
26 | pci2 = &pci2; | ||
27 | }; | ||
28 | |||
29 | cpus { | ||
30 | #address-cells = <1>; | ||
31 | #size-cells = <0>; | ||
32 | |||
33 | PowerPC,P1022@0 { | ||
34 | device_type = "cpu"; | ||
35 | reg = <0x0>; | ||
36 | next-level-cache = <&L2>; | ||
37 | }; | ||
38 | |||
39 | PowerPC,P1022@1 { | ||
40 | device_type = "cpu"; | ||
41 | reg = <0x1>; | ||
42 | next-level-cache = <&L2>; | ||
43 | }; | ||
44 | }; | ||
45 | |||
46 | memory { | ||
47 | device_type = "memory"; | ||
48 | }; | ||
49 | |||
50 | localbus@fffe05000 { | ||
51 | #address-cells = <2>; | ||
52 | #size-cells = <1>; | ||
53 | compatible = "fsl,p1022-elbc", "fsl,elbc", "simple-bus"; | ||
54 | reg = <0 0xffe05000 0 0x1000>; | ||
55 | interrupts = <19 2>; | ||
56 | |||
57 | ranges = <0x0 0x0 0xf 0xe8000000 0x08000000 | ||
58 | 0x1 0x0 0xf 0xe0000000 0x08000000 | ||
59 | 0x2 0x0 0x0 0xffa00000 0x00040000 | ||
60 | 0x3 0x0 0xf 0xffdf0000 0x00008000>; | ||
61 | |||
62 | nor@0,0 { | ||
63 | #address-cells = <1>; | ||
64 | #size-cells = <1>; | ||
65 | compatible = "cfi-flash"; | ||
66 | reg = <0x0 0x0 0x8000000>; | ||
67 | bank-width = <2>; | ||
68 | device-width = <1>; | ||
69 | |||
70 | partition@0 { | ||
71 | reg = <0x0 0x03000000>; | ||
72 | label = "ramdisk-nor"; | ||
73 | read-only; | ||
74 | }; | ||
75 | |||
76 | partition@3000000 { | ||
77 | reg = <0x03000000 0x00e00000>; | ||
78 | label = "diagnostic-nor"; | ||
79 | read-only; | ||
80 | }; | ||
81 | |||
82 | partition@3e00000 { | ||
83 | reg = <0x03e00000 0x00200000>; | ||
84 | label = "dink-nor"; | ||
85 | read-only; | ||
86 | }; | ||
87 | |||
88 | partition@4000000 { | ||
89 | reg = <0x04000000 0x00400000>; | ||
90 | label = "kernel-nor"; | ||
91 | read-only; | ||
92 | }; | ||
93 | |||
94 | partition@4400000 { | ||
95 | reg = <0x04400000 0x03b00000>; | ||
96 | label = "jffs2-nor"; | ||
97 | }; | ||
98 | |||
99 | partition@7f00000 { | ||
100 | reg = <0x07f00000 0x00080000>; | ||
101 | label = "dtb-nor"; | ||
102 | read-only; | ||
103 | }; | ||
104 | |||
105 | partition@7f80000 { | ||
106 | reg = <0x07f80000 0x00080000>; | ||
107 | label = "u-boot-nor"; | ||
108 | read-only; | ||
109 | }; | ||
110 | }; | ||
111 | |||
112 | nand@2,0 { | ||
113 | #address-cells = <1>; | ||
114 | #size-cells = <1>; | ||
115 | compatible = "fsl,elbc-fcm-nand"; | ||
116 | reg = <0x2 0x0 0x40000>; | ||
117 | |||
118 | partition@0 { | ||
119 | reg = <0x0 0x02000000>; | ||
120 | label = "u-boot-nand"; | ||
121 | read-only; | ||
122 | }; | ||
123 | |||
124 | partition@2000000 { | ||
125 | reg = <0x02000000 0x10000000>; | ||
126 | label = "jffs2-nand"; | ||
127 | }; | ||
128 | |||
129 | partition@12000000 { | ||
130 | reg = <0x12000000 0x10000000>; | ||
131 | label = "ramdisk-nand"; | ||
132 | read-only; | ||
133 | }; | ||
134 | |||
135 | partition@22000000 { | ||
136 | reg = <0x22000000 0x04000000>; | ||
137 | label = "kernel-nand"; | ||
138 | }; | ||
139 | |||
140 | partition@26000000 { | ||
141 | reg = <0x26000000 0x01000000>; | ||
142 | label = "dtb-nand"; | ||
143 | read-only; | ||
144 | }; | ||
145 | |||
146 | partition@27000000 { | ||
147 | reg = <0x27000000 0x19000000>; | ||
148 | label = "reserved-nand"; | ||
149 | }; | ||
150 | }; | ||
151 | }; | ||
152 | |||
153 | soc@fffe00000 { | ||
154 | #address-cells = <1>; | ||
155 | #size-cells = <1>; | ||
156 | device_type = "soc"; | ||
157 | compatible = "fsl,p1022-immr", "simple-bus"; | ||
158 | ranges = <0x0 0xf 0xffe00000 0x100000>; | ||
159 | bus-frequency = <0>; // Filled out by uboot. | ||
160 | |||
161 | ecm-law@0 { | ||
162 | compatible = "fsl,ecm-law"; | ||
163 | reg = <0x0 0x1000>; | ||
164 | fsl,num-laws = <12>; | ||
165 | }; | ||
166 | |||
167 | ecm@1000 { | ||
168 | compatible = "fsl,p1022-ecm", "fsl,ecm"; | ||
169 | reg = <0x1000 0x1000>; | ||
170 | interrupts = <16 2>; | ||
171 | }; | ||
172 | |||
173 | memory-controller@2000 { | ||
174 | compatible = "fsl,p1022-memory-controller"; | ||
175 | reg = <0x2000 0x1000>; | ||
176 | interrupts = <16 2>; | ||
177 | }; | ||
178 | |||
179 | i2c@3000 { | ||
180 | #address-cells = <1>; | ||
181 | #size-cells = <0>; | ||
182 | cell-index = <0>; | ||
183 | compatible = "fsl-i2c"; | ||
184 | reg = <0x3000 0x100>; | ||
185 | interrupts = <43 2>; | ||
186 | dfsrr; | ||
187 | }; | ||
188 | |||
189 | i2c@3100 { | ||
190 | #address-cells = <1>; | ||
191 | #size-cells = <0>; | ||
192 | cell-index = <1>; | ||
193 | compatible = "fsl-i2c"; | ||
194 | reg = <0x3100 0x100>; | ||
195 | interrupts = <43 2>; | ||
196 | dfsrr; | ||
197 | |||
198 | wm8776:codec@1a { | ||
199 | compatible = "wlf,wm8776"; | ||
200 | reg = <0x1a>; | ||
201 | /* MCLK source is a stand-alone oscillator */ | ||
202 | clock-frequency = <12288000>; | ||
203 | }; | ||
204 | }; | ||
205 | |||
206 | serial0: serial@4500 { | ||
207 | cell-index = <0>; | ||
208 | device_type = "serial"; | ||
209 | compatible = "ns16550"; | ||
210 | reg = <0x4500 0x100>; | ||
211 | clock-frequency = <0>; | ||
212 | interrupts = <42 2>; | ||
213 | }; | ||
214 | |||
215 | serial1: serial@4600 { | ||
216 | cell-index = <1>; | ||
217 | device_type = "serial"; | ||
218 | compatible = "ns16550"; | ||
219 | reg = <0x4600 0x100>; | ||
220 | clock-frequency = <0>; | ||
221 | interrupts = <42 2>; | ||
222 | }; | ||
223 | |||
224 | spi@7000 { | ||
225 | cell-index = <0>; | ||
226 | #address-cells = <1>; | ||
227 | #size-cells = <0>; | ||
228 | compatible = "fsl,espi"; | ||
229 | reg = <0x7000 0x1000>; | ||
230 | interrupts = <59 0x2>; | ||
231 | espi,num-ss-bits = <4>; | ||
232 | mode = "cpu"; | ||
233 | |||
234 | fsl_m25p80@0 { | ||
235 | #address-cells = <1>; | ||
236 | #size-cells = <1>; | ||
237 | compatible = "fsl,espi-flash"; | ||
238 | reg = <0>; | ||
239 | linux,modalias = "fsl_m25p80"; | ||
240 | spi-max-frequency = <40000000>; /* input clock */ | ||
241 | partition@0 { | ||
242 | label = "u-boot-spi"; | ||
243 | reg = <0x00000000 0x00100000>; | ||
244 | read-only; | ||
245 | }; | ||
246 | partition@100000 { | ||
247 | label = "kernel-spi"; | ||
248 | reg = <0x00100000 0x00500000>; | ||
249 | read-only; | ||
250 | }; | ||
251 | partition@600000 { | ||
252 | label = "dtb-spi"; | ||
253 | reg = <0x00600000 0x00100000>; | ||
254 | read-only; | ||
255 | }; | ||
256 | partition@700000 { | ||
257 | label = "file system-spi"; | ||
258 | reg = <0x00700000 0x00900000>; | ||
259 | }; | ||
260 | }; | ||
261 | }; | ||
262 | |||
263 | ssi@15000 { | ||
264 | compatible = "fsl,mpc8610-ssi"; | ||
265 | cell-index = <0>; | ||
266 | reg = <0x15000 0x100>; | ||
267 | interrupts = <75 2>; | ||
268 | fsl,mode = "i2s-slave"; | ||
269 | codec-handle = <&wm8776>; | ||
270 | fsl,playback-dma = <&dma00>; | ||
271 | fsl,capture-dma = <&dma01>; | ||
272 | fsl,fifo-depth = <16>; | ||
273 | }; | ||
274 | |||
275 | dma@c300 { | ||
276 | #address-cells = <1>; | ||
277 | #size-cells = <1>; | ||
278 | compatible = "fsl,eloplus-dma"; | ||
279 | reg = <0xc300 0x4>; | ||
280 | ranges = <0x0 0xc100 0x200>; | ||
281 | cell-index = <1>; | ||
282 | dma00: dma-channel@0 { | ||
283 | compatible = "fsl,eloplus-dma-channel"; | ||
284 | reg = <0x0 0x80>; | ||
285 | cell-index = <0>; | ||
286 | interrupts = <76 2>; | ||
287 | }; | ||
288 | dma01: dma-channel@80 { | ||
289 | compatible = "fsl,eloplus-dma-channel"; | ||
290 | reg = <0x80 0x80>; | ||
291 | cell-index = <1>; | ||
292 | interrupts = <77 2>; | ||
293 | }; | ||
294 | dma-channel@100 { | ||
295 | compatible = "fsl,eloplus-dma-channel"; | ||
296 | reg = <0x100 0x80>; | ||
297 | cell-index = <2>; | ||
298 | interrupts = <78 2>; | ||
299 | }; | ||
300 | dma-channel@180 { | ||
301 | compatible = "fsl,eloplus-dma-channel"; | ||
302 | reg = <0x180 0x80>; | ||
303 | cell-index = <3>; | ||
304 | interrupts = <79 2>; | ||
305 | }; | ||
306 | }; | ||
307 | |||
308 | gpio: gpio-controller@f000 { | ||
309 | #gpio-cells = <2>; | ||
310 | compatible = "fsl,mpc8572-gpio"; | ||
311 | reg = <0xf000 0x100>; | ||
312 | interrupts = <47 0x2>; | ||
313 | gpio-controller; | ||
314 | }; | ||
315 | |||
316 | L2: l2-cache-controller@20000 { | ||
317 | compatible = "fsl,p1022-l2-cache-controller"; | ||
318 | reg = <0x20000 0x1000>; | ||
319 | cache-line-size = <32>; // 32 bytes | ||
320 | cache-size = <0x40000>; // L2, 256K | ||
321 | interrupts = <16 2>; | ||
322 | }; | ||
323 | |||
324 | dma@21300 { | ||
325 | #address-cells = <1>; | ||
326 | #size-cells = <1>; | ||
327 | compatible = "fsl,eloplus-dma"; | ||
328 | reg = <0x21300 0x4>; | ||
329 | ranges = <0x0 0x21100 0x200>; | ||
330 | cell-index = <0>; | ||
331 | dma-channel@0 { | ||
332 | compatible = "fsl,eloplus-dma-channel"; | ||
333 | reg = <0x0 0x80>; | ||
334 | cell-index = <0>; | ||
335 | interrupts = <20 2>; | ||
336 | }; | ||
337 | dma-channel@80 { | ||
338 | compatible = "fsl,eloplus-dma-channel"; | ||
339 | reg = <0x80 0x80>; | ||
340 | cell-index = <1>; | ||
341 | interrupts = <21 2>; | ||
342 | }; | ||
343 | dma-channel@100 { | ||
344 | compatible = "fsl,eloplus-dma-channel"; | ||
345 | reg = <0x100 0x80>; | ||
346 | cell-index = <2>; | ||
347 | interrupts = <22 2>; | ||
348 | }; | ||
349 | dma-channel@180 { | ||
350 | compatible = "fsl,eloplus-dma-channel"; | ||
351 | reg = <0x180 0x80>; | ||
352 | cell-index = <3>; | ||
353 | interrupts = <23 2>; | ||
354 | }; | ||
355 | }; | ||
356 | |||
357 | usb@22000 { | ||
358 | #address-cells = <1>; | ||
359 | #size-cells = <0>; | ||
360 | compatible = "fsl-usb2-dr"; | ||
361 | reg = <0x22000 0x1000>; | ||
362 | interrupts = <28 0x2>; | ||
363 | phy_type = "ulpi"; | ||
364 | }; | ||
365 | |||
366 | mdio@24000 { | ||
367 | #address-cells = <1>; | ||
368 | #size-cells = <0>; | ||
369 | compatible = "fsl,etsec2-mdio"; | ||
370 | reg = <0x24000 0x1000 0xb0030 0x4>; | ||
371 | |||
372 | phy0: ethernet-phy@0 { | ||
373 | interrupts = <3 1>; | ||
374 | reg = <0x1>; | ||
375 | }; | ||
376 | phy1: ethernet-phy@1 { | ||
377 | interrupts = <9 1>; | ||
378 | reg = <0x2>; | ||
379 | }; | ||
380 | }; | ||
381 | |||
382 | mdio@25000 { | ||
383 | #address-cells = <1>; | ||
384 | #size-cells = <0>; | ||
385 | compatible = "fsl,etsec2-mdio"; | ||
386 | reg = <0x25000 0x1000 0xb1030 0x4>; | ||
387 | }; | ||
388 | |||
389 | enet0: ethernet@B0000 { | ||
390 | #address-cells = <1>; | ||
391 | #size-cells = <1>; | ||
392 | cell-index = <0>; | ||
393 | device_type = "network"; | ||
394 | model = "eTSEC"; | ||
395 | compatible = "fsl,etsec2"; | ||
396 | fsl,num_rx_queues = <0x8>; | ||
397 | fsl,num_tx_queues = <0x8>; | ||
398 | fsl,magic-packet; | ||
399 | fsl,wake-on-filer; | ||
400 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
401 | fixed-link = <1 1 1000 0 0>; | ||
402 | phy-handle = <&phy0>; | ||
403 | phy-connection-type = "rgmii-id"; | ||
404 | queue-group@0{ | ||
405 | #address-cells = <1>; | ||
406 | #size-cells = <1>; | ||
407 | reg = <0xB0000 0x1000>; | ||
408 | interrupts = <29 2 30 2 34 2>; | ||
409 | }; | ||
410 | queue-group@1{ | ||
411 | #address-cells = <1>; | ||
412 | #size-cells = <1>; | ||
413 | reg = <0xB4000 0x1000>; | ||
414 | interrupts = <17 2 18 2 24 2>; | ||
415 | }; | ||
416 | }; | ||
417 | |||
418 | enet1: ethernet@B1000 { | ||
419 | #address-cells = <1>; | ||
420 | #size-cells = <1>; | ||
421 | cell-index = <0>; | ||
422 | device_type = "network"; | ||
423 | model = "eTSEC"; | ||
424 | compatible = "fsl,etsec2"; | ||
425 | fsl,num_rx_queues = <0x8>; | ||
426 | fsl,num_tx_queues = <0x8>; | ||
427 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
428 | fixed-link = <1 1 1000 0 0>; | ||
429 | phy-handle = <&phy1>; | ||
430 | phy-connection-type = "rgmii-id"; | ||
431 | queue-group@0{ | ||
432 | #address-cells = <1>; | ||
433 | #size-cells = <1>; | ||
434 | reg = <0xB1000 0x1000>; | ||
435 | interrupts = <35 2 36 2 40 2>; | ||
436 | }; | ||
437 | queue-group@1{ | ||
438 | #address-cells = <1>; | ||
439 | #size-cells = <1>; | ||
440 | reg = <0xB5000 0x1000>; | ||
441 | interrupts = <51 2 52 2 67 2>; | ||
442 | }; | ||
443 | }; | ||
444 | |||
445 | sdhci@2e000 { | ||
446 | compatible = "fsl,p1022-esdhc", "fsl,esdhc"; | ||
447 | reg = <0x2e000 0x1000>; | ||
448 | interrupts = <72 0x2>; | ||
449 | fsl,sdhci-auto-cmd12; | ||
450 | /* Filled in by U-Boot */ | ||
451 | clock-frequency = <0>; | ||
452 | }; | ||
453 | |||
454 | crypto@30000 { | ||
455 | compatible = "fsl,sec3.3", "fsl,sec3.1", "fsl,sec3.0", | ||
456 | "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1", | ||
457 | "fsl,sec2.0"; | ||
458 | reg = <0x30000 0x10000>; | ||
459 | interrupts = <45 2 58 2>; | ||
460 | fsl,num-channels = <4>; | ||
461 | fsl,channel-fifo-len = <24>; | ||
462 | fsl,exec-units-mask = <0x97c>; | ||
463 | fsl,descriptor-types-mask = <0x3a30abf>; | ||
464 | }; | ||
465 | |||
466 | sata@18000 { | ||
467 | compatible = "fsl,mpc8536-sata", "fsl,pq-sata"; | ||
468 | reg = <0x18000 0x1000>; | ||
469 | cell-index = <1>; | ||
470 | interrupts = <74 0x2>; | ||
471 | }; | ||
472 | |||
473 | sata@19000 { | ||
474 | compatible = "fsl,mpc8536-sata", "fsl,pq-sata"; | ||
475 | reg = <0x19000 0x1000>; | ||
476 | cell-index = <2>; | ||
477 | interrupts = <41 0x2>; | ||
478 | }; | ||
479 | |||
480 | power@e0070{ | ||
481 | compatible = "fsl,mpc8536-pmc", "fsl,mpc8548-pmc"; | ||
482 | reg = <0xe0070 0x20>; | ||
483 | }; | ||
484 | |||
485 | display@10000 { | ||
486 | compatible = "fsl,diu", "fsl,p1022-diu"; | ||
487 | reg = <0x10000 1000>; | ||
488 | interrupts = <64 2>; | ||
489 | }; | ||
490 | |||
491 | timer@41100 { | ||
492 | compatible = "fsl,mpic-global-timer"; | ||
493 | reg = <0x41100 0x204>; | ||
494 | interrupts = <0xf7 0x2>; | ||
495 | }; | ||
496 | |||
497 | mpic: pic@40000 { | ||
498 | interrupt-controller; | ||
499 | #address-cells = <0>; | ||
500 | #interrupt-cells = <2>; | ||
501 | reg = <0x40000 0x40000>; | ||
502 | compatible = "chrp,open-pic"; | ||
503 | device_type = "open-pic"; | ||
504 | }; | ||
505 | |||
506 | msi@41600 { | ||
507 | compatible = "fsl,p1022-msi", "fsl,mpic-msi"; | ||
508 | reg = <0x41600 0x80>; | ||
509 | msi-available-ranges = <0 0x100>; | ||
510 | interrupts = < | ||
511 | 0xe0 0 | ||
512 | 0xe1 0 | ||
513 | 0xe2 0 | ||
514 | 0xe3 0 | ||
515 | 0xe4 0 | ||
516 | 0xe5 0 | ||
517 | 0xe6 0 | ||
518 | 0xe7 0>; | ||
519 | }; | ||
520 | |||
521 | global-utilities@e0000 { //global utilities block | ||
522 | compatible = "fsl,p1022-guts"; | ||
523 | reg = <0xe0000 0x1000>; | ||
524 | fsl,has-rstcr; | ||
525 | }; | ||
526 | }; | ||
527 | |||
528 | pci0: pcie@fffe09000 { | ||
529 | compatible = "fsl,p1022-pcie"; | ||
530 | device_type = "pci"; | ||
531 | #interrupt-cells = <1>; | ||
532 | #size-cells = <2>; | ||
533 | #address-cells = <3>; | ||
534 | reg = <0xf 0xffe09000 0 0x1000>; | ||
535 | bus-range = <0 255>; | ||
536 | ranges = <0x2000000 0x0 0xa0000000 0xc 0x20000000 0x0 0x20000000 | ||
537 | 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>; | ||
538 | clock-frequency = <33333333>; | ||
539 | interrupts = <16 2>; | ||
540 | interrupt-map-mask = <0xf800 0 0 7>; | ||
541 | interrupt-map = < | ||
542 | /* IDSEL 0x0 */ | ||
543 | 0000 0 0 1 &mpic 4 1 | ||
544 | 0000 0 0 2 &mpic 5 1 | ||
545 | 0000 0 0 3 &mpic 6 1 | ||
546 | 0000 0 0 4 &mpic 7 1 | ||
547 | >; | ||
548 | pcie@0 { | ||
549 | reg = <0x0 0x0 0x0 0x0 0x0>; | ||
550 | #size-cells = <2>; | ||
551 | #address-cells = <3>; | ||
552 | device_type = "pci"; | ||
553 | ranges = <0x2000000 0x0 0xe0000000 | ||
554 | 0x2000000 0x0 0xe0000000 | ||
555 | 0x0 0x20000000 | ||
556 | |||
557 | 0x1000000 0x0 0x0 | ||
558 | 0x1000000 0x0 0x0 | ||
559 | 0x0 0x100000>; | ||
560 | }; | ||
561 | }; | ||
562 | |||
563 | pci1: pcie@fffe0a000 { | ||
564 | compatible = "fsl,p1022-pcie"; | ||
565 | device_type = "pci"; | ||
566 | #interrupt-cells = <1>; | ||
567 | #size-cells = <2>; | ||
568 | #address-cells = <3>; | ||
569 | reg = <0xf 0xffe0a000 0 0x1000>; | ||
570 | bus-range = <0 255>; | ||
571 | ranges = <0x2000000 0x0 0xc0000000 0xc 0x40000000 0x0 0x20000000 | ||
572 | 0x1000000 0x0 0x00000000 0xf 0xffc20000 0x0 0x10000>; | ||
573 | clock-frequency = <33333333>; | ||
574 | interrupts = <16 2>; | ||
575 | interrupt-map-mask = <0xf800 0 0 7>; | ||
576 | interrupt-map = < | ||
577 | /* IDSEL 0x0 */ | ||
578 | 0000 0 0 1 &mpic 0 1 | ||
579 | 0000 0 0 2 &mpic 1 1 | ||
580 | 0000 0 0 3 &mpic 2 1 | ||
581 | 0000 0 0 4 &mpic 3 1 | ||
582 | >; | ||
583 | pcie@0 { | ||
584 | reg = <0x0 0x0 0x0 0x0 0x0>; | ||
585 | #size-cells = <2>; | ||
586 | #address-cells = <3>; | ||
587 | device_type = "pci"; | ||
588 | ranges = <0x2000000 0x0 0xe0000000 | ||
589 | 0x2000000 0x0 0xe0000000 | ||
590 | 0x0 0x20000000 | ||
591 | |||
592 | 0x1000000 0x0 0x0 | ||
593 | 0x1000000 0x0 0x0 | ||
594 | 0x0 0x100000>; | ||
595 | }; | ||
596 | }; | ||
597 | |||
598 | |||
599 | pci2: pcie@fffe0b000 { | ||
600 | compatible = "fsl,p1022-pcie"; | ||
601 | device_type = "pci"; | ||
602 | #interrupt-cells = <1>; | ||
603 | #size-cells = <2>; | ||
604 | #address-cells = <3>; | ||
605 | reg = <0xf 0xffe0b000 0 0x1000>; | ||
606 | bus-range = <0 255>; | ||
607 | ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000 | ||
608 | 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>; | ||
609 | clock-frequency = <33333333>; | ||
610 | interrupts = <16 2>; | ||
611 | interrupt-map-mask = <0xf800 0 0 7>; | ||
612 | interrupt-map = < | ||
613 | /* IDSEL 0x0 */ | ||
614 | 0000 0 0 1 &mpic 8 1 | ||
615 | 0000 0 0 2 &mpic 9 1 | ||
616 | 0000 0 0 3 &mpic 10 1 | ||
617 | 0000 0 0 4 &mpic 11 1 | ||
618 | >; | ||
619 | pcie@0 { | ||
620 | reg = <0x0 0x0 0x0 0x0 0x0>; | ||
621 | #size-cells = <2>; | ||
622 | #address-cells = <3>; | ||
623 | device_type = "pci"; | ||
624 | ranges = <0x2000000 0x0 0xe0000000 | ||
625 | 0x2000000 0x0 0xe0000000 | ||
626 | 0x0 0x20000000 | ||
627 | |||
628 | 0x1000000 0x0 0x0 | ||
629 | 0x1000000 0x0 0x0 | ||
630 | 0x0 0x100000>; | ||
631 | }; | ||
632 | }; | ||
633 | }; | ||
diff --git a/arch/powerpc/boot/dts/stxssa8555.dts b/arch/powerpc/boot/dts/stxssa8555.dts new file mode 100644 index 00000000000..49efd44057d --- /dev/null +++ b/arch/powerpc/boot/dts/stxssa8555.dts | |||
@@ -0,0 +1,380 @@ | |||
1 | /* | ||
2 | * MPC8555-based STx GP3 Device Tree Source | ||
3 | * | ||
4 | * Copyright 2006, 2008 Freescale Semiconductor Inc. | ||
5 | * | ||
6 | * Copyright 2010 Silicon Turnkey Express LLC. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify it | ||
9 | * under the terms of the GNU General Public License as published by the | ||
10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
11 | * option) any later version. | ||
12 | */ | ||
13 | |||
14 | /dts-v1/; | ||
15 | |||
16 | / { | ||
17 | model = "stx,gp3"; | ||
18 | compatible = "stx,gp3-8560", "stx,gp3"; | ||
19 | #address-cells = <1>; | ||
20 | #size-cells = <1>; | ||
21 | |||
22 | aliases { | ||
23 | ethernet0 = &enet0; | ||
24 | ethernet1 = &enet1; | ||
25 | serial0 = &serial0; | ||
26 | serial1 = &serial1; | ||
27 | pci0 = &pci0; | ||
28 | }; | ||
29 | |||
30 | cpus { | ||
31 | #address-cells = <1>; | ||
32 | #size-cells = <0>; | ||
33 | |||
34 | PowerPC,8555@0 { | ||
35 | device_type = "cpu"; | ||
36 | reg = <0x0>; | ||
37 | d-cache-line-size = <32>; // 32 bytes | ||
38 | i-cache-line-size = <32>; // 32 bytes | ||
39 | d-cache-size = <0x8000>; // L1, 32K | ||
40 | i-cache-size = <0x8000>; // L1, 32K | ||
41 | timebase-frequency = <0>; // 33 MHz, from uboot | ||
42 | bus-frequency = <0>; // 166 MHz | ||
43 | clock-frequency = <0>; // 825 MHz, from uboot | ||
44 | next-level-cache = <&L2>; | ||
45 | }; | ||
46 | }; | ||
47 | |||
48 | memory { | ||
49 | device_type = "memory"; | ||
50 | reg = <0x00000000 0x10000000>; | ||
51 | }; | ||
52 | |||
53 | soc8555@e0000000 { | ||
54 | #address-cells = <1>; | ||
55 | #size-cells = <1>; | ||
56 | device_type = "soc"; | ||
57 | compatible = "simple-bus"; | ||
58 | ranges = <0x0 0xe0000000 0x100000>; | ||
59 | bus-frequency = <0>; | ||
60 | |||
61 | ecm-law@0 { | ||
62 | compatible = "fsl,ecm-law"; | ||
63 | reg = <0x0 0x1000>; | ||
64 | fsl,num-laws = <8>; | ||
65 | }; | ||
66 | |||
67 | ecm@1000 { | ||
68 | compatible = "fsl,mpc8555-ecm", "fsl,ecm"; | ||
69 | reg = <0x1000 0x1000>; | ||
70 | interrupts = <17 2>; | ||
71 | interrupt-parent = <&mpic>; | ||
72 | }; | ||
73 | |||
74 | memory-controller@2000 { | ||
75 | compatible = "fsl,mpc8555-memory-controller"; | ||
76 | reg = <0x2000 0x1000>; | ||
77 | interrupt-parent = <&mpic>; | ||
78 | interrupts = <18 2>; | ||
79 | }; | ||
80 | |||
81 | L2: l2-cache-controller@20000 { | ||
82 | compatible = "fsl,mpc8555-l2-cache-controller"; | ||
83 | reg = <0x20000 0x1000>; | ||
84 | cache-line-size = <32>; // 32 bytes | ||
85 | cache-size = <0x40000>; // L2, 256K | ||
86 | interrupt-parent = <&mpic>; | ||
87 | interrupts = <16 2>; | ||
88 | }; | ||
89 | |||
90 | i2c@3000 { | ||
91 | #address-cells = <1>; | ||
92 | #size-cells = <0>; | ||
93 | cell-index = <0>; | ||
94 | compatible = "fsl-i2c"; | ||
95 | reg = <0x3000 0x100>; | ||
96 | interrupts = <43 2>; | ||
97 | interrupt-parent = <&mpic>; | ||
98 | dfsrr; | ||
99 | }; | ||
100 | |||
101 | dma@21300 { | ||
102 | #address-cells = <1>; | ||
103 | #size-cells = <1>; | ||
104 | compatible = "fsl,mpc8555-dma", "fsl,eloplus-dma"; | ||
105 | reg = <0x21300 0x4>; | ||
106 | ranges = <0x0 0x21100 0x200>; | ||
107 | cell-index = <0>; | ||
108 | dma-channel@0 { | ||
109 | compatible = "fsl,mpc8555-dma-channel", | ||
110 | "fsl,eloplus-dma-channel"; | ||
111 | reg = <0x0 0x80>; | ||
112 | cell-index = <0>; | ||
113 | interrupt-parent = <&mpic>; | ||
114 | interrupts = <20 2>; | ||
115 | }; | ||
116 | dma-channel@80 { | ||
117 | compatible = "fsl,mpc8555-dma-channel", | ||
118 | "fsl,eloplus-dma-channel"; | ||
119 | reg = <0x80 0x80>; | ||
120 | cell-index = <1>; | ||
121 | interrupt-parent = <&mpic>; | ||
122 | interrupts = <21 2>; | ||
123 | }; | ||
124 | dma-channel@100 { | ||
125 | compatible = "fsl,mpc8555-dma-channel", | ||
126 | "fsl,eloplus-dma-channel"; | ||
127 | reg = <0x100 0x80>; | ||
128 | cell-index = <2>; | ||
129 | interrupt-parent = <&mpic>; | ||
130 | interrupts = <22 2>; | ||
131 | }; | ||
132 | dma-channel@180 { | ||
133 | compatible = "fsl,mpc8555-dma-channel", | ||
134 | "fsl,eloplus-dma-channel"; | ||
135 | reg = <0x180 0x80>; | ||
136 | cell-index = <3>; | ||
137 | interrupt-parent = <&mpic>; | ||
138 | interrupts = <23 2>; | ||
139 | }; | ||
140 | }; | ||
141 | |||
142 | enet0: ethernet@24000 { | ||
143 | #address-cells = <1>; | ||
144 | #size-cells = <1>; | ||
145 | cell-index = <0>; | ||
146 | device_type = "network"; | ||
147 | model = "TSEC"; | ||
148 | compatible = "gianfar"; | ||
149 | reg = <0x24000 0x1000>; | ||
150 | ranges = <0x0 0x24000 0x1000>; | ||
151 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
152 | interrupts = <29 2 30 2 34 2>; | ||
153 | interrupt-parent = <&mpic>; | ||
154 | tbi-handle = <&tbi0>; | ||
155 | phy-handle = <&phy0>; | ||
156 | |||
157 | mdio@520 { | ||
158 | #address-cells = <1>; | ||
159 | #size-cells = <0>; | ||
160 | compatible = "fsl,gianfar-mdio"; | ||
161 | reg = <0x520 0x20>; | ||
162 | |||
163 | phy0: ethernet-phy@2 { | ||
164 | interrupt-parent = <&mpic>; | ||
165 | interrupts = <5 1>; | ||
166 | reg = <0x2>; | ||
167 | device_type = "ethernet-phy"; | ||
168 | }; | ||
169 | phy1: ethernet-phy@4 { | ||
170 | interrupt-parent = <&mpic>; | ||
171 | interrupts = <5 1>; | ||
172 | reg = <0x4>; | ||
173 | device_type = "ethernet-phy"; | ||
174 | }; | ||
175 | tbi0: tbi-phy@11 { | ||
176 | reg = <0x11>; | ||
177 | device_type = "tbi-phy"; | ||
178 | }; | ||
179 | }; | ||
180 | }; | ||
181 | |||
182 | enet1: ethernet@25000 { | ||
183 | #address-cells = <1>; | ||
184 | #size-cells = <1>; | ||
185 | cell-index = <1>; | ||
186 | device_type = "network"; | ||
187 | model = "TSEC"; | ||
188 | compatible = "gianfar"; | ||
189 | reg = <0x25000 0x1000>; | ||
190 | ranges = <0x0 0x25000 0x1000>; | ||
191 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
192 | interrupts = <35 2 36 2 40 2>; | ||
193 | interrupt-parent = <&mpic>; | ||
194 | tbi-handle = <&tbi1>; | ||
195 | phy-handle = <&phy1>; | ||
196 | |||
197 | mdio@520 { | ||
198 | #address-cells = <1>; | ||
199 | #size-cells = <0>; | ||
200 | compatible = "fsl,gianfar-tbi"; | ||
201 | reg = <0x520 0x20>; | ||
202 | |||
203 | tbi1: tbi-phy@11 { | ||
204 | reg = <0x11>; | ||
205 | device_type = "tbi-phy"; | ||
206 | }; | ||
207 | }; | ||
208 | }; | ||
209 | |||
210 | serial0: serial@4500 { | ||
211 | cell-index = <0>; | ||
212 | device_type = "serial"; | ||
213 | compatible = "ns16550"; | ||
214 | reg = <0x4500 0x100>; // reg base, size | ||
215 | clock-frequency = <0>; // should we fill in in uboot? | ||
216 | interrupts = <42 2>; | ||
217 | interrupt-parent = <&mpic>; | ||
218 | }; | ||
219 | |||
220 | serial1: serial@4600 { | ||
221 | cell-index = <1>; | ||
222 | device_type = "serial"; | ||
223 | compatible = "ns16550"; | ||
224 | reg = <0x4600 0x100>; // reg base, size | ||
225 | clock-frequency = <0>; // should we fill in in uboot? | ||
226 | interrupts = <42 2>; | ||
227 | interrupt-parent = <&mpic>; | ||
228 | }; | ||
229 | |||
230 | crypto@30000 { | ||
231 | compatible = "fsl,sec2.0"; | ||
232 | reg = <0x30000 0x10000>; | ||
233 | interrupts = <45 2>; | ||
234 | interrupt-parent = <&mpic>; | ||
235 | fsl,num-channels = <4>; | ||
236 | fsl,channel-fifo-len = <24>; | ||
237 | fsl,exec-units-mask = <0x7e>; | ||
238 | fsl,descriptor-types-mask = <0x01010ebf>; | ||
239 | }; | ||
240 | |||
241 | mpic: pic@40000 { | ||
242 | interrupt-controller; | ||
243 | #address-cells = <0>; | ||
244 | #interrupt-cells = <2>; | ||
245 | reg = <0x40000 0x40000>; | ||
246 | compatible = "chrp,open-pic"; | ||
247 | device_type = "open-pic"; | ||
248 | }; | ||
249 | |||
250 | cpm@919c0 { | ||
251 | #address-cells = <1>; | ||
252 | #size-cells = <1>; | ||
253 | compatible = "fsl,mpc8555-cpm", "fsl,cpm2"; | ||
254 | reg = <0x919c0 0x30>; | ||
255 | ranges; | ||
256 | |||
257 | muram@80000 { | ||
258 | #address-cells = <1>; | ||
259 | #size-cells = <1>; | ||
260 | ranges = <0x0 0x80000 0x10000>; | ||
261 | |||
262 | data@0 { | ||
263 | compatible = "fsl,cpm-muram-data"; | ||
264 | reg = <0x0 0x2000 0x9000 0x1000>; | ||
265 | }; | ||
266 | }; | ||
267 | |||
268 | brg@919f0 { | ||
269 | compatible = "fsl,mpc8555-brg", | ||
270 | "fsl,cpm2-brg", | ||
271 | "fsl,cpm-brg"; | ||
272 | reg = <0x919f0 0x10 0x915f0 0x10>; | ||
273 | }; | ||
274 | |||
275 | cpmpic: pic@90c00 { | ||
276 | interrupt-controller; | ||
277 | #address-cells = <0>; | ||
278 | #interrupt-cells = <2>; | ||
279 | interrupts = <46 2>; | ||
280 | interrupt-parent = <&mpic>; | ||
281 | reg = <0x90c00 0x80>; | ||
282 | compatible = "fsl,mpc8555-cpm-pic", "fsl,cpm2-pic"; | ||
283 | }; | ||
284 | }; | ||
285 | }; | ||
286 | |||
287 | pci0: pci@e0008000 { | ||
288 | interrupt-map-mask = <0x1f800 0x0 0x0 0x7>; | ||
289 | interrupt-map = < | ||
290 | |||
291 | /* IDSEL 0x10 */ | ||
292 | 0x8000 0x0 0x0 0x1 &mpic 0x0 0x1 | ||
293 | 0x8000 0x0 0x0 0x2 &mpic 0x1 0x1 | ||
294 | 0x8000 0x0 0x0 0x3 &mpic 0x2 0x1 | ||
295 | 0x8000 0x0 0x0 0x4 &mpic 0x3 0x1 | ||
296 | |||
297 | /* IDSEL 0x11 */ | ||
298 | 0x8800 0x0 0x0 0x1 &mpic 0x0 0x1 | ||
299 | 0x8800 0x0 0x0 0x2 &mpic 0x1 0x1 | ||
300 | 0x8800 0x0 0x0 0x3 &mpic 0x2 0x1 | ||
301 | 0x8800 0x0 0x0 0x4 &mpic 0x3 0x1 | ||
302 | |||
303 | /* IDSEL 0x12 (Slot 1) */ | ||
304 | 0x9000 0x0 0x0 0x1 &mpic 0x0 0x1 | ||
305 | 0x9000 0x0 0x0 0x2 &mpic 0x1 0x1 | ||
306 | 0x9000 0x0 0x0 0x3 &mpic 0x2 0x1 | ||
307 | 0x9000 0x0 0x0 0x4 &mpic 0x3 0x1 | ||
308 | |||
309 | /* IDSEL 0x13 (Slot 2) */ | ||
310 | 0x9800 0x0 0x0 0x1 &mpic 0x1 0x1 | ||
311 | 0x9800 0x0 0x0 0x2 &mpic 0x2 0x1 | ||
312 | 0x9800 0x0 0x0 0x3 &mpic 0x3 0x1 | ||
313 | 0x9800 0x0 0x0 0x4 &mpic 0x0 0x1 | ||
314 | |||
315 | /* IDSEL 0x14 (Slot 3) */ | ||
316 | 0xa000 0x0 0x0 0x1 &mpic 0x2 0x1 | ||
317 | 0xa000 0x0 0x0 0x2 &mpic 0x3 0x1 | ||
318 | 0xa000 0x0 0x0 0x3 &mpic 0x0 0x1 | ||
319 | 0xa000 0x0 0x0 0x4 &mpic 0x1 0x1 | ||
320 | |||
321 | /* IDSEL 0x15 (Slot 4) */ | ||
322 | 0xa800 0x0 0x0 0x1 &mpic 0x3 0x1 | ||
323 | 0xa800 0x0 0x0 0x2 &mpic 0x0 0x1 | ||
324 | 0xa800 0x0 0x0 0x3 &mpic 0x1 0x1 | ||
325 | 0xa800 0x0 0x0 0x4 &mpic 0x2 0x1 | ||
326 | |||
327 | /* Bus 1 (Tundra Bridge) */ | ||
328 | /* IDSEL 0x12 (ISA bridge) */ | ||
329 | 0x19000 0x0 0x0 0x1 &mpic 0x0 0x1 | ||
330 | 0x19000 0x0 0x0 0x2 &mpic 0x1 0x1 | ||
331 | 0x19000 0x0 0x0 0x3 &mpic 0x2 0x1 | ||
332 | 0x19000 0x0 0x0 0x4 &mpic 0x3 0x1>; | ||
333 | interrupt-parent = <&mpic>; | ||
334 | interrupts = <24 2>; | ||
335 | bus-range = <0 0>; | ||
336 | ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000 | ||
337 | 0x1000000 0x0 0x0 0xe2000000 0x0 0x100000>; | ||
338 | clock-frequency = <66666666>; | ||
339 | #interrupt-cells = <1>; | ||
340 | #size-cells = <2>; | ||
341 | #address-cells = <3>; | ||
342 | reg = <0xe0008000 0x1000>; | ||
343 | compatible = "fsl,mpc8540-pci"; | ||
344 | device_type = "pci"; | ||
345 | |||
346 | i8259@19000 { | ||
347 | interrupt-controller; | ||
348 | device_type = "interrupt-controller"; | ||
349 | reg = <0x19000 0x0 0x0 0x0 0x1>; | ||
350 | #address-cells = <0>; | ||
351 | #interrupt-cells = <2>; | ||
352 | compatible = "chrp,iic"; | ||
353 | interrupts = <1>; | ||
354 | interrupt-parent = <&pci0>; | ||
355 | }; | ||
356 | }; | ||
357 | |||
358 | pci1: pci@e0009000 { | ||
359 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
360 | interrupt-map = < | ||
361 | |||
362 | /* IDSEL 0x15 */ | ||
363 | 0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 | ||
364 | 0xa800 0x0 0x0 0x2 &mpic 0xb 0x1 | ||
365 | 0xa800 0x0 0x0 0x3 &mpic 0xb 0x1 | ||
366 | 0xa800 0x0 0x0 0x4 &mpic 0xb 0x1>; | ||
367 | interrupt-parent = <&mpic>; | ||
368 | interrupts = <25 2>; | ||
369 | bus-range = <0 0>; | ||
370 | ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000 | ||
371 | 0x1000000 0x0 0x0 0xe3000000 0x0 0x100000>; | ||
372 | clock-frequency = <66666666>; | ||
373 | #interrupt-cells = <1>; | ||
374 | #size-cells = <2>; | ||
375 | #address-cells = <3>; | ||
376 | reg = <0xe0009000 0x1000>; | ||
377 | compatible = "fsl,mpc8540-pci"; | ||
378 | device_type = "pci"; | ||
379 | }; | ||
380 | }; | ||
diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts index 71347537b83..15ca731bc24 100644 --- a/arch/powerpc/boot/dts/tqm8540.dts +++ b/arch/powerpc/boot/dts/tqm8540.dts | |||
@@ -289,7 +289,14 @@ | |||
289 | interrupt-map = < | 289 | interrupt-map = < |
290 | /* IDSEL 28 */ | 290 | /* IDSEL 28 */ |
291 | 0xe000 0 0 1 &mpic 2 1 | 291 | 0xe000 0 0 1 &mpic 2 1 |
292 | 0xe000 0 0 2 &mpic 3 1>; | 292 | 0xe000 0 0 2 &mpic 3 1 |
293 | 0xe000 0 0 3 &mpic 6 1 | ||
294 | 0xe000 0 0 4 &mpic 5 1 | ||
295 | |||
296 | /* IDSEL 11 */ | ||
297 | 0x5800 0 0 1 &mpic 6 1 | ||
298 | 0x5800 0 0 2 &mpic 5 1 | ||
299 | >; | ||
293 | 300 | ||
294 | interrupt-parent = <&mpic>; | 301 | interrupt-parent = <&mpic>; |
295 | interrupts = <24 2>; | 302 | interrupts = <24 2>; |
diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tqm8541.dts index b30f63753d4..f49d0918131 100644 --- a/arch/powerpc/boot/dts/tqm8541.dts +++ b/arch/powerpc/boot/dts/tqm8541.dts | |||
@@ -311,7 +311,14 @@ | |||
311 | interrupt-map = < | 311 | interrupt-map = < |
312 | /* IDSEL 28 */ | 312 | /* IDSEL 28 */ |
313 | 0xe000 0 0 1 &mpic 2 1 | 313 | 0xe000 0 0 1 &mpic 2 1 |
314 | 0xe000 0 0 2 &mpic 3 1>; | 314 | 0xe000 0 0 2 &mpic 3 1 |
315 | 0xe000 0 0 3 &mpic 6 1 | ||
316 | 0xe000 0 0 4 &mpic 5 1 | ||
317 | |||
318 | /* IDSEL 11 */ | ||
319 | 0x5800 0 0 1 &mpic 6 1 | ||
320 | 0x5800 0 0 2 &mpic 5 1 | ||
321 | >; | ||
315 | 322 | ||
316 | interrupt-parent = <&mpic>; | 323 | interrupt-parent = <&mpic>; |
317 | interrupts = <24 2>; | 324 | interrupts = <24 2>; |
diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts b/arch/powerpc/boot/dts/tqm8548-bigflash.dts index 61f25e15fd6..5dbb36edb03 100644 --- a/arch/powerpc/boot/dts/tqm8548-bigflash.dts +++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts | |||
@@ -442,7 +442,14 @@ | |||
442 | interrupt-map = < | 442 | interrupt-map = < |
443 | /* IDSEL 28 */ | 443 | /* IDSEL 28 */ |
444 | 0xe000 0 0 1 &mpic 2 1 | 444 | 0xe000 0 0 1 &mpic 2 1 |
445 | 0xe000 0 0 2 &mpic 3 1>; | 445 | 0xe000 0 0 2 &mpic 3 1 |
446 | 0xe000 0 0 3 &mpic 6 1 | ||
447 | 0xe000 0 0 4 &mpic 5 1 | ||
448 | |||
449 | /* IDSEL 11 */ | ||
450 | 0x5800 0 0 1 &mpic 6 1 | ||
451 | 0x5800 0 0 2 &mpic 5 1 | ||
452 | >; | ||
446 | 453 | ||
447 | interrupt-parent = <&mpic>; | 454 | interrupt-parent = <&mpic>; |
448 | interrupts = <24 2>; | 455 | interrupts = <24 2>; |
diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tqm8548.dts index 025759c7c95..a050ae42710 100644 --- a/arch/powerpc/boot/dts/tqm8548.dts +++ b/arch/powerpc/boot/dts/tqm8548.dts | |||
@@ -442,7 +442,14 @@ | |||
442 | interrupt-map = < | 442 | interrupt-map = < |
443 | /* IDSEL 28 */ | 443 | /* IDSEL 28 */ |
444 | 0xe000 0 0 1 &mpic 2 1 | 444 | 0xe000 0 0 1 &mpic 2 1 |
445 | 0xe000 0 0 2 &mpic 3 1>; | 445 | 0xe000 0 0 2 &mpic 3 1 |
446 | 0xe000 0 0 3 &mpic 6 1 | ||
447 | 0xe000 0 0 4 &mpic 5 1 | ||
448 | |||
449 | /* IDSEL 11 */ | ||
450 | 0x5800 0 0 1 &mpic 6 1 | ||
451 | 0x5800 0 0 2 &mpic 5 1 | ||
452 | >; | ||
446 | 453 | ||
447 | interrupt-parent = <&mpic>; | 454 | interrupt-parent = <&mpic>; |
448 | interrupts = <24 2>; | 455 | interrupts = <24 2>; |
diff --git a/arch/powerpc/boot/dts/tqm8555.dts b/arch/powerpc/boot/dts/tqm8555.dts index 95e28738183..81bad8cd375 100644 --- a/arch/powerpc/boot/dts/tqm8555.dts +++ b/arch/powerpc/boot/dts/tqm8555.dts | |||
@@ -311,7 +311,14 @@ | |||
311 | interrupt-map = < | 311 | interrupt-map = < |
312 | /* IDSEL 28 */ | 312 | /* IDSEL 28 */ |
313 | 0xe000 0 0 1 &mpic 2 1 | 313 | 0xe000 0 0 1 &mpic 2 1 |
314 | 0xe000 0 0 2 &mpic 3 1>; | 314 | 0xe000 0 0 2 &mpic 3 1 |
315 | 0xe000 0 0 3 &mpic 6 1 | ||
316 | 0xe000 0 0 4 &mpic 5 1 | ||
317 | |||
318 | /* IDSEL 11 */ | ||
319 | 0x5800 0 0 1 &mpic 6 1 | ||
320 | 0x5800 0 0 2 &mpic 5 1 | ||
321 | >; | ||
315 | 322 | ||
316 | interrupt-parent = <&mpic>; | 323 | interrupt-parent = <&mpic>; |
317 | interrupts = <24 2>; | 324 | interrupts = <24 2>; |
diff --git a/arch/powerpc/boot/dts/tqm8560.dts b/arch/powerpc/boot/dts/tqm8560.dts index ff70580a8f4..22ec39b5bee 100644 --- a/arch/powerpc/boot/dts/tqm8560.dts +++ b/arch/powerpc/boot/dts/tqm8560.dts | |||
@@ -382,7 +382,14 @@ | |||
382 | interrupt-map = < | 382 | interrupt-map = < |
383 | /* IDSEL 28 */ | 383 | /* IDSEL 28 */ |
384 | 0xe000 0 0 1 &mpic 2 1 | 384 | 0xe000 0 0 1 &mpic 2 1 |
385 | 0xe000 0 0 2 &mpic 3 1>; | 385 | 0xe000 0 0 2 &mpic 3 1 |
386 | 0xe000 0 0 3 &mpic 6 1 | ||
387 | 0xe000 0 0 4 &mpic 5 1 | ||
388 | |||
389 | /* IDSEL 11 */ | ||
390 | 0x5800 0 0 1 &mpic 6 1 | ||
391 | 0x5800 0 0 2 &mpic 5 1 | ||
392 | >; | ||
386 | 393 | ||
387 | interrupt-parent = <&mpic>; | 394 | interrupt-parent = <&mpic>; |
388 | interrupts = <24 2>; | 395 | interrupts = <24 2>; |
diff --git a/arch/powerpc/boot/dts/tqm8xx.dts b/arch/powerpc/boot/dts/tqm8xx.dts new file mode 100644 index 00000000000..f6da7ec49a8 --- /dev/null +++ b/arch/powerpc/boot/dts/tqm8xx.dts | |||
@@ -0,0 +1,172 @@ | |||
1 | /* | ||
2 | * TQM8XX Device Tree Source | ||
3 | * | ||
4 | * Heiko Schocher <hs@denx.de> | ||
5 | * 2010 DENX Software Engineering GmbH | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License as published by the | ||
9 | * Free Software Foundation; either version 2 of the License, or (at your | ||
10 | * option) any later version. | ||
11 | */ | ||
12 | |||
13 | /dts-v1/; | ||
14 | |||
15 | / { | ||
16 | model = "TQM8xx"; | ||
17 | compatible = "tqc,tqm8xx"; | ||
18 | #address-cells = <1>; | ||
19 | #size-cells = <1>; | ||
20 | |||
21 | aliases { | ||
22 | ethernet0 = ð0; | ||
23 | ethernet1 = ð1; | ||
24 | mdio1 = &phy1; | ||
25 | serial0 = &smc1; | ||
26 | }; | ||
27 | |||
28 | cpus { | ||
29 | #address-cells = <1>; | ||
30 | #size-cells = <0>; | ||
31 | |||
32 | PowerPC,860@0 { | ||
33 | device_type = "cpu"; | ||
34 | reg = <0x0>; | ||
35 | d-cache-line-size = <16>; // 16 bytes | ||
36 | i-cache-line-size = <16>; // 16 bytes | ||
37 | d-cache-size = <0x1000>; // L1, 4K | ||
38 | i-cache-size = <0x1000>; // L1, 4K | ||
39 | timebase-frequency = <0>; | ||
40 | bus-frequency = <0>; | ||
41 | clock-frequency = <0>; | ||
42 | interrupts = <15 2>; // decrementer interrupt | ||
43 | interrupt-parent = <&PIC>; | ||
44 | }; | ||
45 | }; | ||
46 | |||
47 | memory { | ||
48 | device_type = "memory"; | ||
49 | reg = <0x0 0x2000000>; | ||
50 | }; | ||
51 | |||
52 | localbus@fff00100 { | ||
53 | compatible = "fsl,mpc860-localbus", "fsl,pq1-localbus"; | ||
54 | #address-cells = <2>; | ||
55 | #size-cells = <1>; | ||
56 | reg = <0xfff00100 0x40>; | ||
57 | |||
58 | ranges = < | ||
59 | 0x0 0x0 0x40000000 0x800000 | ||
60 | >; | ||
61 | |||
62 | flash@0,0 { | ||
63 | compatible = "cfi-flash"; | ||
64 | reg = <0 0 0x800000>; | ||
65 | #address-cells = <1>; | ||
66 | #size-cells = <1>; | ||
67 | bank-width = <4>; | ||
68 | device-width = <2>; | ||
69 | }; | ||
70 | }; | ||
71 | |||
72 | soc@fff00000 { | ||
73 | #address-cells = <1>; | ||
74 | #size-cells = <1>; | ||
75 | device_type = "soc"; | ||
76 | ranges = <0x0 0xfff00000 0x00004000>; | ||
77 | |||
78 | phy1: mdio@e00 { | ||
79 | compatible = "fsl,mpc866-fec-mdio", "fsl,pq1-fec-mdio"; | ||
80 | reg = <0xe00 0x188>; | ||
81 | #address-cells = <1>; | ||
82 | #size-cells = <0>; | ||
83 | PHY: ethernet-phy@f { | ||
84 | reg = <0xf>; | ||
85 | device_type = "ethernet-phy"; | ||
86 | }; | ||
87 | }; | ||
88 | |||
89 | eth1: ethernet@e00 { | ||
90 | device_type = "network"; | ||
91 | compatible = "fsl,mpc866-fec-enet", | ||
92 | "fsl,pq1-fec-enet"; | ||
93 | reg = <0xe00 0x188>; | ||
94 | interrupts = <3 1>; | ||
95 | interrupt-parent = <&PIC>; | ||
96 | phy-handle = <&PHY>; | ||
97 | linux,network-index = <1>; | ||
98 | }; | ||
99 | |||
100 | PIC: pic@0 { | ||
101 | interrupt-controller; | ||
102 | #interrupt-cells = <2>; | ||
103 | reg = <0x0 0x24>; | ||
104 | compatible = "fsl,mpc860-pic", "fsl,pq1-pic"; | ||
105 | }; | ||
106 | |||
107 | cpm@9c0 { | ||
108 | #address-cells = <1>; | ||
109 | #size-cells = <1>; | ||
110 | compatible = "fsl,mpc860-cpm", "fsl,cpm1"; | ||
111 | ranges; | ||
112 | reg = <0x9c0 0x40>; | ||
113 | brg-frequency = <0>; | ||
114 | interrupts = <0 2>; // cpm error interrupt | ||
115 | interrupt-parent = <&CPM_PIC>; | ||
116 | |||
117 | muram@2000 { | ||
118 | #address-cells = <1>; | ||
119 | #size-cells = <1>; | ||
120 | ranges = <0x0 0x2000 0x2000>; | ||
121 | |||
122 | data@0 { | ||
123 | compatible = "fsl,cpm-muram-data"; | ||
124 | reg = <0x0 0x2000>; | ||
125 | }; | ||
126 | }; | ||
127 | |||
128 | brg@9f0 { | ||
129 | compatible = "fsl,mpc860-brg", | ||
130 | "fsl,cpm1-brg", | ||
131 | "fsl,cpm-brg"; | ||
132 | reg = <0x9f0 0x10>; | ||
133 | clock-frequency = <0>; | ||
134 | }; | ||
135 | |||
136 | CPM_PIC: pic@930 { | ||
137 | interrupt-controller; | ||
138 | #address-cells = <0>; | ||
139 | #interrupt-cells = <1>; | ||
140 | interrupts = <5 2 0 2>; | ||
141 | interrupt-parent = <&PIC>; | ||
142 | reg = <0x930 0x20>; | ||
143 | compatible = "fsl,mpc860-cpm-pic", | ||
144 | "fsl,cpm1-pic"; | ||
145 | }; | ||
146 | |||
147 | |||
148 | smc1: serial@a80 { | ||
149 | device_type = "serial"; | ||
150 | compatible = "fsl,mpc860-smc-uart", | ||
151 | "fsl,cpm1-smc-uart"; | ||
152 | reg = <0xa80 0x10 0x3e80 0x40>; | ||
153 | interrupts = <4>; | ||
154 | interrupt-parent = <&CPM_PIC>; | ||
155 | fsl,cpm-brg = <1>; | ||
156 | fsl,cpm-command = <0x90>; | ||
157 | }; | ||
158 | |||
159 | eth0: ethernet@a00 { | ||
160 | device_type = "network"; | ||
161 | compatible = "fsl,mpc860-scc-enet", | ||
162 | "fsl,cpm1-scc-enet"; | ||
163 | reg = <0xa00 0x18 0x3c00 0x100>; | ||
164 | interrupts = <30>; | ||
165 | interrupt-parent = <&CPM_PIC>; | ||
166 | fsl,cpm-command = <0000>; | ||
167 | linux,network-index = <0>; | ||
168 | fixed-link = <0 0 10 0 0>; | ||
169 | }; | ||
170 | }; | ||
171 | }; | ||
172 | }; | ||
diff --git a/arch/powerpc/configs/mpc85xx_defconfig b/arch/powerpc/configs/mpc85xx_defconfig index cfebef9f912..d32f31a03f5 100644 --- a/arch/powerpc/configs/mpc85xx_defconfig +++ b/arch/powerpc/configs/mpc85xx_defconfig | |||
@@ -19,7 +19,8 @@ CONFIG_E500=y | |||
19 | CONFIG_FSL_EMB_PERFMON=y | 19 | CONFIG_FSL_EMB_PERFMON=y |
20 | CONFIG_BOOKE=y | 20 | CONFIG_BOOKE=y |
21 | CONFIG_FSL_BOOKE=y | 21 | CONFIG_FSL_BOOKE=y |
22 | # CONFIG_PHYS_64BIT is not set | 22 | CONFIG_PTE_64BIT=y |
23 | CONFIG_PHYS_64BIT=y | ||
23 | CONFIG_SPE=y | 24 | CONFIG_SPE=y |
24 | CONFIG_PPC_MMU_NOHASH=y | 25 | CONFIG_PPC_MMU_NOHASH=y |
25 | CONFIG_PPC_MMU_NOHASH_32=y | 26 | CONFIG_PPC_MMU_NOHASH_32=y |
@@ -28,7 +29,7 @@ CONFIG_PPC_BOOK3E_MMU=y | |||
28 | # CONFIG_SMP is not set | 29 | # CONFIG_SMP is not set |
29 | CONFIG_PPC32=y | 30 | CONFIG_PPC32=y |
30 | CONFIG_WORD_SIZE=32 | 31 | CONFIG_WORD_SIZE=32 |
31 | # CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set | 32 | CONFIG_ARCH_PHYS_ADDR_T_64BIT=y |
32 | CONFIG_MMU=y | 33 | CONFIG_MMU=y |
33 | CONFIG_GENERIC_CMOS_UPDATE=y | 34 | CONFIG_GENERIC_CMOS_UPDATE=y |
34 | CONFIG_GENERIC_TIME=y | 35 | CONFIG_GENERIC_TIME=y |
@@ -239,6 +240,7 @@ CONFIG_MPC85xx_MDS=y | |||
239 | CONFIG_MPC8536_DS=y | 240 | CONFIG_MPC8536_DS=y |
240 | CONFIG_MPC85xx_DS=y | 241 | CONFIG_MPC85xx_DS=y |
241 | CONFIG_MPC85xx_RDB=y | 242 | CONFIG_MPC85xx_RDB=y |
243 | CONFIG_P1022_DS=y | ||
242 | CONFIG_SOCRATES=y | 244 | CONFIG_SOCRATES=y |
243 | CONFIG_KSI8560=y | 245 | CONFIG_KSI8560=y |
244 | CONFIG_XES_MPC85xx=y | 246 | CONFIG_XES_MPC85xx=y |
@@ -311,7 +313,7 @@ CONFIG_FLAT_NODE_MEM_MAP=y | |||
311 | CONFIG_PAGEFLAGS_EXTENDED=y | 313 | CONFIG_PAGEFLAGS_EXTENDED=y |
312 | CONFIG_SPLIT_PTLOCK_CPUS=4 | 314 | CONFIG_SPLIT_PTLOCK_CPUS=4 |
313 | CONFIG_MIGRATION=y | 315 | CONFIG_MIGRATION=y |
314 | # CONFIG_PHYS_ADDR_T_64BIT is not set | 316 | CONFIG_PHYS_ADDR_T_64BIT=y |
315 | CONFIG_ZONE_DMA_FLAG=1 | 317 | CONFIG_ZONE_DMA_FLAG=1 |
316 | CONFIG_BOUNCE=y | 318 | CONFIG_BOUNCE=y |
317 | CONFIG_VIRT_TO_BUS=y | 319 | CONFIG_VIRT_TO_BUS=y |
@@ -321,7 +323,7 @@ CONFIG_PPC_4K_PAGES=y | |||
321 | # CONFIG_PPC_16K_PAGES is not set | 323 | # CONFIG_PPC_16K_PAGES is not set |
322 | # CONFIG_PPC_64K_PAGES is not set | 324 | # CONFIG_PPC_64K_PAGES is not set |
323 | # CONFIG_PPC_256K_PAGES is not set | 325 | # CONFIG_PPC_256K_PAGES is not set |
324 | CONFIG_FORCE_MAX_ZONEORDER=11 | 326 | CONFIG_FORCE_MAX_ZONEORDER=12 |
325 | CONFIG_PROC_DEVICETREE=y | 327 | CONFIG_PROC_DEVICETREE=y |
326 | # CONFIG_CMDLINE_BOOL is not set | 328 | # CONFIG_CMDLINE_BOOL is not set |
327 | CONFIG_EXTRA_TARGETS="" | 329 | CONFIG_EXTRA_TARGETS="" |
@@ -1122,16 +1124,13 @@ CONFIG_VGA_CONSOLE=y | |||
1122 | # CONFIG_VGACON_SOFT_SCROLLBACK is not set | 1124 | # CONFIG_VGACON_SOFT_SCROLLBACK is not set |
1123 | CONFIG_DUMMY_CONSOLE=y | 1125 | CONFIG_DUMMY_CONSOLE=y |
1124 | CONFIG_SOUND=y | 1126 | CONFIG_SOUND=y |
1125 | CONFIG_SOUND_OSS_CORE=y | 1127 | # CONFIG_SOUND_OSS_CORE is not set |
1126 | CONFIG_SOUND_OSS_CORE_PRECLAIM=y | ||
1127 | CONFIG_SND=y | 1128 | CONFIG_SND=y |
1128 | CONFIG_SND_TIMER=y | 1129 | CONFIG_SND_TIMER=y |
1129 | CONFIG_SND_PCM=y | 1130 | CONFIG_SND_PCM=y |
1130 | # CONFIG_SND_SEQUENCER is not set | 1131 | # CONFIG_SND_SEQUENCER is not set |
1131 | CONFIG_SND_OSSEMUL=y | 1132 | # CONFIG_SND_MIXER_OSS is not set |
1132 | CONFIG_SND_MIXER_OSS=y | 1133 | # CONFIG_SND_PCM_OSS is not set |
1133 | CONFIG_SND_PCM_OSS=y | ||
1134 | CONFIG_SND_PCM_OSS_PLUGINS=y | ||
1135 | # CONFIG_SND_HRTIMER is not set | 1134 | # CONFIG_SND_HRTIMER is not set |
1136 | # CONFIG_SND_DYNAMIC_MINORS is not set | 1135 | # CONFIG_SND_DYNAMIC_MINORS is not set |
1137 | # CONFIG_SND_SUPPORT_OLD_API is not set | 1136 | # CONFIG_SND_SUPPORT_OLD_API is not set |
@@ -1145,12 +1144,7 @@ CONFIG_SND_VMASTER=y | |||
1145 | # CONFIG_SND_SBAWE_SEQ is not set | 1144 | # CONFIG_SND_SBAWE_SEQ is not set |
1146 | # CONFIG_SND_EMU10K1_SEQ is not set | 1145 | # CONFIG_SND_EMU10K1_SEQ is not set |
1147 | CONFIG_SND_AC97_CODEC=y | 1146 | CONFIG_SND_AC97_CODEC=y |
1148 | CONFIG_SND_DRIVERS=y | 1147 | # CONFIG_SND_DRIVERS is not set |
1149 | # CONFIG_SND_DUMMY is not set | ||
1150 | # CONFIG_SND_MTPAV is not set | ||
1151 | # CONFIG_SND_SERIAL_U16550 is not set | ||
1152 | # CONFIG_SND_MPU401 is not set | ||
1153 | # CONFIG_SND_AC97_POWER_SAVE is not set | ||
1154 | CONFIG_SND_PCI=y | 1148 | CONFIG_SND_PCI=y |
1155 | # CONFIG_SND_AD1889 is not set | 1149 | # CONFIG_SND_AD1889 is not set |
1156 | # CONFIG_SND_ALS300 is not set | 1150 | # CONFIG_SND_ALS300 is not set |
@@ -1218,12 +1212,8 @@ CONFIG_SND_INTEL8X0=y | |||
1218 | # CONFIG_SND_VIRTUOSO is not set | 1212 | # CONFIG_SND_VIRTUOSO is not set |
1219 | # CONFIG_SND_VX222 is not set | 1213 | # CONFIG_SND_VX222 is not set |
1220 | # CONFIG_SND_YMFPCI is not set | 1214 | # CONFIG_SND_YMFPCI is not set |
1221 | CONFIG_SND_PPC=y | 1215 | # CONFIG_SND_PPC is not set |
1222 | CONFIG_SND_USB=y | 1216 | # CONFIG_SND_USB is not set |
1223 | # CONFIG_SND_USB_AUDIO is not set | ||
1224 | # CONFIG_SND_USB_UA101 is not set | ||
1225 | # CONFIG_SND_USB_USX2Y is not set | ||
1226 | # CONFIG_SND_USB_CAIAQ is not set | ||
1227 | # CONFIG_SND_SOC is not set | 1217 | # CONFIG_SND_SOC is not set |
1228 | # CONFIG_SOUND_PRIME is not set | 1218 | # CONFIG_SOUND_PRIME is not set |
1229 | CONFIG_AC97_BUS=y | 1219 | CONFIG_AC97_BUS=y |
diff --git a/arch/powerpc/configs/mpc85xx_smp_defconfig b/arch/powerpc/configs/mpc85xx_smp_defconfig index f5451d80f19..f93de10adcd 100644 --- a/arch/powerpc/configs/mpc85xx_smp_defconfig +++ b/arch/powerpc/configs/mpc85xx_smp_defconfig | |||
@@ -19,7 +19,8 @@ CONFIG_E500=y | |||
19 | CONFIG_FSL_EMB_PERFMON=y | 19 | CONFIG_FSL_EMB_PERFMON=y |
20 | CONFIG_BOOKE=y | 20 | CONFIG_BOOKE=y |
21 | CONFIG_FSL_BOOKE=y | 21 | CONFIG_FSL_BOOKE=y |
22 | # CONFIG_PHYS_64BIT is not set | 22 | CONFIG_PTE_64BIT=y |
23 | CONFIG_PHYS_64BIT=y | ||
23 | CONFIG_SPE=y | 24 | CONFIG_SPE=y |
24 | CONFIG_PPC_MMU_NOHASH=y | 25 | CONFIG_PPC_MMU_NOHASH=y |
25 | CONFIG_PPC_MMU_NOHASH_32=y | 26 | CONFIG_PPC_MMU_NOHASH_32=y |
@@ -29,7 +30,7 @@ CONFIG_SMP=y | |||
29 | CONFIG_NR_CPUS=8 | 30 | CONFIG_NR_CPUS=8 |
30 | CONFIG_PPC32=y | 31 | CONFIG_PPC32=y |
31 | CONFIG_WORD_SIZE=32 | 32 | CONFIG_WORD_SIZE=32 |
32 | # CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set | 33 | CONFIG_ARCH_PHYS_ADDR_T_64BIT=y |
33 | CONFIG_MMU=y | 34 | CONFIG_MMU=y |
34 | CONFIG_GENERIC_CMOS_UPDATE=y | 35 | CONFIG_GENERIC_CMOS_UPDATE=y |
35 | CONFIG_GENERIC_TIME=y | 36 | CONFIG_GENERIC_TIME=y |
@@ -243,6 +244,7 @@ CONFIG_MPC85xx_MDS=y | |||
243 | CONFIG_MPC8536_DS=y | 244 | CONFIG_MPC8536_DS=y |
244 | CONFIG_MPC85xx_DS=y | 245 | CONFIG_MPC85xx_DS=y |
245 | CONFIG_MPC85xx_RDB=y | 246 | CONFIG_MPC85xx_RDB=y |
247 | CONFIG_P1022_DS=y | ||
246 | CONFIG_SOCRATES=y | 248 | CONFIG_SOCRATES=y |
247 | CONFIG_KSI8560=y | 249 | CONFIG_KSI8560=y |
248 | CONFIG_XES_MPC85xx=y | 250 | CONFIG_XES_MPC85xx=y |
@@ -316,7 +318,7 @@ CONFIG_FLAT_NODE_MEM_MAP=y | |||
316 | CONFIG_PAGEFLAGS_EXTENDED=y | 318 | CONFIG_PAGEFLAGS_EXTENDED=y |
317 | CONFIG_SPLIT_PTLOCK_CPUS=4 | 319 | CONFIG_SPLIT_PTLOCK_CPUS=4 |
318 | CONFIG_MIGRATION=y | 320 | CONFIG_MIGRATION=y |
319 | # CONFIG_PHYS_ADDR_T_64BIT is not set | 321 | CONFIG_PHYS_ADDR_T_64BIT=y |
320 | CONFIG_ZONE_DMA_FLAG=1 | 322 | CONFIG_ZONE_DMA_FLAG=1 |
321 | CONFIG_BOUNCE=y | 323 | CONFIG_BOUNCE=y |
322 | CONFIG_VIRT_TO_BUS=y | 324 | CONFIG_VIRT_TO_BUS=y |
@@ -326,7 +328,7 @@ CONFIG_PPC_4K_PAGES=y | |||
326 | # CONFIG_PPC_16K_PAGES is not set | 328 | # CONFIG_PPC_16K_PAGES is not set |
327 | # CONFIG_PPC_64K_PAGES is not set | 329 | # CONFIG_PPC_64K_PAGES is not set |
328 | # CONFIG_PPC_256K_PAGES is not set | 330 | # CONFIG_PPC_256K_PAGES is not set |
329 | CONFIG_FORCE_MAX_ZONEORDER=11 | 331 | CONFIG_FORCE_MAX_ZONEORDER=12 |
330 | CONFIG_PROC_DEVICETREE=y | 332 | CONFIG_PROC_DEVICETREE=y |
331 | # CONFIG_CMDLINE_BOOL is not set | 333 | # CONFIG_CMDLINE_BOOL is not set |
332 | CONFIG_EXTRA_TARGETS="" | 334 | CONFIG_EXTRA_TARGETS="" |
@@ -1127,16 +1129,13 @@ CONFIG_VGA_CONSOLE=y | |||
1127 | # CONFIG_VGACON_SOFT_SCROLLBACK is not set | 1129 | # CONFIG_VGACON_SOFT_SCROLLBACK is not set |
1128 | CONFIG_DUMMY_CONSOLE=y | 1130 | CONFIG_DUMMY_CONSOLE=y |
1129 | CONFIG_SOUND=y | 1131 | CONFIG_SOUND=y |
1130 | CONFIG_SOUND_OSS_CORE=y | 1132 | # CONFIG_SOUND_OSS_CORE is not set |
1131 | CONFIG_SOUND_OSS_CORE_PRECLAIM=y | ||
1132 | CONFIG_SND=y | 1133 | CONFIG_SND=y |
1133 | CONFIG_SND_TIMER=y | 1134 | CONFIG_SND_TIMER=y |
1134 | CONFIG_SND_PCM=y | 1135 | CONFIG_SND_PCM=y |
1135 | # CONFIG_SND_SEQUENCER is not set | 1136 | # CONFIG_SND_SEQUENCER is not set |
1136 | CONFIG_SND_OSSEMUL=y | 1137 | # CONFIG_SND_MIXER_OSS is not set |
1137 | CONFIG_SND_MIXER_OSS=y | 1138 | # CONFIG_SND_PCM_OSS is not set |
1138 | CONFIG_SND_PCM_OSS=y | ||
1139 | CONFIG_SND_PCM_OSS_PLUGINS=y | ||
1140 | # CONFIG_SND_HRTIMER is not set | 1139 | # CONFIG_SND_HRTIMER is not set |
1141 | # CONFIG_SND_DYNAMIC_MINORS is not set | 1140 | # CONFIG_SND_DYNAMIC_MINORS is not set |
1142 | # CONFIG_SND_SUPPORT_OLD_API is not set | 1141 | # CONFIG_SND_SUPPORT_OLD_API is not set |
@@ -1150,12 +1149,7 @@ CONFIG_SND_VMASTER=y | |||
1150 | # CONFIG_SND_SBAWE_SEQ is not set | 1149 | # CONFIG_SND_SBAWE_SEQ is not set |
1151 | # CONFIG_SND_EMU10K1_SEQ is not set | 1150 | # CONFIG_SND_EMU10K1_SEQ is not set |
1152 | CONFIG_SND_AC97_CODEC=y | 1151 | CONFIG_SND_AC97_CODEC=y |
1153 | CONFIG_SND_DRIVERS=y | 1152 | # CONFIG_SND_DRIVERS is not set |
1154 | # CONFIG_SND_DUMMY is not set | ||
1155 | # CONFIG_SND_MTPAV is not set | ||
1156 | # CONFIG_SND_SERIAL_U16550 is not set | ||
1157 | # CONFIG_SND_MPU401 is not set | ||
1158 | # CONFIG_SND_AC97_POWER_SAVE is not set | ||
1159 | CONFIG_SND_PCI=y | 1153 | CONFIG_SND_PCI=y |
1160 | # CONFIG_SND_AD1889 is not set | 1154 | # CONFIG_SND_AD1889 is not set |
1161 | # CONFIG_SND_ALS300 is not set | 1155 | # CONFIG_SND_ALS300 is not set |
@@ -1223,12 +1217,8 @@ CONFIG_SND_INTEL8X0=y | |||
1223 | # CONFIG_SND_VIRTUOSO is not set | 1217 | # CONFIG_SND_VIRTUOSO is not set |
1224 | # CONFIG_SND_VX222 is not set | 1218 | # CONFIG_SND_VX222 is not set |
1225 | # CONFIG_SND_YMFPCI is not set | 1219 | # CONFIG_SND_YMFPCI is not set |
1226 | CONFIG_SND_PPC=y | 1220 | # CONFIG_SND_PPC is not set |
1227 | CONFIG_SND_USB=y | 1221 | # CONFIG_SND_USB is not set |
1228 | # CONFIG_SND_USB_AUDIO is not set | ||
1229 | # CONFIG_SND_USB_UA101 is not set | ||
1230 | # CONFIG_SND_USB_USX2Y is not set | ||
1231 | # CONFIG_SND_USB_CAIAQ is not set | ||
1232 | # CONFIG_SND_SOC is not set | 1222 | # CONFIG_SND_SOC is not set |
1233 | # CONFIG_SOUND_PRIME is not set | 1223 | # CONFIG_SOUND_PRIME is not set |
1234 | CONFIG_AC97_BUS=y | 1224 | CONFIG_AC97_BUS=y |
diff --git a/arch/powerpc/configs/tqm8xx_defconfig b/arch/powerpc/configs/tqm8xx_defconfig new file mode 100644 index 00000000000..85e654b6487 --- /dev/null +++ b/arch/powerpc/configs/tqm8xx_defconfig | |||
@@ -0,0 +1,934 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.34-rc1 | ||
4 | # Tue Mar 23 08:22:15 2010 | ||
5 | # | ||
6 | # CONFIG_PPC64 is not set | ||
7 | |||
8 | # | ||
9 | # Processor support | ||
10 | # | ||
11 | # CONFIG_PPC_BOOK3S_32 is not set | ||
12 | # CONFIG_PPC_85xx is not set | ||
13 | CONFIG_PPC_8xx=y | ||
14 | # CONFIG_40x is not set | ||
15 | # CONFIG_44x is not set | ||
16 | # CONFIG_E200 is not set | ||
17 | CONFIG_8xx=y | ||
18 | CONFIG_PPC_MMU_NOHASH=y | ||
19 | CONFIG_PPC_MMU_NOHASH_32=y | ||
20 | # CONFIG_PPC_MM_SLICES is not set | ||
21 | CONFIG_NOT_COHERENT_CACHE=y | ||
22 | CONFIG_PPC32=y | ||
23 | CONFIG_WORD_SIZE=32 | ||
24 | # CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set | ||
25 | CONFIG_MMU=y | ||
26 | CONFIG_GENERIC_CMOS_UPDATE=y | ||
27 | CONFIG_GENERIC_TIME=y | ||
28 | CONFIG_GENERIC_TIME_VSYSCALL=y | ||
29 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
30 | CONFIG_GENERIC_HARDIRQS=y | ||
31 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
32 | # CONFIG_HAVE_SETUP_PER_CPU_AREA is not set | ||
33 | # CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK is not set | ||
34 | CONFIG_IRQ_PER_CPU=y | ||
35 | CONFIG_NR_IRQS=512 | ||
36 | CONFIG_STACKTRACE_SUPPORT=y | ||
37 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
38 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
39 | CONFIG_LOCKDEP_SUPPORT=y | ||
40 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | ||
41 | CONFIG_ARCH_HAS_ILOG2_U32=y | ||
42 | CONFIG_GENERIC_HWEIGHT=y | ||
43 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
44 | # CONFIG_ARCH_NO_VIRT_TO_BUS is not set | ||
45 | CONFIG_PPC=y | ||
46 | CONFIG_EARLY_PRINTK=y | ||
47 | CONFIG_GENERIC_NVRAM=y | ||
48 | CONFIG_SCHED_OMIT_FRAME_POINTER=y | ||
49 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y | ||
50 | CONFIG_PPC_OF=y | ||
51 | CONFIG_OF=y | ||
52 | # CONFIG_PPC_UDBG_16550 is not set | ||
53 | # CONFIG_GENERIC_TBSYNC is not set | ||
54 | CONFIG_AUDIT_ARCH=y | ||
55 | CONFIG_GENERIC_BUG=y | ||
56 | CONFIG_DTC=y | ||
57 | # CONFIG_DEFAULT_UIMAGE is not set | ||
58 | CONFIG_ARCH_HIBERNATION_POSSIBLE=y | ||
59 | # CONFIG_PPC_DCR_NATIVE is not set | ||
60 | # CONFIG_PPC_DCR_MMIO is not set | ||
61 | CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y | ||
62 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
63 | CONFIG_CONSTRUCTORS=y | ||
64 | |||
65 | # | ||
66 | # General setup | ||
67 | # | ||
68 | CONFIG_EXPERIMENTAL=y | ||
69 | CONFIG_BROKEN_ON_SMP=y | ||
70 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
71 | CONFIG_LOCALVERSION="" | ||
72 | CONFIG_LOCALVERSION_AUTO=y | ||
73 | # CONFIG_SWAP is not set | ||
74 | CONFIG_SYSVIPC=y | ||
75 | CONFIG_SYSVIPC_SYSCTL=y | ||
76 | # CONFIG_POSIX_MQUEUE is not set | ||
77 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
78 | # CONFIG_TASKSTATS is not set | ||
79 | # CONFIG_AUDIT is not set | ||
80 | |||
81 | # | ||
82 | # RCU Subsystem | ||
83 | # | ||
84 | CONFIG_TREE_RCU=y | ||
85 | # CONFIG_TREE_PREEMPT_RCU is not set | ||
86 | # CONFIG_TINY_RCU is not set | ||
87 | # CONFIG_RCU_TRACE is not set | ||
88 | CONFIG_RCU_FANOUT=32 | ||
89 | # CONFIG_RCU_FANOUT_EXACT is not set | ||
90 | # CONFIG_TREE_RCU_TRACE is not set | ||
91 | # CONFIG_IKCONFIG is not set | ||
92 | CONFIG_LOG_BUF_SHIFT=14 | ||
93 | # CONFIG_CGROUPS is not set | ||
94 | CONFIG_SYSFS_DEPRECATED=y | ||
95 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
96 | # CONFIG_RELAY is not set | ||
97 | # CONFIG_NAMESPACES is not set | ||
98 | # CONFIG_BLK_DEV_INITRD is not set | ||
99 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
100 | CONFIG_SYSCTL=y | ||
101 | CONFIG_ANON_INODES=y | ||
102 | CONFIG_EMBEDDED=y | ||
103 | # CONFIG_SYSCTL_SYSCALL is not set | ||
104 | CONFIG_KALLSYMS=y | ||
105 | # CONFIG_KALLSYMS_ALL is not set | ||
106 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
107 | CONFIG_HOTPLUG=y | ||
108 | CONFIG_PRINTK=y | ||
109 | CONFIG_BUG=y | ||
110 | # CONFIG_ELF_CORE is not set | ||
111 | # CONFIG_BASE_FULL is not set | ||
112 | # CONFIG_FUTEX is not set | ||
113 | CONFIG_EPOLL=y | ||
114 | CONFIG_SIGNALFD=y | ||
115 | CONFIG_TIMERFD=y | ||
116 | CONFIG_EVENTFD=y | ||
117 | CONFIG_SHMEM=y | ||
118 | CONFIG_AIO=y | ||
119 | CONFIG_HAVE_PERF_EVENTS=y | ||
120 | |||
121 | # | ||
122 | # Kernel Performance Events And Counters | ||
123 | # | ||
124 | # CONFIG_PERF_EVENTS is not set | ||
125 | # CONFIG_PERF_COUNTERS is not set | ||
126 | # CONFIG_VM_EVENT_COUNTERS is not set | ||
127 | CONFIG_SLUB_DEBUG=y | ||
128 | CONFIG_COMPAT_BRK=y | ||
129 | # CONFIG_SLAB is not set | ||
130 | CONFIG_SLUB=y | ||
131 | # CONFIG_SLOB is not set | ||
132 | # CONFIG_PROFILING is not set | ||
133 | CONFIG_HAVE_OPROFILE=y | ||
134 | # CONFIG_KPROBES is not set | ||
135 | CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y | ||
136 | CONFIG_HAVE_IOREMAP_PROT=y | ||
137 | CONFIG_HAVE_KPROBES=y | ||
138 | CONFIG_HAVE_KRETPROBES=y | ||
139 | CONFIG_HAVE_ARCH_TRACEHOOK=y | ||
140 | CONFIG_HAVE_DMA_ATTRS=y | ||
141 | CONFIG_HAVE_CLK=y | ||
142 | CONFIG_HAVE_DMA_API_DEBUG=y | ||
143 | |||
144 | # | ||
145 | # GCOV-based kernel profiling | ||
146 | # | ||
147 | # CONFIG_SLOW_WORK is not set | ||
148 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | ||
149 | CONFIG_SLABINFO=y | ||
150 | CONFIG_BASE_SMALL=1 | ||
151 | CONFIG_MODULES=y | ||
152 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
153 | CONFIG_MODULE_UNLOAD=y | ||
154 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
155 | # CONFIG_MODVERSIONS is not set | ||
156 | CONFIG_MODULE_SRCVERSION_ALL=y | ||
157 | CONFIG_BLOCK=y | ||
158 | CONFIG_LBDAF=y | ||
159 | # CONFIG_BLK_DEV_BSG is not set | ||
160 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
161 | |||
162 | # | ||
163 | # IO Schedulers | ||
164 | # | ||
165 | CONFIG_IOSCHED_NOOP=y | ||
166 | CONFIG_IOSCHED_DEADLINE=y | ||
167 | # CONFIG_IOSCHED_CFQ is not set | ||
168 | CONFIG_DEFAULT_DEADLINE=y | ||
169 | # CONFIG_DEFAULT_CFQ is not set | ||
170 | # CONFIG_DEFAULT_NOOP is not set | ||
171 | CONFIG_DEFAULT_IOSCHED="deadline" | ||
172 | # CONFIG_INLINE_SPIN_TRYLOCK is not set | ||
173 | # CONFIG_INLINE_SPIN_TRYLOCK_BH is not set | ||
174 | # CONFIG_INLINE_SPIN_LOCK is not set | ||
175 | # CONFIG_INLINE_SPIN_LOCK_BH is not set | ||
176 | # CONFIG_INLINE_SPIN_LOCK_IRQ is not set | ||
177 | # CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set | ||
178 | CONFIG_INLINE_SPIN_UNLOCK=y | ||
179 | # CONFIG_INLINE_SPIN_UNLOCK_BH is not set | ||
180 | CONFIG_INLINE_SPIN_UNLOCK_IRQ=y | ||
181 | # CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set | ||
182 | # CONFIG_INLINE_READ_TRYLOCK is not set | ||
183 | # CONFIG_INLINE_READ_LOCK is not set | ||
184 | # CONFIG_INLINE_READ_LOCK_BH is not set | ||
185 | # CONFIG_INLINE_READ_LOCK_IRQ is not set | ||
186 | # CONFIG_INLINE_READ_LOCK_IRQSAVE is not set | ||
187 | CONFIG_INLINE_READ_UNLOCK=y | ||
188 | # CONFIG_INLINE_READ_UNLOCK_BH is not set | ||
189 | CONFIG_INLINE_READ_UNLOCK_IRQ=y | ||
190 | # CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set | ||
191 | # CONFIG_INLINE_WRITE_TRYLOCK is not set | ||
192 | # CONFIG_INLINE_WRITE_LOCK is not set | ||
193 | # CONFIG_INLINE_WRITE_LOCK_BH is not set | ||
194 | # CONFIG_INLINE_WRITE_LOCK_IRQ is not set | ||
195 | # CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set | ||
196 | CONFIG_INLINE_WRITE_UNLOCK=y | ||
197 | # CONFIG_INLINE_WRITE_UNLOCK_BH is not set | ||
198 | CONFIG_INLINE_WRITE_UNLOCK_IRQ=y | ||
199 | # CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set | ||
200 | # CONFIG_MUTEX_SPIN_ON_OWNER is not set | ||
201 | # CONFIG_FREEZER is not set | ||
202 | |||
203 | # | ||
204 | # Platform support | ||
205 | # | ||
206 | # CONFIG_PPC_CELL is not set | ||
207 | # CONFIG_PPC_CELL_NATIVE is not set | ||
208 | CONFIG_CPM1=y | ||
209 | # CONFIG_MPC8XXFADS is not set | ||
210 | # CONFIG_MPC86XADS is not set | ||
211 | # CONFIG_MPC885ADS is not set | ||
212 | # CONFIG_PPC_EP88XC is not set | ||
213 | # CONFIG_PPC_ADDER875 is not set | ||
214 | # CONFIG_PPC_MGSUVD is not set | ||
215 | CONFIG_TQM8XX=y | ||
216 | |||
217 | # | ||
218 | # MPC8xx CPM Options | ||
219 | # | ||
220 | |||
221 | # | ||
222 | # Generic MPC8xx Options | ||
223 | # | ||
224 | CONFIG_8xx_COPYBACK=y | ||
225 | # CONFIG_8xx_GPIO is not set | ||
226 | # CONFIG_8xx_CPU6 is not set | ||
227 | # CONFIG_8xx_CPU15 is not set | ||
228 | CONFIG_NO_UCODE_PATCH=y | ||
229 | # CONFIG_USB_SOF_UCODE_PATCH is not set | ||
230 | # CONFIG_I2C_SPI_UCODE_PATCH is not set | ||
231 | # CONFIG_I2C_SPI_SMC1_UCODE_PATCH is not set | ||
232 | # CONFIG_PQ2ADS is not set | ||
233 | # CONFIG_IPIC is not set | ||
234 | # CONFIG_MPIC is not set | ||
235 | # CONFIG_MPIC_WEIRD is not set | ||
236 | # CONFIG_PPC_I8259 is not set | ||
237 | # CONFIG_PPC_RTAS is not set | ||
238 | # CONFIG_MMIO_NVRAM is not set | ||
239 | # CONFIG_PPC_MPC106 is not set | ||
240 | # CONFIG_PPC_970_NAP is not set | ||
241 | # CONFIG_PPC_INDIRECT_IO is not set | ||
242 | # CONFIG_GENERIC_IOMAP is not set | ||
243 | # CONFIG_CPU_FREQ is not set | ||
244 | # CONFIG_QUICC_ENGINE is not set | ||
245 | # CONFIG_FSL_ULI1575 is not set | ||
246 | CONFIG_CPM=y | ||
247 | # CONFIG_SIMPLE_GPIO is not set | ||
248 | |||
249 | # | ||
250 | # Kernel options | ||
251 | # | ||
252 | # CONFIG_HIGHMEM is not set | ||
253 | CONFIG_TICK_ONESHOT=y | ||
254 | CONFIG_NO_HZ=y | ||
255 | CONFIG_HIGH_RES_TIMERS=y | ||
256 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
257 | CONFIG_HZ_100=y | ||
258 | # CONFIG_HZ_250 is not set | ||
259 | # CONFIG_HZ_300 is not set | ||
260 | # CONFIG_HZ_1000 is not set | ||
261 | CONFIG_HZ=100 | ||
262 | CONFIG_SCHED_HRTICK=y | ||
263 | CONFIG_PREEMPT_NONE=y | ||
264 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
265 | # CONFIG_PREEMPT is not set | ||
266 | CONFIG_BINFMT_ELF=y | ||
267 | # CONFIG_HAVE_AOUT is not set | ||
268 | # CONFIG_BINFMT_MISC is not set | ||
269 | # CONFIG_MATH_EMULATION is not set | ||
270 | CONFIG_8XX_MINIMAL_FPEMU=y | ||
271 | # CONFIG_IOMMU_HELPER is not set | ||
272 | # CONFIG_SWIOTLB is not set | ||
273 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | ||
274 | CONFIG_ARCH_HAS_WALK_MEMORY=y | ||
275 | CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y | ||
276 | CONFIG_SPARSE_IRQ=y | ||
277 | CONFIG_MAX_ACTIVE_REGIONS=32 | ||
278 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
279 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
280 | CONFIG_SELECT_MEMORY_MODEL=y | ||
281 | CONFIG_FLATMEM_MANUAL=y | ||
282 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
283 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
284 | CONFIG_FLATMEM=y | ||
285 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
286 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
287 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
288 | CONFIG_MIGRATION=y | ||
289 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
290 | CONFIG_ZONE_DMA_FLAG=1 | ||
291 | CONFIG_BOUNCE=y | ||
292 | CONFIG_VIRT_TO_BUS=y | ||
293 | # CONFIG_KSM is not set | ||
294 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
295 | CONFIG_PPC_4K_PAGES=y | ||
296 | # CONFIG_PPC_16K_PAGES is not set | ||
297 | # CONFIG_PPC_64K_PAGES is not set | ||
298 | # CONFIG_PPC_256K_PAGES is not set | ||
299 | CONFIG_FORCE_MAX_ZONEORDER=11 | ||
300 | CONFIG_PROC_DEVICETREE=y | ||
301 | # CONFIG_CMDLINE_BOOL is not set | ||
302 | CONFIG_EXTRA_TARGETS="" | ||
303 | # CONFIG_PM is not set | ||
304 | # CONFIG_SECCOMP is not set | ||
305 | CONFIG_ISA_DMA_API=y | ||
306 | |||
307 | # | ||
308 | # Bus options | ||
309 | # | ||
310 | CONFIG_ZONE_DMA=y | ||
311 | CONFIG_NEED_DMA_MAP_STATE=y | ||
312 | CONFIG_FSL_SOC=y | ||
313 | # CONFIG_PCI is not set | ||
314 | # CONFIG_PCI_DOMAINS is not set | ||
315 | # CONFIG_PCI_SYSCALL is not set | ||
316 | # CONFIG_PCI_QSPAN is not set | ||
317 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
318 | # CONFIG_PCCARD is not set | ||
319 | # CONFIG_HAS_RAPIDIO is not set | ||
320 | |||
321 | # | ||
322 | # Advanced setup | ||
323 | # | ||
324 | # CONFIG_ADVANCED_OPTIONS is not set | ||
325 | |||
326 | # | ||
327 | # Default settings for advanced configuration options are used | ||
328 | # | ||
329 | CONFIG_LOWMEM_SIZE=0x30000000 | ||
330 | CONFIG_PAGE_OFFSET=0xc0000000 | ||
331 | CONFIG_KERNEL_START=0xc0000000 | ||
332 | CONFIG_PHYSICAL_START=0x00000000 | ||
333 | CONFIG_TASK_SIZE=0x80000000 | ||
334 | CONFIG_CONSISTENT_SIZE=0x00200000 | ||
335 | CONFIG_NET=y | ||
336 | |||
337 | # | ||
338 | # Networking options | ||
339 | # | ||
340 | CONFIG_PACKET=y | ||
341 | CONFIG_UNIX=y | ||
342 | # CONFIG_NET_KEY is not set | ||
343 | CONFIG_INET=y | ||
344 | # CONFIG_IP_MULTICAST is not set | ||
345 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
346 | CONFIG_IP_FIB_HASH=y | ||
347 | CONFIG_IP_PNP=y | ||
348 | # CONFIG_IP_PNP_DHCP is not set | ||
349 | # CONFIG_IP_PNP_BOOTP is not set | ||
350 | # CONFIG_IP_PNP_RARP is not set | ||
351 | # CONFIG_NET_IPIP is not set | ||
352 | # CONFIG_NET_IPGRE is not set | ||
353 | # CONFIG_ARPD is not set | ||
354 | CONFIG_SYN_COOKIES=y | ||
355 | # CONFIG_INET_AH is not set | ||
356 | # CONFIG_INET_ESP is not set | ||
357 | # CONFIG_INET_IPCOMP is not set | ||
358 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
359 | # CONFIG_INET_TUNNEL is not set | ||
360 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
361 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
362 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
363 | # CONFIG_INET_LRO is not set | ||
364 | CONFIG_INET_DIAG=y | ||
365 | CONFIG_INET_TCP_DIAG=y | ||
366 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
367 | CONFIG_TCP_CONG_CUBIC=y | ||
368 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
369 | # CONFIG_TCP_MD5SIG is not set | ||
370 | # CONFIG_IPV6 is not set | ||
371 | # CONFIG_NETWORK_SECMARK is not set | ||
372 | # CONFIG_NETFILTER is not set | ||
373 | # CONFIG_IP_DCCP is not set | ||
374 | # CONFIG_IP_SCTP is not set | ||
375 | # CONFIG_RDS is not set | ||
376 | # CONFIG_TIPC is not set | ||
377 | # CONFIG_ATM is not set | ||
378 | # CONFIG_BRIDGE is not set | ||
379 | # CONFIG_NET_DSA is not set | ||
380 | # CONFIG_VLAN_8021Q is not set | ||
381 | # CONFIG_DECNET is not set | ||
382 | # CONFIG_LLC2 is not set | ||
383 | # CONFIG_IPX is not set | ||
384 | # CONFIG_ATALK is not set | ||
385 | # CONFIG_X25 is not set | ||
386 | # CONFIG_LAPB is not set | ||
387 | # CONFIG_ECONET is not set | ||
388 | # CONFIG_WAN_ROUTER is not set | ||
389 | # CONFIG_PHONET is not set | ||
390 | # CONFIG_IEEE802154 is not set | ||
391 | # CONFIG_NET_SCHED is not set | ||
392 | # CONFIG_DCB is not set | ||
393 | |||
394 | # | ||
395 | # Network testing | ||
396 | # | ||
397 | # CONFIG_NET_PKTGEN is not set | ||
398 | # CONFIG_HAMRADIO is not set | ||
399 | # CONFIG_CAN is not set | ||
400 | # CONFIG_IRDA is not set | ||
401 | # CONFIG_BT is not set | ||
402 | # CONFIG_AF_RXRPC is not set | ||
403 | # CONFIG_WIRELESS is not set | ||
404 | # CONFIG_WIMAX is not set | ||
405 | # CONFIG_RFKILL is not set | ||
406 | # CONFIG_NET_9P is not set | ||
407 | |||
408 | # | ||
409 | # Device Drivers | ||
410 | # | ||
411 | |||
412 | # | ||
413 | # Generic Driver Options | ||
414 | # | ||
415 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
416 | # CONFIG_DEVTMPFS is not set | ||
417 | CONFIG_STANDALONE=y | ||
418 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
419 | # CONFIG_FW_LOADER is not set | ||
420 | # CONFIG_DEBUG_DRIVER is not set | ||
421 | # CONFIG_DEBUG_DEVRES is not set | ||
422 | # CONFIG_SYS_HYPERVISOR is not set | ||
423 | # CONFIG_CONNECTOR is not set | ||
424 | CONFIG_MTD=y | ||
425 | # CONFIG_MTD_DEBUG is not set | ||
426 | # CONFIG_MTD_TESTS is not set | ||
427 | CONFIG_MTD_CONCAT=y | ||
428 | CONFIG_MTD_PARTITIONS=y | ||
429 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
430 | CONFIG_MTD_CMDLINE_PARTS=y | ||
431 | CONFIG_MTD_OF_PARTS=y | ||
432 | # CONFIG_MTD_AR7_PARTS is not set | ||
433 | |||
434 | # | ||
435 | # User Modules And Translation Layers | ||
436 | # | ||
437 | CONFIG_MTD_CHAR=y | ||
438 | CONFIG_MTD_BLKDEVS=y | ||
439 | CONFIG_MTD_BLOCK=y | ||
440 | # CONFIG_FTL is not set | ||
441 | # CONFIG_NFTL is not set | ||
442 | # CONFIG_INFTL is not set | ||
443 | # CONFIG_RFD_FTL is not set | ||
444 | # CONFIG_SSFDC is not set | ||
445 | # CONFIG_MTD_OOPS is not set | ||
446 | |||
447 | # | ||
448 | # RAM/ROM/Flash chip drivers | ||
449 | # | ||
450 | CONFIG_MTD_CFI=y | ||
451 | # CONFIG_MTD_JEDECPROBE is not set | ||
452 | CONFIG_MTD_GEN_PROBE=y | ||
453 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
454 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
455 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
456 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
457 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
458 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
459 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
460 | CONFIG_MTD_CFI_I1=y | ||
461 | CONFIG_MTD_CFI_I2=y | ||
462 | # CONFIG_MTD_CFI_I4 is not set | ||
463 | # CONFIG_MTD_CFI_I8 is not set | ||
464 | CONFIG_MTD_CFI_INTELEXT=y | ||
465 | CONFIG_MTD_CFI_AMDSTD=y | ||
466 | # CONFIG_MTD_CFI_STAA is not set | ||
467 | CONFIG_MTD_CFI_UTIL=y | ||
468 | # CONFIG_MTD_RAM is not set | ||
469 | # CONFIG_MTD_ROM is not set | ||
470 | # CONFIG_MTD_ABSENT is not set | ||
471 | |||
472 | # | ||
473 | # Mapping drivers for chip access | ||
474 | # | ||
475 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
476 | # CONFIG_MTD_PHYSMAP is not set | ||
477 | CONFIG_MTD_PHYSMAP_OF=y | ||
478 | # CONFIG_MTD_CFI_FLAGADM is not set | ||
479 | # CONFIG_MTD_PLATRAM is not set | ||
480 | |||
481 | # | ||
482 | # Self-contained MTD device drivers | ||
483 | # | ||
484 | # CONFIG_MTD_SLRAM is not set | ||
485 | # CONFIG_MTD_PHRAM is not set | ||
486 | # CONFIG_MTD_MTDRAM is not set | ||
487 | # CONFIG_MTD_BLOCK2MTD is not set | ||
488 | |||
489 | # | ||
490 | # Disk-On-Chip Device Drivers | ||
491 | # | ||
492 | # CONFIG_MTD_DOC2000 is not set | ||
493 | # CONFIG_MTD_DOC2001 is not set | ||
494 | # CONFIG_MTD_DOC2001PLUS is not set | ||
495 | # CONFIG_MTD_NAND is not set | ||
496 | # CONFIG_MTD_ONENAND is not set | ||
497 | |||
498 | # | ||
499 | # LPDDR flash memory drivers | ||
500 | # | ||
501 | # CONFIG_MTD_LPDDR is not set | ||
502 | |||
503 | # | ||
504 | # UBI - Unsorted block images | ||
505 | # | ||
506 | # CONFIG_MTD_UBI is not set | ||
507 | CONFIG_OF_FLATTREE=y | ||
508 | CONFIG_OF_DYNAMIC=y | ||
509 | CONFIG_OF_DEVICE=y | ||
510 | CONFIG_OF_MDIO=y | ||
511 | # CONFIG_PARPORT is not set | ||
512 | # CONFIG_BLK_DEV is not set | ||
513 | # CONFIG_MISC_DEVICES is not set | ||
514 | CONFIG_HAVE_IDE=y | ||
515 | # CONFIG_IDE is not set | ||
516 | |||
517 | # | ||
518 | # SCSI device support | ||
519 | # | ||
520 | # CONFIG_RAID_ATTRS is not set | ||
521 | # CONFIG_SCSI is not set | ||
522 | # CONFIG_SCSI_DMA is not set | ||
523 | # CONFIG_SCSI_NETLINK is not set | ||
524 | # CONFIG_ATA is not set | ||
525 | # CONFIG_MD is not set | ||
526 | # CONFIG_MACINTOSH_DRIVERS is not set | ||
527 | CONFIG_NETDEVICES=y | ||
528 | # CONFIG_DUMMY is not set | ||
529 | # CONFIG_BONDING is not set | ||
530 | # CONFIG_MACVLAN is not set | ||
531 | # CONFIG_EQUALIZER is not set | ||
532 | # CONFIG_TUN is not set | ||
533 | # CONFIG_VETH is not set | ||
534 | CONFIG_PHYLIB=y | ||
535 | |||
536 | # | ||
537 | # MII PHY device drivers | ||
538 | # | ||
539 | # CONFIG_MARVELL_PHY is not set | ||
540 | CONFIG_DAVICOM_PHY=y | ||
541 | # CONFIG_QSEMI_PHY is not set | ||
542 | # CONFIG_LXT_PHY is not set | ||
543 | # CONFIG_CICADA_PHY is not set | ||
544 | # CONFIG_VITESSE_PHY is not set | ||
545 | # CONFIG_SMSC_PHY is not set | ||
546 | # CONFIG_BROADCOM_PHY is not set | ||
547 | # CONFIG_ICPLUS_PHY is not set | ||
548 | # CONFIG_REALTEK_PHY is not set | ||
549 | # CONFIG_NATIONAL_PHY is not set | ||
550 | # CONFIG_STE10XP is not set | ||
551 | # CONFIG_LSI_ET1011C_PHY is not set | ||
552 | CONFIG_FIXED_PHY=y | ||
553 | # CONFIG_MDIO_BITBANG is not set | ||
554 | CONFIG_NET_ETHERNET=y | ||
555 | CONFIG_MII=y | ||
556 | # CONFIG_ETHOC is not set | ||
557 | # CONFIG_DNET is not set | ||
558 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
559 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
560 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
561 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
562 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
563 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
564 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
565 | # CONFIG_B44 is not set | ||
566 | # CONFIG_KS8842 is not set | ||
567 | # CONFIG_KS8851_MLL is not set | ||
568 | # CONFIG_XILINX_EMACLITE is not set | ||
569 | CONFIG_FS_ENET=y | ||
570 | CONFIG_FS_ENET_HAS_SCC=y | ||
571 | CONFIG_FS_ENET_HAS_FEC=y | ||
572 | CONFIG_FS_ENET_MDIO_FEC=y | ||
573 | # CONFIG_NETDEV_1000 is not set | ||
574 | # CONFIG_NETDEV_10000 is not set | ||
575 | # CONFIG_WLAN is not set | ||
576 | |||
577 | # | ||
578 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
579 | # | ||
580 | # CONFIG_WAN is not set | ||
581 | # CONFIG_PPP is not set | ||
582 | # CONFIG_SLIP is not set | ||
583 | # CONFIG_NETCONSOLE is not set | ||
584 | # CONFIG_NETPOLL is not set | ||
585 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
586 | # CONFIG_ISDN is not set | ||
587 | # CONFIG_PHONE is not set | ||
588 | |||
589 | # | ||
590 | # Input device support | ||
591 | # | ||
592 | # CONFIG_INPUT is not set | ||
593 | |||
594 | # | ||
595 | # Hardware I/O ports | ||
596 | # | ||
597 | # CONFIG_SERIO is not set | ||
598 | # CONFIG_GAMEPORT is not set | ||
599 | |||
600 | # | ||
601 | # Character devices | ||
602 | # | ||
603 | # CONFIG_VT is not set | ||
604 | CONFIG_DEVKMEM=y | ||
605 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
606 | |||
607 | # | ||
608 | # Serial drivers | ||
609 | # | ||
610 | # CONFIG_SERIAL_8250 is not set | ||
611 | |||
612 | # | ||
613 | # Non-8250 serial port support | ||
614 | # | ||
615 | # CONFIG_SERIAL_UARTLITE is not set | ||
616 | CONFIG_SERIAL_CORE=y | ||
617 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
618 | CONFIG_SERIAL_CPM=y | ||
619 | CONFIG_SERIAL_CPM_CONSOLE=y | ||
620 | # CONFIG_SERIAL_TIMBERDALE is not set | ||
621 | # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set | ||
622 | CONFIG_UNIX98_PTYS=y | ||
623 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
624 | # CONFIG_LEGACY_PTYS is not set | ||
625 | # CONFIG_HVC_UDBG is not set | ||
626 | # CONFIG_IPMI_HANDLER is not set | ||
627 | CONFIG_HW_RANDOM=y | ||
628 | # CONFIG_HW_RANDOM_TIMERIOMEM is not set | ||
629 | # CONFIG_NVRAM is not set | ||
630 | CONFIG_GEN_RTC=y | ||
631 | # CONFIG_GEN_RTC_X is not set | ||
632 | # CONFIG_R3964 is not set | ||
633 | # CONFIG_RAW_DRIVER is not set | ||
634 | # CONFIG_TCG_TPM is not set | ||
635 | # CONFIG_I2C is not set | ||
636 | # CONFIG_SPI is not set | ||
637 | |||
638 | # | ||
639 | # PPS support | ||
640 | # | ||
641 | # CONFIG_PPS is not set | ||
642 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | ||
643 | # CONFIG_GPIOLIB is not set | ||
644 | # CONFIG_W1 is not set | ||
645 | # CONFIG_POWER_SUPPLY is not set | ||
646 | # CONFIG_HWMON is not set | ||
647 | # CONFIG_THERMAL is not set | ||
648 | # CONFIG_WATCHDOG is not set | ||
649 | CONFIG_SSB_POSSIBLE=y | ||
650 | |||
651 | # | ||
652 | # Sonics Silicon Backplane | ||
653 | # | ||
654 | # CONFIG_SSB is not set | ||
655 | |||
656 | # | ||
657 | # Multifunction device drivers | ||
658 | # | ||
659 | # CONFIG_MFD_CORE is not set | ||
660 | # CONFIG_MFD_SM501 is not set | ||
661 | # CONFIG_HTC_PASIC3 is not set | ||
662 | # CONFIG_MFD_TMIO is not set | ||
663 | # CONFIG_REGULATOR is not set | ||
664 | # CONFIG_MEDIA_SUPPORT is not set | ||
665 | |||
666 | # | ||
667 | # Graphics support | ||
668 | # | ||
669 | # CONFIG_VGASTATE is not set | ||
670 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
671 | # CONFIG_FB is not set | ||
672 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
673 | |||
674 | # | ||
675 | # Display device support | ||
676 | # | ||
677 | # CONFIG_DISPLAY_SUPPORT is not set | ||
678 | # CONFIG_SOUND is not set | ||
679 | # CONFIG_USB_SUPPORT is not set | ||
680 | # CONFIG_MMC is not set | ||
681 | # CONFIG_MEMSTICK is not set | ||
682 | # CONFIG_NEW_LEDS is not set | ||
683 | # CONFIG_ACCESSIBILITY is not set | ||
684 | # CONFIG_EDAC is not set | ||
685 | # CONFIG_RTC_CLASS is not set | ||
686 | # CONFIG_DMADEVICES is not set | ||
687 | # CONFIG_AUXDISPLAY is not set | ||
688 | # CONFIG_UIO is not set | ||
689 | |||
690 | # | ||
691 | # TI VLYNQ | ||
692 | # | ||
693 | # CONFIG_STAGING is not set | ||
694 | |||
695 | # | ||
696 | # File systems | ||
697 | # | ||
698 | # CONFIG_EXT2_FS is not set | ||
699 | # CONFIG_EXT3_FS is not set | ||
700 | # CONFIG_EXT4_FS is not set | ||
701 | # CONFIG_REISERFS_FS is not set | ||
702 | # CONFIG_JFS_FS is not set | ||
703 | # CONFIG_FS_POSIX_ACL is not set | ||
704 | # CONFIG_XFS_FS is not set | ||
705 | # CONFIG_GFS2_FS is not set | ||
706 | # CONFIG_OCFS2_FS is not set | ||
707 | # CONFIG_BTRFS_FS is not set | ||
708 | # CONFIG_NILFS2_FS is not set | ||
709 | CONFIG_FILE_LOCKING=y | ||
710 | CONFIG_FSNOTIFY=y | ||
711 | # CONFIG_DNOTIFY is not set | ||
712 | # CONFIG_INOTIFY is not set | ||
713 | CONFIG_INOTIFY_USER=y | ||
714 | # CONFIG_QUOTA is not set | ||
715 | # CONFIG_AUTOFS_FS is not set | ||
716 | # CONFIG_AUTOFS4_FS is not set | ||
717 | # CONFIG_FUSE_FS is not set | ||
718 | |||
719 | # | ||
720 | # Caches | ||
721 | # | ||
722 | # CONFIG_FSCACHE is not set | ||
723 | |||
724 | # | ||
725 | # CD-ROM/DVD Filesystems | ||
726 | # | ||
727 | # CONFIG_ISO9660_FS is not set | ||
728 | # CONFIG_UDF_FS is not set | ||
729 | |||
730 | # | ||
731 | # DOS/FAT/NT Filesystems | ||
732 | # | ||
733 | # CONFIG_MSDOS_FS is not set | ||
734 | # CONFIG_VFAT_FS is not set | ||
735 | # CONFIG_NTFS_FS is not set | ||
736 | |||
737 | # | ||
738 | # Pseudo filesystems | ||
739 | # | ||
740 | CONFIG_PROC_FS=y | ||
741 | # CONFIG_PROC_KCORE is not set | ||
742 | CONFIG_PROC_SYSCTL=y | ||
743 | CONFIG_PROC_PAGE_MONITOR=y | ||
744 | CONFIG_SYSFS=y | ||
745 | CONFIG_TMPFS=y | ||
746 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
747 | # CONFIG_HUGETLB_PAGE is not set | ||
748 | # CONFIG_CONFIGFS_FS is not set | ||
749 | CONFIG_MISC_FILESYSTEMS=y | ||
750 | # CONFIG_ADFS_FS is not set | ||
751 | # CONFIG_AFFS_FS is not set | ||
752 | # CONFIG_HFS_FS is not set | ||
753 | # CONFIG_HFSPLUS_FS is not set | ||
754 | # CONFIG_BEFS_FS is not set | ||
755 | # CONFIG_BFS_FS is not set | ||
756 | # CONFIG_EFS_FS is not set | ||
757 | # CONFIG_JFFS2_FS is not set | ||
758 | # CONFIG_LOGFS is not set | ||
759 | CONFIG_CRAMFS=y | ||
760 | # CONFIG_SQUASHFS is not set | ||
761 | # CONFIG_VXFS_FS is not set | ||
762 | # CONFIG_MINIX_FS is not set | ||
763 | # CONFIG_OMFS_FS is not set | ||
764 | # CONFIG_HPFS_FS is not set | ||
765 | # CONFIG_QNX4FS_FS is not set | ||
766 | # CONFIG_ROMFS_FS is not set | ||
767 | # CONFIG_SYSV_FS is not set | ||
768 | # CONFIG_UFS_FS is not set | ||
769 | CONFIG_NETWORK_FILESYSTEMS=y | ||
770 | CONFIG_NFS_FS=y | ||
771 | CONFIG_NFS_V3=y | ||
772 | # CONFIG_NFS_V3_ACL is not set | ||
773 | # CONFIG_NFS_V4 is not set | ||
774 | CONFIG_ROOT_NFS=y | ||
775 | # CONFIG_NFSD is not set | ||
776 | CONFIG_LOCKD=y | ||
777 | CONFIG_LOCKD_V4=y | ||
778 | CONFIG_NFS_COMMON=y | ||
779 | CONFIG_SUNRPC=y | ||
780 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
781 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
782 | # CONFIG_SMB_FS is not set | ||
783 | # CONFIG_CIFS is not set | ||
784 | # CONFIG_NCP_FS is not set | ||
785 | # CONFIG_CODA_FS is not set | ||
786 | # CONFIG_AFS_FS is not set | ||
787 | |||
788 | # | ||
789 | # Partition Types | ||
790 | # | ||
791 | CONFIG_PARTITION_ADVANCED=y | ||
792 | # CONFIG_ACORN_PARTITION is not set | ||
793 | # CONFIG_OSF_PARTITION is not set | ||
794 | # CONFIG_AMIGA_PARTITION is not set | ||
795 | # CONFIG_ATARI_PARTITION is not set | ||
796 | # CONFIG_MAC_PARTITION is not set | ||
797 | CONFIG_MSDOS_PARTITION=y | ||
798 | # CONFIG_BSD_DISKLABEL is not set | ||
799 | # CONFIG_MINIX_SUBPARTITION is not set | ||
800 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
801 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
802 | # CONFIG_LDM_PARTITION is not set | ||
803 | # CONFIG_SGI_PARTITION is not set | ||
804 | # CONFIG_ULTRIX_PARTITION is not set | ||
805 | # CONFIG_SUN_PARTITION is not set | ||
806 | # CONFIG_KARMA_PARTITION is not set | ||
807 | # CONFIG_EFI_PARTITION is not set | ||
808 | # CONFIG_SYSV68_PARTITION is not set | ||
809 | # CONFIG_NLS is not set | ||
810 | # CONFIG_DLM is not set | ||
811 | # CONFIG_BINARY_PRINTF is not set | ||
812 | |||
813 | # | ||
814 | # Library routines | ||
815 | # | ||
816 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
817 | # CONFIG_CRC_CCITT is not set | ||
818 | # CONFIG_CRC16 is not set | ||
819 | # CONFIG_CRC_T10DIF is not set | ||
820 | # CONFIG_CRC_ITU_T is not set | ||
821 | # CONFIG_CRC32 is not set | ||
822 | # CONFIG_CRC7 is not set | ||
823 | # CONFIG_LIBCRC32C is not set | ||
824 | CONFIG_ZLIB_INFLATE=y | ||
825 | CONFIG_HAS_IOMEM=y | ||
826 | CONFIG_HAS_IOPORT=y | ||
827 | CONFIG_HAS_DMA=y | ||
828 | CONFIG_HAVE_LMB=y | ||
829 | CONFIG_NLATTR=y | ||
830 | CONFIG_GENERIC_ATOMIC64=y | ||
831 | |||
832 | # | ||
833 | # Kernel hacking | ||
834 | # | ||
835 | # CONFIG_PRINTK_TIME is not set | ||
836 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
837 | CONFIG_ENABLE_MUST_CHECK=y | ||
838 | CONFIG_FRAME_WARN=1024 | ||
839 | CONFIG_MAGIC_SYSRQ=y | ||
840 | # CONFIG_STRIP_ASM_SYMS is not set | ||
841 | # CONFIG_UNUSED_SYMBOLS is not set | ||
842 | # CONFIG_DEBUG_FS is not set | ||
843 | # CONFIG_HEADERS_CHECK is not set | ||
844 | CONFIG_DEBUG_KERNEL=y | ||
845 | # CONFIG_DEBUG_SHIRQ is not set | ||
846 | CONFIG_DETECT_SOFTLOCKUP=y | ||
847 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | ||
848 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | ||
849 | CONFIG_DETECT_HUNG_TASK=y | ||
850 | # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set | ||
851 | CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 | ||
852 | CONFIG_SCHED_DEBUG=y | ||
853 | # CONFIG_SCHEDSTATS is not set | ||
854 | # CONFIG_TIMER_STATS is not set | ||
855 | # CONFIG_DEBUG_OBJECTS is not set | ||
856 | # CONFIG_SLUB_DEBUG_ON is not set | ||
857 | # CONFIG_SLUB_STATS is not set | ||
858 | # CONFIG_DEBUG_KMEMLEAK is not set | ||
859 | # CONFIG_DEBUG_SPINLOCK is not set | ||
860 | # CONFIG_DEBUG_MUTEXES is not set | ||
861 | # CONFIG_DEBUG_LOCK_ALLOC is not set | ||
862 | # CONFIG_PROVE_LOCKING is not set | ||
863 | # CONFIG_LOCK_STAT is not set | ||
864 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
865 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
866 | # CONFIG_DEBUG_KOBJECT is not set | ||
867 | CONFIG_DEBUG_BUGVERBOSE=y | ||
868 | CONFIG_DEBUG_INFO=y | ||
869 | # CONFIG_DEBUG_VM is not set | ||
870 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
871 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
872 | # CONFIG_DEBUG_LIST is not set | ||
873 | # CONFIG_DEBUG_SG is not set | ||
874 | # CONFIG_DEBUG_NOTIFIERS is not set | ||
875 | # CONFIG_DEBUG_CREDENTIALS is not set | ||
876 | # CONFIG_RCU_TORTURE_TEST is not set | ||
877 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
878 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
879 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
880 | # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set | ||
881 | # CONFIG_FAULT_INJECTION is not set | ||
882 | # CONFIG_LATENCYTOP is not set | ||
883 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
884 | # CONFIG_DEBUG_PAGEALLOC is not set | ||
885 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
886 | CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y | ||
887 | CONFIG_HAVE_DYNAMIC_FTRACE=y | ||
888 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | ||
889 | CONFIG_TRACING_SUPPORT=y | ||
890 | CONFIG_FTRACE=y | ||
891 | # CONFIG_FUNCTION_TRACER is not set | ||
892 | # CONFIG_IRQSOFF_TRACER is not set | ||
893 | # CONFIG_SCHED_TRACER is not set | ||
894 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set | ||
895 | # CONFIG_BOOT_TRACER is not set | ||
896 | CONFIG_BRANCH_PROFILE_NONE=y | ||
897 | # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set | ||
898 | # CONFIG_PROFILE_ALL_BRANCHES is not set | ||
899 | # CONFIG_STACK_TRACER is not set | ||
900 | # CONFIG_KMEMTRACE is not set | ||
901 | # CONFIG_WORKQUEUE_TRACER is not set | ||
902 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
903 | # CONFIG_DMA_API_DEBUG is not set | ||
904 | # CONFIG_SAMPLES is not set | ||
905 | CONFIG_HAVE_ARCH_KGDB=y | ||
906 | # CONFIG_KGDB is not set | ||
907 | # CONFIG_PPC_DISABLE_WERROR is not set | ||
908 | CONFIG_PPC_WERROR=y | ||
909 | CONFIG_PRINT_STACK_DEPTH=64 | ||
910 | # CONFIG_DEBUG_STACKOVERFLOW is not set | ||
911 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
912 | # CONFIG_CODE_PATCHING_SELFTEST is not set | ||
913 | # CONFIG_FTR_FIXUP_SELFTEST is not set | ||
914 | # CONFIG_MSI_BITMAP_SELFTEST is not set | ||
915 | # CONFIG_XMON is not set | ||
916 | # CONFIG_IRQSTACKS is not set | ||
917 | # CONFIG_BDI_SWITCH is not set | ||
918 | # CONFIG_PPC_EARLY_DEBUG is not set | ||
919 | |||
920 | # | ||
921 | # Security options | ||
922 | # | ||
923 | # CONFIG_KEYS is not set | ||
924 | # CONFIG_SECURITY is not set | ||
925 | # CONFIG_SECURITYFS is not set | ||
926 | # CONFIG_DEFAULT_SECURITY_SELINUX is not set | ||
927 | # CONFIG_DEFAULT_SECURITY_SMACK is not set | ||
928 | # CONFIG_DEFAULT_SECURITY_TOMOYO is not set | ||
929 | CONFIG_DEFAULT_SECURITY_DAC=y | ||
930 | CONFIG_DEFAULT_SECURITY="" | ||
931 | # CONFIG_CRYPTO is not set | ||
932 | CONFIG_PPC_CLOCK=y | ||
933 | CONFIG_PPC_LIB_RHEAP=y | ||
934 | # CONFIG_VIRTUALIZATION is not set | ||
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig index f49a2548c5f..021763a32c2 100644 --- a/arch/powerpc/platforms/83xx/Kconfig +++ b/arch/powerpc/platforms/83xx/Kconfig | |||
@@ -9,6 +9,14 @@ menuconfig PPC_83xx | |||
9 | 9 | ||
10 | if PPC_83xx | 10 | if PPC_83xx |
11 | 11 | ||
12 | config MPC830x_RDB | ||
13 | bool "Freescale MPC830x RDB" | ||
14 | select DEFAULT_UIMAGE | ||
15 | select PPC_MPC831x | ||
16 | select FSL_GTM | ||
17 | help | ||
18 | This option enables support for the MPC8308 RDB board. | ||
19 | |||
12 | config MPC831x_RDB | 20 | config MPC831x_RDB |
13 | bool "Freescale MPC831x RDB" | 21 | bool "Freescale MPC831x RDB" |
14 | select DEFAULT_UIMAGE | 22 | select DEFAULT_UIMAGE |
diff --git a/arch/powerpc/platforms/83xx/Makefile b/arch/powerpc/platforms/83xx/Makefile index e139c36572e..6e8bbbbcfdf 100644 --- a/arch/powerpc/platforms/83xx/Makefile +++ b/arch/powerpc/platforms/83xx/Makefile | |||
@@ -4,6 +4,7 @@ | |||
4 | obj-y := misc.o usb.o | 4 | obj-y := misc.o usb.o |
5 | obj-$(CONFIG_SUSPEND) += suspend.o suspend-asm.o | 5 | obj-$(CONFIG_SUSPEND) += suspend.o suspend-asm.o |
6 | obj-$(CONFIG_MCU_MPC8349EMITX) += mcu_mpc8349emitx.o | 6 | obj-$(CONFIG_MCU_MPC8349EMITX) += mcu_mpc8349emitx.o |
7 | obj-$(CONFIG_MPC830x_RDB) += mpc830x_rdb.o | ||
7 | obj-$(CONFIG_MPC831x_RDB) += mpc831x_rdb.o | 8 | obj-$(CONFIG_MPC831x_RDB) += mpc831x_rdb.o |
8 | obj-$(CONFIG_MPC832x_RDB) += mpc832x_rdb.o | 9 | obj-$(CONFIG_MPC832x_RDB) += mpc832x_rdb.o |
9 | obj-$(CONFIG_MPC834x_MDS) += mpc834x_mds.o | 10 | obj-$(CONFIG_MPC834x_MDS) += mpc834x_mds.o |
diff --git a/arch/powerpc/platforms/83xx/mpc830x_rdb.c b/arch/powerpc/platforms/83xx/mpc830x_rdb.c new file mode 100644 index 00000000000..ac102ee9abe --- /dev/null +++ b/arch/powerpc/platforms/83xx/mpc830x_rdb.c | |||
@@ -0,0 +1,94 @@ | |||
1 | /* | ||
2 | * arch/powerpc/platforms/83xx/mpc830x_rdb.c | ||
3 | * | ||
4 | * Description: MPC830x RDB board specific routines. | ||
5 | * This file is based on mpc831x_rdb.c | ||
6 | * | ||
7 | * Copyright (C) Freescale Semiconductor, Inc. 2009. All rights reserved. | ||
8 | * Copyright (C) 2010. Ilya Yanok, Emcraft Systems, yanok@emcraft.com | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify it | ||
11 | * under the terms of the GNU General Public License as published by the | ||
12 | * Free Software Foundation; either version 2 of the License, or (at your | ||
13 | * option) any later version. | ||
14 | */ | ||
15 | |||
16 | #include <linux/pci.h> | ||
17 | #include <linux/of_platform.h> | ||
18 | #include <asm/time.h> | ||
19 | #include <asm/ipic.h> | ||
20 | #include <asm/udbg.h> | ||
21 | #include <sysdev/fsl_pci.h> | ||
22 | #include <sysdev/fsl_soc.h> | ||
23 | #include "mpc83xx.h" | ||
24 | |||
25 | /* | ||
26 | * Setup the architecture | ||
27 | */ | ||
28 | static void __init mpc830x_rdb_setup_arch(void) | ||
29 | { | ||
30 | #ifdef CONFIG_PCI | ||
31 | struct device_node *np; | ||
32 | #endif | ||
33 | |||
34 | if (ppc_md.progress) | ||
35 | ppc_md.progress("mpc830x_rdb_setup_arch()", 0); | ||
36 | |||
37 | #ifdef CONFIG_PCI | ||
38 | for_each_compatible_node(np, "pci", "fsl,mpc8308-pcie") | ||
39 | mpc83xx_add_bridge(np); | ||
40 | #endif | ||
41 | mpc831x_usb_cfg(); | ||
42 | } | ||
43 | |||
44 | static void __init mpc830x_rdb_init_IRQ(void) | ||
45 | { | ||
46 | struct device_node *np; | ||
47 | |||
48 | np = of_find_node_by_type(NULL, "ipic"); | ||
49 | if (!np) | ||
50 | return; | ||
51 | |||
52 | ipic_init(np, 0); | ||
53 | |||
54 | /* Initialize the default interrupt mapping priorities, | ||
55 | * in case the boot rom changed something on us. | ||
56 | */ | ||
57 | ipic_set_default_priority(); | ||
58 | } | ||
59 | |||
60 | /* | ||
61 | * Called very early, MMU is off, device-tree isn't unflattened | ||
62 | */ | ||
63 | static int __init mpc830x_rdb_probe(void) | ||
64 | { | ||
65 | unsigned long root = of_get_flat_dt_root(); | ||
66 | |||
67 | return of_flat_dt_is_compatible(root, "MPC8308RDB") || | ||
68 | of_flat_dt_is_compatible(root, "fsl,mpc8308rdb"); | ||
69 | } | ||
70 | |||
71 | static struct of_device_id __initdata of_bus_ids[] = { | ||
72 | { .compatible = "simple-bus" }, | ||
73 | { .compatible = "gianfar" }, | ||
74 | {}, | ||
75 | }; | ||
76 | |||
77 | static int __init declare_of_platform_devices(void) | ||
78 | { | ||
79 | of_platform_bus_probe(NULL, of_bus_ids, NULL); | ||
80 | return 0; | ||
81 | } | ||
82 | machine_device_initcall(mpc830x_rdb, declare_of_platform_devices); | ||
83 | |||
84 | define_machine(mpc830x_rdb) { | ||
85 | .name = "MPC830x RDB", | ||
86 | .probe = mpc830x_rdb_probe, | ||
87 | .setup_arch = mpc830x_rdb_setup_arch, | ||
88 | .init_IRQ = mpc830x_rdb_init_IRQ, | ||
89 | .get_irq = ipic_get_irq, | ||
90 | .restart = mpc83xx_restart, | ||
91 | .time_init = mpc83xx_time_init, | ||
92 | .calibrate_decr = generic_calibrate_decr, | ||
93 | .progress = udbg_progress, | ||
94 | }; | ||
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig index 3a2ade2e443..bea1f5905ad 100644 --- a/arch/powerpc/platforms/85xx/Kconfig +++ b/arch/powerpc/platforms/85xx/Kconfig | |||
@@ -65,6 +65,14 @@ config MPC85xx_RDB | |||
65 | help | 65 | help |
66 | This option enables support for the MPC85xx RDB (P2020 RDB) board | 66 | This option enables support for the MPC85xx RDB (P2020 RDB) board |
67 | 67 | ||
68 | config P1022_DS | ||
69 | bool "Freescale P1022 DS" | ||
70 | select DEFAULT_UIMAGE | ||
71 | select CONFIG_PHYS_64BIT # The DTS has 36-bit addresses | ||
72 | select SWIOTLB | ||
73 | help | ||
74 | This option enables support for the Freescale P1022DS reference board. | ||
75 | |||
68 | config SOCRATES | 76 | config SOCRATES |
69 | bool "Socrates" | 77 | bool "Socrates" |
70 | select DEFAULT_UIMAGE | 78 | select DEFAULT_UIMAGE |
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile index 387c128f2c8..a2ec3f8f4d0 100644 --- a/arch/powerpc/platforms/85xx/Makefile +++ b/arch/powerpc/platforms/85xx/Makefile | |||
@@ -10,6 +10,7 @@ obj-$(CONFIG_MPC8536_DS) += mpc8536_ds.o | |||
10 | obj-$(CONFIG_MPC85xx_DS) += mpc85xx_ds.o | 10 | obj-$(CONFIG_MPC85xx_DS) += mpc85xx_ds.o |
11 | obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o | 11 | obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o |
12 | obj-$(CONFIG_MPC85xx_RDB) += mpc85xx_rdb.o | 12 | obj-$(CONFIG_MPC85xx_RDB) += mpc85xx_rdb.o |
13 | obj-$(CONFIG_P1022_DS) += p1022_ds.o | ||
13 | obj-$(CONFIG_P4080_DS) += p4080_ds.o corenet_ds.o | 14 | obj-$(CONFIG_P4080_DS) += p4080_ds.o corenet_ds.o |
14 | obj-$(CONFIG_STX_GP3) += stx_gp3.o | 15 | obj-$(CONFIG_STX_GP3) += stx_gp3.o |
15 | obj-$(CONFIG_TQM85xx) += tqm85xx.o | 16 | obj-$(CONFIG_TQM85xx) += tqm85xx.o |
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c index 494513682d7..da64be19d09 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c | |||
@@ -158,51 +158,108 @@ static int mpc8568_mds_phy_fixups(struct phy_device *phydev) | |||
158 | extern void __init mpc85xx_smp_init(void); | 158 | extern void __init mpc85xx_smp_init(void); |
159 | #endif | 159 | #endif |
160 | 160 | ||
161 | static void __init mpc85xx_mds_setup_arch(void) | 161 | #ifdef CONFIG_QUICC_ENGINE |
162 | static struct of_device_id mpc85xx_qe_ids[] __initdata = { | ||
163 | { .type = "qe", }, | ||
164 | { .compatible = "fsl,qe", }, | ||
165 | { }, | ||
166 | }; | ||
167 | |||
168 | static void __init mpc85xx_publish_qe_devices(void) | ||
162 | { | 169 | { |
163 | struct device_node *np; | 170 | struct device_node *np; |
164 | static u8 __iomem *bcsr_regs = NULL; | ||
165 | #ifdef CONFIG_PCI | ||
166 | struct pci_controller *hose; | ||
167 | #endif | ||
168 | dma_addr_t max = 0xffffffff; | ||
169 | 171 | ||
170 | if (ppc_md.progress) | 172 | np = of_find_compatible_node(NULL, NULL, "fsl,qe"); |
171 | ppc_md.progress("mpc85xx_mds_setup_arch()", 0); | 173 | if (!of_device_is_available(np)) { |
174 | of_node_put(np); | ||
175 | return; | ||
176 | } | ||
177 | |||
178 | of_platform_bus_probe(NULL, mpc85xx_qe_ids, NULL); | ||
179 | } | ||
180 | |||
181 | static void __init mpc85xx_mds_reset_ucc_phys(void) | ||
182 | { | ||
183 | struct device_node *np; | ||
184 | static u8 __iomem *bcsr_regs; | ||
172 | 185 | ||
173 | /* Map BCSR area */ | 186 | /* Map BCSR area */ |
174 | np = of_find_node_by_name(NULL, "bcsr"); | 187 | np = of_find_node_by_name(NULL, "bcsr"); |
175 | if (np != NULL) { | 188 | if (!np) |
176 | struct resource res; | 189 | return; |
177 | 190 | ||
178 | of_address_to_resource(np, 0, &res); | 191 | bcsr_regs = of_iomap(np, 0); |
179 | bcsr_regs = ioremap(res.start, res.end - res.start +1); | 192 | of_node_put(np); |
180 | of_node_put(np); | 193 | if (!bcsr_regs) |
181 | } | 194 | return; |
182 | 195 | ||
183 | #ifdef CONFIG_PCI | 196 | if (machine_is(mpc8568_mds)) { |
184 | for_each_node_by_type(np, "pci") { | 197 | #define BCSR_UCC1_GETH_EN (0x1 << 7) |
185 | if (of_device_is_compatible(np, "fsl,mpc8540-pci") || | 198 | #define BCSR_UCC2_GETH_EN (0x1 << 7) |
186 | of_device_is_compatible(np, "fsl,mpc8548-pcie")) { | 199 | #define BCSR_UCC1_MODE_MSK (0x3 << 4) |
187 | struct resource rsrc; | 200 | #define BCSR_UCC2_MODE_MSK (0x3 << 0) |
188 | of_address_to_resource(np, 0, &rsrc); | ||
189 | if ((rsrc.start & 0xfffff) == 0x8000) | ||
190 | fsl_add_bridge(np, 1); | ||
191 | else | ||
192 | fsl_add_bridge(np, 0); | ||
193 | 201 | ||
194 | hose = pci_find_hose_for_OF_device(np); | 202 | /* Turn off UCC1 & UCC2 */ |
195 | max = min(max, hose->dma_window_base_cur + | 203 | clrbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN); |
196 | hose->dma_window_size); | 204 | clrbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN); |
205 | |||
206 | /* Mode is RGMII, all bits clear */ | ||
207 | clrbits8(&bcsr_regs[11], BCSR_UCC1_MODE_MSK | | ||
208 | BCSR_UCC2_MODE_MSK); | ||
209 | |||
210 | /* Turn UCC1 & UCC2 on */ | ||
211 | setbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN); | ||
212 | setbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN); | ||
213 | } else if (machine_is(mpc8569_mds)) { | ||
214 | #define BCSR7_UCC12_GETHnRST (0x1 << 2) | ||
215 | #define BCSR8_UEM_MARVELL_RST (0x1 << 1) | ||
216 | #define BCSR_UCC_RGMII (0x1 << 6) | ||
217 | #define BCSR_UCC_RTBI (0x1 << 5) | ||
218 | /* | ||
219 | * U-Boot mangles interrupt polarity for Marvell PHYs, | ||
220 | * so reset built-in and UEM Marvell PHYs, this puts | ||
221 | * the PHYs into their normal state. | ||
222 | */ | ||
223 | clrbits8(&bcsr_regs[7], BCSR7_UCC12_GETHnRST); | ||
224 | setbits8(&bcsr_regs[8], BCSR8_UEM_MARVELL_RST); | ||
225 | |||
226 | setbits8(&bcsr_regs[7], BCSR7_UCC12_GETHnRST); | ||
227 | clrbits8(&bcsr_regs[8], BCSR8_UEM_MARVELL_RST); | ||
228 | |||
229 | for (np = NULL; (np = of_find_compatible_node(np, | ||
230 | "network", | ||
231 | "ucc_geth")) != NULL;) { | ||
232 | const unsigned int *prop; | ||
233 | int ucc_num; | ||
234 | |||
235 | prop = of_get_property(np, "cell-index", NULL); | ||
236 | if (prop == NULL) | ||
237 | continue; | ||
238 | |||
239 | ucc_num = *prop - 1; | ||
240 | |||
241 | prop = of_get_property(np, "phy-connection-type", NULL); | ||
242 | if (prop == NULL) | ||
243 | continue; | ||
244 | |||
245 | if (strcmp("rtbi", (const char *)prop) == 0) | ||
246 | clrsetbits_8(&bcsr_regs[7 + ucc_num], | ||
247 | BCSR_UCC_RGMII, BCSR_UCC_RTBI); | ||
197 | } | 248 | } |
249 | } else if (machine_is(p1021_mds)) { | ||
250 | #define BCSR11_ENET_MICRST (0x1 << 5) | ||
251 | /* Reset Micrel PHY */ | ||
252 | clrbits8(&bcsr_regs[11], BCSR11_ENET_MICRST); | ||
253 | setbits8(&bcsr_regs[11], BCSR11_ENET_MICRST); | ||
198 | } | 254 | } |
199 | #endif | ||
200 | 255 | ||
201 | #ifdef CONFIG_SMP | 256 | iounmap(bcsr_regs); |
202 | mpc85xx_smp_init(); | 257 | } |
203 | #endif | 258 | |
259 | static void __init mpc85xx_mds_qe_init(void) | ||
260 | { | ||
261 | struct device_node *np; | ||
204 | 262 | ||
205 | #ifdef CONFIG_QUICC_ENGINE | ||
206 | np = of_find_compatible_node(NULL, NULL, "fsl,qe"); | 263 | np = of_find_compatible_node(NULL, NULL, "fsl,qe"); |
207 | if (!np) { | 264 | if (!np) { |
208 | np = of_find_node_by_name(NULL, "qe"); | 265 | np = of_find_node_by_name(NULL, "qe"); |
@@ -210,6 +267,11 @@ static void __init mpc85xx_mds_setup_arch(void) | |||
210 | return; | 267 | return; |
211 | } | 268 | } |
212 | 269 | ||
270 | if (!of_device_is_available(np)) { | ||
271 | of_node_put(np); | ||
272 | return; | ||
273 | } | ||
274 | |||
213 | qe_reset(); | 275 | qe_reset(); |
214 | of_node_put(np); | 276 | of_node_put(np); |
215 | 277 | ||
@@ -224,70 +286,7 @@ static void __init mpc85xx_mds_setup_arch(void) | |||
224 | par_io_of_config(ucc); | 286 | par_io_of_config(ucc); |
225 | } | 287 | } |
226 | 288 | ||
227 | if (bcsr_regs) { | 289 | mpc85xx_mds_reset_ucc_phys(); |
228 | if (machine_is(mpc8568_mds)) { | ||
229 | #define BCSR_UCC1_GETH_EN (0x1 << 7) | ||
230 | #define BCSR_UCC2_GETH_EN (0x1 << 7) | ||
231 | #define BCSR_UCC1_MODE_MSK (0x3 << 4) | ||
232 | #define BCSR_UCC2_MODE_MSK (0x3 << 0) | ||
233 | |||
234 | /* Turn off UCC1 & UCC2 */ | ||
235 | clrbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN); | ||
236 | clrbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN); | ||
237 | |||
238 | /* Mode is RGMII, all bits clear */ | ||
239 | clrbits8(&bcsr_regs[11], BCSR_UCC1_MODE_MSK | | ||
240 | BCSR_UCC2_MODE_MSK); | ||
241 | |||
242 | /* Turn UCC1 & UCC2 on */ | ||
243 | setbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN); | ||
244 | setbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN); | ||
245 | } else if (machine_is(mpc8569_mds)) { | ||
246 | #define BCSR7_UCC12_GETHnRST (0x1 << 2) | ||
247 | #define BCSR8_UEM_MARVELL_RST (0x1 << 1) | ||
248 | #define BCSR_UCC_RGMII (0x1 << 6) | ||
249 | #define BCSR_UCC_RTBI (0x1 << 5) | ||
250 | /* | ||
251 | * U-Boot mangles interrupt polarity for Marvell PHYs, | ||
252 | * so reset built-in and UEM Marvell PHYs, this puts | ||
253 | * the PHYs into their normal state. | ||
254 | */ | ||
255 | clrbits8(&bcsr_regs[7], BCSR7_UCC12_GETHnRST); | ||
256 | setbits8(&bcsr_regs[8], BCSR8_UEM_MARVELL_RST); | ||
257 | |||
258 | setbits8(&bcsr_regs[7], BCSR7_UCC12_GETHnRST); | ||
259 | clrbits8(&bcsr_regs[8], BCSR8_UEM_MARVELL_RST); | ||
260 | |||
261 | for (np = NULL; (np = of_find_compatible_node(np, | ||
262 | "network", | ||
263 | "ucc_geth")) != NULL;) { | ||
264 | const unsigned int *prop; | ||
265 | int ucc_num; | ||
266 | |||
267 | prop = of_get_property(np, "cell-index", NULL); | ||
268 | if (prop == NULL) | ||
269 | continue; | ||
270 | |||
271 | ucc_num = *prop - 1; | ||
272 | |||
273 | prop = of_get_property(np, "phy-connection-type", NULL); | ||
274 | if (prop == NULL) | ||
275 | continue; | ||
276 | |||
277 | if (strcmp("rtbi", (const char *)prop) == 0) | ||
278 | clrsetbits_8(&bcsr_regs[7 + ucc_num], | ||
279 | BCSR_UCC_RGMII, BCSR_UCC_RTBI); | ||
280 | } | ||
281 | |||
282 | } else if (machine_is(p1021_mds)) { | ||
283 | #define BCSR11_ENET_MICRST (0x1 << 5) | ||
284 | /* Reset Micrel PHY */ | ||
285 | clrbits8(&bcsr_regs[11], BCSR11_ENET_MICRST); | ||
286 | setbits8(&bcsr_regs[11], BCSR11_ENET_MICRST); | ||
287 | } | ||
288 | |||
289 | iounmap(bcsr_regs); | ||
290 | } | ||
291 | 290 | ||
292 | if (machine_is(p1021_mds)) { | 291 | if (machine_is(p1021_mds)) { |
293 | #define MPC85xx_PMUXCR_OFFSET 0x60 | 292 | #define MPC85xx_PMUXCR_OFFSET 0x60 |
@@ -322,8 +321,72 @@ static void __init mpc85xx_mds_setup_arch(void) | |||
322 | } | 321 | } |
323 | 322 | ||
324 | } | 323 | } |
324 | } | ||
325 | |||
326 | static void __init mpc85xx_mds_qeic_init(void) | ||
327 | { | ||
328 | struct device_node *np; | ||
329 | |||
330 | np = of_find_compatible_node(NULL, NULL, "fsl,qe"); | ||
331 | if (!of_device_is_available(np)) { | ||
332 | of_node_put(np); | ||
333 | return; | ||
334 | } | ||
335 | |||
336 | np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic"); | ||
337 | if (!np) { | ||
338 | np = of_find_node_by_type(NULL, "qeic"); | ||
339 | if (!np) | ||
340 | return; | ||
341 | } | ||
342 | |||
343 | if (machine_is(p1021_mds)) | ||
344 | qe_ic_init(np, 0, qe_ic_cascade_low_mpic, | ||
345 | qe_ic_cascade_high_mpic); | ||
346 | else | ||
347 | qe_ic_init(np, 0, qe_ic_cascade_muxed_mpic, NULL); | ||
348 | of_node_put(np); | ||
349 | } | ||
350 | #else | ||
351 | static void __init mpc85xx_publish_qe_devices(void) { } | ||
352 | static void __init mpc85xx_mds_qe_init(void) { } | ||
353 | static void __init mpc85xx_mds_qeic_init(void) { } | ||
325 | #endif /* CONFIG_QUICC_ENGINE */ | 354 | #endif /* CONFIG_QUICC_ENGINE */ |
326 | 355 | ||
356 | static void __init mpc85xx_mds_setup_arch(void) | ||
357 | { | ||
358 | #ifdef CONFIG_PCI | ||
359 | struct pci_controller *hose; | ||
360 | #endif | ||
361 | dma_addr_t max = 0xffffffff; | ||
362 | |||
363 | if (ppc_md.progress) | ||
364 | ppc_md.progress("mpc85xx_mds_setup_arch()", 0); | ||
365 | |||
366 | #ifdef CONFIG_PCI | ||
367 | for_each_node_by_type(np, "pci") { | ||
368 | if (of_device_is_compatible(np, "fsl,mpc8540-pci") || | ||
369 | of_device_is_compatible(np, "fsl,mpc8548-pcie")) { | ||
370 | struct resource rsrc; | ||
371 | of_address_to_resource(np, 0, &rsrc); | ||
372 | if ((rsrc.start & 0xfffff) == 0x8000) | ||
373 | fsl_add_bridge(np, 1); | ||
374 | else | ||
375 | fsl_add_bridge(np, 0); | ||
376 | |||
377 | hose = pci_find_hose_for_OF_device(np); | ||
378 | max = min(max, hose->dma_window_base_cur + | ||
379 | hose->dma_window_size); | ||
380 | } | ||
381 | } | ||
382 | #endif | ||
383 | |||
384 | #ifdef CONFIG_SMP | ||
385 | mpc85xx_smp_init(); | ||
386 | #endif | ||
387 | |||
388 | mpc85xx_mds_qe_init(); | ||
389 | |||
327 | #ifdef CONFIG_SWIOTLB | 390 | #ifdef CONFIG_SWIOTLB |
328 | if (memblock_end_of_DRAM() > max) { | 391 | if (memblock_end_of_DRAM() > max) { |
329 | ppc_swiotlb_enable = 1; | 392 | ppc_swiotlb_enable = 1; |
@@ -369,8 +432,6 @@ static struct of_device_id mpc85xx_ids[] = { | |||
369 | { .type = "soc", }, | 432 | { .type = "soc", }, |
370 | { .compatible = "soc", }, | 433 | { .compatible = "soc", }, |
371 | { .compatible = "simple-bus", }, | 434 | { .compatible = "simple-bus", }, |
372 | { .type = "qe", }, | ||
373 | { .compatible = "fsl,qe", }, | ||
374 | { .compatible = "gianfar", }, | 435 | { .compatible = "gianfar", }, |
375 | { .compatible = "fsl,rapidio-delta", }, | 436 | { .compatible = "fsl,rapidio-delta", }, |
376 | { .compatible = "fsl,mpc8548-guts", }, | 437 | { .compatible = "fsl,mpc8548-guts", }, |
@@ -382,8 +443,6 @@ static struct of_device_id p1021_ids[] = { | |||
382 | { .type = "soc", }, | 443 | { .type = "soc", }, |
383 | { .compatible = "soc", }, | 444 | { .compatible = "soc", }, |
384 | { .compatible = "simple-bus", }, | 445 | { .compatible = "simple-bus", }, |
385 | { .type = "qe", }, | ||
386 | { .compatible = "fsl,qe", }, | ||
387 | { .compatible = "gianfar", }, | 446 | { .compatible = "gianfar", }, |
388 | {}, | 447 | {}, |
389 | }; | 448 | }; |
@@ -395,16 +454,16 @@ static int __init mpc85xx_publish_devices(void) | |||
395 | if (machine_is(mpc8569_mds)) | 454 | if (machine_is(mpc8569_mds)) |
396 | simple_gpiochip_init("fsl,mpc8569mds-bcsr-gpio"); | 455 | simple_gpiochip_init("fsl,mpc8569mds-bcsr-gpio"); |
397 | 456 | ||
398 | /* Publish the QE devices */ | ||
399 | of_platform_bus_probe(NULL, mpc85xx_ids, NULL); | 457 | of_platform_bus_probe(NULL, mpc85xx_ids, NULL); |
458 | mpc85xx_publish_qe_devices(); | ||
400 | 459 | ||
401 | return 0; | 460 | return 0; |
402 | } | 461 | } |
403 | 462 | ||
404 | static int __init p1021_publish_devices(void) | 463 | static int __init p1021_publish_devices(void) |
405 | { | 464 | { |
406 | /* Publish the QE devices */ | ||
407 | of_platform_bus_probe(NULL, p1021_ids, NULL); | 465 | of_platform_bus_probe(NULL, p1021_ids, NULL); |
466 | mpc85xx_publish_qe_devices(); | ||
408 | 467 | ||
409 | return 0; | 468 | return 0; |
410 | } | 469 | } |
@@ -441,21 +500,7 @@ static void __init mpc85xx_mds_pic_init(void) | |||
441 | of_node_put(np); | 500 | of_node_put(np); |
442 | 501 | ||
443 | mpic_init(mpic); | 502 | mpic_init(mpic); |
444 | 503 | mpc85xx_mds_qeic_init(); | |
445 | #ifdef CONFIG_QUICC_ENGINE | ||
446 | np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic"); | ||
447 | if (!np) { | ||
448 | np = of_find_node_by_type(NULL, "qeic"); | ||
449 | if (!np) | ||
450 | return; | ||
451 | } | ||
452 | if (machine_is(p1021_mds)) | ||
453 | qe_ic_init(np, 0, qe_ic_cascade_low_mpic, | ||
454 | qe_ic_cascade_high_mpic); | ||
455 | else | ||
456 | qe_ic_init(np, 0, qe_ic_cascade_muxed_mpic, NULL); | ||
457 | of_node_put(np); | ||
458 | #endif /* CONFIG_QUICC_ENGINE */ | ||
459 | } | 504 | } |
460 | 505 | ||
461 | static int __init mpc85xx_mds_probe(void) | 506 | static int __init mpc85xx_mds_probe(void) |
diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c b/arch/powerpc/platforms/85xx/p1022_ds.c new file mode 100644 index 00000000000..e1467c93745 --- /dev/null +++ b/arch/powerpc/platforms/85xx/p1022_ds.c | |||
@@ -0,0 +1,148 @@ | |||
1 | /* | ||
2 | * P1022DS board specific routines | ||
3 | * | ||
4 | * Authors: Travis Wheatley <travis.wheatley@freescale.com> | ||
5 | * Dave Liu <daveliu@freescale.com> | ||
6 | * Timur Tabi <timur@freescale.com> | ||
7 | * | ||
8 | * Copyright 2010 Freescale Semiconductor, Inc. | ||
9 | * | ||
10 | * This file is taken from the Freescale P1022DS BSP, with modifications: | ||
11 | * 1) No DIU support (pending rewrite of DIU code) | ||
12 | * 2) No AMP support | ||
13 | * 3) No PCI endpoint support | ||
14 | * | ||
15 | * This file is licensed under the terms of the GNU General Public License | ||
16 | * version 2. This program is licensed "as is" without any warranty of any | ||
17 | * kind, whether express or implied. | ||
18 | */ | ||
19 | |||
20 | #include <linux/pci.h> | ||
21 | #include <linux/of_platform.h> | ||
22 | #include <linux/lmb.h> | ||
23 | |||
24 | #include <asm/mpic.h> | ||
25 | #include <asm/swiotlb.h> | ||
26 | |||
27 | #include <sysdev/fsl_soc.h> | ||
28 | #include <sysdev/fsl_pci.h> | ||
29 | |||
30 | void __init p1022_ds_pic_init(void) | ||
31 | { | ||
32 | struct mpic *mpic; | ||
33 | struct resource r; | ||
34 | struct device_node *np; | ||
35 | |||
36 | np = of_find_node_by_type(NULL, "open-pic"); | ||
37 | if (!np) { | ||
38 | pr_err("Could not find open-pic node\n"); | ||
39 | return; | ||
40 | } | ||
41 | |||
42 | if (of_address_to_resource(np, 0, &r)) { | ||
43 | pr_err("Failed to map mpic register space\n"); | ||
44 | of_node_put(np); | ||
45 | return; | ||
46 | } | ||
47 | |||
48 | mpic = mpic_alloc(np, r.start, | ||
49 | MPIC_PRIMARY | MPIC_WANTS_RESET | | ||
50 | MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS | | ||
51 | MPIC_SINGLE_DEST_CPU, | ||
52 | 0, 256, " OpenPIC "); | ||
53 | |||
54 | BUG_ON(mpic == NULL); | ||
55 | of_node_put(np); | ||
56 | |||
57 | mpic_init(mpic); | ||
58 | } | ||
59 | |||
60 | #ifdef CONFIG_SMP | ||
61 | void __init mpc85xx_smp_init(void); | ||
62 | #endif | ||
63 | |||
64 | /* | ||
65 | * Setup the architecture | ||
66 | */ | ||
67 | static void __init p1022_ds_setup_arch(void) | ||
68 | { | ||
69 | #ifdef CONFIG_PCI | ||
70 | struct device_node *np; | ||
71 | #endif | ||
72 | dma_addr_t max = 0xffffffff; | ||
73 | |||
74 | if (ppc_md.progress) | ||
75 | ppc_md.progress("p1022_ds_setup_arch()", 0); | ||
76 | |||
77 | #ifdef CONFIG_PCI | ||
78 | for_each_compatible_node(np, "pci", "fsl,p1022-pcie") { | ||
79 | struct resource rsrc; | ||
80 | struct pci_controller *hose; | ||
81 | |||
82 | of_address_to_resource(np, 0, &rsrc); | ||
83 | |||
84 | if ((rsrc.start & 0xfffff) == 0x8000) | ||
85 | fsl_add_bridge(np, 1); | ||
86 | else | ||
87 | fsl_add_bridge(np, 0); | ||
88 | |||
89 | hose = pci_find_hose_for_OF_device(np); | ||
90 | max = min(max, hose->dma_window_base_cur + | ||
91 | hose->dma_window_size); | ||
92 | } | ||
93 | #endif | ||
94 | |||
95 | #ifdef CONFIG_SMP | ||
96 | mpc85xx_smp_init(); | ||
97 | #endif | ||
98 | |||
99 | #ifdef CONFIG_SWIOTLB | ||
100 | if (lmb_end_of_DRAM() > max) { | ||
101 | ppc_swiotlb_enable = 1; | ||
102 | set_pci_dma_ops(&swiotlb_dma_ops); | ||
103 | ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; | ||
104 | } | ||
105 | #endif | ||
106 | |||
107 | pr_info("Freescale P1022 DS reference board\n"); | ||
108 | } | ||
109 | |||
110 | static struct of_device_id __initdata p1022_ds_ids[] = { | ||
111 | { .type = "soc", }, | ||
112 | { .compatible = "soc", }, | ||
113 | { .compatible = "simple-bus", }, | ||
114 | { .compatible = "gianfar", }, | ||
115 | {}, | ||
116 | }; | ||
117 | |||
118 | static int __init p1022_ds_publish_devices(void) | ||
119 | { | ||
120 | return of_platform_bus_probe(NULL, p1022_ds_ids, NULL); | ||
121 | } | ||
122 | machine_device_initcall(p1022_ds, p1022_ds_publish_devices); | ||
123 | |||
124 | machine_arch_initcall(p1022_ds, swiotlb_setup_bus_notifier); | ||
125 | |||
126 | /* | ||
127 | * Called very early, device-tree isn't unflattened | ||
128 | */ | ||
129 | static int __init p1022_ds_probe(void) | ||
130 | { | ||
131 | unsigned long root = of_get_flat_dt_root(); | ||
132 | |||
133 | return of_flat_dt_is_compatible(root, "fsl,p1022ds"); | ||
134 | } | ||
135 | |||
136 | define_machine(p1022_ds) { | ||
137 | .name = "P1022 DS", | ||
138 | .probe = p1022_ds_probe, | ||
139 | .setup_arch = p1022_ds_setup_arch, | ||
140 | .init_IRQ = p1022_ds_pic_init, | ||
141 | #ifdef CONFIG_PCI | ||
142 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | ||
143 | #endif | ||
144 | .get_irq = mpic_get_irq, | ||
145 | .restart = fsl_rstcr_restart, | ||
146 | .calibrate_decr = generic_calibrate_decr, | ||
147 | .progress = udbg_progress, | ||
148 | }; | ||
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c index 4c3cde911c7..a6b106557be 100644 --- a/arch/powerpc/platforms/85xx/smp.c +++ b/arch/powerpc/platforms/85xx/smp.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/init.h> | 15 | #include <linux/init.h> |
16 | #include <linux/delay.h> | 16 | #include <linux/delay.h> |
17 | #include <linux/of.h> | 17 | #include <linux/of.h> |
18 | #include <linux/kexec.h> | ||
18 | 19 | ||
19 | #include <asm/machdep.h> | 20 | #include <asm/machdep.h> |
20 | #include <asm/pgtable.h> | 21 | #include <asm/pgtable.h> |
@@ -24,6 +25,7 @@ | |||
24 | #include <asm/dbell.h> | 25 | #include <asm/dbell.h> |
25 | 26 | ||
26 | #include <sysdev/fsl_soc.h> | 27 | #include <sysdev/fsl_soc.h> |
28 | #include <sysdev/mpic.h> | ||
27 | 29 | ||
28 | extern void __early_start(void); | 30 | extern void __early_start(void); |
29 | 31 | ||
@@ -105,8 +107,64 @@ smp_85xx_setup_cpu(int cpu_nr) | |||
105 | 107 | ||
106 | struct smp_ops_t smp_85xx_ops = { | 108 | struct smp_ops_t smp_85xx_ops = { |
107 | .kick_cpu = smp_85xx_kick_cpu, | 109 | .kick_cpu = smp_85xx_kick_cpu, |
110 | #ifdef CONFIG_KEXEC | ||
111 | .give_timebase = smp_generic_give_timebase, | ||
112 | .take_timebase = smp_generic_take_timebase, | ||
113 | #endif | ||
108 | }; | 114 | }; |
109 | 115 | ||
116 | #ifdef CONFIG_KEXEC | ||
117 | static int kexec_down_cpus = 0; | ||
118 | |||
119 | void mpc85xx_smp_kexec_cpu_down(int crash_shutdown, int secondary) | ||
120 | { | ||
121 | mpic_teardown_this_cpu(1); | ||
122 | |||
123 | /* When crashing, this gets called on all CPU's we only | ||
124 | * take down the non-boot cpus */ | ||
125 | if (smp_processor_id() != boot_cpuid) | ||
126 | { | ||
127 | local_irq_disable(); | ||
128 | kexec_down_cpus++; | ||
129 | |||
130 | while (1); | ||
131 | } | ||
132 | } | ||
133 | |||
134 | static void mpc85xx_smp_kexec_down(void *arg) | ||
135 | { | ||
136 | if (ppc_md.kexec_cpu_down) | ||
137 | ppc_md.kexec_cpu_down(0,1); | ||
138 | } | ||
139 | |||
140 | static void mpc85xx_smp_machine_kexec(struct kimage *image) | ||
141 | { | ||
142 | int timeout = 2000; | ||
143 | int i; | ||
144 | |||
145 | set_cpus_allowed(current, cpumask_of_cpu(boot_cpuid)); | ||
146 | |||
147 | smp_call_function(mpc85xx_smp_kexec_down, NULL, 0); | ||
148 | |||
149 | while ( (kexec_down_cpus != (num_online_cpus() - 1)) && | ||
150 | ( timeout > 0 ) ) | ||
151 | { | ||
152 | timeout--; | ||
153 | } | ||
154 | |||
155 | if ( !timeout ) | ||
156 | printk(KERN_ERR "Unable to bring down secondary cpu(s)"); | ||
157 | |||
158 | for (i = 0; i < num_present_cpus(); i++) | ||
159 | { | ||
160 | if ( i == smp_processor_id() ) continue; | ||
161 | mpic_reset_core(i); | ||
162 | } | ||
163 | |||
164 | default_machine_kexec(image); | ||
165 | } | ||
166 | #endif /* CONFIG_KEXEC */ | ||
167 | |||
110 | void __init mpc85xx_smp_init(void) | 168 | void __init mpc85xx_smp_init(void) |
111 | { | 169 | { |
112 | struct device_node *np; | 170 | struct device_node *np; |
@@ -124,4 +182,9 @@ void __init mpc85xx_smp_init(void) | |||
124 | BUG_ON(!smp_85xx_ops.message_pass); | 182 | BUG_ON(!smp_85xx_ops.message_pass); |
125 | 183 | ||
126 | smp_ops = &smp_85xx_ops; | 184 | smp_ops = &smp_85xx_ops; |
185 | |||
186 | #ifdef CONFIG_KEXEC | ||
187 | ppc_md.kexec_cpu_down = mpc85xx_smp_kexec_cpu_down; | ||
188 | ppc_md.machine_kexec = mpc85xx_smp_machine_kexec; | ||
189 | #endif | ||
127 | } | 190 | } |
diff --git a/arch/powerpc/platforms/85xx/tqm85xx.c b/arch/powerpc/platforms/85xx/tqm85xx.c index 5b0ab9966e9..8f29bbce536 100644 --- a/arch/powerpc/platforms/85xx/tqm85xx.c +++ b/arch/powerpc/platforms/85xx/tqm85xx.c | |||
@@ -151,6 +151,27 @@ static void tqm85xx_show_cpuinfo(struct seq_file *m) | |||
151 | seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f)); | 151 | seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f)); |
152 | } | 152 | } |
153 | 153 | ||
154 | static void __init tqm85xx_ti1520_fixup(struct pci_dev *pdev) | ||
155 | { | ||
156 | unsigned int val; | ||
157 | |||
158 | /* Do not do the fixup on other platforms! */ | ||
159 | if (!machine_is(tqm85xx)) | ||
160 | return; | ||
161 | |||
162 | dev_info(&pdev->dev, "Using TI 1520 fixup on TQM85xx\n"); | ||
163 | |||
164 | /* | ||
165 | * Enable P2CCLK bit in system control register | ||
166 | * to enable CLOCK output to power chip | ||
167 | */ | ||
168 | pci_read_config_dword(pdev, 0x80, &val); | ||
169 | pci_write_config_dword(pdev, 0x80, val | (1 << 27)); | ||
170 | |||
171 | } | ||
172 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, | ||
173 | tqm85xx_ti1520_fixup); | ||
174 | |||
154 | static struct of_device_id __initdata of_bus_ids[] = { | 175 | static struct of_device_id __initdata of_bus_ids[] = { |
155 | { .compatible = "simple-bus", }, | 176 | { .compatible = "simple-bus", }, |
156 | { .compatible = "gianfar", }, | 177 | { .compatible = "gianfar", }, |
diff --git a/arch/powerpc/platforms/8xx/Kconfig b/arch/powerpc/platforms/8xx/Kconfig index 48a920a98e7..dd35ce081cf 100644 --- a/arch/powerpc/platforms/8xx/Kconfig +++ b/arch/powerpc/platforms/8xx/Kconfig | |||
@@ -55,6 +55,12 @@ config PPC_MGSUVD | |||
55 | help | 55 | help |
56 | This enables support for the Keymile MGSUVD board. | 56 | This enables support for the Keymile MGSUVD board. |
57 | 57 | ||
58 | config TQM8XX | ||
59 | bool "TQM8XX" | ||
60 | select CPM1 | ||
61 | help | ||
62 | support for the mpc8xx based boards from TQM. | ||
63 | |||
58 | endchoice | 64 | endchoice |
59 | 65 | ||
60 | menu "Freescale Ethernet driver platform-specific options" | 66 | menu "Freescale Ethernet driver platform-specific options" |
diff --git a/arch/powerpc/platforms/8xx/Makefile b/arch/powerpc/platforms/8xx/Makefile index bdbfd749601..a491fe6b94f 100644 --- a/arch/powerpc/platforms/8xx/Makefile +++ b/arch/powerpc/platforms/8xx/Makefile | |||
@@ -7,3 +7,4 @@ obj-$(CONFIG_MPC86XADS) += mpc86xads_setup.o | |||
7 | obj-$(CONFIG_PPC_EP88XC) += ep88xc.o | 7 | obj-$(CONFIG_PPC_EP88XC) += ep88xc.o |
8 | obj-$(CONFIG_PPC_ADDER875) += adder875.o | 8 | obj-$(CONFIG_PPC_ADDER875) += adder875.o |
9 | obj-$(CONFIG_PPC_MGSUVD) += mgsuvd.o | 9 | obj-$(CONFIG_PPC_MGSUVD) += mgsuvd.o |
10 | obj-$(CONFIG_TQM8XX) += tqm8xx_setup.o | ||
diff --git a/arch/powerpc/platforms/8xx/tqm8xx_setup.c b/arch/powerpc/platforms/8xx/tqm8xx_setup.c new file mode 100644 index 00000000000..b71c650fbb1 --- /dev/null +++ b/arch/powerpc/platforms/8xx/tqm8xx_setup.c | |||
@@ -0,0 +1,156 @@ | |||
1 | /* | ||
2 | * Platform setup for the MPC8xx based boards from TQM. | ||
3 | * | ||
4 | * Heiko Schocher <hs@denx.de> | ||
5 | * Copyright 2010 DENX Software Engineering GmbH | ||
6 | * | ||
7 | * based on: | ||
8 | * Vitaly Bordug <vbordug@ru.mvista.com> | ||
9 | * | ||
10 | * Copyright 2005 MontaVista Software Inc. | ||
11 | * | ||
12 | * Heavily modified by Scott Wood <scottwood@freescale.com> | ||
13 | * Copyright 2007 Freescale Semiconductor, Inc. | ||
14 | * | ||
15 | * This file is licensed under the terms of the GNU General Public License | ||
16 | * version 2. This program is licensed "as is" without any warranty of any | ||
17 | * kind, whether express or implied. | ||
18 | */ | ||
19 | |||
20 | #include <linux/init.h> | ||
21 | #include <linux/module.h> | ||
22 | #include <linux/param.h> | ||
23 | #include <linux/string.h> | ||
24 | #include <linux/ioport.h> | ||
25 | #include <linux/device.h> | ||
26 | #include <linux/delay.h> | ||
27 | |||
28 | #include <linux/fs_enet_pd.h> | ||
29 | #include <linux/fs_uart_pd.h> | ||
30 | #include <linux/fsl_devices.h> | ||
31 | #include <linux/mii.h> | ||
32 | #include <linux/of_platform.h> | ||
33 | |||
34 | #include <asm/delay.h> | ||
35 | #include <asm/io.h> | ||
36 | #include <asm/machdep.h> | ||
37 | #include <asm/page.h> | ||
38 | #include <asm/processor.h> | ||
39 | #include <asm/system.h> | ||
40 | #include <asm/time.h> | ||
41 | #include <asm/mpc8xx.h> | ||
42 | #include <asm/8xx_immap.h> | ||
43 | #include <asm/cpm1.h> | ||
44 | #include <asm/fs_pd.h> | ||
45 | #include <asm/udbg.h> | ||
46 | |||
47 | #include "mpc8xx.h" | ||
48 | |||
49 | struct cpm_pin { | ||
50 | int port, pin, flags; | ||
51 | }; | ||
52 | |||
53 | static struct __initdata cpm_pin tqm8xx_pins[] = { | ||
54 | /* SMC1 */ | ||
55 | {CPM_PORTB, 24, CPM_PIN_INPUT}, /* RX */ | ||
56 | {CPM_PORTB, 25, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */ | ||
57 | |||
58 | /* SCC1 */ | ||
59 | {CPM_PORTA, 5, CPM_PIN_INPUT}, /* CLK1 */ | ||
60 | {CPM_PORTA, 7, CPM_PIN_INPUT}, /* CLK2 */ | ||
61 | {CPM_PORTA, 14, CPM_PIN_INPUT}, /* TX */ | ||
62 | {CPM_PORTA, 15, CPM_PIN_INPUT}, /* RX */ | ||
63 | {CPM_PORTC, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TENA */ | ||
64 | {CPM_PORTC, 10, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, | ||
65 | {CPM_PORTC, 11, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, | ||
66 | }; | ||
67 | |||
68 | static struct __initdata cpm_pin tqm8xx_fec_pins[] = { | ||
69 | /* MII */ | ||
70 | {CPM_PORTD, 3, CPM_PIN_OUTPUT}, | ||
71 | {CPM_PORTD, 4, CPM_PIN_OUTPUT}, | ||
72 | {CPM_PORTD, 5, CPM_PIN_OUTPUT}, | ||
73 | {CPM_PORTD, 6, CPM_PIN_OUTPUT}, | ||
74 | {CPM_PORTD, 7, CPM_PIN_OUTPUT}, | ||
75 | {CPM_PORTD, 8, CPM_PIN_OUTPUT}, | ||
76 | {CPM_PORTD, 9, CPM_PIN_OUTPUT}, | ||
77 | {CPM_PORTD, 10, CPM_PIN_OUTPUT}, | ||
78 | {CPM_PORTD, 11, CPM_PIN_OUTPUT}, | ||
79 | {CPM_PORTD, 12, CPM_PIN_OUTPUT}, | ||
80 | {CPM_PORTD, 13, CPM_PIN_OUTPUT}, | ||
81 | {CPM_PORTD, 14, CPM_PIN_OUTPUT}, | ||
82 | {CPM_PORTD, 15, CPM_PIN_OUTPUT}, | ||
83 | }; | ||
84 | |||
85 | static void __init init_pins(int n, struct cpm_pin *pin) | ||
86 | { | ||
87 | int i; | ||
88 | |||
89 | for (i = 0; i < n; i++) { | ||
90 | cpm1_set_pin(pin->port, pin->pin, pin->flags); | ||
91 | pin++; | ||
92 | } | ||
93 | } | ||
94 | |||
95 | static void __init init_ioports(void) | ||
96 | { | ||
97 | struct device_node *dnode; | ||
98 | struct property *prop; | ||
99 | int len; | ||
100 | |||
101 | init_pins(ARRAY_SIZE(tqm8xx_pins), &tqm8xx_pins[0]); | ||
102 | |||
103 | cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX); | ||
104 | |||
105 | dnode = of_find_node_by_name(NULL, "aliases"); | ||
106 | if (dnode == NULL) | ||
107 | return; | ||
108 | prop = of_find_property(dnode, "ethernet1", &len); | ||
109 | if (prop == NULL) | ||
110 | return; | ||
111 | |||
112 | /* init FEC pins */ | ||
113 | init_pins(ARRAY_SIZE(tqm8xx_fec_pins), &tqm8xx_fec_pins[0]); | ||
114 | } | ||
115 | |||
116 | static void __init tqm8xx_setup_arch(void) | ||
117 | { | ||
118 | cpm_reset(); | ||
119 | init_ioports(); | ||
120 | } | ||
121 | |||
122 | static int __init tqm8xx_probe(void) | ||
123 | { | ||
124 | unsigned long node = of_get_flat_dt_root(); | ||
125 | |||
126 | return of_flat_dt_is_compatible(node, "tqc,tqm8xx"); | ||
127 | } | ||
128 | |||
129 | static struct of_device_id __initdata of_bus_ids[] = { | ||
130 | { .name = "soc", }, | ||
131 | { .name = "cpm", }, | ||
132 | { .name = "localbus", }, | ||
133 | { .compatible = "simple-bus" }, | ||
134 | {}, | ||
135 | }; | ||
136 | |||
137 | static int __init declare_of_platform_devices(void) | ||
138 | { | ||
139 | of_platform_bus_probe(NULL, of_bus_ids, NULL); | ||
140 | |||
141 | return 0; | ||
142 | } | ||
143 | machine_device_initcall(tqm8xx, declare_of_platform_devices); | ||
144 | |||
145 | define_machine(tqm8xx) { | ||
146 | .name = "TQM8xx", | ||
147 | .probe = tqm8xx_probe, | ||
148 | .setup_arch = tqm8xx_setup_arch, | ||
149 | .init_IRQ = mpc8xx_pics_init, | ||
150 | .get_irq = mpc8xx_get_irq, | ||
151 | .restart = mpc8xx_restart, | ||
152 | .calibrate_decr = mpc8xx_calibrate_decr, | ||
153 | .set_rtc_time = mpc8xx_set_rtc_time, | ||
154 | .get_rtc_time = mpc8xx_get_rtc_time, | ||
155 | .progress = udbg_progress, | ||
156 | }; | ||
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index 356c6a0e1b2..209384b6e03 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c | |||
@@ -412,6 +412,7 @@ DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P4080, quirk_fsl_pcie_header); | |||
412 | #endif /* CONFIG_FSL_SOC_BOOKE || CONFIG_PPC_86xx */ | 412 | #endif /* CONFIG_FSL_SOC_BOOKE || CONFIG_PPC_86xx */ |
413 | 413 | ||
414 | #if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x) | 414 | #if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x) |
415 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8308, quirk_fsl_pcie_header); | ||
415 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8314E, quirk_fsl_pcie_header); | 416 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8314E, quirk_fsl_pcie_header); |
416 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8314, quirk_fsl_pcie_header); | 417 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8314, quirk_fsl_pcie_header); |
417 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8315E, quirk_fsl_pcie_header); | 418 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8315E, quirk_fsl_pcie_header); |
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 3bedcc149c8..79bb11f35c4 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h | |||
@@ -2264,6 +2264,7 @@ | |||
2264 | #define PCI_DEVICE_ID_TDI_EHCI 0x0101 | 2264 | #define PCI_DEVICE_ID_TDI_EHCI 0x0101 |
2265 | 2265 | ||
2266 | #define PCI_VENDOR_ID_FREESCALE 0x1957 | 2266 | #define PCI_VENDOR_ID_FREESCALE 0x1957 |
2267 | #define PCI_DEVICE_ID_MPC8308 0xc006 | ||
2267 | #define PCI_DEVICE_ID_MPC8315E 0x00b4 | 2268 | #define PCI_DEVICE_ID_MPC8315E 0x00b4 |
2268 | #define PCI_DEVICE_ID_MPC8315 0x00b5 | 2269 | #define PCI_DEVICE_ID_MPC8315 0x00b5 |
2269 | #define PCI_DEVICE_ID_MPC8314E 0x00b6 | 2270 | #define PCI_DEVICE_ID_MPC8314E 0x00b6 |