diff options
author | Stephen Warren <swarren@nvidia.com> | 2012-08-01 15:57:24 -0400 |
---|---|---|
committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2012-08-04 07:13:54 -0400 |
commit | 40052ca0c243d101cfadd65936f60ef81df10b02 (patch) | |
tree | 47857240772f3cb43d0d0a19998887485af017e7 | |
parent | 685879f4b2036e58c1a0cdaaee2b155d3c965461 (diff) |
regmap: irq: initialize all irqs to wake disabled
The kerneldoc for irq_set_irq_wake() says:
Enable/disable power management wakeup mode, which is
disabled by default.
regmap_irq_set_wake() clears bits to enable wake for an interrupt,
and sets bits to disable wake. Hence, we should set all bits in
wake_buf initially, to mirror the expected disabled state.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
-rw-r--r-- | drivers/base/regmap/regmap-irq.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/base/regmap/regmap-irq.c b/drivers/base/regmap/regmap-irq.c index 9a6649c82da..6f8f0c1e550 100644 --- a/drivers/base/regmap/regmap-irq.c +++ b/drivers/base/regmap/regmap-irq.c | |||
@@ -322,6 +322,22 @@ int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags, | |||
322 | } | 322 | } |
323 | } | 323 | } |
324 | 324 | ||
325 | /* Wake is disabled by default */ | ||
326 | if (d->wake_buf) { | ||
327 | for (i = 0; i < chip->num_regs; i++) { | ||
328 | d->wake_buf[i] = d->mask_buf_def[i]; | ||
329 | reg = chip->wake_base + | ||
330 | (i * map->reg_stride * d->irq_reg_stride); | ||
331 | ret = regmap_update_bits(map, reg, d->wake_buf[i], | ||
332 | d->wake_buf[i]); | ||
333 | if (ret != 0) { | ||
334 | dev_err(map->dev, "Failed to set masks in 0x%x: %d\n", | ||
335 | reg, ret); | ||
336 | goto err_alloc; | ||
337 | } | ||
338 | } | ||
339 | } | ||
340 | |||
325 | if (irq_base) | 341 | if (irq_base) |
326 | d->domain = irq_domain_add_legacy(map->dev->of_node, | 342 | d->domain = irq_domain_add_legacy(map->dev->of_node, |
327 | chip->num_irqs, irq_base, 0, | 343 | chip->num_irqs, irq_base, 0, |