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authorFlorian Fainelli <florian@openwrt.org>2012-07-04 10:58:36 -0400
committerRalf Baechle <ralf@linux-mips.org>2012-07-23 08:54:33 -0400
commit39ca476e3439bb135ff37ed1310469735ade06bf (patch)
tree8d5e492772088bc4011893b96e4df34ce89c9a62
parent0f6db0d07289c9ebf46be8909afe2b3772e06015 (diff)
MIPS: BCM63xx: Add stub to register the SPI platform driver
This patch adds the necessary stub to register the SPI platform driver. Since the registers are shuffled between the 4 BCM63xx CPUs supported by this SPI driver we also need to generate the internal register layout and export this layout for the driver to use it properly. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: grant.likely@secretlab.ca Cc: spi-devel-general@lists.sourceforge.net Patchwork: https://patchwork.linux-mips.org/patch/3321/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/bcm63xx/Makefile3
-rw-r--r--arch/mips/bcm63xx/dev-spi.c119
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h89
3 files changed, 210 insertions, 1 deletions
diff --git a/arch/mips/bcm63xx/Makefile b/arch/mips/bcm63xx/Makefile
index 6dfdc69928a..4049cd51fd1 100644
--- a/arch/mips/bcm63xx/Makefile
+++ b/arch/mips/bcm63xx/Makefile
@@ -1,5 +1,6 @@
1obj-y += clk.o cpu.o cs.o gpio.o irq.o prom.o setup.o timer.o \ 1obj-y += clk.o cpu.o cs.o gpio.o irq.o prom.o setup.o timer.o \
2 dev-dsp.o dev-enet.o dev-pcmcia.o dev-uart.o dev-wdt.o 2 dev-dsp.o dev-enet.o dev-pcmcia.o dev-spi.o dev-uart.o \
3 dev-wdt.o
3obj-$(CONFIG_EARLY_PRINTK) += early_printk.o 4obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
4 5
5obj-y += boards/ 6obj-y += boards/
diff --git a/arch/mips/bcm63xx/dev-spi.c b/arch/mips/bcm63xx/dev-spi.c
new file mode 100644
index 00000000000..67fa45b3f1c
--- /dev/null
+++ b/arch/mips/bcm63xx/dev-spi.c
@@ -0,0 +1,119 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2009-2011 Florian Fainelli <florian@openwrt.org>
7 * Copyright (C) 2010 Tanguy Bouzeloc <tanguy.bouzeloc@efixo.com>
8 */
9
10#include <linux/init.h>
11#include <linux/kernel.h>
12#include <linux/export.h>
13#include <linux/platform_device.h>
14#include <linux/err.h>
15#include <linux/clk.h>
16
17#include <bcm63xx_cpu.h>
18#include <bcm63xx_dev_spi.h>
19#include <bcm63xx_regs.h>
20
21#ifdef BCMCPU_RUNTIME_DETECT
22/*
23 * register offsets
24 */
25static const unsigned long bcm6338_regs_spi[] = {
26 __GEN_SPI_REGS_TABLE(6338)
27};
28
29static const unsigned long bcm6348_regs_spi[] = {
30 __GEN_SPI_REGS_TABLE(6348)
31};
32
33static const unsigned long bcm6358_regs_spi[] = {
34 __GEN_SPI_REGS_TABLE(6358)
35};
36
37static const unsigned long bcm6368_regs_spi[] = {
38 __GEN_SPI_REGS_TABLE(6368)
39};
40
41const unsigned long *bcm63xx_regs_spi;
42EXPORT_SYMBOL(bcm63xx_regs_spi);
43
44static __init void bcm63xx_spi_regs_init(void)
45{
46 if (BCMCPU_IS_6338())
47 bcm63xx_regs_spi = bcm6338_regs_spi;
48 if (BCMCPU_IS_6348())
49 bcm63xx_regs_spi = bcm6348_regs_spi;
50 if (BCMCPU_IS_6358())
51 bcm63xx_regs_spi = bcm6358_regs_spi;
52 if (BCMCPU_IS_6368())
53 bcm63xx_regs_spi = bcm6368_regs_spi;
54}
55#else
56static __init void bcm63xx_spi_regs_init(void) { }
57#endif
58
59static struct resource spi_resources[] = {
60 {
61 .start = -1, /* filled at runtime */
62 .end = -1, /* filled at runtime */
63 .flags = IORESOURCE_MEM,
64 },
65 {
66 .start = -1, /* filled at runtime */
67 .flags = IORESOURCE_IRQ,
68 },
69};
70
71static struct bcm63xx_spi_pdata spi_pdata = {
72 .bus_num = 0,
73 .num_chipselect = 8,
74};
75
76static struct platform_device bcm63xx_spi_device = {
77 .name = "bcm63xx-spi",
78 .id = -1,
79 .num_resources = ARRAY_SIZE(spi_resources),
80 .resource = spi_resources,
81 .dev = {
82 .platform_data = &spi_pdata,
83 },
84};
85
86int __init bcm63xx_spi_register(void)
87{
88 struct clk *periph_clk;
89
90 if (BCMCPU_IS_6345())
91 return -ENODEV;
92
93 periph_clk = clk_get(NULL, "periph");
94 if (IS_ERR(periph_clk)) {
95 pr_err("unable to get periph clock\n");
96 return -ENODEV;
97 }
98
99 /* Set bus frequency */
100 spi_pdata.speed_hz = clk_get_rate(periph_clk);
101
102 spi_resources[0].start = bcm63xx_regset_address(RSET_SPI);
103 spi_resources[0].end = spi_resources[0].start;
104 spi_resources[1].start = bcm63xx_get_irq_number(IRQ_SPI);
105
106 if (BCMCPU_IS_6338() || BCMCPU_IS_6348()) {
107 spi_resources[0].end += BCM_6338_RSET_SPI_SIZE - 1;
108 spi_pdata.fifo_size = SPI_6338_MSG_DATA_SIZE;
109 }
110
111 if (BCMCPU_IS_6358() || BCMCPU_IS_6368()) {
112 spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1;
113 spi_pdata.fifo_size = SPI_6358_MSG_DATA_SIZE;
114 }
115
116 bcm63xx_spi_regs_init();
117
118 return platform_device_register(&bcm63xx_spi_device);
119}
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h
new file mode 100644
index 00000000000..7d98dbe5d4b
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h
@@ -0,0 +1,89 @@
1#ifndef BCM63XX_DEV_SPI_H
2#define BCM63XX_DEV_SPI_H
3
4#include <linux/types.h>
5#include <bcm63xx_io.h>
6#include <bcm63xx_regs.h>
7
8int __init bcm63xx_spi_register(void);
9
10struct bcm63xx_spi_pdata {
11 unsigned int fifo_size;
12 int bus_num;
13 int num_chipselect;
14 u32 speed_hz;
15};
16
17enum bcm63xx_regs_spi {
18 SPI_CMD,
19 SPI_INT_STATUS,
20 SPI_INT_MASK_ST,
21 SPI_INT_MASK,
22 SPI_ST,
23 SPI_CLK_CFG,
24 SPI_FILL_BYTE,
25 SPI_MSG_TAIL,
26 SPI_RX_TAIL,
27 SPI_MSG_CTL,
28 SPI_MSG_DATA,
29 SPI_RX_DATA,
30};
31
32#define __GEN_SPI_RSET_BASE(__cpu, __rset) \
33 case SPI_## __rset: \
34 return SPI_## __cpu ##_## __rset;
35
36#define __GEN_SPI_RSET(__cpu) \
37 switch (reg) { \
38 __GEN_SPI_RSET_BASE(__cpu, CMD) \
39 __GEN_SPI_RSET_BASE(__cpu, INT_STATUS) \
40 __GEN_SPI_RSET_BASE(__cpu, INT_MASK_ST) \
41 __GEN_SPI_RSET_BASE(__cpu, INT_MASK) \
42 __GEN_SPI_RSET_BASE(__cpu, ST) \
43 __GEN_SPI_RSET_BASE(__cpu, CLK_CFG) \
44 __GEN_SPI_RSET_BASE(__cpu, FILL_BYTE) \
45 __GEN_SPI_RSET_BASE(__cpu, MSG_TAIL) \
46 __GEN_SPI_RSET_BASE(__cpu, RX_TAIL) \
47 __GEN_SPI_RSET_BASE(__cpu, MSG_CTL) \
48 __GEN_SPI_RSET_BASE(__cpu, MSG_DATA) \
49 __GEN_SPI_RSET_BASE(__cpu, RX_DATA) \
50 }
51
52#define __GEN_SPI_REGS_TABLE(__cpu) \
53 [SPI_CMD] = SPI_## __cpu ##_CMD, \
54 [SPI_INT_STATUS] = SPI_## __cpu ##_INT_STATUS, \
55 [SPI_INT_MASK_ST] = SPI_## __cpu ##_INT_MASK_ST, \
56 [SPI_INT_MASK] = SPI_## __cpu ##_INT_MASK, \
57 [SPI_ST] = SPI_## __cpu ##_ST, \
58 [SPI_CLK_CFG] = SPI_## __cpu ##_CLK_CFG, \
59 [SPI_FILL_BYTE] = SPI_## __cpu ##_FILL_BYTE, \
60 [SPI_MSG_TAIL] = SPI_## __cpu ##_MSG_TAIL, \
61 [SPI_RX_TAIL] = SPI_## __cpu ##_RX_TAIL, \
62 [SPI_MSG_CTL] = SPI_## __cpu ##_MSG_CTL, \
63 [SPI_MSG_DATA] = SPI_## __cpu ##_MSG_DATA, \
64 [SPI_RX_DATA] = SPI_## __cpu ##_RX_DATA,
65
66static inline unsigned long bcm63xx_spireg(enum bcm63xx_regs_spi reg)
67{
68#ifdef BCMCPU_RUNTIME_DETECT
69 extern const unsigned long *bcm63xx_regs_spi;
70
71 return bcm63xx_regs_spi[reg];
72#else
73#ifdef CONFIG_BCM63XX_CPU_6338
74 __GEN_SPI_RSET(6338)
75#endif
76#ifdef CONFIG_BCM63XX_CPU_6348
77 __GEN_SPI_RSET(6348)
78#endif
79#ifdef CONFIG_BCM63XX_CPU_6358
80 __GEN_SPI_RSET(6358)
81#endif
82#ifdef CONFIG_BCM63XX_CPU_6368
83 __GEN_SPI_RSET(6368)
84#endif
85#endif
86 return 0;
87}
88
89#endif /* BCM63XX_DEV_SPI_H */