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authorHeiko Stuebner <heiko@sntech.de>2011-10-12 08:34:12 -0400
committerKukjin Kim <kgene.kim@samsung.com>2011-10-14 02:15:42 -0400
commit35cc3cea2c2adb825dbe987000165005d28acaec (patch)
treec20030c4c3c25828083ced2b9c29c78320e8aeb6
parent6247cea2b9c193a845a01381c36e18f11676fdfb (diff)
ARM: SAMSUNG: Add support s3c2416-adc for S3C2416/S3C2450
The ADC of the S3C2416/2450 SoC is 10 or 12 bit wide, has its source selection in the register base+0x18 and its width selection in bit 03 of the ADCCON register. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
-rw-r--r--arch/arm/mach-s3c2416/s3c2416.c3
-rw-r--r--arch/arm/plat-samsung/adc.c25
2 files changed, 22 insertions, 6 deletions
diff --git a/arch/arm/mach-s3c2416/s3c2416.c b/arch/arm/mach-s3c2416/s3c2416.c
index 3156b7a7137..081ef4cb868 100644
--- a/arch/arm/mach-s3c2416/s3c2416.c
+++ b/arch/arm/mach-s3c2416/s3c2416.c
@@ -60,6 +60,7 @@
60#include <plat/iic-core.h> 60#include <plat/iic-core.h>
61#include <plat/fb-core.h> 61#include <plat/fb-core.h>
62#include <plat/nand-core.h> 62#include <plat/nand-core.h>
63#include <plat/adc-core.h>
63 64
64static struct map_desc s3c2416_iodesc[] __initdata = { 65static struct map_desc s3c2416_iodesc[] __initdata = {
65 IODESC_ENT(WATCHDOG), 66 IODESC_ENT(WATCHDOG),
@@ -97,6 +98,8 @@ int __init s3c2416_init(void)
97 98
98 s3c_fb_setname("s3c2443-fb"); 99 s3c_fb_setname("s3c2443-fb");
99 100
101 s3c_adc_setname("s3c2416-adc");
102
100 register_syscore_ops(&s3c2416_pm_syscore_ops); 103 register_syscore_ops(&s3c2416_pm_syscore_ops);
101 register_syscore_ops(&s3c24xx_irq_syscore_ops); 104 register_syscore_ops(&s3c24xx_irq_syscore_ops);
102 105
diff --git a/arch/arm/plat-samsung/adc.c b/arch/arm/plat-samsung/adc.c
index 8d8c4cc023d..33ecd0c9f0c 100644
--- a/arch/arm/plat-samsung/adc.c
+++ b/arch/arm/plat-samsung/adc.c
@@ -42,6 +42,7 @@
42enum s3c_cpu_type { 42enum s3c_cpu_type {
43 TYPE_ADCV1, /* S3C24XX */ 43 TYPE_ADCV1, /* S3C24XX */
44 TYPE_ADCV11, /* S3C2443 */ 44 TYPE_ADCV11, /* S3C2443 */
45 TYPE_ADCV12, /* S3C2416, S3C2450 */
45 TYPE_ADCV2, /* S3C64XX, S5P64X0, S5PC100 */ 46 TYPE_ADCV2, /* S3C64XX, S5P64X0, S5PC100 */
46 TYPE_ADCV3, /* S5PV210, S5PC110, EXYNOS4210 */ 47 TYPE_ADCV3, /* S5PV210, S5PC110, EXYNOS4210 */
47}; 48};
@@ -107,7 +108,7 @@ static inline void s3c_adc_select(struct adc_device *adc,
107 if (!client->is_ts) { 108 if (!client->is_ts) {
108 if (cpu == TYPE_ADCV3) 109 if (cpu == TYPE_ADCV3)
109 writel(client->channel & 0xf, adc->regs + S5P_ADCMUX); 110 writel(client->channel & 0xf, adc->regs + S5P_ADCMUX);
110 else if (cpu == TYPE_ADCV11) 111 else if (cpu == TYPE_ADCV11 || cpu == TYPE_ADCV12)
111 writel(client->channel & 0xf, 112 writel(client->channel & 0xf,
112 adc->regs + S3C2443_ADCMUX); 113 adc->regs + S3C2443_ADCMUX);
113 else 114 else
@@ -302,7 +303,7 @@ static irqreturn_t s3c_adc_irq(int irq, void *pw)
302 data0 &= 0x3ff; 303 data0 &= 0x3ff;
303 data1 &= 0x3ff; 304 data1 &= 0x3ff;
304 } else { 305 } else {
305 /* S3C64XX/S5P ADC resolution is 12-bit */ 306 /* S3C2416/S3C64XX/S5P ADC resolution is 12-bit */
306 data0 &= 0xfff; 307 data0 &= 0xfff;
307 data1 &= 0xfff; 308 data1 &= 0xfff;
308 } 309 }
@@ -337,6 +338,7 @@ static int s3c_adc_probe(struct platform_device *pdev)
337 struct device *dev = &pdev->dev; 338 struct device *dev = &pdev->dev;
338 struct adc_device *adc; 339 struct adc_device *adc;
339 struct resource *regs; 340 struct resource *regs;
341 enum s3c_cpu_type cpu = platform_get_device_id(pdev)->driver_data;
340 int ret; 342 int ret;
341 unsigned tmp; 343 unsigned tmp;
342 344
@@ -399,10 +401,13 @@ static int s3c_adc_probe(struct platform_device *pdev)
399 clk_enable(adc->clk); 401 clk_enable(adc->clk);
400 402
401 tmp = adc->prescale | S3C2410_ADCCON_PRSCEN; 403 tmp = adc->prescale | S3C2410_ADCCON_PRSCEN;
402 if (platform_get_device_id(pdev)->driver_data != TYPE_ADCV1) { 404
403 /* Enable 12-bit ADC resolution */ 405 /* Enable 12-bit ADC resolution */
406 if (cpu == TYPE_ADCV12)
407 tmp |= S3C2416_ADCCON_RESSEL;
408 if (cpu == TYPE_ADCV2 || cpu == TYPE_ADCV3)
404 tmp |= S3C64XX_ADCCON_RESSEL; 409 tmp |= S3C64XX_ADCCON_RESSEL;
405 } 410
406 writel(tmp, adc->regs + S3C2410_ADCCON); 411 writel(tmp, adc->regs + S3C2410_ADCCON);
407 412
408 dev_info(dev, "attached adc driver\n"); 413 dev_info(dev, "attached adc driver\n");
@@ -469,6 +474,7 @@ static int s3c_adc_resume(struct device *dev)
469 struct platform_device *pdev = container_of(dev, 474 struct platform_device *pdev = container_of(dev,
470 struct platform_device, dev); 475 struct platform_device, dev);
471 struct adc_device *adc = platform_get_drvdata(pdev); 476 struct adc_device *adc = platform_get_drvdata(pdev);
477 enum s3c_cpu_type cpu = platform_get_device_id(pdev)->driver_data;
472 int ret; 478 int ret;
473 unsigned long tmp; 479 unsigned long tmp;
474 480
@@ -479,9 +485,13 @@ static int s3c_adc_resume(struct device *dev)
479 enable_irq(adc->irq); 485 enable_irq(adc->irq);
480 486
481 tmp = adc->prescale | S3C2410_ADCCON_PRSCEN; 487 tmp = adc->prescale | S3C2410_ADCCON_PRSCEN;
488
482 /* Enable 12-bit ADC resolution */ 489 /* Enable 12-bit ADC resolution */
483 if (platform_get_device_id(pdev)->driver_data != TYPE_ADCV1) 490 if (cpu == TYPE_ADCV12)
491 tmp |= S3C2416_ADCCON_RESSEL;
492 if (cpu == TYPE_ADCV2 || cpu == TYPE_ADCV3)
484 tmp |= S3C64XX_ADCCON_RESSEL; 493 tmp |= S3C64XX_ADCCON_RESSEL;
494
485 writel(tmp, adc->regs + S3C2410_ADCCON); 495 writel(tmp, adc->regs + S3C2410_ADCCON);
486 496
487 return 0; 497 return 0;
@@ -500,6 +510,9 @@ static struct platform_device_id s3c_adc_driver_ids[] = {
500 .name = "s3c2443-adc", 510 .name = "s3c2443-adc",
501 .driver_data = TYPE_ADCV11, 511 .driver_data = TYPE_ADCV11,
502 }, { 512 }, {
513 .name = "s3c2416-adc",
514 .driver_data = TYPE_ADCV12,
515 }, {
503 .name = "s3c64xx-adc", 516 .name = "s3c64xx-adc",
504 .driver_data = TYPE_ADCV2, 517 .driver_data = TYPE_ADCV2,
505 }, { 518 }, {