diff options
author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-06-07 09:56:02 -0400 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-06-12 16:20:28 -0400 |
commit | 32e3cd6ecd7ae9b79605b5f2eb993186a509c239 (patch) | |
tree | 1185d8b76f4ab3fad24b3066a86830d06607806f | |
parent | 14be93ddff61eb196382aeaa3ac86f4db844aeb0 (diff) |
agp/intel-gtt: move gart base addres setup
We need this thing much earlier, and it doesn't make sense
in the hw enabling function intel_enable_gtt - this does not
change over a suspend/resume cycle ...
Reviewed-by: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r-- | drivers/char/agp/intel-gtt.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c index cea9f9905c7..4387e69f8b1 100644 --- a/drivers/char/agp/intel-gtt.c +++ b/drivers/char/agp/intel-gtt.c | |||
@@ -648,6 +648,7 @@ static void intel_gtt_cleanup(void) | |||
648 | 648 | ||
649 | static int intel_gtt_init(void) | 649 | static int intel_gtt_init(void) |
650 | { | 650 | { |
651 | u32 gma_addr; | ||
651 | u32 gtt_map_size; | 652 | u32 gtt_map_size; |
652 | int ret; | 653 | int ret; |
653 | 654 | ||
@@ -694,6 +695,15 @@ static int intel_gtt_init(void) | |||
694 | return ret; | 695 | return ret; |
695 | } | 696 | } |
696 | 697 | ||
698 | if (INTEL_GTT_GEN <= 2) | ||
699 | pci_read_config_dword(intel_private.pcidev, I810_GMADDR, | ||
700 | &gma_addr); | ||
701 | else | ||
702 | pci_read_config_dword(intel_private.pcidev, I915_GMADDR, | ||
703 | &gma_addr); | ||
704 | |||
705 | intel_private.base.gma_bus_addr = (gma_addr & PCI_BASE_ADDRESS_MEM_MASK); | ||
706 | |||
697 | return 0; | 707 | return 0; |
698 | } | 708 | } |
699 | 709 | ||
@@ -769,18 +779,8 @@ static void i830_write_entry(dma_addr_t addr, unsigned int entry, | |||
769 | 779 | ||
770 | static bool intel_enable_gtt(void) | 780 | static bool intel_enable_gtt(void) |
771 | { | 781 | { |
772 | u32 gma_addr; | ||
773 | u8 __iomem *reg; | 782 | u8 __iomem *reg; |
774 | 783 | ||
775 | if (INTEL_GTT_GEN <= 2) | ||
776 | pci_read_config_dword(intel_private.pcidev, I810_GMADDR, | ||
777 | &gma_addr); | ||
778 | else | ||
779 | pci_read_config_dword(intel_private.pcidev, I915_GMADDR, | ||
780 | &gma_addr); | ||
781 | |||
782 | intel_private.base.gma_bus_addr = (gma_addr & PCI_BASE_ADDRESS_MEM_MASK); | ||
783 | |||
784 | if (INTEL_GTT_GEN >= 6) | 784 | if (INTEL_GTT_GEN >= 6) |
785 | return true; | 785 | return true; |
786 | 786 | ||