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authorGlauber Costa <gcosta@redhat.com>2008-03-03 12:12:55 -0500
committerIngo Molnar <mingo@elte.hu>2008-04-17 11:40:56 -0400
commit0941ecb55fbfd2d8bcc62dfd2fcaba1b35f2f196 (patch)
tree1e5ab463fc747dcc1cf56c22df7c3c5b745ac981
parentc048fdfe6178e082be918d4062c86d9764979112 (diff)
x86: get rid of smp_32.c and smp_64.c
This patch merges the copyright notices, and valuable comments that were left back on smp_{32,64}.c. With that, files are empty, and are deleted Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat
-rw-r--r--arch/x86/kernel/Makefile4
-rw-r--r--arch/x86/kernel/smp.c91
-rw-r--r--arch/x86/kernel/smp_32.c106
-rw-r--r--arch/x86/kernel/smp_64.c10
4 files changed, 93 insertions, 118 deletions
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index 362ab6a9d5b..c436e747f50 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -46,10 +46,10 @@ obj-$(CONFIG_MICROCODE) += microcode.o
46obj-$(CONFIG_PCI) += early-quirks.o 46obj-$(CONFIG_PCI) += early-quirks.o
47apm-y := apm_32.o 47apm-y := apm_32.o
48obj-$(CONFIG_APM) += apm.o 48obj-$(CONFIG_APM) += apm.o
49obj-$(CONFIG_X86_SMP) += smp_$(BITS).o smpboot_$(BITS).o smp.o 49obj-$(CONFIG_X86_SMP) += smpboot_$(BITS).o smp.o
50obj-$(CONFIG_X86_SMP) += smpboot.o tsc_sync.o ipi.o tlb_$(BITS).o 50obj-$(CONFIG_X86_SMP) += smpboot.o tsc_sync.o ipi.o tlb_$(BITS).o
51obj-$(CONFIG_X86_32_SMP) += smpcommon.o 51obj-$(CONFIG_X86_32_SMP) += smpcommon.o
52obj-$(CONFIG_X86_64_SMP) += smp_64.o smpboot_64.o tsc_sync.o smpcommon.o 52obj-$(CONFIG_X86_64_SMP) += smpboot_64.o tsc_sync.o smpcommon.o
53obj-$(CONFIG_X86_TRAMPOLINE) += trampoline_$(BITS).o 53obj-$(CONFIG_X86_TRAMPOLINE) += trampoline_$(BITS).o
54obj-$(CONFIG_X86_MPPARSE) += mpparse_$(BITS).o 54obj-$(CONFIG_X86_MPPARSE) += mpparse_$(BITS).o
55obj-$(CONFIG_X86_LOCAL_APIC) += apic_$(BITS).o nmi_$(BITS).o 55obj-$(CONFIG_X86_LOCAL_APIC) += apic_$(BITS).o nmi_$(BITS).o
diff --git a/arch/x86/kernel/smp.c b/arch/x86/kernel/smp.c
index b662300a88f..88c1e518a20 100644
--- a/arch/x86/kernel/smp.c
+++ b/arch/x86/kernel/smp.c
@@ -1,3 +1,16 @@
1/*
2 * Intel SMP support routines.
3 *
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998-99, 2000 Ingo Molnar <mingo@redhat.com>
6 * (c) 2002,2003 Andi Kleen, SuSE Labs.
7 *
8 * i386 and x86_64 integration by Glauber Costa <gcosta@redhat.com>
9 *
10 * This code is released under the GNU General Public License version 2 or
11 * later.
12 */
13
1#include <linux/init.h> 14#include <linux/init.h>
2 15
3#include <linux/mm.h> 16#include <linux/mm.h>
@@ -19,6 +32,84 @@
19#else 32#else
20#include <asm/mach_apic.h> 33#include <asm/mach_apic.h>
21#endif 34#endif
35/*
36 * Some notes on x86 processor bugs affecting SMP operation:
37 *
38 * Pentium, Pentium Pro, II, III (and all CPUs) have bugs.
39 * The Linux implications for SMP are handled as follows:
40 *
41 * Pentium III / [Xeon]
42 * None of the E1AP-E3AP errata are visible to the user.
43 *
44 * E1AP. see PII A1AP
45 * E2AP. see PII A2AP
46 * E3AP. see PII A3AP
47 *
48 * Pentium II / [Xeon]
49 * None of the A1AP-A3AP errata are visible to the user.
50 *
51 * A1AP. see PPro 1AP
52 * A2AP. see PPro 2AP
53 * A3AP. see PPro 7AP
54 *
55 * Pentium Pro
56 * None of 1AP-9AP errata are visible to the normal user,
57 * except occasional delivery of 'spurious interrupt' as trap #15.
58 * This is very rare and a non-problem.
59 *
60 * 1AP. Linux maps APIC as non-cacheable
61 * 2AP. worked around in hardware
62 * 3AP. fixed in C0 and above steppings microcode update.
63 * Linux does not use excessive STARTUP_IPIs.
64 * 4AP. worked around in hardware
65 * 5AP. symmetric IO mode (normal Linux operation) not affected.
66 * 'noapic' mode has vector 0xf filled out properly.
67 * 6AP. 'noapic' mode might be affected - fixed in later steppings
68 * 7AP. We do not assume writes to the LVT deassering IRQs
69 * 8AP. We do not enable low power mode (deep sleep) during MP bootup
70 * 9AP. We do not use mixed mode
71 *
72 * Pentium
73 * There is a marginal case where REP MOVS on 100MHz SMP
74 * machines with B stepping processors can fail. XXX should provide
75 * an L1cache=Writethrough or L1cache=off option.
76 *
77 * B stepping CPUs may hang. There are hardware work arounds
78 * for this. We warn about it in case your board doesn't have the work
79 * arounds. Basically that's so I can tell anyone with a B stepping
80 * CPU and SMP problems "tough".
81 *
82 * Specific items [From Pentium Processor Specification Update]
83 *
84 * 1AP. Linux doesn't use remote read
85 * 2AP. Linux doesn't trust APIC errors
86 * 3AP. We work around this
87 * 4AP. Linux never generated 3 interrupts of the same priority
88 * to cause a lost local interrupt.
89 * 5AP. Remote read is never used
90 * 6AP. not affected - worked around in hardware
91 * 7AP. not affected - worked around in hardware
92 * 8AP. worked around in hardware - we get explicit CS errors if not
93 * 9AP. only 'noapic' mode affected. Might generate spurious
94 * interrupts, we log only the first one and count the
95 * rest silently.
96 * 10AP. not affected - worked around in hardware
97 * 11AP. Linux reads the APIC between writes to avoid this, as per
98 * the documentation. Make sure you preserve this as it affects
99 * the C stepping chips too.
100 * 12AP. not affected - worked around in hardware
101 * 13AP. not affected - worked around in hardware
102 * 14AP. we always deassert INIT during bootup
103 * 15AP. not affected - worked around in hardware
104 * 16AP. not affected - worked around in hardware
105 * 17AP. not affected - worked around in hardware
106 * 18AP. not affected - worked around in hardware
107 * 19AP. not affected - worked around in BIOS
108 *
109 * If this sounds worrying believe me these bugs are either ___RARE___,
110 * or are signal timing bugs worked around in hardware and there's
111 * about nothing of note with C stepping upwards.
112 */
22 113
23/* 114/*
24 * this function sends a 'reschedule' IPI to another CPU. 115 * this function sends a 'reschedule' IPI to another CPU.
diff --git a/arch/x86/kernel/smp_32.c b/arch/x86/kernel/smp_32.c
deleted file mode 100644
index d8fdec5f19b..00000000000
--- a/arch/x86/kernel/smp_32.c
+++ /dev/null
@@ -1,106 +0,0 @@
1/*
2 * Intel SMP support routines.
3 *
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998-99, 2000 Ingo Molnar <mingo@redhat.com>
6 *
7 * This code is released under the GNU General Public License version 2 or
8 * later.
9 */
10
11#include <linux/init.h>
12
13#include <linux/mm.h>
14#include <linux/delay.h>
15#include <linux/spinlock.h>
16#include <linux/kernel_stat.h>
17#include <linux/mc146818rtc.h>
18#include <linux/cache.h>
19#include <linux/interrupt.h>
20#include <linux/cpu.h>
21#include <linux/module.h>
22
23#include <asm/mtrr.h>
24#include <asm/tlbflush.h>
25#include <asm/mmu_context.h>
26#include <mach_apic.h>
27#include <asm/proto.h>
28
29/*
30 * Some notes on x86 processor bugs affecting SMP operation:
31 *
32 * Pentium, Pentium Pro, II, III (and all CPUs) have bugs.
33 * The Linux implications for SMP are handled as follows:
34 *
35 * Pentium III / [Xeon]
36 * None of the E1AP-E3AP errata are visible to the user.
37 *
38 * E1AP. see PII A1AP
39 * E2AP. see PII A2AP
40 * E3AP. see PII A3AP
41 *
42 * Pentium II / [Xeon]
43 * None of the A1AP-A3AP errata are visible to the user.
44 *
45 * A1AP. see PPro 1AP
46 * A2AP. see PPro 2AP
47 * A3AP. see PPro 7AP
48 *
49 * Pentium Pro
50 * None of 1AP-9AP errata are visible to the normal user,
51 * except occasional delivery of 'spurious interrupt' as trap #15.
52 * This is very rare and a non-problem.
53 *
54 * 1AP. Linux maps APIC as non-cacheable
55 * 2AP. worked around in hardware
56 * 3AP. fixed in C0 and above steppings microcode update.
57 * Linux does not use excessive STARTUP_IPIs.
58 * 4AP. worked around in hardware
59 * 5AP. symmetric IO mode (normal Linux operation) not affected.
60 * 'noapic' mode has vector 0xf filled out properly.
61 * 6AP. 'noapic' mode might be affected - fixed in later steppings
62 * 7AP. We do not assume writes to the LVT deassering IRQs
63 * 8AP. We do not enable low power mode (deep sleep) during MP bootup
64 * 9AP. We do not use mixed mode
65 *
66 * Pentium
67 * There is a marginal case where REP MOVS on 100MHz SMP
68 * machines with B stepping processors can fail. XXX should provide
69 * an L1cache=Writethrough or L1cache=off option.
70 *
71 * B stepping CPUs may hang. There are hardware work arounds
72 * for this. We warn about it in case your board doesn't have the work
73 * arounds. Basically that's so I can tell anyone with a B stepping
74 * CPU and SMP problems "tough".
75 *
76 * Specific items [From Pentium Processor Specification Update]
77 *
78 * 1AP. Linux doesn't use remote read
79 * 2AP. Linux doesn't trust APIC errors
80 * 3AP. We work around this
81 * 4AP. Linux never generated 3 interrupts of the same priority
82 * to cause a lost local interrupt.
83 * 5AP. Remote read is never used
84 * 6AP. not affected - worked around in hardware
85 * 7AP. not affected - worked around in hardware
86 * 8AP. worked around in hardware - we get explicit CS errors if not
87 * 9AP. only 'noapic' mode affected. Might generate spurious
88 * interrupts, we log only the first one and count the
89 * rest silently.
90 * 10AP. not affected - worked around in hardware
91 * 11AP. Linux reads the APIC between writes to avoid this, as per
92 * the documentation. Make sure you preserve this as it affects
93 * the C stepping chips too.
94 * 12AP. not affected - worked around in hardware
95 * 13AP. not affected - worked around in hardware
96 * 14AP. we always deassert INIT during bootup
97 * 15AP. not affected - worked around in hardware
98 * 16AP. not affected - worked around in hardware
99 * 17AP. not affected - worked around in hardware
100 * 18AP. not affected - worked around in hardware
101 * 19AP. not affected - worked around in BIOS
102 *
103 * If this sounds worrying believe me these bugs are either ___RARE___,
104 * or are signal timing bugs worked around in hardware and there's
105 * about nothing of note with C stepping upwards.
106 */
diff --git a/arch/x86/kernel/smp_64.c b/arch/x86/kernel/smp_64.c
deleted file mode 100644
index 26448fff0ab..00000000000
--- a/arch/x86/kernel/smp_64.c
+++ /dev/null
@@ -1,10 +0,0 @@
1/*
2 * Intel SMP support routines.
3 *
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998-99, 2000 Ingo Molnar <mingo@redhat.com>
6 * (c) 2002,2003 Andi Kleen, SuSE Labs.
7 *
8 * This code is released under the GNU General Public License version 2 or
9 * later.
10 */
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-18 06:24:45 -0400