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authorSanjeev Premi <premi@ti.com>2009-11-22 13:10:54 -0500
committerTony Lindgren <tony@atomide.com>2009-11-22 13:24:32 -0500
commit048f4bd7607eb714d4831f90dea6fd27eac9e494 (patch)
tree058f1848655c86294181bb76a71894c0d2de1890
parent8384ce071365244332ea05c81112bfffcf48be87 (diff)
omap3: Runtime detection of OMAP35x devices
Add runtime check for these OMAP35x variations based on the detected Si features: OMAP3503, OMAP3515, OMAP3525 and OMA3530. Also, delayed the call to pr_info() into actual variant is detected in omap3_cpuinfo() Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r--arch/arm/mach-omap2/id.c65
-rw-r--r--arch/arm/plat-omap/include/plat/cpu.h41
2 files changed, 95 insertions, 11 deletions
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index d7ac8d54714..88999eaf91b 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -187,7 +187,6 @@ void __init omap3_check_revision(void)
187 u32 cpuid, idcode; 187 u32 cpuid, idcode;
188 u16 hawkeye; 188 u16 hawkeye;
189 u8 rev; 189 u8 rev;
190 char *rev_name = "ES1.0";
191 190
192 /* 191 /*
193 * We cannot access revision registers on ES1.0. 192 * We cannot access revision registers on ES1.0.
@@ -197,7 +196,7 @@ void __init omap3_check_revision(void)
197 cpuid = read_cpuid(CPUID_ID); 196 cpuid = read_cpuid(CPUID_ID);
198 if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) { 197 if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
199 omap_revision = OMAP3430_REV_ES1_0; 198 omap_revision = OMAP3430_REV_ES1_0;
200 goto out; 199 return;
201 } 200 }
202 201
203 /* 202 /*
@@ -212,31 +211,24 @@ void __init omap3_check_revision(void)
212 211
213 if (hawkeye == 0xb7ae) { 212 if (hawkeye == 0xb7ae) {
214 switch (rev) { 213 switch (rev) {
215 case 0: 214 case 0: /* Take care of early samples */
215 case 1:
216 omap_revision = OMAP3430_REV_ES2_0; 216 omap_revision = OMAP3430_REV_ES2_0;
217 rev_name = "ES2.0";
218 break; 217 break;
219 case 2: 218 case 2:
220 omap_revision = OMAP3430_REV_ES2_1; 219 omap_revision = OMAP3430_REV_ES2_1;
221 rev_name = "ES2.1";
222 break; 220 break;
223 case 3: 221 case 3:
224 omap_revision = OMAP3430_REV_ES3_0; 222 omap_revision = OMAP3430_REV_ES3_0;
225 rev_name = "ES3.0";
226 break; 223 break;
227 case 4: 224 case 4:
228 omap_revision = OMAP3430_REV_ES3_1; 225 omap_revision = OMAP3430_REV_ES3_1;
229 rev_name = "ES3.1";
230 break; 226 break;
231 default: 227 default:
232 /* Use the latest known revision as default */ 228 /* Use the latest known revision as default */
233 omap_revision = OMAP3430_REV_ES3_1; 229 omap_revision = OMAP3430_REV_ES3_1;
234 rev_name = "Unknown revision\n";
235 } 230 }
236 } 231 }
237
238out:
239 pr_info("OMAP%04x %s\n", omap_rev() >> 16, rev_name);
240} 232}
241 233
242#define OMAP3_SHOW_FEATURE(feat) \ 234#define OMAP3_SHOW_FEATURE(feat) \
@@ -248,6 +240,57 @@ out:
248 240
249void __init omap3_cpuinfo(void) 241void __init omap3_cpuinfo(void)
250{ 242{
243 u8 rev = GET_OMAP_REVISION();
244 char cpu_name[16], cpu_rev[16];
245
246 /* OMAP3430 and OMAP3530 are assumed to be same.
247 *
248 * OMAP3525, OMAP3515 and OMAP3503 can be detected only based
249 * on available features. Upon detection, update the CPU id
250 * and CPU class bits.
251 */
252 if (omap3_has_iva() && omap3_has_sgx()) {
253 strcpy(cpu_name, "3430/3530");
254 }
255 else if (omap3_has_sgx()) {
256 omap_revision = OMAP3525_REV(rev);
257 strcpy(cpu_name, "3525");
258 }
259 else if (omap3_has_iva()) {
260 omap_revision = OMAP3515_REV(rev);
261 strcpy(cpu_name, "3515");
262 }
263 else {
264 omap_revision = OMAP3503_REV(rev);
265 strcpy(cpu_name, "3503");
266 }
267
268 switch (rev) {
269 case OMAP_REVBITS_00:
270 strcpy(cpu_rev, "1.0");
271 break;
272 case OMAP_REVBITS_10:
273 strcpy(cpu_rev, "2.0");
274 break;
275 case OMAP_REVBITS_20:
276 strcpy(cpu_rev, "2.1");
277 break;
278 case OMAP_REVBITS_30:
279 strcpy(cpu_rev, "3.0");
280 break;
281 case OMAP_REVBITS_40:
282 strcpy(cpu_rev, "3.1");
283 break;
284 default:
285 /* Use the latest known revision as default */
286 strcpy(cpu_rev, "3.1");
287 }
288
289 /*
290 * Print verbose information
291 */
292 pr_info("OMAP%s ES%s\n", cpu_name, cpu_rev);
293
251 OMAP3_SHOW_FEATURE(l2cache); 294 OMAP3_SHOW_FEATURE(l2cache);
252 OMAP3_SHOW_FEATURE(iva); 295 OMAP3_SHOW_FEATURE(iva);
253 OMAP3_SHOW_FEATURE(sgx); 296 OMAP3_SHOW_FEATURE(sgx);
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index 431fec45bbb..a67439327de 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -59,6 +59,23 @@ struct omap_chip_id {
59unsigned int omap_rev(void); 59unsigned int omap_rev(void);
60 60
61/* 61/*
62 * Define CPU revision bits
63 *
64 * Verbose meaning of the revision bits may be different for a silicon
65 * family. This difference can be handled separately.
66 */
67#define OMAP_REVBITS_00 0x00
68#define OMAP_REVBITS_10 0x10
69#define OMAP_REVBITS_20 0x20
70#define OMAP_REVBITS_30 0x30
71#define OMAP_REVBITS_40 0x40
72
73/*
74 * Get the CPU revision for OMAP devices
75 */
76#define GET_OMAP_REVISION() ((omap_rev() >> 8) & 0xff)
77
78/*
62 * Test if multicore OMAP support is needed 79 * Test if multicore OMAP support is needed
63 */ 80 */
64#undef MULTI_OMAP1 81#undef MULTI_OMAP1
@@ -303,6 +320,10 @@ IS_OMAP_TYPE(3430, 0x3430)
303#define cpu_is_omap2422() 0 320#define cpu_is_omap2422() 0
304#define cpu_is_omap2423() 0 321#define cpu_is_omap2423() 0
305#define cpu_is_omap2430() 0 322#define cpu_is_omap2430() 0
323#define cpu_is_omap3503() 0
324#define cpu_is_omap3515() 0
325#define cpu_is_omap3525() 0
326#define cpu_is_omap3530() 0
306#define cpu_is_omap3430() 0 327#define cpu_is_omap3430() 0
307 328
308/* 329/*
@@ -353,7 +374,21 @@ IS_OMAP_TYPE(3430, 0x3430)
353 374
354#if defined(CONFIG_ARCH_OMAP34XX) 375#if defined(CONFIG_ARCH_OMAP34XX)
355# undef cpu_is_omap3430 376# undef cpu_is_omap3430
377# undef cpu_is_omap3503
378# undef cpu_is_omap3515
379# undef cpu_is_omap3525
380# undef cpu_is_omap3530
356# define cpu_is_omap3430() is_omap3430() 381# define cpu_is_omap3430() is_omap3430()
382# define cpu_is_omap3503() (cpu_is_omap3430() && \
383 (!omap3_has_iva()) && \
384 (!omap3_has_sgx()))
385# define cpu_is_omap3515() (cpu_is_omap3430() && \
386 (omap3_has_iva()) && \
387 (!omap3_has_sgx()))
388# define cpu_is_omap3525() (cpu_is_omap3430() && \
389 (omap3_has_sgx()) && \
390 (!omap3_has_iva()))
391# define cpu_is_omap3530() (cpu_is_omap3430())
357#endif 392#endif
358 393
359# if defined(CONFIG_ARCH_OMAP4) 394# if defined(CONFIG_ARCH_OMAP4)
@@ -384,6 +419,12 @@ IS_OMAP_TYPE(3430, 0x3430)
384#define OMAP3430_REV_ES3_0 0x34303034 419#define OMAP3430_REV_ES3_0 0x34303034
385#define OMAP3430_REV_ES3_1 0x34304034 420#define OMAP3430_REV_ES3_1 0x34304034
386 421
422#define OMAP35XX_CLASS 0x35000034
423#define OMAP3503_REV(v) (OMAP35XX_CLASS | (0x3503 << 16) | (v << 12))
424#define OMAP3515_REV(v) (OMAP35XX_CLASS | (0x3515 << 16) | (v << 12))
425#define OMAP3525_REV(v) (OMAP35XX_CLASS | (0x3525 << 16) | (v << 12))
426#define OMAP3530_REV(v) (OMAP35XX_CLASS | (0x3530 << 16) | (v << 12))
427
387#define OMAP443X_CLASS 0x44300034 428#define OMAP443X_CLASS 0x44300034
388 429
389/* 430/*