diff options
author | Bruce Allan <bruce.w.allan@intel.com> | 2011-09-30 04:07:05 -0400 |
---|---|---|
committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2011-10-06 06:15:27 -0400 |
commit | 03299e46c9e857b885bf66c47bebc1bcac5dba55 (patch) | |
tree | 403ebafc8a7c016dd4789c51e4a442b7c74360fb | |
parent | f0cd7bdc042310b6b104f133bbfd520a72b3c08a (diff) |
e1000e: WoL can fail on 82578DM
During suspend, the PHY must be reset for workaround updates to take effect
without restarting auto-negotiation. Also, set the disable GbE and enable
Low Power Link Up (LPLU) if the EEPROM is configured to do likewise in
either D0 or non-D0a instead of just the latter.
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/ich8lan.c | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.c b/drivers/net/ethernet/intel/e1000e/ich8lan.c index 3b063e1ac83..4ec5a5ad4eb 100644 --- a/drivers/net/ethernet/intel/e1000e/ich8lan.c +++ b/drivers/net/ethernet/intel/e1000e/ich8lan.c | |||
@@ -1319,16 +1319,20 @@ static s32 e1000_oem_bits_config_ich8lan(struct e1000_hw *hw, bool d0_state) | |||
1319 | 1319 | ||
1320 | if (mac_reg & E1000_PHY_CTRL_D0A_LPLU) | 1320 | if (mac_reg & E1000_PHY_CTRL_D0A_LPLU) |
1321 | oem_reg |= HV_OEM_BITS_LPLU; | 1321 | oem_reg |= HV_OEM_BITS_LPLU; |
1322 | |||
1323 | /* Set Restart auto-neg to activate the bits */ | ||
1324 | if (!e1000_check_reset_block(hw)) | ||
1325 | oem_reg |= HV_OEM_BITS_RESTART_AN; | ||
1322 | } else { | 1326 | } else { |
1323 | if (mac_reg & E1000_PHY_CTRL_NOND0A_GBE_DISABLE) | 1327 | if (mac_reg & (E1000_PHY_CTRL_GBE_DISABLE | |
1328 | E1000_PHY_CTRL_NOND0A_GBE_DISABLE)) | ||
1324 | oem_reg |= HV_OEM_BITS_GBE_DIS; | 1329 | oem_reg |= HV_OEM_BITS_GBE_DIS; |
1325 | 1330 | ||
1326 | if (mac_reg & E1000_PHY_CTRL_NOND0A_LPLU) | 1331 | if (mac_reg & (E1000_PHY_CTRL_D0A_LPLU | |
1332 | E1000_PHY_CTRL_NOND0A_LPLU)) | ||
1327 | oem_reg |= HV_OEM_BITS_LPLU; | 1333 | oem_reg |= HV_OEM_BITS_LPLU; |
1328 | } | 1334 | } |
1329 | /* Restart auto-neg to activate the bits */ | 1335 | |
1330 | if (!e1000_check_reset_block(hw)) | ||
1331 | oem_reg |= HV_OEM_BITS_RESTART_AN; | ||
1332 | ret_val = hw->phy.ops.write_reg_locked(hw, HV_OEM_BITS, oem_reg); | 1336 | ret_val = hw->phy.ops.write_reg_locked(hw, HV_OEM_BITS, oem_reg); |
1333 | 1337 | ||
1334 | out: | 1338 | out: |
@@ -3684,6 +3688,7 @@ void e1000_suspend_workarounds_ich8lan(struct e1000_hw *hw) | |||
3684 | 3688 | ||
3685 | if (hw->mac.type >= e1000_pchlan) { | 3689 | if (hw->mac.type >= e1000_pchlan) { |
3686 | e1000_oem_bits_config_ich8lan(hw, false); | 3690 | e1000_oem_bits_config_ich8lan(hw, false); |
3691 | e1000_phy_hw_reset_ich8lan(hw); | ||
3687 | ret_val = hw->phy.ops.acquire(hw); | 3692 | ret_val = hw->phy.ops.acquire(hw); |
3688 | if (ret_val) | 3693 | if (ret_val) |
3689 | return; | 3694 | return; |