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* oprofile/fsl emb: Don't set MSR[PMM] until after clearing the interrupt.Scott Wood2010-10-14
| | | | | | | | | | | | | | | | | | On an arch 2.06 hypervisor, a pending perfmon interrupt will be delivered to the hypervisor at any point the guest is running, regardless of MSR[EE]. In order to reflect this interrupt, the hypervisor has to mask the interrupt in PMGC0 -- and set MSRP[PMMP] to intercept futher guest accesses to the PMRs to detect when to unmask (and prevent the guest from unmasking early, or seeing inconsistent state). This has the side effect of ignoring any changes the guest makes to MSR[PMM], so wait until after the interrupt is clear, and thus the hypervisor should have cleared MSRP[PMMP], before setting MSR[PMM]. The counters wil not actually run until PMGC0[FAC] is cleared in pmc_start_ctrs(), so this will not reduce the effectiveness of PMM. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/oprofile: Remove unused dump_pmcs() in FSL oprofileMichael Ellerman2009-05-19
| | | | | | | It's still in the git history if anyone wants it. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Made FSL Book-E PMC support more genericAndy Fleming2008-02-06
Some of the more recent e300 cores have the same performance monitor implementation as the e500. e300 isn't book-e, so the name isn't really appropriate. In preparation for e300 support, rename a bunch of fsl_booke things to say fsl_emb (Freescale Embedded Performance Monitors). Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>