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* Naively enable some performance counters.HEADpandaboard-litmusChristopher Kenna2012-10-10
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* omap4: add 4430 ES2.3 supportAnand Gadiyar2012-08-17
| | | | | | | | | | | | | | And default to 4430 ES2.3 for unidentified silicon. Signed-off-by: Anand Gadiyar <gadiyar@ti.com> (partially backported from 55035c1524b5b48ac7d267167c4895f7831897ad) BugLink: http://bugs.launchpad.net/bugs/917264 Signed-off-by: Paolo Pisati <paolo.pisati@canonical.com> Acked-by: Stefan Bader <stefan.bader@canonical.com> Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
* Revert "DRM: OMAP: Fixing PVR kernel module name"Sebastien Jan2012-08-17
| | | | | | This reverts commit 13312d2e5bae87b72f030290e6675e07833b3db0. Signed-off-by: Paolo Pisati <paolo.pisati@canonical.com>
* OMAP4460: L2X0 workaround applies just at 4460 ES1.0Ricardo Salveti de Araujo2012-08-17
| | | | Signed-off-by: Ricardo Salveti de Araujo <ricardo.salveti@linaro.org>
* DRM: OMAP: Fixing PVR kernel module nameRicardo Salveti de Araujo2012-08-17
| | | | | | | | We currently expect it to be "pvrsrvkm" and not "omap_gpu_pvr", so change it to load the correct driver. Signed-off-by: Ricardo Salveti de Araujo <ricardo.salveti@canonical.com> Signed-off-by: Ricardo Salveti de Araujo <ricardo.salveti@linaro.org>
* OMAP4460: HDMI: Disable HDMI DDC internal pull up resistorRicardo Salveti de Araujo2012-08-17
| | | | | | | | | Disables the internal pull resistor for SDA and SCL enabled by default as there are expernal pull up's to avoid the EDID read failure. Patch done mainly by Mythri P K <mythripk@ti.com> Signed-off-by: Ricardo Salveti de Araujo <ricardo.salveti@linaro.org>
* OMAP: hwmod: fix the i2c-reset timeout during bootupAvinash.H.M2012-08-17
| | | | | | | | | | | | | | | | | | | | | | | | The sequence of _ocp_softreset doesn't work for i2c. The i2c module has a special sequence to reset the module. The sequence is - Disable the I2C. - Write to SOFTRESET bit. - Enable the I2C. - Poll on the RESETDONE bit. The sequence is implemented as a function and the i2c_class is updated with the correct 'reset' pointer. omap_hwmod_softreset function is implemented which triggers the softreset by writing into sysconfig register. On following this sequence, i2c module resets properly and timeouts are not seen. Cc: Rajendra Nayak <rnayak@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: Avinash.H.M <avinashhm@ti.com> [paul@pwsan.com: combined this patch with a patch to remove HWMOD_INIT_NO_RESET from the 44xx hwmod flags; change register offset conditional code to use the IP block revision; minor code cleanup] Signed-off-by: Paul Walmsley <paul@pwsan.com>
* I2C: OMAP2+: add correct functionality flags to all omap2plus i2c dev_attrAndy Green2012-08-17
| | | | | | | | | | | | | | This adds the new functionality flags for omap i2c unit to all OMAP2 hwmod definitions Cc: patches@linaro.org Cc: Ben Dooks <ben-linux@fluff.org> Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andy Green <andy.green@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Ricardo Salveti de Araujo <ricardo.salveti@linaro.org>
* I2C: OMAP2+: Tag all OMAP2+ hwmod defintions with I2C IP revisionAndy Green2012-08-17
| | | | | | | | | | | | | | | | | Since we cannot trust (or even reliably find) the OMAP I2C peripheral unit's own revision register, we must inform the OMAP i2c driver of which IP version it is running on. We do this by tagging the omap_hwmod_class for i2c on all the OMAP2+ platform / cpu specific hwmod init and passing it up to the driver (next patches). Cc: patches@linaro.org Cc: Ben Dooks <ben-linux@fluff.org> Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andy Green <andy.green@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* I2C: OMAP2+: Set hwmod flags to only allow 16-bit accesses to i2cAndy Green2012-08-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Peter Maydell noticed when running under QEMU he was getting errors reporting 32-bit access to I2C peripheral unit registers that are documented to be 8 or 16-bit only[1][2] The I2C driver is blameless as it wraps its accesses in a function using __raw_writew and __raw_readw, it turned out it is the hwmod stuff. However the hwmod code already has a flag to force a perhipheral unit to only be accessed using 16-bit operations. This patch applies the 16-bit only flag to the 2430, OMAP3xxx and OMAP44xx hwmod structs. 2420 was already correctly marked up as 16-bit. The 2430 change will need testing by TI as arranged in the comments to the previous patch version. When the 16-bit flag is or-ed with other flags, it is placed first as requested in comments. [1] OMAP4430 Technical reference manual section 23.1.6.2 [2] OMAP3530 Techincal reference manual section 18.6 Cc: patches@linaro.org Cc: Ben Dooks <ben-linux@fluff.org> Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andy Green <andy.green@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP4: hwmod changes to make it work with 4460Ricardo Salveti de Araujo2012-08-17
| | | | Signed-off-by: Ricardo Salveti de Araujo <ricardo.salveti@linaro.org>
* OMAP4: Adding ID for OMAP4460 ES1.1Ricardo Salveti de Araujo2012-08-17
| | | | Signed-off-by: Ricardo Salveti de Araujo <ricardo.salveti@linaro.org>
* OMAP4: Pandaboard: Fixing Leds for 4460Ricardo Salveti de Araujo2012-08-17
| | | | Signed-off-by: Ricardo Salveti de Araujo <ricardo.salveti@linaro.org>
* ducati: switch clockdomain to SW managedSebastien Jan2012-08-17
| | | | | | | | Ducati reset procedure fails in HW managed (HW_AUTO) mode. The failure trace is: omap_hwmod: ipu_c0: failed to hardreset Signed-off-by: Sebastien Jan <s-jan@ti.com>
* hwmod: add missing ipu addressesSebastien Jan2012-08-17
| | | | Signed-off-by: Sebastien Jan <s-jan@ti.com>
* hwspinlock: deactivate upstream implementationSebastien Jan2012-08-17
| | | | | | | Upstream hwspinlocks implementation conflicts with legacy one. For now, deactivate the upstream version and use the legacy one. Signed-off-by: Sebastien Jan <s-jan@ti.com>
* Revert "fix: remove duplicate hwspinlock source"Sebastien Jan2012-08-17
| | | | This reverts commit 9a84fc90be096d69e376a31f1c8cf15fde9b9299.
* OMAP4: prcm: Fix errors in few defines nameBenoit Cousson2012-08-17
| | | | | | | | | | | | | | | | | | | | | | A couple of macros were wrongly changed during the _MOD to _INST rename done in the following commit: OMAP4: PRCM: rename _MOD macros to _INST cdb54c4457d68994da7c2e16907adfbfc130060d Fix them to their original name. Some CM and PRM instances were not well aligned. Align them. Remove one blank line in cm2_44xx.h to align the output with the other (cm1_44xx.h, prm44xx.h) files. Update header copyright date. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP4: ID: add omap_has_feature for max freq supportedAneesh V2012-08-17
| | | | | | | | | | | | | | Macros for identifying the max frequency supported by various OMAP4 variants - Expanding along the lines of OMAP3's feature handling. [nm@ti.com: minor fixes for checks that should only for 443x|446x] Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Reviewed-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* twl missing plat cpu includeAndy Green2012-08-17
| | | | Signed-off-by: Andy Green <andy.green@linaro.org>
* null out 4460 cache feture with unknown constantsAndy Green2012-08-17
| | | | Signed-off-by: Andy Green <andy.green@linaro.org>
* syslink: iommu: provide new api to return a deviceBryan Honza2012-08-17
| | | | | | | | | | | The ipu device is missing from the omap_ipupm_data. This results in a null device pointer being used when applying constraints. This change provides an api which can be used to return a device when queried by name. This is to support initializing omap_ipupm_data with a device. Change-Id: I490e61db6361652aa0fd63ba51e98af937eb800e Signed-off-by: Bryan Honza <honza@ti.com>
* omap4: iommu: add pm constraints for ducati iommuSuman Anna2012-08-17
| | | | | | | | | | | | | | | | | | | | | A constraint for CORE domain is requested by the IOMMU driver before releasing the Ducati's RST3, and is released when the IOMMU is being disabled. This ensures that the CORE domain does not go into Retention after releasing RST3, thereby eliminating any context loss in the Ducati Unicache registers due to CORE domain OSWR transitions. For runtime PM, the constraint is relaxed after the IOMMU driver has saved its context when Ducati is either self-hibernating or being suspended, and the constraint is requested again before restoring the context for ducati resume. Change-Id: Ib4042226d2529be141d69917bdb211ee6f30bd22 Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Miguel Vadillo <vadillo@ti.com> Signed-off-by: Juan Gutierrez <jgutierrez@ti.com> Signed-off-by: Paul Hunt <hunt@ti.com>
* fix: remove duplicate hwspinlock sourceSebastien Jan2012-08-17
| | | | Signed-off-by: Sebastien Jan <s-jan@ti.com>
* fix: 4430 platform becomes 44XXSebastien Jan2012-08-17
| | | | Signed-off-by: Sebastien Jan <s-jan@ti.com>
* SYSLINK: ipu-pm ported changes specific for 2.6.38 vanilla l-o kernel.Subramaniam C.A2012-08-17
| | | | | | | | | | | | | | This patch adds vanilla l-o 2.6.38 specific changes. The patch might get redundant once the OMAP_PM specific changes/ baseport changes go in. Check the return value of kfifo_out ti avoid a warning Do not use any constraint req/rel since the fwk is not ready yet. Signed-off-by: Miguel Vadillo <vadillo@ti.com> Signed-off-by: Subramaniam C.A <subramaniam.ca@ti.com> Signed-off-by: Cris Jansson <cjansson@ti.com>
* omap-hwmod: Add hwmod definitions for SysLink related devicesSubramaniam C.A2012-08-17
| | | | | | | | | | | | | | This patch adds hwmod definitions for all devices that are used/ requested by Syslink/ipu-pm. The devices are: --sl2if iss ipu mailbox hwspinlock fdif Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Miguel Vadillo <vadillo@ti.com> Signed-off-by: Simon Que <sque@ti.com> Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
* omap:palt-mach Use unlocked_ioctl instead of ioctlSubramaniam C.A2012-08-17
| | | | | | | This patch uses unlocked_ioctl instead of ioctl. The support for ioctl was removed since BKL is not to be used anymore Signed-off-by: Subramaniam C.A <subramaniam.ca@ti.com>
* omap:build- Add build support for remoteproc ipudev and hwspinlockSubramaniam C.A2012-08-17
| | | | | | | | | | | | | This patch adds support to build the remoteproc, ipudev and hwspinlock code for OMAP4. This was absent in the linux-omap 2.6.38 code. Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Ramesh Gupta G <grgupta@ti.com> Signed-off-by: Simon Que <sque@ti.com> Signed-off-by: Paul Hunt <hunt@ti.com> Signed-off-by: Subramaniam C.A <subramaniam.ca@ti.com>
* omap:iommu-handle the omap_hwmod_lookup value gracefullyHari Kanigeri2012-08-17
| | | | | | | | | In case omap_hwmod_lookup returns NULL, don't proceed further for this instance and continue with next device. Reported by: Rajendra Nayak Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com>
* omap:iommu: early registeration of iommu to handle hwmod dependency.Hari Kanigeri2012-08-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DVFS framework for DSP is dependent on hwmod registeration completed for DSP in iommu driver. This patch moves the iommu initialization to post-core init to ensure the registeration is completed prior to DVFS stuff. Without this fix, the following warning was observed during boot-up. ------------[ cut here ]------------ WARNING: at arch/arm/mach-omap2/pm.c:54 omap4_get_dsp_device+0x34/0x50() Modules linked in: Backtrace: [<c0039f9c>] (dump_backtrace+0x0/0x110) from [<c0380ce8>] (dump_stack+0x18/0x1c) r7:00000000 r6:c0041f70 r5:c044ba64 r4:00000036 [<c0380cd0>] (dump_stack+0x0/0x1c) from [<c006fde0>] (warn_slowpath_common+0x54/ 0x6c) [<c006fd8c>] (warn_slowpath_common+0x0/0x6c) from [<c006fe1c>] (warn_slowpath_nu ll+0x24/0x2c) r9:00000000 r8:00000000 r7:00000001 r6:c000f708 r5:c0508784 r4:c0503024 [<c006fdf8>] (warn_slowpath_null+0x0/0x2c) from [<c0041f70>] (omap4_get_dsp_devi ce+0x34/0x50) [<c0041f3c>] (omap4_get_dsp_device+0x0/0x50) from [<c001137c>] (omap4_pm_init_op p_table+0x144/0x244) r5:c0508784 r4:c050326c [<c0011238>] (omap4_pm_init_opp_table+0x0/0x244) from [<c000f79c>] (omap2_common _pm_init+0x94/0xbc) r5:c0508784 r4:c0503024 [<c000f708>] (omap2_common_pm_init+0x0/0xbc) from [<c003558c>] (do_one_initcall+ 0x64/0x1bc) r5:c0508784 r4:c002b5bc [<c0035528>] (do_one_initcall+0x0/0x1bc) from [<c0008644>] (kernel_init+0x168/0x 238) r7:c050877c r6:c04ca560 r5:c0508784 r4:c002b5bc [<c00084dc>] (kernel_init+0x0/0x238) from [<c00736f0>] (do_exit+0x0/0x5f0) r7:00000013 r6:c00736f0 r5:c00084dc r4:00000000 ---[ end trace dec6997083161631 ]--- Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> Signed-off-by: Paul Hunt <hunt@ti.com>
* omap:iodmm Refactor iodmm code and fix compilation issue. Allow cache flushHari Kanigeri2012-08-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | omap:iodmm-dmm code moved to new file and fixes The patch handles the following 1. Moved the code out of iovmm to new file. 2. Removed the config option related to IOVMM in makefile 3. Moved the DMM pool creation part to iodmm.c 4. Removed the hacks that were made to handle Tiler buffers. 5. Only buffers that are mapped would be permittted for flushing. 6. Removed the ioctl to program PTE entries directly from userspace. Regular DMM should be used to program the PTE entries. This requires userspace change 7. Removed unused functions. 8. Provided the support to map Anonymous buffers. 9. Provided the support to map Physical address if passed. 10. Replaced the local spinlock with global mutex lock for critical critical sections. Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> omap:iodmm-resolve compilation issue This patch resolves the following build issue that was observed when build with omap3 defcofig. arch/arm/plat-omap/iodmm.c: In function 'user_to_device_map': arch/arm/plat-omap/iodmm.c:425: error: dereferencing pointer to incomplete type arch/arm/plat-omap/iodmm.c: In function 'dmm_user': arch/arm/plat-omap/iodmm.c:655: error: dereferencing pointer to incomplete type arch/arm/plat-omap/iodmm.c:744: error: dereferencing pointer to incomplete type make[1]: *** [arch/arm/plat-omap/iodmm.o] Error 1 m Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> omap:iodmm-allow unconditional cache flush This patch reverts back Russell King's patch to do the userspace buffer cache flush. This allows unconditional cache operations and this patch is considered as a hack patch until the new API is alinged with MM team Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com>
* omap:iommu: save/restore changes for iommuMiguel Vadillo2012-08-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | omap:iommu: save/restore tlbs entries Introduce a way to save/restore the tlbs entries. When saving is call all 32 entries are saved. When restoring just the valid ones are restored. A new member in iommu obj was added to save/restore the tlbs - iommu tlbs context: saved area struct iotlb_entry *tlbs_e Signed-off-by: Miguel Vadillo <vadillo@ti.com> Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> Signed-off-by: Fernando Guzman Lugo <x0095840@ti.com> Signed-off-by: Juan Gutierrez <jgutierrez@ti.com> Signed-off-by: Paul Hunt <hunt@ti.com> omap:iommu: Change in iommu to save/restore To save the context the tlbs are being saved using iommu_save_tlb_entries() then the iommu is disable. To restore the context the tlbs are being restored using iommu_restore_tlb_entries() then the iommu is enable. There is no need to save the registers that is why ctx was removed from the iommu struct. omap2_save/restore function were removed. Signed-off-by: Miguel Vadillo <vadillo@ti.com> Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> Signed-off-by: Fernando Guzman Lugo <x0095840@ti.com> Signed-off-by: Juan Gutierrez <jgutierrez@ti.com> Signed-off-by: Paul Hunt <hunt@ti.com omap:iommu: dump ctx for omap4 Adding the two new registers just for omap4 in the dumping context function. Signed-off-by: Miguel Vadillo <vadillo@ti.com> Signed-off-by: Juan Gutierrez <jgutierrez@ti.com> Signed-off-by: Paul Hunt <hunt@ti.com> omap:iommu: iommu_debug fix due to api change New function to get the version of IOMMU was added since now there is a need to determine if its tesla or ducati. iommu_debug.c was updated to use this API Signed-off-by: Miguel Vadillo <vadillo@ti.com> Signed-off-by: Juan Gutierrez <jgutierrez@ti.com> Signed-off-by: Paul Hunt <hunt@ti.com> omap:iommu: set MMU_GP_REG to force a bus error upon MMU fault MMU_GP_REG[0] determines the behavior of Ducati cores upon hitting an MMU fault (address is not mapped in L2MMU). If it is not set, the cores are hung preventing the fault handler to run. If one introduces a bus error, the fault handler gets to run and prints state information which is useful for debug. Signed-off-by: Wajahat Khan <w-khan@ti.com> Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com>
* omap:iommu-use platform device for iovmmHari Kanigeri2012-08-17
| | | | | | use platform device instead of omap device for iovmm. Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com>
* omap:iommu-disable the MMU interrupts in fault ISRAngela Stegmaier2012-08-17
| | | | | | | | | | | Instead of disabling the MMU device, just disable the MMU interrupts when the MMU fault occurs. This change is required because the user applications might be releasing the MMU resources after the MMU fault recovery and this requires MMU to be in enabled state. MMU will be disabled after all the open handles to IOMMU are closed. Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
* omap:iommu -Inital support for DMM using iommuHari Kanigeri2012-08-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | omap:iommu-ported dspbridge's dmm code to iommu This patch ports the dspbridge's dmm code to iommu location. Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> Signed-off-by: Ramesh Gupta <grgupta@ti.com> omap:iommu-added cache flushing operation for L2 cache Signed-off-by: Ramesh Gupta <grgupta@ti.com> Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> omap:iovmm-add interface to userspace DMM signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> signed-off-by: Ramesh Gupta <grgupta@ti.com> omap:iommu-event notification to userspace Implement iommu event notifications to userspace using eventfd Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> Signed-off-by: Angela Stegmaier <angelabaker@ti.com> IODMM add support for unmap functionality Adds unmap functionality , adds the map information of loadable sections to the mapped list. Signed-off-by: Ramesh Gupta G <grgupta@ti.com>
* omap:iommu-adapt to hwmod implementationHari Kanigeri2012-08-17
| | | | | | | This patch adapts iommu to hwmod implementation for OMAP4. Work needs to be done for OMAP3 Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com>
* omap: iommu- twl and tlb fixesHari Kanigeri2012-08-17
| | | | | | | | | | | | | | | | | | | | | | | | omap: iommu-update irq mask to be specific about twl and tlb Revise the IRQ mask definitions to handle the MMU faults related to TWL fault as well as TLB miss fault. Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> Signed-off-by: Hiroshi Doyu <Hiroshi.DOYU@nokia.com> omap: iommu-add functionality to get TLB miss interrupt In order to enable TLB miss interrupt, the TWL should be disabled. This patch provides the functionality to get the MMU fault interrupt for a TLB miss in the cases where the users are working with the locked TLB entries and with TWL disabled. New interface is added to select twl and to enable TLB miss interrupt. Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> Signed-off-by: Ramesh Gupta <grgupta@ti.com> Signed-off-by: Hiroshi Doyu <Hiroshi.DOYU@nokia.com>
* SYSLINK:add build files to SyslinkHari Kanigeri2012-08-17
| | | | | | | | This patch adds build related files Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Ramesh Gupta G <grgupta@ti.com>
* omap: remoteproc: use gptimer 4 and 9 as ipu clkMiguel Vadillo2012-08-17
| | | | | | | | | | | | | | Enable gptimer 4 and 9 to be used as ipu clk. Gptimers will be requested when calling rproc_start() and released them when calling rproc_stop(), also when hibernating ipu the gptimers will be stop/start to ensure proper pm functionality. The gptimer numbers are configurable, currently 4 will be used by ipu_c0 and 9 by ipu_c1. Change-Id: I9424991e34e786ab2f57a1dc625ae801290fd7b6 Reported-by: Paul Hunt <hunt@ti.com> Signed-off-by: Miguel Vadillo <vadillo@ti.com>
* OMAP: rproc44xx: free dmtimer in proc stop caseHari Kanigeri2012-08-17
| | | | | | | | | | | The current code is freeing dmtimer in proc stop only if the proc state is in RUNNING. But the proc stop could be called when the proc state is HIBERNATION. The fix is to free dmtimer without any check Change-Id: Ib9efbb38b8973f688013f3a8f4a94cae1469e390 Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com>
* omap: mach-omap2: adapt remoteproc to dmtimer context save / restorePaul Hunt2012-08-17
| | | | | | | | | | | | The dmtimer module now supports the saving and restoration of timer registers which would otherwise be lost when going to OSWR or OFF. This patch adapts remoteproc to use omap_dm_timer_stop( ) and omap_dm_timer_start( ) which handle the save and restore respectively, instead of omap_dm_timer_disable( ) and omap_dm_timer_enable( ). Change-Id: Id13a3365a4ca8dca55178fbba90b11c480a6e2a4 Signed-off-by: Paul Hunt <hunt@ti.com>
* omap:remoteproc-Initial support for remote procHari Kanigeri2012-08-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch provides the inital series of commits for remote proc on omap omap:remoteproc-add remoteproc support Add remote proc support Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Singed-off-by: Angela Stegmaier <angelabaker@ti.com> omap:remoteproc-provide multi-omap support This patch resolves the build issues when trying to build with multi-omap configuration. Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> omap:remoteproc-add mechanism to enable bios timer BIOS requires the GPTimer for handling the OS activities. This is to configuer the GPTimers that are required for the remote processors. Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> Signed-off-by: Fernando Guzman Lugo <x0095840@ti.com> syslink: rproc - add support for START and STOP events Now apps can wait for remote proc START and STOP events Signed-off-by: Fernando Guzman Lugo <x0095840@ti.com> rproc: fix missing common proc args to match userspace Add the common proc args structure to store the status of the api in order to match userspace side. Signed-off-by: Fernando Guzman Lugo <x0095840@ti.com> rproc: add protection to rproc_eventdf_ntfy The list of fd handles most be protected while traversing Signed-off-by: Fernando Guzman Lugo <x0095840@ti.com> omap:remoteproc: disable gpt3&4 as bios timer source Each core sys/app were requesting gpt3/4, respectively, as bios timer source clock. This patch is disabling the use of those timers as bios timer source since now the internal M3 timers are set for this purpose. Anyway the mechanism to set any timer as bios timer source was kept. If a gptimer is set as bios timer source changes in Ducati side are needed. Signed-off-by: Miguel Vadillo <vadillo@ti.com> omap:remoteproc: enable gpt3&4 for ipu hibernation gptimer 3/4 are set to be use at the hibernation timers for IPU, both clocks are enabled and configured in rproc_start and disable in rproc_stop. When mpu is hibernating IPU the iommu and mbox context will be saved and then rproc_sleep will be called to disable each core and also the associated gptimer needed to allowed retention. Whenever a message is sent to IPU the ipu_pm_restore will check and wake up ipu, if needed, restoring the iommu and mbox context and calling rproc_wake that will enable ipu and the associated gptimer again. When disable, the hibernating process will only happen if the system suspend/resume path is sent, IPU self hibernation wont be executed. Also gpt3/4 won't be requested at all. Signed-off-by: Miguel Vadillo <vadillo@ti.com> Signed-off-by: Juan Gutierrez <jgutierrez@ti.com> Signed-off-by: Paul Hunt <hunt@ti.com> omap: remoteproc - fix sparse warnings in remote proc about static This patch fixes these warnings: arch/arm/plat-omap/remoteproc.c:45:6: warning: symbol 'rproc_eventfd_ntfy' was not declared. Should it be static? arch/arm/plat-omap/remoteproc.c:180:5: warning: symbol 'rproc_reg_user_event' was not declared. Should it be static? arch/arm/plat-omap/remoteproc.c:227:5: warning: symbol 'rproc_unreg_user_event' was not declared. Should it be static? Change-Id: Ie822bbf97dc9dbf4b76bff8e115b3e9063037710 Signed-off-by: Fernando Guzman Lugo <x0095840@ti.com> omap: remoteproc: CONFIG flag for self hibernation A new CONFIG flag is introduce to control IPU self hibernation the name of the new flag is CONFIG_SYSLINK_IPU_SELF_HIBERNATION when disable the timers used by IPU to hibernate and the flag in sh mem to allow hibernation of IPU are not set and IPU will hibernate only when sending the system suspend. On the other hand if the flag is set after N seconds of inactivity and if there is no resource requested by IPU (using ipu_pm) IPU will hibernate. Change-Id: I3f14257930a861c8784d7159a821228111b3ba37 Signed-off-by: Miguel Vadillo <vadillo@ti.com>
* omap3: hwmod: disable hwspinlocksG, Manjunath Kondaiah2012-08-17
| | | | | | | | | | | | | | | | | | | | | | The hwspinlock hwmod is implemented only for omap4 and not supported for omap3 and omap2. This patch enable hwspinlocks only for omap4. Boot warning on omap3: [ 0.000000] ------------[ cut here ]------------ [ 0.000000] WARNING: at arch/arm/mach-omap2/hwspinlocks.c:61 hwspinlocks_init+0x24/0xbc() [ 0.000000] Modules linked in: [ 0.000000] [<c00470ec>] (unwind_backtrace+0x0/0xe4) from [<c0078978>] (warn_slowpath_common+0x4c/0x64) [ 0.000000] [<c0078978>] (warn_slowpath_common+0x4c/0x64) from [<c00789a8>] (warn_slowpath_null+0x18/0x1c) [ 0.000000] [<c00789a8>] (warn_slowpath_null+0x18/0x1c) from [<c0017040>] (hwspinlocks_init+0x24/0xbc) [ 0.000000] [<c0017040>] (hwspinlocks_init+0x24/0xbc) from [<c0041340>] (do_one_initcall+0x58/0x1b4) [ 0.000000] [<c0041340>] (do_one_initcall+0x58/0x1b4) from [<c0008574>] (kernel_init+0x98/0x150) [ 0.000000] [<c0008574>] (kernel_init+0x98/0x150) from [<c0042970>] (kernel_thread_exit+0x0/0x8) [ 0.000000] ---[ end trace 1b75b31a2719ed1c ]-- Signed-off-by: G, Manjunath Kondaiah <manjugk@ti.com>
* omap:hwspinlocks-ensure the order of registrationHari Kanigeri2012-08-17
| | | | | | | Ensure that the hwspinlock driver is registered prior to I2C driver registration since I2C is dependent on hwspinlock. Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com>
* omap:hwspinlocks add pm_runtime_enableBalaji T K2012-08-17
| | | | | | | Add pm_runtime_enable to hwspinlock_probe change pm_runtime_get to pm_runtime_get_sync Signed-off-by: Balaji T K <balajitk@ti.com>
* omap:hwspinlock-added hwspinlock driverSimon Que2012-08-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Created driver for OMAP hardware spinlock. This driver supports: - Reserved spinlocks for internal use - Dynamic allocation of unreserved locks - Lock, unlock, and trylock functions, with or without disabling irqs/preempt - Registered as a platform device driver The device initialization uses hwmod to configure the devices. One device will be created for each IP. It will pass spinlock register offset info to the driver. The device initialization file is: arch/arm/mach-omap2/hwspinlocks.c The driver takes in register offset info passed in device initialization. It uses hwmod to obtain the base address of the hardware spinlock module. Then it reads info from the registers. The function hwspinlock_probe() initializes the array of spinlock structures, each containing a spinlock register address calculated from the base address and lock offsets. The device driver file is: arch/arm/plat-omap/hwspinlock.c Here's an API summary: int hwspinlock_lock(struct hwspinlock *); Attempt to lock a hardware spinlock. If it is busy, the function will keep trying until it succeeds. This is a blocking function. int hwspinlock_trylock(struct hwspinlock *); Attempt to lock a hardware spinlock. If it is busy, the function will return BUSY. If it succeeds in locking, the function will return ACQUIRED. This is a non-blocking function. int hwspinlock_unlock(struct hwspinlock *); Unlock a hardware spinlock. struct hwspinlock *hwspinlock_request(void); Provides for "dynamic allocation" of a hardware spinlock. It returns the handle to the next available (unallocated) spinlock. If no more locks are available, it returns NULL. struct hwspinlock *hwspinlock_request_specific(unsigned int); Provides for "static allocation" of a specific hardware spinlock. This allows the system to use a specific spinlock, identified by an ID. If the ID is invalid or if the desired lock is already allocated, this will return NULL. Otherwise it returns a spinlock handle. int hwspinlock_free(struct hwspinlock *); Frees an allocated hardware spinlock (either reserved or unreserved). Signed-off-by: Simon Que <sque@ti.com> Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com>
* omap: mach-omap2: don't wake ipu from hibernation for suspendMiguel Vadillo2012-08-17
| | | | | | | | | | | | | | If the IPU subsystem has hibernated, there is no need to wake it up and forward suspend notifications. Also, resume notifications will not be forwarded to the IPU SS if it has hibernated. This is because self-hibernation only occurs when no resources are in use. In this case the SysLink PM context save/restore should be all that is needed. Change-Id: I892e58b569d922038db8fb8604d1432087235f75 Signed-off-by: Miguel Vadillo <vadillo@ti.com> Signed-off-by: Paul Hunt <hunt@ti.com> Signed-off-by: Juan Gutierrez <jgutierrez@ti.com> Signed-off-by: Axel Haslam <axelhaslam@ti.com>
* SYSLINK:ipu-pm: Refactor ipu-pm module and fix suspend/resumeMiguel Vadillo2012-08-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Also has compiler warning fix in AUXCLK request function syslink: ipu_pm: refactor and cleanup functions Including: - ipu_pm module code was a reviewed and reworked to remove redundant code, simplify and enhance the implementation. - Change ipu_notifications to receive proc_id. - Add IOMMU_FAULT notifier callback function. - Function to release all resources when IOMMU_FAULT event is received or when detaching, this is called in a workqueue to avoid calling context problems in the case of the FAULT event and called directly in the case of detaching. - Add the possibility to select the SRC_CLK when requesting a gptimer. - Add pr_debug traces for debugging purpose: Previosly all the errors when requesting/releasing resources were just reported to IPU using notify_event in the payload. Now kernel is printing errors/warnings/ debug messages and also reporting the error back to IPU. This is needed because IPU could be dead and not able to see/print the error ipu_pm is reporting. Change-Id: I22614bafc7cb7e3070d5bf565be6138fca5a809b Signed-off-by: Miguel Vadillo <vadillo@ti.com> syslink: ipu_pm: fix suspend/resume when no IPU image loaded ipu_pm_drv_suspend and _resume were trying to notify ipu for suspend/resume without cheking if an image was loaded leading to an error in the suspend path. Checking the handle to each proc before sending the notification is avoiding this. Suspend/resume is working now with/without an image loaded in IPU. Change-Id: I55aca1674b1cdffba9fb3247e7da605b4082a521 Signed-off-by: Miguel Vadillo <vadillo@ti.com> SYSLINK: IPU-PM: clean up warning in AUXCLK request function clean up clk_disable( ) warning in AUXCLK request function: ipu_pm_get_aux_clk( ). Change-Id: I6bcc41e220f80f4e248bef65b3ed0fc379451d98 Signed-off-by: Paul Hunt <hunt@ti.com> SYSLINK: IPU-PM: restore IOMMU during ipu pm detach and mmu close The IPU PM during the Ducati hibernation is shutting down the IOMMU. If the User process that is using IOMMU is killed when the Ducati is in hibernation state, the board hangs due to access to IOMMU during resource cleanup. The issue was observed when the Syslink daemon is killed with Ducati in hibernation. Change-Id: Ia5bd05fe382488c33ac858657f05aee9e22a48ee Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com>
* omap:ipu_pm: Patchset to introduce ipu_pm functionality. omap:ipu_pm: add ↵Paul Hunt2012-08-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ipu_dev header to mach-omap2 tree Header file needed fot mach-omap2/ipu_dev.c file Signed-off-by: Paul Hunt <hunt@ti.com> omap:ipu_pm: add ipu_utility to mach-omap2 tree IVAHD Sequencer WFI Boot Code for IPU PM Driver Signed-off-by: Paul Hunt <hunt@ti.com> omap:ipu_pm: add ipu_drv to mach-omap2 tree Add needed api for ipu_pm module Signed-off-by: Paul Hunt <hunt@ti.com> omap:ipu_pm: add ipu_dev to mach-omap2 tree. Platform Device handling for IPU PM Driver Includes: - ipu_pm_module_start - ipu_pm_module_stop - platform data definition for the following devices: + fdif + ipu + ipu_c0 + ipu_c1 + iss + iva + iva_seq0 + iva_seq1 + L3 + mpu -ipussdev_init to init all devices. Signed-off-by: Paul Hunt <hunt@ti.com> syslink:ipu_pm: add/remove ipu_pm_start/stop Add the calls to api that will enable: - iva_hd - iva_seq0 - iva_seq1 - fdif - iss modules using the hwmod implementation. Hibernation disabled. Gptimer3 used for hibernation was disabled. Setting CM_MPU_M3_CLKSTCTRL.CLKTRCTRL[1:0] = HW_AUTO Retention is disable by default. Signed-off-by: Paul Hunt <hunt@ti.com> syslink:ipu_pm: fix req/rel aux_clk/iss/iva/idle The current implementation was not meeting all the requiriments needed to properly enable and use aux_clk. Anyway this is a hack way to do it, the proper implementation is still pending. Signed-off-by: Miguel Vadillo <vadillo@ti.com> Temporary path using cmm_write_reg to enable CAM_PHY Signed-off-by: Paul Hunt <hunt@ti.com> Ivahd requesting was not fully working since sl2 was not being requested and that is needed for ivahd to be fully functional. In ipu_dev sl2 is initialized In ipu_pm the flow to request iva should be: - Requesting (ivaseq1 call is requesting sl2) ivahd>ivaseq0>(ivaseq1>sl2) - Releasing (iva call is first releasing sl2) ivaseq0>ivaseq1>(sl2>ivahd) Signed-off-by: Miguel Vadillo <vadillo@ti.com> Setting IdleAllowed flag that enables the idle mode in Ducati. WFI can be called in Ducati flag whenever this flag is set Signed-off-by: Juan Gutierrez <jgutierrez@ti.com> Fix a compile error related to iva/iss when trying to build with ES1.0 configuration. In ES1.0, the PM is not supported. Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> Signed-off-by: Miguel Vadillo <vadillo@ti.com> syslink:ipu_pm: DFVS support for freq Fix bug in error message string referencing Signed-off-by: Paul Hunt <hunt@ti.com> Add platform data for DSP resource and fix attributes for MPU and L3 interconnect. Signed-off-by: Paul Hunt <hunt@ti.com> Provide internal APIs for performance and latency constraint frameworks to use to assert these constraints into the system power management. Signed-off-by: Paul Hunt <hunt@ti.com> MPU and CORE freq/lat cstrs Add special handling for MPU and CORE frequency and latency constraints. To specify a constraint to MPU or CORE the api needs to be called passing the following to the api: - IPUPM_SELF - IPUPM_MPU - IPUPM_CORE Signed-off-by: Paul Hunt <hunt@ti.com> DVFS support in ipu_pm Calling the dvfs apis per resource. Included: - ipu[perf|lat] - iss[perf|lat] - ivahd[perf|lat] - L3 bus[lat] - mpu[perf|lat] Pending: - fdif - dsp Note: Latency calls are working but hasnt been tested. Perf/rate calls are working. Signed-off-by: Miguel Vadillo <vadillo@ti.com> Signed-off-by: Paul Hunt <hunt@ti.com> (cherry picked from commit 3c1cdb45bb67d11eda14420a7b8eaacff0c24173) SYSLINK:IPU-PM-move iommu handles to attach and detach Move getting iommu handle to attach and detach from setup/destroy. Having the iommu get in setup is causing the mmu fault recovery fail since the iommu object gets incremented before the fault application closes the iommu handle which leads to failure in shutting down the iommu device completely. Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> syslink:ipu_pm: add L3 bw and fdif cstr ipu_pm api to set the bandwidth constraint for L3 bus New api is: ipu_pm_module_set_bandwidth(rsrc, target_rsrc, bw); bw is received in KiB/s and converted into Hz Add support to set performance and latency cstrs to fdif. Signed-off-by: Miguel Vadillo <vadillo@ti.com> Signed-off-by: Paul Hunt <hunt@ti.com> Signed-off-by: Juan Gutierrez <jgutierrez@ti.com> syslink:ipu_pm: send pid_death just to appm3 ipu_pm_notification is broadcasting all events to both sys/app processors whenever an event is sent using that api. For PID_DEATH event the requirement is only to send the message to APPM3 since is the one that will be executing the resource manager; also because of that sending the message to SYSM3 is unnecessary. Signed-off-by: Miguel Vadillo <vadillo@ti.com> syslink:ipu_pm: allow IPU hibernation -IPU self hibernation- After 5 seconds of inactivity ipu will send a notification to MPU indicating it can be turned off, mpu can proceed to turn off IPU just if there is no message (notify_send_event) going to IPU, in that case hibernation will be aborted. IPU is prepared to abort hibernation when a message arrives to its mbox. When mpu is hibernating IPU the iommu and mbox context will be saved and then rproc_sleep will be called to disable each core and also the associated gptimer, that is needed to allow retention. Whenever a message is sent to IPU the ipu_pm_restore will check and wake up IPU, if needed, restoring the iommu and mbox context and calling rproc_wake that will enable IPU and the associated gptimer again. -MPU hibernating IPU- Whenever the system suspend is sent to ipu_drv the suspend_drv will send a SUSPEND notification to IPU, it will send back an ack to MPU and then start the hibernation proccess by it self following the same scheme mentioned above but without waiting the 5 seconds, once ipu_drv receives the suspend ack it will call ipu_pm_save_ctx() in order to wait for IPU to be hibernated and in really idle then turn IPU off. This will work even if self hibernation in IPU is disable. Signed-off-by: Miguel Vadillo <vadillo@ti.com> Signed-off-by: Juan Gutierrez <jgutierrez@ti.com> Signed-off-by: Paul Hunt <hunt@ti.com> IPU PM: adapt aux clk funcs to new framework entities Signed-off-by: Paul Hunt <hunt@ti.com> IPU PM: temporary workaround for missing MM AUX_CLK requests Signed-off-by: Paul Hunt <hunt@ti.com> syslink: ipu_pm: add support for all the auxclk Previously ipu_pm was only supporting the request of AUX_CLK_1/3 now all the available aux_clk 0-5 are supported and can be requested/released via ipu_pm. Also the base address of the AUX_CLK was fixed since it was assuming AUX_CLK_0 as AUX_CLK_1 leading to a misalignment when requesting. Signed-off-by: Miguel Vadillo <vadillo@ti.com> syslink: ipu_pm: add a core latency constraint when the ipu is running. Due to the enabling of C4 and C5 states IPU was being put in reset without allowing it to properly save the context leading to an invalid resume operation and an MMU fault by IPU side. Putting a latency constraint on IPU_CORE whenever IPU is up and running is avoiding this scenario. The constraint is released once the IPU has properly saved the context and requested again when resuming to avoid letting the ipu_core going to retention. Change-Id: Iced64ff0744b2d6b0a0ecfc1952ed26e9e560278 Signed-off-by: Miguel Vadillo <vadillo@ti.com> Signed-off-by: Paul Hunt <hunt@ti.com> omap:syslink: removing gpt4 as available Gptimers 3 & 4 are reserving for ipu_pm internal use gpt3 was removed in previous patch from the list of available gptimers that IPU can request but gpt4 was still in the list. This patch removes gpt4 from the list. Signed-off-by: Miguel Vadillo <vadillo@ti.com>
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-25 06:21:16 -0400