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path: root/drivers/net/wireless/rtlwifi/pci.c
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Diffstat (limited to 'drivers/net/wireless/rtlwifi/pci.c')
-rw-r--r--drivers/net/wireless/rtlwifi/pci.c170
1 files changed, 18 insertions, 152 deletions
diff --git a/drivers/net/wireless/rtlwifi/pci.c b/drivers/net/wireless/rtlwifi/pci.c
index aeb0901ce71..367d9b4ebd2 100644
--- a/drivers/net/wireless/rtlwifi/pci.c
+++ b/drivers/net/wireless/rtlwifi/pci.c
@@ -48,11 +48,11 @@ static const u8 ac_to_hwq[] = {
48 BK_QUEUE 48 BK_QUEUE
49}; 49};
50 50
51u8 _rtl_mac_to_hwqueue(struct ieee80211_hw *hw, 51static u8 _rtl_mac_to_hwqueue(struct ieee80211_hw *hw,
52 struct sk_buff *skb) 52 struct sk_buff *skb)
53{ 53{
54 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); 54 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
55 u16 fc = rtl_get_fc(skb); 55 __le16 fc = rtl_get_fc(skb);
56 u8 queue_index = skb_get_queue_mapping(skb); 56 u8 queue_index = skb_get_queue_mapping(skb);
57 57
58 if (unlikely(ieee80211_is_beacon(fc))) 58 if (unlikely(ieee80211_is_beacon(fc)))
@@ -181,71 +181,6 @@ static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
181 ppsc->support_aspm = false; 181 ppsc->support_aspm = false;
182} 182}
183 183
184/*Disable L0s dirtectly. We will disable host L0s by default. */
185void rtl_pci_disable_host_l0s(struct ieee80211_hw *hw)
186{
187 struct rtl_priv *rtlpriv = rtl_priv(hw);
188 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
189 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
190 u8 pcibridge_busnum = pcipriv->ndis_adapter.pcibridge_busnum;
191 u8 pcibridge_devnum = pcipriv->ndis_adapter.pcibridge_devnum;
192 u8 pcibridge_funcnum = pcipriv->ndis_adapter.pcibridge_funcnum;
193 u32 pcicfg_addrport = pcipriv->ndis_adapter.pcicfg_addrport;
194 u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
195 u8 u_pcibridge_aspmsetting = 0;
196
197 /*Read Link Control Register */
198 rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
199 pcicfg_addrport + (num4bytes << 2));
200 rtl_pci_raw_read_port_uchar(PCI_CONF_DATA, &u_pcibridge_aspmsetting);
201
202 if (u_pcibridge_aspmsetting & BIT(0))
203 u_pcibridge_aspmsetting &= ~(BIT(0));
204
205 rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
206 pcicfg_addrport + (num4bytes << 2));
207 rtl_pci_raw_write_port_uchar(PCI_CONF_DATA, u_pcibridge_aspmsetting);
208
209 udelay(50);
210
211 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
212 ("PciBridge busnumber[%x], DevNumbe[%x], "
213 "funcnumber[%x], Write reg[%x] = %lx\n",
214 pcibridge_busnum, pcibridge_devnum, pcibridge_funcnum,
215 (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10),
216 (pcipriv->ndis_adapter.pcibridge_linkctrlreg |
217 (rtlpci->const_devicepci_aspm_setting & ~BIT(0)))));
218}
219
220/*Enable rtl8192ce backdoor to control ASPM and clock request.*/
221bool rtl_pci_enable_back_door(struct ieee80211_hw *hw)
222{
223 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
224 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
225 u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
226 bool bresult = true;
227 u8 value;
228
229 pci_read_config_byte(rtlpci->pdev, 0x70f, &value);
230
231 /*0x70f BIT(7) is used to control L0S */
232 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL) {
233 value |= BIT(7);
234 } else {
235 /*Set 0x70f to 0x23 when non-Intel platform. */
236 value = 0x23;
237 }
238
239 pci_write_config_byte(rtlpci->pdev, 0x70f, value);
240
241 pci_read_config_byte(rtlpci->pdev, 0x719, &value);
242 /*0x719 BIT(3) is for L1 BIT(4) is for clock request */
243 value |= (BIT(3) | BIT(4));
244 pci_write_config_byte(rtlpci->pdev, 0x719, value);
245
246 return bresult;
247}
248
249static bool _rtl_pci_platform_switch_device_pci_aspm( 184static bool _rtl_pci_platform_switch_device_pci_aspm(
250 struct ieee80211_hw *hw, 185 struct ieee80211_hw *hw,
251 u8 value) 186 u8 value)
@@ -426,7 +361,7 @@ static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw)
426 return status; 361 return status;
427} 362}
428 363
429void rtl_pci_get_linkcontrol_field(struct ieee80211_hw *hw) 364static void rtl_pci_get_linkcontrol_field(struct ieee80211_hw *hw)
430{ 365{
431 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw); 366 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
432 u8 capabilityoffset = pcipriv->ndis_adapter.pcibridge_pciehdr_offset; 367 u8 capabilityoffset = pcipriv->ndis_adapter.pcibridge_pciehdr_offset;
@@ -618,9 +553,9 @@ static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
618 553
619 skb = __skb_dequeue(&ring->queue); 554 skb = __skb_dequeue(&ring->queue);
620 pci_unmap_single(rtlpci->pdev, 555 pci_unmap_single(rtlpci->pdev,
621 le32_to_cpu(rtlpriv->cfg->ops-> 556 rtlpriv->cfg->ops->
622 get_desc((u8 *) entry, true, 557 get_desc((u8 *) entry, true,
623 HW_DESC_TXBUFF_ADDR)), 558 HW_DESC_TXBUFF_ADDR),
624 skb->len, PCI_DMA_TODEVICE); 559 skb->len, PCI_DMA_TODEVICE);
625 560
626 /* remove early mode header */ 561 /* remove early mode header */
@@ -844,7 +779,7 @@ static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
844 779
845 } 780 }
846done: 781done:
847 bufferaddress = cpu_to_le32(*((dma_addr_t *)skb->cb)); 782 bufferaddress = (*((dma_addr_t *)skb->cb));
848 tmp_one = 1; 783 tmp_one = 1;
849 rtlpriv->cfg->ops->set_desc((u8 *) pdesc, false, 784 rtlpriv->cfg->ops->set_desc((u8 *) pdesc, false,
850 HW_DESC_RXBUFF_ADDR, 785 HW_DESC_RXBUFF_ADDR,
@@ -868,75 +803,6 @@ done:
868 803
869} 804}
870 805
871void _rtl_pci_tx_interrupt(struct ieee80211_hw *hw)
872{
873 struct rtl_priv *rtlpriv = rtl_priv(hw);
874 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
875 int prio;
876
877 for (prio = 0; prio < RTL_PCI_MAX_TX_QUEUE_COUNT; prio++) {
878 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
879
880 while (skb_queue_len(&ring->queue)) {
881 struct rtl_tx_desc *entry = &ring->desc[ring->idx];
882 struct sk_buff *skb;
883 struct ieee80211_tx_info *info;
884 u8 own;
885
886 /*
887 *beacon packet will only use the first
888 *descriptor defautly, and the own may not
889 *be cleared by the hardware, and
890 *beacon will free in prepare beacon
891 */
892 if (prio == BEACON_QUEUE || prio == TXCMD_QUEUE ||
893 prio == HCCA_QUEUE)
894 break;
895
896 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) entry,
897 true,
898 HW_DESC_OWN);
899
900 if (own)
901 break;
902
903 skb = __skb_dequeue(&ring->queue);
904 pci_unmap_single(rtlpci->pdev,
905 le32_to_cpu(rtlpriv->cfg->ops->
906 get_desc((u8 *) entry,
907 true,
908 HW_DESC_TXBUFF_ADDR)),
909 skb->len, PCI_DMA_TODEVICE);
910
911 ring->idx = (ring->idx + 1) % ring->entries;
912
913 info = IEEE80211_SKB_CB(skb);
914 ieee80211_tx_info_clear_status(info);
915
916 info->flags |= IEEE80211_TX_STAT_ACK;
917 /*info->status.rates[0].count = 1; */
918
919 ieee80211_tx_status_irqsafe(hw, skb);
920
921 if ((ring->entries - skb_queue_len(&ring->queue))
922 == 2 && prio != BEACON_QUEUE) {
923 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
924 ("more desc left, wake "
925 "skb_queue@%d,ring->idx = %d,"
926 "skb_queue_len = 0x%d\n",
927 prio, ring->idx,
928 skb_queue_len(&ring->queue)));
929
930 ieee80211_wake_queue(hw,
931 skb_get_queue_mapping
932 (skb));
933 }
934
935 skb = NULL;
936 }
937 }
938}
939
940static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id) 806static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id)
941{ 807{
942 struct ieee80211_hw *hw = dev_id; 808 struct ieee80211_hw *hw = dev_id;
@@ -1202,9 +1068,9 @@ static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
1202 ("queue:%d, ring_addr:%p\n", prio, ring)); 1068 ("queue:%d, ring_addr:%p\n", prio, ring));
1203 1069
1204 for (i = 0; i < entries; i++) { 1070 for (i = 0; i < entries; i++) {
1205 nextdescaddress = cpu_to_le32((u32) dma + 1071 nextdescaddress = (u32) dma +
1206 ((i + 11) % entries) * 1072 ((i + 11) % entries) *
1207 sizeof(*ring)); 1073 sizeof(*ring);
1208 1074
1209 rtlpriv->cfg->ops->set_desc((u8 *)&(ring[i]), 1075 rtlpriv->cfg->ops->set_desc((u8 *)&(ring[i]),
1210 true, HW_DESC_TX_NEXTDESC_ADDR, 1076 true, HW_DESC_TX_NEXTDESC_ADDR,
@@ -1268,7 +1134,7 @@ static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw)
1268 rtlpci->rxbuffersize, 1134 rtlpci->rxbuffersize,
1269 PCI_DMA_FROMDEVICE); 1135 PCI_DMA_FROMDEVICE);
1270 1136
1271 bufferaddress = cpu_to_le32(*((dma_addr_t *)skb->cb)); 1137 bufferaddress = (*((dma_addr_t *)skb->cb));
1272 rtlpriv->cfg->ops->set_desc((u8 *)entry, false, 1138 rtlpriv->cfg->ops->set_desc((u8 *)entry, false,
1273 HW_DESC_RXBUFF_ADDR, 1139 HW_DESC_RXBUFF_ADDR,
1274 (u8 *)&bufferaddress); 1140 (u8 *)&bufferaddress);
@@ -1299,9 +1165,9 @@ static void _rtl_pci_free_tx_ring(struct ieee80211_hw *hw,
1299 struct sk_buff *skb = __skb_dequeue(&ring->queue); 1165 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1300 1166
1301 pci_unmap_single(rtlpci->pdev, 1167 pci_unmap_single(rtlpci->pdev,
1302 le32_to_cpu(rtlpriv->cfg-> 1168 rtlpriv->cfg->
1303 ops->get_desc((u8 *) entry, true, 1169 ops->get_desc((u8 *) entry, true,
1304 HW_DESC_TXBUFF_ADDR)), 1170 HW_DESC_TXBUFF_ADDR),
1305 skb->len, PCI_DMA_TODEVICE); 1171 skb->len, PCI_DMA_TODEVICE);
1306 kfree_skb(skb); 1172 kfree_skb(skb);
1307 ring->idx = (ring->idx + 1) % ring->entries; 1173 ring->idx = (ring->idx + 1) % ring->entries;
@@ -1433,11 +1299,11 @@ int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
1433 __skb_dequeue(&ring->queue); 1299 __skb_dequeue(&ring->queue);
1434 1300
1435 pci_unmap_single(rtlpci->pdev, 1301 pci_unmap_single(rtlpci->pdev,
1436 le32_to_cpu(rtlpriv->cfg->ops-> 1302 rtlpriv->cfg->ops->
1437 get_desc((u8 *) 1303 get_desc((u8 *)
1438 entry, 1304 entry,
1439 true, 1305 true,
1440 HW_DESC_TXBUFF_ADDR)), 1306 HW_DESC_TXBUFF_ADDR),
1441 skb->len, PCI_DMA_TODEVICE); 1307 skb->len, PCI_DMA_TODEVICE);
1442 kfree_skb(skb); 1308 kfree_skb(skb);
1443 ring->idx = (ring->idx + 1) % ring->entries; 1309 ring->idx = (ring->idx + 1) % ring->entries;
@@ -1484,7 +1350,7 @@ static bool rtl_pci_tx_chk_waitq_insert(struct ieee80211_hw *hw,
1484 return true; 1350 return true;
1485} 1351}
1486 1352
1487int rtl_pci_tx(struct ieee80211_hw *hw, struct sk_buff *skb, 1353static int rtl_pci_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
1488 struct rtl_tcb_desc *ptcb_desc) 1354 struct rtl_tcb_desc *ptcb_desc)
1489{ 1355{
1490 struct rtl_priv *rtlpriv = rtl_priv(hw); 1356 struct rtl_priv *rtlpriv = rtl_priv(hw);
@@ -1623,7 +1489,7 @@ static void rtl_pci_flush(struct ieee80211_hw *hw, bool drop)
1623 } 1489 }
1624} 1490}
1625 1491
1626void rtl_pci_deinit(struct ieee80211_hw *hw) 1492static void rtl_pci_deinit(struct ieee80211_hw *hw)
1627{ 1493{
1628 struct rtl_priv *rtlpriv = rtl_priv(hw); 1494 struct rtl_priv *rtlpriv = rtl_priv(hw);
1629 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 1495 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
@@ -1638,7 +1504,7 @@ void rtl_pci_deinit(struct ieee80211_hw *hw)
1638 1504
1639} 1505}
1640 1506
1641int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev) 1507static int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
1642{ 1508{
1643 struct rtl_priv *rtlpriv = rtl_priv(hw); 1509 struct rtl_priv *rtlpriv = rtl_priv(hw);
1644 int err; 1510 int err;
@@ -1655,7 +1521,7 @@ int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
1655 return 1; 1521 return 1;
1656} 1522}
1657 1523
1658int rtl_pci_start(struct ieee80211_hw *hw) 1524static int rtl_pci_start(struct ieee80211_hw *hw)
1659{ 1525{
1660 struct rtl_priv *rtlpriv = rtl_priv(hw); 1526 struct rtl_priv *rtlpriv = rtl_priv(hw);
1661 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); 1527 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
@@ -1690,7 +1556,7 @@ int rtl_pci_start(struct ieee80211_hw *hw)
1690 return 0; 1556 return 0;
1691} 1557}
1692 1558
1693void rtl_pci_stop(struct ieee80211_hw *hw) 1559static void rtl_pci_stop(struct ieee80211_hw *hw)
1694{ 1560{
1695 struct rtl_priv *rtlpriv = rtl_priv(hw); 1561 struct rtl_priv *rtlpriv = rtl_priv(hw);
1696 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 1562 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-25 19:50:42 -0400