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path: root/drivers/gpu/drm/radeon/atombios_crtc.c
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Diffstat (limited to 'drivers/gpu/drm/radeon/atombios_crtc.c')
-rw-r--r--drivers/gpu/drm/radeon/atombios_crtc.c20
1 files changed, 20 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 10e41af6b02..b41ec59c710 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -1009,6 +1009,7 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc,
1009 uint64_t fb_location; 1009 uint64_t fb_location;
1010 uint32_t fb_format, fb_pitch_pixels, tiling_flags; 1010 uint32_t fb_format, fb_pitch_pixels, tiling_flags;
1011 u32 fb_swap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_NONE); 1011 u32 fb_swap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_NONE);
1012 u32 tmp;
1012 int r; 1013 int r;
1013 1014
1014 /* no fb bound */ 1015 /* no fb bound */
@@ -1137,6 +1138,15 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc,
1137 WREG32(EVERGREEN_VIEWPORT_SIZE + radeon_crtc->crtc_offset, 1138 WREG32(EVERGREEN_VIEWPORT_SIZE + radeon_crtc->crtc_offset,
1138 (crtc->mode.hdisplay << 16) | crtc->mode.vdisplay); 1139 (crtc->mode.hdisplay << 16) | crtc->mode.vdisplay);
1139 1140
1141 /* pageflip setup */
1142 /* make sure flip is at vb rather than hb */
1143 tmp = RREG32(EVERGREEN_GRPH_FLIP_CONTROL + radeon_crtc->crtc_offset);
1144 tmp &= ~EVERGREEN_GRPH_SURFACE_UPDATE_H_RETRACE_EN;
1145 WREG32(EVERGREEN_GRPH_FLIP_CONTROL + radeon_crtc->crtc_offset, tmp);
1146
1147 /* set pageflip to happen anywhere in vblank interval */
1148 WREG32(EVERGREEN_MASTER_UPDATE_MODE + radeon_crtc->crtc_offset, 0);
1149
1140 if (!atomic && fb && fb != crtc->fb) { 1150 if (!atomic && fb && fb != crtc->fb) {
1141 radeon_fb = to_radeon_framebuffer(fb); 1151 radeon_fb = to_radeon_framebuffer(fb);
1142 rbo = gem_to_radeon_bo(radeon_fb->obj); 1152 rbo = gem_to_radeon_bo(radeon_fb->obj);
@@ -1167,6 +1177,7 @@ static int avivo_crtc_do_set_base(struct drm_crtc *crtc,
1167 uint64_t fb_location; 1177 uint64_t fb_location;
1168 uint32_t fb_format, fb_pitch_pixels, tiling_flags; 1178 uint32_t fb_format, fb_pitch_pixels, tiling_flags;
1169 u32 fb_swap = R600_D1GRPH_SWAP_ENDIAN_NONE; 1179 u32 fb_swap = R600_D1GRPH_SWAP_ENDIAN_NONE;
1180 u32 tmp;
1170 int r; 1181 int r;
1171 1182
1172 /* no fb bound */ 1183 /* no fb bound */
@@ -1294,6 +1305,15 @@ static int avivo_crtc_do_set_base(struct drm_crtc *crtc,
1294 WREG32(AVIVO_D1MODE_VIEWPORT_SIZE + radeon_crtc->crtc_offset, 1305 WREG32(AVIVO_D1MODE_VIEWPORT_SIZE + radeon_crtc->crtc_offset,
1295 (crtc->mode.hdisplay << 16) | crtc->mode.vdisplay); 1306 (crtc->mode.hdisplay << 16) | crtc->mode.vdisplay);
1296 1307
1308 /* pageflip setup */
1309 /* make sure flip is at vb rather than hb */
1310 tmp = RREG32(AVIVO_D1GRPH_FLIP_CONTROL + radeon_crtc->crtc_offset);
1311 tmp &= ~AVIVO_D1GRPH_SURFACE_UPDATE_H_RETRACE_EN;
1312 WREG32(AVIVO_D1GRPH_FLIP_CONTROL + radeon_crtc->crtc_offset, tmp);
1313
1314 /* set pageflip to happen anywhere in vblank interval */
1315 WREG32(AVIVO_D1MODE_MASTER_UPDATE_MODE + radeon_crtc->crtc_offset, 0);
1316
1297 if (!atomic && fb && fb != crtc->fb) { 1317 if (!atomic && fb && fb != crtc->fb) {
1298 radeon_fb = to_radeon_framebuffer(fb); 1318 radeon_fb = to_radeon_framebuffer(fb);
1299 rbo = gem_to_radeon_bo(radeon_fb->obj); 1319 rbo = gem_to_radeon_bo(radeon_fb->obj);