diff options
Diffstat (limited to 'arch/sh/kernel/cpu/irq/intc-sh5.c')
-rw-r--r-- | arch/sh/kernel/cpu/irq/intc-sh5.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/sh/kernel/cpu/irq/intc-sh5.c b/arch/sh/kernel/cpu/irq/intc-sh5.c index 06e7e2959b5..96a23958394 100644 --- a/arch/sh/kernel/cpu/irq/intc-sh5.c +++ b/arch/sh/kernel/cpu/irq/intc-sh5.c | |||
@@ -123,7 +123,7 @@ static void enable_intc_irq(unsigned int irq) | |||
123 | bitmask = 1 << (irq - 32); | 123 | bitmask = 1 << (irq - 32); |
124 | } | 124 | } |
125 | 125 | ||
126 | ctrl_outl(bitmask, reg); | 126 | __raw_writel(bitmask, reg); |
127 | } | 127 | } |
128 | 128 | ||
129 | static void disable_intc_irq(unsigned int irq) | 129 | static void disable_intc_irq(unsigned int irq) |
@@ -139,7 +139,7 @@ static void disable_intc_irq(unsigned int irq) | |||
139 | bitmask = 1 << (irq - 32); | 139 | bitmask = 1 << (irq - 32); |
140 | } | 140 | } |
141 | 141 | ||
142 | ctrl_outl(bitmask, reg); | 142 | __raw_writel(bitmask, reg); |
143 | } | 143 | } |
144 | 144 | ||
145 | static void mask_and_ack_intc(unsigned int irq) | 145 | static void mask_and_ack_intc(unsigned int irq) |
@@ -170,11 +170,11 @@ void __init plat_irq_setup(void) | |||
170 | 170 | ||
171 | 171 | ||
172 | /* Disable all interrupts and set all priorities to 0 to avoid trouble */ | 172 | /* Disable all interrupts and set all priorities to 0 to avoid trouble */ |
173 | ctrl_outl(-1, INTC_INTDSB_0); | 173 | __raw_writel(-1, INTC_INTDSB_0); |
174 | ctrl_outl(-1, INTC_INTDSB_1); | 174 | __raw_writel(-1, INTC_INTDSB_1); |
175 | 175 | ||
176 | for (reg = INTC_INTPRI_0, i = 0; i < INTC_INTPRI_PREGS; i++, reg += 8) | 176 | for (reg = INTC_INTPRI_0, i = 0; i < INTC_INTPRI_PREGS; i++, reg += 8) |
177 | ctrl_outl( NO_PRIORITY, reg); | 177 | __raw_writel( NO_PRIORITY, reg); |
178 | 178 | ||
179 | 179 | ||
180 | #ifdef CONFIG_SH_CAYMAN | 180 | #ifdef CONFIG_SH_CAYMAN |
@@ -199,7 +199,7 @@ void __init plat_irq_setup(void) | |||
199 | reg = INTC_ICR_SET; | 199 | reg = INTC_ICR_SET; |
200 | i = IRQ_IRL0; | 200 | i = IRQ_IRL0; |
201 | } | 201 | } |
202 | ctrl_outl(INTC_ICR_IRLM, reg); | 202 | __raw_writel(INTC_ICR_IRLM, reg); |
203 | 203 | ||
204 | /* Set interrupt priorities according to platform description */ | 204 | /* Set interrupt priorities according to platform description */ |
205 | for (data = 0, reg = INTC_INTPRI_0; i < NR_INTC_IRQS; i++) { | 205 | for (data = 0, reg = INTC_INTPRI_0; i < NR_INTC_IRQS; i++) { |
@@ -207,7 +207,7 @@ void __init plat_irq_setup(void) | |||
207 | ((i % INTC_INTPRI_PPREG) * 4); | 207 | ((i % INTC_INTPRI_PPREG) * 4); |
208 | if ((i % INTC_INTPRI_PPREG) == (INTC_INTPRI_PPREG - 1)) { | 208 | if ((i % INTC_INTPRI_PPREG) == (INTC_INTPRI_PPREG - 1)) { |
209 | /* Upon the 7th, set Priority Register */ | 209 | /* Upon the 7th, set Priority Register */ |
210 | ctrl_outl(data, reg); | 210 | __raw_writel(data, reg); |
211 | data = 0; | 211 | data = 0; |
212 | reg += 8; | 212 | reg += 8; |
213 | } | 213 | } |