diff options
Diffstat (limited to 'arch/arm')
675 files changed, 42107 insertions, 7881 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 1c4119c6004..cf8a99f19dc 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
| @@ -433,6 +433,17 @@ config ARCH_L7200 | |||
| 433 | If you have any questions or comments about the Linux kernel port | 433 | If you have any questions or comments about the Linux kernel port |
| 434 | to this board, send e-mail to <sjhill@cotw.com>. | 434 | to this board, send e-mail to <sjhill@cotw.com>. |
| 435 | 435 | ||
| 436 | config ARCH_DOVE | ||
| 437 | bool "Marvell Dove" | ||
| 438 | select PCI | ||
| 439 | select GENERIC_GPIO | ||
| 440 | select ARCH_REQUIRE_GPIOLIB | ||
| 441 | select GENERIC_TIME | ||
| 442 | select GENERIC_CLOCKEVENTS | ||
| 443 | select PLAT_ORION | ||
| 444 | help | ||
| 445 | Support for the Marvell Dove SoC 88AP510 | ||
| 446 | |||
| 436 | config ARCH_KIRKWOOD | 447 | config ARCH_KIRKWOOD |
| 437 | bool "Marvell Kirkwood" | 448 | bool "Marvell Kirkwood" |
| 438 | select CPU_FEROCEON | 449 | select CPU_FEROCEON |
| @@ -702,6 +713,16 @@ config ARCH_BCMRING | |||
| 702 | help | 713 | help |
| 703 | Support for Broadcom's BCMRing platform. | 714 | Support for Broadcom's BCMRing platform. |
| 704 | 715 | ||
| 716 | config ARCH_U8500 | ||
| 717 | bool "ST-Ericsson U8500 Series" | ||
| 718 | select CPU_V7 | ||
| 719 | select ARM_AMBA | ||
| 720 | select GENERIC_TIME | ||
| 721 | select GENERIC_CLOCKEVENTS | ||
| 722 | select COMMON_CLKDEV | ||
| 723 | help | ||
| 724 | Support for ST-Ericsson's Ux500 architecture | ||
| 725 | |||
| 705 | endchoice | 726 | endchoice |
| 706 | 727 | ||
| 707 | source "arch/arm/mach-clps711x/Kconfig" | 728 | source "arch/arm/mach-clps711x/Kconfig" |
| @@ -747,6 +768,9 @@ source "arch/arm/mach-orion5x/Kconfig" | |||
| 747 | 768 | ||
| 748 | source "arch/arm/mach-kirkwood/Kconfig" | 769 | source "arch/arm/mach-kirkwood/Kconfig" |
| 749 | 770 | ||
| 771 | source "arch/arm/mach-dove/Kconfig" | ||
| 772 | |||
| 773 | source "arch/arm/plat-samsung/Kconfig" | ||
| 750 | source "arch/arm/plat-s3c24xx/Kconfig" | 774 | source "arch/arm/plat-s3c24xx/Kconfig" |
| 751 | source "arch/arm/plat-s3c64xx/Kconfig" | 775 | source "arch/arm/plat-s3c64xx/Kconfig" |
| 752 | source "arch/arm/plat-s3c/Kconfig" | 776 | source "arch/arm/plat-s3c/Kconfig" |
| @@ -787,6 +811,7 @@ source "arch/arm/mach-at91/Kconfig" | |||
| 787 | source "arch/arm/plat-mxc/Kconfig" | 811 | source "arch/arm/plat-mxc/Kconfig" |
| 788 | 812 | ||
| 789 | source "arch/arm/mach-nomadik/Kconfig" | 813 | source "arch/arm/mach-nomadik/Kconfig" |
| 814 | source "arch/arm/plat-nomadik/Kconfig" | ||
| 790 | 815 | ||
| 791 | source "arch/arm/mach-netx/Kconfig" | 816 | source "arch/arm/mach-netx/Kconfig" |
| 792 | 817 | ||
| @@ -804,12 +829,16 @@ source "arch/arm/mach-w90x900/Kconfig" | |||
| 804 | 829 | ||
| 805 | source "arch/arm/mach-bcmring/Kconfig" | 830 | source "arch/arm/mach-bcmring/Kconfig" |
| 806 | 831 | ||
| 832 | source "arch/arm/mach-ux500/Kconfig" | ||
| 833 | |||
| 807 | # Definitions to make life easier | 834 | # Definitions to make life easier |
| 808 | config ARCH_ACORN | 835 | config ARCH_ACORN |
| 809 | bool | 836 | bool |
| 810 | 837 | ||
| 811 | config PLAT_IOP | 838 | config PLAT_IOP |
| 812 | bool | 839 | bool |
| 840 | select GENERIC_CLOCKEVENTS | ||
| 841 | select GENERIC_TIME | ||
| 813 | 842 | ||
| 814 | config PLAT_ORION | 843 | config PLAT_ORION |
| 815 | bool | 844 | bool |
| @@ -955,10 +984,10 @@ source "kernel/time/Kconfig" | |||
| 955 | config SMP | 984 | config SMP |
| 956 | bool "Symmetric Multi-Processing (EXPERIMENTAL)" | 985 | bool "Symmetric Multi-Processing (EXPERIMENTAL)" |
| 957 | depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP ||\ | 986 | depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP ||\ |
| 958 | MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4) | 987 | MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || ARCH_U8500) |
| 959 | depends on GENERIC_CLOCKEVENTS | 988 | depends on GENERIC_CLOCKEVENTS |
| 960 | select USE_GENERIC_SMP_HELPERS | 989 | select USE_GENERIC_SMP_HELPERS |
| 961 | select HAVE_ARM_SCU if (ARCH_REALVIEW || ARCH_OMAP4) | 990 | select HAVE_ARM_SCU if (ARCH_REALVIEW || ARCH_OMAP4 || ARCH_U8500) |
| 962 | help | 991 | help |
| 963 | This enables support for systems with more than one CPU. If you have | 992 | This enables support for systems with more than one CPU. If you have |
| 964 | a system with only one CPU, like most personal computers, say N. If | 993 | a system with only one CPU, like most personal computers, say N. If |
| @@ -1027,9 +1056,9 @@ config HOTPLUG_CPU | |||
| 1027 | config LOCAL_TIMERS | 1056 | config LOCAL_TIMERS |
| 1028 | bool "Use local timer interrupts" | 1057 | bool "Use local timer interrupts" |
| 1029 | depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || \ | 1058 | depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || \ |
| 1030 | REALVIEW_EB_A9MP || MACH_REALVIEW_PBX || ARCH_OMAP4) | 1059 | REALVIEW_EB_A9MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || ARCH_U8500) |
| 1031 | default y | 1060 | default y |
| 1032 | select HAVE_ARM_TWD if (ARCH_REALVIEW || ARCH_OMAP4) | 1061 | select HAVE_ARM_TWD if (ARCH_REALVIEW || ARCH_OMAP4 || ARCH_U8500) |
| 1033 | help | 1062 | help |
| 1034 | Enable support for local timers on SMP platforms, rather then the | 1063 | Enable support for local timers on SMP platforms, rather then the |
| 1035 | legacy IPI broadcast method. Local timers allows the system | 1064 | legacy IPI broadcast method. Local timers allows the system |
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 1a6f70e5292..ff54c23d085 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug | |||
| @@ -83,6 +83,14 @@ config DEBUG_ICEDCC | |||
| 83 | It does include a timeout to ensure that the system does not | 83 | It does include a timeout to ensure that the system does not |
| 84 | totally freeze when there is nothing connected to read. | 84 | totally freeze when there is nothing connected to read. |
| 85 | 85 | ||
| 86 | config OC_ETM | ||
| 87 | bool "On-chip ETM and ETB" | ||
| 88 | select ARM_AMBA | ||
| 89 | help | ||
| 90 | Enables the on-chip embedded trace macrocell and embedded trace | ||
| 91 | buffer driver that will allow you to collect traces of the | ||
| 92 | kernel code. | ||
| 93 | |||
| 86 | config DEBUG_DC21285_PORT | 94 | config DEBUG_DC21285_PORT |
| 87 | bool "Kernel low-level debugging messages via footbridge serial port" | 95 | bool "Kernel low-level debugging messages via footbridge serial port" |
| 88 | depends on DEBUG_LL && FOOTBRIDGE | 96 | depends on DEBUG_LL && FOOTBRIDGE |
diff --git a/arch/arm/Makefile b/arch/arm/Makefile index a73caaf6676..fa0cdab2e1d 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile | |||
| @@ -122,6 +122,7 @@ machine-$(CONFIG_ARCH_AT91) := at91 | |||
| 122 | machine-$(CONFIG_ARCH_BCMRING) := bcmring | 122 | machine-$(CONFIG_ARCH_BCMRING) := bcmring |
| 123 | machine-$(CONFIG_ARCH_CLPS711X) := clps711x | 123 | machine-$(CONFIG_ARCH_CLPS711X) := clps711x |
| 124 | machine-$(CONFIG_ARCH_DAVINCI) := davinci | 124 | machine-$(CONFIG_ARCH_DAVINCI) := davinci |
| 125 | machine-$(CONFIG_ARCH_DOVE) := dove | ||
| 125 | machine-$(CONFIG_ARCH_EBSA110) := ebsa110 | 126 | machine-$(CONFIG_ARCH_EBSA110) := ebsa110 |
| 126 | machine-$(CONFIG_ARCH_EP93XX) := ep93xx | 127 | machine-$(CONFIG_ARCH_EP93XX) := ep93xx |
| 127 | machine-$(CONFIG_ARCH_GEMINI) := gemini | 128 | machine-$(CONFIG_ARCH_GEMINI) := gemini |
| @@ -166,6 +167,7 @@ machine-$(CONFIG_ARCH_SHARK) := shark | |||
| 166 | machine-$(CONFIG_ARCH_STMP378X) := stmp378x | 167 | machine-$(CONFIG_ARCH_STMP378X) := stmp378x |
| 167 | machine-$(CONFIG_ARCH_STMP37XX) := stmp37xx | 168 | machine-$(CONFIG_ARCH_STMP37XX) := stmp37xx |
| 168 | machine-$(CONFIG_ARCH_U300) := u300 | 169 | machine-$(CONFIG_ARCH_U300) := u300 |
| 170 | machine-$(CONFIG_ARCH_U8500) := ux500 | ||
| 169 | machine-$(CONFIG_ARCH_VERSATILE) := versatile | 171 | machine-$(CONFIG_ARCH_VERSATILE) := versatile |
| 170 | machine-$(CONFIG_ARCH_W90X900) := w90x900 | 172 | machine-$(CONFIG_ARCH_W90X900) := w90x900 |
| 171 | machine-$(CONFIG_FOOTBRIDGE) := footbridge | 173 | machine-$(CONFIG_FOOTBRIDGE) := footbridge |
| @@ -176,11 +178,12 @@ machine-$(CONFIG_ARCH_MXC91231) := mxc91231 | |||
| 176 | plat-$(CONFIG_ARCH_MXC) := mxc | 178 | plat-$(CONFIG_ARCH_MXC) := mxc |
| 177 | plat-$(CONFIG_ARCH_OMAP) := omap | 179 | plat-$(CONFIG_ARCH_OMAP) := omap |
| 178 | plat-$(CONFIG_PLAT_IOP) := iop | 180 | plat-$(CONFIG_PLAT_IOP) := iop |
| 181 | plat-$(CONFIG_PLAT_NOMADIK) := nomadik | ||
| 179 | plat-$(CONFIG_PLAT_ORION) := orion | 182 | plat-$(CONFIG_PLAT_ORION) := orion |
| 180 | plat-$(CONFIG_PLAT_PXA) := pxa | 183 | plat-$(CONFIG_PLAT_PXA) := pxa |
| 181 | plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx s3c | 184 | plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx s3c samsung |
| 182 | plat-$(CONFIG_PLAT_S3C64XX) := s3c64xx s3c | 185 | plat-$(CONFIG_PLAT_S3C64XX) := s3c64xx s3c samsung |
| 183 | plat-$(CONFIG_PLAT_S5PC1XX) := s5pc1xx s3c | 186 | plat-$(CONFIG_PLAT_S5PC1XX) := s5pc1xx s3c samsung |
| 184 | plat-$(CONFIG_ARCH_STMP3XXX) := stmp3xxx | 187 | plat-$(CONFIG_ARCH_STMP3XXX) := stmp3xxx |
| 185 | 188 | ||
| 186 | ifeq ($(CONFIG_ARCH_EBSA110),y) | 189 | ifeq ($(CONFIG_ARCH_EBSA110),y) |
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index fa6fbf45cf3..d356af7cef8 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S | |||
| @@ -743,6 +743,12 @@ proc_types: | |||
| 743 | W(b) __armv4_mmu_cache_off | 743 | W(b) __armv4_mmu_cache_off |
| 744 | W(b) __armv6_mmu_cache_flush | 744 | W(b) __armv6_mmu_cache_flush |
| 745 | 745 | ||
| 746 | .word 0x560f5810 @ Marvell PJ4 ARMv6 | ||
| 747 | .word 0xff0ffff0 | ||
| 748 | W(b) __armv4_mmu_cache_on | ||
| 749 | W(b) __armv4_mmu_cache_off | ||
| 750 | W(b) __armv6_mmu_cache_flush | ||
| 751 | |||
| 746 | .word 0x000f0000 @ new CPU Id | 752 | .word 0x000f0000 @ new CPU Id |
| 747 | .word 0x000f0000 | 753 | .word 0x000f0000 |
| 748 | W(b) __armv7_mmu_cache_on | 754 | W(b) __armv7_mmu_cache_on |
diff --git a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c index 734ac913599..5a375e5fef2 100644 --- a/arch/arm/common/dmabounce.c +++ b/arch/arm/common/dmabounce.c | |||
| @@ -342,6 +342,22 @@ dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size, | |||
| 342 | } | 342 | } |
| 343 | EXPORT_SYMBOL(dma_map_single); | 343 | EXPORT_SYMBOL(dma_map_single); |
| 344 | 344 | ||
| 345 | /* | ||
| 346 | * see if a mapped address was really a "safe" buffer and if so, copy | ||
| 347 | * the data from the safe buffer back to the unsafe buffer and free up | ||
| 348 | * the safe buffer. (basically return things back to the way they | ||
| 349 | * should be) | ||
| 350 | */ | ||
| 351 | void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, | ||
| 352 | enum dma_data_direction dir) | ||
| 353 | { | ||
| 354 | dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n", | ||
| 355 | __func__, (void *) dma_addr, size, dir); | ||
| 356 | |||
| 357 | unmap_single(dev, dma_addr, size, dir); | ||
| 358 | } | ||
| 359 | EXPORT_SYMBOL(dma_unmap_single); | ||
| 360 | |||
| 345 | dma_addr_t dma_map_page(struct device *dev, struct page *page, | 361 | dma_addr_t dma_map_page(struct device *dev, struct page *page, |
| 346 | unsigned long offset, size_t size, enum dma_data_direction dir) | 362 | unsigned long offset, size_t size, enum dma_data_direction dir) |
| 347 | { | 363 | { |
| @@ -366,8 +382,7 @@ EXPORT_SYMBOL(dma_map_page); | |||
| 366 | * the safe buffer. (basically return things back to the way they | 382 | * the safe buffer. (basically return things back to the way they |
| 367 | * should be) | 383 | * should be) |
| 368 | */ | 384 | */ |
| 369 | 385 | void dma_unmap_page(struct device *dev, dma_addr_t dma_addr, size_t size, | |
| 370 | void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, | ||
| 371 | enum dma_data_direction dir) | 386 | enum dma_data_direction dir) |
| 372 | { | 387 | { |
| 373 | dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n", | 388 | dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n", |
| @@ -375,7 +390,7 @@ void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, | |||
| 375 | 390 | ||
| 376 | unmap_single(dev, dma_addr, size, dir); | 391 | unmap_single(dev, dma_addr, size, dir); |
| 377 | } | 392 | } |
| 378 | EXPORT_SYMBOL(dma_unmap_single); | 393 | EXPORT_SYMBOL(dma_unmap_page); |
| 379 | 394 | ||
| 380 | int dmabounce_sync_for_cpu(struct device *dev, dma_addr_t addr, | 395 | int dmabounce_sync_for_cpu(struct device *dev, dma_addr_t addr, |
| 381 | unsigned long off, size_t sz, enum dma_data_direction dir) | 396 | unsigned long off, size_t sz, enum dma_data_direction dir) |
diff --git a/arch/arm/configs/am3517_evm_defconfig b/arch/arm/configs/am3517_evm_defconfig new file mode 100644 index 00000000000..ad54e92dd43 --- /dev/null +++ b/arch/arm/configs/am3517_evm_defconfig | |||
| @@ -0,0 +1,1207 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.32-rc5 | ||
| 4 | # Wed Oct 28 15:47:47 2009 | ||
| 5 | # | ||
| 6 | CONFIG_ARM=y | ||
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
| 8 | CONFIG_GENERIC_GPIO=y | ||
| 9 | CONFIG_GENERIC_TIME=y | ||
| 10 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 11 | CONFIG_GENERIC_HARDIRQS=y | ||
| 12 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 13 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 14 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 15 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 16 | CONFIG_HARDIRQS_SW_RESEND=y | ||
| 17 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 18 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 19 | CONFIG_ARCH_HAS_CPUFREQ=y | ||
| 20 | CONFIG_GENERIC_HWEIGHT=y | ||
| 21 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
| 22 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 23 | CONFIG_VECTORS_BASE=0xffff0000 | ||
| 24 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 25 | CONFIG_CONSTRUCTORS=y | ||
| 26 | |||
| 27 | # | ||
| 28 | # General setup | ||
| 29 | # | ||
| 30 | CONFIG_EXPERIMENTAL=y | ||
| 31 | CONFIG_BROKEN_ON_SMP=y | ||
| 32 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 33 | CONFIG_LOCALVERSION="" | ||
| 34 | CONFIG_LOCALVERSION_AUTO=y | ||
| 35 | CONFIG_SWAP=y | ||
| 36 | CONFIG_SYSVIPC=y | ||
| 37 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 38 | # CONFIG_POSIX_MQUEUE is not set | ||
| 39 | CONFIG_BSD_PROCESS_ACCT=y | ||
| 40 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set | ||
| 41 | # CONFIG_TASKSTATS is not set | ||
| 42 | # CONFIG_AUDIT is not set | ||
| 43 | |||
| 44 | # | ||
| 45 | # RCU Subsystem | ||
| 46 | # | ||
| 47 | CONFIG_TREE_RCU=y | ||
| 48 | # CONFIG_TREE_PREEMPT_RCU is not set | ||
| 49 | # CONFIG_RCU_TRACE is not set | ||
| 50 | CONFIG_RCU_FANOUT=32 | ||
| 51 | # CONFIG_RCU_FANOUT_EXACT is not set | ||
| 52 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 53 | # CONFIG_IKCONFIG is not set | ||
| 54 | CONFIG_LOG_BUF_SHIFT=14 | ||
| 55 | CONFIG_GROUP_SCHED=y | ||
| 56 | CONFIG_FAIR_GROUP_SCHED=y | ||
| 57 | # CONFIG_RT_GROUP_SCHED is not set | ||
| 58 | CONFIG_USER_SCHED=y | ||
| 59 | # CONFIG_CGROUP_SCHED is not set | ||
| 60 | # CONFIG_CGROUPS is not set | ||
| 61 | CONFIG_SYSFS_DEPRECATED=y | ||
| 62 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
| 63 | # CONFIG_RELAY is not set | ||
| 64 | # CONFIG_NAMESPACES is not set | ||
| 65 | CONFIG_BLK_DEV_INITRD=y | ||
| 66 | CONFIG_INITRAMFS_SOURCE="" | ||
| 67 | CONFIG_RD_GZIP=y | ||
| 68 | # CONFIG_RD_BZIP2 is not set | ||
| 69 | # CONFIG_RD_LZMA is not set | ||
| 70 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 71 | CONFIG_SYSCTL=y | ||
| 72 | CONFIG_ANON_INODES=y | ||
| 73 | CONFIG_EMBEDDED=y | ||
| 74 | CONFIG_UID16=y | ||
| 75 | # CONFIG_SYSCTL_SYSCALL is not set | ||
| 76 | CONFIG_KALLSYMS=y | ||
| 77 | # CONFIG_KALLSYMS_ALL is not set | ||
| 78 | CONFIG_KALLSYMS_EXTRA_PASS=y | ||
| 79 | CONFIG_HOTPLUG=y | ||
| 80 | CONFIG_PRINTK=y | ||
| 81 | CONFIG_BUG=y | ||
| 82 | CONFIG_ELF_CORE=y | ||
| 83 | CONFIG_BASE_FULL=y | ||
| 84 | CONFIG_FUTEX=y | ||
| 85 | CONFIG_EPOLL=y | ||
| 86 | CONFIG_SIGNALFD=y | ||
| 87 | CONFIG_TIMERFD=y | ||
| 88 | CONFIG_EVENTFD=y | ||
| 89 | CONFIG_SHMEM=y | ||
| 90 | CONFIG_AIO=y | ||
| 91 | |||
| 92 | # | ||
| 93 | # Kernel Performance Events And Counters | ||
| 94 | # | ||
| 95 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 96 | CONFIG_COMPAT_BRK=y | ||
| 97 | CONFIG_SLAB=y | ||
| 98 | # CONFIG_SLUB is not set | ||
| 99 | # CONFIG_SLOB is not set | ||
| 100 | # CONFIG_PROFILING is not set | ||
| 101 | CONFIG_HAVE_OPROFILE=y | ||
| 102 | # CONFIG_KPROBES is not set | ||
| 103 | CONFIG_HAVE_KPROBES=y | ||
| 104 | CONFIG_HAVE_KRETPROBES=y | ||
| 105 | CONFIG_HAVE_CLK=y | ||
| 106 | |||
| 107 | # | ||
| 108 | # GCOV-based kernel profiling | ||
| 109 | # | ||
| 110 | # CONFIG_SLOW_WORK is not set | ||
| 111 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 112 | CONFIG_SLABINFO=y | ||
| 113 | CONFIG_RT_MUTEXES=y | ||
| 114 | CONFIG_BASE_SMALL=0 | ||
| 115 | CONFIG_MODULES=y | ||
| 116 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 117 | CONFIG_MODULE_UNLOAD=y | ||
| 118 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
| 119 | CONFIG_MODVERSIONS=y | ||
| 120 | CONFIG_MODULE_SRCVERSION_ALL=y | ||
| 121 | CONFIG_BLOCK=y | ||
| 122 | CONFIG_LBDAF=y | ||
| 123 | # CONFIG_BLK_DEV_BSG is not set | ||
| 124 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 125 | |||
| 126 | # | ||
| 127 | # IO Schedulers | ||
| 128 | # | ||
| 129 | CONFIG_IOSCHED_NOOP=y | ||
| 130 | CONFIG_IOSCHED_AS=y | ||
| 131 | CONFIG_IOSCHED_DEADLINE=y | ||
| 132 | CONFIG_IOSCHED_CFQ=y | ||
| 133 | CONFIG_DEFAULT_AS=y | ||
| 134 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 135 | # CONFIG_DEFAULT_CFQ is not set | ||
| 136 | # CONFIG_DEFAULT_NOOP is not set | ||
| 137 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
| 138 | # CONFIG_FREEZER is not set | ||
| 139 | |||
| 140 | # | ||
| 141 | # System Type | ||
| 142 | # | ||
| 143 | CONFIG_MMU=y | ||
| 144 | # CONFIG_ARCH_AAEC2000 is not set | ||
| 145 | # CONFIG_ARCH_INTEGRATOR is not set | ||
| 146 | # CONFIG_ARCH_REALVIEW is not set | ||
| 147 | # CONFIG_ARCH_VERSATILE is not set | ||
| 148 | # CONFIG_ARCH_AT91 is not set | ||
| 149 | # CONFIG_ARCH_CLPS711X is not set | ||
| 150 | # CONFIG_ARCH_GEMINI is not set | ||
| 151 | # CONFIG_ARCH_EBSA110 is not set | ||
| 152 | # CONFIG_ARCH_EP93XX is not set | ||
| 153 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
| 154 | # CONFIG_ARCH_MXC is not set | ||
| 155 | # CONFIG_ARCH_STMP3XXX is not set | ||
| 156 | # CONFIG_ARCH_NETX is not set | ||
| 157 | # CONFIG_ARCH_H720X is not set | ||
| 158 | # CONFIG_ARCH_NOMADIK is not set | ||
| 159 | # CONFIG_ARCH_IOP13XX is not set | ||
| 160 | # CONFIG_ARCH_IOP32X is not set | ||
| 161 | # CONFIG_ARCH_IOP33X is not set | ||
| 162 | # CONFIG_ARCH_IXP23XX is not set | ||
| 163 | # CONFIG_ARCH_IXP2000 is not set | ||
| 164 | # CONFIG_ARCH_IXP4XX is not set | ||
| 165 | # CONFIG_ARCH_L7200 is not set | ||
| 166 | # CONFIG_ARCH_KIRKWOOD is not set | ||
| 167 | # CONFIG_ARCH_LOKI is not set | ||
| 168 | # CONFIG_ARCH_MV78XX0 is not set | ||
| 169 | # CONFIG_ARCH_ORION5X is not set | ||
| 170 | # CONFIG_ARCH_MMP is not set | ||
| 171 | # CONFIG_ARCH_KS8695 is not set | ||
| 172 | # CONFIG_ARCH_NS9XXX is not set | ||
| 173 | # CONFIG_ARCH_W90X900 is not set | ||
| 174 | # CONFIG_ARCH_PNX4008 is not set | ||
| 175 | # CONFIG_ARCH_PXA is not set | ||
| 176 | # CONFIG_ARCH_MSM is not set | ||
| 177 | # CONFIG_ARCH_RPC is not set | ||
| 178 | # CONFIG_ARCH_SA1100 is not set | ||
| 179 | # CONFIG_ARCH_S3C2410 is not set | ||
| 180 | # CONFIG_ARCH_S3C64XX is not set | ||
| 181 | # CONFIG_ARCH_S5PC1XX is not set | ||
| 182 | # CONFIG_ARCH_SHARK is not set | ||
| 183 | # CONFIG_ARCH_LH7A40X is not set | ||
| 184 | # CONFIG_ARCH_U300 is not set | ||
| 185 | # CONFIG_ARCH_DAVINCI is not set | ||
| 186 | CONFIG_ARCH_OMAP=y | ||
| 187 | # CONFIG_ARCH_BCMRING is not set | ||
| 188 | |||
| 189 | # | ||
| 190 | # TI OMAP Implementations | ||
| 191 | # | ||
| 192 | CONFIG_ARCH_OMAP_OTG=y | ||
| 193 | # CONFIG_ARCH_OMAP1 is not set | ||
| 194 | # CONFIG_ARCH_OMAP2 is not set | ||
| 195 | CONFIG_ARCH_OMAP3=y | ||
| 196 | # CONFIG_ARCH_OMAP4 is not set | ||
| 197 | |||
| 198 | # | ||
| 199 | # OMAP Feature Selections | ||
| 200 | # | ||
| 201 | # CONFIG_OMAP_DEBUG_POWERDOMAIN is not set | ||
| 202 | # CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set | ||
| 203 | CONFIG_OMAP_RESET_CLOCKS=y | ||
| 204 | # CONFIG_OMAP_MUX is not set | ||
| 205 | # CONFIG_OMAP_MCBSP is not set | ||
| 206 | # CONFIG_OMAP_MBOX_FWK is not set | ||
| 207 | # CONFIG_OMAP_MPU_TIMER is not set | ||
| 208 | CONFIG_OMAP_32K_TIMER=y | ||
| 209 | CONFIG_OMAP_32K_TIMER_HZ=128 | ||
| 210 | CONFIG_OMAP_DM_TIMER=y | ||
| 211 | # CONFIG_OMAP_LL_DEBUG_UART1 is not set | ||
| 212 | # CONFIG_OMAP_LL_DEBUG_UART2 is not set | ||
| 213 | CONFIG_OMAP_LL_DEBUG_UART3=y | ||
| 214 | # CONFIG_OMAP_PM_NONE is not set | ||
| 215 | CONFIG_OMAP_PM_NOOP=y | ||
| 216 | CONFIG_ARCH_OMAP34XX=y | ||
| 217 | CONFIG_ARCH_OMAP3430=y | ||
| 218 | |||
| 219 | # | ||
| 220 | # OMAP Board Type | ||
| 221 | # | ||
| 222 | # CONFIG_MACH_OMAP3_BEAGLE is not set | ||
| 223 | # CONFIG_MACH_OMAP_LDP is not set | ||
| 224 | # CONFIG_MACH_OVERO is not set | ||
| 225 | # CONFIG_MACH_OMAP3EVM is not set | ||
| 226 | CONFIG_MACH_OMAP3517EVM=y | ||
| 227 | # CONFIG_MACH_OMAP3_PANDORA is not set | ||
| 228 | # CONFIG_MACH_OMAP_3430SDP is not set | ||
| 229 | # CONFIG_MACH_NOKIA_RX51 is not set | ||
| 230 | # CONFIG_MACH_OMAP_ZOOM2 is not set | ||
| 231 | # CONFIG_MACH_CM_T35 is not set | ||
| 232 | |||
| 233 | # | ||
| 234 | # Processor Type | ||
| 235 | # | ||
| 236 | CONFIG_CPU_32=y | ||
| 237 | CONFIG_CPU_32v6K=y | ||
| 238 | CONFIG_CPU_V7=y | ||
| 239 | CONFIG_CPU_32v7=y | ||
| 240 | CONFIG_CPU_ABRT_EV7=y | ||
| 241 | CONFIG_CPU_PABRT_V7=y | ||
| 242 | CONFIG_CPU_CACHE_V7=y | ||
| 243 | CONFIG_CPU_CACHE_VIPT=y | ||
| 244 | CONFIG_CPU_COPY_V6=y | ||
| 245 | CONFIG_CPU_TLB_V7=y | ||
| 246 | CONFIG_CPU_HAS_ASID=y | ||
| 247 | CONFIG_CPU_CP15=y | ||
| 248 | CONFIG_CPU_CP15_MMU=y | ||
| 249 | |||
| 250 | # | ||
| 251 | # Processor Features | ||
| 252 | # | ||
| 253 | CONFIG_ARM_THUMB=y | ||
| 254 | # CONFIG_ARM_THUMBEE is not set | ||
| 255 | # CONFIG_CPU_ICACHE_DISABLE is not set | ||
| 256 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
| 257 | # CONFIG_CPU_BPREDICT_DISABLE is not set | ||
| 258 | CONFIG_HAS_TLS_REG=y | ||
| 259 | CONFIG_ARM_L1_CACHE_SHIFT=6 | ||
| 260 | # CONFIG_ARM_ERRATA_430973 is not set | ||
| 261 | # CONFIG_ARM_ERRATA_458693 is not set | ||
| 262 | # CONFIG_ARM_ERRATA_460075 is not set | ||
| 263 | CONFIG_COMMON_CLKDEV=y | ||
| 264 | |||
| 265 | # | ||
| 266 | # Bus support | ||
| 267 | # | ||
| 268 | # CONFIG_PCI_SYSCALL is not set | ||
| 269 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 270 | # CONFIG_PCCARD is not set | ||
| 271 | |||
| 272 | # | ||
| 273 | # Kernel Features | ||
| 274 | # | ||
| 275 | CONFIG_TICK_ONESHOT=y | ||
| 276 | CONFIG_NO_HZ=y | ||
| 277 | CONFIG_HIGH_RES_TIMERS=y | ||
| 278 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 279 | CONFIG_VMSPLIT_3G=y | ||
| 280 | # CONFIG_VMSPLIT_2G is not set | ||
| 281 | # CONFIG_VMSPLIT_1G is not set | ||
| 282 | CONFIG_PAGE_OFFSET=0xC0000000 | ||
| 283 | CONFIG_PREEMPT_NONE=y | ||
| 284 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
| 285 | # CONFIG_PREEMPT is not set | ||
| 286 | CONFIG_HZ=128 | ||
| 287 | # CONFIG_THUMB2_KERNEL is not set | ||
| 288 | CONFIG_AEABI=y | ||
| 289 | CONFIG_OABI_COMPAT=y | ||
| 290 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | ||
| 291 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | ||
| 292 | # CONFIG_HIGHMEM is not set | ||
| 293 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 294 | CONFIG_FLATMEM_MANUAL=y | ||
| 295 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 296 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 297 | CONFIG_FLATMEM=y | ||
| 298 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 299 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 300 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
| 301 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
| 302 | CONFIG_ZONE_DMA_FLAG=0 | ||
| 303 | CONFIG_VIRT_TO_BUS=y | ||
| 304 | CONFIG_HAVE_MLOCK=y | ||
| 305 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
| 306 | # CONFIG_KSM is not set | ||
| 307 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
| 308 | # CONFIG_LEDS is not set | ||
| 309 | CONFIG_ALIGNMENT_TRAP=y | ||
| 310 | # CONFIG_UACCESS_WITH_MEMCPY is not set | ||
| 311 | |||
| 312 | # | ||
| 313 | # Boot options | ||
| 314 | # | ||
| 315 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
| 316 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
| 317 | CONFIG_CMDLINE="root=/dev/nfs nfsroot=192.168.0.1:/home/user/buildroot ip=192.168.0.2:192.168.0.1:192.168.0.1:255.255.255.0:tgt:eth0:off rw console=ttyS2,115200n8" | ||
| 318 | # CONFIG_XIP_KERNEL is not set | ||
| 319 | # CONFIG_KEXEC is not set | ||
| 320 | |||
| 321 | # | ||
| 322 | # CPU Power Management | ||
| 323 | # | ||
| 324 | # CONFIG_CPU_FREQ is not set | ||
| 325 | # CONFIG_CPU_IDLE is not set | ||
| 326 | |||
| 327 | # | ||
| 328 | # Floating point emulation | ||
| 329 | # | ||
| 330 | |||
| 331 | # | ||
| 332 | # At least one emulation must be selected | ||
| 333 | # | ||
| 334 | CONFIG_FPE_NWFPE=y | ||
| 335 | # CONFIG_FPE_NWFPE_XP is not set | ||
| 336 | # CONFIG_FPE_FASTFPE is not set | ||
| 337 | CONFIG_VFP=y | ||
| 338 | CONFIG_VFPv3=y | ||
| 339 | CONFIG_NEON=y | ||
| 340 | |||
| 341 | # | ||
| 342 | # Userspace binary formats | ||
| 343 | # | ||
| 344 | CONFIG_BINFMT_ELF=y | ||
| 345 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 346 | CONFIG_HAVE_AOUT=y | ||
| 347 | # CONFIG_BINFMT_AOUT is not set | ||
| 348 | CONFIG_BINFMT_MISC=y | ||
| 349 | |||
| 350 | # | ||
| 351 | # Power management options | ||
| 352 | # | ||
| 353 | # CONFIG_PM is not set | ||
| 354 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
| 355 | CONFIG_NET=y | ||
| 356 | |||
| 357 | # | ||
| 358 | # Networking options | ||
| 359 | # | ||
| 360 | CONFIG_PACKET=y | ||
| 361 | # CONFIG_PACKET_MMAP is not set | ||
| 362 | CONFIG_UNIX=y | ||
| 363 | CONFIG_XFRM=y | ||
| 364 | # CONFIG_XFRM_USER is not set | ||
| 365 | # CONFIG_XFRM_SUB_POLICY is not set | ||
| 366 | # CONFIG_XFRM_MIGRATE is not set | ||
| 367 | # CONFIG_XFRM_STATISTICS is not set | ||
| 368 | CONFIG_NET_KEY=y | ||
| 369 | # CONFIG_NET_KEY_MIGRATE is not set | ||
| 370 | CONFIG_INET=y | ||
| 371 | # CONFIG_IP_MULTICAST is not set | ||
| 372 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 373 | CONFIG_IP_FIB_HASH=y | ||
| 374 | CONFIG_IP_PNP=y | ||
| 375 | CONFIG_IP_PNP_DHCP=y | ||
| 376 | CONFIG_IP_PNP_BOOTP=y | ||
| 377 | CONFIG_IP_PNP_RARP=y | ||
| 378 | # CONFIG_NET_IPIP is not set | ||
| 379 | # CONFIG_NET_IPGRE is not set | ||
| 380 | # CONFIG_ARPD is not set | ||
| 381 | # CONFIG_SYN_COOKIES is not set | ||
| 382 | # CONFIG_INET_AH is not set | ||
| 383 | # CONFIG_INET_ESP is not set | ||
| 384 | # CONFIG_INET_IPCOMP is not set | ||
| 385 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
| 386 | # CONFIG_INET_TUNNEL is not set | ||
| 387 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
| 388 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
| 389 | CONFIG_INET_XFRM_MODE_BEET=y | ||
| 390 | # CONFIG_INET_LRO is not set | ||
| 391 | CONFIG_INET_DIAG=y | ||
| 392 | CONFIG_INET_TCP_DIAG=y | ||
| 393 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
| 394 | CONFIG_TCP_CONG_CUBIC=y | ||
| 395 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 396 | # CONFIG_TCP_MD5SIG is not set | ||
| 397 | # CONFIG_IPV6 is not set | ||
| 398 | # CONFIG_NETWORK_SECMARK is not set | ||
| 399 | # CONFIG_NETFILTER is not set | ||
| 400 | # CONFIG_IP_DCCP is not set | ||
| 401 | # CONFIG_IP_SCTP is not set | ||
| 402 | # CONFIG_RDS is not set | ||
| 403 | # CONFIG_TIPC is not set | ||
| 404 | # CONFIG_ATM is not set | ||
| 405 | # CONFIG_BRIDGE is not set | ||
| 406 | # CONFIG_NET_DSA is not set | ||
| 407 | # CONFIG_VLAN_8021Q is not set | ||
| 408 | # CONFIG_DECNET is not set | ||
| 409 | # CONFIG_LLC2 is not set | ||
| 410 | # CONFIG_IPX is not set | ||
| 411 | # CONFIG_ATALK is not set | ||
| 412 | # CONFIG_X25 is not set | ||
| 413 | # CONFIG_LAPB is not set | ||
| 414 | # CONFIG_ECONET is not set | ||
| 415 | # CONFIG_WAN_ROUTER is not set | ||
| 416 | # CONFIG_PHONET is not set | ||
| 417 | # CONFIG_IEEE802154 is not set | ||
| 418 | # CONFIG_NET_SCHED is not set | ||
| 419 | # CONFIG_DCB is not set | ||
| 420 | |||
| 421 | # | ||
| 422 | # Network testing | ||
| 423 | # | ||
| 424 | # CONFIG_NET_PKTGEN is not set | ||
| 425 | # CONFIG_HAMRADIO is not set | ||
| 426 | # CONFIG_CAN is not set | ||
| 427 | # CONFIG_IRDA is not set | ||
| 428 | # CONFIG_BT is not set | ||
| 429 | # CONFIG_AF_RXRPC is not set | ||
| 430 | CONFIG_WIRELESS=y | ||
| 431 | # CONFIG_CFG80211 is not set | ||
| 432 | CONFIG_CFG80211_DEFAULT_PS_VALUE=0 | ||
| 433 | # CONFIG_WIRELESS_OLD_REGULATORY is not set | ||
| 434 | # CONFIG_WIRELESS_EXT is not set | ||
| 435 | # CONFIG_LIB80211 is not set | ||
| 436 | |||
| 437 | # | ||
| 438 | # CFG80211 needs to be enabled for MAC80211 | ||
| 439 | # | ||
| 440 | # CONFIG_WIMAX is not set | ||
| 441 | # CONFIG_RFKILL is not set | ||
| 442 | # CONFIG_NET_9P is not set | ||
| 443 | |||
| 444 | # | ||
| 445 | # Device Drivers | ||
| 446 | # | ||
| 447 | |||
| 448 | # | ||
| 449 | # Generic Driver Options | ||
| 450 | # | ||
| 451 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
| 452 | # CONFIG_DEVTMPFS is not set | ||
| 453 | CONFIG_STANDALONE=y | ||
| 454 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 455 | # CONFIG_FW_LOADER is not set | ||
| 456 | # CONFIG_DEBUG_DRIVER is not set | ||
| 457 | # CONFIG_DEBUG_DEVRES is not set | ||
| 458 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 459 | # CONFIG_CONNECTOR is not set | ||
| 460 | # CONFIG_MTD is not set | ||
| 461 | # CONFIG_PARPORT is not set | ||
| 462 | CONFIG_BLK_DEV=y | ||
| 463 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 464 | CONFIG_BLK_DEV_LOOP=y | ||
| 465 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
| 466 | # CONFIG_BLK_DEV_NBD is not set | ||
| 467 | # CONFIG_BLK_DEV_UB is not set | ||
| 468 | CONFIG_BLK_DEV_RAM=y | ||
| 469 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
| 470 | CONFIG_BLK_DEV_RAM_SIZE=16384 | ||
| 471 | # CONFIG_BLK_DEV_XIP is not set | ||
| 472 | # CONFIG_CDROM_PKTCDVD is not set | ||
| 473 | # CONFIG_ATA_OVER_ETH is not set | ||
| 474 | # CONFIG_MG_DISK is not set | ||
| 475 | # CONFIG_MISC_DEVICES is not set | ||
| 476 | CONFIG_HAVE_IDE=y | ||
| 477 | # CONFIG_IDE is not set | ||
| 478 | |||
| 479 | # | ||
| 480 | # SCSI device support | ||
| 481 | # | ||
| 482 | # CONFIG_RAID_ATTRS is not set | ||
| 483 | CONFIG_SCSI=y | ||
| 484 | CONFIG_SCSI_DMA=y | ||
| 485 | # CONFIG_SCSI_TGT is not set | ||
| 486 | # CONFIG_SCSI_NETLINK is not set | ||
| 487 | CONFIG_SCSI_PROC_FS=y | ||
| 488 | |||
| 489 | # | ||
| 490 | # SCSI support type (disk, tape, CD-ROM) | ||
| 491 | # | ||
| 492 | CONFIG_BLK_DEV_SD=y | ||
| 493 | # CONFIG_CHR_DEV_ST is not set | ||
| 494 | # CONFIG_CHR_DEV_OSST is not set | ||
| 495 | # CONFIG_BLK_DEV_SR is not set | ||
| 496 | # CONFIG_CHR_DEV_SG is not set | ||
| 497 | # CONFIG_CHR_DEV_SCH is not set | ||
| 498 | # CONFIG_SCSI_MULTI_LUN is not set | ||
| 499 | # CONFIG_SCSI_CONSTANTS is not set | ||
| 500 | # CONFIG_SCSI_LOGGING is not set | ||
| 501 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
| 502 | CONFIG_SCSI_WAIT_SCAN=m | ||
| 503 | |||
| 504 | # | ||
| 505 | # SCSI Transports | ||
| 506 | # | ||
| 507 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
| 508 | # CONFIG_SCSI_FC_ATTRS is not set | ||
| 509 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
| 510 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
| 511 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
| 512 | CONFIG_SCSI_LOWLEVEL=y | ||
| 513 | # CONFIG_ISCSI_TCP is not set | ||
| 514 | # CONFIG_LIBFC is not set | ||
| 515 | # CONFIG_LIBFCOE is not set | ||
| 516 | # CONFIG_SCSI_DEBUG is not set | ||
| 517 | # CONFIG_SCSI_DH is not set | ||
| 518 | # CONFIG_SCSI_OSD_INITIATOR is not set | ||
| 519 | # CONFIG_ATA is not set | ||
| 520 | # CONFIG_MD is not set | ||
| 521 | # CONFIG_NETDEVICES is not set | ||
| 522 | # CONFIG_ISDN is not set | ||
| 523 | # CONFIG_PHONE is not set | ||
| 524 | |||
| 525 | # | ||
| 526 | # Input device support | ||
| 527 | # | ||
| 528 | CONFIG_INPUT=y | ||
| 529 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 530 | # CONFIG_INPUT_POLLDEV is not set | ||
| 531 | |||
| 532 | # | ||
| 533 | # Userland interfaces | ||
| 534 | # | ||
| 535 | # CONFIG_INPUT_MOUSEDEV is not set | ||
| 536 | # CONFIG_INPUT_JOYDEV is not set | ||
| 537 | CONFIG_INPUT_EVDEV=y | ||
| 538 | # CONFIG_INPUT_EVBUG is not set | ||
| 539 | |||
| 540 | # | ||
| 541 | # Input Device Drivers | ||
| 542 | # | ||
| 543 | # CONFIG_INPUT_KEYBOARD is not set | ||
| 544 | # CONFIG_INPUT_MOUSE is not set | ||
| 545 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 546 | # CONFIG_INPUT_TABLET is not set | ||
| 547 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
| 548 | # CONFIG_INPUT_MISC is not set | ||
| 549 | |||
| 550 | # | ||
| 551 | # Hardware I/O ports | ||
| 552 | # | ||
| 553 | # CONFIG_SERIO is not set | ||
| 554 | # CONFIG_GAMEPORT is not set | ||
| 555 | |||
| 556 | # | ||
| 557 | # Character devices | ||
| 558 | # | ||
| 559 | CONFIG_VT=y | ||
| 560 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 561 | CONFIG_VT_CONSOLE=y | ||
| 562 | CONFIG_HW_CONSOLE=y | ||
| 563 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
| 564 | CONFIG_DEVKMEM=y | ||
| 565 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 566 | |||
| 567 | # | ||
| 568 | # Serial drivers | ||
| 569 | # | ||
| 570 | CONFIG_SERIAL_8250=y | ||
| 571 | CONFIG_SERIAL_8250_CONSOLE=y | ||
| 572 | CONFIG_SERIAL_8250_NR_UARTS=32 | ||
| 573 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
| 574 | CONFIG_SERIAL_8250_EXTENDED=y | ||
| 575 | CONFIG_SERIAL_8250_MANY_PORTS=y | ||
| 576 | CONFIG_SERIAL_8250_SHARE_IRQ=y | ||
| 577 | CONFIG_SERIAL_8250_DETECT_IRQ=y | ||
| 578 | CONFIG_SERIAL_8250_RSA=y | ||
| 579 | |||
| 580 | # | ||
| 581 | # Non-8250 serial port support | ||
| 582 | # | ||
| 583 | CONFIG_SERIAL_CORE=y | ||
| 584 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 585 | CONFIG_UNIX98_PTYS=y | ||
| 586 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 587 | # CONFIG_LEGACY_PTYS is not set | ||
| 588 | # CONFIG_IPMI_HANDLER is not set | ||
| 589 | CONFIG_HW_RANDOM=y | ||
| 590 | # CONFIG_HW_RANDOM_TIMERIOMEM is not set | ||
| 591 | # CONFIG_R3964 is not set | ||
| 592 | # CONFIG_RAW_DRIVER is not set | ||
| 593 | # CONFIG_TCG_TPM is not set | ||
| 594 | # CONFIG_I2C is not set | ||
| 595 | # CONFIG_SPI is not set | ||
| 596 | |||
| 597 | # | ||
| 598 | # PPS support | ||
| 599 | # | ||
| 600 | # CONFIG_PPS is not set | ||
| 601 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
| 602 | CONFIG_GPIOLIB=y | ||
| 603 | # CONFIG_DEBUG_GPIO is not set | ||
| 604 | # CONFIG_GPIO_SYSFS is not set | ||
| 605 | |||
| 606 | # | ||
| 607 | # Memory mapped GPIO expanders: | ||
| 608 | # | ||
| 609 | |||
| 610 | # | ||
| 611 | # I2C GPIO expanders: | ||
| 612 | # | ||
| 613 | |||
| 614 | # | ||
| 615 | # PCI GPIO expanders: | ||
| 616 | # | ||
| 617 | |||
| 618 | # | ||
| 619 | # SPI GPIO expanders: | ||
| 620 | # | ||
| 621 | |||
| 622 | # | ||
| 623 | # AC97 GPIO expanders: | ||
| 624 | # | ||
| 625 | # CONFIG_W1 is not set | ||
| 626 | # CONFIG_POWER_SUPPLY is not set | ||
| 627 | # CONFIG_HWMON is not set | ||
| 628 | # CONFIG_THERMAL is not set | ||
| 629 | # CONFIG_WATCHDOG is not set | ||
| 630 | CONFIG_SSB_POSSIBLE=y | ||
| 631 | |||
| 632 | # | ||
| 633 | # Sonics Silicon Backplane | ||
| 634 | # | ||
| 635 | # CONFIG_SSB is not set | ||
| 636 | |||
| 637 | # | ||
| 638 | # Multifunction device drivers | ||
| 639 | # | ||
| 640 | # CONFIG_MFD_CORE is not set | ||
| 641 | # CONFIG_MFD_SM501 is not set | ||
| 642 | # CONFIG_MFD_ASIC3 is not set | ||
| 643 | # CONFIG_HTC_EGPIO is not set | ||
| 644 | # CONFIG_HTC_PASIC3 is not set | ||
| 645 | # CONFIG_MFD_TMIO is not set | ||
| 646 | # CONFIG_MFD_T7L66XB is not set | ||
| 647 | # CONFIG_MFD_TC6387XB is not set | ||
| 648 | # CONFIG_MFD_TC6393XB is not set | ||
| 649 | # CONFIG_REGULATOR is not set | ||
| 650 | # CONFIG_MEDIA_SUPPORT is not set | ||
| 651 | |||
| 652 | # | ||
| 653 | # Graphics support | ||
| 654 | # | ||
| 655 | # CONFIG_VGASTATE is not set | ||
| 656 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 657 | # CONFIG_FB is not set | ||
| 658 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 659 | |||
| 660 | # | ||
| 661 | # Display device support | ||
| 662 | # | ||
| 663 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 664 | |||
| 665 | # | ||
| 666 | # Console display driver support | ||
| 667 | # | ||
| 668 | # CONFIG_VGA_CONSOLE is not set | ||
| 669 | CONFIG_DUMMY_CONSOLE=y | ||
| 670 | # CONFIG_SOUND is not set | ||
| 671 | CONFIG_HID_SUPPORT=y | ||
| 672 | CONFIG_HID=y | ||
| 673 | # CONFIG_HIDRAW is not set | ||
| 674 | |||
| 675 | # | ||
| 676 | # USB Input Devices | ||
| 677 | # | ||
| 678 | CONFIG_USB_HID=y | ||
| 679 | # CONFIG_HID_PID is not set | ||
| 680 | # CONFIG_USB_HIDDEV is not set | ||
| 681 | |||
| 682 | # | ||
| 683 | # Special HID drivers | ||
| 684 | # | ||
| 685 | # CONFIG_HID_A4TECH is not set | ||
| 686 | # CONFIG_HID_APPLE is not set | ||
| 687 | # CONFIG_HID_BELKIN is not set | ||
| 688 | # CONFIG_HID_CHERRY is not set | ||
| 689 | # CONFIG_HID_CHICONY is not set | ||
| 690 | # CONFIG_HID_CYPRESS is not set | ||
| 691 | # CONFIG_HID_DRAGONRISE is not set | ||
| 692 | # CONFIG_HID_EZKEY is not set | ||
| 693 | # CONFIG_HID_KYE is not set | ||
| 694 | # CONFIG_HID_GYRATION is not set | ||
| 695 | # CONFIG_HID_TWINHAN is not set | ||
| 696 | # CONFIG_HID_KENSINGTON is not set | ||
| 697 | # CONFIG_HID_LOGITECH is not set | ||
| 698 | # CONFIG_HID_MICROSOFT is not set | ||
| 699 | # CONFIG_HID_MONTEREY is not set | ||
| 700 | # CONFIG_HID_NTRIG is not set | ||
| 701 | # CONFIG_HID_PANTHERLORD is not set | ||
| 702 | # CONFIG_HID_PETALYNX is not set | ||
| 703 | # CONFIG_HID_SAMSUNG is not set | ||
| 704 | # CONFIG_HID_SONY is not set | ||
| 705 | # CONFIG_HID_SUNPLUS is not set | ||
| 706 | # CONFIG_HID_GREENASIA is not set | ||
| 707 | # CONFIG_HID_SMARTJOYPLUS is not set | ||
| 708 | # CONFIG_HID_TOPSEED is not set | ||
| 709 | # CONFIG_HID_THRUSTMASTER is not set | ||
| 710 | # CONFIG_HID_ZEROPLUS is not set | ||
| 711 | CONFIG_USB_SUPPORT=y | ||
| 712 | CONFIG_USB_ARCH_HAS_HCD=y | ||
| 713 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
| 714 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
| 715 | CONFIG_USB=y | ||
| 716 | # CONFIG_USB_DEBUG is not set | ||
| 717 | CONFIG_USB_ANNOUNCE_NEW_DEVICES=y | ||
| 718 | |||
| 719 | # | ||
| 720 | # Miscellaneous USB options | ||
| 721 | # | ||
| 722 | # CONFIG_USB_DEVICEFS is not set | ||
| 723 | # CONFIG_USB_DEVICE_CLASS is not set | ||
| 724 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
| 725 | # CONFIG_USB_OTG is not set | ||
| 726 | # CONFIG_USB_OTG_WHITELIST is not set | ||
| 727 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
| 728 | # CONFIG_USB_MON is not set | ||
| 729 | # CONFIG_USB_WUSB is not set | ||
| 730 | # CONFIG_USB_WUSB_CBAF is not set | ||
| 731 | |||
| 732 | # | ||
| 733 | # USB Host Controller Drivers | ||
| 734 | # | ||
| 735 | # CONFIG_USB_C67X00_HCD is not set | ||
| 736 | CONFIG_USB_EHCI_HCD=y | ||
| 737 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set | ||
| 738 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | ||
| 739 | # CONFIG_USB_OXU210HP_HCD is not set | ||
| 740 | # CONFIG_USB_ISP116X_HCD is not set | ||
| 741 | # CONFIG_USB_ISP1760_HCD is not set | ||
| 742 | # CONFIG_USB_ISP1362_HCD is not set | ||
| 743 | # CONFIG_USB_OHCI_HCD is not set | ||
| 744 | # CONFIG_USB_SL811_HCD is not set | ||
| 745 | # CONFIG_USB_R8A66597_HCD is not set | ||
| 746 | # CONFIG_USB_HWA_HCD is not set | ||
| 747 | # CONFIG_USB_MUSB_HDRC is not set | ||
| 748 | |||
| 749 | # | ||
| 750 | # USB Device Class drivers | ||
| 751 | # | ||
| 752 | # CONFIG_USB_ACM is not set | ||
| 753 | # CONFIG_USB_PRINTER is not set | ||
| 754 | # CONFIG_USB_WDM is not set | ||
| 755 | # CONFIG_USB_TMC is not set | ||
| 756 | |||
| 757 | # | ||
| 758 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | ||
| 759 | # | ||
| 760 | |||
| 761 | # | ||
| 762 | # also be needed; see USB_STORAGE Help for more info | ||
| 763 | # | ||
| 764 | CONFIG_USB_STORAGE=y | ||
| 765 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
| 766 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
| 767 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
| 768 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
| 769 | # CONFIG_USB_STORAGE_USBAT is not set | ||
| 770 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
| 771 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
| 772 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
| 773 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
| 774 | # CONFIG_USB_STORAGE_ONETOUCH is not set | ||
| 775 | # CONFIG_USB_STORAGE_KARMA is not set | ||
| 776 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
| 777 | # CONFIG_USB_LIBUSUAL is not set | ||
| 778 | |||
| 779 | # | ||
| 780 | # USB Imaging devices | ||
| 781 | # | ||
| 782 | # CONFIG_USB_MDC800 is not set | ||
| 783 | # CONFIG_USB_MICROTEK is not set | ||
| 784 | |||
| 785 | # | ||
| 786 | # USB port drivers | ||
| 787 | # | ||
| 788 | # CONFIG_USB_SERIAL is not set | ||
| 789 | |||
| 790 | # | ||
| 791 | # USB Miscellaneous drivers | ||
| 792 | # | ||
| 793 | # CONFIG_USB_EMI62 is not set | ||
| 794 | # CONFIG_USB_EMI26 is not set | ||
| 795 | # CONFIG_USB_ADUTUX is not set | ||
| 796 | # CONFIG_USB_SEVSEG is not set | ||
| 797 | # CONFIG_USB_RIO500 is not set | ||
| 798 | # CONFIG_USB_LEGOTOWER is not set | ||
| 799 | # CONFIG_USB_LCD is not set | ||
| 800 | # CONFIG_USB_BERRY_CHARGE is not set | ||
| 801 | # CONFIG_USB_LED is not set | ||
| 802 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
| 803 | # CONFIG_USB_CYTHERM is not set | ||
| 804 | # CONFIG_USB_IDMOUSE is not set | ||
| 805 | # CONFIG_USB_FTDI_ELAN is not set | ||
| 806 | # CONFIG_USB_APPLEDISPLAY is not set | ||
| 807 | # CONFIG_USB_SISUSBVGA is not set | ||
| 808 | # CONFIG_USB_LD is not set | ||
| 809 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
| 810 | # CONFIG_USB_IOWARRIOR is not set | ||
| 811 | # CONFIG_USB_TEST is not set | ||
| 812 | # CONFIG_USB_ISIGHTFW is not set | ||
| 813 | # CONFIG_USB_VST is not set | ||
| 814 | # CONFIG_USB_GADGET is not set | ||
| 815 | |||
| 816 | # | ||
| 817 | # OTG and related infrastructure | ||
| 818 | # | ||
| 819 | # CONFIG_USB_GPIO_VBUS is not set | ||
| 820 | # CONFIG_NOP_USB_XCEIV is not set | ||
| 821 | # CONFIG_MMC is not set | ||
| 822 | # CONFIG_MEMSTICK is not set | ||
| 823 | # CONFIG_NEW_LEDS is not set | ||
| 824 | # CONFIG_ACCESSIBILITY is not set | ||
| 825 | CONFIG_RTC_LIB=y | ||
| 826 | # CONFIG_RTC_CLASS is not set | ||
| 827 | # CONFIG_DMADEVICES is not set | ||
| 828 | # CONFIG_AUXDISPLAY is not set | ||
| 829 | # CONFIG_UIO is not set | ||
| 830 | |||
| 831 | # | ||
| 832 | # TI VLYNQ | ||
| 833 | # | ||
| 834 | # CONFIG_STAGING is not set | ||
| 835 | |||
| 836 | # | ||
| 837 | # File systems | ||
| 838 | # | ||
| 839 | CONFIG_EXT2_FS=y | ||
| 840 | # CONFIG_EXT2_FS_XATTR is not set | ||
| 841 | # CONFIG_EXT2_FS_XIP is not set | ||
| 842 | CONFIG_EXT3_FS=y | ||
| 843 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 844 | # CONFIG_EXT3_FS_XATTR is not set | ||
| 845 | # CONFIG_EXT4_FS is not set | ||
| 846 | CONFIG_JBD=y | ||
| 847 | # CONFIG_REISERFS_FS is not set | ||
| 848 | # CONFIG_JFS_FS is not set | ||
| 849 | # CONFIG_FS_POSIX_ACL is not set | ||
| 850 | # CONFIG_XFS_FS is not set | ||
| 851 | # CONFIG_GFS2_FS is not set | ||
| 852 | # CONFIG_OCFS2_FS is not set | ||
| 853 | # CONFIG_BTRFS_FS is not set | ||
| 854 | # CONFIG_NILFS2_FS is not set | ||
| 855 | CONFIG_FILE_LOCKING=y | ||
| 856 | CONFIG_FSNOTIFY=y | ||
| 857 | CONFIG_DNOTIFY=y | ||
| 858 | CONFIG_INOTIFY=y | ||
| 859 | CONFIG_INOTIFY_USER=y | ||
| 860 | CONFIG_QUOTA=y | ||
| 861 | # CONFIG_QUOTA_NETLINK_INTERFACE is not set | ||
| 862 | CONFIG_PRINT_QUOTA_WARNING=y | ||
| 863 | CONFIG_QUOTA_TREE=y | ||
| 864 | # CONFIG_QFMT_V1 is not set | ||
| 865 | CONFIG_QFMT_V2=y | ||
| 866 | CONFIG_QUOTACTL=y | ||
| 867 | # CONFIG_AUTOFS_FS is not set | ||
| 868 | # CONFIG_AUTOFS4_FS is not set | ||
| 869 | # CONFIG_FUSE_FS is not set | ||
| 870 | |||
| 871 | # | ||
| 872 | # Caches | ||
| 873 | # | ||
| 874 | # CONFIG_FSCACHE is not set | ||
| 875 | |||
| 876 | # | ||
| 877 | # CD-ROM/DVD Filesystems | ||
| 878 | # | ||
| 879 | # CONFIG_ISO9660_FS is not set | ||
| 880 | # CONFIG_UDF_FS is not set | ||
| 881 | |||
| 882 | # | ||
| 883 | # DOS/FAT/NT Filesystems | ||
| 884 | # | ||
| 885 | CONFIG_FAT_FS=y | ||
| 886 | CONFIG_MSDOS_FS=y | ||
| 887 | CONFIG_VFAT_FS=y | ||
| 888 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
| 889 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
| 890 | # CONFIG_NTFS_FS is not set | ||
| 891 | |||
| 892 | # | ||
| 893 | # Pseudo filesystems | ||
| 894 | # | ||
| 895 | CONFIG_PROC_FS=y | ||
| 896 | CONFIG_PROC_SYSCTL=y | ||
| 897 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 898 | CONFIG_SYSFS=y | ||
| 899 | CONFIG_TMPFS=y | ||
| 900 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
| 901 | # CONFIG_HUGETLB_PAGE is not set | ||
| 902 | # CONFIG_CONFIGFS_FS is not set | ||
| 903 | CONFIG_MISC_FILESYSTEMS=y | ||
| 904 | # CONFIG_ADFS_FS is not set | ||
| 905 | # CONFIG_AFFS_FS is not set | ||
| 906 | # CONFIG_HFS_FS is not set | ||
| 907 | # CONFIG_HFSPLUS_FS is not set | ||
| 908 | # CONFIG_BEFS_FS is not set | ||
| 909 | # CONFIG_BFS_FS is not set | ||
| 910 | # CONFIG_EFS_FS is not set | ||
| 911 | # CONFIG_CRAMFS is not set | ||
| 912 | # CONFIG_SQUASHFS is not set | ||
| 913 | # CONFIG_VXFS_FS is not set | ||
| 914 | # CONFIG_MINIX_FS is not set | ||
| 915 | # CONFIG_OMFS_FS is not set | ||
| 916 | # CONFIG_HPFS_FS is not set | ||
| 917 | # CONFIG_QNX4FS_FS is not set | ||
| 918 | # CONFIG_ROMFS_FS is not set | ||
| 919 | # CONFIG_SYSV_FS is not set | ||
| 920 | # CONFIG_UFS_FS is not set | ||
| 921 | CONFIG_NETWORK_FILESYSTEMS=y | ||
| 922 | CONFIG_NFS_FS=y | ||
| 923 | CONFIG_NFS_V3=y | ||
| 924 | # CONFIG_NFS_V3_ACL is not set | ||
| 925 | CONFIG_NFS_V4=y | ||
| 926 | # CONFIG_NFS_V4_1 is not set | ||
| 927 | CONFIG_ROOT_NFS=y | ||
| 928 | # CONFIG_NFSD is not set | ||
| 929 | CONFIG_LOCKD=y | ||
| 930 | CONFIG_LOCKD_V4=y | ||
| 931 | CONFIG_NFS_COMMON=y | ||
| 932 | CONFIG_SUNRPC=y | ||
| 933 | CONFIG_SUNRPC_GSS=y | ||
| 934 | CONFIG_RPCSEC_GSS_KRB5=y | ||
| 935 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
| 936 | # CONFIG_SMB_FS is not set | ||
| 937 | # CONFIG_CIFS is not set | ||
| 938 | # CONFIG_NCP_FS is not set | ||
| 939 | # CONFIG_CODA_FS is not set | ||
| 940 | # CONFIG_AFS_FS is not set | ||
| 941 | |||
| 942 | # | ||
| 943 | # Partition Types | ||
| 944 | # | ||
| 945 | CONFIG_PARTITION_ADVANCED=y | ||
| 946 | # CONFIG_ACORN_PARTITION is not set | ||
| 947 | # CONFIG_OSF_PARTITION is not set | ||
| 948 | # CONFIG_AMIGA_PARTITION is not set | ||
| 949 | # CONFIG_ATARI_PARTITION is not set | ||
| 950 | # CONFIG_MAC_PARTITION is not set | ||
| 951 | CONFIG_MSDOS_PARTITION=y | ||
| 952 | # CONFIG_BSD_DISKLABEL is not set | ||
| 953 | # CONFIG_MINIX_SUBPARTITION is not set | ||
| 954 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
| 955 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
| 956 | # CONFIG_LDM_PARTITION is not set | ||
| 957 | # CONFIG_SGI_PARTITION is not set | ||
| 958 | # CONFIG_ULTRIX_PARTITION is not set | ||
| 959 | # CONFIG_SUN_PARTITION is not set | ||
| 960 | # CONFIG_KARMA_PARTITION is not set | ||
| 961 | # CONFIG_EFI_PARTITION is not set | ||
| 962 | # CONFIG_SYSV68_PARTITION is not set | ||
| 963 | CONFIG_NLS=y | ||
| 964 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
| 965 | CONFIG_NLS_CODEPAGE_437=y | ||
| 966 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
| 967 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
| 968 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
| 969 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
| 970 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
| 971 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
| 972 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
| 973 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
| 974 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
| 975 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
| 976 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
| 977 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
| 978 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
| 979 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
| 980 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
| 981 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
| 982 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
| 983 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
| 984 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
| 985 | # CONFIG_NLS_ISO8859_8 is not set | ||
| 986 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
| 987 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
| 988 | # CONFIG_NLS_ASCII is not set | ||
| 989 | CONFIG_NLS_ISO8859_1=y | ||
| 990 | # CONFIG_NLS_ISO8859_2 is not set | ||
| 991 | # CONFIG_NLS_ISO8859_3 is not set | ||
| 992 | # CONFIG_NLS_ISO8859_4 is not set | ||
| 993 | # CONFIG_NLS_ISO8859_5 is not set | ||
| 994 | # CONFIG_NLS_ISO8859_6 is not set | ||
| 995 | # CONFIG_NLS_ISO8859_7 is not set | ||
| 996 | # CONFIG_NLS_ISO8859_9 is not set | ||
| 997 | # CONFIG_NLS_ISO8859_13 is not set | ||
| 998 | # CONFIG_NLS_ISO8859_14 is not set | ||
| 999 | # CONFIG_NLS_ISO8859_15 is not set | ||
| 1000 | # CONFIG_NLS_KOI8_R is not set | ||
| 1001 | # CONFIG_NLS_KOI8_U is not set | ||
| 1002 | # CONFIG_NLS_UTF8 is not set | ||
| 1003 | # CONFIG_DLM is not set | ||
| 1004 | |||
| 1005 | # | ||
| 1006 | # Kernel hacking | ||
| 1007 | # | ||
| 1008 | # CONFIG_PRINTK_TIME is not set | ||
| 1009 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 1010 | CONFIG_ENABLE_MUST_CHECK=y | ||
| 1011 | CONFIG_FRAME_WARN=1024 | ||
| 1012 | CONFIG_MAGIC_SYSRQ=y | ||
| 1013 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 1014 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 1015 | # CONFIG_DEBUG_FS is not set | ||
| 1016 | # CONFIG_HEADERS_CHECK is not set | ||
| 1017 | CONFIG_DEBUG_KERNEL=y | ||
| 1018 | # CONFIG_DEBUG_SHIRQ is not set | ||
| 1019 | CONFIG_DETECT_SOFTLOCKUP=y | ||
| 1020 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | ||
| 1021 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | ||
| 1022 | CONFIG_DETECT_HUNG_TASK=y | ||
| 1023 | # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set | ||
| 1024 | CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 | ||
| 1025 | # CONFIG_SCHED_DEBUG is not set | ||
| 1026 | # CONFIG_SCHEDSTATS is not set | ||
| 1027 | # CONFIG_TIMER_STATS is not set | ||
| 1028 | # CONFIG_DEBUG_OBJECTS is not set | ||
| 1029 | # CONFIG_DEBUG_SLAB is not set | ||
| 1030 | # CONFIG_DEBUG_KMEMLEAK is not set | ||
| 1031 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
| 1032 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 1033 | # CONFIG_DEBUG_SPINLOCK is not set | ||
| 1034 | CONFIG_DEBUG_MUTEXES=y | ||
| 1035 | # CONFIG_DEBUG_LOCK_ALLOC is not set | ||
| 1036 | # CONFIG_PROVE_LOCKING is not set | ||
| 1037 | # CONFIG_LOCK_STAT is not set | ||
| 1038 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
| 1039 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
| 1040 | # CONFIG_DEBUG_KOBJECT is not set | ||
| 1041 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
| 1042 | CONFIG_DEBUG_INFO=y | ||
| 1043 | # CONFIG_DEBUG_VM is not set | ||
| 1044 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
| 1045 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
| 1046 | # CONFIG_DEBUG_LIST is not set | ||
| 1047 | # CONFIG_DEBUG_SG is not set | ||
| 1048 | # CONFIG_DEBUG_NOTIFIERS is not set | ||
| 1049 | # CONFIG_DEBUG_CREDENTIALS is not set | ||
| 1050 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
| 1051 | # CONFIG_RCU_TORTURE_TEST is not set | ||
| 1052 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 1053 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
| 1054 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
| 1055 | # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set | ||
| 1056 | # CONFIG_FAULT_INJECTION is not set | ||
| 1057 | # CONFIG_LATENCYTOP is not set | ||
| 1058 | # CONFIG_PAGE_POISONING is not set | ||
| 1059 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 1060 | CONFIG_TRACING_SUPPORT=y | ||
| 1061 | CONFIG_FTRACE=y | ||
| 1062 | # CONFIG_FUNCTION_TRACER is not set | ||
| 1063 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 1064 | # CONFIG_SCHED_TRACER is not set | ||
| 1065 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set | ||
| 1066 | # CONFIG_BOOT_TRACER is not set | ||
| 1067 | CONFIG_BRANCH_PROFILE_NONE=y | ||
| 1068 | # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set | ||
| 1069 | # CONFIG_PROFILE_ALL_BRANCHES is not set | ||
| 1070 | # CONFIG_STACK_TRACER is not set | ||
| 1071 | # CONFIG_KMEMTRACE is not set | ||
| 1072 | # CONFIG_WORKQUEUE_TRACER is not set | ||
| 1073 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 1074 | # CONFIG_SAMPLES is not set | ||
| 1075 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 1076 | # CONFIG_KGDB is not set | ||
| 1077 | CONFIG_ARM_UNWIND=y | ||
| 1078 | # CONFIG_DEBUG_USER is not set | ||
| 1079 | # CONFIG_DEBUG_ERRORS is not set | ||
| 1080 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
| 1081 | CONFIG_DEBUG_LL=y | ||
| 1082 | # CONFIG_DEBUG_ICEDCC is not set | ||
| 1083 | |||
| 1084 | # | ||
| 1085 | # Security options | ||
| 1086 | # | ||
| 1087 | # CONFIG_KEYS is not set | ||
| 1088 | # CONFIG_SECURITY is not set | ||
| 1089 | # CONFIG_SECURITYFS is not set | ||
| 1090 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
| 1091 | CONFIG_CRYPTO=y | ||
| 1092 | |||
| 1093 | # | ||
| 1094 | # Crypto core or helper | ||
| 1095 | # | ||
| 1096 | CONFIG_CRYPTO_ALGAPI=y | ||
| 1097 | CONFIG_CRYPTO_ALGAPI2=y | ||
| 1098 | CONFIG_CRYPTO_AEAD2=y | ||
| 1099 | CONFIG_CRYPTO_BLKCIPHER=y | ||
| 1100 | CONFIG_CRYPTO_BLKCIPHER2=y | ||
| 1101 | CONFIG_CRYPTO_HASH=y | ||
| 1102 | CONFIG_CRYPTO_HASH2=y | ||
| 1103 | CONFIG_CRYPTO_RNG2=y | ||
| 1104 | CONFIG_CRYPTO_PCOMP=y | ||
| 1105 | CONFIG_CRYPTO_MANAGER=y | ||
| 1106 | CONFIG_CRYPTO_MANAGER2=y | ||
| 1107 | # CONFIG_CRYPTO_GF128MUL is not set | ||
| 1108 | # CONFIG_CRYPTO_NULL is not set | ||
| 1109 | CONFIG_CRYPTO_WORKQUEUE=y | ||
| 1110 | # CONFIG_CRYPTO_CRYPTD is not set | ||
| 1111 | # CONFIG_CRYPTO_AUTHENC is not set | ||
| 1112 | # CONFIG_CRYPTO_TEST is not set | ||
| 1113 | |||
| 1114 | # | ||
| 1115 | # Authenticated Encryption with Associated Data | ||
| 1116 | # | ||
| 1117 | # CONFIG_CRYPTO_CCM is not set | ||
| 1118 | # CONFIG_CRYPTO_GCM is not set | ||
| 1119 | # CONFIG_CRYPTO_SEQIV is not set | ||
| 1120 | |||
| 1121 | # | ||
| 1122 | # Block modes | ||
| 1123 | # | ||
| 1124 | CONFIG_CRYPTO_CBC=y | ||
| 1125 | # CONFIG_CRYPTO_CTR is not set | ||
| 1126 | # CONFIG_CRYPTO_CTS is not set | ||
| 1127 | CONFIG_CRYPTO_ECB=m | ||
| 1128 | # CONFIG_CRYPTO_LRW is not set | ||
| 1129 | CONFIG_CRYPTO_PCBC=m | ||
| 1130 | # CONFIG_CRYPTO_XTS is not set | ||
| 1131 | |||
| 1132 | # | ||
| 1133 | # Hash modes | ||
| 1134 | # | ||
| 1135 | # CONFIG_CRYPTO_HMAC is not set | ||
| 1136 | # CONFIG_CRYPTO_XCBC is not set | ||
| 1137 | # CONFIG_CRYPTO_VMAC is not set | ||
| 1138 | |||
| 1139 | # | ||
| 1140 | # Digest | ||
| 1141 | # | ||
| 1142 | CONFIG_CRYPTO_CRC32C=y | ||
| 1143 | # CONFIG_CRYPTO_GHASH is not set | ||
| 1144 | # CONFIG_CRYPTO_MD4 is not set | ||
| 1145 | CONFIG_CRYPTO_MD5=y | ||
| 1146 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
| 1147 | # CONFIG_CRYPTO_RMD128 is not set | ||
| 1148 | # CONFIG_CRYPTO_RMD160 is not set | ||
| 1149 | # CONFIG_CRYPTO_RMD256 is not set | ||
| 1150 | # CONFIG_CRYPTO_RMD320 is not set | ||
| 1151 | # CONFIG_CRYPTO_SHA1 is not set | ||
| 1152 | # CONFIG_CRYPTO_SHA256 is not set | ||
| 1153 | # CONFIG_CRYPTO_SHA512 is not set | ||
| 1154 | # CONFIG_CRYPTO_TGR192 is not set | ||
| 1155 | # CONFIG_CRYPTO_WP512 is not set | ||
| 1156 | |||
| 1157 | # | ||
| 1158 | # Ciphers | ||
| 1159 | # | ||
| 1160 | # CONFIG_CRYPTO_AES is not set | ||
| 1161 | # CONFIG_CRYPTO_ANUBIS is not set | ||
| 1162 | # CONFIG_CRYPTO_ARC4 is not set | ||
| 1163 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
| 1164 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
| 1165 | # CONFIG_CRYPTO_CAST5 is not set | ||
| 1166 | # CONFIG_CRYPTO_CAST6 is not set | ||
| 1167 | CONFIG_CRYPTO_DES=y | ||
| 1168 | # CONFIG_CRYPTO_FCRYPT is not set | ||
| 1169 | # CONFIG_CRYPTO_KHAZAD is not set | ||
| 1170 | # CONFIG_CRYPTO_SALSA20 is not set | ||
| 1171 | # CONFIG_CRYPTO_SEED is not set | ||
| 1172 | # CONFIG_CRYPTO_SERPENT is not set | ||
| 1173 | # CONFIG_CRYPTO_TEA is not set | ||
| 1174 | # CONFIG_CRYPTO_TWOFISH is not set | ||
| 1175 | |||
| 1176 | # | ||
| 1177 | # Compression | ||
| 1178 | # | ||
| 1179 | # CONFIG_CRYPTO_DEFLATE is not set | ||
| 1180 | # CONFIG_CRYPTO_ZLIB is not set | ||
| 1181 | # CONFIG_CRYPTO_LZO is not set | ||
| 1182 | |||
| 1183 | # | ||
| 1184 | # Random Number Generation | ||
| 1185 | # | ||
| 1186 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
| 1187 | CONFIG_CRYPTO_HW=y | ||
| 1188 | # CONFIG_BINARY_PRINTF is not set | ||
| 1189 | |||
| 1190 | # | ||
| 1191 | # Library routines | ||
| 1192 | # | ||
| 1193 | CONFIG_BITREVERSE=y | ||
| 1194 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
| 1195 | CONFIG_CRC_CCITT=y | ||
| 1196 | # CONFIG_CRC16 is not set | ||
| 1197 | # CONFIG_CRC_T10DIF is not set | ||
| 1198 | # CONFIG_CRC_ITU_T is not set | ||
| 1199 | CONFIG_CRC32=y | ||
| 1200 | # CONFIG_CRC7 is not set | ||
| 1201 | CONFIG_LIBCRC32C=y | ||
| 1202 | CONFIG_ZLIB_INFLATE=y | ||
| 1203 | CONFIG_DECOMPRESS_GZIP=y | ||
| 1204 | CONFIG_HAS_IOMEM=y | ||
| 1205 | CONFIG_HAS_IOPORT=y | ||
| 1206 | CONFIG_HAS_DMA=y | ||
| 1207 | CONFIG_NLATTR=y | ||
diff --git a/arch/arm/configs/at91rm9200dk_defconfig b/arch/arm/configs/at91rm9200dk_defconfig index 238b218394e..c97e1022ada 100644 --- a/arch/arm/configs/at91rm9200dk_defconfig +++ b/arch/arm/configs/at91rm9200dk_defconfig | |||
| @@ -120,6 +120,7 @@ CONFIG_ARCH_AT91RM9200DK=y | |||
| 120 | # CONFIG_MACH_CARMEVA is not set | 120 | # CONFIG_MACH_CARMEVA is not set |
| 121 | # CONFIG_MACH_KB9200 is not set | 121 | # CONFIG_MACH_KB9200 is not set |
| 122 | # CONFIG_MACH_ATEB9200 is not set | 122 | # CONFIG_MACH_ATEB9200 is not set |
| 123 | CONFIG_MACH_ECO920=y | ||
| 123 | 124 | ||
| 124 | # | 125 | # |
| 125 | # AT91RM9200 Feature Selections | 126 | # AT91RM9200 Feature Selections |
diff --git a/arch/arm/configs/cm_t35_defconfig b/arch/arm/configs/cm_t35_defconfig new file mode 100644 index 00000000000..e42c5c873eb --- /dev/null +++ b/arch/arm/configs/cm_t35_defconfig | |||
| @@ -0,0 +1,1733 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.32-rc4 | ||
| 4 | # Tue Oct 13 17:10:40 2009 | ||
| 5 | # | ||
| 6 | CONFIG_ARM=y | ||
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
| 8 | CONFIG_GENERIC_GPIO=y | ||
| 9 | CONFIG_GENERIC_TIME=y | ||
| 10 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 11 | CONFIG_GENERIC_HARDIRQS=y | ||
| 12 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 13 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 14 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 15 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 16 | CONFIG_HARDIRQS_SW_RESEND=y | ||
| 17 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 18 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 19 | CONFIG_ARCH_HAS_CPUFREQ=y | ||
| 20 | CONFIG_GENERIC_HWEIGHT=y | ||
| 21 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
| 22 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 23 | CONFIG_VECTORS_BASE=0xffff0000 | ||
| 24 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 25 | CONFIG_CONSTRUCTORS=y | ||
| 26 | |||
| 27 | # | ||
| 28 | # General setup | ||
| 29 | # | ||
| 30 | CONFIG_EXPERIMENTAL=y | ||
| 31 | CONFIG_BROKEN_ON_SMP=y | ||
| 32 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 33 | CONFIG_LOCALVERSION="" | ||
| 34 | CONFIG_LOCALVERSION_AUTO=y | ||
| 35 | CONFIG_SWAP=y | ||
| 36 | CONFIG_SYSVIPC=y | ||
| 37 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 38 | # CONFIG_POSIX_MQUEUE is not set | ||
| 39 | CONFIG_BSD_PROCESS_ACCT=y | ||
| 40 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set | ||
| 41 | # CONFIG_TASKSTATS is not set | ||
| 42 | # CONFIG_AUDIT is not set | ||
| 43 | |||
| 44 | # | ||
| 45 | # RCU Subsystem | ||
| 46 | # | ||
| 47 | CONFIG_TREE_RCU=y | ||
| 48 | # CONFIG_TREE_PREEMPT_RCU is not set | ||
| 49 | # CONFIG_RCU_TRACE is not set | ||
| 50 | CONFIG_RCU_FANOUT=32 | ||
| 51 | # CONFIG_RCU_FANOUT_EXACT is not set | ||
| 52 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 53 | CONFIG_IKCONFIG=y | ||
| 54 | CONFIG_IKCONFIG_PROC=y | ||
| 55 | CONFIG_LOG_BUF_SHIFT=17 | ||
| 56 | CONFIG_GROUP_SCHED=y | ||
| 57 | CONFIG_FAIR_GROUP_SCHED=y | ||
| 58 | # CONFIG_RT_GROUP_SCHED is not set | ||
| 59 | CONFIG_USER_SCHED=y | ||
| 60 | # CONFIG_CGROUP_SCHED is not set | ||
| 61 | # CONFIG_CGROUPS is not set | ||
| 62 | CONFIG_SYSFS_DEPRECATED=y | ||
| 63 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
| 64 | # CONFIG_RELAY is not set | ||
| 65 | # CONFIG_NAMESPACES is not set | ||
| 66 | CONFIG_BLK_DEV_INITRD=y | ||
| 67 | CONFIG_INITRAMFS_SOURCE="" | ||
| 68 | CONFIG_RD_GZIP=y | ||
| 69 | # CONFIG_RD_BZIP2 is not set | ||
| 70 | # CONFIG_RD_LZMA is not set | ||
| 71 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 72 | CONFIG_SYSCTL=y | ||
| 73 | CONFIG_ANON_INODES=y | ||
| 74 | CONFIG_EMBEDDED=y | ||
| 75 | CONFIG_UID16=y | ||
| 76 | # CONFIG_SYSCTL_SYSCALL is not set | ||
| 77 | CONFIG_KALLSYMS=y | ||
| 78 | # CONFIG_KALLSYMS_ALL is not set | ||
| 79 | CONFIG_KALLSYMS_EXTRA_PASS=y | ||
| 80 | CONFIG_HOTPLUG=y | ||
| 81 | CONFIG_PRINTK=y | ||
| 82 | CONFIG_BUG=y | ||
| 83 | CONFIG_ELF_CORE=y | ||
| 84 | CONFIG_BASE_FULL=y | ||
| 85 | CONFIG_FUTEX=y | ||
| 86 | CONFIG_EPOLL=y | ||
| 87 | CONFIG_SIGNALFD=y | ||
| 88 | CONFIG_TIMERFD=y | ||
| 89 | CONFIG_EVENTFD=y | ||
| 90 | CONFIG_SHMEM=y | ||
| 91 | CONFIG_AIO=y | ||
| 92 | |||
| 93 | # | ||
| 94 | # Kernel Performance Events And Counters | ||
| 95 | # | ||
| 96 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 97 | CONFIG_COMPAT_BRK=y | ||
| 98 | CONFIG_SLAB=y | ||
| 99 | # CONFIG_SLUB is not set | ||
| 100 | # CONFIG_SLOB is not set | ||
| 101 | # CONFIG_PROFILING is not set | ||
| 102 | CONFIG_HAVE_OPROFILE=y | ||
| 103 | # CONFIG_KPROBES is not set | ||
| 104 | CONFIG_HAVE_KPROBES=y | ||
| 105 | CONFIG_HAVE_KRETPROBES=y | ||
| 106 | CONFIG_HAVE_CLK=y | ||
| 107 | |||
| 108 | # | ||
| 109 | # GCOV-based kernel profiling | ||
| 110 | # | ||
| 111 | # CONFIG_GCOV_KERNEL is not set | ||
| 112 | # CONFIG_SLOW_WORK is not set | ||
| 113 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 114 | CONFIG_SLABINFO=y | ||
| 115 | CONFIG_RT_MUTEXES=y | ||
| 116 | CONFIG_BASE_SMALL=0 | ||
| 117 | CONFIG_MODULES=y | ||
| 118 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 119 | CONFIG_MODULE_UNLOAD=y | ||
| 120 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
| 121 | CONFIG_MODVERSIONS=y | ||
| 122 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
| 123 | CONFIG_BLOCK=y | ||
| 124 | CONFIG_LBDAF=y | ||
| 125 | # CONFIG_BLK_DEV_BSG is not set | ||
| 126 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 127 | |||
| 128 | # | ||
| 129 | # IO Schedulers | ||
| 130 | # | ||
| 131 | CONFIG_IOSCHED_NOOP=y | ||
| 132 | CONFIG_IOSCHED_AS=y | ||
| 133 | CONFIG_IOSCHED_DEADLINE=y | ||
| 134 | CONFIG_IOSCHED_CFQ=y | ||
| 135 | CONFIG_DEFAULT_AS=y | ||
| 136 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 137 | # CONFIG_DEFAULT_CFQ is not set | ||
| 138 | # CONFIG_DEFAULT_NOOP is not set | ||
| 139 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
| 140 | CONFIG_FREEZER=y | ||
| 141 | |||
| 142 | # | ||
| 143 | # System Type | ||
| 144 | # | ||
| 145 | CONFIG_MMU=y | ||
| 146 | # CONFIG_ARCH_AAEC2000 is not set | ||
| 147 | # CONFIG_ARCH_INTEGRATOR is not set | ||
| 148 | # CONFIG_ARCH_REALVIEW is not set | ||
| 149 | # CONFIG_ARCH_VERSATILE is not set | ||
| 150 | # CONFIG_ARCH_AT91 is not set | ||
| 151 | # CONFIG_ARCH_CLPS711X is not set | ||
| 152 | # CONFIG_ARCH_GEMINI is not set | ||
| 153 | # CONFIG_ARCH_EBSA110 is not set | ||
| 154 | # CONFIG_ARCH_EP93XX is not set | ||
| 155 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
| 156 | # CONFIG_ARCH_MXC is not set | ||
| 157 | # CONFIG_ARCH_STMP3XXX is not set | ||
| 158 | # CONFIG_ARCH_NETX is not set | ||
| 159 | # CONFIG_ARCH_H720X is not set | ||
| 160 | # CONFIG_ARCH_NOMADIK is not set | ||
| 161 | # CONFIG_ARCH_IOP13XX is not set | ||
| 162 | # CONFIG_ARCH_IOP32X is not set | ||
| 163 | # CONFIG_ARCH_IOP33X is not set | ||
| 164 | # CONFIG_ARCH_IXP23XX is not set | ||
| 165 | # CONFIG_ARCH_IXP2000 is not set | ||
| 166 | # CONFIG_ARCH_IXP4XX is not set | ||
| 167 | # CONFIG_ARCH_L7200 is not set | ||
| 168 | # CONFIG_ARCH_KIRKWOOD is not set | ||
| 169 | # CONFIG_ARCH_LOKI is not set | ||
| 170 | # CONFIG_ARCH_MV78XX0 is not set | ||
| 171 | # CONFIG_ARCH_ORION5X is not set | ||
| 172 | # CONFIG_ARCH_MMP is not set | ||
| 173 | # CONFIG_ARCH_KS8695 is not set | ||
| 174 | # CONFIG_ARCH_NS9XXX is not set | ||
| 175 | # CONFIG_ARCH_W90X900 is not set | ||
| 176 | # CONFIG_ARCH_PNX4008 is not set | ||
| 177 | # CONFIG_ARCH_PXA is not set | ||
| 178 | # CONFIG_ARCH_MSM is not set | ||
| 179 | # CONFIG_ARCH_RPC is not set | ||
| 180 | # CONFIG_ARCH_SA1100 is not set | ||
| 181 | # CONFIG_ARCH_S3C2410 is not set | ||
| 182 | # CONFIG_ARCH_S3C64XX is not set | ||
| 183 | # CONFIG_ARCH_S5PC1XX is not set | ||
| 184 | # CONFIG_ARCH_SHARK is not set | ||
| 185 | # CONFIG_ARCH_LH7A40X is not set | ||
| 186 | # CONFIG_ARCH_U300 is not set | ||
| 187 | # CONFIG_ARCH_DAVINCI is not set | ||
| 188 | CONFIG_ARCH_OMAP=y | ||
| 189 | # CONFIG_ARCH_BCMRING is not set | ||
| 190 | |||
| 191 | # | ||
| 192 | # TI OMAP Implementations | ||
| 193 | # | ||
| 194 | CONFIG_ARCH_OMAP_OTG=y | ||
| 195 | # CONFIG_ARCH_OMAP1 is not set | ||
| 196 | # CONFIG_ARCH_OMAP2 is not set | ||
| 197 | CONFIG_ARCH_OMAP3=y | ||
| 198 | # CONFIG_ARCH_OMAP4 is not set | ||
| 199 | |||
| 200 | # | ||
| 201 | # OMAP Feature Selections | ||
| 202 | # | ||
| 203 | # CONFIG_OMAP_DEBUG_POWERDOMAIN is not set | ||
| 204 | # CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set | ||
| 205 | CONFIG_OMAP_RESET_CLOCKS=y | ||
| 206 | CONFIG_OMAP_MUX=y | ||
| 207 | # CONFIG_OMAP_MUX_DEBUG is not set | ||
| 208 | CONFIG_OMAP_MUX_WARNINGS=y | ||
| 209 | CONFIG_OMAP_MCBSP=y | ||
| 210 | # CONFIG_OMAP_MBOX_FWK is not set | ||
| 211 | # CONFIG_OMAP_MPU_TIMER is not set | ||
| 212 | CONFIG_OMAP_32K_TIMER=y | ||
| 213 | CONFIG_OMAP_32K_TIMER_HZ=128 | ||
| 214 | CONFIG_OMAP_DM_TIMER=y | ||
| 215 | # CONFIG_OMAP_LL_DEBUG_UART1 is not set | ||
| 216 | # CONFIG_OMAP_LL_DEBUG_UART2 is not set | ||
| 217 | CONFIG_OMAP_LL_DEBUG_UART3=y | ||
| 218 | # CONFIG_OMAP_PM_NONE is not set | ||
| 219 | CONFIG_OMAP_PM_NOOP=y | ||
| 220 | CONFIG_ARCH_OMAP34XX=y | ||
| 221 | CONFIG_ARCH_OMAP3430=y | ||
| 222 | |||
| 223 | # | ||
| 224 | # OMAP Board Type | ||
| 225 | # | ||
| 226 | # CONFIG_MACH_OMAP3_BEAGLE is not set | ||
| 227 | # CONFIG_MACH_OMAP_LDP is not set | ||
| 228 | # CONFIG_MACH_OVERO is not set | ||
| 229 | # CONFIG_MACH_OMAP3EVM is not set | ||
| 230 | # CONFIG_MACH_OMAP3_PANDORA is not set | ||
| 231 | # CONFIG_MACH_OMAP_3430SDP is not set | ||
| 232 | # CONFIG_MACH_NOKIA_RX51 is not set | ||
| 233 | # CONFIG_MACH_OMAP_ZOOM2 is not set | ||
| 234 | CONFIG_MACH_CM_T35=y | ||
| 235 | |||
| 236 | # | ||
| 237 | # Processor Type | ||
| 238 | # | ||
| 239 | CONFIG_CPU_32=y | ||
| 240 | CONFIG_CPU_32v6K=y | ||
| 241 | CONFIG_CPU_V7=y | ||
| 242 | CONFIG_CPU_32v7=y | ||
| 243 | CONFIG_CPU_ABRT_EV7=y | ||
| 244 | CONFIG_CPU_PABRT_V7=y | ||
| 245 | CONFIG_CPU_CACHE_V7=y | ||
| 246 | CONFIG_CPU_CACHE_VIPT=y | ||
| 247 | CONFIG_CPU_COPY_V6=y | ||
| 248 | CONFIG_CPU_TLB_V7=y | ||
| 249 | CONFIG_CPU_HAS_ASID=y | ||
| 250 | CONFIG_CPU_CP15=y | ||
| 251 | CONFIG_CPU_CP15_MMU=y | ||
| 252 | |||
| 253 | # | ||
| 254 | # Processor Features | ||
| 255 | # | ||
| 256 | CONFIG_ARM_THUMB=y | ||
| 257 | # CONFIG_ARM_THUMBEE is not set | ||
| 258 | # CONFIG_CPU_ICACHE_DISABLE is not set | ||
| 259 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
| 260 | # CONFIG_CPU_BPREDICT_DISABLE is not set | ||
| 261 | CONFIG_HAS_TLS_REG=y | ||
| 262 | CONFIG_ARM_L1_CACHE_SHIFT=6 | ||
| 263 | # CONFIG_ARM_ERRATA_430973 is not set | ||
| 264 | # CONFIG_ARM_ERRATA_458693 is not set | ||
| 265 | # CONFIG_ARM_ERRATA_460075 is not set | ||
| 266 | CONFIG_COMMON_CLKDEV=y | ||
| 267 | |||
| 268 | # | ||
| 269 | # Bus support | ||
| 270 | # | ||
| 271 | # CONFIG_PCI_SYSCALL is not set | ||
| 272 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 273 | # CONFIG_PCCARD is not set | ||
| 274 | |||
| 275 | # | ||
| 276 | # Kernel Features | ||
| 277 | # | ||
| 278 | CONFIG_TICK_ONESHOT=y | ||
| 279 | CONFIG_NO_HZ=y | ||
| 280 | CONFIG_HIGH_RES_TIMERS=y | ||
| 281 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 282 | CONFIG_VMSPLIT_3G=y | ||
| 283 | # CONFIG_VMSPLIT_2G is not set | ||
| 284 | # CONFIG_VMSPLIT_1G is not set | ||
| 285 | CONFIG_PAGE_OFFSET=0xC0000000 | ||
| 286 | CONFIG_PREEMPT_NONE=y | ||
| 287 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
| 288 | # CONFIG_PREEMPT is not set | ||
| 289 | CONFIG_HZ=128 | ||
| 290 | # CONFIG_THUMB2_KERNEL is not set | ||
| 291 | CONFIG_AEABI=y | ||
| 292 | CONFIG_OABI_COMPAT=y | ||
| 293 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | ||
| 294 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | ||
| 295 | # CONFIG_HIGHMEM is not set | ||
| 296 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 297 | CONFIG_FLATMEM_MANUAL=y | ||
| 298 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 299 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 300 | CONFIG_FLATMEM=y | ||
| 301 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 302 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 303 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
| 304 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
| 305 | CONFIG_ZONE_DMA_FLAG=0 | ||
| 306 | CONFIG_VIRT_TO_BUS=y | ||
| 307 | CONFIG_HAVE_MLOCK=y | ||
| 308 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
| 309 | # CONFIG_KSM is not set | ||
| 310 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
| 311 | # CONFIG_LEDS is not set | ||
| 312 | CONFIG_ALIGNMENT_TRAP=y | ||
| 313 | # CONFIG_UACCESS_WITH_MEMCPY is not set | ||
| 314 | |||
| 315 | # | ||
| 316 | # Boot options | ||
| 317 | # | ||
| 318 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
| 319 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
| 320 | CONFIG_CMDLINE="" | ||
| 321 | # CONFIG_XIP_KERNEL is not set | ||
| 322 | # CONFIG_KEXEC is not set | ||
| 323 | |||
| 324 | # | ||
| 325 | # CPU Power Management | ||
| 326 | # | ||
| 327 | # CONFIG_CPU_FREQ is not set | ||
| 328 | # CONFIG_CPU_IDLE is not set | ||
| 329 | |||
| 330 | # | ||
| 331 | # Floating point emulation | ||
| 332 | # | ||
| 333 | |||
| 334 | # | ||
| 335 | # At least one emulation must be selected | ||
| 336 | # | ||
| 337 | CONFIG_FPE_NWFPE=y | ||
| 338 | # CONFIG_FPE_NWFPE_XP is not set | ||
| 339 | # CONFIG_FPE_FASTFPE is not set | ||
| 340 | CONFIG_VFP=y | ||
| 341 | CONFIG_VFPv3=y | ||
| 342 | CONFIG_NEON=y | ||
| 343 | |||
| 344 | # | ||
| 345 | # Userspace binary formats | ||
| 346 | # | ||
| 347 | CONFIG_BINFMT_ELF=y | ||
| 348 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 349 | CONFIG_HAVE_AOUT=y | ||
| 350 | # CONFIG_BINFMT_AOUT is not set | ||
| 351 | CONFIG_BINFMT_MISC=y | ||
| 352 | |||
| 353 | # | ||
| 354 | # Power management options | ||
| 355 | # | ||
| 356 | CONFIG_PM=y | ||
| 357 | # CONFIG_PM_DEBUG is not set | ||
| 358 | CONFIG_PM_SLEEP=y | ||
| 359 | CONFIG_SUSPEND=y | ||
| 360 | CONFIG_SUSPEND_FREEZER=y | ||
| 361 | # CONFIG_APM_EMULATION is not set | ||
| 362 | # CONFIG_PM_RUNTIME is not set | ||
| 363 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
| 364 | CONFIG_NET=y | ||
| 365 | |||
| 366 | # | ||
| 367 | # Networking options | ||
| 368 | # | ||
| 369 | CONFIG_PACKET=y | ||
| 370 | # CONFIG_PACKET_MMAP is not set | ||
| 371 | CONFIG_UNIX=y | ||
| 372 | CONFIG_XFRM=y | ||
| 373 | # CONFIG_XFRM_USER is not set | ||
| 374 | # CONFIG_XFRM_SUB_POLICY is not set | ||
| 375 | # CONFIG_XFRM_MIGRATE is not set | ||
| 376 | # CONFIG_XFRM_STATISTICS is not set | ||
| 377 | CONFIG_NET_KEY=y | ||
| 378 | # CONFIG_NET_KEY_MIGRATE is not set | ||
| 379 | CONFIG_INET=y | ||
| 380 | # CONFIG_IP_MULTICAST is not set | ||
| 381 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 382 | CONFIG_IP_FIB_HASH=y | ||
| 383 | CONFIG_IP_PNP=y | ||
| 384 | CONFIG_IP_PNP_DHCP=y | ||
| 385 | CONFIG_IP_PNP_BOOTP=y | ||
| 386 | CONFIG_IP_PNP_RARP=y | ||
| 387 | # CONFIG_NET_IPIP is not set | ||
| 388 | # CONFIG_NET_IPGRE is not set | ||
| 389 | # CONFIG_ARPD is not set | ||
| 390 | # CONFIG_SYN_COOKIES is not set | ||
| 391 | # CONFIG_INET_AH is not set | ||
| 392 | # CONFIG_INET_ESP is not set | ||
| 393 | # CONFIG_INET_IPCOMP is not set | ||
| 394 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
| 395 | # CONFIG_INET_TUNNEL is not set | ||
| 396 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
| 397 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
| 398 | CONFIG_INET_XFRM_MODE_BEET=y | ||
| 399 | # CONFIG_INET_LRO is not set | ||
| 400 | CONFIG_INET_DIAG=y | ||
| 401 | CONFIG_INET_TCP_DIAG=y | ||
| 402 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
| 403 | CONFIG_TCP_CONG_CUBIC=y | ||
| 404 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 405 | # CONFIG_TCP_MD5SIG is not set | ||
| 406 | # CONFIG_IPV6 is not set | ||
| 407 | # CONFIG_NETWORK_SECMARK is not set | ||
| 408 | # CONFIG_NETFILTER is not set | ||
| 409 | # CONFIG_IP_DCCP is not set | ||
| 410 | # CONFIG_IP_SCTP is not set | ||
| 411 | # CONFIG_RDS is not set | ||
| 412 | # CONFIG_TIPC is not set | ||
| 413 | # CONFIG_ATM is not set | ||
| 414 | # CONFIG_BRIDGE is not set | ||
| 415 | # CONFIG_NET_DSA is not set | ||
| 416 | # CONFIG_VLAN_8021Q is not set | ||
| 417 | # CONFIG_DECNET is not set | ||
| 418 | # CONFIG_LLC2 is not set | ||
| 419 | # CONFIG_IPX is not set | ||
| 420 | # CONFIG_ATALK is not set | ||
| 421 | # CONFIG_X25 is not set | ||
| 422 | # CONFIG_LAPB is not set | ||
| 423 | # CONFIG_ECONET is not set | ||
| 424 | # CONFIG_WAN_ROUTER is not set | ||
| 425 | # CONFIG_PHONET is not set | ||
| 426 | # CONFIG_IEEE802154 is not set | ||
| 427 | # CONFIG_NET_SCHED is not set | ||
| 428 | # CONFIG_DCB is not set | ||
| 429 | |||
| 430 | # | ||
| 431 | # Network testing | ||
| 432 | # | ||
| 433 | # CONFIG_NET_PKTGEN is not set | ||
| 434 | # CONFIG_HAMRADIO is not set | ||
| 435 | # CONFIG_CAN is not set | ||
| 436 | # CONFIG_IRDA is not set | ||
| 437 | # CONFIG_BT is not set | ||
| 438 | # CONFIG_AF_RXRPC is not set | ||
| 439 | CONFIG_WIRELESS=y | ||
| 440 | # CONFIG_CFG80211 is not set | ||
| 441 | CONFIG_CFG80211_DEFAULT_PS_VALUE=0 | ||
| 442 | # CONFIG_WIRELESS_OLD_REGULATORY is not set | ||
| 443 | CONFIG_WIRELESS_EXT=y | ||
| 444 | CONFIG_WIRELESS_EXT_SYSFS=y | ||
| 445 | CONFIG_LIB80211=m | ||
| 446 | # CONFIG_LIB80211_DEBUG is not set | ||
| 447 | |||
| 448 | # | ||
| 449 | # CFG80211 needs to be enabled for MAC80211 | ||
| 450 | # | ||
| 451 | # CONFIG_WIMAX is not set | ||
| 452 | # CONFIG_RFKILL is not set | ||
| 453 | # CONFIG_NET_9P is not set | ||
| 454 | |||
| 455 | # | ||
| 456 | # Device Drivers | ||
| 457 | # | ||
| 458 | |||
| 459 | # | ||
| 460 | # Generic Driver Options | ||
| 461 | # | ||
| 462 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
| 463 | # CONFIG_DEVTMPFS is not set | ||
| 464 | CONFIG_STANDALONE=y | ||
| 465 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 466 | CONFIG_FW_LOADER=m | ||
| 467 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
| 468 | CONFIG_EXTRA_FIRMWARE="" | ||
| 469 | # CONFIG_DEBUG_DRIVER is not set | ||
| 470 | # CONFIG_DEBUG_DEVRES is not set | ||
| 471 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 472 | # CONFIG_CONNECTOR is not set | ||
| 473 | CONFIG_MTD=y | ||
| 474 | # CONFIG_MTD_DEBUG is not set | ||
| 475 | # CONFIG_MTD_TESTS is not set | ||
| 476 | CONFIG_MTD_CONCAT=y | ||
| 477 | CONFIG_MTD_PARTITIONS=y | ||
| 478 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
| 479 | CONFIG_MTD_CMDLINE_PARTS=y | ||
| 480 | # CONFIG_MTD_AFS_PARTS is not set | ||
| 481 | # CONFIG_MTD_AR7_PARTS is not set | ||
| 482 | |||
| 483 | # | ||
| 484 | # User Modules And Translation Layers | ||
| 485 | # | ||
| 486 | CONFIG_MTD_CHAR=y | ||
| 487 | CONFIG_MTD_BLKDEVS=y | ||
| 488 | CONFIG_MTD_BLOCK=y | ||
| 489 | # CONFIG_FTL is not set | ||
| 490 | # CONFIG_NFTL is not set | ||
| 491 | # CONFIG_INFTL is not set | ||
| 492 | # CONFIG_RFD_FTL is not set | ||
| 493 | # CONFIG_SSFDC is not set | ||
| 494 | # CONFIG_MTD_OOPS is not set | ||
| 495 | |||
| 496 | # | ||
| 497 | # RAM/ROM/Flash chip drivers | ||
| 498 | # | ||
| 499 | CONFIG_MTD_CFI=y | ||
| 500 | # CONFIG_MTD_JEDECPROBE is not set | ||
| 501 | CONFIG_MTD_GEN_PROBE=y | ||
| 502 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
| 503 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
| 504 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
| 505 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
| 506 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
| 507 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
| 508 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
| 509 | CONFIG_MTD_CFI_I1=y | ||
| 510 | CONFIG_MTD_CFI_I2=y | ||
| 511 | # CONFIG_MTD_CFI_I4 is not set | ||
| 512 | # CONFIG_MTD_CFI_I8 is not set | ||
| 513 | CONFIG_MTD_CFI_INTELEXT=y | ||
| 514 | # CONFIG_MTD_CFI_AMDSTD is not set | ||
| 515 | # CONFIG_MTD_CFI_STAA is not set | ||
| 516 | CONFIG_MTD_CFI_UTIL=y | ||
| 517 | # CONFIG_MTD_RAM is not set | ||
| 518 | # CONFIG_MTD_ROM is not set | ||
| 519 | # CONFIG_MTD_ABSENT is not set | ||
| 520 | |||
| 521 | # | ||
| 522 | # Mapping drivers for chip access | ||
| 523 | # | ||
| 524 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
| 525 | # CONFIG_MTD_PHYSMAP is not set | ||
| 526 | # CONFIG_MTD_ARM_INTEGRATOR is not set | ||
| 527 | # CONFIG_MTD_OMAP_NOR is not set | ||
| 528 | # CONFIG_MTD_PLATRAM is not set | ||
| 529 | |||
| 530 | # | ||
| 531 | # Self-contained MTD device drivers | ||
| 532 | # | ||
| 533 | # CONFIG_MTD_DATAFLASH is not set | ||
| 534 | # CONFIG_MTD_M25P80 is not set | ||
| 535 | # CONFIG_MTD_SST25L is not set | ||
| 536 | # CONFIG_MTD_SLRAM is not set | ||
| 537 | # CONFIG_MTD_PHRAM is not set | ||
| 538 | # CONFIG_MTD_MTDRAM is not set | ||
| 539 | # CONFIG_MTD_BLOCK2MTD is not set | ||
| 540 | |||
| 541 | # | ||
| 542 | # Disk-On-Chip Device Drivers | ||
| 543 | # | ||
| 544 | # CONFIG_MTD_DOC2000 is not set | ||
| 545 | # CONFIG_MTD_DOC2001 is not set | ||
| 546 | # CONFIG_MTD_DOC2001PLUS is not set | ||
| 547 | CONFIG_MTD_NAND=y | ||
| 548 | # CONFIG_MTD_NAND_VERIFY_WRITE is not set | ||
| 549 | # CONFIG_MTD_NAND_ECC_SMC is not set | ||
| 550 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set | ||
| 551 | # CONFIG_MTD_NAND_GPIO is not set | ||
| 552 | CONFIG_MTD_NAND_OMAP2=y | ||
| 553 | CONFIG_MTD_NAND_OMAP_PREFETCH=y | ||
| 554 | # CONFIG_MTD_NAND_OMAP_PREFETCH_DMA is not set | ||
| 555 | CONFIG_MTD_NAND_IDS=y | ||
| 556 | # CONFIG_MTD_NAND_DISKONCHIP is not set | ||
| 557 | # CONFIG_MTD_NAND_NANDSIM is not set | ||
| 558 | # CONFIG_MTD_NAND_PLATFORM is not set | ||
| 559 | # CONFIG_MTD_ALAUDA is not set | ||
| 560 | # CONFIG_MTD_ONENAND is not set | ||
| 561 | |||
| 562 | # | ||
| 563 | # LPDDR flash memory drivers | ||
| 564 | # | ||
| 565 | # CONFIG_MTD_LPDDR is not set | ||
| 566 | |||
| 567 | # | ||
| 568 | # UBI - Unsorted block images | ||
| 569 | # | ||
| 570 | # CONFIG_MTD_UBI is not set | ||
| 571 | # CONFIG_PARPORT is not set | ||
| 572 | CONFIG_BLK_DEV=y | ||
| 573 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 574 | CONFIG_BLK_DEV_LOOP=y | ||
| 575 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
| 576 | # CONFIG_BLK_DEV_NBD is not set | ||
| 577 | # CONFIG_BLK_DEV_UB is not set | ||
| 578 | CONFIG_BLK_DEV_RAM=y | ||
| 579 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
| 580 | CONFIG_BLK_DEV_RAM_SIZE=16384 | ||
| 581 | # CONFIG_BLK_DEV_XIP is not set | ||
| 582 | # CONFIG_CDROM_PKTCDVD is not set | ||
| 583 | # CONFIG_ATA_OVER_ETH is not set | ||
| 584 | # CONFIG_MG_DISK is not set | ||
| 585 | CONFIG_MISC_DEVICES=y | ||
| 586 | # CONFIG_ICS932S401 is not set | ||
| 587 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
| 588 | # CONFIG_ISL29003 is not set | ||
| 589 | # CONFIG_C2PORT is not set | ||
| 590 | |||
| 591 | # | ||
| 592 | # EEPROM support | ||
| 593 | # | ||
| 594 | # CONFIG_EEPROM_AT24 is not set | ||
| 595 | # CONFIG_EEPROM_AT25 is not set | ||
| 596 | # CONFIG_EEPROM_LEGACY is not set | ||
| 597 | # CONFIG_EEPROM_MAX6875 is not set | ||
| 598 | # CONFIG_EEPROM_93CX6 is not set | ||
| 599 | CONFIG_HAVE_IDE=y | ||
| 600 | # CONFIG_IDE is not set | ||
| 601 | |||
| 602 | # | ||
| 603 | # SCSI device support | ||
| 604 | # | ||
| 605 | # CONFIG_RAID_ATTRS is not set | ||
| 606 | CONFIG_SCSI=y | ||
| 607 | CONFIG_SCSI_DMA=y | ||
| 608 | # CONFIG_SCSI_TGT is not set | ||
| 609 | # CONFIG_SCSI_NETLINK is not set | ||
| 610 | CONFIG_SCSI_PROC_FS=y | ||
| 611 | |||
| 612 | # | ||
| 613 | # SCSI support type (disk, tape, CD-ROM) | ||
| 614 | # | ||
| 615 | CONFIG_BLK_DEV_SD=y | ||
| 616 | # CONFIG_CHR_DEV_ST is not set | ||
| 617 | # CONFIG_CHR_DEV_OSST is not set | ||
| 618 | # CONFIG_BLK_DEV_SR is not set | ||
| 619 | # CONFIG_CHR_DEV_SG is not set | ||
| 620 | # CONFIG_CHR_DEV_SCH is not set | ||
| 621 | # CONFIG_SCSI_MULTI_LUN is not set | ||
| 622 | # CONFIG_SCSI_CONSTANTS is not set | ||
| 623 | # CONFIG_SCSI_LOGGING is not set | ||
| 624 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
| 625 | CONFIG_SCSI_WAIT_SCAN=m | ||
| 626 | |||
| 627 | # | ||
| 628 | # SCSI Transports | ||
| 629 | # | ||
| 630 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
| 631 | # CONFIG_SCSI_FC_ATTRS is not set | ||
| 632 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
| 633 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
| 634 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
| 635 | CONFIG_SCSI_LOWLEVEL=y | ||
| 636 | # CONFIG_ISCSI_TCP is not set | ||
| 637 | # CONFIG_LIBFC is not set | ||
| 638 | # CONFIG_LIBFCOE is not set | ||
| 639 | # CONFIG_SCSI_DEBUG is not set | ||
| 640 | # CONFIG_SCSI_DH is not set | ||
| 641 | # CONFIG_SCSI_OSD_INITIATOR is not set | ||
| 642 | # CONFIG_ATA is not set | ||
| 643 | # CONFIG_MD is not set | ||
| 644 | CONFIG_NETDEVICES=y | ||
| 645 | # CONFIG_DUMMY is not set | ||
| 646 | # CONFIG_BONDING is not set | ||
| 647 | # CONFIG_MACVLAN is not set | ||
| 648 | # CONFIG_EQUALIZER is not set | ||
| 649 | # CONFIG_TUN is not set | ||
| 650 | # CONFIG_VETH is not set | ||
| 651 | CONFIG_PHYLIB=y | ||
| 652 | |||
| 653 | # | ||
| 654 | # MII PHY device drivers | ||
| 655 | # | ||
| 656 | # CONFIG_MARVELL_PHY is not set | ||
| 657 | # CONFIG_DAVICOM_PHY is not set | ||
| 658 | # CONFIG_QSEMI_PHY is not set | ||
| 659 | # CONFIG_LXT_PHY is not set | ||
| 660 | # CONFIG_CICADA_PHY is not set | ||
| 661 | # CONFIG_VITESSE_PHY is not set | ||
| 662 | # CONFIG_SMSC_PHY is not set | ||
| 663 | # CONFIG_BROADCOM_PHY is not set | ||
| 664 | # CONFIG_ICPLUS_PHY is not set | ||
| 665 | # CONFIG_REALTEK_PHY is not set | ||
| 666 | # CONFIG_NATIONAL_PHY is not set | ||
| 667 | # CONFIG_STE10XP is not set | ||
| 668 | # CONFIG_LSI_ET1011C_PHY is not set | ||
| 669 | # CONFIG_FIXED_PHY is not set | ||
| 670 | # CONFIG_MDIO_BITBANG is not set | ||
| 671 | CONFIG_NET_ETHERNET=y | ||
| 672 | CONFIG_MII=y | ||
| 673 | # CONFIG_AX88796 is not set | ||
| 674 | # CONFIG_SMC91X is not set | ||
| 675 | # CONFIG_DM9000 is not set | ||
| 676 | # CONFIG_ENC28J60 is not set | ||
| 677 | # CONFIG_ETHOC is not set | ||
| 678 | # CONFIG_SMC911X is not set | ||
| 679 | CONFIG_SMSC911X=y | ||
| 680 | # CONFIG_DNET is not set | ||
| 681 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
| 682 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
| 683 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
| 684 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
| 685 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
| 686 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
| 687 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
| 688 | # CONFIG_B44 is not set | ||
| 689 | # CONFIG_KS8842 is not set | ||
| 690 | # CONFIG_KS8851 is not set | ||
| 691 | # CONFIG_KS8851_MLL is not set | ||
| 692 | # CONFIG_NETDEV_1000 is not set | ||
| 693 | # CONFIG_NETDEV_10000 is not set | ||
| 694 | CONFIG_WLAN=y | ||
| 695 | # CONFIG_WLAN_PRE80211 is not set | ||
| 696 | CONFIG_WLAN_80211=y | ||
| 697 | CONFIG_LIBERTAS=m | ||
| 698 | # CONFIG_LIBERTAS_USB is not set | ||
| 699 | CONFIG_LIBERTAS_SDIO=m | ||
| 700 | # CONFIG_LIBERTAS_SPI is not set | ||
| 701 | # CONFIG_LIBERTAS_DEBUG is not set | ||
| 702 | # CONFIG_USB_ZD1201 is not set | ||
| 703 | # CONFIG_HOSTAP is not set | ||
| 704 | |||
| 705 | # | ||
| 706 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
| 707 | # | ||
| 708 | |||
| 709 | # | ||
| 710 | # USB Network Adapters | ||
| 711 | # | ||
| 712 | # CONFIG_USB_CATC is not set | ||
| 713 | # CONFIG_USB_KAWETH is not set | ||
| 714 | # CONFIG_USB_PEGASUS is not set | ||
| 715 | # CONFIG_USB_RTL8150 is not set | ||
| 716 | # CONFIG_USB_USBNET is not set | ||
| 717 | # CONFIG_WAN is not set | ||
| 718 | # CONFIG_PPP is not set | ||
| 719 | # CONFIG_SLIP is not set | ||
| 720 | # CONFIG_NETCONSOLE is not set | ||
| 721 | # CONFIG_NETPOLL is not set | ||
| 722 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
| 723 | # CONFIG_ISDN is not set | ||
| 724 | # CONFIG_PHONE is not set | ||
| 725 | |||
| 726 | # | ||
| 727 | # Input device support | ||
| 728 | # | ||
| 729 | CONFIG_INPUT=y | ||
| 730 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 731 | # CONFIG_INPUT_POLLDEV is not set | ||
| 732 | |||
| 733 | # | ||
| 734 | # Userland interfaces | ||
| 735 | # | ||
| 736 | CONFIG_INPUT_MOUSEDEV=y | ||
| 737 | CONFIG_INPUT_MOUSEDEV_PSAUX=y | ||
| 738 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
| 739 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
| 740 | # CONFIG_INPUT_JOYDEV is not set | ||
| 741 | CONFIG_INPUT_EVDEV=y | ||
| 742 | # CONFIG_INPUT_EVBUG is not set | ||
| 743 | |||
| 744 | # | ||
| 745 | # Input Device Drivers | ||
| 746 | # | ||
| 747 | CONFIG_INPUT_KEYBOARD=y | ||
| 748 | # CONFIG_KEYBOARD_ADP5588 is not set | ||
| 749 | CONFIG_KEYBOARD_ATKBD=y | ||
| 750 | # CONFIG_QT2160 is not set | ||
| 751 | # CONFIG_KEYBOARD_LKKBD is not set | ||
| 752 | # CONFIG_KEYBOARD_GPIO is not set | ||
| 753 | # CONFIG_KEYBOARD_MATRIX is not set | ||
| 754 | # CONFIG_KEYBOARD_LM8323 is not set | ||
| 755 | # CONFIG_KEYBOARD_MAX7359 is not set | ||
| 756 | # CONFIG_KEYBOARD_NEWTON is not set | ||
| 757 | # CONFIG_KEYBOARD_OPENCORES is not set | ||
| 758 | # CONFIG_KEYBOARD_STOWAWAY is not set | ||
| 759 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
| 760 | CONFIG_KEYBOARD_TWL4030=m | ||
| 761 | # CONFIG_KEYBOARD_XTKBD is not set | ||
| 762 | # CONFIG_INPUT_MOUSE is not set | ||
| 763 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 764 | # CONFIG_INPUT_TABLET is not set | ||
| 765 | CONFIG_INPUT_TOUCHSCREEN=y | ||
| 766 | CONFIG_TOUCHSCREEN_ADS7846=m | ||
| 767 | # CONFIG_TOUCHSCREEN_AD7877 is not set | ||
| 768 | # CONFIG_TOUCHSCREEN_AD7879_I2C is not set | ||
| 769 | # CONFIG_TOUCHSCREEN_AD7879_SPI is not set | ||
| 770 | # CONFIG_TOUCHSCREEN_AD7879 is not set | ||
| 771 | # CONFIG_TOUCHSCREEN_EETI is not set | ||
| 772 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | ||
| 773 | # CONFIG_TOUCHSCREEN_GUNZE is not set | ||
| 774 | # CONFIG_TOUCHSCREEN_ELO is not set | ||
| 775 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | ||
| 776 | # CONFIG_TOUCHSCREEN_MCS5000 is not set | ||
| 777 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | ||
| 778 | # CONFIG_TOUCHSCREEN_INEXIO is not set | ||
| 779 | # CONFIG_TOUCHSCREEN_MK712 is not set | ||
| 780 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set | ||
| 781 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | ||
| 782 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set | ||
| 783 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | ||
| 784 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set | ||
| 785 | # CONFIG_TOUCHSCREEN_TSC2007 is not set | ||
| 786 | # CONFIG_TOUCHSCREEN_W90X900 is not set | ||
| 787 | # CONFIG_INPUT_MISC is not set | ||
| 788 | |||
| 789 | # | ||
| 790 | # Hardware I/O ports | ||
| 791 | # | ||
| 792 | CONFIG_SERIO=y | ||
| 793 | CONFIG_SERIO_SERPORT=y | ||
| 794 | CONFIG_SERIO_LIBPS2=y | ||
| 795 | # CONFIG_SERIO_RAW is not set | ||
| 796 | # CONFIG_GAMEPORT is not set | ||
| 797 | |||
| 798 | # | ||
| 799 | # Character devices | ||
| 800 | # | ||
| 801 | CONFIG_VT=y | ||
| 802 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 803 | CONFIG_VT_CONSOLE=y | ||
| 804 | CONFIG_HW_CONSOLE=y | ||
| 805 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
| 806 | CONFIG_DEVKMEM=y | ||
| 807 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 808 | |||
| 809 | # | ||
| 810 | # Serial drivers | ||
| 811 | # | ||
| 812 | CONFIG_SERIAL_8250=y | ||
| 813 | CONFIG_SERIAL_8250_CONSOLE=y | ||
| 814 | CONFIG_SERIAL_8250_NR_UARTS=32 | ||
| 815 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
| 816 | CONFIG_SERIAL_8250_EXTENDED=y | ||
| 817 | CONFIG_SERIAL_8250_MANY_PORTS=y | ||
| 818 | CONFIG_SERIAL_8250_SHARE_IRQ=y | ||
| 819 | CONFIG_SERIAL_8250_DETECT_IRQ=y | ||
| 820 | CONFIG_SERIAL_8250_RSA=y | ||
| 821 | |||
| 822 | # | ||
| 823 | # Non-8250 serial port support | ||
| 824 | # | ||
| 825 | # CONFIG_SERIAL_MAX3100 is not set | ||
| 826 | CONFIG_SERIAL_CORE=y | ||
| 827 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 828 | CONFIG_UNIX98_PTYS=y | ||
| 829 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 830 | # CONFIG_LEGACY_PTYS is not set | ||
| 831 | # CONFIG_IPMI_HANDLER is not set | ||
| 832 | CONFIG_HW_RANDOM=y | ||
| 833 | # CONFIG_HW_RANDOM_TIMERIOMEM is not set | ||
| 834 | # CONFIG_R3964 is not set | ||
| 835 | # CONFIG_RAW_DRIVER is not set | ||
| 836 | # CONFIG_TCG_TPM is not set | ||
| 837 | CONFIG_I2C=y | ||
| 838 | CONFIG_I2C_BOARDINFO=y | ||
| 839 | CONFIG_I2C_COMPAT=y | ||
| 840 | CONFIG_I2C_CHARDEV=y | ||
| 841 | CONFIG_I2C_HELPER_AUTO=y | ||
| 842 | |||
| 843 | # | ||
| 844 | # I2C Hardware Bus support | ||
| 845 | # | ||
| 846 | |||
| 847 | # | ||
| 848 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
| 849 | # | ||
| 850 | # CONFIG_I2C_DESIGNWARE is not set | ||
| 851 | # CONFIG_I2C_GPIO is not set | ||
| 852 | # CONFIG_I2C_OCORES is not set | ||
| 853 | CONFIG_I2C_OMAP=y | ||
| 854 | # CONFIG_I2C_SIMTEC is not set | ||
| 855 | |||
| 856 | # | ||
| 857 | # External I2C/SMBus adapter drivers | ||
| 858 | # | ||
| 859 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
| 860 | # CONFIG_I2C_TAOS_EVM is not set | ||
| 861 | # CONFIG_I2C_TINY_USB is not set | ||
| 862 | |||
| 863 | # | ||
| 864 | # Other I2C/SMBus bus drivers | ||
| 865 | # | ||
| 866 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
| 867 | # CONFIG_I2C_STUB is not set | ||
| 868 | |||
| 869 | # | ||
| 870 | # Miscellaneous I2C Chip support | ||
| 871 | # | ||
| 872 | # CONFIG_DS1682 is not set | ||
| 873 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 874 | # CONFIG_I2C_DEBUG_CORE is not set | ||
| 875 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
| 876 | # CONFIG_I2C_DEBUG_BUS is not set | ||
| 877 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
| 878 | CONFIG_SPI=y | ||
| 879 | # CONFIG_SPI_DEBUG is not set | ||
| 880 | CONFIG_SPI_MASTER=y | ||
| 881 | |||
| 882 | # | ||
| 883 | # SPI Master Controller Drivers | ||
| 884 | # | ||
| 885 | # CONFIG_SPI_BITBANG is not set | ||
| 886 | # CONFIG_SPI_GPIO is not set | ||
| 887 | CONFIG_SPI_OMAP24XX=y | ||
| 888 | |||
| 889 | # | ||
| 890 | # SPI Protocol Masters | ||
| 891 | # | ||
| 892 | # CONFIG_SPI_SPIDEV is not set | ||
| 893 | # CONFIG_SPI_TLE62X0 is not set | ||
| 894 | |||
| 895 | # | ||
| 896 | # PPS support | ||
| 897 | # | ||
| 898 | # CONFIG_PPS is not set | ||
| 899 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
| 900 | CONFIG_GPIOLIB=y | ||
| 901 | # CONFIG_DEBUG_GPIO is not set | ||
| 902 | CONFIG_GPIO_SYSFS=y | ||
| 903 | |||
| 904 | # | ||
| 905 | # Memory mapped GPIO expanders: | ||
| 906 | # | ||
| 907 | |||
| 908 | # | ||
| 909 | # I2C GPIO expanders: | ||
| 910 | # | ||
| 911 | # CONFIG_GPIO_MAX732X is not set | ||
| 912 | # CONFIG_GPIO_PCA953X is not set | ||
| 913 | # CONFIG_GPIO_PCF857X is not set | ||
| 914 | CONFIG_GPIO_TWL4030=y | ||
| 915 | |||
| 916 | # | ||
| 917 | # PCI GPIO expanders: | ||
| 918 | # | ||
| 919 | |||
| 920 | # | ||
| 921 | # SPI GPIO expanders: | ||
| 922 | # | ||
| 923 | # CONFIG_GPIO_MAX7301 is not set | ||
| 924 | # CONFIG_GPIO_MCP23S08 is not set | ||
| 925 | # CONFIG_GPIO_MC33880 is not set | ||
| 926 | |||
| 927 | # | ||
| 928 | # AC97 GPIO expanders: | ||
| 929 | # | ||
| 930 | # CONFIG_W1 is not set | ||
| 931 | # CONFIG_POWER_SUPPLY is not set | ||
| 932 | # CONFIG_HWMON is not set | ||
| 933 | # CONFIG_THERMAL is not set | ||
| 934 | CONFIG_WATCHDOG=y | ||
| 935 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
| 936 | |||
| 937 | # | ||
| 938 | # Watchdog Device Drivers | ||
| 939 | # | ||
| 940 | # CONFIG_SOFT_WATCHDOG is not set | ||
| 941 | CONFIG_OMAP_WATCHDOG=y | ||
| 942 | # CONFIG_TWL4030_WATCHDOG is not set | ||
| 943 | |||
| 944 | # | ||
| 945 | # USB-based Watchdog Cards | ||
| 946 | # | ||
| 947 | # CONFIG_USBPCWATCHDOG is not set | ||
| 948 | CONFIG_SSB_POSSIBLE=y | ||
| 949 | |||
| 950 | # | ||
| 951 | # Sonics Silicon Backplane | ||
| 952 | # | ||
| 953 | # CONFIG_SSB is not set | ||
| 954 | |||
| 955 | # | ||
| 956 | # Multifunction device drivers | ||
| 957 | # | ||
| 958 | # CONFIG_MFD_CORE is not set | ||
| 959 | # CONFIG_MFD_SM501 is not set | ||
| 960 | # CONFIG_MFD_ASIC3 is not set | ||
| 961 | # CONFIG_HTC_EGPIO is not set | ||
| 962 | # CONFIG_HTC_PASIC3 is not set | ||
| 963 | # CONFIG_TPS65010 is not set | ||
| 964 | CONFIG_TWL4030_CORE=y | ||
| 965 | # CONFIG_TWL4030_POWER is not set | ||
| 966 | # CONFIG_MFD_TMIO is not set | ||
| 967 | # CONFIG_MFD_T7L66XB is not set | ||
| 968 | # CONFIG_MFD_TC6387XB is not set | ||
| 969 | # CONFIG_MFD_TC6393XB is not set | ||
| 970 | # CONFIG_PMIC_DA903X is not set | ||
| 971 | # CONFIG_MFD_WM8400 is not set | ||
| 972 | # CONFIG_MFD_WM831X is not set | ||
| 973 | # CONFIG_MFD_WM8350_I2C is not set | ||
| 974 | # CONFIG_MFD_PCF50633 is not set | ||
| 975 | # CONFIG_MFD_MC13783 is not set | ||
| 976 | # CONFIG_AB3100_CORE is not set | ||
| 977 | # CONFIG_EZX_PCAP is not set | ||
| 978 | CONFIG_REGULATOR=y | ||
| 979 | # CONFIG_REGULATOR_DEBUG is not set | ||
| 980 | # CONFIG_REGULATOR_FIXED_VOLTAGE is not set | ||
| 981 | # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set | ||
| 982 | # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set | ||
| 983 | # CONFIG_REGULATOR_BQ24022 is not set | ||
| 984 | # CONFIG_REGULATOR_MAX1586 is not set | ||
| 985 | CONFIG_REGULATOR_TWL4030=y | ||
| 986 | # CONFIG_REGULATOR_LP3971 is not set | ||
| 987 | # CONFIG_REGULATOR_TPS65023 is not set | ||
| 988 | # CONFIG_REGULATOR_TPS6507X is not set | ||
| 989 | # CONFIG_MEDIA_SUPPORT is not set | ||
| 990 | |||
| 991 | # | ||
| 992 | # Graphics support | ||
| 993 | # | ||
| 994 | # CONFIG_VGASTATE is not set | ||
| 995 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 996 | # CONFIG_FB is not set | ||
| 997 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 998 | |||
| 999 | # | ||
| 1000 | # Display device support | ||
| 1001 | # | ||
| 1002 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 1003 | |||
| 1004 | # | ||
| 1005 | # Console display driver support | ||
| 1006 | # | ||
| 1007 | # CONFIG_VGA_CONSOLE is not set | ||
| 1008 | CONFIG_DUMMY_CONSOLE=y | ||
| 1009 | # CONFIG_SOUND is not set | ||
| 1010 | CONFIG_HID_SUPPORT=y | ||
| 1011 | CONFIG_HID=y | ||
| 1012 | # CONFIG_HIDRAW is not set | ||
| 1013 | |||
| 1014 | # | ||
| 1015 | # USB Input Devices | ||
| 1016 | # | ||
| 1017 | CONFIG_USB_HID=y | ||
| 1018 | # CONFIG_HID_PID is not set | ||
| 1019 | # CONFIG_USB_HIDDEV is not set | ||
| 1020 | |||
| 1021 | # | ||
| 1022 | # Special HID drivers | ||
| 1023 | # | ||
| 1024 | # CONFIG_HID_A4TECH is not set | ||
| 1025 | # CONFIG_HID_APPLE is not set | ||
| 1026 | # CONFIG_HID_BELKIN is not set | ||
| 1027 | # CONFIG_HID_CHERRY is not set | ||
| 1028 | # CONFIG_HID_CHICONY is not set | ||
| 1029 | # CONFIG_HID_CYPRESS is not set | ||
| 1030 | # CONFIG_HID_DRAGONRISE is not set | ||
| 1031 | # CONFIG_HID_EZKEY is not set | ||
| 1032 | # CONFIG_HID_KYE is not set | ||
| 1033 | # CONFIG_HID_GYRATION is not set | ||
| 1034 | # CONFIG_HID_TWINHAN is not set | ||
| 1035 | # CONFIG_HID_KENSINGTON is not set | ||
| 1036 | # CONFIG_HID_LOGITECH is not set | ||
| 1037 | # CONFIG_HID_MICROSOFT is not set | ||
| 1038 | # CONFIG_HID_MONTEREY is not set | ||
| 1039 | # CONFIG_HID_NTRIG is not set | ||
| 1040 | # CONFIG_HID_PANTHERLORD is not set | ||
| 1041 | # CONFIG_HID_PETALYNX is not set | ||
| 1042 | # CONFIG_HID_SAMSUNG is not set | ||
| 1043 | # CONFIG_HID_SONY is not set | ||
| 1044 | # CONFIG_HID_SUNPLUS is not set | ||
| 1045 | # CONFIG_HID_GREENASIA is not set | ||
| 1046 | # CONFIG_HID_SMARTJOYPLUS is not set | ||
| 1047 | # CONFIG_HID_TOPSEED is not set | ||
| 1048 | # CONFIG_HID_THRUSTMASTER is not set | ||
| 1049 | # CONFIG_HID_ZEROPLUS is not set | ||
| 1050 | CONFIG_USB_SUPPORT=y | ||
| 1051 | CONFIG_USB_ARCH_HAS_HCD=y | ||
| 1052 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
| 1053 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
| 1054 | CONFIG_USB=y | ||
| 1055 | # CONFIG_USB_DEBUG is not set | ||
| 1056 | CONFIG_USB_ANNOUNCE_NEW_DEVICES=y | ||
| 1057 | |||
| 1058 | # | ||
| 1059 | # Miscellaneous USB options | ||
| 1060 | # | ||
| 1061 | CONFIG_USB_DEVICEFS=y | ||
| 1062 | # CONFIG_USB_DEVICE_CLASS is not set | ||
| 1063 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
| 1064 | CONFIG_USB_SUSPEND=y | ||
| 1065 | CONFIG_USB_OTG=y | ||
| 1066 | # CONFIG_USB_OTG_WHITELIST is not set | ||
| 1067 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
| 1068 | CONFIG_USB_MON=y | ||
| 1069 | # CONFIG_USB_WUSB is not set | ||
| 1070 | # CONFIG_USB_WUSB_CBAF is not set | ||
| 1071 | |||
| 1072 | # | ||
| 1073 | # USB Host Controller Drivers | ||
| 1074 | # | ||
| 1075 | # CONFIG_USB_C67X00_HCD is not set | ||
| 1076 | CONFIG_USB_EHCI_HCD=y | ||
| 1077 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set | ||
| 1078 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | ||
| 1079 | # CONFIG_USB_OXU210HP_HCD is not set | ||
| 1080 | # CONFIG_USB_ISP116X_HCD is not set | ||
| 1081 | # CONFIG_USB_ISP1760_HCD is not set | ||
| 1082 | # CONFIG_USB_ISP1362_HCD is not set | ||
| 1083 | # CONFIG_USB_OHCI_HCD is not set | ||
| 1084 | # CONFIG_USB_SL811_HCD is not set | ||
| 1085 | # CONFIG_USB_R8A66597_HCD is not set | ||
| 1086 | # CONFIG_USB_HWA_HCD is not set | ||
| 1087 | CONFIG_USB_MUSB_HDRC=y | ||
| 1088 | CONFIG_USB_MUSB_SOC=y | ||
| 1089 | |||
| 1090 | # | ||
| 1091 | # OMAP 343x high speed USB support | ||
| 1092 | # | ||
| 1093 | # CONFIG_USB_MUSB_HOST is not set | ||
| 1094 | # CONFIG_USB_MUSB_PERIPHERAL is not set | ||
| 1095 | CONFIG_USB_MUSB_OTG=y | ||
| 1096 | CONFIG_USB_GADGET_MUSB_HDRC=y | ||
| 1097 | CONFIG_USB_MUSB_HDRC_HCD=y | ||
| 1098 | # CONFIG_MUSB_PIO_ONLY is not set | ||
| 1099 | CONFIG_USB_INVENTRA_DMA=y | ||
| 1100 | # CONFIG_USB_TI_CPPI_DMA is not set | ||
| 1101 | # CONFIG_USB_MUSB_DEBUG is not set | ||
| 1102 | |||
| 1103 | # | ||
| 1104 | # USB Device Class drivers | ||
| 1105 | # | ||
| 1106 | # CONFIG_USB_ACM is not set | ||
| 1107 | # CONFIG_USB_PRINTER is not set | ||
| 1108 | # CONFIG_USB_WDM is not set | ||
| 1109 | # CONFIG_USB_TMC is not set | ||
| 1110 | |||
| 1111 | # | ||
| 1112 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | ||
| 1113 | # | ||
| 1114 | |||
| 1115 | # | ||
| 1116 | # also be needed; see USB_STORAGE Help for more info | ||
| 1117 | # | ||
| 1118 | CONFIG_USB_STORAGE=y | ||
| 1119 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
| 1120 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
| 1121 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
| 1122 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
| 1123 | # CONFIG_USB_STORAGE_USBAT is not set | ||
| 1124 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
| 1125 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
| 1126 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
| 1127 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
| 1128 | # CONFIG_USB_STORAGE_ONETOUCH is not set | ||
| 1129 | # CONFIG_USB_STORAGE_KARMA is not set | ||
| 1130 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
| 1131 | # CONFIG_USB_LIBUSUAL is not set | ||
| 1132 | |||
| 1133 | # | ||
| 1134 | # USB Imaging devices | ||
| 1135 | # | ||
| 1136 | # CONFIG_USB_MDC800 is not set | ||
| 1137 | # CONFIG_USB_MICROTEK is not set | ||
| 1138 | |||
| 1139 | # | ||
| 1140 | # USB port drivers | ||
| 1141 | # | ||
| 1142 | # CONFIG_USB_SERIAL is not set | ||
| 1143 | |||
| 1144 | # | ||
| 1145 | # USB Miscellaneous drivers | ||
| 1146 | # | ||
| 1147 | # CONFIG_USB_EMI62 is not set | ||
| 1148 | # CONFIG_USB_EMI26 is not set | ||
| 1149 | # CONFIG_USB_ADUTUX is not set | ||
| 1150 | # CONFIG_USB_SEVSEG is not set | ||
| 1151 | # CONFIG_USB_RIO500 is not set | ||
| 1152 | # CONFIG_USB_LEGOTOWER is not set | ||
| 1153 | # CONFIG_USB_LCD is not set | ||
| 1154 | # CONFIG_USB_BERRY_CHARGE is not set | ||
| 1155 | # CONFIG_USB_LED is not set | ||
| 1156 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
| 1157 | # CONFIG_USB_CYTHERM is not set | ||
| 1158 | # CONFIG_USB_IDMOUSE is not set | ||
| 1159 | # CONFIG_USB_FTDI_ELAN is not set | ||
| 1160 | # CONFIG_USB_APPLEDISPLAY is not set | ||
| 1161 | # CONFIG_USB_SISUSBVGA is not set | ||
| 1162 | # CONFIG_USB_LD is not set | ||
| 1163 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
| 1164 | # CONFIG_USB_IOWARRIOR is not set | ||
| 1165 | CONFIG_USB_TEST=y | ||
| 1166 | # CONFIG_USB_ISIGHTFW is not set | ||
| 1167 | # CONFIG_USB_VST is not set | ||
| 1168 | CONFIG_USB_GADGET=y | ||
| 1169 | # CONFIG_USB_GADGET_DEBUG is not set | ||
| 1170 | # CONFIG_USB_GADGET_DEBUG_FILES is not set | ||
| 1171 | # CONFIG_USB_GADGET_DEBUG_FS is not set | ||
| 1172 | CONFIG_USB_GADGET_VBUS_DRAW=2 | ||
| 1173 | CONFIG_USB_GADGET_SELECTED=y | ||
| 1174 | # CONFIG_USB_GADGET_AT91 is not set | ||
| 1175 | # CONFIG_USB_GADGET_ATMEL_USBA is not set | ||
| 1176 | # CONFIG_USB_GADGET_FSL_USB2 is not set | ||
| 1177 | # CONFIG_USB_GADGET_LH7A40X is not set | ||
| 1178 | # CONFIG_USB_GADGET_OMAP is not set | ||
| 1179 | # CONFIG_USB_GADGET_PXA25X is not set | ||
| 1180 | # CONFIG_USB_GADGET_R8A66597 is not set | ||
| 1181 | # CONFIG_USB_GADGET_PXA27X is not set | ||
| 1182 | # CONFIG_USB_GADGET_S3C_HSOTG is not set | ||
| 1183 | # CONFIG_USB_GADGET_IMX is not set | ||
| 1184 | # CONFIG_USB_GADGET_S3C2410 is not set | ||
| 1185 | # CONFIG_USB_GADGET_M66592 is not set | ||
| 1186 | # CONFIG_USB_GADGET_AMD5536UDC is not set | ||
| 1187 | # CONFIG_USB_GADGET_FSL_QE is not set | ||
| 1188 | # CONFIG_USB_GADGET_CI13XXX is not set | ||
| 1189 | # CONFIG_USB_GADGET_NET2280 is not set | ||
| 1190 | # CONFIG_USB_GADGET_GOKU is not set | ||
| 1191 | # CONFIG_USB_GADGET_LANGWELL is not set | ||
| 1192 | # CONFIG_USB_GADGET_DUMMY_HCD is not set | ||
| 1193 | CONFIG_USB_GADGET_DUALSPEED=y | ||
| 1194 | # CONFIG_USB_ZERO is not set | ||
| 1195 | # CONFIG_USB_AUDIO is not set | ||
| 1196 | CONFIG_USB_ETH=y | ||
| 1197 | CONFIG_USB_ETH_RNDIS=y | ||
| 1198 | # CONFIG_USB_ETH_EEM is not set | ||
| 1199 | # CONFIG_USB_GADGETFS is not set | ||
| 1200 | # CONFIG_USB_FILE_STORAGE is not set | ||
| 1201 | # CONFIG_USB_G_SERIAL is not set | ||
| 1202 | # CONFIG_USB_MIDI_GADGET is not set | ||
| 1203 | # CONFIG_USB_G_PRINTER is not set | ||
| 1204 | # CONFIG_USB_CDC_COMPOSITE is not set | ||
| 1205 | |||
| 1206 | # | ||
| 1207 | # OTG and related infrastructure | ||
| 1208 | # | ||
| 1209 | CONFIG_USB_OTG_UTILS=y | ||
| 1210 | # CONFIG_USB_GPIO_VBUS is not set | ||
| 1211 | # CONFIG_ISP1301_OMAP is not set | ||
| 1212 | CONFIG_TWL4030_USB=y | ||
| 1213 | # CONFIG_NOP_USB_XCEIV is not set | ||
| 1214 | CONFIG_MMC=y | ||
| 1215 | # CONFIG_MMC_DEBUG is not set | ||
| 1216 | # CONFIG_MMC_UNSAFE_RESUME is not set | ||
| 1217 | |||
| 1218 | # | ||
| 1219 | # MMC/SD/SDIO Card Drivers | ||
| 1220 | # | ||
| 1221 | CONFIG_MMC_BLOCK=y | ||
| 1222 | CONFIG_MMC_BLOCK_BOUNCE=y | ||
| 1223 | # CONFIG_SDIO_UART is not set | ||
| 1224 | # CONFIG_MMC_TEST is not set | ||
| 1225 | |||
| 1226 | # | ||
| 1227 | # MMC/SD/SDIO Host Controller Drivers | ||
| 1228 | # | ||
| 1229 | # CONFIG_MMC_SDHCI is not set | ||
| 1230 | # CONFIG_MMC_OMAP is not set | ||
| 1231 | CONFIG_MMC_OMAP_HS=y | ||
| 1232 | # CONFIG_MMC_AT91 is not set | ||
| 1233 | # CONFIG_MMC_ATMELMCI is not set | ||
| 1234 | # CONFIG_MMC_SPI is not set | ||
| 1235 | # CONFIG_MEMSTICK is not set | ||
| 1236 | CONFIG_NEW_LEDS=y | ||
| 1237 | CONFIG_LEDS_CLASS=y | ||
| 1238 | |||
| 1239 | # | ||
| 1240 | # LED drivers | ||
| 1241 | # | ||
| 1242 | # CONFIG_LEDS_PCA9532 is not set | ||
| 1243 | CONFIG_LEDS_GPIO=y | ||
| 1244 | CONFIG_LEDS_GPIO_PLATFORM=y | ||
| 1245 | # CONFIG_LEDS_LP3944 is not set | ||
| 1246 | # CONFIG_LEDS_PCA955X is not set | ||
| 1247 | # CONFIG_LEDS_DAC124S085 is not set | ||
| 1248 | # CONFIG_LEDS_BD2802 is not set | ||
| 1249 | |||
| 1250 | # | ||
| 1251 | # LED Triggers | ||
| 1252 | # | ||
| 1253 | CONFIG_LEDS_TRIGGERS=y | ||
| 1254 | # CONFIG_LEDS_TRIGGER_TIMER is not set | ||
| 1255 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
| 1256 | # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set | ||
| 1257 | # CONFIG_LEDS_TRIGGER_GPIO is not set | ||
| 1258 | # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set | ||
| 1259 | |||
| 1260 | # | ||
| 1261 | # iptables trigger is under Netfilter config (LED target) | ||
| 1262 | # | ||
| 1263 | # CONFIG_ACCESSIBILITY is not set | ||
| 1264 | CONFIG_RTC_LIB=y | ||
| 1265 | CONFIG_RTC_CLASS=y | ||
| 1266 | CONFIG_RTC_HCTOSYS=y | ||
| 1267 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
| 1268 | # CONFIG_RTC_DEBUG is not set | ||
| 1269 | |||
| 1270 | # | ||
| 1271 | # RTC interfaces | ||
| 1272 | # | ||
| 1273 | CONFIG_RTC_INTF_SYSFS=y | ||
| 1274 | CONFIG_RTC_INTF_PROC=y | ||
| 1275 | CONFIG_RTC_INTF_DEV=y | ||
| 1276 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
| 1277 | # CONFIG_RTC_DRV_TEST is not set | ||
| 1278 | |||
| 1279 | # | ||
| 1280 | # I2C RTC drivers | ||
| 1281 | # | ||
| 1282 | # CONFIG_RTC_DRV_DS1307 is not set | ||
| 1283 | # CONFIG_RTC_DRV_DS1374 is not set | ||
| 1284 | # CONFIG_RTC_DRV_DS1672 is not set | ||
| 1285 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
| 1286 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
| 1287 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
| 1288 | # CONFIG_RTC_DRV_X1205 is not set | ||
| 1289 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
| 1290 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
| 1291 | # CONFIG_RTC_DRV_M41T80 is not set | ||
| 1292 | CONFIG_RTC_DRV_TWL4030=y | ||
| 1293 | # CONFIG_RTC_DRV_S35390A is not set | ||
| 1294 | # CONFIG_RTC_DRV_FM3130 is not set | ||
| 1295 | # CONFIG_RTC_DRV_RX8581 is not set | ||
| 1296 | # CONFIG_RTC_DRV_RX8025 is not set | ||
| 1297 | |||
| 1298 | # | ||
| 1299 | # SPI RTC drivers | ||
| 1300 | # | ||
| 1301 | # CONFIG_RTC_DRV_M41T94 is not set | ||
| 1302 | # CONFIG_RTC_DRV_DS1305 is not set | ||
| 1303 | # CONFIG_RTC_DRV_DS1390 is not set | ||
| 1304 | # CONFIG_RTC_DRV_MAX6902 is not set | ||
| 1305 | # CONFIG_RTC_DRV_R9701 is not set | ||
| 1306 | # CONFIG_RTC_DRV_RS5C348 is not set | ||
| 1307 | # CONFIG_RTC_DRV_DS3234 is not set | ||
| 1308 | # CONFIG_RTC_DRV_PCF2123 is not set | ||
| 1309 | |||
| 1310 | # | ||
| 1311 | # Platform RTC drivers | ||
| 1312 | # | ||
| 1313 | # CONFIG_RTC_DRV_CMOS is not set | ||
| 1314 | # CONFIG_RTC_DRV_DS1286 is not set | ||
| 1315 | # CONFIG_RTC_DRV_DS1511 is not set | ||
| 1316 | # CONFIG_RTC_DRV_DS1553 is not set | ||
| 1317 | # CONFIG_RTC_DRV_DS1742 is not set | ||
| 1318 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
| 1319 | # CONFIG_RTC_DRV_M48T86 is not set | ||
| 1320 | # CONFIG_RTC_DRV_M48T35 is not set | ||
| 1321 | # CONFIG_RTC_DRV_M48T59 is not set | ||
| 1322 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
| 1323 | # CONFIG_RTC_DRV_V3020 is not set | ||
| 1324 | |||
| 1325 | # | ||
| 1326 | # on-CPU RTC drivers | ||
| 1327 | # | ||
| 1328 | # CONFIG_DMADEVICES is not set | ||
| 1329 | # CONFIG_AUXDISPLAY is not set | ||
| 1330 | # CONFIG_UIO is not set | ||
| 1331 | |||
| 1332 | # | ||
| 1333 | # TI VLYNQ | ||
| 1334 | # | ||
| 1335 | # CONFIG_STAGING is not set | ||
| 1336 | |||
| 1337 | # | ||
| 1338 | # CBUS support | ||
| 1339 | # | ||
| 1340 | # CONFIG_CBUS is not set | ||
| 1341 | |||
| 1342 | # | ||
| 1343 | # File systems | ||
| 1344 | # | ||
| 1345 | CONFIG_EXT2_FS=y | ||
| 1346 | # CONFIG_EXT2_FS_XATTR is not set | ||
| 1347 | # CONFIG_EXT2_FS_XIP is not set | ||
| 1348 | CONFIG_EXT3_FS=y | ||
| 1349 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 1350 | # CONFIG_EXT3_FS_XATTR is not set | ||
| 1351 | # CONFIG_EXT4_FS is not set | ||
| 1352 | CONFIG_JBD=y | ||
| 1353 | # CONFIG_JBD_DEBUG is not set | ||
| 1354 | # CONFIG_REISERFS_FS is not set | ||
| 1355 | # CONFIG_JFS_FS is not set | ||
| 1356 | # CONFIG_FS_POSIX_ACL is not set | ||
| 1357 | # CONFIG_XFS_FS is not set | ||
| 1358 | # CONFIG_GFS2_FS is not set | ||
| 1359 | # CONFIG_OCFS2_FS is not set | ||
| 1360 | # CONFIG_BTRFS_FS is not set | ||
| 1361 | # CONFIG_NILFS2_FS is not set | ||
| 1362 | CONFIG_FILE_LOCKING=y | ||
| 1363 | CONFIG_FSNOTIFY=y | ||
| 1364 | CONFIG_DNOTIFY=y | ||
| 1365 | CONFIG_INOTIFY=y | ||
| 1366 | CONFIG_INOTIFY_USER=y | ||
| 1367 | CONFIG_QUOTA=y | ||
| 1368 | # CONFIG_QUOTA_NETLINK_INTERFACE is not set | ||
| 1369 | CONFIG_PRINT_QUOTA_WARNING=y | ||
| 1370 | CONFIG_QUOTA_TREE=y | ||
| 1371 | # CONFIG_QFMT_V1 is not set | ||
| 1372 | CONFIG_QFMT_V2=y | ||
| 1373 | CONFIG_QUOTACTL=y | ||
| 1374 | # CONFIG_AUTOFS_FS is not set | ||
| 1375 | # CONFIG_AUTOFS4_FS is not set | ||
| 1376 | # CONFIG_FUSE_FS is not set | ||
| 1377 | |||
| 1378 | # | ||
| 1379 | # Caches | ||
| 1380 | # | ||
| 1381 | # CONFIG_FSCACHE is not set | ||
| 1382 | |||
| 1383 | # | ||
| 1384 | # CD-ROM/DVD Filesystems | ||
| 1385 | # | ||
| 1386 | # CONFIG_ISO9660_FS is not set | ||
| 1387 | # CONFIG_UDF_FS is not set | ||
| 1388 | |||
| 1389 | # | ||
| 1390 | # DOS/FAT/NT Filesystems | ||
| 1391 | # | ||
| 1392 | CONFIG_FAT_FS=y | ||
| 1393 | CONFIG_MSDOS_FS=y | ||
| 1394 | CONFIG_VFAT_FS=y | ||
| 1395 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
| 1396 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
| 1397 | CONFIG_NTFS_FS=m | ||
| 1398 | # CONFIG_NTFS_DEBUG is not set | ||
| 1399 | # CONFIG_NTFS_RW is not set | ||
| 1400 | |||
| 1401 | # | ||
| 1402 | # Pseudo filesystems | ||
| 1403 | # | ||
| 1404 | CONFIG_PROC_FS=y | ||
| 1405 | CONFIG_PROC_SYSCTL=y | ||
| 1406 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 1407 | CONFIG_SYSFS=y | ||
| 1408 | CONFIG_TMPFS=y | ||
| 1409 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
| 1410 | # CONFIG_HUGETLB_PAGE is not set | ||
| 1411 | # CONFIG_CONFIGFS_FS is not set | ||
| 1412 | CONFIG_MISC_FILESYSTEMS=y | ||
| 1413 | # CONFIG_ADFS_FS is not set | ||
| 1414 | # CONFIG_AFFS_FS is not set | ||
| 1415 | # CONFIG_HFS_FS is not set | ||
| 1416 | # CONFIG_HFSPLUS_FS is not set | ||
| 1417 | # CONFIG_BEFS_FS is not set | ||
| 1418 | # CONFIG_BFS_FS is not set | ||
| 1419 | # CONFIG_EFS_FS is not set | ||
| 1420 | CONFIG_JFFS2_FS=y | ||
| 1421 | CONFIG_JFFS2_FS_DEBUG=0 | ||
| 1422 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
| 1423 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
| 1424 | CONFIG_JFFS2_SUMMARY=y | ||
| 1425 | # CONFIG_JFFS2_FS_XATTR is not set | ||
| 1426 | CONFIG_JFFS2_COMPRESSION_OPTIONS=y | ||
| 1427 | CONFIG_JFFS2_ZLIB=y | ||
| 1428 | # CONFIG_JFFS2_LZO is not set | ||
| 1429 | CONFIG_JFFS2_RTIME=y | ||
| 1430 | # CONFIG_JFFS2_RUBIN is not set | ||
| 1431 | # CONFIG_JFFS2_CMODE_NONE is not set | ||
| 1432 | CONFIG_JFFS2_CMODE_PRIORITY=y | ||
| 1433 | # CONFIG_JFFS2_CMODE_SIZE is not set | ||
| 1434 | # CONFIG_JFFS2_CMODE_FAVOURLZO is not set | ||
| 1435 | # CONFIG_CRAMFS is not set | ||
| 1436 | # CONFIG_SQUASHFS is not set | ||
| 1437 | # CONFIG_VXFS_FS is not set | ||
| 1438 | # CONFIG_MINIX_FS is not set | ||
| 1439 | # CONFIG_OMFS_FS is not set | ||
| 1440 | # CONFIG_HPFS_FS is not set | ||
| 1441 | # CONFIG_QNX4FS_FS is not set | ||
| 1442 | # CONFIG_ROMFS_FS is not set | ||
| 1443 | # CONFIG_SYSV_FS is not set | ||
| 1444 | # CONFIG_UFS_FS is not set | ||
| 1445 | CONFIG_NETWORK_FILESYSTEMS=y | ||
| 1446 | CONFIG_NFS_FS=y | ||
| 1447 | CONFIG_NFS_V3=y | ||
| 1448 | # CONFIG_NFS_V3_ACL is not set | ||
| 1449 | CONFIG_NFS_V4=y | ||
| 1450 | # CONFIG_NFS_V4_1 is not set | ||
| 1451 | CONFIG_ROOT_NFS=y | ||
| 1452 | # CONFIG_NFSD is not set | ||
| 1453 | CONFIG_LOCKD=y | ||
| 1454 | CONFIG_LOCKD_V4=y | ||
| 1455 | CONFIG_NFS_COMMON=y | ||
| 1456 | CONFIG_SUNRPC=y | ||
| 1457 | CONFIG_SUNRPC_GSS=y | ||
| 1458 | CONFIG_RPCSEC_GSS_KRB5=y | ||
| 1459 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
| 1460 | # CONFIG_SMB_FS is not set | ||
| 1461 | # CONFIG_CIFS is not set | ||
| 1462 | # CONFIG_NCP_FS is not set | ||
| 1463 | # CONFIG_CODA_FS is not set | ||
| 1464 | # CONFIG_AFS_FS is not set | ||
| 1465 | |||
| 1466 | # | ||
| 1467 | # Partition Types | ||
| 1468 | # | ||
| 1469 | CONFIG_PARTITION_ADVANCED=y | ||
| 1470 | # CONFIG_ACORN_PARTITION is not set | ||
| 1471 | # CONFIG_OSF_PARTITION is not set | ||
| 1472 | # CONFIG_AMIGA_PARTITION is not set | ||
| 1473 | # CONFIG_ATARI_PARTITION is not set | ||
| 1474 | # CONFIG_MAC_PARTITION is not set | ||
| 1475 | CONFIG_MSDOS_PARTITION=y | ||
| 1476 | # CONFIG_BSD_DISKLABEL is not set | ||
| 1477 | # CONFIG_MINIX_SUBPARTITION is not set | ||
| 1478 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
| 1479 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
| 1480 | # CONFIG_LDM_PARTITION is not set | ||
| 1481 | # CONFIG_SGI_PARTITION is not set | ||
| 1482 | # CONFIG_ULTRIX_PARTITION is not set | ||
| 1483 | # CONFIG_SUN_PARTITION is not set | ||
| 1484 | # CONFIG_KARMA_PARTITION is not set | ||
| 1485 | # CONFIG_EFI_PARTITION is not set | ||
| 1486 | # CONFIG_SYSV68_PARTITION is not set | ||
| 1487 | CONFIG_NLS=y | ||
| 1488 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
| 1489 | CONFIG_NLS_CODEPAGE_437=y | ||
| 1490 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
| 1491 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
| 1492 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
| 1493 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
| 1494 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
| 1495 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
| 1496 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
| 1497 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
| 1498 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
| 1499 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
| 1500 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
| 1501 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
| 1502 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
| 1503 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
| 1504 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
| 1505 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
| 1506 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
| 1507 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
| 1508 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
| 1509 | # CONFIG_NLS_ISO8859_8 is not set | ||
| 1510 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
| 1511 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
| 1512 | # CONFIG_NLS_ASCII is not set | ||
| 1513 | CONFIG_NLS_ISO8859_1=y | ||
| 1514 | # CONFIG_NLS_ISO8859_2 is not set | ||
| 1515 | # CONFIG_NLS_ISO8859_3 is not set | ||
| 1516 | # CONFIG_NLS_ISO8859_4 is not set | ||
| 1517 | # CONFIG_NLS_ISO8859_5 is not set | ||
| 1518 | # CONFIG_NLS_ISO8859_6 is not set | ||
| 1519 | # CONFIG_NLS_ISO8859_7 is not set | ||
| 1520 | # CONFIG_NLS_ISO8859_9 is not set | ||
| 1521 | # CONFIG_NLS_ISO8859_13 is not set | ||
| 1522 | # CONFIG_NLS_ISO8859_14 is not set | ||
| 1523 | # CONFIG_NLS_ISO8859_15 is not set | ||
| 1524 | # CONFIG_NLS_KOI8_R is not set | ||
| 1525 | # CONFIG_NLS_KOI8_U is not set | ||
| 1526 | CONFIG_NLS_UTF8=m | ||
| 1527 | # CONFIG_DLM is not set | ||
| 1528 | |||
| 1529 | # | ||
| 1530 | # Kernel hacking | ||
| 1531 | # | ||
| 1532 | # CONFIG_PRINTK_TIME is not set | ||
| 1533 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 1534 | CONFIG_ENABLE_MUST_CHECK=y | ||
| 1535 | CONFIG_FRAME_WARN=1024 | ||
| 1536 | CONFIG_MAGIC_SYSRQ=y | ||
| 1537 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 1538 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 1539 | CONFIG_DEBUG_FS=y | ||
| 1540 | # CONFIG_HEADERS_CHECK is not set | ||
| 1541 | CONFIG_DEBUG_KERNEL=y | ||
| 1542 | # CONFIG_DEBUG_SHIRQ is not set | ||
| 1543 | CONFIG_DETECT_SOFTLOCKUP=y | ||
| 1544 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | ||
| 1545 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | ||
| 1546 | CONFIG_DETECT_HUNG_TASK=y | ||
| 1547 | # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set | ||
| 1548 | CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 | ||
| 1549 | # CONFIG_SCHED_DEBUG is not set | ||
| 1550 | # CONFIG_SCHEDSTATS is not set | ||
| 1551 | # CONFIG_TIMER_STATS is not set | ||
| 1552 | # CONFIG_DEBUG_OBJECTS is not set | ||
| 1553 | # CONFIG_DEBUG_SLAB is not set | ||
| 1554 | # CONFIG_DEBUG_KMEMLEAK is not set | ||
| 1555 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
| 1556 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 1557 | # CONFIG_DEBUG_SPINLOCK is not set | ||
| 1558 | CONFIG_DEBUG_MUTEXES=y | ||
| 1559 | # CONFIG_DEBUG_LOCK_ALLOC is not set | ||
| 1560 | # CONFIG_PROVE_LOCKING is not set | ||
| 1561 | # CONFIG_LOCK_STAT is not set | ||
| 1562 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
| 1563 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
| 1564 | # CONFIG_DEBUG_KOBJECT is not set | ||
| 1565 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
| 1566 | CONFIG_DEBUG_INFO=y | ||
| 1567 | # CONFIG_DEBUG_VM is not set | ||
| 1568 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
| 1569 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
| 1570 | # CONFIG_DEBUG_LIST is not set | ||
| 1571 | # CONFIG_DEBUG_SG is not set | ||
| 1572 | # CONFIG_DEBUG_NOTIFIERS is not set | ||
| 1573 | # CONFIG_DEBUG_CREDENTIALS is not set | ||
| 1574 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
| 1575 | # CONFIG_RCU_TORTURE_TEST is not set | ||
| 1576 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 1577 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
| 1578 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
| 1579 | # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set | ||
| 1580 | # CONFIG_FAULT_INJECTION is not set | ||
| 1581 | # CONFIG_LATENCYTOP is not set | ||
| 1582 | # CONFIG_PAGE_POISONING is not set | ||
| 1583 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 1584 | CONFIG_TRACING_SUPPORT=y | ||
| 1585 | CONFIG_FTRACE=y | ||
| 1586 | # CONFIG_FUNCTION_TRACER is not set | ||
| 1587 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 1588 | # CONFIG_SCHED_TRACER is not set | ||
| 1589 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set | ||
| 1590 | # CONFIG_BOOT_TRACER is not set | ||
| 1591 | CONFIG_BRANCH_PROFILE_NONE=y | ||
| 1592 | # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set | ||
| 1593 | # CONFIG_PROFILE_ALL_BRANCHES is not set | ||
| 1594 | # CONFIG_STACK_TRACER is not set | ||
| 1595 | # CONFIG_KMEMTRACE is not set | ||
| 1596 | # CONFIG_WORKQUEUE_TRACER is not set | ||
| 1597 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 1598 | # CONFIG_DYNAMIC_DEBUG is not set | ||
| 1599 | # CONFIG_SAMPLES is not set | ||
| 1600 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 1601 | # CONFIG_KGDB is not set | ||
| 1602 | CONFIG_ARM_UNWIND=y | ||
| 1603 | # CONFIG_DEBUG_USER is not set | ||
| 1604 | # CONFIG_DEBUG_ERRORS is not set | ||
| 1605 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
| 1606 | CONFIG_DEBUG_LL=y | ||
| 1607 | # CONFIG_DEBUG_ICEDCC is not set | ||
| 1608 | |||
| 1609 | # | ||
| 1610 | # Security options | ||
| 1611 | # | ||
| 1612 | # CONFIG_KEYS is not set | ||
| 1613 | # CONFIG_SECURITY is not set | ||
| 1614 | # CONFIG_SECURITYFS is not set | ||
| 1615 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
| 1616 | CONFIG_CRYPTO=y | ||
| 1617 | |||
| 1618 | # | ||
| 1619 | # Crypto core or helper | ||
| 1620 | # | ||
| 1621 | CONFIG_CRYPTO_ALGAPI=y | ||
| 1622 | CONFIG_CRYPTO_ALGAPI2=y | ||
| 1623 | CONFIG_CRYPTO_AEAD2=y | ||
| 1624 | CONFIG_CRYPTO_BLKCIPHER=y | ||
| 1625 | CONFIG_CRYPTO_BLKCIPHER2=y | ||
| 1626 | CONFIG_CRYPTO_HASH=y | ||
| 1627 | CONFIG_CRYPTO_HASH2=y | ||
| 1628 | CONFIG_CRYPTO_RNG2=y | ||
| 1629 | CONFIG_CRYPTO_PCOMP=y | ||
| 1630 | CONFIG_CRYPTO_MANAGER=y | ||
| 1631 | CONFIG_CRYPTO_MANAGER2=y | ||
| 1632 | # CONFIG_CRYPTO_GF128MUL is not set | ||
| 1633 | # CONFIG_CRYPTO_NULL is not set | ||
| 1634 | CONFIG_CRYPTO_WORKQUEUE=y | ||
| 1635 | # CONFIG_CRYPTO_CRYPTD is not set | ||
| 1636 | # CONFIG_CRYPTO_AUTHENC is not set | ||
| 1637 | # CONFIG_CRYPTO_TEST is not set | ||
| 1638 | |||
| 1639 | # | ||
| 1640 | # Authenticated Encryption with Associated Data | ||
| 1641 | # | ||
| 1642 | # CONFIG_CRYPTO_CCM is not set | ||
| 1643 | # CONFIG_CRYPTO_GCM is not set | ||
| 1644 | # CONFIG_CRYPTO_SEQIV is not set | ||
| 1645 | |||
| 1646 | # | ||
| 1647 | # Block modes | ||
| 1648 | # | ||
| 1649 | CONFIG_CRYPTO_CBC=y | ||
| 1650 | # CONFIG_CRYPTO_CTR is not set | ||
| 1651 | # CONFIG_CRYPTO_CTS is not set | ||
| 1652 | CONFIG_CRYPTO_ECB=m | ||
| 1653 | # CONFIG_CRYPTO_LRW is not set | ||
| 1654 | CONFIG_CRYPTO_PCBC=m | ||
| 1655 | # CONFIG_CRYPTO_XTS is not set | ||
| 1656 | |||
| 1657 | # | ||
| 1658 | # Hash modes | ||
| 1659 | # | ||
| 1660 | # CONFIG_CRYPTO_HMAC is not set | ||
| 1661 | # CONFIG_CRYPTO_XCBC is not set | ||
| 1662 | # CONFIG_CRYPTO_VMAC is not set | ||
| 1663 | |||
| 1664 | # | ||
| 1665 | # Digest | ||
| 1666 | # | ||
| 1667 | CONFIG_CRYPTO_CRC32C=y | ||
| 1668 | # CONFIG_CRYPTO_GHASH is not set | ||
| 1669 | # CONFIG_CRYPTO_MD4 is not set | ||
| 1670 | CONFIG_CRYPTO_MD5=y | ||
| 1671 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
| 1672 | # CONFIG_CRYPTO_RMD128 is not set | ||
| 1673 | # CONFIG_CRYPTO_RMD160 is not set | ||
| 1674 | # CONFIG_CRYPTO_RMD256 is not set | ||
| 1675 | # CONFIG_CRYPTO_RMD320 is not set | ||
| 1676 | # CONFIG_CRYPTO_SHA1 is not set | ||
| 1677 | # CONFIG_CRYPTO_SHA256 is not set | ||
| 1678 | # CONFIG_CRYPTO_SHA512 is not set | ||
| 1679 | # CONFIG_CRYPTO_TGR192 is not set | ||
| 1680 | # CONFIG_CRYPTO_WP512 is not set | ||
| 1681 | |||
| 1682 | # | ||
| 1683 | # Ciphers | ||
| 1684 | # | ||
| 1685 | # CONFIG_CRYPTO_AES is not set | ||
| 1686 | # CONFIG_CRYPTO_ANUBIS is not set | ||
| 1687 | # CONFIG_CRYPTO_ARC4 is not set | ||
| 1688 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
| 1689 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
| 1690 | # CONFIG_CRYPTO_CAST5 is not set | ||
| 1691 | # CONFIG_CRYPTO_CAST6 is not set | ||
| 1692 | CONFIG_CRYPTO_DES=y | ||
| 1693 | # CONFIG_CRYPTO_FCRYPT is not set | ||
| 1694 | # CONFIG_CRYPTO_KHAZAD is not set | ||
| 1695 | # CONFIG_CRYPTO_SALSA20 is not set | ||
| 1696 | # CONFIG_CRYPTO_SEED is not set | ||
| 1697 | # CONFIG_CRYPTO_SERPENT is not set | ||
| 1698 | # CONFIG_CRYPTO_TEA is not set | ||
| 1699 | # CONFIG_CRYPTO_TWOFISH is not set | ||
| 1700 | |||
| 1701 | # | ||
| 1702 | # Compression | ||
| 1703 | # | ||
| 1704 | # CONFIG_CRYPTO_DEFLATE is not set | ||
| 1705 | # CONFIG_CRYPTO_ZLIB is not set | ||
| 1706 | # CONFIG_CRYPTO_LZO is not set | ||
| 1707 | |||
| 1708 | # | ||
| 1709 | # Random Number Generation | ||
| 1710 | # | ||
| 1711 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
| 1712 | CONFIG_CRYPTO_HW=y | ||
| 1713 | # CONFIG_BINARY_PRINTF is not set | ||
| 1714 | |||
| 1715 | # | ||
| 1716 | # Library routines | ||
| 1717 | # | ||
| 1718 | CONFIG_BITREVERSE=y | ||
| 1719 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
| 1720 | CONFIG_CRC_CCITT=y | ||
| 1721 | # CONFIG_CRC16 is not set | ||
| 1722 | # CONFIG_CRC_T10DIF is not set | ||
| 1723 | # CONFIG_CRC_ITU_T is not set | ||
| 1724 | CONFIG_CRC32=y | ||
| 1725 | # CONFIG_CRC7 is not set | ||
| 1726 | CONFIG_LIBCRC32C=y | ||
| 1727 | CONFIG_ZLIB_INFLATE=y | ||
| 1728 | CONFIG_ZLIB_DEFLATE=y | ||
| 1729 | CONFIG_DECOMPRESS_GZIP=y | ||
| 1730 | CONFIG_HAS_IOMEM=y | ||
| 1731 | CONFIG_HAS_IOPORT=y | ||
| 1732 | CONFIG_HAS_DMA=y | ||
| 1733 | CONFIG_NLATTR=y | ||
diff --git a/arch/arm/configs/cm_x300_defconfig b/arch/arm/configs/cm_x300_defconfig index d18d21bb41e..a0170867130 100644 --- a/arch/arm/configs/cm_x300_defconfig +++ b/arch/arm/configs/cm_x300_defconfig | |||
| @@ -1,15 +1,13 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.30-rc8 | 3 | # Linux kernel version: 2.6.32-rc4 |
| 4 | # Thu Jun 4 09:53:21 2009 | 4 | # Tue Oct 13 19:03:13 2009 |
| 5 | # | 5 | # |
| 6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
| 8 | CONFIG_GENERIC_GPIO=y | 8 | CONFIG_GENERIC_GPIO=y |
| 9 | CONFIG_GENERIC_TIME=y | 9 | CONFIG_GENERIC_TIME=y |
| 10 | CONFIG_GENERIC_CLOCKEVENTS=y | 10 | CONFIG_GENERIC_CLOCKEVENTS=y |
| 11 | CONFIG_MMU=y | ||
| 12 | # CONFIG_NO_IOPORT is not set | ||
| 13 | CONFIG_GENERIC_HARDIRQS=y | 11 | CONFIG_GENERIC_HARDIRQS=y |
| 14 | CONFIG_STACKTRACE_SUPPORT=y | 12 | CONFIG_STACKTRACE_SUPPORT=y |
| 15 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | 13 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y |
| @@ -18,14 +16,14 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y | |||
| 18 | CONFIG_HARDIRQS_SW_RESEND=y | 16 | CONFIG_HARDIRQS_SW_RESEND=y |
| 19 | CONFIG_GENERIC_IRQ_PROBE=y | 17 | CONFIG_GENERIC_IRQ_PROBE=y |
| 20 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | 18 | CONFIG_RWSEM_GENERIC_SPINLOCK=y |
| 21 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | 19 | CONFIG_ARCH_HAS_CPUFREQ=y |
| 22 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
| 23 | CONFIG_GENERIC_HWEIGHT=y | 20 | CONFIG_GENERIC_HWEIGHT=y |
| 24 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 21 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
| 25 | CONFIG_ARCH_MTD_XIP=y | 22 | CONFIG_ARCH_MTD_XIP=y |
| 26 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | 23 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y |
| 27 | CONFIG_VECTORS_BASE=0xffff0000 | 24 | CONFIG_VECTORS_BASE=0xffff0000 |
| 28 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 25 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
| 26 | CONFIG_CONSTRUCTORS=y | ||
| 29 | 27 | ||
| 30 | # | 28 | # |
| 31 | # General setup | 29 | # General setup |
| @@ -46,11 +44,12 @@ CONFIG_SYSVIPC_SYSCTL=y | |||
| 46 | # | 44 | # |
| 47 | # RCU Subsystem | 45 | # RCU Subsystem |
| 48 | # | 46 | # |
| 49 | CONFIG_CLASSIC_RCU=y | 47 | CONFIG_TREE_RCU=y |
| 50 | # CONFIG_TREE_RCU is not set | 48 | # CONFIG_TREE_PREEMPT_RCU is not set |
| 51 | # CONFIG_PREEMPT_RCU is not set | 49 | # CONFIG_RCU_TRACE is not set |
| 50 | CONFIG_RCU_FANOUT=32 | ||
| 51 | # CONFIG_RCU_FANOUT_EXACT is not set | ||
| 52 | # CONFIG_TREE_RCU_TRACE is not set | 52 | # CONFIG_TREE_RCU_TRACE is not set |
| 53 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
| 54 | CONFIG_IKCONFIG=y | 53 | CONFIG_IKCONFIG=y |
| 55 | CONFIG_IKCONFIG_PROC=y | 54 | CONFIG_IKCONFIG_PROC=y |
| 56 | CONFIG_LOG_BUF_SHIFT=18 | 55 | CONFIG_LOG_BUF_SHIFT=18 |
| @@ -83,7 +82,6 @@ CONFIG_SYSCTL_SYSCALL=y | |||
| 83 | CONFIG_KALLSYMS=y | 82 | CONFIG_KALLSYMS=y |
| 84 | # CONFIG_KALLSYMS_ALL is not set | 83 | # CONFIG_KALLSYMS_ALL is not set |
| 85 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 84 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
| 86 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 87 | CONFIG_HOTPLUG=y | 85 | CONFIG_HOTPLUG=y |
| 88 | CONFIG_PRINTK=y | 86 | CONFIG_PRINTK=y |
| 89 | CONFIG_BUG=y | 87 | CONFIG_BUG=y |
| @@ -96,6 +94,10 @@ CONFIG_TIMERFD=y | |||
| 96 | CONFIG_EVENTFD=y | 94 | CONFIG_EVENTFD=y |
| 97 | CONFIG_SHMEM=y | 95 | CONFIG_SHMEM=y |
| 98 | CONFIG_AIO=y | 96 | CONFIG_AIO=y |
| 97 | |||
| 98 | # | ||
| 99 | # Kernel Performance Events And Counters | ||
| 100 | # | ||
| 99 | CONFIG_VM_EVENT_COUNTERS=y | 101 | CONFIG_VM_EVENT_COUNTERS=y |
| 100 | CONFIG_SLUB_DEBUG=y | 102 | CONFIG_SLUB_DEBUG=y |
| 101 | CONFIG_COMPAT_BRK=y | 103 | CONFIG_COMPAT_BRK=y |
| @@ -103,13 +105,17 @@ CONFIG_COMPAT_BRK=y | |||
| 103 | CONFIG_SLUB=y | 105 | CONFIG_SLUB=y |
| 104 | # CONFIG_SLOB is not set | 106 | # CONFIG_SLOB is not set |
| 105 | # CONFIG_PROFILING is not set | 107 | # CONFIG_PROFILING is not set |
| 106 | # CONFIG_MARKERS is not set | ||
| 107 | CONFIG_HAVE_OPROFILE=y | 108 | CONFIG_HAVE_OPROFILE=y |
| 108 | # CONFIG_KPROBES is not set | 109 | # CONFIG_KPROBES is not set |
| 109 | CONFIG_HAVE_KPROBES=y | 110 | CONFIG_HAVE_KPROBES=y |
| 110 | CONFIG_HAVE_KRETPROBES=y | 111 | CONFIG_HAVE_KRETPROBES=y |
| 111 | CONFIG_HAVE_CLK=y | 112 | CONFIG_HAVE_CLK=y |
| 112 | # CONFIG_SLOW_WORK is not set | 113 | |
| 114 | # | ||
| 115 | # GCOV-based kernel profiling | ||
| 116 | # | ||
| 117 | # CONFIG_GCOV_KERNEL is not set | ||
| 118 | CONFIG_SLOW_WORK=y | ||
| 113 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | 119 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y |
| 114 | CONFIG_SLABINFO=y | 120 | CONFIG_SLABINFO=y |
| 115 | CONFIG_RT_MUTEXES=y | 121 | CONFIG_RT_MUTEXES=y |
| @@ -117,11 +123,11 @@ CONFIG_BASE_SMALL=0 | |||
| 117 | CONFIG_MODULES=y | 123 | CONFIG_MODULES=y |
| 118 | # CONFIG_MODULE_FORCE_LOAD is not set | 124 | # CONFIG_MODULE_FORCE_LOAD is not set |
| 119 | CONFIG_MODULE_UNLOAD=y | 125 | CONFIG_MODULE_UNLOAD=y |
| 120 | # CONFIG_MODULE_FORCE_UNLOAD is not set | 126 | CONFIG_MODULE_FORCE_UNLOAD=y |
| 121 | # CONFIG_MODVERSIONS is not set | 127 | # CONFIG_MODVERSIONS is not set |
| 122 | # CONFIG_MODULE_SRCVERSION_ALL is not set | 128 | # CONFIG_MODULE_SRCVERSION_ALL is not set |
| 123 | CONFIG_BLOCK=y | 129 | CONFIG_BLOCK=y |
| 124 | # CONFIG_LBD is not set | 130 | CONFIG_LBDAF=y |
| 125 | # CONFIG_BLK_DEV_BSG is not set | 131 | # CONFIG_BLK_DEV_BSG is not set |
| 126 | # CONFIG_BLK_DEV_INTEGRITY is not set | 132 | # CONFIG_BLK_DEV_INTEGRITY is not set |
| 127 | 133 | ||
| @@ -142,19 +148,22 @@ CONFIG_FREEZER=y | |||
| 142 | # | 148 | # |
| 143 | # System Type | 149 | # System Type |
| 144 | # | 150 | # |
| 151 | CONFIG_MMU=y | ||
| 145 | # CONFIG_ARCH_AAEC2000 is not set | 152 | # CONFIG_ARCH_AAEC2000 is not set |
| 146 | # CONFIG_ARCH_INTEGRATOR is not set | 153 | # CONFIG_ARCH_INTEGRATOR is not set |
| 147 | # CONFIG_ARCH_REALVIEW is not set | 154 | # CONFIG_ARCH_REALVIEW is not set |
| 148 | # CONFIG_ARCH_VERSATILE is not set | 155 | # CONFIG_ARCH_VERSATILE is not set |
| 149 | # CONFIG_ARCH_AT91 is not set | 156 | # CONFIG_ARCH_AT91 is not set |
| 150 | # CONFIG_ARCH_CLPS711X is not set | 157 | # CONFIG_ARCH_CLPS711X is not set |
| 158 | # CONFIG_ARCH_GEMINI is not set | ||
| 151 | # CONFIG_ARCH_EBSA110 is not set | 159 | # CONFIG_ARCH_EBSA110 is not set |
| 152 | # CONFIG_ARCH_EP93XX is not set | 160 | # CONFIG_ARCH_EP93XX is not set |
| 153 | # CONFIG_ARCH_GEMINI is not set | ||
| 154 | # CONFIG_ARCH_FOOTBRIDGE is not set | 161 | # CONFIG_ARCH_FOOTBRIDGE is not set |
| 162 | # CONFIG_ARCH_MXC is not set | ||
| 163 | # CONFIG_ARCH_STMP3XXX is not set | ||
| 155 | # CONFIG_ARCH_NETX is not set | 164 | # CONFIG_ARCH_NETX is not set |
| 156 | # CONFIG_ARCH_H720X is not set | 165 | # CONFIG_ARCH_H720X is not set |
| 157 | # CONFIG_ARCH_IMX is not set | 166 | # CONFIG_ARCH_NOMADIK is not set |
| 158 | # CONFIG_ARCH_IOP13XX is not set | 167 | # CONFIG_ARCH_IOP13XX is not set |
| 159 | # CONFIG_ARCH_IOP32X is not set | 168 | # CONFIG_ARCH_IOP32X is not set |
| 160 | # CONFIG_ARCH_IOP33X is not set | 169 | # CONFIG_ARCH_IOP33X is not set |
| @@ -163,25 +172,27 @@ CONFIG_FREEZER=y | |||
| 163 | # CONFIG_ARCH_IXP4XX is not set | 172 | # CONFIG_ARCH_IXP4XX is not set |
| 164 | # CONFIG_ARCH_L7200 is not set | 173 | # CONFIG_ARCH_L7200 is not set |
| 165 | # CONFIG_ARCH_KIRKWOOD is not set | 174 | # CONFIG_ARCH_KIRKWOOD is not set |
| 166 | # CONFIG_ARCH_KS8695 is not set | ||
| 167 | # CONFIG_ARCH_NS9XXX is not set | ||
| 168 | # CONFIG_ARCH_LOKI is not set | 175 | # CONFIG_ARCH_LOKI is not set |
| 169 | # CONFIG_ARCH_MV78XX0 is not set | 176 | # CONFIG_ARCH_MV78XX0 is not set |
| 170 | # CONFIG_ARCH_MXC is not set | ||
| 171 | # CONFIG_ARCH_ORION5X is not set | 177 | # CONFIG_ARCH_ORION5X is not set |
| 178 | # CONFIG_ARCH_MMP is not set | ||
| 179 | # CONFIG_ARCH_KS8695 is not set | ||
| 180 | # CONFIG_ARCH_NS9XXX is not set | ||
| 181 | # CONFIG_ARCH_W90X900 is not set | ||
| 172 | # CONFIG_ARCH_PNX4008 is not set | 182 | # CONFIG_ARCH_PNX4008 is not set |
| 173 | CONFIG_ARCH_PXA=y | 183 | CONFIG_ARCH_PXA=y |
| 174 | # CONFIG_ARCH_MMP is not set | 184 | # CONFIG_ARCH_MSM is not set |
| 175 | # CONFIG_ARCH_RPC is not set | 185 | # CONFIG_ARCH_RPC is not set |
| 176 | # CONFIG_ARCH_SA1100 is not set | 186 | # CONFIG_ARCH_SA1100 is not set |
| 177 | # CONFIG_ARCH_S3C2410 is not set | 187 | # CONFIG_ARCH_S3C2410 is not set |
| 178 | # CONFIG_ARCH_S3C64XX is not set | 188 | # CONFIG_ARCH_S3C64XX is not set |
| 189 | # CONFIG_ARCH_S5PC1XX is not set | ||
| 179 | # CONFIG_ARCH_SHARK is not set | 190 | # CONFIG_ARCH_SHARK is not set |
| 180 | # CONFIG_ARCH_LH7A40X is not set | 191 | # CONFIG_ARCH_LH7A40X is not set |
| 192 | # CONFIG_ARCH_U300 is not set | ||
| 181 | # CONFIG_ARCH_DAVINCI is not set | 193 | # CONFIG_ARCH_DAVINCI is not set |
| 182 | # CONFIG_ARCH_OMAP is not set | 194 | # CONFIG_ARCH_OMAP is not set |
| 183 | # CONFIG_ARCH_MSM is not set | 195 | # CONFIG_ARCH_BCMRING is not set |
| 184 | # CONFIG_ARCH_W90X900 is not set | ||
| 185 | 196 | ||
| 186 | # | 197 | # |
| 187 | # Intel PXA2xx/PXA3xx Implementations | 198 | # Intel PXA2xx/PXA3xx Implementations |
| @@ -191,16 +202,19 @@ CONFIG_ARCH_PXA=y | |||
| 191 | # Supported PXA3xx Processor Variants | 202 | # Supported PXA3xx Processor Variants |
| 192 | # | 203 | # |
| 193 | CONFIG_CPU_PXA300=y | 204 | CONFIG_CPU_PXA300=y |
| 194 | # CONFIG_CPU_PXA310 is not set | 205 | CONFIG_CPU_PXA310=y |
| 195 | # CONFIG_CPU_PXA320 is not set | 206 | # CONFIG_CPU_PXA320 is not set |
| 196 | # CONFIG_CPU_PXA930 is not set | 207 | # CONFIG_CPU_PXA930 is not set |
| 197 | # CONFIG_CPU_PXA935 is not set | 208 | # CONFIG_CPU_PXA935 is not set |
| 209 | # CONFIG_CPU_PXA950 is not set | ||
| 198 | # CONFIG_ARCH_GUMSTIX is not set | 210 | # CONFIG_ARCH_GUMSTIX is not set |
| 199 | # CONFIG_MACH_INTELMOTE2 is not set | 211 | # CONFIG_MACH_INTELMOTE2 is not set |
| 212 | # CONFIG_MACH_STARGATE2 is not set | ||
| 200 | # CONFIG_ARCH_LUBBOCK is not set | 213 | # CONFIG_ARCH_LUBBOCK is not set |
| 201 | # CONFIG_MACH_LOGICPD_PXA270 is not set | 214 | # CONFIG_MACH_LOGICPD_PXA270 is not set |
| 202 | # CONFIG_MACH_MAINSTONE is not set | 215 | # CONFIG_MACH_MAINSTONE is not set |
| 203 | # CONFIG_MACH_MP900C is not set | 216 | # CONFIG_MACH_MP900C is not set |
| 217 | # CONFIG_MACH_BALLOON3 is not set | ||
| 204 | # CONFIG_ARCH_PXA_IDP is not set | 218 | # CONFIG_ARCH_PXA_IDP is not set |
| 205 | # CONFIG_PXA_SHARPSL is not set | 219 | # CONFIG_PXA_SHARPSL is not set |
| 206 | # CONFIG_ARCH_VIPER is not set | 220 | # CONFIG_ARCH_VIPER is not set |
| @@ -218,6 +232,7 @@ CONFIG_CPU_PXA300=y | |||
| 218 | # CONFIG_MACH_SAAR is not set | 232 | # CONFIG_MACH_SAAR is not set |
| 219 | # CONFIG_MACH_ARMCORE is not set | 233 | # CONFIG_MACH_ARMCORE is not set |
| 220 | CONFIG_MACH_CM_X300=y | 234 | CONFIG_MACH_CM_X300=y |
| 235 | # CONFIG_MACH_H4700 is not set | ||
| 221 | # CONFIG_MACH_MAGICIAN is not set | 236 | # CONFIG_MACH_MAGICIAN is not set |
| 222 | # CONFIG_MACH_HIMALAYA is not set | 237 | # CONFIG_MACH_HIMALAYA is not set |
| 223 | # CONFIG_MACH_MIOA701 is not set | 238 | # CONFIG_MACH_MIOA701 is not set |
| @@ -225,8 +240,8 @@ CONFIG_MACH_CM_X300=y | |||
| 225 | # CONFIG_ARCH_PXA_PALM is not set | 240 | # CONFIG_ARCH_PXA_PALM is not set |
| 226 | # CONFIG_MACH_CSB726 is not set | 241 | # CONFIG_MACH_CSB726 is not set |
| 227 | # CONFIG_PXA_EZX is not set | 242 | # CONFIG_PXA_EZX is not set |
| 243 | # CONFIG_MACH_XCEP is not set | ||
| 228 | CONFIG_PXA3xx=y | 244 | CONFIG_PXA3xx=y |
| 229 | # CONFIG_PXA_PWM is not set | ||
| 230 | CONFIG_PLAT_PXA=y | 245 | CONFIG_PLAT_PXA=y |
| 231 | 246 | ||
| 232 | # | 247 | # |
| @@ -236,7 +251,7 @@ CONFIG_CPU_32=y | |||
| 236 | CONFIG_CPU_XSC3=y | 251 | CONFIG_CPU_XSC3=y |
| 237 | CONFIG_CPU_32v5=y | 252 | CONFIG_CPU_32v5=y |
| 238 | CONFIG_CPU_ABRT_EV5T=y | 253 | CONFIG_CPU_ABRT_EV5T=y |
| 239 | CONFIG_CPU_PABRT_NOIFAR=y | 254 | CONFIG_CPU_PABRT_LEGACY=y |
| 240 | CONFIG_CPU_CACHE_VIVT=y | 255 | CONFIG_CPU_CACHE_VIVT=y |
| 241 | CONFIG_CPU_TLB_V4WBI=y | 256 | CONFIG_CPU_TLB_V4WBI=y |
| 242 | CONFIG_CPU_CP15=y | 257 | CONFIG_CPU_CP15=y |
| @@ -246,11 +261,12 @@ CONFIG_IO_36=y | |||
| 246 | # | 261 | # |
| 247 | # Processor Features | 262 | # Processor Features |
| 248 | # | 263 | # |
| 249 | # CONFIG_ARM_THUMB is not set | 264 | CONFIG_ARM_THUMB=y |
| 250 | # CONFIG_CPU_DCACHE_DISABLE is not set | 265 | # CONFIG_CPU_DCACHE_DISABLE is not set |
| 251 | # CONFIG_CPU_BPREDICT_DISABLE is not set | 266 | # CONFIG_CPU_BPREDICT_DISABLE is not set |
| 252 | CONFIG_OUTER_CACHE=y | 267 | CONFIG_OUTER_CACHE=y |
| 253 | CONFIG_CACHE_XSC3L2=y | 268 | CONFIG_CACHE_XSC3L2=y |
| 269 | CONFIG_ARM_L1_CACHE_SHIFT=5 | ||
| 254 | CONFIG_IWMMXT=y | 270 | CONFIG_IWMMXT=y |
| 255 | CONFIG_COMMON_CLKDEV=y | 271 | CONFIG_COMMON_CLKDEV=y |
| 256 | 272 | ||
| @@ -272,11 +288,12 @@ CONFIG_VMSPLIT_3G=y | |||
| 272 | # CONFIG_VMSPLIT_2G is not set | 288 | # CONFIG_VMSPLIT_2G is not set |
| 273 | # CONFIG_VMSPLIT_1G is not set | 289 | # CONFIG_VMSPLIT_1G is not set |
| 274 | CONFIG_PAGE_OFFSET=0xC0000000 | 290 | CONFIG_PAGE_OFFSET=0xC0000000 |
| 291 | CONFIG_PREEMPT_NONE=y | ||
| 292 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
| 275 | # CONFIG_PREEMPT is not set | 293 | # CONFIG_PREEMPT is not set |
| 276 | CONFIG_HZ=100 | 294 | CONFIG_HZ=100 |
| 277 | CONFIG_AEABI=y | 295 | CONFIG_AEABI=y |
| 278 | CONFIG_OABI_COMPAT=y | 296 | CONFIG_OABI_COMPAT=y |
| 279 | # CONFIG_ARCH_HAS_HOLES_MEMORYMODEL is not set | ||
| 280 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | 297 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set |
| 281 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | 298 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set |
| 282 | CONFIG_HIGHMEM=y | 299 | CONFIG_HIGHMEM=y |
| @@ -292,17 +309,19 @@ CONFIG_SPLIT_PTLOCK_CPUS=4096 | |||
| 292 | CONFIG_ZONE_DMA_FLAG=0 | 309 | CONFIG_ZONE_DMA_FLAG=0 |
| 293 | CONFIG_BOUNCE=y | 310 | CONFIG_BOUNCE=y |
| 294 | CONFIG_VIRT_TO_BUS=y | 311 | CONFIG_VIRT_TO_BUS=y |
| 295 | CONFIG_UNEVICTABLE_LRU=y | ||
| 296 | CONFIG_HAVE_MLOCK=y | 312 | CONFIG_HAVE_MLOCK=y |
| 297 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | 313 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y |
| 314 | # CONFIG_KSM is not set | ||
| 315 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
| 298 | CONFIG_ALIGNMENT_TRAP=y | 316 | CONFIG_ALIGNMENT_TRAP=y |
| 317 | # CONFIG_UACCESS_WITH_MEMCPY is not set | ||
| 299 | 318 | ||
| 300 | # | 319 | # |
| 301 | # Boot options | 320 | # Boot options |
| 302 | # | 321 | # |
| 303 | CONFIG_ZBOOT_ROM_TEXT=0x0 | 322 | CONFIG_ZBOOT_ROM_TEXT=0x0 |
| 304 | CONFIG_ZBOOT_ROM_BSS=0x0 | 323 | CONFIG_ZBOOT_ROM_BSS=0x0 |
| 305 | CONFIG_CMDLINE="root=/dev/mtdblock5 rootfstype=jffs2 console=ttyS2,38400" | 324 | CONFIG_CMDLINE="root=/dev/mtdblock5 rootfstype=ubifs console=ttyS2,38400" |
| 306 | # CONFIG_XIP_KERNEL is not set | 325 | # CONFIG_XIP_KERNEL is not set |
| 307 | # CONFIG_KEXEC is not set | 326 | # CONFIG_KEXEC is not set |
| 308 | 327 | ||
| @@ -355,6 +374,7 @@ CONFIG_PM_SLEEP=y | |||
| 355 | CONFIG_SUSPEND=y | 374 | CONFIG_SUSPEND=y |
| 356 | CONFIG_SUSPEND_FREEZER=y | 375 | CONFIG_SUSPEND_FREEZER=y |
| 357 | CONFIG_APM_EMULATION=y | 376 | CONFIG_APM_EMULATION=y |
| 377 | # CONFIG_PM_RUNTIME is not set | ||
| 358 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | 378 | CONFIG_ARCH_SUSPEND_POSSIBLE=y |
| 359 | CONFIG_NET=y | 379 | CONFIG_NET=y |
| 360 | 380 | ||
| @@ -396,6 +416,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
| 396 | # CONFIG_NETFILTER is not set | 416 | # CONFIG_NETFILTER is not set |
| 397 | # CONFIG_IP_DCCP is not set | 417 | # CONFIG_IP_DCCP is not set |
| 398 | # CONFIG_IP_SCTP is not set | 418 | # CONFIG_IP_SCTP is not set |
| 419 | # CONFIG_RDS is not set | ||
| 399 | # CONFIG_TIPC is not set | 420 | # CONFIG_TIPC is not set |
| 400 | # CONFIG_ATM is not set | 421 | # CONFIG_ATM is not set |
| 401 | # CONFIG_BRIDGE is not set | 422 | # CONFIG_BRIDGE is not set |
| @@ -410,6 +431,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
| 410 | # CONFIG_ECONET is not set | 431 | # CONFIG_ECONET is not set |
| 411 | # CONFIG_WAN_ROUTER is not set | 432 | # CONFIG_WAN_ROUTER is not set |
| 412 | # CONFIG_PHONET is not set | 433 | # CONFIG_PHONET is not set |
| 434 | # CONFIG_IEEE802154 is not set | ||
| 413 | # CONFIG_NET_SCHED is not set | 435 | # CONFIG_NET_SCHED is not set |
| 414 | # CONFIG_DCB is not set | 436 | # CONFIG_DCB is not set |
| 415 | 437 | ||
| @@ -433,22 +455,27 @@ CONFIG_BT_HIDP=m | |||
| 433 | # | 455 | # |
| 434 | # Bluetooth device drivers | 456 | # Bluetooth device drivers |
| 435 | # | 457 | # |
| 436 | # CONFIG_BT_HCIBTUSB is not set | 458 | CONFIG_BT_HCIBTUSB=m |
| 437 | # CONFIG_BT_HCIBTSDIO is not set | 459 | # CONFIG_BT_HCIBTSDIO is not set |
| 438 | # CONFIG_BT_HCIUART is not set | 460 | # CONFIG_BT_HCIUART is not set |
| 439 | # CONFIG_BT_HCIBCM203X is not set | 461 | # CONFIG_BT_HCIBCM203X is not set |
| 440 | # CONFIG_BT_HCIBPA10X is not set | 462 | # CONFIG_BT_HCIBPA10X is not set |
| 441 | # CONFIG_BT_HCIBFUSB is not set | 463 | # CONFIG_BT_HCIBFUSB is not set |
| 442 | # CONFIG_BT_HCIVHCI is not set | 464 | # CONFIG_BT_HCIVHCI is not set |
| 465 | # CONFIG_BT_MRVL is not set | ||
| 443 | # CONFIG_AF_RXRPC is not set | 466 | # CONFIG_AF_RXRPC is not set |
| 444 | CONFIG_WIRELESS=y | 467 | CONFIG_WIRELESS=y |
| 445 | # CONFIG_CFG80211 is not set | 468 | # CONFIG_CFG80211 is not set |
| 469 | CONFIG_CFG80211_DEFAULT_PS_VALUE=0 | ||
| 446 | # CONFIG_WIRELESS_OLD_REGULATORY is not set | 470 | # CONFIG_WIRELESS_OLD_REGULATORY is not set |
| 447 | CONFIG_WIRELESS_EXT=y | 471 | CONFIG_WIRELESS_EXT=y |
| 448 | CONFIG_WIRELESS_EXT_SYSFS=y | 472 | CONFIG_WIRELESS_EXT_SYSFS=y |
| 449 | CONFIG_LIB80211=m | 473 | CONFIG_LIB80211=m |
| 450 | # CONFIG_LIB80211_DEBUG is not set | 474 | # CONFIG_LIB80211_DEBUG is not set |
| 451 | # CONFIG_MAC80211 is not set | 475 | |
| 476 | # | ||
| 477 | # CFG80211 needs to be enabled for MAC80211 | ||
| 478 | # | ||
| 452 | # CONFIG_WIMAX is not set | 479 | # CONFIG_WIMAX is not set |
| 453 | # CONFIG_RFKILL is not set | 480 | # CONFIG_RFKILL is not set |
| 454 | # CONFIG_NET_9P is not set | 481 | # CONFIG_NET_9P is not set |
| @@ -461,6 +488,7 @@ CONFIG_LIB80211=m | |||
| 461 | # Generic Driver Options | 488 | # Generic Driver Options |
| 462 | # | 489 | # |
| 463 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 490 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 491 | # CONFIG_DEVTMPFS is not set | ||
| 464 | CONFIG_STANDALONE=y | 492 | CONFIG_STANDALONE=y |
| 465 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 493 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
| 466 | CONFIG_FW_LOADER=y | 494 | CONFIG_FW_LOADER=y |
| @@ -472,9 +500,9 @@ CONFIG_EXTRA_FIRMWARE="" | |||
| 472 | # CONFIG_CONNECTOR is not set | 500 | # CONFIG_CONNECTOR is not set |
| 473 | CONFIG_MTD=y | 501 | CONFIG_MTD=y |
| 474 | # CONFIG_MTD_DEBUG is not set | 502 | # CONFIG_MTD_DEBUG is not set |
| 503 | # CONFIG_MTD_TESTS is not set | ||
| 475 | # CONFIG_MTD_CONCAT is not set | 504 | # CONFIG_MTD_CONCAT is not set |
| 476 | CONFIG_MTD_PARTITIONS=y | 505 | CONFIG_MTD_PARTITIONS=y |
| 477 | # CONFIG_MTD_TESTS is not set | ||
| 478 | # CONFIG_MTD_REDBOOT_PARTS is not set | 506 | # CONFIG_MTD_REDBOOT_PARTS is not set |
| 479 | # CONFIG_MTD_CMDLINE_PARTS is not set | 507 | # CONFIG_MTD_CMDLINE_PARTS is not set |
| 480 | # CONFIG_MTD_AFS_PARTS is not set | 508 | # CONFIG_MTD_AFS_PARTS is not set |
| @@ -521,6 +549,9 @@ CONFIG_MTD_CFI_I2=y | |||
| 521 | # | 549 | # |
| 522 | # Self-contained MTD device drivers | 550 | # Self-contained MTD device drivers |
| 523 | # | 551 | # |
| 552 | # CONFIG_MTD_DATAFLASH is not set | ||
| 553 | # CONFIG_MTD_M25P80 is not set | ||
| 554 | # CONFIG_MTD_SST25L is not set | ||
| 524 | # CONFIG_MTD_SLRAM is not set | 555 | # CONFIG_MTD_SLRAM is not set |
| 525 | # CONFIG_MTD_PHRAM is not set | 556 | # CONFIG_MTD_PHRAM is not set |
| 526 | # CONFIG_MTD_MTDRAM is not set | 557 | # CONFIG_MTD_MTDRAM is not set |
| @@ -556,7 +587,15 @@ CONFIG_MTD_NAND_PXA3xx=y | |||
| 556 | # | 587 | # |
| 557 | # UBI - Unsorted block images | 588 | # UBI - Unsorted block images |
| 558 | # | 589 | # |
| 559 | # CONFIG_MTD_UBI is not set | 590 | CONFIG_MTD_UBI=y |
| 591 | CONFIG_MTD_UBI_WL_THRESHOLD=4096 | ||
| 592 | CONFIG_MTD_UBI_BEB_RESERVE=1 | ||
| 593 | # CONFIG_MTD_UBI_GLUEBI is not set | ||
| 594 | |||
| 595 | # | ||
| 596 | # UBI debugging options | ||
| 597 | # | ||
| 598 | # CONFIG_MTD_UBI_DEBUG is not set | ||
| 560 | # CONFIG_PARPORT is not set | 599 | # CONFIG_PARPORT is not set |
| 561 | CONFIG_BLK_DEV=y | 600 | CONFIG_BLK_DEV=y |
| 562 | # CONFIG_BLK_DEV_COW_COMMON is not set | 601 | # CONFIG_BLK_DEV_COW_COMMON is not set |
| @@ -570,6 +609,7 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 | |||
| 570 | # CONFIG_BLK_DEV_XIP is not set | 609 | # CONFIG_BLK_DEV_XIP is not set |
| 571 | # CONFIG_CDROM_PKTCDVD is not set | 610 | # CONFIG_CDROM_PKTCDVD is not set |
| 572 | # CONFIG_ATA_OVER_ETH is not set | 611 | # CONFIG_ATA_OVER_ETH is not set |
| 612 | # CONFIG_MG_DISK is not set | ||
| 573 | # CONFIG_MISC_DEVICES is not set | 613 | # CONFIG_MISC_DEVICES is not set |
| 574 | CONFIG_HAVE_IDE=y | 614 | CONFIG_HAVE_IDE=y |
| 575 | # CONFIG_IDE is not set | 615 | # CONFIG_IDE is not set |
| @@ -593,10 +633,6 @@ CONFIG_BLK_DEV_SD=y | |||
| 593 | # CONFIG_BLK_DEV_SR is not set | 633 | # CONFIG_BLK_DEV_SR is not set |
| 594 | # CONFIG_CHR_DEV_SG is not set | 634 | # CONFIG_CHR_DEV_SG is not set |
| 595 | # CONFIG_CHR_DEV_SCH is not set | 635 | # CONFIG_CHR_DEV_SCH is not set |
| 596 | |||
| 597 | # | ||
| 598 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
| 599 | # | ||
| 600 | # CONFIG_SCSI_MULTI_LUN is not set | 636 | # CONFIG_SCSI_MULTI_LUN is not set |
| 601 | # CONFIG_SCSI_CONSTANTS is not set | 637 | # CONFIG_SCSI_CONSTANTS is not set |
| 602 | # CONFIG_SCSI_LOGGING is not set | 638 | # CONFIG_SCSI_LOGGING is not set |
| @@ -621,7 +657,6 @@ CONFIG_SCSI_LOWLEVEL=y | |||
| 621 | # CONFIG_ATA is not set | 657 | # CONFIG_ATA is not set |
| 622 | # CONFIG_MD is not set | 658 | # CONFIG_MD is not set |
| 623 | CONFIG_NETDEVICES=y | 659 | CONFIG_NETDEVICES=y |
| 624 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
| 625 | # CONFIG_DUMMY is not set | 660 | # CONFIG_DUMMY is not set |
| 626 | # CONFIG_BONDING is not set | 661 | # CONFIG_BONDING is not set |
| 627 | # CONFIG_MACVLAN is not set | 662 | # CONFIG_MACVLAN is not set |
| @@ -636,6 +671,7 @@ CONFIG_MII=y | |||
| 636 | CONFIG_DM9000=y | 671 | CONFIG_DM9000=y |
| 637 | CONFIG_DM9000_DEBUGLEVEL=0 | 672 | CONFIG_DM9000_DEBUGLEVEL=0 |
| 638 | CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL=y | 673 | CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL=y |
| 674 | # CONFIG_ENC28J60 is not set | ||
| 639 | # CONFIG_ETHOC is not set | 675 | # CONFIG_ETHOC is not set |
| 640 | # CONFIG_SMC911X is not set | 676 | # CONFIG_SMC911X is not set |
| 641 | # CONFIG_SMSC911X is not set | 677 | # CONFIG_SMSC911X is not set |
| @@ -648,20 +684,20 @@ CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL=y | |||
| 648 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | 684 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set |
| 649 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | 685 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set |
| 650 | # CONFIG_B44 is not set | 686 | # CONFIG_B44 is not set |
| 687 | # CONFIG_KS8842 is not set | ||
| 688 | # CONFIG_KS8851 is not set | ||
| 689 | # CONFIG_KS8851_MLL is not set | ||
| 651 | # CONFIG_NETDEV_1000 is not set | 690 | # CONFIG_NETDEV_1000 is not set |
| 652 | # CONFIG_NETDEV_10000 is not set | 691 | # CONFIG_NETDEV_10000 is not set |
| 653 | 692 | CONFIG_WLAN=y | |
| 654 | # | ||
| 655 | # Wireless LAN | ||
| 656 | # | ||
| 657 | # CONFIG_WLAN_PRE80211 is not set | 693 | # CONFIG_WLAN_PRE80211 is not set |
| 658 | CONFIG_WLAN_80211=y | 694 | CONFIG_WLAN_80211=y |
| 659 | CONFIG_LIBERTAS=m | 695 | CONFIG_LIBERTAS=m |
| 660 | # CONFIG_LIBERTAS_USB is not set | 696 | # CONFIG_LIBERTAS_USB is not set |
| 661 | CONFIG_LIBERTAS_SDIO=m | 697 | CONFIG_LIBERTAS_SDIO=m |
| 698 | # CONFIG_LIBERTAS_SPI is not set | ||
| 662 | # CONFIG_LIBERTAS_DEBUG is not set | 699 | # CONFIG_LIBERTAS_DEBUG is not set |
| 663 | # CONFIG_USB_ZD1201 is not set | 700 | # CONFIG_USB_ZD1201 is not set |
| 664 | # CONFIG_USB_NET_RNDIS_WLAN is not set | ||
| 665 | # CONFIG_HOSTAP is not set | 701 | # CONFIG_HOSTAP is not set |
| 666 | 702 | ||
| 667 | # | 703 | # |
| @@ -683,6 +719,7 @@ CONFIG_LIBERTAS_SDIO=m | |||
| 683 | # CONFIG_NETPOLL is not set | 719 | # CONFIG_NETPOLL is not set |
| 684 | # CONFIG_NET_POLL_CONTROLLER is not set | 720 | # CONFIG_NET_POLL_CONTROLLER is not set |
| 685 | # CONFIG_ISDN is not set | 721 | # CONFIG_ISDN is not set |
| 722 | # CONFIG_PHONE is not set | ||
| 686 | 723 | ||
| 687 | # | 724 | # |
| 688 | # Input device support | 725 | # Input device support |
| @@ -706,33 +743,51 @@ CONFIG_INPUT_EVDEV=y | |||
| 706 | # Input Device Drivers | 743 | # Input Device Drivers |
| 707 | # | 744 | # |
| 708 | CONFIG_INPUT_KEYBOARD=y | 745 | CONFIG_INPUT_KEYBOARD=y |
| 746 | # CONFIG_KEYBOARD_ADP5588 is not set | ||
| 709 | # CONFIG_KEYBOARD_ATKBD is not set | 747 | # CONFIG_KEYBOARD_ATKBD is not set |
| 710 | # CONFIG_KEYBOARD_SUNKBD is not set | 748 | # CONFIG_QT2160 is not set |
| 711 | # CONFIG_KEYBOARD_LKKBD is not set | 749 | # CONFIG_KEYBOARD_LKKBD is not set |
| 712 | # CONFIG_KEYBOARD_XTKBD is not set | 750 | # CONFIG_KEYBOARD_GPIO is not set |
| 751 | # CONFIG_KEYBOARD_MATRIX is not set | ||
| 752 | # CONFIG_KEYBOARD_LM8323 is not set | ||
| 753 | # CONFIG_KEYBOARD_MAX7359 is not set | ||
| 713 | # CONFIG_KEYBOARD_NEWTON is not set | 754 | # CONFIG_KEYBOARD_NEWTON is not set |
| 714 | # CONFIG_KEYBOARD_STOWAWAY is not set | 755 | # CONFIG_KEYBOARD_OPENCORES is not set |
| 715 | CONFIG_KEYBOARD_PXA27x=m | 756 | CONFIG_KEYBOARD_PXA27x=m |
| 716 | # CONFIG_KEYBOARD_GPIO is not set | 757 | # CONFIG_KEYBOARD_STOWAWAY is not set |
| 758 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
| 759 | # CONFIG_KEYBOARD_XTKBD is not set | ||
| 717 | # CONFIG_INPUT_MOUSE is not set | 760 | # CONFIG_INPUT_MOUSE is not set |
| 718 | # CONFIG_INPUT_JOYSTICK is not set | 761 | # CONFIG_INPUT_JOYSTICK is not set |
| 719 | # CONFIG_INPUT_TABLET is not set | 762 | # CONFIG_INPUT_TABLET is not set |
| 720 | CONFIG_INPUT_TOUCHSCREEN=y | 763 | CONFIG_INPUT_TOUCHSCREEN=y |
| 764 | # CONFIG_TOUCHSCREEN_ADS7846 is not set | ||
| 765 | # CONFIG_TOUCHSCREEN_AD7877 is not set | ||
| 721 | # CONFIG_TOUCHSCREEN_AD7879_I2C is not set | 766 | # CONFIG_TOUCHSCREEN_AD7879_I2C is not set |
| 767 | # CONFIG_TOUCHSCREEN_AD7879_SPI is not set | ||
| 722 | # CONFIG_TOUCHSCREEN_AD7879 is not set | 768 | # CONFIG_TOUCHSCREEN_AD7879 is not set |
| 769 | # CONFIG_TOUCHSCREEN_DA9034 is not set | ||
| 770 | # CONFIG_TOUCHSCREEN_EETI is not set | ||
| 723 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | 771 | # CONFIG_TOUCHSCREEN_FUJITSU is not set |
| 724 | # CONFIG_TOUCHSCREEN_GUNZE is not set | 772 | # CONFIG_TOUCHSCREEN_GUNZE is not set |
| 725 | # CONFIG_TOUCHSCREEN_ELO is not set | 773 | # CONFIG_TOUCHSCREEN_ELO is not set |
| 726 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | 774 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set |
| 775 | # CONFIG_TOUCHSCREEN_MCS5000 is not set | ||
| 727 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | 776 | # CONFIG_TOUCHSCREEN_MTOUCH is not set |
| 728 | # CONFIG_TOUCHSCREEN_INEXIO is not set | 777 | # CONFIG_TOUCHSCREEN_INEXIO is not set |
| 729 | # CONFIG_TOUCHSCREEN_MK712 is not set | 778 | # CONFIG_TOUCHSCREEN_MK712 is not set |
| 730 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set | 779 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set |
| 731 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | 780 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set |
| 732 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set | 781 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set |
| 782 | CONFIG_TOUCHSCREEN_WM97XX=m | ||
| 783 | # CONFIG_TOUCHSCREEN_WM9705 is not set | ||
| 784 | CONFIG_TOUCHSCREEN_WM9712=y | ||
| 785 | # CONFIG_TOUCHSCREEN_WM9713 is not set | ||
| 786 | # CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE is not set | ||
| 733 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | 787 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set |
| 734 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set | 788 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set |
| 735 | # CONFIG_TOUCHSCREEN_TSC2007 is not set | 789 | # CONFIG_TOUCHSCREEN_TSC2007 is not set |
| 790 | # CONFIG_TOUCHSCREEN_W90X900 is not set | ||
| 736 | # CONFIG_INPUT_MISC is not set | 791 | # CONFIG_INPUT_MISC is not set |
| 737 | 792 | ||
| 738 | # | 793 | # |
| @@ -760,6 +815,7 @@ CONFIG_DEVKMEM=y | |||
| 760 | # | 815 | # |
| 761 | # Non-8250 serial port support | 816 | # Non-8250 serial port support |
| 762 | # | 817 | # |
| 818 | # CONFIG_SERIAL_MAX3100 is not set | ||
| 763 | CONFIG_SERIAL_PXA=y | 819 | CONFIG_SERIAL_PXA=y |
| 764 | CONFIG_SERIAL_PXA_CONSOLE=y | 820 | CONFIG_SERIAL_PXA_CONSOLE=y |
| 765 | CONFIG_SERIAL_CORE=y | 821 | CONFIG_SERIAL_CORE=y |
| @@ -774,6 +830,7 @@ CONFIG_UNIX98_PTYS=y | |||
| 774 | # CONFIG_TCG_TPM is not set | 830 | # CONFIG_TCG_TPM is not set |
| 775 | CONFIG_I2C=y | 831 | CONFIG_I2C=y |
| 776 | CONFIG_I2C_BOARDINFO=y | 832 | CONFIG_I2C_BOARDINFO=y |
| 833 | CONFIG_I2C_COMPAT=y | ||
| 777 | # CONFIG_I2C_CHARDEV is not set | 834 | # CONFIG_I2C_CHARDEV is not set |
| 778 | CONFIG_I2C_HELPER_AUTO=y | 835 | CONFIG_I2C_HELPER_AUTO=y |
| 779 | 836 | ||
| @@ -784,6 +841,7 @@ CONFIG_I2C_HELPER_AUTO=y | |||
| 784 | # | 841 | # |
| 785 | # I2C system bus drivers (mostly embedded / system-on-chip) | 842 | # I2C system bus drivers (mostly embedded / system-on-chip) |
| 786 | # | 843 | # |
| 844 | # CONFIG_I2C_DESIGNWARE is not set | ||
| 787 | # CONFIG_I2C_GPIO is not set | 845 | # CONFIG_I2C_GPIO is not set |
| 788 | # CONFIG_I2C_OCORES is not set | 846 | # CONFIG_I2C_OCORES is not set |
| 789 | CONFIG_I2C_PXA=y | 847 | CONFIG_I2C_PXA=y |
| @@ -807,19 +865,36 @@ CONFIG_I2C_PXA=y | |||
| 807 | # Miscellaneous I2C Chip support | 865 | # Miscellaneous I2C Chip support |
| 808 | # | 866 | # |
| 809 | # CONFIG_DS1682 is not set | 867 | # CONFIG_DS1682 is not set |
| 810 | # CONFIG_SENSORS_PCF8574 is not set | ||
| 811 | # CONFIG_PCF8575 is not set | ||
| 812 | # CONFIG_SENSORS_MAX6875 is not set | ||
| 813 | # CONFIG_SENSORS_TSL2550 is not set | 868 | # CONFIG_SENSORS_TSL2550 is not set |
| 814 | # CONFIG_I2C_DEBUG_CORE is not set | 869 | # CONFIG_I2C_DEBUG_CORE is not set |
| 815 | # CONFIG_I2C_DEBUG_ALGO is not set | 870 | # CONFIG_I2C_DEBUG_ALGO is not set |
| 816 | # CONFIG_I2C_DEBUG_BUS is not set | 871 | # CONFIG_I2C_DEBUG_BUS is not set |
| 817 | # CONFIG_I2C_DEBUG_CHIP is not set | 872 | # CONFIG_I2C_DEBUG_CHIP is not set |
| 818 | # CONFIG_SPI is not set | 873 | CONFIG_SPI=y |
| 874 | # CONFIG_SPI_DEBUG is not set | ||
| 875 | CONFIG_SPI_MASTER=y | ||
| 876 | |||
| 877 | # | ||
| 878 | # SPI Master Controller Drivers | ||
| 879 | # | ||
| 880 | CONFIG_SPI_BITBANG=y | ||
| 881 | CONFIG_SPI_GPIO=y | ||
| 882 | # CONFIG_SPI_PXA2XX is not set | ||
| 883 | |||
| 884 | # | ||
| 885 | # SPI Protocol Masters | ||
| 886 | # | ||
| 887 | # CONFIG_SPI_SPIDEV is not set | ||
| 888 | # CONFIG_SPI_TLE62X0 is not set | ||
| 889 | |||
| 890 | # | ||
| 891 | # PPS support | ||
| 892 | # | ||
| 893 | # CONFIG_PPS is not set | ||
| 819 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | 894 | CONFIG_ARCH_REQUIRE_GPIOLIB=y |
| 820 | CONFIG_GPIOLIB=y | 895 | CONFIG_GPIOLIB=y |
| 821 | # CONFIG_DEBUG_GPIO is not set | 896 | # CONFIG_DEBUG_GPIO is not set |
| 822 | # CONFIG_GPIO_SYSFS is not set | 897 | CONFIG_GPIO_SYSFS=y |
| 823 | 898 | ||
| 824 | # | 899 | # |
| 825 | # Memory mapped GPIO expanders: | 900 | # Memory mapped GPIO expanders: |
| @@ -839,11 +914,17 @@ CONFIG_GPIO_PCA953X=y | |||
| 839 | # | 914 | # |
| 840 | # SPI GPIO expanders: | 915 | # SPI GPIO expanders: |
| 841 | # | 916 | # |
| 917 | # CONFIG_GPIO_MAX7301 is not set | ||
| 918 | # CONFIG_GPIO_MCP23S08 is not set | ||
| 919 | # CONFIG_GPIO_MC33880 is not set | ||
| 920 | |||
| 921 | # | ||
| 922 | # AC97 GPIO expanders: | ||
| 923 | # | ||
| 842 | # CONFIG_W1 is not set | 924 | # CONFIG_W1 is not set |
| 843 | # CONFIG_POWER_SUPPLY is not set | 925 | # CONFIG_POWER_SUPPLY is not set |
| 844 | # CONFIG_HWMON is not set | 926 | # CONFIG_HWMON is not set |
| 845 | # CONFIG_THERMAL is not set | 927 | # CONFIG_THERMAL is not set |
| 846 | # CONFIG_THERMAL_HWMON is not set | ||
| 847 | # CONFIG_WATCHDOG is not set | 928 | # CONFIG_WATCHDOG is not set |
| 848 | CONFIG_SSB_POSSIBLE=y | 929 | CONFIG_SSB_POSSIBLE=y |
| 849 | 930 | ||
| @@ -860,32 +941,33 @@ CONFIG_SSB_POSSIBLE=y | |||
| 860 | # CONFIG_MFD_ASIC3 is not set | 941 | # CONFIG_MFD_ASIC3 is not set |
| 861 | # CONFIG_HTC_EGPIO is not set | 942 | # CONFIG_HTC_EGPIO is not set |
| 862 | # CONFIG_HTC_PASIC3 is not set | 943 | # CONFIG_HTC_PASIC3 is not set |
| 944 | # CONFIG_UCB1400_CORE is not set | ||
| 863 | # CONFIG_TPS65010 is not set | 945 | # CONFIG_TPS65010 is not set |
| 864 | # CONFIG_TWL4030_CORE is not set | 946 | # CONFIG_TWL4030_CORE is not set |
| 865 | # CONFIG_MFD_TMIO is not set | 947 | # CONFIG_MFD_TMIO is not set |
| 866 | # CONFIG_MFD_T7L66XB is not set | 948 | # CONFIG_MFD_T7L66XB is not set |
| 867 | # CONFIG_MFD_TC6387XB is not set | 949 | # CONFIG_MFD_TC6387XB is not set |
| 868 | # CONFIG_MFD_TC6393XB is not set | 950 | # CONFIG_MFD_TC6393XB is not set |
| 869 | # CONFIG_PMIC_DA903X is not set | 951 | CONFIG_PMIC_DA903X=y |
| 870 | # CONFIG_MFD_WM8400 is not set | 952 | # CONFIG_MFD_WM8400 is not set |
| 953 | # CONFIG_MFD_WM831X is not set | ||
| 871 | # CONFIG_MFD_WM8350_I2C is not set | 954 | # CONFIG_MFD_WM8350_I2C is not set |
| 872 | # CONFIG_MFD_PCF50633 is not set | 955 | # CONFIG_MFD_PCF50633 is not set |
| 873 | 956 | # CONFIG_MFD_MC13783 is not set | |
| 874 | # | 957 | # CONFIG_AB3100_CORE is not set |
| 875 | # Multimedia devices | 958 | # CONFIG_EZX_PCAP is not set |
| 876 | # | 959 | CONFIG_REGULATOR=y |
| 877 | 960 | # CONFIG_REGULATOR_DEBUG is not set | |
| 878 | # | 961 | # CONFIG_REGULATOR_FIXED_VOLTAGE is not set |
| 879 | # Multimedia core support | 962 | # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set |
| 880 | # | 963 | # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set |
| 881 | # CONFIG_VIDEO_DEV is not set | 964 | # CONFIG_REGULATOR_BQ24022 is not set |
| 882 | # CONFIG_DVB_CORE is not set | 965 | # CONFIG_REGULATOR_MAX1586 is not set |
| 883 | # CONFIG_VIDEO_MEDIA is not set | 966 | CONFIG_REGULATOR_DA903X=y |
| 884 | 967 | # CONFIG_REGULATOR_LP3971 is not set | |
| 885 | # | 968 | # CONFIG_REGULATOR_TPS65023 is not set |
| 886 | # Multimedia drivers | 969 | # CONFIG_REGULATOR_TPS6507X is not set |
| 887 | # | 970 | # CONFIG_MEDIA_SUPPORT is not set |
| 888 | # CONFIG_DAB is not set | ||
| 889 | 971 | ||
| 890 | # | 972 | # |
| 891 | # Graphics support | 973 | # Graphics support |
| @@ -925,7 +1007,17 @@ CONFIG_FB_PXA=y | |||
| 925 | # CONFIG_FB_METRONOME is not set | 1007 | # CONFIG_FB_METRONOME is not set |
| 926 | # CONFIG_FB_MB862XX is not set | 1008 | # CONFIG_FB_MB862XX is not set |
| 927 | # CONFIG_FB_BROADSHEET is not set | 1009 | # CONFIG_FB_BROADSHEET is not set |
| 928 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | 1010 | CONFIG_BACKLIGHT_LCD_SUPPORT=y |
| 1011 | CONFIG_LCD_CLASS_DEVICE=y | ||
| 1012 | # CONFIG_LCD_LMS283GF05 is not set | ||
| 1013 | # CONFIG_LCD_LTV350QV is not set | ||
| 1014 | # CONFIG_LCD_ILI9320 is not set | ||
| 1015 | CONFIG_LCD_TDO24M=y | ||
| 1016 | # CONFIG_LCD_VGG2432A4 is not set | ||
| 1017 | # CONFIG_LCD_PLATFORM is not set | ||
| 1018 | CONFIG_BACKLIGHT_CLASS_DEVICE=m | ||
| 1019 | # CONFIG_BACKLIGHT_GENERIC is not set | ||
| 1020 | CONFIG_BACKLIGHT_DA903X=m | ||
| 929 | 1021 | ||
| 930 | # | 1022 | # |
| 931 | # Display device support | 1023 | # Display device support |
| @@ -956,38 +1048,48 @@ CONFIG_LOGO_LINUX_MONO=y | |||
| 956 | CONFIG_LOGO_LINUX_VGA16=y | 1048 | CONFIG_LOGO_LINUX_VGA16=y |
| 957 | CONFIG_LOGO_LINUX_CLUT224=y | 1049 | CONFIG_LOGO_LINUX_CLUT224=y |
| 958 | CONFIG_SOUND=m | 1050 | CONFIG_SOUND=m |
| 959 | # CONFIG_SOUND_OSS_CORE is not set | 1051 | CONFIG_SOUND_OSS_CORE=y |
| 1052 | CONFIG_SOUND_OSS_CORE_PRECLAIM=y | ||
| 960 | CONFIG_SND=m | 1053 | CONFIG_SND=m |
| 961 | CONFIG_SND_TIMER=m | 1054 | CONFIG_SND_TIMER=m |
| 962 | CONFIG_SND_PCM=m | 1055 | CONFIG_SND_PCM=m |
| 963 | CONFIG_SND_JACK=y | 1056 | CONFIG_SND_JACK=y |
| 964 | # CONFIG_SND_SEQUENCER is not set | 1057 | # CONFIG_SND_SEQUENCER is not set |
| 965 | # CONFIG_SND_MIXER_OSS is not set | 1058 | CONFIG_SND_OSSEMUL=y |
| 966 | # CONFIG_SND_PCM_OSS is not set | 1059 | CONFIG_SND_MIXER_OSS=m |
| 1060 | CONFIG_SND_PCM_OSS=m | ||
| 1061 | CONFIG_SND_PCM_OSS_PLUGINS=y | ||
| 967 | # CONFIG_SND_DYNAMIC_MINORS is not set | 1062 | # CONFIG_SND_DYNAMIC_MINORS is not set |
| 968 | CONFIG_SND_SUPPORT_OLD_API=y | 1063 | CONFIG_SND_SUPPORT_OLD_API=y |
| 969 | CONFIG_SND_VERBOSE_PROCFS=y | 1064 | CONFIG_SND_VERBOSE_PROCFS=y |
| 970 | # CONFIG_SND_VERBOSE_PRINTK is not set | 1065 | # CONFIG_SND_VERBOSE_PRINTK is not set |
| 971 | # CONFIG_SND_DEBUG is not set | 1066 | # CONFIG_SND_DEBUG is not set |
| 972 | CONFIG_SND_DRIVERS=y | 1067 | CONFIG_SND_VMASTER=y |
| 973 | # CONFIG_SND_DUMMY is not set | 1068 | # CONFIG_SND_RAWMIDI_SEQ is not set |
| 974 | # CONFIG_SND_MTPAV is not set | 1069 | # CONFIG_SND_OPL3_LIB_SEQ is not set |
| 975 | # CONFIG_SND_SERIAL_U16550 is not set | 1070 | # CONFIG_SND_OPL4_LIB_SEQ is not set |
| 976 | # CONFIG_SND_MPU401 is not set | 1071 | # CONFIG_SND_SBAWE_SEQ is not set |
| 1072 | # CONFIG_SND_EMU10K1_SEQ is not set | ||
| 1073 | CONFIG_SND_AC97_CODEC=m | ||
| 1074 | # CONFIG_SND_DRIVERS is not set | ||
| 977 | CONFIG_SND_ARM=y | 1075 | CONFIG_SND_ARM=y |
| 978 | CONFIG_SND_PXA2XX_LIB=m | 1076 | CONFIG_SND_PXA2XX_LIB=m |
| 1077 | CONFIG_SND_PXA2XX_LIB_AC97=y | ||
| 979 | # CONFIG_SND_PXA2XX_AC97 is not set | 1078 | # CONFIG_SND_PXA2XX_AC97 is not set |
| 980 | CONFIG_SND_USB=y | 1079 | # CONFIG_SND_SPI is not set |
| 981 | # CONFIG_SND_USB_AUDIO is not set | 1080 | # CONFIG_SND_USB is not set |
| 982 | # CONFIG_SND_USB_CAIAQ is not set | ||
| 983 | CONFIG_SND_SOC=m | 1081 | CONFIG_SND_SOC=m |
| 1082 | CONFIG_SND_SOC_AC97_BUS=y | ||
| 984 | CONFIG_SND_PXA2XX_SOC=m | 1083 | CONFIG_SND_PXA2XX_SOC=m |
| 1084 | CONFIG_SND_PXA2XX_SOC_AC97=m | ||
| 1085 | CONFIG_SND_PXA2XX_SOC_EM_X270=m | ||
| 985 | CONFIG_SND_SOC_I2C_AND_SPI=m | 1086 | CONFIG_SND_SOC_I2C_AND_SPI=m |
| 986 | # CONFIG_SND_SOC_ALL_CODECS is not set | 1087 | # CONFIG_SND_SOC_ALL_CODECS is not set |
| 1088 | CONFIG_SND_SOC_WM9712=m | ||
| 987 | # CONFIG_SOUND_PRIME is not set | 1089 | # CONFIG_SOUND_PRIME is not set |
| 1090 | CONFIG_AC97_BUS=m | ||
| 988 | CONFIG_HID_SUPPORT=y | 1091 | CONFIG_HID_SUPPORT=y |
| 989 | CONFIG_HID=y | 1092 | CONFIG_HID=y |
| 990 | CONFIG_HID_DEBUG=y | ||
| 991 | # CONFIG_HIDRAW is not set | 1093 | # CONFIG_HIDRAW is not set |
| 992 | 1094 | ||
| 993 | # | 1095 | # |
| @@ -1006,10 +1108,12 @@ CONFIG_HID_BELKIN=y | |||
| 1006 | CONFIG_HID_CHERRY=y | 1108 | CONFIG_HID_CHERRY=y |
| 1007 | CONFIG_HID_CHICONY=y | 1109 | CONFIG_HID_CHICONY=y |
| 1008 | CONFIG_HID_CYPRESS=y | 1110 | CONFIG_HID_CYPRESS=y |
| 1111 | CONFIG_HID_DRAGONRISE=y | ||
| 1009 | # CONFIG_DRAGONRISE_FF is not set | 1112 | # CONFIG_DRAGONRISE_FF is not set |
| 1010 | CONFIG_HID_EZKEY=y | 1113 | CONFIG_HID_EZKEY=y |
| 1011 | CONFIG_HID_KYE=y | 1114 | CONFIG_HID_KYE=y |
| 1012 | CONFIG_HID_GYRATION=y | 1115 | CONFIG_HID_GYRATION=y |
| 1116 | CONFIG_HID_TWINHAN=y | ||
| 1013 | CONFIG_HID_KENSINGTON=y | 1117 | CONFIG_HID_KENSINGTON=y |
| 1014 | CONFIG_HID_LOGITECH=y | 1118 | CONFIG_HID_LOGITECH=y |
| 1015 | # CONFIG_LOGITECH_FF is not set | 1119 | # CONFIG_LOGITECH_FF is not set |
| @@ -1023,9 +1127,15 @@ CONFIG_HID_PETALYNX=y | |||
| 1023 | CONFIG_HID_SAMSUNG=y | 1127 | CONFIG_HID_SAMSUNG=y |
| 1024 | CONFIG_HID_SONY=y | 1128 | CONFIG_HID_SONY=y |
| 1025 | CONFIG_HID_SUNPLUS=y | 1129 | CONFIG_HID_SUNPLUS=y |
| 1130 | CONFIG_HID_GREENASIA=y | ||
| 1026 | # CONFIG_GREENASIA_FF is not set | 1131 | # CONFIG_GREENASIA_FF is not set |
| 1132 | CONFIG_HID_SMARTJOYPLUS=y | ||
| 1133 | # CONFIG_SMARTJOYPLUS_FF is not set | ||
| 1027 | CONFIG_HID_TOPSEED=y | 1134 | CONFIG_HID_TOPSEED=y |
| 1135 | CONFIG_HID_THRUSTMASTER=y | ||
| 1028 | # CONFIG_THRUSTMASTER_FF is not set | 1136 | # CONFIG_THRUSTMASTER_FF is not set |
| 1137 | CONFIG_HID_WACOM=m | ||
| 1138 | CONFIG_HID_ZEROPLUS=y | ||
| 1029 | # CONFIG_ZEROPLUS_FF is not set | 1139 | # CONFIG_ZEROPLUS_FF is not set |
| 1030 | CONFIG_USB_SUPPORT=y | 1140 | CONFIG_USB_SUPPORT=y |
| 1031 | CONFIG_USB_ARCH_HAS_HCD=y | 1141 | CONFIG_USB_ARCH_HAS_HCD=y |
| @@ -1054,6 +1164,7 @@ CONFIG_USB_MON=y | |||
| 1054 | # CONFIG_USB_OXU210HP_HCD is not set | 1164 | # CONFIG_USB_OXU210HP_HCD is not set |
| 1055 | # CONFIG_USB_ISP116X_HCD is not set | 1165 | # CONFIG_USB_ISP116X_HCD is not set |
| 1056 | # CONFIG_USB_ISP1760_HCD is not set | 1166 | # CONFIG_USB_ISP1760_HCD is not set |
| 1167 | # CONFIG_USB_ISP1362_HCD is not set | ||
| 1057 | CONFIG_USB_OHCI_HCD=y | 1168 | CONFIG_USB_OHCI_HCD=y |
| 1058 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set | 1169 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set |
| 1059 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set | 1170 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set |
| @@ -1151,8 +1262,9 @@ CONFIG_MMC_BLOCK_BOUNCE=y | |||
| 1151 | # | 1262 | # |
| 1152 | CONFIG_MMC_PXA=m | 1263 | CONFIG_MMC_PXA=m |
| 1153 | # CONFIG_MMC_SDHCI is not set | 1264 | # CONFIG_MMC_SDHCI is not set |
| 1265 | # CONFIG_MMC_AT91 is not set | ||
| 1266 | # CONFIG_MMC_ATMELMCI is not set | ||
| 1154 | # CONFIG_MEMSTICK is not set | 1267 | # CONFIG_MEMSTICK is not set |
| 1155 | # CONFIG_ACCESSIBILITY is not set | ||
| 1156 | CONFIG_NEW_LEDS=y | 1268 | CONFIG_NEW_LEDS=y |
| 1157 | CONFIG_LEDS_CLASS=y | 1269 | CONFIG_LEDS_CLASS=y |
| 1158 | 1270 | ||
| @@ -1162,8 +1274,10 @@ CONFIG_LEDS_CLASS=y | |||
| 1162 | # CONFIG_LEDS_PCA9532 is not set | 1274 | # CONFIG_LEDS_PCA9532 is not set |
| 1163 | CONFIG_LEDS_GPIO=y | 1275 | CONFIG_LEDS_GPIO=y |
| 1164 | CONFIG_LEDS_GPIO_PLATFORM=y | 1276 | CONFIG_LEDS_GPIO_PLATFORM=y |
| 1165 | # CONFIG_LEDS_LP5521 is not set | 1277 | # CONFIG_LEDS_LP3944 is not set |
| 1166 | # CONFIG_LEDS_PCA955X is not set | 1278 | # CONFIG_LEDS_PCA955X is not set |
| 1279 | # CONFIG_LEDS_DA903X is not set | ||
| 1280 | # CONFIG_LEDS_DAC124S085 is not set | ||
| 1167 | # CONFIG_LEDS_BD2802 is not set | 1281 | # CONFIG_LEDS_BD2802 is not set |
| 1168 | 1282 | ||
| 1169 | # | 1283 | # |
| @@ -1179,6 +1293,7 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y | |||
| 1179 | # | 1293 | # |
| 1180 | # iptables trigger is under Netfilter config (LED target) | 1294 | # iptables trigger is under Netfilter config (LED target) |
| 1181 | # | 1295 | # |
| 1296 | # CONFIG_ACCESSIBILITY is not set | ||
| 1182 | CONFIG_RTC_LIB=y | 1297 | CONFIG_RTC_LIB=y |
| 1183 | CONFIG_RTC_CLASS=y | 1298 | CONFIG_RTC_CLASS=y |
| 1184 | CONFIG_RTC_HCTOSYS=y | 1299 | CONFIG_RTC_HCTOSYS=y |
| @@ -1210,10 +1325,19 @@ CONFIG_RTC_INTF_DEV=y | |||
| 1210 | # CONFIG_RTC_DRV_S35390A is not set | 1325 | # CONFIG_RTC_DRV_S35390A is not set |
| 1211 | # CONFIG_RTC_DRV_FM3130 is not set | 1326 | # CONFIG_RTC_DRV_FM3130 is not set |
| 1212 | # CONFIG_RTC_DRV_RX8581 is not set | 1327 | # CONFIG_RTC_DRV_RX8581 is not set |
| 1328 | # CONFIG_RTC_DRV_RX8025 is not set | ||
| 1213 | 1329 | ||
| 1214 | # | 1330 | # |
| 1215 | # SPI RTC drivers | 1331 | # SPI RTC drivers |
| 1216 | # | 1332 | # |
| 1333 | # CONFIG_RTC_DRV_M41T94 is not set | ||
| 1334 | # CONFIG_RTC_DRV_DS1305 is not set | ||
| 1335 | # CONFIG_RTC_DRV_DS1390 is not set | ||
| 1336 | # CONFIG_RTC_DRV_MAX6902 is not set | ||
| 1337 | # CONFIG_RTC_DRV_R9701 is not set | ||
| 1338 | # CONFIG_RTC_DRV_RS5C348 is not set | ||
| 1339 | # CONFIG_RTC_DRV_DS3234 is not set | ||
| 1340 | # CONFIG_RTC_DRV_PCF2123 is not set | ||
| 1217 | 1341 | ||
| 1218 | # | 1342 | # |
| 1219 | # Platform RTC drivers | 1343 | # Platform RTC drivers |
| @@ -1233,12 +1357,15 @@ CONFIG_RTC_DRV_V3020=y | |||
| 1233 | # | 1357 | # |
| 1234 | # on-CPU RTC drivers | 1358 | # on-CPU RTC drivers |
| 1235 | # | 1359 | # |
| 1236 | CONFIG_RTC_DRV_SA1100=y | 1360 | # CONFIG_RTC_DRV_SA1100 is not set |
| 1237 | # CONFIG_RTC_DRV_PXA is not set | 1361 | CONFIG_RTC_DRV_PXA=y |
| 1238 | # CONFIG_DMADEVICES is not set | 1362 | # CONFIG_DMADEVICES is not set |
| 1239 | # CONFIG_AUXDISPLAY is not set | 1363 | # CONFIG_AUXDISPLAY is not set |
| 1240 | # CONFIG_REGULATOR is not set | ||
| 1241 | # CONFIG_UIO is not set | 1364 | # CONFIG_UIO is not set |
| 1365 | |||
| 1366 | # | ||
| 1367 | # TI VLYNQ | ||
| 1368 | # | ||
| 1242 | # CONFIG_STAGING is not set | 1369 | # CONFIG_STAGING is not set |
| 1243 | 1370 | ||
| 1244 | # | 1371 | # |
| @@ -1256,10 +1383,13 @@ CONFIG_JBD=y | |||
| 1256 | # CONFIG_REISERFS_FS is not set | 1383 | # CONFIG_REISERFS_FS is not set |
| 1257 | # CONFIG_JFS_FS is not set | 1384 | # CONFIG_JFS_FS is not set |
| 1258 | CONFIG_FS_POSIX_ACL=y | 1385 | CONFIG_FS_POSIX_ACL=y |
| 1259 | CONFIG_FILE_LOCKING=y | ||
| 1260 | # CONFIG_XFS_FS is not set | 1386 | # CONFIG_XFS_FS is not set |
| 1387 | # CONFIG_GFS2_FS is not set | ||
| 1261 | # CONFIG_OCFS2_FS is not set | 1388 | # CONFIG_OCFS2_FS is not set |
| 1262 | # CONFIG_BTRFS_FS is not set | 1389 | # CONFIG_BTRFS_FS is not set |
| 1390 | # CONFIG_NILFS2_FS is not set | ||
| 1391 | CONFIG_FILE_LOCKING=y | ||
| 1392 | CONFIG_FSNOTIFY=y | ||
| 1263 | CONFIG_DNOTIFY=y | 1393 | CONFIG_DNOTIFY=y |
| 1264 | CONFIG_INOTIFY=y | 1394 | CONFIG_INOTIFY=y |
| 1265 | CONFIG_INOTIFY_USER=y | 1395 | CONFIG_INOTIFY_USER=y |
| @@ -1319,6 +1449,12 @@ CONFIG_JFFS2_ZLIB=y | |||
| 1319 | # CONFIG_JFFS2_LZO is not set | 1449 | # CONFIG_JFFS2_LZO is not set |
| 1320 | CONFIG_JFFS2_RTIME=y | 1450 | CONFIG_JFFS2_RTIME=y |
| 1321 | # CONFIG_JFFS2_RUBIN is not set | 1451 | # CONFIG_JFFS2_RUBIN is not set |
| 1452 | CONFIG_UBIFS_FS=y | ||
| 1453 | # CONFIG_UBIFS_FS_XATTR is not set | ||
| 1454 | # CONFIG_UBIFS_FS_ADVANCED_COMPR is not set | ||
| 1455 | CONFIG_UBIFS_FS_LZO=y | ||
| 1456 | CONFIG_UBIFS_FS_ZLIB=y | ||
| 1457 | # CONFIG_UBIFS_FS_DEBUG is not set | ||
| 1322 | # CONFIG_CRAMFS is not set | 1458 | # CONFIG_CRAMFS is not set |
| 1323 | # CONFIG_SQUASHFS is not set | 1459 | # CONFIG_SQUASHFS is not set |
| 1324 | # CONFIG_VXFS_FS is not set | 1460 | # CONFIG_VXFS_FS is not set |
| @@ -1329,12 +1465,12 @@ CONFIG_JFFS2_RTIME=y | |||
| 1329 | # CONFIG_ROMFS_FS is not set | 1465 | # CONFIG_ROMFS_FS is not set |
| 1330 | # CONFIG_SYSV_FS is not set | 1466 | # CONFIG_SYSV_FS is not set |
| 1331 | # CONFIG_UFS_FS is not set | 1467 | # CONFIG_UFS_FS is not set |
| 1332 | # CONFIG_NILFS2_FS is not set | ||
| 1333 | CONFIG_NETWORK_FILESYSTEMS=y | 1468 | CONFIG_NETWORK_FILESYSTEMS=y |
| 1334 | CONFIG_NFS_FS=y | 1469 | CONFIG_NFS_FS=y |
| 1335 | CONFIG_NFS_V3=y | 1470 | CONFIG_NFS_V3=y |
| 1336 | CONFIG_NFS_V3_ACL=y | 1471 | CONFIG_NFS_V3_ACL=y |
| 1337 | CONFIG_NFS_V4=y | 1472 | CONFIG_NFS_V4=y |
| 1473 | # CONFIG_NFS_V4_1 is not set | ||
| 1338 | CONFIG_ROOT_NFS=y | 1474 | CONFIG_ROOT_NFS=y |
| 1339 | # CONFIG_NFSD is not set | 1475 | # CONFIG_NFSD is not set |
| 1340 | CONFIG_LOCKD=y | 1476 | CONFIG_LOCKD=y |
| @@ -1378,7 +1514,7 @@ CONFIG_MSDOS_PARTITION=y | |||
| 1378 | # CONFIG_KARMA_PARTITION is not set | 1514 | # CONFIG_KARMA_PARTITION is not set |
| 1379 | # CONFIG_EFI_PARTITION is not set | 1515 | # CONFIG_EFI_PARTITION is not set |
| 1380 | # CONFIG_SYSV68_PARTITION is not set | 1516 | # CONFIG_SYSV68_PARTITION is not set |
| 1381 | CONFIG_NLS=m | 1517 | CONFIG_NLS=y |
| 1382 | CONFIG_NLS_DEFAULT="iso8859-1" | 1518 | CONFIG_NLS_DEFAULT="iso8859-1" |
| 1383 | CONFIG_NLS_CODEPAGE_437=m | 1519 | CONFIG_NLS_CODEPAGE_437=m |
| 1384 | # CONFIG_NLS_CODEPAGE_737 is not set | 1520 | # CONFIG_NLS_CODEPAGE_737 is not set |
| @@ -1428,6 +1564,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y | |||
| 1428 | CONFIG_ENABLE_MUST_CHECK=y | 1564 | CONFIG_ENABLE_MUST_CHECK=y |
| 1429 | CONFIG_FRAME_WARN=1024 | 1565 | CONFIG_FRAME_WARN=1024 |
| 1430 | # CONFIG_MAGIC_SYSRQ is not set | 1566 | # CONFIG_MAGIC_SYSRQ is not set |
| 1567 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 1431 | # CONFIG_UNUSED_SYMBOLS is not set | 1568 | # CONFIG_UNUSED_SYMBOLS is not set |
| 1432 | CONFIG_DEBUG_FS=y | 1569 | CONFIG_DEBUG_FS=y |
| 1433 | # CONFIG_HEADERS_CHECK is not set | 1570 | # CONFIG_HEADERS_CHECK is not set |
| @@ -1441,6 +1578,7 @@ CONFIG_DEBUG_KERNEL=y | |||
| 1441 | # CONFIG_DEBUG_OBJECTS is not set | 1578 | # CONFIG_DEBUG_OBJECTS is not set |
| 1442 | # CONFIG_SLUB_DEBUG_ON is not set | 1579 | # CONFIG_SLUB_DEBUG_ON is not set |
| 1443 | # CONFIG_SLUB_STATS is not set | 1580 | # CONFIG_SLUB_STATS is not set |
| 1581 | # CONFIG_DEBUG_KMEMLEAK is not set | ||
| 1444 | # CONFIG_DEBUG_RT_MUTEXES is not set | 1582 | # CONFIG_DEBUG_RT_MUTEXES is not set |
| 1445 | # CONFIG_RT_MUTEX_TESTER is not set | 1583 | # CONFIG_RT_MUTEX_TESTER is not set |
| 1446 | # CONFIG_DEBUG_SPINLOCK is not set | 1584 | # CONFIG_DEBUG_SPINLOCK is not set |
| @@ -1460,32 +1598,20 @@ CONFIG_DEBUG_MEMORY_INIT=y | |||
| 1460 | # CONFIG_DEBUG_LIST is not set | 1598 | # CONFIG_DEBUG_LIST is not set |
| 1461 | # CONFIG_DEBUG_SG is not set | 1599 | # CONFIG_DEBUG_SG is not set |
| 1462 | # CONFIG_DEBUG_NOTIFIERS is not set | 1600 | # CONFIG_DEBUG_NOTIFIERS is not set |
| 1601 | # CONFIG_DEBUG_CREDENTIALS is not set | ||
| 1463 | # CONFIG_BOOT_PRINTK_DELAY is not set | 1602 | # CONFIG_BOOT_PRINTK_DELAY is not set |
| 1464 | # CONFIG_RCU_TORTURE_TEST is not set | 1603 | # CONFIG_RCU_TORTURE_TEST is not set |
| 1465 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | 1604 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set |
| 1466 | # CONFIG_BACKTRACE_SELF_TEST is not set | 1605 | # CONFIG_BACKTRACE_SELF_TEST is not set |
| 1467 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | 1606 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set |
| 1607 | # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set | ||
| 1468 | # CONFIG_FAULT_INJECTION is not set | 1608 | # CONFIG_FAULT_INJECTION is not set |
| 1469 | # CONFIG_LATENCYTOP is not set | 1609 | # CONFIG_LATENCYTOP is not set |
| 1470 | CONFIG_SYSCTL_SYSCALL_CHECK=y | 1610 | CONFIG_SYSCTL_SYSCALL_CHECK=y |
| 1471 | # CONFIG_PAGE_POISONING is not set | 1611 | # CONFIG_PAGE_POISONING is not set |
| 1472 | CONFIG_HAVE_FUNCTION_TRACER=y | 1612 | CONFIG_HAVE_FUNCTION_TRACER=y |
| 1473 | CONFIG_TRACING_SUPPORT=y | 1613 | CONFIG_TRACING_SUPPORT=y |
| 1474 | 1614 | # CONFIG_FTRACE is not set | |
| 1475 | # | ||
| 1476 | # Tracers | ||
| 1477 | # | ||
| 1478 | # CONFIG_FUNCTION_TRACER is not set | ||
| 1479 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 1480 | # CONFIG_SCHED_TRACER is not set | ||
| 1481 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | ||
| 1482 | # CONFIG_EVENT_TRACER is not set | ||
| 1483 | # CONFIG_BOOT_TRACER is not set | ||
| 1484 | # CONFIG_TRACE_BRANCH_PROFILING is not set | ||
| 1485 | # CONFIG_STACK_TRACER is not set | ||
| 1486 | # CONFIG_KMEMTRACE is not set | ||
| 1487 | # CONFIG_WORKQUEUE_TRACER is not set | ||
| 1488 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 1489 | # CONFIG_DYNAMIC_DEBUG is not set | 1615 | # CONFIG_DYNAMIC_DEBUG is not set |
| 1490 | # CONFIG_SAMPLES is not set | 1616 | # CONFIG_SAMPLES is not set |
| 1491 | CONFIG_HAVE_ARCH_KGDB=y | 1617 | CONFIG_HAVE_ARCH_KGDB=y |
| @@ -1509,7 +1635,6 @@ CONFIG_CRYPTO=y | |||
| 1509 | # | 1635 | # |
| 1510 | # Crypto core or helper | 1636 | # Crypto core or helper |
| 1511 | # | 1637 | # |
| 1512 | # CONFIG_CRYPTO_FIPS is not set | ||
| 1513 | CONFIG_CRYPTO_ALGAPI=y | 1638 | CONFIG_CRYPTO_ALGAPI=y |
| 1514 | CONFIG_CRYPTO_ALGAPI2=y | 1639 | CONFIG_CRYPTO_ALGAPI2=y |
| 1515 | CONFIG_CRYPTO_AEAD2=y | 1640 | CONFIG_CRYPTO_AEAD2=y |
| @@ -1551,11 +1676,13 @@ CONFIG_CRYPTO_ECB=m | |||
| 1551 | # | 1676 | # |
| 1552 | # CONFIG_CRYPTO_HMAC is not set | 1677 | # CONFIG_CRYPTO_HMAC is not set |
| 1553 | # CONFIG_CRYPTO_XCBC is not set | 1678 | # CONFIG_CRYPTO_XCBC is not set |
| 1679 | # CONFIG_CRYPTO_VMAC is not set | ||
| 1554 | 1680 | ||
| 1555 | # | 1681 | # |
| 1556 | # Digest | 1682 | # Digest |
| 1557 | # | 1683 | # |
| 1558 | # CONFIG_CRYPTO_CRC32C is not set | 1684 | # CONFIG_CRYPTO_CRC32C is not set |
| 1685 | # CONFIG_CRYPTO_GHASH is not set | ||
| 1559 | # CONFIG_CRYPTO_MD4 is not set | 1686 | # CONFIG_CRYPTO_MD4 is not set |
| 1560 | CONFIG_CRYPTO_MD5=y | 1687 | CONFIG_CRYPTO_MD5=y |
| 1561 | CONFIG_CRYPTO_MICHAEL_MIC=m | 1688 | CONFIG_CRYPTO_MICHAEL_MIC=m |
| @@ -1591,9 +1718,9 @@ CONFIG_CRYPTO_DES=y | |||
| 1591 | # | 1718 | # |
| 1592 | # Compression | 1719 | # Compression |
| 1593 | # | 1720 | # |
| 1594 | # CONFIG_CRYPTO_DEFLATE is not set | 1721 | CONFIG_CRYPTO_DEFLATE=y |
| 1595 | # CONFIG_CRYPTO_ZLIB is not set | 1722 | # CONFIG_CRYPTO_ZLIB is not set |
| 1596 | # CONFIG_CRYPTO_LZO is not set | 1723 | CONFIG_CRYPTO_LZO=y |
| 1597 | 1724 | ||
| 1598 | # | 1725 | # |
| 1599 | # Random Number Generation | 1726 | # Random Number Generation |
| @@ -1608,7 +1735,7 @@ CONFIG_CRYPTO_DES=y | |||
| 1608 | CONFIG_BITREVERSE=y | 1735 | CONFIG_BITREVERSE=y |
| 1609 | CONFIG_GENERIC_FIND_LAST_BIT=y | 1736 | CONFIG_GENERIC_FIND_LAST_BIT=y |
| 1610 | # CONFIG_CRC_CCITT is not set | 1737 | # CONFIG_CRC_CCITT is not set |
| 1611 | # CONFIG_CRC16 is not set | 1738 | CONFIG_CRC16=y |
| 1612 | CONFIG_CRC_T10DIF=y | 1739 | CONFIG_CRC_T10DIF=y |
| 1613 | # CONFIG_CRC_ITU_T is not set | 1740 | # CONFIG_CRC_ITU_T is not set |
| 1614 | CONFIG_CRC32=y | 1741 | CONFIG_CRC32=y |
| @@ -1616,6 +1743,8 @@ CONFIG_CRC32=y | |||
| 1616 | # CONFIG_LIBCRC32C is not set | 1743 | # CONFIG_LIBCRC32C is not set |
| 1617 | CONFIG_ZLIB_INFLATE=y | 1744 | CONFIG_ZLIB_INFLATE=y |
| 1618 | CONFIG_ZLIB_DEFLATE=y | 1745 | CONFIG_ZLIB_DEFLATE=y |
| 1746 | CONFIG_LZO_COMPRESS=y | ||
| 1747 | CONFIG_LZO_DECOMPRESS=y | ||
| 1619 | CONFIG_DECOMPRESS_GZIP=y | 1748 | CONFIG_DECOMPRESS_GZIP=y |
| 1620 | CONFIG_DECOMPRESS_BZIP2=y | 1749 | CONFIG_DECOMPRESS_BZIP2=y |
| 1621 | CONFIG_DECOMPRESS_LZMA=y | 1750 | CONFIG_DECOMPRESS_LZMA=y |
diff --git a/arch/arm/configs/dove_defconfig b/arch/arm/configs/dove_defconfig new file mode 100644 index 00000000000..b3a491675d5 --- /dev/null +++ b/arch/arm/configs/dove_defconfig | |||
| @@ -0,0 +1,1620 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.32-rc6 | ||
| 4 | # Tue Nov 24 13:53:37 2009 | ||
| 5 | # | ||
| 6 | CONFIG_ARM=y | ||
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
| 8 | CONFIG_GENERIC_GPIO=y | ||
| 9 | CONFIG_GENERIC_TIME=y | ||
| 10 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 11 | CONFIG_GENERIC_HARDIRQS=y | ||
| 12 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 13 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 14 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 15 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 16 | CONFIG_HARDIRQS_SW_RESEND=y | ||
| 17 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 18 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 19 | CONFIG_GENERIC_HWEIGHT=y | ||
| 20 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
| 21 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 22 | CONFIG_VECTORS_BASE=0xffff0000 | ||
| 23 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 24 | CONFIG_CONSTRUCTORS=y | ||
| 25 | |||
| 26 | # | ||
| 27 | # General setup | ||
| 28 | # | ||
| 29 | CONFIG_EXPERIMENTAL=y | ||
| 30 | CONFIG_BROKEN_ON_SMP=y | ||
| 31 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 32 | CONFIG_LOCALVERSION="" | ||
| 33 | CONFIG_LOCALVERSION_AUTO=y | ||
| 34 | CONFIG_SWAP=y | ||
| 35 | CONFIG_SYSVIPC=y | ||
| 36 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 37 | # CONFIG_POSIX_MQUEUE is not set | ||
| 38 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
| 39 | # CONFIG_TASKSTATS is not set | ||
| 40 | # CONFIG_AUDIT is not set | ||
| 41 | |||
| 42 | # | ||
| 43 | # RCU Subsystem | ||
| 44 | # | ||
| 45 | CONFIG_TREE_RCU=y | ||
| 46 | # CONFIG_TREE_PREEMPT_RCU is not set | ||
| 47 | # CONFIG_RCU_TRACE is not set | ||
| 48 | CONFIG_RCU_FANOUT=32 | ||
| 49 | # CONFIG_RCU_FANOUT_EXACT is not set | ||
| 50 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 51 | # CONFIG_IKCONFIG is not set | ||
| 52 | CONFIG_LOG_BUF_SHIFT=14 | ||
| 53 | # CONFIG_GROUP_SCHED is not set | ||
| 54 | # CONFIG_CGROUPS is not set | ||
| 55 | # CONFIG_SYSFS_DEPRECATED_V2 is not set | ||
| 56 | # CONFIG_RELAY is not set | ||
| 57 | # CONFIG_NAMESPACES is not set | ||
| 58 | # CONFIG_BLK_DEV_INITRD is not set | ||
| 59 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 60 | CONFIG_SYSCTL=y | ||
| 61 | CONFIG_ANON_INODES=y | ||
| 62 | CONFIG_EMBEDDED=y | ||
| 63 | CONFIG_UID16=y | ||
| 64 | CONFIG_SYSCTL_SYSCALL=y | ||
| 65 | CONFIG_KALLSYMS=y | ||
| 66 | # CONFIG_KALLSYMS_ALL is not set | ||
| 67 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
| 68 | CONFIG_HOTPLUG=y | ||
| 69 | CONFIG_PRINTK=y | ||
| 70 | CONFIG_BUG=y | ||
| 71 | CONFIG_ELF_CORE=y | ||
| 72 | CONFIG_BASE_FULL=y | ||
| 73 | CONFIG_FUTEX=y | ||
| 74 | CONFIG_EPOLL=y | ||
| 75 | CONFIG_SIGNALFD=y | ||
| 76 | CONFIG_TIMERFD=y | ||
| 77 | CONFIG_EVENTFD=y | ||
| 78 | CONFIG_SHMEM=y | ||
| 79 | CONFIG_AIO=y | ||
| 80 | |||
| 81 | # | ||
| 82 | # Kernel Performance Events And Counters | ||
| 83 | # | ||
| 84 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 85 | CONFIG_PCI_QUIRKS=y | ||
| 86 | CONFIG_COMPAT_BRK=y | ||
| 87 | CONFIG_SLAB=y | ||
| 88 | # CONFIG_SLUB is not set | ||
| 89 | # CONFIG_SLOB is not set | ||
| 90 | # CONFIG_PROFILING is not set | ||
| 91 | CONFIG_HAVE_OPROFILE=y | ||
| 92 | # CONFIG_KPROBES is not set | ||
| 93 | CONFIG_HAVE_KPROBES=y | ||
| 94 | CONFIG_HAVE_KRETPROBES=y | ||
| 95 | |||
| 96 | # | ||
| 97 | # GCOV-based kernel profiling | ||
| 98 | # | ||
| 99 | # CONFIG_GCOV_KERNEL is not set | ||
| 100 | # CONFIG_SLOW_WORK is not set | ||
| 101 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 102 | CONFIG_SLABINFO=y | ||
| 103 | CONFIG_RT_MUTEXES=y | ||
| 104 | CONFIG_BASE_SMALL=0 | ||
| 105 | CONFIG_MODULES=y | ||
| 106 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 107 | CONFIG_MODULE_UNLOAD=y | ||
| 108 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
| 109 | # CONFIG_MODVERSIONS is not set | ||
| 110 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
| 111 | CONFIG_BLOCK=y | ||
| 112 | CONFIG_LBDAF=y | ||
| 113 | # CONFIG_BLK_DEV_BSG is not set | ||
| 114 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 115 | |||
| 116 | # | ||
| 117 | # IO Schedulers | ||
| 118 | # | ||
| 119 | CONFIG_IOSCHED_NOOP=y | ||
| 120 | CONFIG_IOSCHED_AS=y | ||
| 121 | CONFIG_IOSCHED_DEADLINE=y | ||
| 122 | CONFIG_IOSCHED_CFQ=y | ||
| 123 | # CONFIG_DEFAULT_AS is not set | ||
| 124 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 125 | CONFIG_DEFAULT_CFQ=y | ||
| 126 | # CONFIG_DEFAULT_NOOP is not set | ||
| 127 | CONFIG_DEFAULT_IOSCHED="cfq" | ||
| 128 | # CONFIG_FREEZER is not set | ||
| 129 | |||
| 130 | # | ||
| 131 | # System Type | ||
| 132 | # | ||
| 133 | CONFIG_MMU=y | ||
| 134 | # CONFIG_ARCH_AAEC2000 is not set | ||
| 135 | # CONFIG_ARCH_INTEGRATOR is not set | ||
| 136 | # CONFIG_ARCH_REALVIEW is not set | ||
| 137 | # CONFIG_ARCH_VERSATILE is not set | ||
| 138 | # CONFIG_ARCH_AT91 is not set | ||
| 139 | # CONFIG_ARCH_CLPS711X is not set | ||
| 140 | # CONFIG_ARCH_GEMINI is not set | ||
| 141 | # CONFIG_ARCH_EBSA110 is not set | ||
| 142 | # CONFIG_ARCH_EP93XX is not set | ||
| 143 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
| 144 | # CONFIG_ARCH_MXC is not set | ||
| 145 | # CONFIG_ARCH_STMP3XXX is not set | ||
| 146 | # CONFIG_ARCH_NETX is not set | ||
| 147 | # CONFIG_ARCH_H720X is not set | ||
| 148 | # CONFIG_ARCH_NOMADIK is not set | ||
| 149 | # CONFIG_ARCH_IOP13XX is not set | ||
| 150 | # CONFIG_ARCH_IOP32X is not set | ||
| 151 | # CONFIG_ARCH_IOP33X is not set | ||
| 152 | # CONFIG_ARCH_IXP23XX is not set | ||
| 153 | # CONFIG_ARCH_IXP2000 is not set | ||
| 154 | # CONFIG_ARCH_IXP4XX is not set | ||
| 155 | # CONFIG_ARCH_L7200 is not set | ||
| 156 | CONFIG_ARCH_DOVE=y | ||
| 157 | # CONFIG_ARCH_KIRKWOOD is not set | ||
| 158 | # CONFIG_ARCH_LOKI is not set | ||
| 159 | # CONFIG_ARCH_MV78XX0 is not set | ||
| 160 | # CONFIG_ARCH_ORION5X is not set | ||
| 161 | # CONFIG_ARCH_MMP is not set | ||
| 162 | # CONFIG_ARCH_KS8695 is not set | ||
| 163 | # CONFIG_ARCH_NS9XXX is not set | ||
| 164 | # CONFIG_ARCH_W90X900 is not set | ||
| 165 | # CONFIG_ARCH_PNX4008 is not set | ||
| 166 | # CONFIG_ARCH_PXA is not set | ||
| 167 | # CONFIG_ARCH_MSM is not set | ||
| 168 | # CONFIG_ARCH_RPC is not set | ||
| 169 | # CONFIG_ARCH_SA1100 is not set | ||
| 170 | # CONFIG_ARCH_S3C2410 is not set | ||
| 171 | # CONFIG_ARCH_S3C64XX is not set | ||
| 172 | # CONFIG_ARCH_S5PC1XX is not set | ||
| 173 | # CONFIG_ARCH_SHARK is not set | ||
| 174 | # CONFIG_ARCH_LH7A40X is not set | ||
| 175 | # CONFIG_ARCH_U300 is not set | ||
| 176 | # CONFIG_ARCH_DAVINCI is not set | ||
| 177 | # CONFIG_ARCH_OMAP is not set | ||
| 178 | # CONFIG_ARCH_BCMRING is not set | ||
| 179 | |||
| 180 | # | ||
| 181 | # Marvell Dove Implementations | ||
| 182 | # | ||
| 183 | CONFIG_MACH_DOVE_DB=y | ||
| 184 | CONFIG_PLAT_ORION=y | ||
| 185 | |||
| 186 | # | ||
| 187 | # Processor Type | ||
| 188 | # | ||
| 189 | CONFIG_CPU_32=y | ||
| 190 | CONFIG_CPU_V6=y | ||
| 191 | CONFIG_CPU_32v6K=y | ||
| 192 | CONFIG_CPU_32v6=y | ||
| 193 | CONFIG_CPU_ABRT_EV6=y | ||
| 194 | CONFIG_CPU_PABRT_V6=y | ||
| 195 | CONFIG_CPU_CACHE_V6=y | ||
| 196 | CONFIG_CPU_CACHE_VIPT=y | ||
| 197 | CONFIG_CPU_COPY_V6=y | ||
| 198 | CONFIG_CPU_TLB_V6=y | ||
| 199 | CONFIG_CPU_HAS_ASID=y | ||
| 200 | CONFIG_CPU_CP15=y | ||
| 201 | CONFIG_CPU_CP15_MMU=y | ||
| 202 | |||
| 203 | # | ||
| 204 | # Processor Features | ||
| 205 | # | ||
| 206 | CONFIG_ARM_THUMB=y | ||
| 207 | # CONFIG_CPU_ICACHE_DISABLE is not set | ||
| 208 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
| 209 | # CONFIG_CPU_BPREDICT_DISABLE is not set | ||
| 210 | CONFIG_OUTER_CACHE=y | ||
| 211 | CONFIG_CACHE_TAUROS2=y | ||
| 212 | CONFIG_ARM_L1_CACHE_SHIFT=5 | ||
| 213 | # CONFIG_ARM_ERRATA_411920 is not set | ||
| 214 | |||
| 215 | # | ||
| 216 | # Bus support | ||
| 217 | # | ||
| 218 | CONFIG_PCI=y | ||
| 219 | CONFIG_PCI_SYSCALL=y | ||
| 220 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 221 | CONFIG_PCI_LEGACY=y | ||
| 222 | # CONFIG_PCI_DEBUG is not set | ||
| 223 | # CONFIG_PCI_STUB is not set | ||
| 224 | # CONFIG_PCI_IOV is not set | ||
| 225 | # CONFIG_PCCARD is not set | ||
| 226 | |||
| 227 | # | ||
| 228 | # Kernel Features | ||
| 229 | # | ||
| 230 | CONFIG_TICK_ONESHOT=y | ||
| 231 | CONFIG_NO_HZ=y | ||
| 232 | CONFIG_HIGH_RES_TIMERS=y | ||
| 233 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 234 | CONFIG_VMSPLIT_3G=y | ||
| 235 | # CONFIG_VMSPLIT_2G is not set | ||
| 236 | # CONFIG_VMSPLIT_1G is not set | ||
| 237 | CONFIG_PAGE_OFFSET=0xC0000000 | ||
| 238 | CONFIG_PREEMPT_NONE=y | ||
| 239 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
| 240 | # CONFIG_PREEMPT is not set | ||
| 241 | CONFIG_HZ=100 | ||
| 242 | CONFIG_AEABI=y | ||
| 243 | CONFIG_OABI_COMPAT=y | ||
| 244 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | ||
| 245 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | ||
| 246 | # CONFIG_HIGHMEM is not set | ||
| 247 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 248 | CONFIG_FLATMEM_MANUAL=y | ||
| 249 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 250 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 251 | CONFIG_FLATMEM=y | ||
| 252 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 253 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 254 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
| 255 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
| 256 | CONFIG_ZONE_DMA_FLAG=0 | ||
| 257 | CONFIG_VIRT_TO_BUS=y | ||
| 258 | CONFIG_HAVE_MLOCK=y | ||
| 259 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
| 260 | # CONFIG_KSM is not set | ||
| 261 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
| 262 | CONFIG_ALIGNMENT_TRAP=y | ||
| 263 | # CONFIG_UACCESS_WITH_MEMCPY is not set | ||
| 264 | |||
| 265 | # | ||
| 266 | # Boot options | ||
| 267 | # | ||
| 268 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
| 269 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
| 270 | CONFIG_CMDLINE="" | ||
| 271 | # CONFIG_XIP_KERNEL is not set | ||
| 272 | # CONFIG_KEXEC is not set | ||
| 273 | |||
| 274 | # | ||
| 275 | # CPU Power Management | ||
| 276 | # | ||
| 277 | # CONFIG_CPU_IDLE is not set | ||
| 278 | |||
| 279 | # | ||
| 280 | # Floating point emulation | ||
| 281 | # | ||
| 282 | |||
| 283 | # | ||
| 284 | # At least one emulation must be selected | ||
| 285 | # | ||
| 286 | # CONFIG_FPE_NWFPE is not set | ||
| 287 | # CONFIG_FPE_FASTFPE is not set | ||
| 288 | CONFIG_VFP=y | ||
| 289 | |||
| 290 | # | ||
| 291 | # Userspace binary formats | ||
| 292 | # | ||
| 293 | CONFIG_BINFMT_ELF=y | ||
| 294 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 295 | CONFIG_HAVE_AOUT=y | ||
| 296 | # CONFIG_BINFMT_AOUT is not set | ||
| 297 | # CONFIG_BINFMT_MISC is not set | ||
| 298 | |||
| 299 | # | ||
| 300 | # Power management options | ||
| 301 | # | ||
| 302 | # CONFIG_PM is not set | ||
| 303 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
| 304 | CONFIG_NET=y | ||
| 305 | |||
| 306 | # | ||
| 307 | # Networking options | ||
| 308 | # | ||
| 309 | CONFIG_PACKET=y | ||
| 310 | CONFIG_PACKET_MMAP=y | ||
| 311 | CONFIG_UNIX=y | ||
| 312 | CONFIG_XFRM=y | ||
| 313 | # CONFIG_XFRM_USER is not set | ||
| 314 | # CONFIG_XFRM_SUB_POLICY is not set | ||
| 315 | # CONFIG_XFRM_MIGRATE is not set | ||
| 316 | # CONFIG_XFRM_STATISTICS is not set | ||
| 317 | # CONFIG_NET_KEY is not set | ||
| 318 | CONFIG_INET=y | ||
| 319 | CONFIG_IP_MULTICAST=y | ||
| 320 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 321 | CONFIG_IP_FIB_HASH=y | ||
| 322 | CONFIG_IP_PNP=y | ||
| 323 | CONFIG_IP_PNP_DHCP=y | ||
| 324 | CONFIG_IP_PNP_BOOTP=y | ||
| 325 | # CONFIG_IP_PNP_RARP is not set | ||
| 326 | # CONFIG_NET_IPIP is not set | ||
| 327 | # CONFIG_NET_IPGRE is not set | ||
| 328 | # CONFIG_IP_MROUTE is not set | ||
| 329 | # CONFIG_ARPD is not set | ||
| 330 | # CONFIG_SYN_COOKIES is not set | ||
| 331 | # CONFIG_INET_AH is not set | ||
| 332 | # CONFIG_INET_ESP is not set | ||
| 333 | # CONFIG_INET_IPCOMP is not set | ||
| 334 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
| 335 | # CONFIG_INET_TUNNEL is not set | ||
| 336 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
| 337 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
| 338 | CONFIG_INET_XFRM_MODE_BEET=y | ||
| 339 | CONFIG_INET_LRO=y | ||
| 340 | CONFIG_INET_DIAG=y | ||
| 341 | CONFIG_INET_TCP_DIAG=y | ||
| 342 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
| 343 | CONFIG_TCP_CONG_CUBIC=y | ||
| 344 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 345 | # CONFIG_TCP_MD5SIG is not set | ||
| 346 | # CONFIG_IPV6 is not set | ||
| 347 | # CONFIG_NETWORK_SECMARK is not set | ||
| 348 | # CONFIG_NETFILTER is not set | ||
| 349 | # CONFIG_IP_DCCP is not set | ||
| 350 | # CONFIG_IP_SCTP is not set | ||
| 351 | # CONFIG_RDS is not set | ||
| 352 | # CONFIG_TIPC is not set | ||
| 353 | # CONFIG_ATM is not set | ||
| 354 | # CONFIG_BRIDGE is not set | ||
| 355 | # CONFIG_NET_DSA is not set | ||
| 356 | # CONFIG_VLAN_8021Q is not set | ||
| 357 | # CONFIG_DECNET is not set | ||
| 358 | # CONFIG_LLC2 is not set | ||
| 359 | # CONFIG_IPX is not set | ||
| 360 | # CONFIG_ATALK is not set | ||
| 361 | # CONFIG_X25 is not set | ||
| 362 | # CONFIG_LAPB is not set | ||
| 363 | # CONFIG_ECONET is not set | ||
| 364 | # CONFIG_WAN_ROUTER is not set | ||
| 365 | # CONFIG_PHONET is not set | ||
| 366 | # CONFIG_IEEE802154 is not set | ||
| 367 | # CONFIG_NET_SCHED is not set | ||
| 368 | # CONFIG_DCB is not set | ||
| 369 | |||
| 370 | # | ||
| 371 | # Network testing | ||
| 372 | # | ||
| 373 | # CONFIG_NET_PKTGEN is not set | ||
| 374 | # CONFIG_HAMRADIO is not set | ||
| 375 | # CONFIG_CAN is not set | ||
| 376 | # CONFIG_IRDA is not set | ||
| 377 | # CONFIG_BT is not set | ||
| 378 | # CONFIG_AF_RXRPC is not set | ||
| 379 | # CONFIG_WIRELESS is not set | ||
| 380 | # CONFIG_WIMAX is not set | ||
| 381 | # CONFIG_RFKILL is not set | ||
| 382 | # CONFIG_NET_9P is not set | ||
| 383 | |||
| 384 | # | ||
| 385 | # Device Drivers | ||
| 386 | # | ||
| 387 | |||
| 388 | # | ||
| 389 | # Generic Driver Options | ||
| 390 | # | ||
| 391 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
| 392 | # CONFIG_DEVTMPFS is not set | ||
| 393 | CONFIG_STANDALONE=y | ||
| 394 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 395 | CONFIG_FW_LOADER=y | ||
| 396 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
| 397 | CONFIG_EXTRA_FIRMWARE="" | ||
| 398 | # CONFIG_DEBUG_DRIVER is not set | ||
| 399 | # CONFIG_DEBUG_DEVRES is not set | ||
| 400 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 401 | # CONFIG_CONNECTOR is not set | ||
| 402 | CONFIG_MTD=y | ||
| 403 | # CONFIG_MTD_DEBUG is not set | ||
| 404 | # CONFIG_MTD_TESTS is not set | ||
| 405 | # CONFIG_MTD_CONCAT is not set | ||
| 406 | CONFIG_MTD_PARTITIONS=y | ||
| 407 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
| 408 | CONFIG_MTD_CMDLINE_PARTS=y | ||
| 409 | # CONFIG_MTD_AFS_PARTS is not set | ||
| 410 | # CONFIG_MTD_AR7_PARTS is not set | ||
| 411 | |||
| 412 | # | ||
| 413 | # User Modules And Translation Layers | ||
| 414 | # | ||
| 415 | CONFIG_MTD_CHAR=y | ||
| 416 | CONFIG_MTD_BLKDEVS=y | ||
| 417 | CONFIG_MTD_BLOCK=y | ||
| 418 | # CONFIG_FTL is not set | ||
| 419 | # CONFIG_NFTL is not set | ||
| 420 | # CONFIG_INFTL is not set | ||
| 421 | # CONFIG_RFD_FTL is not set | ||
| 422 | # CONFIG_SSFDC is not set | ||
| 423 | # CONFIG_MTD_OOPS is not set | ||
| 424 | |||
| 425 | # | ||
| 426 | # RAM/ROM/Flash chip drivers | ||
| 427 | # | ||
| 428 | CONFIG_MTD_CFI=y | ||
| 429 | CONFIG_MTD_JEDECPROBE=y | ||
| 430 | CONFIG_MTD_GEN_PROBE=y | ||
| 431 | CONFIG_MTD_CFI_ADV_OPTIONS=y | ||
| 432 | CONFIG_MTD_CFI_NOSWAP=y | ||
| 433 | # CONFIG_MTD_CFI_BE_BYTE_SWAP is not set | ||
| 434 | # CONFIG_MTD_CFI_LE_BYTE_SWAP is not set | ||
| 435 | CONFIG_MTD_CFI_GEOMETRY=y | ||
| 436 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
| 437 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
| 438 | # CONFIG_MTD_MAP_BANK_WIDTH_4 is not set | ||
| 439 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
| 440 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
| 441 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
| 442 | CONFIG_MTD_CFI_I1=y | ||
| 443 | CONFIG_MTD_CFI_I2=y | ||
| 444 | # CONFIG_MTD_CFI_I4 is not set | ||
| 445 | # CONFIG_MTD_CFI_I8 is not set | ||
| 446 | # CONFIG_MTD_OTP is not set | ||
| 447 | CONFIG_MTD_CFI_INTELEXT=y | ||
| 448 | # CONFIG_MTD_CFI_AMDSTD is not set | ||
| 449 | CONFIG_MTD_CFI_STAA=y | ||
| 450 | CONFIG_MTD_CFI_UTIL=y | ||
| 451 | # CONFIG_MTD_RAM is not set | ||
| 452 | # CONFIG_MTD_ROM is not set | ||
| 453 | # CONFIG_MTD_ABSENT is not set | ||
| 454 | |||
| 455 | # | ||
| 456 | # Mapping drivers for chip access | ||
| 457 | # | ||
| 458 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
| 459 | CONFIG_MTD_PHYSMAP=y | ||
| 460 | # CONFIG_MTD_PHYSMAP_COMPAT is not set | ||
| 461 | # CONFIG_MTD_ARM_INTEGRATOR is not set | ||
| 462 | # CONFIG_MTD_IMPA7 is not set | ||
| 463 | # CONFIG_MTD_INTEL_VR_NOR is not set | ||
| 464 | # CONFIG_MTD_PLATRAM is not set | ||
| 465 | |||
| 466 | # | ||
| 467 | # Self-contained MTD device drivers | ||
| 468 | # | ||
| 469 | # CONFIG_MTD_PMC551 is not set | ||
| 470 | # CONFIG_MTD_DATAFLASH is not set | ||
| 471 | CONFIG_MTD_M25P80=y | ||
| 472 | CONFIG_M25PXX_USE_FAST_READ=y | ||
| 473 | # CONFIG_MTD_SST25L is not set | ||
| 474 | # CONFIG_MTD_SLRAM is not set | ||
| 475 | # CONFIG_MTD_PHRAM is not set | ||
| 476 | # CONFIG_MTD_MTDRAM is not set | ||
| 477 | # CONFIG_MTD_BLOCK2MTD is not set | ||
| 478 | |||
| 479 | # | ||
| 480 | # Disk-On-Chip Device Drivers | ||
| 481 | # | ||
| 482 | # CONFIG_MTD_DOC2000 is not set | ||
| 483 | # CONFIG_MTD_DOC2001 is not set | ||
| 484 | # CONFIG_MTD_DOC2001PLUS is not set | ||
| 485 | # CONFIG_MTD_NAND is not set | ||
| 486 | # CONFIG_MTD_ONENAND is not set | ||
| 487 | |||
| 488 | # | ||
| 489 | # LPDDR flash memory drivers | ||
| 490 | # | ||
| 491 | # CONFIG_MTD_LPDDR is not set | ||
| 492 | |||
| 493 | # | ||
| 494 | # UBI - Unsorted block images | ||
| 495 | # | ||
| 496 | CONFIG_MTD_UBI=y | ||
| 497 | CONFIG_MTD_UBI_WL_THRESHOLD=4096 | ||
| 498 | CONFIG_MTD_UBI_BEB_RESERVE=1 | ||
| 499 | # CONFIG_MTD_UBI_GLUEBI is not set | ||
| 500 | |||
| 501 | # | ||
| 502 | # UBI debugging options | ||
| 503 | # | ||
| 504 | # CONFIG_MTD_UBI_DEBUG is not set | ||
| 505 | # CONFIG_PARPORT is not set | ||
| 506 | CONFIG_BLK_DEV=y | ||
| 507 | # CONFIG_BLK_CPQ_DA is not set | ||
| 508 | # CONFIG_BLK_CPQ_CISS_DA is not set | ||
| 509 | # CONFIG_BLK_DEV_DAC960 is not set | ||
| 510 | # CONFIG_BLK_DEV_UMEM is not set | ||
| 511 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 512 | CONFIG_BLK_DEV_LOOP=y | ||
| 513 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
| 514 | # CONFIG_BLK_DEV_NBD is not set | ||
| 515 | # CONFIG_BLK_DEV_SX8 is not set | ||
| 516 | # CONFIG_BLK_DEV_UB is not set | ||
| 517 | CONFIG_BLK_DEV_RAM=y | ||
| 518 | CONFIG_BLK_DEV_RAM_COUNT=1 | ||
| 519 | CONFIG_BLK_DEV_RAM_SIZE=4096 | ||
| 520 | # CONFIG_BLK_DEV_XIP is not set | ||
| 521 | # CONFIG_CDROM_PKTCDVD is not set | ||
| 522 | # CONFIG_ATA_OVER_ETH is not set | ||
| 523 | # CONFIG_MG_DISK is not set | ||
| 524 | # CONFIG_MISC_DEVICES is not set | ||
| 525 | CONFIG_HAVE_IDE=y | ||
| 526 | # CONFIG_IDE is not set | ||
| 527 | |||
| 528 | # | ||
| 529 | # SCSI device support | ||
| 530 | # | ||
| 531 | # CONFIG_RAID_ATTRS is not set | ||
| 532 | CONFIG_SCSI=y | ||
| 533 | CONFIG_SCSI_DMA=y | ||
| 534 | # CONFIG_SCSI_TGT is not set | ||
| 535 | # CONFIG_SCSI_NETLINK is not set | ||
| 536 | # CONFIG_SCSI_PROC_FS is not set | ||
| 537 | |||
| 538 | # | ||
| 539 | # SCSI support type (disk, tape, CD-ROM) | ||
| 540 | # | ||
| 541 | CONFIG_BLK_DEV_SD=y | ||
| 542 | # CONFIG_CHR_DEV_ST is not set | ||
| 543 | # CONFIG_CHR_DEV_OSST is not set | ||
| 544 | # CONFIG_BLK_DEV_SR is not set | ||
| 545 | # CONFIG_CHR_DEV_SG is not set | ||
| 546 | # CONFIG_CHR_DEV_SCH is not set | ||
| 547 | # CONFIG_SCSI_MULTI_LUN is not set | ||
| 548 | # CONFIG_SCSI_CONSTANTS is not set | ||
| 549 | # CONFIG_SCSI_LOGGING is not set | ||
| 550 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
| 551 | CONFIG_SCSI_WAIT_SCAN=m | ||
| 552 | |||
| 553 | # | ||
| 554 | # SCSI Transports | ||
| 555 | # | ||
| 556 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
| 557 | # CONFIG_SCSI_FC_ATTRS is not set | ||
| 558 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
| 559 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
| 560 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
| 561 | # CONFIG_SCSI_LOWLEVEL is not set | ||
| 562 | # CONFIG_SCSI_DH is not set | ||
| 563 | # CONFIG_SCSI_OSD_INITIATOR is not set | ||
| 564 | CONFIG_ATA=y | ||
| 565 | # CONFIG_ATA_NONSTANDARD is not set | ||
| 566 | CONFIG_ATA_VERBOSE_ERROR=y | ||
| 567 | CONFIG_SATA_PMP=y | ||
| 568 | # CONFIG_SATA_AHCI is not set | ||
| 569 | # CONFIG_SATA_SIL24 is not set | ||
| 570 | CONFIG_ATA_SFF=y | ||
| 571 | # CONFIG_SATA_SVW is not set | ||
| 572 | # CONFIG_ATA_PIIX is not set | ||
| 573 | CONFIG_SATA_MV=y | ||
| 574 | # CONFIG_SATA_NV is not set | ||
| 575 | # CONFIG_PDC_ADMA is not set | ||
| 576 | # CONFIG_SATA_QSTOR is not set | ||
| 577 | # CONFIG_SATA_PROMISE is not set | ||
| 578 | # CONFIG_SATA_SX4 is not set | ||
| 579 | # CONFIG_SATA_SIL is not set | ||
| 580 | # CONFIG_SATA_SIS is not set | ||
| 581 | # CONFIG_SATA_ULI is not set | ||
| 582 | # CONFIG_SATA_VIA is not set | ||
| 583 | # CONFIG_SATA_VITESSE is not set | ||
| 584 | # CONFIG_SATA_INIC162X is not set | ||
| 585 | # CONFIG_PATA_ALI is not set | ||
| 586 | # CONFIG_PATA_AMD is not set | ||
| 587 | # CONFIG_PATA_ARTOP is not set | ||
| 588 | # CONFIG_PATA_ATP867X is not set | ||
| 589 | # CONFIG_PATA_ATIIXP is not set | ||
| 590 | # CONFIG_PATA_CMD640_PCI is not set | ||
| 591 | # CONFIG_PATA_CMD64X is not set | ||
| 592 | # CONFIG_PATA_CS5520 is not set | ||
| 593 | # CONFIG_PATA_CS5530 is not set | ||
| 594 | # CONFIG_PATA_CYPRESS is not set | ||
| 595 | # CONFIG_PATA_EFAR is not set | ||
| 596 | # CONFIG_ATA_GENERIC is not set | ||
| 597 | # CONFIG_PATA_HPT366 is not set | ||
| 598 | # CONFIG_PATA_HPT37X is not set | ||
| 599 | # CONFIG_PATA_HPT3X2N is not set | ||
| 600 | # CONFIG_PATA_HPT3X3 is not set | ||
| 601 | # CONFIG_PATA_IT821X is not set | ||
| 602 | # CONFIG_PATA_IT8213 is not set | ||
| 603 | # CONFIG_PATA_JMICRON is not set | ||
| 604 | # CONFIG_PATA_TRIFLEX is not set | ||
| 605 | # CONFIG_PATA_MARVELL is not set | ||
| 606 | # CONFIG_PATA_MPIIX is not set | ||
| 607 | # CONFIG_PATA_OLDPIIX is not set | ||
| 608 | # CONFIG_PATA_NETCELL is not set | ||
| 609 | # CONFIG_PATA_NINJA32 is not set | ||
| 610 | # CONFIG_PATA_NS87410 is not set | ||
| 611 | # CONFIG_PATA_NS87415 is not set | ||
| 612 | # CONFIG_PATA_OPTI is not set | ||
| 613 | # CONFIG_PATA_OPTIDMA is not set | ||
| 614 | # CONFIG_PATA_PDC_OLD is not set | ||
| 615 | # CONFIG_PATA_RADISYS is not set | ||
| 616 | # CONFIG_PATA_RDC is not set | ||
| 617 | # CONFIG_PATA_RZ1000 is not set | ||
| 618 | # CONFIG_PATA_SC1200 is not set | ||
| 619 | # CONFIG_PATA_SERVERWORKS is not set | ||
| 620 | # CONFIG_PATA_PDC2027X is not set | ||
| 621 | # CONFIG_PATA_SIL680 is not set | ||
| 622 | # CONFIG_PATA_SIS is not set | ||
| 623 | # CONFIG_PATA_VIA is not set | ||
| 624 | # CONFIG_PATA_WINBOND is not set | ||
| 625 | # CONFIG_PATA_PLATFORM is not set | ||
| 626 | # CONFIG_PATA_SCH is not set | ||
| 627 | # CONFIG_MD is not set | ||
| 628 | # CONFIG_FUSION is not set | ||
| 629 | |||
| 630 | # | ||
| 631 | # IEEE 1394 (FireWire) support | ||
| 632 | # | ||
| 633 | |||
| 634 | # | ||
| 635 | # You can enable one or both FireWire driver stacks. | ||
| 636 | # | ||
| 637 | |||
| 638 | # | ||
| 639 | # See the help texts for more information. | ||
| 640 | # | ||
| 641 | # CONFIG_FIREWIRE is not set | ||
| 642 | # CONFIG_IEEE1394 is not set | ||
| 643 | # CONFIG_I2O is not set | ||
| 644 | CONFIG_NETDEVICES=y | ||
| 645 | # CONFIG_DUMMY is not set | ||
| 646 | # CONFIG_BONDING is not set | ||
| 647 | # CONFIG_MACVLAN is not set | ||
| 648 | # CONFIG_EQUALIZER is not set | ||
| 649 | # CONFIG_TUN is not set | ||
| 650 | # CONFIG_VETH is not set | ||
| 651 | # CONFIG_ARCNET is not set | ||
| 652 | CONFIG_PHYLIB=y | ||
| 653 | |||
| 654 | # | ||
| 655 | # MII PHY device drivers | ||
| 656 | # | ||
| 657 | # CONFIG_MARVELL_PHY is not set | ||
| 658 | # CONFIG_DAVICOM_PHY is not set | ||
| 659 | # CONFIG_QSEMI_PHY is not set | ||
| 660 | # CONFIG_LXT_PHY is not set | ||
| 661 | # CONFIG_CICADA_PHY is not set | ||
| 662 | # CONFIG_VITESSE_PHY is not set | ||
| 663 | # CONFIG_SMSC_PHY is not set | ||
| 664 | # CONFIG_BROADCOM_PHY is not set | ||
| 665 | # CONFIG_ICPLUS_PHY is not set | ||
| 666 | # CONFIG_REALTEK_PHY is not set | ||
| 667 | # CONFIG_NATIONAL_PHY is not set | ||
| 668 | # CONFIG_STE10XP is not set | ||
| 669 | # CONFIG_LSI_ET1011C_PHY is not set | ||
| 670 | # CONFIG_FIXED_PHY is not set | ||
| 671 | # CONFIG_MDIO_BITBANG is not set | ||
| 672 | # CONFIG_NET_ETHERNET is not set | ||
| 673 | CONFIG_NETDEV_1000=y | ||
| 674 | # CONFIG_ACENIC is not set | ||
| 675 | # CONFIG_DL2K is not set | ||
| 676 | # CONFIG_E1000 is not set | ||
| 677 | # CONFIG_E1000E is not set | ||
| 678 | # CONFIG_IP1000 is not set | ||
| 679 | # CONFIG_IGB is not set | ||
| 680 | # CONFIG_IGBVF is not set | ||
| 681 | # CONFIG_NS83820 is not set | ||
| 682 | # CONFIG_HAMACHI is not set | ||
| 683 | # CONFIG_YELLOWFIN is not set | ||
| 684 | # CONFIG_R8169 is not set | ||
| 685 | # CONFIG_SIS190 is not set | ||
| 686 | # CONFIG_SKGE is not set | ||
| 687 | # CONFIG_SKY2 is not set | ||
| 688 | # CONFIG_VIA_VELOCITY is not set | ||
| 689 | # CONFIG_TIGON3 is not set | ||
| 690 | # CONFIG_BNX2 is not set | ||
| 691 | # CONFIG_CNIC is not set | ||
| 692 | CONFIG_MV643XX_ETH=y | ||
| 693 | # CONFIG_QLA3XXX is not set | ||
| 694 | # CONFIG_ATL1 is not set | ||
| 695 | # CONFIG_ATL1E is not set | ||
| 696 | # CONFIG_ATL1C is not set | ||
| 697 | # CONFIG_JME is not set | ||
| 698 | # CONFIG_NETDEV_10000 is not set | ||
| 699 | # CONFIG_TR is not set | ||
| 700 | CONFIG_WLAN=y | ||
| 701 | # CONFIG_WLAN_PRE80211 is not set | ||
| 702 | # CONFIG_WLAN_80211 is not set | ||
| 703 | |||
| 704 | # | ||
| 705 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
| 706 | # | ||
| 707 | |||
| 708 | # | ||
| 709 | # USB Network Adapters | ||
| 710 | # | ||
| 711 | # CONFIG_USB_CATC is not set | ||
| 712 | # CONFIG_USB_KAWETH is not set | ||
| 713 | # CONFIG_USB_PEGASUS is not set | ||
| 714 | # CONFIG_USB_RTL8150 is not set | ||
| 715 | # CONFIG_USB_USBNET is not set | ||
| 716 | # CONFIG_WAN is not set | ||
| 717 | # CONFIG_FDDI is not set | ||
| 718 | # CONFIG_HIPPI is not set | ||
| 719 | # CONFIG_PPP is not set | ||
| 720 | # CONFIG_SLIP is not set | ||
| 721 | # CONFIG_NET_FC is not set | ||
| 722 | # CONFIG_NETCONSOLE is not set | ||
| 723 | # CONFIG_NETPOLL is not set | ||
| 724 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
| 725 | # CONFIG_ISDN is not set | ||
| 726 | # CONFIG_PHONE is not set | ||
| 727 | |||
| 728 | # | ||
| 729 | # Input device support | ||
| 730 | # | ||
| 731 | CONFIG_INPUT=y | ||
| 732 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 733 | CONFIG_INPUT_POLLDEV=y | ||
| 734 | |||
| 735 | # | ||
| 736 | # Userland interfaces | ||
| 737 | # | ||
| 738 | # CONFIG_INPUT_MOUSEDEV is not set | ||
| 739 | # CONFIG_INPUT_JOYDEV is not set | ||
| 740 | CONFIG_INPUT_EVDEV=y | ||
| 741 | # CONFIG_INPUT_EVBUG is not set | ||
| 742 | |||
| 743 | # | ||
| 744 | # Input Device Drivers | ||
| 745 | # | ||
| 746 | CONFIG_INPUT_KEYBOARD=y | ||
| 747 | # CONFIG_KEYBOARD_ADP5588 is not set | ||
| 748 | # CONFIG_KEYBOARD_ATKBD is not set | ||
| 749 | # CONFIG_QT2160 is not set | ||
| 750 | # CONFIG_KEYBOARD_LKKBD is not set | ||
| 751 | # CONFIG_KEYBOARD_GPIO is not set | ||
| 752 | # CONFIG_KEYBOARD_MATRIX is not set | ||
| 753 | # CONFIG_KEYBOARD_MAX7359 is not set | ||
| 754 | # CONFIG_KEYBOARD_NEWTON is not set | ||
| 755 | # CONFIG_KEYBOARD_OPENCORES is not set | ||
| 756 | # CONFIG_KEYBOARD_STOWAWAY is not set | ||
| 757 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
| 758 | # CONFIG_KEYBOARD_XTKBD is not set | ||
| 759 | CONFIG_INPUT_MOUSE=y | ||
| 760 | # CONFIG_MOUSE_PS2 is not set | ||
| 761 | # CONFIG_MOUSE_SERIAL is not set | ||
| 762 | # CONFIG_MOUSE_APPLETOUCH is not set | ||
| 763 | # CONFIG_MOUSE_BCM5974 is not set | ||
| 764 | # CONFIG_MOUSE_VSXXXAA is not set | ||
| 765 | # CONFIG_MOUSE_GPIO is not set | ||
| 766 | # CONFIG_MOUSE_SYNAPTICS_I2C is not set | ||
| 767 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 768 | # CONFIG_INPUT_TABLET is not set | ||
| 769 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
| 770 | # CONFIG_INPUT_MISC is not set | ||
| 771 | |||
| 772 | # | ||
| 773 | # Hardware I/O ports | ||
| 774 | # | ||
| 775 | # CONFIG_SERIO is not set | ||
| 776 | # CONFIG_GAMEPORT is not set | ||
| 777 | |||
| 778 | # | ||
| 779 | # Character devices | ||
| 780 | # | ||
| 781 | CONFIG_VT=y | ||
| 782 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 783 | CONFIG_VT_CONSOLE=y | ||
| 784 | CONFIG_HW_CONSOLE=y | ||
| 785 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
| 786 | # CONFIG_DEVKMEM is not set | ||
| 787 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 788 | # CONFIG_NOZOMI is not set | ||
| 789 | |||
| 790 | # | ||
| 791 | # Serial drivers | ||
| 792 | # | ||
| 793 | CONFIG_SERIAL_8250=y | ||
| 794 | CONFIG_SERIAL_8250_CONSOLE=y | ||
| 795 | # CONFIG_SERIAL_8250_PCI is not set | ||
| 796 | CONFIG_SERIAL_8250_NR_UARTS=4 | ||
| 797 | CONFIG_SERIAL_8250_RUNTIME_UARTS=2 | ||
| 798 | # CONFIG_SERIAL_8250_EXTENDED is not set | ||
| 799 | |||
| 800 | # | ||
| 801 | # Non-8250 serial port support | ||
| 802 | # | ||
| 803 | # CONFIG_SERIAL_MAX3100 is not set | ||
| 804 | CONFIG_SERIAL_CORE=y | ||
| 805 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 806 | # CONFIG_SERIAL_JSM is not set | ||
| 807 | CONFIG_UNIX98_PTYS=y | ||
| 808 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 809 | CONFIG_LEGACY_PTYS=y | ||
| 810 | CONFIG_LEGACY_PTY_COUNT=16 | ||
| 811 | # CONFIG_IPMI_HANDLER is not set | ||
| 812 | # CONFIG_HW_RANDOM is not set | ||
| 813 | # CONFIG_R3964 is not set | ||
| 814 | # CONFIG_APPLICOM is not set | ||
| 815 | # CONFIG_RAW_DRIVER is not set | ||
| 816 | # CONFIG_TCG_TPM is not set | ||
| 817 | CONFIG_DEVPORT=y | ||
| 818 | CONFIG_I2C=y | ||
| 819 | CONFIG_I2C_BOARDINFO=y | ||
| 820 | CONFIG_I2C_COMPAT=y | ||
| 821 | CONFIG_I2C_CHARDEV=y | ||
| 822 | CONFIG_I2C_HELPER_AUTO=y | ||
| 823 | |||
| 824 | # | ||
| 825 | # I2C Hardware Bus support | ||
| 826 | # | ||
| 827 | |||
| 828 | # | ||
| 829 | # PC SMBus host controller drivers | ||
| 830 | # | ||
| 831 | # CONFIG_I2C_ALI1535 is not set | ||
| 832 | # CONFIG_I2C_ALI1563 is not set | ||
| 833 | # CONFIG_I2C_ALI15X3 is not set | ||
| 834 | # CONFIG_I2C_AMD756 is not set | ||
| 835 | # CONFIG_I2C_AMD8111 is not set | ||
| 836 | # CONFIG_I2C_I801 is not set | ||
| 837 | # CONFIG_I2C_ISCH is not set | ||
| 838 | # CONFIG_I2C_PIIX4 is not set | ||
| 839 | # CONFIG_I2C_NFORCE2 is not set | ||
| 840 | # CONFIG_I2C_SIS5595 is not set | ||
| 841 | # CONFIG_I2C_SIS630 is not set | ||
| 842 | # CONFIG_I2C_SIS96X is not set | ||
| 843 | # CONFIG_I2C_VIA is not set | ||
| 844 | # CONFIG_I2C_VIAPRO is not set | ||
| 845 | |||
| 846 | # | ||
| 847 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
| 848 | # | ||
| 849 | # CONFIG_I2C_GPIO is not set | ||
| 850 | CONFIG_I2C_MV64XXX=y | ||
| 851 | # CONFIG_I2C_OCORES is not set | ||
| 852 | # CONFIG_I2C_SIMTEC is not set | ||
| 853 | |||
| 854 | # | ||
| 855 | # External I2C/SMBus adapter drivers | ||
| 856 | # | ||
| 857 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
| 858 | # CONFIG_I2C_TAOS_EVM is not set | ||
| 859 | # CONFIG_I2C_TINY_USB is not set | ||
| 860 | |||
| 861 | # | ||
| 862 | # Graphics adapter I2C/DDC channel drivers | ||
| 863 | # | ||
| 864 | # CONFIG_I2C_VOODOO3 is not set | ||
| 865 | |||
| 866 | # | ||
| 867 | # Other I2C/SMBus bus drivers | ||
| 868 | # | ||
| 869 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
| 870 | # CONFIG_I2C_STUB is not set | ||
| 871 | |||
| 872 | # | ||
| 873 | # Miscellaneous I2C Chip support | ||
| 874 | # | ||
| 875 | # CONFIG_DS1682 is not set | ||
| 876 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 877 | # CONFIG_I2C_DEBUG_CORE is not set | ||
| 878 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
| 879 | # CONFIG_I2C_DEBUG_BUS is not set | ||
| 880 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
| 881 | CONFIG_SPI=y | ||
| 882 | # CONFIG_SPI_DEBUG is not set | ||
| 883 | CONFIG_SPI_MASTER=y | ||
| 884 | |||
| 885 | # | ||
| 886 | # SPI Master Controller Drivers | ||
| 887 | # | ||
| 888 | # CONFIG_SPI_BITBANG is not set | ||
| 889 | # CONFIG_SPI_GPIO is not set | ||
| 890 | CONFIG_SPI_ORION=y | ||
| 891 | |||
| 892 | # | ||
| 893 | # SPI Protocol Masters | ||
| 894 | # | ||
| 895 | # CONFIG_SPI_SPIDEV is not set | ||
| 896 | # CONFIG_SPI_TLE62X0 is not set | ||
| 897 | |||
| 898 | # | ||
| 899 | # PPS support | ||
| 900 | # | ||
| 901 | # CONFIG_PPS is not set | ||
| 902 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
| 903 | CONFIG_GPIOLIB=y | ||
| 904 | # CONFIG_DEBUG_GPIO is not set | ||
| 905 | # CONFIG_GPIO_SYSFS is not set | ||
| 906 | |||
| 907 | # | ||
| 908 | # Memory mapped GPIO expanders: | ||
| 909 | # | ||
| 910 | |||
| 911 | # | ||
| 912 | # I2C GPIO expanders: | ||
| 913 | # | ||
| 914 | # CONFIG_GPIO_MAX732X is not set | ||
| 915 | # CONFIG_GPIO_PCA953X is not set | ||
| 916 | # CONFIG_GPIO_PCF857X is not set | ||
| 917 | |||
| 918 | # | ||
| 919 | # PCI GPIO expanders: | ||
| 920 | # | ||
| 921 | # CONFIG_GPIO_BT8XX is not set | ||
| 922 | # CONFIG_GPIO_LANGWELL is not set | ||
| 923 | |||
| 924 | # | ||
| 925 | # SPI GPIO expanders: | ||
| 926 | # | ||
| 927 | # CONFIG_GPIO_MAX7301 is not set | ||
| 928 | # CONFIG_GPIO_MCP23S08 is not set | ||
| 929 | # CONFIG_GPIO_MC33880 is not set | ||
| 930 | |||
| 931 | # | ||
| 932 | # AC97 GPIO expanders: | ||
| 933 | # | ||
| 934 | # CONFIG_W1 is not set | ||
| 935 | # CONFIG_POWER_SUPPLY is not set | ||
| 936 | # CONFIG_HWMON is not set | ||
| 937 | # CONFIG_THERMAL is not set | ||
| 938 | # CONFIG_WATCHDOG is not set | ||
| 939 | CONFIG_SSB_POSSIBLE=y | ||
| 940 | |||
| 941 | # | ||
| 942 | # Sonics Silicon Backplane | ||
| 943 | # | ||
| 944 | # CONFIG_SSB is not set | ||
| 945 | |||
| 946 | # | ||
| 947 | # Multifunction device drivers | ||
| 948 | # | ||
| 949 | # CONFIG_MFD_CORE is not set | ||
| 950 | # CONFIG_MFD_SM501 is not set | ||
| 951 | # CONFIG_MFD_ASIC3 is not set | ||
| 952 | # CONFIG_HTC_EGPIO is not set | ||
| 953 | # CONFIG_HTC_PASIC3 is not set | ||
| 954 | # CONFIG_TPS65010 is not set | ||
| 955 | # CONFIG_TWL4030_CORE is not set | ||
| 956 | # CONFIG_MFD_TMIO is not set | ||
| 957 | # CONFIG_MFD_TC6393XB is not set | ||
| 958 | # CONFIG_PMIC_DA903X is not set | ||
| 959 | # CONFIG_MFD_WM8400 is not set | ||
| 960 | # CONFIG_MFD_WM831X is not set | ||
| 961 | # CONFIG_MFD_WM8350_I2C is not set | ||
| 962 | # CONFIG_MFD_PCF50633 is not set | ||
| 963 | # CONFIG_MFD_MC13783 is not set | ||
| 964 | # CONFIG_AB3100_CORE is not set | ||
| 965 | # CONFIG_EZX_PCAP is not set | ||
| 966 | # CONFIG_REGULATOR is not set | ||
| 967 | # CONFIG_MEDIA_SUPPORT is not set | ||
| 968 | |||
| 969 | # | ||
| 970 | # Graphics support | ||
| 971 | # | ||
| 972 | CONFIG_VGA_ARB=y | ||
| 973 | # CONFIG_DRM is not set | ||
| 974 | # CONFIG_VGASTATE is not set | ||
| 975 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 976 | # CONFIG_FB is not set | ||
| 977 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 978 | |||
| 979 | # | ||
| 980 | # Display device support | ||
| 981 | # | ||
| 982 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 983 | |||
| 984 | # | ||
| 985 | # Console display driver support | ||
| 986 | # | ||
| 987 | # CONFIG_VGA_CONSOLE is not set | ||
| 988 | CONFIG_DUMMY_CONSOLE=y | ||
| 989 | # CONFIG_SOUND is not set | ||
| 990 | CONFIG_HID_SUPPORT=y | ||
| 991 | CONFIG_HID=y | ||
| 992 | # CONFIG_HIDRAW is not set | ||
| 993 | |||
| 994 | # | ||
| 995 | # USB Input Devices | ||
| 996 | # | ||
| 997 | CONFIG_USB_HID=y | ||
| 998 | # CONFIG_HID_PID is not set | ||
| 999 | # CONFIG_USB_HIDDEV is not set | ||
| 1000 | |||
| 1001 | # | ||
| 1002 | # Special HID drivers | ||
| 1003 | # | ||
| 1004 | # CONFIG_HID_A4TECH is not set | ||
| 1005 | # CONFIG_HID_APPLE is not set | ||
| 1006 | # CONFIG_HID_BELKIN is not set | ||
| 1007 | # CONFIG_HID_CHERRY is not set | ||
| 1008 | # CONFIG_HID_CHICONY is not set | ||
| 1009 | # CONFIG_HID_CYPRESS is not set | ||
| 1010 | # CONFIG_HID_DRAGONRISE is not set | ||
| 1011 | # CONFIG_HID_EZKEY is not set | ||
| 1012 | # CONFIG_HID_KYE is not set | ||
| 1013 | # CONFIG_HID_GYRATION is not set | ||
| 1014 | # CONFIG_HID_TWINHAN is not set | ||
| 1015 | # CONFIG_HID_KENSINGTON is not set | ||
| 1016 | # CONFIG_HID_LOGITECH is not set | ||
| 1017 | # CONFIG_HID_MICROSOFT is not set | ||
| 1018 | # CONFIG_HID_MONTEREY is not set | ||
| 1019 | # CONFIG_HID_NTRIG is not set | ||
| 1020 | # CONFIG_HID_PANTHERLORD is not set | ||
| 1021 | # CONFIG_HID_PETALYNX is not set | ||
| 1022 | # CONFIG_HID_SAMSUNG is not set | ||
| 1023 | # CONFIG_HID_SONY is not set | ||
| 1024 | # CONFIG_HID_SUNPLUS is not set | ||
| 1025 | # CONFIG_HID_GREENASIA is not set | ||
| 1026 | # CONFIG_HID_SMARTJOYPLUS is not set | ||
| 1027 | # CONFIG_HID_TOPSEED is not set | ||
| 1028 | # CONFIG_HID_THRUSTMASTER is not set | ||
| 1029 | # CONFIG_HID_ZEROPLUS is not set | ||
| 1030 | CONFIG_USB_SUPPORT=y | ||
| 1031 | CONFIG_USB_ARCH_HAS_HCD=y | ||
| 1032 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
| 1033 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
| 1034 | CONFIG_USB=y | ||
| 1035 | # CONFIG_USB_DEBUG is not set | ||
| 1036 | # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set | ||
| 1037 | |||
| 1038 | # | ||
| 1039 | # Miscellaneous USB options | ||
| 1040 | # | ||
| 1041 | CONFIG_USB_DEVICEFS=y | ||
| 1042 | CONFIG_USB_DEVICE_CLASS=y | ||
| 1043 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
| 1044 | # CONFIG_USB_OTG is not set | ||
| 1045 | # CONFIG_USB_OTG_WHITELIST is not set | ||
| 1046 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
| 1047 | # CONFIG_USB_MON is not set | ||
| 1048 | # CONFIG_USB_WUSB is not set | ||
| 1049 | # CONFIG_USB_WUSB_CBAF is not set | ||
| 1050 | |||
| 1051 | # | ||
| 1052 | # USB Host Controller Drivers | ||
| 1053 | # | ||
| 1054 | # CONFIG_USB_C67X00_HCD is not set | ||
| 1055 | # CONFIG_USB_XHCI_HCD is not set | ||
| 1056 | CONFIG_USB_EHCI_HCD=y | ||
| 1057 | CONFIG_USB_EHCI_ROOT_HUB_TT=y | ||
| 1058 | CONFIG_USB_EHCI_TT_NEWSCHED=y | ||
| 1059 | # CONFIG_USB_OXU210HP_HCD is not set | ||
| 1060 | # CONFIG_USB_ISP116X_HCD is not set | ||
| 1061 | # CONFIG_USB_ISP1760_HCD is not set | ||
| 1062 | # CONFIG_USB_ISP1362_HCD is not set | ||
| 1063 | # CONFIG_USB_OHCI_HCD is not set | ||
| 1064 | # CONFIG_USB_UHCI_HCD is not set | ||
| 1065 | # CONFIG_USB_SL811_HCD is not set | ||
| 1066 | # CONFIG_USB_R8A66597_HCD is not set | ||
| 1067 | # CONFIG_USB_WHCI_HCD is not set | ||
| 1068 | # CONFIG_USB_HWA_HCD is not set | ||
| 1069 | # CONFIG_USB_MUSB_HDRC is not set | ||
| 1070 | |||
| 1071 | # | ||
| 1072 | # USB Device Class drivers | ||
| 1073 | # | ||
| 1074 | # CONFIG_USB_ACM is not set | ||
| 1075 | # CONFIG_USB_PRINTER is not set | ||
| 1076 | # CONFIG_USB_WDM is not set | ||
| 1077 | # CONFIG_USB_TMC is not set | ||
| 1078 | |||
| 1079 | # | ||
| 1080 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | ||
| 1081 | # | ||
| 1082 | |||
| 1083 | # | ||
| 1084 | # also be needed; see USB_STORAGE Help for more info | ||
| 1085 | # | ||
| 1086 | CONFIG_USB_STORAGE=y | ||
| 1087 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
| 1088 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
| 1089 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
| 1090 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
| 1091 | # CONFIG_USB_STORAGE_USBAT is not set | ||
| 1092 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
| 1093 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
| 1094 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
| 1095 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
| 1096 | # CONFIG_USB_STORAGE_ONETOUCH is not set | ||
| 1097 | # CONFIG_USB_STORAGE_KARMA is not set | ||
| 1098 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
| 1099 | # CONFIG_USB_LIBUSUAL is not set | ||
| 1100 | |||
| 1101 | # | ||
| 1102 | # USB Imaging devices | ||
| 1103 | # | ||
| 1104 | # CONFIG_USB_MDC800 is not set | ||
| 1105 | # CONFIG_USB_MICROTEK is not set | ||
| 1106 | |||
| 1107 | # | ||
| 1108 | # USB port drivers | ||
| 1109 | # | ||
| 1110 | # CONFIG_USB_SERIAL is not set | ||
| 1111 | |||
| 1112 | # | ||
| 1113 | # USB Miscellaneous drivers | ||
| 1114 | # | ||
| 1115 | # CONFIG_USB_EMI62 is not set | ||
| 1116 | # CONFIG_USB_EMI26 is not set | ||
| 1117 | # CONFIG_USB_ADUTUX is not set | ||
| 1118 | # CONFIG_USB_SEVSEG is not set | ||
| 1119 | # CONFIG_USB_RIO500 is not set | ||
| 1120 | # CONFIG_USB_LEGOTOWER is not set | ||
| 1121 | # CONFIG_USB_LCD is not set | ||
| 1122 | # CONFIG_USB_BERRY_CHARGE is not set | ||
| 1123 | # CONFIG_USB_LED is not set | ||
| 1124 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
| 1125 | # CONFIG_USB_CYTHERM is not set | ||
| 1126 | # CONFIG_USB_IDMOUSE is not set | ||
| 1127 | # CONFIG_USB_FTDI_ELAN is not set | ||
| 1128 | # CONFIG_USB_APPLEDISPLAY is not set | ||
| 1129 | # CONFIG_USB_SISUSBVGA is not set | ||
| 1130 | # CONFIG_USB_LD is not set | ||
| 1131 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
| 1132 | # CONFIG_USB_IOWARRIOR is not set | ||
| 1133 | # CONFIG_USB_TEST is not set | ||
| 1134 | # CONFIG_USB_ISIGHTFW is not set | ||
| 1135 | # CONFIG_USB_VST is not set | ||
| 1136 | # CONFIG_USB_GADGET is not set | ||
| 1137 | |||
| 1138 | # | ||
| 1139 | # OTG and related infrastructure | ||
| 1140 | # | ||
| 1141 | # CONFIG_USB_GPIO_VBUS is not set | ||
| 1142 | # CONFIG_NOP_USB_XCEIV is not set | ||
| 1143 | # CONFIG_UWB is not set | ||
| 1144 | # CONFIG_MMC is not set | ||
| 1145 | # CONFIG_MEMSTICK is not set | ||
| 1146 | # CONFIG_NEW_LEDS is not set | ||
| 1147 | # CONFIG_ACCESSIBILITY is not set | ||
| 1148 | # CONFIG_INFINIBAND is not set | ||
| 1149 | CONFIG_RTC_LIB=y | ||
| 1150 | CONFIG_RTC_CLASS=y | ||
| 1151 | CONFIG_RTC_HCTOSYS=y | ||
| 1152 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
| 1153 | # CONFIG_RTC_DEBUG is not set | ||
| 1154 | |||
| 1155 | # | ||
| 1156 | # RTC interfaces | ||
| 1157 | # | ||
| 1158 | CONFIG_RTC_INTF_SYSFS=y | ||
| 1159 | CONFIG_RTC_INTF_PROC=y | ||
| 1160 | CONFIG_RTC_INTF_DEV=y | ||
| 1161 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
| 1162 | # CONFIG_RTC_DRV_TEST is not set | ||
| 1163 | |||
| 1164 | # | ||
| 1165 | # I2C RTC drivers | ||
| 1166 | # | ||
| 1167 | # CONFIG_RTC_DRV_DS1307 is not set | ||
| 1168 | # CONFIG_RTC_DRV_DS1374 is not set | ||
| 1169 | # CONFIG_RTC_DRV_DS1672 is not set | ||
| 1170 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
| 1171 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
| 1172 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
| 1173 | # CONFIG_RTC_DRV_X1205 is not set | ||
| 1174 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
| 1175 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
| 1176 | # CONFIG_RTC_DRV_M41T80 is not set | ||
| 1177 | # CONFIG_RTC_DRV_S35390A is not set | ||
| 1178 | # CONFIG_RTC_DRV_FM3130 is not set | ||
| 1179 | # CONFIG_RTC_DRV_RX8581 is not set | ||
| 1180 | # CONFIG_RTC_DRV_RX8025 is not set | ||
| 1181 | |||
| 1182 | # | ||
| 1183 | # SPI RTC drivers | ||
| 1184 | # | ||
| 1185 | # CONFIG_RTC_DRV_M41T94 is not set | ||
| 1186 | # CONFIG_RTC_DRV_DS1305 is not set | ||
| 1187 | # CONFIG_RTC_DRV_DS1390 is not set | ||
| 1188 | # CONFIG_RTC_DRV_MAX6902 is not set | ||
| 1189 | # CONFIG_RTC_DRV_R9701 is not set | ||
| 1190 | # CONFIG_RTC_DRV_RS5C348 is not set | ||
| 1191 | # CONFIG_RTC_DRV_DS3234 is not set | ||
| 1192 | # CONFIG_RTC_DRV_PCF2123 is not set | ||
| 1193 | |||
| 1194 | # | ||
| 1195 | # Platform RTC drivers | ||
| 1196 | # | ||
| 1197 | # CONFIG_RTC_DRV_CMOS is not set | ||
| 1198 | # CONFIG_RTC_DRV_DS1286 is not set | ||
| 1199 | # CONFIG_RTC_DRV_DS1511 is not set | ||
| 1200 | # CONFIG_RTC_DRV_DS1553 is not set | ||
| 1201 | # CONFIG_RTC_DRV_DS1742 is not set | ||
| 1202 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
| 1203 | # CONFIG_RTC_DRV_M48T86 is not set | ||
| 1204 | # CONFIG_RTC_DRV_M48T35 is not set | ||
| 1205 | # CONFIG_RTC_DRV_M48T59 is not set | ||
| 1206 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
| 1207 | # CONFIG_RTC_DRV_V3020 is not set | ||
| 1208 | |||
| 1209 | # | ||
| 1210 | # on-CPU RTC drivers | ||
| 1211 | # | ||
| 1212 | CONFIG_RTC_DRV_MV=y | ||
| 1213 | CONFIG_DMADEVICES=y | ||
| 1214 | |||
| 1215 | # | ||
| 1216 | # DMA Devices | ||
| 1217 | # | ||
| 1218 | CONFIG_MV_XOR=y | ||
| 1219 | CONFIG_DMA_ENGINE=y | ||
| 1220 | |||
| 1221 | # | ||
| 1222 | # DMA Clients | ||
| 1223 | # | ||
| 1224 | # CONFIG_NET_DMA is not set | ||
| 1225 | # CONFIG_ASYNC_TX_DMA is not set | ||
| 1226 | # CONFIG_DMATEST is not set | ||
| 1227 | # CONFIG_AUXDISPLAY is not set | ||
| 1228 | # CONFIG_UIO is not set | ||
| 1229 | |||
| 1230 | # | ||
| 1231 | # TI VLYNQ | ||
| 1232 | # | ||
| 1233 | # CONFIG_STAGING is not set | ||
| 1234 | |||
| 1235 | # | ||
| 1236 | # File systems | ||
| 1237 | # | ||
| 1238 | CONFIG_EXT2_FS=y | ||
| 1239 | # CONFIG_EXT2_FS_XATTR is not set | ||
| 1240 | # CONFIG_EXT2_FS_XIP is not set | ||
| 1241 | CONFIG_EXT3_FS=y | ||
| 1242 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 1243 | # CONFIG_EXT3_FS_XATTR is not set | ||
| 1244 | # CONFIG_EXT4_FS is not set | ||
| 1245 | CONFIG_JBD=y | ||
| 1246 | # CONFIG_JBD_DEBUG is not set | ||
| 1247 | # CONFIG_REISERFS_FS is not set | ||
| 1248 | # CONFIG_JFS_FS is not set | ||
| 1249 | # CONFIG_FS_POSIX_ACL is not set | ||
| 1250 | # CONFIG_XFS_FS is not set | ||
| 1251 | # CONFIG_GFS2_FS is not set | ||
| 1252 | # CONFIG_OCFS2_FS is not set | ||
| 1253 | # CONFIG_BTRFS_FS is not set | ||
| 1254 | # CONFIG_NILFS2_FS is not set | ||
| 1255 | CONFIG_FILE_LOCKING=y | ||
| 1256 | CONFIG_FSNOTIFY=y | ||
| 1257 | CONFIG_DNOTIFY=y | ||
| 1258 | CONFIG_INOTIFY=y | ||
| 1259 | CONFIG_INOTIFY_USER=y | ||
| 1260 | # CONFIG_QUOTA is not set | ||
| 1261 | # CONFIG_AUTOFS_FS is not set | ||
| 1262 | # CONFIG_AUTOFS4_FS is not set | ||
| 1263 | # CONFIG_FUSE_FS is not set | ||
| 1264 | |||
| 1265 | # | ||
| 1266 | # Caches | ||
| 1267 | # | ||
| 1268 | # CONFIG_FSCACHE is not set | ||
| 1269 | |||
| 1270 | # | ||
| 1271 | # CD-ROM/DVD Filesystems | ||
| 1272 | # | ||
| 1273 | CONFIG_ISO9660_FS=y | ||
| 1274 | CONFIG_JOLIET=y | ||
| 1275 | # CONFIG_ZISOFS is not set | ||
| 1276 | CONFIG_UDF_FS=m | ||
| 1277 | CONFIG_UDF_NLS=y | ||
| 1278 | |||
| 1279 | # | ||
| 1280 | # DOS/FAT/NT Filesystems | ||
| 1281 | # | ||
| 1282 | CONFIG_FAT_FS=y | ||
| 1283 | CONFIG_MSDOS_FS=y | ||
| 1284 | CONFIG_VFAT_FS=y | ||
| 1285 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
| 1286 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
| 1287 | # CONFIG_NTFS_FS is not set | ||
| 1288 | |||
| 1289 | # | ||
| 1290 | # Pseudo filesystems | ||
| 1291 | # | ||
| 1292 | CONFIG_PROC_FS=y | ||
| 1293 | CONFIG_PROC_SYSCTL=y | ||
| 1294 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 1295 | CONFIG_SYSFS=y | ||
| 1296 | CONFIG_TMPFS=y | ||
| 1297 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
| 1298 | # CONFIG_HUGETLB_PAGE is not set | ||
| 1299 | # CONFIG_CONFIGFS_FS is not set | ||
| 1300 | CONFIG_MISC_FILESYSTEMS=y | ||
| 1301 | # CONFIG_ADFS_FS is not set | ||
| 1302 | # CONFIG_AFFS_FS is not set | ||
| 1303 | # CONFIG_HFS_FS is not set | ||
| 1304 | # CONFIG_HFSPLUS_FS is not set | ||
| 1305 | # CONFIG_BEFS_FS is not set | ||
| 1306 | # CONFIG_BFS_FS is not set | ||
| 1307 | # CONFIG_EFS_FS is not set | ||
| 1308 | CONFIG_JFFS2_FS=y | ||
| 1309 | CONFIG_JFFS2_FS_DEBUG=0 | ||
| 1310 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
| 1311 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
| 1312 | # CONFIG_JFFS2_SUMMARY is not set | ||
| 1313 | # CONFIG_JFFS2_FS_XATTR is not set | ||
| 1314 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | ||
| 1315 | CONFIG_JFFS2_ZLIB=y | ||
| 1316 | # CONFIG_JFFS2_LZO is not set | ||
| 1317 | CONFIG_JFFS2_RTIME=y | ||
| 1318 | # CONFIG_JFFS2_RUBIN is not set | ||
| 1319 | # CONFIG_UBIFS_FS is not set | ||
| 1320 | # CONFIG_CRAMFS is not set | ||
| 1321 | # CONFIG_SQUASHFS is not set | ||
| 1322 | # CONFIG_VXFS_FS is not set | ||
| 1323 | # CONFIG_MINIX_FS is not set | ||
| 1324 | # CONFIG_OMFS_FS is not set | ||
| 1325 | # CONFIG_HPFS_FS is not set | ||
| 1326 | # CONFIG_QNX4FS_FS is not set | ||
| 1327 | # CONFIG_ROMFS_FS is not set | ||
| 1328 | # CONFIG_SYSV_FS is not set | ||
| 1329 | # CONFIG_UFS_FS is not set | ||
| 1330 | CONFIG_NETWORK_FILESYSTEMS=y | ||
| 1331 | CONFIG_NFS_FS=y | ||
| 1332 | CONFIG_NFS_V3=y | ||
| 1333 | # CONFIG_NFS_V3_ACL is not set | ||
| 1334 | # CONFIG_NFS_V4 is not set | ||
| 1335 | CONFIG_ROOT_NFS=y | ||
| 1336 | # CONFIG_NFSD is not set | ||
| 1337 | CONFIG_LOCKD=y | ||
| 1338 | CONFIG_LOCKD_V4=y | ||
| 1339 | CONFIG_NFS_COMMON=y | ||
| 1340 | CONFIG_SUNRPC=y | ||
| 1341 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
| 1342 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
| 1343 | # CONFIG_SMB_FS is not set | ||
| 1344 | # CONFIG_CIFS is not set | ||
| 1345 | # CONFIG_NCP_FS is not set | ||
| 1346 | # CONFIG_CODA_FS is not set | ||
| 1347 | # CONFIG_AFS_FS is not set | ||
| 1348 | |||
| 1349 | # | ||
| 1350 | # Partition Types | ||
| 1351 | # | ||
| 1352 | CONFIG_PARTITION_ADVANCED=y | ||
| 1353 | # CONFIG_ACORN_PARTITION is not set | ||
| 1354 | # CONFIG_OSF_PARTITION is not set | ||
| 1355 | # CONFIG_AMIGA_PARTITION is not set | ||
| 1356 | # CONFIG_ATARI_PARTITION is not set | ||
| 1357 | # CONFIG_MAC_PARTITION is not set | ||
| 1358 | CONFIG_MSDOS_PARTITION=y | ||
| 1359 | # CONFIG_BSD_DISKLABEL is not set | ||
| 1360 | # CONFIG_MINIX_SUBPARTITION is not set | ||
| 1361 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
| 1362 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
| 1363 | # CONFIG_LDM_PARTITION is not set | ||
| 1364 | # CONFIG_SGI_PARTITION is not set | ||
| 1365 | # CONFIG_ULTRIX_PARTITION is not set | ||
| 1366 | # CONFIG_SUN_PARTITION is not set | ||
| 1367 | # CONFIG_KARMA_PARTITION is not set | ||
| 1368 | # CONFIG_EFI_PARTITION is not set | ||
| 1369 | # CONFIG_SYSV68_PARTITION is not set | ||
| 1370 | CONFIG_NLS=y | ||
| 1371 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
| 1372 | CONFIG_NLS_CODEPAGE_437=y | ||
| 1373 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
| 1374 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
| 1375 | CONFIG_NLS_CODEPAGE_850=y | ||
| 1376 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
| 1377 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
| 1378 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
| 1379 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
| 1380 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
| 1381 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
| 1382 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
| 1383 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
| 1384 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
| 1385 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
| 1386 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
| 1387 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
| 1388 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
| 1389 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
| 1390 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
| 1391 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
| 1392 | # CONFIG_NLS_ISO8859_8 is not set | ||
| 1393 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
| 1394 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
| 1395 | # CONFIG_NLS_ASCII is not set | ||
| 1396 | CONFIG_NLS_ISO8859_1=y | ||
| 1397 | CONFIG_NLS_ISO8859_2=y | ||
| 1398 | # CONFIG_NLS_ISO8859_3 is not set | ||
| 1399 | # CONFIG_NLS_ISO8859_4 is not set | ||
| 1400 | # CONFIG_NLS_ISO8859_5 is not set | ||
| 1401 | # CONFIG_NLS_ISO8859_6 is not set | ||
| 1402 | # CONFIG_NLS_ISO8859_7 is not set | ||
| 1403 | # CONFIG_NLS_ISO8859_9 is not set | ||
| 1404 | # CONFIG_NLS_ISO8859_13 is not set | ||
| 1405 | # CONFIG_NLS_ISO8859_14 is not set | ||
| 1406 | # CONFIG_NLS_ISO8859_15 is not set | ||
| 1407 | # CONFIG_NLS_KOI8_R is not set | ||
| 1408 | # CONFIG_NLS_KOI8_U is not set | ||
| 1409 | CONFIG_NLS_UTF8=y | ||
| 1410 | # CONFIG_DLM is not set | ||
| 1411 | |||
| 1412 | # | ||
| 1413 | # Kernel hacking | ||
| 1414 | # | ||
| 1415 | # CONFIG_PRINTK_TIME is not set | ||
| 1416 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 1417 | CONFIG_ENABLE_MUST_CHECK=y | ||
| 1418 | CONFIG_FRAME_WARN=1024 | ||
| 1419 | CONFIG_MAGIC_SYSRQ=y | ||
| 1420 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 1421 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 1422 | CONFIG_DEBUG_FS=y | ||
| 1423 | # CONFIG_HEADERS_CHECK is not set | ||
| 1424 | CONFIG_DEBUG_KERNEL=y | ||
| 1425 | # CONFIG_DEBUG_SHIRQ is not set | ||
| 1426 | CONFIG_DETECT_SOFTLOCKUP=y | ||
| 1427 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | ||
| 1428 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | ||
| 1429 | CONFIG_DETECT_HUNG_TASK=y | ||
| 1430 | # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set | ||
| 1431 | CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 | ||
| 1432 | # CONFIG_SCHED_DEBUG is not set | ||
| 1433 | # CONFIG_SCHEDSTATS is not set | ||
| 1434 | CONFIG_TIMER_STATS=y | ||
| 1435 | # CONFIG_DEBUG_OBJECTS is not set | ||
| 1436 | # CONFIG_DEBUG_SLAB is not set | ||
| 1437 | # CONFIG_DEBUG_KMEMLEAK is not set | ||
| 1438 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
| 1439 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 1440 | # CONFIG_DEBUG_SPINLOCK is not set | ||
| 1441 | # CONFIG_DEBUG_MUTEXES is not set | ||
| 1442 | # CONFIG_DEBUG_LOCK_ALLOC is not set | ||
| 1443 | # CONFIG_PROVE_LOCKING is not set | ||
| 1444 | # CONFIG_LOCK_STAT is not set | ||
| 1445 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
| 1446 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
| 1447 | # CONFIG_DEBUG_KOBJECT is not set | ||
| 1448 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
| 1449 | CONFIG_DEBUG_INFO=y | ||
| 1450 | # CONFIG_DEBUG_VM is not set | ||
| 1451 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
| 1452 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
| 1453 | # CONFIG_DEBUG_LIST is not set | ||
| 1454 | # CONFIG_DEBUG_SG is not set | ||
| 1455 | # CONFIG_DEBUG_NOTIFIERS is not set | ||
| 1456 | # CONFIG_DEBUG_CREDENTIALS is not set | ||
| 1457 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
| 1458 | # CONFIG_RCU_TORTURE_TEST is not set | ||
| 1459 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 1460 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
| 1461 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
| 1462 | # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set | ||
| 1463 | # CONFIG_FAULT_INJECTION is not set | ||
| 1464 | # CONFIG_LATENCYTOP is not set | ||
| 1465 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
| 1466 | # CONFIG_PAGE_POISONING is not set | ||
| 1467 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 1468 | CONFIG_TRACING_SUPPORT=y | ||
| 1469 | CONFIG_FTRACE=y | ||
| 1470 | # CONFIG_FUNCTION_TRACER is not set | ||
| 1471 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 1472 | # CONFIG_SCHED_TRACER is not set | ||
| 1473 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set | ||
| 1474 | # CONFIG_BOOT_TRACER is not set | ||
| 1475 | CONFIG_BRANCH_PROFILE_NONE=y | ||
| 1476 | # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set | ||
| 1477 | # CONFIG_PROFILE_ALL_BRANCHES is not set | ||
| 1478 | # CONFIG_STACK_TRACER is not set | ||
| 1479 | # CONFIG_KMEMTRACE is not set | ||
| 1480 | # CONFIG_WORKQUEUE_TRACER is not set | ||
| 1481 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 1482 | # CONFIG_DYNAMIC_DEBUG is not set | ||
| 1483 | # CONFIG_SAMPLES is not set | ||
| 1484 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 1485 | # CONFIG_KGDB is not set | ||
| 1486 | CONFIG_ARM_UNWIND=y | ||
| 1487 | CONFIG_DEBUG_USER=y | ||
| 1488 | CONFIG_DEBUG_ERRORS=y | ||
| 1489 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
| 1490 | # CONFIG_DEBUG_LL is not set | ||
| 1491 | |||
| 1492 | # | ||
| 1493 | # Security options | ||
| 1494 | # | ||
| 1495 | # CONFIG_KEYS is not set | ||
| 1496 | # CONFIG_SECURITY is not set | ||
| 1497 | # CONFIG_SECURITYFS is not set | ||
| 1498 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
| 1499 | CONFIG_CRYPTO=y | ||
| 1500 | |||
| 1501 | # | ||
| 1502 | # Crypto core or helper | ||
| 1503 | # | ||
| 1504 | CONFIG_CRYPTO_ALGAPI=y | ||
| 1505 | CONFIG_CRYPTO_ALGAPI2=y | ||
| 1506 | CONFIG_CRYPTO_AEAD2=y | ||
| 1507 | CONFIG_CRYPTO_BLKCIPHER=y | ||
| 1508 | CONFIG_CRYPTO_BLKCIPHER2=y | ||
| 1509 | CONFIG_CRYPTO_HASH=y | ||
| 1510 | CONFIG_CRYPTO_HASH2=y | ||
| 1511 | CONFIG_CRYPTO_RNG2=y | ||
| 1512 | CONFIG_CRYPTO_PCOMP=y | ||
| 1513 | CONFIG_CRYPTO_MANAGER=y | ||
| 1514 | CONFIG_CRYPTO_MANAGER2=y | ||
| 1515 | # CONFIG_CRYPTO_GF128MUL is not set | ||
| 1516 | CONFIG_CRYPTO_NULL=y | ||
| 1517 | CONFIG_CRYPTO_WORKQUEUE=y | ||
| 1518 | # CONFIG_CRYPTO_CRYPTD is not set | ||
| 1519 | # CONFIG_CRYPTO_AUTHENC is not set | ||
| 1520 | # CONFIG_CRYPTO_TEST is not set | ||
| 1521 | |||
| 1522 | # | ||
| 1523 | # Authenticated Encryption with Associated Data | ||
| 1524 | # | ||
| 1525 | # CONFIG_CRYPTO_CCM is not set | ||
| 1526 | # CONFIG_CRYPTO_GCM is not set | ||
| 1527 | # CONFIG_CRYPTO_SEQIV is not set | ||
| 1528 | |||
| 1529 | # | ||
| 1530 | # Block modes | ||
| 1531 | # | ||
| 1532 | CONFIG_CRYPTO_CBC=y | ||
| 1533 | # CONFIG_CRYPTO_CTR is not set | ||
| 1534 | # CONFIG_CRYPTO_CTS is not set | ||
| 1535 | CONFIG_CRYPTO_ECB=m | ||
| 1536 | # CONFIG_CRYPTO_LRW is not set | ||
| 1537 | CONFIG_CRYPTO_PCBC=m | ||
| 1538 | # CONFIG_CRYPTO_XTS is not set | ||
| 1539 | |||
| 1540 | # | ||
| 1541 | # Hash modes | ||
| 1542 | # | ||
| 1543 | CONFIG_CRYPTO_HMAC=y | ||
| 1544 | # CONFIG_CRYPTO_XCBC is not set | ||
| 1545 | # CONFIG_CRYPTO_VMAC is not set | ||
| 1546 | |||
| 1547 | # | ||
| 1548 | # Digest | ||
| 1549 | # | ||
| 1550 | CONFIG_CRYPTO_CRC32C=y | ||
| 1551 | # CONFIG_CRYPTO_GHASH is not set | ||
| 1552 | CONFIG_CRYPTO_MD4=y | ||
| 1553 | CONFIG_CRYPTO_MD5=y | ||
| 1554 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
| 1555 | # CONFIG_CRYPTO_RMD128 is not set | ||
| 1556 | # CONFIG_CRYPTO_RMD160 is not set | ||
| 1557 | # CONFIG_CRYPTO_RMD256 is not set | ||
| 1558 | # CONFIG_CRYPTO_RMD320 is not set | ||
| 1559 | CONFIG_CRYPTO_SHA1=y | ||
| 1560 | CONFIG_CRYPTO_SHA256=y | ||
| 1561 | CONFIG_CRYPTO_SHA512=y | ||
| 1562 | # CONFIG_CRYPTO_TGR192 is not set | ||
| 1563 | # CONFIG_CRYPTO_WP512 is not set | ||
| 1564 | |||
| 1565 | # | ||
| 1566 | # Ciphers | ||
| 1567 | # | ||
| 1568 | CONFIG_CRYPTO_AES=y | ||
| 1569 | # CONFIG_CRYPTO_ANUBIS is not set | ||
| 1570 | # CONFIG_CRYPTO_ARC4 is not set | ||
| 1571 | CONFIG_CRYPTO_BLOWFISH=y | ||
| 1572 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
| 1573 | # CONFIG_CRYPTO_CAST5 is not set | ||
| 1574 | # CONFIG_CRYPTO_CAST6 is not set | ||
| 1575 | CONFIG_CRYPTO_DES=y | ||
| 1576 | # CONFIG_CRYPTO_FCRYPT is not set | ||
| 1577 | # CONFIG_CRYPTO_KHAZAD is not set | ||
| 1578 | # CONFIG_CRYPTO_SALSA20 is not set | ||
| 1579 | # CONFIG_CRYPTO_SEED is not set | ||
| 1580 | # CONFIG_CRYPTO_SERPENT is not set | ||
| 1581 | CONFIG_CRYPTO_TEA=y | ||
| 1582 | CONFIG_CRYPTO_TWOFISH=y | ||
| 1583 | CONFIG_CRYPTO_TWOFISH_COMMON=y | ||
| 1584 | |||
| 1585 | # | ||
| 1586 | # Compression | ||
| 1587 | # | ||
| 1588 | CONFIG_CRYPTO_DEFLATE=y | ||
| 1589 | # CONFIG_CRYPTO_ZLIB is not set | ||
| 1590 | CONFIG_CRYPTO_LZO=y | ||
| 1591 | |||
| 1592 | # | ||
| 1593 | # Random Number Generation | ||
| 1594 | # | ||
| 1595 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
| 1596 | CONFIG_CRYPTO_HW=y | ||
| 1597 | # CONFIG_CRYPTO_DEV_MV_CESA is not set | ||
| 1598 | # CONFIG_CRYPTO_DEV_HIFN_795X is not set | ||
| 1599 | # CONFIG_BINARY_PRINTF is not set | ||
| 1600 | |||
| 1601 | # | ||
| 1602 | # Library routines | ||
| 1603 | # | ||
| 1604 | CONFIG_BITREVERSE=y | ||
| 1605 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
| 1606 | CONFIG_CRC_CCITT=y | ||
| 1607 | CONFIG_CRC16=y | ||
| 1608 | # CONFIG_CRC_T10DIF is not set | ||
| 1609 | CONFIG_CRC_ITU_T=m | ||
| 1610 | CONFIG_CRC32=y | ||
| 1611 | # CONFIG_CRC7 is not set | ||
| 1612 | CONFIG_LIBCRC32C=y | ||
| 1613 | CONFIG_ZLIB_INFLATE=y | ||
| 1614 | CONFIG_ZLIB_DEFLATE=y | ||
| 1615 | CONFIG_LZO_COMPRESS=y | ||
| 1616 | CONFIG_LZO_DECOMPRESS=y | ||
| 1617 | CONFIG_HAS_IOMEM=y | ||
| 1618 | CONFIG_HAS_IOPORT=y | ||
| 1619 | CONFIG_HAS_DMA=y | ||
| 1620 | CONFIG_NLATTR=y | ||
diff --git a/arch/arm/configs/ezx_defconfig b/arch/arm/configs/ezx_defconfig index d5ee16e6abf..492f29aba33 100644 --- a/arch/arm/configs/ezx_defconfig +++ b/arch/arm/configs/ezx_defconfig | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.26-rc3 | 3 | # Linux kernel version: 2.6.32-rc5 |
| 4 | # Mon Jul 7 17:52:21 2008 | 4 | # Mon Nov 2 13:18:50 2009 |
| 5 | # | 5 | # |
| 6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
| 7 | CONFIG_HAVE_PWM=y | 7 | CONFIG_HAVE_PWM=y |
| @@ -9,24 +9,22 @@ CONFIG_SYS_SUPPORTS_APM_EMULATION=y | |||
| 9 | CONFIG_GENERIC_GPIO=y | 9 | CONFIG_GENERIC_GPIO=y |
| 10 | CONFIG_GENERIC_TIME=y | 10 | CONFIG_GENERIC_TIME=y |
| 11 | CONFIG_GENERIC_CLOCKEVENTS=y | 11 | CONFIG_GENERIC_CLOCKEVENTS=y |
| 12 | CONFIG_MMU=y | ||
| 13 | # CONFIG_NO_IOPORT is not set | ||
| 14 | CONFIG_GENERIC_HARDIRQS=y | 12 | CONFIG_GENERIC_HARDIRQS=y |
| 15 | CONFIG_STACKTRACE_SUPPORT=y | 13 | CONFIG_STACKTRACE_SUPPORT=y |
| 14 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 16 | CONFIG_LOCKDEP_SUPPORT=y | 15 | CONFIG_LOCKDEP_SUPPORT=y |
| 17 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | 16 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y |
| 18 | CONFIG_HARDIRQS_SW_RESEND=y | 17 | CONFIG_HARDIRQS_SW_RESEND=y |
| 19 | CONFIG_GENERIC_IRQ_PROBE=y | 18 | CONFIG_GENERIC_IRQ_PROBE=y |
| 20 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | 19 | CONFIG_RWSEM_GENERIC_SPINLOCK=y |
| 21 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | 20 | CONFIG_ARCH_HAS_CPUFREQ=y |
| 22 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
| 23 | CONFIG_GENERIC_HWEIGHT=y | 21 | CONFIG_GENERIC_HWEIGHT=y |
| 24 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 22 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
| 25 | CONFIG_ARCH_SUPPORTS_AOUT=y | ||
| 26 | CONFIG_ZONE_DMA=y | ||
| 27 | CONFIG_ARCH_MTD_XIP=y | 23 | CONFIG_ARCH_MTD_XIP=y |
| 24 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 28 | CONFIG_VECTORS_BASE=0xffff0000 | 25 | CONFIG_VECTORS_BASE=0xffff0000 |
| 29 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 26 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
| 27 | CONFIG_CONSTRUCTORS=y | ||
| 30 | 28 | ||
| 31 | # | 29 | # |
| 32 | # General setup | 30 | # General setup |
| @@ -35,7 +33,7 @@ CONFIG_EXPERIMENTAL=y | |||
| 35 | CONFIG_BROKEN_ON_SMP=y | 33 | CONFIG_BROKEN_ON_SMP=y |
| 36 | CONFIG_LOCK_KERNEL=y | 34 | CONFIG_LOCK_KERNEL=y |
| 37 | CONFIG_INIT_ENV_ARG_LIMIT=32 | 35 | CONFIG_INIT_ENV_ARG_LIMIT=32 |
| 38 | CONFIG_LOCALVERSION="-ezxdev" | 36 | CONFIG_LOCALVERSION="-ezx200910312315" |
| 39 | # CONFIG_LOCALVERSION_AUTO is not set | 37 | # CONFIG_LOCALVERSION_AUTO is not set |
| 40 | CONFIG_SWAP=y | 38 | CONFIG_SWAP=y |
| 41 | CONFIG_SYSVIPC=y | 39 | CONFIG_SYSVIPC=y |
| @@ -44,56 +42,78 @@ CONFIG_SYSVIPC_SYSCTL=y | |||
| 44 | # CONFIG_BSD_PROCESS_ACCT is not set | 42 | # CONFIG_BSD_PROCESS_ACCT is not set |
| 45 | # CONFIG_TASKSTATS is not set | 43 | # CONFIG_TASKSTATS is not set |
| 46 | # CONFIG_AUDIT is not set | 44 | # CONFIG_AUDIT is not set |
| 47 | CONFIG_IKCONFIG=y | 45 | |
| 48 | CONFIG_IKCONFIG_PROC=y | 46 | # |
| 47 | # RCU Subsystem | ||
| 48 | # | ||
| 49 | CONFIG_TREE_RCU=y | ||
| 50 | # CONFIG_TREE_PREEMPT_RCU is not set | ||
| 51 | # CONFIG_RCU_TRACE is not set | ||
| 52 | CONFIG_RCU_FANOUT=32 | ||
| 53 | # CONFIG_RCU_FANOUT_EXACT is not set | ||
| 54 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 55 | # CONFIG_IKCONFIG is not set | ||
| 49 | CONFIG_LOG_BUF_SHIFT=14 | 56 | CONFIG_LOG_BUF_SHIFT=14 |
| 50 | # CONFIG_CGROUPS is not set | ||
| 51 | CONFIG_GROUP_SCHED=y | 57 | CONFIG_GROUP_SCHED=y |
| 52 | CONFIG_FAIR_GROUP_SCHED=y | 58 | CONFIG_FAIR_GROUP_SCHED=y |
| 53 | # CONFIG_RT_GROUP_SCHED is not set | 59 | # CONFIG_RT_GROUP_SCHED is not set |
| 54 | CONFIG_USER_SCHED=y | 60 | CONFIG_USER_SCHED=y |
| 55 | # CONFIG_CGROUP_SCHED is not set | 61 | # CONFIG_CGROUP_SCHED is not set |
| 62 | # CONFIG_CGROUPS is not set | ||
| 56 | CONFIG_SYSFS_DEPRECATED=y | 63 | CONFIG_SYSFS_DEPRECATED=y |
| 57 | CONFIG_SYSFS_DEPRECATED_V2=y | 64 | CONFIG_SYSFS_DEPRECATED_V2=y |
| 58 | # CONFIG_RELAY is not set | 65 | # CONFIG_RELAY is not set |
| 59 | # CONFIG_NAMESPACES is not set | 66 | # CONFIG_NAMESPACES is not set |
| 60 | # CONFIG_BLK_DEV_INITRD is not set | 67 | CONFIG_BLK_DEV_INITRD=y |
| 68 | CONFIG_INITRAMFS_SOURCE="" | ||
| 69 | CONFIG_RD_GZIP=y | ||
| 70 | CONFIG_RD_BZIP2=y | ||
| 71 | CONFIG_RD_LZMA=y | ||
| 61 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | 72 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y |
| 62 | CONFIG_SYSCTL=y | 73 | CONFIG_SYSCTL=y |
| 74 | CONFIG_ANON_INODES=y | ||
| 63 | CONFIG_EMBEDDED=y | 75 | CONFIG_EMBEDDED=y |
| 64 | CONFIG_UID16=y | 76 | CONFIG_UID16=y |
| 65 | CONFIG_SYSCTL_SYSCALL=y | 77 | CONFIG_SYSCTL_SYSCALL=y |
| 66 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
| 67 | CONFIG_KALLSYMS=y | 78 | CONFIG_KALLSYMS=y |
| 79 | CONFIG_KALLSYMS_ALL=y | ||
| 68 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 80 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
| 69 | CONFIG_HOTPLUG=y | 81 | CONFIG_HOTPLUG=y |
| 70 | CONFIG_PRINTK=y | 82 | CONFIG_PRINTK=y |
| 71 | CONFIG_BUG=y | 83 | CONFIG_BUG=y |
| 72 | CONFIG_ELF_CORE=y | 84 | CONFIG_ELF_CORE=y |
| 73 | # CONFIG_COMPAT_BRK is not set | ||
| 74 | CONFIG_BASE_FULL=y | 85 | CONFIG_BASE_FULL=y |
| 75 | CONFIG_FUTEX=y | 86 | CONFIG_FUTEX=y |
| 76 | CONFIG_ANON_INODES=y | ||
| 77 | CONFIG_EPOLL=y | 87 | CONFIG_EPOLL=y |
| 78 | CONFIG_SIGNALFD=y | 88 | CONFIG_SIGNALFD=y |
| 79 | CONFIG_TIMERFD=y | 89 | CONFIG_TIMERFD=y |
| 80 | CONFIG_EVENTFD=y | 90 | CONFIG_EVENTFD=y |
| 81 | CONFIG_SHMEM=y | 91 | CONFIG_SHMEM=y |
| 92 | CONFIG_AIO=y | ||
| 93 | |||
| 94 | # | ||
| 95 | # Kernel Performance Events And Counters | ||
| 96 | # | ||
| 82 | CONFIG_VM_EVENT_COUNTERS=y | 97 | CONFIG_VM_EVENT_COUNTERS=y |
| 98 | # CONFIG_COMPAT_BRK is not set | ||
| 83 | CONFIG_SLAB=y | 99 | CONFIG_SLAB=y |
| 84 | # CONFIG_SLUB is not set | 100 | # CONFIG_SLUB is not set |
| 85 | # CONFIG_SLOB is not set | 101 | # CONFIG_SLOB is not set |
| 86 | # CONFIG_PROFILING is not set | 102 | # CONFIG_PROFILING is not set |
| 87 | # CONFIG_MARKERS is not set | ||
| 88 | CONFIG_HAVE_OPROFILE=y | 103 | CONFIG_HAVE_OPROFILE=y |
| 89 | # CONFIG_KPROBES is not set | 104 | # CONFIG_KPROBES is not set |
| 90 | CONFIG_HAVE_KPROBES=y | 105 | CONFIG_HAVE_KPROBES=y |
| 91 | CONFIG_HAVE_KRETPROBES=y | 106 | CONFIG_HAVE_KRETPROBES=y |
| 92 | # CONFIG_HAVE_DMA_ATTRS is not set | 107 | CONFIG_HAVE_CLK=y |
| 93 | CONFIG_PROC_PAGE_MONITOR=y | 108 | |
| 109 | # | ||
| 110 | # GCOV-based kernel profiling | ||
| 111 | # | ||
| 112 | # CONFIG_GCOV_KERNEL is not set | ||
| 113 | CONFIG_SLOW_WORK=y | ||
| 114 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 94 | CONFIG_SLABINFO=y | 115 | CONFIG_SLABINFO=y |
| 95 | CONFIG_RT_MUTEXES=y | 116 | CONFIG_RT_MUTEXES=y |
| 96 | # CONFIG_TINY_SHMEM is not set | ||
| 97 | CONFIG_BASE_SMALL=0 | 117 | CONFIG_BASE_SMALL=0 |
| 98 | CONFIG_MODULES=y | 118 | CONFIG_MODULES=y |
| 99 | # CONFIG_MODULE_FORCE_LOAD is not set | 119 | # CONFIG_MODULE_FORCE_LOAD is not set |
| @@ -101,12 +121,10 @@ CONFIG_MODULE_UNLOAD=y | |||
| 101 | CONFIG_MODULE_FORCE_UNLOAD=y | 121 | CONFIG_MODULE_FORCE_UNLOAD=y |
| 102 | CONFIG_MODVERSIONS=y | 122 | CONFIG_MODVERSIONS=y |
| 103 | # CONFIG_MODULE_SRCVERSION_ALL is not set | 123 | # CONFIG_MODULE_SRCVERSION_ALL is not set |
| 104 | CONFIG_KMOD=y | ||
| 105 | CONFIG_BLOCK=y | 124 | CONFIG_BLOCK=y |
| 106 | # CONFIG_LBD is not set | 125 | # CONFIG_LBDAF is not set |
| 107 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 108 | # CONFIG_LSF is not set | ||
| 109 | # CONFIG_BLK_DEV_BSG is not set | 126 | # CONFIG_BLK_DEV_BSG is not set |
| 127 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 110 | 128 | ||
| 111 | # | 129 | # |
| 112 | # IO Schedulers | 130 | # IO Schedulers |
| @@ -120,25 +138,27 @@ CONFIG_DEFAULT_DEADLINE=y | |||
| 120 | # CONFIG_DEFAULT_CFQ is not set | 138 | # CONFIG_DEFAULT_CFQ is not set |
| 121 | # CONFIG_DEFAULT_NOOP is not set | 139 | # CONFIG_DEFAULT_NOOP is not set |
| 122 | CONFIG_DEFAULT_IOSCHED="deadline" | 140 | CONFIG_DEFAULT_IOSCHED="deadline" |
| 123 | CONFIG_CLASSIC_RCU=y | 141 | CONFIG_FREEZER=y |
| 124 | 142 | ||
| 125 | # | 143 | # |
| 126 | # System Type | 144 | # System Type |
| 127 | # | 145 | # |
| 146 | CONFIG_MMU=y | ||
| 128 | # CONFIG_ARCH_AAEC2000 is not set | 147 | # CONFIG_ARCH_AAEC2000 is not set |
| 129 | # CONFIG_ARCH_INTEGRATOR is not set | 148 | # CONFIG_ARCH_INTEGRATOR is not set |
| 130 | # CONFIG_ARCH_REALVIEW is not set | 149 | # CONFIG_ARCH_REALVIEW is not set |
| 131 | # CONFIG_ARCH_VERSATILE is not set | 150 | # CONFIG_ARCH_VERSATILE is not set |
| 132 | # CONFIG_ARCH_AT91 is not set | 151 | # CONFIG_ARCH_AT91 is not set |
| 133 | # CONFIG_ARCH_CLPS7500 is not set | ||
| 134 | # CONFIG_ARCH_CLPS711X is not set | 152 | # CONFIG_ARCH_CLPS711X is not set |
| 135 | # CONFIG_ARCH_CO285 is not set | 153 | # CONFIG_ARCH_GEMINI is not set |
| 136 | # CONFIG_ARCH_EBSA110 is not set | 154 | # CONFIG_ARCH_EBSA110 is not set |
| 137 | # CONFIG_ARCH_EP93XX is not set | 155 | # CONFIG_ARCH_EP93XX is not set |
| 138 | # CONFIG_ARCH_FOOTBRIDGE is not set | 156 | # CONFIG_ARCH_FOOTBRIDGE is not set |
| 157 | # CONFIG_ARCH_MXC is not set | ||
| 158 | # CONFIG_ARCH_STMP3XXX is not set | ||
| 139 | # CONFIG_ARCH_NETX is not set | 159 | # CONFIG_ARCH_NETX is not set |
| 140 | # CONFIG_ARCH_H720X is not set | 160 | # CONFIG_ARCH_H720X is not set |
| 141 | # CONFIG_ARCH_IMX is not set | 161 | # CONFIG_ARCH_NOMADIK is not set |
| 142 | # CONFIG_ARCH_IOP13XX is not set | 162 | # CONFIG_ARCH_IOP13XX is not set |
| 143 | # CONFIG_ARCH_IOP32X is not set | 163 | # CONFIG_ARCH_IOP32X is not set |
| 144 | # CONFIG_ARCH_IOP33X is not set | 164 | # CONFIG_ARCH_IOP33X is not set |
| @@ -146,39 +166,64 @@ CONFIG_CLASSIC_RCU=y | |||
| 146 | # CONFIG_ARCH_IXP2000 is not set | 166 | # CONFIG_ARCH_IXP2000 is not set |
| 147 | # CONFIG_ARCH_IXP4XX is not set | 167 | # CONFIG_ARCH_IXP4XX is not set |
| 148 | # CONFIG_ARCH_L7200 is not set | 168 | # CONFIG_ARCH_L7200 is not set |
| 169 | # CONFIG_ARCH_KIRKWOOD is not set | ||
| 170 | # CONFIG_ARCH_LOKI is not set | ||
| 171 | # CONFIG_ARCH_MV78XX0 is not set | ||
| 172 | # CONFIG_ARCH_ORION5X is not set | ||
| 173 | # CONFIG_ARCH_MMP is not set | ||
| 149 | # CONFIG_ARCH_KS8695 is not set | 174 | # CONFIG_ARCH_KS8695 is not set |
| 150 | # CONFIG_ARCH_NS9XXX is not set | 175 | # CONFIG_ARCH_NS9XXX is not set |
| 151 | # CONFIG_ARCH_MXC is not set | 176 | # CONFIG_ARCH_W90X900 is not set |
| 152 | # CONFIG_ARCH_ORION5X is not set | ||
| 153 | # CONFIG_ARCH_PNX4008 is not set | 177 | # CONFIG_ARCH_PNX4008 is not set |
| 154 | CONFIG_ARCH_PXA=y | 178 | CONFIG_ARCH_PXA=y |
| 179 | # CONFIG_ARCH_MSM is not set | ||
| 155 | # CONFIG_ARCH_RPC is not set | 180 | # CONFIG_ARCH_RPC is not set |
| 156 | # CONFIG_ARCH_SA1100 is not set | 181 | # CONFIG_ARCH_SA1100 is not set |
| 157 | # CONFIG_ARCH_S3C2410 is not set | 182 | # CONFIG_ARCH_S3C2410 is not set |
| 183 | # CONFIG_ARCH_S3C64XX is not set | ||
| 184 | # CONFIG_ARCH_S5PC1XX is not set | ||
| 158 | # CONFIG_ARCH_SHARK is not set | 185 | # CONFIG_ARCH_SHARK is not set |
| 159 | # CONFIG_ARCH_LH7A40X is not set | 186 | # CONFIG_ARCH_LH7A40X is not set |
| 187 | # CONFIG_ARCH_U300 is not set | ||
| 160 | # CONFIG_ARCH_DAVINCI is not set | 188 | # CONFIG_ARCH_DAVINCI is not set |
| 161 | # CONFIG_ARCH_OMAP is not set | 189 | # CONFIG_ARCH_OMAP is not set |
| 162 | # CONFIG_ARCH_MSM7X00A is not set | 190 | # CONFIG_ARCH_BCMRING is not set |
| 163 | 191 | ||
| 164 | # | 192 | # |
| 165 | # Intel PXA2xx/PXA3xx Implementations | 193 | # Intel PXA2xx/PXA3xx Implementations |
| 166 | # | 194 | # |
| 167 | # CONFIG_ARCH_GUMSTIX is not set | 195 | # CONFIG_ARCH_GUMSTIX is not set |
| 196 | # CONFIG_MACH_INTELMOTE2 is not set | ||
| 197 | # CONFIG_MACH_STARGATE2 is not set | ||
| 168 | # CONFIG_ARCH_LUBBOCK is not set | 198 | # CONFIG_ARCH_LUBBOCK is not set |
| 169 | # CONFIG_MACH_LOGICPD_PXA270 is not set | 199 | # CONFIG_MACH_LOGICPD_PXA270 is not set |
| 170 | # CONFIG_MACH_MAINSTONE is not set | 200 | # CONFIG_MACH_MAINSTONE is not set |
| 201 | # CONFIG_MACH_MP900C is not set | ||
| 202 | # CONFIG_MACH_BALLOON3 is not set | ||
| 171 | # CONFIG_ARCH_PXA_IDP is not set | 203 | # CONFIG_ARCH_PXA_IDP is not set |
| 172 | # CONFIG_PXA_SHARPSL is not set | 204 | # CONFIG_PXA_SHARPSL is not set |
| 205 | # CONFIG_ARCH_VIPER is not set | ||
| 173 | # CONFIG_ARCH_PXA_ESERIES is not set | 206 | # CONFIG_ARCH_PXA_ESERIES is not set |
| 174 | # CONFIG_MACH_TRIZEPS4 is not set | 207 | # CONFIG_TRIZEPS_PXA is not set |
| 208 | # CONFIG_MACH_H5000 is not set | ||
| 175 | # CONFIG_MACH_EM_X270 is not set | 209 | # CONFIG_MACH_EM_X270 is not set |
| 210 | # CONFIG_MACH_EXEDA is not set | ||
| 176 | # CONFIG_MACH_COLIBRI is not set | 211 | # CONFIG_MACH_COLIBRI is not set |
| 212 | # CONFIG_MACH_COLIBRI300 is not set | ||
| 213 | # CONFIG_MACH_COLIBRI320 is not set | ||
| 177 | # CONFIG_MACH_ZYLONITE is not set | 214 | # CONFIG_MACH_ZYLONITE is not set |
| 178 | # CONFIG_MACH_LITTLETON is not set | 215 | # CONFIG_MACH_LITTLETON is not set |
| 216 | # CONFIG_MACH_TAVOREVB is not set | ||
| 217 | # CONFIG_MACH_SAAR is not set | ||
| 179 | # CONFIG_MACH_ARMCORE is not set | 218 | # CONFIG_MACH_ARMCORE is not set |
| 219 | # CONFIG_MACH_CM_X300 is not set | ||
| 220 | # CONFIG_MACH_H4700 is not set | ||
| 180 | # CONFIG_MACH_MAGICIAN is not set | 221 | # CONFIG_MACH_MAGICIAN is not set |
| 222 | # CONFIG_MACH_HIMALAYA is not set | ||
| 223 | # CONFIG_MACH_MIOA701 is not set | ||
| 181 | # CONFIG_MACH_PCM027 is not set | 224 | # CONFIG_MACH_PCM027 is not set |
| 225 | # CONFIG_ARCH_PXA_PALM is not set | ||
| 226 | # CONFIG_MACH_CSB726 is not set | ||
| 182 | CONFIG_PXA_EZX=y | 227 | CONFIG_PXA_EZX=y |
| 183 | CONFIG_MACH_EZX_A780=y | 228 | CONFIG_MACH_EZX_A780=y |
| 184 | CONFIG_MACH_EZX_E680=y | 229 | CONFIG_MACH_EZX_E680=y |
| @@ -186,17 +231,11 @@ CONFIG_MACH_EZX_A1200=y | |||
| 186 | CONFIG_MACH_EZX_A910=y | 231 | CONFIG_MACH_EZX_A910=y |
| 187 | CONFIG_MACH_EZX_E6=y | 232 | CONFIG_MACH_EZX_E6=y |
| 188 | CONFIG_MACH_EZX_E2=y | 233 | CONFIG_MACH_EZX_E2=y |
| 234 | # CONFIG_MACH_XCEP is not set | ||
| 189 | CONFIG_PXA27x=y | 235 | CONFIG_PXA27x=y |
| 190 | CONFIG_PXA_SSP=y | 236 | CONFIG_PXA_SSP=y |
| 191 | CONFIG_PXA_PWM=y | 237 | CONFIG_PXA_HAVE_BOARD_IRQS=y |
| 192 | 238 | CONFIG_PLAT_PXA=y | |
| 193 | # | ||
| 194 | # Boot options | ||
| 195 | # | ||
| 196 | |||
| 197 | # | ||
| 198 | # Power management | ||
| 199 | # | ||
| 200 | 239 | ||
| 201 | # | 240 | # |
| 202 | # Processor Type | 241 | # Processor Type |
| @@ -205,7 +244,7 @@ CONFIG_CPU_32=y | |||
| 205 | CONFIG_CPU_XSCALE=y | 244 | CONFIG_CPU_XSCALE=y |
| 206 | CONFIG_CPU_32v5=y | 245 | CONFIG_CPU_32v5=y |
| 207 | CONFIG_CPU_ABRT_EV5T=y | 246 | CONFIG_CPU_ABRT_EV5T=y |
| 208 | CONFIG_CPU_PABRT_NOIFAR=y | 247 | CONFIG_CPU_PABRT_LEGACY=y |
| 209 | CONFIG_CPU_CACHE_VIVT=y | 248 | CONFIG_CPU_CACHE_VIVT=y |
| 210 | CONFIG_CPU_TLB_V4WBI=y | 249 | CONFIG_CPU_TLB_V4WBI=y |
| 211 | CONFIG_CPU_CP15=y | 250 | CONFIG_CPU_CP15=y |
| @@ -216,9 +255,10 @@ CONFIG_CPU_CP15_MMU=y | |||
| 216 | # | 255 | # |
| 217 | CONFIG_ARM_THUMB=y | 256 | CONFIG_ARM_THUMB=y |
| 218 | # CONFIG_CPU_DCACHE_DISABLE is not set | 257 | # CONFIG_CPU_DCACHE_DISABLE is not set |
| 219 | # CONFIG_OUTER_CACHE is not set | 258 | CONFIG_ARM_L1_CACHE_SHIFT=5 |
| 220 | CONFIG_IWMMXT=y | 259 | CONFIG_IWMMXT=y |
| 221 | CONFIG_XSCALE_PMU=y | 260 | CONFIG_XSCALE_PMU=y |
| 261 | CONFIG_COMMON_CLKDEV=y | ||
| 222 | 262 | ||
| 223 | # | 263 | # |
| 224 | # Bus support | 264 | # Bus support |
| @@ -231,44 +271,71 @@ CONFIG_XSCALE_PMU=y | |||
| 231 | # Kernel Features | 271 | # Kernel Features |
| 232 | # | 272 | # |
| 233 | CONFIG_TICK_ONESHOT=y | 273 | CONFIG_TICK_ONESHOT=y |
| 234 | # CONFIG_NO_HZ is not set | 274 | CONFIG_NO_HZ=y |
| 235 | CONFIG_HIGH_RES_TIMERS=y | 275 | CONFIG_HIGH_RES_TIMERS=y |
| 236 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | 276 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y |
| 277 | CONFIG_VMSPLIT_3G=y | ||
| 278 | # CONFIG_VMSPLIT_2G is not set | ||
| 279 | # CONFIG_VMSPLIT_1G is not set | ||
| 280 | CONFIG_PAGE_OFFSET=0xC0000000 | ||
| 281 | # CONFIG_PREEMPT_NONE is not set | ||
| 282 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
| 237 | CONFIG_PREEMPT=y | 283 | CONFIG_PREEMPT=y |
| 238 | CONFIG_HZ=100 | 284 | CONFIG_HZ=100 |
| 239 | CONFIG_AEABI=y | 285 | CONFIG_AEABI=y |
| 240 | CONFIG_OABI_COMPAT=y | 286 | CONFIG_OABI_COMPAT=y |
| 241 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set | 287 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set |
| 288 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | ||
| 289 | # CONFIG_HIGHMEM is not set | ||
| 242 | CONFIG_SELECT_MEMORY_MODEL=y | 290 | CONFIG_SELECT_MEMORY_MODEL=y |
| 243 | CONFIG_FLATMEM_MANUAL=y | 291 | CONFIG_FLATMEM_MANUAL=y |
| 244 | # CONFIG_DISCONTIGMEM_MANUAL is not set | 292 | # CONFIG_DISCONTIGMEM_MANUAL is not set |
| 245 | # CONFIG_SPARSEMEM_MANUAL is not set | 293 | # CONFIG_SPARSEMEM_MANUAL is not set |
| 246 | CONFIG_FLATMEM=y | 294 | CONFIG_FLATMEM=y |
| 247 | CONFIG_FLAT_NODE_MEM_MAP=y | 295 | CONFIG_FLAT_NODE_MEM_MAP=y |
| 248 | # CONFIG_SPARSEMEM_STATIC is not set | ||
| 249 | # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set | ||
| 250 | CONFIG_PAGEFLAGS_EXTENDED=y | 296 | CONFIG_PAGEFLAGS_EXTENDED=y |
| 251 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | 297 | CONFIG_SPLIT_PTLOCK_CPUS=4096 |
| 252 | # CONFIG_RESOURCES_64BIT is not set | 298 | # CONFIG_PHYS_ADDR_T_64BIT is not set |
| 253 | CONFIG_ZONE_DMA_FLAG=1 | 299 | CONFIG_ZONE_DMA_FLAG=0 |
| 254 | CONFIG_BOUNCE=y | ||
| 255 | CONFIG_VIRT_TO_BUS=y | 300 | CONFIG_VIRT_TO_BUS=y |
| 301 | CONFIG_HAVE_MLOCK=y | ||
| 302 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
| 303 | # CONFIG_KSM is not set | ||
| 304 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
| 256 | CONFIG_ALIGNMENT_TRAP=y | 305 | CONFIG_ALIGNMENT_TRAP=y |
| 306 | # CONFIG_UACCESS_WITH_MEMCPY is not set | ||
| 257 | 307 | ||
| 258 | # | 308 | # |
| 259 | # Boot options | 309 | # Boot options |
| 260 | # | 310 | # |
| 261 | CONFIG_ZBOOT_ROM_TEXT=0x0 | 311 | CONFIG_ZBOOT_ROM_TEXT=0x0 |
| 262 | CONFIG_ZBOOT_ROM_BSS=0x0 | 312 | CONFIG_ZBOOT_ROM_BSS=0x0 |
| 263 | CONFIG_CMDLINE="console=tty1 root=/dev/mmcblk0p2 rootfstype=ext2 rootdelay=1 ip=192.168.0.202:192.168.0.200:192.168.0.200:255.255.255.0 debug" | 313 | CONFIG_CMDLINE="console=tty1 root=/dev/mmcblk0p2 rootfstype=ext2 rootdelay=3 ip=192.168.0.202:192.168.0.200:192.168.0.200:255.255.255.0 debug" |
| 264 | # CONFIG_XIP_KERNEL is not set | 314 | # CONFIG_XIP_KERNEL is not set |
| 265 | CONFIG_KEXEC=y | 315 | CONFIG_KEXEC=y |
| 266 | CONFIG_ATAGS_PROC=y | 316 | CONFIG_ATAGS_PROC=y |
| 267 | 317 | ||
| 268 | # | 318 | # |
| 269 | # CPU Frequency scaling | 319 | # CPU Power Management |
| 270 | # | 320 | # |
| 271 | # CONFIG_CPU_FREQ is not set | 321 | CONFIG_CPU_FREQ=y |
| 322 | CONFIG_CPU_FREQ_TABLE=y | ||
| 323 | CONFIG_CPU_FREQ_DEBUG=y | ||
| 324 | CONFIG_CPU_FREQ_STAT=y | ||
| 325 | # CONFIG_CPU_FREQ_STAT_DETAILS is not set | ||
| 326 | CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y | ||
| 327 | # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set | ||
| 328 | # CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set | ||
| 329 | # CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set | ||
| 330 | # CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set | ||
| 331 | CONFIG_CPU_FREQ_GOV_PERFORMANCE=y | ||
| 332 | CONFIG_CPU_FREQ_GOV_POWERSAVE=m | ||
| 333 | CONFIG_CPU_FREQ_GOV_USERSPACE=m | ||
| 334 | CONFIG_CPU_FREQ_GOV_ONDEMAND=m | ||
| 335 | CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m | ||
| 336 | CONFIG_CPU_IDLE=y | ||
| 337 | CONFIG_CPU_IDLE_GOV_LADDER=y | ||
| 338 | CONFIG_CPU_IDLE_GOV_MENU=y | ||
| 272 | 339 | ||
| 273 | # | 340 | # |
| 274 | # Floating point emulation | 341 | # Floating point emulation |
| @@ -285,6 +352,8 @@ CONFIG_FPE_NWFPE=y | |||
| 285 | # Userspace binary formats | 352 | # Userspace binary formats |
| 286 | # | 353 | # |
| 287 | CONFIG_BINFMT_ELF=y | 354 | CONFIG_BINFMT_ELF=y |
| 355 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 356 | CONFIG_HAVE_AOUT=y | ||
| 288 | CONFIG_BINFMT_AOUT=m | 357 | CONFIG_BINFMT_AOUT=m |
| 289 | CONFIG_BINFMT_MISC=m | 358 | CONFIG_BINFMT_MISC=m |
| 290 | 359 | ||
| @@ -297,11 +366,8 @@ CONFIG_PM_SLEEP=y | |||
| 297 | CONFIG_SUSPEND=y | 366 | CONFIG_SUSPEND=y |
| 298 | CONFIG_SUSPEND_FREEZER=y | 367 | CONFIG_SUSPEND_FREEZER=y |
| 299 | CONFIG_APM_EMULATION=y | 368 | CONFIG_APM_EMULATION=y |
| 369 | CONFIG_PM_RUNTIME=y | ||
| 300 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | 370 | CONFIG_ARCH_SUSPEND_POSSIBLE=y |
| 301 | |||
| 302 | # | ||
| 303 | # Networking | ||
| 304 | # | ||
| 305 | CONFIG_NET=y | 371 | CONFIG_NET=y |
| 306 | 372 | ||
| 307 | # | 373 | # |
| @@ -315,6 +381,7 @@ CONFIG_XFRM=y | |||
| 315 | # CONFIG_XFRM_SUB_POLICY is not set | 381 | # CONFIG_XFRM_SUB_POLICY is not set |
| 316 | # CONFIG_XFRM_MIGRATE is not set | 382 | # CONFIG_XFRM_MIGRATE is not set |
| 317 | # CONFIG_XFRM_STATISTICS is not set | 383 | # CONFIG_XFRM_STATISTICS is not set |
| 384 | CONFIG_XFRM_IPCOMP=m | ||
| 318 | # CONFIG_NET_KEY is not set | 385 | # CONFIG_NET_KEY is not set |
| 319 | CONFIG_INET=y | 386 | CONFIG_INET=y |
| 320 | # CONFIG_IP_MULTICAST is not set | 387 | # CONFIG_IP_MULTICAST is not set |
| @@ -342,7 +409,6 @@ CONFIG_INET_TUNNEL=m | |||
| 342 | CONFIG_TCP_CONG_CUBIC=y | 409 | CONFIG_TCP_CONG_CUBIC=y |
| 343 | CONFIG_DEFAULT_TCP_CONG="cubic" | 410 | CONFIG_DEFAULT_TCP_CONG="cubic" |
| 344 | # CONFIG_TCP_MD5SIG is not set | 411 | # CONFIG_TCP_MD5SIG is not set |
| 345 | # CONFIG_IP_VS is not set | ||
| 346 | CONFIG_IPV6=m | 412 | CONFIG_IPV6=m |
| 347 | # CONFIG_IPV6_PRIVACY is not set | 413 | # CONFIG_IPV6_PRIVACY is not set |
| 348 | # CONFIG_IPV6_ROUTER_PREF is not set | 414 | # CONFIG_IPV6_ROUTER_PREF is not set |
| @@ -393,18 +459,22 @@ CONFIG_NF_CONNTRACK_SANE=m | |||
| 393 | CONFIG_NF_CONNTRACK_SIP=m | 459 | CONFIG_NF_CONNTRACK_SIP=m |
| 394 | CONFIG_NF_CONNTRACK_TFTP=m | 460 | CONFIG_NF_CONNTRACK_TFTP=m |
| 395 | CONFIG_NF_CT_NETLINK=m | 461 | CONFIG_NF_CT_NETLINK=m |
| 462 | # CONFIG_NETFILTER_TPROXY is not set | ||
| 396 | CONFIG_NETFILTER_XTABLES=m | 463 | CONFIG_NETFILTER_XTABLES=m |
| 397 | CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m | 464 | CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m |
| 398 | # CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set | 465 | # CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set |
| 399 | # CONFIG_NETFILTER_XT_TARGET_DSCP is not set | 466 | # CONFIG_NETFILTER_XT_TARGET_DSCP is not set |
| 467 | CONFIG_NETFILTER_XT_TARGET_HL=m | ||
| 468 | CONFIG_NETFILTER_XT_TARGET_LED=m | ||
| 400 | CONFIG_NETFILTER_XT_TARGET_MARK=m | 469 | CONFIG_NETFILTER_XT_TARGET_MARK=m |
| 401 | CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m | ||
| 402 | CONFIG_NETFILTER_XT_TARGET_NFLOG=m | 470 | CONFIG_NETFILTER_XT_TARGET_NFLOG=m |
| 471 | CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m | ||
| 403 | # CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set | 472 | # CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set |
| 404 | # CONFIG_NETFILTER_XT_TARGET_RATEEST is not set | 473 | # CONFIG_NETFILTER_XT_TARGET_RATEEST is not set |
| 405 | # CONFIG_NETFILTER_XT_TARGET_TRACE is not set | 474 | # CONFIG_NETFILTER_XT_TARGET_TRACE is not set |
| 406 | CONFIG_NETFILTER_XT_TARGET_TCPMSS=m | 475 | CONFIG_NETFILTER_XT_TARGET_TCPMSS=m |
| 407 | # CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set | 476 | # CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set |
| 477 | # CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set | ||
| 408 | CONFIG_NETFILTER_XT_MATCH_COMMENT=m | 478 | CONFIG_NETFILTER_XT_MATCH_COMMENT=m |
| 409 | CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m | 479 | CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m |
| 410 | CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m | 480 | CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m |
| @@ -413,20 +483,23 @@ CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m | |||
| 413 | CONFIG_NETFILTER_XT_MATCH_DCCP=m | 483 | CONFIG_NETFILTER_XT_MATCH_DCCP=m |
| 414 | CONFIG_NETFILTER_XT_MATCH_DSCP=m | 484 | CONFIG_NETFILTER_XT_MATCH_DSCP=m |
| 415 | CONFIG_NETFILTER_XT_MATCH_ESP=m | 485 | CONFIG_NETFILTER_XT_MATCH_ESP=m |
| 486 | CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m | ||
| 416 | CONFIG_NETFILTER_XT_MATCH_HELPER=m | 487 | CONFIG_NETFILTER_XT_MATCH_HELPER=m |
| 488 | CONFIG_NETFILTER_XT_MATCH_HL=m | ||
| 417 | # CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set | 489 | # CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set |
| 418 | CONFIG_NETFILTER_XT_MATCH_LENGTH=m | 490 | CONFIG_NETFILTER_XT_MATCH_LENGTH=m |
| 419 | CONFIG_NETFILTER_XT_MATCH_LIMIT=m | 491 | CONFIG_NETFILTER_XT_MATCH_LIMIT=m |
| 420 | CONFIG_NETFILTER_XT_MATCH_MAC=m | 492 | CONFIG_NETFILTER_XT_MATCH_MAC=m |
| 421 | CONFIG_NETFILTER_XT_MATCH_MARK=m | 493 | CONFIG_NETFILTER_XT_MATCH_MARK=m |
| 494 | CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m | ||
| 422 | # CONFIG_NETFILTER_XT_MATCH_OWNER is not set | 495 | # CONFIG_NETFILTER_XT_MATCH_OWNER is not set |
| 423 | CONFIG_NETFILTER_XT_MATCH_POLICY=m | 496 | CONFIG_NETFILTER_XT_MATCH_POLICY=m |
| 424 | CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m | ||
| 425 | # CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set | 497 | # CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set |
| 426 | CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m | 498 | CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m |
| 427 | CONFIG_NETFILTER_XT_MATCH_QUOTA=m | 499 | CONFIG_NETFILTER_XT_MATCH_QUOTA=m |
| 428 | # CONFIG_NETFILTER_XT_MATCH_RATEEST is not set | 500 | # CONFIG_NETFILTER_XT_MATCH_RATEEST is not set |
| 429 | CONFIG_NETFILTER_XT_MATCH_REALM=m | 501 | CONFIG_NETFILTER_XT_MATCH_REALM=m |
| 502 | # CONFIG_NETFILTER_XT_MATCH_RECENT is not set | ||
| 430 | CONFIG_NETFILTER_XT_MATCH_SCTP=m | 503 | CONFIG_NETFILTER_XT_MATCH_SCTP=m |
| 431 | CONFIG_NETFILTER_XT_MATCH_STATE=m | 504 | CONFIG_NETFILTER_XT_MATCH_STATE=m |
| 432 | CONFIG_NETFILTER_XT_MATCH_STATISTIC=m | 505 | CONFIG_NETFILTER_XT_MATCH_STATISTIC=m |
| @@ -434,20 +507,21 @@ CONFIG_NETFILTER_XT_MATCH_STRING=m | |||
| 434 | CONFIG_NETFILTER_XT_MATCH_TCPMSS=m | 507 | CONFIG_NETFILTER_XT_MATCH_TCPMSS=m |
| 435 | CONFIG_NETFILTER_XT_MATCH_TIME=m | 508 | CONFIG_NETFILTER_XT_MATCH_TIME=m |
| 436 | CONFIG_NETFILTER_XT_MATCH_U32=m | 509 | CONFIG_NETFILTER_XT_MATCH_U32=m |
| 437 | CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m | 510 | # CONFIG_NETFILTER_XT_MATCH_OSF is not set |
| 511 | # CONFIG_IP_VS is not set | ||
| 438 | 512 | ||
| 439 | # | 513 | # |
| 440 | # IP: Netfilter Configuration | 514 | # IP: Netfilter Configuration |
| 441 | # | 515 | # |
| 516 | CONFIG_NF_DEFRAG_IPV4=m | ||
| 442 | CONFIG_NF_CONNTRACK_IPV4=m | 517 | CONFIG_NF_CONNTRACK_IPV4=m |
| 443 | CONFIG_NF_CONNTRACK_PROC_COMPAT=y | 518 | CONFIG_NF_CONNTRACK_PROC_COMPAT=y |
| 444 | CONFIG_IP_NF_QUEUE=m | 519 | CONFIG_IP_NF_QUEUE=m |
| 445 | CONFIG_IP_NF_IPTABLES=m | 520 | CONFIG_IP_NF_IPTABLES=m |
| 446 | CONFIG_IP_NF_MATCH_RECENT=m | 521 | CONFIG_IP_NF_MATCH_ADDRTYPE=m |
| 447 | CONFIG_IP_NF_MATCH_ECN=m | ||
| 448 | CONFIG_IP_NF_MATCH_AH=m | 522 | CONFIG_IP_NF_MATCH_AH=m |
| 523 | CONFIG_IP_NF_MATCH_ECN=m | ||
| 449 | CONFIG_IP_NF_MATCH_TTL=m | 524 | CONFIG_IP_NF_MATCH_TTL=m |
| 450 | CONFIG_IP_NF_MATCH_ADDRTYPE=m | ||
| 451 | CONFIG_IP_NF_FILTER=m | 525 | CONFIG_IP_NF_FILTER=m |
| 452 | CONFIG_IP_NF_TARGET_REJECT=m | 526 | CONFIG_IP_NF_TARGET_REJECT=m |
| 453 | CONFIG_IP_NF_TARGET_LOG=m | 527 | CONFIG_IP_NF_TARGET_LOG=m |
| @@ -455,8 +529,8 @@ CONFIG_IP_NF_TARGET_ULOG=m | |||
| 455 | CONFIG_NF_NAT=m | 529 | CONFIG_NF_NAT=m |
| 456 | CONFIG_NF_NAT_NEEDED=y | 530 | CONFIG_NF_NAT_NEEDED=y |
| 457 | CONFIG_IP_NF_TARGET_MASQUERADE=m | 531 | CONFIG_IP_NF_TARGET_MASQUERADE=m |
| 458 | CONFIG_IP_NF_TARGET_REDIRECT=m | ||
| 459 | CONFIG_IP_NF_TARGET_NETMAP=m | 532 | CONFIG_IP_NF_TARGET_NETMAP=m |
| 533 | CONFIG_IP_NF_TARGET_REDIRECT=m | ||
| 460 | CONFIG_NF_NAT_SNMP_BASIC=m | 534 | CONFIG_NF_NAT_SNMP_BASIC=m |
| 461 | CONFIG_NF_NAT_PROTO_GRE=m | 535 | CONFIG_NF_NAT_PROTO_GRE=m |
| 462 | CONFIG_NF_NAT_PROTO_UDPLITE=m | 536 | CONFIG_NF_NAT_PROTO_UDPLITE=m |
| @@ -469,9 +543,9 @@ CONFIG_NF_NAT_PPTP=m | |||
| 469 | CONFIG_NF_NAT_H323=m | 543 | CONFIG_NF_NAT_H323=m |
| 470 | CONFIG_NF_NAT_SIP=m | 544 | CONFIG_NF_NAT_SIP=m |
| 471 | CONFIG_IP_NF_MANGLE=m | 545 | CONFIG_IP_NF_MANGLE=m |
| 546 | CONFIG_IP_NF_TARGET_CLUSTERIP=m | ||
| 472 | CONFIG_IP_NF_TARGET_ECN=m | 547 | CONFIG_IP_NF_TARGET_ECN=m |
| 473 | CONFIG_IP_NF_TARGET_TTL=m | 548 | CONFIG_IP_NF_TARGET_TTL=m |
| 474 | CONFIG_IP_NF_TARGET_CLUSTERIP=m | ||
| 475 | CONFIG_IP_NF_RAW=m | 549 | CONFIG_IP_NF_RAW=m |
| 476 | CONFIG_IP_NF_ARPTABLES=m | 550 | CONFIG_IP_NF_ARPTABLES=m |
| 477 | CONFIG_IP_NF_ARPFILTER=m | 551 | CONFIG_IP_NF_ARPFILTER=m |
| @@ -483,30 +557,29 @@ CONFIG_IP_NF_ARP_MANGLE=m | |||
| 483 | CONFIG_NF_CONNTRACK_IPV6=m | 557 | CONFIG_NF_CONNTRACK_IPV6=m |
| 484 | CONFIG_IP6_NF_QUEUE=m | 558 | CONFIG_IP6_NF_QUEUE=m |
| 485 | CONFIG_IP6_NF_IPTABLES=m | 559 | CONFIG_IP6_NF_IPTABLES=m |
| 486 | CONFIG_IP6_NF_MATCH_RT=m | 560 | CONFIG_IP6_NF_MATCH_AH=m |
| 487 | CONFIG_IP6_NF_MATCH_OPTS=m | 561 | CONFIG_IP6_NF_MATCH_EUI64=m |
| 488 | CONFIG_IP6_NF_MATCH_FRAG=m | 562 | CONFIG_IP6_NF_MATCH_FRAG=m |
| 563 | CONFIG_IP6_NF_MATCH_OPTS=m | ||
| 489 | CONFIG_IP6_NF_MATCH_HL=m | 564 | CONFIG_IP6_NF_MATCH_HL=m |
| 490 | CONFIG_IP6_NF_MATCH_IPV6HEADER=m | 565 | CONFIG_IP6_NF_MATCH_IPV6HEADER=m |
| 491 | CONFIG_IP6_NF_MATCH_AH=m | ||
| 492 | CONFIG_IP6_NF_MATCH_MH=m | 566 | CONFIG_IP6_NF_MATCH_MH=m |
| 493 | CONFIG_IP6_NF_MATCH_EUI64=m | 567 | CONFIG_IP6_NF_MATCH_RT=m |
| 494 | CONFIG_IP6_NF_FILTER=m | 568 | CONFIG_IP6_NF_TARGET_HL=m |
| 495 | CONFIG_IP6_NF_TARGET_LOG=m | 569 | CONFIG_IP6_NF_TARGET_LOG=m |
| 570 | CONFIG_IP6_NF_FILTER=m | ||
| 496 | CONFIG_IP6_NF_TARGET_REJECT=m | 571 | CONFIG_IP6_NF_TARGET_REJECT=m |
| 497 | CONFIG_IP6_NF_MANGLE=m | 572 | CONFIG_IP6_NF_MANGLE=m |
| 498 | CONFIG_IP6_NF_TARGET_HL=m | ||
| 499 | CONFIG_IP6_NF_RAW=m | 573 | CONFIG_IP6_NF_RAW=m |
| 500 | |||
| 501 | # | ||
| 502 | # Bridge: Netfilter Configuration | ||
| 503 | # | ||
| 504 | # CONFIG_BRIDGE_NF_EBTABLES is not set | 574 | # CONFIG_BRIDGE_NF_EBTABLES is not set |
| 505 | # CONFIG_IP_DCCP is not set | 575 | # CONFIG_IP_DCCP is not set |
| 506 | # CONFIG_IP_SCTP is not set | 576 | # CONFIG_IP_SCTP is not set |
| 577 | # CONFIG_RDS is not set | ||
| 507 | # CONFIG_TIPC is not set | 578 | # CONFIG_TIPC is not set |
| 508 | # CONFIG_ATM is not set | 579 | # CONFIG_ATM is not set |
| 580 | CONFIG_STP=m | ||
| 509 | CONFIG_BRIDGE=m | 581 | CONFIG_BRIDGE=m |
| 582 | # CONFIG_NET_DSA is not set | ||
| 510 | # CONFIG_VLAN_8021Q is not set | 583 | # CONFIG_VLAN_8021Q is not set |
| 511 | # CONFIG_DECNET is not set | 584 | # CONFIG_DECNET is not set |
| 512 | CONFIG_LLC=m | 585 | CONFIG_LLC=m |
| @@ -517,9 +590,11 @@ CONFIG_LLC=m | |||
| 517 | # CONFIG_LAPB is not set | 590 | # CONFIG_LAPB is not set |
| 518 | # CONFIG_ECONET is not set | 591 | # CONFIG_ECONET is not set |
| 519 | # CONFIG_WAN_ROUTER is not set | 592 | # CONFIG_WAN_ROUTER is not set |
| 593 | # CONFIG_PHONET is not set | ||
| 594 | # CONFIG_IEEE802154 is not set | ||
| 520 | # CONFIG_NET_SCHED is not set | 595 | # CONFIG_NET_SCHED is not set |
| 521 | CONFIG_NET_CLS_ROUTE=y | 596 | CONFIG_NET_CLS_ROUTE=y |
| 522 | CONFIG_NET_SCH_FIFO=y | 597 | # CONFIG_DCB is not set |
| 523 | 598 | ||
| 524 | # | 599 | # |
| 525 | # Network testing | 600 | # Network testing |
| @@ -529,64 +604,34 @@ CONFIG_NET_SCH_FIFO=y | |||
| 529 | # CONFIG_CAN is not set | 604 | # CONFIG_CAN is not set |
| 530 | # CONFIG_IRDA is not set | 605 | # CONFIG_IRDA is not set |
| 531 | CONFIG_BT=y | 606 | CONFIG_BT=y |
| 532 | CONFIG_BT_L2CAP=m | 607 | CONFIG_BT_L2CAP=y |
| 533 | CONFIG_BT_SCO=y | 608 | CONFIG_BT_SCO=y |
| 534 | CONFIG_BT_RFCOMM=m | 609 | CONFIG_BT_RFCOMM=y |
| 535 | CONFIG_BT_RFCOMM_TTY=y | 610 | CONFIG_BT_RFCOMM_TTY=y |
| 536 | CONFIG_BT_BNEP=m | 611 | CONFIG_BT_BNEP=y |
| 537 | CONFIG_BT_BNEP_MC_FILTER=y | 612 | CONFIG_BT_BNEP_MC_FILTER=y |
| 538 | CONFIG_BT_BNEP_PROTO_FILTER=y | 613 | CONFIG_BT_BNEP_PROTO_FILTER=y |
| 539 | CONFIG_BT_HIDP=m | 614 | CONFIG_BT_HIDP=y |
| 540 | 615 | ||
| 541 | # | 616 | # |
| 542 | # Bluetooth device drivers | 617 | # Bluetooth device drivers |
| 543 | # | 618 | # |
| 544 | # CONFIG_BT_HCIUSB is not set | 619 | CONFIG_BT_HCIBTUSB=m |
| 545 | # CONFIG_BT_HCIBTUSB is not set | 620 | CONFIG_BT_HCIBTSDIO=m |
| 546 | # CONFIG_BT_HCIBTSDIO is not set | ||
| 547 | CONFIG_BT_HCIUART=y | 621 | CONFIG_BT_HCIUART=y |
| 548 | CONFIG_BT_HCIUART_H4=y | 622 | CONFIG_BT_HCIUART_H4=y |
| 549 | # CONFIG_BT_HCIUART_BCSP is not set | 623 | # CONFIG_BT_HCIUART_BCSP is not set |
| 550 | # CONFIG_BT_HCIUART_LL is not set | 624 | # CONFIG_BT_HCIUART_LL is not set |
| 551 | # CONFIG_BT_HCIBCM203X is not set | 625 | CONFIG_BT_HCIBCM203X=m |
| 552 | # CONFIG_BT_HCIBPA10X is not set | 626 | CONFIG_BT_HCIBPA10X=m |
| 553 | # CONFIG_BT_HCIBFUSB is not set | 627 | CONFIG_BT_HCIBFUSB=m |
| 554 | # CONFIG_BT_HCIVHCI is not set | 628 | CONFIG_BT_HCIVHCI=m |
| 629 | CONFIG_BT_MRVL=m | ||
| 630 | CONFIG_BT_MRVL_SDIO=m | ||
| 555 | # CONFIG_AF_RXRPC is not set | 631 | # CONFIG_AF_RXRPC is not set |
| 556 | CONFIG_FIB_RULES=y | 632 | CONFIG_FIB_RULES=y |
| 557 | 633 | # CONFIG_WIRELESS is not set | |
| 558 | # | 634 | # CONFIG_WIMAX is not set |
| 559 | # Wireless | ||
| 560 | # | ||
| 561 | CONFIG_CFG80211=m | ||
| 562 | CONFIG_NL80211=y | ||
| 563 | CONFIG_WIRELESS_EXT=y | ||
| 564 | CONFIG_MAC80211=m | ||
| 565 | |||
| 566 | # | ||
| 567 | # Rate control algorithm selection | ||
| 568 | # | ||
| 569 | CONFIG_MAC80211_RC_DEFAULT_PID=y | ||
| 570 | # CONFIG_MAC80211_RC_DEFAULT_NONE is not set | ||
| 571 | |||
| 572 | # | ||
| 573 | # Selecting 'y' for an algorithm will | ||
| 574 | # | ||
| 575 | |||
| 576 | # | ||
| 577 | # build the algorithm into mac80211. | ||
| 578 | # | ||
| 579 | CONFIG_MAC80211_RC_DEFAULT="pid" | ||
| 580 | CONFIG_MAC80211_RC_PID=y | ||
| 581 | # CONFIG_MAC80211_MESH is not set | ||
| 582 | CONFIG_MAC80211_LEDS=y | ||
| 583 | # CONFIG_MAC80211_DEBUG_PACKET_ALIGNMENT is not set | ||
| 584 | # CONFIG_MAC80211_DEBUG is not set | ||
| 585 | CONFIG_IEEE80211=m | ||
| 586 | # CONFIG_IEEE80211_DEBUG is not set | ||
| 587 | CONFIG_IEEE80211_CRYPT_WEP=m | ||
| 588 | CONFIG_IEEE80211_CRYPT_CCMP=m | ||
| 589 | CONFIG_IEEE80211_CRYPT_TKIP=m | ||
| 590 | # CONFIG_RFKILL is not set | 635 | # CONFIG_RFKILL is not set |
| 591 | # CONFIG_NET_9P is not set | 636 | # CONFIG_NET_9P is not set |
| 592 | 637 | ||
| @@ -598,13 +643,19 @@ CONFIG_IEEE80211_CRYPT_TKIP=m | |||
| 598 | # Generic Driver Options | 643 | # Generic Driver Options |
| 599 | # | 644 | # |
| 600 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 645 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 646 | # CONFIG_DEVTMPFS is not set | ||
| 601 | CONFIG_STANDALONE=y | 647 | CONFIG_STANDALONE=y |
| 602 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 648 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
| 603 | CONFIG_FW_LOADER=m | 649 | CONFIG_FW_LOADER=m |
| 650 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
| 651 | CONFIG_EXTRA_FIRMWARE="" | ||
| 652 | # CONFIG_DEBUG_DRIVER is not set | ||
| 653 | # CONFIG_DEBUG_DEVRES is not set | ||
| 604 | # CONFIG_SYS_HYPERVISOR is not set | 654 | # CONFIG_SYS_HYPERVISOR is not set |
| 605 | CONFIG_CONNECTOR=m | 655 | CONFIG_CONNECTOR=m |
| 606 | CONFIG_MTD=y | 656 | CONFIG_MTD=y |
| 607 | # CONFIG_MTD_DEBUG is not set | 657 | # CONFIG_MTD_DEBUG is not set |
| 658 | # CONFIG_MTD_TESTS is not set | ||
| 608 | # CONFIG_MTD_CONCAT is not set | 659 | # CONFIG_MTD_CONCAT is not set |
| 609 | CONFIG_MTD_PARTITIONS=y | 660 | CONFIG_MTD_PARTITIONS=y |
| 610 | # CONFIG_MTD_REDBOOT_PARTS is not set | 661 | # CONFIG_MTD_REDBOOT_PARTS is not set |
| @@ -616,9 +667,9 @@ CONFIG_MTD_PARTITIONS=y | |||
| 616 | # User Modules And Translation Layers | 667 | # User Modules And Translation Layers |
| 617 | # | 668 | # |
| 618 | CONFIG_MTD_CHAR=y | 669 | CONFIG_MTD_CHAR=y |
| 619 | # CONFIG_MTD_BLKDEVS is not set | 670 | CONFIG_HAVE_MTD_OTP=y |
| 620 | # CONFIG_MTD_BLOCK is not set | 671 | CONFIG_MTD_BLKDEVS=y |
| 621 | # CONFIG_MTD_BLOCK_RO is not set | 672 | CONFIG_MTD_BLOCK=y |
| 622 | # CONFIG_FTL is not set | 673 | # CONFIG_FTL is not set |
| 623 | # CONFIG_NFTL is not set | 674 | # CONFIG_NFTL is not set |
| 624 | # CONFIG_INFTL is not set | 675 | # CONFIG_INFTL is not set |
| @@ -647,7 +698,7 @@ CONFIG_MTD_CFI_I1=y | |||
| 647 | # CONFIG_MTD_CFI_I2 is not set | 698 | # CONFIG_MTD_CFI_I2 is not set |
| 648 | # CONFIG_MTD_CFI_I4 is not set | 699 | # CONFIG_MTD_CFI_I4 is not set |
| 649 | # CONFIG_MTD_CFI_I8 is not set | 700 | # CONFIG_MTD_CFI_I8 is not set |
| 650 | # CONFIG_MTD_OTP is not set | 701 | CONFIG_MTD_OTP=y |
| 651 | CONFIG_MTD_CFI_INTELEXT=y | 702 | CONFIG_MTD_CFI_INTELEXT=y |
| 652 | # CONFIG_MTD_CFI_AMDSTD is not set | 703 | # CONFIG_MTD_CFI_AMDSTD is not set |
| 653 | # CONFIG_MTD_CFI_STAA is not set | 704 | # CONFIG_MTD_CFI_STAA is not set |
| @@ -655,19 +706,15 @@ CONFIG_MTD_CFI_UTIL=y | |||
| 655 | # CONFIG_MTD_RAM is not set | 706 | # CONFIG_MTD_RAM is not set |
| 656 | # CONFIG_MTD_ROM is not set | 707 | # CONFIG_MTD_ROM is not set |
| 657 | # CONFIG_MTD_ABSENT is not set | 708 | # CONFIG_MTD_ABSENT is not set |
| 658 | CONFIG_MTD_XIP=y | 709 | # CONFIG_MTD_XIP is not set |
| 659 | 710 | ||
| 660 | # | 711 | # |
| 661 | # Mapping drivers for chip access | 712 | # Mapping drivers for chip access |
| 662 | # | 713 | # |
| 663 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | 714 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set |
| 664 | CONFIG_MTD_PHYSMAP=y | 715 | # CONFIG_MTD_PHYSMAP is not set |
| 665 | CONFIG_MTD_PHYSMAP_START=0x0 | 716 | CONFIG_MTD_PXA2XX=y |
| 666 | CONFIG_MTD_PHYSMAP_LEN=0x0 | ||
| 667 | CONFIG_MTD_PHYSMAP_BANKWIDTH=2 | ||
| 668 | # CONFIG_MTD_PXA2XX is not set | ||
| 669 | # CONFIG_MTD_ARM_INTEGRATOR is not set | 717 | # CONFIG_MTD_ARM_INTEGRATOR is not set |
| 670 | # CONFIG_MTD_SHARP_SL is not set | ||
| 671 | # CONFIG_MTD_PLATRAM is not set | 718 | # CONFIG_MTD_PLATRAM is not set |
| 672 | 719 | ||
| 673 | # | 720 | # |
| @@ -675,6 +722,7 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2 | |||
| 675 | # | 722 | # |
| 676 | # CONFIG_MTD_DATAFLASH is not set | 723 | # CONFIG_MTD_DATAFLASH is not set |
| 677 | # CONFIG_MTD_M25P80 is not set | 724 | # CONFIG_MTD_M25P80 is not set |
| 725 | # CONFIG_MTD_SST25L is not set | ||
| 678 | # CONFIG_MTD_SLRAM is not set | 726 | # CONFIG_MTD_SLRAM is not set |
| 679 | # CONFIG_MTD_PHRAM is not set | 727 | # CONFIG_MTD_PHRAM is not set |
| 680 | # CONFIG_MTD_MTDRAM is not set | 728 | # CONFIG_MTD_MTDRAM is not set |
| @@ -690,6 +738,11 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2 | |||
| 690 | # CONFIG_MTD_ONENAND is not set | 738 | # CONFIG_MTD_ONENAND is not set |
| 691 | 739 | ||
| 692 | # | 740 | # |
| 741 | # LPDDR flash memory drivers | ||
| 742 | # | ||
| 743 | # CONFIG_MTD_LPDDR is not set | ||
| 744 | |||
| 745 | # | ||
| 693 | # UBI - Unsorted block images | 746 | # UBI - Unsorted block images |
| 694 | # | 747 | # |
| 695 | # CONFIG_MTD_UBI is not set | 748 | # CONFIG_MTD_UBI is not set |
| @@ -700,15 +753,14 @@ CONFIG_BLK_DEV_LOOP=m | |||
| 700 | CONFIG_BLK_DEV_CRYPTOLOOP=m | 753 | CONFIG_BLK_DEV_CRYPTOLOOP=m |
| 701 | CONFIG_BLK_DEV_NBD=m | 754 | CONFIG_BLK_DEV_NBD=m |
| 702 | # CONFIG_BLK_DEV_UB is not set | 755 | # CONFIG_BLK_DEV_UB is not set |
| 703 | CONFIG_BLK_DEV_RAM=m | 756 | CONFIG_BLK_DEV_RAM=y |
| 704 | CONFIG_BLK_DEV_RAM_COUNT=16 | 757 | CONFIG_BLK_DEV_RAM_COUNT=16 |
| 705 | CONFIG_BLK_DEV_RAM_SIZE=4096 | 758 | CONFIG_BLK_DEV_RAM_SIZE=4096 |
| 706 | # CONFIG_BLK_DEV_XIP is not set | 759 | # CONFIG_BLK_DEV_XIP is not set |
| 707 | # CONFIG_CDROM_PKTCDVD is not set | 760 | # CONFIG_CDROM_PKTCDVD is not set |
| 708 | # CONFIG_ATA_OVER_ETH is not set | 761 | # CONFIG_ATA_OVER_ETH is not set |
| 709 | CONFIG_MISC_DEVICES=y | 762 | # CONFIG_MG_DISK is not set |
| 710 | # CONFIG_EEPROM_93CX6 is not set | 763 | # CONFIG_MISC_DEVICES is not set |
| 711 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
| 712 | CONFIG_HAVE_IDE=y | 764 | CONFIG_HAVE_IDE=y |
| 713 | # CONFIG_IDE is not set | 765 | # CONFIG_IDE is not set |
| 714 | 766 | ||
| @@ -722,7 +774,6 @@ CONFIG_HAVE_IDE=y | |||
| 722 | # CONFIG_ATA is not set | 774 | # CONFIG_ATA is not set |
| 723 | # CONFIG_MD is not set | 775 | # CONFIG_MD is not set |
| 724 | CONFIG_NETDEVICES=y | 776 | CONFIG_NETDEVICES=y |
| 725 | # CONFIG_NETDEVICES_MULTIQUEUE is not set | ||
| 726 | CONFIG_DUMMY=y | 777 | CONFIG_DUMMY=y |
| 727 | # CONFIG_BONDING is not set | 778 | # CONFIG_BONDING is not set |
| 728 | # CONFIG_MACVLAN is not set | 779 | # CONFIG_MACVLAN is not set |
| @@ -732,13 +783,11 @@ CONFIG_DUMMY=y | |||
| 732 | # CONFIG_NET_ETHERNET is not set | 783 | # CONFIG_NET_ETHERNET is not set |
| 733 | # CONFIG_NETDEV_1000 is not set | 784 | # CONFIG_NETDEV_1000 is not set |
| 734 | # CONFIG_NETDEV_10000 is not set | 785 | # CONFIG_NETDEV_10000 is not set |
| 786 | # CONFIG_WLAN is not set | ||
| 735 | 787 | ||
| 736 | # | 788 | # |
| 737 | # Wireless LAN | 789 | # Enable WiMAX (Networking options) to see the WiMAX drivers |
| 738 | # | 790 | # |
| 739 | # CONFIG_WLAN_PRE80211 is not set | ||
| 740 | # CONFIG_WLAN_80211 is not set | ||
| 741 | # CONFIG_IWLWIFI_LEDS is not set | ||
| 742 | 791 | ||
| 743 | # | 792 | # |
| 744 | # USB Network Adapters | 793 | # USB Network Adapters |
| @@ -765,6 +814,7 @@ CONFIG_SLHC=m | |||
| 765 | # CONFIG_NETPOLL is not set | 814 | # CONFIG_NETPOLL is not set |
| 766 | # CONFIG_NET_POLL_CONTROLLER is not set | 815 | # CONFIG_NET_POLL_CONTROLLER is not set |
| 767 | # CONFIG_ISDN is not set | 816 | # CONFIG_ISDN is not set |
| 817 | # CONFIG_PHONE is not set | ||
| 768 | 818 | ||
| 769 | # | 819 | # |
| 770 | # Input device support | 820 | # Input device support |
| @@ -786,29 +836,45 @@ CONFIG_INPUT_EVDEV=y | |||
| 786 | # Input Device Drivers | 836 | # Input Device Drivers |
| 787 | # | 837 | # |
| 788 | CONFIG_INPUT_KEYBOARD=y | 838 | CONFIG_INPUT_KEYBOARD=y |
| 839 | # CONFIG_KEYBOARD_ADP5588 is not set | ||
| 789 | # CONFIG_KEYBOARD_ATKBD is not set | 840 | # CONFIG_KEYBOARD_ATKBD is not set |
| 790 | # CONFIG_KEYBOARD_SUNKBD is not set | 841 | # CONFIG_QT2160 is not set |
| 791 | # CONFIG_KEYBOARD_LKKBD is not set | 842 | # CONFIG_KEYBOARD_LKKBD is not set |
| 792 | # CONFIG_KEYBOARD_XTKBD is not set | 843 | CONFIG_KEYBOARD_GPIO=y |
| 844 | # CONFIG_KEYBOARD_MATRIX is not set | ||
| 845 | # CONFIG_KEYBOARD_LM8323 is not set | ||
| 846 | # CONFIG_KEYBOARD_MAX7359 is not set | ||
| 793 | # CONFIG_KEYBOARD_NEWTON is not set | 847 | # CONFIG_KEYBOARD_NEWTON is not set |
| 794 | # CONFIG_KEYBOARD_STOWAWAY is not set | 848 | # CONFIG_KEYBOARD_OPENCORES is not set |
| 795 | CONFIG_KEYBOARD_PXA27x=y | 849 | CONFIG_KEYBOARD_PXA27x=y |
| 796 | CONFIG_KEYBOARD_GPIO=y | 850 | # CONFIG_KEYBOARD_STOWAWAY is not set |
| 851 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
| 852 | # CONFIG_KEYBOARD_XTKBD is not set | ||
| 797 | # CONFIG_INPUT_MOUSE is not set | 853 | # CONFIG_INPUT_MOUSE is not set |
| 798 | # CONFIG_INPUT_JOYSTICK is not set | 854 | # CONFIG_INPUT_JOYSTICK is not set |
| 799 | # CONFIG_INPUT_TABLET is not set | 855 | # CONFIG_INPUT_TABLET is not set |
| 800 | CONFIG_INPUT_TOUCHSCREEN=y | 856 | CONFIG_INPUT_TOUCHSCREEN=y |
| 801 | # CONFIG_TOUCHSCREEN_ADS7846 is not set | 857 | # CONFIG_TOUCHSCREEN_ADS7846 is not set |
| 858 | # CONFIG_TOUCHSCREEN_AD7877 is not set | ||
| 859 | # CONFIG_TOUCHSCREEN_AD7879_I2C is not set | ||
| 860 | # CONFIG_TOUCHSCREEN_AD7879_SPI is not set | ||
| 861 | # CONFIG_TOUCHSCREEN_AD7879 is not set | ||
| 862 | # CONFIG_TOUCHSCREEN_EETI is not set | ||
| 802 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | 863 | # CONFIG_TOUCHSCREEN_FUJITSU is not set |
| 803 | # CONFIG_TOUCHSCREEN_GUNZE is not set | 864 | # CONFIG_TOUCHSCREEN_GUNZE is not set |
| 804 | # CONFIG_TOUCHSCREEN_ELO is not set | 865 | # CONFIG_TOUCHSCREEN_ELO is not set |
| 866 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | ||
| 867 | # CONFIG_TOUCHSCREEN_MCS5000 is not set | ||
| 805 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | 868 | # CONFIG_TOUCHSCREEN_MTOUCH is not set |
| 869 | # CONFIG_TOUCHSCREEN_INEXIO is not set | ||
| 806 | # CONFIG_TOUCHSCREEN_MK712 is not set | 870 | # CONFIG_TOUCHSCREEN_MK712 is not set |
| 807 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set | 871 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set |
| 808 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | 872 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set |
| 809 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set | 873 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set |
| 810 | # CONFIG_TOUCHSCREEN_UCB1400 is not set | ||
| 811 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | 874 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set |
| 875 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set | ||
| 876 | # CONFIG_TOUCHSCREEN_TSC2007 is not set | ||
| 877 | # CONFIG_TOUCHSCREEN_W90X900 is not set | ||
| 812 | CONFIG_TOUCHSCREEN_PCAP=y | 878 | CONFIG_TOUCHSCREEN_PCAP=y |
| 813 | CONFIG_INPUT_MISC=y | 879 | CONFIG_INPUT_MISC=y |
| 814 | # CONFIG_INPUT_ATI_REMOTE is not set | 880 | # CONFIG_INPUT_ATI_REMOTE is not set |
| @@ -816,7 +882,10 @@ CONFIG_INPUT_MISC=y | |||
| 816 | # CONFIG_INPUT_KEYSPAN_REMOTE is not set | 882 | # CONFIG_INPUT_KEYSPAN_REMOTE is not set |
| 817 | # CONFIG_INPUT_POWERMATE is not set | 883 | # CONFIG_INPUT_POWERMATE is not set |
| 818 | # CONFIG_INPUT_YEALINK is not set | 884 | # CONFIG_INPUT_YEALINK is not set |
| 885 | # CONFIG_INPUT_CM109 is not set | ||
| 819 | CONFIG_INPUT_UINPUT=y | 886 | CONFIG_INPUT_UINPUT=y |
| 887 | # CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set | ||
| 888 | CONFIG_INPUT_PCAP=y | ||
| 820 | 889 | ||
| 821 | # | 890 | # |
| 822 | # Hardware I/O ports | 891 | # Hardware I/O ports |
| @@ -828,6 +897,7 @@ CONFIG_INPUT_UINPUT=y | |||
| 828 | # Character devices | 897 | # Character devices |
| 829 | # | 898 | # |
| 830 | CONFIG_VT=y | 899 | CONFIG_VT=y |
| 900 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 831 | CONFIG_VT_CONSOLE=y | 901 | CONFIG_VT_CONSOLE=y |
| 832 | CONFIG_HW_CONSOLE=y | 902 | CONFIG_HW_CONSOLE=y |
| 833 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | 903 | # CONFIG_VT_HW_CONSOLE_BINDING is not set |
| @@ -842,92 +912,130 @@ CONFIG_DEVKMEM=y | |||
| 842 | # | 912 | # |
| 843 | # Non-8250 serial port support | 913 | # Non-8250 serial port support |
| 844 | # | 914 | # |
| 915 | # CONFIG_SERIAL_MAX3100 is not set | ||
| 845 | CONFIG_SERIAL_PXA=y | 916 | CONFIG_SERIAL_PXA=y |
| 846 | CONFIG_SERIAL_PXA_CONSOLE=y | 917 | CONFIG_SERIAL_PXA_CONSOLE=y |
| 847 | CONFIG_SERIAL_CORE=y | 918 | CONFIG_SERIAL_CORE=y |
| 848 | CONFIG_SERIAL_CORE_CONSOLE=y | 919 | CONFIG_SERIAL_CORE_CONSOLE=y |
| 849 | CONFIG_UNIX98_PTYS=y | 920 | CONFIG_UNIX98_PTYS=y |
| 921 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 850 | CONFIG_LEGACY_PTYS=y | 922 | CONFIG_LEGACY_PTYS=y |
| 851 | CONFIG_LEGACY_PTY_COUNT=8 | 923 | CONFIG_LEGACY_PTY_COUNT=8 |
| 852 | # CONFIG_IPMI_HANDLER is not set | 924 | # CONFIG_IPMI_HANDLER is not set |
| 853 | CONFIG_HW_RANDOM=y | 925 | # CONFIG_HW_RANDOM is not set |
| 854 | # CONFIG_NVRAM is not set | ||
| 855 | # CONFIG_R3964 is not set | 926 | # CONFIG_R3964 is not set |
| 856 | # CONFIG_RAW_DRIVER is not set | 927 | # CONFIG_RAW_DRIVER is not set |
| 857 | # CONFIG_TCG_TPM is not set | 928 | # CONFIG_TCG_TPM is not set |
| 858 | CONFIG_I2C=y | 929 | CONFIG_I2C=y |
| 859 | CONFIG_I2C_BOARDINFO=y | 930 | CONFIG_I2C_BOARDINFO=y |
| 931 | CONFIG_I2C_COMPAT=y | ||
| 860 | CONFIG_I2C_CHARDEV=y | 932 | CONFIG_I2C_CHARDEV=y |
| 933 | CONFIG_I2C_HELPER_AUTO=y | ||
| 861 | 934 | ||
| 862 | # | 935 | # |
| 863 | # I2C Hardware Bus support | 936 | # I2C Hardware Bus support |
| 864 | # | 937 | # |
| 938 | |||
| 939 | # | ||
| 940 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
| 941 | # | ||
| 942 | # CONFIG_I2C_DESIGNWARE is not set | ||
| 865 | # CONFIG_I2C_GPIO is not set | 943 | # CONFIG_I2C_GPIO is not set |
| 944 | # CONFIG_I2C_OCORES is not set | ||
| 866 | CONFIG_I2C_PXA=y | 945 | CONFIG_I2C_PXA=y |
| 867 | # CONFIG_I2C_PXA_SLAVE is not set | 946 | # CONFIG_I2C_PXA_SLAVE is not set |
| 868 | # CONFIG_I2C_OCORES is not set | ||
| 869 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
| 870 | # CONFIG_I2C_SIMTEC is not set | 947 | # CONFIG_I2C_SIMTEC is not set |
| 948 | |||
| 949 | # | ||
| 950 | # External I2C/SMBus adapter drivers | ||
| 951 | # | ||
| 952 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
| 871 | # CONFIG_I2C_TAOS_EVM is not set | 953 | # CONFIG_I2C_TAOS_EVM is not set |
| 872 | # CONFIG_I2C_STUB is not set | ||
| 873 | # CONFIG_I2C_TINY_USB is not set | 954 | # CONFIG_I2C_TINY_USB is not set |
| 955 | |||
| 956 | # | ||
| 957 | # Other I2C/SMBus bus drivers | ||
| 958 | # | ||
| 874 | # CONFIG_I2C_PCA_PLATFORM is not set | 959 | # CONFIG_I2C_PCA_PLATFORM is not set |
| 960 | # CONFIG_I2C_STUB is not set | ||
| 875 | 961 | ||
| 876 | # | 962 | # |
| 877 | # Miscellaneous I2C Chip support | 963 | # Miscellaneous I2C Chip support |
| 878 | # | 964 | # |
| 879 | # CONFIG_DS1682 is not set | 965 | # CONFIG_DS1682 is not set |
| 880 | # CONFIG_EEPROM_LEGACY is not set | ||
| 881 | # CONFIG_SENSORS_PCF8574 is not set | ||
| 882 | # CONFIG_PCF8575 is not set | ||
| 883 | # CONFIG_SENSORS_PCF8591 is not set | ||
| 884 | # CONFIG_TPS65010 is not set | ||
| 885 | # CONFIG_SENSORS_MAX6875 is not set | ||
| 886 | # CONFIG_SENSORS_TSL2550 is not set | 966 | # CONFIG_SENSORS_TSL2550 is not set |
| 887 | # CONFIG_I2C_DEBUG_CORE is not set | 967 | # CONFIG_I2C_DEBUG_CORE is not set |
| 888 | # CONFIG_I2C_DEBUG_ALGO is not set | 968 | # CONFIG_I2C_DEBUG_ALGO is not set |
| 889 | # CONFIG_I2C_DEBUG_BUS is not set | 969 | # CONFIG_I2C_DEBUG_BUS is not set |
| 890 | # CONFIG_I2C_DEBUG_CHIP is not set | 970 | # CONFIG_I2C_DEBUG_CHIP is not set |
| 891 | CONFIG_SPI=y | 971 | CONFIG_SPI=y |
| 972 | # CONFIG_SPI_DEBUG is not set | ||
| 892 | CONFIG_SPI_MASTER=y | 973 | CONFIG_SPI_MASTER=y |
| 893 | 974 | ||
| 894 | # | 975 | # |
| 895 | # SPI Master Controller Drivers | 976 | # SPI Master Controller Drivers |
| 896 | # | 977 | # |
| 897 | # CONFIG_SPI_BITBANG is not set | 978 | # CONFIG_SPI_BITBANG is not set |
| 898 | CONFIG_SPI_PXA2XX=m | 979 | # CONFIG_SPI_GPIO is not set |
| 980 | CONFIG_SPI_PXA2XX=y | ||
| 899 | 981 | ||
| 900 | # | 982 | # |
| 901 | # SPI Protocol Masters | 983 | # SPI Protocol Masters |
| 902 | # | 984 | # |
| 903 | # CONFIG_EEPROM_AT25 is not set | ||
| 904 | # CONFIG_SPI_SPIDEV is not set | 985 | # CONFIG_SPI_SPIDEV is not set |
| 905 | # CONFIG_SPI_TLE62X0 is not set | 986 | # CONFIG_SPI_TLE62X0 is not set |
| 906 | CONFIG_HAVE_GPIO_LIB=y | ||
| 907 | 987 | ||
| 908 | # | 988 | # |
| 909 | # GPIO Support | 989 | # PPS support |
| 990 | # | ||
| 991 | # CONFIG_PPS is not set | ||
| 992 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
| 993 | CONFIG_GPIOLIB=y | ||
| 994 | # CONFIG_DEBUG_GPIO is not set | ||
| 995 | CONFIG_GPIO_SYSFS=y | ||
| 996 | |||
| 997 | # | ||
| 998 | # Memory mapped GPIO expanders: | ||
| 910 | # | 999 | # |
| 911 | 1000 | ||
| 912 | # | 1001 | # |
| 913 | # I2C GPIO expanders: | 1002 | # I2C GPIO expanders: |
| 914 | # | 1003 | # |
| 1004 | # CONFIG_GPIO_MAX732X is not set | ||
| 915 | # CONFIG_GPIO_PCA953X is not set | 1005 | # CONFIG_GPIO_PCA953X is not set |
| 916 | # CONFIG_GPIO_PCF857X is not set | 1006 | # CONFIG_GPIO_PCF857X is not set |
| 917 | 1007 | ||
| 918 | # | 1008 | # |
| 1009 | # PCI GPIO expanders: | ||
| 1010 | # | ||
| 1011 | |||
| 1012 | # | ||
| 919 | # SPI GPIO expanders: | 1013 | # SPI GPIO expanders: |
| 920 | # | 1014 | # |
| 1015 | # CONFIG_GPIO_MAX7301 is not set | ||
| 921 | # CONFIG_GPIO_MCP23S08 is not set | 1016 | # CONFIG_GPIO_MCP23S08 is not set |
| 1017 | # CONFIG_GPIO_MC33880 is not set | ||
| 1018 | |||
| 1019 | # | ||
| 1020 | # AC97 GPIO expanders: | ||
| 1021 | # | ||
| 922 | # CONFIG_W1 is not set | 1022 | # CONFIG_W1 is not set |
| 923 | # CONFIG_POWER_SUPPLY is not set | 1023 | CONFIG_POWER_SUPPLY=y |
| 1024 | # CONFIG_POWER_SUPPLY_DEBUG is not set | ||
| 1025 | # CONFIG_PDA_POWER is not set | ||
| 1026 | # CONFIG_APM_POWER is not set | ||
| 1027 | # CONFIG_BATTERY_DS2760 is not set | ||
| 1028 | # CONFIG_BATTERY_DS2782 is not set | ||
| 1029 | # CONFIG_BATTERY_BQ27x00 is not set | ||
| 1030 | # CONFIG_BATTERY_MAX17040 is not set | ||
| 924 | # CONFIG_HWMON is not set | 1031 | # CONFIG_HWMON is not set |
| 1032 | # CONFIG_THERMAL is not set | ||
| 925 | # CONFIG_WATCHDOG is not set | 1033 | # CONFIG_WATCHDOG is not set |
| 1034 | CONFIG_SSB_POSSIBLE=y | ||
| 926 | 1035 | ||
| 927 | # | 1036 | # |
| 928 | # Sonics Silicon Backplane | 1037 | # Sonics Silicon Backplane |
| 929 | # | 1038 | # |
| 930 | CONFIG_SSB_POSSIBLE=y | ||
| 931 | # CONFIG_SSB is not set | 1039 | # CONFIG_SSB is not set |
| 932 | 1040 | ||
| 933 | # | 1041 | # |
| @@ -938,54 +1046,170 @@ CONFIG_SSB_POSSIBLE=y | |||
| 938 | # CONFIG_MFD_ASIC3 is not set | 1046 | # CONFIG_MFD_ASIC3 is not set |
| 939 | # CONFIG_HTC_EGPIO is not set | 1047 | # CONFIG_HTC_EGPIO is not set |
| 940 | # CONFIG_HTC_PASIC3 is not set | 1048 | # CONFIG_HTC_PASIC3 is not set |
| 1049 | # CONFIG_TPS65010 is not set | ||
| 1050 | # CONFIG_TWL4030_CORE is not set | ||
| 1051 | # CONFIG_MFD_TMIO is not set | ||
| 1052 | # CONFIG_MFD_T7L66XB is not set | ||
| 1053 | # CONFIG_MFD_TC6387XB is not set | ||
| 941 | # CONFIG_MFD_TC6393XB is not set | 1054 | # CONFIG_MFD_TC6393XB is not set |
| 1055 | # CONFIG_PMIC_DA903X is not set | ||
| 1056 | # CONFIG_MFD_WM8400 is not set | ||
| 1057 | # CONFIG_MFD_WM831X is not set | ||
| 1058 | # CONFIG_MFD_WM8350_I2C is not set | ||
| 1059 | # CONFIG_MFD_PCF50633 is not set | ||
| 1060 | # CONFIG_MFD_MC13783 is not set | ||
| 1061 | # CONFIG_AB3100_CORE is not set | ||
| 942 | CONFIG_EZX_PCAP=y | 1062 | CONFIG_EZX_PCAP=y |
| 943 | 1063 | CONFIG_REGULATOR=y | |
| 944 | # | 1064 | CONFIG_REGULATOR_DEBUG=y |
| 945 | # Multimedia devices | 1065 | # CONFIG_REGULATOR_FIXED_VOLTAGE is not set |
| 946 | # | 1066 | CONFIG_REGULATOR_VIRTUAL_CONSUMER=y |
| 1067 | CONFIG_REGULATOR_USERSPACE_CONSUMER=y | ||
| 1068 | # CONFIG_REGULATOR_BQ24022 is not set | ||
| 1069 | # CONFIG_REGULATOR_MAX1586 is not set | ||
| 1070 | # CONFIG_REGULATOR_LP3971 is not set | ||
| 1071 | CONFIG_REGULATOR_PCAP=y | ||
| 1072 | # CONFIG_REGULATOR_TPS65023 is not set | ||
| 1073 | # CONFIG_REGULATOR_TPS6507X is not set | ||
| 1074 | CONFIG_MEDIA_SUPPORT=y | ||
| 947 | 1075 | ||
| 948 | # | 1076 | # |
| 949 | # Multimedia core support | 1077 | # Multimedia core support |
| 950 | # | 1078 | # |
| 951 | CONFIG_VIDEO_DEV=m | 1079 | CONFIG_VIDEO_DEV=y |
| 952 | CONFIG_VIDEO_V4L2_COMMON=m | 1080 | CONFIG_VIDEO_V4L2_COMMON=y |
| 953 | CONFIG_VIDEO_ALLOW_V4L1=y | 1081 | CONFIG_VIDEO_ALLOW_V4L1=y |
| 954 | CONFIG_VIDEO_V4L1_COMPAT=y | 1082 | CONFIG_VIDEO_V4L1_COMPAT=y |
| 955 | # CONFIG_DVB_CORE is not set | 1083 | # CONFIG_DVB_CORE is not set |
| 956 | CONFIG_VIDEO_MEDIA=m | 1084 | CONFIG_VIDEO_MEDIA=y |
| 957 | 1085 | ||
| 958 | # | 1086 | # |
| 959 | # Multimedia drivers | 1087 | # Multimedia drivers |
| 960 | # | 1088 | # |
| 961 | # CONFIG_MEDIA_ATTACH is not set | 1089 | # CONFIG_MEDIA_ATTACH is not set |
| 962 | CONFIG_MEDIA_TUNER=m | 1090 | CONFIG_MEDIA_TUNER=y |
| 963 | # CONFIG_MEDIA_TUNER_CUSTOMIZE is not set | 1091 | CONFIG_MEDIA_TUNER_CUSTOMISE=y |
| 964 | CONFIG_MEDIA_TUNER_SIMPLE=m | 1092 | # CONFIG_MEDIA_TUNER_SIMPLE is not set |
| 965 | CONFIG_MEDIA_TUNER_TDA8290=m | 1093 | # CONFIG_MEDIA_TUNER_TDA8290 is not set |
| 966 | CONFIG_MEDIA_TUNER_TDA9887=m | 1094 | # CONFIG_MEDIA_TUNER_TDA827X is not set |
| 967 | CONFIG_MEDIA_TUNER_TEA5761=m | 1095 | # CONFIG_MEDIA_TUNER_TDA18271 is not set |
| 968 | CONFIG_MEDIA_TUNER_TEA5767=m | 1096 | # CONFIG_MEDIA_TUNER_TDA9887 is not set |
| 969 | CONFIG_MEDIA_TUNER_MT20XX=m | 1097 | # CONFIG_MEDIA_TUNER_TEA5761 is not set |
| 970 | CONFIG_MEDIA_TUNER_XC2028=m | 1098 | # CONFIG_MEDIA_TUNER_TEA5767 is not set |
| 971 | CONFIG_MEDIA_TUNER_XC5000=m | 1099 | # CONFIG_MEDIA_TUNER_MT20XX is not set |
| 972 | CONFIG_VIDEO_V4L2=m | 1100 | # CONFIG_MEDIA_TUNER_MT2060 is not set |
| 973 | CONFIG_VIDEO_V4L1=m | 1101 | # CONFIG_MEDIA_TUNER_MT2266 is not set |
| 1102 | # CONFIG_MEDIA_TUNER_MT2131 is not set | ||
| 1103 | # CONFIG_MEDIA_TUNER_QT1010 is not set | ||
| 1104 | # CONFIG_MEDIA_TUNER_XC2028 is not set | ||
| 1105 | # CONFIG_MEDIA_TUNER_XC5000 is not set | ||
| 1106 | # CONFIG_MEDIA_TUNER_MXL5005S is not set | ||
| 1107 | # CONFIG_MEDIA_TUNER_MXL5007T is not set | ||
| 1108 | # CONFIG_MEDIA_TUNER_MC44S803 is not set | ||
| 1109 | CONFIG_VIDEO_V4L2=y | ||
| 1110 | CONFIG_VIDEO_V4L1=y | ||
| 1111 | CONFIG_VIDEOBUF_GEN=y | ||
| 1112 | CONFIG_VIDEOBUF_DMA_SG=y | ||
| 974 | CONFIG_VIDEO_CAPTURE_DRIVERS=y | 1113 | CONFIG_VIDEO_CAPTURE_DRIVERS=y |
| 975 | # CONFIG_VIDEO_ADV_DEBUG is not set | 1114 | # CONFIG_VIDEO_ADV_DEBUG is not set |
| 976 | CONFIG_VIDEO_HELPER_CHIPS_AUTO=y | 1115 | # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set |
| 1116 | # CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set | ||
| 1117 | |||
| 1118 | # | ||
| 1119 | # Encoders/decoders and other helper chips | ||
| 1120 | # | ||
| 1121 | |||
| 1122 | # | ||
| 1123 | # Audio decoders | ||
| 1124 | # | ||
| 1125 | # CONFIG_VIDEO_TVAUDIO is not set | ||
| 1126 | # CONFIG_VIDEO_TDA7432 is not set | ||
| 1127 | # CONFIG_VIDEO_TDA9840 is not set | ||
| 1128 | # CONFIG_VIDEO_TDA9875 is not set | ||
| 1129 | # CONFIG_VIDEO_TEA6415C is not set | ||
| 1130 | # CONFIG_VIDEO_TEA6420 is not set | ||
| 1131 | # CONFIG_VIDEO_MSP3400 is not set | ||
| 1132 | # CONFIG_VIDEO_CS5345 is not set | ||
| 1133 | # CONFIG_VIDEO_CS53L32A is not set | ||
| 1134 | # CONFIG_VIDEO_M52790 is not set | ||
| 1135 | # CONFIG_VIDEO_TLV320AIC23B is not set | ||
| 1136 | # CONFIG_VIDEO_WM8775 is not set | ||
| 1137 | # CONFIG_VIDEO_WM8739 is not set | ||
| 1138 | # CONFIG_VIDEO_VP27SMPX is not set | ||
| 1139 | |||
| 1140 | # | ||
| 1141 | # RDS decoders | ||
| 1142 | # | ||
| 1143 | # CONFIG_VIDEO_SAA6588 is not set | ||
| 1144 | |||
| 1145 | # | ||
| 1146 | # Video decoders | ||
| 1147 | # | ||
| 1148 | # CONFIG_VIDEO_ADV7180 is not set | ||
| 1149 | # CONFIG_VIDEO_BT819 is not set | ||
| 1150 | # CONFIG_VIDEO_BT856 is not set | ||
| 1151 | # CONFIG_VIDEO_BT866 is not set | ||
| 1152 | # CONFIG_VIDEO_KS0127 is not set | ||
| 1153 | # CONFIG_VIDEO_OV7670 is not set | ||
| 1154 | # CONFIG_VIDEO_MT9V011 is not set | ||
| 1155 | # CONFIG_VIDEO_TCM825X is not set | ||
| 1156 | # CONFIG_VIDEO_SAA7110 is not set | ||
| 1157 | # CONFIG_VIDEO_SAA711X is not set | ||
| 1158 | # CONFIG_VIDEO_SAA717X is not set | ||
| 1159 | # CONFIG_VIDEO_SAA7191 is not set | ||
| 1160 | # CONFIG_VIDEO_TVP514X is not set | ||
| 1161 | # CONFIG_VIDEO_TVP5150 is not set | ||
| 1162 | # CONFIG_VIDEO_VPX3220 is not set | ||
| 1163 | |||
| 1164 | # | ||
| 1165 | # Video and audio decoders | ||
| 1166 | # | ||
| 1167 | # CONFIG_VIDEO_CX25840 is not set | ||
| 1168 | |||
| 1169 | # | ||
| 1170 | # MPEG video encoders | ||
| 1171 | # | ||
| 1172 | # CONFIG_VIDEO_CX2341X is not set | ||
| 1173 | |||
| 1174 | # | ||
| 1175 | # Video encoders | ||
| 1176 | # | ||
| 1177 | # CONFIG_VIDEO_SAA7127 is not set | ||
| 1178 | # CONFIG_VIDEO_SAA7185 is not set | ||
| 1179 | # CONFIG_VIDEO_ADV7170 is not set | ||
| 1180 | # CONFIG_VIDEO_ADV7175 is not set | ||
| 1181 | # CONFIG_VIDEO_THS7303 is not set | ||
| 1182 | # CONFIG_VIDEO_ADV7343 is not set | ||
| 1183 | |||
| 1184 | # | ||
| 1185 | # Video improvement chips | ||
| 1186 | # | ||
| 1187 | # CONFIG_VIDEO_UPD64031A is not set | ||
| 1188 | # CONFIG_VIDEO_UPD64083 is not set | ||
| 977 | # CONFIG_VIDEO_VIVI is not set | 1189 | # CONFIG_VIDEO_VIVI is not set |
| 978 | # CONFIG_VIDEO_CPIA is not set | 1190 | # CONFIG_VIDEO_CPIA is not set |
| 979 | # CONFIG_VIDEO_CPIA2 is not set | 1191 | # CONFIG_VIDEO_CPIA2 is not set |
| 980 | # CONFIG_VIDEO_SAA5246A is not set | 1192 | # CONFIG_VIDEO_SAA5246A is not set |
| 981 | # CONFIG_VIDEO_SAA5249 is not set | 1193 | # CONFIG_VIDEO_SAA5249 is not set |
| 982 | # CONFIG_TUNER_3036 is not set | 1194 | CONFIG_SOC_CAMERA=y |
| 1195 | # CONFIG_SOC_CAMERA_MT9M001 is not set | ||
| 1196 | CONFIG_SOC_CAMERA_MT9M111=y | ||
| 1197 | # CONFIG_SOC_CAMERA_MT9T031 is not set | ||
| 1198 | # CONFIG_SOC_CAMERA_MT9V022 is not set | ||
| 1199 | # CONFIG_SOC_CAMERA_TW9910 is not set | ||
| 1200 | # CONFIG_SOC_CAMERA_PLATFORM is not set | ||
| 1201 | # CONFIG_SOC_CAMERA_OV772X is not set | ||
| 1202 | CONFIG_VIDEO_PXA27x=y | ||
| 1203 | # CONFIG_VIDEO_SH_MOBILE_CEU is not set | ||
| 983 | # CONFIG_V4L_USB_DRIVERS is not set | 1204 | # CONFIG_V4L_USB_DRIVERS is not set |
| 984 | # CONFIG_SOC_CAMERA is not set | ||
| 985 | # CONFIG_VIDEO_PXA27x is not set | ||
| 986 | CONFIG_RADIO_ADAPTERS=y | 1205 | CONFIG_RADIO_ADAPTERS=y |
| 1206 | # CONFIG_I2C_SI4713 is not set | ||
| 1207 | # CONFIG_RADIO_SI4713 is not set | ||
| 987 | # CONFIG_USB_DSBR is not set | 1208 | # CONFIG_USB_DSBR is not set |
| 988 | # CONFIG_USB_SI470X is not set | 1209 | # CONFIG_RADIO_SI470X is not set |
| 1210 | # CONFIG_USB_MR800 is not set | ||
| 1211 | CONFIG_RADIO_TEA5764=y | ||
| 1212 | CONFIG_RADIO_TEA5764_XTAL=y | ||
| 989 | # CONFIG_DAB is not set | 1213 | # CONFIG_DAB is not set |
| 990 | 1214 | ||
| 991 | # | 1215 | # |
| @@ -996,6 +1220,7 @@ CONFIG_RADIO_ADAPTERS=y | |||
| 996 | CONFIG_FB=y | 1220 | CONFIG_FB=y |
| 997 | # CONFIG_FIRMWARE_EDID is not set | 1221 | # CONFIG_FIRMWARE_EDID is not set |
| 998 | # CONFIG_FB_DDC is not set | 1222 | # CONFIG_FB_DDC is not set |
| 1223 | # CONFIG_FB_BOOT_VESA_SUPPORT is not set | ||
| 999 | CONFIG_FB_CFB_FILLRECT=y | 1224 | CONFIG_FB_CFB_FILLRECT=y |
| 1000 | CONFIG_FB_CFB_COPYAREA=y | 1225 | CONFIG_FB_CFB_COPYAREA=y |
| 1001 | CONFIG_FB_CFB_IMAGEBLIT=y | 1226 | CONFIG_FB_CFB_IMAGEBLIT=y |
| @@ -1017,15 +1242,19 @@ CONFIG_FB_CFB_IMAGEBLIT=y | |||
| 1017 | # CONFIG_FB_UVESA is not set | 1242 | # CONFIG_FB_UVESA is not set |
| 1018 | # CONFIG_FB_S1D13XXX is not set | 1243 | # CONFIG_FB_S1D13XXX is not set |
| 1019 | CONFIG_FB_PXA=y | 1244 | CONFIG_FB_PXA=y |
| 1245 | CONFIG_FB_PXA_OVERLAY=y | ||
| 1020 | # CONFIG_FB_PXA_SMARTPANEL is not set | 1246 | # CONFIG_FB_PXA_SMARTPANEL is not set |
| 1021 | CONFIG_FB_PXA_PARAMETERS=y | 1247 | CONFIG_FB_PXA_PARAMETERS=y |
| 1022 | # CONFIG_FB_MBX is not set | 1248 | # CONFIG_FB_MBX is not set |
| 1023 | # CONFIG_FB_AM200EPD is not set | 1249 | # CONFIG_FB_W100 is not set |
| 1024 | # CONFIG_FB_VIRTUAL is not set | 1250 | # CONFIG_FB_VIRTUAL is not set |
| 1251 | # CONFIG_FB_METRONOME is not set | ||
| 1252 | # CONFIG_FB_MB862XX is not set | ||
| 1253 | # CONFIG_FB_BROADSHEET is not set | ||
| 1025 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | 1254 | CONFIG_BACKLIGHT_LCD_SUPPORT=y |
| 1026 | # CONFIG_LCD_CLASS_DEVICE is not set | 1255 | # CONFIG_LCD_CLASS_DEVICE is not set |
| 1027 | CONFIG_BACKLIGHT_CLASS_DEVICE=y | 1256 | CONFIG_BACKLIGHT_CLASS_DEVICE=y |
| 1028 | # CONFIG_BACKLIGHT_CORGI is not set | 1257 | CONFIG_BACKLIGHT_GENERIC=y |
| 1029 | CONFIG_BACKLIGHT_PWM=y | 1258 | CONFIG_BACKLIGHT_PWM=y |
| 1030 | 1259 | ||
| 1031 | # | 1260 | # |
| @@ -1053,85 +1282,60 @@ CONFIG_FONT_MINI_4x6=y | |||
| 1053 | # CONFIG_FONT_SUN12x22 is not set | 1282 | # CONFIG_FONT_SUN12x22 is not set |
| 1054 | # CONFIG_FONT_10x18 is not set | 1283 | # CONFIG_FONT_10x18 is not set |
| 1055 | # CONFIG_LOGO is not set | 1284 | # CONFIG_LOGO is not set |
| 1056 | |||
| 1057 | # | ||
| 1058 | # Sound | ||
| 1059 | # | ||
| 1060 | CONFIG_SOUND=y | 1285 | CONFIG_SOUND=y |
| 1061 | 1286 | CONFIG_SOUND_OSS_CORE=y | |
| 1062 | # | 1287 | CONFIG_SOUND_OSS_CORE_PRECLAIM=y |
| 1063 | # Advanced Linux Sound Architecture | ||
| 1064 | # | ||
| 1065 | CONFIG_SND=y | 1288 | CONFIG_SND=y |
| 1066 | CONFIG_SND_TIMER=y | 1289 | CONFIG_SND_TIMER=y |
| 1067 | CONFIG_SND_PCM=y | 1290 | CONFIG_SND_PCM=y |
| 1291 | CONFIG_SND_JACK=y | ||
| 1068 | # CONFIG_SND_SEQUENCER is not set | 1292 | # CONFIG_SND_SEQUENCER is not set |
| 1069 | CONFIG_SND_OSSEMUL=y | 1293 | CONFIG_SND_OSSEMUL=y |
| 1070 | CONFIG_SND_MIXER_OSS=y | 1294 | CONFIG_SND_MIXER_OSS=y |
| 1071 | CONFIG_SND_PCM_OSS=y | 1295 | CONFIG_SND_PCM_OSS=y |
| 1072 | CONFIG_SND_PCM_OSS_PLUGINS=y | 1296 | CONFIG_SND_PCM_OSS_PLUGINS=y |
| 1297 | # CONFIG_SND_HRTIMER is not set | ||
| 1073 | # CONFIG_SND_DYNAMIC_MINORS is not set | 1298 | # CONFIG_SND_DYNAMIC_MINORS is not set |
| 1074 | CONFIG_SND_SUPPORT_OLD_API=y | 1299 | CONFIG_SND_SUPPORT_OLD_API=y |
| 1075 | CONFIG_SND_VERBOSE_PROCFS=y | 1300 | CONFIG_SND_VERBOSE_PROCFS=y |
| 1076 | # CONFIG_SND_VERBOSE_PRINTK is not set | 1301 | # CONFIG_SND_VERBOSE_PRINTK is not set |
| 1077 | # CONFIG_SND_DEBUG is not set | 1302 | # CONFIG_SND_DEBUG is not set |
| 1078 | 1303 | # CONFIG_SND_RAWMIDI_SEQ is not set | |
| 1079 | # | 1304 | # CONFIG_SND_OPL3_LIB_SEQ is not set |
| 1080 | # Generic devices | 1305 | # CONFIG_SND_OPL4_LIB_SEQ is not set |
| 1081 | # | 1306 | # CONFIG_SND_SBAWE_SEQ is not set |
| 1082 | # CONFIG_SND_DUMMY is not set | 1307 | # CONFIG_SND_EMU10K1_SEQ is not set |
| 1083 | # CONFIG_SND_MTPAV is not set | 1308 | # CONFIG_SND_DRIVERS is not set |
| 1084 | # CONFIG_SND_SERIAL_U16550 is not set | 1309 | # CONFIG_SND_ARM is not set |
| 1085 | # CONFIG_SND_MPU401 is not set | 1310 | CONFIG_SND_PXA2XX_LIB=y |
| 1086 | 1311 | # CONFIG_SND_SPI is not set | |
| 1087 | # | 1312 | # CONFIG_SND_USB is not set |
| 1088 | # ALSA ARM devices | ||
| 1089 | # | ||
| 1090 | # CONFIG_SND_PXA2XX_AC97 is not set | ||
| 1091 | |||
| 1092 | # | ||
| 1093 | # SPI devices | ||
| 1094 | # | ||
| 1095 | |||
| 1096 | # | ||
| 1097 | # USB devices | ||
| 1098 | # | ||
| 1099 | # CONFIG_SND_USB_AUDIO is not set | ||
| 1100 | # CONFIG_SND_USB_CAIAQ is not set | ||
| 1101 | |||
| 1102 | # | ||
| 1103 | # System on Chip audio support | ||
| 1104 | # | ||
| 1105 | CONFIG_SND_SOC=y | 1313 | CONFIG_SND_SOC=y |
| 1106 | CONFIG_SND_PXA2XX_SOC=y | 1314 | CONFIG_SND_PXA2XX_SOC=y |
| 1107 | 1315 | CONFIG_SND_SOC_I2C_AND_SPI=y | |
| 1108 | # | 1316 | # CONFIG_SND_SOC_ALL_CODECS is not set |
| 1109 | # ALSA SoC audio for Freescale SOCs | ||
| 1110 | # | ||
| 1111 | |||
| 1112 | # | ||
| 1113 | # SoC Audio for the Texas Instruments OMAP | ||
| 1114 | # | ||
| 1115 | |||
| 1116 | # | ||
| 1117 | # Open Sound System | ||
| 1118 | # | ||
| 1119 | # CONFIG_SOUND_PRIME is not set | 1317 | # CONFIG_SOUND_PRIME is not set |
| 1120 | CONFIG_HID_SUPPORT=y | 1318 | CONFIG_HID_SUPPORT=y |
| 1121 | CONFIG_HID=y | 1319 | CONFIG_HID=y |
| 1122 | # CONFIG_HID_DEBUG is not set | ||
| 1123 | # CONFIG_HIDRAW is not set | 1320 | # CONFIG_HIDRAW is not set |
| 1124 | 1321 | ||
| 1125 | # | 1322 | # |
| 1126 | # USB Input Devices | 1323 | # USB Input Devices |
| 1127 | # | 1324 | # |
| 1128 | # CONFIG_USB_HID is not set | 1325 | # CONFIG_USB_HID is not set |
| 1326 | # CONFIG_HID_PID is not set | ||
| 1129 | 1327 | ||
| 1130 | # | 1328 | # |
| 1131 | # USB HID Boot Protocol drivers | 1329 | # USB HID Boot Protocol drivers |
| 1132 | # | 1330 | # |
| 1133 | # CONFIG_USB_KBD is not set | 1331 | # CONFIG_USB_KBD is not set |
| 1134 | # CONFIG_USB_MOUSE is not set | 1332 | # CONFIG_USB_MOUSE is not set |
| 1333 | |||
| 1334 | # | ||
| 1335 | # Special HID drivers | ||
| 1336 | # | ||
| 1337 | CONFIG_HID_APPLE=m | ||
| 1338 | # CONFIG_HID_WACOM is not set | ||
| 1135 | CONFIG_USB_SUPPORT=y | 1339 | CONFIG_USB_SUPPORT=y |
| 1136 | CONFIG_USB_ARCH_HAS_HCD=y | 1340 | CONFIG_USB_ARCH_HAS_HCD=y |
| 1137 | CONFIG_USB_ARCH_HAS_OHCI=y | 1341 | CONFIG_USB_ARCH_HAS_OHCI=y |
| @@ -1150,32 +1354,42 @@ CONFIG_USB=y | |||
| 1150 | # CONFIG_USB_OTG is not set | 1354 | # CONFIG_USB_OTG is not set |
| 1151 | # CONFIG_USB_OTG_WHITELIST is not set | 1355 | # CONFIG_USB_OTG_WHITELIST is not set |
| 1152 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | 1356 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set |
| 1357 | # CONFIG_USB_MON is not set | ||
| 1358 | # CONFIG_USB_WUSB is not set | ||
| 1359 | # CONFIG_USB_WUSB_CBAF is not set | ||
| 1153 | 1360 | ||
| 1154 | # | 1361 | # |
| 1155 | # USB Host Controller Drivers | 1362 | # USB Host Controller Drivers |
| 1156 | # | 1363 | # |
| 1157 | # CONFIG_USB_C67X00_HCD is not set | 1364 | # CONFIG_USB_C67X00_HCD is not set |
| 1365 | # CONFIG_USB_OXU210HP_HCD is not set | ||
| 1158 | # CONFIG_USB_ISP116X_HCD is not set | 1366 | # CONFIG_USB_ISP116X_HCD is not set |
| 1159 | # CONFIG_USB_ISP1760_HCD is not set | 1367 | # CONFIG_USB_ISP1760_HCD is not set |
| 1368 | # CONFIG_USB_ISP1362_HCD is not set | ||
| 1160 | CONFIG_USB_OHCI_HCD=y | 1369 | CONFIG_USB_OHCI_HCD=y |
| 1161 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set | 1370 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set |
| 1162 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set | 1371 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set |
| 1163 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y | 1372 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y |
| 1164 | # CONFIG_USB_SL811_HCD is not set | 1373 | # CONFIG_USB_SL811_HCD is not set |
| 1165 | # CONFIG_USB_R8A66597_HCD is not set | 1374 | # CONFIG_USB_R8A66597_HCD is not set |
| 1375 | # CONFIG_USB_HWA_HCD is not set | ||
| 1376 | # CONFIG_USB_MUSB_HDRC is not set | ||
| 1377 | # CONFIG_USB_GADGET_MUSB_HDRC is not set | ||
| 1166 | 1378 | ||
| 1167 | # | 1379 | # |
| 1168 | # USB Device Class drivers | 1380 | # USB Device Class drivers |
| 1169 | # | 1381 | # |
| 1170 | # CONFIG_USB_ACM is not set | 1382 | # CONFIG_USB_ACM is not set |
| 1171 | # CONFIG_USB_PRINTER is not set | 1383 | # CONFIG_USB_PRINTER is not set |
| 1384 | # CONFIG_USB_WDM is not set | ||
| 1385 | # CONFIG_USB_TMC is not set | ||
| 1172 | 1386 | ||
| 1173 | # | 1387 | # |
| 1174 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | 1388 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may |
| 1175 | # | 1389 | # |
| 1176 | 1390 | ||
| 1177 | # | 1391 | # |
| 1178 | # may also be needed; see USB_STORAGE Help for more information | 1392 | # also be needed; see USB_STORAGE Help for more info |
| 1179 | # | 1393 | # |
| 1180 | # CONFIG_USB_LIBUSUAL is not set | 1394 | # CONFIG_USB_LIBUSUAL is not set |
| 1181 | 1395 | ||
| @@ -1183,7 +1397,6 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y | |||
| 1183 | # USB Imaging devices | 1397 | # USB Imaging devices |
| 1184 | # | 1398 | # |
| 1185 | # CONFIG_USB_MDC800 is not set | 1399 | # CONFIG_USB_MDC800 is not set |
| 1186 | # CONFIG_USB_MON is not set | ||
| 1187 | 1400 | ||
| 1188 | # | 1401 | # |
| 1189 | # USB port drivers | 1402 | # USB port drivers |
| @@ -1196,7 +1409,7 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y | |||
| 1196 | # CONFIG_USB_EMI62 is not set | 1409 | # CONFIG_USB_EMI62 is not set |
| 1197 | # CONFIG_USB_EMI26 is not set | 1410 | # CONFIG_USB_EMI26 is not set |
| 1198 | # CONFIG_USB_ADUTUX is not set | 1411 | # CONFIG_USB_ADUTUX is not set |
| 1199 | # CONFIG_USB_AUERSWALD is not set | 1412 | # CONFIG_USB_SEVSEG is not set |
| 1200 | # CONFIG_USB_RIO500 is not set | 1413 | # CONFIG_USB_RIO500 is not set |
| 1201 | # CONFIG_USB_LEGOTOWER is not set | 1414 | # CONFIG_USB_LEGOTOWER is not set |
| 1202 | # CONFIG_USB_LCD is not set | 1415 | # CONFIG_USB_LCD is not set |
| @@ -1204,62 +1417,94 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y | |||
| 1204 | # CONFIG_USB_LED is not set | 1417 | # CONFIG_USB_LED is not set |
| 1205 | # CONFIG_USB_CYPRESS_CY7C63 is not set | 1418 | # CONFIG_USB_CYPRESS_CY7C63 is not set |
| 1206 | # CONFIG_USB_CYTHERM is not set | 1419 | # CONFIG_USB_CYTHERM is not set |
| 1207 | # CONFIG_USB_PHIDGET is not set | ||
| 1208 | # CONFIG_USB_IDMOUSE is not set | 1420 | # CONFIG_USB_IDMOUSE is not set |
| 1209 | # CONFIG_USB_FTDI_ELAN is not set | 1421 | # CONFIG_USB_FTDI_ELAN is not set |
| 1210 | # CONFIG_USB_APPLEDISPLAY is not set | 1422 | # CONFIG_USB_APPLEDISPLAY is not set |
| 1211 | # CONFIG_USB_LD is not set | 1423 | # CONFIG_USB_LD is not set |
| 1212 | # CONFIG_USB_TRANCEVIBRATOR is not set | 1424 | # CONFIG_USB_TRANCEVIBRATOR is not set |
| 1213 | # CONFIG_USB_IOWARRIOR is not set | 1425 | # CONFIG_USB_IOWARRIOR is not set |
| 1426 | # CONFIG_USB_TEST is not set | ||
| 1427 | # CONFIG_USB_ISIGHTFW is not set | ||
| 1428 | # CONFIG_USB_VST is not set | ||
| 1214 | CONFIG_USB_GADGET=y | 1429 | CONFIG_USB_GADGET=y |
| 1430 | # CONFIG_USB_GADGET_DEBUG is not set | ||
| 1215 | # CONFIG_USB_GADGET_DEBUG_FILES is not set | 1431 | # CONFIG_USB_GADGET_DEBUG_FILES is not set |
| 1432 | # CONFIG_USB_GADGET_DEBUG_FS is not set | ||
| 1433 | CONFIG_USB_GADGET_VBUS_DRAW=2 | ||
| 1216 | CONFIG_USB_GADGET_SELECTED=y | 1434 | CONFIG_USB_GADGET_SELECTED=y |
| 1217 | # CONFIG_USB_GADGET_AMD5536UDC is not set | 1435 | # CONFIG_USB_GADGET_AT91 is not set |
| 1218 | # CONFIG_USB_GADGET_ATMEL_USBA is not set | 1436 | # CONFIG_USB_GADGET_ATMEL_USBA is not set |
| 1219 | # CONFIG_USB_GADGET_FSL_USB2 is not set | 1437 | # CONFIG_USB_GADGET_FSL_USB2 is not set |
| 1220 | # CONFIG_USB_GADGET_NET2280 is not set | 1438 | # CONFIG_USB_GADGET_LH7A40X is not set |
| 1439 | # CONFIG_USB_GADGET_OMAP is not set | ||
| 1221 | # CONFIG_USB_GADGET_PXA25X is not set | 1440 | # CONFIG_USB_GADGET_PXA25X is not set |
| 1222 | # CONFIG_USB_GADGET_M66592 is not set | 1441 | # CONFIG_USB_GADGET_R8A66597 is not set |
| 1223 | CONFIG_USB_GADGET_PXA27X=y | 1442 | CONFIG_USB_GADGET_PXA27X=y |
| 1224 | CONFIG_USB_PXA27X=y | 1443 | CONFIG_USB_PXA27X=y |
| 1225 | # CONFIG_USB_GADGET_GOKU is not set | 1444 | # CONFIG_USB_GADGET_S3C_HSOTG is not set |
| 1226 | # CONFIG_USB_GADGET_LH7A40X is not set | 1445 | # CONFIG_USB_GADGET_IMX is not set |
| 1227 | # CONFIG_USB_GADGET_OMAP is not set | ||
| 1228 | # CONFIG_USB_GADGET_S3C2410 is not set | 1446 | # CONFIG_USB_GADGET_S3C2410 is not set |
| 1229 | # CONFIG_USB_GADGET_AT91 is not set | 1447 | # CONFIG_USB_GADGET_M66592 is not set |
| 1448 | # CONFIG_USB_GADGET_AMD5536UDC is not set | ||
| 1449 | # CONFIG_USB_GADGET_FSL_QE is not set | ||
| 1450 | # CONFIG_USB_GADGET_CI13XXX is not set | ||
| 1451 | # CONFIG_USB_GADGET_NET2280 is not set | ||
| 1452 | # CONFIG_USB_GADGET_GOKU is not set | ||
| 1453 | # CONFIG_USB_GADGET_LANGWELL is not set | ||
| 1230 | # CONFIG_USB_GADGET_DUMMY_HCD is not set | 1454 | # CONFIG_USB_GADGET_DUMMY_HCD is not set |
| 1231 | # CONFIG_USB_GADGET_DUALSPEED is not set | 1455 | # CONFIG_USB_GADGET_DUALSPEED is not set |
| 1232 | # CONFIG_USB_ZERO is not set | 1456 | # CONFIG_USB_ZERO is not set |
| 1457 | # CONFIG_USB_AUDIO is not set | ||
| 1233 | CONFIG_USB_ETH=y | 1458 | CONFIG_USB_ETH=y |
| 1234 | # CONFIG_USB_ETH_RNDIS is not set | 1459 | # CONFIG_USB_ETH_RNDIS is not set |
| 1460 | # CONFIG_USB_ETH_EEM is not set | ||
| 1235 | # CONFIG_USB_GADGETFS is not set | 1461 | # CONFIG_USB_GADGETFS is not set |
| 1236 | # CONFIG_USB_FILE_STORAGE is not set | 1462 | # CONFIG_USB_FILE_STORAGE is not set |
| 1237 | # CONFIG_USB_G_SERIAL is not set | 1463 | # CONFIG_USB_G_SERIAL is not set |
| 1238 | # CONFIG_USB_MIDI_GADGET is not set | 1464 | # CONFIG_USB_MIDI_GADGET is not set |
| 1239 | # CONFIG_USB_G_PRINTER is not set | 1465 | # CONFIG_USB_G_PRINTER is not set |
| 1466 | # CONFIG_USB_CDC_COMPOSITE is not set | ||
| 1467 | |||
| 1468 | # | ||
| 1469 | # OTG and related infrastructure | ||
| 1470 | # | ||
| 1471 | CONFIG_USB_OTG_UTILS=y | ||
| 1472 | # CONFIG_USB_GPIO_VBUS is not set | ||
| 1473 | # CONFIG_NOP_USB_XCEIV is not set | ||
| 1240 | CONFIG_MMC=y | 1474 | CONFIG_MMC=y |
| 1241 | # CONFIG_MMC_DEBUG is not set | 1475 | # CONFIG_MMC_DEBUG is not set |
| 1242 | CONFIG_MMC_UNSAFE_RESUME=y | 1476 | CONFIG_MMC_UNSAFE_RESUME=y |
| 1243 | 1477 | ||
| 1244 | # | 1478 | # |
| 1245 | # MMC/SD Card Drivers | 1479 | # MMC/SD/SDIO Card Drivers |
| 1246 | # | 1480 | # |
| 1247 | CONFIG_MMC_BLOCK=y | 1481 | CONFIG_MMC_BLOCK=y |
| 1248 | CONFIG_MMC_BLOCK_BOUNCE=y | 1482 | CONFIG_MMC_BLOCK_BOUNCE=y |
| 1249 | CONFIG_SDIO_UART=y | 1483 | CONFIG_SDIO_UART=m |
| 1484 | # CONFIG_MMC_TEST is not set | ||
| 1250 | 1485 | ||
| 1251 | # | 1486 | # |
| 1252 | # MMC/SD Host Controller Drivers | 1487 | # MMC/SD/SDIO Host Controller Drivers |
| 1253 | # | 1488 | # |
| 1254 | CONFIG_MMC_PXA=y | 1489 | CONFIG_MMC_PXA=y |
| 1255 | # CONFIG_MMC_SPI is not set | 1490 | # CONFIG_MMC_SDHCI is not set |
| 1491 | # CONFIG_MMC_AT91 is not set | ||
| 1492 | # CONFIG_MMC_ATMELMCI is not set | ||
| 1493 | CONFIG_MMC_SPI=y | ||
| 1494 | # CONFIG_MEMSTICK is not set | ||
| 1256 | CONFIG_NEW_LEDS=y | 1495 | CONFIG_NEW_LEDS=y |
| 1257 | CONFIG_LEDS_CLASS=y | 1496 | CONFIG_LEDS_CLASS=y |
| 1258 | 1497 | ||
| 1259 | # | 1498 | # |
| 1260 | # LED drivers | 1499 | # LED drivers |
| 1261 | # | 1500 | # |
| 1501 | # CONFIG_LEDS_PCA9532 is not set | ||
| 1262 | # CONFIG_LEDS_GPIO is not set | 1502 | # CONFIG_LEDS_GPIO is not set |
| 1503 | CONFIG_LEDS_LP3944=y | ||
| 1504 | # CONFIG_LEDS_PCA955X is not set | ||
| 1505 | # CONFIG_LEDS_DAC124S085 is not set | ||
| 1506 | # CONFIG_LEDS_PWM is not set | ||
| 1507 | # CONFIG_LEDS_BD2802 is not set | ||
| 1263 | 1508 | ||
| 1264 | # | 1509 | # |
| 1265 | # LED Triggers | 1510 | # LED Triggers |
| @@ -1267,7 +1512,14 @@ CONFIG_LEDS_CLASS=y | |||
| 1267 | CONFIG_LEDS_TRIGGERS=y | 1512 | CONFIG_LEDS_TRIGGERS=y |
| 1268 | CONFIG_LEDS_TRIGGER_TIMER=y | 1513 | CONFIG_LEDS_TRIGGER_TIMER=y |
| 1269 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | 1514 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y |
| 1270 | # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set | 1515 | CONFIG_LEDS_TRIGGER_BACKLIGHT=y |
| 1516 | CONFIG_LEDS_TRIGGER_GPIO=y | ||
| 1517 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=y | ||
| 1518 | |||
| 1519 | # | ||
| 1520 | # iptables trigger is under Netfilter config (LED target) | ||
| 1521 | # | ||
| 1522 | # CONFIG_ACCESSIBILITY is not set | ||
| 1271 | CONFIG_RTC_LIB=y | 1523 | CONFIG_RTC_LIB=y |
| 1272 | CONFIG_RTC_CLASS=y | 1524 | CONFIG_RTC_CLASS=y |
| 1273 | CONFIG_RTC_HCTOSYS=y | 1525 | CONFIG_RTC_HCTOSYS=y |
| @@ -1297,45 +1549,67 @@ CONFIG_RTC_INTF_DEV=y | |||
| 1297 | # CONFIG_RTC_DRV_PCF8583 is not set | 1549 | # CONFIG_RTC_DRV_PCF8583 is not set |
| 1298 | # CONFIG_RTC_DRV_M41T80 is not set | 1550 | # CONFIG_RTC_DRV_M41T80 is not set |
| 1299 | # CONFIG_RTC_DRV_S35390A is not set | 1551 | # CONFIG_RTC_DRV_S35390A is not set |
| 1552 | # CONFIG_RTC_DRV_FM3130 is not set | ||
| 1553 | # CONFIG_RTC_DRV_RX8581 is not set | ||
| 1554 | # CONFIG_RTC_DRV_RX8025 is not set | ||
| 1300 | 1555 | ||
| 1301 | # | 1556 | # |
| 1302 | # SPI RTC drivers | 1557 | # SPI RTC drivers |
| 1303 | # | 1558 | # |
| 1559 | # CONFIG_RTC_DRV_M41T94 is not set | ||
| 1560 | # CONFIG_RTC_DRV_DS1305 is not set | ||
| 1561 | # CONFIG_RTC_DRV_DS1390 is not set | ||
| 1304 | # CONFIG_RTC_DRV_MAX6902 is not set | 1562 | # CONFIG_RTC_DRV_MAX6902 is not set |
| 1305 | # CONFIG_RTC_DRV_R9701 is not set | 1563 | # CONFIG_RTC_DRV_R9701 is not set |
| 1306 | # CONFIG_RTC_DRV_RS5C348 is not set | 1564 | # CONFIG_RTC_DRV_RS5C348 is not set |
| 1565 | # CONFIG_RTC_DRV_DS3234 is not set | ||
| 1566 | # CONFIG_RTC_DRV_PCF2123 is not set | ||
| 1307 | 1567 | ||
| 1308 | # | 1568 | # |
| 1309 | # Platform RTC drivers | 1569 | # Platform RTC drivers |
| 1310 | # | 1570 | # |
| 1311 | # CONFIG_RTC_DRV_CMOS is not set | 1571 | # CONFIG_RTC_DRV_CMOS is not set |
| 1572 | # CONFIG_RTC_DRV_DS1286 is not set | ||
| 1312 | # CONFIG_RTC_DRV_DS1511 is not set | 1573 | # CONFIG_RTC_DRV_DS1511 is not set |
| 1313 | # CONFIG_RTC_DRV_DS1553 is not set | 1574 | # CONFIG_RTC_DRV_DS1553 is not set |
| 1314 | # CONFIG_RTC_DRV_DS1742 is not set | 1575 | # CONFIG_RTC_DRV_DS1742 is not set |
| 1315 | # CONFIG_RTC_DRV_STK17TA8 is not set | 1576 | # CONFIG_RTC_DRV_STK17TA8 is not set |
| 1316 | # CONFIG_RTC_DRV_M48T86 is not set | 1577 | # CONFIG_RTC_DRV_M48T86 is not set |
| 1578 | # CONFIG_RTC_DRV_M48T35 is not set | ||
| 1317 | # CONFIG_RTC_DRV_M48T59 is not set | 1579 | # CONFIG_RTC_DRV_M48T59 is not set |
| 1580 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
| 1318 | # CONFIG_RTC_DRV_V3020 is not set | 1581 | # CONFIG_RTC_DRV_V3020 is not set |
| 1319 | 1582 | ||
| 1320 | # | 1583 | # |
| 1321 | # on-CPU RTC drivers | 1584 | # on-CPU RTC drivers |
| 1322 | # | 1585 | # |
| 1323 | CONFIG_RTC_DRV_SA1100=m | 1586 | # CONFIG_RTC_DRV_SA1100 is not set |
| 1587 | # CONFIG_RTC_DRV_PXA is not set | ||
| 1588 | CONFIG_RTC_DRV_PCAP=y | ||
| 1589 | # CONFIG_DMADEVICES is not set | ||
| 1590 | # CONFIG_AUXDISPLAY is not set | ||
| 1324 | # CONFIG_UIO is not set | 1591 | # CONFIG_UIO is not set |
| 1325 | 1592 | ||
| 1326 | # | 1593 | # |
| 1594 | # TI VLYNQ | ||
| 1595 | # | ||
| 1596 | # CONFIG_STAGING is not set | ||
| 1597 | |||
| 1598 | # | ||
| 1327 | # File systems | 1599 | # File systems |
| 1328 | # | 1600 | # |
| 1329 | CONFIG_EXT2_FS=y | 1601 | CONFIG_EXT2_FS=y |
| 1330 | # CONFIG_EXT2_FS_XATTR is not set | 1602 | # CONFIG_EXT2_FS_XATTR is not set |
| 1331 | # CONFIG_EXT2_FS_XIP is not set | 1603 | # CONFIG_EXT2_FS_XIP is not set |
| 1332 | CONFIG_EXT3_FS=m | 1604 | CONFIG_EXT3_FS=m |
| 1605 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 1333 | CONFIG_EXT3_FS_XATTR=y | 1606 | CONFIG_EXT3_FS_XATTR=y |
| 1334 | # CONFIG_EXT3_FS_POSIX_ACL is not set | 1607 | # CONFIG_EXT3_FS_POSIX_ACL is not set |
| 1335 | # CONFIG_EXT3_FS_SECURITY is not set | 1608 | # CONFIG_EXT3_FS_SECURITY is not set |
| 1336 | # CONFIG_EXT4DEV_FS is not set | 1609 | # CONFIG_EXT4_FS is not set |
| 1337 | CONFIG_JBD=m | 1610 | CONFIG_JBD=m |
| 1338 | CONFIG_FS_MBCACHE=y | 1611 | # CONFIG_JBD_DEBUG is not set |
| 1612 | CONFIG_FS_MBCACHE=m | ||
| 1339 | CONFIG_REISERFS_FS=m | 1613 | CONFIG_REISERFS_FS=m |
| 1340 | # CONFIG_REISERFS_CHECK is not set | 1614 | # CONFIG_REISERFS_CHECK is not set |
| 1341 | # CONFIG_REISERFS_PROC_INFO is not set | 1615 | # CONFIG_REISERFS_PROC_INFO is not set |
| @@ -1350,6 +1624,10 @@ CONFIG_XFS_FS=m | |||
| 1350 | # CONFIG_XFS_RT is not set | 1624 | # CONFIG_XFS_RT is not set |
| 1351 | # CONFIG_XFS_DEBUG is not set | 1625 | # CONFIG_XFS_DEBUG is not set |
| 1352 | # CONFIG_OCFS2_FS is not set | 1626 | # CONFIG_OCFS2_FS is not set |
| 1627 | # CONFIG_BTRFS_FS is not set | ||
| 1628 | # CONFIG_NILFS2_FS is not set | ||
| 1629 | CONFIG_FILE_LOCKING=y | ||
| 1630 | CONFIG_FSNOTIFY=y | ||
| 1353 | CONFIG_DNOTIFY=y | 1631 | CONFIG_DNOTIFY=y |
| 1354 | CONFIG_INOTIFY=y | 1632 | CONFIG_INOTIFY=y |
| 1355 | CONFIG_INOTIFY_USER=y | 1633 | CONFIG_INOTIFY_USER=y |
| @@ -1357,6 +1635,12 @@ CONFIG_INOTIFY_USER=y | |||
| 1357 | CONFIG_AUTOFS_FS=y | 1635 | CONFIG_AUTOFS_FS=y |
| 1358 | CONFIG_AUTOFS4_FS=y | 1636 | CONFIG_AUTOFS4_FS=y |
| 1359 | CONFIG_FUSE_FS=m | 1637 | CONFIG_FUSE_FS=m |
| 1638 | CONFIG_CUSE=m | ||
| 1639 | |||
| 1640 | # | ||
| 1641 | # Caches | ||
| 1642 | # | ||
| 1643 | # CONFIG_FSCACHE is not set | ||
| 1360 | 1644 | ||
| 1361 | # | 1645 | # |
| 1362 | # CD-ROM/DVD Filesystems | 1646 | # CD-ROM/DVD Filesystems |
| @@ -1381,15 +1665,13 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | |||
| 1381 | # | 1665 | # |
| 1382 | CONFIG_PROC_FS=y | 1666 | CONFIG_PROC_FS=y |
| 1383 | CONFIG_PROC_SYSCTL=y | 1667 | CONFIG_PROC_SYSCTL=y |
| 1668 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 1384 | CONFIG_SYSFS=y | 1669 | CONFIG_SYSFS=y |
| 1385 | CONFIG_TMPFS=y | 1670 | CONFIG_TMPFS=y |
| 1386 | # CONFIG_TMPFS_POSIX_ACL is not set | 1671 | # CONFIG_TMPFS_POSIX_ACL is not set |
| 1387 | # CONFIG_HUGETLB_PAGE is not set | 1672 | # CONFIG_HUGETLB_PAGE is not set |
| 1388 | # CONFIG_CONFIGFS_FS is not set | 1673 | # CONFIG_CONFIGFS_FS is not set |
| 1389 | 1674 | CONFIG_MISC_FILESYSTEMS=y | |
| 1390 | # | ||
| 1391 | # Miscellaneous filesystems | ||
| 1392 | # | ||
| 1393 | # CONFIG_ADFS_FS is not set | 1675 | # CONFIG_ADFS_FS is not set |
| 1394 | # CONFIG_AFFS_FS is not set | 1676 | # CONFIG_AFFS_FS is not set |
| 1395 | # CONFIG_HFS_FS is not set | 1677 | # CONFIG_HFS_FS is not set |
| @@ -1397,13 +1679,35 @@ CONFIG_TMPFS=y | |||
| 1397 | # CONFIG_BEFS_FS is not set | 1679 | # CONFIG_BEFS_FS is not set |
| 1398 | # CONFIG_BFS_FS is not set | 1680 | # CONFIG_BFS_FS is not set |
| 1399 | # CONFIG_EFS_FS is not set | 1681 | # CONFIG_EFS_FS is not set |
| 1400 | # CONFIG_JFFS2_FS is not set | 1682 | CONFIG_JFFS2_FS=m |
| 1683 | CONFIG_JFFS2_FS_DEBUG=0 | ||
| 1684 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
| 1685 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
| 1686 | # CONFIG_JFFS2_SUMMARY is not set | ||
| 1687 | # CONFIG_JFFS2_FS_XATTR is not set | ||
| 1688 | CONFIG_JFFS2_COMPRESSION_OPTIONS=y | ||
| 1689 | CONFIG_JFFS2_ZLIB=y | ||
| 1690 | CONFIG_JFFS2_LZO=y | ||
| 1691 | CONFIG_JFFS2_RTIME=y | ||
| 1692 | CONFIG_JFFS2_RUBIN=y | ||
| 1693 | # CONFIG_JFFS2_CMODE_NONE is not set | ||
| 1694 | CONFIG_JFFS2_CMODE_PRIORITY=y | ||
| 1695 | # CONFIG_JFFS2_CMODE_SIZE is not set | ||
| 1696 | # CONFIG_JFFS2_CMODE_FAVOURLZO is not set | ||
| 1401 | CONFIG_CRAMFS=m | 1697 | CONFIG_CRAMFS=m |
| 1698 | CONFIG_SQUASHFS=m | ||
| 1699 | # CONFIG_SQUASHFS_EMBEDDED is not set | ||
| 1700 | CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 | ||
| 1402 | # CONFIG_VXFS_FS is not set | 1701 | # CONFIG_VXFS_FS is not set |
| 1403 | # CONFIG_MINIX_FS is not set | 1702 | # CONFIG_MINIX_FS is not set |
| 1703 | # CONFIG_OMFS_FS is not set | ||
| 1404 | # CONFIG_HPFS_FS is not set | 1704 | # CONFIG_HPFS_FS is not set |
| 1405 | # CONFIG_QNX4FS_FS is not set | 1705 | # CONFIG_QNX4FS_FS is not set |
| 1406 | # CONFIG_ROMFS_FS is not set | 1706 | CONFIG_ROMFS_FS=m |
| 1707 | CONFIG_ROMFS_BACKED_BY_BLOCK=y | ||
| 1708 | # CONFIG_ROMFS_BACKED_BY_MTD is not set | ||
| 1709 | # CONFIG_ROMFS_BACKED_BY_BOTH is not set | ||
| 1710 | CONFIG_ROMFS_ON_BLOCK=y | ||
| 1407 | # CONFIG_SYSV_FS is not set | 1711 | # CONFIG_SYSV_FS is not set |
| 1408 | # CONFIG_UFS_FS is not set | 1712 | # CONFIG_UFS_FS is not set |
| 1409 | CONFIG_NETWORK_FILESYSTEMS=y | 1713 | CONFIG_NETWORK_FILESYSTEMS=y |
| @@ -1411,19 +1715,18 @@ CONFIG_NFS_FS=y | |||
| 1411 | CONFIG_NFS_V3=y | 1715 | CONFIG_NFS_V3=y |
| 1412 | CONFIG_NFS_V3_ACL=y | 1716 | CONFIG_NFS_V3_ACL=y |
| 1413 | # CONFIG_NFS_V4 is not set | 1717 | # CONFIG_NFS_V4 is not set |
| 1718 | # CONFIG_ROOT_NFS is not set | ||
| 1414 | CONFIG_NFSD=m | 1719 | CONFIG_NFSD=m |
| 1415 | CONFIG_NFSD_V2_ACL=y | 1720 | CONFIG_NFSD_V2_ACL=y |
| 1416 | CONFIG_NFSD_V3=y | 1721 | CONFIG_NFSD_V3=y |
| 1417 | CONFIG_NFSD_V3_ACL=y | 1722 | CONFIG_NFSD_V3_ACL=y |
| 1418 | # CONFIG_NFSD_V4 is not set | 1723 | # CONFIG_NFSD_V4 is not set |
| 1419 | # CONFIG_ROOT_NFS is not set | ||
| 1420 | CONFIG_LOCKD=y | 1724 | CONFIG_LOCKD=y |
| 1421 | CONFIG_LOCKD_V4=y | 1725 | CONFIG_LOCKD_V4=y |
| 1422 | CONFIG_EXPORTFS=m | 1726 | CONFIG_EXPORTFS=m |
| 1423 | CONFIG_NFS_ACL_SUPPORT=y | 1727 | CONFIG_NFS_ACL_SUPPORT=y |
| 1424 | CONFIG_NFS_COMMON=y | 1728 | CONFIG_NFS_COMMON=y |
| 1425 | CONFIG_SUNRPC=y | 1729 | CONFIG_SUNRPC=y |
| 1426 | # CONFIG_SUNRPC_BIND34 is not set | ||
| 1427 | # CONFIG_RPCSEC_GSS_KRB5 is not set | 1730 | # CONFIG_RPCSEC_GSS_KRB5 is not set |
| 1428 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | 1731 | # CONFIG_RPCSEC_GSS_SPKM3 is not set |
| 1429 | CONFIG_SMB_FS=m | 1732 | CONFIG_SMB_FS=m |
| @@ -1490,25 +1793,83 @@ CONFIG_NLS_UTF8=m | |||
| 1490 | # | 1793 | # |
| 1491 | # Kernel hacking | 1794 | # Kernel hacking |
| 1492 | # | 1795 | # |
| 1493 | # CONFIG_PRINTK_TIME is not set | 1796 | CONFIG_PRINTK_TIME=y |
| 1494 | CONFIG_ENABLE_WARN_DEPRECATED=y | 1797 | CONFIG_ENABLE_WARN_DEPRECATED=y |
| 1495 | # CONFIG_ENABLE_MUST_CHECK is not set | 1798 | CONFIG_ENABLE_MUST_CHECK=y |
| 1496 | CONFIG_FRAME_WARN=1024 | 1799 | CONFIG_FRAME_WARN=1024 |
| 1497 | # CONFIG_MAGIC_SYSRQ is not set | 1800 | # CONFIG_MAGIC_SYSRQ is not set |
| 1801 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 1498 | # CONFIG_UNUSED_SYMBOLS is not set | 1802 | # CONFIG_UNUSED_SYMBOLS is not set |
| 1499 | # CONFIG_DEBUG_FS is not set | 1803 | CONFIG_DEBUG_FS=y |
| 1500 | # CONFIG_HEADERS_CHECK is not set | 1804 | # CONFIG_HEADERS_CHECK is not set |
| 1501 | # CONFIG_DEBUG_KERNEL is not set | 1805 | CONFIG_DEBUG_KERNEL=y |
| 1502 | # CONFIG_DEBUG_BUGVERBOSE is not set | 1806 | # CONFIG_DEBUG_SHIRQ is not set |
| 1503 | CONFIG_FRAME_POINTER=y | 1807 | CONFIG_DETECT_SOFTLOCKUP=y |
| 1808 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | ||
| 1809 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | ||
| 1810 | CONFIG_DETECT_HUNG_TASK=y | ||
| 1811 | # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set | ||
| 1812 | CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 | ||
| 1813 | # CONFIG_SCHED_DEBUG is not set | ||
| 1814 | # CONFIG_SCHEDSTATS is not set | ||
| 1815 | # CONFIG_TIMER_STATS is not set | ||
| 1816 | # CONFIG_DEBUG_OBJECTS is not set | ||
| 1817 | # CONFIG_DEBUG_SLAB is not set | ||
| 1818 | # CONFIG_DEBUG_KMEMLEAK is not set | ||
| 1819 | CONFIG_DEBUG_PREEMPT=y | ||
| 1820 | CONFIG_DEBUG_RT_MUTEXES=y | ||
| 1821 | CONFIG_DEBUG_PI_LIST=y | ||
| 1822 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 1823 | CONFIG_DEBUG_SPINLOCK=y | ||
| 1824 | CONFIG_DEBUG_MUTEXES=y | ||
| 1825 | CONFIG_DEBUG_LOCK_ALLOC=y | ||
| 1826 | CONFIG_PROVE_LOCKING=y | ||
| 1827 | CONFIG_LOCKDEP=y | ||
| 1828 | # CONFIG_LOCK_STAT is not set | ||
| 1829 | # CONFIG_DEBUG_LOCKDEP is not set | ||
| 1830 | CONFIG_TRACE_IRQFLAGS=y | ||
| 1831 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
| 1832 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
| 1833 | CONFIG_STACKTRACE=y | ||
| 1834 | # CONFIG_DEBUG_KOBJECT is not set | ||
| 1835 | CONFIG_DEBUG_BUGVERBOSE=y | ||
| 1836 | # CONFIG_DEBUG_INFO is not set | ||
| 1837 | # CONFIG_DEBUG_VM is not set | ||
| 1838 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
| 1839 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
| 1840 | # CONFIG_DEBUG_LIST is not set | ||
| 1841 | # CONFIG_DEBUG_SG is not set | ||
| 1842 | # CONFIG_DEBUG_NOTIFIERS is not set | ||
| 1843 | # CONFIG_DEBUG_CREDENTIALS is not set | ||
| 1844 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
| 1845 | # CONFIG_RCU_TORTURE_TEST is not set | ||
| 1846 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 1847 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
| 1848 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
| 1849 | # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set | ||
| 1850 | # CONFIG_FAULT_INJECTION is not set | ||
| 1851 | # CONFIG_LATENCYTOP is not set | ||
| 1852 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
| 1853 | # CONFIG_PAGE_POISONING is not set | ||
| 1854 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 1855 | CONFIG_TRACING_SUPPORT=y | ||
| 1856 | # CONFIG_FTRACE is not set | ||
| 1857 | # CONFIG_DYNAMIC_DEBUG is not set | ||
| 1504 | # CONFIG_SAMPLES is not set | 1858 | # CONFIG_SAMPLES is not set |
| 1505 | # CONFIG_DEBUG_USER is not set | 1859 | CONFIG_HAVE_ARCH_KGDB=y |
| 1860 | # CONFIG_KGDB is not set | ||
| 1861 | CONFIG_ARM_UNWIND=y | ||
| 1862 | CONFIG_DEBUG_USER=y | ||
| 1863 | CONFIG_DEBUG_ERRORS=y | ||
| 1864 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
| 1865 | # CONFIG_DEBUG_LL is not set | ||
| 1506 | 1866 | ||
| 1507 | # | 1867 | # |
| 1508 | # Security options | 1868 | # Security options |
| 1509 | # | 1869 | # |
| 1510 | # CONFIG_KEYS is not set | 1870 | # CONFIG_KEYS is not set |
| 1511 | # CONFIG_SECURITY is not set | 1871 | # CONFIG_SECURITY is not set |
| 1872 | # CONFIG_SECURITYFS is not set | ||
| 1512 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | 1873 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set |
| 1513 | CONFIG_CRYPTO=y | 1874 | CONFIG_CRYPTO=y |
| 1514 | 1875 | ||
| @@ -1516,12 +1877,20 @@ CONFIG_CRYPTO=y | |||
| 1516 | # Crypto core or helper | 1877 | # Crypto core or helper |
| 1517 | # | 1878 | # |
| 1518 | CONFIG_CRYPTO_ALGAPI=m | 1879 | CONFIG_CRYPTO_ALGAPI=m |
| 1880 | CONFIG_CRYPTO_ALGAPI2=m | ||
| 1519 | CONFIG_CRYPTO_AEAD=m | 1881 | CONFIG_CRYPTO_AEAD=m |
| 1882 | CONFIG_CRYPTO_AEAD2=m | ||
| 1520 | CONFIG_CRYPTO_BLKCIPHER=m | 1883 | CONFIG_CRYPTO_BLKCIPHER=m |
| 1884 | CONFIG_CRYPTO_BLKCIPHER2=m | ||
| 1521 | CONFIG_CRYPTO_HASH=m | 1885 | CONFIG_CRYPTO_HASH=m |
| 1886 | CONFIG_CRYPTO_HASH2=m | ||
| 1887 | CONFIG_CRYPTO_RNG2=m | ||
| 1888 | CONFIG_CRYPTO_PCOMP=m | ||
| 1522 | CONFIG_CRYPTO_MANAGER=m | 1889 | CONFIG_CRYPTO_MANAGER=m |
| 1890 | CONFIG_CRYPTO_MANAGER2=m | ||
| 1523 | CONFIG_CRYPTO_GF128MUL=m | 1891 | CONFIG_CRYPTO_GF128MUL=m |
| 1524 | CONFIG_CRYPTO_NULL=m | 1892 | CONFIG_CRYPTO_NULL=m |
| 1893 | CONFIG_CRYPTO_WORKQUEUE=m | ||
| 1525 | CONFIG_CRYPTO_CRYPTD=m | 1894 | CONFIG_CRYPTO_CRYPTD=m |
| 1526 | CONFIG_CRYPTO_AUTHENC=m | 1895 | CONFIG_CRYPTO_AUTHENC=m |
| 1527 | CONFIG_CRYPTO_TEST=m | 1896 | CONFIG_CRYPTO_TEST=m |
| @@ -1549,14 +1918,20 @@ CONFIG_CRYPTO_XTS=m | |||
| 1549 | # | 1918 | # |
| 1550 | CONFIG_CRYPTO_HMAC=m | 1919 | CONFIG_CRYPTO_HMAC=m |
| 1551 | CONFIG_CRYPTO_XCBC=m | 1920 | CONFIG_CRYPTO_XCBC=m |
| 1921 | CONFIG_CRYPTO_VMAC=m | ||
| 1552 | 1922 | ||
| 1553 | # | 1923 | # |
| 1554 | # Digest | 1924 | # Digest |
| 1555 | # | 1925 | # |
| 1556 | CONFIG_CRYPTO_CRC32C=m | 1926 | CONFIG_CRYPTO_CRC32C=m |
| 1927 | CONFIG_CRYPTO_GHASH=m | ||
| 1557 | CONFIG_CRYPTO_MD4=m | 1928 | CONFIG_CRYPTO_MD4=m |
| 1558 | CONFIG_CRYPTO_MD5=m | 1929 | CONFIG_CRYPTO_MD5=m |
| 1559 | CONFIG_CRYPTO_MICHAEL_MIC=m | 1930 | CONFIG_CRYPTO_MICHAEL_MIC=m |
| 1931 | # CONFIG_CRYPTO_RMD128 is not set | ||
| 1932 | # CONFIG_CRYPTO_RMD160 is not set | ||
| 1933 | # CONFIG_CRYPTO_RMD256 is not set | ||
| 1934 | # CONFIG_CRYPTO_RMD320 is not set | ||
| 1560 | CONFIG_CRYPTO_SHA1=m | 1935 | CONFIG_CRYPTO_SHA1=m |
| 1561 | CONFIG_CRYPTO_SHA256=m | 1936 | CONFIG_CRYPTO_SHA256=m |
| 1562 | CONFIG_CRYPTO_SHA512=m | 1937 | CONFIG_CRYPTO_SHA512=m |
| @@ -1587,28 +1962,40 @@ CONFIG_CRYPTO_TWOFISH_COMMON=m | |||
| 1587 | # Compression | 1962 | # Compression |
| 1588 | # | 1963 | # |
| 1589 | CONFIG_CRYPTO_DEFLATE=m | 1964 | CONFIG_CRYPTO_DEFLATE=m |
| 1965 | # CONFIG_CRYPTO_ZLIB is not set | ||
| 1590 | # CONFIG_CRYPTO_LZO is not set | 1966 | # CONFIG_CRYPTO_LZO is not set |
| 1967 | |||
| 1968 | # | ||
| 1969 | # Random Number Generation | ||
| 1970 | # | ||
| 1971 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
| 1591 | CONFIG_CRYPTO_HW=y | 1972 | CONFIG_CRYPTO_HW=y |
| 1973 | # CONFIG_BINARY_PRINTF is not set | ||
| 1592 | 1974 | ||
| 1593 | # | 1975 | # |
| 1594 | # Library routines | 1976 | # Library routines |
| 1595 | # | 1977 | # |
| 1596 | CONFIG_BITREVERSE=y | 1978 | CONFIG_BITREVERSE=y |
| 1597 | # CONFIG_GENERIC_FIND_FIRST_BIT is not set | 1979 | CONFIG_GENERIC_FIND_LAST_BIT=y |
| 1598 | # CONFIG_GENERIC_FIND_NEXT_BIT is not set | ||
| 1599 | CONFIG_CRC_CCITT=m | 1980 | CONFIG_CRC_CCITT=m |
| 1600 | CONFIG_CRC16=m | 1981 | CONFIG_CRC16=y |
| 1601 | # CONFIG_CRC_ITU_T is not set | 1982 | # CONFIG_CRC_T10DIF is not set |
| 1983 | CONFIG_CRC_ITU_T=y | ||
| 1602 | CONFIG_CRC32=y | 1984 | CONFIG_CRC32=y |
| 1603 | # CONFIG_CRC7 is not set | 1985 | CONFIG_CRC7=y |
| 1604 | CONFIG_LIBCRC32C=m | 1986 | CONFIG_LIBCRC32C=m |
| 1605 | CONFIG_ZLIB_INFLATE=m | 1987 | CONFIG_ZLIB_INFLATE=y |
| 1606 | CONFIG_ZLIB_DEFLATE=m | 1988 | CONFIG_ZLIB_DEFLATE=m |
| 1989 | CONFIG_LZO_COMPRESS=m | ||
| 1990 | CONFIG_LZO_DECOMPRESS=m | ||
| 1991 | CONFIG_DECOMPRESS_GZIP=y | ||
| 1992 | CONFIG_DECOMPRESS_BZIP2=y | ||
| 1993 | CONFIG_DECOMPRESS_LZMA=y | ||
| 1607 | CONFIG_TEXTSEARCH=y | 1994 | CONFIG_TEXTSEARCH=y |
| 1608 | CONFIG_TEXTSEARCH_KMP=m | 1995 | CONFIG_TEXTSEARCH_KMP=m |
| 1609 | CONFIG_TEXTSEARCH_BM=m | 1996 | CONFIG_TEXTSEARCH_BM=m |
| 1610 | CONFIG_TEXTSEARCH_FSM=m | 1997 | CONFIG_TEXTSEARCH_FSM=m |
| 1611 | CONFIG_PLIST=y | ||
| 1612 | CONFIG_HAS_IOMEM=y | 1998 | CONFIG_HAS_IOMEM=y |
| 1613 | CONFIG_HAS_IOPORT=y | 1999 | CONFIG_HAS_IOPORT=y |
| 1614 | CONFIG_HAS_DMA=y | 2000 | CONFIG_HAS_DMA=y |
| 2001 | CONFIG_NLATTR=y | ||
diff --git a/arch/arm/configs/h3600_defconfig b/arch/arm/configs/h3600_defconfig index f6aed7747d4..efa78e144e5 100644 --- a/arch/arm/configs/h3600_defconfig +++ b/arch/arm/configs/h3600_defconfig | |||
| @@ -1,86 +1,189 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.12-rc4 | 3 | # Linux kernel version: 2.6.32-rc5 |
| 4 | # Thu Jun 9 01:59:03 2005 | 4 | # Sat Oct 24 00:09:30 2009 |
| 5 | # | 5 | # |
| 6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
| 7 | CONFIG_MMU=y | 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
| 8 | CONFIG_UID16=y | 8 | CONFIG_GENERIC_GPIO=y |
| 9 | CONFIG_GENERIC_TIME=y | ||
| 10 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 11 | CONFIG_GENERIC_HARDIRQS=y | ||
| 12 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 13 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 14 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 15 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 16 | CONFIG_HARDIRQS_SW_RESEND=y | ||
| 17 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 9 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | 18 | CONFIG_RWSEM_GENERIC_SPINLOCK=y |
| 19 | CONFIG_ARCH_HAS_CPUFREQ=y | ||
| 20 | CONFIG_GENERIC_HWEIGHT=y | ||
| 10 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 21 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
| 11 | CONFIG_GENERIC_IOMAP=y | 22 | CONFIG_ARCH_MTD_XIP=y |
| 23 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 24 | CONFIG_VECTORS_BASE=0xffff0000 | ||
| 25 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 26 | CONFIG_CONSTRUCTORS=y | ||
| 12 | 27 | ||
| 13 | # | 28 | # |
| 14 | # Code maturity level options | 29 | # General setup |
| 15 | # | 30 | # |
| 16 | CONFIG_EXPERIMENTAL=y | 31 | CONFIG_EXPERIMENTAL=y |
| 17 | CONFIG_CLEAN_COMPILE=y | ||
| 18 | CONFIG_BROKEN_ON_SMP=y | 32 | CONFIG_BROKEN_ON_SMP=y |
| 19 | CONFIG_INIT_ENV_ARG_LIMIT=32 | 33 | CONFIG_INIT_ENV_ARG_LIMIT=32 |
| 20 | |||
| 21 | # | ||
| 22 | # General setup | ||
| 23 | # | ||
| 24 | CONFIG_LOCALVERSION="" | 34 | CONFIG_LOCALVERSION="" |
| 35 | CONFIG_LOCALVERSION_AUTO=y | ||
| 25 | CONFIG_SWAP=y | 36 | CONFIG_SWAP=y |
| 26 | CONFIG_SYSVIPC=y | 37 | CONFIG_SYSVIPC=y |
| 38 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 27 | # CONFIG_POSIX_MQUEUE is not set | 39 | # CONFIG_POSIX_MQUEUE is not set |
| 28 | # CONFIG_BSD_PROCESS_ACCT is not set | 40 | # CONFIG_BSD_PROCESS_ACCT is not set |
| 29 | CONFIG_SYSCTL=y | 41 | # CONFIG_TASKSTATS is not set |
| 30 | # CONFIG_AUDIT is not set | 42 | # CONFIG_AUDIT is not set |
| 31 | CONFIG_HOTPLUG=y | 43 | |
| 32 | CONFIG_KOBJECT_UEVENT=y | 44 | # |
| 45 | # RCU Subsystem | ||
| 46 | # | ||
| 47 | CONFIG_TREE_RCU=y | ||
| 48 | # CONFIG_TREE_PREEMPT_RCU is not set | ||
| 49 | # CONFIG_RCU_TRACE is not set | ||
| 50 | CONFIG_RCU_FANOUT=32 | ||
| 51 | # CONFIG_RCU_FANOUT_EXACT is not set | ||
| 52 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 33 | # CONFIG_IKCONFIG is not set | 53 | # CONFIG_IKCONFIG is not set |
| 54 | CONFIG_LOG_BUF_SHIFT=14 | ||
| 55 | # CONFIG_GROUP_SCHED is not set | ||
| 56 | # CONFIG_CGROUPS is not set | ||
| 57 | # CONFIG_SYSFS_DEPRECATED_V2 is not set | ||
| 58 | # CONFIG_RELAY is not set | ||
| 59 | CONFIG_NAMESPACES=y | ||
| 60 | # CONFIG_UTS_NS is not set | ||
| 61 | # CONFIG_IPC_NS is not set | ||
| 62 | # CONFIG_USER_NS is not set | ||
| 63 | # CONFIG_PID_NS is not set | ||
| 64 | # CONFIG_NET_NS is not set | ||
| 65 | CONFIG_BLK_DEV_INITRD=y | ||
| 66 | CONFIG_INITRAMFS_SOURCE="" | ||
| 67 | CONFIG_RD_GZIP=y | ||
| 68 | CONFIG_RD_BZIP2=y | ||
| 69 | CONFIG_RD_LZMA=y | ||
| 70 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 71 | CONFIG_SYSCTL=y | ||
| 72 | CONFIG_ANON_INODES=y | ||
| 34 | # CONFIG_EMBEDDED is not set | 73 | # CONFIG_EMBEDDED is not set |
| 74 | CONFIG_UID16=y | ||
| 75 | CONFIG_SYSCTL_SYSCALL=y | ||
| 35 | CONFIG_KALLSYMS=y | 76 | CONFIG_KALLSYMS=y |
| 36 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 77 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
| 78 | CONFIG_HOTPLUG=y | ||
| 37 | CONFIG_PRINTK=y | 79 | CONFIG_PRINTK=y |
| 38 | CONFIG_BUG=y | 80 | CONFIG_BUG=y |
| 81 | CONFIG_ELF_CORE=y | ||
| 39 | CONFIG_BASE_FULL=y | 82 | CONFIG_BASE_FULL=y |
| 40 | CONFIG_FUTEX=y | 83 | CONFIG_FUTEX=y |
| 41 | CONFIG_EPOLL=y | 84 | CONFIG_EPOLL=y |
| 42 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | 85 | CONFIG_SIGNALFD=y |
| 86 | CONFIG_TIMERFD=y | ||
| 87 | CONFIG_EVENTFD=y | ||
| 43 | CONFIG_SHMEM=y | 88 | CONFIG_SHMEM=y |
| 44 | CONFIG_CC_ALIGN_FUNCTIONS=0 | 89 | CONFIG_AIO=y |
| 45 | CONFIG_CC_ALIGN_LABELS=0 | 90 | |
| 46 | CONFIG_CC_ALIGN_LOOPS=0 | 91 | # |
| 47 | CONFIG_CC_ALIGN_JUMPS=0 | 92 | # Kernel Performance Events And Counters |
| 48 | # CONFIG_TINY_SHMEM is not set | 93 | # |
| 49 | CONFIG_BASE_SMALL=0 | 94 | CONFIG_VM_EVENT_COUNTERS=y |
| 95 | CONFIG_SLUB_DEBUG=y | ||
| 96 | CONFIG_COMPAT_BRK=y | ||
| 97 | # CONFIG_SLAB is not set | ||
| 98 | CONFIG_SLUB=y | ||
| 99 | # CONFIG_SLOB is not set | ||
| 100 | # CONFIG_PROFILING is not set | ||
| 101 | CONFIG_HAVE_OPROFILE=y | ||
| 102 | # CONFIG_KPROBES is not set | ||
| 103 | CONFIG_HAVE_KPROBES=y | ||
| 104 | CONFIG_HAVE_KRETPROBES=y | ||
| 105 | CONFIG_HAVE_CLK=y | ||
| 50 | 106 | ||
| 51 | # | 107 | # |
| 52 | # Loadable module support | 108 | # GCOV-based kernel profiling |
| 53 | # | 109 | # |
| 110 | # CONFIG_SLOW_WORK is not set | ||
| 111 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 112 | CONFIG_SLABINFO=y | ||
| 113 | CONFIG_RT_MUTEXES=y | ||
| 114 | CONFIG_BASE_SMALL=0 | ||
| 54 | CONFIG_MODULES=y | 115 | CONFIG_MODULES=y |
| 116 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 55 | # CONFIG_MODULE_UNLOAD is not set | 117 | # CONFIG_MODULE_UNLOAD is not set |
| 56 | CONFIG_OBSOLETE_MODPARM=y | ||
| 57 | # CONFIG_MODVERSIONS is not set | 118 | # CONFIG_MODVERSIONS is not set |
| 58 | # CONFIG_MODULE_SRCVERSION_ALL is not set | 119 | # CONFIG_MODULE_SRCVERSION_ALL is not set |
| 59 | # CONFIG_KMOD is not set | 120 | CONFIG_BLOCK=y |
| 121 | # CONFIG_LBDAF is not set | ||
| 122 | # CONFIG_BLK_DEV_BSG is not set | ||
| 123 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 124 | |||
| 125 | # | ||
| 126 | # IO Schedulers | ||
| 127 | # | ||
| 128 | CONFIG_IOSCHED_NOOP=y | ||
| 129 | # CONFIG_IOSCHED_AS is not set | ||
| 130 | # CONFIG_IOSCHED_DEADLINE is not set | ||
| 131 | # CONFIG_IOSCHED_CFQ is not set | ||
| 132 | # CONFIG_DEFAULT_AS is not set | ||
| 133 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 134 | # CONFIG_DEFAULT_CFQ is not set | ||
| 135 | CONFIG_DEFAULT_NOOP=y | ||
| 136 | CONFIG_DEFAULT_IOSCHED="noop" | ||
| 137 | CONFIG_FREEZER=y | ||
| 60 | 138 | ||
| 61 | # | 139 | # |
| 62 | # System Type | 140 | # System Type |
| 63 | # | 141 | # |
| 64 | # CONFIG_ARCH_CLPS7500 is not set | 142 | CONFIG_MMU=y |
| 143 | # CONFIG_ARCH_AAEC2000 is not set | ||
| 144 | # CONFIG_ARCH_INTEGRATOR is not set | ||
| 145 | # CONFIG_ARCH_REALVIEW is not set | ||
| 146 | # CONFIG_ARCH_VERSATILE is not set | ||
| 147 | # CONFIG_ARCH_AT91 is not set | ||
| 65 | # CONFIG_ARCH_CLPS711X is not set | 148 | # CONFIG_ARCH_CLPS711X is not set |
| 66 | # CONFIG_ARCH_CO285 is not set | 149 | # CONFIG_ARCH_GEMINI is not set |
| 67 | # CONFIG_ARCH_EBSA110 is not set | 150 | # CONFIG_ARCH_EBSA110 is not set |
| 151 | # CONFIG_ARCH_EP93XX is not set | ||
| 68 | # CONFIG_ARCH_FOOTBRIDGE is not set | 152 | # CONFIG_ARCH_FOOTBRIDGE is not set |
| 69 | # CONFIG_ARCH_INTEGRATOR is not set | 153 | # CONFIG_ARCH_MXC is not set |
| 70 | # CONFIG_ARCH_IOP3XX is not set | 154 | # CONFIG_ARCH_STMP3XXX is not set |
| 71 | # CONFIG_ARCH_IXP4XX is not set | 155 | # CONFIG_ARCH_NETX is not set |
| 156 | # CONFIG_ARCH_H720X is not set | ||
| 157 | # CONFIG_ARCH_NOMADIK is not set | ||
| 158 | # CONFIG_ARCH_IOP13XX is not set | ||
| 159 | # CONFIG_ARCH_IOP32X is not set | ||
| 160 | # CONFIG_ARCH_IOP33X is not set | ||
| 161 | # CONFIG_ARCH_IXP23XX is not set | ||
| 72 | # CONFIG_ARCH_IXP2000 is not set | 162 | # CONFIG_ARCH_IXP2000 is not set |
| 163 | # CONFIG_ARCH_IXP4XX is not set | ||
| 73 | # CONFIG_ARCH_L7200 is not set | 164 | # CONFIG_ARCH_L7200 is not set |
| 165 | # CONFIG_ARCH_KIRKWOOD is not set | ||
| 166 | # CONFIG_ARCH_LOKI is not set | ||
| 167 | # CONFIG_ARCH_MV78XX0 is not set | ||
| 168 | # CONFIG_ARCH_ORION5X is not set | ||
| 169 | # CONFIG_ARCH_MMP is not set | ||
| 170 | # CONFIG_ARCH_KS8695 is not set | ||
| 171 | # CONFIG_ARCH_NS9XXX is not set | ||
| 172 | # CONFIG_ARCH_W90X900 is not set | ||
| 173 | # CONFIG_ARCH_PNX4008 is not set | ||
| 74 | # CONFIG_ARCH_PXA is not set | 174 | # CONFIG_ARCH_PXA is not set |
| 175 | # CONFIG_ARCH_MSM is not set | ||
| 75 | # CONFIG_ARCH_RPC is not set | 176 | # CONFIG_ARCH_RPC is not set |
| 76 | CONFIG_ARCH_SA1100=y | 177 | CONFIG_ARCH_SA1100=y |
| 77 | # CONFIG_ARCH_S3C2410 is not set | 178 | # CONFIG_ARCH_S3C2410 is not set |
| 179 | # CONFIG_ARCH_S3C64XX is not set | ||
| 180 | # CONFIG_ARCH_S5PC1XX is not set | ||
| 78 | # CONFIG_ARCH_SHARK is not set | 181 | # CONFIG_ARCH_SHARK is not set |
| 79 | # CONFIG_ARCH_LH7A40X is not set | 182 | # CONFIG_ARCH_LH7A40X is not set |
| 183 | # CONFIG_ARCH_U300 is not set | ||
| 184 | # CONFIG_ARCH_DAVINCI is not set | ||
| 80 | # CONFIG_ARCH_OMAP is not set | 185 | # CONFIG_ARCH_OMAP is not set |
| 81 | # CONFIG_ARCH_VERSATILE is not set | 186 | # CONFIG_ARCH_BCMRING is not set |
| 82 | # CONFIG_ARCH_IMX is not set | ||
| 83 | # CONFIG_ARCH_H720X is not set | ||
| 84 | 187 | ||
| 85 | # | 188 | # |
| 86 | # SA11x0 Implementations | 189 | # SA11x0 Implementations |
| @@ -106,27 +209,31 @@ CONFIG_CPU_32=y | |||
| 106 | CONFIG_CPU_SA1100=y | 209 | CONFIG_CPU_SA1100=y |
| 107 | CONFIG_CPU_32v4=y | 210 | CONFIG_CPU_32v4=y |
| 108 | CONFIG_CPU_ABRT_EV4=y | 211 | CONFIG_CPU_ABRT_EV4=y |
| 212 | CONFIG_CPU_PABRT_LEGACY=y | ||
| 109 | CONFIG_CPU_CACHE_V4WB=y | 213 | CONFIG_CPU_CACHE_V4WB=y |
| 110 | CONFIG_CPU_CACHE_VIVT=y | 214 | CONFIG_CPU_CACHE_VIVT=y |
| 111 | CONFIG_CPU_TLB_V4WB=y | 215 | CONFIG_CPU_TLB_V4WB=y |
| 112 | CONFIG_CPU_MINICACHE=y | 216 | CONFIG_CPU_CP15=y |
| 217 | CONFIG_CPU_CP15_MMU=y | ||
| 113 | 218 | ||
| 114 | # | 219 | # |
| 115 | # Processor Features | 220 | # Processor Features |
| 116 | # | 221 | # |
| 222 | # CONFIG_CPU_ICACHE_DISABLE is not set | ||
| 223 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
| 224 | CONFIG_ARM_L1_CACHE_SHIFT=5 | ||
| 117 | 225 | ||
| 118 | # | 226 | # |
| 119 | # Bus support | 227 | # Bus support |
| 120 | # | 228 | # |
| 121 | CONFIG_ISA=y | 229 | CONFIG_ISA=y |
| 122 | CONFIG_ISA_DMA_API=y | 230 | # CONFIG_PCI_SYSCALL is not set |
| 123 | 231 | # CONFIG_ARCH_SUPPORTS_MSI is not set | |
| 124 | # | ||
| 125 | # PCCARD (PCMCIA/CardBus) support | ||
| 126 | # | ||
| 127 | CONFIG_PCCARD=y | 232 | CONFIG_PCCARD=y |
| 128 | # CONFIG_PCMCIA_DEBUG is not set | 233 | # CONFIG_PCMCIA_DEBUG is not set |
| 129 | CONFIG_PCMCIA=y | 234 | CONFIG_PCMCIA=y |
| 235 | CONFIG_PCMCIA_LOAD_CIS=y | ||
| 236 | CONFIG_PCMCIA_IOCTL=y | ||
| 130 | 237 | ||
| 131 | # | 238 | # |
| 132 | # PC-card bridges | 239 | # PC-card bridges |
| @@ -138,11 +245,41 @@ CONFIG_PCMCIA_SA1100=y | |||
| 138 | # | 245 | # |
| 139 | # Kernel Features | 246 | # Kernel Features |
| 140 | # | 247 | # |
| 141 | # CONFIG_SMP is not set | 248 | CONFIG_TICK_ONESHOT=y |
| 249 | # CONFIG_NO_HZ is not set | ||
| 250 | # CONFIG_HIGH_RES_TIMERS is not set | ||
| 251 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 252 | CONFIG_VMSPLIT_3G=y | ||
| 253 | # CONFIG_VMSPLIT_2G is not set | ||
| 254 | # CONFIG_VMSPLIT_1G is not set | ||
| 255 | CONFIG_PAGE_OFFSET=0xC0000000 | ||
| 256 | CONFIG_PREEMPT_NONE=y | ||
| 257 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
| 142 | # CONFIG_PREEMPT is not set | 258 | # CONFIG_PREEMPT is not set |
| 143 | CONFIG_DISCONTIGMEM=y | 259 | CONFIG_HZ=100 |
| 260 | # CONFIG_AEABI is not set | ||
| 261 | CONFIG_ARCH_SPARSEMEM_ENABLE=y | ||
| 262 | CONFIG_ARCH_SPARSEMEM_DEFAULT=y | ||
| 263 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | ||
| 264 | # CONFIG_HIGHMEM is not set | ||
| 265 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 266 | # CONFIG_FLATMEM_MANUAL is not set | ||
| 267 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 268 | CONFIG_SPARSEMEM_MANUAL=y | ||
| 269 | CONFIG_SPARSEMEM=y | ||
| 270 | CONFIG_HAVE_MEMORY_PRESENT=y | ||
| 271 | CONFIG_SPARSEMEM_EXTREME=y | ||
| 272 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | ||
| 273 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
| 274 | CONFIG_ZONE_DMA_FLAG=0 | ||
| 275 | CONFIG_VIRT_TO_BUS=y | ||
| 276 | CONFIG_HAVE_MLOCK=y | ||
| 277 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
| 278 | # CONFIG_KSM is not set | ||
| 279 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
| 144 | # CONFIG_LEDS is not set | 280 | # CONFIG_LEDS is not set |
| 145 | CONFIG_ALIGNMENT_TRAP=y | 281 | CONFIG_ALIGNMENT_TRAP=y |
| 282 | # CONFIG_UACCESS_WITH_MEMCPY is not set | ||
| 146 | 283 | ||
| 147 | # | 284 | # |
| 148 | # Boot options | 285 | # Boot options |
| @@ -151,22 +288,26 @@ CONFIG_ZBOOT_ROM_TEXT=0x0 | |||
| 151 | CONFIG_ZBOOT_ROM_BSS=0x0 | 288 | CONFIG_ZBOOT_ROM_BSS=0x0 |
| 152 | CONFIG_CMDLINE="" | 289 | CONFIG_CMDLINE="" |
| 153 | # CONFIG_XIP_KERNEL is not set | 290 | # CONFIG_XIP_KERNEL is not set |
| 291 | # CONFIG_KEXEC is not set | ||
| 154 | 292 | ||
| 155 | # | 293 | # |
| 156 | # CPU Frequency scaling | 294 | # CPU Power Management |
| 157 | # | 295 | # |
| 158 | CONFIG_CPU_FREQ=y | 296 | CONFIG_CPU_FREQ=y |
| 159 | CONFIG_CPU_FREQ_TABLE=y | ||
| 160 | # CONFIG_CPU_FREQ_DEBUG is not set | 297 | # CONFIG_CPU_FREQ_DEBUG is not set |
| 161 | CONFIG_CPU_FREQ_STAT=y | 298 | # CONFIG_CPU_FREQ_STAT is not set |
| 162 | # CONFIG_CPU_FREQ_STAT_DETAILS is not set | ||
| 163 | # CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set | 299 | # CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set |
| 300 | # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set | ||
| 164 | CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y | 301 | CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y |
| 302 | # CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set | ||
| 303 | # CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set | ||
| 165 | # CONFIG_CPU_FREQ_GOV_PERFORMANCE is not set | 304 | # CONFIG_CPU_FREQ_GOV_PERFORMANCE is not set |
| 166 | # CONFIG_CPU_FREQ_GOV_POWERSAVE is not set | 305 | # CONFIG_CPU_FREQ_GOV_POWERSAVE is not set |
| 167 | CONFIG_CPU_FREQ_GOV_USERSPACE=y | 306 | CONFIG_CPU_FREQ_GOV_USERSPACE=y |
| 168 | # CONFIG_CPU_FREQ_GOV_ONDEMAND is not set | 307 | # CONFIG_CPU_FREQ_GOV_ONDEMAND is not set |
| 308 | # CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set | ||
| 169 | CONFIG_CPU_FREQ_SA1100=y | 309 | CONFIG_CPU_FREQ_SA1100=y |
| 310 | # CONFIG_CPU_IDLE is not set | ||
| 170 | 311 | ||
| 171 | # | 312 | # |
| 172 | # Floating point emulation | 313 | # Floating point emulation |
| @@ -183,6 +324,8 @@ CONFIG_FPE_NWFPE=y | |||
| 183 | # Userspace binary formats | 324 | # Userspace binary formats |
| 184 | # | 325 | # |
| 185 | CONFIG_BINFMT_ELF=y | 326 | CONFIG_BINFMT_ELF=y |
| 327 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 328 | CONFIG_HAVE_AOUT=y | ||
| 186 | # CONFIG_BINFMT_AOUT is not set | 329 | # CONFIG_BINFMT_AOUT is not set |
| 187 | # CONFIG_BINFMT_MISC is not set | 330 | # CONFIG_BINFMT_MISC is not set |
| 188 | # CONFIG_ARTHUR is not set | 331 | # CONFIG_ARTHUR is not set |
| @@ -191,8 +334,120 @@ CONFIG_BINFMT_ELF=y | |||
| 191 | # Power management options | 334 | # Power management options |
| 192 | # | 335 | # |
| 193 | CONFIG_PM=y | 336 | CONFIG_PM=y |
| 194 | # CONFIG_PM_LEGACY is not set | 337 | # CONFIG_PM_DEBUG is not set |
| 195 | # CONFIG_APM is not set | 338 | CONFIG_PM_SLEEP=y |
| 339 | CONFIG_SUSPEND=y | ||
| 340 | CONFIG_SUSPEND_FREEZER=y | ||
| 341 | # CONFIG_APM_EMULATION is not set | ||
| 342 | # CONFIG_PM_RUNTIME is not set | ||
| 343 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
| 344 | CONFIG_NET=y | ||
| 345 | |||
| 346 | # | ||
| 347 | # Networking options | ||
| 348 | # | ||
| 349 | # CONFIG_PACKET is not set | ||
| 350 | CONFIG_UNIX=y | ||
| 351 | CONFIG_XFRM=y | ||
| 352 | # CONFIG_XFRM_USER is not set | ||
| 353 | # CONFIG_XFRM_SUB_POLICY is not set | ||
| 354 | # CONFIG_XFRM_MIGRATE is not set | ||
| 355 | # CONFIG_XFRM_STATISTICS is not set | ||
| 356 | # CONFIG_NET_KEY is not set | ||
| 357 | CONFIG_INET=y | ||
| 358 | # CONFIG_IP_MULTICAST is not set | ||
| 359 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 360 | CONFIG_IP_FIB_HASH=y | ||
| 361 | # CONFIG_IP_PNP is not set | ||
| 362 | # CONFIG_NET_IPIP is not set | ||
| 363 | # CONFIG_NET_IPGRE is not set | ||
| 364 | # CONFIG_ARPD is not set | ||
| 365 | # CONFIG_SYN_COOKIES is not set | ||
| 366 | # CONFIG_INET_AH is not set | ||
| 367 | # CONFIG_INET_ESP is not set | ||
| 368 | # CONFIG_INET_IPCOMP is not set | ||
| 369 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
| 370 | # CONFIG_INET_TUNNEL is not set | ||
| 371 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
| 372 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
| 373 | CONFIG_INET_XFRM_MODE_BEET=y | ||
| 374 | CONFIG_INET_LRO=y | ||
| 375 | CONFIG_INET_DIAG=y | ||
| 376 | CONFIG_INET_TCP_DIAG=y | ||
| 377 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
| 378 | CONFIG_TCP_CONG_CUBIC=y | ||
| 379 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 380 | # CONFIG_TCP_MD5SIG is not set | ||
| 381 | # CONFIG_IPV6 is not set | ||
| 382 | # CONFIG_NETWORK_SECMARK is not set | ||
| 383 | # CONFIG_NETFILTER is not set | ||
| 384 | # CONFIG_IP_DCCP is not set | ||
| 385 | # CONFIG_IP_SCTP is not set | ||
| 386 | # CONFIG_RDS is not set | ||
| 387 | # CONFIG_TIPC is not set | ||
| 388 | # CONFIG_ATM is not set | ||
| 389 | # CONFIG_BRIDGE is not set | ||
| 390 | # CONFIG_NET_DSA is not set | ||
| 391 | # CONFIG_VLAN_8021Q is not set | ||
| 392 | # CONFIG_DECNET is not set | ||
| 393 | # CONFIG_LLC2 is not set | ||
| 394 | # CONFIG_IPX is not set | ||
| 395 | # CONFIG_ATALK is not set | ||
| 396 | # CONFIG_X25 is not set | ||
| 397 | # CONFIG_LAPB is not set | ||
| 398 | # CONFIG_ECONET is not set | ||
| 399 | # CONFIG_WAN_ROUTER is not set | ||
| 400 | # CONFIG_PHONET is not set | ||
| 401 | # CONFIG_IEEE802154 is not set | ||
| 402 | # CONFIG_NET_SCHED is not set | ||
| 403 | # CONFIG_DCB is not set | ||
| 404 | |||
| 405 | # | ||
| 406 | # Network testing | ||
| 407 | # | ||
| 408 | # CONFIG_NET_PKTGEN is not set | ||
| 409 | # CONFIG_HAMRADIO is not set | ||
| 410 | # CONFIG_CAN is not set | ||
| 411 | CONFIG_IRDA=m | ||
| 412 | |||
| 413 | # | ||
| 414 | # IrDA protocols | ||
| 415 | # | ||
| 416 | CONFIG_IRLAN=m | ||
| 417 | CONFIG_IRNET=m | ||
| 418 | CONFIG_IRCOMM=m | ||
| 419 | # CONFIG_IRDA_ULTRA is not set | ||
| 420 | |||
| 421 | # | ||
| 422 | # IrDA options | ||
| 423 | # | ||
| 424 | # CONFIG_IRDA_CACHE_LAST_LSAP is not set | ||
| 425 | # CONFIG_IRDA_FAST_RR is not set | ||
| 426 | # CONFIG_IRDA_DEBUG is not set | ||
| 427 | |||
| 428 | # | ||
| 429 | # Infrared-port device drivers | ||
| 430 | # | ||
| 431 | |||
| 432 | # | ||
| 433 | # SIR device drivers | ||
| 434 | # | ||
| 435 | # CONFIG_IRTTY_SIR is not set | ||
| 436 | |||
| 437 | # | ||
| 438 | # Dongle support | ||
| 439 | # | ||
| 440 | |||
| 441 | # | ||
| 442 | # FIR device drivers | ||
| 443 | # | ||
| 444 | CONFIG_SA1100_FIR=m | ||
| 445 | # CONFIG_BT is not set | ||
| 446 | # CONFIG_AF_RXRPC is not set | ||
| 447 | # CONFIG_WIRELESS is not set | ||
| 448 | # CONFIG_WIMAX is not set | ||
| 449 | # CONFIG_RFKILL is not set | ||
| 450 | # CONFIG_NET_9P is not set | ||
| 196 | 451 | ||
| 197 | # | 452 | # |
| 198 | # Device Drivers | 453 | # Device Drivers |
| @@ -201,15 +456,17 @@ CONFIG_PM=y | |||
| 201 | # | 456 | # |
| 202 | # Generic Driver Options | 457 | # Generic Driver Options |
| 203 | # | 458 | # |
| 459 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
| 204 | CONFIG_STANDALONE=y | 460 | CONFIG_STANDALONE=y |
| 205 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 461 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
| 206 | # CONFIG_FW_LOADER is not set | 462 | CONFIG_FW_LOADER=y |
| 207 | 463 | CONFIG_FIRMWARE_IN_KERNEL=y | |
| 208 | # | 464 | CONFIG_EXTRA_FIRMWARE="" |
| 209 | # Memory Technology Devices (MTD) | 465 | # CONFIG_SYS_HYPERVISOR is not set |
| 210 | # | 466 | # CONFIG_CONNECTOR is not set |
| 211 | CONFIG_MTD=y | 467 | CONFIG_MTD=y |
| 212 | # CONFIG_MTD_DEBUG is not set | 468 | # CONFIG_MTD_DEBUG is not set |
| 469 | # CONFIG_MTD_TESTS is not set | ||
| 213 | # CONFIG_MTD_CONCAT is not set | 470 | # CONFIG_MTD_CONCAT is not set |
| 214 | CONFIG_MTD_PARTITIONS=y | 471 | CONFIG_MTD_PARTITIONS=y |
| 215 | CONFIG_MTD_REDBOOT_PARTS=y | 472 | CONFIG_MTD_REDBOOT_PARTS=y |
| @@ -218,15 +475,20 @@ CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 | |||
| 218 | # CONFIG_MTD_REDBOOT_PARTS_READONLY is not set | 475 | # CONFIG_MTD_REDBOOT_PARTS_READONLY is not set |
| 219 | # CONFIG_MTD_CMDLINE_PARTS is not set | 476 | # CONFIG_MTD_CMDLINE_PARTS is not set |
| 220 | # CONFIG_MTD_AFS_PARTS is not set | 477 | # CONFIG_MTD_AFS_PARTS is not set |
| 478 | # CONFIG_MTD_AR7_PARTS is not set | ||
| 221 | 479 | ||
| 222 | # | 480 | # |
| 223 | # User Modules And Translation Layers | 481 | # User Modules And Translation Layers |
| 224 | # | 482 | # |
| 225 | CONFIG_MTD_CHAR=y | 483 | CONFIG_MTD_CHAR=y |
| 484 | CONFIG_MTD_BLKDEVS=y | ||
| 226 | CONFIG_MTD_BLOCK=y | 485 | CONFIG_MTD_BLOCK=y |
| 227 | # CONFIG_FTL is not set | 486 | # CONFIG_FTL is not set |
| 228 | # CONFIG_NFTL is not set | 487 | # CONFIG_NFTL is not set |
| 229 | # CONFIG_INFTL is not set | 488 | # CONFIG_INFTL is not set |
| 489 | # CONFIG_RFD_FTL is not set | ||
| 490 | # CONFIG_SSFDC is not set | ||
| 491 | # CONFIG_MTD_OOPS is not set | ||
| 230 | 492 | ||
| 231 | # | 493 | # |
| 232 | # RAM/ROM/Flash chip drivers | 494 | # RAM/ROM/Flash chip drivers |
| @@ -249,6 +511,7 @@ CONFIG_MTD_MAP_BANK_WIDTH_4=y | |||
| 249 | CONFIG_MTD_CFI_I2=y | 511 | CONFIG_MTD_CFI_I2=y |
| 250 | # CONFIG_MTD_CFI_I4 is not set | 512 | # CONFIG_MTD_CFI_I4 is not set |
| 251 | # CONFIG_MTD_CFI_I8 is not set | 513 | # CONFIG_MTD_CFI_I8 is not set |
| 514 | # CONFIG_MTD_OTP is not set | ||
| 252 | CONFIG_MTD_CFI_INTELEXT=y | 515 | CONFIG_MTD_CFI_INTELEXT=y |
| 253 | # CONFIG_MTD_CFI_AMDSTD is not set | 516 | # CONFIG_MTD_CFI_AMDSTD is not set |
| 254 | # CONFIG_MTD_CFI_STAA is not set | 517 | # CONFIG_MTD_CFI_STAA is not set |
| @@ -265,7 +528,7 @@ CONFIG_MTD_CFI_UTIL=y | |||
| 265 | # CONFIG_MTD_PHYSMAP is not set | 528 | # CONFIG_MTD_PHYSMAP is not set |
| 266 | # CONFIG_MTD_ARM_INTEGRATOR is not set | 529 | # CONFIG_MTD_ARM_INTEGRATOR is not set |
| 267 | CONFIG_MTD_SA1100=y | 530 | CONFIG_MTD_SA1100=y |
| 268 | # CONFIG_MTD_EDB7312 is not set | 531 | # CONFIG_MTD_PLATRAM is not set |
| 269 | 532 | ||
| 270 | # | 533 | # |
| 271 | # Self-contained MTD device drivers | 534 | # Self-contained MTD device drivers |
| @@ -273,7 +536,6 @@ CONFIG_MTD_SA1100=y | |||
| 273 | # CONFIG_MTD_SLRAM is not set | 536 | # CONFIG_MTD_SLRAM is not set |
| 274 | # CONFIG_MTD_PHRAM is not set | 537 | # CONFIG_MTD_PHRAM is not set |
| 275 | # CONFIG_MTD_MTDRAM is not set | 538 | # CONFIG_MTD_MTDRAM is not set |
| 276 | # CONFIG_MTD_BLKMTD is not set | ||
| 277 | # CONFIG_MTD_BLOCK2MTD is not set | 539 | # CONFIG_MTD_BLOCK2MTD is not set |
| 278 | 540 | ||
| 279 | # | 541 | # |
| @@ -282,26 +544,21 @@ CONFIG_MTD_SA1100=y | |||
| 282 | # CONFIG_MTD_DOC2000 is not set | 544 | # CONFIG_MTD_DOC2000 is not set |
| 283 | # CONFIG_MTD_DOC2001 is not set | 545 | # CONFIG_MTD_DOC2001 is not set |
| 284 | # CONFIG_MTD_DOC2001PLUS is not set | 546 | # CONFIG_MTD_DOC2001PLUS is not set |
| 285 | |||
| 286 | # | ||
| 287 | # NAND Flash Device Drivers | ||
| 288 | # | ||
| 289 | # CONFIG_MTD_NAND is not set | 547 | # CONFIG_MTD_NAND is not set |
| 548 | # CONFIG_MTD_ONENAND is not set | ||
| 290 | 549 | ||
| 291 | # | 550 | # |
| 292 | # Parallel port support | 551 | # LPDDR flash memory drivers |
| 293 | # | 552 | # |
| 294 | # CONFIG_PARPORT is not set | 553 | # CONFIG_MTD_LPDDR is not set |
| 295 | 554 | ||
| 296 | # | 555 | # |
| 297 | # Plug and Play support | 556 | # UBI - Unsorted block images |
| 298 | # | 557 | # |
| 558 | # CONFIG_MTD_UBI is not set | ||
| 559 | # CONFIG_PARPORT is not set | ||
| 299 | # CONFIG_PNP is not set | 560 | # CONFIG_PNP is not set |
| 300 | 561 | CONFIG_BLK_DEV=y | |
| 301 | # | ||
| 302 | # Block devices | ||
| 303 | # | ||
| 304 | # CONFIG_BLK_DEV_XD is not set | ||
| 305 | # CONFIG_BLK_DEV_COW_COMMON is not set | 562 | # CONFIG_BLK_DEV_COW_COMMON is not set |
| 306 | CONFIG_BLK_DEV_LOOP=m | 563 | CONFIG_BLK_DEV_LOOP=m |
| 307 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | 564 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set |
| @@ -309,212 +566,58 @@ CONFIG_BLK_DEV_LOOP=m | |||
| 309 | CONFIG_BLK_DEV_RAM=y | 566 | CONFIG_BLK_DEV_RAM=y |
| 310 | CONFIG_BLK_DEV_RAM_COUNT=16 | 567 | CONFIG_BLK_DEV_RAM_COUNT=16 |
| 311 | CONFIG_BLK_DEV_RAM_SIZE=8192 | 568 | CONFIG_BLK_DEV_RAM_SIZE=8192 |
| 312 | CONFIG_BLK_DEV_INITRD=y | 569 | # CONFIG_BLK_DEV_XIP is not set |
| 313 | CONFIG_INITRAMFS_SOURCE="" | ||
| 314 | # CONFIG_CDROM_PKTCDVD is not set | 570 | # CONFIG_CDROM_PKTCDVD is not set |
| 315 | |||
| 316 | # | ||
| 317 | # IO Schedulers | ||
| 318 | # | ||
| 319 | CONFIG_IOSCHED_NOOP=y | ||
| 320 | CONFIG_IOSCHED_AS=y | ||
| 321 | CONFIG_IOSCHED_DEADLINE=y | ||
| 322 | CONFIG_IOSCHED_CFQ=y | ||
| 323 | # CONFIG_ATA_OVER_ETH is not set | 571 | # CONFIG_ATA_OVER_ETH is not set |
| 572 | # CONFIG_MG_DISK is not set | ||
| 573 | # CONFIG_MISC_DEVICES is not set | ||
| 574 | CONFIG_HAVE_IDE=y | ||
| 575 | CONFIG_IDE=y | ||
| 324 | 576 | ||
| 325 | # | 577 | # |
| 326 | # ATA/ATAPI/MFM/RLL support | 578 | # Please see Documentation/ide/ide.txt for help/info on IDE drives |
| 327 | # | ||
| 328 | CONFIG_IDE=m | ||
| 329 | CONFIG_BLK_DEV_IDE=m | ||
| 330 | |||
| 331 | # | ||
| 332 | # Please see Documentation/ide.txt for help/info on IDE drives | ||
| 333 | # | 579 | # |
| 334 | # CONFIG_BLK_DEV_IDE_SATA is not set | 580 | # CONFIG_BLK_DEV_IDE_SATA is not set |
| 335 | CONFIG_BLK_DEV_IDEDISK=m | 581 | CONFIG_IDE_GD=y |
| 336 | # CONFIG_IDEDISK_MULTI_MODE is not set | 582 | CONFIG_IDE_GD_ATA=y |
| 337 | # CONFIG_BLK_DEV_IDECS is not set | 583 | # CONFIG_IDE_GD_ATAPI is not set |
| 338 | CONFIG_BLK_DEV_IDECD=m | 584 | CONFIG_BLK_DEV_IDECS=y |
| 585 | # CONFIG_BLK_DEV_IDECD is not set | ||
| 339 | # CONFIG_BLK_DEV_IDETAPE is not set | 586 | # CONFIG_BLK_DEV_IDETAPE is not set |
| 340 | # CONFIG_BLK_DEV_IDEFLOPPY is not set | ||
| 341 | # CONFIG_IDE_TASK_IOCTL is not set | 587 | # CONFIG_IDE_TASK_IOCTL is not set |
| 588 | CONFIG_IDE_PROC_FS=y | ||
| 342 | 589 | ||
| 343 | # | 590 | # |
| 344 | # IDE chipset support/bugfixes | 591 | # IDE chipset support/bugfixes |
| 345 | # | 592 | # |
| 346 | CONFIG_IDE_GENERIC=m | 593 | # CONFIG_BLK_DEV_PLATFORM is not set |
| 347 | # CONFIG_IDE_ARM is not set | ||
| 348 | # CONFIG_IDE_CHIPSETS is not set | ||
| 349 | # CONFIG_BLK_DEV_IDEDMA is not set | 594 | # CONFIG_BLK_DEV_IDEDMA is not set |
| 350 | # CONFIG_IDEDMA_AUTO is not set | ||
| 351 | # CONFIG_BLK_DEV_HD is not set | ||
| 352 | 595 | ||
| 353 | # | 596 | # |
| 354 | # SCSI device support | 597 | # SCSI device support |
| 355 | # | 598 | # |
| 599 | # CONFIG_RAID_ATTRS is not set | ||
| 356 | # CONFIG_SCSI is not set | 600 | # CONFIG_SCSI is not set |
| 357 | 601 | # CONFIG_SCSI_DMA is not set | |
| 358 | # | 602 | # CONFIG_SCSI_NETLINK is not set |
| 359 | # Multi-device support (RAID and LVM) | 603 | # CONFIG_ATA is not set |
| 360 | # | ||
| 361 | # CONFIG_MD is not set | 604 | # CONFIG_MD is not set |
| 362 | |||
| 363 | # | ||
| 364 | # Fusion MPT device support | ||
| 365 | # | ||
| 366 | |||
| 367 | # | ||
| 368 | # IEEE 1394 (FireWire) support | ||
| 369 | # | ||
| 370 | |||
| 371 | # | ||
| 372 | # I2O device support | ||
| 373 | # | ||
| 374 | |||
| 375 | # | ||
| 376 | # Networking support | ||
| 377 | # | ||
| 378 | CONFIG_NET=y | ||
| 379 | |||
| 380 | # | ||
| 381 | # Networking options | ||
| 382 | # | ||
| 383 | # CONFIG_PACKET is not set | ||
| 384 | CONFIG_UNIX=y | ||
| 385 | # CONFIG_NET_KEY is not set | ||
| 386 | CONFIG_INET=y | ||
| 387 | # CONFIG_IP_MULTICAST is not set | ||
| 388 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 389 | # CONFIG_IP_PNP is not set | ||
| 390 | # CONFIG_NET_IPIP is not set | ||
| 391 | # CONFIG_NET_IPGRE is not set | ||
| 392 | # CONFIG_ARPD is not set | ||
| 393 | # CONFIG_SYN_COOKIES is not set | ||
| 394 | # CONFIG_INET_AH is not set | ||
| 395 | # CONFIG_INET_ESP is not set | ||
| 396 | # CONFIG_INET_IPCOMP is not set | ||
| 397 | # CONFIG_INET_TUNNEL is not set | ||
| 398 | # CONFIG_IP_TCPDIAG is not set | ||
| 399 | # CONFIG_IP_TCPDIAG_IPV6 is not set | ||
| 400 | # CONFIG_IPV6 is not set | ||
| 401 | # CONFIG_NETFILTER is not set | ||
| 402 | |||
| 403 | # | ||
| 404 | # SCTP Configuration (EXPERIMENTAL) | ||
| 405 | # | ||
| 406 | # CONFIG_IP_SCTP is not set | ||
| 407 | # CONFIG_ATM is not set | ||
| 408 | # CONFIG_BRIDGE is not set | ||
| 409 | # CONFIG_VLAN_8021Q is not set | ||
| 410 | # CONFIG_DECNET is not set | ||
| 411 | # CONFIG_LLC2 is not set | ||
| 412 | # CONFIG_IPX is not set | ||
| 413 | # CONFIG_ATALK is not set | ||
| 414 | # CONFIG_X25 is not set | ||
| 415 | # CONFIG_LAPB is not set | ||
| 416 | # CONFIG_NET_DIVERT is not set | ||
| 417 | # CONFIG_ECONET is not set | ||
| 418 | # CONFIG_WAN_ROUTER is not set | ||
| 419 | |||
| 420 | # | ||
| 421 | # QoS and/or fair queueing | ||
| 422 | # | ||
| 423 | # CONFIG_NET_SCHED is not set | ||
| 424 | # CONFIG_NET_CLS_ROUTE is not set | ||
| 425 | |||
| 426 | # | ||
| 427 | # Network testing | ||
| 428 | # | ||
| 429 | # CONFIG_NET_PKTGEN is not set | ||
| 430 | # CONFIG_NETPOLL is not set | ||
| 431 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
| 432 | # CONFIG_HAMRADIO is not set | ||
| 433 | CONFIG_IRDA=m | ||
| 434 | |||
| 435 | # | ||
| 436 | # IrDA protocols | ||
| 437 | # | ||
| 438 | CONFIG_IRLAN=m | ||
| 439 | CONFIG_IRNET=m | ||
| 440 | CONFIG_IRCOMM=m | ||
| 441 | # CONFIG_IRDA_ULTRA is not set | ||
| 442 | |||
| 443 | # | ||
| 444 | # IrDA options | ||
| 445 | # | ||
| 446 | # CONFIG_IRDA_CACHE_LAST_LSAP is not set | ||
| 447 | # CONFIG_IRDA_FAST_RR is not set | ||
| 448 | # CONFIG_IRDA_DEBUG is not set | ||
| 449 | |||
| 450 | # | ||
| 451 | # Infrared-port device drivers | ||
| 452 | # | ||
| 453 | |||
| 454 | # | ||
| 455 | # SIR device drivers | ||
| 456 | # | ||
| 457 | # CONFIG_IRTTY_SIR is not set | ||
| 458 | |||
| 459 | # | ||
| 460 | # Dongle support | ||
| 461 | # | ||
| 462 | |||
| 463 | # | ||
| 464 | # Old SIR device drivers | ||
| 465 | # | ||
| 466 | # CONFIG_IRPORT_SIR is not set | ||
| 467 | |||
| 468 | # | ||
| 469 | # Old Serial dongle support | ||
| 470 | # | ||
| 471 | |||
| 472 | # | ||
| 473 | # FIR device drivers | ||
| 474 | # | ||
| 475 | # CONFIG_NSC_FIR is not set | ||
| 476 | # CONFIG_WINBOND_FIR is not set | ||
| 477 | # CONFIG_SMC_IRCC_FIR is not set | ||
| 478 | # CONFIG_ALI_FIR is not set | ||
| 479 | CONFIG_SA1100_FIR=m | ||
| 480 | # CONFIG_VIA_FIR is not set | ||
| 481 | # CONFIG_BT is not set | ||
| 482 | CONFIG_NETDEVICES=y | 605 | CONFIG_NETDEVICES=y |
| 483 | # CONFIG_DUMMY is not set | 606 | # CONFIG_DUMMY is not set |
| 484 | # CONFIG_BONDING is not set | 607 | # CONFIG_BONDING is not set |
| 608 | # CONFIG_MACVLAN is not set | ||
| 485 | # CONFIG_EQUALIZER is not set | 609 | # CONFIG_EQUALIZER is not set |
| 486 | # CONFIG_TUN is not set | 610 | # CONFIG_TUN is not set |
| 487 | 611 | # CONFIG_VETH is not set | |
| 488 | # | ||
| 489 | # ARCnet devices | ||
| 490 | # | ||
| 491 | # CONFIG_ARCNET is not set | 612 | # CONFIG_ARCNET is not set |
| 492 | |||
| 493 | # | ||
| 494 | # Ethernet (10 or 100Mbit) | ||
| 495 | # | ||
| 496 | # CONFIG_NET_ETHERNET is not set | 613 | # CONFIG_NET_ETHERNET is not set |
| 497 | 614 | # CONFIG_NETDEV_1000 is not set | |
| 498 | # | 615 | # CONFIG_NETDEV_10000 is not set |
| 499 | # Ethernet (1000 Mbit) | ||
| 500 | # | ||
| 501 | |||
| 502 | # | ||
| 503 | # Ethernet (10000 Mbit) | ||
| 504 | # | ||
| 505 | |||
| 506 | # | ||
| 507 | # Token Ring devices | ||
| 508 | # | ||
| 509 | # CONFIG_TR is not set | 616 | # CONFIG_TR is not set |
| 617 | # CONFIG_WLAN is not set | ||
| 510 | 618 | ||
| 511 | # | 619 | # |
| 512 | # Wireless LAN (non-hamradio) | 620 | # Enable WiMAX (Networking options) to see the WiMAX drivers |
| 513 | # | ||
| 514 | # CONFIG_NET_RADIO is not set | ||
| 515 | |||
| 516 | # | ||
| 517 | # PCMCIA network device support | ||
| 518 | # | 621 | # |
| 519 | CONFIG_NET_PCMCIA=y | 622 | CONFIG_NET_PCMCIA=y |
| 520 | # CONFIG_PCMCIA_3C589 is not set | 623 | # CONFIG_PCMCIA_3C589 is not set |
| @@ -525,10 +628,6 @@ CONFIG_PCMCIA_PCNET=y | |||
| 525 | # CONFIG_PCMCIA_SMC91C92 is not set | 628 | # CONFIG_PCMCIA_SMC91C92 is not set |
| 526 | # CONFIG_PCMCIA_XIRC2PS is not set | 629 | # CONFIG_PCMCIA_XIRC2PS is not set |
| 527 | # CONFIG_PCMCIA_AXNET is not set | 630 | # CONFIG_PCMCIA_AXNET is not set |
| 528 | |||
| 529 | # | ||
| 530 | # Wan interfaces | ||
| 531 | # | ||
| 532 | # CONFIG_WAN is not set | 631 | # CONFIG_WAN is not set |
| 533 | CONFIG_PPP=m | 632 | CONFIG_PPP=m |
| 534 | # CONFIG_PPP_MULTILINK is not set | 633 | # CONFIG_PPP_MULTILINK is not set |
| @@ -537,20 +636,23 @@ CONFIG_PPP_ASYNC=m | |||
| 537 | # CONFIG_PPP_SYNC_TTY is not set | 636 | # CONFIG_PPP_SYNC_TTY is not set |
| 538 | CONFIG_PPP_DEFLATE=m | 637 | CONFIG_PPP_DEFLATE=m |
| 539 | CONFIG_PPP_BSDCOMP=m | 638 | CONFIG_PPP_BSDCOMP=m |
| 639 | # CONFIG_PPP_MPPE is not set | ||
| 540 | # CONFIG_PPPOE is not set | 640 | # CONFIG_PPPOE is not set |
| 641 | # CONFIG_PPPOL2TP is not set | ||
| 541 | # CONFIG_SLIP is not set | 642 | # CONFIG_SLIP is not set |
| 542 | # CONFIG_SHAPER is not set | 643 | CONFIG_SLHC=m |
| 543 | # CONFIG_NETCONSOLE is not set | 644 | # CONFIG_NETCONSOLE is not set |
| 544 | 645 | # CONFIG_NETPOLL is not set | |
| 545 | # | 646 | # CONFIG_NET_POLL_CONTROLLER is not set |
| 546 | # ISDN subsystem | ||
| 547 | # | ||
| 548 | # CONFIG_ISDN is not set | 647 | # CONFIG_ISDN is not set |
| 648 | # CONFIG_PHONE is not set | ||
| 549 | 649 | ||
| 550 | # | 650 | # |
| 551 | # Input device support | 651 | # Input device support |
| 552 | # | 652 | # |
| 553 | CONFIG_INPUT=y | 653 | CONFIG_INPUT=y |
| 654 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 655 | # CONFIG_INPUT_POLLDEV is not set | ||
| 554 | 656 | ||
| 555 | # | 657 | # |
| 556 | # Userland interfaces | 658 | # Userland interfaces |
| @@ -560,7 +662,6 @@ CONFIG_INPUT_MOUSEDEV_PSAUX=y | |||
| 560 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | 662 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 |
| 561 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | 663 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 |
| 562 | # CONFIG_INPUT_JOYDEV is not set | 664 | # CONFIG_INPUT_JOYDEV is not set |
| 563 | # CONFIG_INPUT_TSDEV is not set | ||
| 564 | # CONFIG_INPUT_EVDEV is not set | 665 | # CONFIG_INPUT_EVDEV is not set |
| 565 | # CONFIG_INPUT_EVBUG is not set | 666 | # CONFIG_INPUT_EVBUG is not set |
| 566 | 667 | ||
| @@ -568,47 +669,42 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | |||
| 568 | # Input Device Drivers | 669 | # Input Device Drivers |
| 569 | # | 670 | # |
| 570 | CONFIG_INPUT_KEYBOARD=y | 671 | CONFIG_INPUT_KEYBOARD=y |
| 571 | CONFIG_KEYBOARD_ATKBD=y | 672 | # CONFIG_KEYBOARD_ATKBD is not set |
| 572 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
| 573 | # CONFIG_KEYBOARD_LKKBD is not set | 673 | # CONFIG_KEYBOARD_LKKBD is not set |
| 574 | # CONFIG_KEYBOARD_XTKBD is not set | 674 | CONFIG_KEYBOARD_GPIO=y |
| 675 | # CONFIG_KEYBOARD_MATRIX is not set | ||
| 575 | # CONFIG_KEYBOARD_NEWTON is not set | 676 | # CONFIG_KEYBOARD_NEWTON is not set |
| 576 | CONFIG_INPUT_MOUSE=y | 677 | # CONFIG_KEYBOARD_OPENCORES is not set |
| 577 | CONFIG_MOUSE_PS2=y | 678 | # CONFIG_KEYBOARD_STOWAWAY is not set |
| 578 | # CONFIG_MOUSE_SERIAL is not set | 679 | # CONFIG_KEYBOARD_SUNKBD is not set |
| 579 | # CONFIG_MOUSE_INPORT is not set | 680 | # CONFIG_KEYBOARD_XTKBD is not set |
| 580 | # CONFIG_MOUSE_LOGIBM is not set | 681 | # CONFIG_INPUT_MOUSE is not set |
| 581 | # CONFIG_MOUSE_PC110PAD is not set | ||
| 582 | # CONFIG_MOUSE_VSXXXAA is not set | ||
| 583 | # CONFIG_INPUT_JOYSTICK is not set | 682 | # CONFIG_INPUT_JOYSTICK is not set |
| 683 | # CONFIG_INPUT_TABLET is not set | ||
| 584 | # CONFIG_INPUT_TOUCHSCREEN is not set | 684 | # CONFIG_INPUT_TOUCHSCREEN is not set |
| 585 | # CONFIG_INPUT_MISC is not set | 685 | # CONFIG_INPUT_MISC is not set |
| 586 | 686 | ||
| 587 | # | 687 | # |
| 588 | # Hardware I/O ports | 688 | # Hardware I/O ports |
| 589 | # | 689 | # |
| 590 | CONFIG_SERIO=y | 690 | # CONFIG_SERIO is not set |
| 591 | CONFIG_SERIO_SERPORT=y | ||
| 592 | CONFIG_SERIO_LIBPS2=y | ||
| 593 | # CONFIG_SERIO_RAW is not set | ||
| 594 | # CONFIG_GAMEPORT is not set | 691 | # CONFIG_GAMEPORT is not set |
| 595 | CONFIG_SOUND_GAMEPORT=y | ||
| 596 | 692 | ||
| 597 | # | 693 | # |
| 598 | # Character devices | 694 | # Character devices |
| 599 | # | 695 | # |
| 600 | CONFIG_VT=y | 696 | CONFIG_VT=y |
| 697 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 601 | CONFIG_VT_CONSOLE=y | 698 | CONFIG_VT_CONSOLE=y |
| 602 | CONFIG_HW_CONSOLE=y | 699 | CONFIG_HW_CONSOLE=y |
| 700 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
| 701 | CONFIG_DEVKMEM=y | ||
| 603 | # CONFIG_SERIAL_NONSTANDARD is not set | 702 | # CONFIG_SERIAL_NONSTANDARD is not set |
| 604 | 703 | ||
| 605 | # | 704 | # |
| 606 | # Serial drivers | 705 | # Serial drivers |
| 607 | # | 706 | # |
| 608 | CONFIG_SERIAL_8250=m | 707 | # CONFIG_SERIAL_8250 is not set |
| 609 | # CONFIG_SERIAL_8250_CS is not set | ||
| 610 | CONFIG_SERIAL_8250_NR_UARTS=4 | ||
| 611 | # CONFIG_SERIAL_8250_EXTENDED is not set | ||
| 612 | 708 | ||
| 613 | # | 709 | # |
| 614 | # Non-8250 serial port support | 710 | # Non-8250 serial port support |
| @@ -618,71 +714,125 @@ CONFIG_SERIAL_SA1100_CONSOLE=y | |||
| 618 | CONFIG_SERIAL_CORE=y | 714 | CONFIG_SERIAL_CORE=y |
| 619 | CONFIG_SERIAL_CORE_CONSOLE=y | 715 | CONFIG_SERIAL_CORE_CONSOLE=y |
| 620 | CONFIG_UNIX98_PTYS=y | 716 | CONFIG_UNIX98_PTYS=y |
| 717 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 621 | CONFIG_LEGACY_PTYS=y | 718 | CONFIG_LEGACY_PTYS=y |
| 622 | CONFIG_LEGACY_PTY_COUNT=256 | 719 | CONFIG_LEGACY_PTY_COUNT=256 |
| 720 | # CONFIG_IPMI_HANDLER is not set | ||
| 721 | # CONFIG_HW_RANDOM is not set | ||
| 722 | # CONFIG_DTLK is not set | ||
| 723 | # CONFIG_R3964 is not set | ||
| 623 | 724 | ||
| 624 | # | 725 | # |
| 625 | # IPMI | 726 | # PCMCIA character devices |
| 626 | # | 727 | # |
| 627 | # CONFIG_IPMI_HANDLER is not set | 728 | # CONFIG_SYNCLINK_CS is not set |
| 729 | # CONFIG_CARDMAN_4000 is not set | ||
| 730 | # CONFIG_CARDMAN_4040 is not set | ||
| 731 | # CONFIG_IPWIRELESS is not set | ||
| 732 | # CONFIG_RAW_DRIVER is not set | ||
| 733 | # CONFIG_TCG_TPM is not set | ||
| 734 | CONFIG_DEVPORT=y | ||
| 735 | # CONFIG_I2C is not set | ||
| 736 | # CONFIG_SPI is not set | ||
| 628 | 737 | ||
| 629 | # | 738 | # |
| 630 | # Watchdog Cards | 739 | # PPS support |
| 631 | # | 740 | # |
| 632 | # CONFIG_WATCHDOG is not set | 741 | # CONFIG_PPS is not set |
| 633 | # CONFIG_NVRAM is not set | 742 | CONFIG_ARCH_REQUIRE_GPIOLIB=y |
| 634 | # CONFIG_RTC is not set | 743 | CONFIG_GPIOLIB=y |
| 635 | # CONFIG_DTLK is not set | 744 | # CONFIG_GPIO_SYSFS is not set |
| 636 | # CONFIG_R3964 is not set | ||
| 637 | 745 | ||
| 638 | # | 746 | # |
| 639 | # Ftape, the floppy tape device driver | 747 | # Memory mapped GPIO expanders: |
| 640 | # | 748 | # |
| 641 | # CONFIG_DRM is not set | ||
| 642 | 749 | ||
| 643 | # | 750 | # |
| 644 | # PCMCIA character devices | 751 | # I2C GPIO expanders: |
| 645 | # | 752 | # |
| 646 | # CONFIG_SYNCLINK_CS is not set | ||
| 647 | # CONFIG_RAW_DRIVER is not set | ||
| 648 | 753 | ||
| 649 | # | 754 | # |
| 650 | # TPM devices | 755 | # PCI GPIO expanders: |
| 651 | # | 756 | # |
| 652 | 757 | ||
| 653 | # | 758 | # |
| 654 | # I2C support | 759 | # SPI GPIO expanders: |
| 655 | # | 760 | # |
| 656 | # CONFIG_I2C is not set | ||
| 657 | 761 | ||
| 658 | # | 762 | # |
| 659 | # Misc devices | 763 | # AC97 GPIO expanders: |
| 660 | # | 764 | # |
| 765 | # CONFIG_W1 is not set | ||
| 766 | # CONFIG_POWER_SUPPLY is not set | ||
| 767 | # CONFIG_HWMON is not set | ||
| 768 | # CONFIG_THERMAL is not set | ||
| 769 | # CONFIG_WATCHDOG is not set | ||
| 770 | CONFIG_SSB_POSSIBLE=y | ||
| 661 | 771 | ||
| 662 | # | 772 | # |
| 663 | # Multimedia devices | 773 | # Sonics Silicon Backplane |
| 664 | # | 774 | # |
| 665 | # CONFIG_VIDEO_DEV is not set | 775 | # CONFIG_SSB is not set |
| 666 | 776 | ||
| 667 | # | 777 | # |
| 668 | # Digital Video Broadcasting Devices | 778 | # Multifunction device drivers |
| 669 | # | 779 | # |
| 670 | # CONFIG_DVB is not set | 780 | # CONFIG_MFD_CORE is not set |
| 781 | # CONFIG_MFD_SM501 is not set | ||
| 782 | # CONFIG_MFD_ASIC3 is not set | ||
| 783 | CONFIG_HTC_EGPIO=y | ||
| 784 | # CONFIG_HTC_PASIC3 is not set | ||
| 785 | # CONFIG_MFD_TMIO is not set | ||
| 786 | # CONFIG_MFD_T7L66XB is not set | ||
| 787 | # CONFIG_MFD_TC6387XB is not set | ||
| 788 | # CONFIG_MFD_TC6393XB is not set | ||
| 789 | |||
| 790 | # | ||
| 791 | # Multimedia Capabilities Port drivers | ||
| 792 | # | ||
| 793 | # CONFIG_MCP_SA11X0 is not set | ||
| 794 | # CONFIG_REGULATOR is not set | ||
| 795 | # CONFIG_MEDIA_SUPPORT is not set | ||
| 671 | 796 | ||
| 672 | # | 797 | # |
| 673 | # Graphics support | 798 | # Graphics support |
| 674 | # | 799 | # |
| 800 | # CONFIG_VGASTATE is not set | ||
| 801 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 675 | CONFIG_FB=y | 802 | CONFIG_FB=y |
| 803 | # CONFIG_FIRMWARE_EDID is not set | ||
| 804 | # CONFIG_FB_DDC is not set | ||
| 805 | # CONFIG_FB_BOOT_VESA_SUPPORT is not set | ||
| 676 | CONFIG_FB_CFB_FILLRECT=y | 806 | CONFIG_FB_CFB_FILLRECT=y |
| 677 | CONFIG_FB_CFB_COPYAREA=y | 807 | CONFIG_FB_CFB_COPYAREA=y |
| 678 | CONFIG_FB_CFB_IMAGEBLIT=y | 808 | CONFIG_FB_CFB_IMAGEBLIT=y |
| 679 | CONFIG_FB_SOFT_CURSOR=y | 809 | # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set |
| 810 | # CONFIG_FB_SYS_FILLRECT is not set | ||
| 811 | # CONFIG_FB_SYS_COPYAREA is not set | ||
| 812 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
| 813 | # CONFIG_FB_FOREIGN_ENDIAN is not set | ||
| 814 | # CONFIG_FB_SYS_FOPS is not set | ||
| 815 | # CONFIG_FB_SVGALIB is not set | ||
| 680 | # CONFIG_FB_MACMODES is not set | 816 | # CONFIG_FB_MACMODES is not set |
| 817 | # CONFIG_FB_BACKLIGHT is not set | ||
| 681 | # CONFIG_FB_MODE_HELPERS is not set | 818 | # CONFIG_FB_MODE_HELPERS is not set |
| 682 | # CONFIG_FB_TILEBLITTING is not set | 819 | # CONFIG_FB_TILEBLITTING is not set |
| 820 | |||
| 821 | # | ||
| 822 | # Frame buffer hardware drivers | ||
| 823 | # | ||
| 683 | CONFIG_FB_SA1100=y | 824 | CONFIG_FB_SA1100=y |
| 684 | # CONFIG_FB_S1D13XXX is not set | 825 | # CONFIG_FB_S1D13XXX is not set |
| 685 | # CONFIG_FB_VIRTUAL is not set | 826 | # CONFIG_FB_VIRTUAL is not set |
| 827 | # CONFIG_FB_METRONOME is not set | ||
| 828 | # CONFIG_FB_MB862XX is not set | ||
| 829 | # CONFIG_FB_BROADSHEET is not set | ||
| 830 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 831 | |||
| 832 | # | ||
| 833 | # Display device support | ||
| 834 | # | ||
| 835 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 686 | 836 | ||
| 687 | # | 837 | # |
| 688 | # Console display driver support | 838 | # Console display driver support |
| @@ -691,65 +841,54 @@ CONFIG_FB_SA1100=y | |||
| 691 | # CONFIG_MDA_CONSOLE is not set | 841 | # CONFIG_MDA_CONSOLE is not set |
| 692 | CONFIG_DUMMY_CONSOLE=y | 842 | CONFIG_DUMMY_CONSOLE=y |
| 693 | # CONFIG_FRAMEBUFFER_CONSOLE is not set | 843 | # CONFIG_FRAMEBUFFER_CONSOLE is not set |
| 694 | |||
| 695 | # | ||
| 696 | # Logo configuration | ||
| 697 | # | ||
| 698 | # CONFIG_LOGO is not set | 844 | # CONFIG_LOGO is not set |
| 699 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | 845 | # CONFIG_SOUND is not set |
| 700 | 846 | # CONFIG_HID_SUPPORT is not set | |
| 701 | # | 847 | # CONFIG_USB_SUPPORT is not set |
| 702 | # Sound | 848 | # CONFIG_MMC is not set |
| 703 | # | 849 | # CONFIG_MEMSTICK is not set |
| 704 | CONFIG_SOUND=y | 850 | # CONFIG_NEW_LEDS is not set |
| 705 | 851 | # CONFIG_ACCESSIBILITY is not set | |
| 706 | # | 852 | CONFIG_RTC_LIB=y |
| 707 | # Advanced Linux Sound Architecture | 853 | # CONFIG_RTC_CLASS is not set |
| 708 | # | 854 | # CONFIG_DMADEVICES is not set |
| 709 | # CONFIG_SND is not set | 855 | # CONFIG_AUXDISPLAY is not set |
| 710 | 856 | # CONFIG_UIO is not set | |
| 711 | # | ||
| 712 | # Open Sound System | ||
| 713 | # | ||
| 714 | # CONFIG_SOUND_PRIME is not set | ||
| 715 | |||
| 716 | # | ||
| 717 | # USB support | ||
| 718 | # | ||
| 719 | CONFIG_USB_ARCH_HAS_HCD=y | ||
| 720 | # CONFIG_USB_ARCH_HAS_OHCI is not set | ||
| 721 | # CONFIG_USB is not set | ||
| 722 | 857 | ||
| 723 | # | 858 | # |
| 724 | # USB Gadget Support | 859 | # TI VLYNQ |
| 725 | # | 860 | # |
| 726 | # CONFIG_USB_GADGET is not set | 861 | # CONFIG_STAGING is not set |
| 727 | |||
| 728 | # | ||
| 729 | # MMC/SD Card support | ||
| 730 | # | ||
| 731 | # CONFIG_MMC is not set | ||
| 732 | 862 | ||
| 733 | # | 863 | # |
| 734 | # File systems | 864 | # File systems |
| 735 | # | 865 | # |
| 736 | CONFIG_EXT2_FS=y | 866 | CONFIG_EXT2_FS=y |
| 737 | # CONFIG_EXT2_FS_XATTR is not set | 867 | # CONFIG_EXT2_FS_XATTR is not set |
| 868 | # CONFIG_EXT2_FS_XIP is not set | ||
| 738 | # CONFIG_EXT3_FS is not set | 869 | # CONFIG_EXT3_FS is not set |
| 739 | # CONFIG_JBD is not set | 870 | # CONFIG_EXT4_FS is not set |
| 740 | # CONFIG_REISERFS_FS is not set | 871 | # CONFIG_REISERFS_FS is not set |
| 741 | # CONFIG_JFS_FS is not set | 872 | # CONFIG_JFS_FS is not set |
| 742 | 873 | # CONFIG_FS_POSIX_ACL is not set | |
| 743 | # | ||
| 744 | # XFS support | ||
| 745 | # | ||
| 746 | # CONFIG_XFS_FS is not set | 874 | # CONFIG_XFS_FS is not set |
| 747 | # CONFIG_MINIX_FS is not set | 875 | # CONFIG_OCFS2_FS is not set |
| 748 | # CONFIG_ROMFS_FS is not set | 876 | # CONFIG_BTRFS_FS is not set |
| 749 | # CONFIG_QUOTA is not set | 877 | # CONFIG_NILFS2_FS is not set |
| 878 | CONFIG_FILE_LOCKING=y | ||
| 879 | CONFIG_FSNOTIFY=y | ||
| 750 | CONFIG_DNOTIFY=y | 880 | CONFIG_DNOTIFY=y |
| 881 | # CONFIG_INOTIFY is not set | ||
| 882 | CONFIG_INOTIFY_USER=y | ||
| 883 | # CONFIG_QUOTA is not set | ||
| 751 | # CONFIG_AUTOFS_FS is not set | 884 | # CONFIG_AUTOFS_FS is not set |
| 752 | # CONFIG_AUTOFS4_FS is not set | 885 | # CONFIG_AUTOFS4_FS is not set |
| 886 | # CONFIG_FUSE_FS is not set | ||
| 887 | |||
| 888 | # | ||
| 889 | # Caches | ||
| 890 | # | ||
| 891 | # CONFIG_FSCACHE is not set | ||
| 753 | 892 | ||
| 754 | # | 893 | # |
| 755 | # CD-ROM/DVD Filesystems | 894 | # CD-ROM/DVD Filesystems |
| @@ -771,16 +910,13 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | |||
| 771 | # Pseudo filesystems | 910 | # Pseudo filesystems |
| 772 | # | 911 | # |
| 773 | CONFIG_PROC_FS=y | 912 | CONFIG_PROC_FS=y |
| 913 | CONFIG_PROC_SYSCTL=y | ||
| 914 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 774 | CONFIG_SYSFS=y | 915 | CONFIG_SYSFS=y |
| 775 | # CONFIG_DEVFS_FS is not set | ||
| 776 | # CONFIG_DEVPTS_FS_XATTR is not set | ||
| 777 | # CONFIG_TMPFS is not set | 916 | # CONFIG_TMPFS is not set |
| 778 | # CONFIG_HUGETLB_PAGE is not set | 917 | # CONFIG_HUGETLB_PAGE is not set |
| 779 | CONFIG_RAMFS=y | 918 | # CONFIG_CONFIGFS_FS is not set |
| 780 | 919 | CONFIG_MISC_FILESYSTEMS=y | |
| 781 | # | ||
| 782 | # Miscellaneous filesystems | ||
| 783 | # | ||
| 784 | # CONFIG_ADFS_FS is not set | 920 | # CONFIG_ADFS_FS is not set |
| 785 | # CONFIG_AFFS_FS is not set | 921 | # CONFIG_AFFS_FS is not set |
| 786 | # CONFIG_HFS_FS is not set | 922 | # CONFIG_HFS_FS is not set |
| @@ -788,34 +924,37 @@ CONFIG_RAMFS=y | |||
| 788 | # CONFIG_BEFS_FS is not set | 924 | # CONFIG_BEFS_FS is not set |
| 789 | # CONFIG_BFS_FS is not set | 925 | # CONFIG_BFS_FS is not set |
| 790 | # CONFIG_EFS_FS is not set | 926 | # CONFIG_EFS_FS is not set |
| 791 | # CONFIG_JFFS_FS is not set | ||
| 792 | CONFIG_JFFS2_FS=y | 927 | CONFIG_JFFS2_FS=y |
| 793 | CONFIG_JFFS2_FS_DEBUG=0 | 928 | CONFIG_JFFS2_FS_DEBUG=0 |
| 794 | # CONFIG_JFFS2_FS_NAND is not set | 929 | CONFIG_JFFS2_FS_WRITEBUFFER=y |
| 795 | # CONFIG_JFFS2_FS_NOR_ECC is not set | 930 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set |
| 931 | # CONFIG_JFFS2_SUMMARY is not set | ||
| 932 | # CONFIG_JFFS2_FS_XATTR is not set | ||
| 796 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | 933 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set |
| 797 | CONFIG_JFFS2_ZLIB=y | 934 | CONFIG_JFFS2_ZLIB=y |
| 935 | # CONFIG_JFFS2_LZO is not set | ||
| 798 | CONFIG_JFFS2_RTIME=y | 936 | CONFIG_JFFS2_RTIME=y |
| 799 | # CONFIG_JFFS2_RUBIN is not set | 937 | # CONFIG_JFFS2_RUBIN is not set |
| 800 | CONFIG_CRAMFS=m | 938 | CONFIG_CRAMFS=m |
| 939 | # CONFIG_SQUASHFS is not set | ||
| 801 | # CONFIG_VXFS_FS is not set | 940 | # CONFIG_VXFS_FS is not set |
| 941 | # CONFIG_MINIX_FS is not set | ||
| 942 | # CONFIG_OMFS_FS is not set | ||
| 802 | # CONFIG_HPFS_FS is not set | 943 | # CONFIG_HPFS_FS is not set |
| 803 | # CONFIG_QNX4FS_FS is not set | 944 | # CONFIG_QNX4FS_FS is not set |
| 945 | # CONFIG_ROMFS_FS is not set | ||
| 804 | # CONFIG_SYSV_FS is not set | 946 | # CONFIG_SYSV_FS is not set |
| 805 | # CONFIG_UFS_FS is not set | 947 | # CONFIG_UFS_FS is not set |
| 806 | 948 | CONFIG_NETWORK_FILESYSTEMS=y | |
| 807 | # | ||
| 808 | # Network File Systems | ||
| 809 | # | ||
| 810 | CONFIG_NFS_FS=y | 949 | CONFIG_NFS_FS=y |
| 811 | # CONFIG_NFS_V3 is not set | 950 | # CONFIG_NFS_V3 is not set |
| 812 | # CONFIG_NFS_V4 is not set | 951 | # CONFIG_NFS_V4 is not set |
| 813 | # CONFIG_NFS_DIRECTIO is not set | ||
| 814 | CONFIG_NFSD=m | 952 | CONFIG_NFSD=m |
| 815 | # CONFIG_NFSD_V3 is not set | 953 | # CONFIG_NFSD_V3 is not set |
| 816 | CONFIG_NFSD_TCP=y | 954 | # CONFIG_NFSD_V4 is not set |
| 817 | CONFIG_LOCKD=y | 955 | CONFIG_LOCKD=y |
| 818 | CONFIG_EXPORTFS=m | 956 | CONFIG_EXPORTFS=m |
| 957 | CONFIG_NFS_COMMON=y | ||
| 819 | CONFIG_SUNRPC=y | 958 | CONFIG_SUNRPC=y |
| 820 | # CONFIG_RPCSEC_GSS_KRB5 is not set | 959 | # CONFIG_RPCSEC_GSS_KRB5 is not set |
| 821 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | 960 | # CONFIG_RPCSEC_GSS_SPKM3 is not set |
| @@ -831,10 +970,6 @@ CONFIG_SMB_FS=m | |||
| 831 | # | 970 | # |
| 832 | # CONFIG_PARTITION_ADVANCED is not set | 971 | # CONFIG_PARTITION_ADVANCED is not set |
| 833 | CONFIG_MSDOS_PARTITION=y | 972 | CONFIG_MSDOS_PARTITION=y |
| 834 | |||
| 835 | # | ||
| 836 | # Native Language Support | ||
| 837 | # | ||
| 838 | CONFIG_NLS=y | 973 | CONFIG_NLS=y |
| 839 | CONFIG_NLS_DEFAULT="iso8859-1" | 974 | CONFIG_NLS_DEFAULT="iso8859-1" |
| 840 | # CONFIG_NLS_CODEPAGE_437 is not set | 975 | # CONFIG_NLS_CODEPAGE_437 is not set |
| @@ -875,20 +1010,34 @@ CONFIG_NLS_DEFAULT="iso8859-1" | |||
| 875 | # CONFIG_NLS_KOI8_R is not set | 1010 | # CONFIG_NLS_KOI8_R is not set |
| 876 | # CONFIG_NLS_KOI8_U is not set | 1011 | # CONFIG_NLS_KOI8_U is not set |
| 877 | # CONFIG_NLS_UTF8 is not set | 1012 | # CONFIG_NLS_UTF8 is not set |
| 878 | 1013 | # CONFIG_DLM is not set | |
| 879 | # | ||
| 880 | # Profiling support | ||
| 881 | # | ||
| 882 | # CONFIG_PROFILING is not set | ||
| 883 | 1014 | ||
| 884 | # | 1015 | # |
| 885 | # Kernel hacking | 1016 | # Kernel hacking |
| 886 | # | 1017 | # |
| 887 | # CONFIG_PRINTK_TIME is not set | 1018 | # CONFIG_PRINTK_TIME is not set |
| 1019 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 1020 | CONFIG_ENABLE_MUST_CHECK=y | ||
| 1021 | CONFIG_FRAME_WARN=1024 | ||
| 1022 | # CONFIG_MAGIC_SYSRQ is not set | ||
| 1023 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 1024 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 1025 | # CONFIG_DEBUG_FS is not set | ||
| 1026 | # CONFIG_HEADERS_CHECK is not set | ||
| 888 | # CONFIG_DEBUG_KERNEL is not set | 1027 | # CONFIG_DEBUG_KERNEL is not set |
| 889 | CONFIG_LOG_BUF_SHIFT=14 | 1028 | # CONFIG_SLUB_DEBUG_ON is not set |
| 1029 | # CONFIG_SLUB_STATS is not set | ||
| 890 | CONFIG_DEBUG_BUGVERBOSE=y | 1030 | CONFIG_DEBUG_BUGVERBOSE=y |
| 1031 | CONFIG_DEBUG_MEMORY_INIT=y | ||
| 891 | CONFIG_FRAME_POINTER=y | 1032 | CONFIG_FRAME_POINTER=y |
| 1033 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 1034 | # CONFIG_LATENCYTOP is not set | ||
| 1035 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
| 1036 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 1037 | CONFIG_TRACING_SUPPORT=y | ||
| 1038 | # CONFIG_FTRACE is not set | ||
| 1039 | # CONFIG_SAMPLES is not set | ||
| 1040 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 892 | # CONFIG_DEBUG_USER is not set | 1041 | # CONFIG_DEBUG_USER is not set |
| 893 | 1042 | ||
| 894 | # | 1043 | # |
| @@ -896,21 +1045,120 @@ CONFIG_FRAME_POINTER=y | |||
| 896 | # | 1045 | # |
| 897 | # CONFIG_KEYS is not set | 1046 | # CONFIG_KEYS is not set |
| 898 | # CONFIG_SECURITY is not set | 1047 | # CONFIG_SECURITY is not set |
| 1048 | # CONFIG_SECURITYFS is not set | ||
| 1049 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
| 1050 | CONFIG_CRYPTO=y | ||
| 1051 | |||
| 1052 | # | ||
| 1053 | # Crypto core or helper | ||
| 1054 | # | ||
| 1055 | # CONFIG_CRYPTO_FIPS is not set | ||
| 1056 | CONFIG_CRYPTO_ALGAPI=m | ||
| 1057 | CONFIG_CRYPTO_ALGAPI2=m | ||
| 1058 | CONFIG_CRYPTO_RNG=m | ||
| 1059 | CONFIG_CRYPTO_RNG2=m | ||
| 1060 | # CONFIG_CRYPTO_MANAGER is not set | ||
| 1061 | # CONFIG_CRYPTO_MANAGER2 is not set | ||
| 1062 | # CONFIG_CRYPTO_GF128MUL is not set | ||
| 1063 | # CONFIG_CRYPTO_NULL is not set | ||
| 1064 | # CONFIG_CRYPTO_CRYPTD is not set | ||
| 1065 | # CONFIG_CRYPTO_AUTHENC is not set | ||
| 1066 | # CONFIG_CRYPTO_TEST is not set | ||
| 1067 | |||
| 1068 | # | ||
| 1069 | # Authenticated Encryption with Associated Data | ||
| 1070 | # | ||
| 1071 | # CONFIG_CRYPTO_CCM is not set | ||
| 1072 | # CONFIG_CRYPTO_GCM is not set | ||
| 1073 | # CONFIG_CRYPTO_SEQIV is not set | ||
| 1074 | |||
| 1075 | # | ||
| 1076 | # Block modes | ||
| 1077 | # | ||
| 1078 | # CONFIG_CRYPTO_CBC is not set | ||
| 1079 | # CONFIG_CRYPTO_CTR is not set | ||
| 1080 | # CONFIG_CRYPTO_CTS is not set | ||
| 1081 | # CONFIG_CRYPTO_ECB is not set | ||
| 1082 | # CONFIG_CRYPTO_LRW is not set | ||
| 1083 | # CONFIG_CRYPTO_PCBC is not set | ||
| 1084 | # CONFIG_CRYPTO_XTS is not set | ||
| 1085 | |||
| 1086 | # | ||
| 1087 | # Hash modes | ||
| 1088 | # | ||
| 1089 | # CONFIG_CRYPTO_HMAC is not set | ||
| 1090 | # CONFIG_CRYPTO_XCBC is not set | ||
| 1091 | # CONFIG_CRYPTO_VMAC is not set | ||
| 1092 | |||
| 1093 | # | ||
| 1094 | # Digest | ||
| 1095 | # | ||
| 1096 | # CONFIG_CRYPTO_CRC32C is not set | ||
| 1097 | # CONFIG_CRYPTO_GHASH is not set | ||
| 1098 | # CONFIG_CRYPTO_MD4 is not set | ||
| 1099 | # CONFIG_CRYPTO_MD5 is not set | ||
| 1100 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
| 1101 | # CONFIG_CRYPTO_RMD128 is not set | ||
| 1102 | # CONFIG_CRYPTO_RMD160 is not set | ||
| 1103 | # CONFIG_CRYPTO_RMD256 is not set | ||
| 1104 | # CONFIG_CRYPTO_RMD320 is not set | ||
| 1105 | # CONFIG_CRYPTO_SHA1 is not set | ||
| 1106 | # CONFIG_CRYPTO_SHA256 is not set | ||
| 1107 | # CONFIG_CRYPTO_SHA512 is not set | ||
| 1108 | # CONFIG_CRYPTO_TGR192 is not set | ||
| 1109 | # CONFIG_CRYPTO_WP512 is not set | ||
| 1110 | |||
| 1111 | # | ||
| 1112 | # Ciphers | ||
| 1113 | # | ||
| 1114 | CONFIG_CRYPTO_AES=m | ||
| 1115 | # CONFIG_CRYPTO_ANUBIS is not set | ||
| 1116 | # CONFIG_CRYPTO_ARC4 is not set | ||
| 1117 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
| 1118 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
| 1119 | # CONFIG_CRYPTO_CAST5 is not set | ||
| 1120 | # CONFIG_CRYPTO_CAST6 is not set | ||
| 1121 | # CONFIG_CRYPTO_DES is not set | ||
| 1122 | # CONFIG_CRYPTO_FCRYPT is not set | ||
| 1123 | # CONFIG_CRYPTO_KHAZAD is not set | ||
| 1124 | # CONFIG_CRYPTO_SALSA20 is not set | ||
| 1125 | # CONFIG_CRYPTO_SEED is not set | ||
| 1126 | # CONFIG_CRYPTO_SERPENT is not set | ||
| 1127 | # CONFIG_CRYPTO_TEA is not set | ||
| 1128 | # CONFIG_CRYPTO_TWOFISH is not set | ||
| 899 | 1129 | ||
| 900 | # | 1130 | # |
| 901 | # Cryptographic options | 1131 | # Compression |
| 902 | # | 1132 | # |
| 903 | # CONFIG_CRYPTO is not set | 1133 | # CONFIG_CRYPTO_DEFLATE is not set |
| 1134 | # CONFIG_CRYPTO_ZLIB is not set | ||
| 1135 | # CONFIG_CRYPTO_LZO is not set | ||
| 904 | 1136 | ||
| 905 | # | 1137 | # |
| 906 | # Hardware crypto devices | 1138 | # Random Number Generation |
| 907 | # | 1139 | # |
| 1140 | CONFIG_CRYPTO_ANSI_CPRNG=m | ||
| 1141 | CONFIG_CRYPTO_HW=y | ||
| 1142 | # CONFIG_BINARY_PRINTF is not set | ||
| 908 | 1143 | ||
| 909 | # | 1144 | # |
| 910 | # Library routines | 1145 | # Library routines |
| 911 | # | 1146 | # |
| 1147 | CONFIG_BITREVERSE=y | ||
| 1148 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
| 912 | CONFIG_CRC_CCITT=m | 1149 | CONFIG_CRC_CCITT=m |
| 1150 | # CONFIG_CRC16 is not set | ||
| 1151 | # CONFIG_CRC_T10DIF is not set | ||
| 1152 | # CONFIG_CRC_ITU_T is not set | ||
| 913 | CONFIG_CRC32=y | 1153 | CONFIG_CRC32=y |
| 1154 | # CONFIG_CRC7 is not set | ||
| 914 | # CONFIG_LIBCRC32C is not set | 1155 | # CONFIG_LIBCRC32C is not set |
| 915 | CONFIG_ZLIB_INFLATE=y | 1156 | CONFIG_ZLIB_INFLATE=y |
| 916 | CONFIG_ZLIB_DEFLATE=y | 1157 | CONFIG_ZLIB_DEFLATE=y |
| 1158 | CONFIG_DECOMPRESS_GZIP=y | ||
| 1159 | CONFIG_DECOMPRESS_BZIP2=y | ||
| 1160 | CONFIG_DECOMPRESS_LZMA=y | ||
| 1161 | CONFIG_HAS_IOMEM=y | ||
| 1162 | CONFIG_HAS_IOPORT=y | ||
| 1163 | CONFIG_HAS_DMA=y | ||
| 1164 | CONFIG_NLATTR=y | ||
diff --git a/arch/arm/configs/htcherald_defconfig b/arch/arm/configs/htcherald_defconfig new file mode 100644 index 00000000000..33826767407 --- /dev/null +++ b/arch/arm/configs/htcherald_defconfig | |||
| @@ -0,0 +1,1142 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.32-rc6 | ||
| 4 | # Sat Nov 14 10:56:01 2009 | ||
| 5 | # | ||
| 6 | CONFIG_ARM=y | ||
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
| 8 | CONFIG_GENERIC_GPIO=y | ||
| 9 | CONFIG_GENERIC_TIME=y | ||
| 10 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 11 | CONFIG_GENERIC_HARDIRQS=y | ||
| 12 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 13 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 14 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 15 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 16 | CONFIG_HARDIRQS_SW_RESEND=y | ||
| 17 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 18 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 19 | CONFIG_ARCH_HAS_CPUFREQ=y | ||
| 20 | CONFIG_GENERIC_HWEIGHT=y | ||
| 21 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
| 22 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 23 | CONFIG_VECTORS_BASE=0xffff0000 | ||
| 24 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 25 | CONFIG_CONSTRUCTORS=y | ||
| 26 | |||
| 27 | # | ||
| 28 | # General setup | ||
| 29 | # | ||
| 30 | CONFIG_EXPERIMENTAL=y | ||
| 31 | CONFIG_BROKEN_ON_SMP=y | ||
| 32 | CONFIG_LOCK_KERNEL=y | ||
| 33 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 34 | CONFIG_LOCALVERSION="" | ||
| 35 | CONFIG_LOCALVERSION_AUTO=y | ||
| 36 | CONFIG_SWAP=y | ||
| 37 | CONFIG_SYSVIPC=y | ||
| 38 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 39 | # CONFIG_POSIX_MQUEUE is not set | ||
| 40 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
| 41 | # CONFIG_TASKSTATS is not set | ||
| 42 | # CONFIG_AUDIT is not set | ||
| 43 | |||
| 44 | # | ||
| 45 | # RCU Subsystem | ||
| 46 | # | ||
| 47 | CONFIG_TREE_RCU=y | ||
| 48 | # CONFIG_TREE_PREEMPT_RCU is not set | ||
| 49 | # CONFIG_RCU_TRACE is not set | ||
| 50 | CONFIG_RCU_FANOUT=32 | ||
| 51 | # CONFIG_RCU_FANOUT_EXACT is not set | ||
| 52 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 53 | # CONFIG_IKCONFIG is not set | ||
| 54 | CONFIG_LOG_BUF_SHIFT=14 | ||
| 55 | # CONFIG_GROUP_SCHED is not set | ||
| 56 | # CONFIG_CGROUPS is not set | ||
| 57 | # CONFIG_SYSFS_DEPRECATED_V2 is not set | ||
| 58 | # CONFIG_RELAY is not set | ||
| 59 | CONFIG_NAMESPACES=y | ||
| 60 | # CONFIG_UTS_NS is not set | ||
| 61 | # CONFIG_IPC_NS is not set | ||
| 62 | # CONFIG_USER_NS is not set | ||
| 63 | # CONFIG_PID_NS is not set | ||
| 64 | # CONFIG_NET_NS is not set | ||
| 65 | CONFIG_BLK_DEV_INITRD=y | ||
| 66 | CONFIG_INITRAMFS_SOURCE="" | ||
| 67 | CONFIG_RD_GZIP=y | ||
| 68 | CONFIG_RD_BZIP2=y | ||
| 69 | CONFIG_RD_LZMA=y | ||
| 70 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 71 | CONFIG_SYSCTL=y | ||
| 72 | CONFIG_ANON_INODES=y | ||
| 73 | # CONFIG_EMBEDDED is not set | ||
| 74 | CONFIG_UID16=y | ||
| 75 | CONFIG_SYSCTL_SYSCALL=y | ||
| 76 | CONFIG_KALLSYMS=y | ||
| 77 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
| 78 | CONFIG_HOTPLUG=y | ||
| 79 | CONFIG_PRINTK=y | ||
| 80 | CONFIG_BUG=y | ||
| 81 | CONFIG_ELF_CORE=y | ||
| 82 | CONFIG_BASE_FULL=y | ||
| 83 | CONFIG_FUTEX=y | ||
| 84 | CONFIG_EPOLL=y | ||
| 85 | CONFIG_SIGNALFD=y | ||
| 86 | CONFIG_TIMERFD=y | ||
| 87 | CONFIG_EVENTFD=y | ||
| 88 | CONFIG_SHMEM=y | ||
| 89 | CONFIG_AIO=y | ||
| 90 | |||
| 91 | # | ||
| 92 | # Kernel Performance Events And Counters | ||
| 93 | # | ||
| 94 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 95 | CONFIG_COMPAT_BRK=y | ||
| 96 | CONFIG_SLAB=y | ||
| 97 | # CONFIG_SLUB is not set | ||
| 98 | # CONFIG_SLOB is not set | ||
| 99 | # CONFIG_PROFILING is not set | ||
| 100 | CONFIG_HAVE_OPROFILE=y | ||
| 101 | # CONFIG_KPROBES is not set | ||
| 102 | CONFIG_HAVE_KPROBES=y | ||
| 103 | CONFIG_HAVE_KRETPROBES=y | ||
| 104 | CONFIG_HAVE_CLK=y | ||
| 105 | |||
| 106 | # | ||
| 107 | # GCOV-based kernel profiling | ||
| 108 | # | ||
| 109 | # CONFIG_SLOW_WORK is not set | ||
| 110 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 111 | CONFIG_SLABINFO=y | ||
| 112 | CONFIG_RT_MUTEXES=y | ||
| 113 | CONFIG_BASE_SMALL=0 | ||
| 114 | CONFIG_MODULES=y | ||
| 115 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 116 | CONFIG_MODULE_UNLOAD=y | ||
| 117 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
| 118 | # CONFIG_MODVERSIONS is not set | ||
| 119 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
| 120 | CONFIG_BLOCK=y | ||
| 121 | CONFIG_LBDAF=y | ||
| 122 | # CONFIG_BLK_DEV_BSG is not set | ||
| 123 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 124 | |||
| 125 | # | ||
| 126 | # IO Schedulers | ||
| 127 | # | ||
| 128 | CONFIG_IOSCHED_NOOP=y | ||
| 129 | CONFIG_IOSCHED_AS=y | ||
| 130 | CONFIG_IOSCHED_DEADLINE=y | ||
| 131 | CONFIG_IOSCHED_CFQ=y | ||
| 132 | # CONFIG_DEFAULT_AS is not set | ||
| 133 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 134 | CONFIG_DEFAULT_CFQ=y | ||
| 135 | # CONFIG_DEFAULT_NOOP is not set | ||
| 136 | CONFIG_DEFAULT_IOSCHED="cfq" | ||
| 137 | CONFIG_FREEZER=y | ||
| 138 | |||
| 139 | # | ||
| 140 | # System Type | ||
| 141 | # | ||
| 142 | CONFIG_MMU=y | ||
| 143 | # CONFIG_ARCH_AAEC2000 is not set | ||
| 144 | # CONFIG_ARCH_INTEGRATOR is not set | ||
| 145 | # CONFIG_ARCH_REALVIEW is not set | ||
| 146 | # CONFIG_ARCH_VERSATILE is not set | ||
| 147 | # CONFIG_ARCH_AT91 is not set | ||
| 148 | # CONFIG_ARCH_CLPS711X is not set | ||
| 149 | # CONFIG_ARCH_GEMINI is not set | ||
| 150 | # CONFIG_ARCH_EBSA110 is not set | ||
| 151 | # CONFIG_ARCH_EP93XX is not set | ||
| 152 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
| 153 | # CONFIG_ARCH_MXC is not set | ||
| 154 | # CONFIG_ARCH_STMP3XXX is not set | ||
| 155 | # CONFIG_ARCH_NETX is not set | ||
| 156 | # CONFIG_ARCH_H720X is not set | ||
| 157 | # CONFIG_ARCH_NOMADIK is not set | ||
| 158 | # CONFIG_ARCH_IOP13XX is not set | ||
| 159 | # CONFIG_ARCH_IOP32X is not set | ||
| 160 | # CONFIG_ARCH_IOP33X is not set | ||
| 161 | # CONFIG_ARCH_IXP23XX is not set | ||
| 162 | # CONFIG_ARCH_IXP2000 is not set | ||
| 163 | # CONFIG_ARCH_IXP4XX is not set | ||
| 164 | # CONFIG_ARCH_L7200 is not set | ||
| 165 | # CONFIG_ARCH_KIRKWOOD is not set | ||
| 166 | # CONFIG_ARCH_LOKI is not set | ||
| 167 | # CONFIG_ARCH_MV78XX0 is not set | ||
| 168 | # CONFIG_ARCH_ORION5X is not set | ||
| 169 | # CONFIG_ARCH_MMP is not set | ||
| 170 | # CONFIG_ARCH_KS8695 is not set | ||
| 171 | # CONFIG_ARCH_NS9XXX is not set | ||
| 172 | # CONFIG_ARCH_W90X900 is not set | ||
| 173 | # CONFIG_ARCH_PNX4008 is not set | ||
| 174 | # CONFIG_ARCH_PXA is not set | ||
| 175 | # CONFIG_ARCH_MSM is not set | ||
| 176 | # CONFIG_ARCH_RPC is not set | ||
| 177 | # CONFIG_ARCH_SA1100 is not set | ||
| 178 | # CONFIG_ARCH_S3C2410 is not set | ||
| 179 | # CONFIG_ARCH_S3C64XX is not set | ||
| 180 | # CONFIG_ARCH_S5PC1XX is not set | ||
| 181 | # CONFIG_ARCH_SHARK is not set | ||
| 182 | # CONFIG_ARCH_LH7A40X is not set | ||
| 183 | # CONFIG_ARCH_U300 is not set | ||
| 184 | # CONFIG_ARCH_DAVINCI is not set | ||
| 185 | CONFIG_ARCH_OMAP=y | ||
| 186 | # CONFIG_ARCH_BCMRING is not set | ||
| 187 | |||
| 188 | # | ||
| 189 | # TI OMAP Implementations | ||
| 190 | # | ||
| 191 | CONFIG_ARCH_OMAP_OTG=y | ||
| 192 | CONFIG_ARCH_OMAP1=y | ||
| 193 | # CONFIG_ARCH_OMAP2 is not set | ||
| 194 | # CONFIG_ARCH_OMAP3 is not set | ||
| 195 | # CONFIG_ARCH_OMAP4 is not set | ||
| 196 | |||
| 197 | # | ||
| 198 | # OMAP Feature Selections | ||
| 199 | # | ||
| 200 | # CONFIG_OMAP_RESET_CLOCKS is not set | ||
| 201 | # CONFIG_OMAP_MUX is not set | ||
| 202 | CONFIG_OMAP_MCBSP=y | ||
| 203 | # CONFIG_OMAP_MBOX_FWK is not set | ||
| 204 | CONFIG_OMAP_MPU_TIMER=y | ||
| 205 | # CONFIG_OMAP_32K_TIMER is not set | ||
| 206 | CONFIG_OMAP_LL_DEBUG_UART1=y | ||
| 207 | # CONFIG_OMAP_LL_DEBUG_UART2 is not set | ||
| 208 | # CONFIG_OMAP_LL_DEBUG_UART3 is not set | ||
| 209 | # CONFIG_OMAP_LL_DEBUG_NONE is not set | ||
| 210 | # CONFIG_OMAP_PM_NONE is not set | ||
| 211 | CONFIG_OMAP_PM_NOOP=y | ||
| 212 | |||
| 213 | # | ||
| 214 | # OMAP Core Type | ||
| 215 | # | ||
| 216 | # CONFIG_ARCH_OMAP730 is not set | ||
| 217 | CONFIG_ARCH_OMAP850=y | ||
| 218 | # CONFIG_ARCH_OMAP15XX is not set | ||
| 219 | # CONFIG_ARCH_OMAP16XX is not set | ||
| 220 | |||
| 221 | # | ||
| 222 | # OMAP Board Type | ||
| 223 | # | ||
| 224 | # CONFIG_MACH_OMAP_HTCWIZARD is not set | ||
| 225 | CONFIG_MACH_HERALD=y | ||
| 226 | |||
| 227 | # | ||
| 228 | # OMAP CPU Speed | ||
| 229 | # | ||
| 230 | # CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER is not set | ||
| 231 | CONFIG_OMAP_ARM_195MHZ=y | ||
| 232 | # CONFIG_OMAP_ARM_182MHZ is not set | ||
| 233 | # CONFIG_OMAP_ARM_168MHZ is not set | ||
| 234 | # CONFIG_OMAP_ARM_120MHZ is not set | ||
| 235 | # CONFIG_OMAP_ARM_60MHZ is not set | ||
| 236 | # CONFIG_OMAP_ARM_30MHZ is not set | ||
| 237 | |||
| 238 | # | ||
| 239 | # Processor Type | ||
| 240 | # | ||
| 241 | CONFIG_CPU_32=y | ||
| 242 | CONFIG_CPU_ARM925T=y | ||
| 243 | CONFIG_CPU_ARM926T=y | ||
| 244 | CONFIG_CPU_32v4T=y | ||
| 245 | CONFIG_CPU_32v5=y | ||
| 246 | CONFIG_CPU_ABRT_EV4T=y | ||
| 247 | CONFIG_CPU_ABRT_EV5TJ=y | ||
| 248 | CONFIG_CPU_PABRT_LEGACY=y | ||
| 249 | CONFIG_CPU_CACHE_V4WT=y | ||
| 250 | CONFIG_CPU_CACHE_VIVT=y | ||
| 251 | CONFIG_CPU_COPY_V4WB=y | ||
| 252 | CONFIG_CPU_TLB_V4WBI=y | ||
| 253 | CONFIG_CPU_CP15=y | ||
| 254 | CONFIG_CPU_CP15_MMU=y | ||
| 255 | |||
| 256 | # | ||
| 257 | # Processor Features | ||
| 258 | # | ||
| 259 | CONFIG_ARM_THUMB=y | ||
| 260 | # CONFIG_CPU_ICACHE_DISABLE is not set | ||
| 261 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
| 262 | CONFIG_CPU_DCACHE_WRITETHROUGH=y | ||
| 263 | # CONFIG_CPU_CACHE_ROUND_ROBIN is not set | ||
| 264 | CONFIG_ARM_L1_CACHE_SHIFT=5 | ||
| 265 | CONFIG_COMMON_CLKDEV=y | ||
| 266 | |||
| 267 | # | ||
| 268 | # Bus support | ||
| 269 | # | ||
| 270 | # CONFIG_PCI_SYSCALL is not set | ||
| 271 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 272 | # CONFIG_PCCARD is not set | ||
| 273 | |||
| 274 | # | ||
| 275 | # Kernel Features | ||
| 276 | # | ||
| 277 | # CONFIG_NO_HZ is not set | ||
| 278 | # CONFIG_HIGH_RES_TIMERS is not set | ||
| 279 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 280 | CONFIG_VMSPLIT_3G=y | ||
| 281 | # CONFIG_VMSPLIT_2G is not set | ||
| 282 | # CONFIG_VMSPLIT_1G is not set | ||
| 283 | CONFIG_PAGE_OFFSET=0xC0000000 | ||
| 284 | # CONFIG_PREEMPT_NONE is not set | ||
| 285 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
| 286 | CONFIG_PREEMPT=y | ||
| 287 | CONFIG_HZ=100 | ||
| 288 | CONFIG_AEABI=y | ||
| 289 | CONFIG_OABI_COMPAT=y | ||
| 290 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | ||
| 291 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | ||
| 292 | # CONFIG_HIGHMEM is not set | ||
| 293 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 294 | CONFIG_FLATMEM_MANUAL=y | ||
| 295 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 296 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 297 | CONFIG_FLATMEM=y | ||
| 298 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 299 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 300 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | ||
| 301 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
| 302 | CONFIG_ZONE_DMA_FLAG=0 | ||
| 303 | CONFIG_VIRT_TO_BUS=y | ||
| 304 | CONFIG_HAVE_MLOCK=y | ||
| 305 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
| 306 | # CONFIG_KSM is not set | ||
| 307 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
| 308 | CONFIG_LEDS=y | ||
| 309 | CONFIG_ALIGNMENT_TRAP=y | ||
| 310 | # CONFIG_UACCESS_WITH_MEMCPY is not set | ||
| 311 | |||
| 312 | # | ||
| 313 | # Boot options | ||
| 314 | # | ||
| 315 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
| 316 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
| 317 | CONFIG_CMDLINE="mem=32M console=ttyS0,115200 ip=dhcp" | ||
| 318 | # CONFIG_XIP_KERNEL is not set | ||
| 319 | # CONFIG_KEXEC is not set | ||
| 320 | |||
| 321 | # | ||
| 322 | # CPU Power Management | ||
| 323 | # | ||
| 324 | # CONFIG_CPU_FREQ is not set | ||
| 325 | # CONFIG_CPU_IDLE is not set | ||
| 326 | |||
| 327 | # | ||
| 328 | # Floating point emulation | ||
| 329 | # | ||
| 330 | |||
| 331 | # | ||
| 332 | # At least one emulation must be selected | ||
| 333 | # | ||
| 334 | CONFIG_FPE_NWFPE=y | ||
| 335 | # CONFIG_FPE_NWFPE_XP is not set | ||
| 336 | # CONFIG_FPE_FASTFPE is not set | ||
| 337 | # CONFIG_VFP is not set | ||
| 338 | |||
| 339 | # | ||
| 340 | # Userspace binary formats | ||
| 341 | # | ||
| 342 | CONFIG_BINFMT_ELF=y | ||
| 343 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 344 | CONFIG_HAVE_AOUT=y | ||
| 345 | # CONFIG_BINFMT_AOUT is not set | ||
| 346 | # CONFIG_BINFMT_MISC is not set | ||
| 347 | |||
| 348 | # | ||
| 349 | # Power management options | ||
| 350 | # | ||
| 351 | CONFIG_PM=y | ||
| 352 | # CONFIG_PM_DEBUG is not set | ||
| 353 | CONFIG_PM_SLEEP=y | ||
| 354 | CONFIG_SUSPEND=y | ||
| 355 | CONFIG_SUSPEND_FREEZER=y | ||
| 356 | # CONFIG_APM_EMULATION is not set | ||
| 357 | # CONFIG_PM_RUNTIME is not set | ||
| 358 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
| 359 | CONFIG_NET=y | ||
| 360 | |||
| 361 | # | ||
| 362 | # Networking options | ||
| 363 | # | ||
| 364 | CONFIG_PACKET=y | ||
| 365 | # CONFIG_PACKET_MMAP is not set | ||
| 366 | CONFIG_UNIX=y | ||
| 367 | CONFIG_XFRM=y | ||
| 368 | # CONFIG_XFRM_USER is not set | ||
| 369 | # CONFIG_XFRM_SUB_POLICY is not set | ||
| 370 | # CONFIG_XFRM_MIGRATE is not set | ||
| 371 | # CONFIG_XFRM_STATISTICS is not set | ||
| 372 | # CONFIG_NET_KEY is not set | ||
| 373 | CONFIG_INET=y | ||
| 374 | CONFIG_IP_MULTICAST=y | ||
| 375 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 376 | CONFIG_IP_FIB_HASH=y | ||
| 377 | CONFIG_IP_PNP=y | ||
| 378 | CONFIG_IP_PNP_DHCP=y | ||
| 379 | CONFIG_IP_PNP_BOOTP=y | ||
| 380 | # CONFIG_IP_PNP_RARP is not set | ||
| 381 | # CONFIG_NET_IPIP is not set | ||
| 382 | # CONFIG_NET_IPGRE is not set | ||
| 383 | # CONFIG_IP_MROUTE is not set | ||
| 384 | # CONFIG_ARPD is not set | ||
| 385 | # CONFIG_SYN_COOKIES is not set | ||
| 386 | # CONFIG_INET_AH is not set | ||
| 387 | # CONFIG_INET_ESP is not set | ||
| 388 | # CONFIG_INET_IPCOMP is not set | ||
| 389 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
| 390 | # CONFIG_INET_TUNNEL is not set | ||
| 391 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
| 392 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
| 393 | CONFIG_INET_XFRM_MODE_BEET=y | ||
| 394 | CONFIG_INET_LRO=y | ||
| 395 | CONFIG_INET_DIAG=y | ||
| 396 | CONFIG_INET_TCP_DIAG=y | ||
| 397 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
| 398 | CONFIG_TCP_CONG_CUBIC=y | ||
| 399 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 400 | # CONFIG_TCP_MD5SIG is not set | ||
| 401 | # CONFIG_IPV6 is not set | ||
| 402 | # CONFIG_NETWORK_SECMARK is not set | ||
| 403 | # CONFIG_NETFILTER is not set | ||
| 404 | # CONFIG_IP_DCCP is not set | ||
| 405 | # CONFIG_IP_SCTP is not set | ||
| 406 | # CONFIG_RDS is not set | ||
| 407 | # CONFIG_TIPC is not set | ||
| 408 | # CONFIG_ATM is not set | ||
| 409 | # CONFIG_BRIDGE is not set | ||
| 410 | # CONFIG_NET_DSA is not set | ||
| 411 | # CONFIG_VLAN_8021Q is not set | ||
| 412 | # CONFIG_DECNET is not set | ||
| 413 | # CONFIG_LLC2 is not set | ||
| 414 | # CONFIG_IPX is not set | ||
| 415 | # CONFIG_ATALK is not set | ||
| 416 | # CONFIG_X25 is not set | ||
| 417 | # CONFIG_LAPB is not set | ||
| 418 | # CONFIG_ECONET is not set | ||
| 419 | # CONFIG_WAN_ROUTER is not set | ||
| 420 | # CONFIG_PHONET is not set | ||
| 421 | # CONFIG_IEEE802154 is not set | ||
| 422 | # CONFIG_NET_SCHED is not set | ||
| 423 | # CONFIG_DCB is not set | ||
| 424 | |||
| 425 | # | ||
| 426 | # Network testing | ||
| 427 | # | ||
| 428 | # CONFIG_NET_PKTGEN is not set | ||
| 429 | # CONFIG_HAMRADIO is not set | ||
| 430 | # CONFIG_CAN is not set | ||
| 431 | # CONFIG_IRDA is not set | ||
| 432 | # CONFIG_BT is not set | ||
| 433 | # CONFIG_AF_RXRPC is not set | ||
| 434 | CONFIG_WIRELESS=y | ||
| 435 | # CONFIG_CFG80211 is not set | ||
| 436 | CONFIG_CFG80211_DEFAULT_PS_VALUE=0 | ||
| 437 | # CONFIG_WIRELESS_OLD_REGULATORY is not set | ||
| 438 | # CONFIG_WIRELESS_EXT is not set | ||
| 439 | # CONFIG_LIB80211 is not set | ||
| 440 | |||
| 441 | # | ||
| 442 | # CFG80211 needs to be enabled for MAC80211 | ||
| 443 | # | ||
| 444 | # CONFIG_WIMAX is not set | ||
| 445 | # CONFIG_RFKILL is not set | ||
| 446 | # CONFIG_NET_9P is not set | ||
| 447 | |||
| 448 | # | ||
| 449 | # Device Drivers | ||
| 450 | # | ||
| 451 | |||
| 452 | # | ||
| 453 | # Generic Driver Options | ||
| 454 | # | ||
| 455 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
| 456 | # CONFIG_DEVTMPFS is not set | ||
| 457 | CONFIG_STANDALONE=y | ||
| 458 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 459 | CONFIG_FW_LOADER=y | ||
| 460 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
| 461 | CONFIG_EXTRA_FIRMWARE="" | ||
| 462 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 463 | # CONFIG_CONNECTOR is not set | ||
| 464 | # CONFIG_MTD is not set | ||
| 465 | # CONFIG_PARPORT is not set | ||
| 466 | CONFIG_BLK_DEV=y | ||
| 467 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 468 | CONFIG_BLK_DEV_LOOP=y | ||
| 469 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
| 470 | # CONFIG_BLK_DEV_NBD is not set | ||
| 471 | CONFIG_BLK_DEV_RAM=y | ||
| 472 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
| 473 | CONFIG_BLK_DEV_RAM_SIZE=8192 | ||
| 474 | # CONFIG_BLK_DEV_XIP is not set | ||
| 475 | # CONFIG_CDROM_PKTCDVD is not set | ||
| 476 | # CONFIG_ATA_OVER_ETH is not set | ||
| 477 | # CONFIG_MG_DISK is not set | ||
| 478 | CONFIG_MISC_DEVICES=y | ||
| 479 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
| 480 | # CONFIG_C2PORT is not set | ||
| 481 | |||
| 482 | # | ||
| 483 | # EEPROM support | ||
| 484 | # | ||
| 485 | # CONFIG_EEPROM_93CX6 is not set | ||
| 486 | CONFIG_HAVE_IDE=y | ||
| 487 | # CONFIG_IDE is not set | ||
| 488 | |||
| 489 | # | ||
| 490 | # SCSI device support | ||
| 491 | # | ||
| 492 | # CONFIG_RAID_ATTRS is not set | ||
| 493 | # CONFIG_SCSI is not set | ||
| 494 | # CONFIG_SCSI_DMA is not set | ||
| 495 | # CONFIG_SCSI_NETLINK is not set | ||
| 496 | # CONFIG_ATA is not set | ||
| 497 | # CONFIG_MD is not set | ||
| 498 | CONFIG_NETDEVICES=y | ||
| 499 | # CONFIG_DUMMY is not set | ||
| 500 | # CONFIG_BONDING is not set | ||
| 501 | # CONFIG_MACVLAN is not set | ||
| 502 | # CONFIG_EQUALIZER is not set | ||
| 503 | # CONFIG_TUN is not set | ||
| 504 | # CONFIG_VETH is not set | ||
| 505 | # CONFIG_PHYLIB is not set | ||
| 506 | CONFIG_NET_ETHERNET=y | ||
| 507 | CONFIG_MII=y | ||
| 508 | # CONFIG_AX88796 is not set | ||
| 509 | CONFIG_SMC91X=y | ||
| 510 | # CONFIG_DM9000 is not set | ||
| 511 | # CONFIG_ETHOC is not set | ||
| 512 | # CONFIG_SMC911X is not set | ||
| 513 | # CONFIG_SMSC911X is not set | ||
| 514 | # CONFIG_DNET is not set | ||
| 515 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
| 516 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
| 517 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
| 518 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
| 519 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
| 520 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
| 521 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
| 522 | # CONFIG_B44 is not set | ||
| 523 | # CONFIG_KS8842 is not set | ||
| 524 | # CONFIG_KS8851_MLL is not set | ||
| 525 | CONFIG_NETDEV_1000=y | ||
| 526 | CONFIG_NETDEV_10000=y | ||
| 527 | CONFIG_WLAN=y | ||
| 528 | # CONFIG_WLAN_PRE80211 is not set | ||
| 529 | # CONFIG_WLAN_80211 is not set | ||
| 530 | |||
| 531 | # | ||
| 532 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
| 533 | # | ||
| 534 | # CONFIG_WAN is not set | ||
| 535 | # CONFIG_PPP is not set | ||
| 536 | # CONFIG_SLIP is not set | ||
| 537 | # CONFIG_NETCONSOLE is not set | ||
| 538 | # CONFIG_NETPOLL is not set | ||
| 539 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
| 540 | # CONFIG_ISDN is not set | ||
| 541 | # CONFIG_PHONE is not set | ||
| 542 | |||
| 543 | # | ||
| 544 | # Input device support | ||
| 545 | # | ||
| 546 | CONFIG_INPUT=y | ||
| 547 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 548 | # CONFIG_INPUT_POLLDEV is not set | ||
| 549 | |||
| 550 | # | ||
| 551 | # Userland interfaces | ||
| 552 | # | ||
| 553 | CONFIG_INPUT_MOUSEDEV=y | ||
| 554 | CONFIG_INPUT_MOUSEDEV_PSAUX=y | ||
| 555 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
| 556 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
| 557 | # CONFIG_INPUT_JOYDEV is not set | ||
| 558 | # CONFIG_INPUT_EVDEV is not set | ||
| 559 | # CONFIG_INPUT_EVBUG is not set | ||
| 560 | |||
| 561 | # | ||
| 562 | # Input Device Drivers | ||
| 563 | # | ||
| 564 | CONFIG_INPUT_KEYBOARD=y | ||
| 565 | # CONFIG_KEYBOARD_ATKBD is not set | ||
| 566 | # CONFIG_KEYBOARD_LKKBD is not set | ||
| 567 | # CONFIG_KEYBOARD_GPIO is not set | ||
| 568 | # CONFIG_KEYBOARD_MATRIX is not set | ||
| 569 | # CONFIG_KEYBOARD_NEWTON is not set | ||
| 570 | # CONFIG_KEYBOARD_OPENCORES is not set | ||
| 571 | # CONFIG_KEYBOARD_STOWAWAY is not set | ||
| 572 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
| 573 | CONFIG_KEYBOARD_OMAP=y | ||
| 574 | # CONFIG_KEYBOARD_XTKBD is not set | ||
| 575 | # CONFIG_INPUT_MOUSE is not set | ||
| 576 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 577 | # CONFIG_INPUT_TABLET is not set | ||
| 578 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
| 579 | # CONFIG_INPUT_MISC is not set | ||
| 580 | |||
| 581 | # | ||
| 582 | # Hardware I/O ports | ||
| 583 | # | ||
| 584 | CONFIG_SERIO=y | ||
| 585 | CONFIG_SERIO_SERPORT=y | ||
| 586 | # CONFIG_SERIO_RAW is not set | ||
| 587 | # CONFIG_GAMEPORT is not set | ||
| 588 | |||
| 589 | # | ||
| 590 | # Character devices | ||
| 591 | # | ||
| 592 | CONFIG_VT=y | ||
| 593 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 594 | CONFIG_VT_CONSOLE=y | ||
| 595 | CONFIG_HW_CONSOLE=y | ||
| 596 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
| 597 | CONFIG_DEVKMEM=y | ||
| 598 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 599 | |||
| 600 | # | ||
| 601 | # Serial drivers | ||
| 602 | # | ||
| 603 | CONFIG_SERIAL_8250=m | ||
| 604 | CONFIG_SERIAL_8250_NR_UARTS=4 | ||
| 605 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
| 606 | # CONFIG_SERIAL_8250_EXTENDED is not set | ||
| 607 | |||
| 608 | # | ||
| 609 | # Non-8250 serial port support | ||
| 610 | # | ||
| 611 | CONFIG_SERIAL_CORE=m | ||
| 612 | CONFIG_UNIX98_PTYS=y | ||
| 613 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 614 | # CONFIG_LEGACY_PTYS is not set | ||
| 615 | # CONFIG_IPMI_HANDLER is not set | ||
| 616 | CONFIG_HW_RANDOM=m | ||
| 617 | # CONFIG_HW_RANDOM_TIMERIOMEM is not set | ||
| 618 | # CONFIG_R3964 is not set | ||
| 619 | # CONFIG_RAW_DRIVER is not set | ||
| 620 | # CONFIG_TCG_TPM is not set | ||
| 621 | # CONFIG_I2C is not set | ||
| 622 | # CONFIG_SPI is not set | ||
| 623 | |||
| 624 | # | ||
| 625 | # PPS support | ||
| 626 | # | ||
| 627 | # CONFIG_PPS is not set | ||
| 628 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
| 629 | CONFIG_GPIOLIB=y | ||
| 630 | # CONFIG_GPIO_SYSFS is not set | ||
| 631 | |||
| 632 | # | ||
| 633 | # Memory mapped GPIO expanders: | ||
| 634 | # | ||
| 635 | |||
| 636 | # | ||
| 637 | # I2C GPIO expanders: | ||
| 638 | # | ||
| 639 | |||
| 640 | # | ||
| 641 | # PCI GPIO expanders: | ||
| 642 | # | ||
| 643 | |||
| 644 | # | ||
| 645 | # SPI GPIO expanders: | ||
| 646 | # | ||
| 647 | |||
| 648 | # | ||
| 649 | # AC97 GPIO expanders: | ||
| 650 | # | ||
| 651 | # CONFIG_W1 is not set | ||
| 652 | # CONFIG_POWER_SUPPLY is not set | ||
| 653 | CONFIG_HWMON=y | ||
| 654 | # CONFIG_HWMON_VID is not set | ||
| 655 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
| 656 | |||
| 657 | # | ||
| 658 | # Native drivers | ||
| 659 | # | ||
| 660 | # CONFIG_SENSORS_F71805F is not set | ||
| 661 | # CONFIG_SENSORS_F71882FG is not set | ||
| 662 | # CONFIG_SENSORS_IT87 is not set | ||
| 663 | # CONFIG_SENSORS_PC87360 is not set | ||
| 664 | # CONFIG_SENSORS_PC87427 is not set | ||
| 665 | # CONFIG_SENSORS_SHT15 is not set | ||
| 666 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
| 667 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
| 668 | # CONFIG_SENSORS_VT1211 is not set | ||
| 669 | # CONFIG_SENSORS_W83627HF is not set | ||
| 670 | # CONFIG_SENSORS_W83627EHF is not set | ||
| 671 | # CONFIG_THERMAL is not set | ||
| 672 | # CONFIG_WATCHDOG is not set | ||
| 673 | CONFIG_SSB_POSSIBLE=y | ||
| 674 | |||
| 675 | # | ||
| 676 | # Sonics Silicon Backplane | ||
| 677 | # | ||
| 678 | # CONFIG_SSB is not set | ||
| 679 | |||
| 680 | # | ||
| 681 | # Multifunction device drivers | ||
| 682 | # | ||
| 683 | # CONFIG_MFD_CORE is not set | ||
| 684 | # CONFIG_MFD_SM501 is not set | ||
| 685 | # CONFIG_MFD_ASIC3 is not set | ||
| 686 | # CONFIG_HTC_EGPIO is not set | ||
| 687 | # CONFIG_HTC_PASIC3 is not set | ||
| 688 | # CONFIG_MFD_TMIO is not set | ||
| 689 | # CONFIG_MFD_T7L66XB is not set | ||
| 690 | # CONFIG_MFD_TC6387XB is not set | ||
| 691 | # CONFIG_MFD_TC6393XB is not set | ||
| 692 | # CONFIG_REGULATOR is not set | ||
| 693 | # CONFIG_MEDIA_SUPPORT is not set | ||
| 694 | |||
| 695 | # | ||
| 696 | # Graphics support | ||
| 697 | # | ||
| 698 | # CONFIG_VGASTATE is not set | ||
| 699 | CONFIG_VIDEO_OUTPUT_CONTROL=m | ||
| 700 | CONFIG_FB=y | ||
| 701 | # CONFIG_FIRMWARE_EDID is not set | ||
| 702 | # CONFIG_FB_DDC is not set | ||
| 703 | # CONFIG_FB_BOOT_VESA_SUPPORT is not set | ||
| 704 | CONFIG_FB_CFB_FILLRECT=y | ||
| 705 | CONFIG_FB_CFB_COPYAREA=y | ||
| 706 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
| 707 | # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
| 708 | # CONFIG_FB_SYS_FILLRECT is not set | ||
| 709 | # CONFIG_FB_SYS_COPYAREA is not set | ||
| 710 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
| 711 | # CONFIG_FB_FOREIGN_ENDIAN is not set | ||
| 712 | # CONFIG_FB_SYS_FOPS is not set | ||
| 713 | # CONFIG_FB_SVGALIB is not set | ||
| 714 | # CONFIG_FB_MACMODES is not set | ||
| 715 | # CONFIG_FB_BACKLIGHT is not set | ||
| 716 | CONFIG_FB_MODE_HELPERS=y | ||
| 717 | # CONFIG_FB_TILEBLITTING is not set | ||
| 718 | |||
| 719 | # | ||
| 720 | # Frame buffer hardware drivers | ||
| 721 | # | ||
| 722 | # CONFIG_FB_S1D13XXX is not set | ||
| 723 | # CONFIG_FB_VIRTUAL is not set | ||
| 724 | # CONFIG_FB_METRONOME is not set | ||
| 725 | # CONFIG_FB_MB862XX is not set | ||
| 726 | # CONFIG_FB_BROADSHEET is not set | ||
| 727 | CONFIG_FB_OMAP=y | ||
| 728 | # CONFIG_FB_OMAP_LCDC_EXTERNAL is not set | ||
| 729 | # CONFIG_FB_OMAP_BOOTLOADER_INIT is not set | ||
| 730 | CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE=2 | ||
| 731 | # CONFIG_FB_OMAP_DMA_TUNE is not set | ||
| 732 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 733 | |||
| 734 | # | ||
| 735 | # Display device support | ||
| 736 | # | ||
| 737 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 738 | |||
| 739 | # | ||
| 740 | # Console display driver support | ||
| 741 | # | ||
| 742 | # CONFIG_VGA_CONSOLE is not set | ||
| 743 | CONFIG_DUMMY_CONSOLE=y | ||
| 744 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
| 745 | # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | ||
| 746 | CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y | ||
| 747 | CONFIG_FONTS=y | ||
| 748 | # CONFIG_FONT_8x8 is not set | ||
| 749 | # CONFIG_FONT_8x16 is not set | ||
| 750 | # CONFIG_FONT_6x11 is not set | ||
| 751 | # CONFIG_FONT_7x14 is not set | ||
| 752 | # CONFIG_FONT_PEARL_8x8 is not set | ||
| 753 | # CONFIG_FONT_ACORN_8x8 is not set | ||
| 754 | CONFIG_FONT_MINI_4x6=y | ||
| 755 | # CONFIG_FONT_SUN8x16 is not set | ||
| 756 | # CONFIG_FONT_SUN12x22 is not set | ||
| 757 | # CONFIG_FONT_10x18 is not set | ||
| 758 | # CONFIG_LOGO is not set | ||
| 759 | # CONFIG_SOUND is not set | ||
| 760 | CONFIG_HID_SUPPORT=y | ||
| 761 | CONFIG_HID=y | ||
| 762 | # CONFIG_HIDRAW is not set | ||
| 763 | # CONFIG_HID_PID is not set | ||
| 764 | |||
| 765 | # | ||
| 766 | # Special HID drivers | ||
| 767 | # | ||
| 768 | CONFIG_USB_SUPPORT=y | ||
| 769 | CONFIG_USB_ARCH_HAS_HCD=y | ||
| 770 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
| 771 | # CONFIG_USB_ARCH_HAS_EHCI is not set | ||
| 772 | # CONFIG_USB is not set | ||
| 773 | # CONFIG_USB_MUSB_HDRC is not set | ||
| 774 | # CONFIG_USB_GADGET_MUSB_HDRC is not set | ||
| 775 | |||
| 776 | # | ||
| 777 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | ||
| 778 | # | ||
| 779 | CONFIG_USB_GADGET=y | ||
| 780 | # CONFIG_USB_GADGET_DEBUG_FILES is not set | ||
| 781 | CONFIG_USB_GADGET_VBUS_DRAW=2 | ||
| 782 | CONFIG_USB_GADGET_SELECTED=y | ||
| 783 | # CONFIG_USB_GADGET_AT91 is not set | ||
| 784 | # CONFIG_USB_GADGET_ATMEL_USBA is not set | ||
| 785 | # CONFIG_USB_GADGET_FSL_USB2 is not set | ||
| 786 | # CONFIG_USB_GADGET_LH7A40X is not set | ||
| 787 | CONFIG_USB_GADGET_OMAP=y | ||
| 788 | CONFIG_USB_OMAP=y | ||
| 789 | # CONFIG_USB_GADGET_PXA25X is not set | ||
| 790 | # CONFIG_USB_GADGET_R8A66597 is not set | ||
| 791 | # CONFIG_USB_GADGET_PXA27X is not set | ||
| 792 | # CONFIG_USB_GADGET_S3C_HSOTG is not set | ||
| 793 | # CONFIG_USB_GADGET_IMX is not set | ||
| 794 | # CONFIG_USB_GADGET_S3C2410 is not set | ||
| 795 | # CONFIG_USB_GADGET_M66592 is not set | ||
| 796 | # CONFIG_USB_GADGET_AMD5536UDC is not set | ||
| 797 | # CONFIG_USB_GADGET_FSL_QE is not set | ||
| 798 | # CONFIG_USB_GADGET_CI13XXX is not set | ||
| 799 | # CONFIG_USB_GADGET_NET2280 is not set | ||
| 800 | # CONFIG_USB_GADGET_GOKU is not set | ||
| 801 | # CONFIG_USB_GADGET_LANGWELL is not set | ||
| 802 | # CONFIG_USB_GADGET_DUMMY_HCD is not set | ||
| 803 | # CONFIG_USB_GADGET_DUALSPEED is not set | ||
| 804 | # CONFIG_USB_ZERO is not set | ||
| 805 | # CONFIG_USB_AUDIO is not set | ||
| 806 | CONFIG_USB_ETH=y | ||
| 807 | # CONFIG_USB_ETH_RNDIS is not set | ||
| 808 | # CONFIG_USB_ETH_EEM is not set | ||
| 809 | # CONFIG_USB_GADGETFS is not set | ||
| 810 | # CONFIG_USB_FILE_STORAGE is not set | ||
| 811 | # CONFIG_USB_G_SERIAL is not set | ||
| 812 | # CONFIG_USB_MIDI_GADGET is not set | ||
| 813 | # CONFIG_USB_G_PRINTER is not set | ||
| 814 | # CONFIG_USB_CDC_COMPOSITE is not set | ||
| 815 | |||
| 816 | # | ||
| 817 | # OTG and related infrastructure | ||
| 818 | # | ||
| 819 | CONFIG_USB_OTG_UTILS=y | ||
| 820 | # CONFIG_USB_GPIO_VBUS is not set | ||
| 821 | # CONFIG_NOP_USB_XCEIV is not set | ||
| 822 | CONFIG_MMC=y | ||
| 823 | # CONFIG_MMC_DEBUG is not set | ||
| 824 | # CONFIG_MMC_UNSAFE_RESUME is not set | ||
| 825 | |||
| 826 | # | ||
| 827 | # MMC/SD/SDIO Card Drivers | ||
| 828 | # | ||
| 829 | CONFIG_MMC_BLOCK=y | ||
| 830 | CONFIG_MMC_BLOCK_BOUNCE=y | ||
| 831 | # CONFIG_SDIO_UART is not set | ||
| 832 | # CONFIG_MMC_TEST is not set | ||
| 833 | |||
| 834 | # | ||
| 835 | # MMC/SD/SDIO Host Controller Drivers | ||
| 836 | # | ||
| 837 | CONFIG_MMC_SDHCI=y | ||
| 838 | CONFIG_MMC_SDHCI_PLTFM=y | ||
| 839 | CONFIG_MMC_OMAP=y | ||
| 840 | # CONFIG_MMC_AT91 is not set | ||
| 841 | # CONFIG_MMC_ATMELMCI is not set | ||
| 842 | # CONFIG_MEMSTICK is not set | ||
| 843 | # CONFIG_NEW_LEDS is not set | ||
| 844 | # CONFIG_ACCESSIBILITY is not set | ||
| 845 | CONFIG_RTC_LIB=y | ||
| 846 | CONFIG_RTC_CLASS=y | ||
| 847 | CONFIG_RTC_HCTOSYS=y | ||
| 848 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
| 849 | # CONFIG_RTC_DEBUG is not set | ||
| 850 | |||
| 851 | # | ||
| 852 | # RTC interfaces | ||
| 853 | # | ||
| 854 | CONFIG_RTC_INTF_SYSFS=y | ||
| 855 | CONFIG_RTC_INTF_PROC=y | ||
| 856 | CONFIG_RTC_INTF_DEV=y | ||
| 857 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
| 858 | # CONFIG_RTC_DRV_TEST is not set | ||
| 859 | |||
| 860 | # | ||
| 861 | # SPI RTC drivers | ||
| 862 | # | ||
| 863 | |||
| 864 | # | ||
| 865 | # Platform RTC drivers | ||
| 866 | # | ||
| 867 | # CONFIG_RTC_DRV_CMOS is not set | ||
| 868 | # CONFIG_RTC_DRV_DS1286 is not set | ||
| 869 | # CONFIG_RTC_DRV_DS1511 is not set | ||
| 870 | # CONFIG_RTC_DRV_DS1553 is not set | ||
| 871 | # CONFIG_RTC_DRV_DS1742 is not set | ||
| 872 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
| 873 | # CONFIG_RTC_DRV_M48T86 is not set | ||
| 874 | # CONFIG_RTC_DRV_M48T35 is not set | ||
| 875 | # CONFIG_RTC_DRV_M48T59 is not set | ||
| 876 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
| 877 | # CONFIG_RTC_DRV_V3020 is not set | ||
| 878 | |||
| 879 | # | ||
| 880 | # on-CPU RTC drivers | ||
| 881 | # | ||
| 882 | # CONFIG_DMADEVICES is not set | ||
| 883 | # CONFIG_AUXDISPLAY is not set | ||
| 884 | # CONFIG_UIO is not set | ||
| 885 | |||
| 886 | # | ||
| 887 | # TI VLYNQ | ||
| 888 | # | ||
| 889 | # CONFIG_STAGING is not set | ||
| 890 | |||
| 891 | # | ||
| 892 | # File systems | ||
| 893 | # | ||
| 894 | CONFIG_EXT2_FS=y | ||
| 895 | # CONFIG_EXT2_FS_XATTR is not set | ||
| 896 | # CONFIG_EXT2_FS_XIP is not set | ||
| 897 | CONFIG_EXT3_FS=y | ||
| 898 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 899 | CONFIG_EXT3_FS_XATTR=y | ||
| 900 | # CONFIG_EXT3_FS_POSIX_ACL is not set | ||
| 901 | # CONFIG_EXT3_FS_SECURITY is not set | ||
| 902 | # CONFIG_EXT4_FS is not set | ||
| 903 | CONFIG_JBD=y | ||
| 904 | CONFIG_FS_MBCACHE=y | ||
| 905 | # CONFIG_REISERFS_FS is not set | ||
| 906 | # CONFIG_JFS_FS is not set | ||
| 907 | # CONFIG_FS_POSIX_ACL is not set | ||
| 908 | # CONFIG_XFS_FS is not set | ||
| 909 | # CONFIG_GFS2_FS is not set | ||
| 910 | # CONFIG_OCFS2_FS is not set | ||
| 911 | # CONFIG_BTRFS_FS is not set | ||
| 912 | # CONFIG_NILFS2_FS is not set | ||
| 913 | CONFIG_FILE_LOCKING=y | ||
| 914 | CONFIG_FSNOTIFY=y | ||
| 915 | CONFIG_DNOTIFY=y | ||
| 916 | CONFIG_INOTIFY=y | ||
| 917 | CONFIG_INOTIFY_USER=y | ||
| 918 | # CONFIG_QUOTA is not set | ||
| 919 | # CONFIG_AUTOFS_FS is not set | ||
| 920 | # CONFIG_AUTOFS4_FS is not set | ||
| 921 | # CONFIG_FUSE_FS is not set | ||
| 922 | |||
| 923 | # | ||
| 924 | # Caches | ||
| 925 | # | ||
| 926 | # CONFIG_FSCACHE is not set | ||
| 927 | |||
| 928 | # | ||
| 929 | # CD-ROM/DVD Filesystems | ||
| 930 | # | ||
| 931 | # CONFIG_ISO9660_FS is not set | ||
| 932 | # CONFIG_UDF_FS is not set | ||
| 933 | |||
| 934 | # | ||
| 935 | # DOS/FAT/NT Filesystems | ||
| 936 | # | ||
| 937 | # CONFIG_MSDOS_FS is not set | ||
| 938 | # CONFIG_VFAT_FS is not set | ||
| 939 | # CONFIG_NTFS_FS is not set | ||
| 940 | |||
| 941 | # | ||
| 942 | # Pseudo filesystems | ||
| 943 | # | ||
| 944 | CONFIG_PROC_FS=y | ||
| 945 | CONFIG_PROC_SYSCTL=y | ||
| 946 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 947 | CONFIG_SYSFS=y | ||
| 948 | CONFIG_TMPFS=y | ||
| 949 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
| 950 | # CONFIG_HUGETLB_PAGE is not set | ||
| 951 | # CONFIG_CONFIGFS_FS is not set | ||
| 952 | CONFIG_MISC_FILESYSTEMS=y | ||
| 953 | # CONFIG_ADFS_FS is not set | ||
| 954 | # CONFIG_AFFS_FS is not set | ||
| 955 | # CONFIG_HFS_FS is not set | ||
| 956 | # CONFIG_HFSPLUS_FS is not set | ||
| 957 | # CONFIG_BEFS_FS is not set | ||
| 958 | # CONFIG_BFS_FS is not set | ||
| 959 | # CONFIG_EFS_FS is not set | ||
| 960 | # CONFIG_CRAMFS is not set | ||
| 961 | # CONFIG_SQUASHFS is not set | ||
| 962 | # CONFIG_VXFS_FS is not set | ||
| 963 | # CONFIG_MINIX_FS is not set | ||
| 964 | # CONFIG_OMFS_FS is not set | ||
| 965 | # CONFIG_HPFS_FS is not set | ||
| 966 | # CONFIG_QNX4FS_FS is not set | ||
| 967 | # CONFIG_ROMFS_FS is not set | ||
| 968 | # CONFIG_SYSV_FS is not set | ||
| 969 | # CONFIG_UFS_FS is not set | ||
| 970 | CONFIG_NETWORK_FILESYSTEMS=y | ||
| 971 | CONFIG_NFS_FS=y | ||
| 972 | # CONFIG_NFS_V3 is not set | ||
| 973 | # CONFIG_NFS_V4 is not set | ||
| 974 | CONFIG_ROOT_NFS=y | ||
| 975 | # CONFIG_NFSD is not set | ||
| 976 | CONFIG_LOCKD=y | ||
| 977 | CONFIG_NFS_COMMON=y | ||
| 978 | CONFIG_SUNRPC=y | ||
| 979 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
| 980 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
| 981 | # CONFIG_SMB_FS is not set | ||
| 982 | # CONFIG_CIFS is not set | ||
| 983 | # CONFIG_NCP_FS is not set | ||
| 984 | # CONFIG_CODA_FS is not set | ||
| 985 | # CONFIG_AFS_FS is not set | ||
| 986 | |||
| 987 | # | ||
| 988 | # Partition Types | ||
| 989 | # | ||
| 990 | # CONFIG_PARTITION_ADVANCED is not set | ||
| 991 | CONFIG_MSDOS_PARTITION=y | ||
| 992 | # CONFIG_NLS is not set | ||
| 993 | # CONFIG_DLM is not set | ||
| 994 | |||
| 995 | # | ||
| 996 | # Kernel hacking | ||
| 997 | # | ||
| 998 | # CONFIG_PRINTK_TIME is not set | ||
| 999 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 1000 | CONFIG_ENABLE_MUST_CHECK=y | ||
| 1001 | CONFIG_FRAME_WARN=1024 | ||
| 1002 | # CONFIG_MAGIC_SYSRQ is not set | ||
| 1003 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 1004 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 1005 | # CONFIG_DEBUG_FS is not set | ||
| 1006 | # CONFIG_HEADERS_CHECK is not set | ||
| 1007 | # CONFIG_DEBUG_KERNEL is not set | ||
| 1008 | CONFIG_DEBUG_BUGVERBOSE=y | ||
| 1009 | CONFIG_DEBUG_MEMORY_INIT=y | ||
| 1010 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 1011 | # CONFIG_LATENCYTOP is not set | ||
| 1012 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
| 1013 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 1014 | CONFIG_TRACING_SUPPORT=y | ||
| 1015 | # CONFIG_FTRACE is not set | ||
| 1016 | # CONFIG_SAMPLES is not set | ||
| 1017 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 1018 | CONFIG_ARM_UNWIND=y | ||
| 1019 | # CONFIG_DEBUG_USER is not set | ||
| 1020 | |||
| 1021 | # | ||
| 1022 | # Security options | ||
| 1023 | # | ||
| 1024 | # CONFIG_KEYS is not set | ||
| 1025 | # CONFIG_SECURITY is not set | ||
| 1026 | # CONFIG_SECURITYFS is not set | ||
| 1027 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
| 1028 | CONFIG_CRYPTO=y | ||
| 1029 | |||
| 1030 | # | ||
| 1031 | # Crypto core or helper | ||
| 1032 | # | ||
| 1033 | CONFIG_CRYPTO_ALGAPI=y | ||
| 1034 | CONFIG_CRYPTO_ALGAPI2=y | ||
| 1035 | CONFIG_CRYPTO_PCOMP=y | ||
| 1036 | # CONFIG_CRYPTO_MANAGER is not set | ||
| 1037 | # CONFIG_CRYPTO_MANAGER2 is not set | ||
| 1038 | # CONFIG_CRYPTO_GF128MUL is not set | ||
| 1039 | # CONFIG_CRYPTO_NULL is not set | ||
| 1040 | # CONFIG_CRYPTO_CRYPTD is not set | ||
| 1041 | # CONFIG_CRYPTO_AUTHENC is not set | ||
| 1042 | # CONFIG_CRYPTO_TEST is not set | ||
| 1043 | |||
| 1044 | # | ||
| 1045 | # Authenticated Encryption with Associated Data | ||
| 1046 | # | ||
| 1047 | # CONFIG_CRYPTO_CCM is not set | ||
| 1048 | # CONFIG_CRYPTO_GCM is not set | ||
| 1049 | # CONFIG_CRYPTO_SEQIV is not set | ||
| 1050 | |||
| 1051 | # | ||
| 1052 | # Block modes | ||
| 1053 | # | ||
| 1054 | # CONFIG_CRYPTO_CBC is not set | ||
| 1055 | # CONFIG_CRYPTO_CTR is not set | ||
| 1056 | # CONFIG_CRYPTO_CTS is not set | ||
| 1057 | # CONFIG_CRYPTO_ECB is not set | ||
| 1058 | # CONFIG_CRYPTO_LRW is not set | ||
| 1059 | # CONFIG_CRYPTO_PCBC is not set | ||
| 1060 | # CONFIG_CRYPTO_XTS is not set | ||
| 1061 | |||
| 1062 | # | ||
| 1063 | # Hash modes | ||
| 1064 | # | ||
| 1065 | # CONFIG_CRYPTO_HMAC is not set | ||
| 1066 | # CONFIG_CRYPTO_XCBC is not set | ||
| 1067 | # CONFIG_CRYPTO_VMAC is not set | ||
| 1068 | |||
| 1069 | # | ||
| 1070 | # Digest | ||
| 1071 | # | ||
| 1072 | # CONFIG_CRYPTO_CRC32C is not set | ||
| 1073 | # CONFIG_CRYPTO_GHASH is not set | ||
| 1074 | # CONFIG_CRYPTO_MD4 is not set | ||
| 1075 | # CONFIG_CRYPTO_MD5 is not set | ||
| 1076 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
| 1077 | # CONFIG_CRYPTO_RMD128 is not set | ||
| 1078 | # CONFIG_CRYPTO_RMD160 is not set | ||
| 1079 | # CONFIG_CRYPTO_RMD256 is not set | ||
| 1080 | # CONFIG_CRYPTO_RMD320 is not set | ||
| 1081 | # CONFIG_CRYPTO_SHA1 is not set | ||
| 1082 | # CONFIG_CRYPTO_SHA256 is not set | ||
| 1083 | # CONFIG_CRYPTO_SHA512 is not set | ||
| 1084 | # CONFIG_CRYPTO_TGR192 is not set | ||
| 1085 | # CONFIG_CRYPTO_WP512 is not set | ||
| 1086 | |||
| 1087 | # | ||
| 1088 | # Ciphers | ||
| 1089 | # | ||
| 1090 | # CONFIG_CRYPTO_AES is not set | ||
| 1091 | # CONFIG_CRYPTO_ANUBIS is not set | ||
| 1092 | # CONFIG_CRYPTO_ARC4 is not set | ||
| 1093 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
| 1094 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
| 1095 | # CONFIG_CRYPTO_CAST5 is not set | ||
| 1096 | # CONFIG_CRYPTO_CAST6 is not set | ||
| 1097 | # CONFIG_CRYPTO_DES is not set | ||
| 1098 | # CONFIG_CRYPTO_FCRYPT is not set | ||
| 1099 | # CONFIG_CRYPTO_KHAZAD is not set | ||
| 1100 | # CONFIG_CRYPTO_SALSA20 is not set | ||
| 1101 | # CONFIG_CRYPTO_SEED is not set | ||
| 1102 | # CONFIG_CRYPTO_SERPENT is not set | ||
| 1103 | # CONFIG_CRYPTO_TEA is not set | ||
| 1104 | # CONFIG_CRYPTO_TWOFISH is not set | ||
| 1105 | |||
| 1106 | # | ||
| 1107 | # Compression | ||
| 1108 | # | ||
| 1109 | CONFIG_CRYPTO_DEFLATE=y | ||
| 1110 | CONFIG_CRYPTO_ZLIB=y | ||
| 1111 | CONFIG_CRYPTO_LZO=y | ||
| 1112 | |||
| 1113 | # | ||
| 1114 | # Random Number Generation | ||
| 1115 | # | ||
| 1116 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
| 1117 | CONFIG_CRYPTO_HW=y | ||
| 1118 | # CONFIG_BINARY_PRINTF is not set | ||
| 1119 | |||
| 1120 | # | ||
| 1121 | # Library routines | ||
| 1122 | # | ||
| 1123 | CONFIG_BITREVERSE=y | ||
| 1124 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
| 1125 | # CONFIG_CRC_CCITT is not set | ||
| 1126 | # CONFIG_CRC16 is not set | ||
| 1127 | # CONFIG_CRC_T10DIF is not set | ||
| 1128 | # CONFIG_CRC_ITU_T is not set | ||
| 1129 | CONFIG_CRC32=y | ||
| 1130 | # CONFIG_CRC7 is not set | ||
| 1131 | # CONFIG_LIBCRC32C is not set | ||
| 1132 | CONFIG_ZLIB_INFLATE=y | ||
| 1133 | CONFIG_ZLIB_DEFLATE=y | ||
| 1134 | CONFIG_LZO_COMPRESS=y | ||
| 1135 | CONFIG_LZO_DECOMPRESS=y | ||
| 1136 | CONFIG_DECOMPRESS_GZIP=y | ||
| 1137 | CONFIG_DECOMPRESS_BZIP2=y | ||
| 1138 | CONFIG_DECOMPRESS_LZMA=y | ||
| 1139 | CONFIG_HAS_IOMEM=y | ||
| 1140 | CONFIG_HAS_IOPORT=y | ||
| 1141 | CONFIG_HAS_DMA=y | ||
| 1142 | CONFIG_NLATTR=y | ||
diff --git a/arch/arm/configs/igep0020_defconfig b/arch/arm/configs/igep0020_defconfig new file mode 100644 index 00000000000..c97f8d0ded4 --- /dev/null +++ b/arch/arm/configs/igep0020_defconfig | |||
| @@ -0,0 +1,1554 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.32-rc6 | ||
| 4 | # Fri Nov 13 12:01:17 2009 | ||
| 5 | # | ||
| 6 | CONFIG_ARM=y | ||
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
| 8 | CONFIG_GENERIC_GPIO=y | ||
| 9 | CONFIG_GENERIC_TIME=y | ||
| 10 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 11 | CONFIG_GENERIC_HARDIRQS=y | ||
| 12 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 13 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 14 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 15 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 16 | CONFIG_HARDIRQS_SW_RESEND=y | ||
| 17 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 18 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 19 | CONFIG_ARCH_HAS_CPUFREQ=y | ||
| 20 | CONFIG_GENERIC_HWEIGHT=y | ||
| 21 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
| 22 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 23 | CONFIG_VECTORS_BASE=0xffff0000 | ||
| 24 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 25 | CONFIG_CONSTRUCTORS=y | ||
| 26 | |||
| 27 | # | ||
| 28 | # General setup | ||
| 29 | # | ||
| 30 | CONFIG_EXPERIMENTAL=y | ||
| 31 | CONFIG_BROKEN_ON_SMP=y | ||
| 32 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 33 | CONFIG_LOCALVERSION="" | ||
| 34 | # CONFIG_LOCALVERSION_AUTO is not set | ||
| 35 | CONFIG_SWAP=y | ||
| 36 | CONFIG_SYSVIPC=y | ||
| 37 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 38 | # CONFIG_POSIX_MQUEUE is not set | ||
| 39 | CONFIG_BSD_PROCESS_ACCT=y | ||
| 40 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set | ||
| 41 | # CONFIG_TASKSTATS is not set | ||
| 42 | # CONFIG_AUDIT is not set | ||
| 43 | |||
| 44 | # | ||
| 45 | # RCU Subsystem | ||
| 46 | # | ||
| 47 | CONFIG_TREE_RCU=y | ||
| 48 | # CONFIG_TREE_PREEMPT_RCU is not set | ||
| 49 | # CONFIG_RCU_TRACE is not set | ||
| 50 | CONFIG_RCU_FANOUT=32 | ||
| 51 | # CONFIG_RCU_FANOUT_EXACT is not set | ||
| 52 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 53 | # CONFIG_IKCONFIG is not set | ||
| 54 | CONFIG_LOG_BUF_SHIFT=17 | ||
| 55 | CONFIG_GROUP_SCHED=y | ||
| 56 | CONFIG_FAIR_GROUP_SCHED=y | ||
| 57 | # CONFIG_RT_GROUP_SCHED is not set | ||
| 58 | CONFIG_USER_SCHED=y | ||
| 59 | # CONFIG_CGROUP_SCHED is not set | ||
| 60 | # CONFIG_CGROUPS is not set | ||
| 61 | # CONFIG_SYSFS_DEPRECATED_V2 is not set | ||
| 62 | # CONFIG_RELAY is not set | ||
| 63 | # CONFIG_NAMESPACES is not set | ||
| 64 | CONFIG_BLK_DEV_INITRD=y | ||
| 65 | CONFIG_INITRAMFS_SOURCE="" | ||
| 66 | CONFIG_RD_GZIP=y | ||
| 67 | # CONFIG_RD_BZIP2 is not set | ||
| 68 | # CONFIG_RD_LZMA is not set | ||
| 69 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 70 | CONFIG_SYSCTL=y | ||
| 71 | CONFIG_ANON_INODES=y | ||
| 72 | CONFIG_EMBEDDED=y | ||
| 73 | CONFIG_UID16=y | ||
| 74 | # CONFIG_SYSCTL_SYSCALL is not set | ||
| 75 | CONFIG_KALLSYMS=y | ||
| 76 | # CONFIG_KALLSYMS_ALL is not set | ||
| 77 | CONFIG_KALLSYMS_EXTRA_PASS=y | ||
| 78 | CONFIG_HOTPLUG=y | ||
| 79 | CONFIG_PRINTK=y | ||
| 80 | CONFIG_BUG=y | ||
| 81 | CONFIG_ELF_CORE=y | ||
| 82 | CONFIG_BASE_FULL=y | ||
| 83 | CONFIG_FUTEX=y | ||
| 84 | CONFIG_EPOLL=y | ||
| 85 | CONFIG_SIGNALFD=y | ||
| 86 | CONFIG_TIMERFD=y | ||
| 87 | CONFIG_EVENTFD=y | ||
| 88 | CONFIG_SHMEM=y | ||
| 89 | CONFIG_AIO=y | ||
| 90 | |||
| 91 | # | ||
| 92 | # Kernel Performance Events And Counters | ||
| 93 | # | ||
| 94 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 95 | CONFIG_COMPAT_BRK=y | ||
| 96 | CONFIG_SLAB=y | ||
| 97 | # CONFIG_SLUB is not set | ||
| 98 | # CONFIG_SLOB is not set | ||
| 99 | # CONFIG_PROFILING is not set | ||
| 100 | CONFIG_HAVE_OPROFILE=y | ||
| 101 | # CONFIG_KPROBES is not set | ||
| 102 | CONFIG_HAVE_KPROBES=y | ||
| 103 | CONFIG_HAVE_KRETPROBES=y | ||
| 104 | CONFIG_HAVE_CLK=y | ||
| 105 | |||
| 106 | # | ||
| 107 | # GCOV-based kernel profiling | ||
| 108 | # | ||
| 109 | # CONFIG_SLOW_WORK is not set | ||
| 110 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 111 | CONFIG_SLABINFO=y | ||
| 112 | CONFIG_RT_MUTEXES=y | ||
| 113 | CONFIG_BASE_SMALL=0 | ||
| 114 | CONFIG_MODULES=y | ||
| 115 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 116 | CONFIG_MODULE_UNLOAD=y | ||
| 117 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
| 118 | # CONFIG_MODVERSIONS is not set | ||
| 119 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
| 120 | CONFIG_BLOCK=y | ||
| 121 | CONFIG_LBDAF=y | ||
| 122 | # CONFIG_BLK_DEV_BSG is not set | ||
| 123 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 124 | |||
| 125 | # | ||
| 126 | # IO Schedulers | ||
| 127 | # | ||
| 128 | CONFIG_IOSCHED_NOOP=y | ||
| 129 | CONFIG_IOSCHED_AS=y | ||
| 130 | CONFIG_IOSCHED_DEADLINE=y | ||
| 131 | CONFIG_IOSCHED_CFQ=y | ||
| 132 | CONFIG_DEFAULT_AS=y | ||
| 133 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 134 | # CONFIG_DEFAULT_CFQ is not set | ||
| 135 | # CONFIG_DEFAULT_NOOP is not set | ||
| 136 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
| 137 | # CONFIG_FREEZER is not set | ||
| 138 | |||
| 139 | # | ||
| 140 | # System Type | ||
| 141 | # | ||
| 142 | CONFIG_MMU=y | ||
| 143 | # CONFIG_ARCH_AAEC2000 is not set | ||
| 144 | # CONFIG_ARCH_INTEGRATOR is not set | ||
| 145 | # CONFIG_ARCH_REALVIEW is not set | ||
| 146 | # CONFIG_ARCH_VERSATILE is not set | ||
| 147 | # CONFIG_ARCH_AT91 is not set | ||
| 148 | # CONFIG_ARCH_CLPS711X is not set | ||
| 149 | # CONFIG_ARCH_GEMINI is not set | ||
| 150 | # CONFIG_ARCH_EBSA110 is not set | ||
| 151 | # CONFIG_ARCH_EP93XX is not set | ||
| 152 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
| 153 | # CONFIG_ARCH_MXC is not set | ||
| 154 | # CONFIG_ARCH_STMP3XXX is not set | ||
| 155 | # CONFIG_ARCH_NETX is not set | ||
| 156 | # CONFIG_ARCH_H720X is not set | ||
| 157 | # CONFIG_ARCH_NOMADIK is not set | ||
| 158 | # CONFIG_ARCH_IOP13XX is not set | ||
| 159 | # CONFIG_ARCH_IOP32X is not set | ||
| 160 | # CONFIG_ARCH_IOP33X is not set | ||
| 161 | # CONFIG_ARCH_IXP23XX is not set | ||
| 162 | # CONFIG_ARCH_IXP2000 is not set | ||
| 163 | # CONFIG_ARCH_IXP4XX is not set | ||
| 164 | # CONFIG_ARCH_L7200 is not set | ||
| 165 | # CONFIG_ARCH_KIRKWOOD is not set | ||
| 166 | # CONFIG_ARCH_LOKI is not set | ||
| 167 | # CONFIG_ARCH_MV78XX0 is not set | ||
| 168 | # CONFIG_ARCH_ORION5X is not set | ||
| 169 | # CONFIG_ARCH_MMP is not set | ||
| 170 | # CONFIG_ARCH_KS8695 is not set | ||
| 171 | # CONFIG_ARCH_NS9XXX is not set | ||
| 172 | # CONFIG_ARCH_W90X900 is not set | ||
| 173 | # CONFIG_ARCH_PNX4008 is not set | ||
| 174 | # CONFIG_ARCH_PXA is not set | ||
| 175 | # CONFIG_ARCH_MSM is not set | ||
| 176 | # CONFIG_ARCH_RPC is not set | ||
| 177 | # CONFIG_ARCH_SA1100 is not set | ||
| 178 | # CONFIG_ARCH_S3C2410 is not set | ||
| 179 | # CONFIG_ARCH_S3C64XX is not set | ||
| 180 | # CONFIG_ARCH_S5PC1XX is not set | ||
| 181 | # CONFIG_ARCH_SHARK is not set | ||
| 182 | # CONFIG_ARCH_LH7A40X is not set | ||
| 183 | # CONFIG_ARCH_U300 is not set | ||
| 184 | # CONFIG_ARCH_DAVINCI is not set | ||
| 185 | CONFIG_ARCH_OMAP=y | ||
| 186 | # CONFIG_ARCH_BCMRING is not set | ||
| 187 | |||
| 188 | # | ||
| 189 | # TI OMAP Implementations | ||
| 190 | # | ||
| 191 | CONFIG_ARCH_OMAP_OTG=y | ||
| 192 | # CONFIG_ARCH_OMAP1 is not set | ||
| 193 | # CONFIG_ARCH_OMAP2 is not set | ||
| 194 | CONFIG_ARCH_OMAP3=y | ||
| 195 | # CONFIG_ARCH_OMAP4 is not set | ||
| 196 | |||
| 197 | # | ||
| 198 | # OMAP Feature Selections | ||
| 199 | # | ||
| 200 | # CONFIG_OMAP_DEBUG_POWERDOMAIN is not set | ||
| 201 | # CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set | ||
| 202 | # CONFIG_OMAP_RESET_CLOCKS is not set | ||
| 203 | CONFIG_OMAP_MUX=y | ||
| 204 | CONFIG_OMAP_MUX_DEBUG=y | ||
| 205 | CONFIG_OMAP_MUX_WARNINGS=y | ||
| 206 | CONFIG_OMAP_MCBSP=y | ||
| 207 | # CONFIG_OMAP_MBOX_FWK is not set | ||
| 208 | # CONFIG_OMAP_MPU_TIMER is not set | ||
| 209 | CONFIG_OMAP_32K_TIMER=y | ||
| 210 | CONFIG_OMAP_32K_TIMER_HZ=128 | ||
| 211 | CONFIG_OMAP_DM_TIMER=y | ||
| 212 | # CONFIG_OMAP_LL_DEBUG_UART1 is not set | ||
| 213 | # CONFIG_OMAP_LL_DEBUG_UART2 is not set | ||
| 214 | CONFIG_OMAP_LL_DEBUG_UART3=y | ||
| 215 | # CONFIG_OMAP_LL_DEBUG_NONE is not set | ||
| 216 | # CONFIG_OMAP_PM_NONE is not set | ||
| 217 | CONFIG_OMAP_PM_NOOP=y | ||
| 218 | CONFIG_ARCH_OMAP34XX=y | ||
| 219 | CONFIG_ARCH_OMAP3430=y | ||
| 220 | |||
| 221 | # | ||
| 222 | # OMAP Board Type | ||
| 223 | # | ||
| 224 | # CONFIG_MACH_OMAP3_BEAGLE is not set | ||
| 225 | # CONFIG_MACH_OMAP_LDP is not set | ||
| 226 | # CONFIG_MACH_OVERO is not set | ||
| 227 | # CONFIG_MACH_OMAP3EVM is not set | ||
| 228 | # CONFIG_MACH_OMAP3517EVM is not set | ||
| 229 | # CONFIG_MACH_OMAP3_PANDORA is not set | ||
| 230 | # CONFIG_MACH_OMAP_3430SDP is not set | ||
| 231 | # CONFIG_MACH_NOKIA_RX51 is not set | ||
| 232 | # CONFIG_MACH_OMAP_ZOOM2 is not set | ||
| 233 | # CONFIG_MACH_CM_T35 is not set | ||
| 234 | # CONFIG_MACH_OMAP_ZOOM3 is not set | ||
| 235 | # CONFIG_MACH_OMAP_3630SDP is not set | ||
| 236 | CONFIG_MACH_IGEP0020=y | ||
| 237 | |||
| 238 | # | ||
| 239 | # Processor Type | ||
| 240 | # | ||
| 241 | CONFIG_CPU_32=y | ||
| 242 | CONFIG_CPU_32v6K=y | ||
| 243 | CONFIG_CPU_V7=y | ||
| 244 | CONFIG_CPU_32v7=y | ||
| 245 | CONFIG_CPU_ABRT_EV7=y | ||
| 246 | CONFIG_CPU_PABRT_V7=y | ||
| 247 | CONFIG_CPU_CACHE_V7=y | ||
| 248 | CONFIG_CPU_CACHE_VIPT=y | ||
| 249 | CONFIG_CPU_COPY_V6=y | ||
| 250 | CONFIG_CPU_TLB_V7=y | ||
| 251 | CONFIG_CPU_HAS_ASID=y | ||
| 252 | CONFIG_CPU_CP15=y | ||
| 253 | CONFIG_CPU_CP15_MMU=y | ||
| 254 | |||
| 255 | # | ||
| 256 | # Processor Features | ||
| 257 | # | ||
| 258 | CONFIG_ARM_THUMB=y | ||
| 259 | CONFIG_ARM_THUMBEE=y | ||
| 260 | # CONFIG_CPU_ICACHE_DISABLE is not set | ||
| 261 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
| 262 | # CONFIG_CPU_BPREDICT_DISABLE is not set | ||
| 263 | CONFIG_HAS_TLS_REG=y | ||
| 264 | CONFIG_ARM_L1_CACHE_SHIFT=6 | ||
| 265 | # CONFIG_ARM_ERRATA_430973 is not set | ||
| 266 | # CONFIG_ARM_ERRATA_458693 is not set | ||
| 267 | # CONFIG_ARM_ERRATA_460075 is not set | ||
| 268 | CONFIG_COMMON_CLKDEV=y | ||
| 269 | |||
| 270 | # | ||
| 271 | # Bus support | ||
| 272 | # | ||
| 273 | # CONFIG_PCI_SYSCALL is not set | ||
| 274 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 275 | # CONFIG_PCCARD is not set | ||
| 276 | |||
| 277 | # | ||
| 278 | # Kernel Features | ||
| 279 | # | ||
| 280 | CONFIG_TICK_ONESHOT=y | ||
| 281 | CONFIG_NO_HZ=y | ||
| 282 | CONFIG_HIGH_RES_TIMERS=y | ||
| 283 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 284 | CONFIG_VMSPLIT_3G=y | ||
| 285 | # CONFIG_VMSPLIT_2G is not set | ||
| 286 | # CONFIG_VMSPLIT_1G is not set | ||
| 287 | CONFIG_PAGE_OFFSET=0xC0000000 | ||
| 288 | CONFIG_PREEMPT_NONE=y | ||
| 289 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
| 290 | # CONFIG_PREEMPT is not set | ||
| 291 | CONFIG_HZ=128 | ||
| 292 | # CONFIG_THUMB2_KERNEL is not set | ||
| 293 | CONFIG_AEABI=y | ||
| 294 | # CONFIG_OABI_COMPAT is not set | ||
| 295 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | ||
| 296 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | ||
| 297 | # CONFIG_HIGHMEM is not set | ||
| 298 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 299 | CONFIG_FLATMEM_MANUAL=y | ||
| 300 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 301 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 302 | CONFIG_FLATMEM=y | ||
| 303 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 304 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 305 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
| 306 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
| 307 | CONFIG_ZONE_DMA_FLAG=0 | ||
| 308 | CONFIG_VIRT_TO_BUS=y | ||
| 309 | CONFIG_HAVE_MLOCK=y | ||
| 310 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
| 311 | # CONFIG_KSM is not set | ||
| 312 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
| 313 | # CONFIG_LEDS is not set | ||
| 314 | CONFIG_ALIGNMENT_TRAP=y | ||
| 315 | # CONFIG_UACCESS_WITH_MEMCPY is not set | ||
| 316 | |||
| 317 | # | ||
| 318 | # Boot options | ||
| 319 | # | ||
| 320 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
| 321 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
| 322 | CONFIG_CMDLINE="" | ||
| 323 | # CONFIG_XIP_KERNEL is not set | ||
| 324 | # CONFIG_KEXEC is not set | ||
| 325 | |||
| 326 | # | ||
| 327 | # CPU Power Management | ||
| 328 | # | ||
| 329 | # CONFIG_CPU_FREQ is not set | ||
| 330 | # CONFIG_CPU_IDLE is not set | ||
| 331 | |||
| 332 | # | ||
| 333 | # Floating point emulation | ||
| 334 | # | ||
| 335 | |||
| 336 | # | ||
| 337 | # At least one emulation must be selected | ||
| 338 | # | ||
| 339 | CONFIG_VFP=y | ||
| 340 | CONFIG_VFPv3=y | ||
| 341 | CONFIG_NEON=y | ||
| 342 | |||
| 343 | # | ||
| 344 | # Userspace binary formats | ||
| 345 | # | ||
| 346 | CONFIG_BINFMT_ELF=y | ||
| 347 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 348 | CONFIG_HAVE_AOUT=y | ||
| 349 | # CONFIG_BINFMT_AOUT is not set | ||
| 350 | CONFIG_BINFMT_MISC=y | ||
| 351 | |||
| 352 | # | ||
| 353 | # Power management options | ||
| 354 | # | ||
| 355 | # CONFIG_PM is not set | ||
| 356 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
| 357 | CONFIG_NET=y | ||
| 358 | |||
| 359 | # | ||
| 360 | # Networking options | ||
| 361 | # | ||
| 362 | CONFIG_PACKET=y | ||
| 363 | # CONFIG_PACKET_MMAP is not set | ||
| 364 | CONFIG_UNIX=y | ||
| 365 | CONFIG_XFRM=y | ||
| 366 | CONFIG_XFRM_USER=y | ||
| 367 | # CONFIG_XFRM_SUB_POLICY is not set | ||
| 368 | CONFIG_XFRM_MIGRATE=y | ||
| 369 | # CONFIG_XFRM_STATISTICS is not set | ||
| 370 | CONFIG_NET_KEY=y | ||
| 371 | CONFIG_NET_KEY_MIGRATE=y | ||
| 372 | CONFIG_INET=y | ||
| 373 | CONFIG_IP_MULTICAST=y | ||
| 374 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 375 | CONFIG_IP_FIB_HASH=y | ||
| 376 | CONFIG_IP_PNP=y | ||
| 377 | CONFIG_IP_PNP_DHCP=y | ||
| 378 | CONFIG_IP_PNP_BOOTP=y | ||
| 379 | CONFIG_IP_PNP_RARP=y | ||
| 380 | # CONFIG_NET_IPIP is not set | ||
| 381 | # CONFIG_NET_IPGRE is not set | ||
| 382 | # CONFIG_IP_MROUTE is not set | ||
| 383 | # CONFIG_ARPD is not set | ||
| 384 | # CONFIG_SYN_COOKIES is not set | ||
| 385 | # CONFIG_INET_AH is not set | ||
| 386 | # CONFIG_INET_ESP is not set | ||
| 387 | # CONFIG_INET_IPCOMP is not set | ||
| 388 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
| 389 | # CONFIG_INET_TUNNEL is not set | ||
| 390 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
| 391 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
| 392 | CONFIG_INET_XFRM_MODE_BEET=y | ||
| 393 | # CONFIG_INET_LRO is not set | ||
| 394 | CONFIG_INET_DIAG=y | ||
| 395 | CONFIG_INET_TCP_DIAG=y | ||
| 396 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
| 397 | CONFIG_TCP_CONG_CUBIC=y | ||
| 398 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 399 | # CONFIG_TCP_MD5SIG is not set | ||
| 400 | # CONFIG_IPV6 is not set | ||
| 401 | # CONFIG_NETWORK_SECMARK is not set | ||
| 402 | # CONFIG_NETFILTER is not set | ||
| 403 | # CONFIG_IP_DCCP is not set | ||
| 404 | # CONFIG_IP_SCTP is not set | ||
| 405 | # CONFIG_RDS is not set | ||
| 406 | # CONFIG_TIPC is not set | ||
| 407 | # CONFIG_ATM is not set | ||
| 408 | # CONFIG_BRIDGE is not set | ||
| 409 | # CONFIG_NET_DSA is not set | ||
| 410 | # CONFIG_VLAN_8021Q is not set | ||
| 411 | # CONFIG_DECNET is not set | ||
| 412 | # CONFIG_LLC2 is not set | ||
| 413 | # CONFIG_IPX is not set | ||
| 414 | # CONFIG_ATALK is not set | ||
| 415 | # CONFIG_X25 is not set | ||
| 416 | # CONFIG_LAPB is not set | ||
| 417 | # CONFIG_ECONET is not set | ||
| 418 | # CONFIG_WAN_ROUTER is not set | ||
| 419 | # CONFIG_PHONET is not set | ||
| 420 | # CONFIG_IEEE802154 is not set | ||
| 421 | # CONFIG_NET_SCHED is not set | ||
| 422 | # CONFIG_DCB is not set | ||
| 423 | |||
| 424 | # | ||
| 425 | # Network testing | ||
| 426 | # | ||
| 427 | # CONFIG_NET_PKTGEN is not set | ||
| 428 | # CONFIG_HAMRADIO is not set | ||
| 429 | # CONFIG_CAN is not set | ||
| 430 | # CONFIG_IRDA is not set | ||
| 431 | CONFIG_BT=m | ||
| 432 | CONFIG_BT_L2CAP=m | ||
| 433 | CONFIG_BT_SCO=m | ||
| 434 | CONFIG_BT_RFCOMM=m | ||
| 435 | CONFIG_BT_RFCOMM_TTY=y | ||
| 436 | CONFIG_BT_BNEP=m | ||
| 437 | CONFIG_BT_BNEP_MC_FILTER=y | ||
| 438 | CONFIG_BT_BNEP_PROTO_FILTER=y | ||
| 439 | CONFIG_BT_HIDP=m | ||
| 440 | |||
| 441 | # | ||
| 442 | # Bluetooth device drivers | ||
| 443 | # | ||
| 444 | CONFIG_BT_HCIBTUSB=m | ||
| 445 | # CONFIG_BT_HCIBTSDIO is not set | ||
| 446 | CONFIG_BT_HCIUART=m | ||
| 447 | CONFIG_BT_HCIUART_H4=y | ||
| 448 | CONFIG_BT_HCIUART_BCSP=y | ||
| 449 | CONFIG_BT_HCIUART_LL=y | ||
| 450 | CONFIG_BT_HCIBCM203X=m | ||
| 451 | CONFIG_BT_HCIBPA10X=m | ||
| 452 | CONFIG_BT_HCIBFUSB=m | ||
| 453 | CONFIG_BT_HCIVHCI=m | ||
| 454 | CONFIG_BT_MRVL=m | ||
| 455 | CONFIG_BT_MRVL_SDIO=m | ||
| 456 | # CONFIG_AF_RXRPC is not set | ||
| 457 | CONFIG_WIRELESS=y | ||
| 458 | CONFIG_CFG80211=m | ||
| 459 | # CONFIG_NL80211_TESTMODE is not set | ||
| 460 | # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set | ||
| 461 | # CONFIG_CFG80211_REG_DEBUG is not set | ||
| 462 | CONFIG_CFG80211_DEFAULT_PS=y | ||
| 463 | CONFIG_CFG80211_DEFAULT_PS_VALUE=1 | ||
| 464 | # CONFIG_WIRELESS_OLD_REGULATORY is not set | ||
| 465 | CONFIG_WIRELESS_EXT=y | ||
| 466 | CONFIG_WIRELESS_EXT_SYSFS=y | ||
| 467 | CONFIG_LIB80211=m | ||
| 468 | CONFIG_LIB80211_CRYPT_WEP=m | ||
| 469 | CONFIG_LIB80211_CRYPT_CCMP=m | ||
| 470 | CONFIG_LIB80211_CRYPT_TKIP=m | ||
| 471 | # CONFIG_LIB80211_DEBUG is not set | ||
| 472 | CONFIG_MAC80211=m | ||
| 473 | # CONFIG_MAC80211_RC_PID is not set | ||
| 474 | CONFIG_MAC80211_RC_MINSTREL=y | ||
| 475 | # CONFIG_MAC80211_RC_DEFAULT_PID is not set | ||
| 476 | CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y | ||
| 477 | CONFIG_MAC80211_RC_DEFAULT="minstrel" | ||
| 478 | # CONFIG_MAC80211_MESH is not set | ||
| 479 | # CONFIG_MAC80211_LEDS is not set | ||
| 480 | # CONFIG_MAC80211_DEBUG_MENU is not set | ||
| 481 | # CONFIG_WIMAX is not set | ||
| 482 | # CONFIG_RFKILL is not set | ||
| 483 | # CONFIG_NET_9P is not set | ||
| 484 | |||
| 485 | # | ||
| 486 | # Device Drivers | ||
| 487 | # | ||
| 488 | |||
| 489 | # | ||
| 490 | # Generic Driver Options | ||
| 491 | # | ||
| 492 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
| 493 | # CONFIG_DEVTMPFS is not set | ||
| 494 | # CONFIG_STANDALONE is not set | ||
| 495 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 496 | CONFIG_FW_LOADER=y | ||
| 497 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
| 498 | CONFIG_EXTRA_FIRMWARE="" | ||
| 499 | # CONFIG_DEBUG_DRIVER is not set | ||
| 500 | # CONFIG_DEBUG_DEVRES is not set | ||
| 501 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 502 | CONFIG_CONNECTOR=y | ||
| 503 | CONFIG_PROC_EVENTS=y | ||
| 504 | # CONFIG_MTD is not set | ||
| 505 | # CONFIG_PARPORT is not set | ||
| 506 | CONFIG_BLK_DEV=y | ||
| 507 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 508 | CONFIG_BLK_DEV_LOOP=y | ||
| 509 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
| 510 | # CONFIG_BLK_DEV_NBD is not set | ||
| 511 | # CONFIG_BLK_DEV_UB is not set | ||
| 512 | CONFIG_BLK_DEV_RAM=y | ||
| 513 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
| 514 | CONFIG_BLK_DEV_RAM_SIZE=16384 | ||
| 515 | # CONFIG_BLK_DEV_XIP is not set | ||
| 516 | # CONFIG_CDROM_PKTCDVD is not set | ||
| 517 | # CONFIG_ATA_OVER_ETH is not set | ||
| 518 | # CONFIG_MG_DISK is not set | ||
| 519 | # CONFIG_MISC_DEVICES is not set | ||
| 520 | CONFIG_EEPROM_93CX6=m | ||
| 521 | CONFIG_HAVE_IDE=y | ||
| 522 | # CONFIG_IDE is not set | ||
| 523 | |||
| 524 | # | ||
| 525 | # SCSI device support | ||
| 526 | # | ||
| 527 | # CONFIG_RAID_ATTRS is not set | ||
| 528 | CONFIG_SCSI=y | ||
| 529 | CONFIG_SCSI_DMA=y | ||
| 530 | # CONFIG_SCSI_TGT is not set | ||
| 531 | # CONFIG_SCSI_NETLINK is not set | ||
| 532 | CONFIG_SCSI_PROC_FS=y | ||
| 533 | |||
| 534 | # | ||
| 535 | # SCSI support type (disk, tape, CD-ROM) | ||
| 536 | # | ||
| 537 | CONFIG_BLK_DEV_SD=y | ||
| 538 | # CONFIG_CHR_DEV_ST is not set | ||
| 539 | # CONFIG_CHR_DEV_OSST is not set | ||
| 540 | # CONFIG_BLK_DEV_SR is not set | ||
| 541 | # CONFIG_CHR_DEV_SG is not set | ||
| 542 | # CONFIG_CHR_DEV_SCH is not set | ||
| 543 | # CONFIG_SCSI_MULTI_LUN is not set | ||
| 544 | # CONFIG_SCSI_CONSTANTS is not set | ||
| 545 | # CONFIG_SCSI_LOGGING is not set | ||
| 546 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
| 547 | CONFIG_SCSI_WAIT_SCAN=m | ||
| 548 | |||
| 549 | # | ||
| 550 | # SCSI Transports | ||
| 551 | # | ||
| 552 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
| 553 | # CONFIG_SCSI_FC_ATTRS is not set | ||
| 554 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
| 555 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
| 556 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
| 557 | CONFIG_SCSI_LOWLEVEL=y | ||
| 558 | # CONFIG_ISCSI_TCP is not set | ||
| 559 | # CONFIG_LIBFC is not set | ||
| 560 | # CONFIG_LIBFCOE is not set | ||
| 561 | # CONFIG_SCSI_DEBUG is not set | ||
| 562 | # CONFIG_SCSI_DH is not set | ||
| 563 | # CONFIG_SCSI_OSD_INITIATOR is not set | ||
| 564 | # CONFIG_ATA is not set | ||
| 565 | # CONFIG_MD is not set | ||
| 566 | CONFIG_NETDEVICES=y | ||
| 567 | # CONFIG_DUMMY is not set | ||
| 568 | # CONFIG_BONDING is not set | ||
| 569 | # CONFIG_MACVLAN is not set | ||
| 570 | # CONFIG_EQUALIZER is not set | ||
| 571 | # CONFIG_TUN is not set | ||
| 572 | # CONFIG_VETH is not set | ||
| 573 | CONFIG_PHYLIB=y | ||
| 574 | |||
| 575 | # | ||
| 576 | # MII PHY device drivers | ||
| 577 | # | ||
| 578 | # CONFIG_MARVELL_PHY is not set | ||
| 579 | # CONFIG_DAVICOM_PHY is not set | ||
| 580 | # CONFIG_QSEMI_PHY is not set | ||
| 581 | # CONFIG_LXT_PHY is not set | ||
| 582 | # CONFIG_CICADA_PHY is not set | ||
| 583 | # CONFIG_VITESSE_PHY is not set | ||
| 584 | # CONFIG_SMSC_PHY is not set | ||
| 585 | # CONFIG_BROADCOM_PHY is not set | ||
| 586 | # CONFIG_ICPLUS_PHY is not set | ||
| 587 | # CONFIG_REALTEK_PHY is not set | ||
| 588 | # CONFIG_NATIONAL_PHY is not set | ||
| 589 | # CONFIG_STE10XP is not set | ||
| 590 | # CONFIG_LSI_ET1011C_PHY is not set | ||
| 591 | # CONFIG_FIXED_PHY is not set | ||
| 592 | # CONFIG_MDIO_BITBANG is not set | ||
| 593 | CONFIG_NET_ETHERNET=y | ||
| 594 | CONFIG_MII=y | ||
| 595 | # CONFIG_AX88796 is not set | ||
| 596 | # CONFIG_SMC91X is not set | ||
| 597 | # CONFIG_DM9000 is not set | ||
| 598 | # CONFIG_ENC28J60 is not set | ||
| 599 | # CONFIG_ETHOC is not set | ||
| 600 | # CONFIG_SMC911X is not set | ||
| 601 | CONFIG_SMSC911X=y | ||
| 602 | # CONFIG_DNET is not set | ||
| 603 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
| 604 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
| 605 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
| 606 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
| 607 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
| 608 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
| 609 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
| 610 | # CONFIG_B44 is not set | ||
| 611 | # CONFIG_KS8842 is not set | ||
| 612 | # CONFIG_KS8851 is not set | ||
| 613 | # CONFIG_KS8851_MLL is not set | ||
| 614 | # CONFIG_NETDEV_1000 is not set | ||
| 615 | # CONFIG_NETDEV_10000 is not set | ||
| 616 | CONFIG_WLAN=y | ||
| 617 | # CONFIG_WLAN_PRE80211 is not set | ||
| 618 | CONFIG_WLAN_80211=y | ||
| 619 | CONFIG_LIBERTAS=m | ||
| 620 | CONFIG_LIBERTAS_USB=m | ||
| 621 | CONFIG_LIBERTAS_SDIO=m | ||
| 622 | # CONFIG_LIBERTAS_SPI is not set | ||
| 623 | # CONFIG_LIBERTAS_DEBUG is not set | ||
| 624 | # CONFIG_LIBERTAS_THINFIRM is not set | ||
| 625 | CONFIG_AT76C50X_USB=m | ||
| 626 | CONFIG_USB_ZD1201=m | ||
| 627 | CONFIG_USB_NET_RNDIS_WLAN=m | ||
| 628 | CONFIG_RTL8187=m | ||
| 629 | # CONFIG_MAC80211_HWSIM is not set | ||
| 630 | CONFIG_P54_COMMON=m | ||
| 631 | CONFIG_P54_USB=m | ||
| 632 | CONFIG_P54_SPI=m | ||
| 633 | CONFIG_ATH_COMMON=m | ||
| 634 | CONFIG_AR9170_USB=m | ||
| 635 | CONFIG_HOSTAP=m | ||
| 636 | CONFIG_HOSTAP_FIRMWARE=y | ||
| 637 | CONFIG_HOSTAP_FIRMWARE_NVRAM=y | ||
| 638 | CONFIG_B43=m | ||
| 639 | # CONFIG_B43_SDIO is not set | ||
| 640 | # CONFIG_B43_PHY_LP is not set | ||
| 641 | CONFIG_B43_HWRNG=y | ||
| 642 | # CONFIG_B43_DEBUG is not set | ||
| 643 | CONFIG_B43LEGACY=m | ||
| 644 | CONFIG_B43LEGACY_HWRNG=y | ||
| 645 | # CONFIG_B43LEGACY_DEBUG is not set | ||
| 646 | CONFIG_B43LEGACY_DMA=y | ||
| 647 | CONFIG_B43LEGACY_PIO=y | ||
| 648 | CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y | ||
| 649 | # CONFIG_B43LEGACY_DMA_MODE is not set | ||
| 650 | # CONFIG_B43LEGACY_PIO_MODE is not set | ||
| 651 | CONFIG_ZD1211RW=m | ||
| 652 | # CONFIG_ZD1211RW_DEBUG is not set | ||
| 653 | CONFIG_RT2X00=m | ||
| 654 | CONFIG_RT2500USB=m | ||
| 655 | CONFIG_RT73USB=m | ||
| 656 | CONFIG_RT2800USB=m | ||
| 657 | CONFIG_RT2X00_LIB_USB=m | ||
| 658 | CONFIG_RT2X00_LIB=m | ||
| 659 | CONFIG_RT2X00_LIB_HT=y | ||
| 660 | CONFIG_RT2X00_LIB_FIRMWARE=y | ||
| 661 | CONFIG_RT2X00_LIB_CRYPTO=y | ||
| 662 | # CONFIG_RT2X00_DEBUG is not set | ||
| 663 | CONFIG_WL12XX=m | ||
| 664 | # CONFIG_WL1251 is not set | ||
| 665 | # CONFIG_WL1271 is not set | ||
| 666 | # CONFIG_IWM is not set | ||
| 667 | |||
| 668 | # | ||
| 669 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
| 670 | # | ||
| 671 | |||
| 672 | # | ||
| 673 | # USB Network Adapters | ||
| 674 | # | ||
| 675 | # CONFIG_USB_CATC is not set | ||
| 676 | CONFIG_USB_KAWETH=m | ||
| 677 | CONFIG_USB_PEGASUS=m | ||
| 678 | # CONFIG_USB_RTL8150 is not set | ||
| 679 | CONFIG_USB_USBNET=m | ||
| 680 | CONFIG_USB_NET_AX8817X=m | ||
| 681 | CONFIG_USB_NET_CDCETHER=m | ||
| 682 | CONFIG_USB_NET_CDC_EEM=m | ||
| 683 | CONFIG_USB_NET_DM9601=m | ||
| 684 | CONFIG_USB_NET_SMSC95XX=m | ||
| 685 | CONFIG_USB_NET_GL620A=m | ||
| 686 | CONFIG_USB_NET_NET1080=m | ||
| 687 | CONFIG_USB_NET_PLUSB=m | ||
| 688 | CONFIG_USB_NET_MCS7830=m | ||
| 689 | CONFIG_USB_NET_RNDIS_HOST=m | ||
| 690 | CONFIG_USB_NET_CDC_SUBSET=m | ||
| 691 | # CONFIG_USB_ALI_M5632 is not set | ||
| 692 | # CONFIG_USB_AN2720 is not set | ||
| 693 | CONFIG_USB_BELKIN=y | ||
| 694 | CONFIG_USB_ARMLINUX=y | ||
| 695 | # CONFIG_USB_EPSON2888 is not set | ||
| 696 | # CONFIG_USB_KC2190 is not set | ||
| 697 | CONFIG_USB_NET_ZAURUS=m | ||
| 698 | # CONFIG_USB_NET_INT51X1 is not set | ||
| 699 | # CONFIG_WAN is not set | ||
| 700 | # CONFIG_PPP is not set | ||
| 701 | # CONFIG_SLIP is not set | ||
| 702 | # CONFIG_NETCONSOLE is not set | ||
| 703 | # CONFIG_NETPOLL is not set | ||
| 704 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
| 705 | # CONFIG_ISDN is not set | ||
| 706 | # CONFIG_PHONE is not set | ||
| 707 | |||
| 708 | # | ||
| 709 | # Input device support | ||
| 710 | # | ||
| 711 | CONFIG_INPUT=y | ||
| 712 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 713 | # CONFIG_INPUT_POLLDEV is not set | ||
| 714 | |||
| 715 | # | ||
| 716 | # Userland interfaces | ||
| 717 | # | ||
| 718 | # CONFIG_INPUT_MOUSEDEV is not set | ||
| 719 | # CONFIG_INPUT_JOYDEV is not set | ||
| 720 | CONFIG_INPUT_EVDEV=y | ||
| 721 | # CONFIG_INPUT_EVBUG is not set | ||
| 722 | |||
| 723 | # | ||
| 724 | # Input Device Drivers | ||
| 725 | # | ||
| 726 | # CONFIG_INPUT_KEYBOARD is not set | ||
| 727 | # CONFIG_INPUT_MOUSE is not set | ||
| 728 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 729 | # CONFIG_INPUT_TABLET is not set | ||
| 730 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
| 731 | # CONFIG_INPUT_MISC is not set | ||
| 732 | |||
| 733 | # | ||
| 734 | # Hardware I/O ports | ||
| 735 | # | ||
| 736 | # CONFIG_SERIO is not set | ||
| 737 | # CONFIG_GAMEPORT is not set | ||
| 738 | |||
| 739 | # | ||
| 740 | # Character devices | ||
| 741 | # | ||
| 742 | CONFIG_VT=y | ||
| 743 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 744 | CONFIG_VT_CONSOLE=y | ||
| 745 | CONFIG_HW_CONSOLE=y | ||
| 746 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
| 747 | CONFIG_DEVKMEM=y | ||
| 748 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 749 | |||
| 750 | # | ||
| 751 | # Serial drivers | ||
| 752 | # | ||
| 753 | CONFIG_SERIAL_8250=y | ||
| 754 | CONFIG_SERIAL_8250_CONSOLE=y | ||
| 755 | CONFIG_SERIAL_8250_NR_UARTS=32 | ||
| 756 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
| 757 | CONFIG_SERIAL_8250_EXTENDED=y | ||
| 758 | CONFIG_SERIAL_8250_MANY_PORTS=y | ||
| 759 | CONFIG_SERIAL_8250_SHARE_IRQ=y | ||
| 760 | CONFIG_SERIAL_8250_DETECT_IRQ=y | ||
| 761 | CONFIG_SERIAL_8250_RSA=y | ||
| 762 | |||
| 763 | # | ||
| 764 | # Non-8250 serial port support | ||
| 765 | # | ||
| 766 | # CONFIG_SERIAL_MAX3100 is not set | ||
| 767 | CONFIG_SERIAL_CORE=y | ||
| 768 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 769 | CONFIG_UNIX98_PTYS=y | ||
| 770 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 771 | # CONFIG_LEGACY_PTYS is not set | ||
| 772 | # CONFIG_IPMI_HANDLER is not set | ||
| 773 | CONFIG_HW_RANDOM=y | ||
| 774 | # CONFIG_HW_RANDOM_TIMERIOMEM is not set | ||
| 775 | # CONFIG_R3964 is not set | ||
| 776 | # CONFIG_RAW_DRIVER is not set | ||
| 777 | # CONFIG_TCG_TPM is not set | ||
| 778 | CONFIG_I2C=y | ||
| 779 | CONFIG_I2C_BOARDINFO=y | ||
| 780 | CONFIG_I2C_COMPAT=y | ||
| 781 | CONFIG_I2C_CHARDEV=y | ||
| 782 | CONFIG_I2C_HELPER_AUTO=y | ||
| 783 | |||
| 784 | # | ||
| 785 | # I2C Hardware Bus support | ||
| 786 | # | ||
| 787 | |||
| 788 | # | ||
| 789 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
| 790 | # | ||
| 791 | # CONFIG_I2C_DESIGNWARE is not set | ||
| 792 | # CONFIG_I2C_GPIO is not set | ||
| 793 | # CONFIG_I2C_OCORES is not set | ||
| 794 | CONFIG_I2C_OMAP=y | ||
| 795 | # CONFIG_I2C_SIMTEC is not set | ||
| 796 | |||
| 797 | # | ||
| 798 | # External I2C/SMBus adapter drivers | ||
| 799 | # | ||
| 800 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
| 801 | # CONFIG_I2C_TAOS_EVM is not set | ||
| 802 | # CONFIG_I2C_TINY_USB is not set | ||
| 803 | |||
| 804 | # | ||
| 805 | # Other I2C/SMBus bus drivers | ||
| 806 | # | ||
| 807 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
| 808 | # CONFIG_I2C_STUB is not set | ||
| 809 | |||
| 810 | # | ||
| 811 | # Miscellaneous I2C Chip support | ||
| 812 | # | ||
| 813 | # CONFIG_DS1682 is not set | ||
| 814 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 815 | # CONFIG_I2C_DEBUG_CORE is not set | ||
| 816 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
| 817 | # CONFIG_I2C_DEBUG_BUS is not set | ||
| 818 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
| 819 | CONFIG_SPI=y | ||
| 820 | # CONFIG_SPI_DEBUG is not set | ||
| 821 | CONFIG_SPI_MASTER=y | ||
| 822 | |||
| 823 | # | ||
| 824 | # SPI Master Controller Drivers | ||
| 825 | # | ||
| 826 | # CONFIG_SPI_BITBANG is not set | ||
| 827 | # CONFIG_SPI_GPIO is not set | ||
| 828 | CONFIG_SPI_OMAP24XX=y | ||
| 829 | |||
| 830 | # | ||
| 831 | # SPI Protocol Masters | ||
| 832 | # | ||
| 833 | # CONFIG_SPI_SPIDEV is not set | ||
| 834 | # CONFIG_SPI_TLE62X0 is not set | ||
| 835 | |||
| 836 | # | ||
| 837 | # PPS support | ||
| 838 | # | ||
| 839 | # CONFIG_PPS is not set | ||
| 840 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
| 841 | CONFIG_GPIOLIB=y | ||
| 842 | # CONFIG_DEBUG_GPIO is not set | ||
| 843 | CONFIG_GPIO_SYSFS=y | ||
| 844 | |||
| 845 | # | ||
| 846 | # Memory mapped GPIO expanders: | ||
| 847 | # | ||
| 848 | |||
| 849 | # | ||
| 850 | # I2C GPIO expanders: | ||
| 851 | # | ||
| 852 | # CONFIG_GPIO_MAX732X is not set | ||
| 853 | # CONFIG_GPIO_PCA953X is not set | ||
| 854 | # CONFIG_GPIO_PCF857X is not set | ||
| 855 | CONFIG_GPIO_TWL4030=y | ||
| 856 | |||
| 857 | # | ||
| 858 | # PCI GPIO expanders: | ||
| 859 | # | ||
| 860 | |||
| 861 | # | ||
| 862 | # SPI GPIO expanders: | ||
| 863 | # | ||
| 864 | # CONFIG_GPIO_MAX7301 is not set | ||
| 865 | # CONFIG_GPIO_MCP23S08 is not set | ||
| 866 | # CONFIG_GPIO_MC33880 is not set | ||
| 867 | |||
| 868 | # | ||
| 869 | # AC97 GPIO expanders: | ||
| 870 | # | ||
| 871 | # CONFIG_W1 is not set | ||
| 872 | CONFIG_POWER_SUPPLY=y | ||
| 873 | # CONFIG_POWER_SUPPLY_DEBUG is not set | ||
| 874 | # CONFIG_PDA_POWER is not set | ||
| 875 | # CONFIG_BATTERY_DS2760 is not set | ||
| 876 | # CONFIG_BATTERY_DS2782 is not set | ||
| 877 | # CONFIG_BATTERY_BQ27x00 is not set | ||
| 878 | # CONFIG_BATTERY_MAX17040 is not set | ||
| 879 | # CONFIG_HWMON is not set | ||
| 880 | # CONFIG_THERMAL is not set | ||
| 881 | # CONFIG_WATCHDOG is not set | ||
| 882 | CONFIG_SSB_POSSIBLE=y | ||
| 883 | |||
| 884 | # | ||
| 885 | # Sonics Silicon Backplane | ||
| 886 | # | ||
| 887 | CONFIG_SSB=m | ||
| 888 | CONFIG_SSB_SDIOHOST_POSSIBLE=y | ||
| 889 | # CONFIG_SSB_SDIOHOST is not set | ||
| 890 | # CONFIG_SSB_SILENT is not set | ||
| 891 | # CONFIG_SSB_DEBUG is not set | ||
| 892 | |||
| 893 | # | ||
| 894 | # Multifunction device drivers | ||
| 895 | # | ||
| 896 | # CONFIG_MFD_CORE is not set | ||
| 897 | # CONFIG_MFD_SM501 is not set | ||
| 898 | # CONFIG_MFD_ASIC3 is not set | ||
| 899 | # CONFIG_HTC_EGPIO is not set | ||
| 900 | # CONFIG_HTC_PASIC3 is not set | ||
| 901 | # CONFIG_TPS65010 is not set | ||
| 902 | CONFIG_TWL4030_CORE=y | ||
| 903 | # CONFIG_TWL4030_POWER is not set | ||
| 904 | # CONFIG_MFD_TMIO is not set | ||
| 905 | # CONFIG_MFD_T7L66XB is not set | ||
| 906 | # CONFIG_MFD_TC6387XB is not set | ||
| 907 | # CONFIG_MFD_TC6393XB is not set | ||
| 908 | # CONFIG_PMIC_DA903X is not set | ||
| 909 | # CONFIG_MFD_WM8400 is not set | ||
| 910 | # CONFIG_MFD_WM831X is not set | ||
| 911 | # CONFIG_MFD_WM8350_I2C is not set | ||
| 912 | # CONFIG_MFD_PCF50633 is not set | ||
| 913 | # CONFIG_MFD_MC13783 is not set | ||
| 914 | # CONFIG_AB3100_CORE is not set | ||
| 915 | # CONFIG_EZX_PCAP is not set | ||
| 916 | CONFIG_REGULATOR=y | ||
| 917 | # CONFIG_REGULATOR_DEBUG is not set | ||
| 918 | # CONFIG_REGULATOR_FIXED_VOLTAGE is not set | ||
| 919 | # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set | ||
| 920 | # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set | ||
| 921 | # CONFIG_REGULATOR_BQ24022 is not set | ||
| 922 | # CONFIG_REGULATOR_MAX1586 is not set | ||
| 923 | CONFIG_REGULATOR_TWL4030=y | ||
| 924 | # CONFIG_REGULATOR_LP3971 is not set | ||
| 925 | # CONFIG_REGULATOR_TPS65023 is not set | ||
| 926 | # CONFIG_REGULATOR_TPS6507X is not set | ||
| 927 | # CONFIG_MEDIA_SUPPORT is not set | ||
| 928 | |||
| 929 | # | ||
| 930 | # Graphics support | ||
| 931 | # | ||
| 932 | # CONFIG_VGASTATE is not set | ||
| 933 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 934 | # CONFIG_FB is not set | ||
| 935 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 936 | |||
| 937 | # | ||
| 938 | # Display device support | ||
| 939 | # | ||
| 940 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 941 | |||
| 942 | # | ||
| 943 | # Console display driver support | ||
| 944 | # | ||
| 945 | # CONFIG_VGA_CONSOLE is not set | ||
| 946 | CONFIG_DUMMY_CONSOLE=y | ||
| 947 | # CONFIG_SOUND is not set | ||
| 948 | CONFIG_HID_SUPPORT=y | ||
| 949 | CONFIG_HID=y | ||
| 950 | # CONFIG_HIDRAW is not set | ||
| 951 | |||
| 952 | # | ||
| 953 | # USB Input Devices | ||
| 954 | # | ||
| 955 | CONFIG_USB_HID=y | ||
| 956 | # CONFIG_HID_PID is not set | ||
| 957 | # CONFIG_USB_HIDDEV is not set | ||
| 958 | |||
| 959 | # | ||
| 960 | # Special HID drivers | ||
| 961 | # | ||
| 962 | # CONFIG_HID_A4TECH is not set | ||
| 963 | # CONFIG_HID_APPLE is not set | ||
| 964 | # CONFIG_HID_BELKIN is not set | ||
| 965 | # CONFIG_HID_CHERRY is not set | ||
| 966 | # CONFIG_HID_CHICONY is not set | ||
| 967 | # CONFIG_HID_CYPRESS is not set | ||
| 968 | # CONFIG_HID_DRAGONRISE is not set | ||
| 969 | # CONFIG_HID_EZKEY is not set | ||
| 970 | # CONFIG_HID_KYE is not set | ||
| 971 | # CONFIG_HID_GYRATION is not set | ||
| 972 | # CONFIG_HID_TWINHAN is not set | ||
| 973 | # CONFIG_HID_KENSINGTON is not set | ||
| 974 | # CONFIG_HID_LOGITECH is not set | ||
| 975 | # CONFIG_HID_MICROSOFT is not set | ||
| 976 | # CONFIG_HID_MONTEREY is not set | ||
| 977 | # CONFIG_HID_NTRIG is not set | ||
| 978 | # CONFIG_HID_PANTHERLORD is not set | ||
| 979 | # CONFIG_HID_PETALYNX is not set | ||
| 980 | # CONFIG_HID_SAMSUNG is not set | ||
| 981 | # CONFIG_HID_SONY is not set | ||
| 982 | # CONFIG_HID_SUNPLUS is not set | ||
| 983 | # CONFIG_HID_GREENASIA is not set | ||
| 984 | # CONFIG_HID_SMARTJOYPLUS is not set | ||
| 985 | # CONFIG_HID_TOPSEED is not set | ||
| 986 | # CONFIG_HID_THRUSTMASTER is not set | ||
| 987 | # CONFIG_HID_WACOM is not set | ||
| 988 | # CONFIG_HID_ZEROPLUS is not set | ||
| 989 | CONFIG_USB_SUPPORT=y | ||
| 990 | CONFIG_USB_ARCH_HAS_HCD=y | ||
| 991 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
| 992 | # CONFIG_USB_ARCH_HAS_EHCI is not set | ||
| 993 | CONFIG_USB=y | ||
| 994 | # CONFIG_USB_DEBUG is not set | ||
| 995 | CONFIG_USB_ANNOUNCE_NEW_DEVICES=y | ||
| 996 | |||
| 997 | # | ||
| 998 | # Miscellaneous USB options | ||
| 999 | # | ||
| 1000 | # CONFIG_USB_DEVICEFS is not set | ||
| 1001 | # CONFIG_USB_DEVICE_CLASS is not set | ||
| 1002 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
| 1003 | # CONFIG_USB_OTG is not set | ||
| 1004 | # CONFIG_USB_OTG_WHITELIST is not set | ||
| 1005 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
| 1006 | CONFIG_USB_MON=m | ||
| 1007 | # CONFIG_USB_WUSB is not set | ||
| 1008 | # CONFIG_USB_WUSB_CBAF is not set | ||
| 1009 | |||
| 1010 | # | ||
| 1011 | # USB Host Controller Drivers | ||
| 1012 | # | ||
| 1013 | # CONFIG_USB_C67X00_HCD is not set | ||
| 1014 | # CONFIG_USB_OXU210HP_HCD is not set | ||
| 1015 | # CONFIG_USB_ISP116X_HCD is not set | ||
| 1016 | # CONFIG_USB_ISP1760_HCD is not set | ||
| 1017 | # CONFIG_USB_ISP1362_HCD is not set | ||
| 1018 | # CONFIG_USB_OHCI_HCD is not set | ||
| 1019 | # CONFIG_USB_SL811_HCD is not set | ||
| 1020 | # CONFIG_USB_R8A66597_HCD is not set | ||
| 1021 | # CONFIG_USB_HWA_HCD is not set | ||
| 1022 | CONFIG_USB_MUSB_HDRC=y | ||
| 1023 | CONFIG_USB_MUSB_SOC=y | ||
| 1024 | |||
| 1025 | # | ||
| 1026 | # OMAP 343x high speed USB support | ||
| 1027 | # | ||
| 1028 | CONFIG_USB_MUSB_HOST=y | ||
| 1029 | # CONFIG_USB_MUSB_PERIPHERAL is not set | ||
| 1030 | # CONFIG_USB_MUSB_OTG is not set | ||
| 1031 | # CONFIG_USB_GADGET_MUSB_HDRC is not set | ||
| 1032 | CONFIG_USB_MUSB_HDRC_HCD=y | ||
| 1033 | # CONFIG_MUSB_PIO_ONLY is not set | ||
| 1034 | CONFIG_USB_INVENTRA_DMA=y | ||
| 1035 | # CONFIG_USB_TI_CPPI_DMA is not set | ||
| 1036 | # CONFIG_USB_MUSB_DEBUG is not set | ||
| 1037 | |||
| 1038 | # | ||
| 1039 | # USB Device Class drivers | ||
| 1040 | # | ||
| 1041 | # CONFIG_USB_ACM is not set | ||
| 1042 | # CONFIG_USB_PRINTER is not set | ||
| 1043 | # CONFIG_USB_WDM is not set | ||
| 1044 | # CONFIG_USB_TMC is not set | ||
| 1045 | |||
| 1046 | # | ||
| 1047 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | ||
| 1048 | # | ||
| 1049 | |||
| 1050 | # | ||
| 1051 | # also be needed; see USB_STORAGE Help for more info | ||
| 1052 | # | ||
| 1053 | CONFIG_USB_STORAGE=m | ||
| 1054 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
| 1055 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
| 1056 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
| 1057 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
| 1058 | # CONFIG_USB_STORAGE_USBAT is not set | ||
| 1059 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
| 1060 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
| 1061 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
| 1062 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
| 1063 | # CONFIG_USB_STORAGE_ONETOUCH is not set | ||
| 1064 | # CONFIG_USB_STORAGE_KARMA is not set | ||
| 1065 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
| 1066 | # CONFIG_USB_LIBUSUAL is not set | ||
| 1067 | |||
| 1068 | # | ||
| 1069 | # USB Imaging devices | ||
| 1070 | # | ||
| 1071 | # CONFIG_USB_MDC800 is not set | ||
| 1072 | # CONFIG_USB_MICROTEK is not set | ||
| 1073 | |||
| 1074 | # | ||
| 1075 | # USB port drivers | ||
| 1076 | # | ||
| 1077 | # CONFIG_USB_SERIAL is not set | ||
| 1078 | |||
| 1079 | # | ||
| 1080 | # USB Miscellaneous drivers | ||
| 1081 | # | ||
| 1082 | # CONFIG_USB_EMI62 is not set | ||
| 1083 | # CONFIG_USB_EMI26 is not set | ||
| 1084 | # CONFIG_USB_ADUTUX is not set | ||
| 1085 | # CONFIG_USB_SEVSEG is not set | ||
| 1086 | # CONFIG_USB_RIO500 is not set | ||
| 1087 | # CONFIG_USB_LEGOTOWER is not set | ||
| 1088 | # CONFIG_USB_LCD is not set | ||
| 1089 | # CONFIG_USB_BERRY_CHARGE is not set | ||
| 1090 | # CONFIG_USB_LED is not set | ||
| 1091 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
| 1092 | # CONFIG_USB_CYTHERM is not set | ||
| 1093 | # CONFIG_USB_IDMOUSE is not set | ||
| 1094 | # CONFIG_USB_FTDI_ELAN is not set | ||
| 1095 | # CONFIG_USB_APPLEDISPLAY is not set | ||
| 1096 | # CONFIG_USB_SISUSBVGA is not set | ||
| 1097 | # CONFIG_USB_LD is not set | ||
| 1098 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
| 1099 | # CONFIG_USB_IOWARRIOR is not set | ||
| 1100 | # CONFIG_USB_TEST is not set | ||
| 1101 | # CONFIG_USB_ISIGHTFW is not set | ||
| 1102 | # CONFIG_USB_VST is not set | ||
| 1103 | CONFIG_USB_GADGET=y | ||
| 1104 | CONFIG_USB_GADGET_DEBUG=y | ||
| 1105 | CONFIG_USB_GADGET_DEBUG_FILES=y | ||
| 1106 | CONFIG_USB_GADGET_VBUS_DRAW=2 | ||
| 1107 | CONFIG_USB_GADGET_SELECTED=y | ||
| 1108 | # CONFIG_USB_GADGET_AT91 is not set | ||
| 1109 | # CONFIG_USB_GADGET_ATMEL_USBA is not set | ||
| 1110 | # CONFIG_USB_GADGET_FSL_USB2 is not set | ||
| 1111 | # CONFIG_USB_GADGET_LH7A40X is not set | ||
| 1112 | CONFIG_USB_GADGET_OMAP=y | ||
| 1113 | CONFIG_USB_OMAP=y | ||
| 1114 | # CONFIG_USB_GADGET_PXA25X is not set | ||
| 1115 | # CONFIG_USB_GADGET_R8A66597 is not set | ||
| 1116 | # CONFIG_USB_GADGET_PXA27X is not set | ||
| 1117 | # CONFIG_USB_GADGET_S3C_HSOTG is not set | ||
| 1118 | # CONFIG_USB_GADGET_IMX is not set | ||
| 1119 | # CONFIG_USB_GADGET_S3C2410 is not set | ||
| 1120 | # CONFIG_USB_GADGET_M66592 is not set | ||
| 1121 | # CONFIG_USB_GADGET_AMD5536UDC is not set | ||
| 1122 | # CONFIG_USB_GADGET_FSL_QE is not set | ||
| 1123 | # CONFIG_USB_GADGET_CI13XXX is not set | ||
| 1124 | # CONFIG_USB_GADGET_NET2280 is not set | ||
| 1125 | # CONFIG_USB_GADGET_GOKU is not set | ||
| 1126 | # CONFIG_USB_GADGET_LANGWELL is not set | ||
| 1127 | # CONFIG_USB_GADGET_DUMMY_HCD is not set | ||
| 1128 | # CONFIG_USB_GADGET_DUALSPEED is not set | ||
| 1129 | CONFIG_USB_ZERO=m | ||
| 1130 | # CONFIG_USB_AUDIO is not set | ||
| 1131 | # CONFIG_USB_ETH is not set | ||
| 1132 | # CONFIG_USB_GADGETFS is not set | ||
| 1133 | # CONFIG_USB_FILE_STORAGE is not set | ||
| 1134 | # CONFIG_USB_G_SERIAL is not set | ||
| 1135 | # CONFIG_USB_MIDI_GADGET is not set | ||
| 1136 | # CONFIG_USB_G_PRINTER is not set | ||
| 1137 | # CONFIG_USB_CDC_COMPOSITE is not set | ||
| 1138 | |||
| 1139 | # | ||
| 1140 | # OTG and related infrastructure | ||
| 1141 | # | ||
| 1142 | CONFIG_USB_OTG_UTILS=y | ||
| 1143 | # CONFIG_USB_GPIO_VBUS is not set | ||
| 1144 | # CONFIG_ISP1301_OMAP is not set | ||
| 1145 | CONFIG_TWL4030_USB=y | ||
| 1146 | # CONFIG_NOP_USB_XCEIV is not set | ||
| 1147 | CONFIG_MMC=y | ||
| 1148 | # CONFIG_MMC_DEBUG is not set | ||
| 1149 | # CONFIG_MMC_UNSAFE_RESUME is not set | ||
| 1150 | |||
| 1151 | # | ||
| 1152 | # MMC/SD/SDIO Card Drivers | ||
| 1153 | # | ||
| 1154 | CONFIG_MMC_BLOCK=y | ||
| 1155 | CONFIG_MMC_BLOCK_BOUNCE=y | ||
| 1156 | # CONFIG_SDIO_UART is not set | ||
| 1157 | # CONFIG_MMC_TEST is not set | ||
| 1158 | |||
| 1159 | # | ||
| 1160 | # MMC/SD/SDIO Host Controller Drivers | ||
| 1161 | # | ||
| 1162 | # CONFIG_MMC_SDHCI is not set | ||
| 1163 | # CONFIG_MMC_OMAP is not set | ||
| 1164 | CONFIG_MMC_OMAP_HS=y | ||
| 1165 | # CONFIG_MMC_AT91 is not set | ||
| 1166 | # CONFIG_MMC_ATMELMCI is not set | ||
| 1167 | # CONFIG_MMC_SPI is not set | ||
| 1168 | # CONFIG_MEMSTICK is not set | ||
| 1169 | # CONFIG_NEW_LEDS is not set | ||
| 1170 | # CONFIG_ACCESSIBILITY is not set | ||
| 1171 | CONFIG_RTC_LIB=y | ||
| 1172 | # CONFIG_RTC_CLASS is not set | ||
| 1173 | # CONFIG_DMADEVICES is not set | ||
| 1174 | # CONFIG_AUXDISPLAY is not set | ||
| 1175 | # CONFIG_UIO is not set | ||
| 1176 | |||
| 1177 | # | ||
| 1178 | # TI VLYNQ | ||
| 1179 | # | ||
| 1180 | # CONFIG_STAGING is not set | ||
| 1181 | |||
| 1182 | # | ||
| 1183 | # File systems | ||
| 1184 | # | ||
| 1185 | CONFIG_EXT2_FS=y | ||
| 1186 | # CONFIG_EXT2_FS_XATTR is not set | ||
| 1187 | # CONFIG_EXT2_FS_XIP is not set | ||
| 1188 | CONFIG_EXT3_FS=y | ||
| 1189 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 1190 | # CONFIG_EXT3_FS_XATTR is not set | ||
| 1191 | # CONFIG_EXT4_FS is not set | ||
| 1192 | CONFIG_JBD=y | ||
| 1193 | # CONFIG_REISERFS_FS is not set | ||
| 1194 | # CONFIG_JFS_FS is not set | ||
| 1195 | CONFIG_FS_POSIX_ACL=y | ||
| 1196 | # CONFIG_XFS_FS is not set | ||
| 1197 | # CONFIG_GFS2_FS is not set | ||
| 1198 | # CONFIG_OCFS2_FS is not set | ||
| 1199 | # CONFIG_BTRFS_FS is not set | ||
| 1200 | # CONFIG_NILFS2_FS is not set | ||
| 1201 | CONFIG_FILE_LOCKING=y | ||
| 1202 | CONFIG_FSNOTIFY=y | ||
| 1203 | CONFIG_DNOTIFY=y | ||
| 1204 | CONFIG_INOTIFY=y | ||
| 1205 | CONFIG_INOTIFY_USER=y | ||
| 1206 | CONFIG_QUOTA=y | ||
| 1207 | # CONFIG_QUOTA_NETLINK_INTERFACE is not set | ||
| 1208 | CONFIG_PRINT_QUOTA_WARNING=y | ||
| 1209 | CONFIG_QUOTA_TREE=y | ||
| 1210 | # CONFIG_QFMT_V1 is not set | ||
| 1211 | CONFIG_QFMT_V2=y | ||
| 1212 | CONFIG_QUOTACTL=y | ||
| 1213 | # CONFIG_AUTOFS_FS is not set | ||
| 1214 | # CONFIG_AUTOFS4_FS is not set | ||
| 1215 | # CONFIG_FUSE_FS is not set | ||
| 1216 | |||
| 1217 | # | ||
| 1218 | # Caches | ||
| 1219 | # | ||
| 1220 | # CONFIG_FSCACHE is not set | ||
| 1221 | |||
| 1222 | # | ||
| 1223 | # CD-ROM/DVD Filesystems | ||
| 1224 | # | ||
| 1225 | # CONFIG_ISO9660_FS is not set | ||
| 1226 | # CONFIG_UDF_FS is not set | ||
| 1227 | |||
| 1228 | # | ||
| 1229 | # DOS/FAT/NT Filesystems | ||
| 1230 | # | ||
| 1231 | CONFIG_FAT_FS=y | ||
| 1232 | CONFIG_MSDOS_FS=y | ||
| 1233 | CONFIG_VFAT_FS=y | ||
| 1234 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
| 1235 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
| 1236 | # CONFIG_NTFS_FS is not set | ||
| 1237 | |||
| 1238 | # | ||
| 1239 | # Pseudo filesystems | ||
| 1240 | # | ||
| 1241 | CONFIG_PROC_FS=y | ||
| 1242 | CONFIG_PROC_SYSCTL=y | ||
| 1243 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 1244 | CONFIG_SYSFS=y | ||
| 1245 | CONFIG_TMPFS=y | ||
| 1246 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
| 1247 | # CONFIG_HUGETLB_PAGE is not set | ||
| 1248 | # CONFIG_CONFIGFS_FS is not set | ||
| 1249 | CONFIG_MISC_FILESYSTEMS=y | ||
| 1250 | # CONFIG_ADFS_FS is not set | ||
| 1251 | # CONFIG_AFFS_FS is not set | ||
| 1252 | # CONFIG_HFS_FS is not set | ||
| 1253 | # CONFIG_HFSPLUS_FS is not set | ||
| 1254 | # CONFIG_BEFS_FS is not set | ||
| 1255 | # CONFIG_BFS_FS is not set | ||
| 1256 | # CONFIG_EFS_FS is not set | ||
| 1257 | # CONFIG_CRAMFS is not set | ||
| 1258 | # CONFIG_SQUASHFS is not set | ||
| 1259 | # CONFIG_VXFS_FS is not set | ||
| 1260 | # CONFIG_MINIX_FS is not set | ||
| 1261 | # CONFIG_OMFS_FS is not set | ||
| 1262 | # CONFIG_HPFS_FS is not set | ||
| 1263 | # CONFIG_QNX4FS_FS is not set | ||
| 1264 | # CONFIG_ROMFS_FS is not set | ||
| 1265 | # CONFIG_SYSV_FS is not set | ||
| 1266 | # CONFIG_UFS_FS is not set | ||
| 1267 | CONFIG_NETWORK_FILESYSTEMS=y | ||
| 1268 | CONFIG_NFS_FS=y | ||
| 1269 | CONFIG_NFS_V3=y | ||
| 1270 | CONFIG_NFS_V3_ACL=y | ||
| 1271 | CONFIG_NFS_V4=y | ||
| 1272 | # CONFIG_NFS_V4_1 is not set | ||
| 1273 | CONFIG_ROOT_NFS=y | ||
| 1274 | # CONFIG_NFSD is not set | ||
| 1275 | CONFIG_LOCKD=y | ||
| 1276 | CONFIG_LOCKD_V4=y | ||
| 1277 | CONFIG_NFS_ACL_SUPPORT=y | ||
| 1278 | CONFIG_NFS_COMMON=y | ||
| 1279 | CONFIG_SUNRPC=y | ||
| 1280 | CONFIG_SUNRPC_GSS=y | ||
| 1281 | CONFIG_RPCSEC_GSS_KRB5=y | ||
| 1282 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
| 1283 | # CONFIG_SMB_FS is not set | ||
| 1284 | # CONFIG_CIFS is not set | ||
| 1285 | # CONFIG_NCP_FS is not set | ||
| 1286 | # CONFIG_CODA_FS is not set | ||
| 1287 | # CONFIG_AFS_FS is not set | ||
| 1288 | |||
| 1289 | # | ||
| 1290 | # Partition Types | ||
| 1291 | # | ||
| 1292 | CONFIG_PARTITION_ADVANCED=y | ||
| 1293 | # CONFIG_ACORN_PARTITION is not set | ||
| 1294 | # CONFIG_OSF_PARTITION is not set | ||
| 1295 | # CONFIG_AMIGA_PARTITION is not set | ||
| 1296 | # CONFIG_ATARI_PARTITION is not set | ||
| 1297 | # CONFIG_MAC_PARTITION is not set | ||
| 1298 | CONFIG_MSDOS_PARTITION=y | ||
| 1299 | # CONFIG_BSD_DISKLABEL is not set | ||
| 1300 | # CONFIG_MINIX_SUBPARTITION is not set | ||
| 1301 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
| 1302 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
| 1303 | # CONFIG_LDM_PARTITION is not set | ||
| 1304 | # CONFIG_SGI_PARTITION is not set | ||
| 1305 | # CONFIG_ULTRIX_PARTITION is not set | ||
| 1306 | # CONFIG_SUN_PARTITION is not set | ||
| 1307 | # CONFIG_KARMA_PARTITION is not set | ||
| 1308 | # CONFIG_EFI_PARTITION is not set | ||
| 1309 | # CONFIG_SYSV68_PARTITION is not set | ||
| 1310 | CONFIG_NLS=y | ||
| 1311 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
| 1312 | CONFIG_NLS_CODEPAGE_437=y | ||
| 1313 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
| 1314 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
| 1315 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
| 1316 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
| 1317 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
| 1318 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
| 1319 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
| 1320 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
| 1321 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
| 1322 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
| 1323 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
| 1324 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
| 1325 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
| 1326 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
| 1327 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
| 1328 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
| 1329 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
| 1330 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
| 1331 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
| 1332 | # CONFIG_NLS_ISO8859_8 is not set | ||
| 1333 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
| 1334 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
| 1335 | # CONFIG_NLS_ASCII is not set | ||
| 1336 | CONFIG_NLS_ISO8859_1=y | ||
| 1337 | # CONFIG_NLS_ISO8859_2 is not set | ||
| 1338 | # CONFIG_NLS_ISO8859_3 is not set | ||
| 1339 | # CONFIG_NLS_ISO8859_4 is not set | ||
| 1340 | # CONFIG_NLS_ISO8859_5 is not set | ||
| 1341 | # CONFIG_NLS_ISO8859_6 is not set | ||
| 1342 | # CONFIG_NLS_ISO8859_7 is not set | ||
| 1343 | # CONFIG_NLS_ISO8859_9 is not set | ||
| 1344 | # CONFIG_NLS_ISO8859_13 is not set | ||
| 1345 | # CONFIG_NLS_ISO8859_14 is not set | ||
| 1346 | # CONFIG_NLS_ISO8859_15 is not set | ||
| 1347 | # CONFIG_NLS_KOI8_R is not set | ||
| 1348 | # CONFIG_NLS_KOI8_U is not set | ||
| 1349 | # CONFIG_NLS_UTF8 is not set | ||
| 1350 | # CONFIG_DLM is not set | ||
| 1351 | |||
| 1352 | # | ||
| 1353 | # Kernel hacking | ||
| 1354 | # | ||
| 1355 | CONFIG_PRINTK_TIME=y | ||
| 1356 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 1357 | CONFIG_ENABLE_MUST_CHECK=y | ||
| 1358 | CONFIG_FRAME_WARN=1024 | ||
| 1359 | CONFIG_MAGIC_SYSRQ=y | ||
| 1360 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 1361 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 1362 | # CONFIG_DEBUG_FS is not set | ||
| 1363 | # CONFIG_HEADERS_CHECK is not set | ||
| 1364 | CONFIG_DEBUG_KERNEL=y | ||
| 1365 | # CONFIG_DEBUG_SHIRQ is not set | ||
| 1366 | CONFIG_DETECT_SOFTLOCKUP=y | ||
| 1367 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | ||
| 1368 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | ||
| 1369 | CONFIG_DETECT_HUNG_TASK=y | ||
| 1370 | # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set | ||
| 1371 | CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 | ||
| 1372 | CONFIG_SCHED_DEBUG=y | ||
| 1373 | # CONFIG_SCHEDSTATS is not set | ||
| 1374 | # CONFIG_TIMER_STATS is not set | ||
| 1375 | # CONFIG_DEBUG_OBJECTS is not set | ||
| 1376 | # CONFIG_DEBUG_SLAB is not set | ||
| 1377 | # CONFIG_DEBUG_KMEMLEAK is not set | ||
| 1378 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
| 1379 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 1380 | # CONFIG_DEBUG_SPINLOCK is not set | ||
| 1381 | CONFIG_DEBUG_MUTEXES=y | ||
| 1382 | # CONFIG_DEBUG_LOCK_ALLOC is not set | ||
| 1383 | # CONFIG_PROVE_LOCKING is not set | ||
| 1384 | # CONFIG_LOCK_STAT is not set | ||
| 1385 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
| 1386 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
| 1387 | # CONFIG_DEBUG_KOBJECT is not set | ||
| 1388 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
| 1389 | CONFIG_DEBUG_INFO=y | ||
| 1390 | # CONFIG_DEBUG_VM is not set | ||
| 1391 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
| 1392 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
| 1393 | # CONFIG_DEBUG_LIST is not set | ||
| 1394 | # CONFIG_DEBUG_SG is not set | ||
| 1395 | # CONFIG_DEBUG_NOTIFIERS is not set | ||
| 1396 | # CONFIG_DEBUG_CREDENTIALS is not set | ||
| 1397 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
| 1398 | # CONFIG_RCU_TORTURE_TEST is not set | ||
| 1399 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 1400 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
| 1401 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
| 1402 | # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set | ||
| 1403 | # CONFIG_FAULT_INJECTION is not set | ||
| 1404 | # CONFIG_LATENCYTOP is not set | ||
| 1405 | # CONFIG_PAGE_POISONING is not set | ||
| 1406 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 1407 | CONFIG_TRACING_SUPPORT=y | ||
| 1408 | CONFIG_FTRACE=y | ||
| 1409 | # CONFIG_FUNCTION_TRACER is not set | ||
| 1410 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 1411 | # CONFIG_SCHED_TRACER is not set | ||
| 1412 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set | ||
| 1413 | # CONFIG_BOOT_TRACER is not set | ||
| 1414 | CONFIG_BRANCH_PROFILE_NONE=y | ||
| 1415 | # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set | ||
| 1416 | # CONFIG_PROFILE_ALL_BRANCHES is not set | ||
| 1417 | # CONFIG_STACK_TRACER is not set | ||
| 1418 | # CONFIG_KMEMTRACE is not set | ||
| 1419 | # CONFIG_WORKQUEUE_TRACER is not set | ||
| 1420 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 1421 | # CONFIG_SAMPLES is not set | ||
| 1422 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 1423 | # CONFIG_KGDB is not set | ||
| 1424 | CONFIG_ARM_UNWIND=y | ||
| 1425 | # CONFIG_DEBUG_USER is not set | ||
| 1426 | # CONFIG_DEBUG_ERRORS is not set | ||
| 1427 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
| 1428 | CONFIG_DEBUG_LL=y | ||
| 1429 | # CONFIG_DEBUG_ICEDCC is not set | ||
| 1430 | |||
| 1431 | # | ||
| 1432 | # Security options | ||
| 1433 | # | ||
| 1434 | # CONFIG_KEYS is not set | ||
| 1435 | # CONFIG_SECURITY is not set | ||
| 1436 | # CONFIG_SECURITYFS is not set | ||
| 1437 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
| 1438 | CONFIG_CRYPTO=y | ||
| 1439 | |||
| 1440 | # | ||
| 1441 | # Crypto core or helper | ||
| 1442 | # | ||
| 1443 | CONFIG_CRYPTO_ALGAPI=y | ||
| 1444 | CONFIG_CRYPTO_ALGAPI2=y | ||
| 1445 | CONFIG_CRYPTO_AEAD2=y | ||
| 1446 | CONFIG_CRYPTO_BLKCIPHER=y | ||
| 1447 | CONFIG_CRYPTO_BLKCIPHER2=y | ||
| 1448 | CONFIG_CRYPTO_HASH=y | ||
| 1449 | CONFIG_CRYPTO_HASH2=y | ||
| 1450 | CONFIG_CRYPTO_RNG2=y | ||
| 1451 | CONFIG_CRYPTO_PCOMP=y | ||
| 1452 | CONFIG_CRYPTO_MANAGER=y | ||
| 1453 | CONFIG_CRYPTO_MANAGER2=y | ||
| 1454 | # CONFIG_CRYPTO_GF128MUL is not set | ||
| 1455 | # CONFIG_CRYPTO_NULL is not set | ||
| 1456 | CONFIG_CRYPTO_WORKQUEUE=y | ||
| 1457 | # CONFIG_CRYPTO_CRYPTD is not set | ||
| 1458 | # CONFIG_CRYPTO_AUTHENC is not set | ||
| 1459 | # CONFIG_CRYPTO_TEST is not set | ||
| 1460 | |||
| 1461 | # | ||
| 1462 | # Authenticated Encryption with Associated Data | ||
| 1463 | # | ||
| 1464 | # CONFIG_CRYPTO_CCM is not set | ||
| 1465 | # CONFIG_CRYPTO_GCM is not set | ||
| 1466 | # CONFIG_CRYPTO_SEQIV is not set | ||
| 1467 | |||
| 1468 | # | ||
| 1469 | # Block modes | ||
| 1470 | # | ||
| 1471 | CONFIG_CRYPTO_CBC=y | ||
| 1472 | # CONFIG_CRYPTO_CTR is not set | ||
| 1473 | # CONFIG_CRYPTO_CTS is not set | ||
| 1474 | CONFIG_CRYPTO_ECB=y | ||
| 1475 | # CONFIG_CRYPTO_LRW is not set | ||
| 1476 | CONFIG_CRYPTO_PCBC=m | ||
| 1477 | # CONFIG_CRYPTO_XTS is not set | ||
| 1478 | |||
| 1479 | # | ||
| 1480 | # Hash modes | ||
| 1481 | # | ||
| 1482 | # CONFIG_CRYPTO_HMAC is not set | ||
| 1483 | # CONFIG_CRYPTO_XCBC is not set | ||
| 1484 | # CONFIG_CRYPTO_VMAC is not set | ||
| 1485 | |||
| 1486 | # | ||
| 1487 | # Digest | ||
| 1488 | # | ||
| 1489 | CONFIG_CRYPTO_CRC32C=y | ||
| 1490 | # CONFIG_CRYPTO_GHASH is not set | ||
| 1491 | # CONFIG_CRYPTO_MD4 is not set | ||
| 1492 | CONFIG_CRYPTO_MD5=y | ||
| 1493 | CONFIG_CRYPTO_MICHAEL_MIC=m | ||
| 1494 | # CONFIG_CRYPTO_RMD128 is not set | ||
| 1495 | # CONFIG_CRYPTO_RMD160 is not set | ||
| 1496 | # CONFIG_CRYPTO_RMD256 is not set | ||
| 1497 | # CONFIG_CRYPTO_RMD320 is not set | ||
| 1498 | # CONFIG_CRYPTO_SHA1 is not set | ||
| 1499 | # CONFIG_CRYPTO_SHA256 is not set | ||
| 1500 | # CONFIG_CRYPTO_SHA512 is not set | ||
| 1501 | # CONFIG_CRYPTO_TGR192 is not set | ||
| 1502 | # CONFIG_CRYPTO_WP512 is not set | ||
| 1503 | |||
| 1504 | # | ||
| 1505 | # Ciphers | ||
| 1506 | # | ||
| 1507 | CONFIG_CRYPTO_AES=y | ||
| 1508 | # CONFIG_CRYPTO_ANUBIS is not set | ||
| 1509 | CONFIG_CRYPTO_ARC4=y | ||
| 1510 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
| 1511 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
| 1512 | # CONFIG_CRYPTO_CAST5 is not set | ||
| 1513 | # CONFIG_CRYPTO_CAST6 is not set | ||
| 1514 | CONFIG_CRYPTO_DES=y | ||
| 1515 | # CONFIG_CRYPTO_FCRYPT is not set | ||
| 1516 | # CONFIG_CRYPTO_KHAZAD is not set | ||
| 1517 | # CONFIG_CRYPTO_SALSA20 is not set | ||
| 1518 | # CONFIG_CRYPTO_SEED is not set | ||
| 1519 | # CONFIG_CRYPTO_SERPENT is not set | ||
| 1520 | # CONFIG_CRYPTO_TEA is not set | ||
| 1521 | # CONFIG_CRYPTO_TWOFISH is not set | ||
| 1522 | |||
| 1523 | # | ||
| 1524 | # Compression | ||
| 1525 | # | ||
| 1526 | # CONFIG_CRYPTO_DEFLATE is not set | ||
| 1527 | # CONFIG_CRYPTO_ZLIB is not set | ||
| 1528 | # CONFIG_CRYPTO_LZO is not set | ||
| 1529 | |||
| 1530 | # | ||
| 1531 | # Random Number Generation | ||
| 1532 | # | ||
| 1533 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
| 1534 | CONFIG_CRYPTO_HW=y | ||
| 1535 | # CONFIG_BINARY_PRINTF is not set | ||
| 1536 | |||
| 1537 | # | ||
| 1538 | # Library routines | ||
| 1539 | # | ||
| 1540 | CONFIG_BITREVERSE=y | ||
| 1541 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
| 1542 | CONFIG_CRC_CCITT=y | ||
| 1543 | CONFIG_CRC16=m | ||
| 1544 | CONFIG_CRC_T10DIF=y | ||
| 1545 | CONFIG_CRC_ITU_T=m | ||
| 1546 | CONFIG_CRC32=y | ||
| 1547 | # CONFIG_CRC7 is not set | ||
| 1548 | CONFIG_LIBCRC32C=y | ||
| 1549 | CONFIG_ZLIB_INFLATE=y | ||
| 1550 | CONFIG_DECOMPRESS_GZIP=y | ||
| 1551 | CONFIG_HAS_IOMEM=y | ||
| 1552 | CONFIG_HAS_IOPORT=y | ||
| 1553 | CONFIG_HAS_DMA=y | ||
| 1554 | CONFIG_NLATTR=y | ||
diff --git a/arch/arm/configs/mx3_defconfig b/arch/arm/configs/mx3_defconfig index a4f9a2a8149..7734ccab211 100644 --- a/arch/arm/configs/mx3_defconfig +++ b/arch/arm/configs/mx3_defconfig | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.31-rc4 | 3 | # Linux kernel version: 2.6.32-rc5 |
| 4 | # Tue Jul 28 14:11:34 2009 | 4 | # Sun Nov 1 22:56:24 2009 |
| 5 | # | 5 | # |
| 6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
| 7 | CONFIG_HAVE_PWM=y | 7 | CONFIG_HAVE_PWM=y |
| @@ -9,7 +9,6 @@ CONFIG_SYS_SUPPORTS_APM_EMULATION=y | |||
| 9 | CONFIG_GENERIC_GPIO=y | 9 | CONFIG_GENERIC_GPIO=y |
| 10 | CONFIG_GENERIC_TIME=y | 10 | CONFIG_GENERIC_TIME=y |
| 11 | CONFIG_GENERIC_CLOCKEVENTS=y | 11 | CONFIG_GENERIC_CLOCKEVENTS=y |
| 12 | CONFIG_MMU=y | ||
| 13 | CONFIG_GENERIC_HARDIRQS=y | 12 | CONFIG_GENERIC_HARDIRQS=y |
| 14 | CONFIG_STACKTRACE_SUPPORT=y | 13 | CONFIG_STACKTRACE_SUPPORT=y |
| 15 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | 14 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y |
| @@ -46,11 +45,12 @@ CONFIG_SYSVIPC_SYSCTL=y | |||
| 46 | # | 45 | # |
| 47 | # RCU Subsystem | 46 | # RCU Subsystem |
| 48 | # | 47 | # |
| 49 | CONFIG_CLASSIC_RCU=y | 48 | CONFIG_TREE_RCU=y |
| 50 | # CONFIG_TREE_RCU is not set | 49 | # CONFIG_TREE_PREEMPT_RCU is not set |
| 51 | # CONFIG_PREEMPT_RCU is not set | 50 | # CONFIG_RCU_TRACE is not set |
| 51 | CONFIG_RCU_FANOUT=32 | ||
| 52 | # CONFIG_RCU_FANOUT_EXACT is not set | ||
| 52 | # CONFIG_TREE_RCU_TRACE is not set | 53 | # CONFIG_TREE_RCU_TRACE is not set |
| 53 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
| 54 | CONFIG_IKCONFIG=y | 54 | CONFIG_IKCONFIG=y |
| 55 | CONFIG_IKCONFIG_PROC=y | 55 | CONFIG_IKCONFIG_PROC=y |
| 56 | CONFIG_LOG_BUF_SHIFT=14 | 56 | CONFIG_LOG_BUF_SHIFT=14 |
| @@ -87,16 +87,14 @@ CONFIG_SHMEM=y | |||
| 87 | CONFIG_AIO=y | 87 | CONFIG_AIO=y |
| 88 | 88 | ||
| 89 | # | 89 | # |
| 90 | # Performance Counters | 90 | # Kernel Performance Events And Counters |
| 91 | # | 91 | # |
| 92 | CONFIG_VM_EVENT_COUNTERS=y | 92 | CONFIG_VM_EVENT_COUNTERS=y |
| 93 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 94 | CONFIG_COMPAT_BRK=y | 93 | CONFIG_COMPAT_BRK=y |
| 95 | CONFIG_SLAB=y | 94 | CONFIG_SLAB=y |
| 96 | # CONFIG_SLUB is not set | 95 | # CONFIG_SLUB is not set |
| 97 | # CONFIG_SLOB is not set | 96 | # CONFIG_SLOB is not set |
| 98 | # CONFIG_PROFILING is not set | 97 | # CONFIG_PROFILING is not set |
| 99 | # CONFIG_MARKERS is not set | ||
| 100 | CONFIG_HAVE_OPROFILE=y | 98 | CONFIG_HAVE_OPROFILE=y |
| 101 | # CONFIG_KPROBES is not set | 99 | # CONFIG_KPROBES is not set |
| 102 | CONFIG_HAVE_KPROBES=y | 100 | CONFIG_HAVE_KPROBES=y |
| @@ -139,6 +137,7 @@ CONFIG_FREEZER=y | |||
| 139 | # | 137 | # |
| 140 | # System Type | 138 | # System Type |
| 141 | # | 139 | # |
| 140 | CONFIG_MMU=y | ||
| 142 | # CONFIG_ARCH_AAEC2000 is not set | 141 | # CONFIG_ARCH_AAEC2000 is not set |
| 143 | # CONFIG_ARCH_INTEGRATOR is not set | 142 | # CONFIG_ARCH_INTEGRATOR is not set |
| 144 | # CONFIG_ARCH_REALVIEW is not set | 143 | # CONFIG_ARCH_REALVIEW is not set |
| @@ -153,6 +152,7 @@ CONFIG_ARCH_MXC=y | |||
| 153 | # CONFIG_ARCH_STMP3XXX is not set | 152 | # CONFIG_ARCH_STMP3XXX is not set |
| 154 | # CONFIG_ARCH_NETX is not set | 153 | # CONFIG_ARCH_NETX is not set |
| 155 | # CONFIG_ARCH_H720X is not set | 154 | # CONFIG_ARCH_H720X is not set |
| 155 | # CONFIG_ARCH_NOMADIK is not set | ||
| 156 | # CONFIG_ARCH_IOP13XX is not set | 156 | # CONFIG_ARCH_IOP13XX is not set |
| 157 | # CONFIG_ARCH_IOP32X is not set | 157 | # CONFIG_ARCH_IOP32X is not set |
| 158 | # CONFIG_ARCH_IOP33X is not set | 158 | # CONFIG_ARCH_IOP33X is not set |
| @@ -175,18 +175,22 @@ CONFIG_ARCH_MXC=y | |||
| 175 | # CONFIG_ARCH_SA1100 is not set | 175 | # CONFIG_ARCH_SA1100 is not set |
| 176 | # CONFIG_ARCH_S3C2410 is not set | 176 | # CONFIG_ARCH_S3C2410 is not set |
| 177 | # CONFIG_ARCH_S3C64XX is not set | 177 | # CONFIG_ARCH_S3C64XX is not set |
| 178 | # CONFIG_ARCH_S5PC1XX is not set | ||
| 178 | # CONFIG_ARCH_SHARK is not set | 179 | # CONFIG_ARCH_SHARK is not set |
| 179 | # CONFIG_ARCH_LH7A40X is not set | 180 | # CONFIG_ARCH_LH7A40X is not set |
| 180 | # CONFIG_ARCH_U300 is not set | 181 | # CONFIG_ARCH_U300 is not set |
| 181 | # CONFIG_ARCH_DAVINCI is not set | 182 | # CONFIG_ARCH_DAVINCI is not set |
| 182 | # CONFIG_ARCH_OMAP is not set | 183 | # CONFIG_ARCH_OMAP is not set |
| 184 | # CONFIG_ARCH_BCMRING is not set | ||
| 183 | 185 | ||
| 184 | # | 186 | # |
| 185 | # Freescale MXC Implementations | 187 | # Freescale MXC Implementations |
| 186 | # | 188 | # |
| 187 | # CONFIG_ARCH_MX1 is not set | 189 | # CONFIG_ARCH_MX1 is not set |
| 188 | # CONFIG_ARCH_MX2 is not set | 190 | # CONFIG_ARCH_MX2 is not set |
| 191 | # CONFIG_ARCH_MX25 is not set | ||
| 189 | CONFIG_ARCH_MX3=y | 192 | CONFIG_ARCH_MX3=y |
| 193 | # CONFIG_ARCH_MXC91231 is not set | ||
| 190 | CONFIG_ARCH_MX31=y | 194 | CONFIG_ARCH_MX31=y |
| 191 | CONFIG_ARCH_MX35=y | 195 | CONFIG_ARCH_MX35=y |
| 192 | 196 | ||
| @@ -205,6 +209,7 @@ CONFIG_MACH_QONG=y | |||
| 205 | CONFIG_MACH_PCM043=y | 209 | CONFIG_MACH_PCM043=y |
| 206 | CONFIG_MACH_ARMADILLO5X0=y | 210 | CONFIG_MACH_ARMADILLO5X0=y |
| 207 | CONFIG_MACH_MX35_3DS=y | 211 | CONFIG_MACH_MX35_3DS=y |
| 212 | CONFIG_MACH_KZM_ARM11_01=y | ||
| 208 | CONFIG_MXC_IRQ_PRIOR=y | 213 | CONFIG_MXC_IRQ_PRIOR=y |
| 209 | CONFIG_MXC_PWM=y | 214 | CONFIG_MXC_PWM=y |
| 210 | CONFIG_ARCH_HAS_RNGA=y | 215 | CONFIG_ARCH_HAS_RNGA=y |
| @@ -218,7 +223,7 @@ CONFIG_CPU_V6=y | |||
| 218 | # CONFIG_CPU_32v6K is not set | 223 | # CONFIG_CPU_32v6K is not set |
| 219 | CONFIG_CPU_32v6=y | 224 | CONFIG_CPU_32v6=y |
| 220 | CONFIG_CPU_ABRT_EV6=y | 225 | CONFIG_CPU_ABRT_EV6=y |
| 221 | CONFIG_CPU_PABRT_NOIFAR=y | 226 | CONFIG_CPU_PABRT_V6=y |
| 222 | CONFIG_CPU_CACHE_V6=y | 227 | CONFIG_CPU_CACHE_V6=y |
| 223 | CONFIG_CPU_CACHE_VIPT=y | 228 | CONFIG_CPU_CACHE_VIPT=y |
| 224 | CONFIG_CPU_COPY_V6=y | 229 | CONFIG_CPU_COPY_V6=y |
| @@ -236,6 +241,7 @@ CONFIG_ARM_THUMB=y | |||
| 236 | # CONFIG_CPU_BPREDICT_DISABLE is not set | 241 | # CONFIG_CPU_BPREDICT_DISABLE is not set |
| 237 | CONFIG_OUTER_CACHE=y | 242 | CONFIG_OUTER_CACHE=y |
| 238 | CONFIG_CACHE_L2X0=y | 243 | CONFIG_CACHE_L2X0=y |
| 244 | CONFIG_ARM_L1_CACHE_SHIFT=5 | ||
| 239 | # CONFIG_ARM_ERRATA_411920 is not set | 245 | # CONFIG_ARM_ERRATA_411920 is not set |
| 240 | CONFIG_COMMON_CLKDEV=y | 246 | CONFIG_COMMON_CLKDEV=y |
| 241 | 247 | ||
| @@ -257,6 +263,8 @@ CONFIG_VMSPLIT_3G=y | |||
| 257 | # CONFIG_VMSPLIT_2G is not set | 263 | # CONFIG_VMSPLIT_2G is not set |
| 258 | # CONFIG_VMSPLIT_1G is not set | 264 | # CONFIG_VMSPLIT_1G is not set |
| 259 | CONFIG_PAGE_OFFSET=0xC0000000 | 265 | CONFIG_PAGE_OFFSET=0xC0000000 |
| 266 | # CONFIG_PREEMPT_NONE is not set | ||
| 267 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
| 260 | CONFIG_PREEMPT=y | 268 | CONFIG_PREEMPT=y |
| 261 | CONFIG_HZ=100 | 269 | CONFIG_HZ=100 |
| 262 | CONFIG_AEABI=y | 270 | CONFIG_AEABI=y |
| @@ -277,6 +285,7 @@ CONFIG_ZONE_DMA_FLAG=0 | |||
| 277 | CONFIG_VIRT_TO_BUS=y | 285 | CONFIG_VIRT_TO_BUS=y |
| 278 | CONFIG_HAVE_MLOCK=y | 286 | CONFIG_HAVE_MLOCK=y |
| 279 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | 287 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y |
| 288 | # CONFIG_KSM is not set | ||
| 280 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | 289 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 |
| 281 | CONFIG_ALIGNMENT_TRAP=y | 290 | CONFIG_ALIGNMENT_TRAP=y |
| 282 | # CONFIG_UACCESS_WITH_MEMCPY is not set | 291 | # CONFIG_UACCESS_WITH_MEMCPY is not set |
| @@ -326,6 +335,7 @@ CONFIG_PM_SLEEP=y | |||
| 326 | CONFIG_SUSPEND=y | 335 | CONFIG_SUSPEND=y |
| 327 | CONFIG_SUSPEND_FREEZER=y | 336 | CONFIG_SUSPEND_FREEZER=y |
| 328 | # CONFIG_APM_EMULATION is not set | 337 | # CONFIG_APM_EMULATION is not set |
| 338 | # CONFIG_PM_RUNTIME is not set | ||
| 329 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | 339 | CONFIG_ARCH_SUSPEND_POSSIBLE=y |
| 330 | CONFIG_NET=y | 340 | CONFIG_NET=y |
| 331 | 341 | ||
| @@ -367,6 +377,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
| 367 | # CONFIG_NETFILTER is not set | 377 | # CONFIG_NETFILTER is not set |
| 368 | # CONFIG_IP_DCCP is not set | 378 | # CONFIG_IP_DCCP is not set |
| 369 | # CONFIG_IP_SCTP is not set | 379 | # CONFIG_IP_SCTP is not set |
| 380 | # CONFIG_RDS is not set | ||
| 370 | # CONFIG_TIPC is not set | 381 | # CONFIG_TIPC is not set |
| 371 | # CONFIG_ATM is not set | 382 | # CONFIG_ATM is not set |
| 372 | # CONFIG_BRIDGE is not set | 383 | # CONFIG_BRIDGE is not set |
| @@ -407,6 +418,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
| 407 | # Generic Driver Options | 418 | # Generic Driver Options |
| 408 | # | 419 | # |
| 409 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 420 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 421 | # CONFIG_DEVTMPFS is not set | ||
| 410 | CONFIG_STANDALONE=y | 422 | CONFIG_STANDALONE=y |
| 411 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 423 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
| 412 | CONFIG_FW_LOADER=m | 424 | CONFIG_FW_LOADER=m |
| @@ -416,9 +428,9 @@ CONFIG_EXTRA_FIRMWARE="" | |||
| 416 | # CONFIG_CONNECTOR is not set | 428 | # CONFIG_CONNECTOR is not set |
| 417 | CONFIG_MTD=y | 429 | CONFIG_MTD=y |
| 418 | # CONFIG_MTD_DEBUG is not set | 430 | # CONFIG_MTD_DEBUG is not set |
| 431 | # CONFIG_MTD_TESTS is not set | ||
| 419 | # CONFIG_MTD_CONCAT is not set | 432 | # CONFIG_MTD_CONCAT is not set |
| 420 | CONFIG_MTD_PARTITIONS=y | 433 | CONFIG_MTD_PARTITIONS=y |
| 421 | # CONFIG_MTD_TESTS is not set | ||
| 422 | # CONFIG_MTD_REDBOOT_PARTS is not set | 434 | # CONFIG_MTD_REDBOOT_PARTS is not set |
| 423 | CONFIG_MTD_CMDLINE_PARTS=y | 435 | CONFIG_MTD_CMDLINE_PARTS=y |
| 424 | # CONFIG_MTD_AFS_PARTS is not set | 436 | # CONFIG_MTD_AFS_PARTS is not set |
| @@ -587,14 +599,12 @@ CONFIG_DNET=y | |||
| 587 | # CONFIG_B44 is not set | 599 | # CONFIG_B44 is not set |
| 588 | # CONFIG_CS89x0 is not set | 600 | # CONFIG_CS89x0 is not set |
| 589 | # CONFIG_KS8842 is not set | 601 | # CONFIG_KS8842 is not set |
| 602 | # CONFIG_KS8851_MLL is not set | ||
| 590 | CONFIG_FEC=y | 603 | CONFIG_FEC=y |
| 591 | # CONFIG_FEC2 is not set | 604 | # CONFIG_FEC2 is not set |
| 592 | # CONFIG_NETDEV_1000 is not set | 605 | # CONFIG_NETDEV_1000 is not set |
| 593 | # CONFIG_NETDEV_10000 is not set | 606 | # CONFIG_NETDEV_10000 is not set |
| 594 | 607 | CONFIG_WLAN=y | |
| 595 | # | ||
| 596 | # Wireless LAN | ||
| 597 | # | ||
| 598 | # CONFIG_WLAN_PRE80211 is not set | 608 | # CONFIG_WLAN_PRE80211 is not set |
| 599 | # CONFIG_WLAN_80211 is not set | 609 | # CONFIG_WLAN_80211 is not set |
| 600 | 610 | ||
| @@ -608,6 +618,7 @@ CONFIG_FEC=y | |||
| 608 | # CONFIG_NETPOLL is not set | 618 | # CONFIG_NETPOLL is not set |
| 609 | # CONFIG_NET_POLL_CONTROLLER is not set | 619 | # CONFIG_NET_POLL_CONTROLLER is not set |
| 610 | # CONFIG_ISDN is not set | 620 | # CONFIG_ISDN is not set |
| 621 | # CONFIG_PHONE is not set | ||
| 611 | 622 | ||
| 612 | # | 623 | # |
| 613 | # Input device support | 624 | # Input device support |
| @@ -630,7 +641,14 @@ CONFIG_DEVKMEM=y | |||
| 630 | # | 641 | # |
| 631 | # Serial drivers | 642 | # Serial drivers |
| 632 | # | 643 | # |
| 633 | # CONFIG_SERIAL_8250 is not set | 644 | CONFIG_SERIAL_8250=m |
| 645 | CONFIG_SERIAL_8250_NR_UARTS=4 | ||
| 646 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
| 647 | CONFIG_SERIAL_8250_EXTENDED=y | ||
| 648 | # CONFIG_SERIAL_8250_MANY_PORTS is not set | ||
| 649 | CONFIG_SERIAL_8250_SHARE_IRQ=y | ||
| 650 | # CONFIG_SERIAL_8250_DETECT_IRQ is not set | ||
| 651 | # CONFIG_SERIAL_8250_RSA is not set | ||
| 634 | 652 | ||
| 635 | # | 653 | # |
| 636 | # Non-8250 serial port support | 654 | # Non-8250 serial port support |
| @@ -649,6 +667,7 @@ CONFIG_UNIX98_PTYS=y | |||
| 649 | # CONFIG_TCG_TPM is not set | 667 | # CONFIG_TCG_TPM is not set |
| 650 | CONFIG_I2C=y | 668 | CONFIG_I2C=y |
| 651 | CONFIG_I2C_BOARDINFO=y | 669 | CONFIG_I2C_BOARDINFO=y |
| 670 | CONFIG_I2C_COMPAT=y | ||
| 652 | CONFIG_I2C_CHARDEV=y | 671 | CONFIG_I2C_CHARDEV=y |
| 653 | CONFIG_I2C_HELPER_AUTO=y | 672 | CONFIG_I2C_HELPER_AUTO=y |
| 654 | 673 | ||
| @@ -681,15 +700,17 @@ CONFIG_I2C_IMX=y | |||
| 681 | # Miscellaneous I2C Chip support | 700 | # Miscellaneous I2C Chip support |
| 682 | # | 701 | # |
| 683 | # CONFIG_DS1682 is not set | 702 | # CONFIG_DS1682 is not set |
| 684 | # CONFIG_SENSORS_PCF8574 is not set | ||
| 685 | # CONFIG_PCF8575 is not set | ||
| 686 | # CONFIG_SENSORS_PCA9539 is not set | ||
| 687 | # CONFIG_SENSORS_TSL2550 is not set | 703 | # CONFIG_SENSORS_TSL2550 is not set |
| 688 | # CONFIG_I2C_DEBUG_CORE is not set | 704 | # CONFIG_I2C_DEBUG_CORE is not set |
| 689 | # CONFIG_I2C_DEBUG_ALGO is not set | 705 | # CONFIG_I2C_DEBUG_ALGO is not set |
| 690 | # CONFIG_I2C_DEBUG_BUS is not set | 706 | # CONFIG_I2C_DEBUG_BUS is not set |
| 691 | # CONFIG_I2C_DEBUG_CHIP is not set | 707 | # CONFIG_I2C_DEBUG_CHIP is not set |
| 692 | # CONFIG_SPI is not set | 708 | # CONFIG_SPI is not set |
| 709 | |||
| 710 | # | ||
| 711 | # PPS support | ||
| 712 | # | ||
| 713 | # CONFIG_PPS is not set | ||
| 693 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | 714 | CONFIG_ARCH_REQUIRE_GPIOLIB=y |
| 694 | CONFIG_GPIOLIB=y | 715 | CONFIG_GPIOLIB=y |
| 695 | # CONFIG_GPIO_SYSFS is not set | 716 | # CONFIG_GPIO_SYSFS is not set |
| @@ -712,6 +733,10 @@ CONFIG_GPIOLIB=y | |||
| 712 | # | 733 | # |
| 713 | # SPI GPIO expanders: | 734 | # SPI GPIO expanders: |
| 714 | # | 735 | # |
| 736 | |||
| 737 | # | ||
| 738 | # AC97 GPIO expanders: | ||
| 739 | # | ||
| 715 | CONFIG_W1=y | 740 | CONFIG_W1=y |
| 716 | 741 | ||
| 717 | # | 742 | # |
| @@ -734,7 +759,6 @@ CONFIG_W1_SLAVE_THERM=y | |||
| 734 | # CONFIG_POWER_SUPPLY is not set | 759 | # CONFIG_POWER_SUPPLY is not set |
| 735 | # CONFIG_HWMON is not set | 760 | # CONFIG_HWMON is not set |
| 736 | # CONFIG_THERMAL is not set | 761 | # CONFIG_THERMAL is not set |
| 737 | # CONFIG_THERMAL_HWMON is not set | ||
| 738 | # CONFIG_WATCHDOG is not set | 762 | # CONFIG_WATCHDOG is not set |
| 739 | CONFIG_SSB_POSSIBLE=y | 763 | CONFIG_SSB_POSSIBLE=y |
| 740 | 764 | ||
| @@ -759,12 +783,24 @@ CONFIG_SSB_POSSIBLE=y | |||
| 759 | # CONFIG_MFD_TC6393XB is not set | 783 | # CONFIG_MFD_TC6393XB is not set |
| 760 | # CONFIG_PMIC_DA903X is not set | 784 | # CONFIG_PMIC_DA903X is not set |
| 761 | # CONFIG_MFD_WM8400 is not set | 785 | # CONFIG_MFD_WM8400 is not set |
| 786 | # CONFIG_MFD_WM831X is not set | ||
| 762 | CONFIG_MFD_WM8350=y | 787 | CONFIG_MFD_WM8350=y |
| 763 | CONFIG_MFD_WM8350_CONFIG_MODE_0=y | 788 | CONFIG_MFD_WM8350_CONFIG_MODE_0=y |
| 764 | CONFIG_MFD_WM8352_CONFIG_MODE_0=y | 789 | CONFIG_MFD_WM8352_CONFIG_MODE_0=y |
| 765 | CONFIG_MFD_WM8350_I2C=y | 790 | CONFIG_MFD_WM8350_I2C=y |
| 766 | # CONFIG_MFD_PCF50633 is not set | 791 | # CONFIG_MFD_PCF50633 is not set |
| 767 | # CONFIG_AB3100_CORE is not set | 792 | # CONFIG_AB3100_CORE is not set |
| 793 | CONFIG_REGULATOR=y | ||
| 794 | # CONFIG_REGULATOR_DEBUG is not set | ||
| 795 | # CONFIG_REGULATOR_FIXED_VOLTAGE is not set | ||
| 796 | # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set | ||
| 797 | # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set | ||
| 798 | # CONFIG_REGULATOR_BQ24022 is not set | ||
| 799 | # CONFIG_REGULATOR_MAX1586 is not set | ||
| 800 | CONFIG_REGULATOR_WM8350=y | ||
| 801 | # CONFIG_REGULATOR_LP3971 is not set | ||
| 802 | # CONFIG_REGULATOR_TPS65023 is not set | ||
| 803 | # CONFIG_REGULATOR_TPS6507X is not set | ||
| 768 | CONFIG_MEDIA_SUPPORT=y | 804 | CONFIG_MEDIA_SUPPORT=y |
| 769 | 805 | ||
| 770 | # | 806 | # |
| @@ -874,10 +910,12 @@ CONFIG_MMC_BLOCK_BOUNCE=y | |||
| 874 | # MMC/SD/SDIO Host Controller Drivers | 910 | # MMC/SD/SDIO Host Controller Drivers |
| 875 | # | 911 | # |
| 876 | # CONFIG_MMC_SDHCI is not set | 912 | # CONFIG_MMC_SDHCI is not set |
| 913 | # CONFIG_MMC_AT91 is not set | ||
| 914 | # CONFIG_MMC_ATMELMCI is not set | ||
| 877 | CONFIG_MMC_MXC=y | 915 | CONFIG_MMC_MXC=y |
| 878 | # CONFIG_MEMSTICK is not set | 916 | # CONFIG_MEMSTICK is not set |
| 879 | # CONFIG_ACCESSIBILITY is not set | ||
| 880 | # CONFIG_NEW_LEDS is not set | 917 | # CONFIG_NEW_LEDS is not set |
| 918 | # CONFIG_ACCESSIBILITY is not set | ||
| 881 | CONFIG_RTC_LIB=y | 919 | CONFIG_RTC_LIB=y |
| 882 | # CONFIG_RTC_CLASS is not set | 920 | # CONFIG_RTC_CLASS is not set |
| 883 | CONFIG_DMADEVICES=y | 921 | CONFIG_DMADEVICES=y |
| @@ -896,16 +934,11 @@ CONFIG_DMA_ENGINE=y | |||
| 896 | # CONFIG_ASYNC_TX_DMA is not set | 934 | # CONFIG_ASYNC_TX_DMA is not set |
| 897 | # CONFIG_DMATEST is not set | 935 | # CONFIG_DMATEST is not set |
| 898 | # CONFIG_AUXDISPLAY is not set | 936 | # CONFIG_AUXDISPLAY is not set |
| 899 | CONFIG_REGULATOR=y | ||
| 900 | # CONFIG_REGULATOR_DEBUG is not set | ||
| 901 | # CONFIG_REGULATOR_FIXED_VOLTAGE is not set | ||
| 902 | # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set | ||
| 903 | # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set | ||
| 904 | # CONFIG_REGULATOR_BQ24022 is not set | ||
| 905 | # CONFIG_REGULATOR_MAX1586 is not set | ||
| 906 | CONFIG_REGULATOR_WM8350=y | ||
| 907 | # CONFIG_REGULATOR_LP3971 is not set | ||
| 908 | # CONFIG_UIO is not set | 937 | # CONFIG_UIO is not set |
| 938 | |||
| 939 | # | ||
| 940 | # TI VLYNQ | ||
| 941 | # | ||
| 909 | # CONFIG_STAGING is not set | 942 | # CONFIG_STAGING is not set |
| 910 | 943 | ||
| 911 | # | 944 | # |
| @@ -921,6 +954,7 @@ CONFIG_REGULATOR_WM8350=y | |||
| 921 | # CONFIG_GFS2_FS is not set | 954 | # CONFIG_GFS2_FS is not set |
| 922 | # CONFIG_OCFS2_FS is not set | 955 | # CONFIG_OCFS2_FS is not set |
| 923 | # CONFIG_BTRFS_FS is not set | 956 | # CONFIG_BTRFS_FS is not set |
| 957 | # CONFIG_NILFS2_FS is not set | ||
| 924 | CONFIG_FILE_LOCKING=y | 958 | CONFIG_FILE_LOCKING=y |
| 925 | CONFIG_FSNOTIFY=y | 959 | CONFIG_FSNOTIFY=y |
| 926 | # CONFIG_DNOTIFY is not set | 960 | # CONFIG_DNOTIFY is not set |
| @@ -995,7 +1029,6 @@ CONFIG_UBIFS_FS_ZLIB=y | |||
| 995 | # CONFIG_ROMFS_FS is not set | 1029 | # CONFIG_ROMFS_FS is not set |
| 996 | # CONFIG_SYSV_FS is not set | 1030 | # CONFIG_SYSV_FS is not set |
| 997 | # CONFIG_UFS_FS is not set | 1031 | # CONFIG_UFS_FS is not set |
| 998 | # CONFIG_NILFS2_FS is not set | ||
| 999 | CONFIG_NETWORK_FILESYSTEMS=y | 1032 | CONFIG_NETWORK_FILESYSTEMS=y |
| 1000 | CONFIG_NFS_FS=y | 1033 | CONFIG_NFS_FS=y |
| 1001 | CONFIG_NFS_V3=y | 1034 | CONFIG_NFS_V3=y |
| @@ -1033,6 +1066,7 @@ CONFIG_MSDOS_PARTITION=y | |||
| 1033 | # CONFIG_ENABLE_MUST_CHECK is not set | 1066 | # CONFIG_ENABLE_MUST_CHECK is not set |
| 1034 | CONFIG_FRAME_WARN=1024 | 1067 | CONFIG_FRAME_WARN=1024 |
| 1035 | # CONFIG_MAGIC_SYSRQ is not set | 1068 | # CONFIG_MAGIC_SYSRQ is not set |
| 1069 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 1036 | # CONFIG_UNUSED_SYMBOLS is not set | 1070 | # CONFIG_UNUSED_SYMBOLS is not set |
| 1037 | # CONFIG_DEBUG_FS is not set | 1071 | # CONFIG_DEBUG_FS is not set |
| 1038 | # CONFIG_HEADERS_CHECK is not set | 1072 | # CONFIG_HEADERS_CHECK is not set |
| @@ -1062,7 +1096,6 @@ CONFIG_CRYPTO=y | |||
| 1062 | # | 1096 | # |
| 1063 | # Crypto core or helper | 1097 | # Crypto core or helper |
| 1064 | # | 1098 | # |
| 1065 | # CONFIG_CRYPTO_FIPS is not set | ||
| 1066 | CONFIG_CRYPTO_ALGAPI=y | 1099 | CONFIG_CRYPTO_ALGAPI=y |
| 1067 | CONFIG_CRYPTO_ALGAPI2=y | 1100 | CONFIG_CRYPTO_ALGAPI2=y |
| 1068 | CONFIG_CRYPTO_AEAD2=y | 1101 | CONFIG_CRYPTO_AEAD2=y |
| @@ -1104,11 +1137,13 @@ CONFIG_CRYPTO_CBC=y | |||
| 1104 | # | 1137 | # |
| 1105 | # CONFIG_CRYPTO_HMAC is not set | 1138 | # CONFIG_CRYPTO_HMAC is not set |
| 1106 | # CONFIG_CRYPTO_XCBC is not set | 1139 | # CONFIG_CRYPTO_XCBC is not set |
| 1140 | # CONFIG_CRYPTO_VMAC is not set | ||
| 1107 | 1141 | ||
| 1108 | # | 1142 | # |
| 1109 | # Digest | 1143 | # Digest |
| 1110 | # | 1144 | # |
| 1111 | # CONFIG_CRYPTO_CRC32C is not set | 1145 | # CONFIG_CRYPTO_CRC32C is not set |
| 1146 | # CONFIG_CRYPTO_GHASH is not set | ||
| 1112 | # CONFIG_CRYPTO_MD4 is not set | 1147 | # CONFIG_CRYPTO_MD4 is not set |
| 1113 | CONFIG_CRYPTO_MD5=y | 1148 | CONFIG_CRYPTO_MD5=y |
| 1114 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | 1149 | # CONFIG_CRYPTO_MICHAEL_MIC is not set |
diff --git a/arch/arm/configs/w90p910_defconfig b/arch/arm/configs/nuc910_defconfig index 5245655a0ad..5245655a0ad 100644 --- a/arch/arm/configs/w90p910_defconfig +++ b/arch/arm/configs/nuc910_defconfig | |||
diff --git a/arch/arm/configs/nuc950_defconfig b/arch/arm/configs/nuc950_defconfig new file mode 100644 index 00000000000..df1de9b45ca --- /dev/null +++ b/arch/arm/configs/nuc950_defconfig | |||
| @@ -0,0 +1,922 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.32-rc7 | ||
| 4 | # Tue Nov 17 12:31:33 2009 | ||
| 5 | # | ||
| 6 | CONFIG_ARM=y | ||
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
| 8 | CONFIG_GENERIC_GPIO=y | ||
| 9 | CONFIG_GENERIC_TIME=y | ||
| 10 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 11 | CONFIG_GENERIC_HARDIRQS=y | ||
| 12 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 13 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 14 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 15 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 16 | CONFIG_HARDIRQS_SW_RESEND=y | ||
| 17 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 18 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 19 | CONFIG_GENERIC_HWEIGHT=y | ||
| 20 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
| 21 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 22 | CONFIG_VECTORS_BASE=0xffff0000 | ||
| 23 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 24 | CONFIG_CONSTRUCTORS=y | ||
| 25 | |||
| 26 | # | ||
| 27 | # General setup | ||
| 28 | # | ||
| 29 | CONFIG_EXPERIMENTAL=y | ||
| 30 | CONFIG_BROKEN_ON_SMP=y | ||
| 31 | CONFIG_LOCK_KERNEL=y | ||
| 32 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 33 | CONFIG_LOCALVERSION="" | ||
| 34 | # CONFIG_LOCALVERSION_AUTO is not set | ||
| 35 | CONFIG_SWAP=y | ||
| 36 | CONFIG_SYSVIPC=y | ||
| 37 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 38 | CONFIG_BSD_PROCESS_ACCT=y | ||
| 39 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set | ||
| 40 | |||
| 41 | # | ||
| 42 | # RCU Subsystem | ||
| 43 | # | ||
| 44 | CONFIG_TREE_RCU=y | ||
| 45 | # CONFIG_TREE_PREEMPT_RCU is not set | ||
| 46 | # CONFIG_RCU_TRACE is not set | ||
| 47 | CONFIG_RCU_FANOUT=32 | ||
| 48 | # CONFIG_RCU_FANOUT_EXACT is not set | ||
| 49 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 50 | # CONFIG_IKCONFIG is not set | ||
| 51 | CONFIG_LOG_BUF_SHIFT=17 | ||
| 52 | # CONFIG_GROUP_SCHED is not set | ||
| 53 | # CONFIG_CGROUPS is not set | ||
| 54 | CONFIG_SYSFS_DEPRECATED=y | ||
| 55 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
| 56 | CONFIG_RELAY=y | ||
| 57 | CONFIG_NAMESPACES=y | ||
| 58 | # CONFIG_UTS_NS is not set | ||
| 59 | # CONFIG_IPC_NS is not set | ||
| 60 | CONFIG_USER_NS=y | ||
| 61 | # CONFIG_PID_NS is not set | ||
| 62 | CONFIG_BLK_DEV_INITRD=y | ||
| 63 | CONFIG_INITRAMFS_SOURCE="" | ||
| 64 | CONFIG_RD_GZIP=y | ||
| 65 | CONFIG_RD_BZIP2=y | ||
| 66 | CONFIG_RD_LZMA=y | ||
| 67 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 68 | CONFIG_SYSCTL=y | ||
| 69 | CONFIG_ANON_INODES=y | ||
| 70 | # CONFIG_EMBEDDED is not set | ||
| 71 | CONFIG_UID16=y | ||
| 72 | CONFIG_SYSCTL_SYSCALL=y | ||
| 73 | CONFIG_KALLSYMS=y | ||
| 74 | CONFIG_KALLSYMS_EXTRA_PASS=y | ||
| 75 | CONFIG_HOTPLUG=y | ||
| 76 | CONFIG_PRINTK=y | ||
| 77 | CONFIG_BUG=y | ||
| 78 | CONFIG_ELF_CORE=y | ||
| 79 | CONFIG_BASE_FULL=y | ||
| 80 | CONFIG_FUTEX=y | ||
| 81 | CONFIG_EPOLL=y | ||
| 82 | CONFIG_SIGNALFD=y | ||
| 83 | CONFIG_TIMERFD=y | ||
| 84 | CONFIG_EVENTFD=y | ||
| 85 | CONFIG_SHMEM=y | ||
| 86 | CONFIG_AIO=y | ||
| 87 | |||
| 88 | # | ||
| 89 | # Kernel Performance Events And Counters | ||
| 90 | # | ||
| 91 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 92 | CONFIG_COMPAT_BRK=y | ||
| 93 | CONFIG_SLAB=y | ||
| 94 | # CONFIG_SLUB is not set | ||
| 95 | # CONFIG_SLOB is not set | ||
| 96 | # CONFIG_PROFILING is not set | ||
| 97 | CONFIG_HAVE_OPROFILE=y | ||
| 98 | CONFIG_HAVE_KPROBES=y | ||
| 99 | CONFIG_HAVE_KRETPROBES=y | ||
| 100 | CONFIG_HAVE_CLK=y | ||
| 101 | |||
| 102 | # | ||
| 103 | # GCOV-based kernel profiling | ||
| 104 | # | ||
| 105 | # CONFIG_GCOV_KERNEL is not set | ||
| 106 | # CONFIG_SLOW_WORK is not set | ||
| 107 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 108 | CONFIG_SLABINFO=y | ||
| 109 | CONFIG_RT_MUTEXES=y | ||
| 110 | CONFIG_BASE_SMALL=0 | ||
| 111 | # CONFIG_MODULES is not set | ||
| 112 | CONFIG_BLOCK=y | ||
| 113 | CONFIG_LBDAF=y | ||
| 114 | CONFIG_BLK_DEV_BSG=y | ||
| 115 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 116 | |||
| 117 | # | ||
| 118 | # IO Schedulers | ||
| 119 | # | ||
| 120 | CONFIG_IOSCHED_NOOP=y | ||
| 121 | CONFIG_IOSCHED_AS=y | ||
| 122 | CONFIG_IOSCHED_DEADLINE=y | ||
| 123 | CONFIG_IOSCHED_CFQ=y | ||
| 124 | # CONFIG_DEFAULT_AS is not set | ||
| 125 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 126 | CONFIG_DEFAULT_CFQ=y | ||
| 127 | # CONFIG_DEFAULT_NOOP is not set | ||
| 128 | CONFIG_DEFAULT_IOSCHED="cfq" | ||
| 129 | # CONFIG_FREEZER is not set | ||
| 130 | |||
| 131 | # | ||
| 132 | # System Type | ||
| 133 | # | ||
| 134 | CONFIG_MMU=y | ||
| 135 | # CONFIG_ARCH_AAEC2000 is not set | ||
| 136 | # CONFIG_ARCH_INTEGRATOR is not set | ||
| 137 | # CONFIG_ARCH_REALVIEW is not set | ||
| 138 | # CONFIG_ARCH_VERSATILE is not set | ||
| 139 | # CONFIG_ARCH_AT91 is not set | ||
| 140 | # CONFIG_ARCH_CLPS711X is not set | ||
| 141 | # CONFIG_ARCH_GEMINI is not set | ||
| 142 | # CONFIG_ARCH_EBSA110 is not set | ||
| 143 | # CONFIG_ARCH_EP93XX is not set | ||
| 144 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
| 145 | # CONFIG_ARCH_MXC is not set | ||
| 146 | # CONFIG_ARCH_STMP3XXX is not set | ||
| 147 | # CONFIG_ARCH_NETX is not set | ||
| 148 | # CONFIG_ARCH_H720X is not set | ||
| 149 | # CONFIG_ARCH_NOMADIK is not set | ||
| 150 | # CONFIG_ARCH_IOP13XX is not set | ||
| 151 | # CONFIG_ARCH_IOP32X is not set | ||
| 152 | # CONFIG_ARCH_IOP33X is not set | ||
| 153 | # CONFIG_ARCH_IXP23XX is not set | ||
| 154 | # CONFIG_ARCH_IXP2000 is not set | ||
| 155 | # CONFIG_ARCH_IXP4XX is not set | ||
| 156 | # CONFIG_ARCH_L7200 is not set | ||
| 157 | # CONFIG_ARCH_KIRKWOOD is not set | ||
| 158 | # CONFIG_ARCH_LOKI is not set | ||
| 159 | # CONFIG_ARCH_MV78XX0 is not set | ||
| 160 | # CONFIG_ARCH_ORION5X is not set | ||
| 161 | # CONFIG_ARCH_MMP is not set | ||
| 162 | # CONFIG_ARCH_KS8695 is not set | ||
| 163 | # CONFIG_ARCH_NS9XXX is not set | ||
| 164 | CONFIG_ARCH_W90X900=y | ||
| 165 | # CONFIG_ARCH_PNX4008 is not set | ||
| 166 | # CONFIG_ARCH_PXA is not set | ||
| 167 | # CONFIG_ARCH_MSM is not set | ||
| 168 | # CONFIG_ARCH_RPC is not set | ||
| 169 | # CONFIG_ARCH_SA1100 is not set | ||
| 170 | # CONFIG_ARCH_S3C2410 is not set | ||
| 171 | # CONFIG_ARCH_S3C64XX is not set | ||
| 172 | # CONFIG_ARCH_S5PC1XX is not set | ||
| 173 | # CONFIG_ARCH_SHARK is not set | ||
| 174 | # CONFIG_ARCH_LH7A40X is not set | ||
| 175 | # CONFIG_ARCH_U300 is not set | ||
| 176 | # CONFIG_ARCH_DAVINCI is not set | ||
| 177 | # CONFIG_ARCH_OMAP is not set | ||
| 178 | # CONFIG_ARCH_BCMRING is not set | ||
| 179 | CONFIG_CPU_NUC950=y | ||
| 180 | |||
| 181 | # | ||
| 182 | # W90P910 Machines | ||
| 183 | # | ||
| 184 | # CONFIG_MACH_W90P910EVB is not set | ||
| 185 | |||
| 186 | # | ||
| 187 | # NUC950 Machines | ||
| 188 | # | ||
| 189 | CONFIG_MACH_W90P950EVB=y | ||
| 190 | |||
| 191 | # | ||
| 192 | # NUC960 Machines | ||
| 193 | # | ||
| 194 | # CONFIG_MACH_W90N960EVB is not set | ||
| 195 | |||
| 196 | # | ||
| 197 | # NUC932 Machines | ||
| 198 | # | ||
| 199 | # CONFIG_MACH_NUC932EVB is not set | ||
| 200 | |||
| 201 | # | ||
| 202 | # Processor Type | ||
| 203 | # | ||
| 204 | CONFIG_CPU_32=y | ||
| 205 | CONFIG_CPU_ARM926T=y | ||
| 206 | CONFIG_CPU_32v5=y | ||
| 207 | CONFIG_CPU_ABRT_EV5TJ=y | ||
| 208 | CONFIG_CPU_PABRT_LEGACY=y | ||
| 209 | CONFIG_CPU_CACHE_VIVT=y | ||
| 210 | CONFIG_CPU_COPY_V4WB=y | ||
| 211 | CONFIG_CPU_TLB_V4WBI=y | ||
| 212 | CONFIG_CPU_CP15=y | ||
| 213 | CONFIG_CPU_CP15_MMU=y | ||
| 214 | |||
| 215 | # | ||
| 216 | # Processor Features | ||
| 217 | # | ||
| 218 | CONFIG_ARM_THUMB=y | ||
| 219 | # CONFIG_CPU_ICACHE_DISABLE is not set | ||
| 220 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
| 221 | # CONFIG_CPU_DCACHE_WRITETHROUGH is not set | ||
| 222 | # CONFIG_CPU_CACHE_ROUND_ROBIN is not set | ||
| 223 | CONFIG_ARM_L1_CACHE_SHIFT=5 | ||
| 224 | CONFIG_COMMON_CLKDEV=y | ||
| 225 | |||
| 226 | # | ||
| 227 | # Bus support | ||
| 228 | # | ||
| 229 | # CONFIG_PCI_SYSCALL is not set | ||
| 230 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 231 | # CONFIG_PCCARD is not set | ||
| 232 | |||
| 233 | # | ||
| 234 | # Kernel Features | ||
| 235 | # | ||
| 236 | CONFIG_TICK_ONESHOT=y | ||
| 237 | CONFIG_NO_HZ=y | ||
| 238 | CONFIG_HIGH_RES_TIMERS=y | ||
| 239 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 240 | CONFIG_VMSPLIT_3G=y | ||
| 241 | # CONFIG_VMSPLIT_2G is not set | ||
| 242 | # CONFIG_VMSPLIT_1G is not set | ||
| 243 | CONFIG_PAGE_OFFSET=0xC0000000 | ||
| 244 | # CONFIG_PREEMPT_NONE is not set | ||
| 245 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
| 246 | CONFIG_PREEMPT=y | ||
| 247 | CONFIG_HZ=100 | ||
| 248 | CONFIG_AEABI=y | ||
| 249 | CONFIG_OABI_COMPAT=y | ||
| 250 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | ||
| 251 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | ||
| 252 | # CONFIG_HIGHMEM is not set | ||
| 253 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 254 | CONFIG_FLATMEM_MANUAL=y | ||
| 255 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 256 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 257 | CONFIG_FLATMEM=y | ||
| 258 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 259 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 260 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | ||
| 261 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
| 262 | CONFIG_ZONE_DMA_FLAG=0 | ||
| 263 | CONFIG_VIRT_TO_BUS=y | ||
| 264 | CONFIG_HAVE_MLOCK=y | ||
| 265 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
| 266 | # CONFIG_KSM is not set | ||
| 267 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
| 268 | CONFIG_ALIGNMENT_TRAP=y | ||
| 269 | # CONFIG_UACCESS_WITH_MEMCPY is not set | ||
| 270 | |||
| 271 | # | ||
| 272 | # Boot options | ||
| 273 | # | ||
| 274 | CONFIG_ZBOOT_ROM_TEXT=0 | ||
| 275 | CONFIG_ZBOOT_ROM_BSS=0 | ||
| 276 | CONFIG_CMDLINE="root=/dev/ram0 console=ttyS0,115200n8 rdinit=/sbin/init mem=64M" | ||
| 277 | # CONFIG_XIP_KERNEL is not set | ||
| 278 | CONFIG_KEXEC=y | ||
| 279 | CONFIG_ATAGS_PROC=y | ||
| 280 | |||
| 281 | # | ||
| 282 | # CPU Power Management | ||
| 283 | # | ||
| 284 | # CONFIG_CPU_IDLE is not set | ||
| 285 | |||
| 286 | # | ||
| 287 | # Floating point emulation | ||
| 288 | # | ||
| 289 | |||
| 290 | # | ||
| 291 | # At least one emulation must be selected | ||
| 292 | # | ||
| 293 | CONFIG_FPE_NWFPE=y | ||
| 294 | # CONFIG_FPE_NWFPE_XP is not set | ||
| 295 | # CONFIG_FPE_FASTFPE is not set | ||
| 296 | # CONFIG_VFP is not set | ||
| 297 | |||
| 298 | # | ||
| 299 | # Userspace binary formats | ||
| 300 | # | ||
| 301 | CONFIG_BINFMT_ELF=y | ||
| 302 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 303 | CONFIG_HAVE_AOUT=y | ||
| 304 | CONFIG_BINFMT_AOUT=y | ||
| 305 | CONFIG_BINFMT_MISC=y | ||
| 306 | |||
| 307 | # | ||
| 308 | # Power management options | ||
| 309 | # | ||
| 310 | # CONFIG_PM is not set | ||
| 311 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
| 312 | # CONFIG_NET is not set | ||
| 313 | |||
| 314 | # | ||
| 315 | # Device Drivers | ||
| 316 | # | ||
| 317 | |||
| 318 | # | ||
| 319 | # Generic Driver Options | ||
| 320 | # | ||
| 321 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
| 322 | # CONFIG_DEVTMPFS is not set | ||
| 323 | CONFIG_STANDALONE=y | ||
| 324 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 325 | CONFIG_FW_LOADER=y | ||
| 326 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
| 327 | CONFIG_EXTRA_FIRMWARE="" | ||
| 328 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 329 | CONFIG_MTD=y | ||
| 330 | # CONFIG_MTD_DEBUG is not set | ||
| 331 | CONFIG_MTD_CONCAT=y | ||
| 332 | CONFIG_MTD_PARTITIONS=y | ||
| 333 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
| 334 | # CONFIG_MTD_CMDLINE_PARTS is not set | ||
| 335 | # CONFIG_MTD_AFS_PARTS is not set | ||
| 336 | # CONFIG_MTD_AR7_PARTS is not set | ||
| 337 | |||
| 338 | # | ||
| 339 | # User Modules And Translation Layers | ||
| 340 | # | ||
| 341 | CONFIG_MTD_CHAR=y | ||
| 342 | CONFIG_MTD_BLKDEVS=y | ||
| 343 | CONFIG_MTD_BLOCK=y | ||
| 344 | # CONFIG_FTL is not set | ||
| 345 | # CONFIG_NFTL is not set | ||
| 346 | # CONFIG_INFTL is not set | ||
| 347 | # CONFIG_RFD_FTL is not set | ||
| 348 | # CONFIG_SSFDC is not set | ||
| 349 | # CONFIG_MTD_OOPS is not set | ||
| 350 | |||
| 351 | # | ||
| 352 | # RAM/ROM/Flash chip drivers | ||
| 353 | # | ||
| 354 | CONFIG_MTD_CFI=y | ||
| 355 | # CONFIG_MTD_JEDECPROBE is not set | ||
| 356 | CONFIG_MTD_GEN_PROBE=y | ||
| 357 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
| 358 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
| 359 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
| 360 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
| 361 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
| 362 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
| 363 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
| 364 | CONFIG_MTD_CFI_I1=y | ||
| 365 | CONFIG_MTD_CFI_I2=y | ||
| 366 | # CONFIG_MTD_CFI_I4 is not set | ||
| 367 | # CONFIG_MTD_CFI_I8 is not set | ||
| 368 | # CONFIG_MTD_CFI_INTELEXT is not set | ||
| 369 | CONFIG_MTD_CFI_AMDSTD=y | ||
| 370 | # CONFIG_MTD_CFI_STAA is not set | ||
| 371 | CONFIG_MTD_CFI_UTIL=y | ||
| 372 | # CONFIG_MTD_RAM is not set | ||
| 373 | # CONFIG_MTD_ROM is not set | ||
| 374 | # CONFIG_MTD_ABSENT is not set | ||
| 375 | |||
| 376 | # | ||
| 377 | # Mapping drivers for chip access | ||
| 378 | # | ||
| 379 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
| 380 | CONFIG_MTD_PHYSMAP=y | ||
| 381 | # CONFIG_MTD_PHYSMAP_COMPAT is not set | ||
| 382 | # CONFIG_MTD_ARM_INTEGRATOR is not set | ||
| 383 | # CONFIG_MTD_PLATRAM is not set | ||
| 384 | |||
| 385 | # | ||
| 386 | # Self-contained MTD device drivers | ||
| 387 | # | ||
| 388 | # CONFIG_MTD_SLRAM is not set | ||
| 389 | # CONFIG_MTD_PHRAM is not set | ||
| 390 | # CONFIG_MTD_MTDRAM is not set | ||
| 391 | # CONFIG_MTD_BLOCK2MTD is not set | ||
| 392 | |||
| 393 | # | ||
| 394 | # Disk-On-Chip Device Drivers | ||
| 395 | # | ||
| 396 | # CONFIG_MTD_DOC2000 is not set | ||
| 397 | # CONFIG_MTD_DOC2001 is not set | ||
| 398 | # CONFIG_MTD_DOC2001PLUS is not set | ||
| 399 | # CONFIG_MTD_NAND is not set | ||
| 400 | # CONFIG_MTD_ONENAND is not set | ||
| 401 | |||
| 402 | # | ||
| 403 | # LPDDR flash memory drivers | ||
| 404 | # | ||
| 405 | # CONFIG_MTD_LPDDR is not set | ||
| 406 | |||
| 407 | # | ||
| 408 | # UBI - Unsorted block images | ||
| 409 | # | ||
| 410 | # CONFIG_MTD_UBI is not set | ||
| 411 | # CONFIG_PARPORT is not set | ||
| 412 | CONFIG_BLK_DEV=y | ||
| 413 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 414 | # CONFIG_BLK_DEV_LOOP is not set | ||
| 415 | # CONFIG_BLK_DEV_UB is not set | ||
| 416 | CONFIG_BLK_DEV_RAM=y | ||
| 417 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
| 418 | CONFIG_BLK_DEV_RAM_SIZE=16384 | ||
| 419 | # CONFIG_BLK_DEV_XIP is not set | ||
| 420 | # CONFIG_CDROM_PKTCDVD is not set | ||
| 421 | # CONFIG_MG_DISK is not set | ||
| 422 | # CONFIG_MISC_DEVICES is not set | ||
| 423 | CONFIG_HAVE_IDE=y | ||
| 424 | # CONFIG_IDE is not set | ||
| 425 | |||
| 426 | # | ||
| 427 | # SCSI device support | ||
| 428 | # | ||
| 429 | # CONFIG_RAID_ATTRS is not set | ||
| 430 | CONFIG_SCSI=y | ||
| 431 | CONFIG_SCSI_DMA=y | ||
| 432 | # CONFIG_SCSI_TGT is not set | ||
| 433 | # CONFIG_SCSI_NETLINK is not set | ||
| 434 | # CONFIG_SCSI_PROC_FS is not set | ||
| 435 | |||
| 436 | # | ||
| 437 | # SCSI support type (disk, tape, CD-ROM) | ||
| 438 | # | ||
| 439 | CONFIG_BLK_DEV_SD=y | ||
| 440 | # CONFIG_CHR_DEV_ST is not set | ||
| 441 | # CONFIG_CHR_DEV_OSST is not set | ||
| 442 | # CONFIG_BLK_DEV_SR is not set | ||
| 443 | # CONFIG_CHR_DEV_SG is not set | ||
| 444 | # CONFIG_CHR_DEV_SCH is not set | ||
| 445 | # CONFIG_SCSI_MULTI_LUN is not set | ||
| 446 | # CONFIG_SCSI_CONSTANTS is not set | ||
| 447 | # CONFIG_SCSI_LOGGING is not set | ||
| 448 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
| 449 | |||
| 450 | # | ||
| 451 | # SCSI Transports | ||
| 452 | # | ||
| 453 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
| 454 | # CONFIG_SCSI_FC_ATTRS is not set | ||
| 455 | # CONFIG_SCSI_SAS_ATTRS is not set | ||
| 456 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
| 457 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
| 458 | # CONFIG_SCSI_LOWLEVEL is not set | ||
| 459 | # CONFIG_SCSI_DH is not set | ||
| 460 | # CONFIG_SCSI_OSD_INITIATOR is not set | ||
| 461 | # CONFIG_ATA is not set | ||
| 462 | # CONFIG_MD is not set | ||
| 463 | # CONFIG_PHONE is not set | ||
| 464 | |||
| 465 | # | ||
| 466 | # Input device support | ||
| 467 | # | ||
| 468 | CONFIG_INPUT=y | ||
| 469 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 470 | # CONFIG_INPUT_POLLDEV is not set | ||
| 471 | |||
| 472 | # | ||
| 473 | # Userland interfaces | ||
| 474 | # | ||
| 475 | CONFIG_INPUT_MOUSEDEV=y | ||
| 476 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
| 477 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
| 478 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
| 479 | # CONFIG_INPUT_JOYDEV is not set | ||
| 480 | # CONFIG_INPUT_EVDEV is not set | ||
| 481 | # CONFIG_INPUT_EVBUG is not set | ||
| 482 | |||
| 483 | # | ||
| 484 | # Input Device Drivers | ||
| 485 | # | ||
| 486 | # CONFIG_INPUT_KEYBOARD is not set | ||
| 487 | # CONFIG_INPUT_MOUSE is not set | ||
| 488 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 489 | # CONFIG_INPUT_TABLET is not set | ||
| 490 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
| 491 | # CONFIG_INPUT_MISC is not set | ||
| 492 | |||
| 493 | # | ||
| 494 | # Hardware I/O ports | ||
| 495 | # | ||
| 496 | # CONFIG_SERIO is not set | ||
| 497 | # CONFIG_GAMEPORT is not set | ||
| 498 | |||
| 499 | # | ||
| 500 | # Character devices | ||
| 501 | # | ||
| 502 | CONFIG_VT=y | ||
| 503 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 504 | CONFIG_VT_CONSOLE=y | ||
| 505 | CONFIG_HW_CONSOLE=y | ||
| 506 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
| 507 | # CONFIG_DEVKMEM is not set | ||
| 508 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 509 | |||
| 510 | # | ||
| 511 | # Serial drivers | ||
| 512 | # | ||
| 513 | CONFIG_SERIAL_8250=y | ||
| 514 | CONFIG_SERIAL_8250_CONSOLE=y | ||
| 515 | CONFIG_SERIAL_8250_NR_UARTS=1 | ||
| 516 | CONFIG_SERIAL_8250_RUNTIME_UARTS=1 | ||
| 517 | # CONFIG_SERIAL_8250_EXTENDED is not set | ||
| 518 | |||
| 519 | # | ||
| 520 | # Non-8250 serial port support | ||
| 521 | # | ||
| 522 | CONFIG_SERIAL_CORE=y | ||
| 523 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 524 | CONFIG_UNIX98_PTYS=y | ||
| 525 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 526 | # CONFIG_LEGACY_PTYS is not set | ||
| 527 | # CONFIG_IPMI_HANDLER is not set | ||
| 528 | # CONFIG_HW_RANDOM is not set | ||
| 529 | # CONFIG_R3964 is not set | ||
| 530 | # CONFIG_RAW_DRIVER is not set | ||
| 531 | # CONFIG_TCG_TPM is not set | ||
| 532 | # CONFIG_I2C is not set | ||
| 533 | # CONFIG_SPI is not set | ||
| 534 | |||
| 535 | # | ||
| 536 | # PPS support | ||
| 537 | # | ||
| 538 | # CONFIG_PPS is not set | ||
| 539 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
| 540 | CONFIG_GPIOLIB=y | ||
| 541 | # CONFIG_GPIO_SYSFS is not set | ||
| 542 | |||
| 543 | # | ||
| 544 | # Memory mapped GPIO expanders: | ||
| 545 | # | ||
| 546 | |||
| 547 | # | ||
| 548 | # I2C GPIO expanders: | ||
| 549 | # | ||
| 550 | |||
| 551 | # | ||
| 552 | # PCI GPIO expanders: | ||
| 553 | # | ||
| 554 | |||
| 555 | # | ||
| 556 | # SPI GPIO expanders: | ||
| 557 | # | ||
| 558 | |||
| 559 | # | ||
| 560 | # AC97 GPIO expanders: | ||
| 561 | # | ||
| 562 | # CONFIG_W1 is not set | ||
| 563 | # CONFIG_POWER_SUPPLY is not set | ||
| 564 | # CONFIG_HWMON is not set | ||
| 565 | # CONFIG_THERMAL is not set | ||
| 566 | # CONFIG_WATCHDOG is not set | ||
| 567 | CONFIG_SSB_POSSIBLE=y | ||
| 568 | |||
| 569 | # | ||
| 570 | # Sonics Silicon Backplane | ||
| 571 | # | ||
| 572 | # CONFIG_SSB is not set | ||
| 573 | |||
| 574 | # | ||
| 575 | # Multifunction device drivers | ||
| 576 | # | ||
| 577 | # CONFIG_MFD_CORE is not set | ||
| 578 | # CONFIG_MFD_SM501 is not set | ||
| 579 | # CONFIG_MFD_ASIC3 is not set | ||
| 580 | # CONFIG_HTC_EGPIO is not set | ||
| 581 | # CONFIG_HTC_PASIC3 is not set | ||
| 582 | # CONFIG_MFD_TMIO is not set | ||
| 583 | # CONFIG_MFD_T7L66XB is not set | ||
| 584 | # CONFIG_MFD_TC6387XB is not set | ||
| 585 | # CONFIG_MFD_TC6393XB is not set | ||
| 586 | # CONFIG_REGULATOR is not set | ||
| 587 | # CONFIG_MEDIA_SUPPORT is not set | ||
| 588 | |||
| 589 | # | ||
| 590 | # Graphics support | ||
| 591 | # | ||
| 592 | # CONFIG_VGASTATE is not set | ||
| 593 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 594 | # CONFIG_FB is not set | ||
| 595 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 596 | |||
| 597 | # | ||
| 598 | # Display device support | ||
| 599 | # | ||
| 600 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 601 | |||
| 602 | # | ||
| 603 | # Console display driver support | ||
| 604 | # | ||
| 605 | # CONFIG_VGA_CONSOLE is not set | ||
| 606 | CONFIG_DUMMY_CONSOLE=y | ||
| 607 | # CONFIG_SOUND is not set | ||
| 608 | # CONFIG_HID_SUPPORT is not set | ||
| 609 | CONFIG_USB_SUPPORT=y | ||
| 610 | CONFIG_USB_ARCH_HAS_HCD=y | ||
| 611 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
| 612 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
| 613 | CONFIG_USB=y | ||
| 614 | # CONFIG_USB_DEBUG is not set | ||
| 615 | # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set | ||
| 616 | |||
| 617 | # | ||
| 618 | # Miscellaneous USB options | ||
| 619 | # | ||
| 620 | # CONFIG_USB_DEVICEFS is not set | ||
| 621 | CONFIG_USB_DEVICE_CLASS=y | ||
| 622 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
| 623 | # CONFIG_USB_OTG is not set | ||
| 624 | CONFIG_USB_MON=y | ||
| 625 | # CONFIG_USB_WUSB is not set | ||
| 626 | # CONFIG_USB_WUSB_CBAF is not set | ||
| 627 | |||
| 628 | # | ||
| 629 | # USB Host Controller Drivers | ||
| 630 | # | ||
| 631 | # CONFIG_USB_C67X00_HCD is not set | ||
| 632 | # CONFIG_USB_EHCI_HCD is not set | ||
| 633 | # CONFIG_USB_OXU210HP_HCD is not set | ||
| 634 | # CONFIG_USB_ISP116X_HCD is not set | ||
| 635 | # CONFIG_USB_ISP1760_HCD is not set | ||
| 636 | # CONFIG_USB_ISP1362_HCD is not set | ||
| 637 | # CONFIG_USB_OHCI_HCD is not set | ||
| 638 | # CONFIG_USB_SL811_HCD is not set | ||
| 639 | # CONFIG_USB_R8A66597_HCD is not set | ||
| 640 | # CONFIG_USB_HWA_HCD is not set | ||
| 641 | # CONFIG_USB_MUSB_HDRC is not set | ||
| 642 | |||
| 643 | # | ||
| 644 | # USB Device Class drivers | ||
| 645 | # | ||
| 646 | # CONFIG_USB_ACM is not set | ||
| 647 | # CONFIG_USB_PRINTER is not set | ||
| 648 | # CONFIG_USB_WDM is not set | ||
| 649 | # CONFIG_USB_TMC is not set | ||
| 650 | |||
| 651 | # | ||
| 652 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | ||
| 653 | # | ||
| 654 | |||
| 655 | # | ||
| 656 | # also be needed; see USB_STORAGE Help for more info | ||
| 657 | # | ||
| 658 | CONFIG_USB_STORAGE=y | ||
| 659 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
| 660 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
| 661 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
| 662 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
| 663 | # CONFIG_USB_STORAGE_USBAT is not set | ||
| 664 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
| 665 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
| 666 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
| 667 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
| 668 | # CONFIG_USB_STORAGE_ONETOUCH is not set | ||
| 669 | # CONFIG_USB_STORAGE_KARMA is not set | ||
| 670 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
| 671 | # CONFIG_USB_LIBUSUAL is not set | ||
| 672 | |||
| 673 | # | ||
| 674 | # USB Imaging devices | ||
| 675 | # | ||
| 676 | # CONFIG_USB_MDC800 is not set | ||
| 677 | # CONFIG_USB_MICROTEK is not set | ||
| 678 | |||
| 679 | # | ||
| 680 | # USB port drivers | ||
| 681 | # | ||
| 682 | # CONFIG_USB_SERIAL is not set | ||
| 683 | |||
| 684 | # | ||
| 685 | # USB Miscellaneous drivers | ||
| 686 | # | ||
| 687 | # CONFIG_USB_EMI62 is not set | ||
| 688 | # CONFIG_USB_EMI26 is not set | ||
| 689 | # CONFIG_USB_ADUTUX is not set | ||
| 690 | # CONFIG_USB_SEVSEG is not set | ||
| 691 | # CONFIG_USB_RIO500 is not set | ||
| 692 | # CONFIG_USB_LEGOTOWER is not set | ||
| 693 | # CONFIG_USB_LCD is not set | ||
| 694 | # CONFIG_USB_BERRY_CHARGE is not set | ||
| 695 | # CONFIG_USB_LED is not set | ||
| 696 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
| 697 | # CONFIG_USB_CYTHERM is not set | ||
| 698 | # CONFIG_USB_IDMOUSE is not set | ||
| 699 | # CONFIG_USB_FTDI_ELAN is not set | ||
| 700 | # CONFIG_USB_APPLEDISPLAY is not set | ||
| 701 | # CONFIG_USB_LD is not set | ||
| 702 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
| 703 | # CONFIG_USB_IOWARRIOR is not set | ||
| 704 | # CONFIG_USB_TEST is not set | ||
| 705 | # CONFIG_USB_ISIGHTFW is not set | ||
| 706 | # CONFIG_USB_VST is not set | ||
| 707 | # CONFIG_USB_GADGET is not set | ||
| 708 | |||
| 709 | # | ||
| 710 | # OTG and related infrastructure | ||
| 711 | # | ||
| 712 | # CONFIG_USB_GPIO_VBUS is not set | ||
| 713 | # CONFIG_NOP_USB_XCEIV is not set | ||
| 714 | # CONFIG_MMC is not set | ||
| 715 | # CONFIG_MEMSTICK is not set | ||
| 716 | # CONFIG_NEW_LEDS is not set | ||
| 717 | # CONFIG_ACCESSIBILITY is not set | ||
| 718 | CONFIG_RTC_LIB=y | ||
| 719 | # CONFIG_RTC_CLASS is not set | ||
| 720 | # CONFIG_DMADEVICES is not set | ||
| 721 | # CONFIG_AUXDISPLAY is not set | ||
| 722 | # CONFIG_UIO is not set | ||
| 723 | |||
| 724 | # | ||
| 725 | # TI VLYNQ | ||
| 726 | # | ||
| 727 | # CONFIG_STAGING is not set | ||
| 728 | |||
| 729 | # | ||
| 730 | # File systems | ||
| 731 | # | ||
| 732 | # CONFIG_EXT2_FS is not set | ||
| 733 | # CONFIG_EXT3_FS is not set | ||
| 734 | # CONFIG_EXT4_FS is not set | ||
| 735 | # CONFIG_REISERFS_FS is not set | ||
| 736 | # CONFIG_JFS_FS is not set | ||
| 737 | CONFIG_FS_POSIX_ACL=y | ||
| 738 | # CONFIG_XFS_FS is not set | ||
| 739 | # CONFIG_GFS2_FS is not set | ||
| 740 | # CONFIG_BTRFS_FS is not set | ||
| 741 | # CONFIG_NILFS2_FS is not set | ||
| 742 | CONFIG_FILE_LOCKING=y | ||
| 743 | CONFIG_FSNOTIFY=y | ||
| 744 | # CONFIG_DNOTIFY is not set | ||
| 745 | # CONFIG_INOTIFY is not set | ||
| 746 | CONFIG_INOTIFY_USER=y | ||
| 747 | # CONFIG_QUOTA is not set | ||
| 748 | # CONFIG_AUTOFS_FS is not set | ||
| 749 | # CONFIG_AUTOFS4_FS is not set | ||
| 750 | # CONFIG_FUSE_FS is not set | ||
| 751 | CONFIG_GENERIC_ACL=y | ||
| 752 | |||
| 753 | # | ||
| 754 | # Caches | ||
| 755 | # | ||
| 756 | # CONFIG_FSCACHE is not set | ||
| 757 | |||
| 758 | # | ||
| 759 | # CD-ROM/DVD Filesystems | ||
| 760 | # | ||
| 761 | # CONFIG_ISO9660_FS is not set | ||
| 762 | # CONFIG_UDF_FS is not set | ||
| 763 | |||
| 764 | # | ||
| 765 | # DOS/FAT/NT Filesystems | ||
| 766 | # | ||
| 767 | # CONFIG_MSDOS_FS is not set | ||
| 768 | # CONFIG_VFAT_FS is not set | ||
| 769 | # CONFIG_NTFS_FS is not set | ||
| 770 | |||
| 771 | # | ||
| 772 | # Pseudo filesystems | ||
| 773 | # | ||
| 774 | CONFIG_PROC_FS=y | ||
| 775 | CONFIG_PROC_SYSCTL=y | ||
| 776 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 777 | CONFIG_SYSFS=y | ||
| 778 | CONFIG_TMPFS=y | ||
| 779 | CONFIG_TMPFS_POSIX_ACL=y | ||
| 780 | # CONFIG_HUGETLB_PAGE is not set | ||
| 781 | # CONFIG_CONFIGFS_FS is not set | ||
| 782 | CONFIG_MISC_FILESYSTEMS=y | ||
| 783 | # CONFIG_ADFS_FS is not set | ||
| 784 | # CONFIG_AFFS_FS is not set | ||
| 785 | # CONFIG_HFS_FS is not set | ||
| 786 | # CONFIG_HFSPLUS_FS is not set | ||
| 787 | # CONFIG_BEFS_FS is not set | ||
| 788 | # CONFIG_BFS_FS is not set | ||
| 789 | # CONFIG_EFS_FS is not set | ||
| 790 | # CONFIG_JFFS2_FS is not set | ||
| 791 | # CONFIG_CRAMFS is not set | ||
| 792 | # CONFIG_SQUASHFS is not set | ||
| 793 | # CONFIG_VXFS_FS is not set | ||
| 794 | # CONFIG_MINIX_FS is not set | ||
| 795 | # CONFIG_OMFS_FS is not set | ||
| 796 | # CONFIG_HPFS_FS is not set | ||
| 797 | # CONFIG_QNX4FS_FS is not set | ||
| 798 | CONFIG_ROMFS_FS=y | ||
| 799 | CONFIG_ROMFS_BACKED_BY_BLOCK=y | ||
| 800 | # CONFIG_ROMFS_BACKED_BY_MTD is not set | ||
| 801 | # CONFIG_ROMFS_BACKED_BY_BOTH is not set | ||
| 802 | CONFIG_ROMFS_ON_BLOCK=y | ||
| 803 | # CONFIG_SYSV_FS is not set | ||
| 804 | # CONFIG_UFS_FS is not set | ||
| 805 | |||
| 806 | # | ||
| 807 | # Partition Types | ||
| 808 | # | ||
| 809 | CONFIG_PARTITION_ADVANCED=y | ||
| 810 | # CONFIG_ACORN_PARTITION is not set | ||
| 811 | # CONFIG_OSF_PARTITION is not set | ||
| 812 | # CONFIG_AMIGA_PARTITION is not set | ||
| 813 | # CONFIG_ATARI_PARTITION is not set | ||
| 814 | # CONFIG_MAC_PARTITION is not set | ||
| 815 | CONFIG_MSDOS_PARTITION=y | ||
| 816 | # CONFIG_BSD_DISKLABEL is not set | ||
| 817 | # CONFIG_MINIX_SUBPARTITION is not set | ||
| 818 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
| 819 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
| 820 | # CONFIG_LDM_PARTITION is not set | ||
| 821 | # CONFIG_SGI_PARTITION is not set | ||
| 822 | # CONFIG_ULTRIX_PARTITION is not set | ||
| 823 | # CONFIG_SUN_PARTITION is not set | ||
| 824 | # CONFIG_KARMA_PARTITION is not set | ||
| 825 | # CONFIG_EFI_PARTITION is not set | ||
| 826 | # CONFIG_SYSV68_PARTITION is not set | ||
| 827 | CONFIG_NLS=y | ||
| 828 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
| 829 | CONFIG_NLS_CODEPAGE_437=y | ||
| 830 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
| 831 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
| 832 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
| 833 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
| 834 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
| 835 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
| 836 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
| 837 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
| 838 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
| 839 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
| 840 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
| 841 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
| 842 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
| 843 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
| 844 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
| 845 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
| 846 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
| 847 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
| 848 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
| 849 | # CONFIG_NLS_ISO8859_8 is not set | ||
| 850 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
| 851 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
| 852 | # CONFIG_NLS_ASCII is not set | ||
| 853 | CONFIG_NLS_ISO8859_1=y | ||
| 854 | # CONFIG_NLS_ISO8859_2 is not set | ||
| 855 | # CONFIG_NLS_ISO8859_3 is not set | ||
| 856 | # CONFIG_NLS_ISO8859_4 is not set | ||
| 857 | # CONFIG_NLS_ISO8859_5 is not set | ||
| 858 | # CONFIG_NLS_ISO8859_6 is not set | ||
| 859 | # CONFIG_NLS_ISO8859_7 is not set | ||
| 860 | # CONFIG_NLS_ISO8859_9 is not set | ||
| 861 | # CONFIG_NLS_ISO8859_13 is not set | ||
| 862 | # CONFIG_NLS_ISO8859_14 is not set | ||
| 863 | # CONFIG_NLS_ISO8859_15 is not set | ||
| 864 | # CONFIG_NLS_KOI8_R is not set | ||
| 865 | # CONFIG_NLS_KOI8_U is not set | ||
| 866 | # CONFIG_NLS_UTF8 is not set | ||
| 867 | |||
| 868 | # | ||
| 869 | # Kernel hacking | ||
| 870 | # | ||
| 871 | # CONFIG_PRINTK_TIME is not set | ||
| 872 | # CONFIG_ENABLE_WARN_DEPRECATED is not set | ||
| 873 | # CONFIG_ENABLE_MUST_CHECK is not set | ||
| 874 | CONFIG_FRAME_WARN=1024 | ||
| 875 | # CONFIG_MAGIC_SYSRQ is not set | ||
| 876 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 877 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 878 | CONFIG_DEBUG_FS=y | ||
| 879 | # CONFIG_HEADERS_CHECK is not set | ||
| 880 | # CONFIG_DEBUG_KERNEL is not set | ||
| 881 | CONFIG_DEBUG_BUGVERBOSE=y | ||
| 882 | CONFIG_DEBUG_MEMORY_INIT=y | ||
| 883 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 884 | # CONFIG_LATENCYTOP is not set | ||
| 885 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
| 886 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 887 | CONFIG_TRACING_SUPPORT=y | ||
| 888 | # CONFIG_FTRACE is not set | ||
| 889 | # CONFIG_DYNAMIC_DEBUG is not set | ||
| 890 | # CONFIG_SAMPLES is not set | ||
| 891 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 892 | CONFIG_ARM_UNWIND=y | ||
| 893 | # CONFIG_DEBUG_USER is not set | ||
| 894 | |||
| 895 | # | ||
| 896 | # Security options | ||
| 897 | # | ||
| 898 | # CONFIG_KEYS is not set | ||
| 899 | # CONFIG_SECURITY is not set | ||
| 900 | # CONFIG_SECURITYFS is not set | ||
| 901 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
| 902 | # CONFIG_CRYPTO is not set | ||
| 903 | # CONFIG_BINARY_PRINTF is not set | ||
| 904 | |||
| 905 | # | ||
| 906 | # Library routines | ||
| 907 | # | ||
| 908 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
| 909 | # CONFIG_CRC_CCITT is not set | ||
| 910 | # CONFIG_CRC16 is not set | ||
| 911 | # CONFIG_CRC_T10DIF is not set | ||
| 912 | # CONFIG_CRC_ITU_T is not set | ||
| 913 | # CONFIG_CRC32 is not set | ||
| 914 | # CONFIG_CRC7 is not set | ||
| 915 | # CONFIG_LIBCRC32C is not set | ||
| 916 | CONFIG_ZLIB_INFLATE=y | ||
| 917 | CONFIG_DECOMPRESS_GZIP=y | ||
| 918 | CONFIG_DECOMPRESS_BZIP2=y | ||
| 919 | CONFIG_DECOMPRESS_LZMA=y | ||
| 920 | CONFIG_HAS_IOMEM=y | ||
| 921 | CONFIG_HAS_IOPORT=y | ||
| 922 | CONFIG_HAS_DMA=y | ||
diff --git a/arch/arm/configs/nuc960_defconfig b/arch/arm/configs/nuc960_defconfig new file mode 100644 index 00000000000..4b2cd9eae9b --- /dev/null +++ b/arch/arm/configs/nuc960_defconfig | |||
| @@ -0,0 +1,922 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.32-rc7 | ||
| 4 | # Tue Nov 17 12:20:11 2009 | ||
| 5 | # | ||
| 6 | CONFIG_ARM=y | ||
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
| 8 | CONFIG_GENERIC_GPIO=y | ||
| 9 | CONFIG_GENERIC_TIME=y | ||
| 10 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 11 | CONFIG_GENERIC_HARDIRQS=y | ||
| 12 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 13 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 14 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 15 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 16 | CONFIG_HARDIRQS_SW_RESEND=y | ||
| 17 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 18 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 19 | CONFIG_GENERIC_HWEIGHT=y | ||
| 20 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
| 21 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 22 | CONFIG_VECTORS_BASE=0xffff0000 | ||
| 23 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 24 | CONFIG_CONSTRUCTORS=y | ||
| 25 | |||
| 26 | # | ||
| 27 | # General setup | ||
| 28 | # | ||
| 29 | CONFIG_EXPERIMENTAL=y | ||
| 30 | CONFIG_BROKEN_ON_SMP=y | ||
| 31 | CONFIG_LOCK_KERNEL=y | ||
| 32 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 33 | CONFIG_LOCALVERSION="" | ||
| 34 | # CONFIG_LOCALVERSION_AUTO is not set | ||
| 35 | CONFIG_SWAP=y | ||
| 36 | CONFIG_SYSVIPC=y | ||
| 37 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 38 | CONFIG_BSD_PROCESS_ACCT=y | ||
| 39 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set | ||
| 40 | |||
| 41 | # | ||
| 42 | # RCU Subsystem | ||
| 43 | # | ||
| 44 | CONFIG_TREE_RCU=y | ||
| 45 | # CONFIG_TREE_PREEMPT_RCU is not set | ||
| 46 | # CONFIG_RCU_TRACE is not set | ||
| 47 | CONFIG_RCU_FANOUT=32 | ||
| 48 | # CONFIG_RCU_FANOUT_EXACT is not set | ||
| 49 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 50 | # CONFIG_IKCONFIG is not set | ||
| 51 | CONFIG_LOG_BUF_SHIFT=17 | ||
| 52 | # CONFIG_GROUP_SCHED is not set | ||
| 53 | # CONFIG_CGROUPS is not set | ||
| 54 | CONFIG_SYSFS_DEPRECATED=y | ||
| 55 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
| 56 | CONFIG_RELAY=y | ||
| 57 | CONFIG_NAMESPACES=y | ||
| 58 | # CONFIG_UTS_NS is not set | ||
| 59 | # CONFIG_IPC_NS is not set | ||
| 60 | CONFIG_USER_NS=y | ||
| 61 | # CONFIG_PID_NS is not set | ||
| 62 | CONFIG_BLK_DEV_INITRD=y | ||
| 63 | CONFIG_INITRAMFS_SOURCE="" | ||
| 64 | CONFIG_RD_GZIP=y | ||
| 65 | CONFIG_RD_BZIP2=y | ||
| 66 | CONFIG_RD_LZMA=y | ||
| 67 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 68 | CONFIG_SYSCTL=y | ||
| 69 | CONFIG_ANON_INODES=y | ||
| 70 | # CONFIG_EMBEDDED is not set | ||
| 71 | CONFIG_UID16=y | ||
| 72 | CONFIG_SYSCTL_SYSCALL=y | ||
| 73 | CONFIG_KALLSYMS=y | ||
| 74 | CONFIG_KALLSYMS_EXTRA_PASS=y | ||
| 75 | CONFIG_HOTPLUG=y | ||
| 76 | CONFIG_PRINTK=y | ||
| 77 | CONFIG_BUG=y | ||
| 78 | CONFIG_ELF_CORE=y | ||
| 79 | CONFIG_BASE_FULL=y | ||
| 80 | CONFIG_FUTEX=y | ||
| 81 | CONFIG_EPOLL=y | ||
| 82 | CONFIG_SIGNALFD=y | ||
| 83 | CONFIG_TIMERFD=y | ||
| 84 | CONFIG_EVENTFD=y | ||
| 85 | CONFIG_SHMEM=y | ||
| 86 | CONFIG_AIO=y | ||
| 87 | |||
| 88 | # | ||
| 89 | # Kernel Performance Events And Counters | ||
| 90 | # | ||
| 91 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 92 | CONFIG_COMPAT_BRK=y | ||
| 93 | CONFIG_SLAB=y | ||
| 94 | # CONFIG_SLUB is not set | ||
| 95 | # CONFIG_SLOB is not set | ||
| 96 | # CONFIG_PROFILING is not set | ||
| 97 | CONFIG_HAVE_OPROFILE=y | ||
| 98 | CONFIG_HAVE_KPROBES=y | ||
| 99 | CONFIG_HAVE_KRETPROBES=y | ||
| 100 | CONFIG_HAVE_CLK=y | ||
| 101 | |||
| 102 | # | ||
| 103 | # GCOV-based kernel profiling | ||
| 104 | # | ||
| 105 | # CONFIG_GCOV_KERNEL is not set | ||
| 106 | # CONFIG_SLOW_WORK is not set | ||
| 107 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 108 | CONFIG_SLABINFO=y | ||
| 109 | CONFIG_RT_MUTEXES=y | ||
| 110 | CONFIG_BASE_SMALL=0 | ||
| 111 | # CONFIG_MODULES is not set | ||
| 112 | CONFIG_BLOCK=y | ||
| 113 | CONFIG_LBDAF=y | ||
| 114 | CONFIG_BLK_DEV_BSG=y | ||
| 115 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 116 | |||
| 117 | # | ||
| 118 | # IO Schedulers | ||
| 119 | # | ||
| 120 | CONFIG_IOSCHED_NOOP=y | ||
| 121 | CONFIG_IOSCHED_AS=y | ||
| 122 | CONFIG_IOSCHED_DEADLINE=y | ||
| 123 | CONFIG_IOSCHED_CFQ=y | ||
| 124 | # CONFIG_DEFAULT_AS is not set | ||
| 125 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 126 | CONFIG_DEFAULT_CFQ=y | ||
| 127 | # CONFIG_DEFAULT_NOOP is not set | ||
| 128 | CONFIG_DEFAULT_IOSCHED="cfq" | ||
| 129 | # CONFIG_FREEZER is not set | ||
| 130 | |||
| 131 | # | ||
| 132 | # System Type | ||
| 133 | # | ||
| 134 | CONFIG_MMU=y | ||
| 135 | # CONFIG_ARCH_AAEC2000 is not set | ||
| 136 | # CONFIG_ARCH_INTEGRATOR is not set | ||
| 137 | # CONFIG_ARCH_REALVIEW is not set | ||
| 138 | # CONFIG_ARCH_VERSATILE is not set | ||
| 139 | # CONFIG_ARCH_AT91 is not set | ||
| 140 | # CONFIG_ARCH_CLPS711X is not set | ||
| 141 | # CONFIG_ARCH_GEMINI is not set | ||
| 142 | # CONFIG_ARCH_EBSA110 is not set | ||
| 143 | # CONFIG_ARCH_EP93XX is not set | ||
| 144 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
| 145 | # CONFIG_ARCH_MXC is not set | ||
| 146 | # CONFIG_ARCH_STMP3XXX is not set | ||
| 147 | # CONFIG_ARCH_NETX is not set | ||
| 148 | # CONFIG_ARCH_H720X is not set | ||
| 149 | # CONFIG_ARCH_NOMADIK is not set | ||
| 150 | # CONFIG_ARCH_IOP13XX is not set | ||
| 151 | # CONFIG_ARCH_IOP32X is not set | ||
| 152 | # CONFIG_ARCH_IOP33X is not set | ||
| 153 | # CONFIG_ARCH_IXP23XX is not set | ||
| 154 | # CONFIG_ARCH_IXP2000 is not set | ||
| 155 | # CONFIG_ARCH_IXP4XX is not set | ||
| 156 | # CONFIG_ARCH_L7200 is not set | ||
| 157 | # CONFIG_ARCH_KIRKWOOD is not set | ||
| 158 | # CONFIG_ARCH_LOKI is not set | ||
| 159 | # CONFIG_ARCH_MV78XX0 is not set | ||
| 160 | # CONFIG_ARCH_ORION5X is not set | ||
| 161 | # CONFIG_ARCH_MMP is not set | ||
| 162 | # CONFIG_ARCH_KS8695 is not set | ||
| 163 | # CONFIG_ARCH_NS9XXX is not set | ||
| 164 | CONFIG_ARCH_W90X900=y | ||
| 165 | # CONFIG_ARCH_PNX4008 is not set | ||
| 166 | # CONFIG_ARCH_PXA is not set | ||
| 167 | # CONFIG_ARCH_MSM is not set | ||
| 168 | # CONFIG_ARCH_RPC is not set | ||
| 169 | # CONFIG_ARCH_SA1100 is not set | ||
| 170 | # CONFIG_ARCH_S3C2410 is not set | ||
| 171 | # CONFIG_ARCH_S3C64XX is not set | ||
| 172 | # CONFIG_ARCH_S5PC1XX is not set | ||
| 173 | # CONFIG_ARCH_SHARK is not set | ||
| 174 | # CONFIG_ARCH_LH7A40X is not set | ||
| 175 | # CONFIG_ARCH_U300 is not set | ||
| 176 | # CONFIG_ARCH_DAVINCI is not set | ||
| 177 | # CONFIG_ARCH_OMAP is not set | ||
| 178 | # CONFIG_ARCH_BCMRING is not set | ||
| 179 | CONFIG_CPU_NUC960=y | ||
| 180 | |||
| 181 | # | ||
| 182 | # W90P910 Machines | ||
| 183 | # | ||
| 184 | # CONFIG_MACH_W90P910EVB is not set | ||
| 185 | |||
| 186 | # | ||
| 187 | # NUC950 Machines | ||
| 188 | # | ||
| 189 | # CONFIG_MACH_W90P950EVB is not set | ||
| 190 | |||
| 191 | # | ||
| 192 | # NUC960 Machines | ||
| 193 | # | ||
| 194 | CONFIG_MACH_W90N960EVB=y | ||
| 195 | |||
| 196 | # | ||
| 197 | # NUC932 Machines | ||
| 198 | # | ||
| 199 | # CONFIG_MACH_NUC932EVB is not set | ||
| 200 | |||
| 201 | # | ||
| 202 | # Processor Type | ||
| 203 | # | ||
| 204 | CONFIG_CPU_32=y | ||
| 205 | CONFIG_CPU_ARM926T=y | ||
| 206 | CONFIG_CPU_32v5=y | ||
| 207 | CONFIG_CPU_ABRT_EV5TJ=y | ||
| 208 | CONFIG_CPU_PABRT_LEGACY=y | ||
| 209 | CONFIG_CPU_CACHE_VIVT=y | ||
| 210 | CONFIG_CPU_COPY_V4WB=y | ||
| 211 | CONFIG_CPU_TLB_V4WBI=y | ||
| 212 | CONFIG_CPU_CP15=y | ||
| 213 | CONFIG_CPU_CP15_MMU=y | ||
| 214 | |||
| 215 | # | ||
| 216 | # Processor Features | ||
| 217 | # | ||
| 218 | CONFIG_ARM_THUMB=y | ||
| 219 | # CONFIG_CPU_ICACHE_DISABLE is not set | ||
| 220 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
| 221 | # CONFIG_CPU_DCACHE_WRITETHROUGH is not set | ||
| 222 | # CONFIG_CPU_CACHE_ROUND_ROBIN is not set | ||
| 223 | CONFIG_ARM_L1_CACHE_SHIFT=5 | ||
| 224 | CONFIG_COMMON_CLKDEV=y | ||
| 225 | |||
| 226 | # | ||
| 227 | # Bus support | ||
| 228 | # | ||
| 229 | # CONFIG_PCI_SYSCALL is not set | ||
| 230 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 231 | # CONFIG_PCCARD is not set | ||
| 232 | |||
| 233 | # | ||
| 234 | # Kernel Features | ||
| 235 | # | ||
| 236 | CONFIG_TICK_ONESHOT=y | ||
| 237 | CONFIG_NO_HZ=y | ||
| 238 | CONFIG_HIGH_RES_TIMERS=y | ||
| 239 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 240 | CONFIG_VMSPLIT_3G=y | ||
| 241 | # CONFIG_VMSPLIT_2G is not set | ||
| 242 | # CONFIG_VMSPLIT_1G is not set | ||
| 243 | CONFIG_PAGE_OFFSET=0xC0000000 | ||
| 244 | # CONFIG_PREEMPT_NONE is not set | ||
| 245 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
| 246 | CONFIG_PREEMPT=y | ||
| 247 | CONFIG_HZ=100 | ||
| 248 | CONFIG_AEABI=y | ||
| 249 | CONFIG_OABI_COMPAT=y | ||
| 250 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | ||
| 251 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | ||
| 252 | # CONFIG_HIGHMEM is not set | ||
| 253 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 254 | CONFIG_FLATMEM_MANUAL=y | ||
| 255 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 256 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 257 | CONFIG_FLATMEM=y | ||
| 258 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 259 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 260 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | ||
| 261 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
| 262 | CONFIG_ZONE_DMA_FLAG=0 | ||
| 263 | CONFIG_VIRT_TO_BUS=y | ||
| 264 | CONFIG_HAVE_MLOCK=y | ||
| 265 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
| 266 | # CONFIG_KSM is not set | ||
| 267 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
| 268 | CONFIG_ALIGNMENT_TRAP=y | ||
| 269 | # CONFIG_UACCESS_WITH_MEMCPY is not set | ||
| 270 | |||
| 271 | # | ||
| 272 | # Boot options | ||
| 273 | # | ||
| 274 | CONFIG_ZBOOT_ROM_TEXT=0 | ||
| 275 | CONFIG_ZBOOT_ROM_BSS=0 | ||
| 276 | CONFIG_CMDLINE="root=/dev/ram0 console=ttyS0,115200n8 rdinit=/sbin/init mem=64M" | ||
| 277 | # CONFIG_XIP_KERNEL is not set | ||
| 278 | CONFIG_KEXEC=y | ||
| 279 | CONFIG_ATAGS_PROC=y | ||
| 280 | |||
| 281 | # | ||
| 282 | # CPU Power Management | ||
| 283 | # | ||
| 284 | # CONFIG_CPU_IDLE is not set | ||
| 285 | |||
| 286 | # | ||
| 287 | # Floating point emulation | ||
| 288 | # | ||
| 289 | |||
| 290 | # | ||
| 291 | # At least one emulation must be selected | ||
| 292 | # | ||
| 293 | CONFIG_FPE_NWFPE=y | ||
| 294 | # CONFIG_FPE_NWFPE_XP is not set | ||
| 295 | # CONFIG_FPE_FASTFPE is not set | ||
| 296 | # CONFIG_VFP is not set | ||
| 297 | |||
| 298 | # | ||
| 299 | # Userspace binary formats | ||
| 300 | # | ||
| 301 | CONFIG_BINFMT_ELF=y | ||
| 302 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 303 | CONFIG_HAVE_AOUT=y | ||
| 304 | CONFIG_BINFMT_AOUT=y | ||
| 305 | CONFIG_BINFMT_MISC=y | ||
| 306 | |||
| 307 | # | ||
| 308 | # Power management options | ||
| 309 | # | ||
| 310 | # CONFIG_PM is not set | ||
| 311 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
| 312 | # CONFIG_NET is not set | ||
| 313 | |||
| 314 | # | ||
| 315 | # Device Drivers | ||
| 316 | # | ||
| 317 | |||
| 318 | # | ||
| 319 | # Generic Driver Options | ||
| 320 | # | ||
| 321 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
| 322 | # CONFIG_DEVTMPFS is not set | ||
| 323 | CONFIG_STANDALONE=y | ||
| 324 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 325 | CONFIG_FW_LOADER=y | ||
| 326 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
| 327 | CONFIG_EXTRA_FIRMWARE="" | ||
| 328 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 329 | CONFIG_MTD=y | ||
| 330 | # CONFIG_MTD_DEBUG is not set | ||
| 331 | CONFIG_MTD_CONCAT=y | ||
| 332 | CONFIG_MTD_PARTITIONS=y | ||
| 333 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
| 334 | # CONFIG_MTD_CMDLINE_PARTS is not set | ||
| 335 | # CONFIG_MTD_AFS_PARTS is not set | ||
| 336 | # CONFIG_MTD_AR7_PARTS is not set | ||
| 337 | |||
| 338 | # | ||
| 339 | # User Modules And Translation Layers | ||
| 340 | # | ||
| 341 | CONFIG_MTD_CHAR=y | ||
| 342 | CONFIG_MTD_BLKDEVS=y | ||
| 343 | CONFIG_MTD_BLOCK=y | ||
| 344 | # CONFIG_FTL is not set | ||
| 345 | # CONFIG_NFTL is not set | ||
| 346 | # CONFIG_INFTL is not set | ||
| 347 | # CONFIG_RFD_FTL is not set | ||
| 348 | # CONFIG_SSFDC is not set | ||
| 349 | # CONFIG_MTD_OOPS is not set | ||
| 350 | |||
| 351 | # | ||
| 352 | # RAM/ROM/Flash chip drivers | ||
| 353 | # | ||
| 354 | CONFIG_MTD_CFI=y | ||
| 355 | # CONFIG_MTD_JEDECPROBE is not set | ||
| 356 | CONFIG_MTD_GEN_PROBE=y | ||
| 357 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
| 358 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
| 359 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
| 360 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
| 361 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
| 362 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
| 363 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
| 364 | CONFIG_MTD_CFI_I1=y | ||
| 365 | CONFIG_MTD_CFI_I2=y | ||
| 366 | # CONFIG_MTD_CFI_I4 is not set | ||
| 367 | # CONFIG_MTD_CFI_I8 is not set | ||
| 368 | # CONFIG_MTD_CFI_INTELEXT is not set | ||
| 369 | CONFIG_MTD_CFI_AMDSTD=y | ||
| 370 | # CONFIG_MTD_CFI_STAA is not set | ||
| 371 | CONFIG_MTD_CFI_UTIL=y | ||
| 372 | # CONFIG_MTD_RAM is not set | ||
| 373 | # CONFIG_MTD_ROM is not set | ||
| 374 | # CONFIG_MTD_ABSENT is not set | ||
| 375 | |||
| 376 | # | ||
| 377 | # Mapping drivers for chip access | ||
| 378 | # | ||
| 379 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
| 380 | CONFIG_MTD_PHYSMAP=y | ||
| 381 | # CONFIG_MTD_PHYSMAP_COMPAT is not set | ||
| 382 | # CONFIG_MTD_ARM_INTEGRATOR is not set | ||
| 383 | # CONFIG_MTD_PLATRAM is not set | ||
| 384 | |||
| 385 | # | ||
| 386 | # Self-contained MTD device drivers | ||
| 387 | # | ||
| 388 | # CONFIG_MTD_SLRAM is not set | ||
| 389 | # CONFIG_MTD_PHRAM is not set | ||
| 390 | # CONFIG_MTD_MTDRAM is not set | ||
| 391 | # CONFIG_MTD_BLOCK2MTD is not set | ||
| 392 | |||
| 393 | # | ||
| 394 | # Disk-On-Chip Device Drivers | ||
| 395 | # | ||
| 396 | # CONFIG_MTD_DOC2000 is not set | ||
| 397 | # CONFIG_MTD_DOC2001 is not set | ||
| 398 | # CONFIG_MTD_DOC2001PLUS is not set | ||
| 399 | # CONFIG_MTD_NAND is not set | ||
| 400 | # CONFIG_MTD_ONENAND is not set | ||
| 401 | |||
| 402 | # | ||
| 403 | # LPDDR flash memory drivers | ||
| 404 | # | ||
| 405 | # CONFIG_MTD_LPDDR is not set | ||
| 406 | |||
| 407 | # | ||
| 408 | # UBI - Unsorted block images | ||
| 409 | # | ||
| 410 | # CONFIG_MTD_UBI is not set | ||
| 411 | # CONFIG_PARPORT is not set | ||
| 412 | CONFIG_BLK_DEV=y | ||
| 413 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 414 | # CONFIG_BLK_DEV_LOOP is not set | ||
| 415 | # CONFIG_BLK_DEV_UB is not set | ||
| 416 | CONFIG_BLK_DEV_RAM=y | ||
| 417 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
| 418 | CONFIG_BLK_DEV_RAM_SIZE=16384 | ||
| 419 | # CONFIG_BLK_DEV_XIP is not set | ||
| 420 | # CONFIG_CDROM_PKTCDVD is not set | ||
| 421 | # CONFIG_MG_DISK is not set | ||
| 422 | # CONFIG_MISC_DEVICES is not set | ||
| 423 | CONFIG_HAVE_IDE=y | ||
| 424 | # CONFIG_IDE is not set | ||
| 425 | |||
| 426 | # | ||
| 427 | # SCSI device support | ||
| 428 | # | ||
| 429 | # CONFIG_RAID_ATTRS is not set | ||
| 430 | CONFIG_SCSI=y | ||
| 431 | CONFIG_SCSI_DMA=y | ||
| 432 | # CONFIG_SCSI_TGT is not set | ||
| 433 | # CONFIG_SCSI_NETLINK is not set | ||
| 434 | # CONFIG_SCSI_PROC_FS is not set | ||
| 435 | |||
| 436 | # | ||
| 437 | # SCSI support type (disk, tape, CD-ROM) | ||
| 438 | # | ||
| 439 | CONFIG_BLK_DEV_SD=y | ||
| 440 | # CONFIG_CHR_DEV_ST is not set | ||
| 441 | # CONFIG_CHR_DEV_OSST is not set | ||
| 442 | # CONFIG_BLK_DEV_SR is not set | ||
| 443 | # CONFIG_CHR_DEV_SG is not set | ||
| 444 | # CONFIG_CHR_DEV_SCH is not set | ||
| 445 | # CONFIG_SCSI_MULTI_LUN is not set | ||
| 446 | # CONFIG_SCSI_CONSTANTS is not set | ||
| 447 | # CONFIG_SCSI_LOGGING is not set | ||
| 448 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
| 449 | |||
| 450 | # | ||
| 451 | # SCSI Transports | ||
| 452 | # | ||
| 453 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
| 454 | # CONFIG_SCSI_FC_ATTRS is not set | ||
| 455 | # CONFIG_SCSI_SAS_ATTRS is not set | ||
| 456 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
| 457 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
| 458 | # CONFIG_SCSI_LOWLEVEL is not set | ||
| 459 | # CONFIG_SCSI_DH is not set | ||
| 460 | # CONFIG_SCSI_OSD_INITIATOR is not set | ||
| 461 | # CONFIG_ATA is not set | ||
| 462 | # CONFIG_MD is not set | ||
| 463 | # CONFIG_PHONE is not set | ||
| 464 | |||
| 465 | # | ||
| 466 | # Input device support | ||
| 467 | # | ||
| 468 | CONFIG_INPUT=y | ||
| 469 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 470 | # CONFIG_INPUT_POLLDEV is not set | ||
| 471 | |||
| 472 | # | ||
| 473 | # Userland interfaces | ||
| 474 | # | ||
| 475 | CONFIG_INPUT_MOUSEDEV=y | ||
| 476 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
| 477 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
| 478 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
| 479 | # CONFIG_INPUT_JOYDEV is not set | ||
| 480 | # CONFIG_INPUT_EVDEV is not set | ||
| 481 | # CONFIG_INPUT_EVBUG is not set | ||
| 482 | |||
| 483 | # | ||
| 484 | # Input Device Drivers | ||
| 485 | # | ||
| 486 | # CONFIG_INPUT_KEYBOARD is not set | ||
| 487 | # CONFIG_INPUT_MOUSE is not set | ||
| 488 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 489 | # CONFIG_INPUT_TABLET is not set | ||
| 490 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
| 491 | # CONFIG_INPUT_MISC is not set | ||
| 492 | |||
| 493 | # | ||
| 494 | # Hardware I/O ports | ||
| 495 | # | ||
| 496 | # CONFIG_SERIO is not set | ||
| 497 | # CONFIG_GAMEPORT is not set | ||
| 498 | |||
| 499 | # | ||
| 500 | # Character devices | ||
| 501 | # | ||
| 502 | CONFIG_VT=y | ||
| 503 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 504 | CONFIG_VT_CONSOLE=y | ||
| 505 | CONFIG_HW_CONSOLE=y | ||
| 506 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
| 507 | # CONFIG_DEVKMEM is not set | ||
| 508 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 509 | |||
| 510 | # | ||
| 511 | # Serial drivers | ||
| 512 | # | ||
| 513 | CONFIG_SERIAL_8250=y | ||
| 514 | CONFIG_SERIAL_8250_CONSOLE=y | ||
| 515 | CONFIG_SERIAL_8250_NR_UARTS=1 | ||
| 516 | CONFIG_SERIAL_8250_RUNTIME_UARTS=1 | ||
| 517 | # CONFIG_SERIAL_8250_EXTENDED is not set | ||
| 518 | |||
| 519 | # | ||
| 520 | # Non-8250 serial port support | ||
| 521 | # | ||
| 522 | CONFIG_SERIAL_CORE=y | ||
| 523 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 524 | CONFIG_UNIX98_PTYS=y | ||
| 525 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 526 | # CONFIG_LEGACY_PTYS is not set | ||
| 527 | # CONFIG_IPMI_HANDLER is not set | ||
| 528 | # CONFIG_HW_RANDOM is not set | ||
| 529 | # CONFIG_R3964 is not set | ||
| 530 | # CONFIG_RAW_DRIVER is not set | ||
| 531 | # CONFIG_TCG_TPM is not set | ||
| 532 | # CONFIG_I2C is not set | ||
| 533 | # CONFIG_SPI is not set | ||
| 534 | |||
| 535 | # | ||
| 536 | # PPS support | ||
| 537 | # | ||
| 538 | # CONFIG_PPS is not set | ||
| 539 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
| 540 | CONFIG_GPIOLIB=y | ||
| 541 | # CONFIG_GPIO_SYSFS is not set | ||
| 542 | |||
| 543 | # | ||
| 544 | # Memory mapped GPIO expanders: | ||
| 545 | # | ||
| 546 | |||
| 547 | # | ||
| 548 | # I2C GPIO expanders: | ||
| 549 | # | ||
| 550 | |||
| 551 | # | ||
| 552 | # PCI GPIO expanders: | ||
| 553 | # | ||
| 554 | |||
| 555 | # | ||
| 556 | # SPI GPIO expanders: | ||
| 557 | # | ||
| 558 | |||
| 559 | # | ||
| 560 | # AC97 GPIO expanders: | ||
| 561 | # | ||
| 562 | # CONFIG_W1 is not set | ||
| 563 | # CONFIG_POWER_SUPPLY is not set | ||
| 564 | # CONFIG_HWMON is not set | ||
| 565 | # CONFIG_THERMAL is not set | ||
| 566 | # CONFIG_WATCHDOG is not set | ||
| 567 | CONFIG_SSB_POSSIBLE=y | ||
| 568 | |||
| 569 | # | ||
| 570 | # Sonics Silicon Backplane | ||
| 571 | # | ||
| 572 | # CONFIG_SSB is not set | ||
| 573 | |||
| 574 | # | ||
| 575 | # Multifunction device drivers | ||
| 576 | # | ||
| 577 | # CONFIG_MFD_CORE is not set | ||
| 578 | # CONFIG_MFD_SM501 is not set | ||
| 579 | # CONFIG_MFD_ASIC3 is not set | ||
| 580 | # CONFIG_HTC_EGPIO is not set | ||
| 581 | # CONFIG_HTC_PASIC3 is not set | ||
| 582 | # CONFIG_MFD_TMIO is not set | ||
| 583 | # CONFIG_MFD_T7L66XB is not set | ||
| 584 | # CONFIG_MFD_TC6387XB is not set | ||
| 585 | # CONFIG_MFD_TC6393XB is not set | ||
| 586 | # CONFIG_REGULATOR is not set | ||
| 587 | # CONFIG_MEDIA_SUPPORT is not set | ||
| 588 | |||
| 589 | # | ||
| 590 | # Graphics support | ||
| 591 | # | ||
| 592 | # CONFIG_VGASTATE is not set | ||
| 593 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 594 | # CONFIG_FB is not set | ||
| 595 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 596 | |||
| 597 | # | ||
| 598 | # Display device support | ||
| 599 | # | ||
| 600 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 601 | |||
| 602 | # | ||
| 603 | # Console display driver support | ||
| 604 | # | ||
| 605 | # CONFIG_VGA_CONSOLE is not set | ||
| 606 | CONFIG_DUMMY_CONSOLE=y | ||
| 607 | # CONFIG_SOUND is not set | ||
| 608 | # CONFIG_HID_SUPPORT is not set | ||
| 609 | CONFIG_USB_SUPPORT=y | ||
| 610 | CONFIG_USB_ARCH_HAS_HCD=y | ||
| 611 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
| 612 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
| 613 | CONFIG_USB=y | ||
| 614 | # CONFIG_USB_DEBUG is not set | ||
| 615 | # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set | ||
| 616 | |||
| 617 | # | ||
| 618 | # Miscellaneous USB options | ||
| 619 | # | ||
| 620 | # CONFIG_USB_DEVICEFS is not set | ||
| 621 | CONFIG_USB_DEVICE_CLASS=y | ||
| 622 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
| 623 | # CONFIG_USB_OTG is not set | ||
| 624 | CONFIG_USB_MON=y | ||
| 625 | # CONFIG_USB_WUSB is not set | ||
| 626 | # CONFIG_USB_WUSB_CBAF is not set | ||
| 627 | |||
| 628 | # | ||
| 629 | # USB Host Controller Drivers | ||
| 630 | # | ||
| 631 | # CONFIG_USB_C67X00_HCD is not set | ||
| 632 | # CONFIG_USB_EHCI_HCD is not set | ||
| 633 | # CONFIG_USB_OXU210HP_HCD is not set | ||
| 634 | # CONFIG_USB_ISP116X_HCD is not set | ||
| 635 | # CONFIG_USB_ISP1760_HCD is not set | ||
| 636 | # CONFIG_USB_ISP1362_HCD is not set | ||
| 637 | # CONFIG_USB_OHCI_HCD is not set | ||
| 638 | # CONFIG_USB_SL811_HCD is not set | ||
| 639 | # CONFIG_USB_R8A66597_HCD is not set | ||
| 640 | # CONFIG_USB_HWA_HCD is not set | ||
| 641 | # CONFIG_USB_MUSB_HDRC is not set | ||
| 642 | |||
| 643 | # | ||
| 644 | # USB Device Class drivers | ||
| 645 | # | ||
| 646 | # CONFIG_USB_ACM is not set | ||
| 647 | # CONFIG_USB_PRINTER is not set | ||
| 648 | # CONFIG_USB_WDM is not set | ||
| 649 | # CONFIG_USB_TMC is not set | ||
| 650 | |||
| 651 | # | ||
| 652 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | ||
| 653 | # | ||
| 654 | |||
| 655 | # | ||
| 656 | # also be needed; see USB_STORAGE Help for more info | ||
| 657 | # | ||
| 658 | CONFIG_USB_STORAGE=y | ||
| 659 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
| 660 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
| 661 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
| 662 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
| 663 | # CONFIG_USB_STORAGE_USBAT is not set | ||
| 664 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
| 665 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
| 666 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
| 667 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
| 668 | # CONFIG_USB_STORAGE_ONETOUCH is not set | ||
| 669 | # CONFIG_USB_STORAGE_KARMA is not set | ||
| 670 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
| 671 | # CONFIG_USB_LIBUSUAL is not set | ||
| 672 | |||
| 673 | # | ||
| 674 | # USB Imaging devices | ||
| 675 | # | ||
| 676 | # CONFIG_USB_MDC800 is not set | ||
| 677 | # CONFIG_USB_MICROTEK is not set | ||
| 678 | |||
| 679 | # | ||
| 680 | # USB port drivers | ||
| 681 | # | ||
| 682 | # CONFIG_USB_SERIAL is not set | ||
| 683 | |||
| 684 | # | ||
| 685 | # USB Miscellaneous drivers | ||
| 686 | # | ||
| 687 | # CONFIG_USB_EMI62 is not set | ||
| 688 | # CONFIG_USB_EMI26 is not set | ||
| 689 | # CONFIG_USB_ADUTUX is not set | ||
| 690 | # CONFIG_USB_SEVSEG is not set | ||
| 691 | # CONFIG_USB_RIO500 is not set | ||
| 692 | # CONFIG_USB_LEGOTOWER is not set | ||
| 693 | # CONFIG_USB_LCD is not set | ||
| 694 | # CONFIG_USB_BERRY_CHARGE is not set | ||
| 695 | # CONFIG_USB_LED is not set | ||
| 696 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
| 697 | # CONFIG_USB_CYTHERM is not set | ||
| 698 | # CONFIG_USB_IDMOUSE is not set | ||
| 699 | # CONFIG_USB_FTDI_ELAN is not set | ||
| 700 | # CONFIG_USB_APPLEDISPLAY is not set | ||
| 701 | # CONFIG_USB_LD is not set | ||
| 702 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
| 703 | # CONFIG_USB_IOWARRIOR is not set | ||
| 704 | # CONFIG_USB_TEST is not set | ||
| 705 | # CONFIG_USB_ISIGHTFW is not set | ||
| 706 | # CONFIG_USB_VST is not set | ||
| 707 | # CONFIG_USB_GADGET is not set | ||
| 708 | |||
| 709 | # | ||
| 710 | # OTG and related infrastructure | ||
| 711 | # | ||
| 712 | # CONFIG_USB_GPIO_VBUS is not set | ||
| 713 | # CONFIG_NOP_USB_XCEIV is not set | ||
| 714 | # CONFIG_MMC is not set | ||
| 715 | # CONFIG_MEMSTICK is not set | ||
| 716 | # CONFIG_NEW_LEDS is not set | ||
| 717 | # CONFIG_ACCESSIBILITY is not set | ||
| 718 | CONFIG_RTC_LIB=y | ||
| 719 | # CONFIG_RTC_CLASS is not set | ||
| 720 | # CONFIG_DMADEVICES is not set | ||
| 721 | # CONFIG_AUXDISPLAY is not set | ||
| 722 | # CONFIG_UIO is not set | ||
| 723 | |||
| 724 | # | ||
| 725 | # TI VLYNQ | ||
| 726 | # | ||
| 727 | # CONFIG_STAGING is not set | ||
| 728 | |||
| 729 | # | ||
| 730 | # File systems | ||
| 731 | # | ||
| 732 | # CONFIG_EXT2_FS is not set | ||
| 733 | # CONFIG_EXT3_FS is not set | ||
| 734 | # CONFIG_EXT4_FS is not set | ||
| 735 | # CONFIG_REISERFS_FS is not set | ||
| 736 | # CONFIG_JFS_FS is not set | ||
| 737 | CONFIG_FS_POSIX_ACL=y | ||
| 738 | # CONFIG_XFS_FS is not set | ||
| 739 | # CONFIG_GFS2_FS is not set | ||
| 740 | # CONFIG_BTRFS_FS is not set | ||
| 741 | # CONFIG_NILFS2_FS is not set | ||
| 742 | CONFIG_FILE_LOCKING=y | ||
| 743 | CONFIG_FSNOTIFY=y | ||
| 744 | # CONFIG_DNOTIFY is not set | ||
| 745 | # CONFIG_INOTIFY is not set | ||
| 746 | CONFIG_INOTIFY_USER=y | ||
| 747 | # CONFIG_QUOTA is not set | ||
| 748 | # CONFIG_AUTOFS_FS is not set | ||
| 749 | # CONFIG_AUTOFS4_FS is not set | ||
| 750 | # CONFIG_FUSE_FS is not set | ||
| 751 | CONFIG_GENERIC_ACL=y | ||
| 752 | |||
| 753 | # | ||
| 754 | # Caches | ||
| 755 | # | ||
| 756 | # CONFIG_FSCACHE is not set | ||
| 757 | |||
| 758 | # | ||
| 759 | # CD-ROM/DVD Filesystems | ||
| 760 | # | ||
| 761 | # CONFIG_ISO9660_FS is not set | ||
| 762 | # CONFIG_UDF_FS is not set | ||
| 763 | |||
| 764 | # | ||
| 765 | # DOS/FAT/NT Filesystems | ||
| 766 | # | ||
| 767 | # CONFIG_MSDOS_FS is not set | ||
| 768 | # CONFIG_VFAT_FS is not set | ||
| 769 | # CONFIG_NTFS_FS is not set | ||
| 770 | |||
| 771 | # | ||
| 772 | # Pseudo filesystems | ||
| 773 | # | ||
| 774 | CONFIG_PROC_FS=y | ||
| 775 | CONFIG_PROC_SYSCTL=y | ||
| 776 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 777 | CONFIG_SYSFS=y | ||
| 778 | CONFIG_TMPFS=y | ||
| 779 | CONFIG_TMPFS_POSIX_ACL=y | ||
| 780 | # CONFIG_HUGETLB_PAGE is not set | ||
| 781 | # CONFIG_CONFIGFS_FS is not set | ||
| 782 | CONFIG_MISC_FILESYSTEMS=y | ||
| 783 | # CONFIG_ADFS_FS is not set | ||
| 784 | # CONFIG_AFFS_FS is not set | ||
| 785 | # CONFIG_HFS_FS is not set | ||
| 786 | # CONFIG_HFSPLUS_FS is not set | ||
| 787 | # CONFIG_BEFS_FS is not set | ||
| 788 | # CONFIG_BFS_FS is not set | ||
| 789 | # CONFIG_EFS_FS is not set | ||
| 790 | # CONFIG_JFFS2_FS is not set | ||
| 791 | # CONFIG_CRAMFS is not set | ||
| 792 | # CONFIG_SQUASHFS is not set | ||
| 793 | # CONFIG_VXFS_FS is not set | ||
| 794 | # CONFIG_MINIX_FS is not set | ||
| 795 | # CONFIG_OMFS_FS is not set | ||
| 796 | # CONFIG_HPFS_FS is not set | ||
| 797 | # CONFIG_QNX4FS_FS is not set | ||
| 798 | CONFIG_ROMFS_FS=y | ||
| 799 | CONFIG_ROMFS_BACKED_BY_BLOCK=y | ||
| 800 | # CONFIG_ROMFS_BACKED_BY_MTD is not set | ||
| 801 | # CONFIG_ROMFS_BACKED_BY_BOTH is not set | ||
| 802 | CONFIG_ROMFS_ON_BLOCK=y | ||
| 803 | # CONFIG_SYSV_FS is not set | ||
| 804 | # CONFIG_UFS_FS is not set | ||
| 805 | |||
| 806 | # | ||
| 807 | # Partition Types | ||
| 808 | # | ||
| 809 | CONFIG_PARTITION_ADVANCED=y | ||
| 810 | # CONFIG_ACORN_PARTITION is not set | ||
| 811 | # CONFIG_OSF_PARTITION is not set | ||
| 812 | # CONFIG_AMIGA_PARTITION is not set | ||
| 813 | # CONFIG_ATARI_PARTITION is not set | ||
| 814 | # CONFIG_MAC_PARTITION is not set | ||
| 815 | CONFIG_MSDOS_PARTITION=y | ||
| 816 | # CONFIG_BSD_DISKLABEL is not set | ||
| 817 | # CONFIG_MINIX_SUBPARTITION is not set | ||
| 818 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
| 819 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
| 820 | # CONFIG_LDM_PARTITION is not set | ||
| 821 | # CONFIG_SGI_PARTITION is not set | ||
| 822 | # CONFIG_ULTRIX_PARTITION is not set | ||
| 823 | # CONFIG_SUN_PARTITION is not set | ||
| 824 | # CONFIG_KARMA_PARTITION is not set | ||
| 825 | # CONFIG_EFI_PARTITION is not set | ||
| 826 | # CONFIG_SYSV68_PARTITION is not set | ||
| 827 | CONFIG_NLS=y | ||
| 828 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
| 829 | CONFIG_NLS_CODEPAGE_437=y | ||
| 830 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
| 831 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
| 832 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
| 833 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
| 834 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
| 835 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
| 836 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
| 837 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
| 838 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
| 839 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
| 840 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
| 841 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
| 842 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
| 843 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
| 844 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
| 845 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
| 846 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
| 847 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
| 848 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
| 849 | # CONFIG_NLS_ISO8859_8 is not set | ||
| 850 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
| 851 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
| 852 | # CONFIG_NLS_ASCII is not set | ||
| 853 | CONFIG_NLS_ISO8859_1=y | ||
| 854 | # CONFIG_NLS_ISO8859_2 is not set | ||
| 855 | # CONFIG_NLS_ISO8859_3 is not set | ||
| 856 | # CONFIG_NLS_ISO8859_4 is not set | ||
| 857 | # CONFIG_NLS_ISO8859_5 is not set | ||
| 858 | # CONFIG_NLS_ISO8859_6 is not set | ||
| 859 | # CONFIG_NLS_ISO8859_7 is not set | ||
| 860 | # CONFIG_NLS_ISO8859_9 is not set | ||
| 861 | # CONFIG_NLS_ISO8859_13 is not set | ||
| 862 | # CONFIG_NLS_ISO8859_14 is not set | ||
| 863 | # CONFIG_NLS_ISO8859_15 is not set | ||
| 864 | # CONFIG_NLS_KOI8_R is not set | ||
| 865 | # CONFIG_NLS_KOI8_U is not set | ||
| 866 | # CONFIG_NLS_UTF8 is not set | ||
| 867 | |||
| 868 | # | ||
| 869 | # Kernel hacking | ||
| 870 | # | ||
| 871 | # CONFIG_PRINTK_TIME is not set | ||
| 872 | # CONFIG_ENABLE_WARN_DEPRECATED is not set | ||
| 873 | # CONFIG_ENABLE_MUST_CHECK is not set | ||
| 874 | CONFIG_FRAME_WARN=1024 | ||
| 875 | # CONFIG_MAGIC_SYSRQ is not set | ||
| 876 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 877 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 878 | CONFIG_DEBUG_FS=y | ||
| 879 | # CONFIG_HEADERS_CHECK is not set | ||
| 880 | # CONFIG_DEBUG_KERNEL is not set | ||
| 881 | CONFIG_DEBUG_BUGVERBOSE=y | ||
| 882 | CONFIG_DEBUG_MEMORY_INIT=y | ||
| 883 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 884 | # CONFIG_LATENCYTOP is not set | ||
| 885 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
| 886 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 887 | CONFIG_TRACING_SUPPORT=y | ||
| 888 | # CONFIG_FTRACE is not set | ||
| 889 | # CONFIG_DYNAMIC_DEBUG is not set | ||
| 890 | # CONFIG_SAMPLES is not set | ||
| 891 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 892 | CONFIG_ARM_UNWIND=y | ||
| 893 | # CONFIG_DEBUG_USER is not set | ||
| 894 | |||
| 895 | # | ||
| 896 | # Security options | ||
| 897 | # | ||
| 898 | # CONFIG_KEYS is not set | ||
| 899 | # CONFIG_SECURITY is not set | ||
| 900 | # CONFIG_SECURITYFS is not set | ||
| 901 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
| 902 | # CONFIG_CRYPTO is not set | ||
| 903 | # CONFIG_BINARY_PRINTF is not set | ||
| 904 | |||
| 905 | # | ||
| 906 | # Library routines | ||
| 907 | # | ||
| 908 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
| 909 | # CONFIG_CRC_CCITT is not set | ||
| 910 | # CONFIG_CRC16 is not set | ||
| 911 | # CONFIG_CRC_T10DIF is not set | ||
| 912 | # CONFIG_CRC_ITU_T is not set | ||
| 913 | # CONFIG_CRC32 is not set | ||
| 914 | # CONFIG_CRC7 is not set | ||
| 915 | # CONFIG_LIBCRC32C is not set | ||
| 916 | CONFIG_ZLIB_INFLATE=y | ||
| 917 | CONFIG_DECOMPRESS_GZIP=y | ||
| 918 | CONFIG_DECOMPRESS_BZIP2=y | ||
| 919 | CONFIG_DECOMPRESS_LZMA=y | ||
| 920 | CONFIG_HAS_IOMEM=y | ||
| 921 | CONFIG_HAS_IOPORT=y | ||
| 922 | CONFIG_HAS_DMA=y | ||
diff --git a/arch/arm/configs/omap3_beagle_defconfig b/arch/arm/configs/omap3_beagle_defconfig index b3c8cce0f8f..9cfae374e04 100644 --- a/arch/arm/configs/omap3_beagle_defconfig +++ b/arch/arm/configs/omap3_beagle_defconfig | |||
| @@ -52,8 +52,8 @@ CONFIG_FAIR_GROUP_SCHED=y | |||
| 52 | # CONFIG_RT_GROUP_SCHED is not set | 52 | # CONFIG_RT_GROUP_SCHED is not set |
| 53 | CONFIG_USER_SCHED=y | 53 | CONFIG_USER_SCHED=y |
| 54 | # CONFIG_CGROUP_SCHED is not set | 54 | # CONFIG_CGROUP_SCHED is not set |
| 55 | CONFIG_SYSFS_DEPRECATED=y | 55 | # CONFIG_SYSFS_DEPRECATED=y is not set |
| 56 | CONFIG_SYSFS_DEPRECATED_V2=y | 56 | # CONFIG_SYSFS_DEPRECATED_V2=y is not set |
| 57 | # CONFIG_RELAY is not set | 57 | # CONFIG_RELAY is not set |
| 58 | # CONFIG_NAMESPACES is not set | 58 | # CONFIG_NAMESPACES is not set |
| 59 | CONFIG_BLK_DEV_INITRD=y | 59 | CONFIG_BLK_DEV_INITRD=y |
diff --git a/arch/arm/configs/omap3_defconfig b/arch/arm/configs/omap3_defconfig new file mode 100644 index 00000000000..2af28eab906 --- /dev/null +++ b/arch/arm/configs/omap3_defconfig | |||
| @@ -0,0 +1,2119 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.32-rc8 | ||
| 4 | # Tue Dec 1 14:04:02 2009 | ||
| 5 | # | ||
| 6 | CONFIG_ARM=y | ||
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
| 8 | CONFIG_GENERIC_GPIO=y | ||
| 9 | CONFIG_GENERIC_TIME=y | ||
| 10 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 11 | CONFIG_GENERIC_HARDIRQS=y | ||
| 12 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 13 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 14 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 15 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 16 | CONFIG_HARDIRQS_SW_RESEND=y | ||
| 17 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 18 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 19 | CONFIG_ARCH_HAS_CPUFREQ=y | ||
| 20 | CONFIG_GENERIC_HWEIGHT=y | ||
| 21 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
| 22 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 23 | CONFIG_OPROFILE_ARMV7=y | ||
| 24 | CONFIG_VECTORS_BASE=0xffff0000 | ||
| 25 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 26 | CONFIG_CONSTRUCTORS=y | ||
| 27 | |||
| 28 | # | ||
| 29 | # General setup | ||
| 30 | # | ||
| 31 | CONFIG_EXPERIMENTAL=y | ||
| 32 | CONFIG_BROKEN_ON_SMP=y | ||
| 33 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 34 | CONFIG_LOCALVERSION="" | ||
| 35 | CONFIG_LOCALVERSION_AUTO=y | ||
| 36 | CONFIG_SWAP=y | ||
| 37 | CONFIG_SYSVIPC=y | ||
| 38 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 39 | CONFIG_POSIX_MQUEUE=y | ||
| 40 | CONFIG_POSIX_MQUEUE_SYSCTL=y | ||
| 41 | CONFIG_BSD_PROCESS_ACCT=y | ||
| 42 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set | ||
| 43 | # CONFIG_TASKSTATS is not set | ||
| 44 | # CONFIG_AUDIT is not set | ||
| 45 | |||
| 46 | # | ||
| 47 | # RCU Subsystem | ||
| 48 | # | ||
| 49 | CONFIG_TREE_RCU=y | ||
| 50 | # CONFIG_TREE_PREEMPT_RCU is not set | ||
| 51 | # CONFIG_RCU_TRACE is not set | ||
| 52 | CONFIG_RCU_FANOUT=32 | ||
| 53 | # CONFIG_RCU_FANOUT_EXACT is not set | ||
| 54 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 55 | CONFIG_IKCONFIG=y | ||
| 56 | CONFIG_IKCONFIG_PROC=y | ||
| 57 | CONFIG_LOG_BUF_SHIFT=14 | ||
| 58 | CONFIG_GROUP_SCHED=y | ||
| 59 | CONFIG_FAIR_GROUP_SCHED=y | ||
| 60 | # CONFIG_RT_GROUP_SCHED is not set | ||
| 61 | CONFIG_USER_SCHED=y | ||
| 62 | # CONFIG_CGROUP_SCHED is not set | ||
| 63 | # CONFIG_CGROUPS is not set | ||
| 64 | # CONFIG_SYSFS_DEPRECATED_V2 is not set | ||
| 65 | # CONFIG_RELAY is not set | ||
| 66 | # CONFIG_NAMESPACES is not set | ||
| 67 | CONFIG_BLK_DEV_INITRD=y | ||
| 68 | CONFIG_INITRAMFS_SOURCE="" | ||
| 69 | CONFIG_RD_GZIP=y | ||
| 70 | # CONFIG_RD_BZIP2 is not set | ||
| 71 | # CONFIG_RD_LZMA is not set | ||
| 72 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 73 | CONFIG_SYSCTL=y | ||
| 74 | CONFIG_ANON_INODES=y | ||
| 75 | CONFIG_EMBEDDED=y | ||
| 76 | CONFIG_UID16=y | ||
| 77 | # CONFIG_SYSCTL_SYSCALL is not set | ||
| 78 | CONFIG_KALLSYMS=y | ||
| 79 | CONFIG_KALLSYMS_ALL=y | ||
| 80 | CONFIG_KALLSYMS_EXTRA_PASS=y | ||
| 81 | CONFIG_HOTPLUG=y | ||
| 82 | CONFIG_PRINTK=y | ||
| 83 | CONFIG_BUG=y | ||
| 84 | CONFIG_ELF_CORE=y | ||
| 85 | CONFIG_BASE_FULL=y | ||
| 86 | CONFIG_FUTEX=y | ||
| 87 | CONFIG_EPOLL=y | ||
| 88 | CONFIG_SIGNALFD=y | ||
| 89 | CONFIG_TIMERFD=y | ||
| 90 | CONFIG_EVENTFD=y | ||
| 91 | CONFIG_SHMEM=y | ||
| 92 | CONFIG_AIO=y | ||
| 93 | |||
| 94 | # | ||
| 95 | # Kernel Performance Events And Counters | ||
| 96 | # | ||
| 97 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 98 | CONFIG_COMPAT_BRK=y | ||
| 99 | CONFIG_SLAB=y | ||
| 100 | # CONFIG_SLUB is not set | ||
| 101 | # CONFIG_SLOB is not set | ||
| 102 | CONFIG_PROFILING=y | ||
| 103 | CONFIG_TRACEPOINTS=y | ||
| 104 | CONFIG_OPROFILE=y | ||
| 105 | CONFIG_HAVE_OPROFILE=y | ||
| 106 | CONFIG_KPROBES=y | ||
| 107 | CONFIG_KRETPROBES=y | ||
| 108 | CONFIG_HAVE_KPROBES=y | ||
| 109 | CONFIG_HAVE_KRETPROBES=y | ||
| 110 | CONFIG_HAVE_CLK=y | ||
| 111 | |||
| 112 | # | ||
| 113 | # GCOV-based kernel profiling | ||
| 114 | # | ||
| 115 | # CONFIG_GCOV_KERNEL is not set | ||
| 116 | # CONFIG_SLOW_WORK is not set | ||
| 117 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 118 | CONFIG_SLABINFO=y | ||
| 119 | CONFIG_RT_MUTEXES=y | ||
| 120 | CONFIG_BASE_SMALL=0 | ||
| 121 | CONFIG_MODULES=y | ||
| 122 | CONFIG_MODULE_FORCE_LOAD=y | ||
| 123 | CONFIG_MODULE_UNLOAD=y | ||
| 124 | CONFIG_MODULE_FORCE_UNLOAD=y | ||
| 125 | CONFIG_MODVERSIONS=y | ||
| 126 | CONFIG_MODULE_SRCVERSION_ALL=y | ||
| 127 | CONFIG_BLOCK=y | ||
| 128 | CONFIG_LBDAF=y | ||
| 129 | # CONFIG_BLK_DEV_BSG is not set | ||
| 130 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 131 | |||
| 132 | # | ||
| 133 | # IO Schedulers | ||
| 134 | # | ||
| 135 | CONFIG_IOSCHED_NOOP=y | ||
| 136 | CONFIG_IOSCHED_AS=y | ||
| 137 | CONFIG_IOSCHED_DEADLINE=y | ||
| 138 | CONFIG_IOSCHED_CFQ=y | ||
| 139 | # CONFIG_DEFAULT_AS is not set | ||
| 140 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 141 | CONFIG_DEFAULT_CFQ=y | ||
| 142 | # CONFIG_DEFAULT_NOOP is not set | ||
| 143 | CONFIG_DEFAULT_IOSCHED="cfq" | ||
| 144 | CONFIG_FREEZER=y | ||
| 145 | |||
| 146 | # | ||
| 147 | # System Type | ||
| 148 | # | ||
| 149 | CONFIG_MMU=y | ||
| 150 | # CONFIG_ARCH_AAEC2000 is not set | ||
| 151 | # CONFIG_ARCH_INTEGRATOR is not set | ||
| 152 | # CONFIG_ARCH_REALVIEW is not set | ||
| 153 | # CONFIG_ARCH_VERSATILE is not set | ||
| 154 | # CONFIG_ARCH_AT91 is not set | ||
| 155 | # CONFIG_ARCH_CLPS711X is not set | ||
| 156 | # CONFIG_ARCH_GEMINI is not set | ||
| 157 | # CONFIG_ARCH_EBSA110 is not set | ||
| 158 | # CONFIG_ARCH_EP93XX is not set | ||
| 159 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
| 160 | # CONFIG_ARCH_MXC is not set | ||
| 161 | # CONFIG_ARCH_STMP3XXX is not set | ||
| 162 | # CONFIG_ARCH_NETX is not set | ||
| 163 | # CONFIG_ARCH_H720X is not set | ||
| 164 | # CONFIG_ARCH_NOMADIK is not set | ||
| 165 | # CONFIG_ARCH_IOP13XX is not set | ||
| 166 | # CONFIG_ARCH_IOP32X is not set | ||
| 167 | # CONFIG_ARCH_IOP33X is not set | ||
| 168 | # CONFIG_ARCH_IXP23XX is not set | ||
| 169 | # CONFIG_ARCH_IXP2000 is not set | ||
| 170 | # CONFIG_ARCH_IXP4XX is not set | ||
| 171 | # CONFIG_ARCH_L7200 is not set | ||
| 172 | # CONFIG_ARCH_KIRKWOOD is not set | ||
| 173 | # CONFIG_ARCH_LOKI is not set | ||
| 174 | # CONFIG_ARCH_MV78XX0 is not set | ||
| 175 | # CONFIG_ARCH_ORION5X is not set | ||
| 176 | # CONFIG_ARCH_MMP is not set | ||
| 177 | # CONFIG_ARCH_KS8695 is not set | ||
| 178 | # CONFIG_ARCH_NS9XXX is not set | ||
| 179 | # CONFIG_ARCH_W90X900 is not set | ||
| 180 | # CONFIG_ARCH_PNX4008 is not set | ||
| 181 | # CONFIG_ARCH_PXA is not set | ||
| 182 | # CONFIG_ARCH_MSM is not set | ||
| 183 | # CONFIG_ARCH_RPC is not set | ||
| 184 | # CONFIG_ARCH_SA1100 is not set | ||
| 185 | # CONFIG_ARCH_S3C2410 is not set | ||
| 186 | # CONFIG_ARCH_S3C64XX is not set | ||
| 187 | # CONFIG_ARCH_S5PC1XX is not set | ||
| 188 | # CONFIG_ARCH_SHARK is not set | ||
| 189 | # CONFIG_ARCH_LH7A40X is not set | ||
| 190 | # CONFIG_ARCH_U300 is not set | ||
| 191 | # CONFIG_ARCH_DAVINCI is not set | ||
| 192 | CONFIG_ARCH_OMAP=y | ||
| 193 | # CONFIG_ARCH_BCMRING is not set | ||
| 194 | |||
| 195 | # | ||
| 196 | # TI OMAP Implementations | ||
| 197 | # | ||
| 198 | CONFIG_ARCH_OMAP_OTG=y | ||
| 199 | # CONFIG_ARCH_OMAP1 is not set | ||
| 200 | # CONFIG_ARCH_OMAP2 is not set | ||
| 201 | CONFIG_ARCH_OMAP3=y | ||
| 202 | # CONFIG_ARCH_OMAP4 is not set | ||
| 203 | |||
| 204 | # | ||
| 205 | # OMAP Feature Selections | ||
| 206 | # | ||
| 207 | # CONFIG_OMAP_DEBUG_POWERDOMAIN is not set | ||
| 208 | # CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set | ||
| 209 | CONFIG_OMAP_RESET_CLOCKS=y | ||
| 210 | CONFIG_OMAP_MUX=y | ||
| 211 | CONFIG_OMAP_MUX_DEBUG=y | ||
| 212 | CONFIG_OMAP_MUX_WARNINGS=y | ||
| 213 | CONFIG_OMAP_MCBSP=y | ||
| 214 | # CONFIG_OMAP_MBOX_FWK is not set | ||
| 215 | # CONFIG_OMAP_MPU_TIMER is not set | ||
| 216 | CONFIG_OMAP_32K_TIMER=y | ||
| 217 | CONFIG_OMAP_32K_TIMER_HZ=128 | ||
| 218 | CONFIG_OMAP_DM_TIMER=y | ||
| 219 | # CONFIG_OMAP_LL_DEBUG_UART1 is not set | ||
| 220 | # CONFIG_OMAP_LL_DEBUG_UART2 is not set | ||
| 221 | # CONFIG_OMAP_LL_DEBUG_UART3 is not set | ||
| 222 | CONFIG_OMAP_LL_DEBUG_NONE=y | ||
| 223 | # CONFIG_OMAP_PM_NONE is not set | ||
| 224 | CONFIG_OMAP_PM_NOOP=y | ||
| 225 | CONFIG_ARCH_OMAP34XX=y | ||
| 226 | CONFIG_ARCH_OMAP3430=y | ||
| 227 | |||
| 228 | # | ||
| 229 | # OMAP Board Type | ||
| 230 | # | ||
| 231 | CONFIG_MACH_OMAP3_BEAGLE=y | ||
| 232 | CONFIG_MACH_OMAP_LDP=y | ||
| 233 | CONFIG_MACH_OVERO=y | ||
| 234 | CONFIG_MACH_OMAP3EVM=y | ||
| 235 | CONFIG_MACH_OMAP3517EVM=y | ||
| 236 | CONFIG_MACH_OMAP3_PANDORA=y | ||
| 237 | CONFIG_MACH_OMAP_3430SDP=y | ||
| 238 | CONFIG_MACH_NOKIA_RX51=y | ||
| 239 | CONFIG_MACH_OMAP_ZOOM2=y | ||
| 240 | CONFIG_MACH_OMAP_ZOOM3=y | ||
| 241 | CONFIG_MACH_CM_T35=y | ||
| 242 | CONFIG_MACH_IGEP0020=y | ||
| 243 | CONFIG_MACH_OMAP_3630SDP=y | ||
| 244 | |||
| 245 | # | ||
| 246 | # Processor Type | ||
| 247 | # | ||
| 248 | CONFIG_CPU_32=y | ||
| 249 | CONFIG_CPU_32v6K=y | ||
| 250 | CONFIG_CPU_V7=y | ||
| 251 | CONFIG_CPU_32v7=y | ||
| 252 | CONFIG_CPU_ABRT_EV7=y | ||
| 253 | CONFIG_CPU_PABRT_V7=y | ||
| 254 | CONFIG_CPU_CACHE_V7=y | ||
| 255 | CONFIG_CPU_CACHE_VIPT=y | ||
| 256 | CONFIG_CPU_COPY_V6=y | ||
| 257 | CONFIG_CPU_TLB_V7=y | ||
| 258 | CONFIG_CPU_HAS_ASID=y | ||
| 259 | CONFIG_CPU_CP15=y | ||
| 260 | CONFIG_CPU_CP15_MMU=y | ||
| 261 | |||
| 262 | # | ||
| 263 | # Processor Features | ||
| 264 | # | ||
| 265 | CONFIG_ARM_THUMB=y | ||
| 266 | CONFIG_ARM_THUMBEE=y | ||
| 267 | # CONFIG_CPU_ICACHE_DISABLE is not set | ||
| 268 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
| 269 | # CONFIG_CPU_BPREDICT_DISABLE is not set | ||
| 270 | CONFIG_HAS_TLS_REG=y | ||
| 271 | CONFIG_ARM_L1_CACHE_SHIFT=6 | ||
| 272 | # CONFIG_ARM_ERRATA_430973 is not set | ||
| 273 | # CONFIG_ARM_ERRATA_458693 is not set | ||
| 274 | # CONFIG_ARM_ERRATA_460075 is not set | ||
| 275 | CONFIG_COMMON_CLKDEV=y | ||
| 276 | |||
| 277 | # | ||
| 278 | # Bus support | ||
| 279 | # | ||
| 280 | # CONFIG_PCI_SYSCALL is not set | ||
| 281 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 282 | # CONFIG_PCCARD is not set | ||
| 283 | |||
| 284 | # | ||
| 285 | # Kernel Features | ||
| 286 | # | ||
| 287 | CONFIG_TICK_ONESHOT=y | ||
| 288 | CONFIG_NO_HZ=y | ||
| 289 | CONFIG_HIGH_RES_TIMERS=y | ||
| 290 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 291 | CONFIG_VMSPLIT_3G=y | ||
| 292 | # CONFIG_VMSPLIT_2G is not set | ||
| 293 | # CONFIG_VMSPLIT_1G is not set | ||
| 294 | CONFIG_PAGE_OFFSET=0xC0000000 | ||
| 295 | CONFIG_PREEMPT_NONE=y | ||
| 296 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
| 297 | # CONFIG_PREEMPT is not set | ||
| 298 | CONFIG_HZ=128 | ||
| 299 | # CONFIG_THUMB2_KERNEL is not set | ||
| 300 | CONFIG_AEABI=y | ||
| 301 | CONFIG_OABI_COMPAT=y | ||
| 302 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | ||
| 303 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | ||
| 304 | # CONFIG_HIGHMEM is not set | ||
| 305 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 306 | CONFIG_FLATMEM_MANUAL=y | ||
| 307 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 308 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 309 | CONFIG_FLATMEM=y | ||
| 310 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 311 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 312 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
| 313 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
| 314 | CONFIG_ZONE_DMA_FLAG=0 | ||
| 315 | CONFIG_VIRT_TO_BUS=y | ||
| 316 | CONFIG_HAVE_MLOCK=y | ||
| 317 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
| 318 | # CONFIG_KSM is not set | ||
| 319 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
| 320 | CONFIG_LEDS=y | ||
| 321 | CONFIG_ALIGNMENT_TRAP=y | ||
| 322 | # CONFIG_UACCESS_WITH_MEMCPY is not set | ||
| 323 | |||
| 324 | # | ||
| 325 | # Boot options | ||
| 326 | # | ||
| 327 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
| 328 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
| 329 | CONFIG_CMDLINE="root=/dev/nfs nfsroot=192.168.0.1:/home/user/buildroot ip=192.168.0.2:192.168.0.1:192.168.0.1:255.255.255.0:tgt:eth0:off rw console=ttyS2,115200n8" | ||
| 330 | # CONFIG_XIP_KERNEL is not set | ||
| 331 | CONFIG_KEXEC=y | ||
| 332 | CONFIG_ATAGS_PROC=y | ||
| 333 | |||
| 334 | # | ||
| 335 | # CPU Power Management | ||
| 336 | # | ||
| 337 | CONFIG_CPU_FREQ=y | ||
| 338 | CONFIG_CPU_FREQ_TABLE=y | ||
| 339 | # CONFIG_CPU_FREQ_DEBUG is not set | ||
| 340 | CONFIG_CPU_FREQ_STAT=y | ||
| 341 | CONFIG_CPU_FREQ_STAT_DETAILS=y | ||
| 342 | CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y | ||
| 343 | # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set | ||
| 344 | # CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set | ||
| 345 | # CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set | ||
| 346 | # CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set | ||
| 347 | CONFIG_CPU_FREQ_GOV_PERFORMANCE=y | ||
| 348 | # CONFIG_CPU_FREQ_GOV_POWERSAVE is not set | ||
| 349 | CONFIG_CPU_FREQ_GOV_USERSPACE=y | ||
| 350 | CONFIG_CPU_FREQ_GOV_ONDEMAND=y | ||
| 351 | # CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set | ||
| 352 | # CONFIG_CPU_IDLE is not set | ||
| 353 | |||
| 354 | # | ||
| 355 | # Floating point emulation | ||
| 356 | # | ||
| 357 | |||
| 358 | # | ||
| 359 | # At least one emulation must be selected | ||
| 360 | # | ||
| 361 | CONFIG_FPE_NWFPE=y | ||
| 362 | # CONFIG_FPE_NWFPE_XP is not set | ||
| 363 | # CONFIG_FPE_FASTFPE is not set | ||
| 364 | CONFIG_VFP=y | ||
| 365 | CONFIG_VFPv3=y | ||
| 366 | CONFIG_NEON=y | ||
| 367 | |||
| 368 | # | ||
| 369 | # Userspace binary formats | ||
| 370 | # | ||
| 371 | CONFIG_BINFMT_ELF=y | ||
| 372 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 373 | CONFIG_HAVE_AOUT=y | ||
| 374 | # CONFIG_BINFMT_AOUT is not set | ||
| 375 | CONFIG_BINFMT_MISC=y | ||
| 376 | |||
| 377 | # | ||
| 378 | # Power management options | ||
| 379 | # | ||
| 380 | CONFIG_PM=y | ||
| 381 | CONFIG_PM_DEBUG=y | ||
| 382 | CONFIG_PM_VERBOSE=y | ||
| 383 | CONFIG_CAN_PM_TRACE=y | ||
| 384 | CONFIG_PM_SLEEP=y | ||
| 385 | CONFIG_SUSPEND=y | ||
| 386 | # CONFIG_PM_TEST_SUSPEND is not set | ||
| 387 | CONFIG_SUSPEND_FREEZER=y | ||
| 388 | # CONFIG_APM_EMULATION is not set | ||
| 389 | # CONFIG_PM_RUNTIME is not set | ||
| 390 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
| 391 | CONFIG_NET=y | ||
| 392 | |||
| 393 | # | ||
| 394 | # Networking options | ||
| 395 | # | ||
| 396 | CONFIG_PACKET=y | ||
| 397 | CONFIG_PACKET_MMAP=y | ||
| 398 | CONFIG_UNIX=y | ||
| 399 | CONFIG_XFRM=y | ||
| 400 | CONFIG_XFRM_USER=y | ||
| 401 | # CONFIG_XFRM_SUB_POLICY is not set | ||
| 402 | CONFIG_XFRM_MIGRATE=y | ||
| 403 | # CONFIG_XFRM_STATISTICS is not set | ||
| 404 | CONFIG_NET_KEY=y | ||
| 405 | CONFIG_NET_KEY_MIGRATE=y | ||
| 406 | CONFIG_INET=y | ||
| 407 | CONFIG_IP_MULTICAST=y | ||
| 408 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 409 | CONFIG_IP_FIB_HASH=y | ||
| 410 | CONFIG_IP_PNP=y | ||
| 411 | CONFIG_IP_PNP_DHCP=y | ||
| 412 | CONFIG_IP_PNP_BOOTP=y | ||
| 413 | CONFIG_IP_PNP_RARP=y | ||
| 414 | # CONFIG_NET_IPIP is not set | ||
| 415 | # CONFIG_NET_IPGRE is not set | ||
| 416 | # CONFIG_IP_MROUTE is not set | ||
| 417 | # CONFIG_ARPD is not set | ||
| 418 | # CONFIG_SYN_COOKIES is not set | ||
| 419 | # CONFIG_INET_AH is not set | ||
| 420 | # CONFIG_INET_ESP is not set | ||
| 421 | # CONFIG_INET_IPCOMP is not set | ||
| 422 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
| 423 | # CONFIG_INET_TUNNEL is not set | ||
| 424 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
| 425 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
| 426 | CONFIG_INET_XFRM_MODE_BEET=y | ||
| 427 | # CONFIG_INET_LRO is not set | ||
| 428 | CONFIG_INET_DIAG=y | ||
| 429 | CONFIG_INET_TCP_DIAG=y | ||
| 430 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
| 431 | CONFIG_TCP_CONG_CUBIC=y | ||
| 432 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 433 | # CONFIG_TCP_MD5SIG is not set | ||
| 434 | # CONFIG_IPV6 is not set | ||
| 435 | # CONFIG_NETLABEL is not set | ||
| 436 | # CONFIG_NETWORK_SECMARK is not set | ||
| 437 | CONFIG_NETFILTER=y | ||
| 438 | # CONFIG_NETFILTER_DEBUG is not set | ||
| 439 | CONFIG_NETFILTER_ADVANCED=y | ||
| 440 | |||
| 441 | # | ||
| 442 | # Core Netfilter Configuration | ||
| 443 | # | ||
| 444 | # CONFIG_NETFILTER_NETLINK_QUEUE is not set | ||
| 445 | # CONFIG_NETFILTER_NETLINK_LOG is not set | ||
| 446 | # CONFIG_NF_CONNTRACK is not set | ||
| 447 | # CONFIG_NETFILTER_XTABLES is not set | ||
| 448 | # CONFIG_IP_VS is not set | ||
| 449 | |||
| 450 | # | ||
| 451 | # IP: Netfilter Configuration | ||
| 452 | # | ||
| 453 | # CONFIG_NF_DEFRAG_IPV4 is not set | ||
| 454 | # CONFIG_IP_NF_QUEUE is not set | ||
| 455 | # CONFIG_IP_NF_IPTABLES is not set | ||
| 456 | # CONFIG_IP_NF_ARPTABLES is not set | ||
| 457 | # CONFIG_IP_DCCP is not set | ||
| 458 | # CONFIG_IP_SCTP is not set | ||
| 459 | # CONFIG_RDS is not set | ||
| 460 | # CONFIG_TIPC is not set | ||
| 461 | # CONFIG_ATM is not set | ||
| 462 | # CONFIG_BRIDGE is not set | ||
| 463 | # CONFIG_NET_DSA is not set | ||
| 464 | # CONFIG_VLAN_8021Q is not set | ||
| 465 | # CONFIG_DECNET is not set | ||
| 466 | # CONFIG_LLC2 is not set | ||
| 467 | # CONFIG_IPX is not set | ||
| 468 | # CONFIG_ATALK is not set | ||
| 469 | # CONFIG_X25 is not set | ||
| 470 | # CONFIG_LAPB is not set | ||
| 471 | # CONFIG_ECONET is not set | ||
| 472 | # CONFIG_WAN_ROUTER is not set | ||
| 473 | # CONFIG_PHONET is not set | ||
| 474 | # CONFIG_IEEE802154 is not set | ||
| 475 | # CONFIG_NET_SCHED is not set | ||
| 476 | # CONFIG_DCB is not set | ||
| 477 | |||
| 478 | # | ||
| 479 | # Network testing | ||
| 480 | # | ||
| 481 | # CONFIG_NET_PKTGEN is not set | ||
| 482 | # CONFIG_NET_TCPPROBE is not set | ||
| 483 | # CONFIG_NET_DROP_MONITOR is not set | ||
| 484 | # CONFIG_HAMRADIO is not set | ||
| 485 | # CONFIG_CAN is not set | ||
| 486 | # CONFIG_IRDA is not set | ||
| 487 | CONFIG_BT=y | ||
| 488 | CONFIG_BT_L2CAP=y | ||
| 489 | CONFIG_BT_SCO=y | ||
| 490 | CONFIG_BT_RFCOMM=y | ||
| 491 | CONFIG_BT_RFCOMM_TTY=y | ||
| 492 | CONFIG_BT_BNEP=y | ||
| 493 | CONFIG_BT_BNEP_MC_FILTER=y | ||
| 494 | CONFIG_BT_BNEP_PROTO_FILTER=y | ||
| 495 | CONFIG_BT_HIDP=y | ||
| 496 | |||
| 497 | # | ||
| 498 | # Bluetooth device drivers | ||
| 499 | # | ||
| 500 | # CONFIG_BT_HCIBTUSB is not set | ||
| 501 | # CONFIG_BT_HCIBTSDIO is not set | ||
| 502 | CONFIG_BT_HCIUART=y | ||
| 503 | CONFIG_BT_HCIUART_H4=y | ||
| 504 | CONFIG_BT_HCIUART_BCSP=y | ||
| 505 | CONFIG_BT_HCIUART_LL=y | ||
| 506 | CONFIG_BT_HCIBCM203X=y | ||
| 507 | CONFIG_BT_HCIBPA10X=y | ||
| 508 | # CONFIG_BT_HCIBFUSB is not set | ||
| 509 | # CONFIG_BT_HCIVHCI is not set | ||
| 510 | # CONFIG_BT_MRVL is not set | ||
| 511 | # CONFIG_AF_RXRPC is not set | ||
| 512 | CONFIG_WIRELESS=y | ||
| 513 | CONFIG_CFG80211=y | ||
| 514 | # CONFIG_NL80211_TESTMODE is not set | ||
| 515 | # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set | ||
| 516 | # CONFIG_CFG80211_REG_DEBUG is not set | ||
| 517 | CONFIG_CFG80211_DEFAULT_PS=y | ||
| 518 | CONFIG_CFG80211_DEFAULT_PS_VALUE=1 | ||
| 519 | # CONFIG_CFG80211_DEBUGFS is not set | ||
| 520 | CONFIG_WIRELESS_OLD_REGULATORY=y | ||
| 521 | CONFIG_WIRELESS_EXT=y | ||
| 522 | CONFIG_WIRELESS_EXT_SYSFS=y | ||
| 523 | CONFIG_LIB80211=y | ||
| 524 | # CONFIG_LIB80211_DEBUG is not set | ||
| 525 | CONFIG_MAC80211=y | ||
| 526 | CONFIG_MAC80211_RC_PID=y | ||
| 527 | CONFIG_MAC80211_RC_MINSTREL=y | ||
| 528 | CONFIG_MAC80211_RC_DEFAULT_PID=y | ||
| 529 | # CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set | ||
| 530 | CONFIG_MAC80211_RC_DEFAULT="pid" | ||
| 531 | # CONFIG_MAC80211_MESH is not set | ||
| 532 | CONFIG_MAC80211_LEDS=y | ||
| 533 | # CONFIG_MAC80211_DEBUGFS is not set | ||
| 534 | # CONFIG_MAC80211_DEBUG_MENU is not set | ||
| 535 | # CONFIG_WIMAX is not set | ||
| 536 | # CONFIG_RFKILL is not set | ||
| 537 | # CONFIG_NET_9P is not set | ||
| 538 | |||
| 539 | # | ||
| 540 | # Device Drivers | ||
| 541 | # | ||
| 542 | |||
| 543 | # | ||
| 544 | # Generic Driver Options | ||
| 545 | # | ||
| 546 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
| 547 | # CONFIG_DEVTMPFS is not set | ||
| 548 | CONFIG_STANDALONE=y | ||
| 549 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 550 | CONFIG_FW_LOADER=y | ||
| 551 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
| 552 | CONFIG_EXTRA_FIRMWARE="" | ||
| 553 | # CONFIG_DEBUG_DRIVER is not set | ||
| 554 | # CONFIG_DEBUG_DEVRES is not set | ||
| 555 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 556 | CONFIG_CONNECTOR=y | ||
| 557 | CONFIG_PROC_EVENTS=y | ||
| 558 | CONFIG_MTD=y | ||
| 559 | # CONFIG_MTD_DEBUG is not set | ||
| 560 | # CONFIG_MTD_TESTS is not set | ||
| 561 | CONFIG_MTD_CONCAT=y | ||
| 562 | CONFIG_MTD_PARTITIONS=y | ||
| 563 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
| 564 | CONFIG_MTD_CMDLINE_PARTS=y | ||
| 565 | # CONFIG_MTD_AFS_PARTS is not set | ||
| 566 | # CONFIG_MTD_AR7_PARTS is not set | ||
| 567 | |||
| 568 | # | ||
| 569 | # User Modules And Translation Layers | ||
| 570 | # | ||
| 571 | CONFIG_MTD_CHAR=y | ||
| 572 | CONFIG_MTD_BLKDEVS=y | ||
| 573 | CONFIG_MTD_BLOCK=y | ||
| 574 | # CONFIG_FTL is not set | ||
| 575 | # CONFIG_NFTL is not set | ||
| 576 | # CONFIG_INFTL is not set | ||
| 577 | # CONFIG_RFD_FTL is not set | ||
| 578 | # CONFIG_SSFDC is not set | ||
| 579 | CONFIG_MTD_OOPS=y | ||
| 580 | |||
| 581 | # | ||
| 582 | # RAM/ROM/Flash chip drivers | ||
| 583 | # | ||
| 584 | CONFIG_MTD_CFI=y | ||
| 585 | # CONFIG_MTD_JEDECPROBE is not set | ||
| 586 | CONFIG_MTD_GEN_PROBE=y | ||
| 587 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
| 588 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
| 589 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
| 590 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
| 591 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
| 592 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
| 593 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
| 594 | CONFIG_MTD_CFI_I1=y | ||
| 595 | CONFIG_MTD_CFI_I2=y | ||
| 596 | # CONFIG_MTD_CFI_I4 is not set | ||
| 597 | # CONFIG_MTD_CFI_I8 is not set | ||
| 598 | CONFIG_MTD_CFI_INTELEXT=y | ||
| 599 | # CONFIG_MTD_CFI_AMDSTD is not set | ||
| 600 | # CONFIG_MTD_CFI_STAA is not set | ||
| 601 | CONFIG_MTD_CFI_UTIL=y | ||
| 602 | # CONFIG_MTD_RAM is not set | ||
| 603 | # CONFIG_MTD_ROM is not set | ||
| 604 | # CONFIG_MTD_ABSENT is not set | ||
| 605 | |||
| 606 | # | ||
| 607 | # Mapping drivers for chip access | ||
| 608 | # | ||
| 609 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
| 610 | # CONFIG_MTD_PHYSMAP is not set | ||
| 611 | # CONFIG_MTD_ARM_INTEGRATOR is not set | ||
| 612 | CONFIG_MTD_OMAP_NOR=y | ||
| 613 | # CONFIG_MTD_PLATRAM is not set | ||
| 614 | |||
| 615 | # | ||
| 616 | # Self-contained MTD device drivers | ||
| 617 | # | ||
| 618 | # CONFIG_MTD_DATAFLASH is not set | ||
| 619 | # CONFIG_MTD_M25P80 is not set | ||
| 620 | # CONFIG_MTD_SST25L is not set | ||
| 621 | # CONFIG_MTD_SLRAM is not set | ||
| 622 | # CONFIG_MTD_PHRAM is not set | ||
| 623 | # CONFIG_MTD_MTDRAM is not set | ||
| 624 | # CONFIG_MTD_BLOCK2MTD is not set | ||
| 625 | |||
| 626 | # | ||
| 627 | # Disk-On-Chip Device Drivers | ||
| 628 | # | ||
| 629 | # CONFIG_MTD_DOC2000 is not set | ||
| 630 | # CONFIG_MTD_DOC2001 is not set | ||
| 631 | # CONFIG_MTD_DOC2001PLUS is not set | ||
| 632 | CONFIG_MTD_NAND=y | ||
| 633 | # CONFIG_MTD_NAND_VERIFY_WRITE is not set | ||
| 634 | # CONFIG_MTD_NAND_ECC_SMC is not set | ||
| 635 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set | ||
| 636 | # CONFIG_MTD_NAND_GPIO is not set | ||
| 637 | CONFIG_MTD_NAND_OMAP2=y | ||
| 638 | CONFIG_MTD_NAND_OMAP_PREFETCH=y | ||
| 639 | # CONFIG_MTD_NAND_OMAP_PREFETCH_DMA is not set | ||
| 640 | CONFIG_MTD_NAND_IDS=y | ||
| 641 | # CONFIG_MTD_NAND_DISKONCHIP is not set | ||
| 642 | # CONFIG_MTD_NAND_NANDSIM is not set | ||
| 643 | # CONFIG_MTD_NAND_PLATFORM is not set | ||
| 644 | # CONFIG_MTD_ALAUDA is not set | ||
| 645 | CONFIG_MTD_ONENAND=y | ||
| 646 | CONFIG_MTD_ONENAND_VERIFY_WRITE=y | ||
| 647 | # CONFIG_MTD_ONENAND_GENERIC is not set | ||
| 648 | CONFIG_MTD_ONENAND_OMAP2=y | ||
| 649 | # CONFIG_MTD_ONENAND_OTP is not set | ||
| 650 | # CONFIG_MTD_ONENAND_2X_PROGRAM is not set | ||
| 651 | # CONFIG_MTD_ONENAND_SIM is not set | ||
| 652 | |||
| 653 | # | ||
| 654 | # LPDDR flash memory drivers | ||
| 655 | # | ||
| 656 | # CONFIG_MTD_LPDDR is not set | ||
| 657 | |||
| 658 | # | ||
| 659 | # UBI - Unsorted block images | ||
| 660 | # | ||
| 661 | CONFIG_MTD_UBI=y | ||
| 662 | CONFIG_MTD_UBI_WL_THRESHOLD=4096 | ||
| 663 | CONFIG_MTD_UBI_BEB_RESERVE=1 | ||
| 664 | # CONFIG_MTD_UBI_GLUEBI is not set | ||
| 665 | |||
| 666 | # | ||
| 667 | # UBI debugging options | ||
| 668 | # | ||
| 669 | # CONFIG_MTD_UBI_DEBUG is not set | ||
| 670 | # CONFIG_PARPORT is not set | ||
| 671 | CONFIG_BLK_DEV=y | ||
| 672 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 673 | CONFIG_BLK_DEV_LOOP=y | ||
| 674 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
| 675 | # CONFIG_BLK_DEV_NBD is not set | ||
| 676 | # CONFIG_BLK_DEV_UB is not set | ||
| 677 | CONFIG_BLK_DEV_RAM=y | ||
| 678 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
| 679 | CONFIG_BLK_DEV_RAM_SIZE=16384 | ||
| 680 | # CONFIG_BLK_DEV_XIP is not set | ||
| 681 | # CONFIG_CDROM_PKTCDVD is not set | ||
| 682 | # CONFIG_ATA_OVER_ETH is not set | ||
| 683 | # CONFIG_MG_DISK is not set | ||
| 684 | CONFIG_MISC_DEVICES=y | ||
| 685 | # CONFIG_ICS932S401 is not set | ||
| 686 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
| 687 | # CONFIG_ISL29003 is not set | ||
| 688 | # CONFIG_C2PORT is not set | ||
| 689 | |||
| 690 | # | ||
| 691 | # EEPROM support | ||
| 692 | # | ||
| 693 | # CONFIG_EEPROM_AT24 is not set | ||
| 694 | # CONFIG_EEPROM_AT25 is not set | ||
| 695 | CONFIG_EEPROM_LEGACY=y | ||
| 696 | # CONFIG_EEPROM_MAX6875 is not set | ||
| 697 | # CONFIG_EEPROM_93CX6 is not set | ||
| 698 | CONFIG_HAVE_IDE=y | ||
| 699 | # CONFIG_IDE is not set | ||
| 700 | |||
| 701 | # | ||
| 702 | # SCSI device support | ||
| 703 | # | ||
| 704 | # CONFIG_RAID_ATTRS is not set | ||
| 705 | CONFIG_SCSI=y | ||
| 706 | CONFIG_SCSI_DMA=y | ||
| 707 | # CONFIG_SCSI_TGT is not set | ||
| 708 | # CONFIG_SCSI_NETLINK is not set | ||
| 709 | CONFIG_SCSI_PROC_FS=y | ||
| 710 | |||
| 711 | # | ||
| 712 | # SCSI support type (disk, tape, CD-ROM) | ||
| 713 | # | ||
| 714 | CONFIG_BLK_DEV_SD=y | ||
| 715 | # CONFIG_CHR_DEV_ST is not set | ||
| 716 | # CONFIG_CHR_DEV_OSST is not set | ||
| 717 | # CONFIG_BLK_DEV_SR is not set | ||
| 718 | # CONFIG_CHR_DEV_SG is not set | ||
| 719 | # CONFIG_CHR_DEV_SCH is not set | ||
| 720 | CONFIG_SCSI_MULTI_LUN=y | ||
| 721 | # CONFIG_SCSI_CONSTANTS is not set | ||
| 722 | # CONFIG_SCSI_LOGGING is not set | ||
| 723 | CONFIG_SCSI_SCAN_ASYNC=y | ||
| 724 | CONFIG_SCSI_WAIT_SCAN=m | ||
| 725 | |||
| 726 | # | ||
| 727 | # SCSI Transports | ||
| 728 | # | ||
| 729 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
| 730 | # CONFIG_SCSI_FC_ATTRS is not set | ||
| 731 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
| 732 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
| 733 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
| 734 | CONFIG_SCSI_LOWLEVEL=y | ||
| 735 | # CONFIG_ISCSI_TCP is not set | ||
| 736 | # CONFIG_LIBFC is not set | ||
| 737 | # CONFIG_LIBFCOE is not set | ||
| 738 | # CONFIG_SCSI_DEBUG is not set | ||
| 739 | # CONFIG_SCSI_DH is not set | ||
| 740 | # CONFIG_SCSI_OSD_INITIATOR is not set | ||
| 741 | # CONFIG_ATA is not set | ||
| 742 | CONFIG_MD=y | ||
| 743 | # CONFIG_BLK_DEV_MD is not set | ||
| 744 | # CONFIG_BLK_DEV_DM is not set | ||
| 745 | CONFIG_NETDEVICES=y | ||
| 746 | # CONFIG_DUMMY is not set | ||
| 747 | # CONFIG_BONDING is not set | ||
| 748 | # CONFIG_MACVLAN is not set | ||
| 749 | # CONFIG_EQUALIZER is not set | ||
| 750 | # CONFIG_TUN is not set | ||
| 751 | # CONFIG_VETH is not set | ||
| 752 | CONFIG_PHYLIB=y | ||
| 753 | |||
| 754 | # | ||
| 755 | # MII PHY device drivers | ||
| 756 | # | ||
| 757 | # CONFIG_MARVELL_PHY is not set | ||
| 758 | # CONFIG_DAVICOM_PHY is not set | ||
| 759 | # CONFIG_QSEMI_PHY is not set | ||
| 760 | # CONFIG_LXT_PHY is not set | ||
| 761 | # CONFIG_CICADA_PHY is not set | ||
| 762 | # CONFIG_VITESSE_PHY is not set | ||
| 763 | CONFIG_SMSC_PHY=y | ||
| 764 | # CONFIG_BROADCOM_PHY is not set | ||
| 765 | # CONFIG_ICPLUS_PHY is not set | ||
| 766 | # CONFIG_REALTEK_PHY is not set | ||
| 767 | # CONFIG_NATIONAL_PHY is not set | ||
| 768 | # CONFIG_STE10XP is not set | ||
| 769 | # CONFIG_LSI_ET1011C_PHY is not set | ||
| 770 | # CONFIG_FIXED_PHY is not set | ||
| 771 | # CONFIG_MDIO_BITBANG is not set | ||
| 772 | CONFIG_NET_ETHERNET=y | ||
| 773 | CONFIG_MII=y | ||
| 774 | # CONFIG_AX88796 is not set | ||
| 775 | CONFIG_SMC91X=y | ||
| 776 | # CONFIG_DM9000 is not set | ||
| 777 | # CONFIG_ENC28J60 is not set | ||
| 778 | # CONFIG_ETHOC is not set | ||
| 779 | # CONFIG_SMC911X is not set | ||
| 780 | CONFIG_SMSC911X=y | ||
| 781 | # CONFIG_DNET is not set | ||
| 782 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
| 783 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
| 784 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
| 785 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
| 786 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
| 787 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
| 788 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
| 789 | # CONFIG_B44 is not set | ||
| 790 | # CONFIG_KS8842 is not set | ||
| 791 | # CONFIG_KS8851 is not set | ||
| 792 | # CONFIG_KS8851_MLL is not set | ||
| 793 | CONFIG_NETDEV_1000=y | ||
| 794 | CONFIG_NETDEV_10000=y | ||
| 795 | CONFIG_WLAN=y | ||
| 796 | # CONFIG_WLAN_PRE80211 is not set | ||
| 797 | CONFIG_WLAN_80211=y | ||
| 798 | CONFIG_LIBERTAS=y | ||
| 799 | CONFIG_LIBERTAS_USB=y | ||
| 800 | CONFIG_LIBERTAS_SDIO=y | ||
| 801 | # CONFIG_LIBERTAS_SPI is not set | ||
| 802 | CONFIG_LIBERTAS_DEBUG=y | ||
| 803 | # CONFIG_LIBERTAS_THINFIRM is not set | ||
| 804 | # CONFIG_AT76C50X_USB is not set | ||
| 805 | # CONFIG_USB_ZD1201 is not set | ||
| 806 | # CONFIG_USB_NET_RNDIS_WLAN is not set | ||
| 807 | # CONFIG_RTL8187 is not set | ||
| 808 | # CONFIG_MAC80211_HWSIM is not set | ||
| 809 | # CONFIG_P54_COMMON is not set | ||
| 810 | # CONFIG_ATH_COMMON is not set | ||
| 811 | # CONFIG_HOSTAP is not set | ||
| 812 | # CONFIG_B43 is not set | ||
| 813 | # CONFIG_B43LEGACY is not set | ||
| 814 | # CONFIG_ZD1211RW is not set | ||
| 815 | # CONFIG_RT2X00 is not set | ||
| 816 | # CONFIG_WL12XX is not set | ||
| 817 | # CONFIG_IWM is not set | ||
| 818 | |||
| 819 | # | ||
| 820 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
| 821 | # | ||
| 822 | |||
| 823 | # | ||
| 824 | # USB Network Adapters | ||
| 825 | # | ||
| 826 | # CONFIG_USB_CATC is not set | ||
| 827 | # CONFIG_USB_KAWETH is not set | ||
| 828 | # CONFIG_USB_PEGASUS is not set | ||
| 829 | # CONFIG_USB_RTL8150 is not set | ||
| 830 | CONFIG_USB_USBNET=y | ||
| 831 | CONFIG_USB_NET_AX8817X=y | ||
| 832 | CONFIG_USB_NET_CDCETHER=y | ||
| 833 | # CONFIG_USB_NET_CDC_EEM is not set | ||
| 834 | # CONFIG_USB_NET_DM9601 is not set | ||
| 835 | # CONFIG_USB_NET_SMSC95XX is not set | ||
| 836 | # CONFIG_USB_NET_GL620A is not set | ||
| 837 | CONFIG_USB_NET_NET1080=y | ||
| 838 | # CONFIG_USB_NET_PLUSB is not set | ||
| 839 | # CONFIG_USB_NET_MCS7830 is not set | ||
| 840 | # CONFIG_USB_NET_RNDIS_HOST is not set | ||
| 841 | CONFIG_USB_NET_CDC_SUBSET=y | ||
| 842 | CONFIG_USB_ALI_M5632=y | ||
| 843 | CONFIG_USB_AN2720=y | ||
| 844 | CONFIG_USB_BELKIN=y | ||
| 845 | CONFIG_USB_ARMLINUX=y | ||
| 846 | CONFIG_USB_EPSON2888=y | ||
| 847 | CONFIG_USB_KC2190=y | ||
| 848 | CONFIG_USB_NET_ZAURUS=y | ||
| 849 | # CONFIG_USB_NET_INT51X1 is not set | ||
| 850 | # CONFIG_WAN is not set | ||
| 851 | # CONFIG_PPP is not set | ||
| 852 | # CONFIG_SLIP is not set | ||
| 853 | # CONFIG_NETCONSOLE is not set | ||
| 854 | # CONFIG_NETPOLL is not set | ||
| 855 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
| 856 | # CONFIG_ISDN is not set | ||
| 857 | # CONFIG_PHONE is not set | ||
| 858 | |||
| 859 | # | ||
| 860 | # Input device support | ||
| 861 | # | ||
| 862 | CONFIG_INPUT=y | ||
| 863 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 864 | # CONFIG_INPUT_POLLDEV is not set | ||
| 865 | |||
| 866 | # | ||
| 867 | # Userland interfaces | ||
| 868 | # | ||
| 869 | CONFIG_INPUT_MOUSEDEV=y | ||
| 870 | CONFIG_INPUT_MOUSEDEV_PSAUX=y | ||
| 871 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
| 872 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
| 873 | CONFIG_INPUT_JOYDEV=y | ||
| 874 | CONFIG_INPUT_EVDEV=y | ||
| 875 | # CONFIG_INPUT_EVBUG is not set | ||
| 876 | |||
| 877 | # | ||
| 878 | # Input Device Drivers | ||
| 879 | # | ||
| 880 | CONFIG_INPUT_KEYBOARD=y | ||
| 881 | # CONFIG_KEYBOARD_ADP5588 is not set | ||
| 882 | CONFIG_KEYBOARD_ATKBD=y | ||
| 883 | # CONFIG_QT2160 is not set | ||
| 884 | # CONFIG_KEYBOARD_LKKBD is not set | ||
| 885 | CONFIG_KEYBOARD_GPIO=y | ||
| 886 | # CONFIG_KEYBOARD_MATRIX is not set | ||
| 887 | # CONFIG_KEYBOARD_LM8323 is not set | ||
| 888 | # CONFIG_KEYBOARD_MAX7359 is not set | ||
| 889 | # CONFIG_KEYBOARD_NEWTON is not set | ||
| 890 | # CONFIG_KEYBOARD_OPENCORES is not set | ||
| 891 | # CONFIG_KEYBOARD_STOWAWAY is not set | ||
| 892 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
| 893 | CONFIG_KEYBOARD_TWL4030=y | ||
| 894 | # CONFIG_KEYBOARD_XTKBD is not set | ||
| 895 | CONFIG_INPUT_MOUSE=y | ||
| 896 | CONFIG_MOUSE_PS2=y | ||
| 897 | CONFIG_MOUSE_PS2_ALPS=y | ||
| 898 | CONFIG_MOUSE_PS2_LOGIPS2PP=y | ||
| 899 | CONFIG_MOUSE_PS2_SYNAPTICS=y | ||
| 900 | CONFIG_MOUSE_PS2_TRACKPOINT=y | ||
| 901 | # CONFIG_MOUSE_PS2_ELANTECH is not set | ||
| 902 | # CONFIG_MOUSE_PS2_SENTELIC is not set | ||
| 903 | # CONFIG_MOUSE_PS2_TOUCHKIT is not set | ||
| 904 | # CONFIG_MOUSE_SERIAL is not set | ||
| 905 | # CONFIG_MOUSE_APPLETOUCH is not set | ||
| 906 | # CONFIG_MOUSE_BCM5974 is not set | ||
| 907 | # CONFIG_MOUSE_VSXXXAA is not set | ||
| 908 | # CONFIG_MOUSE_GPIO is not set | ||
| 909 | # CONFIG_MOUSE_SYNAPTICS_I2C is not set | ||
| 910 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 911 | # CONFIG_INPUT_TABLET is not set | ||
| 912 | CONFIG_INPUT_TOUCHSCREEN=y | ||
| 913 | CONFIG_TOUCHSCREEN_ADS7846=y | ||
| 914 | # CONFIG_TOUCHSCREEN_AD7877 is not set | ||
| 915 | # CONFIG_TOUCHSCREEN_AD7879_I2C is not set | ||
| 916 | # CONFIG_TOUCHSCREEN_AD7879_SPI is not set | ||
| 917 | # CONFIG_TOUCHSCREEN_AD7879 is not set | ||
| 918 | # CONFIG_TOUCHSCREEN_EETI is not set | ||
| 919 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | ||
| 920 | # CONFIG_TOUCHSCREEN_GUNZE is not set | ||
| 921 | # CONFIG_TOUCHSCREEN_ELO is not set | ||
| 922 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | ||
| 923 | # CONFIG_TOUCHSCREEN_MCS5000 is not set | ||
| 924 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | ||
| 925 | # CONFIG_TOUCHSCREEN_INEXIO is not set | ||
| 926 | # CONFIG_TOUCHSCREEN_MK712 is not set | ||
| 927 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set | ||
| 928 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | ||
| 929 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set | ||
| 930 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | ||
| 931 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set | ||
| 932 | # CONFIG_TOUCHSCREEN_TSC2007 is not set | ||
| 933 | # CONFIG_TOUCHSCREEN_W90X900 is not set | ||
| 934 | CONFIG_INPUT_MISC=y | ||
| 935 | # CONFIG_INPUT_ATI_REMOTE is not set | ||
| 936 | # CONFIG_INPUT_ATI_REMOTE2 is not set | ||
| 937 | # CONFIG_INPUT_KEYSPAN_REMOTE is not set | ||
| 938 | # CONFIG_INPUT_POWERMATE is not set | ||
| 939 | # CONFIG_INPUT_YEALINK is not set | ||
| 940 | # CONFIG_INPUT_CM109 is not set | ||
| 941 | CONFIG_INPUT_TWL4030_PWRBUTTON=y | ||
| 942 | # CONFIG_INPUT_UINPUT is not set | ||
| 943 | # CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set | ||
| 944 | |||
| 945 | # | ||
| 946 | # Hardware I/O ports | ||
| 947 | # | ||
| 948 | CONFIG_SERIO=y | ||
| 949 | CONFIG_SERIO_SERPORT=y | ||
| 950 | CONFIG_SERIO_LIBPS2=y | ||
| 951 | # CONFIG_SERIO_RAW is not set | ||
| 952 | # CONFIG_GAMEPORT is not set | ||
| 953 | |||
| 954 | # | ||
| 955 | # Character devices | ||
| 956 | # | ||
| 957 | CONFIG_VT=y | ||
| 958 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 959 | CONFIG_VT_CONSOLE=y | ||
| 960 | CONFIG_HW_CONSOLE=y | ||
| 961 | CONFIG_VT_HW_CONSOLE_BINDING=y | ||
| 962 | CONFIG_DEVKMEM=y | ||
| 963 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 964 | |||
| 965 | # | ||
| 966 | # Serial drivers | ||
| 967 | # | ||
| 968 | CONFIG_SERIAL_8250=y | ||
| 969 | CONFIG_SERIAL_8250_CONSOLE=y | ||
| 970 | CONFIG_SERIAL_8250_NR_UARTS=32 | ||
| 971 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
| 972 | CONFIG_SERIAL_8250_EXTENDED=y | ||
| 973 | CONFIG_SERIAL_8250_MANY_PORTS=y | ||
| 974 | CONFIG_SERIAL_8250_SHARE_IRQ=y | ||
| 975 | CONFIG_SERIAL_8250_DETECT_IRQ=y | ||
| 976 | CONFIG_SERIAL_8250_RSA=y | ||
| 977 | |||
| 978 | # | ||
| 979 | # Non-8250 serial port support | ||
| 980 | # | ||
| 981 | # CONFIG_SERIAL_MAX3100 is not set | ||
| 982 | CONFIG_SERIAL_CORE=y | ||
| 983 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 984 | CONFIG_UNIX98_PTYS=y | ||
| 985 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 986 | # CONFIG_LEGACY_PTYS is not set | ||
| 987 | # CONFIG_IPMI_HANDLER is not set | ||
| 988 | CONFIG_HW_RANDOM=y | ||
| 989 | # CONFIG_HW_RANDOM_TIMERIOMEM is not set | ||
| 990 | # CONFIG_R3964 is not set | ||
| 991 | # CONFIG_RAW_DRIVER is not set | ||
| 992 | # CONFIG_TCG_TPM is not set | ||
| 993 | CONFIG_I2C=y | ||
| 994 | CONFIG_I2C_BOARDINFO=y | ||
| 995 | CONFIG_I2C_COMPAT=y | ||
| 996 | CONFIG_I2C_CHARDEV=y | ||
| 997 | CONFIG_I2C_HELPER_AUTO=y | ||
| 998 | |||
| 999 | # | ||
| 1000 | # I2C Hardware Bus support | ||
| 1001 | # | ||
| 1002 | |||
| 1003 | # | ||
| 1004 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
| 1005 | # | ||
| 1006 | # CONFIG_I2C_DESIGNWARE is not set | ||
| 1007 | # CONFIG_I2C_GPIO is not set | ||
| 1008 | # CONFIG_I2C_OCORES is not set | ||
| 1009 | CONFIG_I2C_OMAP=y | ||
| 1010 | # CONFIG_I2C_SIMTEC is not set | ||
| 1011 | |||
| 1012 | # | ||
| 1013 | # External I2C/SMBus adapter drivers | ||
| 1014 | # | ||
| 1015 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
| 1016 | # CONFIG_I2C_TAOS_EVM is not set | ||
| 1017 | # CONFIG_I2C_TINY_USB is not set | ||
| 1018 | |||
| 1019 | # | ||
| 1020 | # Other I2C/SMBus bus drivers | ||
| 1021 | # | ||
| 1022 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
| 1023 | # CONFIG_I2C_STUB is not set | ||
| 1024 | |||
| 1025 | # | ||
| 1026 | # Miscellaneous I2C Chip support | ||
| 1027 | # | ||
| 1028 | # CONFIG_DS1682 is not set | ||
| 1029 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 1030 | # CONFIG_I2C_DEBUG_CORE is not set | ||
| 1031 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
| 1032 | # CONFIG_I2C_DEBUG_BUS is not set | ||
| 1033 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
| 1034 | CONFIG_SPI=y | ||
| 1035 | # CONFIG_SPI_DEBUG is not set | ||
| 1036 | CONFIG_SPI_MASTER=y | ||
| 1037 | |||
| 1038 | # | ||
| 1039 | # SPI Master Controller Drivers | ||
| 1040 | # | ||
| 1041 | # CONFIG_SPI_BITBANG is not set | ||
| 1042 | # CONFIG_SPI_GPIO is not set | ||
| 1043 | CONFIG_SPI_OMAP24XX=y | ||
| 1044 | |||
| 1045 | # | ||
| 1046 | # SPI Protocol Masters | ||
| 1047 | # | ||
| 1048 | # CONFIG_SPI_SPIDEV is not set | ||
| 1049 | # CONFIG_SPI_TLE62X0 is not set | ||
| 1050 | |||
| 1051 | # | ||
| 1052 | # PPS support | ||
| 1053 | # | ||
| 1054 | # CONFIG_PPS is not set | ||
| 1055 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
| 1056 | CONFIG_GPIOLIB=y | ||
| 1057 | CONFIG_DEBUG_GPIO=y | ||
| 1058 | CONFIG_GPIO_SYSFS=y | ||
| 1059 | |||
| 1060 | # | ||
| 1061 | # Memory mapped GPIO expanders: | ||
| 1062 | # | ||
| 1063 | |||
| 1064 | # | ||
| 1065 | # I2C GPIO expanders: | ||
| 1066 | # | ||
| 1067 | # CONFIG_GPIO_MAX732X is not set | ||
| 1068 | # CONFIG_GPIO_PCA953X is not set | ||
| 1069 | # CONFIG_GPIO_PCF857X is not set | ||
| 1070 | CONFIG_GPIO_TWL4030=y | ||
| 1071 | |||
| 1072 | # | ||
| 1073 | # PCI GPIO expanders: | ||
| 1074 | # | ||
| 1075 | |||
| 1076 | # | ||
| 1077 | # SPI GPIO expanders: | ||
| 1078 | # | ||
| 1079 | # CONFIG_GPIO_MAX7301 is not set | ||
| 1080 | # CONFIG_GPIO_MCP23S08 is not set | ||
| 1081 | # CONFIG_GPIO_MC33880 is not set | ||
| 1082 | |||
| 1083 | # | ||
| 1084 | # AC97 GPIO expanders: | ||
| 1085 | # | ||
| 1086 | CONFIG_W1=y | ||
| 1087 | CONFIG_W1_CON=y | ||
| 1088 | |||
| 1089 | # | ||
| 1090 | # 1-wire Bus Masters | ||
| 1091 | # | ||
| 1092 | # CONFIG_W1_MASTER_DS2490 is not set | ||
| 1093 | # CONFIG_W1_MASTER_DS2482 is not set | ||
| 1094 | # CONFIG_W1_MASTER_DS1WM is not set | ||
| 1095 | # CONFIG_W1_MASTER_GPIO is not set | ||
| 1096 | # CONFIG_HDQ_MASTER_OMAP is not set | ||
| 1097 | |||
| 1098 | # | ||
| 1099 | # 1-wire Slaves | ||
| 1100 | # | ||
| 1101 | # CONFIG_W1_SLAVE_THERM is not set | ||
| 1102 | # CONFIG_W1_SLAVE_SMEM is not set | ||
| 1103 | # CONFIG_W1_SLAVE_DS2431 is not set | ||
| 1104 | # CONFIG_W1_SLAVE_DS2433 is not set | ||
| 1105 | # CONFIG_W1_SLAVE_DS2760 is not set | ||
| 1106 | # CONFIG_W1_SLAVE_BQ27000 is not set | ||
| 1107 | CONFIG_POWER_SUPPLY=y | ||
| 1108 | # CONFIG_POWER_SUPPLY_DEBUG is not set | ||
| 1109 | # CONFIG_PDA_POWER is not set | ||
| 1110 | # CONFIG_BATTERY_DS2760 is not set | ||
| 1111 | # CONFIG_BATTERY_DS2782 is not set | ||
| 1112 | # CONFIG_BATTERY_BQ27x00 is not set | ||
| 1113 | # CONFIG_BATTERY_MAX17040 is not set | ||
| 1114 | CONFIG_HWMON=y | ||
| 1115 | # CONFIG_HWMON_VID is not set | ||
| 1116 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
| 1117 | |||
| 1118 | # | ||
| 1119 | # Native drivers | ||
| 1120 | # | ||
| 1121 | # CONFIG_SENSORS_AD7414 is not set | ||
| 1122 | # CONFIG_SENSORS_AD7418 is not set | ||
| 1123 | # CONFIG_SENSORS_ADCXX is not set | ||
| 1124 | # CONFIG_SENSORS_ADM1021 is not set | ||
| 1125 | # CONFIG_SENSORS_ADM1025 is not set | ||
| 1126 | # CONFIG_SENSORS_ADM1026 is not set | ||
| 1127 | # CONFIG_SENSORS_ADM1029 is not set | ||
| 1128 | # CONFIG_SENSORS_ADM1031 is not set | ||
| 1129 | # CONFIG_SENSORS_ADM9240 is not set | ||
| 1130 | # CONFIG_SENSORS_ADT7462 is not set | ||
| 1131 | # CONFIG_SENSORS_ADT7470 is not set | ||
| 1132 | # CONFIG_SENSORS_ADT7473 is not set | ||
| 1133 | # CONFIG_SENSORS_ADT7475 is not set | ||
| 1134 | # CONFIG_SENSORS_ATXP1 is not set | ||
| 1135 | # CONFIG_SENSORS_DS1621 is not set | ||
| 1136 | # CONFIG_SENSORS_F71805F is not set | ||
| 1137 | # CONFIG_SENSORS_F71882FG is not set | ||
| 1138 | # CONFIG_SENSORS_F75375S is not set | ||
| 1139 | # CONFIG_SENSORS_G760A is not set | ||
| 1140 | # CONFIG_SENSORS_GL518SM is not set | ||
| 1141 | # CONFIG_SENSORS_GL520SM is not set | ||
| 1142 | # CONFIG_SENSORS_IT87 is not set | ||
| 1143 | # CONFIG_SENSORS_LM63 is not set | ||
| 1144 | # CONFIG_SENSORS_LM70 is not set | ||
| 1145 | # CONFIG_SENSORS_LM75 is not set | ||
| 1146 | # CONFIG_SENSORS_LM77 is not set | ||
| 1147 | # CONFIG_SENSORS_LM78 is not set | ||
| 1148 | # CONFIG_SENSORS_LM80 is not set | ||
| 1149 | # CONFIG_SENSORS_LM83 is not set | ||
| 1150 | # CONFIG_SENSORS_LM85 is not set | ||
| 1151 | # CONFIG_SENSORS_LM87 is not set | ||
| 1152 | # CONFIG_SENSORS_LM90 is not set | ||
| 1153 | # CONFIG_SENSORS_LM92 is not set | ||
| 1154 | # CONFIG_SENSORS_LM93 is not set | ||
| 1155 | # CONFIG_SENSORS_LTC4215 is not set | ||
| 1156 | # CONFIG_SENSORS_LTC4245 is not set | ||
| 1157 | # CONFIG_SENSORS_LM95241 is not set | ||
| 1158 | # CONFIG_SENSORS_MAX1111 is not set | ||
| 1159 | # CONFIG_SENSORS_MAX1619 is not set | ||
| 1160 | # CONFIG_SENSORS_MAX6650 is not set | ||
| 1161 | # CONFIG_SENSORS_PC87360 is not set | ||
| 1162 | # CONFIG_SENSORS_PC87427 is not set | ||
| 1163 | # CONFIG_SENSORS_PCF8591 is not set | ||
| 1164 | # CONFIG_SENSORS_SHT15 is not set | ||
| 1165 | # CONFIG_SENSORS_DME1737 is not set | ||
| 1166 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
| 1167 | # CONFIG_SENSORS_SMSC47M192 is not set | ||
| 1168 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
| 1169 | # CONFIG_SENSORS_ADS7828 is not set | ||
| 1170 | # CONFIG_SENSORS_THMC50 is not set | ||
| 1171 | # CONFIG_SENSORS_TMP401 is not set | ||
| 1172 | # CONFIG_SENSORS_TMP421 is not set | ||
| 1173 | # CONFIG_SENSORS_VT1211 is not set | ||
| 1174 | # CONFIG_SENSORS_W83781D is not set | ||
| 1175 | # CONFIG_SENSORS_W83791D is not set | ||
| 1176 | # CONFIG_SENSORS_W83792D is not set | ||
| 1177 | # CONFIG_SENSORS_W83793 is not set | ||
| 1178 | # CONFIG_SENSORS_W83L785TS is not set | ||
| 1179 | # CONFIG_SENSORS_W83L786NG is not set | ||
| 1180 | # CONFIG_SENSORS_W83627HF is not set | ||
| 1181 | # CONFIG_SENSORS_W83627EHF is not set | ||
| 1182 | # CONFIG_SENSORS_LIS3_SPI is not set | ||
| 1183 | # CONFIG_THERMAL is not set | ||
| 1184 | CONFIG_WATCHDOG=y | ||
| 1185 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
| 1186 | |||
| 1187 | # | ||
| 1188 | # Watchdog Device Drivers | ||
| 1189 | # | ||
| 1190 | # CONFIG_SOFT_WATCHDOG is not set | ||
| 1191 | CONFIG_OMAP_WATCHDOG=y | ||
| 1192 | CONFIG_TWL4030_WATCHDOG=y | ||
| 1193 | |||
| 1194 | # | ||
| 1195 | # USB-based Watchdog Cards | ||
| 1196 | # | ||
| 1197 | # CONFIG_USBPCWATCHDOG is not set | ||
| 1198 | CONFIG_SSB_POSSIBLE=y | ||
| 1199 | |||
| 1200 | # | ||
| 1201 | # Sonics Silicon Backplane | ||
| 1202 | # | ||
| 1203 | # CONFIG_SSB is not set | ||
| 1204 | |||
| 1205 | # | ||
| 1206 | # Multifunction device drivers | ||
| 1207 | # | ||
| 1208 | # CONFIG_MFD_CORE is not set | ||
| 1209 | # CONFIG_MFD_SM501 is not set | ||
| 1210 | # CONFIG_MFD_ASIC3 is not set | ||
| 1211 | # CONFIG_HTC_EGPIO is not set | ||
| 1212 | # CONFIG_HTC_PASIC3 is not set | ||
| 1213 | # CONFIG_TPS65010 is not set | ||
| 1214 | CONFIG_TWL4030_CORE=y | ||
| 1215 | # CONFIG_TWL4030_POWER is not set | ||
| 1216 | # CONFIG_TWL4030_CODEC is not set | ||
| 1217 | # CONFIG_MFD_TMIO is not set | ||
| 1218 | # CONFIG_MFD_T7L66XB is not set | ||
| 1219 | # CONFIG_MFD_TC6387XB is not set | ||
| 1220 | # CONFIG_MFD_TC6393XB is not set | ||
| 1221 | # CONFIG_PMIC_DA903X is not set | ||
| 1222 | # CONFIG_MFD_WM8400 is not set | ||
| 1223 | # CONFIG_MFD_WM831X is not set | ||
| 1224 | # CONFIG_MFD_WM8350_I2C is not set | ||
| 1225 | # CONFIG_MFD_PCF50633 is not set | ||
| 1226 | # CONFIG_MFD_MC13783 is not set | ||
| 1227 | # CONFIG_AB3100_CORE is not set | ||
| 1228 | # CONFIG_EZX_PCAP is not set | ||
| 1229 | CONFIG_REGULATOR=y | ||
| 1230 | # CONFIG_REGULATOR_DEBUG is not set | ||
| 1231 | CONFIG_REGULATOR_FIXED_VOLTAGE=y | ||
| 1232 | # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set | ||
| 1233 | # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set | ||
| 1234 | # CONFIG_REGULATOR_BQ24022 is not set | ||
| 1235 | # CONFIG_REGULATOR_MAX1586 is not set | ||
| 1236 | CONFIG_REGULATOR_TWL4030=y | ||
| 1237 | # CONFIG_REGULATOR_LP3971 is not set | ||
| 1238 | # CONFIG_REGULATOR_TPS65023 is not set | ||
| 1239 | # CONFIG_REGULATOR_TPS6507X is not set | ||
| 1240 | # CONFIG_MEDIA_SUPPORT is not set | ||
| 1241 | |||
| 1242 | # | ||
| 1243 | # Graphics support | ||
| 1244 | # | ||
| 1245 | # CONFIG_VGASTATE is not set | ||
| 1246 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 1247 | CONFIG_FB=y | ||
| 1248 | CONFIG_FIRMWARE_EDID=y | ||
| 1249 | # CONFIG_FB_DDC is not set | ||
| 1250 | # CONFIG_FB_BOOT_VESA_SUPPORT is not set | ||
| 1251 | CONFIG_FB_CFB_FILLRECT=y | ||
| 1252 | CONFIG_FB_CFB_COPYAREA=y | ||
| 1253 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
| 1254 | # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
| 1255 | # CONFIG_FB_SYS_FILLRECT is not set | ||
| 1256 | # CONFIG_FB_SYS_COPYAREA is not set | ||
| 1257 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
| 1258 | # CONFIG_FB_FOREIGN_ENDIAN is not set | ||
| 1259 | # CONFIG_FB_SYS_FOPS is not set | ||
| 1260 | # CONFIG_FB_SVGALIB is not set | ||
| 1261 | # CONFIG_FB_MACMODES is not set | ||
| 1262 | # CONFIG_FB_BACKLIGHT is not set | ||
| 1263 | CONFIG_FB_MODE_HELPERS=y | ||
| 1264 | CONFIG_FB_TILEBLITTING=y | ||
| 1265 | |||
| 1266 | # | ||
| 1267 | # Frame buffer hardware drivers | ||
| 1268 | # | ||
| 1269 | # CONFIG_FB_UVESA is not set | ||
| 1270 | # CONFIG_FB_S1D13XXX is not set | ||
| 1271 | # CONFIG_FB_VIRTUAL is not set | ||
| 1272 | # CONFIG_FB_METRONOME is not set | ||
| 1273 | # CONFIG_FB_MB862XX is not set | ||
| 1274 | # CONFIG_FB_BROADSHEET is not set | ||
| 1275 | CONFIG_FB_OMAP=y | ||
| 1276 | CONFIG_FB_OMAP_LCD_VGA=y | ||
| 1277 | # CONFIG_FB_OMAP_031M3R is not set | ||
| 1278 | # CONFIG_FB_OMAP_048M3R is not set | ||
| 1279 | CONFIG_FB_OMAP_079M3R=y | ||
| 1280 | # CONFIG_FB_OMAP_092M9R is not set | ||
| 1281 | # CONFIG_FB_OMAP_LCDC_EXTERNAL is not set | ||
| 1282 | # CONFIG_FB_OMAP_LCD_MIPID is not set | ||
| 1283 | # CONFIG_FB_OMAP_BOOTLOADER_INIT is not set | ||
| 1284 | CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE=2 | ||
| 1285 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | ||
| 1286 | CONFIG_LCD_CLASS_DEVICE=y | ||
| 1287 | # CONFIG_LCD_LMS283GF05 is not set | ||
| 1288 | # CONFIG_LCD_LTV350QV is not set | ||
| 1289 | # CONFIG_LCD_ILI9320 is not set | ||
| 1290 | # CONFIG_LCD_TDO24M is not set | ||
| 1291 | # CONFIG_LCD_VGG2432A4 is not set | ||
| 1292 | CONFIG_LCD_PLATFORM=y | ||
| 1293 | CONFIG_BACKLIGHT_CLASS_DEVICE=y | ||
| 1294 | CONFIG_BACKLIGHT_GENERIC=y | ||
| 1295 | |||
| 1296 | # | ||
| 1297 | # Display device support | ||
| 1298 | # | ||
| 1299 | CONFIG_DISPLAY_SUPPORT=y | ||
| 1300 | |||
| 1301 | # | ||
| 1302 | # Display hardware drivers | ||
| 1303 | # | ||
| 1304 | |||
| 1305 | # | ||
| 1306 | # Console display driver support | ||
| 1307 | # | ||
| 1308 | # CONFIG_VGA_CONSOLE is not set | ||
| 1309 | CONFIG_DUMMY_CONSOLE=y | ||
| 1310 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
| 1311 | # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | ||
| 1312 | CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y | ||
| 1313 | CONFIG_FONTS=y | ||
| 1314 | CONFIG_FONT_8x8=y | ||
| 1315 | CONFIG_FONT_8x16=y | ||
| 1316 | # CONFIG_FONT_6x11 is not set | ||
| 1317 | # CONFIG_FONT_7x14 is not set | ||
| 1318 | # CONFIG_FONT_PEARL_8x8 is not set | ||
| 1319 | # CONFIG_FONT_ACORN_8x8 is not set | ||
| 1320 | # CONFIG_FONT_MINI_4x6 is not set | ||
| 1321 | # CONFIG_FONT_SUN8x16 is not set | ||
| 1322 | # CONFIG_FONT_SUN12x22 is not set | ||
| 1323 | # CONFIG_FONT_10x18 is not set | ||
| 1324 | CONFIG_LOGO=y | ||
| 1325 | CONFIG_LOGO_LINUX_MONO=y | ||
| 1326 | CONFIG_LOGO_LINUX_VGA16=y | ||
| 1327 | CONFIG_LOGO_LINUX_CLUT224=y | ||
| 1328 | CONFIG_SOUND=y | ||
| 1329 | CONFIG_SOUND_OSS_CORE=y | ||
| 1330 | CONFIG_SOUND_OSS_CORE_PRECLAIM=y | ||
| 1331 | CONFIG_SND=y | ||
| 1332 | CONFIG_SND_TIMER=y | ||
| 1333 | CONFIG_SND_PCM=y | ||
| 1334 | CONFIG_SND_HWDEP=y | ||
| 1335 | CONFIG_SND_RAWMIDI=y | ||
| 1336 | CONFIG_SND_JACK=y | ||
| 1337 | # CONFIG_SND_SEQUENCER is not set | ||
| 1338 | CONFIG_SND_OSSEMUL=y | ||
| 1339 | CONFIG_SND_MIXER_OSS=y | ||
| 1340 | CONFIG_SND_PCM_OSS=y | ||
| 1341 | CONFIG_SND_PCM_OSS_PLUGINS=y | ||
| 1342 | # CONFIG_SND_HRTIMER is not set | ||
| 1343 | # CONFIG_SND_DYNAMIC_MINORS is not set | ||
| 1344 | CONFIG_SND_SUPPORT_OLD_API=y | ||
| 1345 | CONFIG_SND_VERBOSE_PROCFS=y | ||
| 1346 | CONFIG_SND_VERBOSE_PRINTK=y | ||
| 1347 | CONFIG_SND_DEBUG=y | ||
| 1348 | # CONFIG_SND_DEBUG_VERBOSE is not set | ||
| 1349 | # CONFIG_SND_PCM_XRUN_DEBUG is not set | ||
| 1350 | # CONFIG_SND_RAWMIDI_SEQ is not set | ||
| 1351 | # CONFIG_SND_OPL3_LIB_SEQ is not set | ||
| 1352 | # CONFIG_SND_OPL4_LIB_SEQ is not set | ||
| 1353 | # CONFIG_SND_SBAWE_SEQ is not set | ||
| 1354 | # CONFIG_SND_EMU10K1_SEQ is not set | ||
| 1355 | CONFIG_SND_DRIVERS=y | ||
| 1356 | # CONFIG_SND_DUMMY is not set | ||
| 1357 | # CONFIG_SND_MTPAV is not set | ||
| 1358 | # CONFIG_SND_SERIAL_U16550 is not set | ||
| 1359 | # CONFIG_SND_MPU401 is not set | ||
| 1360 | CONFIG_SND_ARM=y | ||
| 1361 | CONFIG_SND_SPI=y | ||
| 1362 | CONFIG_SND_USB=y | ||
| 1363 | CONFIG_SND_USB_AUDIO=y | ||
| 1364 | # CONFIG_SND_USB_CAIAQ is not set | ||
| 1365 | CONFIG_SND_SOC=y | ||
| 1366 | CONFIG_SND_OMAP_SOC=y | ||
| 1367 | CONFIG_SND_OMAP_SOC_MCBSP=y | ||
| 1368 | # CONFIG_SND_OMAP_SOC_OVERO is not set | ||
| 1369 | # CONFIG_SND_OMAP_SOC_OMAP3EVM is not set | ||
| 1370 | # CONFIG_SND_OMAP_SOC_SDP3430 is not set | ||
| 1371 | CONFIG_SND_OMAP_SOC_OMAP3_PANDORA=y | ||
| 1372 | # CONFIG_SND_OMAP_SOC_OMAP3_BEAGLE is not set | ||
| 1373 | # CONFIG_SND_OMAP_SOC_ZOOM2 is not set | ||
| 1374 | CONFIG_SND_SOC_I2C_AND_SPI=y | ||
| 1375 | # CONFIG_SND_SOC_ALL_CODECS is not set | ||
| 1376 | CONFIG_SND_SOC_TWL4030=y | ||
| 1377 | # CONFIG_SOUND_PRIME is not set | ||
| 1378 | CONFIG_HID_SUPPORT=y | ||
| 1379 | CONFIG_HID=y | ||
| 1380 | # CONFIG_HIDRAW is not set | ||
| 1381 | |||
| 1382 | # | ||
| 1383 | # USB Input Devices | ||
| 1384 | # | ||
| 1385 | CONFIG_USB_HID=y | ||
| 1386 | # CONFIG_HID_PID is not set | ||
| 1387 | # CONFIG_USB_HIDDEV is not set | ||
| 1388 | |||
| 1389 | # | ||
| 1390 | # Special HID drivers | ||
| 1391 | # | ||
| 1392 | # CONFIG_HID_A4TECH is not set | ||
| 1393 | # CONFIG_HID_APPLE is not set | ||
| 1394 | # CONFIG_HID_BELKIN is not set | ||
| 1395 | # CONFIG_HID_CHERRY is not set | ||
| 1396 | # CONFIG_HID_CHICONY is not set | ||
| 1397 | # CONFIG_HID_CYPRESS is not set | ||
| 1398 | # CONFIG_HID_DRAGONRISE is not set | ||
| 1399 | # CONFIG_HID_EZKEY is not set | ||
| 1400 | # CONFIG_HID_KYE is not set | ||
| 1401 | # CONFIG_HID_GYRATION is not set | ||
| 1402 | # CONFIG_HID_TWINHAN is not set | ||
| 1403 | # CONFIG_HID_KENSINGTON is not set | ||
| 1404 | # CONFIG_HID_LOGITECH is not set | ||
| 1405 | # CONFIG_HID_MICROSOFT is not set | ||
| 1406 | # CONFIG_HID_MONTEREY is not set | ||
| 1407 | # CONFIG_HID_NTRIG is not set | ||
| 1408 | # CONFIG_HID_PANTHERLORD is not set | ||
| 1409 | # CONFIG_HID_PETALYNX is not set | ||
| 1410 | # CONFIG_HID_SAMSUNG is not set | ||
| 1411 | # CONFIG_HID_SONY is not set | ||
| 1412 | # CONFIG_HID_SUNPLUS is not set | ||
| 1413 | # CONFIG_HID_GREENASIA is not set | ||
| 1414 | # CONFIG_HID_SMARTJOYPLUS is not set | ||
| 1415 | # CONFIG_HID_TOPSEED is not set | ||
| 1416 | # CONFIG_HID_THRUSTMASTER is not set | ||
| 1417 | # CONFIG_HID_WACOM is not set | ||
| 1418 | # CONFIG_HID_ZEROPLUS is not set | ||
| 1419 | CONFIG_USB_SUPPORT=y | ||
| 1420 | CONFIG_USB_ARCH_HAS_HCD=y | ||
| 1421 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
| 1422 | # CONFIG_USB_ARCH_HAS_EHCI is not set | ||
| 1423 | CONFIG_USB=y | ||
| 1424 | CONFIG_USB_DEBUG=y | ||
| 1425 | CONFIG_USB_ANNOUNCE_NEW_DEVICES=y | ||
| 1426 | |||
| 1427 | # | ||
| 1428 | # Miscellaneous USB options | ||
| 1429 | # | ||
| 1430 | CONFIG_USB_DEVICEFS=y | ||
| 1431 | CONFIG_USB_DEVICE_CLASS=y | ||
| 1432 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
| 1433 | CONFIG_USB_SUSPEND=y | ||
| 1434 | CONFIG_USB_OTG=y | ||
| 1435 | # CONFIG_USB_OTG_WHITELIST is not set | ||
| 1436 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
| 1437 | CONFIG_USB_MON=y | ||
| 1438 | # CONFIG_USB_WUSB is not set | ||
| 1439 | # CONFIG_USB_WUSB_CBAF is not set | ||
| 1440 | |||
| 1441 | # | ||
| 1442 | # USB Host Controller Drivers | ||
| 1443 | # | ||
| 1444 | # CONFIG_USB_C67X00_HCD is not set | ||
| 1445 | # CONFIG_USB_OXU210HP_HCD is not set | ||
| 1446 | # CONFIG_USB_ISP116X_HCD is not set | ||
| 1447 | # CONFIG_USB_ISP1760_HCD is not set | ||
| 1448 | # CONFIG_USB_ISP1362_HCD is not set | ||
| 1449 | # CONFIG_USB_OHCI_HCD is not set | ||
| 1450 | # CONFIG_USB_SL811_HCD is not set | ||
| 1451 | # CONFIG_USB_R8A66597_HCD is not set | ||
| 1452 | # CONFIG_USB_HWA_HCD is not set | ||
| 1453 | CONFIG_USB_MUSB_HDRC=y | ||
| 1454 | CONFIG_USB_MUSB_SOC=y | ||
| 1455 | |||
| 1456 | # | ||
| 1457 | # OMAP 343x high speed USB support | ||
| 1458 | # | ||
| 1459 | # CONFIG_USB_MUSB_HOST is not set | ||
| 1460 | # CONFIG_USB_MUSB_PERIPHERAL is not set | ||
| 1461 | CONFIG_USB_MUSB_OTG=y | ||
| 1462 | CONFIG_USB_GADGET_MUSB_HDRC=y | ||
| 1463 | CONFIG_USB_MUSB_HDRC_HCD=y | ||
| 1464 | # CONFIG_MUSB_PIO_ONLY is not set | ||
| 1465 | CONFIG_USB_INVENTRA_DMA=y | ||
| 1466 | # CONFIG_USB_TI_CPPI_DMA is not set | ||
| 1467 | CONFIG_USB_MUSB_DEBUG=y | ||
| 1468 | |||
| 1469 | # | ||
| 1470 | # USB Device Class drivers | ||
| 1471 | # | ||
| 1472 | # CONFIG_USB_ACM is not set | ||
| 1473 | # CONFIG_USB_PRINTER is not set | ||
| 1474 | CONFIG_USB_WDM=y | ||
| 1475 | # CONFIG_USB_TMC is not set | ||
| 1476 | |||
| 1477 | # | ||
| 1478 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | ||
| 1479 | # | ||
| 1480 | |||
| 1481 | # | ||
| 1482 | # also be needed; see USB_STORAGE Help for more info | ||
| 1483 | # | ||
| 1484 | CONFIG_USB_STORAGE=y | ||
| 1485 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
| 1486 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
| 1487 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
| 1488 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
| 1489 | # CONFIG_USB_STORAGE_USBAT is not set | ||
| 1490 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
| 1491 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
| 1492 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
| 1493 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
| 1494 | # CONFIG_USB_STORAGE_ONETOUCH is not set | ||
| 1495 | # CONFIG_USB_STORAGE_KARMA is not set | ||
| 1496 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
| 1497 | CONFIG_USB_LIBUSUAL=y | ||
| 1498 | |||
| 1499 | # | ||
| 1500 | # USB Imaging devices | ||
| 1501 | # | ||
| 1502 | # CONFIG_USB_MDC800 is not set | ||
| 1503 | # CONFIG_USB_MICROTEK is not set | ||
| 1504 | |||
| 1505 | # | ||
| 1506 | # USB port drivers | ||
| 1507 | # | ||
| 1508 | # CONFIG_USB_SERIAL is not set | ||
| 1509 | |||
| 1510 | # | ||
| 1511 | # USB Miscellaneous drivers | ||
| 1512 | # | ||
| 1513 | # CONFIG_USB_EMI62 is not set | ||
| 1514 | # CONFIG_USB_EMI26 is not set | ||
| 1515 | # CONFIG_USB_ADUTUX is not set | ||
| 1516 | # CONFIG_USB_SEVSEG is not set | ||
| 1517 | # CONFIG_USB_RIO500 is not set | ||
| 1518 | # CONFIG_USB_LEGOTOWER is not set | ||
| 1519 | # CONFIG_USB_LCD is not set | ||
| 1520 | # CONFIG_USB_BERRY_CHARGE is not set | ||
| 1521 | # CONFIG_USB_LED is not set | ||
| 1522 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
| 1523 | # CONFIG_USB_CYTHERM is not set | ||
| 1524 | # CONFIG_USB_IDMOUSE is not set | ||
| 1525 | # CONFIG_USB_FTDI_ELAN is not set | ||
| 1526 | # CONFIG_USB_APPLEDISPLAY is not set | ||
| 1527 | # CONFIG_USB_SISUSBVGA is not set | ||
| 1528 | # CONFIG_USB_LD is not set | ||
| 1529 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
| 1530 | # CONFIG_USB_IOWARRIOR is not set | ||
| 1531 | CONFIG_USB_TEST=y | ||
| 1532 | # CONFIG_USB_ISIGHTFW is not set | ||
| 1533 | # CONFIG_USB_VST is not set | ||
| 1534 | CONFIG_USB_GADGET=y | ||
| 1535 | CONFIG_USB_GADGET_DEBUG=y | ||
| 1536 | CONFIG_USB_GADGET_DEBUG_FILES=y | ||
| 1537 | CONFIG_USB_GADGET_DEBUG_FS=y | ||
| 1538 | CONFIG_USB_GADGET_VBUS_DRAW=2 | ||
| 1539 | CONFIG_USB_GADGET_SELECTED=y | ||
| 1540 | # CONFIG_USB_GADGET_AT91 is not set | ||
| 1541 | # CONFIG_USB_GADGET_ATMEL_USBA is not set | ||
| 1542 | # CONFIG_USB_GADGET_FSL_USB2 is not set | ||
| 1543 | # CONFIG_USB_GADGET_LH7A40X is not set | ||
| 1544 | # CONFIG_USB_GADGET_OMAP is not set | ||
| 1545 | # CONFIG_USB_GADGET_PXA25X is not set | ||
| 1546 | # CONFIG_USB_GADGET_R8A66597 is not set | ||
| 1547 | # CONFIG_USB_GADGET_PXA27X is not set | ||
| 1548 | # CONFIG_USB_GADGET_S3C_HSOTG is not set | ||
| 1549 | # CONFIG_USB_GADGET_IMX is not set | ||
| 1550 | # CONFIG_USB_GADGET_S3C2410 is not set | ||
| 1551 | # CONFIG_USB_GADGET_M66592 is not set | ||
| 1552 | # CONFIG_USB_GADGET_AMD5536UDC is not set | ||
| 1553 | # CONFIG_USB_GADGET_FSL_QE is not set | ||
| 1554 | # CONFIG_USB_GADGET_CI13XXX is not set | ||
| 1555 | # CONFIG_USB_GADGET_NET2280 is not set | ||
| 1556 | # CONFIG_USB_GADGET_GOKU is not set | ||
| 1557 | # CONFIG_USB_GADGET_LANGWELL is not set | ||
| 1558 | # CONFIG_USB_GADGET_DUMMY_HCD is not set | ||
| 1559 | CONFIG_USB_GADGET_DUALSPEED=y | ||
| 1560 | CONFIG_USB_ZERO=y | ||
| 1561 | # CONFIG_USB_ZERO_HNPTEST is not set | ||
| 1562 | # CONFIG_USB_AUDIO is not set | ||
| 1563 | # CONFIG_USB_ETH is not set | ||
| 1564 | # CONFIG_USB_GADGETFS is not set | ||
| 1565 | # CONFIG_USB_FILE_STORAGE is not set | ||
| 1566 | # CONFIG_USB_G_SERIAL is not set | ||
| 1567 | # CONFIG_USB_MIDI_GADGET is not set | ||
| 1568 | # CONFIG_USB_G_PRINTER is not set | ||
| 1569 | # CONFIG_USB_CDC_COMPOSITE is not set | ||
| 1570 | |||
| 1571 | # | ||
| 1572 | # OTG and related infrastructure | ||
| 1573 | # | ||
| 1574 | CONFIG_USB_OTG_UTILS=y | ||
| 1575 | # CONFIG_USB_GPIO_VBUS is not set | ||
| 1576 | # CONFIG_ISP1301_OMAP is not set | ||
| 1577 | CONFIG_TWL4030_USB=y | ||
| 1578 | CONFIG_NOP_USB_XCEIV=y | ||
| 1579 | CONFIG_MMC=y | ||
| 1580 | # CONFIG_MMC_DEBUG is not set | ||
| 1581 | CONFIG_MMC_UNSAFE_RESUME=y | ||
| 1582 | |||
| 1583 | # | ||
| 1584 | # MMC/SD/SDIO Card Drivers | ||
| 1585 | # | ||
| 1586 | CONFIG_MMC_BLOCK=y | ||
| 1587 | CONFIG_MMC_BLOCK_BOUNCE=y | ||
| 1588 | CONFIG_SDIO_UART=y | ||
| 1589 | # CONFIG_MMC_TEST is not set | ||
| 1590 | |||
| 1591 | # | ||
| 1592 | # MMC/SD/SDIO Host Controller Drivers | ||
| 1593 | # | ||
| 1594 | # CONFIG_MMC_SDHCI is not set | ||
| 1595 | # CONFIG_MMC_OMAP is not set | ||
| 1596 | CONFIG_MMC_OMAP_HS=y | ||
| 1597 | # CONFIG_MMC_AT91 is not set | ||
| 1598 | # CONFIG_MMC_ATMELMCI is not set | ||
| 1599 | # CONFIG_MMC_SPI is not set | ||
| 1600 | # CONFIG_MEMSTICK is not set | ||
| 1601 | CONFIG_NEW_LEDS=y | ||
| 1602 | CONFIG_LEDS_CLASS=y | ||
| 1603 | |||
| 1604 | # | ||
| 1605 | # LED drivers | ||
| 1606 | # | ||
| 1607 | # CONFIG_LEDS_PCA9532 is not set | ||
| 1608 | CONFIG_LEDS_GPIO=y | ||
| 1609 | CONFIG_LEDS_GPIO_PLATFORM=y | ||
| 1610 | # CONFIG_LEDS_LP3944 is not set | ||
| 1611 | # CONFIG_LEDS_PCA955X is not set | ||
| 1612 | # CONFIG_LEDS_DAC124S085 is not set | ||
| 1613 | # CONFIG_LEDS_BD2802 is not set | ||
| 1614 | |||
| 1615 | # | ||
| 1616 | # LED Triggers | ||
| 1617 | # | ||
| 1618 | CONFIG_LEDS_TRIGGERS=y | ||
| 1619 | CONFIG_LEDS_TRIGGER_TIMER=y | ||
| 1620 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
| 1621 | # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set | ||
| 1622 | # CONFIG_LEDS_TRIGGER_GPIO is not set | ||
| 1623 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=y | ||
| 1624 | |||
| 1625 | # | ||
| 1626 | # iptables trigger is under Netfilter config (LED target) | ||
| 1627 | # | ||
| 1628 | # CONFIG_ACCESSIBILITY is not set | ||
| 1629 | CONFIG_RTC_LIB=y | ||
| 1630 | CONFIG_RTC_CLASS=y | ||
| 1631 | CONFIG_RTC_HCTOSYS=y | ||
| 1632 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
| 1633 | # CONFIG_RTC_DEBUG is not set | ||
| 1634 | |||
| 1635 | # | ||
| 1636 | # RTC interfaces | ||
| 1637 | # | ||
| 1638 | CONFIG_RTC_INTF_SYSFS=y | ||
| 1639 | CONFIG_RTC_INTF_PROC=y | ||
| 1640 | CONFIG_RTC_INTF_DEV=y | ||
| 1641 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
| 1642 | # CONFIG_RTC_DRV_TEST is not set | ||
| 1643 | |||
| 1644 | # | ||
| 1645 | # I2C RTC drivers | ||
| 1646 | # | ||
| 1647 | # CONFIG_RTC_DRV_DS1307 is not set | ||
| 1648 | # CONFIG_RTC_DRV_DS1374 is not set | ||
| 1649 | # CONFIG_RTC_DRV_DS1672 is not set | ||
| 1650 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
| 1651 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
| 1652 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
| 1653 | # CONFIG_RTC_DRV_X1205 is not set | ||
| 1654 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
| 1655 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
| 1656 | # CONFIG_RTC_DRV_M41T80 is not set | ||
| 1657 | CONFIG_RTC_DRV_TWL4030=y | ||
| 1658 | # CONFIG_RTC_DRV_S35390A is not set | ||
| 1659 | # CONFIG_RTC_DRV_FM3130 is not set | ||
| 1660 | # CONFIG_RTC_DRV_RX8581 is not set | ||
| 1661 | # CONFIG_RTC_DRV_RX8025 is not set | ||
| 1662 | |||
| 1663 | # | ||
| 1664 | # SPI RTC drivers | ||
| 1665 | # | ||
| 1666 | # CONFIG_RTC_DRV_M41T94 is not set | ||
| 1667 | # CONFIG_RTC_DRV_DS1305 is not set | ||
| 1668 | # CONFIG_RTC_DRV_DS1390 is not set | ||
| 1669 | # CONFIG_RTC_DRV_MAX6902 is not set | ||
| 1670 | # CONFIG_RTC_DRV_R9701 is not set | ||
| 1671 | # CONFIG_RTC_DRV_RS5C348 is not set | ||
| 1672 | # CONFIG_RTC_DRV_DS3234 is not set | ||
| 1673 | # CONFIG_RTC_DRV_PCF2123 is not set | ||
| 1674 | |||
| 1675 | # | ||
| 1676 | # Platform RTC drivers | ||
| 1677 | # | ||
| 1678 | # CONFIG_RTC_DRV_CMOS is not set | ||
| 1679 | # CONFIG_RTC_DRV_DS1286 is not set | ||
| 1680 | # CONFIG_RTC_DRV_DS1511 is not set | ||
| 1681 | # CONFIG_RTC_DRV_DS1553 is not set | ||
| 1682 | # CONFIG_RTC_DRV_DS1742 is not set | ||
| 1683 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
| 1684 | # CONFIG_RTC_DRV_M48T86 is not set | ||
| 1685 | # CONFIG_RTC_DRV_M48T35 is not set | ||
| 1686 | # CONFIG_RTC_DRV_M48T59 is not set | ||
| 1687 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
| 1688 | # CONFIG_RTC_DRV_V3020 is not set | ||
| 1689 | |||
| 1690 | # | ||
| 1691 | # on-CPU RTC drivers | ||
| 1692 | # | ||
| 1693 | # CONFIG_DMADEVICES is not set | ||
| 1694 | # CONFIG_AUXDISPLAY is not set | ||
| 1695 | # CONFIG_UIO is not set | ||
| 1696 | |||
| 1697 | # | ||
| 1698 | # TI VLYNQ | ||
| 1699 | # | ||
| 1700 | # CONFIG_STAGING is not set | ||
| 1701 | |||
| 1702 | # | ||
| 1703 | # File systems | ||
| 1704 | # | ||
| 1705 | CONFIG_EXT2_FS=y | ||
| 1706 | # CONFIG_EXT2_FS_XATTR is not set | ||
| 1707 | # CONFIG_EXT2_FS_XIP is not set | ||
| 1708 | CONFIG_EXT3_FS=y | ||
| 1709 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 1710 | # CONFIG_EXT3_FS_XATTR is not set | ||
| 1711 | # CONFIG_EXT4_FS is not set | ||
| 1712 | CONFIG_JBD=y | ||
| 1713 | # CONFIG_JBD_DEBUG is not set | ||
| 1714 | # CONFIG_REISERFS_FS is not set | ||
| 1715 | # CONFIG_JFS_FS is not set | ||
| 1716 | CONFIG_FS_POSIX_ACL=y | ||
| 1717 | # CONFIG_XFS_FS is not set | ||
| 1718 | # CONFIG_GFS2_FS is not set | ||
| 1719 | # CONFIG_OCFS2_FS is not set | ||
| 1720 | # CONFIG_BTRFS_FS is not set | ||
| 1721 | # CONFIG_NILFS2_FS is not set | ||
| 1722 | CONFIG_FILE_LOCKING=y | ||
| 1723 | CONFIG_FSNOTIFY=y | ||
| 1724 | CONFIG_DNOTIFY=y | ||
| 1725 | CONFIG_INOTIFY=y | ||
| 1726 | CONFIG_INOTIFY_USER=y | ||
| 1727 | CONFIG_QUOTA=y | ||
| 1728 | # CONFIG_QUOTA_NETLINK_INTERFACE is not set | ||
| 1729 | CONFIG_PRINT_QUOTA_WARNING=y | ||
| 1730 | CONFIG_QUOTA_TREE=y | ||
| 1731 | # CONFIG_QFMT_V1 is not set | ||
| 1732 | CONFIG_QFMT_V2=y | ||
| 1733 | CONFIG_QUOTACTL=y | ||
| 1734 | # CONFIG_AUTOFS_FS is not set | ||
| 1735 | # CONFIG_AUTOFS4_FS is not set | ||
| 1736 | # CONFIG_FUSE_FS is not set | ||
| 1737 | |||
| 1738 | # | ||
| 1739 | # Caches | ||
| 1740 | # | ||
| 1741 | # CONFIG_FSCACHE is not set | ||
| 1742 | |||
| 1743 | # | ||
| 1744 | # CD-ROM/DVD Filesystems | ||
| 1745 | # | ||
| 1746 | # CONFIG_ISO9660_FS is not set | ||
| 1747 | # CONFIG_UDF_FS is not set | ||
| 1748 | |||
| 1749 | # | ||
| 1750 | # DOS/FAT/NT Filesystems | ||
| 1751 | # | ||
| 1752 | CONFIG_FAT_FS=y | ||
| 1753 | CONFIG_MSDOS_FS=y | ||
| 1754 | CONFIG_VFAT_FS=y | ||
| 1755 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
| 1756 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
| 1757 | # CONFIG_NTFS_FS is not set | ||
| 1758 | |||
| 1759 | # | ||
| 1760 | # Pseudo filesystems | ||
| 1761 | # | ||
| 1762 | CONFIG_PROC_FS=y | ||
| 1763 | CONFIG_PROC_SYSCTL=y | ||
| 1764 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 1765 | CONFIG_SYSFS=y | ||
| 1766 | CONFIG_TMPFS=y | ||
| 1767 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
| 1768 | # CONFIG_HUGETLB_PAGE is not set | ||
| 1769 | # CONFIG_CONFIGFS_FS is not set | ||
| 1770 | CONFIG_MISC_FILESYSTEMS=y | ||
| 1771 | # CONFIG_ADFS_FS is not set | ||
| 1772 | # CONFIG_AFFS_FS is not set | ||
| 1773 | # CONFIG_HFS_FS is not set | ||
| 1774 | # CONFIG_HFSPLUS_FS is not set | ||
| 1775 | # CONFIG_BEFS_FS is not set | ||
| 1776 | # CONFIG_BFS_FS is not set | ||
| 1777 | # CONFIG_EFS_FS is not set | ||
| 1778 | CONFIG_JFFS2_FS=y | ||
| 1779 | CONFIG_JFFS2_FS_DEBUG=0 | ||
| 1780 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
| 1781 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
| 1782 | CONFIG_JFFS2_SUMMARY=y | ||
| 1783 | CONFIG_JFFS2_FS_XATTR=y | ||
| 1784 | CONFIG_JFFS2_FS_POSIX_ACL=y | ||
| 1785 | CONFIG_JFFS2_FS_SECURITY=y | ||
| 1786 | CONFIG_JFFS2_COMPRESSION_OPTIONS=y | ||
| 1787 | CONFIG_JFFS2_ZLIB=y | ||
| 1788 | CONFIG_JFFS2_LZO=y | ||
| 1789 | CONFIG_JFFS2_RTIME=y | ||
| 1790 | CONFIG_JFFS2_RUBIN=y | ||
| 1791 | # CONFIG_JFFS2_CMODE_NONE is not set | ||
| 1792 | CONFIG_JFFS2_CMODE_PRIORITY=y | ||
| 1793 | # CONFIG_JFFS2_CMODE_SIZE is not set | ||
| 1794 | # CONFIG_JFFS2_CMODE_FAVOURLZO is not set | ||
| 1795 | CONFIG_UBIFS_FS=y | ||
| 1796 | # CONFIG_UBIFS_FS_XATTR is not set | ||
| 1797 | # CONFIG_UBIFS_FS_ADVANCED_COMPR is not set | ||
| 1798 | CONFIG_UBIFS_FS_LZO=y | ||
| 1799 | CONFIG_UBIFS_FS_ZLIB=y | ||
| 1800 | # CONFIG_UBIFS_FS_DEBUG is not set | ||
| 1801 | CONFIG_CRAMFS=y | ||
| 1802 | # CONFIG_SQUASHFS is not set | ||
| 1803 | # CONFIG_VXFS_FS is not set | ||
| 1804 | # CONFIG_MINIX_FS is not set | ||
| 1805 | # CONFIG_OMFS_FS is not set | ||
| 1806 | # CONFIG_HPFS_FS is not set | ||
| 1807 | # CONFIG_QNX4FS_FS is not set | ||
| 1808 | # CONFIG_ROMFS_FS is not set | ||
| 1809 | # CONFIG_SYSV_FS is not set | ||
| 1810 | # CONFIG_UFS_FS is not set | ||
| 1811 | CONFIG_NETWORK_FILESYSTEMS=y | ||
| 1812 | CONFIG_NFS_FS=y | ||
| 1813 | CONFIG_NFS_V3=y | ||
| 1814 | CONFIG_NFS_V3_ACL=y | ||
| 1815 | CONFIG_NFS_V4=y | ||
| 1816 | # CONFIG_NFS_V4_1 is not set | ||
| 1817 | CONFIG_ROOT_NFS=y | ||
| 1818 | # CONFIG_NFSD is not set | ||
| 1819 | CONFIG_LOCKD=y | ||
| 1820 | CONFIG_LOCKD_V4=y | ||
| 1821 | CONFIG_NFS_ACL_SUPPORT=y | ||
| 1822 | CONFIG_NFS_COMMON=y | ||
| 1823 | CONFIG_SUNRPC=y | ||
| 1824 | CONFIG_SUNRPC_GSS=y | ||
| 1825 | CONFIG_RPCSEC_GSS_KRB5=y | ||
| 1826 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
| 1827 | # CONFIG_SMB_FS is not set | ||
| 1828 | # CONFIG_CIFS is not set | ||
| 1829 | # CONFIG_NCP_FS is not set | ||
| 1830 | # CONFIG_CODA_FS is not set | ||
| 1831 | # CONFIG_AFS_FS is not set | ||
| 1832 | |||
| 1833 | # | ||
| 1834 | # Partition Types | ||
| 1835 | # | ||
| 1836 | CONFIG_PARTITION_ADVANCED=y | ||
| 1837 | # CONFIG_ACORN_PARTITION is not set | ||
| 1838 | # CONFIG_OSF_PARTITION is not set | ||
| 1839 | # CONFIG_AMIGA_PARTITION is not set | ||
| 1840 | # CONFIG_ATARI_PARTITION is not set | ||
| 1841 | # CONFIG_MAC_PARTITION is not set | ||
| 1842 | CONFIG_MSDOS_PARTITION=y | ||
| 1843 | # CONFIG_BSD_DISKLABEL is not set | ||
| 1844 | # CONFIG_MINIX_SUBPARTITION is not set | ||
| 1845 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
| 1846 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
| 1847 | # CONFIG_LDM_PARTITION is not set | ||
| 1848 | # CONFIG_SGI_PARTITION is not set | ||
| 1849 | # CONFIG_ULTRIX_PARTITION is not set | ||
| 1850 | # CONFIG_SUN_PARTITION is not set | ||
| 1851 | # CONFIG_KARMA_PARTITION is not set | ||
| 1852 | # CONFIG_EFI_PARTITION is not set | ||
| 1853 | # CONFIG_SYSV68_PARTITION is not set | ||
| 1854 | CONFIG_NLS=y | ||
| 1855 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
| 1856 | CONFIG_NLS_CODEPAGE_437=y | ||
| 1857 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
| 1858 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
| 1859 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
| 1860 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
| 1861 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
| 1862 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
| 1863 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
| 1864 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
| 1865 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
| 1866 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
| 1867 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
| 1868 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
| 1869 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
| 1870 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
| 1871 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
| 1872 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
| 1873 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
| 1874 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
| 1875 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
| 1876 | # CONFIG_NLS_ISO8859_8 is not set | ||
| 1877 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
| 1878 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
| 1879 | # CONFIG_NLS_ASCII is not set | ||
| 1880 | CONFIG_NLS_ISO8859_1=y | ||
| 1881 | # CONFIG_NLS_ISO8859_2 is not set | ||
| 1882 | # CONFIG_NLS_ISO8859_3 is not set | ||
| 1883 | # CONFIG_NLS_ISO8859_4 is not set | ||
| 1884 | # CONFIG_NLS_ISO8859_5 is not set | ||
| 1885 | # CONFIG_NLS_ISO8859_6 is not set | ||
| 1886 | # CONFIG_NLS_ISO8859_7 is not set | ||
| 1887 | # CONFIG_NLS_ISO8859_9 is not set | ||
| 1888 | # CONFIG_NLS_ISO8859_13 is not set | ||
| 1889 | # CONFIG_NLS_ISO8859_14 is not set | ||
| 1890 | # CONFIG_NLS_ISO8859_15 is not set | ||
| 1891 | # CONFIG_NLS_KOI8_R is not set | ||
| 1892 | # CONFIG_NLS_KOI8_U is not set | ||
| 1893 | # CONFIG_NLS_UTF8 is not set | ||
| 1894 | # CONFIG_DLM is not set | ||
| 1895 | |||
| 1896 | # | ||
| 1897 | # Kernel hacking | ||
| 1898 | # | ||
| 1899 | CONFIG_PRINTK_TIME=y | ||
| 1900 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 1901 | CONFIG_ENABLE_MUST_CHECK=y | ||
| 1902 | CONFIG_FRAME_WARN=1024 | ||
| 1903 | CONFIG_MAGIC_SYSRQ=y | ||
| 1904 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 1905 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 1906 | CONFIG_DEBUG_FS=y | ||
| 1907 | # CONFIG_HEADERS_CHECK is not set | ||
| 1908 | CONFIG_DEBUG_KERNEL=y | ||
| 1909 | # CONFIG_DEBUG_SHIRQ is not set | ||
| 1910 | CONFIG_DETECT_SOFTLOCKUP=y | ||
| 1911 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | ||
| 1912 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | ||
| 1913 | CONFIG_DETECT_HUNG_TASK=y | ||
| 1914 | # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set | ||
| 1915 | CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 | ||
| 1916 | CONFIG_SCHED_DEBUG=y | ||
| 1917 | CONFIG_SCHEDSTATS=y | ||
| 1918 | CONFIG_TIMER_STATS=y | ||
| 1919 | # CONFIG_DEBUG_OBJECTS is not set | ||
| 1920 | # CONFIG_DEBUG_SLAB is not set | ||
| 1921 | # CONFIG_DEBUG_KMEMLEAK is not set | ||
| 1922 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
| 1923 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 1924 | CONFIG_DEBUG_SPINLOCK=y | ||
| 1925 | CONFIG_DEBUG_MUTEXES=y | ||
| 1926 | CONFIG_DEBUG_LOCK_ALLOC=y | ||
| 1927 | CONFIG_PROVE_LOCKING=y | ||
| 1928 | CONFIG_LOCKDEP=y | ||
| 1929 | CONFIG_LOCK_STAT=y | ||
| 1930 | # CONFIG_DEBUG_LOCKDEP is not set | ||
| 1931 | CONFIG_TRACE_IRQFLAGS=y | ||
| 1932 | CONFIG_DEBUG_SPINLOCK_SLEEP=y | ||
| 1933 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
| 1934 | CONFIG_STACKTRACE=y | ||
| 1935 | # CONFIG_DEBUG_KOBJECT is not set | ||
| 1936 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
| 1937 | CONFIG_DEBUG_INFO=y | ||
| 1938 | # CONFIG_DEBUG_VM is not set | ||
| 1939 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
| 1940 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
| 1941 | # CONFIG_DEBUG_LIST is not set | ||
| 1942 | # CONFIG_DEBUG_SG is not set | ||
| 1943 | # CONFIG_DEBUG_NOTIFIERS is not set | ||
| 1944 | # CONFIG_DEBUG_CREDENTIALS is not set | ||
| 1945 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
| 1946 | # CONFIG_RCU_TORTURE_TEST is not set | ||
| 1947 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 1948 | # CONFIG_KPROBES_SANITY_TEST is not set | ||
| 1949 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
| 1950 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
| 1951 | # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set | ||
| 1952 | # CONFIG_LKDTM is not set | ||
| 1953 | # CONFIG_FAULT_INJECTION is not set | ||
| 1954 | # CONFIG_LATENCYTOP is not set | ||
| 1955 | # CONFIG_PAGE_POISONING is not set | ||
| 1956 | CONFIG_NOP_TRACER=y | ||
| 1957 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 1958 | CONFIG_RING_BUFFER=y | ||
| 1959 | CONFIG_EVENT_TRACING=y | ||
| 1960 | CONFIG_CONTEXT_SWITCH_TRACER=y | ||
| 1961 | CONFIG_RING_BUFFER_ALLOW_SWAP=y | ||
| 1962 | CONFIG_TRACING=y | ||
| 1963 | CONFIG_TRACING_SUPPORT=y | ||
| 1964 | CONFIG_FTRACE=y | ||
| 1965 | # CONFIG_FUNCTION_TRACER is not set | ||
| 1966 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 1967 | # CONFIG_SCHED_TRACER is not set | ||
| 1968 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set | ||
| 1969 | # CONFIG_BOOT_TRACER is not set | ||
| 1970 | CONFIG_BRANCH_PROFILE_NONE=y | ||
| 1971 | # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set | ||
| 1972 | # CONFIG_PROFILE_ALL_BRANCHES is not set | ||
| 1973 | # CONFIG_STACK_TRACER is not set | ||
| 1974 | # CONFIG_KMEMTRACE is not set | ||
| 1975 | # CONFIG_WORKQUEUE_TRACER is not set | ||
| 1976 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 1977 | # CONFIG_RING_BUFFER_BENCHMARK is not set | ||
| 1978 | # CONFIG_DYNAMIC_DEBUG is not set | ||
| 1979 | # CONFIG_SAMPLES is not set | ||
| 1980 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 1981 | # CONFIG_KGDB is not set | ||
| 1982 | CONFIG_ARM_UNWIND=y | ||
| 1983 | # CONFIG_DEBUG_USER is not set | ||
| 1984 | # CONFIG_DEBUG_ERRORS is not set | ||
| 1985 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
| 1986 | CONFIG_DEBUG_LL=y | ||
| 1987 | # CONFIG_DEBUG_ICEDCC is not set | ||
| 1988 | |||
| 1989 | # | ||
| 1990 | # Security options | ||
| 1991 | # | ||
| 1992 | # CONFIG_KEYS is not set | ||
| 1993 | CONFIG_SECURITY=y | ||
| 1994 | # CONFIG_SECURITYFS is not set | ||
| 1995 | # CONFIG_SECURITY_NETWORK is not set | ||
| 1996 | # CONFIG_SECURITY_PATH is not set | ||
| 1997 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
| 1998 | # CONFIG_SECURITY_ROOTPLUG is not set | ||
| 1999 | # CONFIG_SECURITY_TOMOYO is not set | ||
| 2000 | CONFIG_CRYPTO=y | ||
| 2001 | |||
| 2002 | # | ||
| 2003 | # Crypto core or helper | ||
| 2004 | # | ||
| 2005 | CONFIG_CRYPTO_ALGAPI=y | ||
| 2006 | CONFIG_CRYPTO_ALGAPI2=y | ||
| 2007 | CONFIG_CRYPTO_AEAD2=y | ||
| 2008 | CONFIG_CRYPTO_BLKCIPHER=y | ||
| 2009 | CONFIG_CRYPTO_BLKCIPHER2=y | ||
| 2010 | CONFIG_CRYPTO_HASH=y | ||
| 2011 | CONFIG_CRYPTO_HASH2=y | ||
| 2012 | CONFIG_CRYPTO_RNG2=y | ||
| 2013 | CONFIG_CRYPTO_PCOMP=y | ||
| 2014 | CONFIG_CRYPTO_MANAGER=y | ||
| 2015 | CONFIG_CRYPTO_MANAGER2=y | ||
| 2016 | # CONFIG_CRYPTO_GF128MUL is not set | ||
| 2017 | # CONFIG_CRYPTO_NULL is not set | ||
| 2018 | CONFIG_CRYPTO_WORKQUEUE=y | ||
| 2019 | # CONFIG_CRYPTO_CRYPTD is not set | ||
| 2020 | # CONFIG_CRYPTO_AUTHENC is not set | ||
| 2021 | # CONFIG_CRYPTO_TEST is not set | ||
| 2022 | |||
| 2023 | # | ||
| 2024 | # Authenticated Encryption with Associated Data | ||
| 2025 | # | ||
| 2026 | # CONFIG_CRYPTO_CCM is not set | ||
| 2027 | # CONFIG_CRYPTO_GCM is not set | ||
| 2028 | # CONFIG_CRYPTO_SEQIV is not set | ||
| 2029 | |||
| 2030 | # | ||
| 2031 | # Block modes | ||
| 2032 | # | ||
| 2033 | CONFIG_CRYPTO_CBC=y | ||
| 2034 | # CONFIG_CRYPTO_CTR is not set | ||
| 2035 | # CONFIG_CRYPTO_CTS is not set | ||
| 2036 | CONFIG_CRYPTO_ECB=y | ||
| 2037 | # CONFIG_CRYPTO_LRW is not set | ||
| 2038 | # CONFIG_CRYPTO_PCBC is not set | ||
| 2039 | # CONFIG_CRYPTO_XTS is not set | ||
| 2040 | |||
| 2041 | # | ||
| 2042 | # Hash modes | ||
| 2043 | # | ||
| 2044 | # CONFIG_CRYPTO_HMAC is not set | ||
| 2045 | # CONFIG_CRYPTO_XCBC is not set | ||
| 2046 | # CONFIG_CRYPTO_VMAC is not set | ||
| 2047 | |||
| 2048 | # | ||
| 2049 | # Digest | ||
| 2050 | # | ||
| 2051 | CONFIG_CRYPTO_CRC32C=y | ||
| 2052 | # CONFIG_CRYPTO_GHASH is not set | ||
| 2053 | # CONFIG_CRYPTO_MD4 is not set | ||
| 2054 | CONFIG_CRYPTO_MD5=y | ||
| 2055 | CONFIG_CRYPTO_MICHAEL_MIC=y | ||
| 2056 | # CONFIG_CRYPTO_RMD128 is not set | ||
| 2057 | # CONFIG_CRYPTO_RMD160 is not set | ||
| 2058 | # CONFIG_CRYPTO_RMD256 is not set | ||
| 2059 | # CONFIG_CRYPTO_RMD320 is not set | ||
| 2060 | # CONFIG_CRYPTO_SHA1 is not set | ||
| 2061 | # CONFIG_CRYPTO_SHA256 is not set | ||
| 2062 | # CONFIG_CRYPTO_SHA512 is not set | ||
| 2063 | # CONFIG_CRYPTO_TGR192 is not set | ||
| 2064 | # CONFIG_CRYPTO_WP512 is not set | ||
| 2065 | |||
| 2066 | # | ||
| 2067 | # Ciphers | ||
| 2068 | # | ||
| 2069 | CONFIG_CRYPTO_AES=y | ||
| 2070 | # CONFIG_CRYPTO_ANUBIS is not set | ||
| 2071 | CONFIG_CRYPTO_ARC4=y | ||
| 2072 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
| 2073 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
| 2074 | # CONFIG_CRYPTO_CAST5 is not set | ||
| 2075 | # CONFIG_CRYPTO_CAST6 is not set | ||
| 2076 | CONFIG_CRYPTO_DES=y | ||
| 2077 | # CONFIG_CRYPTO_FCRYPT is not set | ||
| 2078 | # CONFIG_CRYPTO_KHAZAD is not set | ||
| 2079 | # CONFIG_CRYPTO_SALSA20 is not set | ||
| 2080 | # CONFIG_CRYPTO_SEED is not set | ||
| 2081 | # CONFIG_CRYPTO_SERPENT is not set | ||
| 2082 | # CONFIG_CRYPTO_TEA is not set | ||
| 2083 | # CONFIG_CRYPTO_TWOFISH is not set | ||
| 2084 | |||
| 2085 | # | ||
| 2086 | # Compression | ||
| 2087 | # | ||
| 2088 | CONFIG_CRYPTO_DEFLATE=y | ||
| 2089 | # CONFIG_CRYPTO_ZLIB is not set | ||
| 2090 | CONFIG_CRYPTO_LZO=y | ||
| 2091 | |||
| 2092 | # | ||
| 2093 | # Random Number Generation | ||
| 2094 | # | ||
| 2095 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
| 2096 | CONFIG_CRYPTO_HW=y | ||
| 2097 | CONFIG_BINARY_PRINTF=y | ||
| 2098 | |||
| 2099 | # | ||
| 2100 | # Library routines | ||
| 2101 | # | ||
| 2102 | CONFIG_BITREVERSE=y | ||
| 2103 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
| 2104 | CONFIG_CRC_CCITT=y | ||
| 2105 | CONFIG_CRC16=y | ||
| 2106 | CONFIG_CRC_T10DIF=y | ||
| 2107 | CONFIG_CRC_ITU_T=y | ||
| 2108 | CONFIG_CRC32=y | ||
| 2109 | CONFIG_CRC7=y | ||
| 2110 | CONFIG_LIBCRC32C=y | ||
| 2111 | CONFIG_ZLIB_INFLATE=y | ||
| 2112 | CONFIG_ZLIB_DEFLATE=y | ||
| 2113 | CONFIG_LZO_COMPRESS=y | ||
| 2114 | CONFIG_LZO_DECOMPRESS=y | ||
| 2115 | CONFIG_DECOMPRESS_GZIP=y | ||
| 2116 | CONFIG_HAS_IOMEM=y | ||
| 2117 | CONFIG_HAS_IOPORT=y | ||
| 2118 | CONFIG_HAS_DMA=y | ||
| 2119 | CONFIG_NLATTR=y | ||
diff --git a/arch/arm/configs/omap3_evm_defconfig b/arch/arm/configs/omap3_evm_defconfig index d5ff4776cd0..e190fc8b9a7 100644 --- a/arch/arm/configs/omap3_evm_defconfig +++ b/arch/arm/configs/omap3_evm_defconfig | |||
| @@ -59,8 +59,8 @@ CONFIG_FAIR_GROUP_SCHED=y | |||
| 59 | CONFIG_USER_SCHED=y | 59 | CONFIG_USER_SCHED=y |
| 60 | # CONFIG_CGROUP_SCHED is not set | 60 | # CONFIG_CGROUP_SCHED is not set |
| 61 | # CONFIG_CGROUPS is not set | 61 | # CONFIG_CGROUPS is not set |
| 62 | CONFIG_SYSFS_DEPRECATED=y | 62 | # CONFIG_SYSFS_DEPRECATED=y is not set |
| 63 | CONFIG_SYSFS_DEPRECATED_V2=y | 63 | # CONFIG_SYSFS_DEPRECATED_V2=y is not set |
| 64 | # CONFIG_RELAY is not set | 64 | # CONFIG_RELAY is not set |
| 65 | # CONFIG_NAMESPACES is not set | 65 | # CONFIG_NAMESPACES is not set |
| 66 | CONFIG_BLK_DEV_INITRD=y | 66 | CONFIG_BLK_DEV_INITRD=y |
| @@ -617,8 +617,8 @@ CONFIG_MII=y | |||
| 617 | # CONFIG_DM9000 is not set | 617 | # CONFIG_DM9000 is not set |
| 618 | # CONFIG_ENC28J60 is not set | 618 | # CONFIG_ENC28J60 is not set |
| 619 | # CONFIG_ETHOC is not set | 619 | # CONFIG_ETHOC is not set |
| 620 | CONFIG_SMC911X=y | 620 | # CONFIG_SMC911X is not set |
| 621 | # CONFIG_SMSC911X is not set | 621 | CONFIG_SMSC911X=y |
| 622 | # CONFIG_DNET is not set | 622 | # CONFIG_DNET is not set |
| 623 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | 623 | # CONFIG_IBM_NEW_EMAC_ZMII is not set |
| 624 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | 624 | # CONFIG_IBM_NEW_EMAC_RGMII is not set |
| @@ -676,13 +676,19 @@ CONFIG_INPUT_EVDEV=y | |||
| 676 | # Input Device Drivers | 676 | # Input Device Drivers |
| 677 | # | 677 | # |
| 678 | CONFIG_INPUT_KEYBOARD=y | 678 | CONFIG_INPUT_KEYBOARD=y |
| 679 | # CONFIG_KEYBOARD_ADP5588 is not set | ||
| 679 | # CONFIG_KEYBOARD_ATKBD is not set | 680 | # CONFIG_KEYBOARD_ATKBD is not set |
| 680 | # CONFIG_KEYBOARD_SUNKBD is not set | 681 | # CONFIG_QT2160 is not set |
| 681 | # CONFIG_KEYBOARD_LKKBD is not set | 682 | # CONFIG_KEYBOARD_LKKBD is not set |
| 682 | # CONFIG_KEYBOARD_XTKBD is not set | 683 | # CONFIG_KEYBOARD_GPIO is not set |
| 684 | # CONFIG_KEYBOARD_MATRIX is not set | ||
| 685 | # CONFIG_KEYBOARD_MAX7359 is not set | ||
| 683 | # CONFIG_KEYBOARD_NEWTON is not set | 686 | # CONFIG_KEYBOARD_NEWTON is not set |
| 687 | # CONFIG_KEYBOARD_OPENCORES is not set | ||
| 684 | # CONFIG_KEYBOARD_STOWAWAY is not set | 688 | # CONFIG_KEYBOARD_STOWAWAY is not set |
| 685 | # CONFIG_KEYBOARD_GPIO is not set | 689 | # CONFIG_KEYBOARD_SUNKBD is not set |
| 690 | CONFIG_KEYBOARD_TWL4030=y | ||
| 691 | # CONFIG_KEYBOARD_XTKBD is not set | ||
| 686 | # CONFIG_INPUT_MOUSE is not set | 692 | # CONFIG_INPUT_MOUSE is not set |
| 687 | # CONFIG_INPUT_JOYSTICK is not set | 693 | # CONFIG_INPUT_JOYSTICK is not set |
| 688 | # CONFIG_INPUT_TABLET is not set | 694 | # CONFIG_INPUT_TABLET is not set |
| @@ -1126,7 +1132,7 @@ CONFIG_MMC_BLOCK_BOUNCE=y | |||
| 1126 | # | 1132 | # |
| 1127 | # CONFIG_MMC_SDHCI is not set | 1133 | # CONFIG_MMC_SDHCI is not set |
| 1128 | # CONFIG_MMC_OMAP is not set | 1134 | # CONFIG_MMC_OMAP is not set |
| 1129 | CONFIG_MMC_OMAP_HS=m | 1135 | CONFIG_MMC_OMAP_HS=y |
| 1130 | # CONFIG_MMC_SPI is not set | 1136 | # CONFIG_MMC_SPI is not set |
| 1131 | # CONFIG_MEMSTICK is not set | 1137 | # CONFIG_MEMSTICK is not set |
| 1132 | # CONFIG_ACCESSIBILITY is not set | 1138 | # CONFIG_ACCESSIBILITY is not set |
diff --git a/arch/arm/configs/omap3_pandora_defconfig b/arch/arm/configs/omap3_pandora_defconfig index 150deafb0a6..b7a8d9fa49d 100644 --- a/arch/arm/configs/omap3_pandora_defconfig +++ b/arch/arm/configs/omap3_pandora_defconfig | |||
| @@ -51,8 +51,9 @@ CONFIG_FAIR_GROUP_SCHED=y | |||
| 51 | # CONFIG_RT_GROUP_SCHED is not set | 51 | # CONFIG_RT_GROUP_SCHED is not set |
| 52 | CONFIG_USER_SCHED=y | 52 | CONFIG_USER_SCHED=y |
| 53 | # CONFIG_CGROUP_SCHED is not set | 53 | # CONFIG_CGROUP_SCHED is not set |
| 54 | CONFIG_SYSFS_DEPRECATED=y | 54 | # CONFIG_SYSFS_DEPRECATED=y is not set |
| 55 | CONFIG_SYSFS_DEPRECATED_V2=y | 55 | # CONFIG_SYSFS_DEPRECATED_V2=y is not set |
| 56 | |||
| 56 | # CONFIG_RELAY is not set | 57 | # CONFIG_RELAY is not set |
| 57 | # CONFIG_NAMESPACES is not set | 58 | # CONFIG_NAMESPACES is not set |
| 58 | CONFIG_BLK_DEV_INITRD=y | 59 | CONFIG_BLK_DEV_INITRD=y |
diff --git a/arch/arm/configs/omap_3430sdp_defconfig b/arch/arm/configs/omap_3430sdp_defconfig index 5a305f01530..84829587d55 100644 --- a/arch/arm/configs/omap_3430sdp_defconfig +++ b/arch/arm/configs/omap_3430sdp_defconfig | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.30-omap1 | 3 | # Linux kernel version: 2.6.31-rc9-omap1 |
| 4 | # Tue Jun 23 10:36:45 2009 | 4 | # Tue Sep 15 16:48:34 2009 |
| 5 | # | 5 | # |
| 6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
| @@ -9,7 +9,6 @@ CONFIG_GENERIC_GPIO=y | |||
| 9 | CONFIG_GENERIC_TIME=y | 9 | CONFIG_GENERIC_TIME=y |
| 10 | CONFIG_GENERIC_CLOCKEVENTS=y | 10 | CONFIG_GENERIC_CLOCKEVENTS=y |
| 11 | CONFIG_MMU=y | 11 | CONFIG_MMU=y |
| 12 | # CONFIG_NO_IOPORT is not set | ||
| 13 | CONFIG_GENERIC_HARDIRQS=y | 12 | CONFIG_GENERIC_HARDIRQS=y |
| 14 | CONFIG_STACKTRACE_SUPPORT=y | 13 | CONFIG_STACKTRACE_SUPPORT=y |
| 15 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | 14 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y |
| @@ -18,14 +17,12 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y | |||
| 18 | CONFIG_HARDIRQS_SW_RESEND=y | 17 | CONFIG_HARDIRQS_SW_RESEND=y |
| 19 | CONFIG_GENERIC_IRQ_PROBE=y | 18 | CONFIG_GENERIC_IRQ_PROBE=y |
| 20 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | 19 | CONFIG_RWSEM_GENERIC_SPINLOCK=y |
| 21 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
| 22 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
| 23 | CONFIG_GENERIC_HWEIGHT=y | 20 | CONFIG_GENERIC_HWEIGHT=y |
| 24 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 21 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
| 25 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | 22 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y |
| 26 | CONFIG_OPROFILE_ARMV7=y | ||
| 27 | CONFIG_VECTORS_BASE=0xffff0000 | 23 | CONFIG_VECTORS_BASE=0xffff0000 |
| 28 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 24 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
| 25 | CONFIG_CONSTRUCTORS=y | ||
| 29 | 26 | ||
| 30 | # | 27 | # |
| 31 | # General setup | 28 | # General setup |
| @@ -61,12 +58,15 @@ CONFIG_FAIR_GROUP_SCHED=y | |||
| 61 | CONFIG_USER_SCHED=y | 58 | CONFIG_USER_SCHED=y |
| 62 | # CONFIG_CGROUP_SCHED is not set | 59 | # CONFIG_CGROUP_SCHED is not set |
| 63 | # CONFIG_CGROUPS is not set | 60 | # CONFIG_CGROUPS is not set |
| 64 | CONFIG_SYSFS_DEPRECATED=y | 61 | # CONFIG_SYSFS_DEPRECATED=y is not set |
| 65 | CONFIG_SYSFS_DEPRECATED_V2=y | 62 | # CONFIG_SYSFS_DEPRECATED_V2=y is not set |
| 66 | # CONFIG_RELAY is not set | 63 | # CONFIG_RELAY is not set |
| 67 | # CONFIG_NAMESPACES is not set | 64 | # CONFIG_NAMESPACES is not set |
| 68 | CONFIG_BLK_DEV_INITRD=y | 65 | CONFIG_BLK_DEV_INITRD=y |
| 69 | CONFIG_INITRAMFS_SOURCE="" | 66 | CONFIG_INITRAMFS_SOURCE="" |
| 67 | CONFIG_RD_GZIP=y | ||
| 68 | # CONFIG_RD_BZIP2 is not set | ||
| 69 | # CONFIG_RD_LZMA is not set | ||
| 70 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | 70 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y |
| 71 | CONFIG_SYSCTL=y | 71 | CONFIG_SYSCTL=y |
| 72 | CONFIG_ANON_INODES=y | 72 | CONFIG_ANON_INODES=y |
| @@ -79,7 +79,7 @@ CONFIG_KALLSYMS=y | |||
| 79 | CONFIG_HOTPLUG=y | 79 | CONFIG_HOTPLUG=y |
| 80 | CONFIG_PRINTK=y | 80 | CONFIG_PRINTK=y |
| 81 | CONFIG_BUG=y | 81 | CONFIG_BUG=y |
| 82 | # CONFIG_ELF_CORE is not set | 82 | CONFIG_ELF_CORE=y |
| 83 | CONFIG_BASE_FULL=y | 83 | CONFIG_BASE_FULL=y |
| 84 | CONFIG_FUTEX=y | 84 | CONFIG_FUTEX=y |
| 85 | CONFIG_EPOLL=y | 85 | CONFIG_EPOLL=y |
| @@ -88,21 +88,29 @@ CONFIG_TIMERFD=y | |||
| 88 | CONFIG_EVENTFD=y | 88 | CONFIG_EVENTFD=y |
| 89 | CONFIG_SHMEM=y | 89 | CONFIG_SHMEM=y |
| 90 | CONFIG_AIO=y | 90 | CONFIG_AIO=y |
| 91 | |||
| 92 | # | ||
| 93 | # Performance Counters | ||
| 94 | # | ||
| 91 | CONFIG_VM_EVENT_COUNTERS=y | 95 | CONFIG_VM_EVENT_COUNTERS=y |
| 92 | CONFIG_SLUB_DEBUG=y | 96 | # CONFIG_STRIP_ASM_SYMS is not set |
| 93 | # CONFIG_COMPAT_BRK is not set | 97 | CONFIG_COMPAT_BRK=y |
| 94 | # CONFIG_SLAB is not set | 98 | CONFIG_SLAB=y |
| 95 | CONFIG_SLUB=y | 99 | # CONFIG_SLUB is not set |
| 96 | # CONFIG_SLOB is not set | 100 | # CONFIG_SLOB is not set |
| 97 | CONFIG_PROFILING=y | 101 | # CONFIG_PROFILING is not set |
| 98 | CONFIG_TRACEPOINTS=y | ||
| 99 | # CONFIG_MARKERS is not set | 102 | # CONFIG_MARKERS is not set |
| 100 | CONFIG_OPROFILE=y | ||
| 101 | CONFIG_HAVE_OPROFILE=y | 103 | CONFIG_HAVE_OPROFILE=y |
| 102 | # CONFIG_KPROBES is not set | 104 | # CONFIG_KPROBES is not set |
| 103 | CONFIG_HAVE_KPROBES=y | 105 | CONFIG_HAVE_KPROBES=y |
| 104 | CONFIG_HAVE_KRETPROBES=y | 106 | CONFIG_HAVE_KRETPROBES=y |
| 105 | CONFIG_HAVE_CLK=y | 107 | CONFIG_HAVE_CLK=y |
| 108 | |||
| 109 | # | ||
| 110 | # GCOV-based kernel profiling | ||
| 111 | # | ||
| 112 | # CONFIG_GCOV_KERNEL is not set | ||
| 113 | # CONFIG_SLOW_WORK is not set | ||
| 106 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | 114 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y |
| 107 | CONFIG_SLABINFO=y | 115 | CONFIG_SLABINFO=y |
| 108 | CONFIG_RT_MUTEXES=y | 116 | CONFIG_RT_MUTEXES=y |
| @@ -110,12 +118,11 @@ CONFIG_BASE_SMALL=0 | |||
| 110 | CONFIG_MODULES=y | 118 | CONFIG_MODULES=y |
| 111 | # CONFIG_MODULE_FORCE_LOAD is not set | 119 | # CONFIG_MODULE_FORCE_LOAD is not set |
| 112 | CONFIG_MODULE_UNLOAD=y | 120 | CONFIG_MODULE_UNLOAD=y |
| 113 | CONFIG_MODULE_FORCE_UNLOAD=y | 121 | # CONFIG_MODULE_FORCE_UNLOAD is not set |
| 114 | CONFIG_MODVERSIONS=y | 122 | CONFIG_MODVERSIONS=y |
| 115 | CONFIG_MODULE_SRCVERSION_ALL=y | 123 | CONFIG_MODULE_SRCVERSION_ALL=y |
| 116 | CONFIG_BLOCK=y | 124 | CONFIG_BLOCK=y |
| 117 | CONFIG_LBD=y | 125 | CONFIG_LBDAF=y |
| 118 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 119 | # CONFIG_BLK_DEV_BSG is not set | 126 | # CONFIG_BLK_DEV_BSG is not set |
| 120 | # CONFIG_BLK_DEV_INTEGRITY is not set | 127 | # CONFIG_BLK_DEV_INTEGRITY is not set |
| 121 | 128 | ||
| @@ -126,11 +133,11 @@ CONFIG_IOSCHED_NOOP=y | |||
| 126 | CONFIG_IOSCHED_AS=y | 133 | CONFIG_IOSCHED_AS=y |
| 127 | CONFIG_IOSCHED_DEADLINE=y | 134 | CONFIG_IOSCHED_DEADLINE=y |
| 128 | CONFIG_IOSCHED_CFQ=y | 135 | CONFIG_IOSCHED_CFQ=y |
| 129 | # CONFIG_DEFAULT_AS is not set | 136 | CONFIG_DEFAULT_AS=y |
| 130 | # CONFIG_DEFAULT_DEADLINE is not set | 137 | # CONFIG_DEFAULT_DEADLINE is not set |
| 131 | CONFIG_DEFAULT_CFQ=y | 138 | # CONFIG_DEFAULT_CFQ is not set |
| 132 | # CONFIG_DEFAULT_NOOP is not set | 139 | # CONFIG_DEFAULT_NOOP is not set |
| 133 | CONFIG_DEFAULT_IOSCHED="cfq" | 140 | CONFIG_DEFAULT_IOSCHED="anticipatory" |
| 134 | CONFIG_FREEZER=y | 141 | CONFIG_FREEZER=y |
| 135 | 142 | ||
| 136 | # | 143 | # |
| @@ -142,12 +149,14 @@ CONFIG_FREEZER=y | |||
| 142 | # CONFIG_ARCH_VERSATILE is not set | 149 | # CONFIG_ARCH_VERSATILE is not set |
| 143 | # CONFIG_ARCH_AT91 is not set | 150 | # CONFIG_ARCH_AT91 is not set |
| 144 | # CONFIG_ARCH_CLPS711X is not set | 151 | # CONFIG_ARCH_CLPS711X is not set |
| 152 | # CONFIG_ARCH_GEMINI is not set | ||
| 145 | # CONFIG_ARCH_EBSA110 is not set | 153 | # CONFIG_ARCH_EBSA110 is not set |
| 146 | # CONFIG_ARCH_EP93XX is not set | 154 | # CONFIG_ARCH_EP93XX is not set |
| 147 | # CONFIG_ARCH_FOOTBRIDGE is not set | 155 | # CONFIG_ARCH_FOOTBRIDGE is not set |
| 156 | # CONFIG_ARCH_MXC is not set | ||
| 157 | # CONFIG_ARCH_STMP3XXX is not set | ||
| 148 | # CONFIG_ARCH_NETX is not set | 158 | # CONFIG_ARCH_NETX is not set |
| 149 | # CONFIG_ARCH_H720X is not set | 159 | # CONFIG_ARCH_H720X is not set |
| 150 | # CONFIG_ARCH_IMX is not set | ||
| 151 | # CONFIG_ARCH_IOP13XX is not set | 160 | # CONFIG_ARCH_IOP13XX is not set |
| 152 | # CONFIG_ARCH_IOP32X is not set | 161 | # CONFIG_ARCH_IOP32X is not set |
| 153 | # CONFIG_ARCH_IOP33X is not set | 162 | # CONFIG_ARCH_IOP33X is not set |
| @@ -156,24 +165,25 @@ CONFIG_FREEZER=y | |||
| 156 | # CONFIG_ARCH_IXP4XX is not set | 165 | # CONFIG_ARCH_IXP4XX is not set |
| 157 | # CONFIG_ARCH_L7200 is not set | 166 | # CONFIG_ARCH_L7200 is not set |
| 158 | # CONFIG_ARCH_KIRKWOOD is not set | 167 | # CONFIG_ARCH_KIRKWOOD is not set |
| 159 | # CONFIG_ARCH_KS8695 is not set | ||
| 160 | # CONFIG_ARCH_NS9XXX is not set | ||
| 161 | # CONFIG_ARCH_LOKI is not set | 168 | # CONFIG_ARCH_LOKI is not set |
| 162 | # CONFIG_ARCH_MV78XX0 is not set | 169 | # CONFIG_ARCH_MV78XX0 is not set |
| 163 | # CONFIG_ARCH_MXC is not set | ||
| 164 | # CONFIG_ARCH_ORION5X is not set | 170 | # CONFIG_ARCH_ORION5X is not set |
| 171 | # CONFIG_ARCH_MMP is not set | ||
| 172 | # CONFIG_ARCH_KS8695 is not set | ||
| 173 | # CONFIG_ARCH_NS9XXX is not set | ||
| 174 | # CONFIG_ARCH_W90X900 is not set | ||
| 165 | # CONFIG_ARCH_PNX4008 is not set | 175 | # CONFIG_ARCH_PNX4008 is not set |
| 166 | # CONFIG_ARCH_PXA is not set | 176 | # CONFIG_ARCH_PXA is not set |
| 177 | # CONFIG_ARCH_MSM is not set | ||
| 167 | # CONFIG_ARCH_RPC is not set | 178 | # CONFIG_ARCH_RPC is not set |
| 168 | # CONFIG_ARCH_SA1100 is not set | 179 | # CONFIG_ARCH_SA1100 is not set |
| 169 | # CONFIG_ARCH_S3C2410 is not set | 180 | # CONFIG_ARCH_S3C2410 is not set |
| 170 | # CONFIG_ARCH_S3C64XX is not set | 181 | # CONFIG_ARCH_S3C64XX is not set |
| 171 | # CONFIG_ARCH_SHARK is not set | 182 | # CONFIG_ARCH_SHARK is not set |
| 172 | # CONFIG_ARCH_LH7A40X is not set | 183 | # CONFIG_ARCH_LH7A40X is not set |
| 184 | # CONFIG_ARCH_U300 is not set | ||
| 173 | # CONFIG_ARCH_DAVINCI is not set | 185 | # CONFIG_ARCH_DAVINCI is not set |
| 174 | CONFIG_ARCH_OMAP=y | 186 | CONFIG_ARCH_OMAP=y |
| 175 | # CONFIG_ARCH_MSM is not set | ||
| 176 | # CONFIG_ARCH_W90X900 is not set | ||
| 177 | 187 | ||
| 178 | # | 188 | # |
| 179 | # TI OMAP Implementations | 189 | # TI OMAP Implementations |
| @@ -182,17 +192,19 @@ CONFIG_ARCH_OMAP_OTG=y | |||
| 182 | # CONFIG_ARCH_OMAP1 is not set | 192 | # CONFIG_ARCH_OMAP1 is not set |
| 183 | # CONFIG_ARCH_OMAP2 is not set | 193 | # CONFIG_ARCH_OMAP2 is not set |
| 184 | CONFIG_ARCH_OMAP3=y | 194 | CONFIG_ARCH_OMAP3=y |
| 195 | # CONFIG_ARCH_OMAP4 is not set | ||
| 185 | 196 | ||
| 186 | # | 197 | # |
| 187 | # OMAP Feature Selections | 198 | # OMAP Feature Selections |
| 188 | # | 199 | # |
| 189 | # CONFIG_OMAP_DEBUG_POWERDOMAIN is not set | 200 | # CONFIG_OMAP_DEBUG_POWERDOMAIN is not set |
| 190 | # CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set | 201 | # CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set |
| 191 | # CONFIG_OMAP_RESET_CLOCKS is not set | 202 | CONFIG_OMAP_RESET_CLOCKS=y |
| 192 | CONFIG_OMAP_MUX=y | 203 | CONFIG_OMAP_MUX=y |
| 193 | CONFIG_OMAP_MUX_DEBUG=y | 204 | CONFIG_OMAP_MUX_DEBUG=y |
| 194 | CONFIG_OMAP_MUX_WARNINGS=y | 205 | CONFIG_OMAP_MUX_WARNINGS=y |
| 195 | CONFIG_OMAP_MCBSP=y | 206 | CONFIG_OMAP_MCBSP=y |
| 207 | # CONFIG_OMAP_MBOX_FWK is not set | ||
| 196 | # CONFIG_OMAP_MPU_TIMER is not set | 208 | # CONFIG_OMAP_MPU_TIMER is not set |
| 197 | CONFIG_OMAP_32K_TIMER=y | 209 | CONFIG_OMAP_32K_TIMER=y |
| 198 | CONFIG_OMAP_32K_TIMER_HZ=128 | 210 | CONFIG_OMAP_32K_TIMER_HZ=128 |
| @@ -200,7 +212,8 @@ CONFIG_OMAP_DM_TIMER=y | |||
| 200 | CONFIG_OMAP_LL_DEBUG_UART1=y | 212 | CONFIG_OMAP_LL_DEBUG_UART1=y |
| 201 | # CONFIG_OMAP_LL_DEBUG_UART2 is not set | 213 | # CONFIG_OMAP_LL_DEBUG_UART2 is not set |
| 202 | # CONFIG_OMAP_LL_DEBUG_UART3 is not set | 214 | # CONFIG_OMAP_LL_DEBUG_UART3 is not set |
| 203 | CONFIG_OMAP_SERIAL_WAKE=y | 215 | # CONFIG_OMAP_PM_NONE is not set |
| 216 | CONFIG_OMAP_PM_NOOP=y | ||
| 204 | CONFIG_ARCH_OMAP34XX=y | 217 | CONFIG_ARCH_OMAP34XX=y |
| 205 | CONFIG_ARCH_OMAP3430=y | 218 | CONFIG_ARCH_OMAP3430=y |
| 206 | 219 | ||
| @@ -210,8 +223,11 @@ CONFIG_ARCH_OMAP3430=y | |||
| 210 | # CONFIG_MACH_OMAP3_BEAGLE is not set | 223 | # CONFIG_MACH_OMAP3_BEAGLE is not set |
| 211 | # CONFIG_MACH_OMAP_LDP is not set | 224 | # CONFIG_MACH_OMAP_LDP is not set |
| 212 | # CONFIG_MACH_OVERO is not set | 225 | # CONFIG_MACH_OVERO is not set |
| 226 | # CONFIG_MACH_OMAP3EVM is not set | ||
| 213 | # CONFIG_MACH_OMAP3_PANDORA is not set | 227 | # CONFIG_MACH_OMAP3_PANDORA is not set |
| 214 | CONFIG_MACH_OMAP_3430SDP=y | 228 | CONFIG_MACH_OMAP_3430SDP=y |
| 229 | # CONFIG_MACH_NOKIA_RX51 is not set | ||
| 230 | # CONFIG_MACH_OMAP_ZOOM2 is not set | ||
| 215 | 231 | ||
| 216 | # | 232 | # |
| 217 | # Processor Type | 233 | # Processor Type |
| @@ -234,12 +250,15 @@ CONFIG_CPU_CP15_MMU=y | |||
| 234 | # Processor Features | 250 | # Processor Features |
| 235 | # | 251 | # |
| 236 | CONFIG_ARM_THUMB=y | 252 | CONFIG_ARM_THUMB=y |
| 237 | CONFIG_ARM_THUMBEE=y | 253 | # CONFIG_ARM_THUMBEE is not set |
| 238 | # CONFIG_CPU_ICACHE_DISABLE is not set | 254 | # CONFIG_CPU_ICACHE_DISABLE is not set |
| 239 | # CONFIG_CPU_DCACHE_DISABLE is not set | 255 | # CONFIG_CPU_DCACHE_DISABLE is not set |
| 240 | # CONFIG_CPU_BPREDICT_DISABLE is not set | 256 | # CONFIG_CPU_BPREDICT_DISABLE is not set |
| 241 | CONFIG_HAS_TLS_REG=y | 257 | CONFIG_HAS_TLS_REG=y |
| 242 | # CONFIG_OUTER_CACHE is not set | 258 | # CONFIG_ARM_ERRATA_430973 is not set |
| 259 | # CONFIG_ARM_ERRATA_458693 is not set | ||
| 260 | # CONFIG_ARM_ERRATA_460075 is not set | ||
| 261 | CONFIG_COMMON_CLKDEV=y | ||
| 243 | 262 | ||
| 244 | # | 263 | # |
| 245 | # Bus support | 264 | # Bus support |
| @@ -262,10 +281,10 @@ CONFIG_PAGE_OFFSET=0xC0000000 | |||
| 262 | # CONFIG_PREEMPT is not set | 281 | # CONFIG_PREEMPT is not set |
| 263 | CONFIG_HZ=128 | 282 | CONFIG_HZ=128 |
| 264 | CONFIG_AEABI=y | 283 | CONFIG_AEABI=y |
| 265 | # CONFIG_OABI_COMPAT is not set | 284 | CONFIG_OABI_COMPAT=y |
| 266 | CONFIG_ARCH_FLATMEM_HAS_HOLES=y | ||
| 267 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | 285 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set |
| 268 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | 286 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set |
| 287 | # CONFIG_HIGHMEM is not set | ||
| 269 | CONFIG_SELECT_MEMORY_MODEL=y | 288 | CONFIG_SELECT_MEMORY_MODEL=y |
| 270 | CONFIG_FLATMEM_MANUAL=y | 289 | CONFIG_FLATMEM_MANUAL=y |
| 271 | # CONFIG_DISCONTIGMEM_MANUAL is not set | 290 | # CONFIG_DISCONTIGMEM_MANUAL is not set |
| @@ -277,9 +296,12 @@ CONFIG_SPLIT_PTLOCK_CPUS=4 | |||
| 277 | # CONFIG_PHYS_ADDR_T_64BIT is not set | 296 | # CONFIG_PHYS_ADDR_T_64BIT is not set |
| 278 | CONFIG_ZONE_DMA_FLAG=0 | 297 | CONFIG_ZONE_DMA_FLAG=0 |
| 279 | CONFIG_VIRT_TO_BUS=y | 298 | CONFIG_VIRT_TO_BUS=y |
| 280 | CONFIG_UNEVICTABLE_LRU=y | 299 | CONFIG_HAVE_MLOCK=y |
| 281 | CONFIG_LEDS=y | 300 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y |
| 301 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
| 302 | # CONFIG_LEDS is not set | ||
| 282 | CONFIG_ALIGNMENT_TRAP=y | 303 | CONFIG_ALIGNMENT_TRAP=y |
| 304 | # CONFIG_UACCESS_WITH_MEMCPY is not set | ||
| 283 | 305 | ||
| 284 | # | 306 | # |
| 285 | # Boot options | 307 | # Boot options |
| @@ -288,8 +310,7 @@ CONFIG_ZBOOT_ROM_TEXT=0x0 | |||
| 288 | CONFIG_ZBOOT_ROM_BSS=0x0 | 310 | CONFIG_ZBOOT_ROM_BSS=0x0 |
| 289 | CONFIG_CMDLINE="console=ttyS2,115200 root=/dev/mmcblk0p3 rootwait debug" | 311 | CONFIG_CMDLINE="console=ttyS2,115200 root=/dev/mmcblk0p3 rootwait debug" |
| 290 | # CONFIG_XIP_KERNEL is not set | 312 | # CONFIG_XIP_KERNEL is not set |
| 291 | CONFIG_KEXEC=y | 313 | # CONFIG_KEXEC is not set |
| 292 | CONFIG_ATAGS_PROC=y | ||
| 293 | 314 | ||
| 294 | # | 315 | # |
| 295 | # CPU Power Management | 316 | # CPU Power Management |
| @@ -318,6 +339,9 @@ CONFIG_CPU_FREQ_GOV_ONDEMAND=y | |||
| 318 | # | 339 | # |
| 319 | # At least one emulation must be selected | 340 | # At least one emulation must be selected |
| 320 | # | 341 | # |
| 342 | CONFIG_FPE_NWFPE=y | ||
| 343 | # CONFIG_FPE_NWFPE_XP is not set | ||
| 344 | # CONFIG_FPE_FASTFPE is not set | ||
| 321 | CONFIG_VFP=y | 345 | CONFIG_VFP=y |
| 322 | CONFIG_VFPv3=y | 346 | CONFIG_VFPv3=y |
| 323 | CONFIG_NEON=y | 347 | CONFIG_NEON=y |
| @@ -326,8 +350,9 @@ CONFIG_NEON=y | |||
| 326 | # Userspace binary formats | 350 | # Userspace binary formats |
| 327 | # | 351 | # |
| 328 | CONFIG_BINFMT_ELF=y | 352 | CONFIG_BINFMT_ELF=y |
| 353 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 329 | CONFIG_HAVE_AOUT=y | 354 | CONFIG_HAVE_AOUT=y |
| 330 | CONFIG_BINFMT_AOUT=m | 355 | # CONFIG_BINFMT_AOUT is not set |
| 331 | CONFIG_BINFMT_MISC=y | 356 | CONFIG_BINFMT_MISC=y |
| 332 | 357 | ||
| 333 | # | 358 | # |
| @@ -345,9 +370,8 @@ CONFIG_NET=y | |||
| 345 | # | 370 | # |
| 346 | # Networking options | 371 | # Networking options |
| 347 | # | 372 | # |
| 348 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
| 349 | CONFIG_PACKET=y | 373 | CONFIG_PACKET=y |
| 350 | CONFIG_PACKET_MMAP=y | 374 | # CONFIG_PACKET_MMAP is not set |
| 351 | CONFIG_UNIX=y | 375 | CONFIG_UNIX=y |
| 352 | CONFIG_XFRM=y | 376 | CONFIG_XFRM=y |
| 353 | # CONFIG_XFRM_USER is not set | 377 | # CONFIG_XFRM_USER is not set |
| @@ -372,7 +396,7 @@ CONFIG_IP_PNP_RARP=y | |||
| 372 | # CONFIG_INET_ESP is not set | 396 | # CONFIG_INET_ESP is not set |
| 373 | # CONFIG_INET_IPCOMP is not set | 397 | # CONFIG_INET_IPCOMP is not set |
| 374 | # CONFIG_INET_XFRM_TUNNEL is not set | 398 | # CONFIG_INET_XFRM_TUNNEL is not set |
| 375 | CONFIG_INET_TUNNEL=m | 399 | # CONFIG_INET_TUNNEL is not set |
| 376 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | 400 | CONFIG_INET_XFRM_MODE_TRANSPORT=y |
| 377 | CONFIG_INET_XFRM_MODE_TUNNEL=y | 401 | CONFIG_INET_XFRM_MODE_TUNNEL=y |
| 378 | CONFIG_INET_XFRM_MODE_BEET=y | 402 | CONFIG_INET_XFRM_MODE_BEET=y |
| @@ -383,25 +407,7 @@ CONFIG_INET_TCP_DIAG=y | |||
| 383 | CONFIG_TCP_CONG_CUBIC=y | 407 | CONFIG_TCP_CONG_CUBIC=y |
| 384 | CONFIG_DEFAULT_TCP_CONG="cubic" | 408 | CONFIG_DEFAULT_TCP_CONG="cubic" |
| 385 | # CONFIG_TCP_MD5SIG is not set | 409 | # CONFIG_TCP_MD5SIG is not set |
| 386 | CONFIG_IPV6=m | 410 | # CONFIG_IPV6 is not set |
| 387 | # CONFIG_IPV6_PRIVACY is not set | ||
| 388 | # CONFIG_IPV6_ROUTER_PREF is not set | ||
| 389 | # CONFIG_IPV6_OPTIMISTIC_DAD is not set | ||
| 390 | # CONFIG_INET6_AH is not set | ||
| 391 | # CONFIG_INET6_ESP is not set | ||
| 392 | # CONFIG_INET6_IPCOMP is not set | ||
| 393 | # CONFIG_IPV6_MIP6 is not set | ||
| 394 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
| 395 | # CONFIG_INET6_TUNNEL is not set | ||
| 396 | CONFIG_INET6_XFRM_MODE_TRANSPORT=m | ||
| 397 | CONFIG_INET6_XFRM_MODE_TUNNEL=m | ||
| 398 | CONFIG_INET6_XFRM_MODE_BEET=m | ||
| 399 | # CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set | ||
| 400 | CONFIG_IPV6_SIT=m | ||
| 401 | CONFIG_IPV6_NDISC_NODETYPE=y | ||
| 402 | # CONFIG_IPV6_TUNNEL is not set | ||
| 403 | # CONFIG_IPV6_MULTIPLE_TABLES is not set | ||
| 404 | # CONFIG_IPV6_MROUTE is not set | ||
| 405 | # CONFIG_NETWORK_SECMARK is not set | 411 | # CONFIG_NETWORK_SECMARK is not set |
| 406 | # CONFIG_NETFILTER is not set | 412 | # CONFIG_NETFILTER is not set |
| 407 | # CONFIG_IP_DCCP is not set | 413 | # CONFIG_IP_DCCP is not set |
| @@ -419,6 +425,8 @@ CONFIG_IPV6_NDISC_NODETYPE=y | |||
| 419 | # CONFIG_LAPB is not set | 425 | # CONFIG_LAPB is not set |
| 420 | # CONFIG_ECONET is not set | 426 | # CONFIG_ECONET is not set |
| 421 | # CONFIG_WAN_ROUTER is not set | 427 | # CONFIG_WAN_ROUTER is not set |
| 428 | # CONFIG_PHONET is not set | ||
| 429 | # CONFIG_IEEE802154 is not set | ||
| 422 | # CONFIG_NET_SCHED is not set | 430 | # CONFIG_NET_SCHED is not set |
| 423 | # CONFIG_DCB is not set | 431 | # CONFIG_DCB is not set |
| 424 | 432 | ||
| @@ -429,56 +437,9 @@ CONFIG_IPV6_NDISC_NODETYPE=y | |||
| 429 | # CONFIG_HAMRADIO is not set | 437 | # CONFIG_HAMRADIO is not set |
| 430 | # CONFIG_CAN is not set | 438 | # CONFIG_CAN is not set |
| 431 | # CONFIG_IRDA is not set | 439 | # CONFIG_IRDA is not set |
| 432 | CONFIG_BT=y | 440 | # CONFIG_BT is not set |
| 433 | CONFIG_BT_L2CAP=y | ||
| 434 | CONFIG_BT_SCO=y | ||
| 435 | CONFIG_BT_RFCOMM=y | ||
| 436 | CONFIG_BT_RFCOMM_TTY=y | ||
| 437 | CONFIG_BT_BNEP=y | ||
| 438 | CONFIG_BT_BNEP_MC_FILTER=y | ||
| 439 | CONFIG_BT_BNEP_PROTO_FILTER=y | ||
| 440 | CONFIG_BT_HIDP=y | ||
| 441 | |||
| 442 | # | ||
| 443 | # Bluetooth device drivers | ||
| 444 | # | ||
| 445 | # CONFIG_BT_HCIBTUSB is not set | ||
| 446 | # CONFIG_BT_HCIBTSDIO is not set | ||
| 447 | CONFIG_BT_HCIUART=y | ||
| 448 | CONFIG_BT_HCIUART_H4=y | ||
| 449 | CONFIG_BT_HCIUART_BCSP=y | ||
| 450 | # CONFIG_BT_HCIUART_LL is not set | ||
| 451 | CONFIG_BT_HCIBCM203X=y | ||
| 452 | CONFIG_BT_HCIBPA10X=y | ||
| 453 | # CONFIG_BT_HCIBFUSB is not set | ||
| 454 | # CONFIG_BT_HCIVHCI is not set | ||
| 455 | # CONFIG_AF_RXRPC is not set | 441 | # CONFIG_AF_RXRPC is not set |
| 456 | # CONFIG_PHONET is not set | 442 | # CONFIG_WIRELESS is not set |
| 457 | CONFIG_WIRELESS=y | ||
| 458 | CONFIG_CFG80211=y | ||
| 459 | # CONFIG_CFG80211_REG_DEBUG is not set | ||
| 460 | CONFIG_NL80211=y | ||
| 461 | CONFIG_WIRELESS_OLD_REGULATORY=y | ||
| 462 | CONFIG_WIRELESS_EXT=y | ||
| 463 | CONFIG_WIRELESS_EXT_SYSFS=y | ||
| 464 | CONFIG_LIB80211=y | ||
| 465 | CONFIG_LIB80211_CRYPT_WEP=m | ||
| 466 | CONFIG_LIB80211_CRYPT_CCMP=m | ||
| 467 | CONFIG_LIB80211_CRYPT_TKIP=m | ||
| 468 | CONFIG_MAC80211=y | ||
| 469 | |||
| 470 | # | ||
| 471 | # Rate control algorithm selection | ||
| 472 | # | ||
| 473 | CONFIG_MAC80211_RC_PID=y | ||
| 474 | # CONFIG_MAC80211_RC_MINSTREL is not set | ||
| 475 | CONFIG_MAC80211_RC_DEFAULT_PID=y | ||
| 476 | # CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set | ||
| 477 | CONFIG_MAC80211_RC_DEFAULT="pid" | ||
| 478 | # CONFIG_MAC80211_MESH is not set | ||
| 479 | CONFIG_MAC80211_LEDS=y | ||
| 480 | # CONFIG_MAC80211_DEBUGFS is not set | ||
| 481 | # CONFIG_MAC80211_DEBUG_MENU is not set | ||
| 482 | # CONFIG_WIMAX is not set | 443 | # CONFIG_WIMAX is not set |
| 483 | # CONFIG_RFKILL is not set | 444 | # CONFIG_RFKILL is not set |
| 484 | # CONFIG_NET_9P is not set | 445 | # CONFIG_NET_9P is not set |
| @@ -493,9 +454,7 @@ CONFIG_MAC80211_LEDS=y | |||
| 493 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 454 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 494 | CONFIG_STANDALONE=y | 455 | CONFIG_STANDALONE=y |
| 495 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 456 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
| 496 | CONFIG_FW_LOADER=y | 457 | # CONFIG_FW_LOADER is not set |
| 497 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
| 498 | CONFIG_EXTRA_FIRMWARE="" | ||
| 499 | # CONFIG_DEBUG_DRIVER is not set | 458 | # CONFIG_DEBUG_DRIVER is not set |
| 500 | # CONFIG_DEBUG_DEVRES is not set | 459 | # CONFIG_DEBUG_DEVRES is not set |
| 501 | # CONFIG_SYS_HYPERVISOR is not set | 460 | # CONFIG_SYS_HYPERVISOR is not set |
| @@ -506,7 +465,7 @@ CONFIG_MTD_CONCAT=y | |||
| 506 | CONFIG_MTD_PARTITIONS=y | 465 | CONFIG_MTD_PARTITIONS=y |
| 507 | # CONFIG_MTD_TESTS is not set | 466 | # CONFIG_MTD_TESTS is not set |
| 508 | # CONFIG_MTD_REDBOOT_PARTS is not set | 467 | # CONFIG_MTD_REDBOOT_PARTS is not set |
| 509 | # CONFIG_MTD_CMDLINE_PARTS is not set | 468 | CONFIG_MTD_CMDLINE_PARTS=y |
| 510 | # CONFIG_MTD_AFS_PARTS is not set | 469 | # CONFIG_MTD_AFS_PARTS is not set |
| 511 | # CONFIG_MTD_AR7_PARTS is not set | 470 | # CONFIG_MTD_AR7_PARTS is not set |
| 512 | 471 | ||
| @@ -526,8 +485,10 @@ CONFIG_MTD_BLOCK=y | |||
| 526 | # | 485 | # |
| 527 | # RAM/ROM/Flash chip drivers | 486 | # RAM/ROM/Flash chip drivers |
| 528 | # | 487 | # |
| 529 | # CONFIG_MTD_CFI is not set | 488 | CONFIG_MTD_CFI=y |
| 530 | # CONFIG_MTD_JEDECPROBE is not set | 489 | # CONFIG_MTD_JEDECPROBE is not set |
| 490 | CONFIG_MTD_GEN_PROBE=y | ||
| 491 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
| 531 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | 492 | CONFIG_MTD_MAP_BANK_WIDTH_1=y |
| 532 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | 493 | CONFIG_MTD_MAP_BANK_WIDTH_2=y |
| 533 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | 494 | CONFIG_MTD_MAP_BANK_WIDTH_4=y |
| @@ -538,6 +499,10 @@ CONFIG_MTD_CFI_I1=y | |||
| 538 | CONFIG_MTD_CFI_I2=y | 499 | CONFIG_MTD_CFI_I2=y |
| 539 | # CONFIG_MTD_CFI_I4 is not set | 500 | # CONFIG_MTD_CFI_I4 is not set |
| 540 | # CONFIG_MTD_CFI_I8 is not set | 501 | # CONFIG_MTD_CFI_I8 is not set |
| 502 | CONFIG_MTD_CFI_INTELEXT=y | ||
| 503 | # CONFIG_MTD_CFI_AMDSTD is not set | ||
| 504 | # CONFIG_MTD_CFI_STAA is not set | ||
| 505 | CONFIG_MTD_CFI_UTIL=y | ||
| 541 | # CONFIG_MTD_RAM is not set | 506 | # CONFIG_MTD_RAM is not set |
| 542 | # CONFIG_MTD_ROM is not set | 507 | # CONFIG_MTD_ROM is not set |
| 543 | # CONFIG_MTD_ABSENT is not set | 508 | # CONFIG_MTD_ABSENT is not set |
| @@ -546,6 +511,9 @@ CONFIG_MTD_CFI_I2=y | |||
| 546 | # Mapping drivers for chip access | 511 | # Mapping drivers for chip access |
| 547 | # | 512 | # |
| 548 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | 513 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set |
| 514 | # CONFIG_MTD_PHYSMAP is not set | ||
| 515 | # CONFIG_MTD_ARM_INTEGRATOR is not set | ||
| 516 | CONFIG_MTD_OMAP_NOR=y | ||
| 549 | # CONFIG_MTD_PLATRAM is not set | 517 | # CONFIG_MTD_PLATRAM is not set |
| 550 | 518 | ||
| 551 | # | 519 | # |
| @@ -569,6 +537,7 @@ CONFIG_MTD_NAND=y | |||
| 569 | # CONFIG_MTD_NAND_ECC_SMC is not set | 537 | # CONFIG_MTD_NAND_ECC_SMC is not set |
| 570 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set | 538 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set |
| 571 | # CONFIG_MTD_NAND_GPIO is not set | 539 | # CONFIG_MTD_NAND_GPIO is not set |
| 540 | # CONFIG_MTD_NAND_OMAP2 is not set | ||
| 572 | CONFIG_MTD_NAND_IDS=y | 541 | CONFIG_MTD_NAND_IDS=y |
| 573 | # CONFIG_MTD_NAND_DISKONCHIP is not set | 542 | # CONFIG_MTD_NAND_DISKONCHIP is not set |
| 574 | # CONFIG_MTD_NAND_NANDSIM is not set | 543 | # CONFIG_MTD_NAND_NANDSIM is not set |
| @@ -589,20 +558,21 @@ CONFIG_MTD_NAND_IDS=y | |||
| 589 | CONFIG_BLK_DEV=y | 558 | CONFIG_BLK_DEV=y |
| 590 | # CONFIG_BLK_DEV_COW_COMMON is not set | 559 | # CONFIG_BLK_DEV_COW_COMMON is not set |
| 591 | CONFIG_BLK_DEV_LOOP=y | 560 | CONFIG_BLK_DEV_LOOP=y |
| 592 | CONFIG_BLK_DEV_CRYPTOLOOP=m | 561 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set |
| 593 | # CONFIG_BLK_DEV_NBD is not set | 562 | # CONFIG_BLK_DEV_NBD is not set |
| 594 | # CONFIG_BLK_DEV_UB is not set | 563 | # CONFIG_BLK_DEV_UB is not set |
| 595 | CONFIG_BLK_DEV_RAM=y | 564 | CONFIG_BLK_DEV_RAM=y |
| 596 | CONFIG_BLK_DEV_RAM_COUNT=16 | 565 | CONFIG_BLK_DEV_RAM_COUNT=16 |
| 597 | CONFIG_BLK_DEV_RAM_SIZE=16384 | 566 | CONFIG_BLK_DEV_RAM_SIZE=16384 |
| 598 | # CONFIG_BLK_DEV_XIP is not set | 567 | # CONFIG_BLK_DEV_XIP is not set |
| 599 | CONFIG_CDROM_PKTCDVD=m | 568 | # CONFIG_CDROM_PKTCDVD is not set |
| 600 | CONFIG_CDROM_PKTCDVD_BUFFERS=8 | ||
| 601 | # CONFIG_CDROM_PKTCDVD_WCACHE is not set | ||
| 602 | # CONFIG_ATA_OVER_ETH is not set | 569 | # CONFIG_ATA_OVER_ETH is not set |
| 570 | # CONFIG_MG_DISK is not set | ||
| 603 | CONFIG_MISC_DEVICES=y | 571 | CONFIG_MISC_DEVICES=y |
| 604 | # CONFIG_ICS932S401 is not set | 572 | # CONFIG_ICS932S401 is not set |
| 573 | # CONFIG_OMAP_STI is not set | ||
| 605 | # CONFIG_ENCLOSURE_SERVICES is not set | 574 | # CONFIG_ENCLOSURE_SERVICES is not set |
| 575 | # CONFIG_ISL29003 is not set | ||
| 606 | # CONFIG_C2PORT is not set | 576 | # CONFIG_C2PORT is not set |
| 607 | 577 | ||
| 608 | # | 578 | # |
| @@ -611,14 +581,15 @@ CONFIG_MISC_DEVICES=y | |||
| 611 | # CONFIG_EEPROM_AT24 is not set | 581 | # CONFIG_EEPROM_AT24 is not set |
| 612 | # CONFIG_EEPROM_AT25 is not set | 582 | # CONFIG_EEPROM_AT25 is not set |
| 613 | # CONFIG_EEPROM_LEGACY is not set | 583 | # CONFIG_EEPROM_LEGACY is not set |
| 614 | CONFIG_EEPROM_93CX6=m | 584 | # CONFIG_EEPROM_MAX6875 is not set |
| 585 | # CONFIG_EEPROM_93CX6 is not set | ||
| 615 | CONFIG_HAVE_IDE=y | 586 | CONFIG_HAVE_IDE=y |
| 616 | # CONFIG_IDE is not set | 587 | # CONFIG_IDE is not set |
| 617 | 588 | ||
| 618 | # | 589 | # |
| 619 | # SCSI device support | 590 | # SCSI device support |
| 620 | # | 591 | # |
| 621 | CONFIG_RAID_ATTRS=m | 592 | # CONFIG_RAID_ATTRS is not set |
| 622 | CONFIG_SCSI=y | 593 | CONFIG_SCSI=y |
| 623 | CONFIG_SCSI_DMA=y | 594 | CONFIG_SCSI_DMA=y |
| 624 | # CONFIG_SCSI_TGT is not set | 595 | # CONFIG_SCSI_TGT is not set |
| @@ -632,12 +603,8 @@ CONFIG_BLK_DEV_SD=y | |||
| 632 | # CONFIG_CHR_DEV_ST is not set | 603 | # CONFIG_CHR_DEV_ST is not set |
| 633 | # CONFIG_CHR_DEV_OSST is not set | 604 | # CONFIG_CHR_DEV_OSST is not set |
| 634 | # CONFIG_BLK_DEV_SR is not set | 605 | # CONFIG_BLK_DEV_SR is not set |
| 635 | CONFIG_CHR_DEV_SG=m | 606 | # CONFIG_CHR_DEV_SG is not set |
| 636 | # CONFIG_CHR_DEV_SCH is not set | 607 | # CONFIG_CHR_DEV_SCH is not set |
| 637 | |||
| 638 | # | ||
| 639 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
| 640 | # | ||
| 641 | CONFIG_SCSI_MULTI_LUN=y | 608 | CONFIG_SCSI_MULTI_LUN=y |
| 642 | # CONFIG_SCSI_CONSTANTS is not set | 609 | # CONFIG_SCSI_CONSTANTS is not set |
| 643 | # CONFIG_SCSI_LOGGING is not set | 610 | # CONFIG_SCSI_LOGGING is not set |
| @@ -655,34 +622,18 @@ CONFIG_SCSI_WAIT_SCAN=m | |||
| 655 | CONFIG_SCSI_LOWLEVEL=y | 622 | CONFIG_SCSI_LOWLEVEL=y |
| 656 | # CONFIG_ISCSI_TCP is not set | 623 | # CONFIG_ISCSI_TCP is not set |
| 657 | # CONFIG_LIBFC is not set | 624 | # CONFIG_LIBFC is not set |
| 625 | # CONFIG_LIBFCOE is not set | ||
| 658 | # CONFIG_SCSI_DEBUG is not set | 626 | # CONFIG_SCSI_DEBUG is not set |
| 659 | # CONFIG_SCSI_DH is not set | 627 | # CONFIG_SCSI_DH is not set |
| 628 | # CONFIG_SCSI_OSD_INITIATOR is not set | ||
| 660 | # CONFIG_ATA is not set | 629 | # CONFIG_ATA is not set |
| 661 | CONFIG_MD=y | 630 | # CONFIG_MD is not set |
| 662 | CONFIG_BLK_DEV_MD=m | ||
| 663 | CONFIG_MD_LINEAR=m | ||
| 664 | CONFIG_MD_RAID0=m | ||
| 665 | CONFIG_MD_RAID1=m | ||
| 666 | CONFIG_MD_RAID10=m | ||
| 667 | CONFIG_MD_RAID456=m | ||
| 668 | CONFIG_MD_RAID5_RESHAPE=y | ||
| 669 | CONFIG_MD_MULTIPATH=m | ||
| 670 | CONFIG_MD_FAULTY=m | ||
| 671 | CONFIG_BLK_DEV_DM=m | ||
| 672 | # CONFIG_DM_DEBUG is not set | ||
| 673 | CONFIG_DM_CRYPT=m | ||
| 674 | CONFIG_DM_SNAPSHOT=m | ||
| 675 | CONFIG_DM_MIRROR=m | ||
| 676 | CONFIG_DM_ZERO=m | ||
| 677 | CONFIG_DM_MULTIPATH=m | ||
| 678 | CONFIG_DM_DELAY=m | ||
| 679 | # CONFIG_DM_UEVENT is not set | ||
| 680 | CONFIG_NETDEVICES=y | 631 | CONFIG_NETDEVICES=y |
| 681 | CONFIG_DUMMY=m | 632 | # CONFIG_DUMMY is not set |
| 682 | # CONFIG_BONDING is not set | 633 | # CONFIG_BONDING is not set |
| 683 | # CONFIG_MACVLAN is not set | 634 | # CONFIG_MACVLAN is not set |
| 684 | # CONFIG_EQUALIZER is not set | 635 | # CONFIG_EQUALIZER is not set |
| 685 | CONFIG_TUN=m | 636 | # CONFIG_TUN is not set |
| 686 | # CONFIG_VETH is not set | 637 | # CONFIG_VETH is not set |
| 687 | CONFIG_PHYLIB=y | 638 | CONFIG_PHYLIB=y |
| 688 | 639 | ||
| @@ -695,7 +646,7 @@ CONFIG_PHYLIB=y | |||
| 695 | # CONFIG_LXT_PHY is not set | 646 | # CONFIG_LXT_PHY is not set |
| 696 | # CONFIG_CICADA_PHY is not set | 647 | # CONFIG_CICADA_PHY is not set |
| 697 | # CONFIG_VITESSE_PHY is not set | 648 | # CONFIG_VITESSE_PHY is not set |
| 698 | CONFIG_SMSC_PHY=y | 649 | # CONFIG_SMSC_PHY is not set |
| 699 | # CONFIG_BROADCOM_PHY is not set | 650 | # CONFIG_BROADCOM_PHY is not set |
| 700 | # CONFIG_ICPLUS_PHY is not set | 651 | # CONFIG_ICPLUS_PHY is not set |
| 701 | # CONFIG_REALTEK_PHY is not set | 652 | # CONFIG_REALTEK_PHY is not set |
| @@ -710,8 +661,10 @@ CONFIG_MII=y | |||
| 710 | CONFIG_SMC91X=y | 661 | CONFIG_SMC91X=y |
| 711 | # CONFIG_DM9000 is not set | 662 | # CONFIG_DM9000 is not set |
| 712 | # CONFIG_ENC28J60 is not set | 663 | # CONFIG_ENC28J60 is not set |
| 713 | CONFIG_SMC911X=m | 664 | # CONFIG_ETHOC is not set |
| 714 | CONFIG_SMSC911X=m | 665 | # CONFIG_SMC911X is not set |
| 666 | # CONFIG_SMSC911X is not set | ||
| 667 | # CONFIG_DNET is not set | ||
| 715 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | 668 | # CONFIG_IBM_NEW_EMAC_ZMII is not set |
| 716 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | 669 | # CONFIG_IBM_NEW_EMAC_RGMII is not set |
| 717 | # CONFIG_IBM_NEW_EMAC_TAH is not set | 670 | # CONFIG_IBM_NEW_EMAC_TAH is not set |
| @@ -720,33 +673,16 @@ CONFIG_SMSC911X=m | |||
| 720 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | 673 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set |
| 721 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | 674 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set |
| 722 | # CONFIG_B44 is not set | 675 | # CONFIG_B44 is not set |
| 723 | # CONFIG_NETDEV_1000 is not set | 676 | # CONFIG_KS8842 is not set |
| 724 | # CONFIG_NETDEV_10000 is not set | 677 | # CONFIG_KS8851 is not set |
| 678 | CONFIG_NETDEV_1000=y | ||
| 679 | CONFIG_NETDEV_10000=y | ||
| 725 | 680 | ||
| 726 | # | 681 | # |
| 727 | # Wireless LAN | 682 | # Wireless LAN |
| 728 | # | 683 | # |
| 729 | # CONFIG_WLAN_PRE80211 is not set | 684 | # CONFIG_WLAN_PRE80211 is not set |
| 730 | CONFIG_WLAN_80211=y | 685 | # CONFIG_WLAN_80211 is not set |
| 731 | CONFIG_LIBERTAS=y | ||
| 732 | CONFIG_LIBERTAS_USB=y | ||
| 733 | CONFIG_LIBERTAS_SDIO=y | ||
| 734 | CONFIG_LIBERTAS_DEBUG=y | ||
| 735 | # CONFIG_LIBERTAS_THINFIRM is not set | ||
| 736 | CONFIG_USB_ZD1201=m | ||
| 737 | # CONFIG_USB_NET_RNDIS_WLAN is not set | ||
| 738 | CONFIG_RTL8187=m | ||
| 739 | # CONFIG_MAC80211_HWSIM is not set | ||
| 740 | CONFIG_P54_COMMON=m | ||
| 741 | CONFIG_P54_USB=m | ||
| 742 | # CONFIG_IWLWIFI_LEDS is not set | ||
| 743 | CONFIG_HOSTAP=m | ||
| 744 | CONFIG_HOSTAP_FIRMWARE=y | ||
| 745 | CONFIG_HOSTAP_FIRMWARE_NVRAM=y | ||
| 746 | # CONFIG_B43 is not set | ||
| 747 | # CONFIG_B43LEGACY is not set | ||
| 748 | # CONFIG_ZD1211RW is not set | ||
| 749 | # CONFIG_RT2X00 is not set | ||
| 750 | 686 | ||
| 751 | # | 687 | # |
| 752 | # Enable WiMAX (Networking options) to see the WiMAX drivers | 688 | # Enable WiMAX (Networking options) to see the WiMAX drivers |
| @@ -755,41 +691,14 @@ CONFIG_HOSTAP_FIRMWARE_NVRAM=y | |||
| 755 | # | 691 | # |
| 756 | # USB Network Adapters | 692 | # USB Network Adapters |
| 757 | # | 693 | # |
| 758 | CONFIG_USB_CATC=m | 694 | # CONFIG_USB_CATC is not set |
| 759 | CONFIG_USB_KAWETH=m | 695 | # CONFIG_USB_KAWETH is not set |
| 760 | CONFIG_USB_PEGASUS=m | 696 | # CONFIG_USB_PEGASUS is not set |
| 761 | CONFIG_USB_RTL8150=m | 697 | # CONFIG_USB_RTL8150 is not set |
| 762 | CONFIG_USB_USBNET=y | 698 | # CONFIG_USB_USBNET is not set |
| 763 | CONFIG_USB_NET_AX8817X=y | ||
| 764 | CONFIG_USB_NET_CDCETHER=y | ||
| 765 | CONFIG_USB_NET_DM9601=m | ||
| 766 | # CONFIG_USB_NET_SMSC95XX is not set | ||
| 767 | CONFIG_USB_NET_GL620A=m | ||
| 768 | CONFIG_USB_NET_NET1080=m | ||
| 769 | CONFIG_USB_NET_PLUSB=m | ||
| 770 | CONFIG_USB_NET_MCS7830=m | ||
| 771 | CONFIG_USB_NET_RNDIS_HOST=m | ||
| 772 | CONFIG_USB_NET_CDC_SUBSET=m | ||
| 773 | CONFIG_USB_ALI_M5632=y | ||
| 774 | CONFIG_USB_AN2720=y | ||
| 775 | CONFIG_USB_BELKIN=y | ||
| 776 | CONFIG_USB_ARMLINUX=y | ||
| 777 | CONFIG_USB_EPSON2888=y | ||
| 778 | CONFIG_USB_KC2190=y | ||
| 779 | CONFIG_USB_NET_ZAURUS=m | ||
| 780 | # CONFIG_WAN is not set | 699 | # CONFIG_WAN is not set |
| 781 | CONFIG_PPP=m | 700 | # CONFIG_PPP is not set |
| 782 | # CONFIG_PPP_MULTILINK is not set | ||
| 783 | # CONFIG_PPP_FILTER is not set | ||
| 784 | CONFIG_PPP_ASYNC=m | ||
| 785 | CONFIG_PPP_SYNC_TTY=m | ||
| 786 | CONFIG_PPP_DEFLATE=m | ||
| 787 | CONFIG_PPP_BSDCOMP=m | ||
| 788 | CONFIG_PPP_MPPE=m | ||
| 789 | CONFIG_PPPOE=m | ||
| 790 | # CONFIG_PPPOL2TP is not set | ||
| 791 | # CONFIG_SLIP is not set | 701 | # CONFIG_SLIP is not set |
| 792 | CONFIG_SLHC=m | ||
| 793 | # CONFIG_NETCONSOLE is not set | 702 | # CONFIG_NETCONSOLE is not set |
| 794 | # CONFIG_NETPOLL is not set | 703 | # CONFIG_NETPOLL is not set |
| 795 | # CONFIG_NET_POLL_CONTROLLER is not set | 704 | # CONFIG_NET_POLL_CONTROLLER is not set |
| @@ -805,10 +714,7 @@ CONFIG_INPUT=y | |||
| 805 | # | 714 | # |
| 806 | # Userland interfaces | 715 | # Userland interfaces |
| 807 | # | 716 | # |
| 808 | CONFIG_INPUT_MOUSEDEV=y | 717 | # CONFIG_INPUT_MOUSEDEV is not set |
| 809 | CONFIG_INPUT_MOUSEDEV_PSAUX=y | ||
| 810 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
| 811 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
| 812 | # CONFIG_INPUT_JOYDEV is not set | 718 | # CONFIG_INPUT_JOYDEV is not set |
| 813 | CONFIG_INPUT_EVDEV=y | 719 | CONFIG_INPUT_EVDEV=y |
| 814 | # CONFIG_INPUT_EVBUG is not set | 720 | # CONFIG_INPUT_EVBUG is not set |
| @@ -818,47 +724,54 @@ CONFIG_INPUT_EVDEV=y | |||
| 818 | # | 724 | # |
| 819 | CONFIG_INPUT_KEYBOARD=y | 725 | CONFIG_INPUT_KEYBOARD=y |
| 820 | # CONFIG_KEYBOARD_ATKBD is not set | 726 | # CONFIG_KEYBOARD_ATKBD is not set |
| 821 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
| 822 | # CONFIG_KEYBOARD_LKKBD is not set | 727 | # CONFIG_KEYBOARD_LKKBD is not set |
| 823 | # CONFIG_KEYBOARD_XTKBD is not set | 728 | # CONFIG_KEYBOARD_GPIO is not set |
| 729 | # CONFIG_KEYBOARD_MATRIX is not set | ||
| 730 | # CONFIG_KEYBOARD_LM8323 is not set | ||
| 824 | # CONFIG_KEYBOARD_NEWTON is not set | 731 | # CONFIG_KEYBOARD_NEWTON is not set |
| 825 | # CONFIG_KEYBOARD_STOWAWAY is not set | 732 | # CONFIG_KEYBOARD_STOWAWAY is not set |
| 826 | # CONFIG_KEYBOARD_GPIO is not set | 733 | # CONFIG_KEYBOARD_SUNKBD is not set |
| 827 | CONFIG_INPUT_MOUSE=y | 734 | # CONFIG_KEYBOARD_XTKBD is not set |
| 828 | CONFIG_MOUSE_PS2=y | 735 | # CONFIG_INPUT_MOUSE is not set |
| 829 | CONFIG_MOUSE_PS2_ALPS=y | ||
| 830 | CONFIG_MOUSE_PS2_LOGIPS2PP=y | ||
| 831 | CONFIG_MOUSE_PS2_SYNAPTICS=y | ||
| 832 | CONFIG_MOUSE_PS2_TRACKPOINT=y | ||
| 833 | # CONFIG_MOUSE_PS2_ELANTECH is not set | ||
| 834 | # CONFIG_MOUSE_PS2_TOUCHKIT is not set | ||
| 835 | # CONFIG_MOUSE_SERIAL is not set | ||
| 836 | # CONFIG_MOUSE_APPLETOUCH is not set | ||
| 837 | # CONFIG_MOUSE_BCM5974 is not set | ||
| 838 | # CONFIG_MOUSE_VSXXXAA is not set | ||
| 839 | # CONFIG_MOUSE_GPIO is not set | ||
| 840 | # CONFIG_INPUT_JOYSTICK is not set | 736 | # CONFIG_INPUT_JOYSTICK is not set |
| 841 | # CONFIG_INPUT_TABLET is not set | 737 | # CONFIG_INPUT_TABLET is not set |
| 842 | # CONFIG_INPUT_TOUCHSCREEN is not set | 738 | CONFIG_INPUT_TOUCHSCREEN=y |
| 739 | CONFIG_TOUCHSCREEN_ADS7846=y | ||
| 740 | # CONFIG_TOUCHSCREEN_AD7877 is not set | ||
| 741 | # CONFIG_TOUCHSCREEN_AD7879_I2C is not set | ||
| 742 | # CONFIG_TOUCHSCREEN_AD7879_SPI is not set | ||
| 743 | # CONFIG_TOUCHSCREEN_AD7879 is not set | ||
| 744 | # CONFIG_TOUCHSCREEN_EETI is not set | ||
| 745 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | ||
| 746 | # CONFIG_TOUCHSCREEN_GUNZE is not set | ||
| 747 | # CONFIG_TOUCHSCREEN_ELO is not set | ||
| 748 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | ||
| 749 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | ||
| 750 | # CONFIG_TOUCHSCREEN_INEXIO is not set | ||
| 751 | # CONFIG_TOUCHSCREEN_MK712 is not set | ||
| 752 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set | ||
| 753 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | ||
| 754 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set | ||
| 755 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | ||
| 756 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set | ||
| 757 | # CONFIG_TOUCHSCREEN_TSC2007 is not set | ||
| 758 | # CONFIG_TOUCHSCREEN_W90X900 is not set | ||
| 843 | # CONFIG_INPUT_MISC is not set | 759 | # CONFIG_INPUT_MISC is not set |
| 844 | 760 | ||
| 845 | # | 761 | # |
| 846 | # Hardware I/O ports | 762 | # Hardware I/O ports |
| 847 | # | 763 | # |
| 848 | CONFIG_SERIO=y | 764 | # CONFIG_SERIO is not set |
| 849 | CONFIG_SERIO_SERPORT=y | ||
| 850 | CONFIG_SERIO_LIBPS2=y | ||
| 851 | # CONFIG_SERIO_RAW is not set | ||
| 852 | # CONFIG_GAMEPORT is not set | 765 | # CONFIG_GAMEPORT is not set |
| 853 | 766 | ||
| 854 | # | 767 | # |
| 855 | # Character devices | 768 | # Character devices |
| 856 | # | 769 | # |
| 857 | CONFIG_VT=y | 770 | CONFIG_VT=y |
| 858 | CONFIG_CONSOLE_TRANSLATIONS=y | 771 | # CONFIG_CONSOLE_TRANSLATIONS is not set |
| 859 | CONFIG_VT_CONSOLE=y | 772 | CONFIG_VT_CONSOLE=y |
| 860 | CONFIG_HW_CONSOLE=y | 773 | CONFIG_HW_CONSOLE=y |
| 861 | CONFIG_VT_HW_CONSOLE_BINDING=y | 774 | # CONFIG_VT_HW_CONSOLE_BINDING is not set |
| 862 | CONFIG_DEVKMEM=y | 775 | CONFIG_DEVKMEM=y |
| 863 | # CONFIG_SERIAL_NONSTANDARD is not set | 776 | # CONFIG_SERIAL_NONSTANDARD is not set |
| 864 | 777 | ||
| @@ -878,6 +791,7 @@ CONFIG_SERIAL_8250_RSA=y | |||
| 878 | # | 791 | # |
| 879 | # Non-8250 serial port support | 792 | # Non-8250 serial port support |
| 880 | # | 793 | # |
| 794 | # CONFIG_SERIAL_MAX3100 is not set | ||
| 881 | CONFIG_SERIAL_CORE=y | 795 | CONFIG_SERIAL_CORE=y |
| 882 | CONFIG_SERIAL_CORE_CONSOLE=y | 796 | CONFIG_SERIAL_CORE_CONSOLE=y |
| 883 | CONFIG_UNIX98_PTYS=y | 797 | CONFIG_UNIX98_PTYS=y |
| @@ -885,6 +799,7 @@ CONFIG_UNIX98_PTYS=y | |||
| 885 | # CONFIG_LEGACY_PTYS is not set | 799 | # CONFIG_LEGACY_PTYS is not set |
| 886 | # CONFIG_IPMI_HANDLER is not set | 800 | # CONFIG_IPMI_HANDLER is not set |
| 887 | CONFIG_HW_RANDOM=y | 801 | CONFIG_HW_RANDOM=y |
| 802 | # CONFIG_HW_RANDOM_TIMERIOMEM is not set | ||
| 888 | # CONFIG_R3964 is not set | 803 | # CONFIG_R3964 is not set |
| 889 | # CONFIG_RAW_DRIVER is not set | 804 | # CONFIG_RAW_DRIVER is not set |
| 890 | # CONFIG_TCG_TPM is not set | 805 | # CONFIG_TCG_TPM is not set |
| @@ -900,6 +815,7 @@ CONFIG_I2C_HELPER_AUTO=y | |||
| 900 | # | 815 | # |
| 901 | # I2C system bus drivers (mostly embedded / system-on-chip) | 816 | # I2C system bus drivers (mostly embedded / system-on-chip) |
| 902 | # | 817 | # |
| 818 | # CONFIG_I2C_DESIGNWARE is not set | ||
| 903 | # CONFIG_I2C_GPIO is not set | 819 | # CONFIG_I2C_GPIO is not set |
| 904 | # CONFIG_I2C_OCORES is not set | 820 | # CONFIG_I2C_OCORES is not set |
| 905 | CONFIG_I2C_OMAP=y | 821 | CONFIG_I2C_OMAP=y |
| @@ -925,8 +841,6 @@ CONFIG_I2C_OMAP=y | |||
| 925 | # CONFIG_SENSORS_PCF8574 is not set | 841 | # CONFIG_SENSORS_PCF8574 is not set |
| 926 | # CONFIG_PCF8575 is not set | 842 | # CONFIG_PCF8575 is not set |
| 927 | # CONFIG_SENSORS_PCA9539 is not set | 843 | # CONFIG_SENSORS_PCA9539 is not set |
| 928 | # CONFIG_SENSORS_PCF8591 is not set | ||
| 929 | # CONFIG_SENSORS_MAX6875 is not set | ||
| 930 | # CONFIG_SENSORS_TSL2550 is not set | 844 | # CONFIG_SENSORS_TSL2550 is not set |
| 931 | # CONFIG_I2C_DEBUG_CORE is not set | 845 | # CONFIG_I2C_DEBUG_CORE is not set |
| 932 | # CONFIG_I2C_DEBUG_ALGO is not set | 846 | # CONFIG_I2C_DEBUG_ALGO is not set |
| @@ -975,68 +889,8 @@ CONFIG_GPIO_TWL4030=y | |||
| 975 | # CONFIG_GPIO_MAX7301 is not set | 889 | # CONFIG_GPIO_MAX7301 is not set |
| 976 | # CONFIG_GPIO_MCP23S08 is not set | 890 | # CONFIG_GPIO_MCP23S08 is not set |
| 977 | # CONFIG_W1 is not set | 891 | # CONFIG_W1 is not set |
| 978 | CONFIG_POWER_SUPPLY=m | 892 | # CONFIG_POWER_SUPPLY is not set |
| 979 | # CONFIG_POWER_SUPPLY_DEBUG is not set | 893 | # CONFIG_HWMON is not set |
| 980 | # CONFIG_PDA_POWER is not set | ||
| 981 | # CONFIG_BATTERY_DS2760 is not set | ||
| 982 | # CONFIG_BATTERY_BQ27x00 is not set | ||
| 983 | CONFIG_HWMON=y | ||
| 984 | # CONFIG_HWMON_VID is not set | ||
| 985 | # CONFIG_SENSORS_AD7414 is not set | ||
| 986 | # CONFIG_SENSORS_AD7418 is not set | ||
| 987 | # CONFIG_SENSORS_ADCXX is not set | ||
| 988 | # CONFIG_SENSORS_ADM1021 is not set | ||
| 989 | # CONFIG_SENSORS_ADM1025 is not set | ||
| 990 | # CONFIG_SENSORS_ADM1026 is not set | ||
| 991 | # CONFIG_SENSORS_ADM1029 is not set | ||
| 992 | # CONFIG_SENSORS_ADM1031 is not set | ||
| 993 | # CONFIG_SENSORS_ADM9240 is not set | ||
| 994 | # CONFIG_SENSORS_ADT7462 is not set | ||
| 995 | # CONFIG_SENSORS_ADT7470 is not set | ||
| 996 | # CONFIG_SENSORS_ADT7473 is not set | ||
| 997 | # CONFIG_SENSORS_ADT7475 is not set | ||
| 998 | # CONFIG_SENSORS_ATXP1 is not set | ||
| 999 | # CONFIG_SENSORS_DS1621 is not set | ||
| 1000 | # CONFIG_SENSORS_F71805F is not set | ||
| 1001 | # CONFIG_SENSORS_F71882FG is not set | ||
| 1002 | # CONFIG_SENSORS_F75375S is not set | ||
| 1003 | # CONFIG_SENSORS_GL518SM is not set | ||
| 1004 | # CONFIG_SENSORS_GL520SM is not set | ||
| 1005 | # CONFIG_SENSORS_IT87 is not set | ||
| 1006 | # CONFIG_SENSORS_LM63 is not set | ||
| 1007 | # CONFIG_SENSORS_LM70 is not set | ||
| 1008 | # CONFIG_SENSORS_LM75 is not set | ||
| 1009 | # CONFIG_SENSORS_LM77 is not set | ||
| 1010 | # CONFIG_SENSORS_LM78 is not set | ||
| 1011 | # CONFIG_SENSORS_LM80 is not set | ||
| 1012 | # CONFIG_SENSORS_LM83 is not set | ||
| 1013 | # CONFIG_SENSORS_LM85 is not set | ||
| 1014 | # CONFIG_SENSORS_LM87 is not set | ||
| 1015 | # CONFIG_SENSORS_LM90 is not set | ||
| 1016 | # CONFIG_SENSORS_LM92 is not set | ||
| 1017 | # CONFIG_SENSORS_LM93 is not set | ||
| 1018 | # CONFIG_SENSORS_LTC4245 is not set | ||
| 1019 | # CONFIG_SENSORS_MAX1111 is not set | ||
| 1020 | # CONFIG_SENSORS_MAX1619 is not set | ||
| 1021 | # CONFIG_SENSORS_MAX6650 is not set | ||
| 1022 | # CONFIG_SENSORS_PC87360 is not set | ||
| 1023 | # CONFIG_SENSORS_PC87427 is not set | ||
| 1024 | # CONFIG_SENSORS_DME1737 is not set | ||
| 1025 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
| 1026 | # CONFIG_SENSORS_SMSC47M192 is not set | ||
| 1027 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
| 1028 | # CONFIG_SENSORS_ADS7828 is not set | ||
| 1029 | # CONFIG_SENSORS_THMC50 is not set | ||
| 1030 | # CONFIG_SENSORS_VT1211 is not set | ||
| 1031 | # CONFIG_SENSORS_W83781D is not set | ||
| 1032 | # CONFIG_SENSORS_W83791D is not set | ||
| 1033 | # CONFIG_SENSORS_W83792D is not set | ||
| 1034 | # CONFIG_SENSORS_W83793 is not set | ||
| 1035 | # CONFIG_SENSORS_W83L785TS is not set | ||
| 1036 | # CONFIG_SENSORS_W83L786NG is not set | ||
| 1037 | # CONFIG_SENSORS_W83627HF is not set | ||
| 1038 | # CONFIG_SENSORS_W83627EHF is not set | ||
| 1039 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
| 1040 | # CONFIG_THERMAL is not set | 894 | # CONFIG_THERMAL is not set |
| 1041 | # CONFIG_THERMAL_HWMON is not set | 895 | # CONFIG_THERMAL_HWMON is not set |
| 1042 | CONFIG_WATCHDOG=y | 896 | CONFIG_WATCHDOG=y |
| @@ -1046,7 +900,8 @@ CONFIG_WATCHDOG_NOWAYOUT=y | |||
| 1046 | # Watchdog Device Drivers | 900 | # Watchdog Device Drivers |
| 1047 | # | 901 | # |
| 1048 | # CONFIG_SOFT_WATCHDOG is not set | 902 | # CONFIG_SOFT_WATCHDOG is not set |
| 1049 | # CONFIG_OMAP_WATCHDOG is not set | 903 | CONFIG_OMAP_WATCHDOG=y |
| 904 | CONFIG_TWL4030_WATCHDOG=y | ||
| 1050 | 905 | ||
| 1051 | # | 906 | # |
| 1052 | # USB-based Watchdog Cards | 907 | # USB-based Watchdog Cards |
| @@ -1077,237 +932,9 @@ CONFIG_TWL4030_CORE=y | |||
| 1077 | # CONFIG_MFD_WM8400 is not set | 932 | # CONFIG_MFD_WM8400 is not set |
| 1078 | # CONFIG_MFD_WM8350_I2C is not set | 933 | # CONFIG_MFD_WM8350_I2C is not set |
| 1079 | # CONFIG_MFD_PCF50633 is not set | 934 | # CONFIG_MFD_PCF50633 is not set |
| 1080 | 935 | # CONFIG_AB3100_CORE is not set | |
| 1081 | # | 936 | # CONFIG_EZX_PCAP is not set |
| 1082 | # Multimedia devices | 937 | # CONFIG_MEDIA_SUPPORT is not set |
| 1083 | # | ||
| 1084 | |||
| 1085 | # | ||
| 1086 | # Multimedia core support | ||
| 1087 | # | ||
| 1088 | CONFIG_VIDEO_DEV=m | ||
| 1089 | CONFIG_VIDEO_V4L2_COMMON=m | ||
| 1090 | CONFIG_VIDEO_ALLOW_V4L1=y | ||
| 1091 | CONFIG_VIDEO_V4L1_COMPAT=y | ||
| 1092 | CONFIG_DVB_CORE=m | ||
| 1093 | CONFIG_VIDEO_MEDIA=m | ||
| 1094 | |||
| 1095 | # | ||
| 1096 | # Multimedia drivers | ||
| 1097 | # | ||
| 1098 | CONFIG_MEDIA_ATTACH=y | ||
| 1099 | CONFIG_MEDIA_TUNER=m | ||
| 1100 | # CONFIG_MEDIA_TUNER_CUSTOMIZE is not set | ||
| 1101 | CONFIG_MEDIA_TUNER_SIMPLE=m | ||
| 1102 | CONFIG_MEDIA_TUNER_TDA8290=m | ||
| 1103 | CONFIG_MEDIA_TUNER_TDA827X=m | ||
| 1104 | CONFIG_MEDIA_TUNER_TDA18271=m | ||
| 1105 | CONFIG_MEDIA_TUNER_TDA9887=m | ||
| 1106 | CONFIG_MEDIA_TUNER_TEA5761=m | ||
| 1107 | CONFIG_MEDIA_TUNER_TEA5767=m | ||
| 1108 | CONFIG_MEDIA_TUNER_MT20XX=m | ||
| 1109 | CONFIG_MEDIA_TUNER_MT2060=m | ||
| 1110 | CONFIG_MEDIA_TUNER_MT2266=m | ||
| 1111 | CONFIG_MEDIA_TUNER_QT1010=m | ||
| 1112 | CONFIG_MEDIA_TUNER_XC2028=m | ||
| 1113 | CONFIG_MEDIA_TUNER_XC5000=m | ||
| 1114 | CONFIG_MEDIA_TUNER_MXL5005S=m | ||
| 1115 | CONFIG_VIDEO_V4L2=m | ||
| 1116 | CONFIG_VIDEO_V4L1=m | ||
| 1117 | CONFIG_VIDEO_TVEEPROM=m | ||
| 1118 | CONFIG_VIDEO_TUNER=m | ||
| 1119 | CONFIG_VIDEO_CAPTURE_DRIVERS=y | ||
| 1120 | # CONFIG_VIDEO_ADV_DEBUG is not set | ||
| 1121 | # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set | ||
| 1122 | CONFIG_VIDEO_HELPER_CHIPS_AUTO=y | ||
| 1123 | CONFIG_VIDEO_MSP3400=m | ||
| 1124 | CONFIG_VIDEO_CS53L32A=m | ||
| 1125 | CONFIG_VIDEO_WM8775=m | ||
| 1126 | CONFIG_VIDEO_SAA711X=m | ||
| 1127 | CONFIG_VIDEO_CX25840=m | ||
| 1128 | CONFIG_VIDEO_CX2341X=m | ||
| 1129 | # CONFIG_VIDEO_VIVI is not set | ||
| 1130 | # CONFIG_VIDEO_CPIA is not set | ||
| 1131 | # CONFIG_VIDEO_CPIA2 is not set | ||
| 1132 | # CONFIG_VIDEO_SAA5246A is not set | ||
| 1133 | # CONFIG_VIDEO_SAA5249 is not set | ||
| 1134 | # CONFIG_VIDEO_AU0828 is not set | ||
| 1135 | # CONFIG_SOC_CAMERA is not set | ||
| 1136 | CONFIG_V4L_USB_DRIVERS=y | ||
| 1137 | CONFIG_USB_VIDEO_CLASS=m | ||
| 1138 | CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y | ||
| 1139 | # CONFIG_USB_GSPCA is not set | ||
| 1140 | CONFIG_VIDEO_PVRUSB2=m | ||
| 1141 | CONFIG_VIDEO_PVRUSB2_SYSFS=y | ||
| 1142 | CONFIG_VIDEO_PVRUSB2_DVB=y | ||
| 1143 | # CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set | ||
| 1144 | # CONFIG_VIDEO_EM28XX is not set | ||
| 1145 | CONFIG_VIDEO_USBVISION=m | ||
| 1146 | CONFIG_VIDEO_USBVIDEO=m | ||
| 1147 | CONFIG_USB_VICAM=m | ||
| 1148 | CONFIG_USB_IBMCAM=m | ||
| 1149 | CONFIG_USB_KONICAWC=m | ||
| 1150 | CONFIG_USB_QUICKCAM_MESSENGER=m | ||
| 1151 | # CONFIG_USB_ET61X251 is not set | ||
| 1152 | CONFIG_VIDEO_OVCAMCHIP=m | ||
| 1153 | CONFIG_USB_W9968CF=m | ||
| 1154 | CONFIG_USB_OV511=m | ||
| 1155 | CONFIG_USB_SE401=m | ||
| 1156 | CONFIG_USB_SN9C102=m | ||
| 1157 | CONFIG_USB_STV680=m | ||
| 1158 | # CONFIG_USB_ZC0301 is not set | ||
| 1159 | CONFIG_USB_PWC=m | ||
| 1160 | # CONFIG_USB_PWC_DEBUG is not set | ||
| 1161 | CONFIG_USB_ZR364XX=m | ||
| 1162 | # CONFIG_USB_STKWEBCAM is not set | ||
| 1163 | # CONFIG_USB_S2255 is not set | ||
| 1164 | CONFIG_RADIO_ADAPTERS=y | ||
| 1165 | # CONFIG_USB_DSBR is not set | ||
| 1166 | # CONFIG_USB_SI470X is not set | ||
| 1167 | # CONFIG_USB_MR800 is not set | ||
| 1168 | # CONFIG_RADIO_TEA5764 is not set | ||
| 1169 | # CONFIG_DVB_DYNAMIC_MINORS is not set | ||
| 1170 | CONFIG_DVB_CAPTURE_DRIVERS=y | ||
| 1171 | # CONFIG_TTPCI_EEPROM is not set | ||
| 1172 | |||
| 1173 | # | ||
| 1174 | # Supported USB Adapters | ||
| 1175 | # | ||
| 1176 | CONFIG_DVB_USB=m | ||
| 1177 | # CONFIG_DVB_USB_DEBUG is not set | ||
| 1178 | CONFIG_DVB_USB_A800=m | ||
| 1179 | CONFIG_DVB_USB_DIBUSB_MB=m | ||
| 1180 | # CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set | ||
| 1181 | CONFIG_DVB_USB_DIBUSB_MC=m | ||
| 1182 | CONFIG_DVB_USB_DIB0700=m | ||
| 1183 | CONFIG_DVB_USB_UMT_010=m | ||
| 1184 | CONFIG_DVB_USB_CXUSB=m | ||
| 1185 | CONFIG_DVB_USB_M920X=m | ||
| 1186 | CONFIG_DVB_USB_GL861=m | ||
| 1187 | CONFIG_DVB_USB_AU6610=m | ||
| 1188 | CONFIG_DVB_USB_DIGITV=m | ||
| 1189 | CONFIG_DVB_USB_VP7045=m | ||
| 1190 | CONFIG_DVB_USB_VP702X=m | ||
| 1191 | CONFIG_DVB_USB_GP8PSK=m | ||
| 1192 | CONFIG_DVB_USB_NOVA_T_USB2=m | ||
| 1193 | CONFIG_DVB_USB_TTUSB2=m | ||
| 1194 | CONFIG_DVB_USB_DTT200U=m | ||
| 1195 | CONFIG_DVB_USB_OPERA1=m | ||
| 1196 | CONFIG_DVB_USB_AF9005=m | ||
| 1197 | CONFIG_DVB_USB_AF9005_REMOTE=m | ||
| 1198 | # CONFIG_DVB_USB_DW2102 is not set | ||
| 1199 | # CONFIG_DVB_USB_CINERGY_T2 is not set | ||
| 1200 | # CONFIG_DVB_USB_ANYSEE is not set | ||
| 1201 | # CONFIG_DVB_USB_DTV5100 is not set | ||
| 1202 | # CONFIG_DVB_USB_AF9015 is not set | ||
| 1203 | # CONFIG_DVB_SIANO_SMS1XXX is not set | ||
| 1204 | |||
| 1205 | # | ||
| 1206 | # Supported FlexCopII (B2C2) Adapters | ||
| 1207 | # | ||
| 1208 | # CONFIG_DVB_B2C2_FLEXCOP is not set | ||
| 1209 | |||
| 1210 | # | ||
| 1211 | # Supported DVB Frontends | ||
| 1212 | # | ||
| 1213 | |||
| 1214 | # | ||
| 1215 | # Customise DVB Frontends | ||
| 1216 | # | ||
| 1217 | # CONFIG_DVB_FE_CUSTOMISE is not set | ||
| 1218 | |||
| 1219 | # | ||
| 1220 | # Multistandard (satellite) frontends | ||
| 1221 | # | ||
| 1222 | # CONFIG_DVB_STB0899 is not set | ||
| 1223 | # CONFIG_DVB_STB6100 is not set | ||
| 1224 | |||
| 1225 | # | ||
| 1226 | # DVB-S (satellite) frontends | ||
| 1227 | # | ||
| 1228 | CONFIG_DVB_CX24110=m | ||
| 1229 | CONFIG_DVB_CX24123=m | ||
| 1230 | CONFIG_DVB_MT312=m | ||
| 1231 | CONFIG_DVB_S5H1420=m | ||
| 1232 | # CONFIG_DVB_STV0288 is not set | ||
| 1233 | # CONFIG_DVB_STB6000 is not set | ||
| 1234 | CONFIG_DVB_STV0299=m | ||
| 1235 | CONFIG_DVB_TDA8083=m | ||
| 1236 | CONFIG_DVB_TDA10086=m | ||
| 1237 | # CONFIG_DVB_TDA8261 is not set | ||
| 1238 | CONFIG_DVB_VES1X93=m | ||
| 1239 | CONFIG_DVB_TUNER_ITD1000=m | ||
| 1240 | # CONFIG_DVB_TUNER_CX24113 is not set | ||
| 1241 | CONFIG_DVB_TDA826X=m | ||
| 1242 | CONFIG_DVB_TUA6100=m | ||
| 1243 | # CONFIG_DVB_CX24116 is not set | ||
| 1244 | # CONFIG_DVB_SI21XX is not set | ||
| 1245 | |||
| 1246 | # | ||
| 1247 | # DVB-T (terrestrial) frontends | ||
| 1248 | # | ||
| 1249 | CONFIG_DVB_SP8870=m | ||
| 1250 | CONFIG_DVB_SP887X=m | ||
| 1251 | CONFIG_DVB_CX22700=m | ||
| 1252 | CONFIG_DVB_CX22702=m | ||
| 1253 | # CONFIG_DVB_DRX397XD is not set | ||
| 1254 | CONFIG_DVB_L64781=m | ||
| 1255 | CONFIG_DVB_TDA1004X=m | ||
| 1256 | CONFIG_DVB_NXT6000=m | ||
| 1257 | CONFIG_DVB_MT352=m | ||
| 1258 | CONFIG_DVB_ZL10353=m | ||
| 1259 | CONFIG_DVB_DIB3000MB=m | ||
| 1260 | CONFIG_DVB_DIB3000MC=m | ||
| 1261 | CONFIG_DVB_DIB7000M=m | ||
| 1262 | CONFIG_DVB_DIB7000P=m | ||
| 1263 | CONFIG_DVB_TDA10048=m | ||
| 1264 | |||
| 1265 | # | ||
| 1266 | # DVB-C (cable) frontends | ||
| 1267 | # | ||
| 1268 | CONFIG_DVB_VES1820=m | ||
| 1269 | CONFIG_DVB_TDA10021=m | ||
| 1270 | CONFIG_DVB_TDA10023=m | ||
| 1271 | CONFIG_DVB_STV0297=m | ||
| 1272 | |||
| 1273 | # | ||
| 1274 | # ATSC (North American/Korean Terrestrial/Cable DTV) frontends | ||
| 1275 | # | ||
| 1276 | CONFIG_DVB_NXT200X=m | ||
| 1277 | # CONFIG_DVB_OR51211 is not set | ||
| 1278 | # CONFIG_DVB_OR51132 is not set | ||
| 1279 | CONFIG_DVB_BCM3510=m | ||
| 1280 | CONFIG_DVB_LGDT330X=m | ||
| 1281 | # CONFIG_DVB_LGDT3304 is not set | ||
| 1282 | CONFIG_DVB_S5H1409=m | ||
| 1283 | CONFIG_DVB_AU8522=m | ||
| 1284 | CONFIG_DVB_S5H1411=m | ||
| 1285 | |||
| 1286 | # | ||
| 1287 | # ISDB-T (terrestrial) frontends | ||
| 1288 | # | ||
| 1289 | # CONFIG_DVB_S921 is not set | ||
| 1290 | |||
| 1291 | # | ||
| 1292 | # Digital terrestrial only tuners/PLL | ||
| 1293 | # | ||
| 1294 | CONFIG_DVB_PLL=m | ||
| 1295 | CONFIG_DVB_TUNER_DIB0070=m | ||
| 1296 | |||
| 1297 | # | ||
| 1298 | # SEC control devices for DVB-S | ||
| 1299 | # | ||
| 1300 | CONFIG_DVB_LNBP21=m | ||
| 1301 | # CONFIG_DVB_ISL6405 is not set | ||
| 1302 | CONFIG_DVB_ISL6421=m | ||
| 1303 | # CONFIG_DVB_LGS8GL5 is not set | ||
| 1304 | |||
| 1305 | # | ||
| 1306 | # Tools to develop new frontends | ||
| 1307 | # | ||
| 1308 | # CONFIG_DVB_DUMMY_FE is not set | ||
| 1309 | # CONFIG_DVB_AF9013 is not set | ||
| 1310 | # CONFIG_DAB is not set | ||
| 1311 | 938 | ||
| 1312 | # | 939 | # |
| 1313 | # Graphics support | 940 | # Graphics support |
| @@ -1366,53 +993,10 @@ CONFIG_LOGO=y | |||
| 1366 | CONFIG_LOGO_LINUX_MONO=y | 993 | CONFIG_LOGO_LINUX_MONO=y |
| 1367 | CONFIG_LOGO_LINUX_VGA16=y | 994 | CONFIG_LOGO_LINUX_VGA16=y |
| 1368 | CONFIG_LOGO_LINUX_CLUT224=y | 995 | CONFIG_LOGO_LINUX_CLUT224=y |
| 1369 | CONFIG_SOUND=y | 996 | # CONFIG_SOUND is not set |
| 1370 | CONFIG_SOUND_OSS_CORE=y | ||
| 1371 | CONFIG_SND=y | ||
| 1372 | CONFIG_SND_TIMER=y | ||
| 1373 | CONFIG_SND_PCM=y | ||
| 1374 | CONFIG_SND_HWDEP=y | ||
| 1375 | CONFIG_SND_RAWMIDI=y | ||
| 1376 | CONFIG_SND_SEQUENCER=m | ||
| 1377 | # CONFIG_SND_SEQ_DUMMY is not set | ||
| 1378 | CONFIG_SND_OSSEMUL=y | ||
| 1379 | CONFIG_SND_MIXER_OSS=y | ||
| 1380 | CONFIG_SND_PCM_OSS=y | ||
| 1381 | CONFIG_SND_PCM_OSS_PLUGINS=y | ||
| 1382 | CONFIG_SND_SEQUENCER_OSS=y | ||
| 1383 | # CONFIG_SND_HRTIMER is not set | ||
| 1384 | # CONFIG_SND_DYNAMIC_MINORS is not set | ||
| 1385 | CONFIG_SND_SUPPORT_OLD_API=y | ||
| 1386 | CONFIG_SND_VERBOSE_PROCFS=y | ||
| 1387 | CONFIG_SND_VERBOSE_PRINTK=y | ||
| 1388 | CONFIG_SND_DEBUG=y | ||
| 1389 | # CONFIG_SND_DEBUG_VERBOSE is not set | ||
| 1390 | # CONFIG_SND_PCM_XRUN_DEBUG is not set | ||
| 1391 | CONFIG_SND_DRIVERS=y | ||
| 1392 | # CONFIG_SND_DUMMY is not set | ||
| 1393 | # CONFIG_SND_VIRMIDI is not set | ||
| 1394 | # CONFIG_SND_MTPAV is not set | ||
| 1395 | # CONFIG_SND_SERIAL_U16550 is not set | ||
| 1396 | # CONFIG_SND_MPU401 is not set | ||
| 1397 | CONFIG_SND_ARM=y | ||
| 1398 | CONFIG_SND_SPI=y | ||
| 1399 | CONFIG_SND_USB=y | ||
| 1400 | CONFIG_SND_USB_AUDIO=y | ||
| 1401 | CONFIG_SND_USB_CAIAQ=m | ||
| 1402 | CONFIG_SND_USB_CAIAQ_INPUT=y | ||
| 1403 | CONFIG_SND_SOC=y | ||
| 1404 | CONFIG_SND_OMAP_SOC=y | ||
| 1405 | CONFIG_SND_OMAP_SOC_MCBSP=y | ||
| 1406 | # CONFIG_SND_OMAP_SOC_OVERO is not set | ||
| 1407 | CONFIG_SND_OMAP_SOC_SDP3430=y | ||
| 1408 | # CONFIG_SND_OMAP_SOC_OMAP3_PANDORA is not set | ||
| 1409 | CONFIG_SND_SOC_I2C_AND_SPI=y | ||
| 1410 | # CONFIG_SND_SOC_ALL_CODECS is not set | ||
| 1411 | CONFIG_SND_SOC_TWL4030=y | ||
| 1412 | # CONFIG_SOUND_PRIME is not set | ||
| 1413 | CONFIG_HID_SUPPORT=y | 997 | CONFIG_HID_SUPPORT=y |
| 1414 | CONFIG_HID=y | 998 | CONFIG_HID=y |
| 1415 | CONFIG_HID_DEBUG=y | 999 | # CONFIG_HID_DEBUG is not set |
| 1416 | # CONFIG_HIDRAW is not set | 1000 | # CONFIG_HIDRAW is not set |
| 1417 | 1001 | ||
| 1418 | # | 1002 | # |
| @@ -1425,35 +1009,35 @@ CONFIG_USB_HID=y | |||
| 1425 | # | 1009 | # |
| 1426 | # Special HID drivers | 1010 | # Special HID drivers |
| 1427 | # | 1011 | # |
| 1428 | CONFIG_HID_COMPAT=y | 1012 | # CONFIG_HID_A4TECH is not set |
| 1429 | CONFIG_HID_A4TECH=y | 1013 | # CONFIG_HID_APPLE is not set |
| 1430 | CONFIG_HID_APPLE=y | 1014 | # CONFIG_HID_BELKIN is not set |
| 1431 | CONFIG_HID_BELKIN=y | 1015 | # CONFIG_HID_CHERRY is not set |
| 1432 | CONFIG_HID_CHERRY=y | 1016 | # CONFIG_HID_CHICONY is not set |
| 1433 | CONFIG_HID_CHICONY=y | 1017 | # CONFIG_HID_CYPRESS is not set |
| 1434 | CONFIG_HID_CYPRESS=y | 1018 | # CONFIG_HID_DRAGONRISE is not set |
| 1435 | CONFIG_HID_EZKEY=y | 1019 | # CONFIG_HID_EZKEY is not set |
| 1436 | CONFIG_HID_GYRATION=y | 1020 | # CONFIG_HID_KYE is not set |
| 1437 | CONFIG_HID_LOGITECH=y | 1021 | # CONFIG_HID_GYRATION is not set |
| 1438 | # CONFIG_LOGITECH_FF is not set | 1022 | # CONFIG_HID_KENSINGTON is not set |
| 1439 | # CONFIG_LOGIRUMBLEPAD2_FF is not set | 1023 | # CONFIG_HID_LOGITECH is not set |
| 1440 | CONFIG_HID_MICROSOFT=y | 1024 | # CONFIG_HID_MICROSOFT is not set |
| 1441 | CONFIG_HID_MONTEREY=y | 1025 | # CONFIG_HID_MONTEREY is not set |
| 1442 | # CONFIG_HID_NTRIG is not set | 1026 | # CONFIG_HID_NTRIG is not set |
| 1443 | CONFIG_HID_PANTHERLORD=y | 1027 | # CONFIG_HID_PANTHERLORD is not set |
| 1444 | # CONFIG_PANTHERLORD_FF is not set | 1028 | # CONFIG_HID_PETALYNX is not set |
| 1445 | CONFIG_HID_PETALYNX=y | 1029 | # CONFIG_HID_SAMSUNG is not set |
| 1446 | CONFIG_HID_SAMSUNG=y | 1030 | # CONFIG_HID_SONY is not set |
| 1447 | CONFIG_HID_SONY=y | 1031 | # CONFIG_HID_SUNPLUS is not set |
| 1448 | CONFIG_HID_SUNPLUS=y | 1032 | # CONFIG_HID_GREENASIA is not set |
| 1449 | # CONFIG_GREENASIA_FF is not set | 1033 | # CONFIG_HID_SMARTJOYPLUS is not set |
| 1450 | # CONFIG_HID_TOPSEED is not set | 1034 | # CONFIG_HID_TOPSEED is not set |
| 1451 | # CONFIG_THRUSTMASTER_FF is not set | 1035 | # CONFIG_HID_THRUSTMASTER is not set |
| 1452 | # CONFIG_ZEROPLUS_FF is not set | 1036 | # CONFIG_HID_ZEROPLUS is not set |
| 1453 | CONFIG_USB_SUPPORT=y | 1037 | CONFIG_USB_SUPPORT=y |
| 1454 | CONFIG_USB_ARCH_HAS_HCD=y | 1038 | CONFIG_USB_ARCH_HAS_HCD=y |
| 1455 | CONFIG_USB_ARCH_HAS_OHCI=y | 1039 | CONFIG_USB_ARCH_HAS_OHCI=y |
| 1456 | # CONFIG_USB_ARCH_HAS_EHCI is not set | 1040 | CONFIG_USB_ARCH_HAS_EHCI=y |
| 1457 | CONFIG_USB=y | 1041 | CONFIG_USB=y |
| 1458 | CONFIG_USB_DEBUG=y | 1042 | CONFIG_USB_DEBUG=y |
| 1459 | CONFIG_USB_ANNOUNCE_NEW_DEVICES=y | 1043 | CONFIG_USB_ANNOUNCE_NEW_DEVICES=y |
| @@ -1461,9 +1045,9 @@ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y | |||
| 1461 | # | 1045 | # |
| 1462 | # Miscellaneous USB options | 1046 | # Miscellaneous USB options |
| 1463 | # | 1047 | # |
| 1464 | CONFIG_USB_DEVICEFS=y | 1048 | # CONFIG_USB_DEVICEFS is not set |
| 1465 | CONFIG_USB_DEVICE_CLASS=y | 1049 | # CONFIG_USB_DEVICE_CLASS is not set |
| 1466 | CONFIG_USB_DYNAMIC_MINORS=y | 1050 | # CONFIG_USB_DYNAMIC_MINORS is not set |
| 1467 | CONFIG_USB_SUSPEND=y | 1051 | CONFIG_USB_SUSPEND=y |
| 1468 | CONFIG_USB_OTG=y | 1052 | CONFIG_USB_OTG=y |
| 1469 | # CONFIG_USB_OTG_WHITELIST is not set | 1053 | # CONFIG_USB_OTG_WHITELIST is not set |
| @@ -1476,8 +1060,12 @@ CONFIG_USB_MON=y | |||
| 1476 | # USB Host Controller Drivers | 1060 | # USB Host Controller Drivers |
| 1477 | # | 1061 | # |
| 1478 | # CONFIG_USB_C67X00_HCD is not set | 1062 | # CONFIG_USB_C67X00_HCD is not set |
| 1063 | CONFIG_USB_EHCI_HCD=m | ||
| 1064 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set | ||
| 1065 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | ||
| 1479 | # CONFIG_USB_OXU210HP_HCD is not set | 1066 | # CONFIG_USB_OXU210HP_HCD is not set |
| 1480 | # CONFIG_USB_ISP116X_HCD is not set | 1067 | # CONFIG_USB_ISP116X_HCD is not set |
| 1068 | # CONFIG_USB_ISP1760_HCD is not set | ||
| 1481 | # CONFIG_USB_OHCI_HCD is not set | 1069 | # CONFIG_USB_OHCI_HCD is not set |
| 1482 | # CONFIG_USB_SL811_HCD is not set | 1070 | # CONFIG_USB_SL811_HCD is not set |
| 1483 | # CONFIG_USB_R8A66597_HCD is not set | 1071 | # CONFIG_USB_R8A66597_HCD is not set |
| @@ -1493,23 +1081,25 @@ CONFIG_USB_MUSB_SOC=y | |||
| 1493 | CONFIG_USB_MUSB_OTG=y | 1081 | CONFIG_USB_MUSB_OTG=y |
| 1494 | CONFIG_USB_GADGET_MUSB_HDRC=y | 1082 | CONFIG_USB_GADGET_MUSB_HDRC=y |
| 1495 | CONFIG_USB_MUSB_HDRC_HCD=y | 1083 | CONFIG_USB_MUSB_HDRC_HCD=y |
| 1496 | CONFIG_MUSB_PIO_ONLY=y | 1084 | # CONFIG_MUSB_PIO_ONLY is not set |
| 1085 | CONFIG_USB_INVENTRA_DMA=y | ||
| 1086 | # CONFIG_USB_TI_CPPI_DMA is not set | ||
| 1497 | # CONFIG_USB_MUSB_DEBUG is not set | 1087 | # CONFIG_USB_MUSB_DEBUG is not set |
| 1498 | 1088 | ||
| 1499 | # | 1089 | # |
| 1500 | # USB Device Class drivers | 1090 | # USB Device Class drivers |
| 1501 | # | 1091 | # |
| 1502 | # CONFIG_USB_ACM is not set | 1092 | # CONFIG_USB_ACM is not set |
| 1503 | CONFIG_USB_PRINTER=y | 1093 | # CONFIG_USB_PRINTER is not set |
| 1504 | CONFIG_USB_WDM=y | 1094 | # CONFIG_USB_WDM is not set |
| 1505 | # CONFIG_USB_TMC is not set | 1095 | # CONFIG_USB_TMC is not set |
| 1506 | 1096 | ||
| 1507 | # | 1097 | # |
| 1508 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; | 1098 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may |
| 1509 | # | 1099 | # |
| 1510 | 1100 | ||
| 1511 | # | 1101 | # |
| 1512 | # see USB_STORAGE Help for more information | 1102 | # also be needed; see USB_STORAGE Help for more info |
| 1513 | # | 1103 | # |
| 1514 | CONFIG_USB_STORAGE=y | 1104 | CONFIG_USB_STORAGE=y |
| 1515 | # CONFIG_USB_STORAGE_DEBUG is not set | 1105 | # CONFIG_USB_STORAGE_DEBUG is not set |
| @@ -1551,14 +1141,14 @@ CONFIG_USB_STORAGE=y | |||
| 1551 | # CONFIG_USB_LED is not set | 1141 | # CONFIG_USB_LED is not set |
| 1552 | # CONFIG_USB_CYPRESS_CY7C63 is not set | 1142 | # CONFIG_USB_CYPRESS_CY7C63 is not set |
| 1553 | # CONFIG_USB_CYTHERM is not set | 1143 | # CONFIG_USB_CYTHERM is not set |
| 1554 | # CONFIG_USB_PHIDGET is not set | ||
| 1555 | # CONFIG_USB_IDMOUSE is not set | 1144 | # CONFIG_USB_IDMOUSE is not set |
| 1556 | # CONFIG_USB_FTDI_ELAN is not set | 1145 | # CONFIG_USB_FTDI_ELAN is not set |
| 1557 | # CONFIG_USB_APPLEDISPLAY is not set | 1146 | # CONFIG_USB_APPLEDISPLAY is not set |
| 1147 | # CONFIG_USB_SISUSBVGA is not set | ||
| 1558 | # CONFIG_USB_LD is not set | 1148 | # CONFIG_USB_LD is not set |
| 1559 | # CONFIG_USB_TRANCEVIBRATOR is not set | 1149 | # CONFIG_USB_TRANCEVIBRATOR is not set |
| 1560 | # CONFIG_USB_IOWARRIOR is not set | 1150 | # CONFIG_USB_IOWARRIOR is not set |
| 1561 | # CONFIG_USB_TEST is not set | 1151 | CONFIG_USB_TEST=y |
| 1562 | # CONFIG_USB_ISIGHTFW is not set | 1152 | # CONFIG_USB_ISIGHTFW is not set |
| 1563 | # CONFIG_USB_VST is not set | 1153 | # CONFIG_USB_VST is not set |
| 1564 | CONFIG_USB_GADGET=y | 1154 | CONFIG_USB_GADGET=y |
| @@ -1574,25 +1164,29 @@ CONFIG_USB_GADGET_SELECTED=y | |||
| 1574 | # CONFIG_USB_GADGET_OMAP is not set | 1164 | # CONFIG_USB_GADGET_OMAP is not set |
| 1575 | # CONFIG_USB_GADGET_PXA25X is not set | 1165 | # CONFIG_USB_GADGET_PXA25X is not set |
| 1576 | # CONFIG_USB_GADGET_PXA27X is not set | 1166 | # CONFIG_USB_GADGET_PXA27X is not set |
| 1577 | # CONFIG_USB_GADGET_S3C2410 is not set | 1167 | # CONFIG_USB_GADGET_S3C_HSOTG is not set |
| 1578 | # CONFIG_USB_GADGET_IMX is not set | 1168 | # CONFIG_USB_GADGET_IMX is not set |
| 1169 | # CONFIG_USB_GADGET_S3C2410 is not set | ||
| 1579 | # CONFIG_USB_GADGET_M66592 is not set | 1170 | # CONFIG_USB_GADGET_M66592 is not set |
| 1580 | # CONFIG_USB_GADGET_AMD5536UDC is not set | 1171 | # CONFIG_USB_GADGET_AMD5536UDC is not set |
| 1581 | # CONFIG_USB_GADGET_FSL_QE is not set | 1172 | # CONFIG_USB_GADGET_FSL_QE is not set |
| 1582 | # CONFIG_USB_GADGET_CI13XXX is not set | 1173 | # CONFIG_USB_GADGET_CI13XXX is not set |
| 1583 | # CONFIG_USB_GADGET_NET2280 is not set | 1174 | # CONFIG_USB_GADGET_NET2280 is not set |
| 1584 | # CONFIG_USB_GADGET_GOKU is not set | 1175 | # CONFIG_USB_GADGET_GOKU is not set |
| 1176 | # CONFIG_USB_GADGET_LANGWELL is not set | ||
| 1585 | # CONFIG_USB_GADGET_DUMMY_HCD is not set | 1177 | # CONFIG_USB_GADGET_DUMMY_HCD is not set |
| 1586 | CONFIG_USB_GADGET_DUALSPEED=y | 1178 | CONFIG_USB_GADGET_DUALSPEED=y |
| 1587 | # CONFIG_USB_ZERO is not set | 1179 | # CONFIG_USB_ZERO is not set |
| 1588 | CONFIG_USB_ETH=y | 1180 | # CONFIG_USB_AUDIO is not set |
| 1181 | CONFIG_USB_ETH=m | ||
| 1589 | CONFIG_USB_ETH_RNDIS=y | 1182 | CONFIG_USB_ETH_RNDIS=y |
| 1590 | # CONFIG_USB_GADGETFS is not set | 1183 | CONFIG_USB_GADGETFS=m |
| 1591 | # CONFIG_USB_FILE_STORAGE is not set | 1184 | CONFIG_USB_FILE_STORAGE=m |
| 1592 | # CONFIG_USB_G_SERIAL is not set | 1185 | # CONFIG_USB_FILE_STORAGE_TEST is not set |
| 1186 | CONFIG_USB_G_SERIAL=m | ||
| 1593 | # CONFIG_USB_MIDI_GADGET is not set | 1187 | # CONFIG_USB_MIDI_GADGET is not set |
| 1594 | # CONFIG_USB_G_PRINTER is not set | 1188 | # CONFIG_USB_G_PRINTER is not set |
| 1595 | # CONFIG_USB_CDC_COMPOSITE is not set | 1189 | CONFIG_USB_CDC_COMPOSITE=m |
| 1596 | 1190 | ||
| 1597 | # | 1191 | # |
| 1598 | # OTG and related infrastructure | 1192 | # OTG and related infrastructure |
| @@ -1601,6 +1195,7 @@ CONFIG_USB_OTG_UTILS=y | |||
| 1601 | # CONFIG_USB_GPIO_VBUS is not set | 1195 | # CONFIG_USB_GPIO_VBUS is not set |
| 1602 | # CONFIG_ISP1301_OMAP is not set | 1196 | # CONFIG_ISP1301_OMAP is not set |
| 1603 | CONFIG_TWL4030_USB=y | 1197 | CONFIG_TWL4030_USB=y |
| 1198 | # CONFIG_NOP_USB_XCEIV is not set | ||
| 1604 | CONFIG_MMC=y | 1199 | CONFIG_MMC=y |
| 1605 | # CONFIG_MMC_DEBUG is not set | 1200 | # CONFIG_MMC_DEBUG is not set |
| 1606 | CONFIG_MMC_UNSAFE_RESUME=y | 1201 | CONFIG_MMC_UNSAFE_RESUME=y |
| @@ -1617,7 +1212,6 @@ CONFIG_SDIO_UART=y | |||
| 1617 | # MMC/SD/SDIO Host Controller Drivers | 1212 | # MMC/SD/SDIO Host Controller Drivers |
| 1618 | # | 1213 | # |
| 1619 | # CONFIG_MMC_SDHCI is not set | 1214 | # CONFIG_MMC_SDHCI is not set |
| 1620 | # CONFIG_MMC_OMAP is not set | ||
| 1621 | CONFIG_MMC_OMAP_HS=y | 1215 | CONFIG_MMC_OMAP_HS=y |
| 1622 | # CONFIG_MMC_SPI is not set | 1216 | # CONFIG_MMC_SPI is not set |
| 1623 | # CONFIG_MEMSTICK is not set | 1217 | # CONFIG_MEMSTICK is not set |
| @@ -1628,9 +1222,16 @@ CONFIG_LEDS_CLASS=y | |||
| 1628 | # | 1222 | # |
| 1629 | # LED drivers | 1223 | # LED drivers |
| 1630 | # | 1224 | # |
| 1225 | # CONFIG_LEDS_OMAP_DEBUG is not set | ||
| 1226 | # CONFIG_LEDS_OMAP is not set | ||
| 1227 | # CONFIG_LEDS_OMAP_PWM is not set | ||
| 1631 | # CONFIG_LEDS_PCA9532 is not set | 1228 | # CONFIG_LEDS_PCA9532 is not set |
| 1632 | CONFIG_LEDS_GPIO=y | 1229 | CONFIG_LEDS_GPIO=y |
| 1230 | CONFIG_LEDS_GPIO_PLATFORM=y | ||
| 1231 | # CONFIG_LEDS_LP3944 is not set | ||
| 1633 | # CONFIG_LEDS_PCA955X is not set | 1232 | # CONFIG_LEDS_PCA955X is not set |
| 1233 | # CONFIG_LEDS_DAC124S085 is not set | ||
| 1234 | # CONFIG_LEDS_BD2802 is not set | ||
| 1634 | 1235 | ||
| 1635 | # | 1236 | # |
| 1636 | # LED Triggers | 1237 | # LED Triggers |
| @@ -1639,7 +1240,12 @@ CONFIG_LEDS_TRIGGERS=y | |||
| 1639 | CONFIG_LEDS_TRIGGER_TIMER=y | 1240 | CONFIG_LEDS_TRIGGER_TIMER=y |
| 1640 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | 1241 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y |
| 1641 | # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set | 1242 | # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set |
| 1243 | # CONFIG_LEDS_TRIGGER_GPIO is not set | ||
| 1642 | # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set | 1244 | # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set |
| 1245 | |||
| 1246 | # | ||
| 1247 | # iptables trigger is under Netfilter config (LED target) | ||
| 1248 | # | ||
| 1643 | CONFIG_RTC_LIB=y | 1249 | CONFIG_RTC_LIB=y |
| 1644 | CONFIG_RTC_CLASS=y | 1250 | CONFIG_RTC_CLASS=y |
| 1645 | CONFIG_RTC_HCTOSYS=y | 1251 | CONFIG_RTC_HCTOSYS=y |
| @@ -1672,6 +1278,7 @@ CONFIG_RTC_DRV_TWL4030=y | |||
| 1672 | # CONFIG_RTC_DRV_S35390A is not set | 1278 | # CONFIG_RTC_DRV_S35390A is not set |
| 1673 | # CONFIG_RTC_DRV_FM3130 is not set | 1279 | # CONFIG_RTC_DRV_FM3130 is not set |
| 1674 | # CONFIG_RTC_DRV_RX8581 is not set | 1280 | # CONFIG_RTC_DRV_RX8581 is not set |
| 1281 | # CONFIG_RTC_DRV_RX8025 is not set | ||
| 1675 | 1282 | ||
| 1676 | # | 1283 | # |
| 1677 | # SPI RTC drivers | 1284 | # SPI RTC drivers |
| @@ -1703,6 +1310,7 @@ CONFIG_RTC_DRV_TWL4030=y | |||
| 1703 | # on-CPU RTC drivers | 1310 | # on-CPU RTC drivers |
| 1704 | # | 1311 | # |
| 1705 | # CONFIG_DMADEVICES is not set | 1312 | # CONFIG_DMADEVICES is not set |
| 1313 | # CONFIG_AUXDISPLAY is not set | ||
| 1706 | CONFIG_REGULATOR=y | 1314 | CONFIG_REGULATOR=y |
| 1707 | # CONFIG_REGULATOR_DEBUG is not set | 1315 | # CONFIG_REGULATOR_DEBUG is not set |
| 1708 | # CONFIG_REGULATOR_FIXED_VOLTAGE is not set | 1316 | # CONFIG_REGULATOR_FIXED_VOLTAGE is not set |
| @@ -1711,32 +1319,36 @@ CONFIG_REGULATOR=y | |||
| 1711 | # CONFIG_REGULATOR_BQ24022 is not set | 1319 | # CONFIG_REGULATOR_BQ24022 is not set |
| 1712 | # CONFIG_REGULATOR_MAX1586 is not set | 1320 | # CONFIG_REGULATOR_MAX1586 is not set |
| 1713 | CONFIG_REGULATOR_TWL4030=y | 1321 | CONFIG_REGULATOR_TWL4030=y |
| 1322 | # CONFIG_REGULATOR_LP3971 is not set | ||
| 1714 | # CONFIG_UIO is not set | 1323 | # CONFIG_UIO is not set |
| 1715 | # CONFIG_STAGING is not set | 1324 | # CONFIG_STAGING is not set |
| 1716 | 1325 | ||
| 1717 | # | 1326 | # |
| 1327 | # CBUS support | ||
| 1328 | # | ||
| 1329 | # CONFIG_CBUS is not set | ||
| 1330 | |||
| 1331 | # | ||
| 1718 | # File systems | 1332 | # File systems |
| 1719 | # | 1333 | # |
| 1720 | CONFIG_EXT2_FS=y | 1334 | CONFIG_EXT2_FS=y |
| 1721 | # CONFIG_EXT2_FS_XATTR is not set | 1335 | # CONFIG_EXT2_FS_XATTR is not set |
| 1722 | # CONFIG_EXT2_FS_XIP is not set | 1336 | # CONFIG_EXT2_FS_XIP is not set |
| 1723 | CONFIG_EXT3_FS=y | 1337 | CONFIG_EXT3_FS=y |
| 1338 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 1724 | # CONFIG_EXT3_FS_XATTR is not set | 1339 | # CONFIG_EXT3_FS_XATTR is not set |
| 1725 | # CONFIG_EXT4_FS is not set | 1340 | # CONFIG_EXT4_FS is not set |
| 1726 | CONFIG_JBD=y | 1341 | CONFIG_JBD=y |
| 1727 | # CONFIG_JBD_DEBUG is not set | 1342 | # CONFIG_JBD_DEBUG is not set |
| 1728 | # CONFIG_REISERFS_FS is not set | 1343 | # CONFIG_REISERFS_FS is not set |
| 1729 | # CONFIG_JFS_FS is not set | 1344 | # CONFIG_JFS_FS is not set |
| 1730 | CONFIG_FS_POSIX_ACL=y | 1345 | # CONFIG_FS_POSIX_ACL is not set |
| 1731 | CONFIG_FILE_LOCKING=y | 1346 | # CONFIG_XFS_FS is not set |
| 1732 | CONFIG_XFS_FS=m | ||
| 1733 | # CONFIG_XFS_QUOTA is not set | ||
| 1734 | # CONFIG_XFS_POSIX_ACL is not set | ||
| 1735 | # CONFIG_XFS_RT is not set | ||
| 1736 | # CONFIG_XFS_DEBUG is not set | ||
| 1737 | # CONFIG_GFS2_FS is not set | 1347 | # CONFIG_GFS2_FS is not set |
| 1738 | # CONFIG_OCFS2_FS is not set | 1348 | # CONFIG_OCFS2_FS is not set |
| 1739 | # CONFIG_BTRFS_FS is not set | 1349 | # CONFIG_BTRFS_FS is not set |
| 1350 | CONFIG_FILE_LOCKING=y | ||
| 1351 | CONFIG_FSNOTIFY=y | ||
| 1740 | CONFIG_DNOTIFY=y | 1352 | CONFIG_DNOTIFY=y |
| 1741 | CONFIG_INOTIFY=y | 1353 | CONFIG_INOTIFY=y |
| 1742 | CONFIG_INOTIFY_USER=y | 1354 | CONFIG_INOTIFY_USER=y |
| @@ -1749,16 +1361,18 @@ CONFIG_QFMT_V2=y | |||
| 1749 | CONFIG_QUOTACTL=y | 1361 | CONFIG_QUOTACTL=y |
| 1750 | # CONFIG_AUTOFS_FS is not set | 1362 | # CONFIG_AUTOFS_FS is not set |
| 1751 | # CONFIG_AUTOFS4_FS is not set | 1363 | # CONFIG_AUTOFS4_FS is not set |
| 1752 | CONFIG_FUSE_FS=m | 1364 | # CONFIG_FUSE_FS is not set |
| 1365 | |||
| 1366 | # | ||
| 1367 | # Caches | ||
| 1368 | # | ||
| 1369 | # CONFIG_FSCACHE is not set | ||
| 1753 | 1370 | ||
| 1754 | # | 1371 | # |
| 1755 | # CD-ROM/DVD Filesystems | 1372 | # CD-ROM/DVD Filesystems |
| 1756 | # | 1373 | # |
| 1757 | CONFIG_ISO9660_FS=m | 1374 | # CONFIG_ISO9660_FS is not set |
| 1758 | CONFIG_JOLIET=y | 1375 | # CONFIG_UDF_FS is not set |
| 1759 | CONFIG_ZISOFS=y | ||
| 1760 | CONFIG_UDF_FS=m | ||
| 1761 | CONFIG_UDF_NLS=y | ||
| 1762 | 1376 | ||
| 1763 | # | 1377 | # |
| 1764 | # DOS/FAT/NT Filesystems | 1378 | # DOS/FAT/NT Filesystems |
| @@ -1793,15 +1407,13 @@ CONFIG_JFFS2_FS=y | |||
| 1793 | CONFIG_JFFS2_FS_DEBUG=0 | 1407 | CONFIG_JFFS2_FS_DEBUG=0 |
| 1794 | CONFIG_JFFS2_FS_WRITEBUFFER=y | 1408 | CONFIG_JFFS2_FS_WRITEBUFFER=y |
| 1795 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | 1409 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set |
| 1796 | CONFIG_JFFS2_SUMMARY=y | 1410 | # CONFIG_JFFS2_SUMMARY is not set |
| 1797 | CONFIG_JFFS2_FS_XATTR=y | 1411 | # CONFIG_JFFS2_FS_XATTR is not set |
| 1798 | CONFIG_JFFS2_FS_POSIX_ACL=y | ||
| 1799 | CONFIG_JFFS2_FS_SECURITY=y | ||
| 1800 | CONFIG_JFFS2_COMPRESSION_OPTIONS=y | 1412 | CONFIG_JFFS2_COMPRESSION_OPTIONS=y |
| 1801 | CONFIG_JFFS2_ZLIB=y | 1413 | CONFIG_JFFS2_ZLIB=y |
| 1802 | CONFIG_JFFS2_LZO=y | 1414 | # CONFIG_JFFS2_LZO is not set |
| 1803 | CONFIG_JFFS2_RTIME=y | 1415 | CONFIG_JFFS2_RTIME=y |
| 1804 | CONFIG_JFFS2_RUBIN=y | 1416 | # CONFIG_JFFS2_RUBIN is not set |
| 1805 | # CONFIG_JFFS2_CMODE_NONE is not set | 1417 | # CONFIG_JFFS2_CMODE_NONE is not set |
| 1806 | CONFIG_JFFS2_CMODE_PRIORITY=y | 1418 | CONFIG_JFFS2_CMODE_PRIORITY=y |
| 1807 | # CONFIG_JFFS2_CMODE_SIZE is not set | 1419 | # CONFIG_JFFS2_CMODE_SIZE is not set |
| @@ -1816,20 +1428,20 @@ CONFIG_JFFS2_CMODE_PRIORITY=y | |||
| 1816 | # CONFIG_ROMFS_FS is not set | 1428 | # CONFIG_ROMFS_FS is not set |
| 1817 | # CONFIG_SYSV_FS is not set | 1429 | # CONFIG_SYSV_FS is not set |
| 1818 | # CONFIG_UFS_FS is not set | 1430 | # CONFIG_UFS_FS is not set |
| 1431 | # CONFIG_NILFS2_FS is not set | ||
| 1819 | CONFIG_NETWORK_FILESYSTEMS=y | 1432 | CONFIG_NETWORK_FILESYSTEMS=y |
| 1820 | CONFIG_NFS_FS=y | 1433 | CONFIG_NFS_FS=y |
| 1821 | CONFIG_NFS_V3=y | 1434 | CONFIG_NFS_V3=y |
| 1822 | # CONFIG_NFS_V3_ACL is not set | 1435 | # CONFIG_NFS_V3_ACL is not set |
| 1823 | CONFIG_NFS_V4=y | 1436 | CONFIG_NFS_V4=y |
| 1437 | # CONFIG_NFS_V4_1 is not set | ||
| 1824 | CONFIG_ROOT_NFS=y | 1438 | CONFIG_ROOT_NFS=y |
| 1825 | # CONFIG_NFSD is not set | 1439 | # CONFIG_NFSD is not set |
| 1826 | CONFIG_LOCKD=y | 1440 | CONFIG_LOCKD=y |
| 1827 | CONFIG_LOCKD_V4=y | 1441 | CONFIG_LOCKD_V4=y |
| 1828 | CONFIG_EXPORTFS=m | ||
| 1829 | CONFIG_NFS_COMMON=y | 1442 | CONFIG_NFS_COMMON=y |
| 1830 | CONFIG_SUNRPC=y | 1443 | CONFIG_SUNRPC=y |
| 1831 | CONFIG_SUNRPC_GSS=y | 1444 | CONFIG_SUNRPC_GSS=y |
| 1832 | # CONFIG_SUNRPC_REGISTER_V4 is not set | ||
| 1833 | CONFIG_RPCSEC_GSS_KRB5=y | 1445 | CONFIG_RPCSEC_GSS_KRB5=y |
| 1834 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | 1446 | # CONFIG_RPCSEC_GSS_SPKM3 is not set |
| 1835 | # CONFIG_SMB_FS is not set | 1447 | # CONFIG_SMB_FS is not set |
| @@ -1917,12 +1529,15 @@ CONFIG_DEBUG_KERNEL=y | |||
| 1917 | CONFIG_DETECT_SOFTLOCKUP=y | 1529 | CONFIG_DETECT_SOFTLOCKUP=y |
| 1918 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | 1530 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set |
| 1919 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | 1531 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 |
| 1532 | CONFIG_DETECT_HUNG_TASK=y | ||
| 1533 | # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set | ||
| 1534 | CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 | ||
| 1920 | CONFIG_SCHED_DEBUG=y | 1535 | CONFIG_SCHED_DEBUG=y |
| 1921 | CONFIG_SCHEDSTATS=y | 1536 | # CONFIG_SCHEDSTATS is not set |
| 1922 | CONFIG_TIMER_STATS=y | 1537 | # CONFIG_TIMER_STATS is not set |
| 1923 | # CONFIG_DEBUG_OBJECTS is not set | 1538 | # CONFIG_DEBUG_OBJECTS is not set |
| 1924 | # CONFIG_SLUB_DEBUG_ON is not set | 1539 | # CONFIG_DEBUG_SLAB is not set |
| 1925 | # CONFIG_SLUB_STATS is not set | 1540 | # CONFIG_DEBUG_KMEMLEAK is not set |
| 1926 | # CONFIG_DEBUG_RT_MUTEXES is not set | 1541 | # CONFIG_DEBUG_RT_MUTEXES is not set |
| 1927 | # CONFIG_RT_MUTEX_TESTER is not set | 1542 | # CONFIG_RT_MUTEX_TESTER is not set |
| 1928 | # CONFIG_DEBUG_SPINLOCK is not set | 1543 | # CONFIG_DEBUG_SPINLOCK is not set |
| @@ -1932,10 +1547,9 @@ CONFIG_DEBUG_MUTEXES=y | |||
| 1932 | # CONFIG_LOCK_STAT is not set | 1547 | # CONFIG_LOCK_STAT is not set |
| 1933 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | 1548 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set |
| 1934 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | 1549 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set |
| 1935 | CONFIG_STACKTRACE=y | ||
| 1936 | # CONFIG_DEBUG_KOBJECT is not set | 1550 | # CONFIG_DEBUG_KOBJECT is not set |
| 1937 | # CONFIG_DEBUG_BUGVERBOSE is not set | 1551 | # CONFIG_DEBUG_BUGVERBOSE is not set |
| 1938 | # CONFIG_DEBUG_INFO is not set | 1552 | CONFIG_DEBUG_INFO=y |
| 1939 | # CONFIG_DEBUG_VM is not set | 1553 | # CONFIG_DEBUG_VM is not set |
| 1940 | # CONFIG_DEBUG_WRITECOUNT is not set | 1554 | # CONFIG_DEBUG_WRITECOUNT is not set |
| 1941 | # CONFIG_DEBUG_MEMORY_INIT is not set | 1555 | # CONFIG_DEBUG_MEMORY_INIT is not set |
| @@ -1950,30 +1564,20 @@ CONFIG_FRAME_POINTER=y | |||
| 1950 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | 1564 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set |
| 1951 | # CONFIG_FAULT_INJECTION is not set | 1565 | # CONFIG_FAULT_INJECTION is not set |
| 1952 | # CONFIG_LATENCYTOP is not set | 1566 | # CONFIG_LATENCYTOP is not set |
| 1953 | CONFIG_NOP_TRACER=y | 1567 | # CONFIG_PAGE_POISONING is not set |
| 1954 | CONFIG_HAVE_FUNCTION_TRACER=y | 1568 | CONFIG_HAVE_FUNCTION_TRACER=y |
| 1955 | CONFIG_RING_BUFFER=y | 1569 | CONFIG_TRACING_SUPPORT=y |
| 1956 | CONFIG_TRACING=y | 1570 | # CONFIG_FTRACE is not set |
| 1957 | 1571 | # CONFIG_DYNAMIC_DEBUG is not set | |
| 1958 | # | ||
| 1959 | # Tracers | ||
| 1960 | # | ||
| 1961 | # CONFIG_FUNCTION_TRACER is not set | ||
| 1962 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 1963 | # CONFIG_SCHED_TRACER is not set | ||
| 1964 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | ||
| 1965 | # CONFIG_BOOT_TRACER is not set | ||
| 1966 | # CONFIG_TRACE_BRANCH_PROFILING is not set | ||
| 1967 | # CONFIG_STACK_TRACER is not set | ||
| 1968 | # CONFIG_FTRACE_STARTUP_TEST is not set | ||
| 1969 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set | ||
| 1970 | # CONFIG_SAMPLES is not set | 1572 | # CONFIG_SAMPLES is not set |
| 1971 | CONFIG_HAVE_ARCH_KGDB=y | 1573 | CONFIG_HAVE_ARCH_KGDB=y |
| 1972 | # CONFIG_KGDB is not set | 1574 | # CONFIG_KGDB is not set |
| 1575 | # CONFIG_ARM_UNWIND is not set | ||
| 1973 | # CONFIG_DEBUG_USER is not set | 1576 | # CONFIG_DEBUG_USER is not set |
| 1974 | # CONFIG_DEBUG_ERRORS is not set | 1577 | # CONFIG_DEBUG_ERRORS is not set |
| 1975 | # CONFIG_DEBUG_STACK_USAGE is not set | 1578 | # CONFIG_DEBUG_STACK_USAGE is not set |
| 1976 | # CONFIG_DEBUG_LL is not set | 1579 | CONFIG_DEBUG_LL=y |
| 1580 | # CONFIG_DEBUG_ICEDCC is not set | ||
| 1977 | 1581 | ||
| 1978 | # | 1582 | # |
| 1979 | # Security options | 1583 | # Security options |
| @@ -1982,10 +1586,6 @@ CONFIG_HAVE_ARCH_KGDB=y | |||
| 1982 | # CONFIG_SECURITY is not set | 1586 | # CONFIG_SECURITY is not set |
| 1983 | # CONFIG_SECURITYFS is not set | 1587 | # CONFIG_SECURITYFS is not set |
| 1984 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | 1588 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set |
| 1985 | CONFIG_XOR_BLOCKS=m | ||
| 1986 | CONFIG_ASYNC_CORE=m | ||
| 1987 | CONFIG_ASYNC_MEMCPY=m | ||
| 1988 | CONFIG_ASYNC_XOR=m | ||
| 1989 | CONFIG_CRYPTO=y | 1589 | CONFIG_CRYPTO=y |
| 1990 | 1590 | ||
| 1991 | # | 1591 | # |
| @@ -2000,13 +1600,15 @@ CONFIG_CRYPTO_BLKCIPHER2=y | |||
| 2000 | CONFIG_CRYPTO_HASH=y | 1600 | CONFIG_CRYPTO_HASH=y |
| 2001 | CONFIG_CRYPTO_HASH2=y | 1601 | CONFIG_CRYPTO_HASH2=y |
| 2002 | CONFIG_CRYPTO_RNG2=y | 1602 | CONFIG_CRYPTO_RNG2=y |
| 1603 | CONFIG_CRYPTO_PCOMP=y | ||
| 2003 | CONFIG_CRYPTO_MANAGER=y | 1604 | CONFIG_CRYPTO_MANAGER=y |
| 2004 | CONFIG_CRYPTO_MANAGER2=y | 1605 | CONFIG_CRYPTO_MANAGER2=y |
| 2005 | CONFIG_CRYPTO_GF128MUL=m | 1606 | # CONFIG_CRYPTO_GF128MUL is not set |
| 2006 | CONFIG_CRYPTO_NULL=m | 1607 | # CONFIG_CRYPTO_NULL is not set |
| 2007 | CONFIG_CRYPTO_CRYPTD=m | 1608 | CONFIG_CRYPTO_WORKQUEUE=y |
| 1609 | # CONFIG_CRYPTO_CRYPTD is not set | ||
| 2008 | # CONFIG_CRYPTO_AUTHENC is not set | 1610 | # CONFIG_CRYPTO_AUTHENC is not set |
| 2009 | CONFIG_CRYPTO_TEST=m | 1611 | # CONFIG_CRYPTO_TEST is not set |
| 2010 | 1612 | ||
| 2011 | # | 1613 | # |
| 2012 | # Authenticated Encryption with Associated Data | 1614 | # Authenticated Encryption with Associated Data |
| @@ -2021,58 +1623,58 @@ CONFIG_CRYPTO_TEST=m | |||
| 2021 | CONFIG_CRYPTO_CBC=y | 1623 | CONFIG_CRYPTO_CBC=y |
| 2022 | # CONFIG_CRYPTO_CTR is not set | 1624 | # CONFIG_CRYPTO_CTR is not set |
| 2023 | # CONFIG_CRYPTO_CTS is not set | 1625 | # CONFIG_CRYPTO_CTS is not set |
| 2024 | CONFIG_CRYPTO_ECB=y | 1626 | CONFIG_CRYPTO_ECB=m |
| 2025 | CONFIG_CRYPTO_LRW=m | 1627 | # CONFIG_CRYPTO_LRW is not set |
| 2026 | CONFIG_CRYPTO_PCBC=m | 1628 | CONFIG_CRYPTO_PCBC=m |
| 2027 | # CONFIG_CRYPTO_XTS is not set | 1629 | # CONFIG_CRYPTO_XTS is not set |
| 2028 | 1630 | ||
| 2029 | # | 1631 | # |
| 2030 | # Hash modes | 1632 | # Hash modes |
| 2031 | # | 1633 | # |
| 2032 | CONFIG_CRYPTO_HMAC=m | 1634 | # CONFIG_CRYPTO_HMAC is not set |
| 2033 | CONFIG_CRYPTO_XCBC=m | 1635 | # CONFIG_CRYPTO_XCBC is not set |
| 2034 | 1636 | ||
| 2035 | # | 1637 | # |
| 2036 | # Digest | 1638 | # Digest |
| 2037 | # | 1639 | # |
| 2038 | CONFIG_CRYPTO_CRC32C=y | 1640 | CONFIG_CRYPTO_CRC32C=y |
| 2039 | CONFIG_CRYPTO_MD4=m | 1641 | # CONFIG_CRYPTO_MD4 is not set |
| 2040 | CONFIG_CRYPTO_MD5=y | 1642 | CONFIG_CRYPTO_MD5=y |
| 2041 | CONFIG_CRYPTO_MICHAEL_MIC=y | 1643 | # CONFIG_CRYPTO_MICHAEL_MIC is not set |
| 2042 | # CONFIG_CRYPTO_RMD128 is not set | 1644 | # CONFIG_CRYPTO_RMD128 is not set |
| 2043 | # CONFIG_CRYPTO_RMD160 is not set | 1645 | # CONFIG_CRYPTO_RMD160 is not set |
| 2044 | # CONFIG_CRYPTO_RMD256 is not set | 1646 | # CONFIG_CRYPTO_RMD256 is not set |
| 2045 | # CONFIG_CRYPTO_RMD320 is not set | 1647 | # CONFIG_CRYPTO_RMD320 is not set |
| 2046 | CONFIG_CRYPTO_SHA1=m | 1648 | # CONFIG_CRYPTO_SHA1 is not set |
| 2047 | CONFIG_CRYPTO_SHA256=m | 1649 | # CONFIG_CRYPTO_SHA256 is not set |
| 2048 | CONFIG_CRYPTO_SHA512=m | 1650 | # CONFIG_CRYPTO_SHA512 is not set |
| 2049 | CONFIG_CRYPTO_TGR192=m | 1651 | # CONFIG_CRYPTO_TGR192 is not set |
| 2050 | CONFIG_CRYPTO_WP512=m | 1652 | # CONFIG_CRYPTO_WP512 is not set |
| 2051 | 1653 | ||
| 2052 | # | 1654 | # |
| 2053 | # Ciphers | 1655 | # Ciphers |
| 2054 | # | 1656 | # |
| 2055 | CONFIG_CRYPTO_AES=y | 1657 | # CONFIG_CRYPTO_AES is not set |
| 2056 | CONFIG_CRYPTO_ANUBIS=m | 1658 | # CONFIG_CRYPTO_ANUBIS is not set |
| 2057 | CONFIG_CRYPTO_ARC4=y | 1659 | # CONFIG_CRYPTO_ARC4 is not set |
| 2058 | CONFIG_CRYPTO_BLOWFISH=m | 1660 | # CONFIG_CRYPTO_BLOWFISH is not set |
| 2059 | CONFIG_CRYPTO_CAMELLIA=m | 1661 | # CONFIG_CRYPTO_CAMELLIA is not set |
| 2060 | CONFIG_CRYPTO_CAST5=m | 1662 | # CONFIG_CRYPTO_CAST5 is not set |
| 2061 | CONFIG_CRYPTO_CAST6=m | 1663 | # CONFIG_CRYPTO_CAST6 is not set |
| 2062 | CONFIG_CRYPTO_DES=y | 1664 | CONFIG_CRYPTO_DES=y |
| 2063 | CONFIG_CRYPTO_FCRYPT=m | 1665 | # CONFIG_CRYPTO_FCRYPT is not set |
| 2064 | CONFIG_CRYPTO_KHAZAD=m | 1666 | # CONFIG_CRYPTO_KHAZAD is not set |
| 2065 | # CONFIG_CRYPTO_SALSA20 is not set | 1667 | # CONFIG_CRYPTO_SALSA20 is not set |
| 2066 | # CONFIG_CRYPTO_SEED is not set | 1668 | # CONFIG_CRYPTO_SEED is not set |
| 2067 | CONFIG_CRYPTO_SERPENT=m | 1669 | # CONFIG_CRYPTO_SERPENT is not set |
| 2068 | CONFIG_CRYPTO_TEA=m | 1670 | # CONFIG_CRYPTO_TEA is not set |
| 2069 | CONFIG_CRYPTO_TWOFISH=m | 1671 | # CONFIG_CRYPTO_TWOFISH is not set |
| 2070 | CONFIG_CRYPTO_TWOFISH_COMMON=m | ||
| 2071 | 1672 | ||
| 2072 | # | 1673 | # |
| 2073 | # Compression | 1674 | # Compression |
| 2074 | # | 1675 | # |
| 2075 | CONFIG_CRYPTO_DEFLATE=m | 1676 | # CONFIG_CRYPTO_DEFLATE is not set |
| 1677 | # CONFIG_CRYPTO_ZLIB is not set | ||
| 2076 | # CONFIG_CRYPTO_LZO is not set | 1678 | # CONFIG_CRYPTO_LZO is not set |
| 2077 | 1679 | ||
| 2078 | # | 1680 | # |
| @@ -2080,6 +1682,7 @@ CONFIG_CRYPTO_DEFLATE=m | |||
| 2080 | # | 1682 | # |
| 2081 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | 1683 | # CONFIG_CRYPTO_ANSI_CPRNG is not set |
| 2082 | CONFIG_CRYPTO_HW=y | 1684 | CONFIG_CRYPTO_HW=y |
| 1685 | # CONFIG_BINARY_PRINTF is not set | ||
| 2083 | 1686 | ||
| 2084 | # | 1687 | # |
| 2085 | # Library routines | 1688 | # Library routines |
| @@ -2087,17 +1690,16 @@ CONFIG_CRYPTO_HW=y | |||
| 2087 | CONFIG_BITREVERSE=y | 1690 | CONFIG_BITREVERSE=y |
| 2088 | CONFIG_GENERIC_FIND_LAST_BIT=y | 1691 | CONFIG_GENERIC_FIND_LAST_BIT=y |
| 2089 | CONFIG_CRC_CCITT=y | 1692 | CONFIG_CRC_CCITT=y |
| 2090 | CONFIG_CRC16=m | 1693 | # CONFIG_CRC16 is not set |
| 2091 | CONFIG_CRC_T10DIF=y | 1694 | # CONFIG_CRC_T10DIF is not set |
| 2092 | CONFIG_CRC_ITU_T=y | 1695 | # CONFIG_CRC_ITU_T is not set |
| 2093 | CONFIG_CRC32=y | 1696 | CONFIG_CRC32=y |
| 2094 | CONFIG_CRC7=y | 1697 | # CONFIG_CRC7 is not set |
| 2095 | CONFIG_LIBCRC32C=y | 1698 | CONFIG_LIBCRC32C=y |
| 2096 | CONFIG_ZLIB_INFLATE=y | 1699 | CONFIG_ZLIB_INFLATE=y |
| 2097 | CONFIG_ZLIB_DEFLATE=y | 1700 | CONFIG_ZLIB_DEFLATE=y |
| 2098 | CONFIG_LZO_COMPRESS=y | 1701 | CONFIG_DECOMPRESS_GZIP=y |
| 2099 | CONFIG_LZO_DECOMPRESS=y | ||
| 2100 | CONFIG_PLIST=y | ||
| 2101 | CONFIG_HAS_IOMEM=y | 1702 | CONFIG_HAS_IOMEM=y |
| 2102 | CONFIG_HAS_IOPORT=y | 1703 | CONFIG_HAS_IOPORT=y |
| 2103 | CONFIG_HAS_DMA=y | 1704 | CONFIG_HAS_DMA=y |
| 1705 | CONFIG_NLATTR=y | ||
diff --git a/arch/arm/configs/omap_3630sdp_defconfig b/arch/arm/configs/omap_3630sdp_defconfig new file mode 100644 index 00000000000..e836c8a0014 --- /dev/null +++ b/arch/arm/configs/omap_3630sdp_defconfig | |||
| @@ -0,0 +1,1611 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.32-rc6 | ||
| 4 | # Thu Nov 12 12:21:37 2009 | ||
| 5 | # | ||
| 6 | CONFIG_ARM=y | ||
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
| 8 | CONFIG_GENERIC_GPIO=y | ||
| 9 | CONFIG_GENERIC_TIME=y | ||
| 10 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 11 | CONFIG_GENERIC_HARDIRQS=y | ||
| 12 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 13 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 14 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 15 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 16 | CONFIG_HARDIRQS_SW_RESEND=y | ||
| 17 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 18 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 19 | CONFIG_ARCH_HAS_CPUFREQ=y | ||
| 20 | CONFIG_GENERIC_HWEIGHT=y | ||
| 21 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
| 22 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 23 | CONFIG_VECTORS_BASE=0xffff0000 | ||
| 24 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 25 | CONFIG_CONSTRUCTORS=y | ||
| 26 | |||
| 27 | # | ||
| 28 | # General setup | ||
| 29 | # | ||
| 30 | CONFIG_EXPERIMENTAL=y | ||
| 31 | CONFIG_BROKEN_ON_SMP=y | ||
| 32 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 33 | CONFIG_LOCALVERSION="" | ||
| 34 | CONFIG_LOCALVERSION_AUTO=y | ||
| 35 | CONFIG_SWAP=y | ||
| 36 | CONFIG_SYSVIPC=y | ||
| 37 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 38 | # CONFIG_POSIX_MQUEUE is not set | ||
| 39 | CONFIG_BSD_PROCESS_ACCT=y | ||
| 40 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set | ||
| 41 | # CONFIG_TASKSTATS is not set | ||
| 42 | # CONFIG_AUDIT is not set | ||
| 43 | |||
| 44 | # | ||
| 45 | # RCU Subsystem | ||
| 46 | # | ||
| 47 | CONFIG_TREE_RCU=y | ||
| 48 | # CONFIG_TREE_PREEMPT_RCU is not set | ||
| 49 | # CONFIG_RCU_TRACE is not set | ||
| 50 | CONFIG_RCU_FANOUT=32 | ||
| 51 | # CONFIG_RCU_FANOUT_EXACT is not set | ||
| 52 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 53 | # CONFIG_IKCONFIG is not set | ||
| 54 | CONFIG_LOG_BUF_SHIFT=14 | ||
| 55 | CONFIG_GROUP_SCHED=y | ||
| 56 | CONFIG_FAIR_GROUP_SCHED=y | ||
| 57 | # CONFIG_RT_GROUP_SCHED is not set | ||
| 58 | CONFIG_USER_SCHED=y | ||
| 59 | # CONFIG_CGROUP_SCHED is not set | ||
| 60 | # CONFIG_CGROUPS is not set | ||
| 61 | # CONFIG_SYSFS_DEPRECATED_V2 is not set | ||
| 62 | # CONFIG_RELAY is not set | ||
| 63 | # CONFIG_NAMESPACES is not set | ||
| 64 | CONFIG_BLK_DEV_INITRD=y | ||
| 65 | CONFIG_INITRAMFS_SOURCE="" | ||
| 66 | CONFIG_RD_GZIP=y | ||
| 67 | # CONFIG_RD_BZIP2 is not set | ||
| 68 | # CONFIG_RD_LZMA is not set | ||
| 69 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 70 | CONFIG_SYSCTL=y | ||
| 71 | CONFIG_ANON_INODES=y | ||
| 72 | CONFIG_EMBEDDED=y | ||
| 73 | CONFIG_UID16=y | ||
| 74 | # CONFIG_SYSCTL_SYSCALL is not set | ||
| 75 | CONFIG_KALLSYMS=y | ||
| 76 | # CONFIG_KALLSYMS_ALL is not set | ||
| 77 | CONFIG_KALLSYMS_EXTRA_PASS=y | ||
| 78 | CONFIG_HOTPLUG=y | ||
| 79 | CONFIG_PRINTK=y | ||
| 80 | CONFIG_BUG=y | ||
| 81 | CONFIG_ELF_CORE=y | ||
| 82 | CONFIG_BASE_FULL=y | ||
| 83 | CONFIG_FUTEX=y | ||
| 84 | CONFIG_EPOLL=y | ||
| 85 | CONFIG_SIGNALFD=y | ||
| 86 | CONFIG_TIMERFD=y | ||
| 87 | CONFIG_EVENTFD=y | ||
| 88 | CONFIG_SHMEM=y | ||
| 89 | CONFIG_AIO=y | ||
| 90 | |||
| 91 | # | ||
| 92 | # Kernel Performance Events And Counters | ||
| 93 | # | ||
| 94 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 95 | CONFIG_COMPAT_BRK=y | ||
| 96 | CONFIG_SLAB=y | ||
| 97 | # CONFIG_SLUB is not set | ||
| 98 | # CONFIG_SLOB is not set | ||
| 99 | # CONFIG_PROFILING is not set | ||
| 100 | CONFIG_HAVE_OPROFILE=y | ||
| 101 | # CONFIG_KPROBES is not set | ||
| 102 | CONFIG_HAVE_KPROBES=y | ||
| 103 | CONFIG_HAVE_KRETPROBES=y | ||
| 104 | CONFIG_HAVE_CLK=y | ||
| 105 | |||
| 106 | # | ||
| 107 | # GCOV-based kernel profiling | ||
| 108 | # | ||
| 109 | # CONFIG_SLOW_WORK is not set | ||
| 110 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 111 | CONFIG_SLABINFO=y | ||
| 112 | CONFIG_RT_MUTEXES=y | ||
| 113 | CONFIG_BASE_SMALL=0 | ||
| 114 | CONFIG_MODULES=y | ||
| 115 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 116 | CONFIG_MODULE_UNLOAD=y | ||
| 117 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
| 118 | CONFIG_MODVERSIONS=y | ||
| 119 | CONFIG_MODULE_SRCVERSION_ALL=y | ||
| 120 | CONFIG_BLOCK=y | ||
| 121 | CONFIG_LBDAF=y | ||
| 122 | # CONFIG_BLK_DEV_BSG is not set | ||
| 123 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 124 | |||
| 125 | # | ||
| 126 | # IO Schedulers | ||
| 127 | # | ||
| 128 | CONFIG_IOSCHED_NOOP=y | ||
| 129 | CONFIG_IOSCHED_AS=y | ||
| 130 | CONFIG_IOSCHED_DEADLINE=y | ||
| 131 | CONFIG_IOSCHED_CFQ=y | ||
| 132 | CONFIG_DEFAULT_AS=y | ||
| 133 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 134 | # CONFIG_DEFAULT_CFQ is not set | ||
| 135 | # CONFIG_DEFAULT_NOOP is not set | ||
| 136 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
| 137 | CONFIG_FREEZER=y | ||
| 138 | |||
| 139 | # | ||
| 140 | # System Type | ||
| 141 | # | ||
| 142 | CONFIG_MMU=y | ||
| 143 | # CONFIG_ARCH_AAEC2000 is not set | ||
| 144 | # CONFIG_ARCH_INTEGRATOR is not set | ||
| 145 | # CONFIG_ARCH_REALVIEW is not set | ||
| 146 | # CONFIG_ARCH_VERSATILE is not set | ||
| 147 | # CONFIG_ARCH_AT91 is not set | ||
| 148 | # CONFIG_ARCH_CLPS711X is not set | ||
| 149 | # CONFIG_ARCH_GEMINI is not set | ||
| 150 | # CONFIG_ARCH_EBSA110 is not set | ||
| 151 | # CONFIG_ARCH_EP93XX is not set | ||
| 152 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
| 153 | # CONFIG_ARCH_MXC is not set | ||
| 154 | # CONFIG_ARCH_STMP3XXX is not set | ||
| 155 | # CONFIG_ARCH_NETX is not set | ||
| 156 | # CONFIG_ARCH_H720X is not set | ||
| 157 | # CONFIG_ARCH_NOMADIK is not set | ||
| 158 | # CONFIG_ARCH_IOP13XX is not set | ||
| 159 | # CONFIG_ARCH_IOP32X is not set | ||
| 160 | # CONFIG_ARCH_IOP33X is not set | ||
| 161 | # CONFIG_ARCH_IXP23XX is not set | ||
| 162 | # CONFIG_ARCH_IXP2000 is not set | ||
| 163 | # CONFIG_ARCH_IXP4XX is not set | ||
| 164 | # CONFIG_ARCH_L7200 is not set | ||
| 165 | # CONFIG_ARCH_KIRKWOOD is not set | ||
| 166 | # CONFIG_ARCH_LOKI is not set | ||
| 167 | # CONFIG_ARCH_MV78XX0 is not set | ||
| 168 | # CONFIG_ARCH_ORION5X is not set | ||
| 169 | # CONFIG_ARCH_MMP is not set | ||
| 170 | # CONFIG_ARCH_KS8695 is not set | ||
| 171 | # CONFIG_ARCH_NS9XXX is not set | ||
| 172 | # CONFIG_ARCH_W90X900 is not set | ||
| 173 | # CONFIG_ARCH_PNX4008 is not set | ||
| 174 | # CONFIG_ARCH_PXA is not set | ||
| 175 | # CONFIG_ARCH_MSM is not set | ||
| 176 | # CONFIG_ARCH_RPC is not set | ||
| 177 | # CONFIG_ARCH_SA1100 is not set | ||
| 178 | # CONFIG_ARCH_S3C2410 is not set | ||
| 179 | # CONFIG_ARCH_S3C64XX is not set | ||
| 180 | # CONFIG_ARCH_S5PC1XX is not set | ||
| 181 | # CONFIG_ARCH_SHARK is not set | ||
| 182 | # CONFIG_ARCH_LH7A40X is not set | ||
| 183 | # CONFIG_ARCH_U300 is not set | ||
| 184 | # CONFIG_ARCH_DAVINCI is not set | ||
| 185 | CONFIG_ARCH_OMAP=y | ||
| 186 | # CONFIG_ARCH_BCMRING is not set | ||
| 187 | |||
| 188 | # | ||
| 189 | # TI OMAP Implementations | ||
| 190 | # | ||
| 191 | CONFIG_ARCH_OMAP_OTG=y | ||
| 192 | # CONFIG_ARCH_OMAP1 is not set | ||
| 193 | # CONFIG_ARCH_OMAP2 is not set | ||
| 194 | CONFIG_ARCH_OMAP3=y | ||
| 195 | # CONFIG_ARCH_OMAP4 is not set | ||
| 196 | |||
| 197 | # | ||
| 198 | # OMAP Feature Selections | ||
| 199 | # | ||
| 200 | # CONFIG_OMAP_DEBUG_POWERDOMAIN is not set | ||
| 201 | # CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set | ||
| 202 | # CONFIG_OMAP_RESET_CLOCKS is not set | ||
| 203 | CONFIG_OMAP_MUX=y | ||
| 204 | CONFIG_OMAP_MUX_DEBUG=y | ||
| 205 | CONFIG_OMAP_MUX_WARNINGS=y | ||
| 206 | CONFIG_OMAP_MCBSP=y | ||
| 207 | # CONFIG_OMAP_MBOX_FWK is not set | ||
| 208 | # CONFIG_OMAP_MPU_TIMER is not set | ||
| 209 | CONFIG_OMAP_32K_TIMER=y | ||
| 210 | CONFIG_OMAP_32K_TIMER_HZ=128 | ||
| 211 | CONFIG_OMAP_DM_TIMER=y | ||
| 212 | CONFIG_OMAP_LL_DEBUG_UART1=y | ||
| 213 | # CONFIG_OMAP_LL_DEBUG_UART2 is not set | ||
| 214 | # CONFIG_OMAP_LL_DEBUG_UART3 is not set | ||
| 215 | # CONFIG_OMAP_LL_DEBUG_NONE is not set | ||
| 216 | # CONFIG_OMAP_PM_NONE is not set | ||
| 217 | CONFIG_OMAP_PM_NOOP=y | ||
| 218 | CONFIG_ARCH_OMAP34XX=y | ||
| 219 | CONFIG_ARCH_OMAP3430=y | ||
| 220 | |||
| 221 | # | ||
| 222 | # OMAP Board Type | ||
| 223 | # | ||
| 224 | # CONFIG_MACH_OMAP3_BEAGLE is not set | ||
| 225 | # CONFIG_MACH_OMAP_LDP is not set | ||
| 226 | # CONFIG_MACH_OVERO is not set | ||
| 227 | # CONFIG_MACH_OMAP3EVM is not set | ||
| 228 | # CONFIG_MACH_OMAP3_PANDORA is not set | ||
| 229 | # CONFIG_MACH_OMAP_3430SDP is not set | ||
| 230 | # CONFIG_MACH_NOKIA_RX51 is not set | ||
| 231 | # CONFIG_MACH_OMAP_ZOOM2 is not set | ||
| 232 | # CONFIG_MACH_CM_T35 is not set | ||
| 233 | # CONFIG_MACH_OMAP_ZOOM3 is not set | ||
| 234 | CONFIG_MACH_OMAP_3630SDP=y | ||
| 235 | |||
| 236 | # | ||
| 237 | # Processor Type | ||
| 238 | # | ||
| 239 | CONFIG_CPU_32=y | ||
| 240 | CONFIG_CPU_32v6K=y | ||
| 241 | CONFIG_CPU_V7=y | ||
| 242 | CONFIG_CPU_32v7=y | ||
| 243 | CONFIG_CPU_ABRT_EV7=y | ||
| 244 | CONFIG_CPU_PABRT_V7=y | ||
| 245 | CONFIG_CPU_CACHE_V7=y | ||
| 246 | CONFIG_CPU_CACHE_VIPT=y | ||
| 247 | CONFIG_CPU_COPY_V6=y | ||
| 248 | CONFIG_CPU_TLB_V7=y | ||
| 249 | CONFIG_CPU_HAS_ASID=y | ||
| 250 | CONFIG_CPU_CP15=y | ||
| 251 | CONFIG_CPU_CP15_MMU=y | ||
| 252 | |||
| 253 | # | ||
| 254 | # Processor Features | ||
| 255 | # | ||
| 256 | CONFIG_ARM_THUMB=y | ||
| 257 | # CONFIG_ARM_THUMBEE is not set | ||
| 258 | # CONFIG_CPU_ICACHE_DISABLE is not set | ||
| 259 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
| 260 | # CONFIG_CPU_BPREDICT_DISABLE is not set | ||
| 261 | CONFIG_HAS_TLS_REG=y | ||
| 262 | CONFIG_ARM_L1_CACHE_SHIFT=6 | ||
| 263 | # CONFIG_ARM_ERRATA_430973 is not set | ||
| 264 | # CONFIG_ARM_ERRATA_458693 is not set | ||
| 265 | # CONFIG_ARM_ERRATA_460075 is not set | ||
| 266 | CONFIG_COMMON_CLKDEV=y | ||
| 267 | |||
| 268 | # | ||
| 269 | # Bus support | ||
| 270 | # | ||
| 271 | # CONFIG_PCI_SYSCALL is not set | ||
| 272 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 273 | # CONFIG_PCCARD is not set | ||
| 274 | |||
| 275 | # | ||
| 276 | # Kernel Features | ||
| 277 | # | ||
| 278 | CONFIG_TICK_ONESHOT=y | ||
| 279 | CONFIG_NO_HZ=y | ||
| 280 | CONFIG_HIGH_RES_TIMERS=y | ||
| 281 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 282 | CONFIG_VMSPLIT_3G=y | ||
| 283 | # CONFIG_VMSPLIT_2G is not set | ||
| 284 | # CONFIG_VMSPLIT_1G is not set | ||
| 285 | CONFIG_PAGE_OFFSET=0xC0000000 | ||
| 286 | CONFIG_PREEMPT_NONE=y | ||
| 287 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
| 288 | # CONFIG_PREEMPT is not set | ||
| 289 | CONFIG_HZ=128 | ||
| 290 | # CONFIG_THUMB2_KERNEL is not set | ||
| 291 | CONFIG_AEABI=y | ||
| 292 | CONFIG_OABI_COMPAT=y | ||
| 293 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | ||
| 294 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | ||
| 295 | # CONFIG_HIGHMEM is not set | ||
| 296 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 297 | CONFIG_FLATMEM_MANUAL=y | ||
| 298 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 299 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 300 | CONFIG_FLATMEM=y | ||
| 301 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 302 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 303 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
| 304 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
| 305 | CONFIG_ZONE_DMA_FLAG=0 | ||
| 306 | CONFIG_VIRT_TO_BUS=y | ||
| 307 | CONFIG_HAVE_MLOCK=y | ||
| 308 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
| 309 | # CONFIG_KSM is not set | ||
| 310 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
| 311 | # CONFIG_LEDS is not set | ||
| 312 | CONFIG_ALIGNMENT_TRAP=y | ||
| 313 | # CONFIG_UACCESS_WITH_MEMCPY is not set | ||
| 314 | |||
| 315 | # | ||
| 316 | # Boot options | ||
| 317 | # | ||
| 318 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
| 319 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
| 320 | CONFIG_CMDLINE="root=/dev/nfs nfsroot=192.168.0.1:/home/user/buildroot ip=192.168.0.2:192.168.0.1:192.168.0.1:255.255.255.0:tgt:eth0:off rw console=ttyS2,115200n8" | ||
| 321 | # CONFIG_XIP_KERNEL is not set | ||
| 322 | # CONFIG_KEXEC is not set | ||
| 323 | |||
| 324 | # | ||
| 325 | # CPU Power Management | ||
| 326 | # | ||
| 327 | # CONFIG_CPU_FREQ is not set | ||
| 328 | # CONFIG_CPU_IDLE is not set | ||
| 329 | |||
| 330 | # | ||
| 331 | # Floating point emulation | ||
| 332 | # | ||
| 333 | |||
| 334 | # | ||
| 335 | # At least one emulation must be selected | ||
| 336 | # | ||
| 337 | CONFIG_FPE_NWFPE=y | ||
| 338 | # CONFIG_FPE_NWFPE_XP is not set | ||
| 339 | # CONFIG_FPE_FASTFPE is not set | ||
| 340 | CONFIG_VFP=y | ||
| 341 | CONFIG_VFPv3=y | ||
| 342 | # CONFIG_NEON is not set | ||
| 343 | |||
| 344 | # | ||
| 345 | # Userspace binary formats | ||
| 346 | # | ||
| 347 | CONFIG_BINFMT_ELF=y | ||
| 348 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 349 | CONFIG_HAVE_AOUT=y | ||
| 350 | # CONFIG_BINFMT_AOUT is not set | ||
| 351 | CONFIG_BINFMT_MISC=y | ||
| 352 | |||
| 353 | # | ||
| 354 | # Power management options | ||
| 355 | # | ||
| 356 | CONFIG_PM=y | ||
| 357 | CONFIG_PM_DEBUG=y | ||
| 358 | CONFIG_PM_VERBOSE=y | ||
| 359 | CONFIG_CAN_PM_TRACE=y | ||
| 360 | CONFIG_PM_SLEEP=y | ||
| 361 | CONFIG_SUSPEND=y | ||
| 362 | # CONFIG_PM_TEST_SUSPEND is not set | ||
| 363 | CONFIG_SUSPEND_FREEZER=y | ||
| 364 | # CONFIG_APM_EMULATION is not set | ||
| 365 | # CONFIG_PM_RUNTIME is not set | ||
| 366 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
| 367 | CONFIG_NET=y | ||
| 368 | |||
| 369 | # | ||
| 370 | # Networking options | ||
| 371 | # | ||
| 372 | CONFIG_PACKET=y | ||
| 373 | # CONFIG_PACKET_MMAP is not set | ||
| 374 | CONFIG_UNIX=y | ||
| 375 | CONFIG_XFRM=y | ||
| 376 | CONFIG_XFRM_USER=y | ||
| 377 | # CONFIG_XFRM_SUB_POLICY is not set | ||
| 378 | CONFIG_XFRM_MIGRATE=y | ||
| 379 | # CONFIG_XFRM_STATISTICS is not set | ||
| 380 | CONFIG_NET_KEY=y | ||
| 381 | CONFIG_NET_KEY_MIGRATE=y | ||
| 382 | CONFIG_INET=y | ||
| 383 | CONFIG_IP_MULTICAST=y | ||
| 384 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 385 | CONFIG_IP_FIB_HASH=y | ||
| 386 | CONFIG_IP_PNP=y | ||
| 387 | CONFIG_IP_PNP_DHCP=y | ||
| 388 | CONFIG_IP_PNP_BOOTP=y | ||
| 389 | CONFIG_IP_PNP_RARP=y | ||
| 390 | # CONFIG_NET_IPIP is not set | ||
| 391 | # CONFIG_NET_IPGRE is not set | ||
| 392 | # CONFIG_IP_MROUTE is not set | ||
| 393 | # CONFIG_ARPD is not set | ||
| 394 | # CONFIG_SYN_COOKIES is not set | ||
| 395 | # CONFIG_INET_AH is not set | ||
| 396 | # CONFIG_INET_ESP is not set | ||
| 397 | # CONFIG_INET_IPCOMP is not set | ||
| 398 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
| 399 | # CONFIG_INET_TUNNEL is not set | ||
| 400 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
| 401 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
| 402 | CONFIG_INET_XFRM_MODE_BEET=y | ||
| 403 | # CONFIG_INET_LRO is not set | ||
| 404 | CONFIG_INET_DIAG=y | ||
| 405 | CONFIG_INET_TCP_DIAG=y | ||
| 406 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
| 407 | CONFIG_TCP_CONG_CUBIC=y | ||
| 408 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 409 | # CONFIG_TCP_MD5SIG is not set | ||
| 410 | # CONFIG_IPV6 is not set | ||
| 411 | # CONFIG_NETWORK_SECMARK is not set | ||
| 412 | # CONFIG_NETFILTER is not set | ||
| 413 | # CONFIG_IP_DCCP is not set | ||
| 414 | # CONFIG_IP_SCTP is not set | ||
| 415 | # CONFIG_RDS is not set | ||
| 416 | # CONFIG_TIPC is not set | ||
| 417 | # CONFIG_ATM is not set | ||
| 418 | # CONFIG_BRIDGE is not set | ||
| 419 | # CONFIG_NET_DSA is not set | ||
| 420 | # CONFIG_VLAN_8021Q is not set | ||
| 421 | # CONFIG_DECNET is not set | ||
| 422 | # CONFIG_LLC2 is not set | ||
| 423 | # CONFIG_IPX is not set | ||
| 424 | # CONFIG_ATALK is not set | ||
| 425 | # CONFIG_X25 is not set | ||
| 426 | # CONFIG_LAPB is not set | ||
| 427 | # CONFIG_ECONET is not set | ||
| 428 | # CONFIG_WAN_ROUTER is not set | ||
| 429 | # CONFIG_PHONET is not set | ||
| 430 | # CONFIG_IEEE802154 is not set | ||
| 431 | # CONFIG_NET_SCHED is not set | ||
| 432 | # CONFIG_DCB is not set | ||
| 433 | |||
| 434 | # | ||
| 435 | # Network testing | ||
| 436 | # | ||
| 437 | # CONFIG_NET_PKTGEN is not set | ||
| 438 | # CONFIG_HAMRADIO is not set | ||
| 439 | # CONFIG_CAN is not set | ||
| 440 | # CONFIG_IRDA is not set | ||
| 441 | # CONFIG_BT is not set | ||
| 442 | # CONFIG_AF_RXRPC is not set | ||
| 443 | # CONFIG_WIRELESS is not set | ||
| 444 | # CONFIG_WIMAX is not set | ||
| 445 | # CONFIG_RFKILL is not set | ||
| 446 | # CONFIG_NET_9P is not set | ||
| 447 | |||
| 448 | # | ||
| 449 | # Device Drivers | ||
| 450 | # | ||
| 451 | |||
| 452 | # | ||
| 453 | # Generic Driver Options | ||
| 454 | # | ||
| 455 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
| 456 | # CONFIG_DEVTMPFS is not set | ||
| 457 | CONFIG_STANDALONE=y | ||
| 458 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 459 | # CONFIG_FW_LOADER is not set | ||
| 460 | # CONFIG_DEBUG_DRIVER is not set | ||
| 461 | # CONFIG_DEBUG_DEVRES is not set | ||
| 462 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 463 | CONFIG_CONNECTOR=y | ||
| 464 | CONFIG_PROC_EVENTS=y | ||
| 465 | # CONFIG_MTD is not set | ||
| 466 | # CONFIG_PARPORT is not set | ||
| 467 | CONFIG_BLK_DEV=y | ||
| 468 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 469 | CONFIG_BLK_DEV_LOOP=y | ||
| 470 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
| 471 | # CONFIG_BLK_DEV_NBD is not set | ||
| 472 | # CONFIG_BLK_DEV_UB is not set | ||
| 473 | CONFIG_BLK_DEV_RAM=y | ||
| 474 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
| 475 | CONFIG_BLK_DEV_RAM_SIZE=16384 | ||
| 476 | # CONFIG_BLK_DEV_XIP is not set | ||
| 477 | # CONFIG_CDROM_PKTCDVD is not set | ||
| 478 | # CONFIG_ATA_OVER_ETH is not set | ||
| 479 | # CONFIG_MG_DISK is not set | ||
| 480 | CONFIG_MISC_DEVICES=y | ||
| 481 | # CONFIG_ICS932S401 is not set | ||
| 482 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
| 483 | # CONFIG_ISL29003 is not set | ||
| 484 | # CONFIG_C2PORT is not set | ||
| 485 | |||
| 486 | # | ||
| 487 | # EEPROM support | ||
| 488 | # | ||
| 489 | # CONFIG_EEPROM_AT24 is not set | ||
| 490 | # CONFIG_EEPROM_AT25 is not set | ||
| 491 | # CONFIG_EEPROM_LEGACY is not set | ||
| 492 | # CONFIG_EEPROM_MAX6875 is not set | ||
| 493 | # CONFIG_EEPROM_93CX6 is not set | ||
| 494 | CONFIG_HAVE_IDE=y | ||
| 495 | # CONFIG_IDE is not set | ||
| 496 | |||
| 497 | # | ||
| 498 | # SCSI device support | ||
| 499 | # | ||
| 500 | # CONFIG_RAID_ATTRS is not set | ||
| 501 | CONFIG_SCSI=y | ||
| 502 | CONFIG_SCSI_DMA=y | ||
| 503 | # CONFIG_SCSI_TGT is not set | ||
| 504 | # CONFIG_SCSI_NETLINK is not set | ||
| 505 | CONFIG_SCSI_PROC_FS=y | ||
| 506 | |||
| 507 | # | ||
| 508 | # SCSI support type (disk, tape, CD-ROM) | ||
| 509 | # | ||
| 510 | CONFIG_BLK_DEV_SD=y | ||
| 511 | # CONFIG_CHR_DEV_ST is not set | ||
| 512 | # CONFIG_CHR_DEV_OSST is not set | ||
| 513 | # CONFIG_BLK_DEV_SR is not set | ||
| 514 | # CONFIG_CHR_DEV_SG is not set | ||
| 515 | # CONFIG_CHR_DEV_SCH is not set | ||
| 516 | # CONFIG_SCSI_MULTI_LUN is not set | ||
| 517 | # CONFIG_SCSI_CONSTANTS is not set | ||
| 518 | # CONFIG_SCSI_LOGGING is not set | ||
| 519 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
| 520 | CONFIG_SCSI_WAIT_SCAN=m | ||
| 521 | |||
| 522 | # | ||
| 523 | # SCSI Transports | ||
| 524 | # | ||
| 525 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
| 526 | # CONFIG_SCSI_FC_ATTRS is not set | ||
| 527 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
| 528 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
| 529 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
| 530 | CONFIG_SCSI_LOWLEVEL=y | ||
| 531 | # CONFIG_ISCSI_TCP is not set | ||
| 532 | # CONFIG_LIBFC is not set | ||
| 533 | # CONFIG_LIBFCOE is not set | ||
| 534 | # CONFIG_SCSI_DEBUG is not set | ||
| 535 | # CONFIG_SCSI_DH is not set | ||
| 536 | # CONFIG_SCSI_OSD_INITIATOR is not set | ||
| 537 | # CONFIG_ATA is not set | ||
| 538 | # CONFIG_MD is not set | ||
| 539 | CONFIG_NETDEVICES=y | ||
| 540 | # CONFIG_DUMMY is not set | ||
| 541 | # CONFIG_BONDING is not set | ||
| 542 | # CONFIG_MACVLAN is not set | ||
| 543 | # CONFIG_EQUALIZER is not set | ||
| 544 | # CONFIG_TUN is not set | ||
| 545 | # CONFIG_VETH is not set | ||
| 546 | CONFIG_PHYLIB=y | ||
| 547 | |||
| 548 | # | ||
| 549 | # MII PHY device drivers | ||
| 550 | # | ||
| 551 | # CONFIG_MARVELL_PHY is not set | ||
| 552 | # CONFIG_DAVICOM_PHY is not set | ||
| 553 | # CONFIG_QSEMI_PHY is not set | ||
| 554 | # CONFIG_LXT_PHY is not set | ||
| 555 | # CONFIG_CICADA_PHY is not set | ||
| 556 | # CONFIG_VITESSE_PHY is not set | ||
| 557 | CONFIG_SMSC_PHY=y | ||
| 558 | # CONFIG_BROADCOM_PHY is not set | ||
| 559 | # CONFIG_ICPLUS_PHY is not set | ||
| 560 | # CONFIG_REALTEK_PHY is not set | ||
| 561 | # CONFIG_NATIONAL_PHY is not set | ||
| 562 | # CONFIG_STE10XP is not set | ||
| 563 | # CONFIG_LSI_ET1011C_PHY is not set | ||
| 564 | # CONFIG_FIXED_PHY is not set | ||
| 565 | # CONFIG_MDIO_BITBANG is not set | ||
| 566 | CONFIG_NET_ETHERNET=y | ||
| 567 | CONFIG_MII=y | ||
| 568 | # CONFIG_AX88796 is not set | ||
| 569 | CONFIG_SMC91X=y | ||
| 570 | # CONFIG_DM9000 is not set | ||
| 571 | # CONFIG_ENC28J60 is not set | ||
| 572 | # CONFIG_ETHOC is not set | ||
| 573 | # CONFIG_SMC911X is not set | ||
| 574 | # CONFIG_SMSC911X is not set | ||
| 575 | # CONFIG_DNET is not set | ||
| 576 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
| 577 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
| 578 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
| 579 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
| 580 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
| 581 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
| 582 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
| 583 | # CONFIG_B44 is not set | ||
| 584 | # CONFIG_KS8842 is not set | ||
| 585 | # CONFIG_KS8851 is not set | ||
| 586 | # CONFIG_KS8851_MLL is not set | ||
| 587 | CONFIG_NETDEV_1000=y | ||
| 588 | CONFIG_NETDEV_10000=y | ||
| 589 | CONFIG_WLAN=y | ||
| 590 | # CONFIG_WLAN_PRE80211 is not set | ||
| 591 | # CONFIG_WLAN_80211 is not set | ||
| 592 | |||
| 593 | # | ||
| 594 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
| 595 | # | ||
| 596 | |||
| 597 | # | ||
| 598 | # USB Network Adapters | ||
| 599 | # | ||
| 600 | # CONFIG_USB_CATC is not set | ||
| 601 | # CONFIG_USB_KAWETH is not set | ||
| 602 | # CONFIG_USB_PEGASUS is not set | ||
| 603 | # CONFIG_USB_RTL8150 is not set | ||
| 604 | # CONFIG_USB_USBNET is not set | ||
| 605 | # CONFIG_WAN is not set | ||
| 606 | # CONFIG_PPP is not set | ||
| 607 | # CONFIG_SLIP is not set | ||
| 608 | # CONFIG_NETCONSOLE is not set | ||
| 609 | # CONFIG_NETPOLL is not set | ||
| 610 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
| 611 | # CONFIG_ISDN is not set | ||
| 612 | # CONFIG_PHONE is not set | ||
| 613 | |||
| 614 | # | ||
| 615 | # Input device support | ||
| 616 | # | ||
| 617 | CONFIG_INPUT=y | ||
| 618 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 619 | # CONFIG_INPUT_POLLDEV is not set | ||
| 620 | |||
| 621 | # | ||
| 622 | # Userland interfaces | ||
| 623 | # | ||
| 624 | # CONFIG_INPUT_MOUSEDEV is not set | ||
| 625 | # CONFIG_INPUT_JOYDEV is not set | ||
| 626 | CONFIG_INPUT_EVDEV=y | ||
| 627 | # CONFIG_INPUT_EVBUG is not set | ||
| 628 | |||
| 629 | # | ||
| 630 | # Input Device Drivers | ||
| 631 | # | ||
| 632 | # CONFIG_INPUT_KEYBOARD is not set | ||
| 633 | # CONFIG_INPUT_MOUSE is not set | ||
| 634 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 635 | # CONFIG_INPUT_TABLET is not set | ||
| 636 | CONFIG_INPUT_TOUCHSCREEN=y | ||
| 637 | CONFIG_TOUCHSCREEN_ADS7846=y | ||
| 638 | # CONFIG_TOUCHSCREEN_AD7877 is not set | ||
| 639 | # CONFIG_TOUCHSCREEN_AD7879_I2C is not set | ||
| 640 | # CONFIG_TOUCHSCREEN_AD7879_SPI is not set | ||
| 641 | # CONFIG_TOUCHSCREEN_AD7879 is not set | ||
| 642 | # CONFIG_TOUCHSCREEN_EETI is not set | ||
| 643 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | ||
| 644 | # CONFIG_TOUCHSCREEN_GUNZE is not set | ||
| 645 | # CONFIG_TOUCHSCREEN_ELO is not set | ||
| 646 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | ||
| 647 | # CONFIG_TOUCHSCREEN_MCS5000 is not set | ||
| 648 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | ||
| 649 | # CONFIG_TOUCHSCREEN_INEXIO is not set | ||
| 650 | # CONFIG_TOUCHSCREEN_MK712 is not set | ||
| 651 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set | ||
| 652 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | ||
| 653 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set | ||
| 654 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | ||
| 655 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set | ||
| 656 | # CONFIG_TOUCHSCREEN_TSC2007 is not set | ||
| 657 | # CONFIG_TOUCHSCREEN_W90X900 is not set | ||
| 658 | # CONFIG_INPUT_MISC is not set | ||
| 659 | |||
| 660 | # | ||
| 661 | # Hardware I/O ports | ||
| 662 | # | ||
| 663 | # CONFIG_SERIO is not set | ||
| 664 | # CONFIG_GAMEPORT is not set | ||
| 665 | |||
| 666 | # | ||
| 667 | # Character devices | ||
| 668 | # | ||
| 669 | CONFIG_VT=y | ||
| 670 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 671 | CONFIG_VT_CONSOLE=y | ||
| 672 | CONFIG_HW_CONSOLE=y | ||
| 673 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
| 674 | CONFIG_DEVKMEM=y | ||
| 675 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 676 | |||
| 677 | # | ||
| 678 | # Serial drivers | ||
| 679 | # | ||
| 680 | CONFIG_SERIAL_8250=y | ||
| 681 | CONFIG_SERIAL_8250_CONSOLE=y | ||
| 682 | CONFIG_SERIAL_8250_NR_UARTS=32 | ||
| 683 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
| 684 | CONFIG_SERIAL_8250_EXTENDED=y | ||
| 685 | CONFIG_SERIAL_8250_MANY_PORTS=y | ||
| 686 | CONFIG_SERIAL_8250_SHARE_IRQ=y | ||
| 687 | CONFIG_SERIAL_8250_DETECT_IRQ=y | ||
| 688 | CONFIG_SERIAL_8250_RSA=y | ||
| 689 | |||
| 690 | # | ||
| 691 | # Non-8250 serial port support | ||
| 692 | # | ||
| 693 | # CONFIG_SERIAL_MAX3100 is not set | ||
| 694 | CONFIG_SERIAL_CORE=y | ||
| 695 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 696 | CONFIG_UNIX98_PTYS=y | ||
| 697 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 698 | # CONFIG_LEGACY_PTYS is not set | ||
| 699 | # CONFIG_IPMI_HANDLER is not set | ||
| 700 | CONFIG_HW_RANDOM=y | ||
| 701 | # CONFIG_HW_RANDOM_TIMERIOMEM is not set | ||
| 702 | # CONFIG_R3964 is not set | ||
| 703 | # CONFIG_RAW_DRIVER is not set | ||
| 704 | # CONFIG_TCG_TPM is not set | ||
| 705 | CONFIG_I2C=y | ||
| 706 | CONFIG_I2C_BOARDINFO=y | ||
| 707 | CONFIG_I2C_COMPAT=y | ||
| 708 | CONFIG_I2C_CHARDEV=y | ||
| 709 | CONFIG_I2C_HELPER_AUTO=y | ||
| 710 | |||
| 711 | # | ||
| 712 | # I2C Hardware Bus support | ||
| 713 | # | ||
| 714 | |||
| 715 | # | ||
| 716 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
| 717 | # | ||
| 718 | # CONFIG_I2C_DESIGNWARE is not set | ||
| 719 | # CONFIG_I2C_GPIO is not set | ||
| 720 | # CONFIG_I2C_OCORES is not set | ||
| 721 | CONFIG_I2C_OMAP=y | ||
| 722 | # CONFIG_I2C_SIMTEC is not set | ||
| 723 | |||
| 724 | # | ||
| 725 | # External I2C/SMBus adapter drivers | ||
| 726 | # | ||
| 727 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
| 728 | # CONFIG_I2C_TAOS_EVM is not set | ||
| 729 | # CONFIG_I2C_TINY_USB is not set | ||
| 730 | |||
| 731 | # | ||
| 732 | # Other I2C/SMBus bus drivers | ||
| 733 | # | ||
| 734 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
| 735 | # CONFIG_I2C_STUB is not set | ||
| 736 | |||
| 737 | # | ||
| 738 | # Miscellaneous I2C Chip support | ||
| 739 | # | ||
| 740 | # CONFIG_DS1682 is not set | ||
| 741 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 742 | # CONFIG_I2C_DEBUG_CORE is not set | ||
| 743 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
| 744 | # CONFIG_I2C_DEBUG_BUS is not set | ||
| 745 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
| 746 | CONFIG_SPI=y | ||
| 747 | # CONFIG_SPI_DEBUG is not set | ||
| 748 | CONFIG_SPI_MASTER=y | ||
| 749 | |||
| 750 | # | ||
| 751 | # SPI Master Controller Drivers | ||
| 752 | # | ||
| 753 | # CONFIG_SPI_BITBANG is not set | ||
| 754 | # CONFIG_SPI_GPIO is not set | ||
| 755 | CONFIG_SPI_OMAP24XX=y | ||
| 756 | |||
| 757 | # | ||
| 758 | # SPI Protocol Masters | ||
| 759 | # | ||
| 760 | # CONFIG_SPI_SPIDEV is not set | ||
| 761 | # CONFIG_SPI_TLE62X0 is not set | ||
| 762 | |||
| 763 | # | ||
| 764 | # PPS support | ||
| 765 | # | ||
| 766 | # CONFIG_PPS is not set | ||
| 767 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
| 768 | CONFIG_GPIOLIB=y | ||
| 769 | # CONFIG_DEBUG_GPIO is not set | ||
| 770 | # CONFIG_GPIO_SYSFS is not set | ||
| 771 | |||
| 772 | # | ||
| 773 | # Memory mapped GPIO expanders: | ||
| 774 | # | ||
| 775 | |||
| 776 | # | ||
| 777 | # I2C GPIO expanders: | ||
| 778 | # | ||
| 779 | # CONFIG_GPIO_MAX732X is not set | ||
| 780 | # CONFIG_GPIO_PCA953X is not set | ||
| 781 | # CONFIG_GPIO_PCF857X is not set | ||
| 782 | CONFIG_GPIO_TWL4030=y | ||
| 783 | |||
| 784 | # | ||
| 785 | # PCI GPIO expanders: | ||
| 786 | # | ||
| 787 | |||
| 788 | # | ||
| 789 | # SPI GPIO expanders: | ||
| 790 | # | ||
| 791 | # CONFIG_GPIO_MAX7301 is not set | ||
| 792 | # CONFIG_GPIO_MCP23S08 is not set | ||
| 793 | # CONFIG_GPIO_MC33880 is not set | ||
| 794 | |||
| 795 | # | ||
| 796 | # AC97 GPIO expanders: | ||
| 797 | # | ||
| 798 | CONFIG_W1=y | ||
| 799 | CONFIG_W1_CON=y | ||
| 800 | |||
| 801 | # | ||
| 802 | # 1-wire Bus Masters | ||
| 803 | # | ||
| 804 | # CONFIG_W1_MASTER_DS2490 is not set | ||
| 805 | # CONFIG_W1_MASTER_DS2482 is not set | ||
| 806 | # CONFIG_W1_MASTER_DS1WM is not set | ||
| 807 | # CONFIG_W1_MASTER_GPIO is not set | ||
| 808 | # CONFIG_HDQ_MASTER_OMAP is not set | ||
| 809 | |||
| 810 | # | ||
| 811 | # 1-wire Slaves | ||
| 812 | # | ||
| 813 | # CONFIG_W1_SLAVE_THERM is not set | ||
| 814 | # CONFIG_W1_SLAVE_SMEM is not set | ||
| 815 | # CONFIG_W1_SLAVE_DS2431 is not set | ||
| 816 | # CONFIG_W1_SLAVE_DS2433 is not set | ||
| 817 | # CONFIG_W1_SLAVE_DS2760 is not set | ||
| 818 | # CONFIG_W1_SLAVE_BQ27000 is not set | ||
| 819 | CONFIG_POWER_SUPPLY=y | ||
| 820 | # CONFIG_POWER_SUPPLY_DEBUG is not set | ||
| 821 | # CONFIG_PDA_POWER is not set | ||
| 822 | # CONFIG_BATTERY_DS2760 is not set | ||
| 823 | # CONFIG_BATTERY_DS2782 is not set | ||
| 824 | # CONFIG_BATTERY_BQ27x00 is not set | ||
| 825 | # CONFIG_BATTERY_MAX17040 is not set | ||
| 826 | # CONFIG_HWMON is not set | ||
| 827 | # CONFIG_THERMAL is not set | ||
| 828 | CONFIG_WATCHDOG=y | ||
| 829 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
| 830 | |||
| 831 | # | ||
| 832 | # Watchdog Device Drivers | ||
| 833 | # | ||
| 834 | # CONFIG_SOFT_WATCHDOG is not set | ||
| 835 | # CONFIG_OMAP_WATCHDOG is not set | ||
| 836 | # CONFIG_TWL4030_WATCHDOG is not set | ||
| 837 | |||
| 838 | # | ||
| 839 | # USB-based Watchdog Cards | ||
| 840 | # | ||
| 841 | # CONFIG_USBPCWATCHDOG is not set | ||
| 842 | CONFIG_SSB_POSSIBLE=y | ||
| 843 | |||
| 844 | # | ||
| 845 | # Sonics Silicon Backplane | ||
| 846 | # | ||
| 847 | # CONFIG_SSB is not set | ||
| 848 | |||
| 849 | # | ||
| 850 | # Multifunction device drivers | ||
| 851 | # | ||
| 852 | # CONFIG_MFD_CORE is not set | ||
| 853 | # CONFIG_MFD_SM501 is not set | ||
| 854 | # CONFIG_MFD_ASIC3 is not set | ||
| 855 | # CONFIG_HTC_EGPIO is not set | ||
| 856 | # CONFIG_HTC_PASIC3 is not set | ||
| 857 | # CONFIG_TPS65010 is not set | ||
| 858 | CONFIG_TWL4030_CORE=y | ||
| 859 | # CONFIG_TWL4030_POWER is not set | ||
| 860 | # CONFIG_MFD_TMIO is not set | ||
| 861 | # CONFIG_MFD_T7L66XB is not set | ||
| 862 | # CONFIG_MFD_TC6387XB is not set | ||
| 863 | # CONFIG_MFD_TC6393XB is not set | ||
| 864 | # CONFIG_PMIC_DA903X is not set | ||
| 865 | # CONFIG_MFD_WM8400 is not set | ||
| 866 | # CONFIG_MFD_WM831X is not set | ||
| 867 | # CONFIG_MFD_WM8350_I2C is not set | ||
| 868 | # CONFIG_MFD_PCF50633 is not set | ||
| 869 | # CONFIG_MFD_MC13783 is not set | ||
| 870 | # CONFIG_AB3100_CORE is not set | ||
| 871 | # CONFIG_EZX_PCAP is not set | ||
| 872 | CONFIG_REGULATOR=y | ||
| 873 | # CONFIG_REGULATOR_DEBUG is not set | ||
| 874 | # CONFIG_REGULATOR_FIXED_VOLTAGE is not set | ||
| 875 | # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set | ||
| 876 | # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set | ||
| 877 | # CONFIG_REGULATOR_BQ24022 is not set | ||
| 878 | # CONFIG_REGULATOR_MAX1586 is not set | ||
| 879 | CONFIG_REGULATOR_TWL4030=y | ||
| 880 | # CONFIG_REGULATOR_LP3971 is not set | ||
| 881 | # CONFIG_REGULATOR_TPS65023 is not set | ||
| 882 | # CONFIG_REGULATOR_TPS6507X is not set | ||
| 883 | # CONFIG_MEDIA_SUPPORT is not set | ||
| 884 | |||
| 885 | # | ||
| 886 | # Graphics support | ||
| 887 | # | ||
| 888 | # CONFIG_VGASTATE is not set | ||
| 889 | CONFIG_VIDEO_OUTPUT_CONTROL=m | ||
| 890 | # CONFIG_FB is not set | ||
| 891 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 892 | |||
| 893 | # | ||
| 894 | # Display device support | ||
| 895 | # | ||
| 896 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 897 | |||
| 898 | # | ||
| 899 | # Console display driver support | ||
| 900 | # | ||
| 901 | # CONFIG_VGA_CONSOLE is not set | ||
| 902 | CONFIG_DUMMY_CONSOLE=y | ||
| 903 | CONFIG_SOUND=y | ||
| 904 | # CONFIG_SOUND_OSS_CORE is not set | ||
| 905 | CONFIG_SND=y | ||
| 906 | CONFIG_SND_TIMER=m | ||
| 907 | CONFIG_SND_PCM=m | ||
| 908 | # CONFIG_SND_SEQUENCER is not set | ||
| 909 | # CONFIG_SND_MIXER_OSS is not set | ||
| 910 | # CONFIG_SND_PCM_OSS is not set | ||
| 911 | # CONFIG_SND_HRTIMER is not set | ||
| 912 | # CONFIG_SND_DYNAMIC_MINORS is not set | ||
| 913 | CONFIG_SND_SUPPORT_OLD_API=y | ||
| 914 | CONFIG_SND_VERBOSE_PROCFS=y | ||
| 915 | # CONFIG_SND_VERBOSE_PRINTK is not set | ||
| 916 | # CONFIG_SND_DEBUG is not set | ||
| 917 | # CONFIG_SND_RAWMIDI_SEQ is not set | ||
| 918 | # CONFIG_SND_OPL3_LIB_SEQ is not set | ||
| 919 | # CONFIG_SND_OPL4_LIB_SEQ is not set | ||
| 920 | # CONFIG_SND_SBAWE_SEQ is not set | ||
| 921 | # CONFIG_SND_EMU10K1_SEQ is not set | ||
| 922 | CONFIG_SND_DRIVERS=y | ||
| 923 | # CONFIG_SND_DUMMY is not set | ||
| 924 | # CONFIG_SND_MTPAV is not set | ||
| 925 | # CONFIG_SND_SERIAL_U16550 is not set | ||
| 926 | # CONFIG_SND_MPU401 is not set | ||
| 927 | CONFIG_SND_ARM=y | ||
| 928 | CONFIG_SND_SPI=y | ||
| 929 | CONFIG_SND_USB=y | ||
| 930 | # CONFIG_SND_USB_AUDIO is not set | ||
| 931 | # CONFIG_SND_USB_CAIAQ is not set | ||
| 932 | # CONFIG_SND_SOC is not set | ||
| 933 | # CONFIG_SOUND_PRIME is not set | ||
| 934 | CONFIG_HID_SUPPORT=y | ||
| 935 | CONFIG_HID=y | ||
| 936 | # CONFIG_HIDRAW is not set | ||
| 937 | |||
| 938 | # | ||
| 939 | # USB Input Devices | ||
| 940 | # | ||
| 941 | CONFIG_USB_HID=y | ||
| 942 | # CONFIG_HID_PID is not set | ||
| 943 | # CONFIG_USB_HIDDEV is not set | ||
| 944 | |||
| 945 | # | ||
| 946 | # Special HID drivers | ||
| 947 | # | ||
| 948 | # CONFIG_HID_A4TECH is not set | ||
| 949 | # CONFIG_HID_APPLE is not set | ||
| 950 | # CONFIG_HID_BELKIN is not set | ||
| 951 | # CONFIG_HID_CHERRY is not set | ||
| 952 | # CONFIG_HID_CHICONY is not set | ||
| 953 | # CONFIG_HID_CYPRESS is not set | ||
| 954 | # CONFIG_HID_DRAGONRISE is not set | ||
| 955 | # CONFIG_HID_EZKEY is not set | ||
| 956 | # CONFIG_HID_KYE is not set | ||
| 957 | # CONFIG_HID_GYRATION is not set | ||
| 958 | # CONFIG_HID_TWINHAN is not set | ||
| 959 | # CONFIG_HID_KENSINGTON is not set | ||
| 960 | # CONFIG_HID_LOGITECH is not set | ||
| 961 | # CONFIG_HID_MICROSOFT is not set | ||
| 962 | # CONFIG_HID_MONTEREY is not set | ||
| 963 | # CONFIG_HID_NTRIG is not set | ||
| 964 | # CONFIG_HID_PANTHERLORD is not set | ||
| 965 | # CONFIG_HID_PETALYNX is not set | ||
| 966 | # CONFIG_HID_SAMSUNG is not set | ||
| 967 | # CONFIG_HID_SONY is not set | ||
| 968 | # CONFIG_HID_SUNPLUS is not set | ||
| 969 | # CONFIG_HID_GREENASIA is not set | ||
| 970 | # CONFIG_HID_SMARTJOYPLUS is not set | ||
| 971 | # CONFIG_HID_TOPSEED is not set | ||
| 972 | # CONFIG_HID_THRUSTMASTER is not set | ||
| 973 | # CONFIG_HID_ZEROPLUS is not set | ||
| 974 | CONFIG_USB_SUPPORT=y | ||
| 975 | CONFIG_USB_ARCH_HAS_HCD=y | ||
| 976 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
| 977 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
| 978 | CONFIG_USB=y | ||
| 979 | CONFIG_USB_DEBUG=y | ||
| 980 | CONFIG_USB_ANNOUNCE_NEW_DEVICES=y | ||
| 981 | |||
| 982 | # | ||
| 983 | # Miscellaneous USB options | ||
| 984 | # | ||
| 985 | CONFIG_USB_DEVICEFS=y | ||
| 986 | # CONFIG_USB_DEVICE_CLASS is not set | ||
| 987 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
| 988 | CONFIG_USB_SUSPEND=y | ||
| 989 | CONFIG_USB_OTG=y | ||
| 990 | # CONFIG_USB_OTG_WHITELIST is not set | ||
| 991 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
| 992 | CONFIG_USB_MON=y | ||
| 993 | # CONFIG_USB_WUSB is not set | ||
| 994 | # CONFIG_USB_WUSB_CBAF is not set | ||
| 995 | |||
| 996 | # | ||
| 997 | # USB Host Controller Drivers | ||
| 998 | # | ||
| 999 | # CONFIG_USB_C67X00_HCD is not set | ||
| 1000 | # CONFIG_USB_EHCI_HCD is not set | ||
| 1001 | # CONFIG_USB_OXU210HP_HCD is not set | ||
| 1002 | # CONFIG_USB_ISP116X_HCD is not set | ||
| 1003 | # CONFIG_USB_ISP1760_HCD is not set | ||
| 1004 | # CONFIG_USB_ISP1362_HCD is not set | ||
| 1005 | # CONFIG_USB_OHCI_HCD is not set | ||
| 1006 | # CONFIG_USB_SL811_HCD is not set | ||
| 1007 | # CONFIG_USB_R8A66597_HCD is not set | ||
| 1008 | # CONFIG_USB_HWA_HCD is not set | ||
| 1009 | CONFIG_USB_MUSB_HDRC=y | ||
| 1010 | CONFIG_USB_MUSB_SOC=y | ||
| 1011 | |||
| 1012 | # | ||
| 1013 | # OMAP 343x high speed USB support | ||
| 1014 | # | ||
| 1015 | # CONFIG_USB_MUSB_HOST is not set | ||
| 1016 | # CONFIG_USB_MUSB_PERIPHERAL is not set | ||
| 1017 | CONFIG_USB_MUSB_OTG=y | ||
| 1018 | CONFIG_USB_GADGET_MUSB_HDRC=y | ||
| 1019 | CONFIG_USB_MUSB_HDRC_HCD=y | ||
| 1020 | # CONFIG_MUSB_PIO_ONLY is not set | ||
| 1021 | CONFIG_USB_INVENTRA_DMA=y | ||
| 1022 | # CONFIG_USB_TI_CPPI_DMA is not set | ||
| 1023 | CONFIG_USB_MUSB_DEBUG=y | ||
| 1024 | |||
| 1025 | # | ||
| 1026 | # USB Device Class drivers | ||
| 1027 | # | ||
| 1028 | # CONFIG_USB_ACM is not set | ||
| 1029 | # CONFIG_USB_PRINTER is not set | ||
| 1030 | # CONFIG_USB_WDM is not set | ||
| 1031 | # CONFIG_USB_TMC is not set | ||
| 1032 | |||
| 1033 | # | ||
| 1034 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | ||
| 1035 | # | ||
| 1036 | |||
| 1037 | # | ||
| 1038 | # also be needed; see USB_STORAGE Help for more info | ||
| 1039 | # | ||
| 1040 | CONFIG_USB_STORAGE=y | ||
| 1041 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
| 1042 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
| 1043 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
| 1044 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
| 1045 | # CONFIG_USB_STORAGE_USBAT is not set | ||
| 1046 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
| 1047 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
| 1048 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
| 1049 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
| 1050 | # CONFIG_USB_STORAGE_ONETOUCH is not set | ||
| 1051 | # CONFIG_USB_STORAGE_KARMA is not set | ||
| 1052 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
| 1053 | # CONFIG_USB_LIBUSUAL is not set | ||
| 1054 | |||
| 1055 | # | ||
| 1056 | # USB Imaging devices | ||
| 1057 | # | ||
| 1058 | # CONFIG_USB_MDC800 is not set | ||
| 1059 | # CONFIG_USB_MICROTEK is not set | ||
| 1060 | |||
| 1061 | # | ||
| 1062 | # USB port drivers | ||
| 1063 | # | ||
| 1064 | # CONFIG_USB_SERIAL is not set | ||
| 1065 | |||
| 1066 | # | ||
| 1067 | # USB Miscellaneous drivers | ||
| 1068 | # | ||
| 1069 | # CONFIG_USB_EMI62 is not set | ||
| 1070 | # CONFIG_USB_EMI26 is not set | ||
| 1071 | # CONFIG_USB_ADUTUX is not set | ||
| 1072 | # CONFIG_USB_SEVSEG is not set | ||
| 1073 | # CONFIG_USB_RIO500 is not set | ||
| 1074 | # CONFIG_USB_LEGOTOWER is not set | ||
| 1075 | # CONFIG_USB_LCD is not set | ||
| 1076 | # CONFIG_USB_BERRY_CHARGE is not set | ||
| 1077 | # CONFIG_USB_LED is not set | ||
| 1078 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
| 1079 | # CONFIG_USB_CYTHERM is not set | ||
| 1080 | # CONFIG_USB_IDMOUSE is not set | ||
| 1081 | # CONFIG_USB_FTDI_ELAN is not set | ||
| 1082 | # CONFIG_USB_APPLEDISPLAY is not set | ||
| 1083 | # CONFIG_USB_SISUSBVGA is not set | ||
| 1084 | # CONFIG_USB_LD is not set | ||
| 1085 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
| 1086 | # CONFIG_USB_IOWARRIOR is not set | ||
| 1087 | CONFIG_USB_TEST=m | ||
| 1088 | # CONFIG_USB_ISIGHTFW is not set | ||
| 1089 | # CONFIG_USB_VST is not set | ||
| 1090 | CONFIG_USB_GADGET=m | ||
| 1091 | CONFIG_USB_GADGET_DEBUG=y | ||
| 1092 | CONFIG_USB_GADGET_DEBUG_FILES=y | ||
| 1093 | CONFIG_USB_GADGET_VBUS_DRAW=2 | ||
| 1094 | CONFIG_USB_GADGET_SELECTED=y | ||
| 1095 | # CONFIG_USB_GADGET_AT91 is not set | ||
| 1096 | # CONFIG_USB_GADGET_ATMEL_USBA is not set | ||
| 1097 | # CONFIG_USB_GADGET_FSL_USB2 is not set | ||
| 1098 | # CONFIG_USB_GADGET_LH7A40X is not set | ||
| 1099 | # CONFIG_USB_GADGET_OMAP is not set | ||
| 1100 | # CONFIG_USB_GADGET_PXA25X is not set | ||
| 1101 | # CONFIG_USB_GADGET_R8A66597 is not set | ||
| 1102 | # CONFIG_USB_GADGET_PXA27X is not set | ||
| 1103 | # CONFIG_USB_GADGET_S3C_HSOTG is not set | ||
| 1104 | # CONFIG_USB_GADGET_IMX is not set | ||
| 1105 | # CONFIG_USB_GADGET_S3C2410 is not set | ||
| 1106 | # CONFIG_USB_GADGET_M66592 is not set | ||
| 1107 | # CONFIG_USB_GADGET_AMD5536UDC is not set | ||
| 1108 | # CONFIG_USB_GADGET_FSL_QE is not set | ||
| 1109 | # CONFIG_USB_GADGET_CI13XXX is not set | ||
| 1110 | # CONFIG_USB_GADGET_NET2280 is not set | ||
| 1111 | # CONFIG_USB_GADGET_GOKU is not set | ||
| 1112 | # CONFIG_USB_GADGET_LANGWELL is not set | ||
| 1113 | # CONFIG_USB_GADGET_DUMMY_HCD is not set | ||
| 1114 | CONFIG_USB_GADGET_DUALSPEED=y | ||
| 1115 | CONFIG_USB_ZERO=m | ||
| 1116 | # CONFIG_USB_ZERO_HNPTEST is not set | ||
| 1117 | CONFIG_USB_AUDIO=m | ||
| 1118 | CONFIG_USB_ETH=m | ||
| 1119 | CONFIG_USB_ETH_RNDIS=y | ||
| 1120 | # CONFIG_USB_ETH_EEM is not set | ||
| 1121 | CONFIG_USB_GADGETFS=m | ||
| 1122 | CONFIG_USB_FILE_STORAGE=m | ||
| 1123 | # CONFIG_USB_FILE_STORAGE_TEST is not set | ||
| 1124 | CONFIG_USB_G_SERIAL=m | ||
| 1125 | # CONFIG_USB_MIDI_GADGET is not set | ||
| 1126 | # CONFIG_USB_G_PRINTER is not set | ||
| 1127 | CONFIG_USB_CDC_COMPOSITE=m | ||
| 1128 | |||
| 1129 | # | ||
| 1130 | # OTG and related infrastructure | ||
| 1131 | # | ||
| 1132 | CONFIG_USB_OTG_UTILS=y | ||
| 1133 | # CONFIG_USB_GPIO_VBUS is not set | ||
| 1134 | # CONFIG_ISP1301_OMAP is not set | ||
| 1135 | CONFIG_TWL4030_USB=y | ||
| 1136 | # CONFIG_NOP_USB_XCEIV is not set | ||
| 1137 | CONFIG_MMC=y | ||
| 1138 | # CONFIG_MMC_DEBUG is not set | ||
| 1139 | # CONFIG_MMC_UNSAFE_RESUME is not set | ||
| 1140 | |||
| 1141 | # | ||
| 1142 | # MMC/SD/SDIO Card Drivers | ||
| 1143 | # | ||
| 1144 | CONFIG_MMC_BLOCK=y | ||
| 1145 | CONFIG_MMC_BLOCK_BOUNCE=y | ||
| 1146 | # CONFIG_SDIO_UART is not set | ||
| 1147 | # CONFIG_MMC_TEST is not set | ||
| 1148 | |||
| 1149 | # | ||
| 1150 | # MMC/SD/SDIO Host Controller Drivers | ||
| 1151 | # | ||
| 1152 | # CONFIG_MMC_SDHCI is not set | ||
| 1153 | # CONFIG_MMC_OMAP is not set | ||
| 1154 | CONFIG_MMC_OMAP_HS=y | ||
| 1155 | # CONFIG_MMC_AT91 is not set | ||
| 1156 | # CONFIG_MMC_ATMELMCI is not set | ||
| 1157 | # CONFIG_MMC_SPI is not set | ||
| 1158 | # CONFIG_MEMSTICK is not set | ||
| 1159 | # CONFIG_NEW_LEDS is not set | ||
| 1160 | # CONFIG_ACCESSIBILITY is not set | ||
| 1161 | CONFIG_RTC_LIB=y | ||
| 1162 | CONFIG_RTC_CLASS=y | ||
| 1163 | CONFIG_RTC_HCTOSYS=y | ||
| 1164 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
| 1165 | # CONFIG_RTC_DEBUG is not set | ||
| 1166 | |||
| 1167 | # | ||
| 1168 | # RTC interfaces | ||
| 1169 | # | ||
| 1170 | CONFIG_RTC_INTF_SYSFS=y | ||
| 1171 | CONFIG_RTC_INTF_PROC=y | ||
| 1172 | CONFIG_RTC_INTF_DEV=y | ||
| 1173 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
| 1174 | # CONFIG_RTC_DRV_TEST is not set | ||
| 1175 | |||
| 1176 | # | ||
| 1177 | # I2C RTC drivers | ||
| 1178 | # | ||
| 1179 | # CONFIG_RTC_DRV_DS1307 is not set | ||
| 1180 | # CONFIG_RTC_DRV_DS1374 is not set | ||
| 1181 | # CONFIG_RTC_DRV_DS1672 is not set | ||
| 1182 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
| 1183 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
| 1184 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
| 1185 | # CONFIG_RTC_DRV_X1205 is not set | ||
| 1186 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
| 1187 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
| 1188 | # CONFIG_RTC_DRV_M41T80 is not set | ||
| 1189 | # CONFIG_RTC_DRV_TWL4030 is not set | ||
| 1190 | # CONFIG_RTC_DRV_S35390A is not set | ||
| 1191 | # CONFIG_RTC_DRV_FM3130 is not set | ||
| 1192 | # CONFIG_RTC_DRV_RX8581 is not set | ||
| 1193 | # CONFIG_RTC_DRV_RX8025 is not set | ||
| 1194 | |||
| 1195 | # | ||
| 1196 | # SPI RTC drivers | ||
| 1197 | # | ||
| 1198 | # CONFIG_RTC_DRV_M41T94 is not set | ||
| 1199 | # CONFIG_RTC_DRV_DS1305 is not set | ||
| 1200 | # CONFIG_RTC_DRV_DS1390 is not set | ||
| 1201 | # CONFIG_RTC_DRV_MAX6902 is not set | ||
| 1202 | # CONFIG_RTC_DRV_R9701 is not set | ||
| 1203 | # CONFIG_RTC_DRV_RS5C348 is not set | ||
| 1204 | # CONFIG_RTC_DRV_DS3234 is not set | ||
| 1205 | # CONFIG_RTC_DRV_PCF2123 is not set | ||
| 1206 | |||
| 1207 | # | ||
| 1208 | # Platform RTC drivers | ||
| 1209 | # | ||
| 1210 | # CONFIG_RTC_DRV_CMOS is not set | ||
| 1211 | # CONFIG_RTC_DRV_DS1286 is not set | ||
| 1212 | # CONFIG_RTC_DRV_DS1511 is not set | ||
| 1213 | # CONFIG_RTC_DRV_DS1553 is not set | ||
| 1214 | # CONFIG_RTC_DRV_DS1742 is not set | ||
| 1215 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
| 1216 | # CONFIG_RTC_DRV_M48T86 is not set | ||
| 1217 | # CONFIG_RTC_DRV_M48T35 is not set | ||
| 1218 | # CONFIG_RTC_DRV_M48T59 is not set | ||
| 1219 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
| 1220 | # CONFIG_RTC_DRV_V3020 is not set | ||
| 1221 | |||
| 1222 | # | ||
| 1223 | # on-CPU RTC drivers | ||
| 1224 | # | ||
| 1225 | # CONFIG_DMADEVICES is not set | ||
| 1226 | # CONFIG_AUXDISPLAY is not set | ||
| 1227 | # CONFIG_UIO is not set | ||
| 1228 | |||
| 1229 | # | ||
| 1230 | # TI VLYNQ | ||
| 1231 | # | ||
| 1232 | # CONFIG_STAGING is not set | ||
| 1233 | |||
| 1234 | # | ||
| 1235 | # CBUS support | ||
| 1236 | # | ||
| 1237 | # CONFIG_CBUS is not set | ||
| 1238 | |||
| 1239 | # | ||
| 1240 | # File systems | ||
| 1241 | # | ||
| 1242 | CONFIG_EXT2_FS=y | ||
| 1243 | # CONFIG_EXT2_FS_XATTR is not set | ||
| 1244 | # CONFIG_EXT2_FS_XIP is not set | ||
| 1245 | CONFIG_EXT3_FS=y | ||
| 1246 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 1247 | # CONFIG_EXT3_FS_XATTR is not set | ||
| 1248 | # CONFIG_EXT4_FS is not set | ||
| 1249 | CONFIG_JBD=y | ||
| 1250 | # CONFIG_REISERFS_FS is not set | ||
| 1251 | # CONFIG_JFS_FS is not set | ||
| 1252 | CONFIG_FS_POSIX_ACL=y | ||
| 1253 | # CONFIG_XFS_FS is not set | ||
| 1254 | # CONFIG_GFS2_FS is not set | ||
| 1255 | # CONFIG_OCFS2_FS is not set | ||
| 1256 | # CONFIG_BTRFS_FS is not set | ||
| 1257 | # CONFIG_NILFS2_FS is not set | ||
| 1258 | CONFIG_FILE_LOCKING=y | ||
| 1259 | CONFIG_FSNOTIFY=y | ||
| 1260 | CONFIG_DNOTIFY=y | ||
| 1261 | CONFIG_INOTIFY=y | ||
| 1262 | CONFIG_INOTIFY_USER=y | ||
| 1263 | CONFIG_QUOTA=y | ||
| 1264 | # CONFIG_QUOTA_NETLINK_INTERFACE is not set | ||
| 1265 | CONFIG_PRINT_QUOTA_WARNING=y | ||
| 1266 | CONFIG_QUOTA_TREE=y | ||
| 1267 | # CONFIG_QFMT_V1 is not set | ||
| 1268 | CONFIG_QFMT_V2=y | ||
| 1269 | CONFIG_QUOTACTL=y | ||
| 1270 | # CONFIG_AUTOFS_FS is not set | ||
| 1271 | # CONFIG_AUTOFS4_FS is not set | ||
| 1272 | # CONFIG_FUSE_FS is not set | ||
| 1273 | |||
| 1274 | # | ||
| 1275 | # Caches | ||
| 1276 | # | ||
| 1277 | # CONFIG_FSCACHE is not set | ||
| 1278 | |||
| 1279 | # | ||
| 1280 | # CD-ROM/DVD Filesystems | ||
| 1281 | # | ||
| 1282 | # CONFIG_ISO9660_FS is not set | ||
| 1283 | # CONFIG_UDF_FS is not set | ||
| 1284 | |||
| 1285 | # | ||
| 1286 | # DOS/FAT/NT Filesystems | ||
| 1287 | # | ||
| 1288 | CONFIG_FAT_FS=y | ||
| 1289 | CONFIG_MSDOS_FS=y | ||
| 1290 | CONFIG_VFAT_FS=y | ||
| 1291 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
| 1292 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
| 1293 | # CONFIG_NTFS_FS is not set | ||
| 1294 | |||
| 1295 | # | ||
| 1296 | # Pseudo filesystems | ||
| 1297 | # | ||
| 1298 | CONFIG_PROC_FS=y | ||
| 1299 | CONFIG_PROC_SYSCTL=y | ||
| 1300 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 1301 | CONFIG_SYSFS=y | ||
| 1302 | CONFIG_TMPFS=y | ||
| 1303 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
| 1304 | # CONFIG_HUGETLB_PAGE is not set | ||
| 1305 | # CONFIG_CONFIGFS_FS is not set | ||
| 1306 | CONFIG_MISC_FILESYSTEMS=y | ||
| 1307 | # CONFIG_ADFS_FS is not set | ||
| 1308 | # CONFIG_AFFS_FS is not set | ||
| 1309 | # CONFIG_HFS_FS is not set | ||
| 1310 | # CONFIG_HFSPLUS_FS is not set | ||
| 1311 | # CONFIG_BEFS_FS is not set | ||
| 1312 | # CONFIG_BFS_FS is not set | ||
| 1313 | # CONFIG_EFS_FS is not set | ||
| 1314 | # CONFIG_CRAMFS is not set | ||
| 1315 | # CONFIG_SQUASHFS is not set | ||
| 1316 | # CONFIG_VXFS_FS is not set | ||
| 1317 | # CONFIG_MINIX_FS is not set | ||
| 1318 | # CONFIG_OMFS_FS is not set | ||
| 1319 | # CONFIG_HPFS_FS is not set | ||
| 1320 | # CONFIG_QNX4FS_FS is not set | ||
| 1321 | # CONFIG_ROMFS_FS is not set | ||
| 1322 | # CONFIG_SYSV_FS is not set | ||
| 1323 | # CONFIG_UFS_FS is not set | ||
| 1324 | CONFIG_NETWORK_FILESYSTEMS=y | ||
| 1325 | CONFIG_NFS_FS=y | ||
| 1326 | CONFIG_NFS_V3=y | ||
| 1327 | CONFIG_NFS_V3_ACL=y | ||
| 1328 | CONFIG_NFS_V4=y | ||
| 1329 | # CONFIG_NFS_V4_1 is not set | ||
| 1330 | CONFIG_ROOT_NFS=y | ||
| 1331 | # CONFIG_NFSD is not set | ||
| 1332 | CONFIG_LOCKD=y | ||
| 1333 | CONFIG_LOCKD_V4=y | ||
| 1334 | CONFIG_NFS_ACL_SUPPORT=y | ||
| 1335 | CONFIG_NFS_COMMON=y | ||
| 1336 | CONFIG_SUNRPC=y | ||
| 1337 | CONFIG_SUNRPC_GSS=y | ||
| 1338 | CONFIG_RPCSEC_GSS_KRB5=y | ||
| 1339 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
| 1340 | # CONFIG_SMB_FS is not set | ||
| 1341 | # CONFIG_CIFS is not set | ||
| 1342 | # CONFIG_NCP_FS is not set | ||
| 1343 | # CONFIG_CODA_FS is not set | ||
| 1344 | # CONFIG_AFS_FS is not set | ||
| 1345 | |||
| 1346 | # | ||
| 1347 | # Partition Types | ||
| 1348 | # | ||
| 1349 | CONFIG_PARTITION_ADVANCED=y | ||
| 1350 | # CONFIG_ACORN_PARTITION is not set | ||
| 1351 | # CONFIG_OSF_PARTITION is not set | ||
| 1352 | # CONFIG_AMIGA_PARTITION is not set | ||
| 1353 | # CONFIG_ATARI_PARTITION is not set | ||
| 1354 | # CONFIG_MAC_PARTITION is not set | ||
| 1355 | CONFIG_MSDOS_PARTITION=y | ||
| 1356 | # CONFIG_BSD_DISKLABEL is not set | ||
| 1357 | # CONFIG_MINIX_SUBPARTITION is not set | ||
| 1358 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
| 1359 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
| 1360 | # CONFIG_LDM_PARTITION is not set | ||
| 1361 | # CONFIG_SGI_PARTITION is not set | ||
| 1362 | # CONFIG_ULTRIX_PARTITION is not set | ||
| 1363 | # CONFIG_SUN_PARTITION is not set | ||
| 1364 | # CONFIG_KARMA_PARTITION is not set | ||
| 1365 | # CONFIG_EFI_PARTITION is not set | ||
| 1366 | # CONFIG_SYSV68_PARTITION is not set | ||
| 1367 | CONFIG_NLS=y | ||
| 1368 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
| 1369 | CONFIG_NLS_CODEPAGE_437=y | ||
| 1370 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
| 1371 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
| 1372 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
| 1373 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
| 1374 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
| 1375 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
| 1376 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
| 1377 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
| 1378 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
| 1379 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
| 1380 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
| 1381 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
| 1382 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
| 1383 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
| 1384 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
| 1385 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
| 1386 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
| 1387 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
| 1388 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
| 1389 | # CONFIG_NLS_ISO8859_8 is not set | ||
| 1390 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
| 1391 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
| 1392 | # CONFIG_NLS_ASCII is not set | ||
| 1393 | CONFIG_NLS_ISO8859_1=y | ||
| 1394 | # CONFIG_NLS_ISO8859_2 is not set | ||
| 1395 | # CONFIG_NLS_ISO8859_3 is not set | ||
| 1396 | # CONFIG_NLS_ISO8859_4 is not set | ||
| 1397 | # CONFIG_NLS_ISO8859_5 is not set | ||
| 1398 | # CONFIG_NLS_ISO8859_6 is not set | ||
| 1399 | # CONFIG_NLS_ISO8859_7 is not set | ||
| 1400 | # CONFIG_NLS_ISO8859_9 is not set | ||
| 1401 | # CONFIG_NLS_ISO8859_13 is not set | ||
| 1402 | # CONFIG_NLS_ISO8859_14 is not set | ||
| 1403 | # CONFIG_NLS_ISO8859_15 is not set | ||
| 1404 | # CONFIG_NLS_KOI8_R is not set | ||
| 1405 | # CONFIG_NLS_KOI8_U is not set | ||
| 1406 | # CONFIG_NLS_UTF8 is not set | ||
| 1407 | # CONFIG_DLM is not set | ||
| 1408 | |||
| 1409 | # | ||
| 1410 | # Kernel hacking | ||
| 1411 | # | ||
| 1412 | # CONFIG_PRINTK_TIME is not set | ||
| 1413 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 1414 | CONFIG_ENABLE_MUST_CHECK=y | ||
| 1415 | CONFIG_FRAME_WARN=1024 | ||
| 1416 | CONFIG_MAGIC_SYSRQ=y | ||
| 1417 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 1418 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 1419 | # CONFIG_DEBUG_FS is not set | ||
| 1420 | # CONFIG_HEADERS_CHECK is not set | ||
| 1421 | CONFIG_DEBUG_KERNEL=y | ||
| 1422 | # CONFIG_DEBUG_SHIRQ is not set | ||
| 1423 | CONFIG_DETECT_SOFTLOCKUP=y | ||
| 1424 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | ||
| 1425 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | ||
| 1426 | CONFIG_DETECT_HUNG_TASK=y | ||
| 1427 | # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set | ||
| 1428 | CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 | ||
| 1429 | CONFIG_SCHED_DEBUG=y | ||
| 1430 | # CONFIG_SCHEDSTATS is not set | ||
| 1431 | # CONFIG_TIMER_STATS is not set | ||
| 1432 | # CONFIG_DEBUG_OBJECTS is not set | ||
| 1433 | # CONFIG_DEBUG_SLAB is not set | ||
| 1434 | # CONFIG_DEBUG_KMEMLEAK is not set | ||
| 1435 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
| 1436 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 1437 | # CONFIG_DEBUG_SPINLOCK is not set | ||
| 1438 | CONFIG_DEBUG_MUTEXES=y | ||
| 1439 | # CONFIG_DEBUG_LOCK_ALLOC is not set | ||
| 1440 | # CONFIG_PROVE_LOCKING is not set | ||
| 1441 | # CONFIG_LOCK_STAT is not set | ||
| 1442 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
| 1443 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
| 1444 | # CONFIG_DEBUG_KOBJECT is not set | ||
| 1445 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
| 1446 | CONFIG_DEBUG_INFO=y | ||
| 1447 | # CONFIG_DEBUG_VM is not set | ||
| 1448 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
| 1449 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
| 1450 | # CONFIG_DEBUG_LIST is not set | ||
| 1451 | # CONFIG_DEBUG_SG is not set | ||
| 1452 | # CONFIG_DEBUG_NOTIFIERS is not set | ||
| 1453 | # CONFIG_DEBUG_CREDENTIALS is not set | ||
| 1454 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
| 1455 | # CONFIG_RCU_TORTURE_TEST is not set | ||
| 1456 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 1457 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
| 1458 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
| 1459 | # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set | ||
| 1460 | # CONFIG_FAULT_INJECTION is not set | ||
| 1461 | # CONFIG_LATENCYTOP is not set | ||
| 1462 | # CONFIG_PAGE_POISONING is not set | ||
| 1463 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 1464 | CONFIG_TRACING_SUPPORT=y | ||
| 1465 | CONFIG_FTRACE=y | ||
| 1466 | # CONFIG_FUNCTION_TRACER is not set | ||
| 1467 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 1468 | # CONFIG_SCHED_TRACER is not set | ||
| 1469 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set | ||
| 1470 | # CONFIG_BOOT_TRACER is not set | ||
| 1471 | CONFIG_BRANCH_PROFILE_NONE=y | ||
| 1472 | # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set | ||
| 1473 | # CONFIG_PROFILE_ALL_BRANCHES is not set | ||
| 1474 | # CONFIG_STACK_TRACER is not set | ||
| 1475 | # CONFIG_KMEMTRACE is not set | ||
| 1476 | # CONFIG_WORKQUEUE_TRACER is not set | ||
| 1477 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 1478 | # CONFIG_SAMPLES is not set | ||
| 1479 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 1480 | # CONFIG_KGDB is not set | ||
| 1481 | CONFIG_ARM_UNWIND=y | ||
| 1482 | # CONFIG_DEBUG_USER is not set | ||
| 1483 | # CONFIG_DEBUG_ERRORS is not set | ||
| 1484 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
| 1485 | CONFIG_DEBUG_LL=y | ||
| 1486 | # CONFIG_DEBUG_ICEDCC is not set | ||
| 1487 | |||
| 1488 | # | ||
| 1489 | # Security options | ||
| 1490 | # | ||
| 1491 | # CONFIG_KEYS is not set | ||
| 1492 | # CONFIG_SECURITY is not set | ||
| 1493 | # CONFIG_SECURITYFS is not set | ||
| 1494 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
| 1495 | CONFIG_CRYPTO=y | ||
| 1496 | |||
| 1497 | # | ||
| 1498 | # Crypto core or helper | ||
| 1499 | # | ||
| 1500 | CONFIG_CRYPTO_ALGAPI=y | ||
| 1501 | CONFIG_CRYPTO_ALGAPI2=y | ||
| 1502 | CONFIG_CRYPTO_AEAD2=y | ||
| 1503 | CONFIG_CRYPTO_BLKCIPHER=y | ||
| 1504 | CONFIG_CRYPTO_BLKCIPHER2=y | ||
| 1505 | CONFIG_CRYPTO_HASH=y | ||
| 1506 | CONFIG_CRYPTO_HASH2=y | ||
| 1507 | CONFIG_CRYPTO_RNG2=y | ||
| 1508 | CONFIG_CRYPTO_PCOMP=y | ||
| 1509 | CONFIG_CRYPTO_MANAGER=y | ||
| 1510 | CONFIG_CRYPTO_MANAGER2=y | ||
| 1511 | # CONFIG_CRYPTO_GF128MUL is not set | ||
| 1512 | # CONFIG_CRYPTO_NULL is not set | ||
| 1513 | CONFIG_CRYPTO_WORKQUEUE=y | ||
| 1514 | # CONFIG_CRYPTO_CRYPTD is not set | ||
| 1515 | # CONFIG_CRYPTO_AUTHENC is not set | ||
| 1516 | # CONFIG_CRYPTO_TEST is not set | ||
| 1517 | |||
| 1518 | # | ||
| 1519 | # Authenticated Encryption with Associated Data | ||
| 1520 | # | ||
| 1521 | # CONFIG_CRYPTO_CCM is not set | ||
| 1522 | # CONFIG_CRYPTO_GCM is not set | ||
| 1523 | # CONFIG_CRYPTO_SEQIV is not set | ||
| 1524 | |||
| 1525 | # | ||
| 1526 | # Block modes | ||
| 1527 | # | ||
| 1528 | CONFIG_CRYPTO_CBC=y | ||
| 1529 | # CONFIG_CRYPTO_CTR is not set | ||
| 1530 | # CONFIG_CRYPTO_CTS is not set | ||
| 1531 | CONFIG_CRYPTO_ECB=m | ||
| 1532 | # CONFIG_CRYPTO_LRW is not set | ||
| 1533 | CONFIG_CRYPTO_PCBC=m | ||
| 1534 | # CONFIG_CRYPTO_XTS is not set | ||
| 1535 | |||
| 1536 | # | ||
| 1537 | # Hash modes | ||
| 1538 | # | ||
| 1539 | # CONFIG_CRYPTO_HMAC is not set | ||
| 1540 | # CONFIG_CRYPTO_XCBC is not set | ||
| 1541 | # CONFIG_CRYPTO_VMAC is not set | ||
| 1542 | |||
| 1543 | # | ||
| 1544 | # Digest | ||
| 1545 | # | ||
| 1546 | CONFIG_CRYPTO_CRC32C=y | ||
| 1547 | # CONFIG_CRYPTO_GHASH is not set | ||
| 1548 | # CONFIG_CRYPTO_MD4 is not set | ||
| 1549 | CONFIG_CRYPTO_MD5=y | ||
| 1550 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
| 1551 | # CONFIG_CRYPTO_RMD128 is not set | ||
| 1552 | # CONFIG_CRYPTO_RMD160 is not set | ||
| 1553 | # CONFIG_CRYPTO_RMD256 is not set | ||
| 1554 | # CONFIG_CRYPTO_RMD320 is not set | ||
| 1555 | # CONFIG_CRYPTO_SHA1 is not set | ||
| 1556 | # CONFIG_CRYPTO_SHA256 is not set | ||
| 1557 | # CONFIG_CRYPTO_SHA512 is not set | ||
| 1558 | # CONFIG_CRYPTO_TGR192 is not set | ||
| 1559 | # CONFIG_CRYPTO_WP512 is not set | ||
| 1560 | |||
| 1561 | # | ||
| 1562 | # Ciphers | ||
| 1563 | # | ||
| 1564 | # CONFIG_CRYPTO_AES is not set | ||
| 1565 | # CONFIG_CRYPTO_ANUBIS is not set | ||
| 1566 | # CONFIG_CRYPTO_ARC4 is not set | ||
| 1567 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
| 1568 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
| 1569 | # CONFIG_CRYPTO_CAST5 is not set | ||
| 1570 | # CONFIG_CRYPTO_CAST6 is not set | ||
| 1571 | CONFIG_CRYPTO_DES=y | ||
| 1572 | # CONFIG_CRYPTO_FCRYPT is not set | ||
| 1573 | # CONFIG_CRYPTO_KHAZAD is not set | ||
| 1574 | # CONFIG_CRYPTO_SALSA20 is not set | ||
| 1575 | # CONFIG_CRYPTO_SEED is not set | ||
| 1576 | # CONFIG_CRYPTO_SERPENT is not set | ||
| 1577 | # CONFIG_CRYPTO_TEA is not set | ||
| 1578 | # CONFIG_CRYPTO_TWOFISH is not set | ||
| 1579 | |||
| 1580 | # | ||
| 1581 | # Compression | ||
| 1582 | # | ||
| 1583 | # CONFIG_CRYPTO_DEFLATE is not set | ||
| 1584 | # CONFIG_CRYPTO_ZLIB is not set | ||
| 1585 | # CONFIG_CRYPTO_LZO is not set | ||
| 1586 | |||
| 1587 | # | ||
| 1588 | # Random Number Generation | ||
| 1589 | # | ||
| 1590 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
| 1591 | CONFIG_CRYPTO_HW=y | ||
| 1592 | # CONFIG_BINARY_PRINTF is not set | ||
| 1593 | |||
| 1594 | # | ||
| 1595 | # Library routines | ||
| 1596 | # | ||
| 1597 | CONFIG_BITREVERSE=y | ||
| 1598 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
| 1599 | CONFIG_CRC_CCITT=y | ||
| 1600 | # CONFIG_CRC16 is not set | ||
| 1601 | CONFIG_CRC_T10DIF=y | ||
| 1602 | # CONFIG_CRC_ITU_T is not set | ||
| 1603 | CONFIG_CRC32=y | ||
| 1604 | # CONFIG_CRC7 is not set | ||
| 1605 | CONFIG_LIBCRC32C=y | ||
| 1606 | CONFIG_ZLIB_INFLATE=y | ||
| 1607 | CONFIG_DECOMPRESS_GZIP=y | ||
| 1608 | CONFIG_HAS_IOMEM=y | ||
| 1609 | CONFIG_HAS_IOPORT=y | ||
| 1610 | CONFIG_HAS_DMA=y | ||
| 1611 | CONFIG_NLATTR=y | ||
diff --git a/arch/arm/configs/omap_4430sdp_defconfig b/arch/arm/configs/omap_4430sdp_defconfig index 23e43ea4efa..a464ca332a2 100644 --- a/arch/arm/configs/omap_4430sdp_defconfig +++ b/arch/arm/configs/omap_4430sdp_defconfig | |||
| @@ -52,8 +52,8 @@ CONFIG_FAIR_GROUP_SCHED=y | |||
| 52 | CONFIG_USER_SCHED=y | 52 | CONFIG_USER_SCHED=y |
| 53 | # CONFIG_CGROUP_SCHED is not set | 53 | # CONFIG_CGROUP_SCHED is not set |
| 54 | # CONFIG_CGROUPS is not set | 54 | # CONFIG_CGROUPS is not set |
| 55 | CONFIG_SYSFS_DEPRECATED=y | 55 | # CONFIG_SYSFS_DEPRECATED=y is not set |
| 56 | CONFIG_SYSFS_DEPRECATED_V2=y | 56 | # CONFIG_SYSFS_DEPRECATED_V2=y is not set |
| 57 | # CONFIG_RELAY is not set | 57 | # CONFIG_RELAY is not set |
| 58 | # CONFIG_NAMESPACES is not set | 58 | # CONFIG_NAMESPACES is not set |
| 59 | CONFIG_BLK_DEV_INITRD=y | 59 | CONFIG_BLK_DEV_INITRD=y |
diff --git a/arch/arm/configs/omap_ldp_defconfig b/arch/arm/configs/omap_ldp_defconfig index b9c48919a68..9139532c3be 100644 --- a/arch/arm/configs/omap_ldp_defconfig +++ b/arch/arm/configs/omap_ldp_defconfig | |||
| @@ -49,8 +49,8 @@ CONFIG_FAIR_GROUP_SCHED=y | |||
| 49 | # CONFIG_RT_GROUP_SCHED is not set | 49 | # CONFIG_RT_GROUP_SCHED is not set |
| 50 | CONFIG_USER_SCHED=y | 50 | CONFIG_USER_SCHED=y |
| 51 | # CONFIG_CGROUP_SCHED is not set | 51 | # CONFIG_CGROUP_SCHED is not set |
| 52 | CONFIG_SYSFS_DEPRECATED=y | 52 | # CONFIG_SYSFS_DEPRECATED=y is not set |
| 53 | CONFIG_SYSFS_DEPRECATED_V2=y | 53 | # CONFIG_SYSFS_DEPRECATED_V2=y is not set |
| 54 | # CONFIG_RELAY is not set | 54 | # CONFIG_RELAY is not set |
| 55 | # CONFIG_NAMESPACES is not set | 55 | # CONFIG_NAMESPACES is not set |
| 56 | CONFIG_BLK_DEV_INITRD=y | 56 | CONFIG_BLK_DEV_INITRD=y |
diff --git a/arch/arm/configs/omap_zoom2_defconfig b/arch/arm/configs/omap_zoom2_defconfig index f1739fae7ed..eef93627fb1 100644 --- a/arch/arm/configs/omap_zoom2_defconfig +++ b/arch/arm/configs/omap_zoom2_defconfig | |||
| @@ -59,8 +59,8 @@ CONFIG_FAIR_GROUP_SCHED=y | |||
| 59 | CONFIG_USER_SCHED=y | 59 | CONFIG_USER_SCHED=y |
| 60 | # CONFIG_CGROUP_SCHED is not set | 60 | # CONFIG_CGROUP_SCHED is not set |
| 61 | # CONFIG_CGROUPS is not set | 61 | # CONFIG_CGROUPS is not set |
| 62 | CONFIG_SYSFS_DEPRECATED=y | 62 | # CONFIG_SYSFS_DEPRECATED=y is not set |
| 63 | CONFIG_SYSFS_DEPRECATED_V2=y | 63 | # CONFIG_SYSFS_DEPRECATED_V2=y is not set |
| 64 | # CONFIG_RELAY is not set | 64 | # CONFIG_RELAY is not set |
| 65 | # CONFIG_NAMESPACES is not set | 65 | # CONFIG_NAMESPACES is not set |
| 66 | CONFIG_BLK_DEV_INITRD=y | 66 | CONFIG_BLK_DEV_INITRD=y |
| @@ -202,7 +202,8 @@ CONFIG_OMAP_32K_TIMER_HZ=128 | |||
| 202 | CONFIG_OMAP_DM_TIMER=y | 202 | CONFIG_OMAP_DM_TIMER=y |
| 203 | # CONFIG_OMAP_LL_DEBUG_UART1 is not set | 203 | # CONFIG_OMAP_LL_DEBUG_UART1 is not set |
| 204 | # CONFIG_OMAP_LL_DEBUG_UART2 is not set | 204 | # CONFIG_OMAP_LL_DEBUG_UART2 is not set |
| 205 | CONFIG_OMAP_LL_DEBUG_UART3=y | 205 | # CONFIG_OMAP_LL_DEBUG_UART3 is not set |
| 206 | CONFIG_OMAP_LL_DEBUG_NONE=y | ||
| 206 | CONFIG_ARCH_OMAP34XX=y | 207 | CONFIG_ARCH_OMAP34XX=y |
| 207 | CONFIG_ARCH_OMAP3430=y | 208 | CONFIG_ARCH_OMAP3430=y |
| 208 | 209 | ||
diff --git a/arch/arm/configs/omap_zoom3_defconfig b/arch/arm/configs/omap_zoom3_defconfig new file mode 100644 index 00000000000..f0e7d0f8558 --- /dev/null +++ b/arch/arm/configs/omap_zoom3_defconfig | |||
| @@ -0,0 +1,1610 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.32-rc6 | ||
| 4 | # Thu Nov 12 13:04:07 2009 | ||
| 5 | # | ||
| 6 | CONFIG_ARM=y | ||
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
| 8 | CONFIG_GENERIC_GPIO=y | ||
| 9 | CONFIG_GENERIC_TIME=y | ||
| 10 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 11 | CONFIG_GENERIC_HARDIRQS=y | ||
| 12 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 13 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 14 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 15 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 16 | CONFIG_HARDIRQS_SW_RESEND=y | ||
| 17 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 18 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 19 | CONFIG_ARCH_HAS_CPUFREQ=y | ||
| 20 | CONFIG_GENERIC_HWEIGHT=y | ||
| 21 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
| 22 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 23 | CONFIG_VECTORS_BASE=0xffff0000 | ||
| 24 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 25 | CONFIG_CONSTRUCTORS=y | ||
| 26 | |||
| 27 | # | ||
| 28 | # General setup | ||
| 29 | # | ||
| 30 | CONFIG_EXPERIMENTAL=y | ||
| 31 | CONFIG_BROKEN_ON_SMP=y | ||
| 32 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 33 | CONFIG_LOCALVERSION="" | ||
| 34 | CONFIG_LOCALVERSION_AUTO=y | ||
| 35 | CONFIG_SWAP=y | ||
| 36 | CONFIG_SYSVIPC=y | ||
| 37 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 38 | # CONFIG_POSIX_MQUEUE is not set | ||
| 39 | CONFIG_BSD_PROCESS_ACCT=y | ||
| 40 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set | ||
| 41 | # CONFIG_TASKSTATS is not set | ||
| 42 | # CONFIG_AUDIT is not set | ||
| 43 | |||
| 44 | # | ||
| 45 | # RCU Subsystem | ||
| 46 | # | ||
| 47 | CONFIG_TREE_RCU=y | ||
| 48 | # CONFIG_TREE_PREEMPT_RCU is not set | ||
| 49 | # CONFIG_RCU_TRACE is not set | ||
| 50 | CONFIG_RCU_FANOUT=32 | ||
| 51 | # CONFIG_RCU_FANOUT_EXACT is not set | ||
| 52 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 53 | # CONFIG_IKCONFIG is not set | ||
| 54 | CONFIG_LOG_BUF_SHIFT=14 | ||
| 55 | CONFIG_GROUP_SCHED=y | ||
| 56 | CONFIG_FAIR_GROUP_SCHED=y | ||
| 57 | # CONFIG_RT_GROUP_SCHED is not set | ||
| 58 | CONFIG_USER_SCHED=y | ||
| 59 | # CONFIG_CGROUP_SCHED is not set | ||
| 60 | # CONFIG_CGROUPS is not set | ||
| 61 | # CONFIG_SYSFS_DEPRECATED_V2 is not set | ||
| 62 | # CONFIG_RELAY is not set | ||
| 63 | # CONFIG_NAMESPACES is not set | ||
| 64 | CONFIG_BLK_DEV_INITRD=y | ||
| 65 | CONFIG_INITRAMFS_SOURCE="" | ||
| 66 | CONFIG_RD_GZIP=y | ||
| 67 | # CONFIG_RD_BZIP2 is not set | ||
| 68 | # CONFIG_RD_LZMA is not set | ||
| 69 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 70 | CONFIG_SYSCTL=y | ||
| 71 | CONFIG_ANON_INODES=y | ||
| 72 | CONFIG_EMBEDDED=y | ||
| 73 | CONFIG_UID16=y | ||
| 74 | # CONFIG_SYSCTL_SYSCALL is not set | ||
| 75 | CONFIG_KALLSYMS=y | ||
| 76 | # CONFIG_KALLSYMS_ALL is not set | ||
| 77 | CONFIG_KALLSYMS_EXTRA_PASS=y | ||
| 78 | CONFIG_HOTPLUG=y | ||
| 79 | CONFIG_PRINTK=y | ||
| 80 | CONFIG_BUG=y | ||
| 81 | CONFIG_ELF_CORE=y | ||
| 82 | CONFIG_BASE_FULL=y | ||
| 83 | CONFIG_FUTEX=y | ||
| 84 | CONFIG_EPOLL=y | ||
| 85 | CONFIG_SIGNALFD=y | ||
| 86 | CONFIG_TIMERFD=y | ||
| 87 | CONFIG_EVENTFD=y | ||
| 88 | CONFIG_SHMEM=y | ||
| 89 | CONFIG_AIO=y | ||
| 90 | |||
| 91 | # | ||
| 92 | # Kernel Performance Events And Counters | ||
| 93 | # | ||
| 94 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 95 | CONFIG_COMPAT_BRK=y | ||
| 96 | CONFIG_SLAB=y | ||
| 97 | # CONFIG_SLUB is not set | ||
| 98 | # CONFIG_SLOB is not set | ||
| 99 | # CONFIG_PROFILING is not set | ||
| 100 | CONFIG_HAVE_OPROFILE=y | ||
| 101 | # CONFIG_KPROBES is not set | ||
| 102 | CONFIG_HAVE_KPROBES=y | ||
| 103 | CONFIG_HAVE_KRETPROBES=y | ||
| 104 | CONFIG_HAVE_CLK=y | ||
| 105 | |||
| 106 | # | ||
| 107 | # GCOV-based kernel profiling | ||
| 108 | # | ||
| 109 | # CONFIG_SLOW_WORK is not set | ||
| 110 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 111 | CONFIG_SLABINFO=y | ||
| 112 | CONFIG_RT_MUTEXES=y | ||
| 113 | CONFIG_BASE_SMALL=0 | ||
| 114 | CONFIG_MODULES=y | ||
| 115 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 116 | CONFIG_MODULE_UNLOAD=y | ||
| 117 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
| 118 | CONFIG_MODVERSIONS=y | ||
| 119 | CONFIG_MODULE_SRCVERSION_ALL=y | ||
| 120 | CONFIG_BLOCK=y | ||
| 121 | CONFIG_LBDAF=y | ||
| 122 | # CONFIG_BLK_DEV_BSG is not set | ||
| 123 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 124 | |||
| 125 | # | ||
| 126 | # IO Schedulers | ||
| 127 | # | ||
| 128 | CONFIG_IOSCHED_NOOP=y | ||
| 129 | CONFIG_IOSCHED_AS=y | ||
| 130 | CONFIG_IOSCHED_DEADLINE=y | ||
| 131 | CONFIG_IOSCHED_CFQ=y | ||
| 132 | CONFIG_DEFAULT_AS=y | ||
| 133 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 134 | # CONFIG_DEFAULT_CFQ is not set | ||
| 135 | # CONFIG_DEFAULT_NOOP is not set | ||
| 136 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
| 137 | CONFIG_FREEZER=y | ||
| 138 | |||
| 139 | # | ||
| 140 | # System Type | ||
| 141 | # | ||
| 142 | CONFIG_MMU=y | ||
| 143 | # CONFIG_ARCH_AAEC2000 is not set | ||
| 144 | # CONFIG_ARCH_INTEGRATOR is not set | ||
| 145 | # CONFIG_ARCH_REALVIEW is not set | ||
| 146 | # CONFIG_ARCH_VERSATILE is not set | ||
| 147 | # CONFIG_ARCH_AT91 is not set | ||
| 148 | # CONFIG_ARCH_CLPS711X is not set | ||
| 149 | # CONFIG_ARCH_GEMINI is not set | ||
| 150 | # CONFIG_ARCH_EBSA110 is not set | ||
| 151 | # CONFIG_ARCH_EP93XX is not set | ||
| 152 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
| 153 | # CONFIG_ARCH_MXC is not set | ||
| 154 | # CONFIG_ARCH_STMP3XXX is not set | ||
| 155 | # CONFIG_ARCH_NETX is not set | ||
| 156 | # CONFIG_ARCH_H720X is not set | ||
| 157 | # CONFIG_ARCH_NOMADIK is not set | ||
| 158 | # CONFIG_ARCH_IOP13XX is not set | ||
| 159 | # CONFIG_ARCH_IOP32X is not set | ||
| 160 | # CONFIG_ARCH_IOP33X is not set | ||
| 161 | # CONFIG_ARCH_IXP23XX is not set | ||
| 162 | # CONFIG_ARCH_IXP2000 is not set | ||
| 163 | # CONFIG_ARCH_IXP4XX is not set | ||
| 164 | # CONFIG_ARCH_L7200 is not set | ||
| 165 | # CONFIG_ARCH_KIRKWOOD is not set | ||
| 166 | # CONFIG_ARCH_LOKI is not set | ||
| 167 | # CONFIG_ARCH_MV78XX0 is not set | ||
| 168 | # CONFIG_ARCH_ORION5X is not set | ||
| 169 | # CONFIG_ARCH_MMP is not set | ||
| 170 | # CONFIG_ARCH_KS8695 is not set | ||
| 171 | # CONFIG_ARCH_NS9XXX is not set | ||
| 172 | # CONFIG_ARCH_W90X900 is not set | ||
| 173 | # CONFIG_ARCH_PNX4008 is not set | ||
| 174 | # CONFIG_ARCH_PXA is not set | ||
| 175 | # CONFIG_ARCH_MSM is not set | ||
| 176 | # CONFIG_ARCH_RPC is not set | ||
| 177 | # CONFIG_ARCH_SA1100 is not set | ||
| 178 | # CONFIG_ARCH_S3C2410 is not set | ||
| 179 | # CONFIG_ARCH_S3C64XX is not set | ||
| 180 | # CONFIG_ARCH_S5PC1XX is not set | ||
| 181 | # CONFIG_ARCH_SHARK is not set | ||
| 182 | # CONFIG_ARCH_LH7A40X is not set | ||
| 183 | # CONFIG_ARCH_U300 is not set | ||
| 184 | # CONFIG_ARCH_DAVINCI is not set | ||
| 185 | CONFIG_ARCH_OMAP=y | ||
| 186 | # CONFIG_ARCH_BCMRING is not set | ||
| 187 | |||
| 188 | # | ||
| 189 | # TI OMAP Implementations | ||
| 190 | # | ||
| 191 | CONFIG_ARCH_OMAP_OTG=y | ||
| 192 | # CONFIG_ARCH_OMAP1 is not set | ||
| 193 | # CONFIG_ARCH_OMAP2 is not set | ||
| 194 | CONFIG_ARCH_OMAP3=y | ||
| 195 | # CONFIG_ARCH_OMAP4 is not set | ||
| 196 | |||
| 197 | # | ||
| 198 | # OMAP Feature Selections | ||
| 199 | # | ||
| 200 | # CONFIG_OMAP_DEBUG_POWERDOMAIN is not set | ||
| 201 | # CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set | ||
| 202 | # CONFIG_OMAP_RESET_CLOCKS is not set | ||
| 203 | CONFIG_OMAP_MUX=y | ||
| 204 | CONFIG_OMAP_MUX_DEBUG=y | ||
| 205 | CONFIG_OMAP_MUX_WARNINGS=y | ||
| 206 | CONFIG_OMAP_MCBSP=y | ||
| 207 | # CONFIG_OMAP_MBOX_FWK is not set | ||
| 208 | # CONFIG_OMAP_MPU_TIMER is not set | ||
| 209 | CONFIG_OMAP_32K_TIMER=y | ||
| 210 | CONFIG_OMAP_32K_TIMER_HZ=128 | ||
| 211 | CONFIG_OMAP_DM_TIMER=y | ||
| 212 | # CONFIG_OMAP_LL_DEBUG_UART1 is not set | ||
| 213 | # CONFIG_OMAP_LL_DEBUG_UART2 is not set | ||
| 214 | # CONFIG_OMAP_LL_DEBUG_UART3 is not set | ||
| 215 | CONFIG_OMAP_LL_DEBUG_NONE=y | ||
| 216 | # CONFIG_OMAP_PM_NONE is not set | ||
| 217 | CONFIG_OMAP_PM_NOOP=y | ||
| 218 | CONFIG_ARCH_OMAP34XX=y | ||
| 219 | CONFIG_ARCH_OMAP3430=y | ||
| 220 | |||
| 221 | # | ||
| 222 | # OMAP Board Type | ||
| 223 | # | ||
| 224 | # CONFIG_MACH_OMAP3_BEAGLE is not set | ||
| 225 | # CONFIG_MACH_OMAP_LDP is not set | ||
| 226 | # CONFIG_MACH_OVERO is not set | ||
| 227 | # CONFIG_MACH_OMAP3EVM is not set | ||
| 228 | # CONFIG_MACH_OMAP3_PANDORA is not set | ||
| 229 | # CONFIG_MACH_OMAP_3430SDP is not set | ||
| 230 | # CONFIG_MACH_NOKIA_RX51 is not set | ||
| 231 | # CONFIG_MACH_OMAP_ZOOM2 is not set | ||
| 232 | # CONFIG_MACH_CM_T35 is not set | ||
| 233 | CONFIG_MACH_OMAP_ZOOM3=y | ||
| 234 | # CONFIG_MACH_OMAP_3630SDP is not set | ||
| 235 | |||
| 236 | # | ||
| 237 | # Processor Type | ||
| 238 | # | ||
| 239 | CONFIG_CPU_32=y | ||
| 240 | CONFIG_CPU_32v6K=y | ||
| 241 | CONFIG_CPU_V7=y | ||
| 242 | CONFIG_CPU_32v7=y | ||
| 243 | CONFIG_CPU_ABRT_EV7=y | ||
| 244 | CONFIG_CPU_PABRT_V7=y | ||
| 245 | CONFIG_CPU_CACHE_V7=y | ||
| 246 | CONFIG_CPU_CACHE_VIPT=y | ||
| 247 | CONFIG_CPU_COPY_V6=y | ||
| 248 | CONFIG_CPU_TLB_V7=y | ||
| 249 | CONFIG_CPU_HAS_ASID=y | ||
| 250 | CONFIG_CPU_CP15=y | ||
| 251 | CONFIG_CPU_CP15_MMU=y | ||
| 252 | |||
| 253 | # | ||
| 254 | # Processor Features | ||
| 255 | # | ||
| 256 | CONFIG_ARM_THUMB=y | ||
| 257 | # CONFIG_ARM_THUMBEE is not set | ||
| 258 | # CONFIG_CPU_ICACHE_DISABLE is not set | ||
| 259 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
| 260 | # CONFIG_CPU_BPREDICT_DISABLE is not set | ||
| 261 | CONFIG_HAS_TLS_REG=y | ||
| 262 | CONFIG_ARM_L1_CACHE_SHIFT=6 | ||
| 263 | # CONFIG_ARM_ERRATA_430973 is not set | ||
| 264 | # CONFIG_ARM_ERRATA_458693 is not set | ||
| 265 | # CONFIG_ARM_ERRATA_460075 is not set | ||
| 266 | CONFIG_COMMON_CLKDEV=y | ||
| 267 | |||
| 268 | # | ||
| 269 | # Bus support | ||
| 270 | # | ||
| 271 | # CONFIG_PCI_SYSCALL is not set | ||
| 272 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 273 | # CONFIG_PCCARD is not set | ||
| 274 | |||
| 275 | # | ||
| 276 | # Kernel Features | ||
| 277 | # | ||
| 278 | CONFIG_TICK_ONESHOT=y | ||
| 279 | CONFIG_NO_HZ=y | ||
| 280 | CONFIG_HIGH_RES_TIMERS=y | ||
| 281 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 282 | CONFIG_VMSPLIT_3G=y | ||
| 283 | # CONFIG_VMSPLIT_2G is not set | ||
| 284 | # CONFIG_VMSPLIT_1G is not set | ||
| 285 | CONFIG_PAGE_OFFSET=0xC0000000 | ||
| 286 | CONFIG_PREEMPT_NONE=y | ||
| 287 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
| 288 | # CONFIG_PREEMPT is not set | ||
| 289 | CONFIG_HZ=128 | ||
| 290 | # CONFIG_THUMB2_KERNEL is not set | ||
| 291 | CONFIG_AEABI=y | ||
| 292 | CONFIG_OABI_COMPAT=y | ||
| 293 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | ||
| 294 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | ||
| 295 | # CONFIG_HIGHMEM is not set | ||
| 296 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 297 | CONFIG_FLATMEM_MANUAL=y | ||
| 298 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 299 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 300 | CONFIG_FLATMEM=y | ||
| 301 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 302 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 303 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
| 304 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
| 305 | CONFIG_ZONE_DMA_FLAG=0 | ||
| 306 | CONFIG_VIRT_TO_BUS=y | ||
| 307 | CONFIG_HAVE_MLOCK=y | ||
| 308 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
| 309 | # CONFIG_KSM is not set | ||
| 310 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
| 311 | # CONFIG_LEDS is not set | ||
| 312 | CONFIG_ALIGNMENT_TRAP=y | ||
| 313 | # CONFIG_UACCESS_WITH_MEMCPY is not set | ||
| 314 | |||
| 315 | # | ||
| 316 | # Boot options | ||
| 317 | # | ||
| 318 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
| 319 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
| 320 | CONFIG_CMDLINE="root=/dev/nfs nfsroot=192.168.0.1:/home/user/buildroot ip=192.168.0.2:192.168.0.1:192.168.0.1:255.255.255.0:tgt:eth0:off rw console=ttyS2,115200n8" | ||
| 321 | # CONFIG_XIP_KERNEL is not set | ||
| 322 | # CONFIG_KEXEC is not set | ||
| 323 | |||
| 324 | # | ||
| 325 | # CPU Power Management | ||
| 326 | # | ||
| 327 | # CONFIG_CPU_FREQ is not set | ||
| 328 | # CONFIG_CPU_IDLE is not set | ||
| 329 | |||
| 330 | # | ||
| 331 | # Floating point emulation | ||
| 332 | # | ||
| 333 | |||
| 334 | # | ||
| 335 | # At least one emulation must be selected | ||
| 336 | # | ||
| 337 | CONFIG_FPE_NWFPE=y | ||
| 338 | # CONFIG_FPE_NWFPE_XP is not set | ||
| 339 | # CONFIG_FPE_FASTFPE is not set | ||
| 340 | CONFIG_VFP=y | ||
| 341 | CONFIG_VFPv3=y | ||
| 342 | # CONFIG_NEON is not set | ||
| 343 | |||
| 344 | # | ||
| 345 | # Userspace binary formats | ||
| 346 | # | ||
| 347 | CONFIG_BINFMT_ELF=y | ||
| 348 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 349 | CONFIG_HAVE_AOUT=y | ||
| 350 | # CONFIG_BINFMT_AOUT is not set | ||
| 351 | CONFIG_BINFMT_MISC=y | ||
| 352 | |||
| 353 | # | ||
| 354 | # Power management options | ||
| 355 | # | ||
| 356 | CONFIG_PM=y | ||
| 357 | CONFIG_PM_DEBUG=y | ||
| 358 | CONFIG_PM_VERBOSE=y | ||
| 359 | CONFIG_CAN_PM_TRACE=y | ||
| 360 | CONFIG_PM_SLEEP=y | ||
| 361 | CONFIG_SUSPEND=y | ||
| 362 | # CONFIG_PM_TEST_SUSPEND is not set | ||
| 363 | CONFIG_SUSPEND_FREEZER=y | ||
| 364 | # CONFIG_APM_EMULATION is not set | ||
| 365 | # CONFIG_PM_RUNTIME is not set | ||
| 366 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
| 367 | CONFIG_NET=y | ||
| 368 | |||
| 369 | # | ||
| 370 | # Networking options | ||
| 371 | # | ||
| 372 | CONFIG_PACKET=y | ||
| 373 | # CONFIG_PACKET_MMAP is not set | ||
| 374 | CONFIG_UNIX=y | ||
| 375 | CONFIG_XFRM=y | ||
| 376 | CONFIG_XFRM_USER=y | ||
| 377 | # CONFIG_XFRM_SUB_POLICY is not set | ||
| 378 | CONFIG_XFRM_MIGRATE=y | ||
| 379 | # CONFIG_XFRM_STATISTICS is not set | ||
| 380 | CONFIG_NET_KEY=y | ||
| 381 | CONFIG_NET_KEY_MIGRATE=y | ||
| 382 | CONFIG_INET=y | ||
| 383 | CONFIG_IP_MULTICAST=y | ||
| 384 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 385 | CONFIG_IP_FIB_HASH=y | ||
| 386 | CONFIG_IP_PNP=y | ||
| 387 | CONFIG_IP_PNP_DHCP=y | ||
| 388 | CONFIG_IP_PNP_BOOTP=y | ||
| 389 | CONFIG_IP_PNP_RARP=y | ||
| 390 | # CONFIG_NET_IPIP is not set | ||
| 391 | # CONFIG_NET_IPGRE is not set | ||
| 392 | # CONFIG_IP_MROUTE is not set | ||
| 393 | # CONFIG_ARPD is not set | ||
| 394 | # CONFIG_SYN_COOKIES is not set | ||
| 395 | # CONFIG_INET_AH is not set | ||
| 396 | # CONFIG_INET_ESP is not set | ||
| 397 | # CONFIG_INET_IPCOMP is not set | ||
| 398 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
| 399 | # CONFIG_INET_TUNNEL is not set | ||
| 400 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
| 401 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
| 402 | CONFIG_INET_XFRM_MODE_BEET=y | ||
| 403 | # CONFIG_INET_LRO is not set | ||
| 404 | CONFIG_INET_DIAG=y | ||
| 405 | CONFIG_INET_TCP_DIAG=y | ||
| 406 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
| 407 | CONFIG_TCP_CONG_CUBIC=y | ||
| 408 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 409 | # CONFIG_TCP_MD5SIG is not set | ||
| 410 | # CONFIG_IPV6 is not set | ||
| 411 | # CONFIG_NETWORK_SECMARK is not set | ||
| 412 | # CONFIG_NETFILTER is not set | ||
| 413 | # CONFIG_IP_DCCP is not set | ||
| 414 | # CONFIG_IP_SCTP is not set | ||
| 415 | # CONFIG_RDS is not set | ||
| 416 | # CONFIG_TIPC is not set | ||
| 417 | # CONFIG_ATM is not set | ||
| 418 | # CONFIG_BRIDGE is not set | ||
| 419 | # CONFIG_NET_DSA is not set | ||
| 420 | # CONFIG_VLAN_8021Q is not set | ||
| 421 | # CONFIG_DECNET is not set | ||
| 422 | # CONFIG_LLC2 is not set | ||
| 423 | # CONFIG_IPX is not set | ||
| 424 | # CONFIG_ATALK is not set | ||
| 425 | # CONFIG_X25 is not set | ||
| 426 | # CONFIG_LAPB is not set | ||
| 427 | # CONFIG_ECONET is not set | ||
| 428 | # CONFIG_WAN_ROUTER is not set | ||
| 429 | # CONFIG_PHONET is not set | ||
| 430 | # CONFIG_IEEE802154 is not set | ||
| 431 | # CONFIG_NET_SCHED is not set | ||
| 432 | # CONFIG_DCB is not set | ||
| 433 | |||
| 434 | # | ||
| 435 | # Network testing | ||
| 436 | # | ||
| 437 | # CONFIG_NET_PKTGEN is not set | ||
| 438 | # CONFIG_HAMRADIO is not set | ||
| 439 | # CONFIG_CAN is not set | ||
| 440 | # CONFIG_IRDA is not set | ||
| 441 | # CONFIG_BT is not set | ||
| 442 | # CONFIG_AF_RXRPC is not set | ||
| 443 | # CONFIG_WIRELESS is not set | ||
| 444 | # CONFIG_WIMAX is not set | ||
| 445 | # CONFIG_RFKILL is not set | ||
| 446 | # CONFIG_NET_9P is not set | ||
| 447 | |||
| 448 | # | ||
| 449 | # Device Drivers | ||
| 450 | # | ||
| 451 | |||
| 452 | # | ||
| 453 | # Generic Driver Options | ||
| 454 | # | ||
| 455 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
| 456 | # CONFIG_DEVTMPFS is not set | ||
| 457 | CONFIG_STANDALONE=y | ||
| 458 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 459 | # CONFIG_FW_LOADER is not set | ||
| 460 | # CONFIG_DEBUG_DRIVER is not set | ||
| 461 | # CONFIG_DEBUG_DEVRES is not set | ||
| 462 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 463 | CONFIG_CONNECTOR=y | ||
| 464 | CONFIG_PROC_EVENTS=y | ||
| 465 | # CONFIG_MTD is not set | ||
| 466 | # CONFIG_PARPORT is not set | ||
| 467 | CONFIG_BLK_DEV=y | ||
| 468 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 469 | CONFIG_BLK_DEV_LOOP=y | ||
| 470 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
| 471 | # CONFIG_BLK_DEV_NBD is not set | ||
| 472 | # CONFIG_BLK_DEV_UB is not set | ||
| 473 | CONFIG_BLK_DEV_RAM=y | ||
| 474 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
| 475 | CONFIG_BLK_DEV_RAM_SIZE=16384 | ||
| 476 | # CONFIG_BLK_DEV_XIP is not set | ||
| 477 | # CONFIG_CDROM_PKTCDVD is not set | ||
| 478 | # CONFIG_ATA_OVER_ETH is not set | ||
| 479 | # CONFIG_MG_DISK is not set | ||
| 480 | CONFIG_MISC_DEVICES=y | ||
| 481 | # CONFIG_ICS932S401 is not set | ||
| 482 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
| 483 | # CONFIG_ISL29003 is not set | ||
| 484 | # CONFIG_C2PORT is not set | ||
| 485 | |||
| 486 | # | ||
| 487 | # EEPROM support | ||
| 488 | # | ||
| 489 | # CONFIG_EEPROM_AT24 is not set | ||
| 490 | # CONFIG_EEPROM_AT25 is not set | ||
| 491 | # CONFIG_EEPROM_LEGACY is not set | ||
| 492 | # CONFIG_EEPROM_MAX6875 is not set | ||
| 493 | # CONFIG_EEPROM_93CX6 is not set | ||
| 494 | CONFIG_HAVE_IDE=y | ||
| 495 | # CONFIG_IDE is not set | ||
| 496 | |||
| 497 | # | ||
| 498 | # SCSI device support | ||
| 499 | # | ||
| 500 | # CONFIG_RAID_ATTRS is not set | ||
| 501 | CONFIG_SCSI=y | ||
| 502 | CONFIG_SCSI_DMA=y | ||
| 503 | # CONFIG_SCSI_TGT is not set | ||
| 504 | # CONFIG_SCSI_NETLINK is not set | ||
| 505 | CONFIG_SCSI_PROC_FS=y | ||
| 506 | |||
| 507 | # | ||
| 508 | # SCSI support type (disk, tape, CD-ROM) | ||
| 509 | # | ||
| 510 | CONFIG_BLK_DEV_SD=y | ||
| 511 | # CONFIG_CHR_DEV_ST is not set | ||
| 512 | # CONFIG_CHR_DEV_OSST is not set | ||
| 513 | # CONFIG_BLK_DEV_SR is not set | ||
| 514 | # CONFIG_CHR_DEV_SG is not set | ||
| 515 | # CONFIG_CHR_DEV_SCH is not set | ||
| 516 | # CONFIG_SCSI_MULTI_LUN is not set | ||
| 517 | # CONFIG_SCSI_CONSTANTS is not set | ||
| 518 | # CONFIG_SCSI_LOGGING is not set | ||
| 519 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
| 520 | CONFIG_SCSI_WAIT_SCAN=m | ||
| 521 | |||
| 522 | # | ||
| 523 | # SCSI Transports | ||
| 524 | # | ||
| 525 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
| 526 | # CONFIG_SCSI_FC_ATTRS is not set | ||
| 527 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
| 528 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
| 529 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
| 530 | CONFIG_SCSI_LOWLEVEL=y | ||
| 531 | # CONFIG_ISCSI_TCP is not set | ||
| 532 | # CONFIG_LIBFC is not set | ||
| 533 | # CONFIG_LIBFCOE is not set | ||
| 534 | # CONFIG_SCSI_DEBUG is not set | ||
| 535 | # CONFIG_SCSI_DH is not set | ||
| 536 | # CONFIG_SCSI_OSD_INITIATOR is not set | ||
| 537 | # CONFIG_ATA is not set | ||
| 538 | # CONFIG_MD is not set | ||
| 539 | CONFIG_NETDEVICES=y | ||
| 540 | # CONFIG_DUMMY is not set | ||
| 541 | # CONFIG_BONDING is not set | ||
| 542 | # CONFIG_MACVLAN is not set | ||
| 543 | # CONFIG_EQUALIZER is not set | ||
| 544 | # CONFIG_TUN is not set | ||
| 545 | # CONFIG_VETH is not set | ||
| 546 | CONFIG_PHYLIB=y | ||
| 547 | |||
| 548 | # | ||
| 549 | # MII PHY device drivers | ||
| 550 | # | ||
| 551 | # CONFIG_MARVELL_PHY is not set | ||
| 552 | # CONFIG_DAVICOM_PHY is not set | ||
| 553 | # CONFIG_QSEMI_PHY is not set | ||
| 554 | # CONFIG_LXT_PHY is not set | ||
| 555 | # CONFIG_CICADA_PHY is not set | ||
| 556 | # CONFIG_VITESSE_PHY is not set | ||
| 557 | CONFIG_SMSC_PHY=y | ||
| 558 | # CONFIG_BROADCOM_PHY is not set | ||
| 559 | # CONFIG_ICPLUS_PHY is not set | ||
| 560 | # CONFIG_REALTEK_PHY is not set | ||
| 561 | # CONFIG_NATIONAL_PHY is not set | ||
| 562 | # CONFIG_STE10XP is not set | ||
| 563 | # CONFIG_LSI_ET1011C_PHY is not set | ||
| 564 | # CONFIG_FIXED_PHY is not set | ||
| 565 | # CONFIG_MDIO_BITBANG is not set | ||
| 566 | CONFIG_NET_ETHERNET=y | ||
| 567 | CONFIG_MII=y | ||
| 568 | # CONFIG_AX88796 is not set | ||
| 569 | # CONFIG_SMC91X is not set | ||
| 570 | # CONFIG_DM9000 is not set | ||
| 571 | # CONFIG_ENC28J60 is not set | ||
| 572 | # CONFIG_ETHOC is not set | ||
| 573 | # CONFIG_SMC911X is not set | ||
| 574 | CONFIG_SMSC911X=y | ||
| 575 | # CONFIG_DNET is not set | ||
| 576 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
| 577 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
| 578 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
| 579 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
| 580 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
| 581 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
| 582 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
| 583 | # CONFIG_B44 is not set | ||
| 584 | # CONFIG_KS8842 is not set | ||
| 585 | # CONFIG_KS8851 is not set | ||
| 586 | # CONFIG_KS8851_MLL is not set | ||
| 587 | CONFIG_NETDEV_1000=y | ||
| 588 | CONFIG_NETDEV_10000=y | ||
| 589 | CONFIG_WLAN=y | ||
| 590 | # CONFIG_WLAN_PRE80211 is not set | ||
| 591 | # CONFIG_WLAN_80211 is not set | ||
| 592 | |||
| 593 | # | ||
| 594 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
| 595 | # | ||
| 596 | |||
| 597 | # | ||
| 598 | # USB Network Adapters | ||
| 599 | # | ||
| 600 | # CONFIG_USB_CATC is not set | ||
| 601 | # CONFIG_USB_KAWETH is not set | ||
| 602 | # CONFIG_USB_PEGASUS is not set | ||
| 603 | # CONFIG_USB_RTL8150 is not set | ||
| 604 | # CONFIG_USB_USBNET is not set | ||
| 605 | # CONFIG_WAN is not set | ||
| 606 | # CONFIG_PPP is not set | ||
| 607 | # CONFIG_SLIP is not set | ||
| 608 | # CONFIG_NETCONSOLE is not set | ||
| 609 | # CONFIG_NETPOLL is not set | ||
| 610 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
| 611 | # CONFIG_ISDN is not set | ||
| 612 | # CONFIG_PHONE is not set | ||
| 613 | |||
| 614 | # | ||
| 615 | # Input device support | ||
| 616 | # | ||
| 617 | CONFIG_INPUT=y | ||
| 618 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 619 | # CONFIG_INPUT_POLLDEV is not set | ||
| 620 | |||
| 621 | # | ||
| 622 | # Userland interfaces | ||
| 623 | # | ||
| 624 | # CONFIG_INPUT_MOUSEDEV is not set | ||
| 625 | # CONFIG_INPUT_JOYDEV is not set | ||
| 626 | CONFIG_INPUT_EVDEV=y | ||
| 627 | # CONFIG_INPUT_EVBUG is not set | ||
| 628 | |||
| 629 | # | ||
| 630 | # Input Device Drivers | ||
| 631 | # | ||
| 632 | # CONFIG_INPUT_KEYBOARD is not set | ||
| 633 | # CONFIG_INPUT_MOUSE is not set | ||
| 634 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 635 | # CONFIG_INPUT_TABLET is not set | ||
| 636 | CONFIG_INPUT_TOUCHSCREEN=y | ||
| 637 | CONFIG_TOUCHSCREEN_ADS7846=y | ||
| 638 | # CONFIG_TOUCHSCREEN_AD7877 is not set | ||
| 639 | # CONFIG_TOUCHSCREEN_AD7879_I2C is not set | ||
| 640 | # CONFIG_TOUCHSCREEN_AD7879_SPI is not set | ||
| 641 | # CONFIG_TOUCHSCREEN_AD7879 is not set | ||
| 642 | # CONFIG_TOUCHSCREEN_EETI is not set | ||
| 643 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | ||
| 644 | # CONFIG_TOUCHSCREEN_GUNZE is not set | ||
| 645 | # CONFIG_TOUCHSCREEN_ELO is not set | ||
| 646 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | ||
| 647 | # CONFIG_TOUCHSCREEN_MCS5000 is not set | ||
| 648 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | ||
| 649 | # CONFIG_TOUCHSCREEN_INEXIO is not set | ||
| 650 | # CONFIG_TOUCHSCREEN_MK712 is not set | ||
| 651 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set | ||
| 652 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | ||
| 653 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set | ||
| 654 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | ||
| 655 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set | ||
| 656 | # CONFIG_TOUCHSCREEN_TSC2007 is not set | ||
| 657 | # CONFIG_TOUCHSCREEN_W90X900 is not set | ||
| 658 | # CONFIG_INPUT_MISC is not set | ||
| 659 | |||
| 660 | # | ||
| 661 | # Hardware I/O ports | ||
| 662 | # | ||
| 663 | # CONFIG_SERIO is not set | ||
| 664 | # CONFIG_GAMEPORT is not set | ||
| 665 | |||
| 666 | # | ||
| 667 | # Character devices | ||
| 668 | # | ||
| 669 | CONFIG_VT=y | ||
| 670 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 671 | CONFIG_VT_CONSOLE=y | ||
| 672 | CONFIG_HW_CONSOLE=y | ||
| 673 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
| 674 | CONFIG_DEVKMEM=y | ||
| 675 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 676 | |||
| 677 | # | ||
| 678 | # Serial drivers | ||
| 679 | # | ||
| 680 | CONFIG_SERIAL_8250=y | ||
| 681 | CONFIG_SERIAL_8250_CONSOLE=y | ||
| 682 | CONFIG_SERIAL_8250_NR_UARTS=32 | ||
| 683 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
| 684 | CONFIG_SERIAL_8250_EXTENDED=y | ||
| 685 | CONFIG_SERIAL_8250_MANY_PORTS=y | ||
| 686 | CONFIG_SERIAL_8250_SHARE_IRQ=y | ||
| 687 | CONFIG_SERIAL_8250_DETECT_IRQ=y | ||
| 688 | CONFIG_SERIAL_8250_RSA=y | ||
| 689 | |||
| 690 | # | ||
| 691 | # Non-8250 serial port support | ||
| 692 | # | ||
| 693 | # CONFIG_SERIAL_MAX3100 is not set | ||
| 694 | CONFIG_SERIAL_CORE=y | ||
| 695 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 696 | CONFIG_UNIX98_PTYS=y | ||
| 697 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 698 | # CONFIG_LEGACY_PTYS is not set | ||
| 699 | # CONFIG_IPMI_HANDLER is not set | ||
| 700 | CONFIG_HW_RANDOM=y | ||
| 701 | # CONFIG_HW_RANDOM_TIMERIOMEM is not set | ||
| 702 | # CONFIG_R3964 is not set | ||
| 703 | # CONFIG_RAW_DRIVER is not set | ||
| 704 | # CONFIG_TCG_TPM is not set | ||
| 705 | CONFIG_I2C=y | ||
| 706 | CONFIG_I2C_BOARDINFO=y | ||
| 707 | CONFIG_I2C_COMPAT=y | ||
| 708 | CONFIG_I2C_CHARDEV=y | ||
| 709 | CONFIG_I2C_HELPER_AUTO=y | ||
| 710 | |||
| 711 | # | ||
| 712 | # I2C Hardware Bus support | ||
| 713 | # | ||
| 714 | |||
| 715 | # | ||
| 716 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
| 717 | # | ||
| 718 | # CONFIG_I2C_DESIGNWARE is not set | ||
| 719 | # CONFIG_I2C_GPIO is not set | ||
| 720 | # CONFIG_I2C_OCORES is not set | ||
| 721 | CONFIG_I2C_OMAP=y | ||
| 722 | # CONFIG_I2C_SIMTEC is not set | ||
| 723 | |||
| 724 | # | ||
| 725 | # External I2C/SMBus adapter drivers | ||
| 726 | # | ||
| 727 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
| 728 | # CONFIG_I2C_TAOS_EVM is not set | ||
| 729 | # CONFIG_I2C_TINY_USB is not set | ||
| 730 | |||
| 731 | # | ||
| 732 | # Other I2C/SMBus bus drivers | ||
| 733 | # | ||
| 734 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
| 735 | # CONFIG_I2C_STUB is not set | ||
| 736 | |||
| 737 | # | ||
| 738 | # Miscellaneous I2C Chip support | ||
| 739 | # | ||
| 740 | # CONFIG_DS1682 is not set | ||
| 741 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 742 | # CONFIG_I2C_DEBUG_CORE is not set | ||
| 743 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
| 744 | # CONFIG_I2C_DEBUG_BUS is not set | ||
| 745 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
| 746 | CONFIG_SPI=y | ||
| 747 | # CONFIG_SPI_DEBUG is not set | ||
| 748 | CONFIG_SPI_MASTER=y | ||
| 749 | |||
| 750 | # | ||
| 751 | # SPI Master Controller Drivers | ||
| 752 | # | ||
| 753 | # CONFIG_SPI_BITBANG is not set | ||
| 754 | # CONFIG_SPI_GPIO is not set | ||
| 755 | CONFIG_SPI_OMAP24XX=y | ||
| 756 | |||
| 757 | # | ||
| 758 | # SPI Protocol Masters | ||
| 759 | # | ||
| 760 | # CONFIG_SPI_SPIDEV is not set | ||
| 761 | # CONFIG_SPI_TLE62X0 is not set | ||
| 762 | |||
| 763 | # | ||
| 764 | # PPS support | ||
| 765 | # | ||
| 766 | # CONFIG_PPS is not set | ||
| 767 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
| 768 | CONFIG_GPIOLIB=y | ||
| 769 | # CONFIG_DEBUG_GPIO is not set | ||
| 770 | # CONFIG_GPIO_SYSFS is not set | ||
| 771 | |||
| 772 | # | ||
| 773 | # Memory mapped GPIO expanders: | ||
| 774 | # | ||
| 775 | |||
| 776 | # | ||
| 777 | # I2C GPIO expanders: | ||
| 778 | # | ||
| 779 | # CONFIG_GPIO_MAX732X is not set | ||
| 780 | # CONFIG_GPIO_PCA953X is not set | ||
| 781 | # CONFIG_GPIO_PCF857X is not set | ||
| 782 | CONFIG_GPIO_TWL4030=y | ||
| 783 | |||
| 784 | # | ||
| 785 | # PCI GPIO expanders: | ||
| 786 | # | ||
| 787 | |||
| 788 | # | ||
| 789 | # SPI GPIO expanders: | ||
| 790 | # | ||
| 791 | # CONFIG_GPIO_MAX7301 is not set | ||
| 792 | # CONFIG_GPIO_MCP23S08 is not set | ||
| 793 | # CONFIG_GPIO_MC33880 is not set | ||
| 794 | |||
| 795 | # | ||
| 796 | # AC97 GPIO expanders: | ||
| 797 | # | ||
| 798 | CONFIG_W1=y | ||
| 799 | CONFIG_W1_CON=y | ||
| 800 | |||
| 801 | # | ||
| 802 | # 1-wire Bus Masters | ||
| 803 | # | ||
| 804 | # CONFIG_W1_MASTER_DS2490 is not set | ||
| 805 | # CONFIG_W1_MASTER_DS2482 is not set | ||
| 806 | # CONFIG_W1_MASTER_DS1WM is not set | ||
| 807 | # CONFIG_W1_MASTER_GPIO is not set | ||
| 808 | # CONFIG_HDQ_MASTER_OMAP is not set | ||
| 809 | |||
| 810 | # | ||
| 811 | # 1-wire Slaves | ||
| 812 | # | ||
| 813 | # CONFIG_W1_SLAVE_THERM is not set | ||
| 814 | # CONFIG_W1_SLAVE_SMEM is not set | ||
| 815 | # CONFIG_W1_SLAVE_DS2431 is not set | ||
| 816 | # CONFIG_W1_SLAVE_DS2433 is not set | ||
| 817 | # CONFIG_W1_SLAVE_DS2760 is not set | ||
| 818 | # CONFIG_W1_SLAVE_BQ27000 is not set | ||
| 819 | CONFIG_POWER_SUPPLY=y | ||
| 820 | # CONFIG_POWER_SUPPLY_DEBUG is not set | ||
| 821 | # CONFIG_PDA_POWER is not set | ||
| 822 | # CONFIG_BATTERY_DS2760 is not set | ||
| 823 | # CONFIG_BATTERY_DS2782 is not set | ||
| 824 | # CONFIG_BATTERY_BQ27x00 is not set | ||
| 825 | # CONFIG_BATTERY_MAX17040 is not set | ||
| 826 | # CONFIG_HWMON is not set | ||
| 827 | # CONFIG_THERMAL is not set | ||
| 828 | CONFIG_WATCHDOG=y | ||
| 829 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
| 830 | |||
| 831 | # | ||
| 832 | # Watchdog Device Drivers | ||
| 833 | # | ||
| 834 | # CONFIG_SOFT_WATCHDOG is not set | ||
| 835 | # CONFIG_OMAP_WATCHDOG is not set | ||
| 836 | # CONFIG_TWL4030_WATCHDOG is not set | ||
| 837 | |||
| 838 | # | ||
| 839 | # USB-based Watchdog Cards | ||
| 840 | # | ||
| 841 | # CONFIG_USBPCWATCHDOG is not set | ||
| 842 | CONFIG_SSB_POSSIBLE=y | ||
| 843 | |||
| 844 | # | ||
| 845 | # Sonics Silicon Backplane | ||
| 846 | # | ||
| 847 | # CONFIG_SSB is not set | ||
| 848 | |||
| 849 | # | ||
| 850 | # Multifunction device drivers | ||
| 851 | # | ||
| 852 | # CONFIG_MFD_CORE is not set | ||
| 853 | # CONFIG_MFD_SM501 is not set | ||
| 854 | # CONFIG_MFD_ASIC3 is not set | ||
| 855 | # CONFIG_HTC_EGPIO is not set | ||
| 856 | # CONFIG_HTC_PASIC3 is not set | ||
| 857 | # CONFIG_TPS65010 is not set | ||
| 858 | CONFIG_TWL4030_CORE=y | ||
| 859 | # CONFIG_TWL4030_POWER is not set | ||
| 860 | # CONFIG_MFD_TMIO is not set | ||
| 861 | # CONFIG_MFD_T7L66XB is not set | ||
| 862 | # CONFIG_MFD_TC6387XB is not set | ||
| 863 | # CONFIG_MFD_TC6393XB is not set | ||
| 864 | # CONFIG_PMIC_DA903X is not set | ||
| 865 | # CONFIG_MFD_WM8400 is not set | ||
| 866 | # CONFIG_MFD_WM831X is not set | ||
| 867 | # CONFIG_MFD_WM8350_I2C is not set | ||
| 868 | # CONFIG_MFD_PCF50633 is not set | ||
| 869 | # CONFIG_MFD_MC13783 is not set | ||
| 870 | # CONFIG_AB3100_CORE is not set | ||
| 871 | # CONFIG_EZX_PCAP is not set | ||
| 872 | CONFIG_REGULATOR=y | ||
| 873 | # CONFIG_REGULATOR_DEBUG is not set | ||
| 874 | # CONFIG_REGULATOR_FIXED_VOLTAGE is not set | ||
| 875 | # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set | ||
| 876 | # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set | ||
| 877 | # CONFIG_REGULATOR_BQ24022 is not set | ||
| 878 | # CONFIG_REGULATOR_MAX1586 is not set | ||
| 879 | CONFIG_REGULATOR_TWL4030=y | ||
| 880 | # CONFIG_REGULATOR_LP3971 is not set | ||
| 881 | # CONFIG_REGULATOR_TPS65023 is not set | ||
| 882 | # CONFIG_REGULATOR_TPS6507X is not set | ||
| 883 | # CONFIG_MEDIA_SUPPORT is not set | ||
| 884 | |||
| 885 | # | ||
| 886 | # Graphics support | ||
| 887 | # | ||
| 888 | # CONFIG_VGASTATE is not set | ||
| 889 | CONFIG_VIDEO_OUTPUT_CONTROL=m | ||
| 890 | # CONFIG_FB is not set | ||
| 891 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 892 | |||
| 893 | # | ||
| 894 | # Display device support | ||
| 895 | # | ||
| 896 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 897 | |||
| 898 | # | ||
| 899 | # Console display driver support | ||
| 900 | # | ||
| 901 | # CONFIG_VGA_CONSOLE is not set | ||
| 902 | CONFIG_DUMMY_CONSOLE=y | ||
| 903 | CONFIG_SOUND=y | ||
| 904 | # CONFIG_SOUND_OSS_CORE is not set | ||
| 905 | CONFIG_SND=y | ||
| 906 | CONFIG_SND_TIMER=m | ||
| 907 | CONFIG_SND_PCM=m | ||
| 908 | # CONFIG_SND_SEQUENCER is not set | ||
| 909 | # CONFIG_SND_MIXER_OSS is not set | ||
| 910 | # CONFIG_SND_PCM_OSS is not set | ||
| 911 | # CONFIG_SND_HRTIMER is not set | ||
| 912 | # CONFIG_SND_DYNAMIC_MINORS is not set | ||
| 913 | CONFIG_SND_SUPPORT_OLD_API=y | ||
| 914 | CONFIG_SND_VERBOSE_PROCFS=y | ||
| 915 | # CONFIG_SND_VERBOSE_PRINTK is not set | ||
| 916 | # CONFIG_SND_DEBUG is not set | ||
| 917 | # CONFIG_SND_RAWMIDI_SEQ is not set | ||
| 918 | # CONFIG_SND_OPL3_LIB_SEQ is not set | ||
| 919 | # CONFIG_SND_OPL4_LIB_SEQ is not set | ||
| 920 | # CONFIG_SND_SBAWE_SEQ is not set | ||
| 921 | # CONFIG_SND_EMU10K1_SEQ is not set | ||
| 922 | CONFIG_SND_DRIVERS=y | ||
| 923 | # CONFIG_SND_DUMMY is not set | ||
| 924 | # CONFIG_SND_MTPAV is not set | ||
| 925 | # CONFIG_SND_SERIAL_U16550 is not set | ||
| 926 | # CONFIG_SND_MPU401 is not set | ||
| 927 | CONFIG_SND_ARM=y | ||
| 928 | CONFIG_SND_SPI=y | ||
| 929 | CONFIG_SND_USB=y | ||
| 930 | # CONFIG_SND_USB_AUDIO is not set | ||
| 931 | # CONFIG_SND_USB_CAIAQ is not set | ||
| 932 | # CONFIG_SND_SOC is not set | ||
| 933 | # CONFIG_SOUND_PRIME is not set | ||
| 934 | CONFIG_HID_SUPPORT=y | ||
| 935 | CONFIG_HID=y | ||
| 936 | # CONFIG_HIDRAW is not set | ||
| 937 | |||
| 938 | # | ||
| 939 | # USB Input Devices | ||
| 940 | # | ||
| 941 | CONFIG_USB_HID=y | ||
| 942 | # CONFIG_HID_PID is not set | ||
| 943 | # CONFIG_USB_HIDDEV is not set | ||
| 944 | |||
| 945 | # | ||
| 946 | # Special HID drivers | ||
| 947 | # | ||
| 948 | # CONFIG_HID_A4TECH is not set | ||
| 949 | # CONFIG_HID_APPLE is not set | ||
| 950 | # CONFIG_HID_BELKIN is not set | ||
| 951 | # CONFIG_HID_CHERRY is not set | ||
| 952 | # CONFIG_HID_CHICONY is not set | ||
| 953 | # CONFIG_HID_CYPRESS is not set | ||
| 954 | # CONFIG_HID_DRAGONRISE is not set | ||
| 955 | # CONFIG_HID_EZKEY is not set | ||
| 956 | # CONFIG_HID_KYE is not set | ||
| 957 | # CONFIG_HID_GYRATION is not set | ||
| 958 | # CONFIG_HID_TWINHAN is not set | ||
| 959 | # CONFIG_HID_KENSINGTON is not set | ||
| 960 | # CONFIG_HID_LOGITECH is not set | ||
| 961 | # CONFIG_HID_MICROSOFT is not set | ||
| 962 | # CONFIG_HID_MONTEREY is not set | ||
| 963 | # CONFIG_HID_NTRIG is not set | ||
| 964 | # CONFIG_HID_PANTHERLORD is not set | ||
| 965 | # CONFIG_HID_PETALYNX is not set | ||
| 966 | # CONFIG_HID_SAMSUNG is not set | ||
| 967 | # CONFIG_HID_SONY is not set | ||
| 968 | # CONFIG_HID_SUNPLUS is not set | ||
| 969 | # CONFIG_HID_GREENASIA is not set | ||
| 970 | # CONFIG_HID_SMARTJOYPLUS is not set | ||
| 971 | # CONFIG_HID_TOPSEED is not set | ||
| 972 | # CONFIG_HID_THRUSTMASTER is not set | ||
| 973 | # CONFIG_HID_ZEROPLUS is not set | ||
| 974 | CONFIG_USB_SUPPORT=y | ||
| 975 | CONFIG_USB_ARCH_HAS_HCD=y | ||
| 976 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
| 977 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
| 978 | CONFIG_USB=y | ||
| 979 | CONFIG_USB_DEBUG=y | ||
| 980 | CONFIG_USB_ANNOUNCE_NEW_DEVICES=y | ||
| 981 | |||
| 982 | # | ||
| 983 | # Miscellaneous USB options | ||
| 984 | # | ||
| 985 | CONFIG_USB_DEVICEFS=y | ||
| 986 | # CONFIG_USB_DEVICE_CLASS is not set | ||
| 987 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
| 988 | CONFIG_USB_SUSPEND=y | ||
| 989 | CONFIG_USB_OTG=y | ||
| 990 | # CONFIG_USB_OTG_WHITELIST is not set | ||
| 991 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
| 992 | CONFIG_USB_MON=y | ||
| 993 | # CONFIG_USB_WUSB is not set | ||
| 994 | # CONFIG_USB_WUSB_CBAF is not set | ||
| 995 | |||
| 996 | # | ||
| 997 | # USB Host Controller Drivers | ||
| 998 | # | ||
| 999 | # CONFIG_USB_C67X00_HCD is not set | ||
| 1000 | # CONFIG_USB_EHCI_HCD is not set | ||
| 1001 | # CONFIG_USB_OXU210HP_HCD is not set | ||
| 1002 | # CONFIG_USB_ISP116X_HCD is not set | ||
| 1003 | # CONFIG_USB_ISP1760_HCD is not set | ||
| 1004 | # CONFIG_USB_ISP1362_HCD is not set | ||
| 1005 | # CONFIG_USB_OHCI_HCD is not set | ||
| 1006 | # CONFIG_USB_SL811_HCD is not set | ||
| 1007 | # CONFIG_USB_R8A66597_HCD is not set | ||
| 1008 | # CONFIG_USB_HWA_HCD is not set | ||
| 1009 | CONFIG_USB_MUSB_HDRC=y | ||
| 1010 | CONFIG_USB_MUSB_SOC=y | ||
| 1011 | |||
| 1012 | # | ||
| 1013 | # OMAP 343x high speed USB support | ||
| 1014 | # | ||
| 1015 | # CONFIG_USB_MUSB_HOST is not set | ||
| 1016 | # CONFIG_USB_MUSB_PERIPHERAL is not set | ||
| 1017 | CONFIG_USB_MUSB_OTG=y | ||
| 1018 | CONFIG_USB_GADGET_MUSB_HDRC=y | ||
| 1019 | CONFIG_USB_MUSB_HDRC_HCD=y | ||
| 1020 | # CONFIG_MUSB_PIO_ONLY is not set | ||
| 1021 | CONFIG_USB_INVENTRA_DMA=y | ||
| 1022 | # CONFIG_USB_TI_CPPI_DMA is not set | ||
| 1023 | CONFIG_USB_MUSB_DEBUG=y | ||
| 1024 | |||
| 1025 | # | ||
| 1026 | # USB Device Class drivers | ||
| 1027 | # | ||
| 1028 | # CONFIG_USB_ACM is not set | ||
| 1029 | # CONFIG_USB_PRINTER is not set | ||
| 1030 | # CONFIG_USB_WDM is not set | ||
| 1031 | # CONFIG_USB_TMC is not set | ||
| 1032 | |||
| 1033 | # | ||
| 1034 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | ||
| 1035 | # | ||
| 1036 | |||
| 1037 | # | ||
| 1038 | # also be needed; see USB_STORAGE Help for more info | ||
| 1039 | # | ||
| 1040 | CONFIG_USB_STORAGE=y | ||
| 1041 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
| 1042 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
| 1043 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
| 1044 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
| 1045 | # CONFIG_USB_STORAGE_USBAT is not set | ||
| 1046 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
| 1047 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
| 1048 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
| 1049 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
| 1050 | # CONFIG_USB_STORAGE_ONETOUCH is not set | ||
| 1051 | # CONFIG_USB_STORAGE_KARMA is not set | ||
| 1052 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
| 1053 | # CONFIG_USB_LIBUSUAL is not set | ||
| 1054 | |||
| 1055 | # | ||
| 1056 | # USB Imaging devices | ||
| 1057 | # | ||
| 1058 | # CONFIG_USB_MDC800 is not set | ||
| 1059 | # CONFIG_USB_MICROTEK is not set | ||
| 1060 | |||
| 1061 | # | ||
| 1062 | # USB port drivers | ||
| 1063 | # | ||
| 1064 | # CONFIG_USB_SERIAL is not set | ||
| 1065 | |||
| 1066 | # | ||
| 1067 | # USB Miscellaneous drivers | ||
| 1068 | # | ||
| 1069 | # CONFIG_USB_EMI62 is not set | ||
| 1070 | # CONFIG_USB_EMI26 is not set | ||
| 1071 | # CONFIG_USB_ADUTUX is not set | ||
| 1072 | # CONFIG_USB_SEVSEG is not set | ||
| 1073 | # CONFIG_USB_RIO500 is not set | ||
| 1074 | # CONFIG_USB_LEGOTOWER is not set | ||
| 1075 | # CONFIG_USB_LCD is not set | ||
| 1076 | # CONFIG_USB_BERRY_CHARGE is not set | ||
| 1077 | # CONFIG_USB_LED is not set | ||
| 1078 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
| 1079 | # CONFIG_USB_CYTHERM is not set | ||
| 1080 | # CONFIG_USB_IDMOUSE is not set | ||
| 1081 | # CONFIG_USB_FTDI_ELAN is not set | ||
| 1082 | # CONFIG_USB_APPLEDISPLAY is not set | ||
| 1083 | # CONFIG_USB_SISUSBVGA is not set | ||
| 1084 | # CONFIG_USB_LD is not set | ||
| 1085 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
| 1086 | # CONFIG_USB_IOWARRIOR is not set | ||
| 1087 | CONFIG_USB_TEST=m | ||
| 1088 | # CONFIG_USB_ISIGHTFW is not set | ||
| 1089 | # CONFIG_USB_VST is not set | ||
| 1090 | CONFIG_USB_GADGET=m | ||
| 1091 | CONFIG_USB_GADGET_DEBUG=y | ||
| 1092 | CONFIG_USB_GADGET_DEBUG_FILES=y | ||
| 1093 | CONFIG_USB_GADGET_VBUS_DRAW=2 | ||
| 1094 | CONFIG_USB_GADGET_SELECTED=y | ||
| 1095 | # CONFIG_USB_GADGET_AT91 is not set | ||
| 1096 | # CONFIG_USB_GADGET_ATMEL_USBA is not set | ||
| 1097 | # CONFIG_USB_GADGET_FSL_USB2 is not set | ||
| 1098 | # CONFIG_USB_GADGET_LH7A40X is not set | ||
| 1099 | # CONFIG_USB_GADGET_OMAP is not set | ||
| 1100 | # CONFIG_USB_GADGET_PXA25X is not set | ||
| 1101 | # CONFIG_USB_GADGET_R8A66597 is not set | ||
| 1102 | # CONFIG_USB_GADGET_PXA27X is not set | ||
| 1103 | # CONFIG_USB_GADGET_S3C_HSOTG is not set | ||
| 1104 | # CONFIG_USB_GADGET_IMX is not set | ||
| 1105 | # CONFIG_USB_GADGET_S3C2410 is not set | ||
| 1106 | # CONFIG_USB_GADGET_M66592 is not set | ||
| 1107 | # CONFIG_USB_GADGET_AMD5536UDC is not set | ||
| 1108 | # CONFIG_USB_GADGET_FSL_QE is not set | ||
| 1109 | # CONFIG_USB_GADGET_CI13XXX is not set | ||
| 1110 | # CONFIG_USB_GADGET_NET2280 is not set | ||
| 1111 | # CONFIG_USB_GADGET_GOKU is not set | ||
| 1112 | # CONFIG_USB_GADGET_LANGWELL is not set | ||
| 1113 | # CONFIG_USB_GADGET_DUMMY_HCD is not set | ||
| 1114 | CONFIG_USB_GADGET_DUALSPEED=y | ||
| 1115 | CONFIG_USB_ZERO=m | ||
| 1116 | # CONFIG_USB_ZERO_HNPTEST is not set | ||
| 1117 | CONFIG_USB_AUDIO=m | ||
| 1118 | CONFIG_USB_ETH=m | ||
| 1119 | CONFIG_USB_ETH_RNDIS=y | ||
| 1120 | # CONFIG_USB_ETH_EEM is not set | ||
| 1121 | CONFIG_USB_GADGETFS=m | ||
| 1122 | CONFIG_USB_FILE_STORAGE=m | ||
| 1123 | # CONFIG_USB_FILE_STORAGE_TEST is not set | ||
| 1124 | CONFIG_USB_G_SERIAL=m | ||
| 1125 | # CONFIG_USB_MIDI_GADGET is not set | ||
| 1126 | # CONFIG_USB_G_PRINTER is not set | ||
| 1127 | CONFIG_USB_CDC_COMPOSITE=m | ||
| 1128 | |||
| 1129 | # | ||
| 1130 | # OTG and related infrastructure | ||
| 1131 | # | ||
| 1132 | CONFIG_USB_OTG_UTILS=y | ||
| 1133 | # CONFIG_USB_GPIO_VBUS is not set | ||
| 1134 | # CONFIG_ISP1301_OMAP is not set | ||
| 1135 | CONFIG_TWL4030_USB=y | ||
| 1136 | # CONFIG_NOP_USB_XCEIV is not set | ||
| 1137 | CONFIG_MMC=y | ||
| 1138 | # CONFIG_MMC_DEBUG is not set | ||
| 1139 | # CONFIG_MMC_UNSAFE_RESUME is not set | ||
| 1140 | |||
| 1141 | # | ||
| 1142 | # MMC/SD/SDIO Card Drivers | ||
| 1143 | # | ||
| 1144 | CONFIG_MMC_BLOCK=y | ||
| 1145 | CONFIG_MMC_BLOCK_BOUNCE=y | ||
| 1146 | # CONFIG_SDIO_UART is not set | ||
| 1147 | # CONFIG_MMC_TEST is not set | ||
| 1148 | |||
| 1149 | # | ||
| 1150 | # MMC/SD/SDIO Host Controller Drivers | ||
| 1151 | # | ||
| 1152 | # CONFIG_MMC_SDHCI is not set | ||
| 1153 | # CONFIG_MMC_OMAP is not set | ||
| 1154 | CONFIG_MMC_OMAP_HS=y | ||
| 1155 | # CONFIG_MMC_AT91 is not set | ||
| 1156 | # CONFIG_MMC_ATMELMCI is not set | ||
| 1157 | # CONFIG_MMC_SPI is not set | ||
| 1158 | # CONFIG_MEMSTICK is not set | ||
| 1159 | # CONFIG_NEW_LEDS is not set | ||
| 1160 | # CONFIG_ACCESSIBILITY is not set | ||
| 1161 | CONFIG_RTC_LIB=y | ||
| 1162 | CONFIG_RTC_CLASS=y | ||
| 1163 | CONFIG_RTC_HCTOSYS=y | ||
| 1164 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
| 1165 | # CONFIG_RTC_DEBUG is not set | ||
| 1166 | |||
| 1167 | # | ||
| 1168 | # RTC interfaces | ||
| 1169 | # | ||
| 1170 | CONFIG_RTC_INTF_SYSFS=y | ||
| 1171 | CONFIG_RTC_INTF_PROC=y | ||
| 1172 | CONFIG_RTC_INTF_DEV=y | ||
| 1173 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
| 1174 | # CONFIG_RTC_DRV_TEST is not set | ||
| 1175 | |||
| 1176 | # | ||
| 1177 | # I2C RTC drivers | ||
| 1178 | # | ||
| 1179 | # CONFIG_RTC_DRV_DS1307 is not set | ||
| 1180 | # CONFIG_RTC_DRV_DS1374 is not set | ||
| 1181 | # CONFIG_RTC_DRV_DS1672 is not set | ||
| 1182 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
| 1183 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
| 1184 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
| 1185 | # CONFIG_RTC_DRV_X1205 is not set | ||
| 1186 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
| 1187 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
| 1188 | # CONFIG_RTC_DRV_M41T80 is not set | ||
| 1189 | # CONFIG_RTC_DRV_TWL4030 is not set | ||
| 1190 | # CONFIG_RTC_DRV_S35390A is not set | ||
| 1191 | # CONFIG_RTC_DRV_FM3130 is not set | ||
| 1192 | # CONFIG_RTC_DRV_RX8581 is not set | ||
| 1193 | # CONFIG_RTC_DRV_RX8025 is not set | ||
| 1194 | |||
| 1195 | # | ||
| 1196 | # SPI RTC drivers | ||
| 1197 | # | ||
| 1198 | # CONFIG_RTC_DRV_M41T94 is not set | ||
| 1199 | # CONFIG_RTC_DRV_DS1305 is not set | ||
| 1200 | # CONFIG_RTC_DRV_DS1390 is not set | ||
| 1201 | # CONFIG_RTC_DRV_MAX6902 is not set | ||
| 1202 | # CONFIG_RTC_DRV_R9701 is not set | ||
| 1203 | # CONFIG_RTC_DRV_RS5C348 is not set | ||
| 1204 | # CONFIG_RTC_DRV_DS3234 is not set | ||
| 1205 | # CONFIG_RTC_DRV_PCF2123 is not set | ||
| 1206 | |||
| 1207 | # | ||
| 1208 | # Platform RTC drivers | ||
| 1209 | # | ||
| 1210 | # CONFIG_RTC_DRV_CMOS is not set | ||
| 1211 | # CONFIG_RTC_DRV_DS1286 is not set | ||
| 1212 | # CONFIG_RTC_DRV_DS1511 is not set | ||
| 1213 | # CONFIG_RTC_DRV_DS1553 is not set | ||
| 1214 | # CONFIG_RTC_DRV_DS1742 is not set | ||
| 1215 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
| 1216 | # CONFIG_RTC_DRV_M48T86 is not set | ||
| 1217 | # CONFIG_RTC_DRV_M48T35 is not set | ||
| 1218 | # CONFIG_RTC_DRV_M48T59 is not set | ||
| 1219 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
| 1220 | # CONFIG_RTC_DRV_V3020 is not set | ||
| 1221 | |||
| 1222 | # | ||
| 1223 | # on-CPU RTC drivers | ||
| 1224 | # | ||
| 1225 | # CONFIG_DMADEVICES is not set | ||
| 1226 | # CONFIG_AUXDISPLAY is not set | ||
| 1227 | # CONFIG_UIO is not set | ||
| 1228 | |||
| 1229 | # | ||
| 1230 | # TI VLYNQ | ||
| 1231 | # | ||
| 1232 | # CONFIG_STAGING is not set | ||
| 1233 | |||
| 1234 | # | ||
| 1235 | # CBUS support | ||
| 1236 | # | ||
| 1237 | # CONFIG_CBUS is not set | ||
| 1238 | |||
| 1239 | # | ||
| 1240 | # File systems | ||
| 1241 | # | ||
| 1242 | CONFIG_EXT2_FS=y | ||
| 1243 | # CONFIG_EXT2_FS_XATTR is not set | ||
| 1244 | # CONFIG_EXT2_FS_XIP is not set | ||
| 1245 | CONFIG_EXT3_FS=y | ||
| 1246 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 1247 | # CONFIG_EXT3_FS_XATTR is not set | ||
| 1248 | # CONFIG_EXT4_FS is not set | ||
| 1249 | CONFIG_JBD=y | ||
| 1250 | # CONFIG_REISERFS_FS is not set | ||
| 1251 | # CONFIG_JFS_FS is not set | ||
| 1252 | CONFIG_FS_POSIX_ACL=y | ||
| 1253 | # CONFIG_XFS_FS is not set | ||
| 1254 | # CONFIG_GFS2_FS is not set | ||
| 1255 | # CONFIG_OCFS2_FS is not set | ||
| 1256 | # CONFIG_BTRFS_FS is not set | ||
| 1257 | # CONFIG_NILFS2_FS is not set | ||
| 1258 | CONFIG_FILE_LOCKING=y | ||
| 1259 | CONFIG_FSNOTIFY=y | ||
| 1260 | CONFIG_DNOTIFY=y | ||
| 1261 | CONFIG_INOTIFY=y | ||
| 1262 | CONFIG_INOTIFY_USER=y | ||
| 1263 | CONFIG_QUOTA=y | ||
| 1264 | # CONFIG_QUOTA_NETLINK_INTERFACE is not set | ||
| 1265 | CONFIG_PRINT_QUOTA_WARNING=y | ||
| 1266 | CONFIG_QUOTA_TREE=y | ||
| 1267 | # CONFIG_QFMT_V1 is not set | ||
| 1268 | CONFIG_QFMT_V2=y | ||
| 1269 | CONFIG_QUOTACTL=y | ||
| 1270 | # CONFIG_AUTOFS_FS is not set | ||
| 1271 | # CONFIG_AUTOFS4_FS is not set | ||
| 1272 | # CONFIG_FUSE_FS is not set | ||
| 1273 | |||
| 1274 | # | ||
| 1275 | # Caches | ||
| 1276 | # | ||
| 1277 | # CONFIG_FSCACHE is not set | ||
| 1278 | |||
| 1279 | # | ||
| 1280 | # CD-ROM/DVD Filesystems | ||
| 1281 | # | ||
| 1282 | # CONFIG_ISO9660_FS is not set | ||
| 1283 | # CONFIG_UDF_FS is not set | ||
| 1284 | |||
| 1285 | # | ||
| 1286 | # DOS/FAT/NT Filesystems | ||
| 1287 | # | ||
| 1288 | CONFIG_FAT_FS=y | ||
| 1289 | CONFIG_MSDOS_FS=y | ||
| 1290 | CONFIG_VFAT_FS=y | ||
| 1291 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
| 1292 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
| 1293 | # CONFIG_NTFS_FS is not set | ||
| 1294 | |||
| 1295 | # | ||
| 1296 | # Pseudo filesystems | ||
| 1297 | # | ||
| 1298 | CONFIG_PROC_FS=y | ||
| 1299 | CONFIG_PROC_SYSCTL=y | ||
| 1300 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 1301 | CONFIG_SYSFS=y | ||
| 1302 | CONFIG_TMPFS=y | ||
| 1303 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
| 1304 | # CONFIG_HUGETLB_PAGE is not set | ||
| 1305 | # CONFIG_CONFIGFS_FS is not set | ||
| 1306 | CONFIG_MISC_FILESYSTEMS=y | ||
| 1307 | # CONFIG_ADFS_FS is not set | ||
| 1308 | # CONFIG_AFFS_FS is not set | ||
| 1309 | # CONFIG_HFS_FS is not set | ||
| 1310 | # CONFIG_HFSPLUS_FS is not set | ||
| 1311 | # CONFIG_BEFS_FS is not set | ||
| 1312 | # CONFIG_BFS_FS is not set | ||
| 1313 | # CONFIG_EFS_FS is not set | ||
| 1314 | # CONFIG_CRAMFS is not set | ||
| 1315 | # CONFIG_SQUASHFS is not set | ||
| 1316 | # CONFIG_VXFS_FS is not set | ||
| 1317 | # CONFIG_MINIX_FS is not set | ||
| 1318 | # CONFIG_OMFS_FS is not set | ||
| 1319 | # CONFIG_HPFS_FS is not set | ||
| 1320 | # CONFIG_QNX4FS_FS is not set | ||
| 1321 | # CONFIG_ROMFS_FS is not set | ||
| 1322 | # CONFIG_SYSV_FS is not set | ||
| 1323 | # CONFIG_UFS_FS is not set | ||
| 1324 | CONFIG_NETWORK_FILESYSTEMS=y | ||
| 1325 | CONFIG_NFS_FS=y | ||
| 1326 | CONFIG_NFS_V3=y | ||
| 1327 | CONFIG_NFS_V3_ACL=y | ||
| 1328 | CONFIG_NFS_V4=y | ||
| 1329 | # CONFIG_NFS_V4_1 is not set | ||
| 1330 | CONFIG_ROOT_NFS=y | ||
| 1331 | # CONFIG_NFSD is not set | ||
| 1332 | CONFIG_LOCKD=y | ||
| 1333 | CONFIG_LOCKD_V4=y | ||
| 1334 | CONFIG_NFS_ACL_SUPPORT=y | ||
| 1335 | CONFIG_NFS_COMMON=y | ||
| 1336 | CONFIG_SUNRPC=y | ||
| 1337 | CONFIG_SUNRPC_GSS=y | ||
| 1338 | CONFIG_RPCSEC_GSS_KRB5=y | ||
| 1339 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
| 1340 | # CONFIG_SMB_FS is not set | ||
| 1341 | # CONFIG_CIFS is not set | ||
| 1342 | # CONFIG_NCP_FS is not set | ||
| 1343 | # CONFIG_CODA_FS is not set | ||
| 1344 | # CONFIG_AFS_FS is not set | ||
| 1345 | |||
| 1346 | # | ||
| 1347 | # Partition Types | ||
| 1348 | # | ||
| 1349 | CONFIG_PARTITION_ADVANCED=y | ||
| 1350 | # CONFIG_ACORN_PARTITION is not set | ||
| 1351 | # CONFIG_OSF_PARTITION is not set | ||
| 1352 | # CONFIG_AMIGA_PARTITION is not set | ||
| 1353 | # CONFIG_ATARI_PARTITION is not set | ||
| 1354 | # CONFIG_MAC_PARTITION is not set | ||
| 1355 | CONFIG_MSDOS_PARTITION=y | ||
| 1356 | # CONFIG_BSD_DISKLABEL is not set | ||
| 1357 | # CONFIG_MINIX_SUBPARTITION is not set | ||
| 1358 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
| 1359 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
| 1360 | # CONFIG_LDM_PARTITION is not set | ||
| 1361 | # CONFIG_SGI_PARTITION is not set | ||
| 1362 | # CONFIG_ULTRIX_PARTITION is not set | ||
| 1363 | # CONFIG_SUN_PARTITION is not set | ||
| 1364 | # CONFIG_KARMA_PARTITION is not set | ||
| 1365 | # CONFIG_EFI_PARTITION is not set | ||
| 1366 | # CONFIG_SYSV68_PARTITION is not set | ||
| 1367 | CONFIG_NLS=y | ||
| 1368 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
| 1369 | CONFIG_NLS_CODEPAGE_437=y | ||
| 1370 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
| 1371 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
| 1372 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
| 1373 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
| 1374 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
| 1375 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
| 1376 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
| 1377 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
| 1378 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
| 1379 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
| 1380 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
| 1381 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
| 1382 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
| 1383 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
| 1384 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
| 1385 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
| 1386 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
| 1387 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
| 1388 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
| 1389 | # CONFIG_NLS_ISO8859_8 is not set | ||
| 1390 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
| 1391 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
| 1392 | # CONFIG_NLS_ASCII is not set | ||
| 1393 | CONFIG_NLS_ISO8859_1=y | ||
| 1394 | # CONFIG_NLS_ISO8859_2 is not set | ||
| 1395 | # CONFIG_NLS_ISO8859_3 is not set | ||
| 1396 | # CONFIG_NLS_ISO8859_4 is not set | ||
| 1397 | # CONFIG_NLS_ISO8859_5 is not set | ||
| 1398 | # CONFIG_NLS_ISO8859_6 is not set | ||
| 1399 | # CONFIG_NLS_ISO8859_7 is not set | ||
| 1400 | # CONFIG_NLS_ISO8859_9 is not set | ||
| 1401 | # CONFIG_NLS_ISO8859_13 is not set | ||
| 1402 | # CONFIG_NLS_ISO8859_14 is not set | ||
| 1403 | # CONFIG_NLS_ISO8859_15 is not set | ||
| 1404 | # CONFIG_NLS_KOI8_R is not set | ||
| 1405 | # CONFIG_NLS_KOI8_U is not set | ||
| 1406 | # CONFIG_NLS_UTF8 is not set | ||
| 1407 | # CONFIG_DLM is not set | ||
| 1408 | |||
| 1409 | # | ||
| 1410 | # Kernel hacking | ||
| 1411 | # | ||
| 1412 | # CONFIG_PRINTK_TIME is not set | ||
| 1413 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 1414 | CONFIG_ENABLE_MUST_CHECK=y | ||
| 1415 | CONFIG_FRAME_WARN=1024 | ||
| 1416 | CONFIG_MAGIC_SYSRQ=y | ||
| 1417 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 1418 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 1419 | # CONFIG_DEBUG_FS is not set | ||
| 1420 | # CONFIG_HEADERS_CHECK is not set | ||
| 1421 | CONFIG_DEBUG_KERNEL=y | ||
| 1422 | # CONFIG_DEBUG_SHIRQ is not set | ||
| 1423 | CONFIG_DETECT_SOFTLOCKUP=y | ||
| 1424 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | ||
| 1425 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | ||
| 1426 | CONFIG_DETECT_HUNG_TASK=y | ||
| 1427 | # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set | ||
| 1428 | CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 | ||
| 1429 | CONFIG_SCHED_DEBUG=y | ||
| 1430 | # CONFIG_SCHEDSTATS is not set | ||
| 1431 | # CONFIG_TIMER_STATS is not set | ||
| 1432 | # CONFIG_DEBUG_OBJECTS is not set | ||
| 1433 | # CONFIG_DEBUG_SLAB is not set | ||
| 1434 | # CONFIG_DEBUG_KMEMLEAK is not set | ||
| 1435 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
| 1436 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 1437 | # CONFIG_DEBUG_SPINLOCK is not set | ||
| 1438 | CONFIG_DEBUG_MUTEXES=y | ||
| 1439 | # CONFIG_DEBUG_LOCK_ALLOC is not set | ||
| 1440 | # CONFIG_PROVE_LOCKING is not set | ||
| 1441 | # CONFIG_LOCK_STAT is not set | ||
| 1442 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
| 1443 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
| 1444 | # CONFIG_DEBUG_KOBJECT is not set | ||
| 1445 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
| 1446 | CONFIG_DEBUG_INFO=y | ||
| 1447 | # CONFIG_DEBUG_VM is not set | ||
| 1448 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
| 1449 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
| 1450 | # CONFIG_DEBUG_LIST is not set | ||
| 1451 | # CONFIG_DEBUG_SG is not set | ||
| 1452 | # CONFIG_DEBUG_NOTIFIERS is not set | ||
| 1453 | # CONFIG_DEBUG_CREDENTIALS is not set | ||
| 1454 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
| 1455 | # CONFIG_RCU_TORTURE_TEST is not set | ||
| 1456 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 1457 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
| 1458 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
| 1459 | # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set | ||
| 1460 | # CONFIG_FAULT_INJECTION is not set | ||
| 1461 | # CONFIG_LATENCYTOP is not set | ||
| 1462 | # CONFIG_PAGE_POISONING is not set | ||
| 1463 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 1464 | CONFIG_TRACING_SUPPORT=y | ||
| 1465 | CONFIG_FTRACE=y | ||
| 1466 | # CONFIG_FUNCTION_TRACER is not set | ||
| 1467 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 1468 | # CONFIG_SCHED_TRACER is not set | ||
| 1469 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set | ||
| 1470 | # CONFIG_BOOT_TRACER is not set | ||
| 1471 | CONFIG_BRANCH_PROFILE_NONE=y | ||
| 1472 | # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set | ||
| 1473 | # CONFIG_PROFILE_ALL_BRANCHES is not set | ||
| 1474 | # CONFIG_STACK_TRACER is not set | ||
| 1475 | # CONFIG_KMEMTRACE is not set | ||
| 1476 | # CONFIG_WORKQUEUE_TRACER is not set | ||
| 1477 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 1478 | # CONFIG_SAMPLES is not set | ||
| 1479 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 1480 | # CONFIG_KGDB is not set | ||
| 1481 | CONFIG_ARM_UNWIND=y | ||
| 1482 | # CONFIG_DEBUG_USER is not set | ||
| 1483 | # CONFIG_DEBUG_ERRORS is not set | ||
| 1484 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
| 1485 | # CONFIG_DEBUG_LL is not set | ||
| 1486 | |||
| 1487 | # | ||
| 1488 | # Security options | ||
| 1489 | # | ||
| 1490 | # CONFIG_KEYS is not set | ||
| 1491 | # CONFIG_SECURITY is not set | ||
| 1492 | # CONFIG_SECURITYFS is not set | ||
| 1493 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
| 1494 | CONFIG_CRYPTO=y | ||
| 1495 | |||
| 1496 | # | ||
| 1497 | # Crypto core or helper | ||
| 1498 | # | ||
| 1499 | CONFIG_CRYPTO_ALGAPI=y | ||
| 1500 | CONFIG_CRYPTO_ALGAPI2=y | ||
| 1501 | CONFIG_CRYPTO_AEAD2=y | ||
| 1502 | CONFIG_CRYPTO_BLKCIPHER=y | ||
| 1503 | CONFIG_CRYPTO_BLKCIPHER2=y | ||
| 1504 | CONFIG_CRYPTO_HASH=y | ||
| 1505 | CONFIG_CRYPTO_HASH2=y | ||
| 1506 | CONFIG_CRYPTO_RNG2=y | ||
| 1507 | CONFIG_CRYPTO_PCOMP=y | ||
| 1508 | CONFIG_CRYPTO_MANAGER=y | ||
| 1509 | CONFIG_CRYPTO_MANAGER2=y | ||
| 1510 | # CONFIG_CRYPTO_GF128MUL is not set | ||
| 1511 | # CONFIG_CRYPTO_NULL is not set | ||
| 1512 | CONFIG_CRYPTO_WORKQUEUE=y | ||
| 1513 | # CONFIG_CRYPTO_CRYPTD is not set | ||
| 1514 | # CONFIG_CRYPTO_AUTHENC is not set | ||
| 1515 | # CONFIG_CRYPTO_TEST is not set | ||
| 1516 | |||
| 1517 | # | ||
| 1518 | # Authenticated Encryption with Associated Data | ||
| 1519 | # | ||
| 1520 | # CONFIG_CRYPTO_CCM is not set | ||
| 1521 | # CONFIG_CRYPTO_GCM is not set | ||
| 1522 | # CONFIG_CRYPTO_SEQIV is not set | ||
| 1523 | |||
| 1524 | # | ||
| 1525 | # Block modes | ||
| 1526 | # | ||
| 1527 | CONFIG_CRYPTO_CBC=y | ||
| 1528 | # CONFIG_CRYPTO_CTR is not set | ||
| 1529 | # CONFIG_CRYPTO_CTS is not set | ||
| 1530 | CONFIG_CRYPTO_ECB=m | ||
| 1531 | # CONFIG_CRYPTO_LRW is not set | ||
| 1532 | CONFIG_CRYPTO_PCBC=m | ||
| 1533 | # CONFIG_CRYPTO_XTS is not set | ||
| 1534 | |||
| 1535 | # | ||
| 1536 | # Hash modes | ||
| 1537 | # | ||
| 1538 | # CONFIG_CRYPTO_HMAC is not set | ||
| 1539 | # CONFIG_CRYPTO_XCBC is not set | ||
| 1540 | # CONFIG_CRYPTO_VMAC is not set | ||
| 1541 | |||
| 1542 | # | ||
| 1543 | # Digest | ||
| 1544 | # | ||
| 1545 | CONFIG_CRYPTO_CRC32C=y | ||
| 1546 | # CONFIG_CRYPTO_GHASH is not set | ||
| 1547 | # CONFIG_CRYPTO_MD4 is not set | ||
| 1548 | CONFIG_CRYPTO_MD5=y | ||
| 1549 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
| 1550 | # CONFIG_CRYPTO_RMD128 is not set | ||
| 1551 | # CONFIG_CRYPTO_RMD160 is not set | ||
| 1552 | # CONFIG_CRYPTO_RMD256 is not set | ||
| 1553 | # CONFIG_CRYPTO_RMD320 is not set | ||
| 1554 | # CONFIG_CRYPTO_SHA1 is not set | ||
| 1555 | # CONFIG_CRYPTO_SHA256 is not set | ||
| 1556 | # CONFIG_CRYPTO_SHA512 is not set | ||
| 1557 | # CONFIG_CRYPTO_TGR192 is not set | ||
| 1558 | # CONFIG_CRYPTO_WP512 is not set | ||
| 1559 | |||
| 1560 | # | ||
| 1561 | # Ciphers | ||
| 1562 | # | ||
| 1563 | # CONFIG_CRYPTO_AES is not set | ||
| 1564 | # CONFIG_CRYPTO_ANUBIS is not set | ||
| 1565 | # CONFIG_CRYPTO_ARC4 is not set | ||
| 1566 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
| 1567 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
| 1568 | # CONFIG_CRYPTO_CAST5 is not set | ||
| 1569 | # CONFIG_CRYPTO_CAST6 is not set | ||
| 1570 | CONFIG_CRYPTO_DES=y | ||
| 1571 | # CONFIG_CRYPTO_FCRYPT is not set | ||
| 1572 | # CONFIG_CRYPTO_KHAZAD is not set | ||
| 1573 | # CONFIG_CRYPTO_SALSA20 is not set | ||
| 1574 | # CONFIG_CRYPTO_SEED is not set | ||
| 1575 | # CONFIG_CRYPTO_SERPENT is not set | ||
| 1576 | # CONFIG_CRYPTO_TEA is not set | ||
| 1577 | # CONFIG_CRYPTO_TWOFISH is not set | ||
| 1578 | |||
| 1579 | # | ||
| 1580 | # Compression | ||
| 1581 | # | ||
| 1582 | # CONFIG_CRYPTO_DEFLATE is not set | ||
| 1583 | # CONFIG_CRYPTO_ZLIB is not set | ||
| 1584 | # CONFIG_CRYPTO_LZO is not set | ||
| 1585 | |||
| 1586 | # | ||
| 1587 | # Random Number Generation | ||
| 1588 | # | ||
| 1589 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
| 1590 | CONFIG_CRYPTO_HW=y | ||
| 1591 | # CONFIG_BINARY_PRINTF is not set | ||
| 1592 | |||
| 1593 | # | ||
| 1594 | # Library routines | ||
| 1595 | # | ||
| 1596 | CONFIG_BITREVERSE=y | ||
| 1597 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
| 1598 | CONFIG_CRC_CCITT=y | ||
| 1599 | # CONFIG_CRC16 is not set | ||
| 1600 | CONFIG_CRC_T10DIF=y | ||
| 1601 | # CONFIG_CRC_ITU_T is not set | ||
| 1602 | CONFIG_CRC32=y | ||
| 1603 | # CONFIG_CRC7 is not set | ||
| 1604 | CONFIG_LIBCRC32C=y | ||
| 1605 | CONFIG_ZLIB_INFLATE=y | ||
| 1606 | CONFIG_DECOMPRESS_GZIP=y | ||
| 1607 | CONFIG_HAS_IOMEM=y | ||
| 1608 | CONFIG_HAS_IOPORT=y | ||
| 1609 | CONFIG_HAS_DMA=y | ||
| 1610 | CONFIG_NLATTR=y | ||
diff --git a/arch/arm/configs/overo_defconfig b/arch/arm/configs/overo_defconfig index a57f9e4124f..b3ea2c4c0f9 100644 --- a/arch/arm/configs/overo_defconfig +++ b/arch/arm/configs/overo_defconfig | |||
| @@ -54,8 +54,8 @@ CONFIG_FAIR_GROUP_SCHED=y | |||
| 54 | # CONFIG_RT_GROUP_SCHED is not set | 54 | # CONFIG_RT_GROUP_SCHED is not set |
| 55 | CONFIG_USER_SCHED=y | 55 | CONFIG_USER_SCHED=y |
| 56 | # CONFIG_CGROUP_SCHED is not set | 56 | # CONFIG_CGROUP_SCHED is not set |
| 57 | CONFIG_SYSFS_DEPRECATED=y | 57 | # CONFIG_SYSFS_DEPRECATED=y is not set |
| 58 | CONFIG_SYSFS_DEPRECATED_V2=y | 58 | # CONFIG_SYSFS_DEPRECATED_V2=y is not set |
| 59 | # CONFIG_RELAY is not set | 59 | # CONFIG_RELAY is not set |
| 60 | # CONFIG_NAMESPACES is not set | 60 | # CONFIG_NAMESPACES is not set |
| 61 | CONFIG_BLK_DEV_INITRD=y | 61 | CONFIG_BLK_DEV_INITRD=y |
diff --git a/arch/arm/configs/rx51_defconfig b/arch/arm/configs/rx51_defconfig index e7e31332c62..15597342602 100644 --- a/arch/arm/configs/rx51_defconfig +++ b/arch/arm/configs/rx51_defconfig | |||
| @@ -784,7 +784,7 @@ CONFIG_INPUT_KEYBOARD=y | |||
| 784 | # CONFIG_KEYBOARD_XTKBD is not set | 784 | # CONFIG_KEYBOARD_XTKBD is not set |
| 785 | # CONFIG_KEYBOARD_NEWTON is not set | 785 | # CONFIG_KEYBOARD_NEWTON is not set |
| 786 | # CONFIG_KEYBOARD_STOWAWAY is not set | 786 | # CONFIG_KEYBOARD_STOWAWAY is not set |
| 787 | # CONFIG_KEYBOARD_GPIO is not set | 787 | CONFIG_KEYBOARD_GPIO=m |
| 788 | # CONFIG_INPUT_MOUSE is not set | 788 | # CONFIG_INPUT_MOUSE is not set |
| 789 | # CONFIG_INPUT_JOYSTICK is not set | 789 | # CONFIG_INPUT_JOYSTICK is not set |
| 790 | # CONFIG_INPUT_TABLET is not set | 790 | # CONFIG_INPUT_TABLET is not set |
diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig new file mode 100644 index 00000000000..15fde22ce3f --- /dev/null +++ b/arch/arm/configs/u8500_defconfig | |||
| @@ -0,0 +1,680 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.32-rc8 | ||
| 4 | # Mon Nov 30 11:11:29 2009 | ||
| 5 | # | ||
| 6 | CONFIG_ARM=y | ||
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
| 8 | CONFIG_GENERIC_TIME=y | ||
| 9 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 10 | CONFIG_GENERIC_HARDIRQS=y | ||
| 11 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 12 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 13 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 14 | CONFIG_HARDIRQS_SW_RESEND=y | ||
| 15 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 16 | CONFIG_GENERIC_LOCKBREAK=y | ||
| 17 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 18 | CONFIG_GENERIC_HWEIGHT=y | ||
| 19 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
| 20 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 21 | CONFIG_VECTORS_BASE=0xffff0000 | ||
| 22 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 23 | CONFIG_CONSTRUCTORS=y | ||
| 24 | |||
| 25 | # | ||
| 26 | # General setup | ||
| 27 | # | ||
| 28 | CONFIG_EXPERIMENTAL=y | ||
| 29 | CONFIG_LOCK_KERNEL=y | ||
| 30 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 31 | CONFIG_LOCALVERSION="" | ||
| 32 | CONFIG_LOCALVERSION_AUTO=y | ||
| 33 | # CONFIG_SWAP is not set | ||
| 34 | CONFIG_SYSVIPC=y | ||
| 35 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 36 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
| 37 | |||
| 38 | # | ||
| 39 | # RCU Subsystem | ||
| 40 | # | ||
| 41 | CONFIG_TREE_RCU=y | ||
| 42 | # CONFIG_TREE_PREEMPT_RCU is not set | ||
| 43 | # CONFIG_RCU_TRACE is not set | ||
| 44 | CONFIG_RCU_FANOUT=32 | ||
| 45 | # CONFIG_RCU_FANOUT_EXACT is not set | ||
| 46 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 47 | # CONFIG_IKCONFIG is not set | ||
| 48 | CONFIG_LOG_BUF_SHIFT=17 | ||
| 49 | CONFIG_GROUP_SCHED=y | ||
| 50 | CONFIG_FAIR_GROUP_SCHED=y | ||
| 51 | CONFIG_RT_GROUP_SCHED=y | ||
| 52 | CONFIG_USER_SCHED=y | ||
| 53 | # CONFIG_CGROUP_SCHED is not set | ||
| 54 | # CONFIG_CGROUPS is not set | ||
| 55 | CONFIG_SYSFS_DEPRECATED=y | ||
| 56 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
| 57 | # CONFIG_RELAY is not set | ||
| 58 | CONFIG_NAMESPACES=y | ||
| 59 | # CONFIG_UTS_NS is not set | ||
| 60 | # CONFIG_IPC_NS is not set | ||
| 61 | # CONFIG_USER_NS is not set | ||
| 62 | # CONFIG_PID_NS is not set | ||
| 63 | CONFIG_BLK_DEV_INITRD=y | ||
| 64 | CONFIG_INITRAMFS_SOURCE="" | ||
| 65 | CONFIG_RD_GZIP=y | ||
| 66 | CONFIG_RD_BZIP2=y | ||
| 67 | CONFIG_RD_LZMA=y | ||
| 68 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 69 | CONFIG_SYSCTL=y | ||
| 70 | CONFIG_ANON_INODES=y | ||
| 71 | # CONFIG_EMBEDDED is not set | ||
| 72 | CONFIG_UID16=y | ||
| 73 | CONFIG_SYSCTL_SYSCALL=y | ||
| 74 | CONFIG_KALLSYMS=y | ||
| 75 | CONFIG_KALLSYMS_ALL=y | ||
| 76 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
| 77 | CONFIG_HOTPLUG=y | ||
| 78 | CONFIG_PRINTK=y | ||
| 79 | CONFIG_BUG=y | ||
| 80 | CONFIG_ELF_CORE=y | ||
| 81 | CONFIG_BASE_FULL=y | ||
| 82 | CONFIG_FUTEX=y | ||
| 83 | CONFIG_EPOLL=y | ||
| 84 | CONFIG_SIGNALFD=y | ||
| 85 | CONFIG_TIMERFD=y | ||
| 86 | CONFIG_EVENTFD=y | ||
| 87 | CONFIG_SHMEM=y | ||
| 88 | CONFIG_AIO=y | ||
| 89 | |||
| 90 | # | ||
| 91 | # Kernel Performance Events And Counters | ||
| 92 | # | ||
| 93 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 94 | CONFIG_SLUB_DEBUG=y | ||
| 95 | CONFIG_COMPAT_BRK=y | ||
| 96 | # CONFIG_SLAB is not set | ||
| 97 | CONFIG_SLUB=y | ||
| 98 | # CONFIG_SLOB is not set | ||
| 99 | # CONFIG_PROFILING is not set | ||
| 100 | CONFIG_HAVE_OPROFILE=y | ||
| 101 | # CONFIG_KPROBES is not set | ||
| 102 | CONFIG_HAVE_KPROBES=y | ||
| 103 | CONFIG_HAVE_KRETPROBES=y | ||
| 104 | CONFIG_USE_GENERIC_SMP_HELPERS=y | ||
| 105 | |||
| 106 | # | ||
| 107 | # GCOV-based kernel profiling | ||
| 108 | # | ||
| 109 | # CONFIG_SLOW_WORK is not set | ||
| 110 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 111 | CONFIG_SLABINFO=y | ||
| 112 | CONFIG_RT_MUTEXES=y | ||
| 113 | CONFIG_BASE_SMALL=0 | ||
| 114 | CONFIG_MODULES=y | ||
| 115 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 116 | CONFIG_MODULE_UNLOAD=y | ||
| 117 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
| 118 | # CONFIG_MODVERSIONS is not set | ||
| 119 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
| 120 | CONFIG_STOP_MACHINE=y | ||
| 121 | CONFIG_BLOCK=y | ||
| 122 | # CONFIG_LBDAF is not set | ||
| 123 | # CONFIG_BLK_DEV_BSG is not set | ||
| 124 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 125 | |||
| 126 | # | ||
| 127 | # IO Schedulers | ||
| 128 | # | ||
| 129 | CONFIG_IOSCHED_NOOP=y | ||
| 130 | CONFIG_IOSCHED_AS=y | ||
| 131 | CONFIG_IOSCHED_DEADLINE=y | ||
| 132 | CONFIG_IOSCHED_CFQ=y | ||
| 133 | # CONFIG_DEFAULT_AS is not set | ||
| 134 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 135 | CONFIG_DEFAULT_CFQ=y | ||
| 136 | # CONFIG_DEFAULT_NOOP is not set | ||
| 137 | CONFIG_DEFAULT_IOSCHED="cfq" | ||
| 138 | # CONFIG_FREEZER is not set | ||
| 139 | |||
| 140 | # | ||
| 141 | # System Type | ||
| 142 | # | ||
| 143 | CONFIG_MMU=y | ||
| 144 | # CONFIG_ARCH_AAEC2000 is not set | ||
| 145 | # CONFIG_ARCH_INTEGRATOR is not set | ||
| 146 | # CONFIG_ARCH_REALVIEW is not set | ||
| 147 | # CONFIG_ARCH_VERSATILE is not set | ||
| 148 | # CONFIG_ARCH_AT91 is not set | ||
| 149 | # CONFIG_ARCH_CLPS711X is not set | ||
| 150 | # CONFIG_ARCH_GEMINI is not set | ||
| 151 | # CONFIG_ARCH_EBSA110 is not set | ||
| 152 | # CONFIG_ARCH_EP93XX is not set | ||
| 153 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
| 154 | # CONFIG_ARCH_MXC is not set | ||
| 155 | # CONFIG_ARCH_STMP3XXX is not set | ||
| 156 | # CONFIG_ARCH_NETX is not set | ||
| 157 | # CONFIG_ARCH_H720X is not set | ||
| 158 | # CONFIG_ARCH_NOMADIK is not set | ||
| 159 | # CONFIG_ARCH_IOP13XX is not set | ||
| 160 | # CONFIG_ARCH_IOP32X is not set | ||
| 161 | # CONFIG_ARCH_IOP33X is not set | ||
| 162 | # CONFIG_ARCH_IXP23XX is not set | ||
| 163 | # CONFIG_ARCH_IXP2000 is not set | ||
| 164 | # CONFIG_ARCH_IXP4XX is not set | ||
| 165 | # CONFIG_ARCH_L7200 is not set | ||
| 166 | # CONFIG_ARCH_KIRKWOOD is not set | ||
| 167 | # CONFIG_ARCH_LOKI is not set | ||
| 168 | # CONFIG_ARCH_MV78XX0 is not set | ||
| 169 | # CONFIG_ARCH_ORION5X is not set | ||
| 170 | # CONFIG_ARCH_MMP is not set | ||
| 171 | # CONFIG_ARCH_KS8695 is not set | ||
| 172 | # CONFIG_ARCH_NS9XXX is not set | ||
| 173 | # CONFIG_ARCH_W90X900 is not set | ||
| 174 | # CONFIG_ARCH_PNX4008 is not set | ||
| 175 | # CONFIG_ARCH_PXA is not set | ||
| 176 | # CONFIG_ARCH_MSM is not set | ||
| 177 | # CONFIG_ARCH_RPC is not set | ||
| 178 | # CONFIG_ARCH_SA1100 is not set | ||
| 179 | # CONFIG_ARCH_S3C2410 is not set | ||
| 180 | # CONFIG_ARCH_S3C64XX is not set | ||
| 181 | # CONFIG_ARCH_S5PC1XX is not set | ||
| 182 | # CONFIG_ARCH_SHARK is not set | ||
| 183 | # CONFIG_ARCH_LH7A40X is not set | ||
| 184 | # CONFIG_ARCH_U300 is not set | ||
| 185 | # CONFIG_ARCH_DAVINCI is not set | ||
| 186 | # CONFIG_ARCH_OMAP is not set | ||
| 187 | # CONFIG_ARCH_BCMRING is not set | ||
| 188 | CONFIG_ARCH_U8500=y | ||
| 189 | CONFIG_PLAT_NOMADIK=y | ||
| 190 | CONFIG_HAS_MTU=y | ||
| 191 | |||
| 192 | # | ||
| 193 | # ST-Ericsson platform type | ||
| 194 | # | ||
| 195 | |||
| 196 | # | ||
| 197 | # ST-Ericsson Multicore Mobile Platforms | ||
| 198 | # | ||
| 199 | CONFIG_MACH_U8500_MOP=y | ||
| 200 | |||
| 201 | # | ||
| 202 | # Processor Type | ||
| 203 | # | ||
| 204 | CONFIG_CPU_32=y | ||
| 205 | CONFIG_CPU_32v6K=y | ||
| 206 | CONFIG_CPU_V7=y | ||
| 207 | CONFIG_CPU_32v7=y | ||
| 208 | CONFIG_CPU_ABRT_EV7=y | ||
| 209 | CONFIG_CPU_PABRT_V7=y | ||
| 210 | CONFIG_CPU_CACHE_V7=y | ||
| 211 | CONFIG_CPU_CACHE_VIPT=y | ||
| 212 | CONFIG_CPU_COPY_V6=y | ||
| 213 | CONFIG_CPU_TLB_V7=y | ||
| 214 | CONFIG_CPU_HAS_ASID=y | ||
| 215 | CONFIG_CPU_CP15=y | ||
| 216 | CONFIG_CPU_CP15_MMU=y | ||
| 217 | |||
| 218 | # | ||
| 219 | # Processor Features | ||
| 220 | # | ||
| 221 | CONFIG_ARM_THUMB=y | ||
| 222 | # CONFIG_ARM_THUMBEE is not set | ||
| 223 | # CONFIG_CPU_ICACHE_DISABLE is not set | ||
| 224 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
| 225 | # CONFIG_CPU_BPREDICT_DISABLE is not set | ||
| 226 | CONFIG_HAS_TLS_REG=y | ||
| 227 | CONFIG_ARM_L1_CACHE_SHIFT=5 | ||
| 228 | # CONFIG_ARM_ERRATA_430973 is not set | ||
| 229 | # CONFIG_ARM_ERRATA_458693 is not set | ||
| 230 | # CONFIG_ARM_ERRATA_460075 is not set | ||
| 231 | CONFIG_ARM_GIC=y | ||
| 232 | CONFIG_COMMON_CLKDEV=y | ||
| 233 | |||
| 234 | # | ||
| 235 | # Bus support | ||
| 236 | # | ||
| 237 | CONFIG_ARM_AMBA=y | ||
| 238 | # CONFIG_PCI_SYSCALL is not set | ||
| 239 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 240 | # CONFIG_PCCARD is not set | ||
| 241 | |||
| 242 | # | ||
| 243 | # Kernel Features | ||
| 244 | # | ||
| 245 | # CONFIG_NO_HZ is not set | ||
| 246 | # CONFIG_HIGH_RES_TIMERS is not set | ||
| 247 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 248 | CONFIG_SMP=y | ||
| 249 | CONFIG_HAVE_ARM_SCU=y | ||
| 250 | CONFIG_HAVE_ARM_TWD=y | ||
| 251 | CONFIG_VMSPLIT_3G=y | ||
| 252 | # CONFIG_VMSPLIT_2G is not set | ||
| 253 | # CONFIG_VMSPLIT_1G is not set | ||
| 254 | CONFIG_PAGE_OFFSET=0xC0000000 | ||
| 255 | CONFIG_NR_CPUS=2 | ||
| 256 | # CONFIG_HOTPLUG_CPU is not set | ||
| 257 | CONFIG_LOCAL_TIMERS=y | ||
| 258 | # CONFIG_PREEMPT_NONE is not set | ||
| 259 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
| 260 | CONFIG_PREEMPT=y | ||
| 261 | CONFIG_HZ=100 | ||
| 262 | # CONFIG_THUMB2_KERNEL is not set | ||
| 263 | CONFIG_AEABI=y | ||
| 264 | CONFIG_OABI_COMPAT=y | ||
| 265 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | ||
| 266 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | ||
| 267 | # CONFIG_HIGHMEM is not set | ||
| 268 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 269 | CONFIG_FLATMEM_MANUAL=y | ||
| 270 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 271 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 272 | CONFIG_FLATMEM=y | ||
| 273 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 274 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 275 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
| 276 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
| 277 | CONFIG_ZONE_DMA_FLAG=0 | ||
| 278 | CONFIG_VIRT_TO_BUS=y | ||
| 279 | CONFIG_HAVE_MLOCK=y | ||
| 280 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
| 281 | # CONFIG_KSM is not set | ||
| 282 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
| 283 | CONFIG_ALIGNMENT_TRAP=y | ||
| 284 | # CONFIG_UACCESS_WITH_MEMCPY is not set | ||
| 285 | |||
| 286 | # | ||
| 287 | # Boot options | ||
| 288 | # | ||
| 289 | CONFIG_ZBOOT_ROM_TEXT=0 | ||
| 290 | CONFIG_ZBOOT_ROM_BSS=0 | ||
| 291 | CONFIG_CMDLINE="root=/dev/ram0 console=ttyAMA2,115200n8" | ||
| 292 | # CONFIG_XIP_KERNEL is not set | ||
| 293 | # CONFIG_KEXEC is not set | ||
| 294 | |||
| 295 | # | ||
| 296 | # CPU Power Management | ||
| 297 | # | ||
| 298 | # CONFIG_CPU_IDLE is not set | ||
| 299 | |||
| 300 | # | ||
| 301 | # Floating point emulation | ||
| 302 | # | ||
| 303 | |||
| 304 | # | ||
| 305 | # At least one emulation must be selected | ||
| 306 | # | ||
| 307 | # CONFIG_FPE_NWFPE is not set | ||
| 308 | # CONFIG_FPE_FASTFPE is not set | ||
| 309 | CONFIG_VFP=y | ||
| 310 | CONFIG_VFPv3=y | ||
| 311 | CONFIG_NEON=y | ||
| 312 | |||
| 313 | # | ||
| 314 | # Userspace binary formats | ||
| 315 | # | ||
| 316 | CONFIG_BINFMT_ELF=y | ||
| 317 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 318 | CONFIG_HAVE_AOUT=y | ||
| 319 | # CONFIG_BINFMT_AOUT is not set | ||
| 320 | # CONFIG_BINFMT_MISC is not set | ||
| 321 | |||
| 322 | # | ||
| 323 | # Power management options | ||
| 324 | # | ||
| 325 | # CONFIG_PM is not set | ||
| 326 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
| 327 | # CONFIG_NET is not set | ||
| 328 | |||
| 329 | # | ||
| 330 | # Device Drivers | ||
| 331 | # | ||
| 332 | |||
| 333 | # | ||
| 334 | # Generic Driver Options | ||
| 335 | # | ||
| 336 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
| 337 | # CONFIG_DEVTMPFS is not set | ||
| 338 | CONFIG_STANDALONE=y | ||
| 339 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 340 | CONFIG_FW_LOADER=y | ||
| 341 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
| 342 | CONFIG_EXTRA_FIRMWARE="" | ||
| 343 | # CONFIG_DEBUG_DRIVER is not set | ||
| 344 | # CONFIG_DEBUG_DEVRES is not set | ||
| 345 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 346 | # CONFIG_MTD is not set | ||
| 347 | # CONFIG_PARPORT is not set | ||
| 348 | CONFIG_BLK_DEV=y | ||
| 349 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 350 | # CONFIG_BLK_DEV_LOOP is not set | ||
| 351 | CONFIG_BLK_DEV_RAM=y | ||
| 352 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
| 353 | CONFIG_BLK_DEV_RAM_SIZE=65536 | ||
| 354 | # CONFIG_BLK_DEV_XIP is not set | ||
| 355 | # CONFIG_CDROM_PKTCDVD is not set | ||
| 356 | # CONFIG_MISC_DEVICES is not set | ||
| 357 | CONFIG_HAVE_IDE=y | ||
| 358 | # CONFIG_IDE is not set | ||
| 359 | |||
| 360 | # | ||
| 361 | # SCSI device support | ||
| 362 | # | ||
| 363 | # CONFIG_RAID_ATTRS is not set | ||
| 364 | # CONFIG_SCSI is not set | ||
| 365 | # CONFIG_SCSI_DMA is not set | ||
| 366 | # CONFIG_SCSI_NETLINK is not set | ||
| 367 | # CONFIG_ATA is not set | ||
| 368 | # CONFIG_MD is not set | ||
| 369 | # CONFIG_PHONE is not set | ||
| 370 | |||
| 371 | # | ||
| 372 | # Input device support | ||
| 373 | # | ||
| 374 | CONFIG_INPUT=y | ||
| 375 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 376 | # CONFIG_INPUT_POLLDEV is not set | ||
| 377 | |||
| 378 | # | ||
| 379 | # Userland interfaces | ||
| 380 | # | ||
| 381 | CONFIG_INPUT_MOUSEDEV=y | ||
| 382 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
| 383 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
| 384 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
| 385 | # CONFIG_INPUT_JOYDEV is not set | ||
| 386 | CONFIG_INPUT_EVDEV=y | ||
| 387 | # CONFIG_INPUT_EVBUG is not set | ||
| 388 | |||
| 389 | # | ||
| 390 | # Input Device Drivers | ||
| 391 | # | ||
| 392 | # CONFIG_INPUT_KEYBOARD is not set | ||
| 393 | # CONFIG_INPUT_MOUSE is not set | ||
| 394 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 395 | # CONFIG_INPUT_TABLET is not set | ||
| 396 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
| 397 | # CONFIG_INPUT_MISC is not set | ||
| 398 | |||
| 399 | # | ||
| 400 | # Hardware I/O ports | ||
| 401 | # | ||
| 402 | # CONFIG_SERIO is not set | ||
| 403 | # CONFIG_GAMEPORT is not set | ||
| 404 | |||
| 405 | # | ||
| 406 | # Character devices | ||
| 407 | # | ||
| 408 | CONFIG_VT=y | ||
| 409 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 410 | CONFIG_VT_CONSOLE=y | ||
| 411 | CONFIG_HW_CONSOLE=y | ||
| 412 | CONFIG_VT_HW_CONSOLE_BINDING=y | ||
| 413 | CONFIG_DEVKMEM=y | ||
| 414 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 415 | |||
| 416 | # | ||
| 417 | # Serial drivers | ||
| 418 | # | ||
| 419 | # CONFIG_SERIAL_8250 is not set | ||
| 420 | |||
| 421 | # | ||
| 422 | # Non-8250 serial port support | ||
| 423 | # | ||
| 424 | # CONFIG_SERIAL_AMBA_PL010 is not set | ||
| 425 | CONFIG_SERIAL_AMBA_PL011=y | ||
| 426 | CONFIG_SERIAL_AMBA_PL011_CONSOLE=y | ||
| 427 | # CONFIG_SERIAL_MAX3100 is not set | ||
| 428 | CONFIG_SERIAL_CORE=y | ||
| 429 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 430 | CONFIG_UNIX98_PTYS=y | ||
| 431 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 432 | # CONFIG_LEGACY_PTYS is not set | ||
| 433 | # CONFIG_IPMI_HANDLER is not set | ||
| 434 | # CONFIG_HW_RANDOM is not set | ||
| 435 | # CONFIG_R3964 is not set | ||
| 436 | # CONFIG_RAW_DRIVER is not set | ||
| 437 | # CONFIG_TCG_TPM is not set | ||
| 438 | # CONFIG_I2C is not set | ||
| 439 | CONFIG_SPI=y | ||
| 440 | # CONFIG_SPI_DEBUG is not set | ||
| 441 | CONFIG_SPI_MASTER=y | ||
| 442 | |||
| 443 | # | ||
| 444 | # SPI Master Controller Drivers | ||
| 445 | # | ||
| 446 | # CONFIG_SPI_BITBANG is not set | ||
| 447 | CONFIG_SPI_PL022=y | ||
| 448 | |||
| 449 | # | ||
| 450 | # SPI Protocol Masters | ||
| 451 | # | ||
| 452 | # CONFIG_SPI_SPIDEV is not set | ||
| 453 | # CONFIG_SPI_TLE62X0 is not set | ||
| 454 | |||
| 455 | # | ||
| 456 | # PPS support | ||
| 457 | # | ||
| 458 | # CONFIG_PPS is not set | ||
| 459 | # CONFIG_W1 is not set | ||
| 460 | # CONFIG_POWER_SUPPLY is not set | ||
| 461 | # CONFIG_HWMON is not set | ||
| 462 | # CONFIG_THERMAL is not set | ||
| 463 | # CONFIG_WATCHDOG is not set | ||
| 464 | CONFIG_SSB_POSSIBLE=y | ||
| 465 | |||
| 466 | # | ||
| 467 | # Sonics Silicon Backplane | ||
| 468 | # | ||
| 469 | # CONFIG_SSB is not set | ||
| 470 | |||
| 471 | # | ||
| 472 | # Multifunction device drivers | ||
| 473 | # | ||
| 474 | # CONFIG_MFD_CORE is not set | ||
| 475 | # CONFIG_MFD_SM501 is not set | ||
| 476 | # CONFIG_HTC_PASIC3 is not set | ||
| 477 | # CONFIG_MFD_TMIO is not set | ||
| 478 | # CONFIG_MFD_MC13783 is not set | ||
| 479 | # CONFIG_EZX_PCAP is not set | ||
| 480 | # CONFIG_REGULATOR is not set | ||
| 481 | # CONFIG_MEDIA_SUPPORT is not set | ||
| 482 | |||
| 483 | # | ||
| 484 | # Graphics support | ||
| 485 | # | ||
| 486 | # CONFIG_VGASTATE is not set | ||
| 487 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 488 | # CONFIG_FB is not set | ||
| 489 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 490 | |||
| 491 | # | ||
| 492 | # Display device support | ||
| 493 | # | ||
| 494 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 495 | |||
| 496 | # | ||
| 497 | # Console display driver support | ||
| 498 | # | ||
| 499 | # CONFIG_VGA_CONSOLE is not set | ||
| 500 | CONFIG_DUMMY_CONSOLE=y | ||
| 501 | # CONFIG_SOUND is not set | ||
| 502 | # CONFIG_HID_SUPPORT is not set | ||
| 503 | # CONFIG_USB_SUPPORT is not set | ||
| 504 | # CONFIG_MMC is not set | ||
| 505 | # CONFIG_MEMSTICK is not set | ||
| 506 | # CONFIG_NEW_LEDS is not set | ||
| 507 | # CONFIG_ACCESSIBILITY is not set | ||
| 508 | CONFIG_RTC_LIB=y | ||
| 509 | # CONFIG_RTC_CLASS is not set | ||
| 510 | # CONFIG_DMADEVICES is not set | ||
| 511 | # CONFIG_AUXDISPLAY is not set | ||
| 512 | # CONFIG_UIO is not set | ||
| 513 | |||
| 514 | # | ||
| 515 | # TI VLYNQ | ||
| 516 | # | ||
| 517 | # CONFIG_STAGING is not set | ||
| 518 | |||
| 519 | # | ||
| 520 | # File systems | ||
| 521 | # | ||
| 522 | CONFIG_EXT2_FS=y | ||
| 523 | CONFIG_EXT2_FS_XATTR=y | ||
| 524 | CONFIG_EXT2_FS_POSIX_ACL=y | ||
| 525 | CONFIG_EXT2_FS_SECURITY=y | ||
| 526 | # CONFIG_EXT2_FS_XIP is not set | ||
| 527 | # CONFIG_EXT3_FS is not set | ||
| 528 | # CONFIG_EXT4_FS is not set | ||
| 529 | CONFIG_FS_MBCACHE=y | ||
| 530 | # CONFIG_REISERFS_FS is not set | ||
| 531 | # CONFIG_JFS_FS is not set | ||
| 532 | CONFIG_FS_POSIX_ACL=y | ||
| 533 | # CONFIG_XFS_FS is not set | ||
| 534 | # CONFIG_BTRFS_FS is not set | ||
| 535 | # CONFIG_NILFS2_FS is not set | ||
| 536 | CONFIG_FILE_LOCKING=y | ||
| 537 | CONFIG_FSNOTIFY=y | ||
| 538 | CONFIG_DNOTIFY=y | ||
| 539 | CONFIG_INOTIFY=y | ||
| 540 | CONFIG_INOTIFY_USER=y | ||
| 541 | # CONFIG_QUOTA is not set | ||
| 542 | # CONFIG_AUTOFS_FS is not set | ||
| 543 | # CONFIG_AUTOFS4_FS is not set | ||
| 544 | # CONFIG_FUSE_FS is not set | ||
| 545 | CONFIG_GENERIC_ACL=y | ||
| 546 | |||
| 547 | # | ||
| 548 | # Caches | ||
| 549 | # | ||
| 550 | # CONFIG_FSCACHE is not set | ||
| 551 | |||
| 552 | # | ||
| 553 | # CD-ROM/DVD Filesystems | ||
| 554 | # | ||
| 555 | # CONFIG_ISO9660_FS is not set | ||
| 556 | # CONFIG_UDF_FS is not set | ||
| 557 | |||
| 558 | # | ||
| 559 | # DOS/FAT/NT Filesystems | ||
| 560 | # | ||
| 561 | # CONFIG_MSDOS_FS is not set | ||
| 562 | # CONFIG_VFAT_FS is not set | ||
| 563 | # CONFIG_NTFS_FS is not set | ||
| 564 | |||
| 565 | # | ||
| 566 | # Pseudo filesystems | ||
| 567 | # | ||
| 568 | CONFIG_PROC_FS=y | ||
| 569 | CONFIG_PROC_SYSCTL=y | ||
| 570 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 571 | CONFIG_SYSFS=y | ||
| 572 | CONFIG_TMPFS=y | ||
| 573 | CONFIG_TMPFS_POSIX_ACL=y | ||
| 574 | # CONFIG_HUGETLB_PAGE is not set | ||
| 575 | CONFIG_CONFIGFS_FS=m | ||
| 576 | # CONFIG_MISC_FILESYSTEMS is not set | ||
| 577 | |||
| 578 | # | ||
| 579 | # Partition Types | ||
| 580 | # | ||
| 581 | # CONFIG_PARTITION_ADVANCED is not set | ||
| 582 | CONFIG_MSDOS_PARTITION=y | ||
| 583 | # CONFIG_NLS is not set | ||
| 584 | |||
| 585 | # | ||
| 586 | # Kernel hacking | ||
| 587 | # | ||
| 588 | # CONFIG_PRINTK_TIME is not set | ||
| 589 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 590 | CONFIG_ENABLE_MUST_CHECK=y | ||
| 591 | CONFIG_FRAME_WARN=1024 | ||
| 592 | CONFIG_MAGIC_SYSRQ=y | ||
| 593 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 594 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 595 | # CONFIG_DEBUG_FS is not set | ||
| 596 | # CONFIG_HEADERS_CHECK is not set | ||
| 597 | CONFIG_DEBUG_KERNEL=y | ||
| 598 | # CONFIG_DEBUG_SHIRQ is not set | ||
| 599 | CONFIG_DETECT_SOFTLOCKUP=y | ||
| 600 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | ||
| 601 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | ||
| 602 | CONFIG_DETECT_HUNG_TASK=y | ||
| 603 | # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set | ||
| 604 | CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 | ||
| 605 | # CONFIG_SCHED_DEBUG is not set | ||
| 606 | # CONFIG_SCHEDSTATS is not set | ||
| 607 | # CONFIG_TIMER_STATS is not set | ||
| 608 | # CONFIG_DEBUG_OBJECTS is not set | ||
| 609 | # CONFIG_SLUB_DEBUG_ON is not set | ||
| 610 | # CONFIG_SLUB_STATS is not set | ||
| 611 | # CONFIG_DEBUG_KMEMLEAK is not set | ||
| 612 | # CONFIG_DEBUG_PREEMPT is not set | ||
| 613 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
| 614 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 615 | # CONFIG_DEBUG_SPINLOCK is not set | ||
| 616 | # CONFIG_DEBUG_MUTEXES is not set | ||
| 617 | # CONFIG_DEBUG_LOCK_ALLOC is not set | ||
| 618 | # CONFIG_PROVE_LOCKING is not set | ||
| 619 | # CONFIG_LOCK_STAT is not set | ||
| 620 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
| 621 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
| 622 | # CONFIG_DEBUG_KOBJECT is not set | ||
| 623 | CONFIG_DEBUG_BUGVERBOSE=y | ||
| 624 | CONFIG_DEBUG_INFO=y | ||
| 625 | # CONFIG_DEBUG_VM is not set | ||
| 626 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
| 627 | CONFIG_DEBUG_MEMORY_INIT=y | ||
| 628 | # CONFIG_DEBUG_LIST is not set | ||
| 629 | # CONFIG_DEBUG_SG is not set | ||
| 630 | # CONFIG_DEBUG_NOTIFIERS is not set | ||
| 631 | # CONFIG_DEBUG_CREDENTIALS is not set | ||
| 632 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
| 633 | # CONFIG_RCU_TORTURE_TEST is not set | ||
| 634 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 635 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
| 636 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
| 637 | # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set | ||
| 638 | # CONFIG_FAULT_INJECTION is not set | ||
| 639 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
| 640 | # CONFIG_PAGE_POISONING is not set | ||
| 641 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 642 | CONFIG_TRACING_SUPPORT=y | ||
| 643 | # CONFIG_FTRACE is not set | ||
| 644 | # CONFIG_SAMPLES is not set | ||
| 645 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 646 | # CONFIG_KGDB is not set | ||
| 647 | CONFIG_ARM_UNWIND=y | ||
| 648 | CONFIG_DEBUG_USER=y | ||
| 649 | CONFIG_DEBUG_ERRORS=y | ||
| 650 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
| 651 | # CONFIG_DEBUG_LL is not set | ||
| 652 | |||
| 653 | # | ||
| 654 | # Security options | ||
| 655 | # | ||
| 656 | # CONFIG_KEYS is not set | ||
| 657 | # CONFIG_SECURITY is not set | ||
| 658 | # CONFIG_SECURITYFS is not set | ||
| 659 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
| 660 | # CONFIG_CRYPTO is not set | ||
| 661 | # CONFIG_BINARY_PRINTF is not set | ||
| 662 | |||
| 663 | # | ||
| 664 | # Library routines | ||
| 665 | # | ||
| 666 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
| 667 | # CONFIG_CRC_CCITT is not set | ||
| 668 | # CONFIG_CRC16 is not set | ||
| 669 | CONFIG_CRC_T10DIF=m | ||
| 670 | # CONFIG_CRC_ITU_T is not set | ||
| 671 | # CONFIG_CRC32 is not set | ||
| 672 | # CONFIG_CRC7 is not set | ||
| 673 | # CONFIG_LIBCRC32C is not set | ||
| 674 | CONFIG_ZLIB_INFLATE=y | ||
| 675 | CONFIG_DECOMPRESS_GZIP=y | ||
| 676 | CONFIG_DECOMPRESS_BZIP2=y | ||
| 677 | CONFIG_DECOMPRESS_LZMA=y | ||
| 678 | CONFIG_HAS_IOMEM=y | ||
| 679 | CONFIG_HAS_IOPORT=y | ||
| 680 | CONFIG_HAS_DMA=y | ||
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h index 3d0cdd21b88..73eceb87e58 100644 --- a/arch/arm/include/asm/cacheflush.h +++ b/arch/arm/include/asm/cacheflush.h | |||
| @@ -331,15 +331,15 @@ static inline void outer_flush_range(unsigned long start, unsigned long end) | |||
| 331 | * Convert calls to our calling convention. | 331 | * Convert calls to our calling convention. |
| 332 | */ | 332 | */ |
| 333 | #define flush_cache_all() __cpuc_flush_kern_all() | 333 | #define flush_cache_all() __cpuc_flush_kern_all() |
| 334 | #ifndef CONFIG_CPU_CACHE_VIPT | 334 | |
| 335 | static inline void flush_cache_mm(struct mm_struct *mm) | 335 | static inline void vivt_flush_cache_mm(struct mm_struct *mm) |
| 336 | { | 336 | { |
| 337 | if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(mm))) | 337 | if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(mm))) |
| 338 | __cpuc_flush_user_all(); | 338 | __cpuc_flush_user_all(); |
| 339 | } | 339 | } |
| 340 | 340 | ||
| 341 | static inline void | 341 | static inline void |
| 342 | flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end) | 342 | vivt_flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end) |
| 343 | { | 343 | { |
| 344 | if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) | 344 | if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) |
| 345 | __cpuc_flush_user_range(start & PAGE_MASK, PAGE_ALIGN(end), | 345 | __cpuc_flush_user_range(start & PAGE_MASK, PAGE_ALIGN(end), |
| @@ -347,7 +347,7 @@ flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long | |||
| 347 | } | 347 | } |
| 348 | 348 | ||
| 349 | static inline void | 349 | static inline void |
| 350 | flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn) | 350 | vivt_flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn) |
| 351 | { | 351 | { |
| 352 | if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) { | 352 | if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) { |
| 353 | unsigned long addr = user_addr & PAGE_MASK; | 353 | unsigned long addr = user_addr & PAGE_MASK; |
| @@ -356,7 +356,7 @@ flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned l | |||
| 356 | } | 356 | } |
| 357 | 357 | ||
| 358 | static inline void | 358 | static inline void |
| 359 | flush_ptrace_access(struct vm_area_struct *vma, struct page *page, | 359 | vivt_flush_ptrace_access(struct vm_area_struct *vma, struct page *page, |
| 360 | unsigned long uaddr, void *kaddr, | 360 | unsigned long uaddr, void *kaddr, |
| 361 | unsigned long len, int write) | 361 | unsigned long len, int write) |
| 362 | { | 362 | { |
| @@ -365,6 +365,16 @@ flush_ptrace_access(struct vm_area_struct *vma, struct page *page, | |||
| 365 | __cpuc_coherent_kern_range(addr, addr + len); | 365 | __cpuc_coherent_kern_range(addr, addr + len); |
| 366 | } | 366 | } |
| 367 | } | 367 | } |
| 368 | |||
| 369 | #ifndef CONFIG_CPU_CACHE_VIPT | ||
| 370 | #define flush_cache_mm(mm) \ | ||
| 371 | vivt_flush_cache_mm(mm) | ||
| 372 | #define flush_cache_range(vma,start,end) \ | ||
| 373 | vivt_flush_cache_range(vma,start,end) | ||
| 374 | #define flush_cache_page(vma,addr,pfn) \ | ||
| 375 | vivt_flush_cache_page(vma,addr,pfn) | ||
| 376 | #define flush_ptrace_access(vma,page,ua,ka,len,write) \ | ||
| 377 | vivt_flush_ptrace_access(vma,page,ua,ka,len,write) | ||
| 368 | #else | 378 | #else |
| 369 | extern void flush_cache_mm(struct mm_struct *mm); | 379 | extern void flush_cache_mm(struct mm_struct *mm); |
| 370 | extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end); | 380 | extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end); |
| @@ -408,10 +418,9 @@ extern void flush_ptrace_access(struct vm_area_struct *vma, struct page *page, | |||
| 408 | * about to change to user space. This is the same method as used on SPARC64. | 418 | * about to change to user space. This is the same method as used on SPARC64. |
| 409 | * See update_mmu_cache for the user space part. | 419 | * See update_mmu_cache for the user space part. |
| 410 | */ | 420 | */ |
| 421 | #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1 | ||
| 411 | extern void flush_dcache_page(struct page *); | 422 | extern void flush_dcache_page(struct page *); |
| 412 | 423 | ||
| 413 | extern void __flush_dcache_page(struct address_space *mapping, struct page *page); | ||
| 414 | |||
| 415 | static inline void __flush_icache_all(void) | 424 | static inline void __flush_icache_all(void) |
| 416 | { | 425 | { |
| 417 | #ifdef CONFIG_ARM_ERRATA_411920 | 426 | #ifdef CONFIG_ARM_ERRATA_411920 |
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h index ff46dfa68a9..a96300bf83f 100644 --- a/arch/arm/include/asm/dma-mapping.h +++ b/arch/arm/include/asm/dma-mapping.h | |||
| @@ -15,20 +15,15 @@ | |||
| 15 | * must not be used by drivers. | 15 | * must not be used by drivers. |
| 16 | */ | 16 | */ |
| 17 | #ifndef __arch_page_to_dma | 17 | #ifndef __arch_page_to_dma |
| 18 | |||
| 19 | #if !defined(CONFIG_HIGHMEM) | ||
| 20 | static inline dma_addr_t page_to_dma(struct device *dev, struct page *page) | 18 | static inline dma_addr_t page_to_dma(struct device *dev, struct page *page) |
| 21 | { | 19 | { |
| 22 | return (dma_addr_t)__virt_to_bus((unsigned long)page_address(page)); | 20 | return (dma_addr_t)__pfn_to_bus(page_to_pfn(page)); |
| 23 | } | 21 | } |
| 24 | #elif defined(__pfn_to_bus) | 22 | |
| 25 | static inline dma_addr_t page_to_dma(struct device *dev, struct page *page) | 23 | static inline struct page *dma_to_page(struct device *dev, dma_addr_t addr) |
| 26 | { | 24 | { |
| 27 | return (dma_addr_t)__pfn_to_bus(page_to_pfn(page)); | 25 | return pfn_to_page(__bus_to_pfn(addr)); |
| 28 | } | 26 | } |
| 29 | #else | ||
| 30 | #error "this machine class needs to define __arch_page_to_dma to use HIGHMEM" | ||
| 31 | #endif | ||
| 32 | 27 | ||
| 33 | static inline void *dma_to_virt(struct device *dev, dma_addr_t addr) | 28 | static inline void *dma_to_virt(struct device *dev, dma_addr_t addr) |
| 34 | { | 29 | { |
| @@ -45,6 +40,11 @@ static inline dma_addr_t page_to_dma(struct device *dev, struct page *page) | |||
| 45 | return __arch_page_to_dma(dev, page); | 40 | return __arch_page_to_dma(dev, page); |
| 46 | } | 41 | } |
| 47 | 42 | ||
| 43 | static inline struct page *dma_to_page(struct device *dev, dma_addr_t addr) | ||
| 44 | { | ||
| 45 | return __arch_dma_to_page(dev, addr); | ||
| 46 | } | ||
| 47 | |||
| 48 | static inline void *dma_to_virt(struct device *dev, dma_addr_t addr) | 48 | static inline void *dma_to_virt(struct device *dev, dma_addr_t addr) |
| 49 | { | 49 | { |
| 50 | return __arch_dma_to_virt(dev, addr); | 50 | return __arch_dma_to_virt(dev, addr); |
| @@ -257,9 +257,11 @@ extern int dma_needs_bounce(struct device*, dma_addr_t, size_t); | |||
| 257 | */ | 257 | */ |
| 258 | extern dma_addr_t dma_map_single(struct device *, void *, size_t, | 258 | extern dma_addr_t dma_map_single(struct device *, void *, size_t, |
| 259 | enum dma_data_direction); | 259 | enum dma_data_direction); |
| 260 | extern void dma_unmap_single(struct device *, dma_addr_t, size_t, | ||
| 261 | enum dma_data_direction); | ||
| 260 | extern dma_addr_t dma_map_page(struct device *, struct page *, | 262 | extern dma_addr_t dma_map_page(struct device *, struct page *, |
| 261 | unsigned long, size_t, enum dma_data_direction); | 263 | unsigned long, size_t, enum dma_data_direction); |
| 262 | extern void dma_unmap_single(struct device *, dma_addr_t, size_t, | 264 | extern void dma_unmap_page(struct device *, dma_addr_t, size_t, |
| 263 | enum dma_data_direction); | 265 | enum dma_data_direction); |
| 264 | 266 | ||
| 265 | /* | 267 | /* |
| @@ -352,7 +354,6 @@ static inline void dma_unmap_single(struct device *dev, dma_addr_t handle, | |||
| 352 | { | 354 | { |
| 353 | /* nothing to do */ | 355 | /* nothing to do */ |
| 354 | } | 356 | } |
| 355 | #endif /* CONFIG_DMABOUNCE */ | ||
| 356 | 357 | ||
| 357 | /** | 358 | /** |
| 358 | * dma_unmap_page - unmap a buffer previously mapped through dma_map_page() | 359 | * dma_unmap_page - unmap a buffer previously mapped through dma_map_page() |
| @@ -371,8 +372,9 @@ static inline void dma_unmap_single(struct device *dev, dma_addr_t handle, | |||
| 371 | static inline void dma_unmap_page(struct device *dev, dma_addr_t handle, | 372 | static inline void dma_unmap_page(struct device *dev, dma_addr_t handle, |
| 372 | size_t size, enum dma_data_direction dir) | 373 | size_t size, enum dma_data_direction dir) |
| 373 | { | 374 | { |
| 374 | dma_unmap_single(dev, handle, size, dir); | 375 | /* nothing to do */ |
| 375 | } | 376 | } |
| 377 | #endif /* CONFIG_DMABOUNCE */ | ||
| 376 | 378 | ||
| 377 | /** | 379 | /** |
| 378 | * dma_sync_single_range_for_cpu | 380 | * dma_sync_single_range_for_cpu |
diff --git a/arch/arm/include/asm/hardware/cache-tauros2.h b/arch/arm/include/asm/hardware/cache-tauros2.h new file mode 100644 index 00000000000..538f17ca905 --- /dev/null +++ b/arch/arm/include/asm/hardware/cache-tauros2.h | |||
| @@ -0,0 +1,11 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/include/asm/hardware/cache-tauros2.h | ||
| 3 | * | ||
| 4 | * Copyright (C) 2008 Marvell Semiconductor | ||
| 5 | * | ||
| 6 | * This file is licensed under the terms of the GNU General Public | ||
| 7 | * License version 2. This program is licensed "as is" without any | ||
| 8 | * warranty of any kind, whether express or implied. | ||
| 9 | */ | ||
| 10 | |||
| 11 | extern void __init tauros2_init(void); | ||
diff --git a/arch/arm/include/asm/hardware/coresight.h b/arch/arm/include/asm/hardware/coresight.h new file mode 100644 index 00000000000..f82b25d4f73 --- /dev/null +++ b/arch/arm/include/asm/hardware/coresight.h | |||
| @@ -0,0 +1,165 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/include/asm/hardware/coresight.h | ||
| 3 | * | ||
| 4 | * CoreSight components' registers | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Nokia Corporation. | ||
| 7 | * Alexander Shishkin | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License version 2 as | ||
| 11 | * published by the Free Software Foundation. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #ifndef __ASM_HARDWARE_CORESIGHT_H | ||
| 15 | #define __ASM_HARDWARE_CORESIGHT_H | ||
| 16 | |||
| 17 | #define TRACER_ACCESSED_BIT 0 | ||
| 18 | #define TRACER_RUNNING_BIT 1 | ||
| 19 | #define TRACER_CYCLE_ACC_BIT 2 | ||
| 20 | #define TRACER_ACCESSED BIT(TRACER_ACCESSED_BIT) | ||
| 21 | #define TRACER_RUNNING BIT(TRACER_RUNNING_BIT) | ||
| 22 | #define TRACER_CYCLE_ACC BIT(TRACER_CYCLE_ACC_BIT) | ||
| 23 | |||
| 24 | struct tracectx { | ||
| 25 | unsigned int etb_bufsz; | ||
| 26 | void __iomem *etb_regs; | ||
| 27 | void __iomem *etm_regs; | ||
| 28 | unsigned long flags; | ||
| 29 | int ncmppairs; | ||
| 30 | int etm_portsz; | ||
| 31 | struct device *dev; | ||
| 32 | struct clk *emu_clk; | ||
| 33 | struct mutex mutex; | ||
| 34 | }; | ||
| 35 | |||
| 36 | #define TRACER_TIMEOUT 10000 | ||
| 37 | |||
| 38 | #define etm_writel(t, v, x) \ | ||
| 39 | (__raw_writel((v), (t)->etm_regs + (x))) | ||
| 40 | #define etm_readl(t, x) (__raw_readl((t)->etm_regs + (x))) | ||
| 41 | |||
| 42 | /* CoreSight Management Registers */ | ||
| 43 | #define CSMR_LOCKACCESS 0xfb0 | ||
| 44 | #define CSMR_LOCKSTATUS 0xfb4 | ||
| 45 | #define CSMR_AUTHSTATUS 0xfb8 | ||
| 46 | #define CSMR_DEVID 0xfc8 | ||
| 47 | #define CSMR_DEVTYPE 0xfcc | ||
| 48 | /* CoreSight Component Registers */ | ||
| 49 | #define CSCR_CLASS 0xff4 | ||
| 50 | |||
| 51 | #define CSCR_PRSR 0x314 | ||
| 52 | |||
| 53 | #define UNLOCK_MAGIC 0xc5acce55 | ||
| 54 | |||
| 55 | /* ETM control register, "ETM Architecture", 3.3.1 */ | ||
| 56 | #define ETMR_CTRL 0 | ||
| 57 | #define ETMCTRL_POWERDOWN 1 | ||
| 58 | #define ETMCTRL_PROGRAM (1 << 10) | ||
| 59 | #define ETMCTRL_PORTSEL (1 << 11) | ||
| 60 | #define ETMCTRL_DO_CONTEXTID (3 << 14) | ||
| 61 | #define ETMCTRL_PORTMASK1 (7 << 4) | ||
| 62 | #define ETMCTRL_PORTMASK2 (1 << 21) | ||
| 63 | #define ETMCTRL_PORTMASK (ETMCTRL_PORTMASK1 | ETMCTRL_PORTMASK2) | ||
| 64 | #define ETMCTRL_PORTSIZE(x) ((((x) & 7) << 4) | (!!((x) & 8)) << 21) | ||
| 65 | #define ETMCTRL_DO_CPRT (1 << 1) | ||
| 66 | #define ETMCTRL_DATAMASK (3 << 2) | ||
| 67 | #define ETMCTRL_DATA_DO_DATA (1 << 2) | ||
| 68 | #define ETMCTRL_DATA_DO_ADDR (1 << 3) | ||
| 69 | #define ETMCTRL_DATA_DO_BOTH (ETMCTRL_DATA_DO_DATA | ETMCTRL_DATA_DO_ADDR) | ||
| 70 | #define ETMCTRL_BRANCH_OUTPUT (1 << 8) | ||
| 71 | #define ETMCTRL_CYCLEACCURATE (1 << 12) | ||
| 72 | |||
| 73 | /* ETM configuration code register */ | ||
| 74 | #define ETMR_CONFCODE (0x04) | ||
| 75 | |||
| 76 | /* ETM trace start/stop resource control register */ | ||
| 77 | #define ETMR_TRACESSCTRL (0x18) | ||
| 78 | |||
| 79 | /* ETM trigger event register */ | ||
| 80 | #define ETMR_TRIGEVT (0x08) | ||
| 81 | |||
| 82 | /* address access type register bits, "ETM architecture", | ||
| 83 | * table 3-27 */ | ||
| 84 | /* - access type */ | ||
| 85 | #define ETMAAT_IFETCH 0 | ||
| 86 | #define ETMAAT_IEXEC 1 | ||
| 87 | #define ETMAAT_IEXECPASS 2 | ||
| 88 | #define ETMAAT_IEXECFAIL 3 | ||
| 89 | #define ETMAAT_DLOADSTORE 4 | ||
| 90 | #define ETMAAT_DLOAD 5 | ||
| 91 | #define ETMAAT_DSTORE 6 | ||
| 92 | /* - comparison access size */ | ||
| 93 | #define ETMAAT_JAVA (0 << 3) | ||
| 94 | #define ETMAAT_THUMB (1 << 3) | ||
| 95 | #define ETMAAT_ARM (3 << 3) | ||
| 96 | /* - data value comparison control */ | ||
| 97 | #define ETMAAT_NOVALCMP (0 << 5) | ||
| 98 | #define ETMAAT_VALMATCH (1 << 5) | ||
| 99 | #define ETMAAT_VALNOMATCH (3 << 5) | ||
| 100 | /* - exact match */ | ||
| 101 | #define ETMAAT_EXACTMATCH (1 << 7) | ||
| 102 | /* - context id comparator control */ | ||
| 103 | #define ETMAAT_IGNCONTEXTID (0 << 8) | ||
| 104 | #define ETMAAT_VALUE1 (1 << 8) | ||
| 105 | #define ETMAAT_VALUE2 (2 << 8) | ||
| 106 | #define ETMAAT_VALUE3 (3 << 8) | ||
| 107 | /* - security level control */ | ||
| 108 | #define ETMAAT_IGNSECURITY (0 << 10) | ||
| 109 | #define ETMAAT_NSONLY (1 << 10) | ||
| 110 | #define ETMAAT_SONLY (2 << 10) | ||
| 111 | |||
| 112 | #define ETMR_COMP_VAL(x) (0x40 + (x) * 4) | ||
| 113 | #define ETMR_COMP_ACC_TYPE(x) (0x80 + (x) * 4) | ||
| 114 | |||
| 115 | /* ETM status register, "ETM Architecture", 3.3.2 */ | ||
| 116 | #define ETMR_STATUS (0x10) | ||
| 117 | #define ETMST_OVERFLOW (1 << 0) | ||
| 118 | #define ETMST_PROGBIT (1 << 1) | ||
| 119 | #define ETMST_STARTSTOP (1 << 2) | ||
| 120 | #define ETMST_TRIGGER (1 << 3) | ||
| 121 | |||
| 122 | #define etm_progbit(t) (etm_readl((t), ETMR_STATUS) & ETMST_PROGBIT) | ||
| 123 | #define etm_started(t) (etm_readl((t), ETMR_STATUS) & ETMST_STARTSTOP) | ||
| 124 | #define etm_triggered(t) (etm_readl((t), ETMR_STATUS) & ETMST_TRIGGER) | ||
| 125 | |||
| 126 | #define ETMR_TRACEENCTRL2 0x1c | ||
| 127 | #define ETMR_TRACEENCTRL 0x24 | ||
| 128 | #define ETMTE_INCLEXCL (1 << 24) | ||
| 129 | #define ETMR_TRACEENEVT 0x20 | ||
| 130 | #define ETMCTRL_OPTS (ETMCTRL_DO_CPRT | \ | ||
| 131 | ETMCTRL_DATA_DO_ADDR | \ | ||
| 132 | ETMCTRL_BRANCH_OUTPUT | \ | ||
| 133 | ETMCTRL_DO_CONTEXTID) | ||
| 134 | |||
| 135 | /* ETB registers, "CoreSight Components TRM", 9.3 */ | ||
| 136 | #define ETBR_DEPTH 0x04 | ||
| 137 | #define ETBR_STATUS 0x0c | ||
| 138 | #define ETBR_READMEM 0x10 | ||
| 139 | #define ETBR_READADDR 0x14 | ||
| 140 | #define ETBR_WRITEADDR 0x18 | ||
| 141 | #define ETBR_TRIGGERCOUNT 0x1c | ||
| 142 | #define ETBR_CTRL 0x20 | ||
| 143 | #define ETBR_FORMATTERCTRL 0x304 | ||
| 144 | #define ETBFF_ENFTC 1 | ||
| 145 | #define ETBFF_ENFCONT (1 << 1) | ||
| 146 | #define ETBFF_FONFLIN (1 << 4) | ||
| 147 | #define ETBFF_MANUAL_FLUSH (1 << 6) | ||
| 148 | #define ETBFF_TRIGIN (1 << 8) | ||
| 149 | #define ETBFF_TRIGEVT (1 << 9) | ||
| 150 | #define ETBFF_TRIGFL (1 << 10) | ||
| 151 | |||
| 152 | #define etb_writel(t, v, x) \ | ||
| 153 | (__raw_writel((v), (t)->etb_regs + (x))) | ||
| 154 | #define etb_readl(t, x) (__raw_readl((t)->etb_regs + (x))) | ||
| 155 | |||
| 156 | #define etm_lock(t) do { etm_writel((t), 0, CSMR_LOCKACCESS); } while (0) | ||
| 157 | #define etm_unlock(t) \ | ||
| 158 | do { etm_writel((t), UNLOCK_MAGIC, CSMR_LOCKACCESS); } while (0) | ||
| 159 | |||
| 160 | #define etb_lock(t) do { etb_writel((t), 0, CSMR_LOCKACCESS); } while (0) | ||
| 161 | #define etb_unlock(t) \ | ||
| 162 | do { etb_writel((t), UNLOCK_MAGIC, CSMR_LOCKACCESS); } while (0) | ||
| 163 | |||
| 164 | #endif /* __ASM_HARDWARE_CORESIGHT_H */ | ||
| 165 | |||
diff --git a/arch/arm/include/asm/hardware/iop3xx.h b/arch/arm/include/asm/hardware/iop3xx.h index 8d60ad267e3..5daea2961d4 100644 --- a/arch/arm/include/asm/hardware/iop3xx.h +++ b/arch/arm/include/asm/hardware/iop3xx.h | |||
| @@ -234,7 +234,13 @@ extern int iop3xx_get_init_atu(void); | |||
| 234 | void iop3xx_map_io(void); | 234 | void iop3xx_map_io(void); |
| 235 | void iop_init_cp6_handler(void); | 235 | void iop_init_cp6_handler(void); |
| 236 | void iop_init_time(unsigned long tickrate); | 236 | void iop_init_time(unsigned long tickrate); |
| 237 | unsigned long iop_gettimeoffset(void); | 237 | |
| 238 | static inline u32 read_tmr0(void) | ||
| 239 | { | ||
| 240 | u32 val; | ||
| 241 | asm volatile("mrc p6, 0, %0, c0, c1, 0" : "=r" (val)); | ||
| 242 | return val; | ||
| 243 | } | ||
| 238 | 244 | ||
| 239 | static inline void write_tmr0(u32 val) | 245 | static inline void write_tmr0(u32 val) |
| 240 | { | 246 | { |
| @@ -253,6 +259,11 @@ static inline u32 read_tcr0(void) | |||
| 253 | return val; | 259 | return val; |
| 254 | } | 260 | } |
| 255 | 261 | ||
| 262 | static inline void write_tcr0(u32 val) | ||
| 263 | { | ||
| 264 | asm volatile("mcr p6, 0, %0, c2, c1, 0" : : "r" (val)); | ||
| 265 | } | ||
| 266 | |||
| 256 | static inline u32 read_tcr1(void) | 267 | static inline u32 read_tcr1(void) |
| 257 | { | 268 | { |
| 258 | u32 val; | 269 | u32 val; |
| @@ -260,6 +271,11 @@ static inline u32 read_tcr1(void) | |||
| 260 | return val; | 271 | return val; |
| 261 | } | 272 | } |
| 262 | 273 | ||
| 274 | static inline void write_tcr1(u32 val) | ||
| 275 | { | ||
| 276 | asm volatile("mcr p6, 0, %0, c3, c1, 0" : : "r" (val)); | ||
| 277 | } | ||
| 278 | |||
| 263 | static inline void write_trr0(u32 val) | 279 | static inline void write_trr0(u32 val) |
| 264 | { | 280 | { |
| 265 | asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (val)); | 281 | asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (val)); |
diff --git a/arch/arm/include/asm/kmap_types.h b/arch/arm/include/asm/kmap_types.h index d16ec97ec9a..c019949a518 100644 --- a/arch/arm/include/asm/kmap_types.h +++ b/arch/arm/include/asm/kmap_types.h | |||
| @@ -22,4 +22,10 @@ enum km_type { | |||
| 22 | KM_TYPE_NR | 22 | KM_TYPE_NR |
| 23 | }; | 23 | }; |
| 24 | 24 | ||
| 25 | #ifdef CONFIG_DEBUG_HIGHMEM | ||
| 26 | #define KM_NMI (-1) | ||
| 27 | #define KM_NMI_PTE (-1) | ||
| 28 | #define KM_IRQ_PTE (-1) | ||
| 29 | #endif | ||
| 30 | |||
| 25 | #endif | 31 | #endif |
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h index cefedf06213..5421d82a257 100644 --- a/arch/arm/include/asm/memory.h +++ b/arch/arm/include/asm/memory.h | |||
| @@ -125,8 +125,10 @@ | |||
| 125 | * private definitions which should NOT be used outside memory.h | 125 | * private definitions which should NOT be used outside memory.h |
| 126 | * files. Use virt_to_phys/phys_to_virt/__pa/__va instead. | 126 | * files. Use virt_to_phys/phys_to_virt/__pa/__va instead. |
| 127 | */ | 127 | */ |
| 128 | #ifndef __virt_to_phys | ||
| 128 | #define __virt_to_phys(x) ((x) - PAGE_OFFSET + PHYS_OFFSET) | 129 | #define __virt_to_phys(x) ((x) - PAGE_OFFSET + PHYS_OFFSET) |
| 129 | #define __phys_to_virt(x) ((x) - PHYS_OFFSET + PAGE_OFFSET) | 130 | #define __phys_to_virt(x) ((x) - PHYS_OFFSET + PAGE_OFFSET) |
| 131 | #endif | ||
| 130 | 132 | ||
| 131 | /* | 133 | /* |
| 132 | * Convert a physical address to a Page Frame Number and back | 134 | * Convert a physical address to a Page Frame Number and back |
| @@ -134,6 +136,12 @@ | |||
| 134 | #define __phys_to_pfn(paddr) ((paddr) >> PAGE_SHIFT) | 136 | #define __phys_to_pfn(paddr) ((paddr) >> PAGE_SHIFT) |
| 135 | #define __pfn_to_phys(pfn) ((pfn) << PAGE_SHIFT) | 137 | #define __pfn_to_phys(pfn) ((pfn) << PAGE_SHIFT) |
| 136 | 138 | ||
| 139 | /* | ||
| 140 | * Convert a page to/from a physical address | ||
| 141 | */ | ||
| 142 | #define page_to_phys(page) (__pfn_to_phys(page_to_pfn(page))) | ||
| 143 | #define phys_to_page(phys) (pfn_to_page(__phys_to_pfn(phys))) | ||
| 144 | |||
| 137 | #ifndef __ASSEMBLY__ | 145 | #ifndef __ASSEMBLY__ |
| 138 | 146 | ||
| 139 | /* | 147 | /* |
| @@ -194,7 +202,8 @@ static inline void *phys_to_virt(unsigned long x) | |||
| 194 | #ifndef __virt_to_bus | 202 | #ifndef __virt_to_bus |
| 195 | #define __virt_to_bus __virt_to_phys | 203 | #define __virt_to_bus __virt_to_phys |
| 196 | #define __bus_to_virt __phys_to_virt | 204 | #define __bus_to_virt __phys_to_virt |
| 197 | #define __pfn_to_bus(x) ((x) << PAGE_SHIFT) | 205 | #define __pfn_to_bus(x) __pfn_to_phys(x) |
| 206 | #define __bus_to_pfn(x) __phys_to_pfn(x) | ||
| 198 | #endif | 207 | #endif |
| 199 | 208 | ||
| 200 | static inline __deprecated unsigned long virt_to_bus(void *x) | 209 | static inline __deprecated unsigned long virt_to_bus(void *x) |
| @@ -293,11 +302,6 @@ static inline __deprecated void *bus_to_virt(unsigned long x) | |||
| 293 | #endif /* !CONFIG_DISCONTIGMEM */ | 302 | #endif /* !CONFIG_DISCONTIGMEM */ |
| 294 | 303 | ||
| 295 | /* | 304 | /* |
| 296 | * For BIO. "will die". Kill me when bio_to_phys() and bvec_to_phys() die. | ||
| 297 | */ | ||
| 298 | #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) | ||
| 299 | |||
| 300 | /* | ||
| 301 | * Optional coherency support. Currently used only by selected | 305 | * Optional coherency support. Currently used only by selected |
| 302 | * Intel XSC3-based systems. | 306 | * Intel XSC3-based systems. |
| 303 | */ | 307 | */ |
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h index 201ccaa11f6..11397687f42 100644 --- a/arch/arm/include/asm/pgtable.h +++ b/arch/arm/include/asm/pgtable.h | |||
| @@ -304,13 +304,23 @@ PTE_BIT_FUNC(mkyoung, |= L_PTE_YOUNG); | |||
| 304 | 304 | ||
| 305 | static inline pte_t pte_mkspecial(pte_t pte) { return pte; } | 305 | static inline pte_t pte_mkspecial(pte_t pte) { return pte; } |
| 306 | 306 | ||
| 307 | #define __pgprot_modify(prot,mask,bits) \ | ||
| 308 | __pgprot((pgprot_val(prot) & ~(mask)) | (bits)) | ||
| 309 | |||
| 307 | /* | 310 | /* |
| 308 | * Mark the prot value as uncacheable and unbufferable. | 311 | * Mark the prot value as uncacheable and unbufferable. |
| 309 | */ | 312 | */ |
| 310 | #define pgprot_noncached(prot) \ | 313 | #define pgprot_noncached(prot) \ |
| 311 | __pgprot((pgprot_val(prot) & ~L_PTE_MT_MASK) | L_PTE_MT_UNCACHED) | 314 | __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED) |
| 312 | #define pgprot_writecombine(prot) \ | 315 | #define pgprot_writecombine(prot) \ |
| 313 | __pgprot((pgprot_val(prot) & ~L_PTE_MT_MASK) | L_PTE_MT_BUFFERABLE) | 316 | __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE) |
| 317 | #if __LINUX_ARM_ARCH__ >= 7 | ||
| 318 | #define pgprot_dmacoherent(prot) \ | ||
| 319 | __pgprot_modify(prot, L_PTE_MT_MASK|L_PTE_EXEC, L_PTE_MT_BUFFERABLE) | ||
| 320 | #else | ||
| 321 | #define pgprot_dmacoherent(prot) \ | ||
| 322 | __pgprot_modify(prot, L_PTE_MT_MASK|L_PTE_EXEC, L_PTE_MT_UNCACHED) | ||
| 323 | #endif | ||
| 314 | 324 | ||
| 315 | #define pmd_none(pmd) (!pmd_val(pmd)) | 325 | #define pmd_none(pmd) (!pmd_val(pmd)) |
| 316 | #define pmd_present(pmd) (pmd_val(pmd)) | 326 | #define pmd_present(pmd) (pmd_val(pmd)) |
diff --git a/arch/arm/include/asm/socket.h b/arch/arm/include/asm/socket.h index 92ac61d294f..90ffd04b8e7 100644 --- a/arch/arm/include/asm/socket.h +++ b/arch/arm/include/asm/socket.h | |||
| @@ -60,4 +60,6 @@ | |||
| 60 | #define SO_PROTOCOL 38 | 60 | #define SO_PROTOCOL 38 |
| 61 | #define SO_DOMAIN 39 | 61 | #define SO_DOMAIN 39 |
| 62 | 62 | ||
| 63 | #define SO_RXQ_OVFL 40 | ||
| 64 | |||
| 63 | #endif /* _ASM_SOCKET_H */ | 65 | #endif /* _ASM_SOCKET_H */ |
diff --git a/arch/arm/include/asm/swab.h b/arch/arm/include/asm/swab.h index ca2bf2f6d6e..9997ad20eff 100644 --- a/arch/arm/include/asm/swab.h +++ b/arch/arm/include/asm/swab.h | |||
| @@ -22,6 +22,24 @@ | |||
| 22 | # define __SWAB_64_THRU_32__ | 22 | # define __SWAB_64_THRU_32__ |
| 23 | #endif | 23 | #endif |
| 24 | 24 | ||
| 25 | #if defined(__KERNEL__) && __LINUX_ARM_ARCH__ >= 6 | ||
| 26 | |||
| 27 | static inline __attribute_const__ __u16 __arch_swab16(__u16 x) | ||
| 28 | { | ||
| 29 | __asm__ ("rev16 %0, %1" : "=r" (x) : "r" (x)); | ||
| 30 | return x; | ||
| 31 | } | ||
| 32 | #define __arch_swab16 __arch_swab16 | ||
| 33 | |||
| 34 | static inline __attribute_const__ __u32 __arch_swab32(__u32 x) | ||
| 35 | { | ||
| 36 | __asm__ ("rev %0, %1" : "=r" (x) : "r" (x)); | ||
| 37 | return x; | ||
| 38 | } | ||
| 39 | #define __arch_swab32 __arch_swab32 | ||
| 40 | |||
| 41 | #else | ||
| 42 | |||
| 25 | static inline __attribute_const__ __u32 __arch_swab32(__u32 x) | 43 | static inline __attribute_const__ __u32 __arch_swab32(__u32 x) |
| 26 | { | 44 | { |
| 27 | __u32 t; | 45 | __u32 t; |
| @@ -48,3 +66,4 @@ static inline __attribute_const__ __u32 __arch_swab32(__u32 x) | |||
| 48 | 66 | ||
| 49 | #endif | 67 | #endif |
| 50 | 68 | ||
| 69 | #endif | ||
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index d65b2f5bf41..058e7e90881 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h | |||
| @@ -138,21 +138,26 @@ extern unsigned int user_debug; | |||
| 138 | #define dmb() __asm__ __volatile__ ("" : : : "memory") | 138 | #define dmb() __asm__ __volatile__ ("" : : : "memory") |
| 139 | #endif | 139 | #endif |
| 140 | 140 | ||
| 141 | #ifndef CONFIG_SMP | 141 | #if __LINUX_ARM_ARCH__ >= 7 || defined(CONFIG_SMP) |
| 142 | #define mb() dmb() | ||
| 143 | #define rmb() dmb() | ||
| 144 | #define wmb() dmb() | ||
| 145 | #else | ||
| 142 | #define mb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) | 146 | #define mb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) |
| 143 | #define rmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) | 147 | #define rmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) |
| 144 | #define wmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) | 148 | #define wmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) |
| 149 | #endif | ||
| 150 | |||
| 151 | #ifndef CONFIG_SMP | ||
| 145 | #define smp_mb() barrier() | 152 | #define smp_mb() barrier() |
| 146 | #define smp_rmb() barrier() | 153 | #define smp_rmb() barrier() |
| 147 | #define smp_wmb() barrier() | 154 | #define smp_wmb() barrier() |
| 148 | #else | 155 | #else |
| 149 | #define mb() dmb() | 156 | #define smp_mb() mb() |
| 150 | #define rmb() dmb() | 157 | #define smp_rmb() rmb() |
| 151 | #define wmb() dmb() | 158 | #define smp_wmb() wmb() |
| 152 | #define smp_mb() dmb() | ||
| 153 | #define smp_rmb() dmb() | ||
| 154 | #define smp_wmb() dmb() | ||
| 155 | #endif | 159 | #endif |
| 160 | |||
| 156 | #define read_barrier_depends() do { } while(0) | 161 | #define read_barrier_depends() do { } while(0) |
| 157 | #define smp_read_barrier_depends() do { } while(0) | 162 | #define smp_read_barrier_depends() do { } while(0) |
| 158 | 163 | ||
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index 79087dd6d86..e7ccf7e697c 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile | |||
| @@ -17,6 +17,8 @@ obj-y := compat.o elf.o entry-armv.o entry-common.o irq.o \ | |||
| 17 | process.o ptrace.o return_address.o setup.o signal.o \ | 17 | process.o ptrace.o return_address.o setup.o signal.o \ |
| 18 | sys_arm.o stacktrace.o time.o traps.o | 18 | sys_arm.o stacktrace.o time.o traps.o |
| 19 | 19 | ||
| 20 | obj-$(CONFIG_OC_ETM) += etm.o | ||
| 21 | |||
| 20 | obj-$(CONFIG_ISA_DMA_API) += dma.o | 22 | obj-$(CONFIG_ISA_DMA_API) += dma.o |
| 21 | obj-$(CONFIG_ARCH_ACORN) += ecard.o | 23 | obj-$(CONFIG_ARCH_ACORN) += ecard.o |
| 22 | obj-$(CONFIG_FIQ) += fiq.o | 24 | obj-$(CONFIG_FIQ) += fiq.o |
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S index fafce1b5c69..f58c1156e77 100644 --- a/arch/arm/kernel/calls.S +++ b/arch/arm/kernel/calls.S | |||
| @@ -374,6 +374,7 @@ | |||
| 374 | CALL(sys_pwritev) | 374 | CALL(sys_pwritev) |
| 375 | CALL(sys_rt_tgsigqueueinfo) | 375 | CALL(sys_rt_tgsigqueueinfo) |
| 376 | CALL(sys_perf_event_open) | 376 | CALL(sys_perf_event_open) |
| 377 | /* 365 */ CALL(sys_recvmmsg) | ||
| 377 | #ifndef syscalls_counted | 378 | #ifndef syscalls_counted |
| 378 | .equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls | 379 | .equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls |
| 379 | #define syscalls_counted | 380 | #define syscalls_counted |
diff --git a/arch/arm/kernel/etm.c b/arch/arm/kernel/etm.c new file mode 100644 index 00000000000..82775396630 --- /dev/null +++ b/arch/arm/kernel/etm.c | |||
| @@ -0,0 +1,641 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/kernel/etm.c | ||
| 3 | * | ||
| 4 | * Driver for ARM's Embedded Trace Macrocell and Embedded Trace Buffer. | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Nokia Corporation. | ||
| 7 | * Alexander Shishkin | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License version 2 as | ||
| 11 | * published by the Free Software Foundation. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/kernel.h> | ||
| 15 | #include <linux/init.h> | ||
| 16 | #include <linux/types.h> | ||
| 17 | #include <linux/io.h> | ||
| 18 | #include <linux/sysrq.h> | ||
| 19 | #include <linux/device.h> | ||
| 20 | #include <linux/clk.h> | ||
| 21 | #include <linux/amba/bus.h> | ||
| 22 | #include <linux/fs.h> | ||
| 23 | #include <linux/uaccess.h> | ||
| 24 | #include <linux/miscdevice.h> | ||
| 25 | #include <linux/vmalloc.h> | ||
| 26 | #include <linux/mutex.h> | ||
| 27 | #include <asm/hardware/coresight.h> | ||
| 28 | #include <asm/sections.h> | ||
| 29 | |||
| 30 | MODULE_LICENSE("GPL"); | ||
| 31 | MODULE_AUTHOR("Alexander Shishkin"); | ||
| 32 | |||
| 33 | static struct tracectx tracer; | ||
| 34 | |||
| 35 | static inline bool trace_isrunning(struct tracectx *t) | ||
| 36 | { | ||
| 37 | return !!(t->flags & TRACER_RUNNING); | ||
| 38 | } | ||
| 39 | |||
| 40 | static int etm_setup_address_range(struct tracectx *t, int n, | ||
| 41 | unsigned long start, unsigned long end, int exclude, int data) | ||
| 42 | { | ||
| 43 | u32 flags = ETMAAT_ARM | ETMAAT_IGNCONTEXTID | ETMAAT_NSONLY | \ | ||
| 44 | ETMAAT_NOVALCMP; | ||
| 45 | |||
| 46 | if (n < 1 || n > t->ncmppairs) | ||
| 47 | return -EINVAL; | ||
| 48 | |||
| 49 | /* comparators and ranges are numbered starting with 1 as opposed | ||
| 50 | * to bits in a word */ | ||
| 51 | n--; | ||
| 52 | |||
| 53 | if (data) | ||
| 54 | flags |= ETMAAT_DLOADSTORE; | ||
| 55 | else | ||
| 56 | flags |= ETMAAT_IEXEC; | ||
| 57 | |||
| 58 | /* first comparator for the range */ | ||
| 59 | etm_writel(t, flags, ETMR_COMP_ACC_TYPE(n * 2)); | ||
| 60 | etm_writel(t, start, ETMR_COMP_VAL(n * 2)); | ||
| 61 | |||
| 62 | /* second comparator is right next to it */ | ||
| 63 | etm_writel(t, flags, ETMR_COMP_ACC_TYPE(n * 2 + 1)); | ||
| 64 | etm_writel(t, end, ETMR_COMP_VAL(n * 2 + 1)); | ||
| 65 | |||
| 66 | flags = exclude ? ETMTE_INCLEXCL : 0; | ||
| 67 | etm_writel(t, flags | (1 << n), ETMR_TRACEENCTRL); | ||
| 68 | |||
| 69 | return 0; | ||
| 70 | } | ||
| 71 | |||
| 72 | static int trace_start(struct tracectx *t) | ||
| 73 | { | ||
| 74 | u32 v; | ||
| 75 | unsigned long timeout = TRACER_TIMEOUT; | ||
| 76 | |||
| 77 | etb_unlock(t); | ||
| 78 | |||
| 79 | etb_writel(t, 0, ETBR_FORMATTERCTRL); | ||
| 80 | etb_writel(t, 1, ETBR_CTRL); | ||
| 81 | |||
| 82 | etb_lock(t); | ||
| 83 | |||
| 84 | /* configure etm */ | ||
| 85 | v = ETMCTRL_OPTS | ETMCTRL_PROGRAM | ETMCTRL_PORTSIZE(t->etm_portsz); | ||
| 86 | |||
| 87 | if (t->flags & TRACER_CYCLE_ACC) | ||
| 88 | v |= ETMCTRL_CYCLEACCURATE; | ||
| 89 | |||
| 90 | etm_unlock(t); | ||
| 91 | |||
| 92 | etm_writel(t, v, ETMR_CTRL); | ||
| 93 | |||
| 94 | while (!(etm_readl(t, ETMR_CTRL) & ETMCTRL_PROGRAM) && --timeout) | ||
| 95 | ; | ||
| 96 | if (!timeout) { | ||
| 97 | dev_dbg(t->dev, "Waiting for progbit to assert timed out\n"); | ||
| 98 | etm_lock(t); | ||
| 99 | return -EFAULT; | ||
| 100 | } | ||
| 101 | |||
| 102 | etm_setup_address_range(t, 1, (unsigned long)_stext, | ||
| 103 | (unsigned long)_etext, 0, 0); | ||
| 104 | etm_writel(t, 0, ETMR_TRACEENCTRL2); | ||
| 105 | etm_writel(t, 0, ETMR_TRACESSCTRL); | ||
| 106 | etm_writel(t, 0x6f, ETMR_TRACEENEVT); | ||
| 107 | |||
| 108 | v &= ~ETMCTRL_PROGRAM; | ||
| 109 | v |= ETMCTRL_PORTSEL; | ||
| 110 | |||
| 111 | etm_writel(t, v, ETMR_CTRL); | ||
| 112 | |||
| 113 | timeout = TRACER_TIMEOUT; | ||
| 114 | while (etm_readl(t, ETMR_CTRL) & ETMCTRL_PROGRAM && --timeout) | ||
| 115 | ; | ||
| 116 | if (!timeout) { | ||
| 117 | dev_dbg(t->dev, "Waiting for progbit to deassert timed out\n"); | ||
| 118 | etm_lock(t); | ||
| 119 | return -EFAULT; | ||
| 120 | } | ||
| 121 | |||
| 122 | etm_lock(t); | ||
| 123 | |||
| 124 | t->flags |= TRACER_RUNNING; | ||
| 125 | |||
| 126 | return 0; | ||
| 127 | } | ||
| 128 | |||
| 129 | static int trace_stop(struct tracectx *t) | ||
| 130 | { | ||
| 131 | unsigned long timeout = TRACER_TIMEOUT; | ||
| 132 | |||
| 133 | etm_unlock(t); | ||
| 134 | |||
| 135 | etm_writel(t, 0x440, ETMR_CTRL); | ||
| 136 | while (!(etm_readl(t, ETMR_CTRL) & ETMCTRL_PROGRAM) && --timeout) | ||
| 137 | ; | ||
| 138 | if (!timeout) { | ||
| 139 | dev_dbg(t->dev, "Waiting for progbit to assert timed out\n"); | ||
| 140 | etm_lock(t); | ||
| 141 | return -EFAULT; | ||
| 142 | } | ||
| 143 | |||
| 144 | etm_lock(t); | ||
| 145 | |||
| 146 | etb_unlock(t); | ||
| 147 | etb_writel(t, ETBFF_MANUAL_FLUSH, ETBR_FORMATTERCTRL); | ||
| 148 | |||
| 149 | timeout = TRACER_TIMEOUT; | ||
| 150 | while (etb_readl(t, ETBR_FORMATTERCTRL) & | ||
| 151 | ETBFF_MANUAL_FLUSH && --timeout) | ||
| 152 | ; | ||
| 153 | if (!timeout) { | ||
| 154 | dev_dbg(t->dev, "Waiting for formatter flush to commence " | ||
| 155 | "timed out\n"); | ||
| 156 | etb_lock(t); | ||
| 157 | return -EFAULT; | ||
| 158 | } | ||
| 159 | |||
| 160 | etb_writel(t, 0, ETBR_CTRL); | ||
| 161 | |||
| 162 | etb_lock(t); | ||
| 163 | |||
| 164 | t->flags &= ~TRACER_RUNNING; | ||
| 165 | |||
| 166 | return 0; | ||
| 167 | } | ||
| 168 | |||
| 169 | static int etb_getdatalen(struct tracectx *t) | ||
| 170 | { | ||
| 171 | u32 v; | ||
| 172 | int rp, wp; | ||
| 173 | |||
| 174 | v = etb_readl(t, ETBR_STATUS); | ||
| 175 | |||
| 176 | if (v & 1) | ||
| 177 | return t->etb_bufsz; | ||
| 178 | |||
| 179 | rp = etb_readl(t, ETBR_READADDR); | ||
| 180 | wp = etb_readl(t, ETBR_WRITEADDR); | ||
| 181 | |||
| 182 | if (rp > wp) { | ||
| 183 | etb_writel(t, 0, ETBR_READADDR); | ||
| 184 | etb_writel(t, 0, ETBR_WRITEADDR); | ||
| 185 | |||
| 186 | return 0; | ||
| 187 | } | ||
| 188 | |||
| 189 | return wp - rp; | ||
| 190 | } | ||
| 191 | |||
| 192 | /* sysrq+v will always stop the running trace and leave it at that */ | ||
| 193 | static void etm_dump(void) | ||
| 194 | { | ||
| 195 | struct tracectx *t = &tracer; | ||
| 196 | u32 first = 0; | ||
| 197 | int length; | ||
| 198 | |||
| 199 | if (!t->etb_regs) { | ||
| 200 | printk(KERN_INFO "No tracing hardware found\n"); | ||
| 201 | return; | ||
| 202 | } | ||
| 203 | |||
| 204 | if (trace_isrunning(t)) | ||
| 205 | trace_stop(t); | ||
| 206 | |||
| 207 | etb_unlock(t); | ||
| 208 | |||
| 209 | length = etb_getdatalen(t); | ||
| 210 | |||
| 211 | if (length == t->etb_bufsz) | ||
| 212 | first = etb_readl(t, ETBR_WRITEADDR); | ||
| 213 | |||
| 214 | etb_writel(t, first, ETBR_READADDR); | ||
| 215 | |||
| 216 | printk(KERN_INFO "Trace buffer contents length: %d\n", length); | ||
| 217 | printk(KERN_INFO "--- ETB buffer begin ---\n"); | ||
| 218 | for (; length; length--) | ||
| 219 | printk("%08x", cpu_to_be32(etb_readl(t, ETBR_READMEM))); | ||
| 220 | printk(KERN_INFO "\n--- ETB buffer end ---\n"); | ||
| 221 | |||
| 222 | /* deassert the overflow bit */ | ||
| 223 | etb_writel(t, 1, ETBR_CTRL); | ||
| 224 | etb_writel(t, 0, ETBR_CTRL); | ||
| 225 | |||
| 226 | etb_writel(t, 0, ETBR_TRIGGERCOUNT); | ||
| 227 | etb_writel(t, 0, ETBR_READADDR); | ||
| 228 | etb_writel(t, 0, ETBR_WRITEADDR); | ||
| 229 | |||
| 230 | etb_lock(t); | ||
| 231 | } | ||
| 232 | |||
| 233 | static void sysrq_etm_dump(int key, struct tty_struct *tty) | ||
| 234 | { | ||
| 235 | dev_dbg(tracer.dev, "Dumping ETB buffer\n"); | ||
| 236 | etm_dump(); | ||
| 237 | } | ||
| 238 | |||
| 239 | static struct sysrq_key_op sysrq_etm_op = { | ||
| 240 | .handler = sysrq_etm_dump, | ||
| 241 | .help_msg = "ETM buffer dump", | ||
| 242 | .action_msg = "etm", | ||
| 243 | }; | ||
| 244 | |||
| 245 | static int etb_open(struct inode *inode, struct file *file) | ||
| 246 | { | ||
| 247 | if (!tracer.etb_regs) | ||
| 248 | return -ENODEV; | ||
| 249 | |||
| 250 | file->private_data = &tracer; | ||
| 251 | |||
| 252 | return nonseekable_open(inode, file); | ||
| 253 | } | ||
| 254 | |||
| 255 | static ssize_t etb_read(struct file *file, char __user *data, | ||
| 256 | size_t len, loff_t *ppos) | ||
| 257 | { | ||
| 258 | int total, i; | ||
| 259 | long length; | ||
| 260 | struct tracectx *t = file->private_data; | ||
| 261 | u32 first = 0; | ||
| 262 | u32 *buf; | ||
| 263 | |||
| 264 | mutex_lock(&t->mutex); | ||
| 265 | |||
| 266 | if (trace_isrunning(t)) { | ||
| 267 | length = 0; | ||
| 268 | goto out; | ||
| 269 | } | ||
| 270 | |||
| 271 | etb_unlock(t); | ||
| 272 | |||
| 273 | total = etb_getdatalen(t); | ||
| 274 | if (total == t->etb_bufsz) | ||
| 275 | first = etb_readl(t, ETBR_WRITEADDR); | ||
| 276 | |||
| 277 | etb_writel(t, first, ETBR_READADDR); | ||
| 278 | |||
| 279 | length = min(total * 4, (int)len); | ||
| 280 | buf = vmalloc(length); | ||
| 281 | |||
| 282 | dev_dbg(t->dev, "ETB buffer length: %d\n", total); | ||
| 283 | dev_dbg(t->dev, "ETB status reg: %x\n", etb_readl(t, ETBR_STATUS)); | ||
| 284 | for (i = 0; i < length / 4; i++) | ||
| 285 | buf[i] = etb_readl(t, ETBR_READMEM); | ||
| 286 | |||
| 287 | /* the only way to deassert overflow bit in ETB status is this */ | ||
| 288 | etb_writel(t, 1, ETBR_CTRL); | ||
| 289 | etb_writel(t, 0, ETBR_CTRL); | ||
| 290 | |||
| 291 | etb_writel(t, 0, ETBR_WRITEADDR); | ||
| 292 | etb_writel(t, 0, ETBR_READADDR); | ||
| 293 | etb_writel(t, 0, ETBR_TRIGGERCOUNT); | ||
| 294 | |||
| 295 | etb_lock(t); | ||
| 296 | |||
| 297 | length -= copy_to_user(data, buf, length); | ||
| 298 | vfree(buf); | ||
| 299 | |||
| 300 | out: | ||
| 301 | mutex_unlock(&t->mutex); | ||
| 302 | |||
| 303 | return length; | ||
| 304 | } | ||
| 305 | |||
| 306 | static int etb_release(struct inode *inode, struct file *file) | ||
| 307 | { | ||
| 308 | /* there's nothing to do here, actually */ | ||
| 309 | return 0; | ||
| 310 | } | ||
| 311 | |||
| 312 | static const struct file_operations etb_fops = { | ||
| 313 | .owner = THIS_MODULE, | ||
| 314 | .read = etb_read, | ||
| 315 | .open = etb_open, | ||
| 316 | .release = etb_release, | ||
| 317 | }; | ||
| 318 | |||
| 319 | static struct miscdevice etb_miscdev = { | ||
| 320 | .name = "tracebuf", | ||
| 321 | .minor = 0, | ||
| 322 | .fops = &etb_fops, | ||
| 323 | }; | ||
| 324 | |||
| 325 | static int __init etb_probe(struct amba_device *dev, struct amba_id *id) | ||
| 326 | { | ||
| 327 | struct tracectx *t = &tracer; | ||
| 328 | int ret = 0; | ||
| 329 | |||
| 330 | ret = amba_request_regions(dev, NULL); | ||
| 331 | if (ret) | ||
| 332 | goto out; | ||
| 333 | |||
| 334 | t->etb_regs = ioremap_nocache(dev->res.start, resource_size(&dev->res)); | ||
| 335 | if (!t->etb_regs) { | ||
| 336 | ret = -ENOMEM; | ||
| 337 | goto out_release; | ||
| 338 | } | ||
| 339 | |||
| 340 | amba_set_drvdata(dev, t); | ||
| 341 | |||
| 342 | etb_miscdev.parent = &dev->dev; | ||
| 343 | |||
| 344 | ret = misc_register(&etb_miscdev); | ||
| 345 | if (ret) | ||
| 346 | goto out_unmap; | ||
| 347 | |||
| 348 | t->emu_clk = clk_get(&dev->dev, "emu_src_ck"); | ||
| 349 | if (IS_ERR(t->emu_clk)) { | ||
| 350 | dev_dbg(&dev->dev, "Failed to obtain emu_src_ck.\n"); | ||
| 351 | return -EFAULT; | ||
| 352 | } | ||
| 353 | |||
| 354 | clk_enable(t->emu_clk); | ||
| 355 | |||
| 356 | etb_unlock(t); | ||
| 357 | t->etb_bufsz = etb_readl(t, ETBR_DEPTH); | ||
| 358 | dev_dbg(&dev->dev, "Size: %x\n", t->etb_bufsz); | ||
| 359 | |||
| 360 | /* make sure trace capture is disabled */ | ||
| 361 | etb_writel(t, 0, ETBR_CTRL); | ||
| 362 | etb_writel(t, 0x1000, ETBR_FORMATTERCTRL); | ||
| 363 | etb_lock(t); | ||
| 364 | |||
| 365 | dev_dbg(&dev->dev, "ETB AMBA driver initialized.\n"); | ||
| 366 | |||
| 367 | out: | ||
| 368 | return ret; | ||
| 369 | |||
| 370 | out_unmap: | ||
| 371 | amba_set_drvdata(dev, NULL); | ||
| 372 | iounmap(t->etb_regs); | ||
| 373 | |||
| 374 | out_release: | ||
| 375 | amba_release_regions(dev); | ||
| 376 | |||
| 377 | return ret; | ||
| 378 | } | ||
| 379 | |||
| 380 | static int etb_remove(struct amba_device *dev) | ||
| 381 | { | ||
| 382 | struct tracectx *t = amba_get_drvdata(dev); | ||
| 383 | |||
| 384 | amba_set_drvdata(dev, NULL); | ||
| 385 | |||
| 386 | iounmap(t->etb_regs); | ||
| 387 | t->etb_regs = NULL; | ||
| 388 | |||
| 389 | clk_disable(t->emu_clk); | ||
| 390 | clk_put(t->emu_clk); | ||
| 391 | |||
| 392 | amba_release_regions(dev); | ||
| 393 | |||
| 394 | return 0; | ||
| 395 | } | ||
| 396 | |||
| 397 | static struct amba_id etb_ids[] = { | ||
| 398 | { | ||
| 399 | .id = 0x0003b907, | ||
| 400 | .mask = 0x0007ffff, | ||
| 401 | }, | ||
| 402 | { 0, 0 }, | ||
| 403 | }; | ||
| 404 | |||
| 405 | static struct amba_driver etb_driver = { | ||
| 406 | .drv = { | ||
| 407 | .name = "etb", | ||
| 408 | .owner = THIS_MODULE, | ||
| 409 | }, | ||
| 410 | .probe = etb_probe, | ||
| 411 | .remove = etb_remove, | ||
| 412 | .id_table = etb_ids, | ||
| 413 | }; | ||
| 414 | |||
| 415 | /* use a sysfs file "trace_running" to start/stop tracing */ | ||
| 416 | static ssize_t trace_running_show(struct kobject *kobj, | ||
| 417 | struct kobj_attribute *attr, | ||
| 418 | char *buf) | ||
| 419 | { | ||
| 420 | return sprintf(buf, "%x\n", trace_isrunning(&tracer)); | ||
| 421 | } | ||
| 422 | |||
| 423 | static ssize_t trace_running_store(struct kobject *kobj, | ||
| 424 | struct kobj_attribute *attr, | ||
| 425 | const char *buf, size_t n) | ||
| 426 | { | ||
| 427 | unsigned int value; | ||
| 428 | int ret; | ||
| 429 | |||
| 430 | if (sscanf(buf, "%u", &value) != 1) | ||
| 431 | return -EINVAL; | ||
| 432 | |||
| 433 | mutex_lock(&tracer.mutex); | ||
| 434 | ret = value ? trace_start(&tracer) : trace_stop(&tracer); | ||
| 435 | mutex_unlock(&tracer.mutex); | ||
| 436 | |||
| 437 | return ret ? : n; | ||
| 438 | } | ||
| 439 | |||
| 440 | static struct kobj_attribute trace_running_attr = | ||
| 441 | __ATTR(trace_running, 0644, trace_running_show, trace_running_store); | ||
| 442 | |||
| 443 | static ssize_t trace_info_show(struct kobject *kobj, | ||
| 444 | struct kobj_attribute *attr, | ||
| 445 | char *buf) | ||
| 446 | { | ||
| 447 | u32 etb_wa, etb_ra, etb_st, etb_fc, etm_ctrl, etm_st; | ||
| 448 | int datalen; | ||
| 449 | |||
| 450 | etb_unlock(&tracer); | ||
| 451 | datalen = etb_getdatalen(&tracer); | ||
| 452 | etb_wa = etb_readl(&tracer, ETBR_WRITEADDR); | ||
| 453 | etb_ra = etb_readl(&tracer, ETBR_READADDR); | ||
| 454 | etb_st = etb_readl(&tracer, ETBR_STATUS); | ||
| 455 | etb_fc = etb_readl(&tracer, ETBR_FORMATTERCTRL); | ||
| 456 | etb_lock(&tracer); | ||
| 457 | |||
| 458 | etm_unlock(&tracer); | ||
| 459 | etm_ctrl = etm_readl(&tracer, ETMR_CTRL); | ||
| 460 | etm_st = etm_readl(&tracer, ETMR_STATUS); | ||
| 461 | etm_lock(&tracer); | ||
| 462 | |||
| 463 | return sprintf(buf, "Trace buffer len: %d\nComparator pairs: %d\n" | ||
| 464 | "ETBR_WRITEADDR:\t%08x\n" | ||
| 465 | "ETBR_READADDR:\t%08x\n" | ||
| 466 | "ETBR_STATUS:\t%08x\n" | ||
| 467 | "ETBR_FORMATTERCTRL:\t%08x\n" | ||
| 468 | "ETMR_CTRL:\t%08x\n" | ||
| 469 | "ETMR_STATUS:\t%08x\n", | ||
| 470 | datalen, | ||
| 471 | tracer.ncmppairs, | ||
| 472 | etb_wa, | ||
| 473 | etb_ra, | ||
| 474 | etb_st, | ||
| 475 | etb_fc, | ||
| 476 | etm_ctrl, | ||
| 477 | etm_st | ||
| 478 | ); | ||
| 479 | } | ||
| 480 | |||
| 481 | static struct kobj_attribute trace_info_attr = | ||
| 482 | __ATTR(trace_info, 0444, trace_info_show, NULL); | ||
| 483 | |||
| 484 | static ssize_t trace_mode_show(struct kobject *kobj, | ||
| 485 | struct kobj_attribute *attr, | ||
| 486 | char *buf) | ||
| 487 | { | ||
| 488 | return sprintf(buf, "%d %d\n", | ||
| 489 | !!(tracer.flags & TRACER_CYCLE_ACC), | ||
| 490 | tracer.etm_portsz); | ||
| 491 | } | ||
| 492 | |||
| 493 | static ssize_t trace_mode_store(struct kobject *kobj, | ||
| 494 | struct kobj_attribute *attr, | ||
| 495 | const char *buf, size_t n) | ||
| 496 | { | ||
| 497 | unsigned int cycacc, portsz; | ||
| 498 | |||
| 499 | if (sscanf(buf, "%u %u", &cycacc, &portsz) != 2) | ||
| 500 | return -EINVAL; | ||
| 501 | |||
| 502 | mutex_lock(&tracer.mutex); | ||
| 503 | if (cycacc) | ||
| 504 | tracer.flags |= TRACER_CYCLE_ACC; | ||
| 505 | else | ||
| 506 | tracer.flags &= ~TRACER_CYCLE_ACC; | ||
| 507 | |||
| 508 | tracer.etm_portsz = portsz & 0x0f; | ||
| 509 | mutex_unlock(&tracer.mutex); | ||
| 510 | |||
| 511 | return n; | ||
| 512 | } | ||
| 513 | |||
| 514 | static struct kobj_attribute trace_mode_attr = | ||
| 515 | __ATTR(trace_mode, 0644, trace_mode_show, trace_mode_store); | ||
| 516 | |||
| 517 | static int __init etm_probe(struct amba_device *dev, struct amba_id *id) | ||
| 518 | { | ||
| 519 | struct tracectx *t = &tracer; | ||
| 520 | int ret = 0; | ||
| 521 | |||
| 522 | if (t->etm_regs) { | ||
| 523 | dev_dbg(&dev->dev, "ETM already initialized\n"); | ||
| 524 | ret = -EBUSY; | ||
| 525 | goto out; | ||
| 526 | } | ||
| 527 | |||
| 528 | ret = amba_request_regions(dev, NULL); | ||
| 529 | if (ret) | ||
| 530 | goto out; | ||
| 531 | |||
| 532 | t->etm_regs = ioremap_nocache(dev->res.start, resource_size(&dev->res)); | ||
| 533 | if (!t->etm_regs) { | ||
| 534 | ret = -ENOMEM; | ||
| 535 | goto out_release; | ||
| 536 | } | ||
| 537 | |||
| 538 | amba_set_drvdata(dev, t); | ||
| 539 | |||
| 540 | mutex_init(&t->mutex); | ||
| 541 | t->dev = &dev->dev; | ||
| 542 | t->flags = TRACER_CYCLE_ACC; | ||
| 543 | t->etm_portsz = 1; | ||
| 544 | |||
| 545 | etm_unlock(t); | ||
| 546 | ret = etm_readl(t, CSCR_PRSR); | ||
| 547 | |||
| 548 | t->ncmppairs = etm_readl(t, ETMR_CONFCODE) & 0xf; | ||
| 549 | etm_writel(t, 0x440, ETMR_CTRL); | ||
| 550 | etm_lock(t); | ||
| 551 | |||
| 552 | ret = sysfs_create_file(&dev->dev.kobj, | ||
| 553 | &trace_running_attr.attr); | ||
| 554 | if (ret) | ||
| 555 | goto out_unmap; | ||
| 556 | |||
| 557 | /* failing to create any of these two is not fatal */ | ||
| 558 | ret = sysfs_create_file(&dev->dev.kobj, &trace_info_attr.attr); | ||
| 559 | if (ret) | ||
| 560 | dev_dbg(&dev->dev, "Failed to create trace_info in sysfs\n"); | ||
| 561 | |||
| 562 | ret = sysfs_create_file(&dev->dev.kobj, &trace_mode_attr.attr); | ||
| 563 | if (ret) | ||
| 564 | dev_dbg(&dev->dev, "Failed to create trace_mode in sysfs\n"); | ||
| 565 | |||
| 566 | dev_dbg(t->dev, "ETM AMBA driver initialized.\n"); | ||
| 567 | |||
| 568 | out: | ||
| 569 | return ret; | ||
| 570 | |||
| 571 | out_unmap: | ||
| 572 | amba_set_drvdata(dev, NULL); | ||
| 573 | iounmap(t->etm_regs); | ||
| 574 | |||
| 575 | out_release: | ||
| 576 | amba_release_regions(dev); | ||
| 577 | |||
| 578 | return ret; | ||
| 579 | } | ||
| 580 | |||
| 581 | static int etm_remove(struct amba_device *dev) | ||
| 582 | { | ||
| 583 | struct tracectx *t = amba_get_drvdata(dev); | ||
| 584 | |||
| 585 | amba_set_drvdata(dev, NULL); | ||
| 586 | |||
| 587 | iounmap(t->etm_regs); | ||
| 588 | t->etm_regs = NULL; | ||
| 589 | |||
| 590 | amba_release_regions(dev); | ||
| 591 | |||
| 592 | sysfs_remove_file(&dev->dev.kobj, &trace_running_attr.attr); | ||
| 593 | sysfs_remove_file(&dev->dev.kobj, &trace_info_attr.attr); | ||
| 594 | sysfs_remove_file(&dev->dev.kobj, &trace_mode_attr.attr); | ||
| 595 | |||
| 596 | return 0; | ||
| 597 | } | ||
| 598 | |||
| 599 | static struct amba_id etm_ids[] = { | ||
| 600 | { | ||
| 601 | .id = 0x0003b921, | ||
| 602 | .mask = 0x0007ffff, | ||
| 603 | }, | ||
| 604 | { 0, 0 }, | ||
| 605 | }; | ||
| 606 | |||
| 607 | static struct amba_driver etm_driver = { | ||
| 608 | .drv = { | ||
| 609 | .name = "etm", | ||
| 610 | .owner = THIS_MODULE, | ||
| 611 | }, | ||
| 612 | .probe = etm_probe, | ||
| 613 | .remove = etm_remove, | ||
| 614 | .id_table = etm_ids, | ||
| 615 | }; | ||
| 616 | |||
| 617 | static int __init etm_init(void) | ||
| 618 | { | ||
| 619 | int retval; | ||
| 620 | |||
| 621 | retval = amba_driver_register(&etb_driver); | ||
| 622 | if (retval) { | ||
| 623 | printk(KERN_ERR "Failed to register etb\n"); | ||
| 624 | return retval; | ||
| 625 | } | ||
| 626 | |||
| 627 | retval = amba_driver_register(&etm_driver); | ||
| 628 | if (retval) { | ||
| 629 | amba_driver_unregister(&etb_driver); | ||
| 630 | printk(KERN_ERR "Failed to probe etm\n"); | ||
| 631 | return retval; | ||
| 632 | } | ||
| 633 | |||
| 634 | /* not being able to install this handler is not fatal */ | ||
| 635 | (void)register_sysrq_key('v', &sysrq_etm_op); | ||
| 636 | |||
| 637 | return 0; | ||
| 638 | } | ||
| 639 | |||
| 640 | device_initcall(etm_init); | ||
| 641 | |||
diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S index e5dfc2895e2..573b803dc6b 100644 --- a/arch/arm/kernel/head-nommu.S +++ b/arch/arm/kernel/head-nommu.S | |||
| @@ -32,7 +32,7 @@ | |||
| 32 | * numbers for r1. | 32 | * numbers for r1. |
| 33 | * | 33 | * |
| 34 | */ | 34 | */ |
| 35 | .section ".text.head", "ax" | 35 | __HEAD |
| 36 | ENTRY(stext) | 36 | ENTRY(stext) |
| 37 | setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode | 37 | setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode |
| 38 | @ and irqs disabled | 38 | @ and irqs disabled |
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index 38ccbe1d3b2..eb62bf94721 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S | |||
| @@ -74,7 +74,7 @@ | |||
| 74 | * crap here - that's what the boot loader (or in extreme, well justified | 74 | * crap here - that's what the boot loader (or in extreme, well justified |
| 75 | * circumstances, zImage) is for. | 75 | * circumstances, zImage) is for. |
| 76 | */ | 76 | */ |
| 77 | .section ".text.head", "ax" | 77 | __HEAD |
| 78 | ENTRY(stext) | 78 | ENTRY(stext) |
| 79 | setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode | 79 | setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode |
| 80 | @ and irqs disabled | 80 | @ and irqs disabled |
diff --git a/arch/arm/kernel/isa.c b/arch/arm/kernel/isa.c index 8ac9b842400..34648591073 100644 --- a/arch/arm/kernel/isa.c +++ b/arch/arm/kernel/isa.c | |||
| @@ -22,47 +22,42 @@ static unsigned int isa_membase, isa_portbase, isa_portshift; | |||
| 22 | 22 | ||
| 23 | static ctl_table ctl_isa_vars[4] = { | 23 | static ctl_table ctl_isa_vars[4] = { |
| 24 | { | 24 | { |
| 25 | .ctl_name = BUS_ISA_MEM_BASE, | ||
| 26 | .procname = "membase", | 25 | .procname = "membase", |
| 27 | .data = &isa_membase, | 26 | .data = &isa_membase, |
| 28 | .maxlen = sizeof(isa_membase), | 27 | .maxlen = sizeof(isa_membase), |
| 29 | .mode = 0444, | 28 | .mode = 0444, |
| 30 | .proc_handler = &proc_dointvec, | 29 | .proc_handler = proc_dointvec, |
| 31 | }, { | 30 | }, { |
| 32 | .ctl_name = BUS_ISA_PORT_BASE, | ||
| 33 | .procname = "portbase", | 31 | .procname = "portbase", |
| 34 | .data = &isa_portbase, | 32 | .data = &isa_portbase, |
| 35 | .maxlen = sizeof(isa_portbase), | 33 | .maxlen = sizeof(isa_portbase), |
| 36 | .mode = 0444, | 34 | .mode = 0444, |
| 37 | .proc_handler = &proc_dointvec, | 35 | .proc_handler = proc_dointvec, |
| 38 | }, { | 36 | }, { |
| 39 | .ctl_name = BUS_ISA_PORT_SHIFT, | ||
| 40 | .procname = "portshift", | 37 | .procname = "portshift", |
| 41 | .data = &isa_portshift, | 38 | .data = &isa_portshift, |
| 42 | .maxlen = sizeof(isa_portshift), | 39 | .maxlen = sizeof(isa_portshift), |
| 43 | .mode = 0444, | 40 | .mode = 0444, |
| 44 | .proc_handler = &proc_dointvec, | 41 | .proc_handler = proc_dointvec, |
| 45 | }, {0} | 42 | }, {} |
| 46 | }; | 43 | }; |
| 47 | 44 | ||
| 48 | static struct ctl_table_header *isa_sysctl_header; | 45 | static struct ctl_table_header *isa_sysctl_header; |
| 49 | 46 | ||
| 50 | static ctl_table ctl_isa[2] = { | 47 | static ctl_table ctl_isa[2] = { |
| 51 | { | 48 | { |
| 52 | .ctl_name = CTL_BUS_ISA, | ||
| 53 | .procname = "isa", | 49 | .procname = "isa", |
| 54 | .mode = 0555, | 50 | .mode = 0555, |
| 55 | .child = ctl_isa_vars, | 51 | .child = ctl_isa_vars, |
| 56 | }, {0} | 52 | }, {} |
| 57 | }; | 53 | }; |
| 58 | 54 | ||
| 59 | static ctl_table ctl_bus[2] = { | 55 | static ctl_table ctl_bus[2] = { |
| 60 | { | 56 | { |
| 61 | .ctl_name = CTL_BUS, | ||
| 62 | .procname = "bus", | 57 | .procname = "bus", |
| 63 | .mode = 0555, | 58 | .mode = 0555, |
| 64 | .child = ctl_isa, | 59 | .child = ctl_isa, |
| 65 | }, {0} | 60 | }, {} |
| 66 | }; | 61 | }; |
| 67 | 62 | ||
| 68 | void __init | 63 | void __init |
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c index 2a573d4fea2..e7714f367eb 100644 --- a/arch/arm/kernel/signal.c +++ b/arch/arm/kernel/signal.c | |||
| @@ -662,8 +662,12 @@ static void do_signal(struct pt_regs *regs, int syscall) | |||
| 662 | regs->ARM_sp -= 4; | 662 | regs->ARM_sp -= 4; |
| 663 | usp = (u32 __user *)regs->ARM_sp; | 663 | usp = (u32 __user *)regs->ARM_sp; |
| 664 | 664 | ||
| 665 | put_user(regs->ARM_pc, usp); | 665 | if (put_user(regs->ARM_pc, usp) == 0) { |
| 666 | regs->ARM_pc = KERN_RESTART_CODE; | 666 | regs->ARM_pc = KERN_RESTART_CODE; |
| 667 | } else { | ||
| 668 | regs->ARM_sp += 4; | ||
| 669 | force_sigsegv(0, current); | ||
| 670 | } | ||
| 667 | #endif | 671 | #endif |
| 668 | } | 672 | } |
| 669 | } | 673 | } |
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S index aecf87dfbae..71151bd87a3 100644 --- a/arch/arm/kernel/vmlinux.lds.S +++ b/arch/arm/kernel/vmlinux.lds.S | |||
| @@ -24,13 +24,11 @@ SECTIONS | |||
| 24 | #else | 24 | #else |
| 25 | . = PAGE_OFFSET + TEXT_OFFSET; | 25 | . = PAGE_OFFSET + TEXT_OFFSET; |
| 26 | #endif | 26 | #endif |
| 27 | .text.head : { | ||
| 28 | _stext = .; | ||
| 29 | _sinittext = .; | ||
| 30 | *(.text.head) | ||
| 31 | } | ||
| 32 | 27 | ||
| 33 | .init : { /* Init code and data */ | 28 | .init : { /* Init code and data */ |
| 29 | _stext = .; | ||
| 30 | _sinittext = .; | ||
| 31 | HEAD_TEXT | ||
| 34 | INIT_TEXT | 32 | INIT_TEXT |
| 35 | _einittext = .; | 33 | _einittext = .; |
| 36 | __proc_info_begin = .; | 34 | __proc_info_begin = .; |
| @@ -42,43 +40,31 @@ SECTIONS | |||
| 42 | __tagtable_begin = .; | 40 | __tagtable_begin = .; |
| 43 | *(.taglist.init) | 41 | *(.taglist.init) |
| 44 | __tagtable_end = .; | 42 | __tagtable_end = .; |
| 45 | . = ALIGN(16); | 43 | |
| 46 | __setup_start = .; | 44 | INIT_SETUP(16) |
| 47 | *(.init.setup) | 45 | |
| 48 | __setup_end = .; | ||
| 49 | __early_begin = .; | 46 | __early_begin = .; |
| 50 | *(.early_param.init) | 47 | *(.early_param.init) |
| 51 | __early_end = .; | 48 | __early_end = .; |
| 52 | __initcall_start = .; | 49 | |
| 53 | INITCALLS | 50 | INIT_CALLS |
| 54 | __initcall_end = .; | 51 | CON_INITCALL |
| 55 | __con_initcall_start = .; | 52 | SECURITY_INITCALL |
| 56 | *(.con_initcall.init) | 53 | INIT_RAM_FS |
| 57 | __con_initcall_end = .; | 54 | |
| 58 | __security_initcall_start = .; | ||
| 59 | *(.security_initcall.init) | ||
| 60 | __security_initcall_end = .; | ||
| 61 | #ifdef CONFIG_BLK_DEV_INITRD | ||
| 62 | . = ALIGN(32); | ||
| 63 | __initramfs_start = .; | ||
| 64 | usr/built-in.o(.init.ramfs) | ||
| 65 | __initramfs_end = .; | ||
| 66 | #endif | ||
| 67 | . = ALIGN(PAGE_SIZE); | ||
| 68 | __per_cpu_load = .; | ||
| 69 | __per_cpu_start = .; | ||
| 70 | *(.data.percpu.page_aligned) | ||
| 71 | *(.data.percpu) | ||
| 72 | *(.data.percpu.shared_aligned) | ||
| 73 | __per_cpu_end = .; | ||
| 74 | #ifndef CONFIG_XIP_KERNEL | 55 | #ifndef CONFIG_XIP_KERNEL |
| 75 | __init_begin = _stext; | 56 | __init_begin = _stext; |
| 76 | INIT_DATA | 57 | INIT_DATA |
| 77 | . = ALIGN(PAGE_SIZE); | ||
| 78 | __init_end = .; | ||
| 79 | #endif | 58 | #endif |
| 80 | } | 59 | } |
| 81 | 60 | ||
| 61 | PERCPU(PAGE_SIZE) | ||
| 62 | |||
| 63 | #ifndef CONFIG_XIP_KERNEL | ||
| 64 | . = ALIGN(PAGE_SIZE); | ||
| 65 | __init_end = .; | ||
| 66 | #endif | ||
| 67 | |||
| 82 | /DISCARD/ : { /* Exit code and data */ | 68 | /DISCARD/ : { /* Exit code and data */ |
| 83 | EXIT_TEXT | 69 | EXIT_TEXT |
| 84 | EXIT_DATA | 70 | EXIT_DATA |
| @@ -157,7 +143,7 @@ SECTIONS | |||
| 157 | * first, the init task union, aligned | 143 | * first, the init task union, aligned |
| 158 | * to an 8192 byte boundary. | 144 | * to an 8192 byte boundary. |
| 159 | */ | 145 | */ |
| 160 | *(.data.init_task) | 146 | INIT_TASK_DATA(THREAD_SIZE) |
| 161 | 147 | ||
| 162 | #ifdef CONFIG_XIP_KERNEL | 148 | #ifdef CONFIG_XIP_KERNEL |
| 163 | . = ALIGN(PAGE_SIZE); | 149 | . = ALIGN(PAGE_SIZE); |
| @@ -167,17 +153,8 @@ SECTIONS | |||
| 167 | __init_end = .; | 153 | __init_end = .; |
| 168 | #endif | 154 | #endif |
| 169 | 155 | ||
| 170 | . = ALIGN(PAGE_SIZE); | 156 | NOSAVE_DATA |
| 171 | __nosave_begin = .; | 157 | CACHELINE_ALIGNED_DATA(32) |
| 172 | *(.data.nosave) | ||
| 173 | . = ALIGN(PAGE_SIZE); | ||
| 174 | __nosave_end = .; | ||
| 175 | |||
| 176 | /* | ||
| 177 | * then the cacheline aligned data | ||
| 178 | */ | ||
| 179 | . = ALIGN(32); | ||
| 180 | *(.data.cacheline_aligned) | ||
| 181 | 158 | ||
| 182 | /* | 159 | /* |
| 183 | * The exception fixup table (might need resorting at runtime) | 160 | * The exception fixup table (might need resorting at runtime) |
| @@ -256,20 +233,10 @@ SECTIONS | |||
| 256 | } | 233 | } |
| 257 | #endif | 234 | #endif |
| 258 | 235 | ||
| 259 | .bss : { | 236 | BSS_SECTION(0, 0, 0) |
| 260 | __bss_start = .; /* BSS */ | 237 | _end = .; |
| 261 | *(.bss) | 238 | |
| 262 | *(COMMON) | 239 | STABS_DEBUG |
| 263 | __bss_stop = .; | ||
| 264 | _end = .; | ||
| 265 | } | ||
| 266 | /* Stabs debugging sections. */ | ||
| 267 | .stab 0 : { *(.stab) } | ||
| 268 | .stabstr 0 : { *(.stabstr) } | ||
| 269 | .stab.excl 0 : { *(.stab.excl) } | ||
| 270 | .stab.exclstr 0 : { *(.stab.exclstr) } | ||
| 271 | .stab.index 0 : { *(.stab.index) } | ||
| 272 | .stab.indexstr 0 : { *(.stab.indexstr) } | ||
| 273 | .comment 0 : { *(.comment) } | 240 | .comment 0 : { *(.comment) } |
| 274 | } | 241 | } |
| 275 | 242 | ||
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 2fd88437348..0b2ee953f16 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig | |||
| @@ -1,5 +1,20 @@ | |||
| 1 | if ARCH_AT91 | 1 | if ARCH_AT91 |
| 2 | 2 | ||
| 3 | config HAVE_AT91_DATAFLASH_CARD | ||
| 4 | bool | ||
| 5 | |||
| 6 | config HAVE_NAND_ATMEL_BUSWIDTH_16 | ||
| 7 | bool | ||
| 8 | |||
| 9 | config HAVE_AT91_USART3 | ||
| 10 | bool | ||
| 11 | |||
| 12 | config HAVE_AT91_USART4 | ||
| 13 | bool | ||
| 14 | |||
| 15 | config HAVE_AT91_USART5 | ||
| 16 | bool | ||
| 17 | |||
| 3 | menu "Atmel AT91 System-on-Chip" | 18 | menu "Atmel AT91 System-on-Chip" |
| 4 | 19 | ||
| 5 | choice | 20 | choice |
| @@ -10,54 +25,69 @@ config ARCH_AT91RM9200 | |||
| 10 | select CPU_ARM920T | 25 | select CPU_ARM920T |
| 11 | select GENERIC_TIME | 26 | select GENERIC_TIME |
| 12 | select GENERIC_CLOCKEVENTS | 27 | select GENERIC_CLOCKEVENTS |
| 28 | select HAVE_AT91_USART3 | ||
| 13 | 29 | ||
| 14 | config ARCH_AT91SAM9260 | 30 | config ARCH_AT91SAM9260 |
| 15 | bool "AT91SAM9260 or AT91SAM9XE" | 31 | bool "AT91SAM9260 or AT91SAM9XE" |
| 16 | select CPU_ARM926T | 32 | select CPU_ARM926T |
| 17 | select GENERIC_TIME | 33 | select GENERIC_TIME |
| 18 | select GENERIC_CLOCKEVENTS | 34 | select GENERIC_CLOCKEVENTS |
| 35 | select HAVE_AT91_USART3 | ||
| 36 | select HAVE_AT91_USART4 | ||
| 37 | select HAVE_AT91_USART5 | ||
| 19 | 38 | ||
| 20 | config ARCH_AT91SAM9261 | 39 | config ARCH_AT91SAM9261 |
| 21 | bool "AT91SAM9261" | 40 | bool "AT91SAM9261" |
| 22 | select CPU_ARM926T | 41 | select CPU_ARM926T |
| 23 | select GENERIC_TIME | 42 | select GENERIC_TIME |
| 24 | select GENERIC_CLOCKEVENTS | 43 | select GENERIC_CLOCKEVENTS |
| 44 | select HAVE_FB_ATMEL | ||
| 25 | 45 | ||
| 26 | config ARCH_AT91SAM9G10 | 46 | config ARCH_AT91SAM9G10 |
| 27 | bool "AT91SAM9G10" | 47 | bool "AT91SAM9G10" |
| 28 | select CPU_ARM926T | 48 | select CPU_ARM926T |
| 29 | select GENERIC_TIME | 49 | select GENERIC_TIME |
| 30 | select GENERIC_CLOCKEVENTS | 50 | select GENERIC_CLOCKEVENTS |
| 51 | select HAVE_FB_ATMEL | ||
| 31 | 52 | ||
| 32 | config ARCH_AT91SAM9263 | 53 | config ARCH_AT91SAM9263 |
| 33 | bool "AT91SAM9263" | 54 | bool "AT91SAM9263" |
| 34 | select CPU_ARM926T | 55 | select CPU_ARM926T |
| 35 | select GENERIC_TIME | 56 | select GENERIC_TIME |
| 36 | select GENERIC_CLOCKEVENTS | 57 | select GENERIC_CLOCKEVENTS |
| 58 | select HAVE_FB_ATMEL | ||
| 37 | 59 | ||
| 38 | config ARCH_AT91SAM9RL | 60 | config ARCH_AT91SAM9RL |
| 39 | bool "AT91SAM9RL" | 61 | bool "AT91SAM9RL" |
| 40 | select CPU_ARM926T | 62 | select CPU_ARM926T |
| 41 | select GENERIC_TIME | 63 | select GENERIC_TIME |
| 42 | select GENERIC_CLOCKEVENTS | 64 | select GENERIC_CLOCKEVENTS |
| 65 | select HAVE_AT91_USART3 | ||
| 66 | select HAVE_FB_ATMEL | ||
| 43 | 67 | ||
| 44 | config ARCH_AT91SAM9G20 | 68 | config ARCH_AT91SAM9G20 |
| 45 | bool "AT91SAM9G20" | 69 | bool "AT91SAM9G20" |
| 46 | select CPU_ARM926T | 70 | select CPU_ARM926T |
| 47 | select GENERIC_TIME | 71 | select GENERIC_TIME |
| 48 | select GENERIC_CLOCKEVENTS | 72 | select GENERIC_CLOCKEVENTS |
| 73 | select HAVE_AT91_USART3 | ||
| 74 | select HAVE_AT91_USART4 | ||
| 75 | select HAVE_AT91_USART5 | ||
| 49 | 76 | ||
| 50 | config ARCH_AT91SAM9G45 | 77 | config ARCH_AT91SAM9G45 |
| 51 | bool "AT91SAM9G45" | 78 | bool "AT91SAM9G45" |
| 52 | select CPU_ARM926T | 79 | select CPU_ARM926T |
| 53 | select GENERIC_TIME | 80 | select GENERIC_TIME |
| 54 | select GENERIC_CLOCKEVENTS | 81 | select GENERIC_CLOCKEVENTS |
| 82 | select HAVE_AT91_USART3 | ||
| 83 | select HAVE_FB_ATMEL | ||
| 55 | 84 | ||
| 56 | config ARCH_AT91CAP9 | 85 | config ARCH_AT91CAP9 |
| 57 | bool "AT91CAP9" | 86 | bool "AT91CAP9" |
| 58 | select CPU_ARM926T | 87 | select CPU_ARM926T |
| 59 | select GENERIC_TIME | 88 | select GENERIC_TIME |
| 60 | select GENERIC_CLOCKEVENTS | 89 | select GENERIC_CLOCKEVENTS |
| 90 | select HAVE_FB_ATMEL | ||
| 61 | 91 | ||
| 62 | config ARCH_AT91X40 | 92 | config ARCH_AT91X40 |
| 63 | bool "AT91x40" | 93 | bool "AT91x40" |
| @@ -76,93 +106,88 @@ comment "AT91RM9200 Board Type" | |||
| 76 | 106 | ||
| 77 | config MACH_ONEARM | 107 | config MACH_ONEARM |
| 78 | bool "Ajeco 1ARM Single Board Computer" | 108 | bool "Ajeco 1ARM Single Board Computer" |
| 79 | depends on ARCH_AT91RM9200 | ||
| 80 | help | 109 | help |
| 81 | Select this if you are using Ajeco's 1ARM Single Board Computer. | 110 | Select this if you are using Ajeco's 1ARM Single Board Computer. |
| 82 | <http://www.ajeco.fi/products.htm> | 111 | <http://www.ajeco.fi/products.htm> |
| 83 | 112 | ||
| 84 | config ARCH_AT91RM9200DK | 113 | config ARCH_AT91RM9200DK |
| 85 | bool "Atmel AT91RM9200-DK Development board" | 114 | bool "Atmel AT91RM9200-DK Development board" |
| 86 | depends on ARCH_AT91RM9200 | 115 | select HAVE_AT91_DATAFLASH_CARD |
| 87 | help | 116 | help |
| 88 | Select this if you are using Atmel's AT91RM9200-DK Development board. | 117 | Select this if you are using Atmel's AT91RM9200-DK Development board. |
| 89 | (Discontinued) | 118 | (Discontinued) |
| 90 | 119 | ||
| 91 | config MACH_AT91RM9200EK | 120 | config MACH_AT91RM9200EK |
| 92 | bool "Atmel AT91RM9200-EK Evaluation Kit" | 121 | bool "Atmel AT91RM9200-EK Evaluation Kit" |
| 93 | depends on ARCH_AT91RM9200 | 122 | select HAVE_AT91_DATAFLASH_CARD |
| 94 | help | 123 | help |
| 95 | Select this if you are using Atmel's AT91RM9200-EK Evaluation Kit. | 124 | Select this if you are using Atmel's AT91RM9200-EK Evaluation Kit. |
| 96 | <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3507> | 125 | <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3507> |
| 97 | 126 | ||
| 98 | config MACH_CSB337 | 127 | config MACH_CSB337 |
| 99 | bool "Cogent CSB337" | 128 | bool "Cogent CSB337" |
| 100 | depends on ARCH_AT91RM9200 | ||
| 101 | help | 129 | help |
| 102 | Select this if you are using Cogent's CSB337 board. | 130 | Select this if you are using Cogent's CSB337 board. |
| 103 | <http://www.cogcomp.com/csb_csb337.htm> | 131 | <http://www.cogcomp.com/csb_csb337.htm> |
| 104 | 132 | ||
| 105 | config MACH_CSB637 | 133 | config MACH_CSB637 |
| 106 | bool "Cogent CSB637" | 134 | bool "Cogent CSB637" |
| 107 | depends on ARCH_AT91RM9200 | ||
| 108 | help | 135 | help |
| 109 | Select this if you are using Cogent's CSB637 board. | 136 | Select this if you are using Cogent's CSB637 board. |
| 110 | <http://www.cogcomp.com/csb_csb637.htm> | 137 | <http://www.cogcomp.com/csb_csb637.htm> |
| 111 | 138 | ||
| 112 | config MACH_CARMEVA | 139 | config MACH_CARMEVA |
| 113 | bool "Conitec ARM&EVA" | 140 | bool "Conitec ARM&EVA" |
| 114 | depends on ARCH_AT91RM9200 | ||
| 115 | help | 141 | help |
| 116 | Select this if you are using Conitec's AT91RM9200-MCU-Module. | 142 | Select this if you are using Conitec's AT91RM9200-MCU-Module. |
| 117 | <http://www.conitec.net/english/linuxboard.htm> | 143 | <http://www.conitec.net/english/linuxboard.htm> |
| 118 | 144 | ||
| 119 | config MACH_ATEB9200 | 145 | config MACH_ATEB9200 |
| 120 | bool "Embest ATEB9200" | 146 | bool "Embest ATEB9200" |
| 121 | depends on ARCH_AT91RM9200 | ||
| 122 | help | 147 | help |
| 123 | Select this if you are using Embest's ATEB9200 board. | 148 | Select this if you are using Embest's ATEB9200 board. |
| 124 | <http://www.embedinfo.com/english/product/ATEB9200.asp> | 149 | <http://www.embedinfo.com/english/product/ATEB9200.asp> |
| 125 | 150 | ||
| 126 | config MACH_KB9200 | 151 | config MACH_KB9200 |
| 127 | bool "KwikByte KB920x" | 152 | bool "KwikByte KB920x" |
| 128 | depends on ARCH_AT91RM9200 | ||
| 129 | help | 153 | help |
| 130 | Select this if you are using KwikByte's KB920x board. | 154 | Select this if you are using KwikByte's KB920x board. |
| 131 | <http://kwikbyte.com/KB9202_description_new.htm> | 155 | <http://kwikbyte.com/KB9202_description_new.htm> |
| 132 | 156 | ||
| 133 | config MACH_PICOTUX2XX | 157 | config MACH_PICOTUX2XX |
| 134 | bool "picotux 200" | 158 | bool "picotux 200" |
| 135 | depends on ARCH_AT91RM9200 | ||
| 136 | help | 159 | help |
| 137 | Select this if you are using a picotux 200. | 160 | Select this if you are using a picotux 200. |
| 138 | <http://www.picotux.com/> | 161 | <http://www.picotux.com/> |
| 139 | 162 | ||
| 140 | config MACH_KAFA | 163 | config MACH_KAFA |
| 141 | bool "Sperry-Sun KAFA board" | 164 | bool "Sperry-Sun KAFA board" |
| 142 | depends on ARCH_AT91RM9200 | ||
| 143 | help | 165 | help |
| 144 | Select this if you are using Sperry-Sun's KAFA board. | 166 | Select this if you are using Sperry-Sun's KAFA board. |
| 145 | 167 | ||
| 146 | config MACH_ECBAT91 | 168 | config MACH_ECBAT91 |
| 147 | bool "emQbit ECB_AT91 SBC" | 169 | bool "emQbit ECB_AT91 SBC" |
| 148 | depends on ARCH_AT91RM9200 | 170 | select HAVE_AT91_DATAFLASH_CARD |
| 149 | help | 171 | help |
| 150 | Select this if you are using emQbit's ECB_AT91 board. | 172 | Select this if you are using emQbit's ECB_AT91 board. |
| 151 | <http://wiki.emqbit.com/free-ecb-at91> | 173 | <http://wiki.emqbit.com/free-ecb-at91> |
| 152 | 174 | ||
| 153 | config MACH_YL9200 | 175 | config MACH_YL9200 |
| 154 | bool "ucDragon YL-9200" | 176 | bool "ucDragon YL-9200" |
| 155 | depends on ARCH_AT91RM9200 | ||
| 156 | help | 177 | help |
| 157 | Select this if you are using the ucDragon YL-9200 board. | 178 | Select this if you are using the ucDragon YL-9200 board. |
| 158 | 179 | ||
| 159 | config MACH_CPUAT91 | 180 | config MACH_CPUAT91 |
| 160 | bool "Eukrea CPUAT91" | 181 | bool "Eukrea CPUAT91" |
| 161 | depends on ARCH_AT91RM9200 | ||
| 162 | help | 182 | help |
| 163 | Select this if you are using the Eukrea Electromatique's | 183 | Select this if you are using the Eukrea Electromatique's |
| 164 | CPUAT91 board <http://www.eukrea.com/>. | 184 | CPUAT91 board <http://www.eukrea.com/>. |
| 165 | 185 | ||
| 186 | config MACH_ECO920 | ||
| 187 | bool "eco920" | ||
| 188 | help | ||
| 189 | Select this if you are using the eco920 board | ||
| 190 | |||
| 166 | endif | 191 | endif |
| 167 | 192 | ||
| 168 | # ---------------------------------------------------------- | 193 | # ---------------------------------------------------------- |
| @@ -173,7 +198,6 @@ comment "AT91SAM9260 Variants" | |||
| 173 | 198 | ||
| 174 | config ARCH_AT91SAM9260_SAM9XE | 199 | config ARCH_AT91SAM9260_SAM9XE |
| 175 | bool "AT91SAM9XE" | 200 | bool "AT91SAM9XE" |
| 176 | depends on ARCH_AT91SAM9260 | ||
| 177 | help | 201 | help |
| 178 | Select this if you are using Atmel's AT91SAM9XE System-on-Chip. | 202 | Select this if you are using Atmel's AT91SAM9XE System-on-Chip. |
| 179 | They are basically AT91SAM9260s with various sizes of embedded Flash. | 203 | They are basically AT91SAM9260s with various sizes of embedded Flash. |
| @@ -182,28 +206,27 @@ comment "AT91SAM9260 / AT91SAM9XE Board Type" | |||
| 182 | 206 | ||
| 183 | config MACH_AT91SAM9260EK | 207 | config MACH_AT91SAM9260EK |
| 184 | bool "Atmel AT91SAM9260-EK / AT91SAM9XE Evaluation Kit" | 208 | bool "Atmel AT91SAM9260-EK / AT91SAM9XE Evaluation Kit" |
| 185 | depends on ARCH_AT91SAM9260 | 209 | select HAVE_AT91_DATAFLASH_CARD |
| 210 | select HAVE_NAND_ATMEL_BUSWIDTH_16 | ||
| 186 | help | 211 | help |
| 187 | Select this if you are using Atmel's AT91SAM9260-EK or AT91SAM9XE Evaluation Kit | 212 | Select this if you are using Atmel's AT91SAM9260-EK or AT91SAM9XE Evaluation Kit |
| 188 | <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3933> | 213 | <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3933> |
| 189 | 214 | ||
| 190 | config MACH_CAM60 | 215 | config MACH_CAM60 |
| 191 | bool "KwikByte KB9260 (CAM60) board" | 216 | bool "KwikByte KB9260 (CAM60) board" |
| 192 | depends on ARCH_AT91SAM9260 | ||
| 193 | help | 217 | help |
| 194 | Select this if you are using KwikByte's KB9260 (CAM60) board based on the Atmel AT91SAM9260. | 218 | Select this if you are using KwikByte's KB9260 (CAM60) board based on the Atmel AT91SAM9260. |
| 195 | <http://www.kwikbyte.com/KB9260.html> | 219 | <http://www.kwikbyte.com/KB9260.html> |
| 196 | 220 | ||
| 197 | config MACH_SAM9_L9260 | 221 | config MACH_SAM9_L9260 |
| 198 | bool "Olimex SAM9-L9260 board" | 222 | bool "Olimex SAM9-L9260 board" |
| 199 | depends on ARCH_AT91SAM9260 | 223 | select HAVE_AT91_DATAFLASH_CARD |
| 200 | help | 224 | help |
| 201 | Select this if you are using Olimex's SAM9-L9260 board based on the Atmel AT91SAM9260. | 225 | Select this if you are using Olimex's SAM9-L9260 board based on the Atmel AT91SAM9260. |
| 202 | <http://www.olimex.com/dev/sam9-L9260.html> | 226 | <http://www.olimex.com/dev/sam9-L9260.html> |
| 203 | 227 | ||
| 204 | config MACH_AFEB9260 | 228 | config MACH_AFEB9260 |
| 205 | bool "Custom afeb9260 board v1" | 229 | bool "Custom afeb9260 board v1" |
| 206 | depends on ARCH_AT91SAM9260 | ||
| 207 | help | 230 | help |
| 208 | Select this if you are using custom afeb9260 board based on | 231 | Select this if you are using custom afeb9260 board based on |
| 209 | open hardware design. Select this for revision 1 of the board. | 232 | open hardware design. Select this for revision 1 of the board. |
| @@ -212,21 +235,18 @@ config MACH_AFEB9260 | |||
| 212 | 235 | ||
| 213 | config MACH_USB_A9260 | 236 | config MACH_USB_A9260 |
| 214 | bool "CALAO USB-A9260" | 237 | bool "CALAO USB-A9260" |
| 215 | depends on ARCH_AT91SAM9260 | ||
| 216 | help | 238 | help |
| 217 | Select this if you are using a Calao Systems USB-A9260. | 239 | Select this if you are using a Calao Systems USB-A9260. |
| 218 | <http://www.calao-systems.com> | 240 | <http://www.calao-systems.com> |
| 219 | 241 | ||
| 220 | config MACH_QIL_A9260 | 242 | config MACH_QIL_A9260 |
| 221 | bool "CALAO QIL-A9260 board" | 243 | bool "CALAO QIL-A9260 board" |
| 222 | depends on ARCH_AT91SAM9260 | ||
| 223 | help | 244 | help |
| 224 | Select this if you are using a Calao Systems QIL-A9260 Board. | 245 | Select this if you are using a Calao Systems QIL-A9260 Board. |
| 225 | <http://www.calao-systems.com> | 246 | <http://www.calao-systems.com> |
| 226 | 247 | ||
| 227 | config MACH_CPU9260 | 248 | config MACH_CPU9260 |
| 228 | bool "Eukrea CPU9260 board" | 249 | bool "Eukrea CPU9260 board" |
| 229 | depends on ARCH_AT91SAM9260 | ||
| 230 | help | 250 | help |
| 231 | Select this if you are using a Eukrea Electromatique's | 251 | Select this if you are using a Eukrea Electromatique's |
| 232 | CPU9260 Board <http://www.eukrea.com/> | 252 | CPU9260 Board <http://www.eukrea.com/> |
| @@ -241,7 +261,8 @@ comment "AT91SAM9261 Board Type" | |||
| 241 | 261 | ||
| 242 | config MACH_AT91SAM9261EK | 262 | config MACH_AT91SAM9261EK |
| 243 | bool "Atmel AT91SAM9261-EK Evaluation Kit" | 263 | bool "Atmel AT91SAM9261-EK Evaluation Kit" |
| 244 | depends on ARCH_AT91SAM9261 | 264 | select HAVE_AT91_DATAFLASH_CARD |
| 265 | select HAVE_NAND_ATMEL_BUSWIDTH_16 | ||
| 245 | help | 266 | help |
| 246 | Select this if you are using Atmel's AT91SAM9261-EK Evaluation Kit. | 267 | Select this if you are using Atmel's AT91SAM9261-EK Evaluation Kit. |
| 247 | <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3820> | 268 | <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3820> |
| @@ -256,7 +277,8 @@ comment "AT91SAM9G10 Board Type" | |||
| 256 | 277 | ||
| 257 | config MACH_AT91SAM9G10EK | 278 | config MACH_AT91SAM9G10EK |
| 258 | bool "Atmel AT91SAM9G10-EK Evaluation Kit" | 279 | bool "Atmel AT91SAM9G10-EK Evaluation Kit" |
| 259 | depends on ARCH_AT91SAM9G10 | 280 | select HAVE_AT91_DATAFLASH_CARD |
| 281 | select HAVE_NAND_ATMEL_BUSWIDTH_16 | ||
| 260 | help | 282 | help |
| 261 | Select this if you are using Atmel's AT91SAM9G10-EK Evaluation Kit. | 283 | Select this if you are using Atmel's AT91SAM9G10-EK Evaluation Kit. |
| 262 | <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4588> | 284 | <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4588> |
| @@ -271,21 +293,21 @@ comment "AT91SAM9263 Board Type" | |||
| 271 | 293 | ||
| 272 | config MACH_AT91SAM9263EK | 294 | config MACH_AT91SAM9263EK |
| 273 | bool "Atmel AT91SAM9263-EK Evaluation Kit" | 295 | bool "Atmel AT91SAM9263-EK Evaluation Kit" |
| 274 | depends on ARCH_AT91SAM9263 | 296 | select HAVE_AT91_DATAFLASH_CARD |
| 297 | select HAVE_NAND_ATMEL_BUSWIDTH_16 | ||
| 275 | help | 298 | help |
| 276 | Select this if you are using Atmel's AT91SAM9263-EK Evaluation Kit. | 299 | Select this if you are using Atmel's AT91SAM9263-EK Evaluation Kit. |
| 277 | <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4057> | 300 | <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4057> |
| 278 | 301 | ||
| 279 | config MACH_USB_A9263 | 302 | config MACH_USB_A9263 |
| 280 | bool "CALAO USB-A9263" | 303 | bool "CALAO USB-A9263" |
| 281 | depends on ARCH_AT91SAM9263 | ||
| 282 | help | 304 | help |
| 283 | Select this if you are using a Calao Systems USB-A9263. | 305 | Select this if you are using a Calao Systems USB-A9263. |
| 284 | <http://www.calao-systems.com> | 306 | <http://www.calao-systems.com> |
| 285 | 307 | ||
| 286 | config MACH_NEOCORE926 | 308 | config MACH_NEOCORE926 |
| 287 | bool "Adeneo NEOCORE926" | 309 | bool "Adeneo NEOCORE926" |
| 288 | depends on ARCH_AT91SAM9263 | 310 | select HAVE_AT91_DATAFLASH_CARD |
| 289 | help | 311 | help |
| 290 | Select this if you are using the Adeneo Neocore 926 board. | 312 | Select this if you are using the Adeneo Neocore 926 board. |
| 291 | 313 | ||
| @@ -299,7 +321,6 @@ comment "AT91SAM9RL Board Type" | |||
| 299 | 321 | ||
| 300 | config MACH_AT91SAM9RLEK | 322 | config MACH_AT91SAM9RLEK |
| 301 | bool "Atmel AT91SAM9RL-EK Evaluation Kit" | 323 | bool "Atmel AT91SAM9RL-EK Evaluation Kit" |
| 302 | depends on ARCH_AT91SAM9RL | ||
| 303 | help | 324 | help |
| 304 | Select this if you are using Atmel's AT91SAM9RL-EK Evaluation Kit. | 325 | Select this if you are using Atmel's AT91SAM9RL-EK Evaluation Kit. |
| 305 | 326 | ||
| @@ -313,14 +334,15 @@ comment "AT91SAM9G20 Board Type" | |||
| 313 | 334 | ||
| 314 | config MACH_AT91SAM9G20EK | 335 | config MACH_AT91SAM9G20EK |
| 315 | bool "Atmel AT91SAM9G20-EK Evaluation Kit" | 336 | bool "Atmel AT91SAM9G20-EK Evaluation Kit" |
| 316 | depends on ARCH_AT91SAM9G20 | 337 | select HAVE_AT91_DATAFLASH_CARD |
| 338 | select HAVE_NAND_ATMEL_BUSWIDTH_16 | ||
| 317 | help | 339 | help |
| 318 | Select this if you are using Atmel's AT91SAM9G20-EK Evaluation Kit | 340 | Select this if you are using Atmel's AT91SAM9G20-EK Evaluation Kit |
| 319 | that embeds only one SD/MMC slot. | 341 | that embeds only one SD/MMC slot. |
| 320 | 342 | ||
| 321 | config MACH_AT91SAM9G20EK_2MMC | 343 | config MACH_AT91SAM9G20EK_2MMC |
| 322 | bool "Atmel AT91SAM9G20-EK Evaluation Kit with 2 SD/MMC Slots" | 344 | bool "Atmel AT91SAM9G20-EK Evaluation Kit with 2 SD/MMC Slots" |
| 323 | depends on ARCH_AT91SAM9G20 | 345 | select HAVE_NAND_ATMEL_BUSWIDTH_16 |
| 324 | help | 346 | help |
| 325 | Select this if you are using an Atmel AT91SAM9G20-EK Evaluation Kit | 347 | Select this if you are using an Atmel AT91SAM9G20-EK Evaluation Kit |
| 326 | with 2 SD/MMC Slots. This is the case for AT91SAM9G20-EK rev. C and | 348 | with 2 SD/MMC Slots. This is the case for AT91SAM9G20-EK rev. C and |
| @@ -328,7 +350,6 @@ config MACH_AT91SAM9G20EK_2MMC | |||
| 328 | 350 | ||
| 329 | config MACH_CPU9G20 | 351 | config MACH_CPU9G20 |
| 330 | bool "Eukrea CPU9G20 board" | 352 | bool "Eukrea CPU9G20 board" |
| 331 | depends on ARCH_AT91SAM9G20 | ||
| 332 | help | 353 | help |
| 333 | Select this if you are using a Eukrea Electromatique's | 354 | Select this if you are using a Eukrea Electromatique's |
| 334 | CPU9G20 Board <http://www.eukrea.com/> | 355 | CPU9G20 Board <http://www.eukrea.com/> |
| @@ -343,7 +364,7 @@ comment "AT91SAM9G45 Board Type" | |||
| 343 | 364 | ||
| 344 | config MACH_AT91SAM9G45EKES | 365 | config MACH_AT91SAM9G45EKES |
| 345 | bool "Atmel AT91SAM9G45-EKES Evaluation Kit" | 366 | bool "Atmel AT91SAM9G45-EKES Evaluation Kit" |
| 346 | depends on ARCH_AT91SAM9G45 | 367 | select HAVE_NAND_ATMEL_BUSWIDTH_16 |
| 347 | help | 368 | help |
| 348 | Select this if you are using Atmel's AT91SAM9G45-EKES Evaluation Kit. | 369 | Select this if you are using Atmel's AT91SAM9G45-EKES Evaluation Kit. |
| 349 | "ES" at the end of the name means that this board is an | 370 | "ES" at the end of the name means that this board is an |
| @@ -359,7 +380,8 @@ comment "AT91CAP9 Board Type" | |||
| 359 | 380 | ||
| 360 | config MACH_AT91CAP9ADK | 381 | config MACH_AT91CAP9ADK |
| 361 | bool "Atmel AT91CAP9A-DK Evaluation Kit" | 382 | bool "Atmel AT91CAP9A-DK Evaluation Kit" |
| 362 | depends on ARCH_AT91CAP9 | 383 | select HAVE_AT91_DATAFLASH_CARD |
| 384 | select HAVE_NAND_ATMEL_BUSWIDTH_16 | ||
| 363 | help | 385 | help |
| 364 | Select this if you are using Atmel's AT91CAP9A-DK Evaluation Kit. | 386 | Select this if you are using Atmel's AT91CAP9A-DK Evaluation Kit. |
| 365 | <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4138> | 387 | <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4138> |
| @@ -388,13 +410,13 @@ comment "AT91 Board Options" | |||
| 388 | 410 | ||
| 389 | config MTD_AT91_DATAFLASH_CARD | 411 | config MTD_AT91_DATAFLASH_CARD |
| 390 | bool "Enable DataFlash Card support" | 412 | bool "Enable DataFlash Card support" |
| 391 | depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9G10EK || MACH_AT91SAM9263EK || MACH_AT91SAM9G20EK || MACH_ECBAT91 || MACH_SAM9_L9260 || MACH_AT91CAP9ADK || MACH_NEOCORE926) | 413 | depends on HAVE_AT91_DATAFLASH_CARD |
| 392 | help | 414 | help |
| 393 | Enable support for the DataFlash card. | 415 | Enable support for the DataFlash card. |
| 394 | 416 | ||
| 395 | config MTD_NAND_ATMEL_BUSWIDTH_16 | 417 | config MTD_NAND_ATMEL_BUSWIDTH_16 |
| 396 | bool "Enable 16-bit data bus interface to NAND flash" | 418 | bool "Enable 16-bit data bus interface to NAND flash" |
| 397 | depends on (MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9G10EK || MACH_AT91SAM9263EK || MACH_AT91SAM9G20EK || MACH_AT91SAM9G20EK_2MMC || MACH_AT91SAM9G45EKES || MACH_AT91CAP9ADK) | 419 | depends on HAVE_NAND_ATMEL_BUSWIDTH_16 |
| 398 | help | 420 | help |
| 399 | On AT91SAM926x boards both types of NAND flash can be present | 421 | On AT91SAM926x boards both types of NAND flash can be present |
| 400 | (8 and 16 bit data bus width). | 422 | (8 and 16 bit data bus width). |
| @@ -456,15 +478,15 @@ config AT91_EARLY_USART2 | |||
| 456 | 478 | ||
| 457 | config AT91_EARLY_USART3 | 479 | config AT91_EARLY_USART3 |
| 458 | bool "USART3" | 480 | bool "USART3" |
| 459 | depends on (ARCH_AT91RM9200 || ARCH_AT91SAM9RL || ARCH_AT91SAM9260 || ARCH_AT91SAM9G20 || ARCH_AT91SAM9G45) | 481 | depends on HAVE_AT91_USART3 |
| 460 | 482 | ||
| 461 | config AT91_EARLY_USART4 | 483 | config AT91_EARLY_USART4 |
| 462 | bool "USART4" | 484 | bool "USART4" |
| 463 | depends on ARCH_AT91SAM9260 || ARCH_AT91SAM9G20 | 485 | depends on HAVE_AT91_USART4 |
| 464 | 486 | ||
| 465 | config AT91_EARLY_USART5 | 487 | config AT91_EARLY_USART5 |
| 466 | bool "USART5" | 488 | bool "USART5" |
| 467 | depends on ARCH_AT91SAM9260 || ARCH_AT91SAM9G20 | 489 | depends on HAVE_AT91_USART5 |
| 468 | 490 | ||
| 469 | endchoice | 491 | endchoice |
| 470 | 492 | ||
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index ada440aab0c..709fbad4a3e 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile | |||
| @@ -35,6 +35,7 @@ obj-$(CONFIG_MACH_PICOTUX2XX) += board-picotux200.o | |||
| 35 | obj-$(CONFIG_MACH_ECBAT91) += board-ecbat91.o | 35 | obj-$(CONFIG_MACH_ECBAT91) += board-ecbat91.o |
| 36 | obj-$(CONFIG_MACH_YL9200) += board-yl-9200.o | 36 | obj-$(CONFIG_MACH_YL9200) += board-yl-9200.o |
| 37 | obj-$(CONFIG_MACH_CPUAT91) += board-cpuat91.o | 37 | obj-$(CONFIG_MACH_CPUAT91) += board-cpuat91.o |
| 38 | obj-$(CONFIG_MACH_ECO920) += board-eco920.o | ||
| 38 | 39 | ||
| 39 | # AT91SAM9260 board-specific support | 40 | # AT91SAM9260 board-specific support |
| 40 | obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o | 41 | obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o |
| @@ -77,6 +78,7 @@ obj-y += leds.o | |||
| 77 | # Power Management | 78 | # Power Management |
| 78 | obj-$(CONFIG_PM) += pm.o | 79 | obj-$(CONFIG_PM) += pm.o |
| 79 | obj-$(CONFIG_AT91_SLOW_CLOCK) += pm_slowclock.o | 80 | obj-$(CONFIG_AT91_SLOW_CLOCK) += pm_slowclock.o |
| 81 | obj-$(CONFIG_CPU_IDLE) += cpuidle.o | ||
| 80 | 82 | ||
| 81 | ifeq ($(CONFIG_PM_DEBUG),y) | 83 | ifeq ($(CONFIG_PM_DEBUG),y) |
| 82 | CFLAGS_pm.o += -DDEBUG | 84 | CFLAGS_pm.o += -DDEBUG |
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c index 332b784050b..a57af3e99c7 100644 --- a/arch/arm/mach-at91/at91sam9g45_devices.c +++ b/arch/arm/mach-at91/at91sam9g45_devices.c | |||
| @@ -131,6 +131,62 @@ void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data) {} | |||
| 131 | 131 | ||
| 132 | 132 | ||
| 133 | /* -------------------------------------------------------------------- | 133 | /* -------------------------------------------------------------------- |
| 134 | * USB Host HS (EHCI) | ||
| 135 | * Needs an OHCI host for low and full speed management | ||
| 136 | * -------------------------------------------------------------------- */ | ||
| 137 | |||
| 138 | #if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_EHCI_HCD_MODULE) | ||
| 139 | static u64 ehci_dmamask = DMA_BIT_MASK(32); | ||
| 140 | static struct at91_usbh_data usbh_ehci_data; | ||
| 141 | |||
| 142 | static struct resource usbh_ehci_resources[] = { | ||
| 143 | [0] = { | ||
| 144 | .start = AT91SAM9G45_EHCI_BASE, | ||
| 145 | .end = AT91SAM9G45_EHCI_BASE + SZ_1M - 1, | ||
| 146 | .flags = IORESOURCE_MEM, | ||
| 147 | }, | ||
| 148 | [1] = { | ||
| 149 | .start = AT91SAM9G45_ID_UHPHS, | ||
| 150 | .end = AT91SAM9G45_ID_UHPHS, | ||
| 151 | .flags = IORESOURCE_IRQ, | ||
| 152 | }, | ||
| 153 | }; | ||
| 154 | |||
| 155 | static struct platform_device at91_usbh_ehci_device = { | ||
| 156 | .name = "atmel-ehci", | ||
| 157 | .id = -1, | ||
| 158 | .dev = { | ||
| 159 | .dma_mask = &ehci_dmamask, | ||
| 160 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 161 | .platform_data = &usbh_ehci_data, | ||
| 162 | }, | ||
| 163 | .resource = usbh_ehci_resources, | ||
| 164 | .num_resources = ARRAY_SIZE(usbh_ehci_resources), | ||
| 165 | }; | ||
| 166 | |||
| 167 | void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data) | ||
| 168 | { | ||
| 169 | int i; | ||
| 170 | |||
| 171 | if (!data) | ||
| 172 | return; | ||
| 173 | |||
| 174 | /* Enable VBus control for UHP ports */ | ||
| 175 | for (i = 0; i < data->ports; i++) { | ||
| 176 | if (data->vbus_pin[i]) | ||
| 177 | at91_set_gpio_output(data->vbus_pin[i], 0); | ||
| 178 | } | ||
| 179 | |||
| 180 | usbh_ehci_data = *data; | ||
| 181 | at91_clock_associate("uhphs_clk", &at91_usbh_ehci_device.dev, "ehci_clk"); | ||
| 182 | platform_device_register(&at91_usbh_ehci_device); | ||
| 183 | } | ||
| 184 | #else | ||
| 185 | void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data) {} | ||
| 186 | #endif | ||
| 187 | |||
| 188 | |||
| 189 | /* -------------------------------------------------------------------- | ||
| 134 | * USB HS Device (Gadget) | 190 | * USB HS Device (Gadget) |
| 135 | * -------------------------------------------------------------------- */ | 191 | * -------------------------------------------------------------------- */ |
| 136 | 192 | ||
diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c new file mode 100644 index 00000000000..295a96609e7 --- /dev/null +++ b/arch/arm/mach-at91/board-eco920.c | |||
| @@ -0,0 +1,158 @@ | |||
| 1 | /* | ||
| 2 | * This program is free software; you can redistribute it and/or modify | ||
| 3 | * it under the terms of the GNU General Public License as published by | ||
| 4 | * the Free Software Foundation; either version 2 of the License, or | ||
| 5 | * (at your option) any later version. | ||
| 6 | * | ||
| 7 | * This program is distributed in the hope that it will be useful, | ||
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 10 | * GNU General Public License for more details. | ||
| 11 | * | ||
| 12 | * You should have received a copy of the GNU General Public License | ||
| 13 | * along with this program; if not, write to the Free Software | ||
| 14 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 15 | */ | ||
| 16 | |||
| 17 | #include <linux/init.h> | ||
| 18 | #include <linux/platform_device.h> | ||
| 19 | #include <linux/mtd/physmap.h> | ||
| 20 | #include <linux/gpio.h> | ||
| 21 | |||
| 22 | #include <asm/mach-types.h> | ||
| 23 | |||
| 24 | #include <asm/mach/arch.h> | ||
| 25 | #include <asm/mach/map.h> | ||
| 26 | |||
| 27 | #include <mach/board.h> | ||
| 28 | #include <mach/at91rm9200_mc.h> | ||
| 29 | #include "generic.h" | ||
| 30 | |||
| 31 | static void __init eco920_map_io(void) | ||
| 32 | { | ||
| 33 | at91rm9200_initialize(18432000, AT91RM9200_PQFP); | ||
| 34 | |||
| 35 | /* Setup the LEDs */ | ||
| 36 | at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1); | ||
| 37 | |||
| 38 | /* DBGU on ttyS0. (Rx & Tx only */ | ||
| 39 | at91_register_uart(0, 0, 0); | ||
| 40 | |||
| 41 | /* set serial console to ttyS0 (ie, DBGU) */ | ||
| 42 | at91_set_serial_console(0); | ||
| 43 | } | ||
| 44 | |||
| 45 | static void __init eco920_init_irq(void) | ||
| 46 | { | ||
| 47 | at91rm9200_init_interrupts(NULL); | ||
| 48 | } | ||
| 49 | |||
| 50 | static struct at91_eth_data __initdata eco920_eth_data = { | ||
| 51 | .phy_irq_pin = AT91_PIN_PC2, | ||
| 52 | .is_rmii = 1, | ||
| 53 | }; | ||
| 54 | |||
| 55 | static struct at91_usbh_data __initdata eco920_usbh_data = { | ||
| 56 | .ports = 1, | ||
| 57 | }; | ||
| 58 | |||
| 59 | static struct at91_udc_data __initdata eco920_udc_data = { | ||
| 60 | .vbus_pin = AT91_PIN_PB12, | ||
| 61 | .pullup_pin = AT91_PIN_PB13, | ||
| 62 | }; | ||
| 63 | |||
| 64 | static struct at91_mmc_data __initdata eco920_mmc_data = { | ||
| 65 | .slot_b = 0, | ||
| 66 | .wire4 = 0, | ||
| 67 | }; | ||
| 68 | |||
| 69 | static struct physmap_flash_data eco920_flash_data = { | ||
| 70 | .width = 2, | ||
| 71 | }; | ||
| 72 | |||
| 73 | static struct resource eco920_flash_resource = { | ||
| 74 | .start = 0x11000000, | ||
| 75 | .end = 0x11ffffff, | ||
| 76 | .flags = IORESOURCE_MEM, | ||
| 77 | }; | ||
| 78 | |||
| 79 | static struct platform_device eco920_flash = { | ||
| 80 | .name = "physmap-flash", | ||
| 81 | .id = 0, | ||
| 82 | .dev = { | ||
| 83 | .platform_data = &eco920_flash_data, | ||
| 84 | }, | ||
| 85 | .resource = &eco920_flash_resource, | ||
| 86 | .num_resources = 1, | ||
| 87 | }; | ||
| 88 | |||
| 89 | static struct resource at91_beeper_resources[] = { | ||
| 90 | [0] = { | ||
| 91 | .start = AT91RM9200_BASE_TC3, | ||
| 92 | .end = AT91RM9200_BASE_TC3 + 0x39, | ||
| 93 | .flags = IORESOURCE_MEM, | ||
| 94 | }, | ||
| 95 | }; | ||
| 96 | |||
| 97 | static struct platform_device at91_beeper = { | ||
| 98 | .name = "at91_beeper", | ||
| 99 | .id = 0, | ||
| 100 | .resource = at91_beeper_resources, | ||
| 101 | .num_resources = ARRAY_SIZE(at91_beeper_resources), | ||
| 102 | }; | ||
| 103 | |||
| 104 | static struct spi_board_info eco920_spi_devices[] = { | ||
| 105 | { /* CAN controller */ | ||
| 106 | .modalias = "tlv5638", | ||
| 107 | .chip_select = 3, | ||
| 108 | .max_speed_hz = 20 * 1000 * 1000, | ||
| 109 | .mode = SPI_CPHA, | ||
| 110 | }, | ||
| 111 | }; | ||
| 112 | |||
| 113 | static void __init eco920_board_init(void) | ||
| 114 | { | ||
| 115 | at91_add_device_serial(); | ||
| 116 | at91_add_device_eth(&eco920_eth_data); | ||
| 117 | at91_add_device_usbh(&eco920_usbh_data); | ||
| 118 | at91_add_device_udc(&eco920_udc_data); | ||
| 119 | |||
| 120 | at91_add_device_mmc(0, &eco920_mmc_data); | ||
| 121 | platform_device_register(&eco920_flash); | ||
| 122 | |||
| 123 | at91_sys_write(AT91_SMC_CSR(7), AT91_SMC_RWHOLD_(1) | ||
| 124 | | AT91_SMC_RWSETUP_(1) | ||
| 125 | | AT91_SMC_DBW_8 | ||
| 126 | | AT91_SMC_WSEN | ||
| 127 | | AT91_SMC_NWS_(15)); | ||
| 128 | |||
| 129 | at91_set_A_periph(AT91_PIN_PC6, 1); | ||
| 130 | |||
| 131 | at91_set_gpio_input(AT91_PIN_PA23, 0); | ||
| 132 | at91_set_deglitch(AT91_PIN_PA23, 1); | ||
| 133 | |||
| 134 | /* Initialization of the Static Memory Controller for Chip Select 3 */ | ||
| 135 | at91_sys_write(AT91_SMC_CSR(3), | ||
| 136 | AT91_SMC_DBW_16 | /* 16 bit */ | ||
| 137 | AT91_SMC_WSEN | | ||
| 138 | AT91_SMC_NWS_(5) | /* wait states */ | ||
| 139 | AT91_SMC_TDF_(1) /* float time */ | ||
| 140 | ); | ||
| 141 | |||
| 142 | at91_clock_associate("tc3_clk", &at91_beeper.dev, "at91_beeper"); | ||
| 143 | at91_set_B_periph(AT91_PIN_PB6, 0); | ||
| 144 | platform_device_register(&at91_beeper); | ||
| 145 | |||
| 146 | at91_add_device_spi(eco920_spi_devices, ARRAY_SIZE(eco920_spi_devices)); | ||
| 147 | } | ||
| 148 | |||
| 149 | MACHINE_START(ECO920, "eco920") | ||
| 150 | /* Maintainer: Sascha Hauer */ | ||
| 151 | .phys_io = AT91_BASE_SYS, | ||
| 152 | .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, | ||
| 153 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
| 154 | .timer = &at91rm9200_timer, | ||
| 155 | .map_io = eco920_map_io, | ||
| 156 | .init_irq = eco920_init_irq, | ||
| 157 | .init_machine = eco920_board_init, | ||
| 158 | MACHINE_END | ||
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c index 64c3843f323..1cf4d868107 100644 --- a/arch/arm/mach-at91/board-sam9m10g45ek.c +++ b/arch/arm/mach-at91/board-sam9m10g45ek.c | |||
| @@ -366,6 +366,7 @@ static void __init ek_board_init(void) | |||
| 366 | at91_add_device_serial(); | 366 | at91_add_device_serial(); |
| 367 | /* USB HS Host */ | 367 | /* USB HS Host */ |
| 368 | at91_add_device_usbh_ohci(&ek_usbh_hs_data); | 368 | at91_add_device_usbh_ohci(&ek_usbh_hs_data); |
| 369 | at91_add_device_usbh_ehci(&ek_usbh_hs_data); | ||
| 369 | /* USB HS Device */ | 370 | /* USB HS Device */ |
| 370 | at91_add_device_usba(&ek_usba_udc_data); | 371 | at91_add_device_usba(&ek_usba_udc_data); |
| 371 | /* SPI */ | 372 | /* SPI */ |
diff --git a/arch/arm/mach-at91/cpuidle.c b/arch/arm/mach-at91/cpuidle.c new file mode 100644 index 00000000000..1cfeac1483d --- /dev/null +++ b/arch/arm/mach-at91/cpuidle.c | |||
| @@ -0,0 +1,94 @@ | |||
| 1 | /* | ||
| 2 | * based on arch/arm/mach-kirkwood/cpuidle.c | ||
| 3 | * | ||
| 4 | * CPU idle support for AT91 SoC | ||
| 5 | * | ||
| 6 | * This file is licensed under the terms of the GNU General Public | ||
| 7 | * License version 2. This program is licensed "as is" without any | ||
| 8 | * warranty of any kind, whether express or implied. | ||
| 9 | * | ||
| 10 | * The cpu idle uses wait-for-interrupt and RAM self refresh in order | ||
| 11 | * to implement two idle states - | ||
| 12 | * #1 wait-for-interrupt | ||
| 13 | * #2 wait-for-interrupt and RAM self refresh | ||
| 14 | */ | ||
| 15 | |||
| 16 | #include <linux/kernel.h> | ||
| 17 | #include <linux/init.h> | ||
| 18 | #include <linux/platform_device.h> | ||
| 19 | #include <linux/cpuidle.h> | ||
| 20 | #include <asm/proc-fns.h> | ||
| 21 | #include <linux/io.h> | ||
| 22 | |||
| 23 | #include "pm.h" | ||
| 24 | |||
| 25 | #define AT91_MAX_STATES 2 | ||
| 26 | |||
| 27 | static DEFINE_PER_CPU(struct cpuidle_device, at91_cpuidle_device); | ||
| 28 | |||
| 29 | static struct cpuidle_driver at91_idle_driver = { | ||
| 30 | .name = "at91_idle", | ||
| 31 | .owner = THIS_MODULE, | ||
| 32 | }; | ||
| 33 | |||
| 34 | /* Actual code that puts the SoC in different idle states */ | ||
| 35 | static int at91_enter_idle(struct cpuidle_device *dev, | ||
| 36 | struct cpuidle_state *state) | ||
| 37 | { | ||
| 38 | struct timeval before, after; | ||
| 39 | int idle_time; | ||
| 40 | u32 saved_lpr; | ||
| 41 | |||
| 42 | local_irq_disable(); | ||
| 43 | do_gettimeofday(&before); | ||
| 44 | if (state == &dev->states[0]) | ||
| 45 | /* Wait for interrupt state */ | ||
| 46 | cpu_do_idle(); | ||
| 47 | else if (state == &dev->states[1]) { | ||
| 48 | asm("b 1f; .align 5; 1:"); | ||
| 49 | asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */ | ||
| 50 | saved_lpr = sdram_selfrefresh_enable(); | ||
| 51 | cpu_do_idle(); | ||
| 52 | sdram_selfrefresh_disable(saved_lpr); | ||
| 53 | } | ||
| 54 | do_gettimeofday(&after); | ||
| 55 | local_irq_enable(); | ||
| 56 | idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC + | ||
| 57 | (after.tv_usec - before.tv_usec); | ||
| 58 | return idle_time; | ||
| 59 | } | ||
| 60 | |||
| 61 | /* Initialize CPU idle by registering the idle states */ | ||
| 62 | static int at91_init_cpuidle(void) | ||
| 63 | { | ||
| 64 | struct cpuidle_device *device; | ||
| 65 | |||
| 66 | cpuidle_register_driver(&at91_idle_driver); | ||
| 67 | |||
| 68 | device = &per_cpu(at91_cpuidle_device, smp_processor_id()); | ||
| 69 | device->state_count = AT91_MAX_STATES; | ||
| 70 | |||
| 71 | /* Wait for interrupt state */ | ||
| 72 | device->states[0].enter = at91_enter_idle; | ||
| 73 | device->states[0].exit_latency = 1; | ||
| 74 | device->states[0].target_residency = 10000; | ||
| 75 | device->states[0].flags = CPUIDLE_FLAG_TIME_VALID; | ||
| 76 | strcpy(device->states[0].name, "WFI"); | ||
| 77 | strcpy(device->states[0].desc, "Wait for interrupt"); | ||
| 78 | |||
| 79 | /* Wait for interrupt and RAM self refresh state */ | ||
| 80 | device->states[1].enter = at91_enter_idle; | ||
| 81 | device->states[1].exit_latency = 10; | ||
| 82 | device->states[1].target_residency = 10000; | ||
| 83 | device->states[1].flags = CPUIDLE_FLAG_TIME_VALID; | ||
| 84 | strcpy(device->states[1].name, "RAM_SR"); | ||
| 85 | strcpy(device->states[1].desc, "WFI and RAM Self Refresh"); | ||
| 86 | |||
| 87 | if (cpuidle_register_device(device)) { | ||
| 88 | printk(KERN_ERR "at91_init_cpuidle: Failed registering\n"); | ||
| 89 | return -EIO; | ||
| 90 | } | ||
| 91 | return 0; | ||
| 92 | } | ||
| 93 | |||
| 94 | device_initcall(at91_init_cpuidle); | ||
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h index 2f4fcedc02b..2295d80dd89 100644 --- a/arch/arm/mach-at91/include/mach/board.h +++ b/arch/arm/mach-at91/include/mach/board.h | |||
| @@ -98,6 +98,7 @@ struct at91_usbh_data { | |||
| 98 | }; | 98 | }; |
| 99 | extern void __init at91_add_device_usbh(struct at91_usbh_data *data); | 99 | extern void __init at91_add_device_usbh(struct at91_usbh_data *data); |
| 100 | extern void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data); | 100 | extern void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data); |
| 101 | extern void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data); | ||
| 101 | 102 | ||
| 102 | /* NAND / SmartMedia */ | 103 | /* NAND / SmartMedia */ |
| 103 | struct atmel_nand_data { | 104 | struct atmel_nand_data { |
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 4028724d490..61566898648 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c | |||
| @@ -29,62 +29,7 @@ | |||
| 29 | #include <mach/cpu.h> | 29 | #include <mach/cpu.h> |
| 30 | 30 | ||
| 31 | #include "generic.h" | 31 | #include "generic.h" |
| 32 | 32 | #include "pm.h" | |
| 33 | #ifdef CONFIG_ARCH_AT91RM9200 | ||
| 34 | #include <mach/at91rm9200_mc.h> | ||
| 35 | |||
| 36 | /* | ||
| 37 | * The AT91RM9200 goes into self-refresh mode with this command, and will | ||
| 38 | * terminate self-refresh automatically on the next SDRAM access. | ||
| 39 | */ | ||
| 40 | #define sdram_selfrefresh_enable() at91_sys_write(AT91_SDRAMC_SRR, 1) | ||
| 41 | #define sdram_selfrefresh_disable() do {} while (0) | ||
| 42 | |||
| 43 | #elif defined(CONFIG_ARCH_AT91CAP9) | ||
| 44 | #include <mach/at91cap9_ddrsdr.h> | ||
| 45 | |||
| 46 | static u32 saved_lpr; | ||
| 47 | |||
| 48 | static inline void sdram_selfrefresh_enable(void) | ||
| 49 | { | ||
| 50 | u32 lpr; | ||
| 51 | |||
| 52 | saved_lpr = at91_sys_read(AT91_DDRSDRC_LPR); | ||
| 53 | |||
| 54 | lpr = saved_lpr & ~AT91_DDRSDRC_LPCB; | ||
| 55 | at91_sys_write(AT91_DDRSDRC_LPR, lpr | AT91_DDRSDRC_LPCB_SELF_REFRESH); | ||
| 56 | } | ||
| 57 | |||
| 58 | #define sdram_selfrefresh_disable() at91_sys_write(AT91_DDRSDRC_LPR, saved_lpr) | ||
| 59 | |||
| 60 | #else | ||
| 61 | #include <mach/at91sam9_sdramc.h> | ||
| 62 | |||
| 63 | #ifdef CONFIG_ARCH_AT91SAM9263 | ||
| 64 | /* | ||
| 65 | * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use; | ||
| 66 | * handle those cases both here and in the Suspend-To-RAM support. | ||
| 67 | */ | ||
| 68 | #define AT91_SDRAMC AT91_SDRAMC0 | ||
| 69 | #warning Assuming EB1 SDRAM controller is *NOT* used | ||
| 70 | #endif | ||
| 71 | |||
| 72 | static u32 saved_lpr; | ||
| 73 | |||
| 74 | static inline void sdram_selfrefresh_enable(void) | ||
| 75 | { | ||
| 76 | u32 lpr; | ||
| 77 | |||
| 78 | saved_lpr = at91_sys_read(AT91_SDRAMC_LPR); | ||
| 79 | |||
| 80 | lpr = saved_lpr & ~AT91_SDRAMC_LPCB; | ||
| 81 | at91_sys_write(AT91_SDRAMC_LPR, lpr | AT91_SDRAMC_LPCB_SELF_REFRESH); | ||
| 82 | } | ||
| 83 | |||
| 84 | #define sdram_selfrefresh_disable() at91_sys_write(AT91_SDRAMC_LPR, saved_lpr) | ||
| 85 | |||
| 86 | #endif | ||
| 87 | |||
| 88 | 33 | ||
| 89 | /* | 34 | /* |
| 90 | * Show the reason for the previous system reset. | 35 | * Show the reason for the previous system reset. |
| @@ -260,6 +205,7 @@ extern u32 at91_slow_clock_sz; | |||
| 260 | 205 | ||
| 261 | static int at91_pm_enter(suspend_state_t state) | 206 | static int at91_pm_enter(suspend_state_t state) |
| 262 | { | 207 | { |
| 208 | u32 saved_lpr; | ||
| 263 | at91_gpio_suspend(); | 209 | at91_gpio_suspend(); |
| 264 | at91_irq_suspend(); | 210 | at91_irq_suspend(); |
| 265 | 211 | ||
| @@ -315,9 +261,9 @@ static int at91_pm_enter(suspend_state_t state) | |||
| 315 | */ | 261 | */ |
| 316 | asm("b 1f; .align 5; 1:"); | 262 | asm("b 1f; .align 5; 1:"); |
| 317 | asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */ | 263 | asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */ |
| 318 | sdram_selfrefresh_enable(); | 264 | saved_lpr = sdram_selfrefresh_enable(); |
| 319 | asm("mcr p15, 0, r0, c7, c0, 4"); /* wait for interrupt */ | 265 | asm("mcr p15, 0, r0, c7, c0, 4"); /* wait for interrupt */ |
| 320 | sdram_selfrefresh_disable(); | 266 | sdram_selfrefresh_disable(saved_lpr); |
| 321 | break; | 267 | break; |
| 322 | 268 | ||
| 323 | case PM_SUSPEND_ON: | 269 | case PM_SUSPEND_ON: |
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h new file mode 100644 index 00000000000..08322c44df1 --- /dev/null +++ b/arch/arm/mach-at91/pm.h | |||
| @@ -0,0 +1,67 @@ | |||
| 1 | #ifdef CONFIG_ARCH_AT91RM9200 | ||
| 2 | #include <mach/at91rm9200_mc.h> | ||
| 3 | |||
| 4 | /* | ||
| 5 | * The AT91RM9200 goes into self-refresh mode with this command, and will | ||
| 6 | * terminate self-refresh automatically on the next SDRAM access. | ||
| 7 | * | ||
| 8 | * Self-refresh mode is exited as soon as a memory access is made, but we don't | ||
| 9 | * know for sure when that happens. However, we need to restore the low-power | ||
| 10 | * mode if it was enabled before going idle. Restoring low-power mode while | ||
| 11 | * still in self-refresh is "not recommended", but seems to work. | ||
| 12 | */ | ||
| 13 | |||
| 14 | static inline u32 sdram_selfrefresh_enable(void) | ||
| 15 | { | ||
| 16 | u32 saved_lpr = at91_sys_read(AT91_SDRAMC_LPR); | ||
| 17 | |||
| 18 | at91_sys_write(AT91_SDRAMC_LPR, 0); | ||
| 19 | at91_sys_write(AT91_SDRAMC_SRR, 1); | ||
| 20 | return saved_lpr; | ||
| 21 | } | ||
| 22 | |||
| 23 | #define sdram_selfrefresh_disable(saved_lpr) at91_sys_write(AT91_SDRAMC_LPR, saved_lpr) | ||
| 24 | |||
| 25 | #elif defined(CONFIG_ARCH_AT91CAP9) | ||
| 26 | #include <mach/at91cap9_ddrsdr.h> | ||
| 27 | |||
| 28 | |||
| 29 | static inline u32 sdram_selfrefresh_enable(void) | ||
| 30 | { | ||
| 31 | u32 saved_lpr, lpr; | ||
| 32 | |||
| 33 | saved_lpr = at91_sys_read(AT91_DDRSDRC_LPR); | ||
| 34 | |||
| 35 | lpr = saved_lpr & ~AT91_DDRSDRC_LPCB; | ||
| 36 | at91_sys_write(AT91_DDRSDRC_LPR, lpr | AT91_DDRSDRC_LPCB_SELF_REFRESH); | ||
| 37 | return saved_lpr; | ||
| 38 | } | ||
| 39 | |||
| 40 | #define sdram_selfrefresh_disable(saved_lpr) at91_sys_write(AT91_DDRSDRC_LPR, saved_lpr) | ||
| 41 | |||
| 42 | #else | ||
| 43 | #include <mach/at91sam9_sdramc.h> | ||
| 44 | |||
| 45 | #ifdef CONFIG_ARCH_AT91SAM9263 | ||
| 46 | /* | ||
| 47 | * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use; | ||
| 48 | * handle those cases both here and in the Suspend-To-RAM support. | ||
| 49 | */ | ||
| 50 | #define AT91_SDRAMC AT91_SDRAMC0 | ||
| 51 | #warning Assuming EB1 SDRAM controller is *NOT* used | ||
| 52 | #endif | ||
| 53 | |||
| 54 | static inline u32 sdram_selfrefresh_enable(void) | ||
| 55 | { | ||
| 56 | u32 saved_lpr, lpr; | ||
| 57 | |||
| 58 | saved_lpr = at91_sys_read(AT91_SDRAMC_LPR); | ||
| 59 | |||
| 60 | lpr = saved_lpr & ~AT91_SDRAMC_LPCB; | ||
| 61 | at91_sys_write(AT91_SDRAMC_LPR, lpr | AT91_SDRAMC_LPCB_SELF_REFRESH); | ||
| 62 | return saved_lpr; | ||
| 63 | } | ||
| 64 | |||
| 65 | #define sdram_selfrefresh_disable(saved_lpr) at91_sys_write(AT91_SDRAMC_LPR, saved_lpr) | ||
| 66 | |||
| 67 | #endif | ||
diff --git a/arch/arm/mach-bcmring/arch.c b/arch/arm/mach-bcmring/arch.c index 0da693b0f7e..fbe6fa02c88 100644 --- a/arch/arm/mach-bcmring/arch.c +++ b/arch/arm/mach-bcmring/arch.c | |||
| @@ -47,10 +47,6 @@ HW_DECLARE_SPINLOCK(gpio) | |||
| 47 | EXPORT_SYMBOL(bcmring_gpio_reg_lock); | 47 | EXPORT_SYMBOL(bcmring_gpio_reg_lock); |
| 48 | #endif | 48 | #endif |
| 49 | 49 | ||
| 50 | /* FIXME: temporary solution */ | ||
| 51 | #define BCM_SYSCTL_REBOOT_WARM 1 | ||
| 52 | #define CTL_BCM_REBOOT 112 | ||
| 53 | |||
| 54 | /* sysctl */ | 50 | /* sysctl */ |
| 55 | int bcmring_arch_warm_reboot; /* do a warm reboot on hard reset */ | 51 | int bcmring_arch_warm_reboot; /* do a warm reboot on hard reset */ |
| 56 | 52 | ||
| @@ -58,18 +54,16 @@ static struct ctl_table_header *bcmring_sysctl_header; | |||
| 58 | 54 | ||
| 59 | static struct ctl_table bcmring_sysctl_warm_reboot[] = { | 55 | static struct ctl_table bcmring_sysctl_warm_reboot[] = { |
| 60 | { | 56 | { |
| 61 | .ctl_name = BCM_SYSCTL_REBOOT_WARM, | ||
| 62 | .procname = "warm", | 57 | .procname = "warm", |
| 63 | .data = &bcmring_arch_warm_reboot, | 58 | .data = &bcmring_arch_warm_reboot, |
| 64 | .maxlen = sizeof(int), | 59 | .maxlen = sizeof(int), |
| 65 | .mode = 0644, | 60 | .mode = 0644, |
| 66 | .proc_handler = &proc_dointvec}, | 61 | .proc_handler = proc_dointvec}, |
| 67 | {} | 62 | {} |
| 68 | }; | 63 | }; |
| 69 | 64 | ||
| 70 | static struct ctl_table bcmring_sysctl_reboot[] = { | 65 | static struct ctl_table bcmring_sysctl_reboot[] = { |
| 71 | { | 66 | { |
| 72 | .ctl_name = CTL_BCM_REBOOT, | ||
| 73 | .procname = "reboot", | 67 | .procname = "reboot", |
| 74 | .mode = 0555, | 68 | .mode = 0555, |
| 75 | .child = bcmring_sysctl_warm_reboot}, | 69 | .child = bcmring_sysctl_warm_reboot}, |
diff --git a/arch/arm/mach-bcmring/include/mach/io.h b/arch/arm/mach-bcmring/include/mach/io.h index 4db0eff9035..dae5e9b166e 100644 --- a/arch/arm/mach-bcmring/include/mach/io.h +++ b/arch/arm/mach-bcmring/include/mach/io.h | |||
| @@ -23,34 +23,11 @@ | |||
| 23 | 23 | ||
| 24 | #define IO_SPACE_LIMIT 0xffffffff | 24 | #define IO_SPACE_LIMIT 0xffffffff |
| 25 | 25 | ||
| 26 | #define __io(a) ((void __iomem *)HW_IO_PHYS_TO_VIRT(a)) | 26 | /* |
| 27 | 27 | * We don't actually have real ISA nor PCI buses, but there is so many | |
| 28 | /* Do not enable mem_pci for a big endian arm architecture or unexpected byteswaps will */ | 28 | * drivers out there that might just work if we fake them... |
| 29 | /* happen in readw/writew etc. */ | 29 | */ |
| 30 | 30 | #define __io(a) __typesafe_io(a) | |
| 31 | #define readb(c) __raw_readb(c) | 31 | #define __mem_pci(a) (a) |
| 32 | #define readw(c) __raw_readw(c) | ||
| 33 | #define readl(c) __raw_readl(c) | ||
| 34 | #define readb_relaxed(addr) readb(addr) | ||
| 35 | #define readw_relaxed(addr) readw(addr) | ||
| 36 | #define readl_relaxed(addr) readl(addr) | ||
| 37 | |||
| 38 | #define readsb(p, d, l) __raw_readsb(p, d, l) | ||
| 39 | #define readsw(p, d, l) __raw_readsw(p, d, l) | ||
| 40 | #define readsl(p, d, l) __raw_readsl(p, d, l) | ||
| 41 | |||
| 42 | #define writeb(v, c) __raw_writeb(v, c) | ||
| 43 | #define writew(v, c) __raw_writew(v, c) | ||
| 44 | #define writel(v, c) __raw_writel(v, c) | ||
| 45 | |||
| 46 | #define writesb(p, d, l) __raw_writesb(p, d, l) | ||
| 47 | #define writesw(p, d, l) __raw_writesw(p, d, l) | ||
| 48 | #define writesl(p, d, l) __raw_writesl(p, d, l) | ||
| 49 | |||
| 50 | #define memset_io(c, v, l) _memset_io((c), (v), (l)) | ||
| 51 | #define memcpy_fromio(a, c, l) _memcpy_fromio((a), (c), (l)) | ||
| 52 | #define memcpy_toio(c, a, l) _memcpy_toio((c), (a), (l)) | ||
| 53 | |||
| 54 | #define eth_io_copy_and_sum(s, c, l, b) eth_copy_and_sum((s), (c), (l), (b)) | ||
| 55 | 32 | ||
| 56 | #endif | 33 | #endif |
diff --git a/arch/arm/mach-davinci/include/mach/asp.h b/arch/arm/mach-davinci/include/mach/asp.h index 18e4ce34ece..e07f70ed7c5 100644 --- a/arch/arm/mach-davinci/include/mach/asp.h +++ b/arch/arm/mach-davinci/include/mach/asp.h | |||
| @@ -51,6 +51,14 @@ struct snd_platform_data { | |||
| 51 | u32 rx_dma_offset; | 51 | u32 rx_dma_offset; |
| 52 | enum dma_event_q eventq_no; /* event queue number */ | 52 | enum dma_event_q eventq_no; /* event queue number */ |
| 53 | unsigned int codec_fmt; | 53 | unsigned int codec_fmt; |
| 54 | /* | ||
| 55 | * Allowing this is more efficient and eliminates left and right swaps | ||
| 56 | * caused by underruns, but will swap the left and right channels | ||
| 57 | * when compared to previous behavior. | ||
| 58 | */ | ||
| 59 | unsigned enable_channel_combine:1; | ||
| 60 | unsigned sram_size_playback; | ||
| 61 | unsigned sram_size_capture; | ||
| 54 | 62 | ||
| 55 | /* McASP specific fields */ | 63 | /* McASP specific fields */ |
| 56 | int tdm_slots; | 64 | int tdm_slots; |
diff --git a/arch/arm/mach-dove/Kconfig b/arch/arm/mach-dove/Kconfig new file mode 100644 index 00000000000..3b9a32ace90 --- /dev/null +++ b/arch/arm/mach-dove/Kconfig | |||
| @@ -0,0 +1,14 @@ | |||
| 1 | if ARCH_DOVE | ||
| 2 | |||
| 3 | menu "Marvell Dove Implementations" | ||
| 4 | |||
| 5 | config MACH_DOVE_DB | ||
| 6 | bool "Marvell DB-MV88AP510 Development Board" | ||
| 7 | select I2C_BOARDINFO | ||
| 8 | help | ||
| 9 | Say 'Y' here if you want your kernel to support the | ||
| 10 | Marvell DB-MV88AP510 Development Board. | ||
| 11 | |||
| 12 | endmenu | ||
| 13 | |||
| 14 | endif | ||
diff --git a/arch/arm/mach-dove/Makefile b/arch/arm/mach-dove/Makefile new file mode 100644 index 00000000000..7ab3be53f64 --- /dev/null +++ b/arch/arm/mach-dove/Makefile | |||
| @@ -0,0 +1,3 @@ | |||
| 1 | obj-y += common.o addr-map.o irq.o pcie.o | ||
| 2 | |||
| 3 | obj-$(CONFIG_MACH_DOVE_DB) += dove-db-setup.o | ||
diff --git a/arch/arm/mach-dove/Makefile.boot b/arch/arm/mach-dove/Makefile.boot new file mode 100644 index 00000000000..67039c3e0c4 --- /dev/null +++ b/arch/arm/mach-dove/Makefile.boot | |||
| @@ -0,0 +1,3 @@ | |||
| 1 | zreladdr-y := 0x00008000 | ||
| 2 | params_phys-y := 0x00000100 | ||
| 3 | initrd_phys-y := 0x00800000 | ||
diff --git a/arch/arm/mach-dove/addr-map.c b/arch/arm/mach-dove/addr-map.c new file mode 100644 index 00000000000..00be4fc26dd --- /dev/null +++ b/arch/arm/mach-dove/addr-map.c | |||
| @@ -0,0 +1,149 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-dove/addr-map.c | ||
| 3 | * | ||
| 4 | * Address map functions for Marvell Dove 88AP510 SoC | ||
| 5 | * | ||
| 6 | * This file is licensed under the terms of the GNU General Public | ||
| 7 | * License version 2. This program is licensed "as is" without any | ||
| 8 | * warranty of any kind, whether express or implied. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/kernel.h> | ||
| 12 | #include <linux/init.h> | ||
| 13 | #include <linux/mbus.h> | ||
| 14 | #include <linux/io.h> | ||
| 15 | #include <asm/mach/arch.h> | ||
| 16 | #include <asm/setup.h> | ||
| 17 | #include "common.h" | ||
| 18 | |||
| 19 | /* | ||
| 20 | * Generic Address Decode Windows bit settings | ||
| 21 | */ | ||
| 22 | #define TARGET_DDR 0x0 | ||
| 23 | #define TARGET_BOOTROM 0x1 | ||
| 24 | #define TARGET_CESA 0x3 | ||
| 25 | #define TARGET_PCIE0 0x4 | ||
| 26 | #define TARGET_PCIE1 0x8 | ||
| 27 | #define TARGET_SCRATCHPAD 0xd | ||
| 28 | |||
| 29 | #define ATTR_CESA 0x01 | ||
| 30 | #define ATTR_BOOTROM 0xfd | ||
| 31 | #define ATTR_DEV_SPI0_ROM 0xfe | ||
| 32 | #define ATTR_DEV_SPI1_ROM 0xfb | ||
| 33 | #define ATTR_PCIE_IO 0xe0 | ||
| 34 | #define ATTR_PCIE_MEM 0xe8 | ||
| 35 | #define ATTR_SCRATCHPAD 0x0 | ||
| 36 | |||
| 37 | /* | ||
| 38 | * CPU Address Decode Windows registers | ||
| 39 | */ | ||
| 40 | #define WIN_CTRL(n) (BRIDGE_VIRT_BASE + ((n) << 4) + 0x0) | ||
| 41 | #define WIN_BASE(n) (BRIDGE_VIRT_BASE + ((n) << 4) + 0x4) | ||
| 42 | #define WIN_REMAP_LO(n) (BRIDGE_VIRT_BASE + ((n) << 4) + 0x8) | ||
| 43 | #define WIN_REMAP_HI(n) (BRIDGE_VIRT_BASE + ((n) << 4) + 0xc) | ||
| 44 | |||
| 45 | struct mbus_dram_target_info dove_mbus_dram_info; | ||
| 46 | |||
| 47 | static inline void __iomem *ddr_map_sc(int i) | ||
| 48 | { | ||
| 49 | return (void __iomem *)(DOVE_MC_VIRT_BASE + 0x100 + ((i) << 4)); | ||
| 50 | } | ||
| 51 | |||
| 52 | static int cpu_win_can_remap(int win) | ||
| 53 | { | ||
| 54 | if (win < 4) | ||
| 55 | return 1; | ||
| 56 | |||
| 57 | return 0; | ||
| 58 | } | ||
| 59 | |||
| 60 | static void __init setup_cpu_win(int win, u32 base, u32 size, | ||
| 61 | u8 target, u8 attr, int remap) | ||
| 62 | { | ||
| 63 | u32 ctrl; | ||
| 64 | |||
| 65 | base &= 0xffff0000; | ||
| 66 | ctrl = ((size - 1) & 0xffff0000) | (attr << 8) | (target << 4) | 1; | ||
| 67 | |||
| 68 | writel(base, WIN_BASE(win)); | ||
| 69 | writel(ctrl, WIN_CTRL(win)); | ||
| 70 | if (cpu_win_can_remap(win)) { | ||
| 71 | if (remap < 0) | ||
| 72 | remap = base; | ||
| 73 | writel(remap & 0xffff0000, WIN_REMAP_LO(win)); | ||
| 74 | writel(0, WIN_REMAP_HI(win)); | ||
| 75 | } | ||
| 76 | } | ||
| 77 | |||
| 78 | void __init dove_setup_cpu_mbus(void) | ||
| 79 | { | ||
| 80 | int i; | ||
| 81 | int cs; | ||
| 82 | |||
| 83 | /* | ||
| 84 | * First, disable and clear windows. | ||
| 85 | */ | ||
| 86 | for (i = 0; i < 8; i++) { | ||
| 87 | writel(0, WIN_BASE(i)); | ||
| 88 | writel(0, WIN_CTRL(i)); | ||
| 89 | if (cpu_win_can_remap(i)) { | ||
| 90 | writel(0, WIN_REMAP_LO(i)); | ||
| 91 | writel(0, WIN_REMAP_HI(i)); | ||
| 92 | } | ||
| 93 | } | ||
| 94 | |||
| 95 | /* | ||
| 96 | * Setup windows for PCIe IO+MEM space. | ||
| 97 | */ | ||
| 98 | setup_cpu_win(0, DOVE_PCIE0_IO_PHYS_BASE, DOVE_PCIE0_IO_SIZE, | ||
| 99 | TARGET_PCIE0, ATTR_PCIE_IO, DOVE_PCIE0_IO_BUS_BASE); | ||
| 100 | setup_cpu_win(1, DOVE_PCIE1_IO_PHYS_BASE, DOVE_PCIE1_IO_SIZE, | ||
| 101 | TARGET_PCIE1, ATTR_PCIE_IO, DOVE_PCIE1_IO_BUS_BASE); | ||
| 102 | setup_cpu_win(2, DOVE_PCIE0_MEM_PHYS_BASE, DOVE_PCIE0_MEM_SIZE, | ||
| 103 | TARGET_PCIE0, ATTR_PCIE_MEM, -1); | ||
| 104 | setup_cpu_win(3, DOVE_PCIE1_MEM_PHYS_BASE, DOVE_PCIE1_MEM_SIZE, | ||
| 105 | TARGET_PCIE1, ATTR_PCIE_MEM, -1); | ||
| 106 | |||
| 107 | /* | ||
| 108 | * Setup window for CESA engine. | ||
| 109 | */ | ||
| 110 | setup_cpu_win(4, DOVE_CESA_PHYS_BASE, DOVE_CESA_SIZE, | ||
| 111 | TARGET_CESA, ATTR_CESA, -1); | ||
| 112 | |||
| 113 | /* | ||
| 114 | * Setup the Window to the BootROM for Standby and Sleep Resume | ||
| 115 | */ | ||
| 116 | setup_cpu_win(5, DOVE_BOOTROM_PHYS_BASE, DOVE_BOOTROM_SIZE, | ||
| 117 | TARGET_BOOTROM, ATTR_BOOTROM, -1); | ||
| 118 | |||
| 119 | /* | ||
| 120 | * Setup the Window to the PMU Scratch Pad space | ||
| 121 | */ | ||
| 122 | setup_cpu_win(6, DOVE_SCRATCHPAD_PHYS_BASE, DOVE_SCRATCHPAD_SIZE, | ||
| 123 | TARGET_SCRATCHPAD, ATTR_SCRATCHPAD, -1); | ||
| 124 | |||
| 125 | /* | ||
| 126 | * Setup MBUS dram target info. | ||
| 127 | */ | ||
| 128 | dove_mbus_dram_info.mbus_dram_target_id = TARGET_DDR; | ||
| 129 | |||
| 130 | for (i = 0, cs = 0; i < 2; i++) { | ||
| 131 | u32 map = readl(ddr_map_sc(i)); | ||
| 132 | |||
| 133 | /* | ||
| 134 | * Chip select enabled? | ||
| 135 | */ | ||
| 136 | if (map & 1) { | ||
| 137 | struct mbus_dram_window *w; | ||
| 138 | |||
| 139 | w = &dove_mbus_dram_info.cs[cs++]; | ||
| 140 | w->cs_index = i; | ||
| 141 | w->mbus_attr = 0; /* CS address decoding done inside */ | ||
| 142 | /* the DDR controller, no need to */ | ||
| 143 | /* provide attributes */ | ||
| 144 | w->base = map & 0xff800000; | ||
| 145 | w->size = 0x100000 << (((map & 0x000f0000) >> 16) - 4); | ||
| 146 | } | ||
| 147 | } | ||
| 148 | dove_mbus_dram_info.num_cs = cs; | ||
| 149 | } | ||
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c new file mode 100644 index 00000000000..806972a68c8 --- /dev/null +++ b/arch/arm/mach-dove/common.c | |||
| @@ -0,0 +1,781 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-dove/common.c | ||
| 3 | * | ||
| 4 | * Core functions for Marvell Dove 88AP510 System On Chip | ||
| 5 | * | ||
| 6 | * This file is licensed under the terms of the GNU General Public | ||
| 7 | * License version 2. This program is licensed "as is" without any | ||
| 8 | * warranty of any kind, whether express or implied. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/kernel.h> | ||
| 12 | #include <linux/delay.h> | ||
| 13 | #include <linux/init.h> | ||
| 14 | #include <linux/platform_device.h> | ||
| 15 | #include <linux/pci.h> | ||
| 16 | #include <linux/serial_8250.h> | ||
| 17 | #include <linux/clk.h> | ||
| 18 | #include <linux/mbus.h> | ||
| 19 | #include <linux/mv643xx_eth.h> | ||
| 20 | #include <linux/mv643xx_i2c.h> | ||
| 21 | #include <linux/ata_platform.h> | ||
| 22 | #include <linux/spi/orion_spi.h> | ||
| 23 | #include <linux/gpio.h> | ||
| 24 | #include <asm/page.h> | ||
| 25 | #include <asm/setup.h> | ||
| 26 | #include <asm/timex.h> | ||
| 27 | #include <asm/hardware/cache-tauros2.h> | ||
| 28 | #include <asm/mach/map.h> | ||
| 29 | #include <asm/mach/time.h> | ||
| 30 | #include <asm/mach/pci.h> | ||
| 31 | #include <mach/dove.h> | ||
| 32 | #include <mach/bridge-regs.h> | ||
| 33 | #include <asm/mach/arch.h> | ||
| 34 | #include <linux/irq.h> | ||
| 35 | #include <plat/mv_xor.h> | ||
| 36 | #include <plat/ehci-orion.h> | ||
| 37 | #include <plat/time.h> | ||
| 38 | #include "common.h" | ||
| 39 | |||
| 40 | /***************************************************************************** | ||
| 41 | * I/O Address Mapping | ||
| 42 | ****************************************************************************/ | ||
| 43 | static struct map_desc dove_io_desc[] __initdata = { | ||
| 44 | { | ||
| 45 | .virtual = DOVE_SB_REGS_VIRT_BASE, | ||
| 46 | .pfn = __phys_to_pfn(DOVE_SB_REGS_PHYS_BASE), | ||
| 47 | .length = DOVE_SB_REGS_SIZE, | ||
| 48 | .type = MT_DEVICE, | ||
| 49 | }, { | ||
| 50 | .virtual = DOVE_NB_REGS_VIRT_BASE, | ||
| 51 | .pfn = __phys_to_pfn(DOVE_NB_REGS_PHYS_BASE), | ||
| 52 | .length = DOVE_NB_REGS_SIZE, | ||
| 53 | .type = MT_DEVICE, | ||
| 54 | }, { | ||
| 55 | .virtual = DOVE_PCIE0_IO_VIRT_BASE, | ||
| 56 | .pfn = __phys_to_pfn(DOVE_PCIE0_IO_PHYS_BASE), | ||
| 57 | .length = DOVE_PCIE0_IO_SIZE, | ||
| 58 | .type = MT_DEVICE, | ||
| 59 | }, { | ||
| 60 | .virtual = DOVE_PCIE1_IO_VIRT_BASE, | ||
| 61 | .pfn = __phys_to_pfn(DOVE_PCIE1_IO_PHYS_BASE), | ||
| 62 | .length = DOVE_PCIE1_IO_SIZE, | ||
| 63 | .type = MT_DEVICE, | ||
| 64 | }, | ||
| 65 | }; | ||
| 66 | |||
| 67 | void __init dove_map_io(void) | ||
| 68 | { | ||
| 69 | iotable_init(dove_io_desc, ARRAY_SIZE(dove_io_desc)); | ||
| 70 | } | ||
| 71 | |||
| 72 | /***************************************************************************** | ||
| 73 | * EHCI | ||
| 74 | ****************************************************************************/ | ||
| 75 | static struct orion_ehci_data dove_ehci_data = { | ||
| 76 | .dram = &dove_mbus_dram_info, | ||
| 77 | .phy_version = EHCI_PHY_NA, | ||
| 78 | }; | ||
| 79 | |||
| 80 | static u64 ehci_dmamask = DMA_BIT_MASK(32); | ||
| 81 | |||
| 82 | /***************************************************************************** | ||
| 83 | * EHCI0 | ||
| 84 | ****************************************************************************/ | ||
| 85 | static struct resource dove_ehci0_resources[] = { | ||
| 86 | { | ||
| 87 | .start = DOVE_USB0_PHYS_BASE, | ||
| 88 | .end = DOVE_USB0_PHYS_BASE + SZ_4K - 1, | ||
| 89 | .flags = IORESOURCE_MEM, | ||
| 90 | }, { | ||
| 91 | .start = IRQ_DOVE_USB0, | ||
| 92 | .end = IRQ_DOVE_USB0, | ||
| 93 | .flags = IORESOURCE_IRQ, | ||
| 94 | }, | ||
| 95 | }; | ||
| 96 | |||
| 97 | static struct platform_device dove_ehci0 = { | ||
| 98 | .name = "orion-ehci", | ||
| 99 | .id = 0, | ||
| 100 | .dev = { | ||
| 101 | .dma_mask = &ehci_dmamask, | ||
| 102 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 103 | .platform_data = &dove_ehci_data, | ||
| 104 | }, | ||
| 105 | .resource = dove_ehci0_resources, | ||
| 106 | .num_resources = ARRAY_SIZE(dove_ehci0_resources), | ||
| 107 | }; | ||
| 108 | |||
| 109 | void __init dove_ehci0_init(void) | ||
| 110 | { | ||
| 111 | platform_device_register(&dove_ehci0); | ||
| 112 | } | ||
| 113 | |||
| 114 | /***************************************************************************** | ||
| 115 | * EHCI1 | ||
| 116 | ****************************************************************************/ | ||
| 117 | static struct resource dove_ehci1_resources[] = { | ||
| 118 | { | ||
| 119 | .start = DOVE_USB1_PHYS_BASE, | ||
| 120 | .end = DOVE_USB1_PHYS_BASE + SZ_4K - 1, | ||
| 121 | .flags = IORESOURCE_MEM, | ||
| 122 | }, { | ||
| 123 | .start = IRQ_DOVE_USB1, | ||
| 124 | .end = IRQ_DOVE_USB1, | ||
| 125 | .flags = IORESOURCE_IRQ, | ||
| 126 | }, | ||
| 127 | }; | ||
| 128 | |||
| 129 | static struct platform_device dove_ehci1 = { | ||
| 130 | .name = "orion-ehci", | ||
| 131 | .id = 1, | ||
| 132 | .dev = { | ||
| 133 | .dma_mask = &ehci_dmamask, | ||
| 134 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 135 | .platform_data = &dove_ehci_data, | ||
| 136 | }, | ||
| 137 | .resource = dove_ehci1_resources, | ||
| 138 | .num_resources = ARRAY_SIZE(dove_ehci1_resources), | ||
| 139 | }; | ||
| 140 | |||
| 141 | void __init dove_ehci1_init(void) | ||
| 142 | { | ||
| 143 | platform_device_register(&dove_ehci1); | ||
| 144 | } | ||
| 145 | |||
| 146 | /***************************************************************************** | ||
| 147 | * GE00 | ||
| 148 | ****************************************************************************/ | ||
| 149 | struct mv643xx_eth_shared_platform_data dove_ge00_shared_data = { | ||
| 150 | .t_clk = 0, | ||
| 151 | .dram = &dove_mbus_dram_info, | ||
| 152 | }; | ||
| 153 | |||
| 154 | static struct resource dove_ge00_shared_resources[] = { | ||
| 155 | { | ||
| 156 | .name = "ge00 base", | ||
| 157 | .start = DOVE_GE00_PHYS_BASE + 0x2000, | ||
| 158 | .end = DOVE_GE00_PHYS_BASE + SZ_16K - 1, | ||
| 159 | .flags = IORESOURCE_MEM, | ||
| 160 | }, | ||
| 161 | }; | ||
| 162 | |||
| 163 | static struct platform_device dove_ge00_shared = { | ||
| 164 | .name = MV643XX_ETH_SHARED_NAME, | ||
| 165 | .id = 0, | ||
| 166 | .dev = { | ||
| 167 | .platform_data = &dove_ge00_shared_data, | ||
| 168 | }, | ||
| 169 | .num_resources = 1, | ||
| 170 | .resource = dove_ge00_shared_resources, | ||
| 171 | }; | ||
| 172 | |||
| 173 | static struct resource dove_ge00_resources[] = { | ||
| 174 | { | ||
| 175 | .name = "ge00 irq", | ||
| 176 | .start = IRQ_DOVE_GE00_SUM, | ||
| 177 | .end = IRQ_DOVE_GE00_SUM, | ||
| 178 | .flags = IORESOURCE_IRQ, | ||
| 179 | }, | ||
| 180 | }; | ||
| 181 | |||
| 182 | static struct platform_device dove_ge00 = { | ||
| 183 | .name = MV643XX_ETH_NAME, | ||
| 184 | .id = 0, | ||
| 185 | .num_resources = 1, | ||
| 186 | .resource = dove_ge00_resources, | ||
| 187 | .dev = { | ||
| 188 | .coherent_dma_mask = 0xffffffff, | ||
| 189 | }, | ||
| 190 | }; | ||
| 191 | |||
| 192 | void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data) | ||
| 193 | { | ||
| 194 | eth_data->shared = &dove_ge00_shared; | ||
| 195 | dove_ge00.dev.platform_data = eth_data; | ||
| 196 | |||
| 197 | platform_device_register(&dove_ge00_shared); | ||
| 198 | platform_device_register(&dove_ge00); | ||
| 199 | } | ||
| 200 | |||
| 201 | /***************************************************************************** | ||
| 202 | * SoC RTC | ||
| 203 | ****************************************************************************/ | ||
| 204 | static struct resource dove_rtc_resource[] = { | ||
| 205 | { | ||
| 206 | .start = DOVE_RTC_PHYS_BASE, | ||
| 207 | .end = DOVE_RTC_PHYS_BASE + 32 - 1, | ||
| 208 | .flags = IORESOURCE_MEM, | ||
| 209 | }, { | ||
| 210 | .start = IRQ_DOVE_RTC, | ||
| 211 | .flags = IORESOURCE_IRQ, | ||
| 212 | } | ||
| 213 | }; | ||
| 214 | |||
| 215 | void __init dove_rtc_init(void) | ||
| 216 | { | ||
| 217 | platform_device_register_simple("rtc-mv", -1, dove_rtc_resource, 2); | ||
| 218 | } | ||
| 219 | |||
| 220 | /***************************************************************************** | ||
| 221 | * SATA | ||
| 222 | ****************************************************************************/ | ||
| 223 | static struct resource dove_sata_resources[] = { | ||
| 224 | { | ||
| 225 | .name = "sata base", | ||
| 226 | .start = DOVE_SATA_PHYS_BASE, | ||
| 227 | .end = DOVE_SATA_PHYS_BASE + 0x5000 - 1, | ||
| 228 | .flags = IORESOURCE_MEM, | ||
| 229 | }, { | ||
| 230 | .name = "sata irq", | ||
| 231 | .start = IRQ_DOVE_SATA, | ||
| 232 | .end = IRQ_DOVE_SATA, | ||
| 233 | .flags = IORESOURCE_IRQ, | ||
| 234 | }, | ||
| 235 | }; | ||
| 236 | |||
| 237 | static struct platform_device dove_sata = { | ||
| 238 | .name = "sata_mv", | ||
| 239 | .id = 0, | ||
| 240 | .dev = { | ||
| 241 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 242 | }, | ||
| 243 | .num_resources = ARRAY_SIZE(dove_sata_resources), | ||
| 244 | .resource = dove_sata_resources, | ||
| 245 | }; | ||
| 246 | |||
| 247 | void __init dove_sata_init(struct mv_sata_platform_data *sata_data) | ||
| 248 | { | ||
| 249 | sata_data->dram = &dove_mbus_dram_info; | ||
| 250 | dove_sata.dev.platform_data = sata_data; | ||
| 251 | platform_device_register(&dove_sata); | ||
| 252 | } | ||
| 253 | |||
| 254 | /***************************************************************************** | ||
| 255 | * UART0 | ||
| 256 | ****************************************************************************/ | ||
| 257 | static struct plat_serial8250_port dove_uart0_data[] = { | ||
| 258 | { | ||
| 259 | .mapbase = DOVE_UART0_PHYS_BASE, | ||
| 260 | .membase = (char *)DOVE_UART0_VIRT_BASE, | ||
| 261 | .irq = IRQ_DOVE_UART_0, | ||
| 262 | .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, | ||
| 263 | .iotype = UPIO_MEM, | ||
| 264 | .regshift = 2, | ||
| 265 | .uartclk = 0, | ||
| 266 | }, { | ||
| 267 | }, | ||
| 268 | }; | ||
| 269 | |||
| 270 | static struct resource dove_uart0_resources[] = { | ||
| 271 | { | ||
| 272 | .start = DOVE_UART0_PHYS_BASE, | ||
| 273 | .end = DOVE_UART0_PHYS_BASE + SZ_256 - 1, | ||
| 274 | .flags = IORESOURCE_MEM, | ||
| 275 | }, { | ||
| 276 | .start = IRQ_DOVE_UART_0, | ||
| 277 | .end = IRQ_DOVE_UART_0, | ||
| 278 | .flags = IORESOURCE_IRQ, | ||
| 279 | }, | ||
| 280 | }; | ||
| 281 | |||
| 282 | static struct platform_device dove_uart0 = { | ||
| 283 | .name = "serial8250", | ||
| 284 | .id = 0, | ||
| 285 | .dev = { | ||
| 286 | .platform_data = dove_uart0_data, | ||
| 287 | }, | ||
| 288 | .resource = dove_uart0_resources, | ||
| 289 | .num_resources = ARRAY_SIZE(dove_uart0_resources), | ||
| 290 | }; | ||
| 291 | |||
| 292 | void __init dove_uart0_init(void) | ||
| 293 | { | ||
| 294 | platform_device_register(&dove_uart0); | ||
| 295 | } | ||
| 296 | |||
| 297 | /***************************************************************************** | ||
| 298 | * UART1 | ||
| 299 | ****************************************************************************/ | ||
| 300 | static struct plat_serial8250_port dove_uart1_data[] = { | ||
| 301 | { | ||
| 302 | .mapbase = DOVE_UART1_PHYS_BASE, | ||
| 303 | .membase = (char *)DOVE_UART1_VIRT_BASE, | ||
| 304 | .irq = IRQ_DOVE_UART_1, | ||
| 305 | .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, | ||
| 306 | .iotype = UPIO_MEM, | ||
| 307 | .regshift = 2, | ||
| 308 | .uartclk = 0, | ||
| 309 | }, { | ||
| 310 | }, | ||
| 311 | }; | ||
| 312 | |||
| 313 | static struct resource dove_uart1_resources[] = { | ||
| 314 | { | ||
| 315 | .start = DOVE_UART1_PHYS_BASE, | ||
| 316 | .end = DOVE_UART1_PHYS_BASE + SZ_256 - 1, | ||
| 317 | .flags = IORESOURCE_MEM, | ||
| 318 | }, { | ||
| 319 | .start = IRQ_DOVE_UART_1, | ||
| 320 | .end = IRQ_DOVE_UART_1, | ||
| 321 | .flags = IORESOURCE_IRQ, | ||
| 322 | }, | ||
| 323 | }; | ||
| 324 | |||
| 325 | static struct platform_device dove_uart1 = { | ||
| 326 | .name = "serial8250", | ||
| 327 | .id = 1, | ||
| 328 | .dev = { | ||
| 329 | .platform_data = dove_uart1_data, | ||
| 330 | }, | ||
| 331 | .resource = dove_uart1_resources, | ||
| 332 | .num_resources = ARRAY_SIZE(dove_uart1_resources), | ||
| 333 | }; | ||
| 334 | |||
| 335 | void __init dove_uart1_init(void) | ||
| 336 | { | ||
| 337 | platform_device_register(&dove_uart1); | ||
| 338 | } | ||
| 339 | |||
| 340 | /***************************************************************************** | ||
| 341 | * UART2 | ||
| 342 | ****************************************************************************/ | ||
| 343 | static struct plat_serial8250_port dove_uart2_data[] = { | ||
| 344 | { | ||
| 345 | .mapbase = DOVE_UART2_PHYS_BASE, | ||
| 346 | .membase = (char *)DOVE_UART2_VIRT_BASE, | ||
| 347 | .irq = IRQ_DOVE_UART_2, | ||
| 348 | .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, | ||
| 349 | .iotype = UPIO_MEM, | ||
| 350 | .regshift = 2, | ||
| 351 | .uartclk = 0, | ||
| 352 | }, { | ||
| 353 | }, | ||
| 354 | }; | ||
| 355 | |||
| 356 | static struct resource dove_uart2_resources[] = { | ||
| 357 | { | ||
| 358 | .start = DOVE_UART2_PHYS_BASE, | ||
| 359 | .end = DOVE_UART2_PHYS_BASE + SZ_256 - 1, | ||
| 360 | .flags = IORESOURCE_MEM, | ||
| 361 | }, { | ||
| 362 | .start = IRQ_DOVE_UART_2, | ||
| 363 | .end = IRQ_DOVE_UART_2, | ||
| 364 | .flags = IORESOURCE_IRQ, | ||
| 365 | }, | ||
| 366 | }; | ||
| 367 | |||
| 368 | static struct platform_device dove_uart2 = { | ||
| 369 | .name = "serial8250", | ||
| 370 | .id = 2, | ||
| 371 | .dev = { | ||
| 372 | .platform_data = dove_uart2_data, | ||
| 373 | }, | ||
| 374 | .resource = dove_uart2_resources, | ||
| 375 | .num_resources = ARRAY_SIZE(dove_uart2_resources), | ||
| 376 | }; | ||
| 377 | |||
| 378 | void __init dove_uart2_init(void) | ||
| 379 | { | ||
| 380 | platform_device_register(&dove_uart2); | ||
| 381 | } | ||
| 382 | |||
| 383 | /***************************************************************************** | ||
| 384 | * UART3 | ||
| 385 | ****************************************************************************/ | ||
| 386 | static struct plat_serial8250_port dove_uart3_data[] = { | ||
| 387 | { | ||
| 388 | .mapbase = DOVE_UART3_PHYS_BASE, | ||
| 389 | .membase = (char *)DOVE_UART3_VIRT_BASE, | ||
| 390 | .irq = IRQ_DOVE_UART_3, | ||
| 391 | .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, | ||
| 392 | .iotype = UPIO_MEM, | ||
| 393 | .regshift = 2, | ||
| 394 | .uartclk = 0, | ||
| 395 | }, { | ||
| 396 | }, | ||
| 397 | }; | ||
| 398 | |||
| 399 | static struct resource dove_uart3_resources[] = { | ||
| 400 | { | ||
| 401 | .start = DOVE_UART3_PHYS_BASE, | ||
| 402 | .end = DOVE_UART3_PHYS_BASE + SZ_256 - 1, | ||
| 403 | .flags = IORESOURCE_MEM, | ||
| 404 | }, { | ||
| 405 | .start = IRQ_DOVE_UART_3, | ||
| 406 | .end = IRQ_DOVE_UART_3, | ||
| 407 | .flags = IORESOURCE_IRQ, | ||
| 408 | }, | ||
| 409 | }; | ||
| 410 | |||
| 411 | static struct platform_device dove_uart3 = { | ||
| 412 | .name = "serial8250", | ||
| 413 | .id = 3, | ||
| 414 | .dev = { | ||
| 415 | .platform_data = dove_uart3_data, | ||
| 416 | }, | ||
| 417 | .resource = dove_uart3_resources, | ||
| 418 | .num_resources = ARRAY_SIZE(dove_uart3_resources), | ||
| 419 | }; | ||
| 420 | |||
| 421 | void __init dove_uart3_init(void) | ||
| 422 | { | ||
| 423 | platform_device_register(&dove_uart3); | ||
| 424 | } | ||
| 425 | |||
| 426 | /***************************************************************************** | ||
| 427 | * SPI0 | ||
| 428 | ****************************************************************************/ | ||
| 429 | static struct orion_spi_info dove_spi0_data = { | ||
| 430 | .tclk = 0, | ||
| 431 | }; | ||
| 432 | |||
| 433 | static struct resource dove_spi0_resources[] = { | ||
| 434 | { | ||
| 435 | .start = DOVE_SPI0_PHYS_BASE, | ||
| 436 | .end = DOVE_SPI0_PHYS_BASE + SZ_512 - 1, | ||
| 437 | .flags = IORESOURCE_MEM, | ||
| 438 | }, { | ||
| 439 | .start = IRQ_DOVE_SPI0, | ||
| 440 | .end = IRQ_DOVE_SPI0, | ||
| 441 | .flags = IORESOURCE_IRQ, | ||
| 442 | }, | ||
| 443 | }; | ||
| 444 | |||
| 445 | static struct platform_device dove_spi0 = { | ||
| 446 | .name = "orion_spi", | ||
| 447 | .id = 0, | ||
| 448 | .resource = dove_spi0_resources, | ||
| 449 | .dev = { | ||
| 450 | .platform_data = &dove_spi0_data, | ||
| 451 | }, | ||
| 452 | .num_resources = ARRAY_SIZE(dove_spi0_resources), | ||
| 453 | }; | ||
| 454 | |||
| 455 | void __init dove_spi0_init(void) | ||
| 456 | { | ||
| 457 | platform_device_register(&dove_spi0); | ||
| 458 | } | ||
| 459 | |||
| 460 | /***************************************************************************** | ||
| 461 | * SPI1 | ||
| 462 | ****************************************************************************/ | ||
| 463 | static struct orion_spi_info dove_spi1_data = { | ||
| 464 | .tclk = 0, | ||
| 465 | }; | ||
| 466 | |||
| 467 | static struct resource dove_spi1_resources[] = { | ||
| 468 | { | ||
| 469 | .start = DOVE_SPI1_PHYS_BASE, | ||
| 470 | .end = DOVE_SPI1_PHYS_BASE + SZ_512 - 1, | ||
| 471 | .flags = IORESOURCE_MEM, | ||
| 472 | }, { | ||
| 473 | .start = IRQ_DOVE_SPI1, | ||
| 474 | .end = IRQ_DOVE_SPI1, | ||
| 475 | .flags = IORESOURCE_IRQ, | ||
| 476 | }, | ||
| 477 | }; | ||
| 478 | |||
| 479 | static struct platform_device dove_spi1 = { | ||
| 480 | .name = "orion_spi", | ||
| 481 | .id = 1, | ||
| 482 | .resource = dove_spi1_resources, | ||
| 483 | .dev = { | ||
| 484 | .platform_data = &dove_spi1_data, | ||
| 485 | }, | ||
| 486 | .num_resources = ARRAY_SIZE(dove_spi1_resources), | ||
| 487 | }; | ||
| 488 | |||
| 489 | void __init dove_spi1_init(void) | ||
| 490 | { | ||
| 491 | platform_device_register(&dove_spi1); | ||
| 492 | } | ||
| 493 | |||
| 494 | /***************************************************************************** | ||
| 495 | * I2C | ||
| 496 | ****************************************************************************/ | ||
| 497 | static struct mv64xxx_i2c_pdata dove_i2c_data = { | ||
| 498 | .freq_m = 10, /* assumes 166 MHz TCLK gets 94.3kHz */ | ||
| 499 | .freq_n = 3, | ||
| 500 | .timeout = 1000, /* Default timeout of 1 second */ | ||
| 501 | }; | ||
| 502 | |||
| 503 | static struct resource dove_i2c_resources[] = { | ||
| 504 | { | ||
| 505 | .name = "i2c base", | ||
| 506 | .start = DOVE_I2C_PHYS_BASE, | ||
| 507 | .end = DOVE_I2C_PHYS_BASE + 0x20 - 1, | ||
| 508 | .flags = IORESOURCE_MEM, | ||
| 509 | }, { | ||
| 510 | .name = "i2c irq", | ||
| 511 | .start = IRQ_DOVE_I2C, | ||
| 512 | .end = IRQ_DOVE_I2C, | ||
| 513 | .flags = IORESOURCE_IRQ, | ||
| 514 | }, | ||
| 515 | }; | ||
| 516 | |||
| 517 | static struct platform_device dove_i2c = { | ||
| 518 | .name = MV64XXX_I2C_CTLR_NAME, | ||
| 519 | .id = 0, | ||
| 520 | .num_resources = ARRAY_SIZE(dove_i2c_resources), | ||
| 521 | .resource = dove_i2c_resources, | ||
| 522 | .dev = { | ||
| 523 | .platform_data = &dove_i2c_data, | ||
| 524 | }, | ||
| 525 | }; | ||
| 526 | |||
| 527 | void __init dove_i2c_init(void) | ||
| 528 | { | ||
| 529 | platform_device_register(&dove_i2c); | ||
| 530 | } | ||
| 531 | |||
| 532 | /***************************************************************************** | ||
| 533 | * Time handling | ||
| 534 | ****************************************************************************/ | ||
| 535 | static int get_tclk(void) | ||
| 536 | { | ||
| 537 | /* use DOVE_RESET_SAMPLE_HI/LO to detect tclk */ | ||
| 538 | return 166666667; | ||
| 539 | } | ||
| 540 | |||
| 541 | static void dove_timer_init(void) | ||
| 542 | { | ||
| 543 | orion_time_init(IRQ_DOVE_BRIDGE, get_tclk()); | ||
| 544 | } | ||
| 545 | |||
| 546 | struct sys_timer dove_timer = { | ||
| 547 | .init = dove_timer_init, | ||
| 548 | }; | ||
| 549 | |||
| 550 | /***************************************************************************** | ||
| 551 | * XOR | ||
| 552 | ****************************************************************************/ | ||
| 553 | static struct mv_xor_platform_shared_data dove_xor_shared_data = { | ||
| 554 | .dram = &dove_mbus_dram_info, | ||
| 555 | }; | ||
| 556 | |||
| 557 | /***************************************************************************** | ||
| 558 | * XOR 0 | ||
| 559 | ****************************************************************************/ | ||
| 560 | static u64 dove_xor0_dmamask = DMA_BIT_MASK(32); | ||
| 561 | |||
| 562 | static struct resource dove_xor0_shared_resources[] = { | ||
| 563 | { | ||
| 564 | .name = "xor 0 low", | ||
| 565 | .start = DOVE_XOR0_PHYS_BASE, | ||
| 566 | .end = DOVE_XOR0_PHYS_BASE + 0xff, | ||
| 567 | .flags = IORESOURCE_MEM, | ||
| 568 | }, { | ||
| 569 | .name = "xor 0 high", | ||
| 570 | .start = DOVE_XOR0_HIGH_PHYS_BASE, | ||
| 571 | .end = DOVE_XOR0_HIGH_PHYS_BASE + 0xff, | ||
| 572 | .flags = IORESOURCE_MEM, | ||
| 573 | }, | ||
| 574 | }; | ||
| 575 | |||
| 576 | static struct platform_device dove_xor0_shared = { | ||
| 577 | .name = MV_XOR_SHARED_NAME, | ||
| 578 | .id = 0, | ||
| 579 | .dev = { | ||
| 580 | .platform_data = &dove_xor_shared_data, | ||
| 581 | }, | ||
| 582 | .num_resources = ARRAY_SIZE(dove_xor0_shared_resources), | ||
| 583 | .resource = dove_xor0_shared_resources, | ||
| 584 | }; | ||
| 585 | |||
| 586 | static struct resource dove_xor00_resources[] = { | ||
| 587 | [0] = { | ||
| 588 | .start = IRQ_DOVE_XOR_00, | ||
| 589 | .end = IRQ_DOVE_XOR_00, | ||
| 590 | .flags = IORESOURCE_IRQ, | ||
| 591 | }, | ||
| 592 | }; | ||
| 593 | |||
| 594 | static struct mv_xor_platform_data dove_xor00_data = { | ||
| 595 | .shared = &dove_xor0_shared, | ||
| 596 | .hw_id = 0, | ||
| 597 | .pool_size = PAGE_SIZE, | ||
| 598 | }; | ||
| 599 | |||
| 600 | static struct platform_device dove_xor00_channel = { | ||
| 601 | .name = MV_XOR_NAME, | ||
| 602 | .id = 0, | ||
| 603 | .num_resources = ARRAY_SIZE(dove_xor00_resources), | ||
| 604 | .resource = dove_xor00_resources, | ||
| 605 | .dev = { | ||
| 606 | .dma_mask = &dove_xor0_dmamask, | ||
| 607 | .coherent_dma_mask = DMA_BIT_MASK(64), | ||
| 608 | .platform_data = (void *)&dove_xor00_data, | ||
| 609 | }, | ||
| 610 | }; | ||
| 611 | |||
| 612 | static struct resource dove_xor01_resources[] = { | ||
| 613 | [0] = { | ||
| 614 | .start = IRQ_DOVE_XOR_01, | ||
| 615 | .end = IRQ_DOVE_XOR_01, | ||
| 616 | .flags = IORESOURCE_IRQ, | ||
| 617 | }, | ||
| 618 | }; | ||
| 619 | |||
| 620 | static struct mv_xor_platform_data dove_xor01_data = { | ||
| 621 | .shared = &dove_xor0_shared, | ||
| 622 | .hw_id = 1, | ||
| 623 | .pool_size = PAGE_SIZE, | ||
| 624 | }; | ||
| 625 | |||
| 626 | static struct platform_device dove_xor01_channel = { | ||
| 627 | .name = MV_XOR_NAME, | ||
| 628 | .id = 1, | ||
| 629 | .num_resources = ARRAY_SIZE(dove_xor01_resources), | ||
| 630 | .resource = dove_xor01_resources, | ||
| 631 | .dev = { | ||
| 632 | .dma_mask = &dove_xor0_dmamask, | ||
| 633 | .coherent_dma_mask = DMA_BIT_MASK(64), | ||
| 634 | .platform_data = (void *)&dove_xor01_data, | ||
| 635 | }, | ||
| 636 | }; | ||
| 637 | |||
| 638 | void __init dove_xor0_init(void) | ||
| 639 | { | ||
| 640 | platform_device_register(&dove_xor0_shared); | ||
| 641 | |||
| 642 | /* | ||
| 643 | * two engines can't do memset simultaneously, this limitation | ||
| 644 | * satisfied by removing memset support from one of the engines. | ||
| 645 | */ | ||
| 646 | dma_cap_set(DMA_MEMCPY, dove_xor00_data.cap_mask); | ||
| 647 | dma_cap_set(DMA_XOR, dove_xor00_data.cap_mask); | ||
| 648 | platform_device_register(&dove_xor00_channel); | ||
| 649 | |||
| 650 | dma_cap_set(DMA_MEMCPY, dove_xor01_data.cap_mask); | ||
| 651 | dma_cap_set(DMA_MEMSET, dove_xor01_data.cap_mask); | ||
| 652 | dma_cap_set(DMA_XOR, dove_xor01_data.cap_mask); | ||
| 653 | platform_device_register(&dove_xor01_channel); | ||
| 654 | } | ||
| 655 | |||
| 656 | /***************************************************************************** | ||
| 657 | * XOR 1 | ||
| 658 | ****************************************************************************/ | ||
| 659 | static u64 dove_xor1_dmamask = DMA_BIT_MASK(32); | ||
| 660 | |||
| 661 | static struct resource dove_xor1_shared_resources[] = { | ||
| 662 | { | ||
| 663 | .name = "xor 0 low", | ||
| 664 | .start = DOVE_XOR1_PHYS_BASE, | ||
| 665 | .end = DOVE_XOR1_PHYS_BASE + 0xff, | ||
| 666 | .flags = IORESOURCE_MEM, | ||
| 667 | }, { | ||
| 668 | .name = "xor 0 high", | ||
| 669 | .start = DOVE_XOR1_HIGH_PHYS_BASE, | ||
| 670 | .end = DOVE_XOR1_HIGH_PHYS_BASE + 0xff, | ||
| 671 | .flags = IORESOURCE_MEM, | ||
| 672 | }, | ||
| 673 | }; | ||
| 674 | |||
| 675 | static struct platform_device dove_xor1_shared = { | ||
| 676 | .name = MV_XOR_SHARED_NAME, | ||
| 677 | .id = 1, | ||
| 678 | .dev = { | ||
| 679 | .platform_data = &dove_xor_shared_data, | ||
| 680 | }, | ||
| 681 | .num_resources = ARRAY_SIZE(dove_xor1_shared_resources), | ||
| 682 | .resource = dove_xor1_shared_resources, | ||
| 683 | }; | ||
| 684 | |||
| 685 | static struct resource dove_xor10_resources[] = { | ||
| 686 | [0] = { | ||
| 687 | .start = IRQ_DOVE_XOR_10, | ||
| 688 | .end = IRQ_DOVE_XOR_10, | ||
| 689 | .flags = IORESOURCE_IRQ, | ||
| 690 | }, | ||
| 691 | }; | ||
| 692 | |||
| 693 | static struct mv_xor_platform_data dove_xor10_data = { | ||
| 694 | .shared = &dove_xor1_shared, | ||
| 695 | .hw_id = 0, | ||
| 696 | .pool_size = PAGE_SIZE, | ||
| 697 | }; | ||
| 698 | |||
| 699 | static struct platform_device dove_xor10_channel = { | ||
| 700 | .name = MV_XOR_NAME, | ||
| 701 | .id = 2, | ||
| 702 | .num_resources = ARRAY_SIZE(dove_xor10_resources), | ||
| 703 | .resource = dove_xor10_resources, | ||
| 704 | .dev = { | ||
| 705 | .dma_mask = &dove_xor1_dmamask, | ||
| 706 | .coherent_dma_mask = DMA_BIT_MASK(64), | ||
| 707 | .platform_data = (void *)&dove_xor10_data, | ||
| 708 | }, | ||
| 709 | }; | ||
| 710 | |||
| 711 | static struct resource dove_xor11_resources[] = { | ||
| 712 | [0] = { | ||
| 713 | .start = IRQ_DOVE_XOR_11, | ||
| 714 | .end = IRQ_DOVE_XOR_11, | ||
| 715 | .flags = IORESOURCE_IRQ, | ||
| 716 | }, | ||
| 717 | }; | ||
| 718 | |||
| 719 | static struct mv_xor_platform_data dove_xor11_data = { | ||
| 720 | .shared = &dove_xor1_shared, | ||
| 721 | .hw_id = 1, | ||
| 722 | .pool_size = PAGE_SIZE, | ||
| 723 | }; | ||
| 724 | |||
| 725 | static struct platform_device dove_xor11_channel = { | ||
| 726 | .name = MV_XOR_NAME, | ||
| 727 | .id = 3, | ||
| 728 | .num_resources = ARRAY_SIZE(dove_xor11_resources), | ||
| 729 | .resource = dove_xor11_resources, | ||
| 730 | .dev = { | ||
| 731 | .dma_mask = &dove_xor1_dmamask, | ||
| 732 | .coherent_dma_mask = DMA_BIT_MASK(64), | ||
| 733 | .platform_data = (void *)&dove_xor11_data, | ||
| 734 | }, | ||
| 735 | }; | ||
| 736 | |||
| 737 | void __init dove_xor1_init(void) | ||
| 738 | { | ||
| 739 | platform_device_register(&dove_xor1_shared); | ||
| 740 | |||
| 741 | /* | ||
| 742 | * two engines can't do memset simultaneously, this limitation | ||
| 743 | * satisfied by removing memset support from one of the engines. | ||
| 744 | */ | ||
| 745 | dma_cap_set(DMA_MEMCPY, dove_xor10_data.cap_mask); | ||
| 746 | dma_cap_set(DMA_XOR, dove_xor10_data.cap_mask); | ||
| 747 | platform_device_register(&dove_xor10_channel); | ||
| 748 | |||
| 749 | dma_cap_set(DMA_MEMCPY, dove_xor11_data.cap_mask); | ||
| 750 | dma_cap_set(DMA_MEMSET, dove_xor11_data.cap_mask); | ||
| 751 | dma_cap_set(DMA_XOR, dove_xor11_data.cap_mask); | ||
| 752 | platform_device_register(&dove_xor11_channel); | ||
| 753 | } | ||
| 754 | |||
| 755 | void __init dove_init(void) | ||
| 756 | { | ||
| 757 | int tclk; | ||
| 758 | |||
| 759 | tclk = get_tclk(); | ||
| 760 | |||
| 761 | printk(KERN_INFO "Dove 88AP510 SoC, "); | ||
| 762 | printk(KERN_INFO "TCLK = %dMHz\n", (tclk + 499999) / 1000000); | ||
| 763 | |||
| 764 | #ifdef CONFIG_CACHE_TAUROS2 | ||
| 765 | tauros2_init(); | ||
| 766 | #endif | ||
| 767 | dove_setup_cpu_mbus(); | ||
| 768 | |||
| 769 | dove_ge00_shared_data.t_clk = tclk; | ||
| 770 | dove_uart0_data[0].uartclk = tclk; | ||
| 771 | dove_uart1_data[0].uartclk = tclk; | ||
| 772 | dove_uart2_data[0].uartclk = tclk; | ||
| 773 | dove_uart3_data[0].uartclk = tclk; | ||
| 774 | dove_spi0_data.tclk = tclk; | ||
| 775 | dove_spi1_data.tclk = tclk; | ||
| 776 | |||
| 777 | /* internal devices that every board has */ | ||
| 778 | dove_rtc_init(); | ||
| 779 | dove_xor0_init(); | ||
| 780 | dove_xor1_init(); | ||
| 781 | } | ||
diff --git a/arch/arm/mach-dove/common.h b/arch/arm/mach-dove/common.h new file mode 100644 index 00000000000..b29e8937de4 --- /dev/null +++ b/arch/arm/mach-dove/common.h | |||
| @@ -0,0 +1,40 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-dove/common.h | ||
| 3 | * | ||
| 4 | * Core functions for Marvell Dove 88AP510 System On Chip | ||
| 5 | * | ||
| 6 | * This file is licensed under the terms of the GNU General Public | ||
| 7 | * License version 2. This program is licensed "as is" without any | ||
| 8 | * warranty of any kind, whether express or implied. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #ifndef __ARCH_DOVE_COMMON_H | ||
| 12 | #define __ARCH_DOVE_COMMON_H | ||
| 13 | |||
| 14 | struct mv643xx_eth_platform_data; | ||
| 15 | struct mv_sata_platform_data; | ||
| 16 | |||
| 17 | extern struct sys_timer dove_timer; | ||
| 18 | extern struct mbus_dram_target_info dove_mbus_dram_info; | ||
| 19 | |||
| 20 | /* | ||
| 21 | * Basic Dove init functions used early by machine-setup. | ||
| 22 | */ | ||
| 23 | void dove_map_io(void); | ||
| 24 | void dove_init(void); | ||
| 25 | void dove_init_irq(void); | ||
| 26 | void dove_setup_cpu_mbus(void); | ||
| 27 | void dove_ge00_init(struct mv643xx_eth_platform_data *eth_data); | ||
| 28 | void dove_sata_init(struct mv_sata_platform_data *sata_data); | ||
| 29 | void dove_pcie_init(int init_port0, int init_port1); | ||
| 30 | void dove_ehci0_init(void); | ||
| 31 | void dove_ehci1_init(void); | ||
| 32 | void dove_uart0_init(void); | ||
| 33 | void dove_uart1_init(void); | ||
| 34 | void dove_uart2_init(void); | ||
| 35 | void dove_uart3_init(void); | ||
| 36 | void dove_spi0_init(void); | ||
| 37 | void dove_spi1_init(void); | ||
| 38 | void dove_i2c_init(void); | ||
| 39 | |||
| 40 | #endif | ||
diff --git a/arch/arm/mach-dove/dove-db-setup.c b/arch/arm/mach-dove/dove-db-setup.c new file mode 100644 index 00000000000..f2971b74522 --- /dev/null +++ b/arch/arm/mach-dove/dove-db-setup.c | |||
| @@ -0,0 +1,102 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-dove/dove-db-setup.c | ||
| 3 | * | ||
| 4 | * Marvell DB-MV88AP510-BP Development Board Setup | ||
| 5 | * | ||
| 6 | * This file is licensed under the terms of the GNU General Public | ||
| 7 | * License version 2. This program is licensed "as is" without any | ||
| 8 | * warranty of any kind, whether express or implied. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/kernel.h> | ||
| 12 | #include <linux/init.h> | ||
| 13 | #include <linux/platform_device.h> | ||
| 14 | #include <linux/irq.h> | ||
| 15 | #include <linux/mtd/physmap.h> | ||
| 16 | #include <linux/mtd/nand.h> | ||
| 17 | #include <linux/timer.h> | ||
| 18 | #include <linux/ata_platform.h> | ||
| 19 | #include <linux/mv643xx_eth.h> | ||
| 20 | #include <linux/i2c.h> | ||
| 21 | #include <linux/pci.h> | ||
| 22 | #include <linux/spi/spi.h> | ||
| 23 | #include <linux/spi/orion_spi.h> | ||
| 24 | #include <linux/spi/flash.h> | ||
| 25 | #include <linux/gpio.h> | ||
| 26 | #include <asm/mach-types.h> | ||
| 27 | #include <asm/mach/arch.h> | ||
| 28 | #include <mach/dove.h> | ||
| 29 | #include "common.h" | ||
| 30 | |||
| 31 | static struct mv643xx_eth_platform_data dove_db_ge00_data = { | ||
| 32 | .phy_addr = MV643XX_ETH_PHY_ADDR_DEFAULT, | ||
| 33 | }; | ||
| 34 | |||
| 35 | static struct mv_sata_platform_data dove_db_sata_data = { | ||
| 36 | .n_ports = 1, | ||
| 37 | }; | ||
| 38 | |||
| 39 | /***************************************************************************** | ||
| 40 | * SPI Devices: | ||
| 41 | * SPI0: 4M Flash ST-M25P32-VMF6P | ||
| 42 | ****************************************************************************/ | ||
| 43 | static const struct flash_platform_data dove_db_spi_flash_data = { | ||
| 44 | .type = "m25p64", | ||
| 45 | }; | ||
| 46 | |||
| 47 | static struct spi_board_info __initdata dove_db_spi_flash_info[] = { | ||
| 48 | { | ||
| 49 | .modalias = "m25p80", | ||
| 50 | .platform_data = &dove_db_spi_flash_data, | ||
| 51 | .irq = -1, | ||
| 52 | .max_speed_hz = 20000000, | ||
| 53 | .bus_num = 0, | ||
| 54 | .chip_select = 0, | ||
| 55 | }, | ||
| 56 | }; | ||
| 57 | |||
| 58 | /***************************************************************************** | ||
| 59 | * PCI | ||
| 60 | ****************************************************************************/ | ||
| 61 | static int __init dove_db_pci_init(void) | ||
| 62 | { | ||
| 63 | if (machine_is_dove_db()) | ||
| 64 | dove_pcie_init(1, 1); | ||
| 65 | |||
| 66 | return 0; | ||
| 67 | } | ||
| 68 | |||
| 69 | subsys_initcall(dove_db_pci_init); | ||
| 70 | |||
| 71 | /***************************************************************************** | ||
| 72 | * Board Init | ||
| 73 | ****************************************************************************/ | ||
| 74 | static void __init dove_db_init(void) | ||
| 75 | { | ||
| 76 | /* | ||
| 77 | * Basic Dove setup. Needs to be called early. | ||
| 78 | */ | ||
| 79 | dove_init(); | ||
| 80 | |||
| 81 | dove_ge00_init(&dove_db_ge00_data); | ||
| 82 | dove_ehci0_init(); | ||
| 83 | dove_ehci1_init(); | ||
| 84 | dove_sata_init(&dove_db_sata_data); | ||
| 85 | dove_spi0_init(); | ||
| 86 | dove_spi1_init(); | ||
| 87 | dove_uart0_init(); | ||
| 88 | dove_uart1_init(); | ||
| 89 | dove_i2c_init(); | ||
| 90 | spi_register_board_info(dove_db_spi_flash_info, | ||
| 91 | ARRAY_SIZE(dove_db_spi_flash_info)); | ||
| 92 | } | ||
| 93 | |||
| 94 | MACHINE_START(DOVE_DB, "Marvell DB-MV88AP510-BP Development Board") | ||
| 95 | .phys_io = DOVE_SB_REGS_PHYS_BASE, | ||
| 96 | .io_pg_offst = ((DOVE_SB_REGS_VIRT_BASE) >> 18) & 0xfffc, | ||
| 97 | .boot_params = 0x00000100, | ||
| 98 | .init_machine = dove_db_init, | ||
| 99 | .map_io = dove_map_io, | ||
| 100 | .init_irq = dove_init_irq, | ||
| 101 | .timer = &dove_timer, | ||
| 102 | MACHINE_END | ||
diff --git a/arch/arm/mach-dove/include/mach/bridge-regs.h b/arch/arm/mach-dove/include/mach/bridge-regs.h new file mode 100644 index 00000000000..214a4c31f06 --- /dev/null +++ b/arch/arm/mach-dove/include/mach/bridge-regs.h | |||
| @@ -0,0 +1,58 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-dove/include/mach/bridge-regs.h | ||
| 3 | * | ||
| 4 | * Mbus-L to Mbus Bridge Registers | ||
| 5 | * | ||
| 6 | * This file is licensed under the terms of the GNU General Public | ||
| 7 | * License version 2. This program is licensed "as is" without any | ||
| 8 | * warranty of any kind, whether express or implied. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #ifndef __ASM_ARCH_BRIDGE_REGS_H | ||
| 12 | #define __ASM_ARCH_BRIDGE_REGS_H | ||
| 13 | |||
| 14 | #include <mach/dove.h> | ||
| 15 | |||
| 16 | #define CPU_CONFIG (BRIDGE_VIRT_BASE | 0x0000) | ||
| 17 | |||
| 18 | #define CPU_CONTROL (BRIDGE_VIRT_BASE | 0x0104) | ||
| 19 | #define CPU_CTRL_PCIE0_LINK 0x00000001 | ||
| 20 | #define CPU_RESET 0x00000002 | ||
| 21 | #define CPU_CTRL_PCIE1_LINK 0x00000008 | ||
| 22 | |||
| 23 | #define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108) | ||
| 24 | #define SOFT_RESET_OUT_EN 0x00000004 | ||
| 25 | |||
| 26 | #define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c) | ||
| 27 | #define SOFT_RESET 0x00000001 | ||
| 28 | |||
| 29 | #define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110) | ||
| 30 | #define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114) | ||
| 31 | #define BRIDGE_INT_TIMER0 0x0002 | ||
| 32 | #define BRIDGE_INT_TIMER1 0x0004 | ||
| 33 | #define BRIDGE_INT_TIMER1_CLR (~0x0004) | ||
| 34 | |||
| 35 | #define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200) | ||
| 36 | #define IRQ_CAUSE_LOW_OFF 0x0000 | ||
| 37 | #define IRQ_MASK_LOW_OFF 0x0004 | ||
| 38 | #define FIQ_MASK_LOW_OFF 0x0008 | ||
| 39 | #define ENDPOINT_MASK_LOW_OFF 0x000c | ||
| 40 | #define IRQ_CAUSE_HIGH_OFF 0x0010 | ||
| 41 | #define IRQ_MASK_HIGH_OFF 0x0014 | ||
| 42 | #define FIQ_MASK_HIGH_OFF 0x0018 | ||
| 43 | #define ENDPOINT_MASK_HIGH_OFF 0x001c | ||
| 44 | #define PCIE_INTERRUPT_MASK_OFF 0x0020 | ||
| 45 | |||
| 46 | #define IRQ_MASK_LOW (IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF) | ||
| 47 | #define FIQ_MASK_LOW (IRQ_VIRT_BASE + FIQ_MASK_LOW_OFF) | ||
| 48 | #define ENDPOINT_MASK_LOW (IRQ_VIRT_BASE + ENDPOINT_MASK_LOW_OFF) | ||
| 49 | #define IRQ_MASK_HIGH (IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF) | ||
| 50 | #define FIQ_MASK_HIGH (IRQ_VIRT_BASE + FIQ_MASK_HIGH_OFF) | ||
| 51 | #define ENDPOINT_MASK_HIGH (IRQ_VIRT_BASE + ENDPOINT_MASK_HIGH_OFF) | ||
| 52 | #define PCIE_INTERRUPT_MASK (IRQ_VIRT_BASE + PCIE_INTERRUPT_MASK_OFF) | ||
| 53 | |||
| 54 | #define POWER_MANAGEMENT (BRIDGE_VIRT_BASE | 0x011c) | ||
| 55 | |||
| 56 | #define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) | ||
| 57 | |||
| 58 | #endif | ||
diff --git a/arch/arm/mach-dove/include/mach/debug-macro.S b/arch/arm/mach-dove/include/mach/debug-macro.S new file mode 100644 index 00000000000..9b89ec7d304 --- /dev/null +++ b/arch/arm/mach-dove/include/mach/debug-macro.S | |||
| @@ -0,0 +1,20 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-dove/include/mach/debug-macro.S | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License version 2 as | ||
| 6 | * published by the Free Software Foundation. | ||
| 7 | */ | ||
| 8 | |||
| 9 | #include <mach/bridge-regs.h> | ||
| 10 | |||
| 11 | .macro addruart,rx | ||
| 12 | mrc p15, 0, \rx, c1, c0 | ||
| 13 | tst \rx, #1 @ MMU enabled? | ||
| 14 | ldreq \rx, =DOVE_SB_REGS_PHYS_BASE | ||
| 15 | ldrne \rx, =DOVE_SB_REGS_VIRT_BASE | ||
| 16 | orr \rx, \rx, #0x00012000 | ||
| 17 | .endm | ||
| 18 | |||
| 19 | #define UART_SHIFT 2 | ||
| 20 | #include <asm/hardware/debug-8250.S> | ||
diff --git a/arch/arm/mach-dove/include/mach/dove.h b/arch/arm/mach-dove/include/mach/dove.h new file mode 100644 index 00000000000..f6a08397f04 --- /dev/null +++ b/arch/arm/mach-dove/include/mach/dove.h | |||
| @@ -0,0 +1,180 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-dove/include/mach/dove.h | ||
| 3 | * | ||
| 4 | * Generic definitions for Marvell Dove 88AP510 SoC | ||
| 5 | * | ||
| 6 | * This file is licensed under the terms of the GNU General Public | ||
| 7 | * License version 2. This program is licensed "as is" without any | ||
| 8 | * warranty of any kind, whether express or implied. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #ifndef __ASM_ARCH_DOVE_H | ||
| 12 | #define __ASM_ARCH_DOVE_H | ||
| 13 | |||
| 14 | #include <mach/vmalloc.h> | ||
| 15 | |||
| 16 | /* | ||
| 17 | * Marvell Dove address maps. | ||
| 18 | * | ||
| 19 | * phys virt size | ||
| 20 | * c8000000 fdb00000 1M Cryptographic SRAM | ||
| 21 | * e0000000 @runtime 128M PCIe-0 Memory space | ||
| 22 | * e8000000 @runtime 128M PCIe-1 Memory space | ||
| 23 | * f1000000 fde00000 8M on-chip south-bridge registers | ||
| 24 | * f1800000 fe600000 8M on-chip north-bridge registers | ||
| 25 | * f2000000 fee00000 1M PCIe-0 I/O space | ||
| 26 | * f2100000 fef00000 1M PCIe-1 I/O space | ||
| 27 | */ | ||
| 28 | |||
| 29 | #define DOVE_CESA_PHYS_BASE 0xc8000000 | ||
| 30 | #define DOVE_CESA_VIRT_BASE 0xfdb00000 | ||
| 31 | #define DOVE_CESA_SIZE SZ_1M | ||
| 32 | |||
| 33 | #define DOVE_PCIE0_MEM_PHYS_BASE 0xe0000000 | ||
| 34 | #define DOVE_PCIE0_MEM_SIZE SZ_128M | ||
| 35 | |||
| 36 | #define DOVE_PCIE1_MEM_PHYS_BASE 0xe8000000 | ||
| 37 | #define DOVE_PCIE1_MEM_SIZE SZ_128M | ||
| 38 | |||
| 39 | #define DOVE_BOOTROM_PHYS_BASE 0xf8000000 | ||
| 40 | #define DOVE_BOOTROM_SIZE SZ_128M | ||
| 41 | |||
| 42 | #define DOVE_SCRATCHPAD_PHYS_BASE 0xf0000000 | ||
| 43 | #define DOVE_SCRATCHPAD_VIRT_BASE 0xfdd00000 | ||
| 44 | #define DOVE_SCRATCHPAD_SIZE SZ_1M | ||
| 45 | |||
| 46 | #define DOVE_SB_REGS_PHYS_BASE 0xf1000000 | ||
| 47 | #define DOVE_SB_REGS_VIRT_BASE 0xfde00000 | ||
| 48 | #define DOVE_SB_REGS_SIZE SZ_8M | ||
| 49 | |||
| 50 | #define DOVE_NB_REGS_PHYS_BASE 0xf1800000 | ||
| 51 | #define DOVE_NB_REGS_VIRT_BASE 0xfe600000 | ||
| 52 | #define DOVE_NB_REGS_SIZE SZ_8M | ||
| 53 | |||
| 54 | #define DOVE_PCIE0_IO_PHYS_BASE 0xf2000000 | ||
| 55 | #define DOVE_PCIE0_IO_VIRT_BASE 0xfee00000 | ||
| 56 | #define DOVE_PCIE0_IO_BUS_BASE 0x00000000 | ||
| 57 | #define DOVE_PCIE0_IO_SIZE SZ_1M | ||
| 58 | |||
| 59 | #define DOVE_PCIE1_IO_PHYS_BASE 0xf2100000 | ||
| 60 | #define DOVE_PCIE1_IO_VIRT_BASE 0xfef00000 | ||
| 61 | #define DOVE_PCIE1_IO_BUS_BASE 0x00100000 | ||
| 62 | #define DOVE_PCIE1_IO_SIZE SZ_1M | ||
| 63 | |||
| 64 | /* | ||
| 65 | * Dove Core Registers Map | ||
| 66 | */ | ||
| 67 | |||
| 68 | /* SPI, I2C, UART */ | ||
| 69 | #define DOVE_I2C_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x11000) | ||
| 70 | #define DOVE_UART0_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x12000) | ||
| 71 | #define DOVE_UART0_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0x12000) | ||
| 72 | #define DOVE_UART1_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x12100) | ||
| 73 | #define DOVE_UART1_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0x12100) | ||
| 74 | #define DOVE_UART2_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x12200) | ||
| 75 | #define DOVE_UART2_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0x12200) | ||
| 76 | #define DOVE_UART3_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x12300) | ||
| 77 | #define DOVE_UART3_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0x12300) | ||
| 78 | #define DOVE_SPI0_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x10600) | ||
| 79 | #define DOVE_SPI1_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x14600) | ||
| 80 | |||
| 81 | /* North-South Bridge */ | ||
| 82 | #define BRIDGE_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0x20000) | ||
| 83 | |||
| 84 | /* Cryptographic Engine */ | ||
| 85 | #define DOVE_CRYPT_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x30000) | ||
| 86 | |||
| 87 | /* PCIe 0 */ | ||
| 88 | #define DOVE_PCIE0_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0x40000) | ||
| 89 | |||
| 90 | /* USB */ | ||
| 91 | #define DOVE_USB0_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x50000) | ||
| 92 | #define DOVE_USB1_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x51000) | ||
| 93 | |||
| 94 | /* XOR 0 Engine */ | ||
| 95 | #define DOVE_XOR0_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x60800) | ||
| 96 | #define DOVE_XOR0_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0x60800) | ||
| 97 | #define DOVE_XOR0_HIGH_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x60A00) | ||
| 98 | #define DOVE_XOR0_HIGH_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0x60A00) | ||
| 99 | |||
| 100 | /* XOR 1 Engine */ | ||
| 101 | #define DOVE_XOR1_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x60900) | ||
| 102 | #define DOVE_XOR1_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0x60900) | ||
| 103 | #define DOVE_XOR1_HIGH_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x60B00) | ||
| 104 | #define DOVE_XOR1_HIGH_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0x60B00) | ||
| 105 | |||
| 106 | /* Gigabit Ethernet */ | ||
| 107 | #define DOVE_GE00_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x70000) | ||
| 108 | |||
| 109 | /* PCIe 1 */ | ||
| 110 | #define DOVE_PCIE1_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0x80000) | ||
| 111 | |||
| 112 | /* CAFE */ | ||
| 113 | #define DOVE_SDIO0_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x92000) | ||
| 114 | #define DOVE_SDIO1_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x90000) | ||
| 115 | #define DOVE_CAM_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x94000) | ||
| 116 | #define DOVE_CAFE_WIN_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x98000) | ||
| 117 | |||
| 118 | /* SATA */ | ||
| 119 | #define DOVE_SATA_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0xa0000) | ||
| 120 | |||
| 121 | /* I2S/SPDIF */ | ||
| 122 | #define DOVE_AUD0_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0xb0000) | ||
| 123 | #define DOVE_AUD1_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0xb4000) | ||
| 124 | |||
| 125 | /* NAND Flash Controller */ | ||
| 126 | #define DOVE_NFC_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0xc0000) | ||
| 127 | |||
| 128 | /* MPP, GPIO, Reset Sampling */ | ||
| 129 | #define DOVE_MPP_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xd0200) | ||
| 130 | #define DOVE_PMU_MPP_GENERAL_CTRL (DOVE_MPP_VIRT_BASE + 0x10) | ||
| 131 | #define DOVE_RESET_SAMPLE_LO (DOVE_MPP_VIRT_BASE | 0x014) | ||
| 132 | #define DOVE_RESET_SAMPLE_HI (DOVE_MPP_VIRT_BASE | 0x018) | ||
| 133 | #define DOVE_GPIO_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xd0400) | ||
| 134 | #define DOVE_MPP_GENERAL_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xe803c) | ||
| 135 | #define DOVE_AU1_SPDIFO_GPIO_EN (1 << 1) | ||
| 136 | #define DOVE_NAND_GPIO_EN (1 << 0) | ||
| 137 | #define DOVE_MPP_CTRL4_VIRT_BASE (DOVE_GPIO_VIRT_BASE + 0x40) | ||
| 138 | |||
| 139 | |||
| 140 | /* Power Management */ | ||
| 141 | #define DOVE_PMU_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xd0000) | ||
| 142 | |||
| 143 | /* Real Time Clock */ | ||
| 144 | #define DOVE_RTC_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0xd8500) | ||
| 145 | |||
| 146 | /* AC97 */ | ||
| 147 | #define DOVE_AC97_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0xe0000) | ||
| 148 | #define DOVE_AC97_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xe0000) | ||
| 149 | |||
| 150 | /* Peripheral DMA */ | ||
| 151 | #define DOVE_PDMA_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0xe4000) | ||
| 152 | #define DOVE_PDMA_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xe4000) | ||
| 153 | |||
| 154 | #define DOVE_GLOBAL_CONFIG_1 (DOVE_SB_REGS_VIRT_BASE | 0xe802C) | ||
| 155 | #define DOVE_TWSI_ENABLE_OPTION1 (1 << 7) | ||
| 156 | #define DOVE_GLOBAL_CONFIG_2 (DOVE_SB_REGS_VIRT_BASE | 0xe8030) | ||
| 157 | #define DOVE_TWSI_ENABLE_OPTION2 (1 << 20) | ||
| 158 | #define DOVE_TWSI_ENABLE_OPTION3 (1 << 21) | ||
| 159 | #define DOVE_TWSI_OPTION3_GPIO (1 << 22) | ||
| 160 | #define DOVE_SSP_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0xec000) | ||
| 161 | #define DOVE_SSP_CTRL_STATUS_1 (DOVE_SB_REGS_VIRT_BASE | 0xe8034) | ||
| 162 | #define DOVE_SSP_ON_AU1 (1 << 0) | ||
| 163 | #define DOVE_SSP_CLOCK_ENABLE (1 << 1) | ||
| 164 | #define DOVE_SSP_BPB_CLOCK_SRC_SSP (1 << 11) | ||
| 165 | /* Memory Controller */ | ||
| 166 | #define DOVE_MC_VIRT_BASE (DOVE_NB_REGS_VIRT_BASE | 0x00000) | ||
| 167 | |||
| 168 | /* LCD Controller */ | ||
| 169 | #define DOVE_LCD_PHYS_BASE (DOVE_NB_REGS_PHYS_BASE | 0x10000) | ||
| 170 | #define DOVE_LCD1_PHYS_BASE (DOVE_NB_REGS_PHYS_BASE | 0x20000) | ||
| 171 | #define DOVE_LCD2_PHYS_BASE (DOVE_NB_REGS_PHYS_BASE | 0x10000) | ||
| 172 | #define DOVE_LCD_DCON_PHYS_BASE (DOVE_NB_REGS_PHYS_BASE | 0x30000) | ||
| 173 | |||
| 174 | /* Graphic Engine */ | ||
| 175 | #define DOVE_GPU_PHYS_BASE (DOVE_NB_REGS_PHYS_BASE | 0x40000) | ||
| 176 | |||
| 177 | /* Video Engine */ | ||
| 178 | #define DOVE_VPU_PHYS_BASE (DOVE_NB_REGS_PHYS_BASE | 0x400000) | ||
| 179 | |||
| 180 | #endif | ||
diff --git a/arch/arm/mach-dove/include/mach/entry-macro.S b/arch/arm/mach-dove/include/mach/entry-macro.S new file mode 100644 index 00000000000..e84c78c2a8b --- /dev/null +++ b/arch/arm/mach-dove/include/mach/entry-macro.S | |||
| @@ -0,0 +1,39 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-dove/include/mach/entry-macro.S | ||
| 3 | * | ||
| 4 | * Low-level IRQ helper macros for Marvell Dove platforms | ||
| 5 | * | ||
| 6 | * This file is licensed under the terms of the GNU General Public | ||
| 7 | * License version 2. This program is licensed "as is" without any | ||
| 8 | * warranty of any kind, whether express or implied. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <mach/bridge-regs.h> | ||
| 12 | |||
| 13 | .macro disable_fiq | ||
| 14 | .endm | ||
| 15 | |||
| 16 | .macro arch_ret_to_user, tmp1, tmp2 | ||
| 17 | .endm | ||
| 18 | |||
| 19 | .macro get_irqnr_preamble, base, tmp | ||
| 20 | ldr \base, =IRQ_VIRT_BASE | ||
| 21 | .endm | ||
| 22 | |||
| 23 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
| 24 | @ check low interrupts | ||
| 25 | ldr \irqstat, [\base, #IRQ_CAUSE_LOW_OFF] | ||
| 26 | ldr \tmp, [\base, #IRQ_MASK_LOW_OFF] | ||
| 27 | mov \irqnr, #31 | ||
| 28 | ands \irqstat, \irqstat, \tmp | ||
| 29 | |||
| 30 | @ if no low interrupts set, check high interrupts | ||
| 31 | ldreq \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF] | ||
| 32 | ldreq \tmp, [\base, #IRQ_MASK_HIGH_OFF] | ||
| 33 | moveq \irqnr, #63 | ||
| 34 | andeqs \irqstat, \irqstat, \tmp | ||
| 35 | |||
| 36 | @ find first active interrupt source | ||
| 37 | clzne \irqstat, \irqstat | ||
| 38 | subne \irqnr, \irqnr, \irqstat | ||
| 39 | .endm | ||
diff --git a/arch/arm/mach-dove/include/mach/gpio.h b/arch/arm/mach-dove/include/mach/gpio.h new file mode 100644 index 00000000000..0ee70ff39e1 --- /dev/null +++ b/arch/arm/mach-dove/include/mach/gpio.h | |||
| @@ -0,0 +1,49 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-dove/include/mach/gpio.h | ||
| 3 | * | ||
| 4 | * This file is licensed under the terms of the GNU General Public | ||
| 5 | * License version 2. This program is licensed "as is" without any | ||
| 6 | * warranty of any kind, whether express or implied. | ||
| 7 | */ | ||
| 8 | |||
| 9 | #ifndef __ASM_ARCH_GPIO_H | ||
| 10 | #define __ASM_ARCH_GPIO_H | ||
| 11 | |||
| 12 | #include <asm/errno.h> | ||
| 13 | #include <mach/irqs.h> | ||
| 14 | #include <plat/gpio.h> | ||
| 15 | #include <asm-generic/gpio.h> /* cansleep wrappers */ | ||
| 16 | |||
| 17 | #define GPIO_MAX 64 | ||
| 18 | |||
| 19 | #define GPIO_BASE_LO (DOVE_GPIO_VIRT_BASE + 0x00) | ||
| 20 | #define GPIO_BASE_HI (DOVE_GPIO_VIRT_BASE + 0x20) | ||
| 21 | |||
| 22 | #define GPIO_BASE(pin) ((pin < 32) ? GPIO_BASE_LO : GPIO_BASE_HI) | ||
| 23 | |||
| 24 | #define GPIO_OUT(pin) (GPIO_BASE(pin) + 0x00) | ||
| 25 | #define GPIO_IO_CONF(pin) (GPIO_BASE(pin) + 0x04) | ||
| 26 | #define GPIO_BLINK_EN(pin) (GPIO_BASE(pin) + 0x08) | ||
| 27 | #define GPIO_IN_POL(pin) (GPIO_BASE(pin) + 0x0c) | ||
| 28 | #define GPIO_DATA_IN(pin) (GPIO_BASE(pin) + 0x10) | ||
| 29 | #define GPIO_EDGE_CAUSE(pin) (GPIO_BASE(pin) + 0x14) | ||
| 30 | #define GPIO_EDGE_MASK(pin) (GPIO_BASE(pin) + 0x18) | ||
| 31 | #define GPIO_LEVEL_MASK(pin) (GPIO_BASE(pin) + 0x1c) | ||
| 32 | |||
| 33 | static inline int gpio_to_irq(int pin) | ||
| 34 | { | ||
| 35 | if (pin < NR_GPIO_IRQS) | ||
| 36 | return pin + IRQ_DOVE_GPIO_START; | ||
| 37 | |||
| 38 | return -EINVAL; | ||
| 39 | } | ||
| 40 | |||
| 41 | static inline int irq_to_gpio(int irq) | ||
| 42 | { | ||
| 43 | if (IRQ_DOVE_GPIO_START < irq && irq < NR_IRQS) | ||
| 44 | return irq - IRQ_DOVE_GPIO_START; | ||
| 45 | |||
| 46 | return -EINVAL; | ||
| 47 | } | ||
| 48 | |||
| 49 | #endif | ||
diff --git a/arch/arm/mach-dove/include/mach/hardware.h b/arch/arm/mach-dove/include/mach/hardware.h new file mode 100644 index 00000000000..32b0826e787 --- /dev/null +++ b/arch/arm/mach-dove/include/mach/hardware.h | |||
| @@ -0,0 +1,26 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-dove/include/mach/hardware.h | ||
| 3 | * | ||
| 4 | * This file is licensed under the terms of the GNU General Public | ||
| 5 | * License version 2. This program is licensed "as is" without any | ||
| 6 | * warranty of any kind, whether express or implied. | ||
| 7 | */ | ||
| 8 | |||
| 9 | #ifndef __ASM_ARCH_HARDWARE_H | ||
| 10 | #define __ASM_ARCH_HARDWARE_H | ||
| 11 | |||
| 12 | #include "dove.h" | ||
| 13 | |||
| 14 | #define pcibios_assign_all_busses() 1 | ||
| 15 | |||
| 16 | #define PCIBIOS_MIN_IO 0x1000 | ||
| 17 | #define PCIBIOS_MIN_MEM 0x01000000 | ||
| 18 | #define PCIMEM_BASE DOVE_PCIE0_MEM_PHYS_BASE | ||
| 19 | |||
| 20 | |||
| 21 | /* Macros below are required for compatibility with PXA AC'97 driver. */ | ||
| 22 | #define __REG(x) (*((volatile u32 *)((x) - DOVE_SB_REGS_PHYS_BASE + \ | ||
| 23 | DOVE_SB_REGS_VIRT_BASE))) | ||
| 24 | #define __PREG(x) (((u32)&(x)) - DOVE_SB_REGS_VIRT_BASE + \ | ||
| 25 | DOVE_SB_REGS_PHYS_BASE) | ||
| 26 | #endif | ||
diff --git a/arch/arm/mach-dove/include/mach/io.h b/arch/arm/mach-dove/include/mach/io.h new file mode 100644 index 00000000000..3b3e4721ce2 --- /dev/null +++ b/arch/arm/mach-dove/include/mach/io.h | |||
| @@ -0,0 +1,20 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-dove/include/mach/io.h | ||
| 3 | * | ||
| 4 | * This file is licensed under the terms of the GNU General Public | ||
| 5 | * License version 2. This program is licensed "as is" without any | ||
| 6 | * warranty of any kind, whether express or implied. | ||
| 7 | */ | ||
| 8 | |||
| 9 | #ifndef __ASM_ARCH_IO_H | ||
| 10 | #define __ASM_ARCH_IO_H | ||
| 11 | |||
| 12 | #include "dove.h" | ||
| 13 | |||
| 14 | #define IO_SPACE_LIMIT 0xffffffff | ||
| 15 | |||
| 16 | #define __io(a) ((void __iomem *)(((a) - DOVE_PCIE0_IO_PHYS_BASE) +\ | ||
| 17 | DOVE_PCIE0_IO_VIRT_BASE)) | ||
| 18 | #define __mem_pci(a) (a) | ||
| 19 | |||
| 20 | #endif | ||
diff --git a/arch/arm/mach-dove/include/mach/irqs.h b/arch/arm/mach-dove/include/mach/irqs.h new file mode 100644 index 00000000000..46681466f92 --- /dev/null +++ b/arch/arm/mach-dove/include/mach/irqs.h | |||
| @@ -0,0 +1,101 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-dove/include/mach/irqs.h | ||
| 3 | * | ||
| 4 | * IRQ definitions for Marvell Dove 88AP510 SoC | ||
| 5 | * | ||
| 6 | * This file is licensed under the terms of the GNU General Public | ||
| 7 | * License version 2. This program is licensed "as is" without any | ||
| 8 | * warranty of any kind, whether express or implied. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #ifndef __ASM_ARCH_IRQS_H | ||
| 12 | #define __ASM_ARCH_IRQS_H | ||
| 13 | |||
| 14 | /* | ||
| 15 | * Dove Low Interrupt Controller | ||
| 16 | */ | ||
| 17 | #define IRQ_DOVE_BRIDGE 0 | ||
| 18 | #define IRQ_DOVE_H2C 1 | ||
| 19 | #define IRQ_DOVE_C2H 2 | ||
| 20 | #define IRQ_DOVE_NAND 3 | ||
| 21 | #define IRQ_DOVE_PDMA 4 | ||
| 22 | #define IRQ_DOVE_SPI1 5 | ||
| 23 | #define IRQ_DOVE_SPI0 6 | ||
| 24 | #define IRQ_DOVE_UART_0 7 | ||
| 25 | #define IRQ_DOVE_UART_1 8 | ||
| 26 | #define IRQ_DOVE_UART_2 9 | ||
| 27 | #define IRQ_DOVE_UART_3 10 | ||
| 28 | #define IRQ_DOVE_I2C 11 | ||
| 29 | #define IRQ_DOVE_GPIO_0_7 12 | ||
| 30 | #define IRQ_DOVE_GPIO_8_15 13 | ||
| 31 | #define IRQ_DOVE_GPIO_16_23 14 | ||
| 32 | #define IRQ_DOVE_PCIE0_ERR 15 | ||
| 33 | #define IRQ_DOVE_PCIE0 16 | ||
| 34 | #define IRQ_DOVE_PCIE1_ERR 17 | ||
| 35 | #define IRQ_DOVE_PCIE1 18 | ||
| 36 | #define IRQ_DOVE_I2S0 19 | ||
| 37 | #define IRQ_DOVE_I2S0_ERR 20 | ||
| 38 | #define IRQ_DOVE_I2S1 21 | ||
| 39 | #define IRQ_DOVE_I2S1_ERR 22 | ||
| 40 | #define IRQ_DOVE_USB_ERR 23 | ||
| 41 | #define IRQ_DOVE_USB0 24 | ||
| 42 | #define IRQ_DOVE_USB1 25 | ||
| 43 | #define IRQ_DOVE_GE00_RX 26 | ||
| 44 | #define IRQ_DOVE_GE00_TX 27 | ||
| 45 | #define IRQ_DOVE_GE00_MISC 28 | ||
| 46 | #define IRQ_DOVE_GE00_SUM 29 | ||
| 47 | #define IRQ_DOVE_GE00_ERR 30 | ||
| 48 | #define IRQ_DOVE_CRYPTO 31 | ||
| 49 | |||
| 50 | /* | ||
| 51 | * Dove High Interrupt Controller | ||
| 52 | */ | ||
| 53 | #define IRQ_DOVE_AC97 32 | ||
| 54 | #define IRQ_DOVE_PMU 33 | ||
| 55 | #define IRQ_DOVE_CAM 34 | ||
| 56 | #define IRQ_DOVE_SDIO0 35 | ||
| 57 | #define IRQ_DOVE_SDIO1 36 | ||
| 58 | #define IRQ_DOVE_SDIO0_WAKEUP 37 | ||
| 59 | #define IRQ_DOVE_SDIO1_WAKEUP 38 | ||
| 60 | #define IRQ_DOVE_XOR_00 39 | ||
| 61 | #define IRQ_DOVE_XOR_01 40 | ||
| 62 | #define IRQ_DOVE_XOR0_ERR 41 | ||
| 63 | #define IRQ_DOVE_XOR_10 42 | ||
| 64 | #define IRQ_DOVE_XOR_11 43 | ||
| 65 | #define IRQ_DOVE_XOR1_ERR 44 | ||
| 66 | #define IRQ_DOVE_LCD_DCON 45 | ||
| 67 | #define IRQ_DOVE_LCD1 46 | ||
| 68 | #define IRQ_DOVE_LCD0 47 | ||
| 69 | #define IRQ_DOVE_GPU 48 | ||
| 70 | #define IRQ_DOVE_PERFORM_MNTR 49 | ||
| 71 | #define IRQ_DOVE_VPRO_DMA1 51 | ||
| 72 | #define IRQ_DOVE_SSP_TIMER 54 | ||
| 73 | #define IRQ_DOVE_SSP 55 | ||
| 74 | #define IRQ_DOVE_MC_L2_ERR 56 | ||
| 75 | #define IRQ_DOVE_CRYPTO_ERR 59 | ||
| 76 | #define IRQ_DOVE_GPIO_24_31 60 | ||
| 77 | #define IRQ_DOVE_HIGH_GPIO 61 | ||
| 78 | #define IRQ_DOVE_SATA 62 | ||
| 79 | |||
| 80 | /* | ||
| 81 | * DOVE General Purpose Pins | ||
| 82 | */ | ||
| 83 | #define IRQ_DOVE_GPIO_START 64 | ||
| 84 | #define NR_GPIO_IRQS 64 | ||
| 85 | |||
| 86 | /* | ||
| 87 | * PMU interrupts | ||
| 88 | */ | ||
| 89 | #define IRQ_DOVE_PMU_START (IRQ_DOVE_GPIO_START + NR_GPIO_IRQS) | ||
| 90 | #define NR_PMU_IRQS 7 | ||
| 91 | #define IRQ_DOVE_RTC (IRQ_DOVE_PMU_START + 5) | ||
| 92 | |||
| 93 | #define NR_IRQS (IRQ_DOVE_PMU_START + NR_PMU_IRQS) | ||
| 94 | |||
| 95 | /* Required for compatability with PXA AC97 driver. */ | ||
| 96 | #define IRQ_AC97 IRQ_DOVE_AC97 | ||
| 97 | /* Required for compatability with PXA DMA driver. */ | ||
| 98 | #define IRQ_DMA IRQ_DOVE_PDMA | ||
| 99 | /* Required for compatability with PXA NAND driver */ | ||
| 100 | #define IRQ_NAND IRQ_DOVE_NAND | ||
| 101 | #endif | ||
diff --git a/arch/arm/mach-dove/include/mach/memory.h b/arch/arm/mach-dove/include/mach/memory.h new file mode 100644 index 00000000000..d6687207494 --- /dev/null +++ b/arch/arm/mach-dove/include/mach/memory.h | |||
| @@ -0,0 +1,10 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-dove/include/mach/memory.h | ||
| 3 | */ | ||
| 4 | |||
| 5 | #ifndef __ASM_ARCH_MEMORY_H | ||
| 6 | #define __ASM_ARCH_MEMORY_H | ||
| 7 | |||
| 8 | #define PHYS_OFFSET UL(0x00000000) | ||
| 9 | |||
| 10 | #endif | ||
diff --git a/arch/arm/mach-dove/include/mach/pm.h b/arch/arm/mach-dove/include/mach/pm.h new file mode 100644 index 00000000000..3ad9f946a9e --- /dev/null +++ b/arch/arm/mach-dove/include/mach/pm.h | |||
| @@ -0,0 +1,54 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-dove/include/mach/pm.h | ||
| 3 | * | ||
| 4 | * This file is licensed under the terms of the GNU General Public | ||
| 5 | * License version 2. This program is licensed "as is" without any | ||
| 6 | * warranty of any kind, whether express or implied. | ||
| 7 | */ | ||
| 8 | |||
| 9 | #ifndef __ASM_ARCH_PM_H | ||
| 10 | #define __ASM_ARCH_PM_H | ||
| 11 | |||
| 12 | #include <asm/errno.h> | ||
| 13 | #include <mach/irqs.h> | ||
| 14 | |||
| 15 | #define CLOCK_GATING_CONTROL (DOVE_PMU_VIRT_BASE + 0x38) | ||
| 16 | #define CLOCK_GATING_USB0_MASK (1 << 0) | ||
| 17 | #define CLOCK_GATING_USB1_MASK (1 << 1) | ||
| 18 | #define CLOCK_GATING_GBE_MASK (1 << 2) | ||
| 19 | #define CLOCK_GATING_SATA_MASK (1 << 3) | ||
| 20 | #define CLOCK_GATING_PCIE0_MASK (1 << 4) | ||
| 21 | #define CLOCK_GATING_PCIE1_MASK (1 << 5) | ||
| 22 | #define CLOCK_GATING_SDIO0_MASK (1 << 8) | ||
| 23 | #define CLOCK_GATING_SDIO1_MASK (1 << 9) | ||
| 24 | #define CLOCK_GATING_NAND_MASK (1 << 10) | ||
| 25 | #define CLOCK_GATING_CAMERA_MASK (1 << 11) | ||
| 26 | #define CLOCK_GATING_I2S0_MASK (1 << 12) | ||
| 27 | #define CLOCK_GATING_I2S1_MASK (1 << 13) | ||
| 28 | #define CLOCK_GATING_CRYPTO_MASK (1 << 15) | ||
| 29 | #define CLOCK_GATING_AC97_MASK (1 << 21) | ||
| 30 | #define CLOCK_GATING_PDMA_MASK (1 << 22) | ||
| 31 | #define CLOCK_GATING_XOR0_MASK (1 << 23) | ||
| 32 | #define CLOCK_GATING_XOR1_MASK (1 << 24) | ||
| 33 | #define CLOCK_GATING_GIGA_PHY_MASK (1 << 30) | ||
| 34 | |||
| 35 | #define PMU_INTERRUPT_CAUSE (DOVE_PMU_VIRT_BASE + 0x50) | ||
| 36 | #define PMU_INTERRUPT_MASK (DOVE_PMU_VIRT_BASE + 0x54) | ||
| 37 | |||
| 38 | static inline int pmu_to_irq(int pin) | ||
| 39 | { | ||
| 40 | if (pin < NR_PMU_IRQS) | ||
| 41 | return pin + IRQ_DOVE_PMU_START; | ||
| 42 | |||
| 43 | return -EINVAL; | ||
| 44 | } | ||
| 45 | |||
| 46 | static inline int irq_to_pmu(int irq) | ||
| 47 | { | ||
| 48 | if (IRQ_DOVE_PMU_START < irq && irq < NR_IRQS) | ||
| 49 | return irq - IRQ_DOVE_PMU_START; | ||
| 50 | |||
| 51 | return -EINVAL; | ||
| 52 | } | ||
| 53 | |||
| 54 | #endif | ||
diff --git a/arch/arm/mach-dove/include/mach/system.h b/arch/arm/mach-dove/include/mach/system.h new file mode 100644 index 00000000000..356afda5685 --- /dev/null +++ b/arch/arm/mach-dove/include/mach/system.h | |||
| @@ -0,0 +1,36 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-dove/include/mach/system.h | ||
| 3 | * | ||
| 4 | * This file is licensed under the terms of the GNU General Public | ||
| 5 | * License version 2. This program is licensed "as is" without any | ||
| 6 | * warranty of any kind, whether express or implied. | ||
| 7 | */ | ||
| 8 | |||
| 9 | #ifndef __ASM_ARCH_SYSTEM_H | ||
| 10 | #define __ASM_ARCH_SYSTEM_H | ||
| 11 | |||
| 12 | #include <mach/bridge-regs.h> | ||
| 13 | |||
| 14 | static inline void arch_idle(void) | ||
| 15 | { | ||
| 16 | cpu_do_idle(); | ||
| 17 | } | ||
| 18 | |||
| 19 | static inline void arch_reset(char mode, const char *cmd) | ||
| 20 | { | ||
| 21 | /* | ||
| 22 | * Enable soft reset to assert RSTOUTn. | ||
| 23 | */ | ||
| 24 | writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK); | ||
| 25 | |||
| 26 | /* | ||
| 27 | * Assert soft reset. | ||
| 28 | */ | ||
| 29 | writel(SOFT_RESET, SYSTEM_SOFT_RESET); | ||
| 30 | |||
| 31 | while (1) | ||
| 32 | ; | ||
| 33 | } | ||
| 34 | |||
| 35 | |||
| 36 | #endif | ||
diff --git a/arch/arm/mach-dove/include/mach/timex.h b/arch/arm/mach-dove/include/mach/timex.h new file mode 100644 index 00000000000..251d538541d --- /dev/null +++ b/arch/arm/mach-dove/include/mach/timex.h | |||
| @@ -0,0 +1,9 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-dove/include/mach/timex.h | ||
| 3 | * | ||
| 4 | * This file is licensed under the terms of the GNU General Public | ||
| 5 | * License version 2. This program is licensed "as is" without any | ||
| 6 | * warranty of any kind, whether express or implied. | ||
| 7 | */ | ||
| 8 | |||
| 9 | #define CLOCK_TICK_RATE (100 * HZ) | ||
diff --git a/arch/arm/mach-dove/include/mach/uncompress.h b/arch/arm/mach-dove/include/mach/uncompress.h new file mode 100644 index 00000000000..2c5cdd7a3ee --- /dev/null +++ b/arch/arm/mach-dove/include/mach/uncompress.h | |||
| @@ -0,0 +1,37 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-dove/include/mach/uncompress.h | ||
| 3 | * | ||
| 4 | * This file is licensed under the terms of the GNU General Public | ||
| 5 | * License version 2. This program is licensed "as is" without any | ||
| 6 | * warranty of any kind, whether express or implied. | ||
| 7 | */ | ||
| 8 | |||
| 9 | #include <mach/dove.h> | ||
| 10 | |||
| 11 | #define UART_THR ((volatile unsigned char *)(DOVE_UART0_PHYS_BASE + 0x0)) | ||
| 12 | #define UART_LSR ((volatile unsigned char *)(DOVE_UART0_PHYS_BASE + 0x14)) | ||
| 13 | |||
| 14 | #define LSR_THRE 0x20 | ||
| 15 | |||
| 16 | static void putc(const char c) | ||
| 17 | { | ||
| 18 | int i; | ||
| 19 | |||
| 20 | for (i = 0; i < 0x1000; i++) { | ||
| 21 | /* Transmit fifo not full? */ | ||
| 22 | if (*UART_LSR & LSR_THRE) | ||
| 23 | break; | ||
| 24 | } | ||
| 25 | |||
| 26 | *UART_THR = c; | ||
| 27 | } | ||
| 28 | |||
| 29 | static void flush(void) | ||
| 30 | { | ||
| 31 | } | ||
| 32 | |||
| 33 | /* | ||
| 34 | * nothing to do | ||
| 35 | */ | ||
| 36 | #define arch_decomp_setup() | ||
| 37 | #define arch_decomp_wdog() | ||
diff --git a/arch/arm/mach-dove/include/mach/vmalloc.h b/arch/arm/mach-dove/include/mach/vmalloc.h new file mode 100644 index 00000000000..8b2c974755c --- /dev/null +++ b/arch/arm/mach-dove/include/mach/vmalloc.h | |||
| @@ -0,0 +1,5 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-dove/include/mach/vmalloc.h | ||
| 3 | */ | ||
| 4 | |||
| 5 | #define VMALLOC_END 0xfd800000 | ||
diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c new file mode 100644 index 00000000000..61bfcb3b08c --- /dev/null +++ b/arch/arm/mach-dove/irq.c | |||
| @@ -0,0 +1,133 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-dove/irq.c | ||
| 3 | * | ||
| 4 | * Dove IRQ handling. | ||
| 5 | * | ||
| 6 | * This file is licensed under the terms of the GNU General Public | ||
| 7 | * License version 2. This program is licensed "as is" without any | ||
| 8 | * warranty of any kind, whether express or implied. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/kernel.h> | ||
| 12 | #include <linux/init.h> | ||
| 13 | #include <linux/irq.h> | ||
| 14 | #include <linux/gpio.h> | ||
| 15 | #include <linux/io.h> | ||
| 16 | #include <asm/mach/arch.h> | ||
| 17 | #include <plat/irq.h> | ||
| 18 | #include <asm/mach/irq.h> | ||
| 19 | #include <mach/pm.h> | ||
| 20 | #include <mach/bridge-regs.h> | ||
| 21 | #include "common.h" | ||
| 22 | |||
| 23 | static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | ||
| 24 | { | ||
| 25 | int irqoff; | ||
| 26 | BUG_ON(irq < IRQ_DOVE_GPIO_0_7 || irq > IRQ_DOVE_HIGH_GPIO); | ||
| 27 | |||
| 28 | irqoff = irq <= IRQ_DOVE_GPIO_16_23 ? irq - IRQ_DOVE_GPIO_0_7 : | ||
| 29 | 3 + irq - IRQ_DOVE_GPIO_24_31; | ||
| 30 | |||
| 31 | orion_gpio_irq_handler(irqoff << 3); | ||
| 32 | if (irq == IRQ_DOVE_HIGH_GPIO) { | ||
| 33 | orion_gpio_irq_handler(40); | ||
| 34 | orion_gpio_irq_handler(48); | ||
| 35 | orion_gpio_irq_handler(56); | ||
| 36 | } | ||
| 37 | } | ||
| 38 | |||
| 39 | static void pmu_irq_mask(unsigned int irq) | ||
| 40 | { | ||
| 41 | int pin = irq_to_pmu(irq); | ||
| 42 | u32 u; | ||
| 43 | |||
| 44 | u = readl(PMU_INTERRUPT_MASK); | ||
| 45 | u &= ~(1 << (pin & 31)); | ||
| 46 | writel(u, PMU_INTERRUPT_MASK); | ||
| 47 | } | ||
| 48 | |||
| 49 | static void pmu_irq_unmask(unsigned int irq) | ||
| 50 | { | ||
| 51 | int pin = irq_to_pmu(irq); | ||
| 52 | u32 u; | ||
| 53 | |||
| 54 | u = readl(PMU_INTERRUPT_MASK); | ||
| 55 | u |= 1 << (pin & 31); | ||
| 56 | writel(u, PMU_INTERRUPT_MASK); | ||
| 57 | } | ||
| 58 | |||
| 59 | static void pmu_irq_ack(unsigned int irq) | ||
| 60 | { | ||
| 61 | int pin = irq_to_pmu(irq); | ||
| 62 | u32 u; | ||
| 63 | |||
| 64 | u = ~(1 << (pin & 31)); | ||
| 65 | writel(u, PMU_INTERRUPT_CAUSE); | ||
| 66 | } | ||
| 67 | |||
| 68 | static struct irq_chip pmu_irq_chip = { | ||
| 69 | .name = "pmu_irq", | ||
| 70 | .mask = pmu_irq_mask, | ||
| 71 | .unmask = pmu_irq_unmask, | ||
| 72 | .ack = pmu_irq_ack, | ||
| 73 | }; | ||
| 74 | |||
| 75 | static void pmu_irq_handler(unsigned int irq, struct irq_desc *desc) | ||
| 76 | { | ||
| 77 | unsigned long cause = readl(PMU_INTERRUPT_CAUSE); | ||
| 78 | |||
| 79 | cause &= readl(PMU_INTERRUPT_MASK); | ||
| 80 | if (cause == 0) { | ||
| 81 | do_bad_IRQ(irq, desc); | ||
| 82 | return; | ||
| 83 | } | ||
| 84 | |||
| 85 | for (irq = 0; irq < NR_PMU_IRQS; irq++) { | ||
| 86 | if (!(cause & (1 << irq))) | ||
| 87 | continue; | ||
| 88 | irq = pmu_to_irq(irq); | ||
| 89 | desc = irq_desc + irq; | ||
| 90 | desc_handle_irq(irq, desc); | ||
| 91 | } | ||
| 92 | } | ||
| 93 | |||
| 94 | void __init dove_init_irq(void) | ||
| 95 | { | ||
| 96 | int i; | ||
| 97 | |||
| 98 | orion_irq_init(0, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF)); | ||
| 99 | orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF)); | ||
| 100 | |||
| 101 | /* | ||
| 102 | * Mask and clear GPIO IRQ interrupts. | ||
| 103 | */ | ||
| 104 | writel(0, GPIO_LEVEL_MASK(0)); | ||
| 105 | writel(0, GPIO_EDGE_MASK(0)); | ||
| 106 | writel(0, GPIO_EDGE_CAUSE(0)); | ||
| 107 | |||
| 108 | /* | ||
| 109 | * Mask and clear PMU interrupts | ||
| 110 | */ | ||
| 111 | writel(0, PMU_INTERRUPT_MASK); | ||
| 112 | writel(0, PMU_INTERRUPT_CAUSE); | ||
| 113 | |||
| 114 | for (i = IRQ_DOVE_GPIO_START; i < IRQ_DOVE_PMU_START; i++) { | ||
| 115 | set_irq_chip(i, &orion_gpio_irq_chip); | ||
| 116 | set_irq_handler(i, handle_level_irq); | ||
| 117 | irq_desc[i].status |= IRQ_LEVEL; | ||
| 118 | set_irq_flags(i, IRQF_VALID); | ||
| 119 | } | ||
| 120 | set_irq_chained_handler(IRQ_DOVE_GPIO_0_7, gpio_irq_handler); | ||
| 121 | set_irq_chained_handler(IRQ_DOVE_GPIO_8_15, gpio_irq_handler); | ||
| 122 | set_irq_chained_handler(IRQ_DOVE_GPIO_16_23, gpio_irq_handler); | ||
| 123 | set_irq_chained_handler(IRQ_DOVE_GPIO_24_31, gpio_irq_handler); | ||
| 124 | set_irq_chained_handler(IRQ_DOVE_HIGH_GPIO, gpio_irq_handler); | ||
| 125 | |||
| 126 | for (i = IRQ_DOVE_PMU_START; i < NR_IRQS; i++) { | ||
| 127 | set_irq_chip(i, &pmu_irq_chip); | ||
| 128 | set_irq_handler(i, handle_level_irq); | ||
| 129 | irq_desc[i].status |= IRQ_LEVEL; | ||
| 130 | set_irq_flags(i, IRQF_VALID); | ||
| 131 | } | ||
| 132 | set_irq_chained_handler(IRQ_DOVE_PMU, pmu_irq_handler); | ||
| 133 | } | ||
diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c new file mode 100644 index 00000000000..502d1ca2f4b --- /dev/null +++ b/arch/arm/mach-dove/pcie.c | |||
| @@ -0,0 +1,238 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-dove/pcie.c | ||
| 3 | * | ||
| 4 | * PCIe functions for Marvell Dove 88AP510 SoC | ||
| 5 | * | ||
| 6 | * This file is licensed under the terms of the GNU General Public | ||
| 7 | * License version 2. This program is licensed "as is" without any | ||
| 8 | * warranty of any kind, whether express or implied. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/kernel.h> | ||
| 12 | #include <linux/pci.h> | ||
| 13 | #include <linux/mbus.h> | ||
| 14 | #include <asm/mach/pci.h> | ||
| 15 | #include <asm/mach/arch.h> | ||
| 16 | #include <asm/setup.h> | ||
| 17 | #include <asm/delay.h> | ||
| 18 | #include <plat/pcie.h> | ||
| 19 | #include <mach/irqs.h> | ||
| 20 | #include <mach/bridge-regs.h> | ||
| 21 | #include "common.h" | ||
| 22 | |||
| 23 | struct pcie_port { | ||
| 24 | u8 index; | ||
| 25 | u8 root_bus_nr; | ||
| 26 | void __iomem *base; | ||
| 27 | spinlock_t conf_lock; | ||
| 28 | char io_space_name[16]; | ||
| 29 | char mem_space_name[16]; | ||
| 30 | struct resource res[2]; | ||
| 31 | }; | ||
| 32 | |||
| 33 | static struct pcie_port pcie_port[2]; | ||
| 34 | static int num_pcie_ports; | ||
| 35 | |||
| 36 | |||
| 37 | static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys) | ||
| 38 | { | ||
| 39 | struct pcie_port *pp; | ||
| 40 | |||
| 41 | if (nr >= num_pcie_ports) | ||
| 42 | return 0; | ||
| 43 | |||
| 44 | pp = &pcie_port[nr]; | ||
| 45 | pp->root_bus_nr = sys->busnr; | ||
| 46 | |||
| 47 | /* | ||
| 48 | * Generic PCIe unit setup. | ||
| 49 | */ | ||
| 50 | orion_pcie_set_local_bus_nr(pp->base, sys->busnr); | ||
| 51 | |||
| 52 | orion_pcie_setup(pp->base, &dove_mbus_dram_info); | ||
| 53 | |||
| 54 | /* | ||
| 55 | * IORESOURCE_IO | ||
| 56 | */ | ||
| 57 | snprintf(pp->io_space_name, sizeof(pp->io_space_name), | ||
| 58 | "PCIe %d I/O", pp->index); | ||
| 59 | pp->io_space_name[sizeof(pp->io_space_name) - 1] = 0; | ||
| 60 | pp->res[0].name = pp->io_space_name; | ||
| 61 | if (pp->index == 0) { | ||
| 62 | pp->res[0].start = DOVE_PCIE0_IO_PHYS_BASE; | ||
| 63 | pp->res[0].end = pp->res[0].start + DOVE_PCIE0_IO_SIZE - 1; | ||
| 64 | } else { | ||
| 65 | pp->res[0].start = DOVE_PCIE1_IO_PHYS_BASE; | ||
| 66 | pp->res[0].end = pp->res[0].start + DOVE_PCIE1_IO_SIZE - 1; | ||
| 67 | } | ||
| 68 | pp->res[0].flags = IORESOURCE_IO; | ||
| 69 | if (request_resource(&ioport_resource, &pp->res[0])) | ||
| 70 | panic("Request PCIe IO resource failed\n"); | ||
| 71 | sys->resource[0] = &pp->res[0]; | ||
| 72 | |||
| 73 | /* | ||
| 74 | * IORESOURCE_MEM | ||
| 75 | */ | ||
| 76 | snprintf(pp->mem_space_name, sizeof(pp->mem_space_name), | ||
| 77 | "PCIe %d MEM", pp->index); | ||
| 78 | pp->mem_space_name[sizeof(pp->mem_space_name) - 1] = 0; | ||
| 79 | pp->res[1].name = pp->mem_space_name; | ||
| 80 | if (pp->index == 0) { | ||
| 81 | pp->res[1].start = DOVE_PCIE0_MEM_PHYS_BASE; | ||
| 82 | pp->res[1].end = pp->res[1].start + DOVE_PCIE0_MEM_SIZE - 1; | ||
| 83 | } else { | ||
| 84 | pp->res[1].start = DOVE_PCIE1_MEM_PHYS_BASE; | ||
| 85 | pp->res[1].end = pp->res[1].start + DOVE_PCIE1_MEM_SIZE - 1; | ||
| 86 | } | ||
| 87 | pp->res[1].flags = IORESOURCE_MEM; | ||
| 88 | if (request_resource(&iomem_resource, &pp->res[1])) | ||
| 89 | panic("Request PCIe Memory resource failed\n"); | ||
| 90 | sys->resource[1] = &pp->res[1]; | ||
| 91 | |||
| 92 | sys->resource[2] = NULL; | ||
| 93 | |||
| 94 | return 1; | ||
| 95 | } | ||
| 96 | |||
| 97 | static struct pcie_port *bus_to_port(int bus) | ||
| 98 | { | ||
| 99 | int i; | ||
| 100 | |||
| 101 | for (i = num_pcie_ports - 1; i >= 0; i--) { | ||
| 102 | int rbus = pcie_port[i].root_bus_nr; | ||
| 103 | if (rbus != -1 && rbus <= bus) | ||
| 104 | break; | ||
| 105 | } | ||
| 106 | |||
| 107 | return i >= 0 ? pcie_port + i : NULL; | ||
| 108 | } | ||
| 109 | |||
| 110 | static int pcie_valid_config(struct pcie_port *pp, int bus, int dev) | ||
| 111 | { | ||
| 112 | /* | ||
| 113 | * Don't go out when trying to access nonexisting devices | ||
| 114 | * on the local bus. | ||
| 115 | */ | ||
| 116 | if (bus == pp->root_bus_nr && dev > 1) | ||
| 117 | return 0; | ||
| 118 | |||
| 119 | return 1; | ||
| 120 | } | ||
| 121 | |||
| 122 | static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, | ||
| 123 | int size, u32 *val) | ||
| 124 | { | ||
| 125 | struct pcie_port *pp = bus_to_port(bus->number); | ||
| 126 | unsigned long flags; | ||
| 127 | int ret; | ||
| 128 | |||
| 129 | if (pcie_valid_config(pp, bus->number, PCI_SLOT(devfn)) == 0) { | ||
| 130 | *val = 0xffffffff; | ||
| 131 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
| 132 | } | ||
| 133 | |||
| 134 | spin_lock_irqsave(&pp->conf_lock, flags); | ||
| 135 | ret = orion_pcie_rd_conf(pp->base, bus, devfn, where, size, val); | ||
| 136 | spin_unlock_irqrestore(&pp->conf_lock, flags); | ||
| 137 | |||
| 138 | return ret; | ||
| 139 | } | ||
| 140 | |||
| 141 | static int pcie_wr_conf(struct pci_bus *bus, u32 devfn, | ||
| 142 | int where, int size, u32 val) | ||
| 143 | { | ||
| 144 | struct pcie_port *pp = bus_to_port(bus->number); | ||
| 145 | unsigned long flags; | ||
| 146 | int ret; | ||
| 147 | |||
| 148 | if (pcie_valid_config(pp, bus->number, PCI_SLOT(devfn)) == 0) | ||
| 149 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
| 150 | |||
| 151 | spin_lock_irqsave(&pp->conf_lock, flags); | ||
| 152 | ret = orion_pcie_wr_conf(pp->base, bus, devfn, where, size, val); | ||
| 153 | spin_unlock_irqrestore(&pp->conf_lock, flags); | ||
| 154 | |||
| 155 | return ret; | ||
| 156 | } | ||
| 157 | |||
| 158 | static struct pci_ops pcie_ops = { | ||
| 159 | .read = pcie_rd_conf, | ||
| 160 | .write = pcie_wr_conf, | ||
| 161 | }; | ||
| 162 | |||
| 163 | static void __devinit rc_pci_fixup(struct pci_dev *dev) | ||
| 164 | { | ||
| 165 | /* | ||
| 166 | * Prevent enumeration of root complex. | ||
| 167 | */ | ||
| 168 | if (dev->bus->parent == NULL && dev->devfn == 0) { | ||
| 169 | int i; | ||
| 170 | |||
| 171 | for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { | ||
| 172 | dev->resource[i].start = 0; | ||
| 173 | dev->resource[i].end = 0; | ||
| 174 | dev->resource[i].flags = 0; | ||
| 175 | } | ||
| 176 | } | ||
| 177 | } | ||
| 178 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_ANY_ID, rc_pci_fixup); | ||
| 179 | |||
| 180 | static struct pci_bus __init * | ||
| 181 | dove_pcie_scan_bus(int nr, struct pci_sys_data *sys) | ||
| 182 | { | ||
| 183 | struct pci_bus *bus; | ||
| 184 | |||
| 185 | if (nr < num_pcie_ports) { | ||
| 186 | bus = pci_scan_bus(sys->busnr, &pcie_ops, sys); | ||
| 187 | } else { | ||
| 188 | bus = NULL; | ||
| 189 | BUG(); | ||
| 190 | } | ||
| 191 | |||
| 192 | return bus; | ||
| 193 | } | ||
| 194 | |||
| 195 | static int __init dove_pcie_map_irq(struct pci_dev *dev, u8 slot, u8 pin) | ||
| 196 | { | ||
| 197 | struct pcie_port *pp = bus_to_port(dev->bus->number); | ||
| 198 | |||
| 199 | return pp->index ? IRQ_DOVE_PCIE1 : IRQ_DOVE_PCIE0; | ||
| 200 | } | ||
| 201 | |||
| 202 | static struct hw_pci dove_pci __initdata = { | ||
| 203 | .nr_controllers = 2, | ||
| 204 | .swizzle = pci_std_swizzle, | ||
| 205 | .setup = dove_pcie_setup, | ||
| 206 | .scan = dove_pcie_scan_bus, | ||
| 207 | .map_irq = dove_pcie_map_irq, | ||
| 208 | }; | ||
| 209 | |||
| 210 | static void __init add_pcie_port(int index, unsigned long base) | ||
| 211 | { | ||
| 212 | printk(KERN_INFO "Dove PCIe port %d: ", index); | ||
| 213 | |||
| 214 | if (orion_pcie_link_up((void __iomem *)base)) { | ||
| 215 | struct pcie_port *pp = &pcie_port[num_pcie_ports++]; | ||
| 216 | |||
| 217 | printk(KERN_INFO "link up\n"); | ||
| 218 | |||
| 219 | pp->index = index; | ||
| 220 | pp->root_bus_nr = -1; | ||
| 221 | pp->base = (void __iomem *)base; | ||
| 222 | spin_lock_init(&pp->conf_lock); | ||
| 223 | memset(pp->res, 0, sizeof(pp->res)); | ||
| 224 | } else { | ||
| 225 | printk(KERN_INFO "link down, ignoring\n"); | ||
| 226 | } | ||
| 227 | } | ||
| 228 | |||
| 229 | void __init dove_pcie_init(int init_port0, int init_port1) | ||
| 230 | { | ||
| 231 | if (init_port0) | ||
| 232 | add_pcie_port(0, DOVE_PCIE0_VIRT_BASE); | ||
| 233 | |||
| 234 | if (init_port1) | ||
| 235 | add_pcie_port(1, DOVE_PCIE1_VIRT_BASE); | ||
| 236 | |||
| 237 | pci_common_init(&dove_pci); | ||
| 238 | } | ||
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index b4357c388d2..1f0d66561bb 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c | |||
| @@ -31,6 +31,7 @@ | |||
| 31 | 31 | ||
| 32 | #include <mach/hardware.h> | 32 | #include <mach/hardware.h> |
| 33 | #include <mach/fb.h> | 33 | #include <mach/fb.h> |
| 34 | #include <mach/ep93xx_keypad.h> | ||
| 34 | 35 | ||
| 35 | #include <asm/mach/map.h> | 36 | #include <asm/mach/map.h> |
| 36 | #include <asm/mach/time.h> | 37 | #include <asm/mach/time.h> |
| @@ -728,6 +729,82 @@ void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data) | |||
| 728 | platform_device_register(&ep93xx_fb_device); | 729 | platform_device_register(&ep93xx_fb_device); |
| 729 | } | 730 | } |
| 730 | 731 | ||
| 732 | |||
| 733 | /************************************************************************* | ||
| 734 | * EP93xx matrix keypad peripheral handling | ||
| 735 | *************************************************************************/ | ||
| 736 | static struct resource ep93xx_keypad_resource[] = { | ||
| 737 | { | ||
| 738 | .start = EP93XX_KEY_MATRIX_PHYS_BASE, | ||
| 739 | .end = EP93XX_KEY_MATRIX_PHYS_BASE + 0x0c - 1, | ||
| 740 | .flags = IORESOURCE_MEM, | ||
| 741 | }, { | ||
| 742 | .start = IRQ_EP93XX_KEY, | ||
| 743 | .end = IRQ_EP93XX_KEY, | ||
| 744 | .flags = IORESOURCE_IRQ, | ||
| 745 | }, | ||
| 746 | }; | ||
| 747 | |||
| 748 | static struct platform_device ep93xx_keypad_device = { | ||
| 749 | .name = "ep93xx-keypad", | ||
| 750 | .id = -1, | ||
| 751 | .num_resources = ARRAY_SIZE(ep93xx_keypad_resource), | ||
| 752 | .resource = ep93xx_keypad_resource, | ||
| 753 | }; | ||
| 754 | |||
| 755 | void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data) | ||
| 756 | { | ||
| 757 | ep93xx_keypad_device.dev.platform_data = data; | ||
| 758 | platform_device_register(&ep93xx_keypad_device); | ||
| 759 | } | ||
| 760 | |||
| 761 | int ep93xx_keypad_acquire_gpio(struct platform_device *pdev) | ||
| 762 | { | ||
| 763 | int err; | ||
| 764 | int i; | ||
| 765 | |||
| 766 | for (i = 0; i < 8; i++) { | ||
| 767 | err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev)); | ||
| 768 | if (err) | ||
| 769 | goto fail_gpio_c; | ||
| 770 | err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev)); | ||
| 771 | if (err) | ||
| 772 | goto fail_gpio_d; | ||
| 773 | } | ||
| 774 | |||
| 775 | /* Enable the keypad controller; GPIO ports C and D used for keypad */ | ||
| 776 | ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS | | ||
| 777 | EP93XX_SYSCON_DEVCFG_GONK); | ||
| 778 | |||
| 779 | return 0; | ||
| 780 | |||
| 781 | fail_gpio_d: | ||
| 782 | gpio_free(EP93XX_GPIO_LINE_C(i)); | ||
| 783 | fail_gpio_c: | ||
| 784 | for ( ; i >= 0; --i) { | ||
| 785 | gpio_free(EP93XX_GPIO_LINE_C(i)); | ||
| 786 | gpio_free(EP93XX_GPIO_LINE_D(i)); | ||
| 787 | } | ||
| 788 | return err; | ||
| 789 | } | ||
| 790 | EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio); | ||
| 791 | |||
| 792 | void ep93xx_keypad_release_gpio(struct platform_device *pdev) | ||
| 793 | { | ||
| 794 | int i; | ||
| 795 | |||
| 796 | for (i = 0; i < 8; i++) { | ||
| 797 | gpio_free(EP93XX_GPIO_LINE_C(i)); | ||
| 798 | gpio_free(EP93XX_GPIO_LINE_D(i)); | ||
| 799 | } | ||
| 800 | |||
| 801 | /* Disable the keypad controller; GPIO ports C and D used for GPIO */ | ||
| 802 | ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS | | ||
| 803 | EP93XX_SYSCON_DEVCFG_GONK); | ||
| 804 | } | ||
| 805 | EXPORT_SYMBOL(ep93xx_keypad_release_gpio); | ||
| 806 | |||
| 807 | |||
| 731 | extern void ep93xx_gpio_init(void); | 808 | extern void ep93xx_gpio_init(void); |
| 732 | 809 | ||
| 733 | void __init ep93xx_init_devices(void) | 810 | void __init ep93xx_init_devices(void) |
diff --git a/arch/arm/mach-ep93xx/include/mach/clkdev.h b/arch/arm/mach-ep93xx/include/mach/clkdev.h index 04b37a89801..50cb991eade 100644 --- a/arch/arm/mach-ep93xx/include/mach/clkdev.h +++ b/arch/arm/mach-ep93xx/include/mach/clkdev.h | |||
| @@ -1,3 +1,7 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-ep93xx/include/mach/clkdev.h | ||
| 3 | */ | ||
| 4 | |||
| 1 | #ifndef __ASM_MACH_CLKDEV_H | 5 | #ifndef __ASM_MACH_CLKDEV_H |
| 2 | #define __ASM_MACH_CLKDEV_H | 6 | #define __ASM_MACH_CLKDEV_H |
| 3 | 7 | ||
diff --git a/arch/arm/mach-ep93xx/include/mach/dma.h b/arch/arm/mach-ep93xx/include/mach/dma.h index ef6bd9d1314..3a5961d3f3b 100644 --- a/arch/arm/mach-ep93xx/include/mach/dma.h +++ b/arch/arm/mach-ep93xx/include/mach/dma.h | |||
| @@ -1,3 +1,7 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-ep93xx/include/mach/dma.h | ||
| 3 | */ | ||
| 4 | |||
| 1 | #ifndef __ASM_ARCH_DMA_H | 5 | #ifndef __ASM_ARCH_DMA_H |
| 2 | #define __ASM_ARCH_DMA_H | 6 | #define __ASM_ARCH_DMA_H |
| 3 | 7 | ||
diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h index b1f937eda29..d55194a4c09 100644 --- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h +++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h | |||
| @@ -134,6 +134,7 @@ | |||
| 134 | #define EP93XX_UART3_PHYS_BASE EP93XX_APB_PHYS(0x000e0000) | 134 | #define EP93XX_UART3_PHYS_BASE EP93XX_APB_PHYS(0x000e0000) |
| 135 | #define EP93XX_UART3_BASE EP93XX_APB_IOMEM(0x000e0000) | 135 | #define EP93XX_UART3_BASE EP93XX_APB_IOMEM(0x000e0000) |
| 136 | 136 | ||
| 137 | #define EP93XX_KEY_MATRIX_PHYS_BASE EP93XX_APB_PHYS(0x000f0000) | ||
| 137 | #define EP93XX_KEY_MATRIX_BASE EP93XX_APB_IOMEM(0x000f0000) | 138 | #define EP93XX_KEY_MATRIX_BASE EP93XX_APB_IOMEM(0x000f0000) |
| 138 | 139 | ||
| 139 | #define EP93XX_ADC_BASE EP93XX_APB_IOMEM(0x00100000) | 140 | #define EP93XX_ADC_BASE EP93XX_APB_IOMEM(0x00100000) |
diff --git a/arch/arm/mach-ep93xx/include/mach/hardware.h b/arch/arm/mach-ep93xx/include/mach/hardware.h index 349fa7cb72d..5a3ce024b59 100644 --- a/arch/arm/mach-ep93xx/include/mach/hardware.h +++ b/arch/arm/mach-ep93xx/include/mach/hardware.h | |||
| @@ -1,6 +1,7 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * arch/arm/mach-ep93xx/include/mach/hardware.h | 2 | * arch/arm/mach-ep93xx/include/mach/hardware.h |
| 3 | */ | 3 | */ |
| 4 | |||
| 4 | #ifndef __ASM_ARCH_HARDWARE_H | 5 | #ifndef __ASM_ARCH_HARDWARE_H |
| 5 | #define __ASM_ARCH_HARDWARE_H | 6 | #define __ASM_ARCH_HARDWARE_H |
| 6 | 7 | ||
diff --git a/arch/arm/mach-ep93xx/include/mach/io.h b/arch/arm/mach-ep93xx/include/mach/io.h index cebcc1c53d6..594b77f2105 100644 --- a/arch/arm/mach-ep93xx/include/mach/io.h +++ b/arch/arm/mach-ep93xx/include/mach/io.h | |||
| @@ -1,6 +1,7 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * arch/arm/mach-ep93xx/include/mach/io.h | 2 | * arch/arm/mach-ep93xx/include/mach/io.h |
| 3 | */ | 3 | */ |
| 4 | |||
| 4 | #ifndef __ASM_MACH_IO_H | 5 | #ifndef __ASM_MACH_IO_H |
| 5 | #define __ASM_MACH_IO_H | 6 | #define __ASM_MACH_IO_H |
| 6 | 7 | ||
diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h index 469fd968d51..c6dc14dbca1 100644 --- a/arch/arm/mach-ep93xx/include/mach/platform.h +++ b/arch/arm/mach-ep93xx/include/mach/platform.h | |||
| @@ -8,6 +8,7 @@ struct i2c_gpio_platform_data; | |||
| 8 | struct i2c_board_info; | 8 | struct i2c_board_info; |
| 9 | struct platform_device; | 9 | struct platform_device; |
| 10 | struct ep93xxfb_mach_info; | 10 | struct ep93xxfb_mach_info; |
| 11 | struct ep93xx_keypad_platform_data; | ||
| 11 | 12 | ||
| 12 | struct ep93xx_eth_data | 13 | struct ep93xx_eth_data |
| 13 | { | 14 | { |
| @@ -39,6 +40,9 @@ void ep93xx_register_fb(struct ep93xxfb_mach_info *data); | |||
| 39 | void ep93xx_register_pwm(int pwm0, int pwm1); | 40 | void ep93xx_register_pwm(int pwm0, int pwm1); |
| 40 | int ep93xx_pwm_acquire_gpio(struct platform_device *pdev); | 41 | int ep93xx_pwm_acquire_gpio(struct platform_device *pdev); |
| 41 | void ep93xx_pwm_release_gpio(struct platform_device *pdev); | 42 | void ep93xx_pwm_release_gpio(struct platform_device *pdev); |
| 43 | void ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data); | ||
| 44 | int ep93xx_keypad_acquire_gpio(struct platform_device *pdev); | ||
| 45 | void ep93xx_keypad_release_gpio(struct platform_device *pdev); | ||
| 42 | 46 | ||
| 43 | void ep93xx_init_devices(void); | 47 | void ep93xx_init_devices(void); |
| 44 | extern struct sys_timer ep93xx_timer; | 48 | extern struct sys_timer ep93xx_timer; |
diff --git a/arch/arm/mach-iop13xx/include/mach/memory.h b/arch/arm/mach-iop13xx/include/mach/memory.h index 42ae29b288a..25b1da9a503 100644 --- a/arch/arm/mach-iop13xx/include/mach/memory.h +++ b/arch/arm/mach-iop13xx/include/mach/memory.h | |||
| @@ -64,6 +64,8 @@ static inline unsigned long __lbus_to_virt(dma_addr_t x) | |||
| 64 | (dma_addr_t)page_to_phys(page); \ | 64 | (dma_addr_t)page_to_phys(page); \ |
| 65 | }) | 65 | }) |
| 66 | 66 | ||
| 67 | #define __arch_dma_to_page(dev, addr) phys_to_page(addr) | ||
| 68 | |||
| 67 | #endif /* CONFIG_ARCH_IOP13XX */ | 69 | #endif /* CONFIG_ARCH_IOP13XX */ |
| 68 | #endif /* !ASSEMBLY */ | 70 | #endif /* !ASSEMBLY */ |
| 69 | 71 | ||
diff --git a/arch/arm/mach-iop13xx/include/mach/time.h b/arch/arm/mach-iop13xx/include/mach/time.h index d6d52527589..f1c00d6d560 100644 --- a/arch/arm/mach-iop13xx/include/mach/time.h +++ b/arch/arm/mach-iop13xx/include/mach/time.h | |||
| @@ -20,7 +20,6 @@ | |||
| 20 | #define IOP13XX_CORE_FREQ_1200 (5 << 16) | 20 | #define IOP13XX_CORE_FREQ_1200 (5 << 16) |
| 21 | 21 | ||
| 22 | void iop_init_time(unsigned long tickrate); | 22 | void iop_init_time(unsigned long tickrate); |
| 23 | unsigned long iop_gettimeoffset(void); | ||
| 24 | 23 | ||
| 25 | static inline unsigned long iop13xx_core_freq(void) | 24 | static inline unsigned long iop13xx_core_freq(void) |
| 26 | { | 25 | { |
| @@ -66,6 +65,13 @@ static inline unsigned long iop13xx_xsi_bus_ratio(void) | |||
| 66 | return 2; | 65 | return 2; |
| 67 | } | 66 | } |
| 68 | 67 | ||
| 68 | static inline u32 read_tmr0(void) | ||
| 69 | { | ||
| 70 | u32 val; | ||
| 71 | asm volatile("mrc p6, 0, %0, c0, c9, 0" : "=r" (val)); | ||
| 72 | return val; | ||
| 73 | } | ||
| 74 | |||
| 69 | static inline void write_tmr0(u32 val) | 75 | static inline void write_tmr0(u32 val) |
| 70 | { | 76 | { |
| 71 | asm volatile("mcr p6, 0, %0, c0, c9, 0" : : "r" (val)); | 77 | asm volatile("mcr p6, 0, %0, c0, c9, 0" : : "r" (val)); |
| @@ -83,6 +89,11 @@ static inline u32 read_tcr0(void) | |||
| 83 | return val; | 89 | return val; |
| 84 | } | 90 | } |
| 85 | 91 | ||
| 92 | static inline void write_tcr0(u32 val) | ||
| 93 | { | ||
| 94 | asm volatile("mcr p6, 0, %0, c2, c9, 0" : : "r" (val)); | ||
| 95 | } | ||
| 96 | |||
| 86 | static inline u32 read_tcr1(void) | 97 | static inline u32 read_tcr1(void) |
| 87 | { | 98 | { |
| 88 | u32 val; | 99 | u32 val; |
| @@ -90,6 +101,11 @@ static inline u32 read_tcr1(void) | |||
| 90 | return val; | 101 | return val; |
| 91 | } | 102 | } |
| 92 | 103 | ||
| 104 | static inline void write_tcr1(u32 val) | ||
| 105 | { | ||
| 106 | asm volatile("mcr p6, 0, %0, c3, c9, 0" : : "r" (val)); | ||
| 107 | } | ||
| 108 | |||
| 93 | static inline void write_trr0(u32 val) | 109 | static inline void write_trr0(u32 val) |
| 94 | { | 110 | { |
| 95 | asm volatile("mcr p6, 0, %0, c4, c9, 0" : : "r" (val)); | 111 | asm volatile("mcr p6, 0, %0, c4, c9, 0" : : "r" (val)); |
diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c index 5051c03d437..f91f3154577 100644 --- a/arch/arm/mach-iop13xx/iq81340mc.c +++ b/arch/arm/mach-iop13xx/iq81340mc.c | |||
| @@ -87,7 +87,6 @@ static void __init iq81340mc_timer_init(void) | |||
| 87 | 87 | ||
| 88 | static struct sys_timer iq81340mc_timer = { | 88 | static struct sys_timer iq81340mc_timer = { |
| 89 | .init = iq81340mc_timer_init, | 89 | .init = iq81340mc_timer_init, |
| 90 | .offset = iop_gettimeoffset, | ||
| 91 | }; | 90 | }; |
| 92 | 91 | ||
| 93 | MACHINE_START(IQ81340MC, "Intel IQ81340MC") | 92 | MACHINE_START(IQ81340MC, "Intel IQ81340MC") |
diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c index bc443073a8e..ddb7a3435de 100644 --- a/arch/arm/mach-iop13xx/iq81340sc.c +++ b/arch/arm/mach-iop13xx/iq81340sc.c | |||
| @@ -89,7 +89,6 @@ static void __init iq81340sc_timer_init(void) | |||
| 89 | 89 | ||
| 90 | static struct sys_timer iq81340sc_timer = { | 90 | static struct sys_timer iq81340sc_timer = { |
| 91 | .init = iq81340sc_timer_init, | 91 | .init = iq81340sc_timer_init, |
| 92 | .offset = iop_gettimeoffset, | ||
| 93 | }; | 92 | }; |
| 94 | 93 | ||
| 95 | MACHINE_START(IQ81340SC, "Intel IQ81340SC") | 94 | MACHINE_START(IQ81340SC, "Intel IQ81340SC") |
diff --git a/arch/arm/mach-iop32x/em7210.c b/arch/arm/mach-iop32x/em7210.c index 3ad4696ade4..2bef9b6e1cc 100644 --- a/arch/arm/mach-iop32x/em7210.c +++ b/arch/arm/mach-iop32x/em7210.c | |||
| @@ -42,7 +42,6 @@ static void __init em7210_timer_init(void) | |||
| 42 | 42 | ||
| 43 | static struct sys_timer em7210_timer = { | 43 | static struct sys_timer em7210_timer = { |
| 44 | .init = em7210_timer_init, | 44 | .init = em7210_timer_init, |
| 45 | .offset = iop_gettimeoffset, | ||
| 46 | }; | 45 | }; |
| 47 | 46 | ||
| 48 | /* | 47 | /* |
diff --git a/arch/arm/mach-iop32x/glantank.c b/arch/arm/mach-iop32x/glantank.c index a9c2dfdb250..93370a46b62 100644 --- a/arch/arm/mach-iop32x/glantank.c +++ b/arch/arm/mach-iop32x/glantank.c | |||
| @@ -47,7 +47,6 @@ static void __init glantank_timer_init(void) | |||
| 47 | 47 | ||
| 48 | static struct sys_timer glantank_timer = { | 48 | static struct sys_timer glantank_timer = { |
| 49 | .init = glantank_timer_init, | 49 | .init = glantank_timer_init, |
| 50 | .offset = iop_gettimeoffset, | ||
| 51 | }; | 50 | }; |
| 52 | 51 | ||
| 53 | 52 | ||
diff --git a/arch/arm/mach-iop32x/iq31244.c b/arch/arm/mach-iop32x/iq31244.c index dd1cd990451..a7a08dda7f3 100644 --- a/arch/arm/mach-iop32x/iq31244.c +++ b/arch/arm/mach-iop32x/iq31244.c | |||
| @@ -78,7 +78,6 @@ static void __init iq31244_timer_init(void) | |||
| 78 | 78 | ||
| 79 | static struct sys_timer iq31244_timer = { | 79 | static struct sys_timer iq31244_timer = { |
| 80 | .init = iq31244_timer_init, | 80 | .init = iq31244_timer_init, |
| 81 | .offset = iop_gettimeoffset, | ||
| 82 | }; | 81 | }; |
| 83 | 82 | ||
| 84 | 83 | ||
diff --git a/arch/arm/mach-iop32x/iq80321.c b/arch/arm/mach-iop32x/iq80321.c index fbe27798759..0200f80c1e1 100644 --- a/arch/arm/mach-iop32x/iq80321.c +++ b/arch/arm/mach-iop32x/iq80321.c | |||
| @@ -46,7 +46,6 @@ static void __init iq80321_timer_init(void) | |||
| 46 | 46 | ||
| 47 | static struct sys_timer iq80321_timer = { | 47 | static struct sys_timer iq80321_timer = { |
| 48 | .init = iq80321_timer_init, | 48 | .init = iq80321_timer_init, |
| 49 | .offset = iop_gettimeoffset, | ||
| 50 | }; | 49 | }; |
| 51 | 50 | ||
| 52 | 51 | ||
diff --git a/arch/arm/mach-iop32x/n2100.c b/arch/arm/mach-iop32x/n2100.c index d2e42789972..2a5c637639b 100644 --- a/arch/arm/mach-iop32x/n2100.c +++ b/arch/arm/mach-iop32x/n2100.c | |||
| @@ -53,7 +53,6 @@ static void __init n2100_timer_init(void) | |||
| 53 | 53 | ||
| 54 | static struct sys_timer n2100_timer = { | 54 | static struct sys_timer n2100_timer = { |
| 55 | .init = n2100_timer_init, | 55 | .init = n2100_timer_init, |
| 56 | .offset = iop_gettimeoffset, | ||
| 57 | }; | 56 | }; |
| 58 | 57 | ||
| 59 | 58 | ||
diff --git a/arch/arm/mach-iop33x/iq80331.c b/arch/arm/mach-iop33x/iq80331.c index d51e10cddf2..394e95a30b7 100644 --- a/arch/arm/mach-iop33x/iq80331.c +++ b/arch/arm/mach-iop33x/iq80331.c | |||
| @@ -48,7 +48,6 @@ static void __init iq80331_timer_init(void) | |||
| 48 | 48 | ||
| 49 | static struct sys_timer iq80331_timer = { | 49 | static struct sys_timer iq80331_timer = { |
| 50 | .init = iq80331_timer_init, | 50 | .init = iq80331_timer_init, |
| 51 | .offset = iop_gettimeoffset, | ||
| 52 | }; | 51 | }; |
| 53 | 52 | ||
| 54 | 53 | ||
diff --git a/arch/arm/mach-iop33x/iq80332.c b/arch/arm/mach-iop33x/iq80332.c index 92fb44cdbca..a40badf126c 100644 --- a/arch/arm/mach-iop33x/iq80332.c +++ b/arch/arm/mach-iop33x/iq80332.c | |||
| @@ -48,7 +48,6 @@ static void __init iq80332_timer_init(void) | |||
| 48 | 48 | ||
| 49 | static struct sys_timer iq80332_timer = { | 49 | static struct sys_timer iq80332_timer = { |
| 50 | .init = iq80332_timer_init, | 50 | .init = iq80332_timer_init, |
| 51 | .offset = iop_gettimeoffset, | ||
| 52 | }; | 51 | }; |
| 53 | 52 | ||
| 54 | 53 | ||
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig index 0aca451b216..8bf09ae5b34 100644 --- a/arch/arm/mach-kirkwood/Kconfig +++ b/arch/arm/mach-kirkwood/Kconfig | |||
| @@ -33,10 +33,18 @@ config MACH_SHEEVAPLUG | |||
| 33 | Marvell SheevaPlug Reference Board. | 33 | Marvell SheevaPlug Reference Board. |
| 34 | 34 | ||
| 35 | config MACH_TS219 | 35 | config MACH_TS219 |
| 36 | bool "QNAP TS-119 and TS-219 Turbo NAS" | 36 | bool "QNAP TS-110, TS-119, TS-210, TS-219 and TS-219P Turbo NAS" |
| 37 | help | 37 | help |
| 38 | Say 'Y' here if you want your kernel to support the | 38 | Say 'Y' here if you want your kernel to support the |
| 39 | QNAP TS-119 and TS-219 Turbo NAS devices. | 39 | QNAP TS-110, TS-119, TS-210, TS-219 and TS-219P Turbo NAS |
| 40 | devices. | ||
| 41 | |||
| 42 | config MACH_TS41X | ||
| 43 | bool "QNAP TS-410, TS-410U, TS-419P and TS-419U Turbo NAS" | ||
| 44 | help | ||
| 45 | Say 'Y' here if you want your kernel to support the | ||
| 46 | QNAP TS-410, TS-410U, TS-419P and TS-419U Turbo NAS | ||
| 47 | devices. | ||
| 40 | 48 | ||
| 41 | config MACH_OPENRD_BASE | 49 | config MACH_OPENRD_BASE |
| 42 | bool "Marvell OpenRD Base Board" | 50 | bool "Marvell OpenRD Base Board" |
diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile index 80ab0ec90ee..9f2f67b2b63 100644 --- a/arch/arm/mach-kirkwood/Makefile +++ b/arch/arm/mach-kirkwood/Makefile | |||
| @@ -5,7 +5,8 @@ obj-$(CONFIG_MACH_RD88F6192_NAS) += rd88f6192-nas-setup.o | |||
| 5 | obj-$(CONFIG_MACH_RD88F6281) += rd88f6281-setup.o | 5 | obj-$(CONFIG_MACH_RD88F6281) += rd88f6281-setup.o |
| 6 | obj-$(CONFIG_MACH_MV88F6281GTW_GE) += mv88f6281gtw_ge-setup.o | 6 | obj-$(CONFIG_MACH_MV88F6281GTW_GE) += mv88f6281gtw_ge-setup.o |
| 7 | obj-$(CONFIG_MACH_SHEEVAPLUG) += sheevaplug-setup.o | 7 | obj-$(CONFIG_MACH_SHEEVAPLUG) += sheevaplug-setup.o |
| 8 | obj-$(CONFIG_MACH_TS219) += ts219-setup.o | 8 | obj-$(CONFIG_MACH_TS219) += ts219-setup.o tsx1x-common.o |
| 9 | obj-$(CONFIG_MACH_TS41X) += ts41x-setup.o tsx1x-common.o | ||
| 9 | obj-$(CONFIG_MACH_OPENRD_BASE) += openrd_base-setup.o | 10 | obj-$(CONFIG_MACH_OPENRD_BASE) += openrd_base-setup.o |
| 10 | 11 | ||
| 11 | obj-$(CONFIG_CPU_IDLE) += cpuidle.o | 12 | obj-$(CONFIG_CPU_IDLE) += cpuidle.o |
diff --git a/arch/arm/mach-kirkwood/ts219-setup.c b/arch/arm/mach-kirkwood/ts219-setup.c index ec1a64f263d..2830f0fe80e 100644 --- a/arch/arm/mach-kirkwood/ts219-setup.c +++ b/arch/arm/mach-kirkwood/ts219-setup.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * | 2 | * |
| 3 | * QNAP TS-119/TS-219 Turbo NAS Board Setup | 3 | * QNAP TS-11x/TS-21x Turbo NAS Board Setup |
| 4 | * | 4 | * |
| 5 | * Copyright (C) 2009 Martin Michlmayr <tbm@cyrius.com> | 5 | * Copyright (C) 2009 Martin Michlmayr <tbm@cyrius.com> |
| 6 | * Copyright (C) 2008 Byron Bradley <byron.bbradley@gmail.com> | 6 | * Copyright (C) 2008 Byron Bradley <byron.bbradley@gmail.com> |
| @@ -14,87 +14,17 @@ | |||
| 14 | #include <linux/kernel.h> | 14 | #include <linux/kernel.h> |
| 15 | #include <linux/init.h> | 15 | #include <linux/init.h> |
| 16 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
| 17 | #include <linux/mtd/physmap.h> | ||
| 18 | #include <linux/spi/flash.h> | ||
| 19 | #include <linux/spi/spi.h> | ||
| 20 | #include <linux/spi/orion_spi.h> | ||
| 21 | #include <linux/i2c.h> | 17 | #include <linux/i2c.h> |
| 22 | #include <linux/mv643xx_eth.h> | 18 | #include <linux/mv643xx_eth.h> |
| 23 | #include <linux/ata_platform.h> | 19 | #include <linux/ata_platform.h> |
| 24 | #include <linux/gpio_keys.h> | 20 | #include <linux/gpio_keys.h> |
| 25 | #include <linux/input.h> | 21 | #include <linux/input.h> |
| 26 | #include <linux/timex.h> | ||
| 27 | #include <linux/serial_reg.h> | ||
| 28 | #include <linux/pci.h> | ||
| 29 | #include <asm/mach-types.h> | 22 | #include <asm/mach-types.h> |
| 30 | #include <asm/mach/arch.h> | 23 | #include <asm/mach/arch.h> |
| 31 | #include <mach/kirkwood.h> | 24 | #include <mach/kirkwood.h> |
| 32 | #include "common.h" | 25 | #include "common.h" |
| 33 | #include "mpp.h" | 26 | #include "mpp.h" |
| 34 | 27 | #include "tsx1x-common.h" | |
| 35 | /**************************************************************************** | ||
| 36 | * 16 MiB NOR flash. The struct mtd_partition is not in the same order as the | ||
| 37 | * partitions on the device because we want to keep compatability with | ||
| 38 | * the QNAP firmware. | ||
| 39 | * Layout as used by QNAP: | ||
| 40 | * 0x00000000-0x00080000 : "U-Boot" | ||
| 41 | * 0x00200000-0x00400000 : "Kernel" | ||
| 42 | * 0x00400000-0x00d00000 : "RootFS" | ||
| 43 | * 0x00d00000-0x01000000 : "RootFS2" | ||
| 44 | * 0x00080000-0x000c0000 : "U-Boot Config" | ||
| 45 | * 0x000c0000-0x00200000 : "NAS Config" | ||
| 46 | * | ||
| 47 | * We'll use "RootFS1" instead of "RootFS" to stay compatible with the layout | ||
| 48 | * used by the QNAP TS-109/TS-209. | ||
| 49 | * | ||
| 50 | ***************************************************************************/ | ||
| 51 | |||
| 52 | static struct mtd_partition qnap_ts219_partitions[] = { | ||
| 53 | { | ||
| 54 | .name = "U-Boot", | ||
| 55 | .size = 0x00080000, | ||
| 56 | .offset = 0, | ||
| 57 | .mask_flags = MTD_WRITEABLE, | ||
| 58 | }, { | ||
| 59 | .name = "Kernel", | ||
| 60 | .size = 0x00200000, | ||
| 61 | .offset = 0x00200000, | ||
| 62 | }, { | ||
| 63 | .name = "RootFS1", | ||
| 64 | .size = 0x00900000, | ||
| 65 | .offset = 0x00400000, | ||
| 66 | }, { | ||
| 67 | .name = "RootFS2", | ||
| 68 | .size = 0x00300000, | ||
| 69 | .offset = 0x00d00000, | ||
| 70 | }, { | ||
| 71 | .name = "U-Boot Config", | ||
| 72 | .size = 0x00040000, | ||
| 73 | .offset = 0x00080000, | ||
| 74 | }, { | ||
| 75 | .name = "NAS Config", | ||
| 76 | .size = 0x00140000, | ||
| 77 | .offset = 0x000c0000, | ||
| 78 | }, | ||
| 79 | }; | ||
| 80 | |||
| 81 | static const struct flash_platform_data qnap_ts219_flash = { | ||
| 82 | .type = "m25p128", | ||
| 83 | .name = "spi_flash", | ||
| 84 | .parts = qnap_ts219_partitions, | ||
| 85 | .nr_parts = ARRAY_SIZE(qnap_ts219_partitions), | ||
| 86 | }; | ||
| 87 | |||
| 88 | static struct spi_board_info __initdata qnap_ts219_spi_slave_info[] = { | ||
| 89 | { | ||
| 90 | .modalias = "m25p80", | ||
| 91 | .platform_data = &qnap_ts219_flash, | ||
| 92 | .irq = -1, | ||
| 93 | .max_speed_hz = 20000000, | ||
| 94 | .bus_num = 0, | ||
| 95 | .chip_select = 0, | ||
| 96 | }, | ||
| 97 | }; | ||
| 98 | 28 | ||
| 99 | static struct i2c_board_info __initdata qnap_ts219_i2c_rtc = { | 29 | static struct i2c_board_info __initdata qnap_ts219_i2c_rtc = { |
| 100 | I2C_BOARD_INFO("s35390a", 0x30), | 30 | I2C_BOARD_INFO("s35390a", 0x30), |
| @@ -152,36 +82,10 @@ static unsigned int qnap_ts219_mpp_config[] __initdata = { | |||
| 152 | MPP14_UART1_RXD, /* PIC controller */ | 82 | MPP14_UART1_RXD, /* PIC controller */ |
| 153 | MPP15_GPIO, /* USB Copy button */ | 83 | MPP15_GPIO, /* USB Copy button */ |
| 154 | MPP16_GPIO, /* Reset button */ | 84 | MPP16_GPIO, /* Reset button */ |
| 85 | MPP36_GPIO, /* RAM: 0: 256 MB, 1: 512 MB */ | ||
| 155 | 0 | 86 | 0 |
| 156 | }; | 87 | }; |
| 157 | 88 | ||
| 158 | |||
| 159 | /***************************************************************************** | ||
| 160 | * QNAP TS-x19 specific power off method via UART1-attached PIC | ||
| 161 | ****************************************************************************/ | ||
| 162 | |||
| 163 | #define UART1_REG(x) (UART1_VIRT_BASE + ((UART_##x) << 2)) | ||
| 164 | |||
| 165 | void qnap_ts219_power_off(void) | ||
| 166 | { | ||
| 167 | /* 19200 baud divisor */ | ||
| 168 | const unsigned divisor = ((kirkwood_tclk + (8 * 19200)) / (16 * 19200)); | ||
| 169 | |||
| 170 | pr_info("%s: triggering power-off...\n", __func__); | ||
| 171 | |||
| 172 | /* hijack UART1 and reset into sane state (19200,8n1) */ | ||
| 173 | writel(0x83, UART1_REG(LCR)); | ||
| 174 | writel(divisor & 0xff, UART1_REG(DLL)); | ||
| 175 | writel((divisor >> 8) & 0xff, UART1_REG(DLM)); | ||
| 176 | writel(0x03, UART1_REG(LCR)); | ||
| 177 | writel(0x00, UART1_REG(IER)); | ||
| 178 | writel(0x00, UART1_REG(FCR)); | ||
| 179 | writel(0x00, UART1_REG(MCR)); | ||
| 180 | |||
| 181 | /* send the power-off command 'A' to PIC */ | ||
| 182 | writel('A', UART1_REG(TX)); | ||
| 183 | } | ||
| 184 | |||
| 185 | static void __init qnap_ts219_init(void) | 89 | static void __init qnap_ts219_init(void) |
| 186 | { | 90 | { |
| 187 | /* | 91 | /* |
| @@ -192,9 +96,7 @@ static void __init qnap_ts219_init(void) | |||
| 192 | 96 | ||
| 193 | kirkwood_uart0_init(); | 97 | kirkwood_uart0_init(); |
| 194 | kirkwood_uart1_init(); /* A PIC controller is connected here. */ | 98 | kirkwood_uart1_init(); /* A PIC controller is connected here. */ |
| 195 | spi_register_board_info(qnap_ts219_spi_slave_info, | 99 | qnap_tsx1x_register_flash(); |
| 196 | ARRAY_SIZE(qnap_ts219_spi_slave_info)); | ||
| 197 | kirkwood_spi_init(); | ||
| 198 | kirkwood_i2c_init(); | 100 | kirkwood_i2c_init(); |
| 199 | i2c_register_board_info(0, &qnap_ts219_i2c_rtc, 1); | 101 | i2c_register_board_info(0, &qnap_ts219_i2c_rtc, 1); |
| 200 | kirkwood_ge00_init(&qnap_ts219_ge00_data); | 102 | kirkwood_ge00_init(&qnap_ts219_ge00_data); |
| @@ -202,7 +104,7 @@ static void __init qnap_ts219_init(void) | |||
| 202 | kirkwood_ehci_init(); | 104 | kirkwood_ehci_init(); |
| 203 | platform_device_register(&qnap_ts219_button_device); | 105 | platform_device_register(&qnap_ts219_button_device); |
| 204 | 106 | ||
| 205 | pm_power_off = qnap_ts219_power_off; | 107 | pm_power_off = qnap_tsx1x_power_off; |
| 206 | 108 | ||
| 207 | } | 109 | } |
| 208 | 110 | ||
diff --git a/arch/arm/mach-kirkwood/ts41x-setup.c b/arch/arm/mach-kirkwood/ts41x-setup.c new file mode 100644 index 00000000000..de49c2d9e74 --- /dev/null +++ b/arch/arm/mach-kirkwood/ts41x-setup.c | |||
| @@ -0,0 +1,154 @@ | |||
| 1 | /* | ||
| 2 | * | ||
| 3 | * QNAP TS-410, TS-410U, TS-419P and TS-419U Turbo NAS Board Setup | ||
| 4 | * | ||
| 5 | * Copyright (C) 2009 Martin Michlmayr <tbm@cyrius.com> | ||
| 6 | * Copyright (C) 2008 Byron Bradley <byron.bbradley@gmail.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or | ||
| 9 | * modify it under the terms of the GNU General Public License | ||
| 10 | * as published by the Free Software Foundation; either version | ||
| 11 | * 2 of the License, or (at your option) any later version. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/kernel.h> | ||
| 15 | #include <linux/init.h> | ||
| 16 | #include <linux/platform_device.h> | ||
| 17 | #include <linux/i2c.h> | ||
| 18 | #include <linux/mv643xx_eth.h> | ||
| 19 | #include <linux/ata_platform.h> | ||
| 20 | #include <linux/gpio_keys.h> | ||
| 21 | #include <linux/input.h> | ||
| 22 | #include <asm/mach-types.h> | ||
| 23 | #include <asm/mach/arch.h> | ||
| 24 | #include <mach/kirkwood.h> | ||
| 25 | #include "common.h" | ||
| 26 | #include "mpp.h" | ||
| 27 | #include "tsx1x-common.h" | ||
| 28 | |||
| 29 | static struct i2c_board_info __initdata qnap_ts41x_i2c_rtc = { | ||
| 30 | I2C_BOARD_INFO("s35390a", 0x30), | ||
| 31 | }; | ||
| 32 | |||
| 33 | static struct mv643xx_eth_platform_data qnap_ts41x_ge00_data = { | ||
| 34 | .phy_addr = MV643XX_ETH_PHY_ADDR(8), | ||
| 35 | }; | ||
| 36 | |||
| 37 | static struct mv643xx_eth_platform_data qnap_ts41x_ge01_data = { | ||
| 38 | .phy_addr = MV643XX_ETH_PHY_ADDR(0), | ||
| 39 | }; | ||
| 40 | |||
| 41 | static struct mv_sata_platform_data qnap_ts41x_sata_data = { | ||
| 42 | .n_ports = 2, | ||
| 43 | }; | ||
| 44 | |||
| 45 | static struct gpio_keys_button qnap_ts41x_buttons[] = { | ||
| 46 | { | ||
| 47 | .code = KEY_COPY, | ||
| 48 | .gpio = 43, | ||
| 49 | .desc = "USB Copy", | ||
| 50 | .active_low = 1, | ||
| 51 | }, | ||
| 52 | { | ||
| 53 | .code = KEY_RESTART, | ||
| 54 | .gpio = 37, | ||
| 55 | .desc = "Reset", | ||
| 56 | .active_low = 1, | ||
| 57 | }, | ||
| 58 | }; | ||
| 59 | |||
| 60 | static struct gpio_keys_platform_data qnap_ts41x_button_data = { | ||
| 61 | .buttons = qnap_ts41x_buttons, | ||
| 62 | .nbuttons = ARRAY_SIZE(qnap_ts41x_buttons), | ||
| 63 | }; | ||
| 64 | |||
| 65 | static struct platform_device qnap_ts41x_button_device = { | ||
| 66 | .name = "gpio-keys", | ||
| 67 | .id = -1, | ||
| 68 | .num_resources = 0, | ||
| 69 | .dev = { | ||
| 70 | .platform_data = &qnap_ts41x_button_data, | ||
| 71 | } | ||
| 72 | }; | ||
| 73 | |||
| 74 | static unsigned int qnap_ts41x_mpp_config[] __initdata = { | ||
| 75 | MPP0_SPI_SCn, | ||
| 76 | MPP1_SPI_MOSI, | ||
| 77 | MPP2_SPI_SCK, | ||
| 78 | MPP3_SPI_MISO, | ||
| 79 | MPP6_SYSRST_OUTn, | ||
| 80 | MPP7_PEX_RST_OUTn, | ||
| 81 | MPP8_TW_SDA, | ||
| 82 | MPP9_TW_SCK, | ||
| 83 | MPP10_UART0_TXD, | ||
| 84 | MPP11_UART0_RXD, | ||
| 85 | MPP13_UART1_TXD, /* PIC controller */ | ||
| 86 | MPP14_UART1_RXD, /* PIC controller */ | ||
| 87 | MPP15_SATA0_ACTn, | ||
| 88 | MPP16_SATA1_ACTn, | ||
| 89 | MPP20_GE1_0, | ||
| 90 | MPP21_GE1_1, | ||
| 91 | MPP22_GE1_2, | ||
| 92 | MPP23_GE1_3, | ||
| 93 | MPP24_GE1_4, | ||
| 94 | MPP25_GE1_5, | ||
| 95 | MPP26_GE1_6, | ||
| 96 | MPP27_GE1_7, | ||
| 97 | MPP30_GE1_10, | ||
| 98 | MPP31_GE1_11, | ||
| 99 | MPP32_GE1_12, | ||
| 100 | MPP33_GE1_13, | ||
| 101 | MPP36_GPIO, /* RAM: 0: 256 MB, 1: 512 MB */ | ||
| 102 | MPP37_GPIO, /* Reset button */ | ||
| 103 | MPP43_GPIO, /* USB Copy button */ | ||
| 104 | MPP44_GPIO, /* Board ID: 0: TS-419U, 1: TS-419 */ | ||
| 105 | MPP45_GPIO, /* JP1: 0: console, 1: LCD */ | ||
| 106 | MPP46_GPIO, /* External SATA HDD1 error indicator */ | ||
| 107 | MPP47_GPIO, /* External SATA HDD2 error indicator */ | ||
| 108 | MPP48_GPIO, /* External SATA HDD3 error indicator */ | ||
| 109 | MPP49_GPIO, /* External SATA HDD4 error indicator */ | ||
| 110 | 0 | ||
| 111 | }; | ||
| 112 | |||
| 113 | static void __init qnap_ts41x_init(void) | ||
| 114 | { | ||
| 115 | /* | ||
| 116 | * Basic setup. Needs to be called early. | ||
| 117 | */ | ||
| 118 | kirkwood_init(); | ||
| 119 | kirkwood_mpp_conf(qnap_ts41x_mpp_config); | ||
| 120 | |||
| 121 | kirkwood_uart0_init(); | ||
| 122 | kirkwood_uart1_init(); /* A PIC controller is connected here. */ | ||
| 123 | qnap_tsx1x_register_flash(); | ||
| 124 | kirkwood_i2c_init(); | ||
| 125 | i2c_register_board_info(0, &qnap_ts41x_i2c_rtc, 1); | ||
| 126 | kirkwood_ge00_init(&qnap_ts41x_ge00_data); | ||
| 127 | kirkwood_ge01_init(&qnap_ts41x_ge01_data); | ||
| 128 | kirkwood_sata_init(&qnap_ts41x_sata_data); | ||
| 129 | kirkwood_ehci_init(); | ||
| 130 | platform_device_register(&qnap_ts41x_button_device); | ||
| 131 | |||
| 132 | pm_power_off = qnap_tsx1x_power_off; | ||
| 133 | |||
| 134 | } | ||
| 135 | |||
| 136 | static int __init ts41x_pci_init(void) | ||
| 137 | { | ||
| 138 | if (machine_is_ts41x()) | ||
| 139 | kirkwood_pcie_init(); | ||
| 140 | |||
| 141 | return 0; | ||
| 142 | } | ||
| 143 | subsys_initcall(ts41x_pci_init); | ||
| 144 | |||
| 145 | MACHINE_START(TS41X, "QNAP TS-41x") | ||
| 146 | /* Maintainer: Martin Michlmayr <tbm@cyrius.com> */ | ||
| 147 | .phys_io = KIRKWOOD_REGS_PHYS_BASE, | ||
| 148 | .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc, | ||
| 149 | .boot_params = 0x00000100, | ||
| 150 | .init_machine = qnap_ts41x_init, | ||
| 151 | .map_io = kirkwood_map_io, | ||
| 152 | .init_irq = kirkwood_init_irq, | ||
| 153 | .timer = &kirkwood_timer, | ||
| 154 | MACHINE_END | ||
diff --git a/arch/arm/mach-kirkwood/tsx1x-common.c b/arch/arm/mach-kirkwood/tsx1x-common.c new file mode 100644 index 00000000000..7221c20b2af --- /dev/null +++ b/arch/arm/mach-kirkwood/tsx1x-common.c | |||
| @@ -0,0 +1,113 @@ | |||
| 1 | #include <linux/kernel.h> | ||
| 2 | #include <linux/pci.h> | ||
| 3 | #include <linux/platform_device.h> | ||
| 4 | #include <linux/mtd/physmap.h> | ||
| 5 | #include <linux/spi/flash.h> | ||
| 6 | #include <linux/spi/spi.h> | ||
| 7 | #include <linux/spi/orion_spi.h> | ||
| 8 | #include <linux/serial_reg.h> | ||
| 9 | #include <mach/kirkwood.h> | ||
| 10 | #include "common.h" | ||
| 11 | |||
| 12 | /* | ||
| 13 | * QNAP TS-x1x Boards flash | ||
| 14 | */ | ||
| 15 | |||
| 16 | /**************************************************************************** | ||
| 17 | * 16 MiB NOR flash. The struct mtd_partition is not in the same order as the | ||
| 18 | * partitions on the device because we want to keep compatability with | ||
| 19 | * the QNAP firmware. | ||
| 20 | * Layout as used by QNAP: | ||
| 21 | * 0x00000000-0x00080000 : "U-Boot" | ||
| 22 | * 0x00200000-0x00400000 : "Kernel" | ||
| 23 | * 0x00400000-0x00d00000 : "RootFS" | ||
| 24 | * 0x00d00000-0x01000000 : "RootFS2" | ||
| 25 | * 0x00080000-0x000c0000 : "U-Boot Config" | ||
| 26 | * 0x000c0000-0x00200000 : "NAS Config" | ||
| 27 | * | ||
| 28 | * We'll use "RootFS1" instead of "RootFS" to stay compatible with the layout | ||
| 29 | * used by the QNAP TS-109/TS-209. | ||
| 30 | * | ||
| 31 | ***************************************************************************/ | ||
| 32 | |||
| 33 | struct mtd_partition qnap_tsx1x_partitions[] = { | ||
| 34 | { | ||
| 35 | .name = "U-Boot", | ||
| 36 | .size = 0x00080000, | ||
| 37 | .offset = 0, | ||
| 38 | .mask_flags = MTD_WRITEABLE, | ||
| 39 | }, { | ||
| 40 | .name = "Kernel", | ||
| 41 | .size = 0x00200000, | ||
| 42 | .offset = 0x00200000, | ||
| 43 | }, { | ||
| 44 | .name = "RootFS1", | ||
| 45 | .size = 0x00900000, | ||
| 46 | .offset = 0x00400000, | ||
| 47 | }, { | ||
| 48 | .name = "RootFS2", | ||
| 49 | .size = 0x00300000, | ||
| 50 | .offset = 0x00d00000, | ||
| 51 | }, { | ||
| 52 | .name = "U-Boot Config", | ||
| 53 | .size = 0x00040000, | ||
| 54 | .offset = 0x00080000, | ||
| 55 | }, { | ||
| 56 | .name = "NAS Config", | ||
| 57 | .size = 0x00140000, | ||
| 58 | .offset = 0x000c0000, | ||
| 59 | }, | ||
| 60 | }; | ||
| 61 | |||
| 62 | const struct flash_platform_data qnap_tsx1x_flash = { | ||
| 63 | .type = "m25p128", | ||
| 64 | .name = "spi_flash", | ||
| 65 | .parts = qnap_tsx1x_partitions, | ||
| 66 | .nr_parts = ARRAY_SIZE(qnap_tsx1x_partitions), | ||
| 67 | }; | ||
| 68 | |||
| 69 | struct spi_board_info __initdata qnap_tsx1x_spi_slave_info[] = { | ||
| 70 | { | ||
| 71 | .modalias = "m25p80", | ||
| 72 | .platform_data = &qnap_tsx1x_flash, | ||
| 73 | .irq = -1, | ||
| 74 | .max_speed_hz = 20000000, | ||
| 75 | .bus_num = 0, | ||
| 76 | .chip_select = 0, | ||
| 77 | }, | ||
| 78 | }; | ||
| 79 | |||
| 80 | void qnap_tsx1x_register_flash(void) | ||
| 81 | { | ||
| 82 | spi_register_board_info(qnap_tsx1x_spi_slave_info, | ||
| 83 | ARRAY_SIZE(qnap_tsx1x_spi_slave_info)); | ||
| 84 | kirkwood_spi_init(); | ||
| 85 | } | ||
| 86 | |||
| 87 | |||
| 88 | /***************************************************************************** | ||
| 89 | * QNAP TS-x1x specific power off method via UART1-attached PIC | ||
| 90 | ****************************************************************************/ | ||
| 91 | |||
| 92 | #define UART1_REG(x) (UART1_VIRT_BASE + ((UART_##x) << 2)) | ||
| 93 | |||
| 94 | void qnap_tsx1x_power_off(void) | ||
| 95 | { | ||
| 96 | /* 19200 baud divisor */ | ||
| 97 | const unsigned divisor = ((kirkwood_tclk + (8 * 19200)) / (16 * 19200)); | ||
| 98 | |||
| 99 | pr_info("%s: triggering power-off...\n", __func__); | ||
| 100 | |||
| 101 | /* hijack UART1 and reset into sane state (19200,8n1) */ | ||
| 102 | writel(0x83, UART1_REG(LCR)); | ||
| 103 | writel(divisor & 0xff, UART1_REG(DLL)); | ||
| 104 | writel((divisor >> 8) & 0xff, UART1_REG(DLM)); | ||
| 105 | writel(0x03, UART1_REG(LCR)); | ||
| 106 | writel(0x00, UART1_REG(IER)); | ||
| 107 | writel(0x00, UART1_REG(FCR)); | ||
| 108 | writel(0x00, UART1_REG(MCR)); | ||
| 109 | |||
| 110 | /* send the power-off command 'A' to PIC */ | ||
| 111 | writel('A', UART1_REG(TX)); | ||
| 112 | } | ||
| 113 | |||
diff --git a/arch/arm/mach-kirkwood/tsx1x-common.h b/arch/arm/mach-kirkwood/tsx1x-common.h new file mode 100644 index 00000000000..9a592962a6e --- /dev/null +++ b/arch/arm/mach-kirkwood/tsx1x-common.h | |||
| @@ -0,0 +1,7 @@ | |||
| 1 | #ifndef __ARCH_KIRKWOOD_TSX1X_COMMON_H | ||
| 2 | #define __ARCH_KIRKWOOD_TSX1X_COMMON_H | ||
| 3 | |||
| 4 | extern void qnap_tsx1x_register_flash(void); | ||
| 5 | extern void qnap_tsx1x_power_off(void); | ||
| 6 | |||
| 7 | #endif | ||
diff --git a/arch/arm/mach-ks8695/include/mach/memory.h b/arch/arm/mach-ks8695/include/mach/memory.h index 76e5308685a..ffa19aae6e0 100644 --- a/arch/arm/mach-ks8695/include/mach/memory.h +++ b/arch/arm/mach-ks8695/include/mach/memory.h | |||
| @@ -41,6 +41,13 @@ extern struct bus_type platform_bus_type; | |||
| 41 | __dma = __dma - PHYS_OFFSET + KS8695_PCIMEM_PA; \ | 41 | __dma = __dma - PHYS_OFFSET + KS8695_PCIMEM_PA; \ |
| 42 | __dma; }) | 42 | __dma; }) |
| 43 | 43 | ||
| 44 | #define __arch_dma_to_page(dev, x) \ | ||
| 45 | ({ dma_addr_t __dma = x; \ | ||
| 46 | if (!is_lbus_device(dev)) \ | ||
| 47 | __dma += PHYS_OFFSET - KS8695_PCIMEM_PA; \ | ||
| 48 | phys_to_page(__dma); \ | ||
| 49 | }) | ||
| 50 | |||
| 44 | #endif | 51 | #endif |
| 45 | 52 | ||
| 46 | #endif | 53 | #endif |
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c index 4562452d407..a2d307ec042 100644 --- a/arch/arm/mach-mmp/aspenite.c +++ b/arch/arm/mach-mmp/aspenite.c | |||
| @@ -13,6 +13,9 @@ | |||
| 13 | #include <linux/kernel.h> | 13 | #include <linux/kernel.h> |
| 14 | #include <linux/platform_device.h> | 14 | #include <linux/platform_device.h> |
| 15 | #include <linux/smc91x.h> | 15 | #include <linux/smc91x.h> |
| 16 | #include <linux/mtd/mtd.h> | ||
| 17 | #include <linux/mtd/partitions.h> | ||
| 18 | #include <linux/mtd/nand.h> | ||
| 16 | 19 | ||
| 17 | #include <asm/mach-types.h> | 20 | #include <asm/mach-types.h> |
| 18 | #include <asm/mach/arch.h> | 21 | #include <asm/mach/arch.h> |
| @@ -85,12 +88,48 @@ static struct platform_device smc91x_device = { | |||
| 85 | .resource = smc91x_resources, | 88 | .resource = smc91x_resources, |
| 86 | }; | 89 | }; |
| 87 | 90 | ||
| 91 | static struct mtd_partition aspenite_nand_partitions[] = { | ||
| 92 | { | ||
| 93 | .name = "bootloader", | ||
| 94 | .offset = 0, | ||
| 95 | .size = SZ_1M, | ||
| 96 | .mask_flags = MTD_WRITEABLE, | ||
| 97 | }, { | ||
| 98 | .name = "reserved", | ||
| 99 | .offset = MTDPART_OFS_APPEND, | ||
| 100 | .size = SZ_128K, | ||
| 101 | .mask_flags = MTD_WRITEABLE, | ||
| 102 | }, { | ||
| 103 | .name = "reserved", | ||
| 104 | .offset = MTDPART_OFS_APPEND, | ||
| 105 | .size = SZ_8M, | ||
| 106 | .mask_flags = MTD_WRITEABLE, | ||
| 107 | }, { | ||
| 108 | .name = "kernel", | ||
| 109 | .offset = MTDPART_OFS_APPEND, | ||
| 110 | .size = (SZ_2M + SZ_1M), | ||
| 111 | .mask_flags = 0, | ||
| 112 | }, { | ||
| 113 | .name = "filesystem", | ||
| 114 | .offset = MTDPART_OFS_APPEND, | ||
| 115 | .size = SZ_48M, | ||
| 116 | .mask_flags = 0, | ||
| 117 | } | ||
| 118 | }; | ||
| 119 | |||
| 120 | static struct pxa3xx_nand_platform_data aspenite_nand_info = { | ||
| 121 | .enable_arbiter = 1, | ||
| 122 | .parts = aspenite_nand_partitions, | ||
| 123 | .nr_parts = ARRAY_SIZE(aspenite_nand_partitions), | ||
| 124 | }; | ||
| 125 | |||
| 88 | static void __init common_init(void) | 126 | static void __init common_init(void) |
| 89 | { | 127 | { |
| 90 | mfp_config(ARRAY_AND_SIZE(common_pin_config)); | 128 | mfp_config(ARRAY_AND_SIZE(common_pin_config)); |
| 91 | 129 | ||
| 92 | /* on-chip devices */ | 130 | /* on-chip devices */ |
| 93 | pxa168_add_uart(1); | 131 | pxa168_add_uart(1); |
| 132 | pxa168_add_nand(&aspenite_nand_info); | ||
| 94 | 133 | ||
| 95 | /* off-chip devices */ | 134 | /* off-chip devices */ |
| 96 | platform_device_register(&smc91x_device); | 135 | platform_device_register(&smc91x_device); |
diff --git a/arch/arm/mach-mmp/clock.c b/arch/arm/mach-mmp/clock.c index 2d9cc5a7122..2a46ed5cc2a 100644 --- a/arch/arm/mach-mmp/clock.c +++ b/arch/arm/mach-mmp/clock.c | |||
| @@ -34,6 +34,21 @@ struct clkops apbc_clk_ops = { | |||
| 34 | .disable = apbc_clk_disable, | 34 | .disable = apbc_clk_disable, |
| 35 | }; | 35 | }; |
| 36 | 36 | ||
| 37 | static void apmu_clk_enable(struct clk *clk) | ||
| 38 | { | ||
| 39 | __raw_writel(clk->enable_val, clk->clk_rst); | ||
| 40 | } | ||
| 41 | |||
| 42 | static void apmu_clk_disable(struct clk *clk) | ||
| 43 | { | ||
| 44 | __raw_writel(0, clk->clk_rst); | ||
| 45 | } | ||
| 46 | |||
| 47 | struct clkops apmu_clk_ops = { | ||
| 48 | .enable = apmu_clk_enable, | ||
| 49 | .disable = apmu_clk_disable, | ||
| 50 | }; | ||
| 51 | |||
| 37 | static DEFINE_SPINLOCK(clocks_lock); | 52 | static DEFINE_SPINLOCK(clocks_lock); |
| 38 | 53 | ||
| 39 | int clk_enable(struct clk *clk) | 54 | int clk_enable(struct clk *clk) |
diff --git a/arch/arm/mach-mmp/clock.h b/arch/arm/mach-mmp/clock.h index ed967e78e6a..eefffbe683b 100644 --- a/arch/arm/mach-mmp/clock.h +++ b/arch/arm/mach-mmp/clock.h | |||
| @@ -25,6 +25,7 @@ struct clk { | |||
| 25 | }; | 25 | }; |
| 26 | 26 | ||
| 27 | extern struct clkops apbc_clk_ops; | 27 | extern struct clkops apbc_clk_ops; |
| 28 | extern struct clkops apmu_clk_ops; | ||
| 28 | 29 | ||
| 29 | #define APBC_CLK(_name, _reg, _fnclksel, _rate) \ | 30 | #define APBC_CLK(_name, _reg, _fnclksel, _rate) \ |
| 30 | struct clk clk_##_name = { \ | 31 | struct clk clk_##_name = { \ |
diff --git a/arch/arm/mach-mmp/include/mach/irqs.h b/arch/arm/mach-mmp/include/mach/irqs.h index 16295cfd5e2..d68871b0f28 100644 --- a/arch/arm/mach-mmp/include/mach/irqs.h +++ b/arch/arm/mach-mmp/include/mach/irqs.h | |||
| @@ -31,7 +31,9 @@ | |||
| 31 | #define IRQ_PXA168_DDR_INT 26 | 31 | #define IRQ_PXA168_DDR_INT 26 |
| 32 | #define IRQ_PXA168_UART1 27 | 32 | #define IRQ_PXA168_UART1 27 |
| 33 | #define IRQ_PXA168_UART2 28 | 33 | #define IRQ_PXA168_UART2 28 |
| 34 | #define IRQ_PXA168_UART3 29 | ||
| 34 | #define IRQ_PXA168_WDT 35 | 35 | #define IRQ_PXA168_WDT 35 |
| 36 | #define IRQ_PXA168_MAIN_PMU 36 | ||
| 35 | #define IRQ_PXA168_FRQ_CHANGE 38 | 37 | #define IRQ_PXA168_FRQ_CHANGE 38 |
| 36 | #define IRQ_PXA168_SDH1 39 | 38 | #define IRQ_PXA168_SDH1 39 |
| 37 | #define IRQ_PXA168_SDH2 40 | 39 | #define IRQ_PXA168_SDH2 40 |
| @@ -46,7 +48,7 @@ | |||
| 46 | #define IRQ_PXA168_USB2 51 | 48 | #define IRQ_PXA168_USB2 51 |
| 47 | #define IRQ_PXA168_AC97 57 | 49 | #define IRQ_PXA168_AC97 57 |
| 48 | #define IRQ_PXA168_TWSI1 58 | 50 | #define IRQ_PXA168_TWSI1 58 |
| 49 | #define IRQ_PXA168_PMU 60 | 51 | #define IRQ_PXA168_AP_PMU 60 |
| 50 | #define IRQ_PXA168_SM_INT 63 | 52 | #define IRQ_PXA168_SM_INT 63 |
| 51 | 53 | ||
| 52 | /* | 54 | /* |
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h index 6bf1f0eefcd..3ad612cbdf0 100644 --- a/arch/arm/mach-mmp/include/mach/pxa168.h +++ b/arch/arm/mach-mmp/include/mach/pxa168.h | |||
| @@ -4,6 +4,7 @@ | |||
| 4 | #include <linux/i2c.h> | 4 | #include <linux/i2c.h> |
| 5 | #include <mach/devices.h> | 5 | #include <mach/devices.h> |
| 6 | #include <plat/i2c.h> | 6 | #include <plat/i2c.h> |
| 7 | #include <plat/pxa3xx_nand.h> | ||
| 7 | 8 | ||
| 8 | extern struct pxa_device_desc pxa168_device_uart1; | 9 | extern struct pxa_device_desc pxa168_device_uart1; |
| 9 | extern struct pxa_device_desc pxa168_device_uart2; | 10 | extern struct pxa_device_desc pxa168_device_uart2; |
| @@ -13,6 +14,7 @@ extern struct pxa_device_desc pxa168_device_pwm1; | |||
| 13 | extern struct pxa_device_desc pxa168_device_pwm2; | 14 | extern struct pxa_device_desc pxa168_device_pwm2; |
| 14 | extern struct pxa_device_desc pxa168_device_pwm3; | 15 | extern struct pxa_device_desc pxa168_device_pwm3; |
| 15 | extern struct pxa_device_desc pxa168_device_pwm4; | 16 | extern struct pxa_device_desc pxa168_device_pwm4; |
| 17 | extern struct pxa_device_desc pxa168_device_nand; | ||
| 16 | 18 | ||
| 17 | static inline int pxa168_add_uart(int id) | 19 | static inline int pxa168_add_uart(int id) |
| 18 | { | 20 | { |
| @@ -64,4 +66,9 @@ static inline int pxa168_add_pwm(int id) | |||
| 64 | 66 | ||
| 65 | return pxa_register_device(d, NULL, 0); | 67 | return pxa_register_device(d, NULL, 0); |
| 66 | } | 68 | } |
| 69 | |||
| 70 | static inline int pxa168_add_nand(struct pxa3xx_nand_platform_data *info) | ||
| 71 | { | ||
| 72 | return pxa_register_device(&pxa168_device_nand, info, sizeof(*info)); | ||
| 73 | } | ||
| 67 | #endif /* __ASM_MACH_PXA168_H */ | 74 | #endif /* __ASM_MACH_PXA168_H */ |
diff --git a/arch/arm/mach-mmp/include/mach/pxa910.h b/arch/arm/mach-mmp/include/mach/pxa910.h index 6ae1ed7a0a9..4f0b4ec6f5d 100644 --- a/arch/arm/mach-mmp/include/mach/pxa910.h +++ b/arch/arm/mach-mmp/include/mach/pxa910.h | |||
| @@ -4,6 +4,7 @@ | |||
| 4 | #include <linux/i2c.h> | 4 | #include <linux/i2c.h> |
| 5 | #include <mach/devices.h> | 5 | #include <mach/devices.h> |
| 6 | #include <plat/i2c.h> | 6 | #include <plat/i2c.h> |
| 7 | #include <plat/pxa3xx_nand.h> | ||
| 7 | 8 | ||
| 8 | extern struct pxa_device_desc pxa910_device_uart1; | 9 | extern struct pxa_device_desc pxa910_device_uart1; |
| 9 | extern struct pxa_device_desc pxa910_device_uart2; | 10 | extern struct pxa_device_desc pxa910_device_uart2; |
| @@ -13,6 +14,7 @@ extern struct pxa_device_desc pxa910_device_pwm1; | |||
| 13 | extern struct pxa_device_desc pxa910_device_pwm2; | 14 | extern struct pxa_device_desc pxa910_device_pwm2; |
| 14 | extern struct pxa_device_desc pxa910_device_pwm3; | 15 | extern struct pxa_device_desc pxa910_device_pwm3; |
| 15 | extern struct pxa_device_desc pxa910_device_pwm4; | 16 | extern struct pxa_device_desc pxa910_device_pwm4; |
| 17 | extern struct pxa_device_desc pxa910_device_nand; | ||
| 16 | 18 | ||
| 17 | static inline int pxa910_add_uart(int id) | 19 | static inline int pxa910_add_uart(int id) |
| 18 | { | 20 | { |
| @@ -64,4 +66,9 @@ static inline int pxa910_add_pwm(int id) | |||
| 64 | 66 | ||
| 65 | return pxa_register_device(d, NULL, 0); | 67 | return pxa_register_device(d, NULL, 0); |
| 66 | } | 68 | } |
| 69 | |||
| 70 | static inline int pxa910_add_nand(struct pxa3xx_nand_platform_data *info) | ||
| 71 | { | ||
| 72 | return pxa_register_device(&pxa910_device_nand, info, sizeof(*info)); | ||
| 73 | } | ||
| 67 | #endif /* __ASM_MACH_PXA910_H */ | 74 | #endif /* __ASM_MACH_PXA910_H */ |
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c index 71b1ae33875..37dbdde17fa 100644 --- a/arch/arm/mach-mmp/pxa168.c +++ b/arch/arm/mach-mmp/pxa168.c | |||
| @@ -19,6 +19,7 @@ | |||
| 19 | #include <mach/addr-map.h> | 19 | #include <mach/addr-map.h> |
| 20 | #include <mach/cputype.h> | 20 | #include <mach/cputype.h> |
| 21 | #include <mach/regs-apbc.h> | 21 | #include <mach/regs-apbc.h> |
| 22 | #include <mach/regs-apmu.h> | ||
| 22 | #include <mach/irqs.h> | 23 | #include <mach/irqs.h> |
| 23 | #include <mach/gpio.h> | 24 | #include <mach/gpio.h> |
| 24 | #include <mach/dma.h> | 25 | #include <mach/dma.h> |
| @@ -72,6 +73,8 @@ static APBC_CLK(pwm2, PXA168_PWM2, 1, 13000000); | |||
| 72 | static APBC_CLK(pwm3, PXA168_PWM3, 1, 13000000); | 73 | static APBC_CLK(pwm3, PXA168_PWM3, 1, 13000000); |
| 73 | static APBC_CLK(pwm4, PXA168_PWM4, 1, 13000000); | 74 | static APBC_CLK(pwm4, PXA168_PWM4, 1, 13000000); |
| 74 | 75 | ||
| 76 | static APMU_CLK(nand, NAND, 0x01db, 208000000); | ||
| 77 | |||
| 75 | /* device and clock bindings */ | 78 | /* device and clock bindings */ |
| 76 | static struct clk_lookup pxa168_clkregs[] = { | 79 | static struct clk_lookup pxa168_clkregs[] = { |
| 77 | INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL), | 80 | INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL), |
| @@ -82,6 +85,7 @@ static struct clk_lookup pxa168_clkregs[] = { | |||
| 82 | INIT_CLKREG(&clk_pwm2, "pxa168-pwm.1", NULL), | 85 | INIT_CLKREG(&clk_pwm2, "pxa168-pwm.1", NULL), |
| 83 | INIT_CLKREG(&clk_pwm3, "pxa168-pwm.2", NULL), | 86 | INIT_CLKREG(&clk_pwm3, "pxa168-pwm.2", NULL), |
| 84 | INIT_CLKREG(&clk_pwm4, "pxa168-pwm.3", NULL), | 87 | INIT_CLKREG(&clk_pwm4, "pxa168-pwm.3", NULL), |
| 88 | INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), | ||
| 85 | }; | 89 | }; |
| 86 | 90 | ||
| 87 | static int __init pxa168_init(void) | 91 | static int __init pxa168_init(void) |
| @@ -127,3 +131,4 @@ PXA168_DEVICE(pwm1, "pxa168-pwm", 0, NONE, 0xd401a000, 0x10); | |||
| 127 | PXA168_DEVICE(pwm2, "pxa168-pwm", 1, NONE, 0xd401a400, 0x10); | 131 | PXA168_DEVICE(pwm2, "pxa168-pwm", 1, NONE, 0xd401a400, 0x10); |
| 128 | PXA168_DEVICE(pwm3, "pxa168-pwm", 2, NONE, 0xd401a800, 0x10); | 132 | PXA168_DEVICE(pwm3, "pxa168-pwm", 2, NONE, 0xd401a800, 0x10); |
| 129 | PXA168_DEVICE(pwm4, "pxa168-pwm", 3, NONE, 0xd401ac00, 0x10); | 133 | PXA168_DEVICE(pwm4, "pxa168-pwm", 3, NONE, 0xd401ac00, 0x10); |
| 134 | PXA168_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99); | ||
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c index 5882ca6b49f..d4049508a4d 100644 --- a/arch/arm/mach-mmp/pxa910.c +++ b/arch/arm/mach-mmp/pxa910.c | |||
| @@ -110,6 +110,8 @@ static APBC_CLK(pwm2, PXA910_PWM2, 1, 13000000); | |||
| 110 | static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000); | 110 | static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000); |
| 111 | static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000); | 111 | static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000); |
| 112 | 112 | ||
| 113 | static APMU_CLK(nand, NAND, 0x01db, 208000000); | ||
| 114 | |||
| 113 | /* device and clock bindings */ | 115 | /* device and clock bindings */ |
| 114 | static struct clk_lookup pxa910_clkregs[] = { | 116 | static struct clk_lookup pxa910_clkregs[] = { |
| 115 | INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL), | 117 | INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL), |
| @@ -120,6 +122,7 @@ static struct clk_lookup pxa910_clkregs[] = { | |||
| 120 | INIT_CLKREG(&clk_pwm2, "pxa910-pwm.1", NULL), | 122 | INIT_CLKREG(&clk_pwm2, "pxa910-pwm.1", NULL), |
| 121 | INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL), | 123 | INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL), |
| 122 | INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL), | 124 | INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL), |
| 125 | INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), | ||
| 123 | }; | 126 | }; |
| 124 | 127 | ||
| 125 | static int __init pxa910_init(void) | 128 | static int __init pxa910_init(void) |
| @@ -174,3 +177,4 @@ PXA910_DEVICE(pwm1, "pxa910-pwm", 0, NONE, 0xd401a000, 0x10); | |||
| 174 | PXA910_DEVICE(pwm2, "pxa910-pwm", 1, NONE, 0xd401a400, 0x10); | 177 | PXA910_DEVICE(pwm2, "pxa910-pwm", 1, NONE, 0xd401a400, 0x10); |
| 175 | PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10); | 178 | PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10); |
| 176 | PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10); | 179 | PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10); |
| 180 | PXA910_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99); | ||
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c index 08cfef6c92a..8f49b2b1260 100644 --- a/arch/arm/mach-mmp/ttc_dkb.c +++ b/arch/arm/mach-mmp/ttc_dkb.c | |||
| @@ -11,9 +11,13 @@ | |||
| 11 | #include <linux/init.h> | 11 | #include <linux/init.h> |
| 12 | #include <linux/kernel.h> | 12 | #include <linux/kernel.h> |
| 13 | #include <linux/platform_device.h> | 13 | #include <linux/platform_device.h> |
| 14 | #include <linux/mtd/mtd.h> | ||
| 15 | #include <linux/mtd/partitions.h> | ||
| 16 | #include <linux/mtd/onenand.h> | ||
| 14 | 17 | ||
| 15 | #include <asm/mach-types.h> | 18 | #include <asm/mach-types.h> |
| 16 | #include <asm/mach/arch.h> | 19 | #include <asm/mach/arch.h> |
| 20 | #include <asm/mach/flash.h> | ||
| 17 | #include <mach/addr-map.h> | 21 | #include <mach/addr-map.h> |
| 18 | #include <mach/mfp-pxa910.h> | 22 | #include <mach/mfp-pxa910.h> |
| 19 | #include <mach/pxa910.h> | 23 | #include <mach/pxa910.h> |
| @@ -26,6 +30,86 @@ static unsigned long ttc_dkb_pin_config[] __initdata = { | |||
| 26 | /* UART2 */ | 30 | /* UART2 */ |
| 27 | GPIO47_UART2_RXD, | 31 | GPIO47_UART2_RXD, |
| 28 | GPIO48_UART2_TXD, | 32 | GPIO48_UART2_TXD, |
| 33 | |||
| 34 | /* DFI */ | ||
| 35 | DF_IO0_ND_IO0, | ||
| 36 | DF_IO1_ND_IO1, | ||
| 37 | DF_IO2_ND_IO2, | ||
| 38 | DF_IO3_ND_IO3, | ||
| 39 | DF_IO4_ND_IO4, | ||
| 40 | DF_IO5_ND_IO5, | ||
| 41 | DF_IO6_ND_IO6, | ||
| 42 | DF_IO7_ND_IO7, | ||
| 43 | DF_IO8_ND_IO8, | ||
| 44 | DF_IO9_ND_IO9, | ||
| 45 | DF_IO10_ND_IO10, | ||
| 46 | DF_IO11_ND_IO11, | ||
| 47 | DF_IO12_ND_IO12, | ||
| 48 | DF_IO13_ND_IO13, | ||
| 49 | DF_IO14_ND_IO14, | ||
| 50 | DF_IO15_ND_IO15, | ||
| 51 | DF_nCS0_SM_nCS2_nCS0, | ||
| 52 | DF_ALE_SM_WEn_ND_ALE, | ||
| 53 | DF_CLE_SM_OEn_ND_CLE, | ||
| 54 | DF_WEn_DF_WEn, | ||
| 55 | DF_REn_DF_REn, | ||
| 56 | DF_RDY0_DF_RDY0, | ||
| 57 | }; | ||
| 58 | |||
| 59 | static struct mtd_partition ttc_dkb_onenand_partitions[] = { | ||
| 60 | { | ||
| 61 | .name = "bootloader", | ||
| 62 | .offset = 0, | ||
| 63 | .size = SZ_1M, | ||
| 64 | .mask_flags = MTD_WRITEABLE, | ||
| 65 | }, { | ||
| 66 | .name = "reserved", | ||
| 67 | .offset = MTDPART_OFS_APPEND, | ||
| 68 | .size = SZ_128K, | ||
| 69 | .mask_flags = MTD_WRITEABLE, | ||
| 70 | }, { | ||
| 71 | .name = "reserved", | ||
| 72 | .offset = MTDPART_OFS_APPEND, | ||
| 73 | .size = SZ_8M, | ||
| 74 | .mask_flags = MTD_WRITEABLE, | ||
| 75 | }, { | ||
| 76 | .name = "kernel", | ||
| 77 | .offset = MTDPART_OFS_APPEND, | ||
| 78 | .size = (SZ_2M + SZ_1M), | ||
| 79 | .mask_flags = 0, | ||
| 80 | }, { | ||
| 81 | .name = "filesystem", | ||
| 82 | .offset = MTDPART_OFS_APPEND, | ||
| 83 | .size = SZ_48M, | ||
| 84 | .mask_flags = 0, | ||
| 85 | } | ||
| 86 | }; | ||
| 87 | |||
| 88 | static struct onenand_platform_data ttc_dkb_onenand_info = { | ||
| 89 | .parts = ttc_dkb_onenand_partitions, | ||
| 90 | .nr_parts = ARRAY_SIZE(ttc_dkb_onenand_partitions), | ||
| 91 | }; | ||
| 92 | |||
| 93 | static struct resource ttc_dkb_resource_onenand[] = { | ||
| 94 | [0] = { | ||
| 95 | .start = SMC_CS0_PHYS_BASE, | ||
| 96 | .end = SMC_CS0_PHYS_BASE + SZ_1M, | ||
| 97 | .flags = IORESOURCE_MEM, | ||
| 98 | }, | ||
| 99 | }; | ||
| 100 | |||
| 101 | static struct platform_device ttc_dkb_device_onenand = { | ||
| 102 | .name = "onenand-flash", | ||
| 103 | .id = -1, | ||
| 104 | .resource = ttc_dkb_resource_onenand, | ||
| 105 | .num_resources = ARRAY_SIZE(ttc_dkb_resource_onenand), | ||
| 106 | .dev = { | ||
| 107 | .platform_data = &ttc_dkb_onenand_info, | ||
| 108 | }, | ||
| 109 | }; | ||
| 110 | |||
| 111 | static struct platform_device *ttc_dkb_devices[] = { | ||
| 112 | &ttc_dkb_device_onenand, | ||
| 29 | }; | 113 | }; |
| 30 | 114 | ||
| 31 | static void __init ttc_dkb_init(void) | 115 | static void __init ttc_dkb_init(void) |
| @@ -34,6 +118,9 @@ static void __init ttc_dkb_init(void) | |||
| 34 | 118 | ||
| 35 | /* on-chip devices */ | 119 | /* on-chip devices */ |
| 36 | pxa910_add_uart(1); | 120 | pxa910_add_uart(1); |
| 121 | |||
| 122 | /* off-chip devices */ | ||
| 123 | platform_add_devices(ARRAY_AND_SIZE(ttc_dkb_devices)); | ||
| 37 | } | 124 | } |
| 38 | 125 | ||
| 39 | MACHINE_START(TTC_DKB, "PXA910-based TTC_DKB Development Platform") | 126 | MACHINE_START(TTC_DKB, "PXA910-based TTC_DKB Development Platform") |
diff --git a/arch/arm/mach-mx2/Kconfig b/arch/arm/mach-mx2/Kconfig index c8a2eac4d13..b96c6a38936 100644 --- a/arch/arm/mach-mx2/Kconfig +++ b/arch/arm/mach-mx2/Kconfig | |||
| @@ -6,11 +6,13 @@ choice | |||
| 6 | 6 | ||
| 7 | config MACH_MX21 | 7 | config MACH_MX21 |
| 8 | bool "i.MX21 support" | 8 | bool "i.MX21 support" |
| 9 | select ARCH_MXC_AUDMUX_V1 | ||
| 9 | help | 10 | help |
| 10 | This enables support for Freescale's MX2 based i.MX21 processor. | 11 | This enables support for Freescale's MX2 based i.MX21 processor. |
| 11 | 12 | ||
| 12 | config MACH_MX27 | 13 | config MACH_MX27 |
| 13 | bool "i.MX27 support" | 14 | bool "i.MX27 support" |
| 15 | select ARCH_MXC_AUDMUX_V1 | ||
| 14 | help | 16 | help |
| 15 | This enables support for Freescale's MX2 based i.MX27 processor. | 17 | This enables support for Freescale's MX2 based i.MX27 processor. |
| 16 | 18 | ||
| @@ -102,4 +104,11 @@ config MACH_PCA100 | |||
| 102 | Include support for phyCARD-s (aka pca100) platform. This | 104 | Include support for phyCARD-s (aka pca100) platform. This |
| 103 | includes specific configurations for the module and its peripherals. | 105 | includes specific configurations for the module and its peripherals. |
| 104 | 106 | ||
| 107 | config MACH_MXT_TD60 | ||
| 108 | bool "Maxtrack i-MXT TD60" | ||
| 109 | depends on MACH_MX27 | ||
| 110 | help | ||
| 111 | Include support for i-MXT (aka td60) platform. This | ||
| 112 | includes specific configurations for the module and its peripherals. | ||
| 113 | |||
| 105 | endif | 114 | endif |
diff --git a/arch/arm/mach-mx2/Makefile b/arch/arm/mach-mx2/Makefile index 19560f04563..52aca0aaf9b 100644 --- a/arch/arm/mach-mx2/Makefile +++ b/arch/arm/mach-mx2/Makefile | |||
| @@ -20,4 +20,5 @@ obj-$(CONFIG_MACH_MX27LITE) += mx27lite.o | |||
| 20 | obj-$(CONFIG_MACH_EUKREA_CPUIMX27) += eukrea_cpuimx27.o | 20 | obj-$(CONFIG_MACH_EUKREA_CPUIMX27) += eukrea_cpuimx27.o |
| 21 | obj-$(CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD) += eukrea_mbimx27-baseboard.o | 21 | obj-$(CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD) += eukrea_mbimx27-baseboard.o |
| 22 | obj-$(CONFIG_MACH_PCA100) += pca100.o | 22 | obj-$(CONFIG_MACH_PCA100) += pca100.o |
| 23 | obj-$(CONFIG_MACH_MXT_TD60) += mxt_td60.o | ||
| 23 | 24 | ||
diff --git a/arch/arm/mach-mx2/clock_imx21.c b/arch/arm/mach-mx2/clock_imx21.c index eede79855f4..91901b5d56c 100644 --- a/arch/arm/mach-mx2/clock_imx21.c +++ b/arch/arm/mach-mx2/clock_imx21.c | |||
| @@ -1000,7 +1000,7 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href) | |||
| 1000 | clk_enable(&per_clk[0]); | 1000 | clk_enable(&per_clk[0]); |
| 1001 | clk_enable(&gpio_clk); | 1001 | clk_enable(&gpio_clk); |
| 1002 | 1002 | ||
| 1003 | #ifdef CONFIG_DEBUG_LL_CONSOLE | 1003 | #if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC) |
| 1004 | clk_enable(&uart_clk[0]); | 1004 | clk_enable(&uart_clk[0]); |
| 1005 | #endif | 1005 | #endif |
| 1006 | 1006 | ||
diff --git a/arch/arm/mach-mx2/clock_imx27.c b/arch/arm/mach-mx2/clock_imx27.c index ff5e3329891..b010bf9ceaa 100644 --- a/arch/arm/mach-mx2/clock_imx27.c +++ b/arch/arm/mach-mx2/clock_imx27.c | |||
| @@ -651,8 +651,8 @@ static struct clk_lookup lookups[] = { | |||
| 651 | _REGISTER_CLOCK("mxc-ehci.1", "usb_ahb", usb_clk1) | 651 | _REGISTER_CLOCK("mxc-ehci.1", "usb_ahb", usb_clk1) |
| 652 | _REGISTER_CLOCK("mxc-ehci.2", "usb", usb_clk) | 652 | _REGISTER_CLOCK("mxc-ehci.2", "usb", usb_clk) |
| 653 | _REGISTER_CLOCK("mxc-ehci.2", "usb_ahb", usb_clk1) | 653 | _REGISTER_CLOCK("mxc-ehci.2", "usb_ahb", usb_clk1) |
| 654 | _REGISTER_CLOCK(NULL, "ssi1", ssi1_clk) | 654 | _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk) |
| 655 | _REGISTER_CLOCK(NULL, "ssi2", ssi2_clk) | 655 | _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk) |
| 656 | _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk) | 656 | _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk) |
| 657 | _REGISTER_CLOCK(NULL, "vpu", vpu_clk) | 657 | _REGISTER_CLOCK(NULL, "vpu", vpu_clk) |
| 658 | _REGISTER_CLOCK(NULL, "dma", dma_clk) | 658 | _REGISTER_CLOCK(NULL, "dma", dma_clk) |
| @@ -751,7 +751,7 @@ int __init mx27_clocks_init(unsigned long fref) | |||
| 751 | clk_enable(&emi_clk); | 751 | clk_enable(&emi_clk); |
| 752 | clk_enable(&iim_clk); | 752 | clk_enable(&iim_clk); |
| 753 | 753 | ||
| 754 | #ifdef CONFIG_DEBUG_LL_CONSOLE | 754 | #if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC) |
| 755 | clk_enable(&uart1_clk); | 755 | clk_enable(&uart1_clk); |
| 756 | #endif | 756 | #endif |
| 757 | 757 | ||
diff --git a/arch/arm/mach-mx2/devices.c b/arch/arm/mach-mx2/devices.c index 50199aff014..3d398ce09b3 100644 --- a/arch/arm/mach-mx2/devices.c +++ b/arch/arm/mach-mx2/devices.c | |||
| @@ -530,6 +530,84 @@ struct platform_device mxc_usbh2 = { | |||
| 530 | }; | 530 | }; |
| 531 | #endif | 531 | #endif |
| 532 | 532 | ||
| 533 | static struct resource imx_ssi_resources0[] = { | ||
| 534 | { | ||
| 535 | .start = SSI1_BASE_ADDR, | ||
| 536 | .end = SSI1_BASE_ADDR + 0x6F, | ||
| 537 | .flags = IORESOURCE_MEM, | ||
| 538 | }, { | ||
| 539 | .start = MXC_INT_SSI1, | ||
| 540 | .end = MXC_INT_SSI1, | ||
| 541 | .flags = IORESOURCE_IRQ, | ||
| 542 | }, { | ||
| 543 | .name = "tx0", | ||
| 544 | .start = DMA_REQ_SSI1_TX0, | ||
| 545 | .end = DMA_REQ_SSI1_TX0, | ||
| 546 | .flags = IORESOURCE_DMA, | ||
| 547 | }, { | ||
| 548 | .name = "rx0", | ||
| 549 | .start = DMA_REQ_SSI1_RX0, | ||
| 550 | .end = DMA_REQ_SSI1_RX0, | ||
| 551 | .flags = IORESOURCE_DMA, | ||
| 552 | }, { | ||
| 553 | .name = "tx1", | ||
| 554 | .start = DMA_REQ_SSI1_TX1, | ||
| 555 | .end = DMA_REQ_SSI1_TX1, | ||
| 556 | .flags = IORESOURCE_DMA, | ||
| 557 | }, { | ||
| 558 | .name = "rx1", | ||
| 559 | .start = DMA_REQ_SSI1_RX1, | ||
| 560 | .end = DMA_REQ_SSI1_RX1, | ||
| 561 | .flags = IORESOURCE_DMA, | ||
| 562 | }, | ||
| 563 | }; | ||
| 564 | |||
| 565 | static struct resource imx_ssi_resources1[] = { | ||
| 566 | { | ||
| 567 | .start = SSI2_BASE_ADDR, | ||
| 568 | .end = SSI2_BASE_ADDR + 0x6F, | ||
| 569 | .flags = IORESOURCE_MEM, | ||
| 570 | }, { | ||
| 571 | .start = MXC_INT_SSI2, | ||
| 572 | .end = MXC_INT_SSI2, | ||
| 573 | .flags = IORESOURCE_IRQ, | ||
| 574 | }, { | ||
| 575 | .name = "tx0", | ||
| 576 | .start = DMA_REQ_SSI2_TX0, | ||
| 577 | .end = DMA_REQ_SSI2_TX0, | ||
| 578 | .flags = IORESOURCE_DMA, | ||
| 579 | }, { | ||
| 580 | .name = "rx0", | ||
| 581 | .start = DMA_REQ_SSI2_RX0, | ||
| 582 | .end = DMA_REQ_SSI2_RX0, | ||
| 583 | .flags = IORESOURCE_DMA, | ||
| 584 | }, { | ||
| 585 | .name = "tx1", | ||
| 586 | .start = DMA_REQ_SSI2_TX1, | ||
| 587 | .end = DMA_REQ_SSI2_TX1, | ||
| 588 | .flags = IORESOURCE_DMA, | ||
| 589 | }, { | ||
| 590 | .name = "rx1", | ||
| 591 | .start = DMA_REQ_SSI2_RX1, | ||
| 592 | .end = DMA_REQ_SSI2_RX1, | ||
| 593 | .flags = IORESOURCE_DMA, | ||
| 594 | }, | ||
| 595 | }; | ||
| 596 | |||
| 597 | struct platform_device imx_ssi_device0 = { | ||
| 598 | .name = "imx-ssi", | ||
| 599 | .id = 0, | ||
| 600 | .num_resources = ARRAY_SIZE(imx_ssi_resources0), | ||
| 601 | .resource = imx_ssi_resources0, | ||
| 602 | }; | ||
| 603 | |||
| 604 | struct platform_device imx_ssi_device1 = { | ||
| 605 | .name = "imx-ssi", | ||
| 606 | .id = 1, | ||
| 607 | .num_resources = ARRAY_SIZE(imx_ssi_resources1), | ||
| 608 | .resource = imx_ssi_resources1, | ||
| 609 | }; | ||
| 610 | |||
| 533 | /* GPIO port description */ | 611 | /* GPIO port description */ |
| 534 | static struct mxc_gpio_port imx_gpio_ports[] = { | 612 | static struct mxc_gpio_port imx_gpio_ports[] = { |
| 535 | { | 613 | { |
diff --git a/arch/arm/mach-mx2/devices.h b/arch/arm/mach-mx2/devices.h index d315406d672..97306aa18f1 100644 --- a/arch/arm/mach-mx2/devices.h +++ b/arch/arm/mach-mx2/devices.h | |||
| @@ -26,4 +26,5 @@ extern struct platform_device mxc_usbh2; | |||
| 26 | extern struct platform_device mxc_spi_device0; | 26 | extern struct platform_device mxc_spi_device0; |
| 27 | extern struct platform_device mxc_spi_device1; | 27 | extern struct platform_device mxc_spi_device1; |
| 28 | extern struct platform_device mxc_spi_device2; | 28 | extern struct platform_device mxc_spi_device2; |
| 29 | 29 | extern struct platform_device imx_ssi_device0; | |
| 30 | extern struct platform_device imx_ssi_device1; | ||
diff --git a/arch/arm/mach-mx2/mxt_td60.c b/arch/arm/mach-mx2/mxt_td60.c new file mode 100644 index 00000000000..03dbbdc9895 --- /dev/null +++ b/arch/arm/mach-mx2/mxt_td60.c | |||
| @@ -0,0 +1,319 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2000 Deep Blue Solutions Ltd | ||
| 3 | * Copyright (C) 2002 Shane Nay (shane@minirl.com) | ||
| 4 | * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved. | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License as published by | ||
| 8 | * the Free Software Foundation; either version 2 of the License, or | ||
| 9 | * (at your option) any later version. | ||
| 10 | * | ||
| 11 | * This program is distributed in the hope that it will be useful, | ||
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 14 | * GNU General Public License for more details. | ||
| 15 | * | ||
| 16 | * You should have received a copy of the GNU General Public License | ||
| 17 | * along with this program; if not, write to the Free Software | ||
| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 19 | */ | ||
| 20 | |||
| 21 | #include <linux/platform_device.h> | ||
| 22 | #include <linux/mtd/mtd.h> | ||
| 23 | #include <linux/mtd/map.h> | ||
| 24 | #include <linux/mtd/partitions.h> | ||
| 25 | #include <linux/mtd/physmap.h> | ||
| 26 | #include <linux/i2c.h> | ||
| 27 | #include <linux/irq.h> | ||
| 28 | #include <mach/common.h> | ||
| 29 | #include <mach/hardware.h> | ||
| 30 | #include <asm/mach-types.h> | ||
| 31 | #include <asm/mach/arch.h> | ||
| 32 | #include <asm/mach/time.h> | ||
| 33 | #include <asm/mach/map.h> | ||
| 34 | #include <linux/gpio.h> | ||
| 35 | #include <mach/imx-uart.h> | ||
| 36 | #include <mach/iomux.h> | ||
| 37 | #include <mach/mxc_nand.h> | ||
| 38 | #include <mach/i2c.h> | ||
| 39 | #include <linux/i2c/pca953x.h> | ||
| 40 | #include <mach/imxfb.h> | ||
| 41 | #include <mach/mmc.h> | ||
| 42 | |||
| 43 | #include "devices.h" | ||
| 44 | |||
| 45 | static unsigned int mxt_td60_pins[] __initdata = { | ||
| 46 | /* UART0 */ | ||
| 47 | PE12_PF_UART1_TXD, | ||
| 48 | PE13_PF_UART1_RXD, | ||
| 49 | PE14_PF_UART1_CTS, | ||
| 50 | PE15_PF_UART1_RTS, | ||
| 51 | /* UART1 */ | ||
| 52 | PE3_PF_UART2_CTS, | ||
| 53 | PE4_PF_UART2_RTS, | ||
| 54 | PE6_PF_UART2_TXD, | ||
| 55 | PE7_PF_UART2_RXD, | ||
| 56 | /* UART2 */ | ||
| 57 | PE8_PF_UART3_TXD, | ||
| 58 | PE9_PF_UART3_RXD, | ||
| 59 | PE10_PF_UART3_CTS, | ||
| 60 | PE11_PF_UART3_RTS, | ||
| 61 | /* UART3 */ | ||
| 62 | PB26_AF_UART4_RTS, | ||
| 63 | PB28_AF_UART4_TXD, | ||
| 64 | PB29_AF_UART4_CTS, | ||
| 65 | PB31_AF_UART4_RXD, | ||
| 66 | /* UART4 */ | ||
| 67 | PB18_AF_UART5_TXD, | ||
| 68 | PB19_AF_UART5_RXD, | ||
| 69 | PB20_AF_UART5_CTS, | ||
| 70 | PB21_AF_UART5_RTS, | ||
| 71 | /* UART5 */ | ||
| 72 | PB10_AF_UART6_TXD, | ||
| 73 | PB12_AF_UART6_CTS, | ||
| 74 | PB11_AF_UART6_RXD, | ||
| 75 | PB13_AF_UART6_RTS, | ||
| 76 | /* FEC */ | ||
| 77 | PD0_AIN_FEC_TXD0, | ||
| 78 | PD1_AIN_FEC_TXD1, | ||
| 79 | PD2_AIN_FEC_TXD2, | ||
| 80 | PD3_AIN_FEC_TXD3, | ||
| 81 | PD4_AOUT_FEC_RX_ER, | ||
| 82 | PD5_AOUT_FEC_RXD1, | ||
| 83 | PD6_AOUT_FEC_RXD2, | ||
| 84 | PD7_AOUT_FEC_RXD3, | ||
| 85 | PD8_AF_FEC_MDIO, | ||
| 86 | PD9_AIN_FEC_MDC, | ||
| 87 | PD10_AOUT_FEC_CRS, | ||
| 88 | PD11_AOUT_FEC_TX_CLK, | ||
| 89 | PD12_AOUT_FEC_RXD0, | ||
| 90 | PD13_AOUT_FEC_RX_DV, | ||
| 91 | PD14_AOUT_FEC_RX_CLK, | ||
| 92 | PD15_AOUT_FEC_COL, | ||
| 93 | PD16_AIN_FEC_TX_ER, | ||
| 94 | PF23_AIN_FEC_TX_EN, | ||
| 95 | /* I2C1 */ | ||
| 96 | PD17_PF_I2C_DATA, | ||
| 97 | PD18_PF_I2C_CLK, | ||
| 98 | /* I2C2 */ | ||
| 99 | PC5_PF_I2C2_SDA, | ||
| 100 | PC6_PF_I2C2_SCL, | ||
| 101 | /* FB */ | ||
| 102 | PA5_PF_LSCLK, | ||
| 103 | PA6_PF_LD0, | ||
| 104 | PA7_PF_LD1, | ||
| 105 | PA8_PF_LD2, | ||
| 106 | PA9_PF_LD3, | ||
| 107 | PA10_PF_LD4, | ||
| 108 | PA11_PF_LD5, | ||
| 109 | PA12_PF_LD6, | ||
| 110 | PA13_PF_LD7, | ||
| 111 | PA14_PF_LD8, | ||
| 112 | PA15_PF_LD9, | ||
| 113 | PA16_PF_LD10, | ||
| 114 | PA17_PF_LD11, | ||
| 115 | PA18_PF_LD12, | ||
| 116 | PA19_PF_LD13, | ||
| 117 | PA20_PF_LD14, | ||
| 118 | PA21_PF_LD15, | ||
| 119 | PA22_PF_LD16, | ||
| 120 | PA23_PF_LD17, | ||
| 121 | PA25_PF_CLS, | ||
| 122 | PA27_PF_SPL_SPR, | ||
| 123 | PA28_PF_HSYNC, | ||
| 124 | PA29_PF_VSYNC, | ||
| 125 | PA30_PF_CONTRAST, | ||
| 126 | PA31_PF_OE_ACD, | ||
| 127 | /* OWIRE */ | ||
| 128 | PE16_AF_OWIRE, | ||
| 129 | /* SDHC1*/ | ||
| 130 | PE18_PF_SD1_D0, | ||
| 131 | PE19_PF_SD1_D1, | ||
| 132 | PE20_PF_SD1_D2, | ||
| 133 | PE21_PF_SD1_D3, | ||
| 134 | PE22_PF_SD1_CMD, | ||
| 135 | PE23_PF_SD1_CLK, | ||
| 136 | PF8_AF_ATA_IORDY, | ||
| 137 | /* SDHC2*/ | ||
| 138 | PB4_PF_SD2_D0, | ||
| 139 | PB5_PF_SD2_D1, | ||
| 140 | PB6_PF_SD2_D2, | ||
| 141 | PB7_PF_SD2_D3, | ||
| 142 | PB8_PF_SD2_CMD, | ||
| 143 | PB9_PF_SD2_CLK, | ||
| 144 | }; | ||
| 145 | |||
| 146 | static struct mxc_nand_platform_data mxt_td60_nand_board_info = { | ||
| 147 | .width = 1, | ||
| 148 | .hw_ecc = 1, | ||
| 149 | }; | ||
| 150 | |||
| 151 | static struct imxi2c_platform_data mxt_td60_i2c_data = { | ||
| 152 | .bitrate = 100000, | ||
| 153 | }; | ||
| 154 | |||
| 155 | /* PCA9557 */ | ||
| 156 | static int mxt_td60_pca9557_setup(struct i2c_client *client, | ||
| 157 | unsigned gpio_base, unsigned ngpio, | ||
| 158 | void *context) | ||
| 159 | { | ||
| 160 | static int mxt_td60_gpio_value[] = { | ||
| 161 | -1, -1, -1, -1, -1, -1, -1, 1 | ||
| 162 | }; | ||
| 163 | int n; | ||
| 164 | |||
| 165 | for (n = 0; n < ARRAY_SIZE(mxt_td60_gpio_value); ++n) { | ||
| 166 | gpio_request(gpio_base + n, "MXT_TD60 GPIO Exp"); | ||
| 167 | if (mxt_td60_gpio_value[n] < 0) | ||
| 168 | gpio_direction_input(gpio_base + n); | ||
| 169 | else | ||
| 170 | gpio_direction_output(gpio_base + n, | ||
| 171 | mxt_td60_gpio_value[n]); | ||
| 172 | gpio_export(gpio_base + n, 0); | ||
| 173 | } | ||
| 174 | |||
| 175 | return 0; | ||
| 176 | } | ||
| 177 | |||
| 178 | static struct pca953x_platform_data mxt_td60_pca9557_pdata = { | ||
| 179 | .gpio_base = 240, /* place PCA9557 after all MX27 gpio pins */ | ||
| 180 | .invert = 0, /* Do not invert */ | ||
| 181 | .setup = mxt_td60_pca9557_setup, | ||
| 182 | }; | ||
| 183 | |||
| 184 | static struct i2c_board_info mxt_td60_i2c_devices[] = { | ||
| 185 | { | ||
| 186 | I2C_BOARD_INFO("pca9557", 0x18), | ||
| 187 | .platform_data = &mxt_td60_pca9557_pdata, | ||
| 188 | }, | ||
| 189 | }; | ||
| 190 | |||
| 191 | static struct imxi2c_platform_data mxt_td60_i2c2_data = { | ||
| 192 | .bitrate = 100000, | ||
| 193 | }; | ||
| 194 | |||
| 195 | static struct i2c_board_info mxt_td60_i2c2_devices[] = { | ||
| 196 | }; | ||
| 197 | |||
| 198 | static struct imx_fb_videomode mxt_td60_modes[] = { | ||
| 199 | { | ||
| 200 | .mode = { | ||
| 201 | .name = "Chimei LW700AT9003", | ||
| 202 | .refresh = 60, | ||
| 203 | .xres = 800, | ||
| 204 | .yres = 480, | ||
| 205 | .pixclock = 30303, | ||
| 206 | .hsync_len = 64, | ||
| 207 | .left_margin = 0x67, | ||
| 208 | .right_margin = 0x68, | ||
| 209 | .vsync_len = 16, | ||
| 210 | .upper_margin = 0x0f, | ||
| 211 | .lower_margin = 0x0f, | ||
| 212 | }, | ||
| 213 | .bpp = 16, | ||
| 214 | .pcr = 0xFA208B83, | ||
| 215 | }, | ||
| 216 | }; | ||
| 217 | |||
| 218 | static struct imx_fb_platform_data mxt_td60_fb_data = { | ||
| 219 | .mode = mxt_td60_modes, | ||
| 220 | .num_modes = ARRAY_SIZE(mxt_td60_modes), | ||
| 221 | |||
| 222 | /* | ||
| 223 | * - HSYNC active high | ||
| 224 | * - VSYNC active high | ||
| 225 | * - clk notenabled while idle | ||
| 226 | * - clock inverted | ||
| 227 | * - data not inverted | ||
| 228 | * - data enable low active | ||
| 229 | * - enable sharp mode | ||
| 230 | */ | ||
| 231 | .pwmr = 0x00A903FF, | ||
| 232 | .lscr1 = 0x00120300, | ||
| 233 | .dmacr = 0x00020010, | ||
| 234 | }; | ||
| 235 | |||
| 236 | static int mxt_td60_sdhc1_init(struct device *dev, irq_handler_t detect_irq, | ||
| 237 | void *data) | ||
| 238 | { | ||
| 239 | return request_irq(IRQ_GPIOF(8), detect_irq, IRQF_TRIGGER_FALLING, | ||
| 240 | "sdhc1-card-detect", data); | ||
| 241 | } | ||
| 242 | |||
| 243 | static void mxt_td60_sdhc1_exit(struct device *dev, void *data) | ||
| 244 | { | ||
| 245 | free_irq(IRQ_GPIOF(8), data); | ||
| 246 | } | ||
| 247 | |||
| 248 | static struct imxmmc_platform_data sdhc1_pdata = { | ||
| 249 | .init = mxt_td60_sdhc1_init, | ||
| 250 | .exit = mxt_td60_sdhc1_exit, | ||
| 251 | }; | ||
| 252 | |||
| 253 | static struct platform_device *platform_devices[] __initdata = { | ||
| 254 | &mxc_fec_device, | ||
| 255 | }; | ||
| 256 | |||
| 257 | static struct imxuart_platform_data uart_pdata[] = { | ||
| 258 | { | ||
| 259 | .flags = IMXUART_HAVE_RTSCTS, | ||
| 260 | }, { | ||
| 261 | .flags = IMXUART_HAVE_RTSCTS, | ||
| 262 | }, { | ||
| 263 | .flags = IMXUART_HAVE_RTSCTS, | ||
| 264 | }, { | ||
| 265 | .flags = IMXUART_HAVE_RTSCTS, | ||
| 266 | }, { | ||
| 267 | .flags = IMXUART_HAVE_RTSCTS, | ||
| 268 | }, { | ||
| 269 | .flags = IMXUART_HAVE_RTSCTS, | ||
| 270 | }, | ||
| 271 | }; | ||
| 272 | |||
| 273 | static void __init mxt_td60_board_init(void) | ||
| 274 | { | ||
| 275 | mxc_gpio_setup_multiple_pins(mxt_td60_pins, ARRAY_SIZE(mxt_td60_pins), | ||
| 276 | "MXT_TD60"); | ||
| 277 | |||
| 278 | mxc_register_device(&mxc_uart_device0, &uart_pdata[0]); | ||
| 279 | mxc_register_device(&mxc_uart_device1, &uart_pdata[1]); | ||
| 280 | mxc_register_device(&mxc_uart_device2, &uart_pdata[2]); | ||
| 281 | mxc_register_device(&mxc_uart_device3, &uart_pdata[3]); | ||
| 282 | mxc_register_device(&mxc_uart_device4, &uart_pdata[4]); | ||
| 283 | mxc_register_device(&mxc_uart_device5, &uart_pdata[5]); | ||
| 284 | mxc_register_device(&mxc_nand_device, &mxt_td60_nand_board_info); | ||
| 285 | |||
| 286 | i2c_register_board_info(0, mxt_td60_i2c_devices, | ||
| 287 | ARRAY_SIZE(mxt_td60_i2c_devices)); | ||
| 288 | |||
| 289 | i2c_register_board_info(1, mxt_td60_i2c2_devices, | ||
| 290 | ARRAY_SIZE(mxt_td60_i2c2_devices)); | ||
| 291 | |||
| 292 | mxc_register_device(&mxc_i2c_device0, &mxt_td60_i2c_data); | ||
| 293 | mxc_register_device(&mxc_i2c_device1, &mxt_td60_i2c2_data); | ||
| 294 | mxc_register_device(&mxc_fb_device, &mxt_td60_fb_data); | ||
| 295 | mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata); | ||
| 296 | |||
| 297 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); | ||
| 298 | } | ||
| 299 | |||
| 300 | static void __init mxt_td60_timer_init(void) | ||
| 301 | { | ||
| 302 | mx27_clocks_init(26000000); | ||
| 303 | } | ||
| 304 | |||
| 305 | static struct sys_timer mxt_td60_timer = { | ||
| 306 | .init = mxt_td60_timer_init, | ||
| 307 | }; | ||
| 308 | |||
| 309 | MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60") | ||
| 310 | /* maintainer: Maxtrack Industrial */ | ||
| 311 | .phys_io = AIPI_BASE_ADDR, | ||
| 312 | .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, | ||
| 313 | .boot_params = PHYS_OFFSET + 0x100, | ||
| 314 | .map_io = mx27_map_io, | ||
| 315 | .init_irq = mx27_init_irq, | ||
| 316 | .init_machine = mxt_td60_board_init, | ||
| 317 | .timer = &mxt_td60_timer, | ||
| 318 | MACHINE_END | ||
| 319 | |||
diff --git a/arch/arm/mach-mx2/pca100.c b/arch/arm/mach-mx2/pca100.c index fe5b165b88c..aea3d340d2e 100644 --- a/arch/arm/mach-mx2/pca100.c +++ b/arch/arm/mach-mx2/pca100.c | |||
| @@ -237,7 +237,7 @@ MACHINE_START(PCA100, "phyCARD-i.MX27") | |||
| 237 | .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, | 237 | .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, |
| 238 | .boot_params = PHYS_OFFSET + 0x100, | 238 | .boot_params = PHYS_OFFSET + 0x100, |
| 239 | .map_io = mx27_map_io, | 239 | .map_io = mx27_map_io, |
| 240 | .init_irq = mxc_init_irq, | 240 | .init_irq = mx27_init_irq, |
| 241 | .init_machine = pca100_init, | 241 | .init_machine = pca100_init, |
| 242 | .timer = &pca100_timer, | 242 | .timer = &pca100_timer, |
| 243 | MACHINE_END | 243 | MACHINE_END |
diff --git a/arch/arm/mach-mx3/Kconfig b/arch/arm/mach-mx3/Kconfig index 851f2458bf6..ea8ed109a7c 100644 --- a/arch/arm/mach-mx3/Kconfig +++ b/arch/arm/mach-mx3/Kconfig | |||
| @@ -2,11 +2,13 @@ if ARCH_MX3 | |||
| 2 | 2 | ||
| 3 | config ARCH_MX31 | 3 | config ARCH_MX31 |
| 4 | select ARCH_HAS_RNGA | 4 | select ARCH_HAS_RNGA |
| 5 | select ARCH_MXC_AUDMUX_V2 | ||
| 5 | bool | 6 | bool |
| 6 | 7 | ||
| 7 | config ARCH_MX35 | 8 | config ARCH_MX35 |
| 8 | bool | 9 | bool |
| 9 | select ARCH_MXC_IOMUX_V3 | 10 | select ARCH_MXC_IOMUX_V3 |
| 11 | select ARCH_MXC_AUDMUX_V2 | ||
| 10 | 12 | ||
| 11 | comment "MX3 platforms:" | 13 | comment "MX3 platforms:" |
| 12 | 14 | ||
| @@ -61,6 +63,7 @@ config MACH_MX31_3DS | |||
| 61 | config MACH_MX31MOBOARD | 63 | config MACH_MX31MOBOARD |
| 62 | bool "Support mx31moboard platforms (EPFL Mobots group)" | 64 | bool "Support mx31moboard platforms (EPFL Mobots group)" |
| 63 | select ARCH_MX31 | 65 | select ARCH_MX31 |
| 66 | select MXC_ULPI | ||
| 64 | help | 67 | help |
| 65 | Include support for mx31moboard platform. This includes specific | 68 | Include support for mx31moboard platform. This includes specific |
| 66 | configurations for the board and its peripherals. | 69 | configurations for the board and its peripherals. |
| @@ -100,4 +103,12 @@ config MACH_MX35_3DS | |||
| 100 | help | 103 | help |
| 101 | Include support for MX35PDK platform. This includes specific | 104 | Include support for MX35PDK platform. This includes specific |
| 102 | configurations for the board and its peripherals. | 105 | configurations for the board and its peripherals. |
| 106 | |||
| 107 | config MACH_KZM_ARM11_01 | ||
| 108 | bool "Support KZM-ARM11-01(Kyoto Microcomputer)" | ||
| 109 | select ARCH_MX31 | ||
| 110 | help | ||
| 111 | Include support for KZM-ARM11-01. This includes specific | ||
| 112 | configurations for the board and its peripherals. | ||
| 113 | |||
| 103 | endif | 114 | endif |
diff --git a/arch/arm/mach-mx3/Makefile b/arch/arm/mach-mx3/Makefile index 6b9775471be..93c7b296be6 100644 --- a/arch/arm/mach-mx3/Makefile +++ b/arch/arm/mach-mx3/Makefile | |||
| @@ -4,12 +4,12 @@ | |||
| 4 | 4 | ||
| 5 | # Object file lists. | 5 | # Object file lists. |
| 6 | 6 | ||
| 7 | obj-y := mm.o devices.o | 7 | obj-y := mm.o devices.o cpu.o |
| 8 | obj-$(CONFIG_ARCH_MX31) += clock.o iomux.o | 8 | obj-$(CONFIG_ARCH_MX31) += clock.o iomux.o |
| 9 | obj-$(CONFIG_ARCH_MX35) += clock-imx35.o | 9 | obj-$(CONFIG_ARCH_MX35) += clock-imx35.o |
| 10 | obj-$(CONFIG_MACH_MX31ADS) += mx31ads.o | 10 | obj-$(CONFIG_MACH_MX31ADS) += mx31ads.o |
| 11 | obj-$(CONFIG_MACH_MX31LILLY) += mx31lilly.o mx31lilly-db.o | 11 | obj-$(CONFIG_MACH_MX31LILLY) += mx31lilly.o mx31lilly-db.o |
| 12 | obj-$(CONFIG_MACH_MX31LITE) += mx31lite.o | 12 | obj-$(CONFIG_MACH_MX31LITE) += mx31lite.o mx31lite-db.o |
| 13 | obj-$(CONFIG_MACH_PCM037) += pcm037.o | 13 | obj-$(CONFIG_MACH_PCM037) += pcm037.o |
| 14 | obj-$(CONFIG_MACH_PCM037_EET) += pcm037_eet.o | 14 | obj-$(CONFIG_MACH_PCM037_EET) += pcm037_eet.o |
| 15 | obj-$(CONFIG_MACH_MX31_3DS) += mx31pdk.o | 15 | obj-$(CONFIG_MACH_MX31_3DS) += mx31pdk.o |
| @@ -19,3 +19,4 @@ obj-$(CONFIG_MACH_QONG) += qong.o | |||
| 19 | obj-$(CONFIG_MACH_PCM043) += pcm043.o | 19 | obj-$(CONFIG_MACH_PCM043) += pcm043.o |
| 20 | obj-$(CONFIG_MACH_ARMADILLO5X0) += armadillo5x0.o | 20 | obj-$(CONFIG_MACH_ARMADILLO5X0) += armadillo5x0.o |
| 21 | obj-$(CONFIG_MACH_MX35_3DS) += mx35pdk.o | 21 | obj-$(CONFIG_MACH_MX35_3DS) += mx35pdk.o |
| 22 | obj-$(CONFIG_MACH_KZM_ARM11_01) += kzmarm11.o | ||
diff --git a/arch/arm/mach-mx3/armadillo5x0.c b/arch/arm/mach-mx3/armadillo5x0.c index 776c0ee1b3c..54aab401dbd 100644 --- a/arch/arm/mach-mx3/armadillo5x0.c +++ b/arch/arm/mach-mx3/armadillo5x0.c | |||
| @@ -33,6 +33,9 @@ | |||
| 33 | #include <linux/irq.h> | 33 | #include <linux/irq.h> |
| 34 | #include <linux/mtd/physmap.h> | 34 | #include <linux/mtd/physmap.h> |
| 35 | #include <linux/io.h> | 35 | #include <linux/io.h> |
| 36 | #include <linux/input.h> | ||
| 37 | #include <linux/gpio_keys.h> | ||
| 38 | #include <linux/i2c.h> | ||
| 36 | 39 | ||
| 37 | #include <mach/hardware.h> | 40 | #include <mach/hardware.h> |
| 38 | #include <asm/mach-types.h> | 41 | #include <asm/mach-types.h> |
| @@ -97,6 +100,47 @@ static int armadillo5x0_pins[] = { | |||
| 97 | MX31_PIN_FPSHIFT__FPSHIFT, | 100 | MX31_PIN_FPSHIFT__FPSHIFT, |
| 98 | MX31_PIN_DRDY0__DRDY0, | 101 | MX31_PIN_DRDY0__DRDY0, |
| 99 | IOMUX_MODE(MX31_PIN_LCS1, IOMUX_CONFIG_GPIO), /*ADV7125_PSAVE*/ | 102 | IOMUX_MODE(MX31_PIN_LCS1, IOMUX_CONFIG_GPIO), /*ADV7125_PSAVE*/ |
| 103 | /* I2C2 */ | ||
| 104 | MX31_PIN_CSPI2_MOSI__SCL, | ||
| 105 | MX31_PIN_CSPI2_MISO__SDA, | ||
| 106 | }; | ||
| 107 | |||
| 108 | /* RTC over I2C*/ | ||
| 109 | #define ARMADILLO5X0_RTC_GPIO IOMUX_TO_GPIO(MX31_PIN_SRXD4) | ||
| 110 | |||
| 111 | static struct i2c_board_info armadillo5x0_i2c_rtc = { | ||
| 112 | I2C_BOARD_INFO("s35390a", 0x30), | ||
| 113 | }; | ||
| 114 | |||
| 115 | /* GPIO BUTTONS */ | ||
| 116 | static struct gpio_keys_button armadillo5x0_buttons[] = { | ||
| 117 | { | ||
| 118 | .code = KEY_ENTER, /*28*/ | ||
| 119 | .gpio = IOMUX_TO_GPIO(MX31_PIN_SCLK0), | ||
| 120 | .active_low = 1, | ||
| 121 | .desc = "menu", | ||
| 122 | .wakeup = 1, | ||
| 123 | }, { | ||
| 124 | .code = KEY_BACK, /*158*/ | ||
| 125 | .gpio = IOMUX_TO_GPIO(MX31_PIN_SRST0), | ||
| 126 | .active_low = 1, | ||
| 127 | .desc = "back", | ||
| 128 | .wakeup = 1, | ||
| 129 | } | ||
| 130 | }; | ||
| 131 | |||
| 132 | static struct gpio_keys_platform_data armadillo5x0_button_data = { | ||
| 133 | .buttons = armadillo5x0_buttons, | ||
| 134 | .nbuttons = ARRAY_SIZE(armadillo5x0_buttons), | ||
| 135 | }; | ||
| 136 | |||
| 137 | static struct platform_device armadillo5x0_button_device = { | ||
| 138 | .name = "gpio-keys", | ||
| 139 | .id = -1, | ||
| 140 | .num_resources = 0, | ||
| 141 | .dev = { | ||
| 142 | .platform_data = &armadillo5x0_button_data, | ||
| 143 | } | ||
| 100 | }; | 144 | }; |
| 101 | 145 | ||
| 102 | /* | 146 | /* |
| @@ -278,7 +322,7 @@ static struct resource armadillo5x0_smc911x_resources[] = { | |||
| 278 | }; | 322 | }; |
| 279 | 323 | ||
| 280 | static struct smsc911x_platform_config smsc911x_info = { | 324 | static struct smsc911x_platform_config smsc911x_info = { |
| 281 | .flags = SMSC911X_USE_32BIT, | 325 | .flags = SMSC911X_USE_16BIT, |
| 282 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | 326 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, |
| 283 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, | 327 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, |
| 284 | }; | 328 | }; |
| @@ -300,6 +344,8 @@ static struct imxuart_platform_data uart_pdata = { | |||
| 300 | 344 | ||
| 301 | static struct platform_device *devices[] __initdata = { | 345 | static struct platform_device *devices[] __initdata = { |
| 302 | &armadillo5x0_smc911x_device, | 346 | &armadillo5x0_smc911x_device, |
| 347 | &mxc_i2c_device1, | ||
| 348 | &armadillo5x0_button_device, | ||
| 303 | }; | 349 | }; |
| 304 | 350 | ||
| 305 | /* | 351 | /* |
| @@ -335,6 +381,18 @@ static void __init armadillo5x0_init(void) | |||
| 335 | 381 | ||
| 336 | /* set NAND page size to 2k if not configured via boot mode pins */ | 382 | /* set NAND page size to 2k if not configured via boot mode pins */ |
| 337 | __raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR); | 383 | __raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR); |
| 384 | |||
| 385 | /* RTC */ | ||
| 386 | /* Get RTC IRQ and register the chip */ | ||
| 387 | if (gpio_request(ARMADILLO5X0_RTC_GPIO, "rtc") == 0) { | ||
| 388 | if (gpio_direction_input(ARMADILLO5X0_RTC_GPIO) == 0) | ||
| 389 | armadillo5x0_i2c_rtc.irq = gpio_to_irq(ARMADILLO5X0_RTC_GPIO); | ||
| 390 | else | ||
| 391 | gpio_free(ARMADILLO5X0_RTC_GPIO); | ||
| 392 | } | ||
| 393 | if (armadillo5x0_i2c_rtc.irq == 0) | ||
| 394 | pr_warning("armadillo5x0_init: failed to get RTC IRQ\n"); | ||
| 395 | i2c_register_board_info(1, &armadillo5x0_i2c_rtc, 1); | ||
| 338 | } | 396 | } |
| 339 | 397 | ||
| 340 | static void __init armadillo5x0_timer_init(void) | 398 | static void __init armadillo5x0_timer_init(void) |
diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c index c595260ec1f..7584b4c6c55 100644 --- a/arch/arm/mach-mx3/clock-imx35.c +++ b/arch/arm/mach-mx3/clock-imx35.c | |||
| @@ -335,7 +335,7 @@ static void clk_cgr_disable(struct clk *clk) | |||
| 335 | 335 | ||
| 336 | DEFINE_CLOCK(asrc_clk, 0, CCM_CGR0, 0, NULL, NULL); | 336 | DEFINE_CLOCK(asrc_clk, 0, CCM_CGR0, 0, NULL, NULL); |
| 337 | DEFINE_CLOCK(ata_clk, 0, CCM_CGR0, 2, get_rate_ipg, NULL); | 337 | DEFINE_CLOCK(ata_clk, 0, CCM_CGR0, 2, get_rate_ipg, NULL); |
| 338 | DEFINE_CLOCK(audmux_clk, 0, CCM_CGR0, 4, NULL, NULL); | 338 | /* DEFINE_CLOCK(audmux_clk, 0, CCM_CGR0, 4, NULL, NULL); */ |
| 339 | DEFINE_CLOCK(can1_clk, 0, CCM_CGR0, 6, get_rate_ipg, NULL); | 339 | DEFINE_CLOCK(can1_clk, 0, CCM_CGR0, 6, get_rate_ipg, NULL); |
| 340 | DEFINE_CLOCK(can2_clk, 1, CCM_CGR0, 8, get_rate_ipg, NULL); | 340 | DEFINE_CLOCK(can2_clk, 1, CCM_CGR0, 8, get_rate_ipg, NULL); |
| 341 | DEFINE_CLOCK(cspi1_clk, 0, CCM_CGR0, 10, get_rate_ipg, NULL); | 341 | DEFINE_CLOCK(cspi1_clk, 0, CCM_CGR0, 10, get_rate_ipg, NULL); |
| @@ -381,12 +381,43 @@ DEFINE_CLOCK(uart3_clk, 2, CCM_CGR2, 20, get_rate_uart, NULL); | |||
| 381 | DEFINE_CLOCK(usbotg_clk, 0, CCM_CGR2, 22, get_rate_otg, NULL); | 381 | DEFINE_CLOCK(usbotg_clk, 0, CCM_CGR2, 22, get_rate_otg, NULL); |
| 382 | DEFINE_CLOCK(wdog_clk, 0, CCM_CGR2, 24, NULL, NULL); | 382 | DEFINE_CLOCK(wdog_clk, 0, CCM_CGR2, 24, NULL, NULL); |
| 383 | DEFINE_CLOCK(max_clk, 0, CCM_CGR2, 26, NULL, NULL); | 383 | DEFINE_CLOCK(max_clk, 0, CCM_CGR2, 26, NULL, NULL); |
| 384 | DEFINE_CLOCK(admux_clk, 0, CCM_CGR2, 30, NULL, NULL); | 384 | DEFINE_CLOCK(audmux_clk, 0, CCM_CGR2, 30, NULL, NULL); |
| 385 | 385 | ||
| 386 | DEFINE_CLOCK(csi_clk, 0, CCM_CGR3, 0, get_rate_csi, NULL); | 386 | DEFINE_CLOCK(csi_clk, 0, CCM_CGR3, 0, get_rate_csi, NULL); |
| 387 | DEFINE_CLOCK(iim_clk, 0, CCM_CGR3, 2, NULL, NULL); | 387 | DEFINE_CLOCK(iim_clk, 0, CCM_CGR3, 2, NULL, NULL); |
| 388 | DEFINE_CLOCK(gpu2d_clk, 0, CCM_CGR3, 4, NULL, NULL); | 388 | DEFINE_CLOCK(gpu2d_clk, 0, CCM_CGR3, 4, NULL, NULL); |
| 389 | 389 | ||
| 390 | DEFINE_CLOCK(usbahb_clk, 0, 0, 0, get_rate_ahb, NULL); | ||
| 391 | |||
| 392 | static int clk_dummy_enable(struct clk *clk) | ||
| 393 | { | ||
| 394 | return 0; | ||
| 395 | } | ||
| 396 | |||
| 397 | static void clk_dummy_disable(struct clk *clk) | ||
| 398 | { | ||
| 399 | } | ||
| 400 | |||
| 401 | static unsigned long get_rate_nfc(struct clk *clk) | ||
| 402 | { | ||
| 403 | unsigned long div1; | ||
| 404 | |||
| 405 | div1 = (__raw_readl(CCM_BASE + CCM_PDR4) >> 28) + 1; | ||
| 406 | |||
| 407 | return get_rate_ahb(NULL) / div1; | ||
| 408 | } | ||
| 409 | |||
| 410 | /* NAND Controller: It seems it can't be disabled */ | ||
| 411 | static struct clk nfc_clk = { | ||
| 412 | .id = 0, | ||
| 413 | .enable_reg = 0, | ||
| 414 | .enable_shift = 0, | ||
| 415 | .get_rate = get_rate_nfc, | ||
| 416 | .set_rate = NULL, /* set_rate_nfc, */ | ||
| 417 | .enable = clk_dummy_enable, | ||
| 418 | .disable = clk_dummy_disable | ||
| 419 | }; | ||
| 420 | |||
| 390 | #define _REGISTER_CLOCK(d, n, c) \ | 421 | #define _REGISTER_CLOCK(d, n, c) \ |
| 391 | { \ | 422 | { \ |
| 392 | .dev_id = d, \ | 423 | .dev_id = d, \ |
| @@ -397,7 +428,6 @@ DEFINE_CLOCK(gpu2d_clk, 0, CCM_CGR3, 4, NULL, NULL); | |||
| 397 | static struct clk_lookup lookups[] = { | 428 | static struct clk_lookup lookups[] = { |
| 398 | _REGISTER_CLOCK(NULL, "asrc", asrc_clk) | 429 | _REGISTER_CLOCK(NULL, "asrc", asrc_clk) |
| 399 | _REGISTER_CLOCK(NULL, "ata", ata_clk) | 430 | _REGISTER_CLOCK(NULL, "ata", ata_clk) |
| 400 | _REGISTER_CLOCK(NULL, "audmux", audmux_clk) | ||
| 401 | _REGISTER_CLOCK(NULL, "can", can1_clk) | 431 | _REGISTER_CLOCK(NULL, "can", can1_clk) |
| 402 | _REGISTER_CLOCK(NULL, "can", can2_clk) | 432 | _REGISTER_CLOCK(NULL, "can", can2_clk) |
| 403 | _REGISTER_CLOCK("spi_imx.0", NULL, cspi1_clk) | 433 | _REGISTER_CLOCK("spi_imx.0", NULL, cspi1_clk) |
| @@ -434,8 +464,8 @@ static struct clk_lookup lookups[] = { | |||
| 434 | _REGISTER_CLOCK(NULL, "sdma", sdma_clk) | 464 | _REGISTER_CLOCK(NULL, "sdma", sdma_clk) |
| 435 | _REGISTER_CLOCK(NULL, "spba", spba_clk) | 465 | _REGISTER_CLOCK(NULL, "spba", spba_clk) |
| 436 | _REGISTER_CLOCK(NULL, "spdif", spdif_clk) | 466 | _REGISTER_CLOCK(NULL, "spdif", spdif_clk) |
| 437 | _REGISTER_CLOCK(NULL, "ssi", ssi1_clk) | 467 | _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk) |
| 438 | _REGISTER_CLOCK(NULL, "ssi", ssi2_clk) | 468 | _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk) |
| 439 | _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk) | 469 | _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk) |
| 440 | _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk) | 470 | _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk) |
| 441 | _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) | 471 | _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) |
| @@ -443,12 +473,14 @@ static struct clk_lookup lookups[] = { | |||
| 443 | _REGISTER_CLOCK("mxc-ehci.1", "usb", usbotg_clk) | 473 | _REGISTER_CLOCK("mxc-ehci.1", "usb", usbotg_clk) |
| 444 | _REGISTER_CLOCK("mxc-ehci.2", "usb", usbotg_clk) | 474 | _REGISTER_CLOCK("mxc-ehci.2", "usb", usbotg_clk) |
| 445 | _REGISTER_CLOCK("fsl-usb2-udc", "usb", usbotg_clk) | 475 | _REGISTER_CLOCK("fsl-usb2-udc", "usb", usbotg_clk) |
| 476 | _REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", usbahb_clk) | ||
| 446 | _REGISTER_CLOCK("imx-wdt.0", NULL, wdog_clk) | 477 | _REGISTER_CLOCK("imx-wdt.0", NULL, wdog_clk) |
| 447 | _REGISTER_CLOCK(NULL, "max", max_clk) | 478 | _REGISTER_CLOCK(NULL, "max", max_clk) |
| 448 | _REGISTER_CLOCK(NULL, "admux", admux_clk) | 479 | _REGISTER_CLOCK(NULL, "audmux", audmux_clk) |
| 449 | _REGISTER_CLOCK(NULL, "csi", csi_clk) | 480 | _REGISTER_CLOCK(NULL, "csi", csi_clk) |
| 450 | _REGISTER_CLOCK(NULL, "iim", iim_clk) | 481 | _REGISTER_CLOCK(NULL, "iim", iim_clk) |
| 451 | _REGISTER_CLOCK(NULL, "gpu2d", gpu2d_clk) | 482 | _REGISTER_CLOCK(NULL, "gpu2d", gpu2d_clk) |
| 483 | _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk) | ||
| 452 | }; | 484 | }; |
| 453 | 485 | ||
| 454 | int __init mx35_clocks_init() | 486 | int __init mx35_clocks_init() |
| @@ -456,7 +488,7 @@ int __init mx35_clocks_init() | |||
| 456 | int i; | 488 | int i; |
| 457 | unsigned int ll = 0; | 489 | unsigned int ll = 0; |
| 458 | 490 | ||
| 459 | #ifdef CONFIG_DEBUG_LL_CONSOLE | 491 | #if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC) |
| 460 | ll = (3 << 16); | 492 | ll = (3 << 16); |
| 461 | #endif | 493 | #endif |
| 462 | 494 | ||
diff --git a/arch/arm/mach-mx3/clock.c b/arch/arm/mach-mx3/clock.c index b2a3bcf8266..27a318af0d2 100644 --- a/arch/arm/mach-mx3/clock.c +++ b/arch/arm/mach-mx3/clock.c | |||
| @@ -558,8 +558,8 @@ static struct clk_lookup lookups[] = { | |||
| 558 | _REGISTER_CLOCK("mxc_w1.0", NULL, owire_clk) | 558 | _REGISTER_CLOCK("mxc_w1.0", NULL, owire_clk) |
| 559 | _REGISTER_CLOCK("mxc-mmc.0", NULL, sdhc1_clk) | 559 | _REGISTER_CLOCK("mxc-mmc.0", NULL, sdhc1_clk) |
| 560 | _REGISTER_CLOCK("mxc-mmc.1", NULL, sdhc2_clk) | 560 | _REGISTER_CLOCK("mxc-mmc.1", NULL, sdhc2_clk) |
| 561 | _REGISTER_CLOCK(NULL, "ssi", ssi1_clk) | 561 | _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk) |
| 562 | _REGISTER_CLOCK(NULL, "ssi", ssi2_clk) | 562 | _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk) |
| 563 | _REGISTER_CLOCK(NULL, "firi", firi_clk) | 563 | _REGISTER_CLOCK(NULL, "firi", firi_clk) |
| 564 | _REGISTER_CLOCK(NULL, "ata", ata_clk) | 564 | _REGISTER_CLOCK(NULL, "ata", ata_clk) |
| 565 | _REGISTER_CLOCK(NULL, "rtic", rtic_clk) | 565 | _REGISTER_CLOCK(NULL, "rtic", rtic_clk) |
| @@ -616,6 +616,8 @@ int __init mx31_clocks_init(unsigned long fref) | |||
| 616 | 616 | ||
| 617 | clk_enable(&serial_pll_clk); | 617 | clk_enable(&serial_pll_clk); |
| 618 | 618 | ||
| 619 | mx31_read_cpu_rev(); | ||
| 620 | |||
| 619 | if (mx31_revision() >= CHIP_REV_2_0) { | 621 | if (mx31_revision() >= CHIP_REV_2_0) { |
| 620 | reg = __raw_readl(MXC_CCM_PMCR1); | 622 | reg = __raw_readl(MXC_CCM_PMCR1); |
| 621 | /* No PLL restart on DVFS switch; enable auto EMI handshake */ | 623 | /* No PLL restart on DVFS switch; enable auto EMI handshake */ |
diff --git a/arch/arm/mach-mx3/cpu.c b/arch/arm/mach-mx3/cpu.c new file mode 100644 index 00000000000..db828809c67 --- /dev/null +++ b/arch/arm/mach-mx3/cpu.c | |||
| @@ -0,0 +1,57 @@ | |||
| 1 | /* | ||
| 2 | * MX3 CPU type detection | ||
| 3 | * | ||
| 4 | * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License as published by | ||
| 8 | * the Free Software Foundation; either version 2 of the License, or | ||
| 9 | * (at your option) any later version. | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <linux/module.h> | ||
| 13 | #include <linux/io.h> | ||
| 14 | #include <mach/hardware.h> | ||
| 15 | #include <mach/iim.h> | ||
| 16 | |||
| 17 | unsigned int mx31_cpu_rev; | ||
| 18 | EXPORT_SYMBOL(mx31_cpu_rev); | ||
| 19 | |||
| 20 | struct mx3_cpu_type { | ||
| 21 | u8 srev; | ||
| 22 | const char *name; | ||
| 23 | const char *v; | ||
| 24 | unsigned int rev; | ||
| 25 | }; | ||
| 26 | |||
| 27 | static struct mx3_cpu_type mx31_cpu_type[] __initdata = { | ||
| 28 | { .srev = 0x00, .name = "i.MX31(L)", .v = "1.0", .rev = CHIP_REV_1_0 }, | ||
| 29 | { .srev = 0x10, .name = "i.MX31", .v = "1.1", .rev = CHIP_REV_1_1 }, | ||
| 30 | { .srev = 0x11, .name = "i.MX31L", .v = "1.1", .rev = CHIP_REV_1_1 }, | ||
| 31 | { .srev = 0x12, .name = "i.MX31", .v = "1.15", .rev = CHIP_REV_1_1 }, | ||
| 32 | { .srev = 0x13, .name = "i.MX31L", .v = "1.15", .rev = CHIP_REV_1_1 }, | ||
| 33 | { .srev = 0x14, .name = "i.MX31", .v = "1.2", .rev = CHIP_REV_1_2 }, | ||
| 34 | { .srev = 0x15, .name = "i.MX31L", .v = "1.2", .rev = CHIP_REV_1_2 }, | ||
| 35 | { .srev = 0x28, .name = "i.MX31", .v = "2.0", .rev = CHIP_REV_2_0 }, | ||
| 36 | { .srev = 0x29, .name = "i.MX31L", .v = "2.0", .rev = CHIP_REV_2_0 }, | ||
| 37 | }; | ||
| 38 | |||
| 39 | void __init mx31_read_cpu_rev(void) | ||
| 40 | { | ||
| 41 | u32 i, srev; | ||
| 42 | |||
| 43 | /* read SREV register from IIM module */ | ||
| 44 | srev = __raw_readl(IO_ADDRESS(IIM_BASE_ADDR) + MXC_IIMSREV); | ||
| 45 | |||
| 46 | for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++) | ||
| 47 | if (srev == mx31_cpu_type[i].srev) { | ||
| 48 | printk(KERN_INFO | ||
| 49 | "CPU identified as %s, silicon rev %s\n", | ||
| 50 | mx31_cpu_type[i].name, mx31_cpu_type[i].v); | ||
| 51 | |||
| 52 | mx31_cpu_rev = mx31_cpu_type[i].rev; | ||
| 53 | return; | ||
| 54 | } | ||
| 55 | |||
| 56 | printk(KERN_WARNING "Unknown CPU identifier. srev = %02x\n", srev); | ||
| 57 | } | ||
diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c index e6abe181b96..6adb586515e 100644 --- a/arch/arm/mach-mx3/devices.c +++ b/arch/arm/mach-mx3/devices.c | |||
| @@ -537,6 +537,44 @@ struct platform_device mxc_fec_device = { | |||
| 537 | }; | 537 | }; |
| 538 | #endif | 538 | #endif |
| 539 | 539 | ||
| 540 | static struct resource imx_ssi_resources0[] = { | ||
| 541 | { | ||
| 542 | .start = SSI1_BASE_ADDR, | ||
| 543 | .end = SSI1_BASE_ADDR + 0xfff, | ||
| 544 | .flags = IORESOURCE_MEM, | ||
| 545 | }, { | ||
| 546 | .start = MX31_INT_SSI1, | ||
| 547 | .end = MX31_INT_SSI1, | ||
| 548 | .flags = IORESOURCE_IRQ, | ||
| 549 | }, | ||
| 550 | }; | ||
| 551 | |||
| 552 | static struct resource imx_ssi_resources1[] = { | ||
| 553 | { | ||
| 554 | .start = SSI2_BASE_ADDR, | ||
| 555 | .end = SSI2_BASE_ADDR + 0xfff, | ||
| 556 | .flags = IORESOURCE_MEM | ||
| 557 | }, { | ||
| 558 | .start = MX31_INT_SSI2, | ||
| 559 | .end = MX31_INT_SSI2, | ||
| 560 | .flags = IORESOURCE_IRQ, | ||
| 561 | }, | ||
| 562 | }; | ||
| 563 | |||
| 564 | struct platform_device imx_ssi_device0 = { | ||
| 565 | .name = "imx-ssi", | ||
| 566 | .id = 0, | ||
| 567 | .num_resources = ARRAY_SIZE(imx_ssi_resources0), | ||
| 568 | .resource = imx_ssi_resources0, | ||
| 569 | }; | ||
| 570 | |||
| 571 | struct platform_device imx_ssi_device1 = { | ||
| 572 | .name = "imx-ssi", | ||
| 573 | .id = 1, | ||
| 574 | .num_resources = ARRAY_SIZE(imx_ssi_resources1), | ||
| 575 | .resource = imx_ssi_resources1, | ||
| 576 | }; | ||
| 577 | |||
| 540 | static int mx3_devices_init(void) | 578 | static int mx3_devices_init(void) |
| 541 | { | 579 | { |
| 542 | if (cpu_is_mx31()) { | 580 | if (cpu_is_mx31()) { |
| @@ -546,7 +584,7 @@ static int mx3_devices_init(void) | |||
| 546 | } | 584 | } |
| 547 | if (cpu_is_mx35()) { | 585 | if (cpu_is_mx35()) { |
| 548 | mxc_nand_resources[0].start = MX35_NFC_BASE_ADDR; | 586 | mxc_nand_resources[0].start = MX35_NFC_BASE_ADDR; |
| 549 | mxc_nand_resources[0].end = MX35_NFC_BASE_ADDR + 0xfff; | 587 | mxc_nand_resources[0].end = MX35_NFC_BASE_ADDR + 0x1fff; |
| 550 | otg_resources[0].start = MX35_OTG_BASE_ADDR; | 588 | otg_resources[0].start = MX35_OTG_BASE_ADDR; |
| 551 | otg_resources[0].end = MX35_OTG_BASE_ADDR + 0x1ff; | 589 | otg_resources[0].end = MX35_OTG_BASE_ADDR + 0x1ff; |
| 552 | otg_resources[1].start = MXC_INT_USBOTG; | 590 | otg_resources[1].start = MXC_INT_USBOTG; |
| @@ -555,6 +593,10 @@ static int mx3_devices_init(void) | |||
| 555 | mxc_usbh1_resources[0].end = MX35_OTG_BASE_ADDR + 0x5ff; | 593 | mxc_usbh1_resources[0].end = MX35_OTG_BASE_ADDR + 0x5ff; |
| 556 | mxc_usbh1_resources[1].start = MXC_INT_USBHS; | 594 | mxc_usbh1_resources[1].start = MXC_INT_USBHS; |
| 557 | mxc_usbh1_resources[1].end = MXC_INT_USBHS; | 595 | mxc_usbh1_resources[1].end = MXC_INT_USBHS; |
| 596 | imx_ssi_resources0[1].start = MX35_INT_SSI1; | ||
| 597 | imx_ssi_resources0[1].end = MX35_INT_SSI1; | ||
| 598 | imx_ssi_resources1[1].start = MX35_INT_SSI2; | ||
| 599 | imx_ssi_resources1[1].end = MX35_INT_SSI2; | ||
| 558 | } | 600 | } |
| 559 | 601 | ||
| 560 | return 0; | 602 | return 0; |
diff --git a/arch/arm/mach-mx3/devices.h b/arch/arm/mach-mx3/devices.h index ab87419dc9a..42cf175eac6 100644 --- a/arch/arm/mach-mx3/devices.h +++ b/arch/arm/mach-mx3/devices.h | |||
| @@ -23,4 +23,6 @@ extern struct platform_device mxc_rnga_device; | |||
| 23 | extern struct platform_device mxc_spi_device0; | 23 | extern struct platform_device mxc_spi_device0; |
| 24 | extern struct platform_device mxc_spi_device1; | 24 | extern struct platform_device mxc_spi_device1; |
| 25 | extern struct platform_device mxc_spi_device2; | 25 | extern struct platform_device mxc_spi_device2; |
| 26 | extern struct platform_device imx_ssi_device0; | ||
| 27 | extern struct platform_device imx_ssi_device1; | ||
| 26 | 28 | ||
diff --git a/arch/arm/mach-mx3/kzmarm11.c b/arch/arm/mach-mx3/kzmarm11.c new file mode 100644 index 00000000000..6fa99ce3008 --- /dev/null +++ b/arch/arm/mach-mx3/kzmarm11.c | |||
| @@ -0,0 +1,268 @@ | |||
| 1 | /* | ||
| 2 | * KZM-ARM11-01 support | ||
| 3 | * Copyright (C) 2009 Yoichi Yuasa <yuasa@linux-mips.org> | ||
| 4 | * | ||
| 5 | * based on code for MX31ADS, | ||
| 6 | * Copyright (C) 2000 Deep Blue Solutions Ltd | ||
| 7 | * Copyright (C) 2002 Shane Nay (shane@minirl.com) | ||
| 8 | * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation; either version 2 of the License, or | ||
| 13 | * (at your option) any later version. | ||
| 14 | * | ||
| 15 | * This program is distributed in the hope that it will be useful, | ||
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 18 | * GNU General Public License for more details. | ||
| 19 | * | ||
| 20 | * You should have received a copy of the GNU General Public License | ||
| 21 | * along with this program; if not, write to the Free Software | ||
| 22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 23 | */ | ||
| 24 | |||
| 25 | #include <linux/gpio.h> | ||
| 26 | #include <linux/init.h> | ||
| 27 | #include <linux/platform_device.h> | ||
| 28 | #include <linux/serial_8250.h> | ||
| 29 | #include <linux/smsc911x.h> | ||
| 30 | #include <linux/types.h> | ||
| 31 | |||
| 32 | #include <asm/irq.h> | ||
| 33 | #include <asm/mach-types.h> | ||
| 34 | #include <asm/setup.h> | ||
| 35 | #include <asm/mach/arch.h> | ||
| 36 | #include <asm/mach/irq.h> | ||
| 37 | #include <asm/mach/map.h> | ||
| 38 | #include <asm/mach/time.h> | ||
| 39 | |||
| 40 | #include <mach/board-kzmarm11.h> | ||
| 41 | #include <mach/clock.h> | ||
| 42 | #include <mach/common.h> | ||
| 43 | #include <mach/imx-uart.h> | ||
| 44 | #include <mach/iomux-mx3.h> | ||
| 45 | #include <mach/memory.h> | ||
| 46 | |||
| 47 | #include "devices.h" | ||
| 48 | |||
| 49 | #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) | ||
| 50 | /* | ||
| 51 | * KZM-ARM11-01 has an external UART on FPGA | ||
| 52 | */ | ||
| 53 | static struct plat_serial8250_port serial_platform_data[] = { | ||
| 54 | { | ||
| 55 | .membase = IO_ADDRESS(KZM_ARM11_16550), | ||
| 56 | .mapbase = KZM_ARM11_16550, | ||
| 57 | .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_1), | ||
| 58 | .irqflags = IRQ_TYPE_EDGE_RISING, | ||
| 59 | .uartclk = 14745600, | ||
| 60 | .regshift = 0, | ||
| 61 | .iotype = UPIO_MEM, | ||
| 62 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | | ||
| 63 | UPF_BUGGY_UART, | ||
| 64 | }, | ||
| 65 | {}, | ||
| 66 | }; | ||
| 67 | |||
| 68 | static struct resource serial8250_resources[] = { | ||
| 69 | { | ||
| 70 | .start = KZM_ARM11_16550, | ||
| 71 | .end = KZM_ARM11_16550 + 0x10, | ||
| 72 | .flags = IORESOURCE_MEM, | ||
| 73 | }, | ||
| 74 | { | ||
| 75 | .start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_1), | ||
| 76 | .end = IOMUX_TO_IRQ(MX31_PIN_GPIO1_1), | ||
| 77 | .flags = IORESOURCE_IRQ, | ||
| 78 | }, | ||
| 79 | }; | ||
| 80 | |||
| 81 | static struct platform_device serial_device = { | ||
| 82 | .name = "serial8250", | ||
| 83 | .id = PLAT8250_DEV_PLATFORM, | ||
| 84 | .dev = { | ||
| 85 | .platform_data = serial_platform_data, | ||
| 86 | }, | ||
| 87 | .num_resources = ARRAY_SIZE(serial8250_resources), | ||
| 88 | .resource = serial8250_resources, | ||
| 89 | }; | ||
| 90 | |||
| 91 | static int __init kzm_init_ext_uart(void) | ||
| 92 | { | ||
| 93 | u8 tmp; | ||
| 94 | |||
| 95 | /* | ||
| 96 | * GPIO 1-1: external UART interrupt line | ||
| 97 | */ | ||
| 98 | mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO)); | ||
| 99 | gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1), "ext-uart-int"); | ||
| 100 | gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1)); | ||
| 101 | |||
| 102 | /* | ||
| 103 | * Unmask UART interrupt | ||
| 104 | */ | ||
| 105 | tmp = __raw_readb(IO_ADDRESS(KZM_ARM11_CTL1)); | ||
| 106 | tmp |= 0x2; | ||
| 107 | __raw_writeb(tmp, IO_ADDRESS(KZM_ARM11_CTL1)); | ||
| 108 | |||
| 109 | return platform_device_register(&serial_device); | ||
| 110 | } | ||
| 111 | #else | ||
| 112 | static inline int kzm_init_ext_uart(void) | ||
| 113 | { | ||
| 114 | return 0; | ||
| 115 | } | ||
| 116 | #endif | ||
| 117 | |||
| 118 | /* | ||
| 119 | * SMSC LAN9118 | ||
| 120 | */ | ||
| 121 | #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) | ||
| 122 | static struct smsc911x_platform_config kzm_smsc9118_config = { | ||
| 123 | .phy_interface = PHY_INTERFACE_MODE_MII, | ||
| 124 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH, | ||
| 125 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, | ||
| 126 | .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS, | ||
| 127 | }; | ||
| 128 | |||
| 129 | static struct resource kzm_smsc9118_resources[] = { | ||
| 130 | { | ||
| 131 | .start = CS5_BASE_ADDR, | ||
| 132 | .end = CS5_BASE_ADDR + SZ_128K - 1, | ||
| 133 | .flags = IORESOURCE_MEM, | ||
| 134 | }, | ||
| 135 | { | ||
| 136 | .start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_2), | ||
| 137 | .end = IOMUX_TO_IRQ(MX31_PIN_GPIO1_2), | ||
| 138 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | ||
| 139 | }, | ||
| 140 | }; | ||
| 141 | |||
| 142 | static struct platform_device kzm_smsc9118_device = { | ||
| 143 | .name = "smsc911x", | ||
| 144 | .id = -1, | ||
| 145 | .num_resources = ARRAY_SIZE(kzm_smsc9118_resources), | ||
| 146 | .resource = kzm_smsc9118_resources, | ||
| 147 | .dev = { | ||
| 148 | .platform_data = &kzm_smsc9118_config, | ||
| 149 | }, | ||
| 150 | }; | ||
| 151 | |||
| 152 | static int __init kzm_init_smsc9118(void) | ||
| 153 | { | ||
| 154 | /* | ||
| 155 | * GPIO 1-2: SMSC9118 interrupt line | ||
| 156 | */ | ||
| 157 | mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO1_2, IOMUX_CONFIG_GPIO)); | ||
| 158 | gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2), "smsc9118-int"); | ||
| 159 | gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2)); | ||
| 160 | |||
| 161 | return platform_device_register(&kzm_smsc9118_device); | ||
| 162 | } | ||
| 163 | #else | ||
| 164 | static inline int kzm_init_smsc9118(void) | ||
| 165 | { | ||
| 166 | return 0; | ||
| 167 | } | ||
| 168 | #endif | ||
| 169 | |||
| 170 | #if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE) | ||
| 171 | static struct imxuart_platform_data uart_pdata = { | ||
| 172 | .flags = IMXUART_HAVE_RTSCTS, | ||
| 173 | }; | ||
| 174 | |||
| 175 | static void __init kzm_init_imx_uart(void) | ||
| 176 | { | ||
| 177 | mxc_register_device(&mxc_uart_device0, &uart_pdata); | ||
| 178 | |||
| 179 | mxc_register_device(&mxc_uart_device1, &uart_pdata); | ||
| 180 | } | ||
| 181 | #else | ||
| 182 | static inline void kzm_init_imx_uart(void) | ||
| 183 | { | ||
| 184 | } | ||
| 185 | #endif | ||
| 186 | |||
| 187 | static int kzm_pins[] __initdata = { | ||
| 188 | MX31_PIN_CTS1__CTS1, | ||
| 189 | MX31_PIN_RTS1__RTS1, | ||
| 190 | MX31_PIN_TXD1__TXD1, | ||
| 191 | MX31_PIN_RXD1__RXD1, | ||
| 192 | MX31_PIN_DCD_DCE1__DCD_DCE1, | ||
| 193 | MX31_PIN_RI_DCE1__RI_DCE1, | ||
| 194 | MX31_PIN_DSR_DCE1__DSR_DCE1, | ||
| 195 | MX31_PIN_DTR_DCE1__DTR_DCE1, | ||
| 196 | MX31_PIN_CTS2__CTS2, | ||
| 197 | MX31_PIN_RTS2__RTS2, | ||
| 198 | MX31_PIN_TXD2__TXD2, | ||
| 199 | MX31_PIN_RXD2__RXD2, | ||
| 200 | MX31_PIN_DCD_DTE1__DCD_DTE2, | ||
| 201 | MX31_PIN_RI_DTE1__RI_DTE2, | ||
| 202 | MX31_PIN_DSR_DTE1__DSR_DTE2, | ||
| 203 | MX31_PIN_DTR_DTE1__DTR_DTE2, | ||
| 204 | }; | ||
| 205 | |||
| 206 | /* | ||
| 207 | * Board specific initialization. | ||
| 208 | */ | ||
| 209 | static void __init kzm_board_init(void) | ||
| 210 | { | ||
| 211 | mxc_iomux_setup_multiple_pins(kzm_pins, | ||
| 212 | ARRAY_SIZE(kzm_pins), "kzm"); | ||
| 213 | kzm_init_ext_uart(); | ||
| 214 | kzm_init_smsc9118(); | ||
| 215 | kzm_init_imx_uart(); | ||
| 216 | |||
| 217 | pr_info("Clock input source is 26MHz\n"); | ||
| 218 | } | ||
| 219 | |||
| 220 | /* | ||
| 221 | * This structure defines static mappings for the kzm-arm11-01 board. | ||
| 222 | */ | ||
| 223 | static struct map_desc kzm_io_desc[] __initdata = { | ||
| 224 | { | ||
| 225 | .virtual = CS4_BASE_ADDR_VIRT, | ||
| 226 | .pfn = __phys_to_pfn(CS4_BASE_ADDR), | ||
| 227 | .length = CS4_SIZE, | ||
| 228 | .type = MT_DEVICE | ||
| 229 | }, | ||
| 230 | { | ||
| 231 | .virtual = CS5_BASE_ADDR_VIRT, | ||
| 232 | .pfn = __phys_to_pfn(CS5_BASE_ADDR), | ||
| 233 | .length = CS5_SIZE, | ||
| 234 | .type = MT_DEVICE | ||
| 235 | }, | ||
| 236 | }; | ||
| 237 | |||
| 238 | /* | ||
| 239 | * Set up static virtual mappings. | ||
| 240 | */ | ||
| 241 | static void __init kzm_map_io(void) | ||
| 242 | { | ||
| 243 | mx31_map_io(); | ||
| 244 | iotable_init(kzm_io_desc, ARRAY_SIZE(kzm_io_desc)); | ||
| 245 | } | ||
| 246 | |||
| 247 | static void __init kzm_timer_init(void) | ||
| 248 | { | ||
| 249 | mx31_clocks_init(26000000); | ||
| 250 | } | ||
| 251 | |||
| 252 | static struct sys_timer kzm_timer = { | ||
| 253 | .init = kzm_timer_init, | ||
| 254 | }; | ||
| 255 | |||
| 256 | /* | ||
| 257 | * The following uses standard kernel macros define in arch.h in order to | ||
| 258 | * initialize __mach_desc_KZM_ARM11_01 data structure. | ||
| 259 | */ | ||
| 260 | MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01") | ||
| 261 | .phys_io = AIPS1_BASE_ADDR, | ||
| 262 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, | ||
| 263 | .boot_params = PHYS_OFFSET + 0x100, | ||
| 264 | .map_io = kzm_map_io, | ||
| 265 | .init_irq = mx31_init_irq, | ||
| 266 | .init_machine = kzm_board_init, | ||
| 267 | .timer = &kzm_timer, | ||
| 268 | MACHINE_END | ||
diff --git a/arch/arm/mach-mx3/mx31lilly-db.c b/arch/arm/mach-mx3/mx31lilly-db.c index 3b3a78f49c2..7aebd74a12e 100644 --- a/arch/arm/mach-mx3/mx31lilly-db.c +++ b/arch/arm/mach-mx3/mx31lilly-db.c | |||
| @@ -109,6 +109,9 @@ static int mxc_mmc1_get_ro(struct device *dev) | |||
| 109 | 109 | ||
| 110 | static int gpio_det, gpio_wp; | 110 | static int gpio_det, gpio_wp; |
| 111 | 111 | ||
| 112 | #define MMC_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ | ||
| 113 | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) | ||
| 114 | |||
| 112 | static int mxc_mmc1_init(struct device *dev, | 115 | static int mxc_mmc1_init(struct device *dev, |
| 113 | irq_handler_t detect_irq, void *data) | 116 | irq_handler_t detect_irq, void *data) |
| 114 | { | 117 | { |
| @@ -117,6 +120,13 @@ static int mxc_mmc1_init(struct device *dev, | |||
| 117 | gpio_det = IOMUX_TO_GPIO(MX31_PIN_GPIO1_1); | 120 | gpio_det = IOMUX_TO_GPIO(MX31_PIN_GPIO1_1); |
| 118 | gpio_wp = IOMUX_TO_GPIO(MX31_PIN_LCS0); | 121 | gpio_wp = IOMUX_TO_GPIO(MX31_PIN_LCS0); |
| 119 | 122 | ||
| 123 | mxc_iomux_set_pad(MX31_PIN_SD1_DATA0, MMC_PAD_CFG); | ||
| 124 | mxc_iomux_set_pad(MX31_PIN_SD1_DATA1, MMC_PAD_CFG); | ||
| 125 | mxc_iomux_set_pad(MX31_PIN_SD1_DATA2, MMC_PAD_CFG); | ||
| 126 | mxc_iomux_set_pad(MX31_PIN_SD1_DATA3, MMC_PAD_CFG); | ||
| 127 | mxc_iomux_set_pad(MX31_PIN_SD1_CLK, MMC_PAD_CFG); | ||
| 128 | mxc_iomux_set_pad(MX31_PIN_SD1_CMD, MMC_PAD_CFG); | ||
| 129 | |||
| 120 | ret = gpio_request(gpio_det, "MMC detect"); | 130 | ret = gpio_request(gpio_det, "MMC detect"); |
| 121 | if (ret) | 131 | if (ret) |
| 122 | return ret; | 132 | return ret; |
diff --git a/arch/arm/mach-mx3/mx31lilly.c b/arch/arm/mach-mx3/mx31lilly.c index 423025150f6..9ce029f554b 100644 --- a/arch/arm/mach-mx3/mx31lilly.c +++ b/arch/arm/mach-mx3/mx31lilly.c | |||
| @@ -31,6 +31,8 @@ | |||
| 31 | #include <linux/interrupt.h> | 31 | #include <linux/interrupt.h> |
| 32 | #include <linux/smsc911x.h> | 32 | #include <linux/smsc911x.h> |
| 33 | #include <linux/mtd/physmap.h> | 33 | #include <linux/mtd/physmap.h> |
| 34 | #include <linux/spi/spi.h> | ||
| 35 | #include <linux/mfd/mc13783.h> | ||
| 34 | 36 | ||
| 35 | #include <asm/mach-types.h> | 37 | #include <asm/mach-types.h> |
| 36 | #include <asm/mach/arch.h> | 38 | #include <asm/mach/arch.h> |
| @@ -41,6 +43,7 @@ | |||
| 41 | #include <mach/common.h> | 43 | #include <mach/common.h> |
| 42 | #include <mach/iomux-mx3.h> | 44 | #include <mach/iomux-mx3.h> |
| 43 | #include <mach/board-mx31lilly.h> | 45 | #include <mach/board-mx31lilly.h> |
| 46 | #include <mach/spi.h> | ||
| 44 | 47 | ||
| 45 | #include "devices.h" | 48 | #include "devices.h" |
| 46 | 49 | ||
| @@ -108,7 +111,36 @@ static struct platform_device physmap_flash_device = { | |||
| 108 | static struct platform_device *devices[] __initdata = { | 111 | static struct platform_device *devices[] __initdata = { |
| 109 | &smsc91x_device, | 112 | &smsc91x_device, |
| 110 | &physmap_flash_device, | 113 | &physmap_flash_device, |
| 111 | &mxc_i2c_device1, | 114 | }; |
| 115 | |||
| 116 | /* SPI */ | ||
| 117 | |||
| 118 | static int spi_internal_chipselect[] = { | ||
| 119 | MXC_SPI_CS(0), | ||
| 120 | MXC_SPI_CS(1), | ||
| 121 | MXC_SPI_CS(2), | ||
| 122 | }; | ||
| 123 | |||
| 124 | static struct spi_imx_master spi0_pdata = { | ||
| 125 | .chipselect = spi_internal_chipselect, | ||
| 126 | .num_chipselect = ARRAY_SIZE(spi_internal_chipselect), | ||
| 127 | }; | ||
| 128 | |||
| 129 | static struct spi_imx_master spi1_pdata = { | ||
| 130 | .chipselect = spi_internal_chipselect, | ||
| 131 | .num_chipselect = ARRAY_SIZE(spi_internal_chipselect), | ||
| 132 | }; | ||
| 133 | |||
| 134 | static struct mc13783_platform_data mc13783_pdata __initdata = { | ||
| 135 | .flags = MC13783_USE_RTC | MC13783_USE_TOUCHSCREEN, | ||
| 136 | }; | ||
| 137 | |||
| 138 | static struct spi_board_info mc13783_dev __initdata = { | ||
| 139 | .modalias = "mc13783", | ||
| 140 | .max_speed_hz = 1000000, | ||
| 141 | .bus_num = 1, | ||
| 142 | .chip_select = 0, | ||
| 143 | .platform_data = &mc13783_pdata, | ||
| 112 | }; | 144 | }; |
| 113 | 145 | ||
| 114 | static int mx31lilly_baseboard; | 146 | static int mx31lilly_baseboard; |
| @@ -128,8 +160,27 @@ static void __init mx31lilly_board_init(void) | |||
| 128 | } | 160 | } |
| 129 | 161 | ||
| 130 | mxc_iomux_alloc_pin(MX31_PIN_CS4__CS4, "Ethernet CS"); | 162 | mxc_iomux_alloc_pin(MX31_PIN_CS4__CS4, "Ethernet CS"); |
| 131 | mxc_iomux_alloc_pin(MX31_PIN_CSPI2_MOSI__SCL, "I2C SCL"); | 163 | |
| 132 | mxc_iomux_alloc_pin(MX31_PIN_CSPI2_MISO__SDA, "I2C SDA"); | 164 | /* SPI */ |
| 165 | mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SCLK__SCLK, "SPI1_CLK"); | ||
| 166 | mxc_iomux_alloc_pin(MX31_PIN_CSPI1_MOSI__MOSI, "SPI1_TX"); | ||
| 167 | mxc_iomux_alloc_pin(MX31_PIN_CSPI1_MISO__MISO, "SPI1_RX"); | ||
| 168 | mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SPI_RDY__SPI_RDY, "SPI1_RDY"); | ||
| 169 | mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS0__SS0, "SPI1_SS0"); | ||
| 170 | mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS1__SS1, "SPI1_SS1"); | ||
| 171 | mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS2__SS2, "SPI1_SS2"); | ||
| 172 | |||
| 173 | mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SCLK__SCLK, "SPI2_CLK"); | ||
| 174 | mxc_iomux_alloc_pin(MX31_PIN_CSPI2_MOSI__MOSI, "SPI2_TX"); | ||
| 175 | mxc_iomux_alloc_pin(MX31_PIN_CSPI2_MISO__MISO, "SPI2_RX"); | ||
| 176 | mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SPI_RDY__SPI_RDY, "SPI2_RDY"); | ||
| 177 | mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS0__SS0, "SPI2_SS0"); | ||
| 178 | mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS1__SS1, "SPI2_SS1"); | ||
| 179 | mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS2__SS2, "SPI2_SS2"); | ||
| 180 | |||
| 181 | mxc_register_device(&mxc_spi_device0, &spi0_pdata); | ||
| 182 | mxc_register_device(&mxc_spi_device1, &spi1_pdata); | ||
| 183 | spi_register_board_info(&mc13783_dev, 1); | ||
| 133 | 184 | ||
| 134 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 185 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
| 135 | } | 186 | } |
diff --git a/arch/arm/mach-mx3/mx31lite-db.c b/arch/arm/mach-mx3/mx31lite-db.c new file mode 100644 index 00000000000..694611d6b05 --- /dev/null +++ b/arch/arm/mach-mx3/mx31lite-db.c | |||
| @@ -0,0 +1,198 @@ | |||
| 1 | /* | ||
| 2 | * LogicPD i.MX31 SOM-LV development board support | ||
| 3 | * | ||
| 4 | * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de> | ||
| 5 | * | ||
| 6 | * based on code for other MX31 boards, | ||
| 7 | * | ||
| 8 | * Copyright 2005-2007 Freescale Semiconductor | ||
| 9 | * Copyright (c) 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com> | ||
| 10 | * Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group | ||
| 11 | * | ||
| 12 | * This program is free software; you can redistribute it and/or modify | ||
| 13 | * it under the terms of the GNU General Public License as published by | ||
| 14 | * the Free Software Foundation; either version 2 of the License, or | ||
| 15 | * (at your option) any later version. | ||
| 16 | * | ||
| 17 | * This program is distributed in the hope that it will be useful, | ||
| 18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 20 | * GNU General Public License for more details. | ||
| 21 | * | ||
| 22 | * You should have received a copy of the GNU General Public License | ||
| 23 | * along with this program; if not, write to the Free Software | ||
| 24 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 25 | */ | ||
| 26 | |||
| 27 | #include <linux/kernel.h> | ||
| 28 | #include <linux/types.h> | ||
| 29 | #include <linux/init.h> | ||
| 30 | #include <linux/gpio.h> | ||
| 31 | #include <linux/platform_device.h> | ||
| 32 | #include <linux/leds.h> | ||
| 33 | #include <linux/platform_device.h> | ||
| 34 | |||
| 35 | #include <asm/mach-types.h> | ||
| 36 | #include <asm/mach/arch.h> | ||
| 37 | #include <asm/mach/map.h> | ||
| 38 | |||
| 39 | #include <mach/hardware.h> | ||
| 40 | #include <mach/common.h> | ||
| 41 | #include <mach/imx-uart.h> | ||
| 42 | #include <mach/iomux-mx3.h> | ||
| 43 | #include <mach/board-mx31lite.h> | ||
| 44 | #include <mach/mmc.h> | ||
| 45 | #include <mach/spi.h> | ||
| 46 | |||
| 47 | #include "devices.h" | ||
| 48 | |||
| 49 | /* | ||
| 50 | * This file contains board-specific initialization routines for the | ||
| 51 | * LogicPD i.MX31 SOM-LV development board, aka 'LiteKit'. | ||
| 52 | * If you design an own baseboard for the module, use this file as base | ||
| 53 | * for support code. | ||
| 54 | */ | ||
| 55 | |||
| 56 | static unsigned int litekit_db_board_pins[] __initdata = { | ||
| 57 | /* UART1 */ | ||
| 58 | MX31_PIN_CTS1__CTS1, | ||
| 59 | MX31_PIN_RTS1__RTS1, | ||
| 60 | MX31_PIN_TXD1__TXD1, | ||
| 61 | MX31_PIN_RXD1__RXD1, | ||
| 62 | /* SPI 0 */ | ||
| 63 | MX31_PIN_CSPI1_SCLK__SCLK, | ||
| 64 | MX31_PIN_CSPI1_MOSI__MOSI, | ||
| 65 | MX31_PIN_CSPI1_MISO__MISO, | ||
| 66 | MX31_PIN_CSPI1_SPI_RDY__SPI_RDY, | ||
| 67 | MX31_PIN_CSPI1_SS0__SS0, | ||
| 68 | MX31_PIN_CSPI1_SS1__SS1, | ||
| 69 | MX31_PIN_CSPI1_SS2__SS2, | ||
| 70 | }; | ||
| 71 | |||
| 72 | /* UART */ | ||
| 73 | static struct imxuart_platform_data uart_pdata __initdata = { | ||
| 74 | .flags = IMXUART_HAVE_RTSCTS, | ||
| 75 | }; | ||
| 76 | |||
| 77 | /* MMC */ | ||
| 78 | |||
| 79 | static int gpio_det, gpio_wp; | ||
| 80 | |||
| 81 | #define MMC_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ | ||
| 82 | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) | ||
| 83 | |||
| 84 | static int mxc_mmc1_get_ro(struct device *dev) | ||
| 85 | { | ||
| 86 | return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_LCS0)); | ||
| 87 | } | ||
| 88 | |||
| 89 | static int mxc_mmc1_init(struct device *dev, | ||
| 90 | irq_handler_t detect_irq, void *data) | ||
| 91 | { | ||
| 92 | int ret; | ||
| 93 | |||
| 94 | gpio_det = IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1); | ||
| 95 | gpio_wp = IOMUX_TO_GPIO(MX31_PIN_GPIO1_6); | ||
| 96 | |||
| 97 | mxc_iomux_set_pad(MX31_PIN_SD1_DATA0, MMC_PAD_CFG); | ||
| 98 | mxc_iomux_set_pad(MX31_PIN_SD1_DATA1, MMC_PAD_CFG); | ||
| 99 | mxc_iomux_set_pad(MX31_PIN_SD1_DATA2, MMC_PAD_CFG); | ||
| 100 | mxc_iomux_set_pad(MX31_PIN_SD1_DATA3, MMC_PAD_CFG); | ||
| 101 | mxc_iomux_set_pad(MX31_PIN_SD1_CLK, MMC_PAD_CFG); | ||
| 102 | mxc_iomux_set_pad(MX31_PIN_SD1_CMD, MMC_PAD_CFG); | ||
| 103 | |||
| 104 | ret = gpio_request(gpio_det, "MMC detect"); | ||
| 105 | if (ret) | ||
| 106 | return ret; | ||
| 107 | |||
| 108 | ret = gpio_request(gpio_wp, "MMC w/p"); | ||
| 109 | if (ret) | ||
| 110 | goto exit_free_det; | ||
| 111 | |||
| 112 | gpio_direction_input(gpio_det); | ||
| 113 | gpio_direction_input(gpio_wp); | ||
| 114 | |||
| 115 | ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_DCD_DCE1), detect_irq, | ||
| 116 | IRQF_DISABLED | IRQF_TRIGGER_FALLING, | ||
| 117 | "MMC detect", data); | ||
| 118 | if (ret) | ||
| 119 | goto exit_free_wp; | ||
| 120 | |||
| 121 | return 0; | ||
| 122 | |||
| 123 | exit_free_wp: | ||
| 124 | gpio_free(gpio_wp); | ||
| 125 | |||
| 126 | exit_free_det: | ||
| 127 | gpio_free(gpio_det); | ||
| 128 | |||
| 129 | return ret; | ||
| 130 | } | ||
| 131 | |||
| 132 | static void mxc_mmc1_exit(struct device *dev, void *data) | ||
| 133 | { | ||
| 134 | gpio_free(gpio_det); | ||
| 135 | gpio_free(gpio_wp); | ||
| 136 | free_irq(IOMUX_TO_IRQ(MX31_PIN_GPIO1_1), data); | ||
| 137 | } | ||
| 138 | |||
| 139 | static struct imxmmc_platform_data mmc_pdata = { | ||
| 140 | .get_ro = mxc_mmc1_get_ro, | ||
| 141 | .init = mxc_mmc1_init, | ||
| 142 | .exit = mxc_mmc1_exit, | ||
| 143 | }; | ||
| 144 | |||
| 145 | /* SPI */ | ||
| 146 | |||
| 147 | static int spi_internal_chipselect[] = { | ||
| 148 | MXC_SPI_CS(0), | ||
| 149 | MXC_SPI_CS(1), | ||
| 150 | MXC_SPI_CS(2), | ||
| 151 | }; | ||
| 152 | |||
| 153 | static struct spi_imx_master spi0_pdata = { | ||
| 154 | .chipselect = spi_internal_chipselect, | ||
| 155 | .num_chipselect = ARRAY_SIZE(spi_internal_chipselect), | ||
| 156 | }; | ||
| 157 | |||
| 158 | /* GPIO LEDs */ | ||
| 159 | |||
| 160 | static struct gpio_led litekit_leds[] = { | ||
| 161 | { | ||
| 162 | .name = "GPIO0", | ||
| 163 | .gpio = IOMUX_TO_GPIO(MX31_PIN_COMPARE), | ||
| 164 | .active_low = 1, | ||
| 165 | .default_state = LEDS_GPIO_DEFSTATE_OFF, | ||
| 166 | }, | ||
| 167 | { | ||
| 168 | .name = "GPIO1", | ||
| 169 | .gpio = IOMUX_TO_GPIO(MX31_PIN_CAPTURE), | ||
| 170 | .active_low = 1, | ||
| 171 | .default_state = LEDS_GPIO_DEFSTATE_OFF, | ||
| 172 | } | ||
| 173 | }; | ||
| 174 | |||
| 175 | static struct gpio_led_platform_data litekit_led_platform_data = { | ||
| 176 | .leds = litekit_leds, | ||
| 177 | .num_leds = ARRAY_SIZE(litekit_leds), | ||
| 178 | }; | ||
| 179 | |||
| 180 | static struct platform_device litekit_led_device = { | ||
| 181 | .name = "leds-gpio", | ||
| 182 | .id = -1, | ||
| 183 | .dev = { | ||
| 184 | .platform_data = &litekit_led_platform_data, | ||
| 185 | }, | ||
| 186 | }; | ||
| 187 | |||
| 188 | void __init mx31lite_db_init(void) | ||
| 189 | { | ||
| 190 | mxc_iomux_setup_multiple_pins(litekit_db_board_pins, | ||
| 191 | ARRAY_SIZE(litekit_db_board_pins), | ||
| 192 | "development board pins"); | ||
| 193 | mxc_register_device(&mxc_uart_device0, &uart_pdata); | ||
| 194 | mxc_register_device(&mxcsdhc_device0, &mmc_pdata); | ||
| 195 | mxc_register_device(&mxc_spi_device0, &spi0_pdata); | ||
| 196 | platform_device_register(&litekit_led_device); | ||
| 197 | } | ||
| 198 | |||
diff --git a/arch/arm/mach-mx3/mx31lite.c b/arch/arm/mach-mx3/mx31lite.c index a8d57decdfd..def6b673659 100644 --- a/arch/arm/mach-mx3/mx31lite.c +++ b/arch/arm/mach-mx3/mx31lite.c | |||
| @@ -2,6 +2,7 @@ | |||
| 2 | * Copyright (C) 2000 Deep Blue Solutions Ltd | 2 | * Copyright (C) 2000 Deep Blue Solutions Ltd |
| 3 | * Copyright (C) 2002 Shane Nay (shane@minirl.com) | 3 | * Copyright (C) 2002 Shane Nay (shane@minirl.com) |
| 4 | * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. | 4 | * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. |
| 5 | * Copyright (C) 2009 Daniel Mack <daniel@caiaq.de> | ||
| 5 | * | 6 | * |
| 6 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by | 8 | * it under the terms of the GNU General Public License as published by |
| @@ -25,38 +26,47 @@ | |||
| 25 | #include <linux/platform_device.h> | 26 | #include <linux/platform_device.h> |
| 26 | #include <linux/gpio.h> | 27 | #include <linux/gpio.h> |
| 27 | #include <linux/smsc911x.h> | 28 | #include <linux/smsc911x.h> |
| 29 | #include <linux/mfd/mc13783.h> | ||
| 30 | #include <linux/spi/spi.h> | ||
| 31 | #include <linux/usb/otg.h> | ||
| 32 | #include <linux/usb/ulpi.h> | ||
| 33 | #include <linux/mtd/physmap.h> | ||
| 28 | 34 | ||
| 29 | #include <mach/hardware.h> | ||
| 30 | #include <asm/mach-types.h> | 35 | #include <asm/mach-types.h> |
| 31 | #include <asm/mach/arch.h> | 36 | #include <asm/mach/arch.h> |
| 32 | #include <asm/mach/time.h> | 37 | #include <asm/mach/time.h> |
| 33 | #include <asm/mach/map.h> | 38 | #include <asm/mach/map.h> |
| 34 | #include <mach/common.h> | ||
| 35 | #include <asm/page.h> | 39 | #include <asm/page.h> |
| 36 | #include <asm/setup.h> | 40 | #include <asm/setup.h> |
| 41 | |||
| 42 | #include <mach/hardware.h> | ||
| 43 | #include <mach/common.h> | ||
| 37 | #include <mach/board-mx31lite.h> | 44 | #include <mach/board-mx31lite.h> |
| 38 | #include <mach/imx-uart.h> | 45 | #include <mach/imx-uart.h> |
| 39 | #include <mach/iomux-mx3.h> | 46 | #include <mach/iomux-mx3.h> |
| 40 | #include <mach/irqs.h> | 47 | #include <mach/irqs.h> |
| 41 | #include <mach/mxc_nand.h> | 48 | #include <mach/mxc_nand.h> |
| 49 | #include <mach/spi.h> | ||
| 50 | #include <mach/mxc_ehci.h> | ||
| 51 | #include <mach/ulpi.h> | ||
| 52 | |||
| 42 | #include "devices.h" | 53 | #include "devices.h" |
| 43 | 54 | ||
| 44 | /* | 55 | /* |
| 45 | * This file contains the board-specific initialization routines. | 56 | * This file contains the module-specific initialization routines. |
| 46 | */ | 57 | */ |
| 47 | 58 | ||
| 48 | static unsigned int mx31lite_pins[] = { | 59 | static unsigned int mx31lite_pins[] = { |
| 49 | /* UART1 */ | ||
| 50 | MX31_PIN_CTS1__CTS1, | ||
| 51 | MX31_PIN_RTS1__RTS1, | ||
| 52 | MX31_PIN_TXD1__TXD1, | ||
| 53 | MX31_PIN_RXD1__RXD1, | ||
| 54 | /* LAN9117 IRQ pin */ | 60 | /* LAN9117 IRQ pin */ |
| 55 | IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO), | 61 | IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO), |
| 56 | }; | 62 | /* SPI 1 */ |
| 57 | 63 | MX31_PIN_CSPI2_SCLK__SCLK, | |
| 58 | static struct imxuart_platform_data uart_pdata = { | 64 | MX31_PIN_CSPI2_MOSI__MOSI, |
| 59 | .flags = IMXUART_HAVE_RTSCTS, | 65 | MX31_PIN_CSPI2_MISO__MISO, |
| 66 | MX31_PIN_CSPI2_SPI_RDY__SPI_RDY, | ||
| 67 | MX31_PIN_CSPI2_SS0__SS0, | ||
| 68 | MX31_PIN_CSPI2_SS1__SS1, | ||
| 69 | MX31_PIN_CSPI2_SS2__SS2, | ||
| 60 | }; | 70 | }; |
| 61 | 71 | ||
| 62 | static struct mxc_nand_platform_data mx31lite_nand_board_info = { | 72 | static struct mxc_nand_platform_data mx31lite_nand_board_info = { |
| @@ -93,6 +103,111 @@ static struct platform_device smsc911x_device = { | |||
| 93 | }; | 103 | }; |
| 94 | 104 | ||
| 95 | /* | 105 | /* |
| 106 | * SPI | ||
| 107 | * | ||
| 108 | * The MC13783 is the only hard-wired SPI device on the module. | ||
| 109 | */ | ||
| 110 | |||
| 111 | static int spi_internal_chipselect[] = { | ||
| 112 | MXC_SPI_CS(0), | ||
| 113 | }; | ||
| 114 | |||
| 115 | static struct spi_imx_master spi1_pdata = { | ||
| 116 | .chipselect = spi_internal_chipselect, | ||
| 117 | .num_chipselect = ARRAY_SIZE(spi_internal_chipselect), | ||
| 118 | }; | ||
| 119 | |||
| 120 | static struct mc13783_platform_data mc13783_pdata __initdata = { | ||
| 121 | .flags = MC13783_USE_RTC | | ||
| 122 | MC13783_USE_REGULATOR, | ||
| 123 | }; | ||
| 124 | |||
| 125 | static struct spi_board_info mc13783_spi_dev __initdata = { | ||
| 126 | .modalias = "mc13783", | ||
| 127 | .max_speed_hz = 1000000, | ||
| 128 | .bus_num = 1, | ||
| 129 | .chip_select = 0, | ||
| 130 | .platform_data = &mc13783_pdata, | ||
| 131 | .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3), | ||
| 132 | }; | ||
| 133 | |||
| 134 | /* | ||
| 135 | * USB | ||
| 136 | */ | ||
| 137 | |||
| 138 | #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ | ||
| 139 | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) | ||
| 140 | |||
| 141 | static int usbh2_init(struct platform_device *pdev) | ||
| 142 | { | ||
| 143 | int pins[] = { | ||
| 144 | MX31_PIN_USBH2_DATA0__USBH2_DATA0, | ||
| 145 | MX31_PIN_USBH2_DATA1__USBH2_DATA1, | ||
| 146 | MX31_PIN_USBH2_CLK__USBH2_CLK, | ||
| 147 | MX31_PIN_USBH2_DIR__USBH2_DIR, | ||
| 148 | MX31_PIN_USBH2_NXT__USBH2_NXT, | ||
| 149 | MX31_PIN_USBH2_STP__USBH2_STP, | ||
| 150 | }; | ||
| 151 | |||
| 152 | mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H2"); | ||
| 153 | |||
| 154 | mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG); | ||
| 155 | mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG); | ||
| 156 | mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG); | ||
| 157 | mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG); | ||
| 158 | mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG); | ||
| 159 | mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG); | ||
| 160 | mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG); | ||
| 161 | mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG); | ||
| 162 | mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG); | ||
| 163 | mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG); | ||
| 164 | mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG); | ||
| 165 | mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG); | ||
| 166 | |||
| 167 | mxc_iomux_set_gpr(MUX_PGP_UH2, true); | ||
| 168 | |||
| 169 | /* chip select */ | ||
| 170 | mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE1, IOMUX_CONFIG_GPIO), | ||
| 171 | "USBH2_CS"); | ||
| 172 | gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), "USBH2 CS"); | ||
| 173 | gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), 0); | ||
| 174 | |||
| 175 | return 0; | ||
| 176 | } | ||
| 177 | |||
| 178 | static struct mxc_usbh_platform_data usbh2_pdata = { | ||
| 179 | .init = usbh2_init, | ||
| 180 | .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, | ||
| 181 | .flags = MXC_EHCI_POWER_PINS_ENABLED, | ||
| 182 | }; | ||
| 183 | |||
| 184 | /* | ||
| 185 | * NOR flash | ||
| 186 | */ | ||
| 187 | |||
| 188 | static struct physmap_flash_data nor_flash_data = { | ||
| 189 | .width = 2, | ||
| 190 | }; | ||
| 191 | |||
| 192 | static struct resource nor_flash_resource = { | ||
| 193 | .start = 0xa0000000, | ||
| 194 | .end = 0xa1ffffff, | ||
| 195 | .flags = IORESOURCE_MEM, | ||
| 196 | }; | ||
| 197 | |||
| 198 | static struct platform_device physmap_flash_device = { | ||
| 199 | .name = "physmap-flash", | ||
| 200 | .id = 0, | ||
| 201 | .dev = { | ||
| 202 | .platform_data = &nor_flash_data, | ||
| 203 | }, | ||
| 204 | .resource = &nor_flash_resource, | ||
| 205 | .num_resources = 1, | ||
| 206 | }; | ||
| 207 | |||
| 208 | |||
| 209 | |||
| 210 | /* | ||
| 96 | * This structure defines the MX31 memory map. | 211 | * This structure defines the MX31 memory map. |
| 97 | */ | 212 | */ |
| 98 | static struct map_desc mx31lite_io_desc[] __initdata = { | 213 | static struct map_desc mx31lite_io_desc[] __initdata = { |
| @@ -118,19 +233,40 @@ void __init mx31lite_map_io(void) | |||
| 118 | iotable_init(mx31lite_io_desc, ARRAY_SIZE(mx31lite_io_desc)); | 233 | iotable_init(mx31lite_io_desc, ARRAY_SIZE(mx31lite_io_desc)); |
| 119 | } | 234 | } |
| 120 | 235 | ||
| 121 | /* | 236 | static int mx31lite_baseboard; |
| 122 | * Board specific initialization. | 237 | core_param(mx31lite_baseboard, mx31lite_baseboard, int, 0444); |
| 123 | */ | 238 | |
| 124 | static void __init mxc_board_init(void) | 239 | static void __init mxc_board_init(void) |
| 125 | { | 240 | { |
| 126 | int ret; | 241 | int ret; |
| 127 | 242 | ||
| 243 | switch (mx31lite_baseboard) { | ||
| 244 | case MX31LITE_NOBOARD: | ||
| 245 | break; | ||
| 246 | case MX31LITE_DB: | ||
| 247 | mx31lite_db_init(); | ||
| 248 | break; | ||
| 249 | default: | ||
| 250 | printk(KERN_ERR "Illegal mx31lite_baseboard type %d\n", | ||
| 251 | mx31lite_baseboard); | ||
| 252 | } | ||
| 253 | |||
| 128 | mxc_iomux_setup_multiple_pins(mx31lite_pins, ARRAY_SIZE(mx31lite_pins), | 254 | mxc_iomux_setup_multiple_pins(mx31lite_pins, ARRAY_SIZE(mx31lite_pins), |
| 129 | "mx31lite"); | 255 | "mx31lite"); |
| 130 | 256 | ||
| 131 | mxc_register_device(&mxc_uart_device0, &uart_pdata); | 257 | /* NOR and NAND flash */ |
| 258 | platform_device_register(&physmap_flash_device); | ||
| 132 | mxc_register_device(&mxc_nand_device, &mx31lite_nand_board_info); | 259 | mxc_register_device(&mxc_nand_device, &mx31lite_nand_board_info); |
| 133 | 260 | ||
| 261 | mxc_register_device(&mxc_spi_device1, &spi1_pdata); | ||
| 262 | spi_register_board_info(&mc13783_spi_dev, 1); | ||
| 263 | |||
| 264 | /* USB */ | ||
| 265 | usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, | ||
| 266 | USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); | ||
| 267 | |||
| 268 | mxc_register_device(&mxc_usbh2, &usbh2_pdata); | ||
| 269 | |||
| 134 | /* SMSC9117 IRQ pin */ | 270 | /* SMSC9117 IRQ pin */ |
| 135 | ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq"); | 271 | ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq"); |
| 136 | if (ret) | 272 | if (ret) |
| @@ -150,12 +286,7 @@ struct sys_timer mx31lite_timer = { | |||
| 150 | .init = mx31lite_timer_init, | 286 | .init = mx31lite_timer_init, |
| 151 | }; | 287 | }; |
| 152 | 288 | ||
| 153 | /* | 289 | MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM") |
| 154 | * The following uses standard kernel macros defined in arch.h in order to | ||
| 155 | * initialize __mach_desc_MX31LITE data structure. | ||
| 156 | */ | ||
| 157 | |||
| 158 | MACHINE_START(MX31LITE, "LogicPD MX31 LITEKIT") | ||
| 159 | /* Maintainer: Freescale Semiconductor, Inc. */ | 290 | /* Maintainer: Freescale Semiconductor, Inc. */ |
| 160 | .phys_io = AIPS1_BASE_ADDR, | 291 | .phys_io = AIPS1_BASE_ADDR, |
| 161 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, | 292 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, |
diff --git a/arch/arm/mach-mx3/mx31moboard-devboard.c b/arch/arm/mach-mx3/mx31moboard-devboard.c index 5592cdb8d0a..8fc624f141c 100644 --- a/arch/arm/mach-mx3/mx31moboard-devboard.c +++ b/arch/arm/mach-mx3/mx31moboard-devboard.c | |||
| @@ -22,11 +22,15 @@ | |||
| 22 | #include <linux/platform_device.h> | 22 | #include <linux/platform_device.h> |
| 23 | #include <linux/types.h> | 23 | #include <linux/types.h> |
| 24 | 24 | ||
| 25 | #include <linux/usb/otg.h> | ||
| 26 | |||
| 25 | #include <mach/common.h> | 27 | #include <mach/common.h> |
| 26 | #include <mach/imx-uart.h> | 28 | #include <mach/imx-uart.h> |
| 27 | #include <mach/iomux-mx3.h> | 29 | #include <mach/iomux-mx3.h> |
| 28 | #include <mach/hardware.h> | 30 | #include <mach/hardware.h> |
| 29 | #include <mach/mmc.h> | 31 | #include <mach/mmc.h> |
| 32 | #include <mach/mxc_ehci.h> | ||
| 33 | #include <mach/ulpi.h> | ||
| 30 | 34 | ||
| 31 | #include "devices.h" | 35 | #include "devices.h" |
| 32 | 36 | ||
| @@ -39,6 +43,12 @@ static unsigned int devboard_pins[] = { | |||
| 39 | MX31_PIN_PC_READY__SD2_DATA1, MX31_PIN_PC_WAIT_B__SD2_DATA0, | 43 | MX31_PIN_PC_READY__SD2_DATA1, MX31_PIN_PC_WAIT_B__SD2_DATA0, |
| 40 | MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD, | 44 | MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD, |
| 41 | MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29, | 45 | MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29, |
| 46 | /* USB H1 */ | ||
| 47 | MX31_PIN_CSPI1_MISO__USBH1_RXDP, MX31_PIN_CSPI1_MOSI__USBH1_RXDM, | ||
| 48 | MX31_PIN_CSPI1_SS0__USBH1_TXDM, MX31_PIN_CSPI1_SS1__USBH1_TXDP, | ||
| 49 | MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB, | ||
| 50 | MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND, | ||
| 51 | MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12, | ||
| 42 | }; | 52 | }; |
| 43 | 53 | ||
| 44 | static struct imxuart_platform_data uart_pdata = { | 54 | static struct imxuart_platform_data uart_pdata = { |
| @@ -98,6 +108,80 @@ static struct imxmmc_platform_data sdhc2_pdata = { | |||
| 98 | .exit = devboard_sdhc2_exit, | 108 | .exit = devboard_sdhc2_exit, |
| 99 | }; | 109 | }; |
| 100 | 110 | ||
| 111 | #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ | ||
| 112 | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) | ||
| 113 | |||
| 114 | static int devboard_usbh1_hw_init(struct platform_device *pdev) | ||
| 115 | { | ||
| 116 | mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true); | ||
| 117 | |||
| 118 | mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG); | ||
| 119 | mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG); | ||
| 120 | mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG); | ||
| 121 | mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG); | ||
| 122 | mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG); | ||
| 123 | mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG); | ||
| 124 | mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG); | ||
| 125 | mxc_iomux_set_pad(MX31_PIN_SFS6, USB_PAD_CFG); | ||
| 126 | |||
| 127 | return 0; | ||
| 128 | } | ||
| 129 | |||
| 130 | #define USBH1_VBUSEN_B IOMUX_TO_GPIO(MX31_PIN_NFRE_B) | ||
| 131 | #define USBH1_MODE IOMUX_TO_GPIO(MX31_PIN_NFALE) | ||
| 132 | |||
| 133 | static int devboard_isp1105_init(struct otg_transceiver *otg) | ||
| 134 | { | ||
| 135 | int ret = gpio_request(USBH1_MODE, "usbh1-mode"); | ||
| 136 | if (ret) | ||
| 137 | return ret; | ||
| 138 | /* single ended */ | ||
| 139 | gpio_direction_output(USBH1_MODE, 0); | ||
| 140 | |||
| 141 | ret = gpio_request(USBH1_VBUSEN_B, "usbh1-vbusen"); | ||
| 142 | if (ret) { | ||
| 143 | gpio_free(USBH1_MODE); | ||
| 144 | return ret; | ||
| 145 | } | ||
| 146 | gpio_direction_output(USBH1_VBUSEN_B, 1); | ||
| 147 | |||
| 148 | return 0; | ||
| 149 | } | ||
| 150 | |||
| 151 | |||
| 152 | static int devboard_isp1105_set_vbus(struct otg_transceiver *otg, bool on) | ||
| 153 | { | ||
| 154 | if (on) | ||
| 155 | gpio_set_value(USBH1_VBUSEN_B, 0); | ||
| 156 | else | ||
| 157 | gpio_set_value(USBH1_VBUSEN_B, 1); | ||
| 158 | |||
| 159 | return 0; | ||
| 160 | } | ||
| 161 | |||
| 162 | static struct mxc_usbh_platform_data usbh1_pdata = { | ||
| 163 | .init = devboard_usbh1_hw_init, | ||
| 164 | .portsc = MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL, | ||
| 165 | .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_SINGLE_UNI, | ||
| 166 | }; | ||
| 167 | |||
| 168 | static int __init devboard_usbh1_init(void) | ||
| 169 | { | ||
| 170 | struct otg_transceiver *otg; | ||
| 171 | |||
| 172 | otg = kzalloc(sizeof(*otg), GFP_KERNEL); | ||
| 173 | if (!otg) | ||
| 174 | return -ENOMEM; | ||
| 175 | |||
| 176 | otg->label = "ISP1105"; | ||
| 177 | otg->init = devboard_isp1105_init; | ||
| 178 | otg->set_vbus = devboard_isp1105_set_vbus; | ||
| 179 | |||
| 180 | usbh1_pdata.otg = otg; | ||
| 181 | |||
| 182 | return mxc_register_device(&mx31_usbh1, &usbh1_pdata); | ||
| 183 | } | ||
| 184 | |||
| 101 | /* | 185 | /* |
| 102 | * system init for baseboard usage. Will be called by mx31moboard init. | 186 | * system init for baseboard usage. Will be called by mx31moboard init. |
| 103 | */ | 187 | */ |
| @@ -111,4 +195,6 @@ void __init mx31moboard_devboard_init(void) | |||
| 111 | mxc_register_device(&mxc_uart_device1, &uart_pdata); | 195 | mxc_register_device(&mxc_uart_device1, &uart_pdata); |
| 112 | 196 | ||
| 113 | mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata); | 197 | mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata); |
| 198 | |||
| 199 | devboard_usbh1_init(); | ||
| 114 | } | 200 | } |
diff --git a/arch/arm/mach-mx3/mx31moboard-marxbot.c b/arch/arm/mach-mx3/mx31moboard-marxbot.c index 2bfaffb344f..85184a35e67 100644 --- a/arch/arm/mach-mx3/mx31moboard-marxbot.c +++ b/arch/arm/mach-mx3/mx31moboard-marxbot.c | |||
| @@ -16,17 +16,26 @@ | |||
| 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 17 | */ | 17 | */ |
| 18 | 18 | ||
| 19 | #include <linux/delay.h> | ||
| 19 | #include <linux/gpio.h> | 20 | #include <linux/gpio.h> |
| 20 | #include <linux/init.h> | 21 | #include <linux/init.h> |
| 21 | #include <linux/interrupt.h> | 22 | #include <linux/interrupt.h> |
| 23 | #include <linux/i2c.h> | ||
| 24 | #include <linux/spi/spi.h> | ||
| 22 | #include <linux/platform_device.h> | 25 | #include <linux/platform_device.h> |
| 23 | #include <linux/types.h> | 26 | #include <linux/types.h> |
| 24 | 27 | ||
| 28 | #include <linux/usb/otg.h> | ||
| 29 | |||
| 25 | #include <mach/common.h> | 30 | #include <mach/common.h> |
| 26 | #include <mach/hardware.h> | 31 | #include <mach/hardware.h> |
| 27 | #include <mach/imx-uart.h> | 32 | #include <mach/imx-uart.h> |
| 28 | #include <mach/iomux-mx3.h> | 33 | #include <mach/iomux-mx3.h> |
| 29 | #include <mach/mmc.h> | 34 | #include <mach/mmc.h> |
| 35 | #include <mach/mxc_ehci.h> | ||
| 36 | #include <mach/ulpi.h> | ||
| 37 | |||
| 38 | #include <media/soc_camera.h> | ||
| 30 | 39 | ||
| 31 | #include "devices.h" | 40 | #include "devices.h" |
| 32 | 41 | ||
| @@ -37,7 +46,6 @@ static unsigned int marxbot_pins[] = { | |||
| 37 | MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD, | 46 | MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD, |
| 38 | MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29, | 47 | MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29, |
| 39 | /* CSI */ | 48 | /* CSI */ |
| 40 | MX31_PIN_CSI_D4__CSI_D4, MX31_PIN_CSI_D5__CSI_D5, | ||
| 41 | MX31_PIN_CSI_D6__CSI_D6, MX31_PIN_CSI_D7__CSI_D7, | 49 | MX31_PIN_CSI_D6__CSI_D6, MX31_PIN_CSI_D7__CSI_D7, |
| 42 | MX31_PIN_CSI_D8__CSI_D8, MX31_PIN_CSI_D9__CSI_D9, | 50 | MX31_PIN_CSI_D8__CSI_D8, MX31_PIN_CSI_D9__CSI_D9, |
| 43 | MX31_PIN_CSI_D10__CSI_D10, MX31_PIN_CSI_D11__CSI_D11, | 51 | MX31_PIN_CSI_D10__CSI_D10, MX31_PIN_CSI_D11__CSI_D11, |
| @@ -45,10 +53,19 @@ static unsigned int marxbot_pins[] = { | |||
| 45 | MX31_PIN_CSI_D14__CSI_D14, MX31_PIN_CSI_D15__CSI_D15, | 53 | MX31_PIN_CSI_D14__CSI_D14, MX31_PIN_CSI_D15__CSI_D15, |
| 46 | MX31_PIN_CSI_HSYNC__CSI_HSYNC, MX31_PIN_CSI_MCLK__CSI_MCLK, | 54 | MX31_PIN_CSI_HSYNC__CSI_HSYNC, MX31_PIN_CSI_MCLK__CSI_MCLK, |
| 47 | MX31_PIN_CSI_PIXCLK__CSI_PIXCLK, MX31_PIN_CSI_VSYNC__CSI_VSYNC, | 55 | MX31_PIN_CSI_PIXCLK__CSI_PIXCLK, MX31_PIN_CSI_VSYNC__CSI_VSYNC, |
| 56 | MX31_PIN_CSI_D4__GPIO3_4, MX31_PIN_CSI_D5__GPIO3_5, | ||
| 48 | MX31_PIN_GPIO3_0__GPIO3_0, MX31_PIN_GPIO3_1__GPIO3_1, | 57 | MX31_PIN_GPIO3_0__GPIO3_0, MX31_PIN_GPIO3_1__GPIO3_1, |
| 49 | MX31_PIN_TXD2__GPIO1_28, | 58 | MX31_PIN_TXD2__GPIO1_28, |
| 50 | /* dsPIC resets */ | 59 | /* dsPIC resets */ |
| 51 | MX31_PIN_STXD5__GPIO1_21, MX31_PIN_SRXD5__GPIO1_22, | 60 | MX31_PIN_STXD5__GPIO1_21, MX31_PIN_SRXD5__GPIO1_22, |
| 61 | /*battery detection */ | ||
| 62 | MX31_PIN_LCS0__GPIO3_23, | ||
| 63 | /* USB H1 */ | ||
| 64 | MX31_PIN_CSPI1_MISO__USBH1_RXDP, MX31_PIN_CSPI1_MOSI__USBH1_RXDM, | ||
| 65 | MX31_PIN_CSPI1_SS0__USBH1_TXDM, MX31_PIN_CSPI1_SS1__USBH1_TXDP, | ||
| 66 | MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB, | ||
| 67 | MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND, | ||
| 68 | MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12, | ||
| 52 | }; | 69 | }; |
| 53 | 70 | ||
| 54 | #define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR) | 71 | #define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR) |
| @@ -120,6 +137,166 @@ static void dspics_resets_init(void) | |||
| 120 | } | 137 | } |
| 121 | } | 138 | } |
| 122 | 139 | ||
| 140 | static struct spi_board_info marxbot_spi_board_info[] __initdata = { | ||
| 141 | { | ||
| 142 | .modalias = "spidev", | ||
| 143 | .max_speed_hz = 300000, | ||
| 144 | .bus_num = 1, | ||
| 145 | .chip_select = 1, /* according spi1_cs[] ! */ | ||
| 146 | }, | ||
| 147 | }; | ||
| 148 | |||
| 149 | #define TURRETCAM_POWER IOMUX_TO_GPIO(MX31_PIN_GPIO3_1) | ||
| 150 | #define BASECAM_POWER IOMUX_TO_GPIO(MX31_PIN_CSI_D5) | ||
| 151 | #define TURRETCAM_RST_B IOMUX_TO_GPIO(MX31_PIN_GPIO3_0) | ||
| 152 | #define BASECAM_RST_B IOMUX_TO_GPIO(MX31_PIN_CSI_D4) | ||
| 153 | #define CAM_CHOICE IOMUX_TO_GPIO(MX31_PIN_TXD2) | ||
| 154 | |||
| 155 | static int marxbot_basecam_power(struct device *dev, int on) | ||
| 156 | { | ||
| 157 | gpio_set_value(BASECAM_POWER, !on); | ||
| 158 | return 0; | ||
| 159 | } | ||
| 160 | |||
| 161 | static int marxbot_basecam_reset(struct device *dev) | ||
| 162 | { | ||
| 163 | gpio_set_value(BASECAM_RST_B, 0); | ||
| 164 | udelay(100); | ||
| 165 | gpio_set_value(BASECAM_RST_B, 1); | ||
| 166 | return 0; | ||
| 167 | } | ||
| 168 | |||
| 169 | static struct i2c_board_info marxbot_i2c_devices[] = { | ||
| 170 | { | ||
| 171 | I2C_BOARD_INFO("mt9t031", 0x5d), | ||
| 172 | }, | ||
| 173 | }; | ||
| 174 | |||
| 175 | static struct soc_camera_link base_iclink = { | ||
| 176 | .bus_id = 0, /* Must match with the camera ID */ | ||
| 177 | .power = marxbot_basecam_power, | ||
| 178 | .reset = marxbot_basecam_reset, | ||
| 179 | .board_info = &marxbot_i2c_devices[0], | ||
| 180 | .i2c_adapter_id = 0, | ||
| 181 | .module_name = "mt9t031", | ||
| 182 | }; | ||
| 183 | |||
| 184 | static struct platform_device marxbot_camera[] = { | ||
| 185 | { | ||
| 186 | .name = "soc-camera-pdrv", | ||
| 187 | .id = 0, | ||
| 188 | .dev = { | ||
| 189 | .platform_data = &base_iclink, | ||
| 190 | }, | ||
| 191 | }, | ||
| 192 | }; | ||
| 193 | |||
| 194 | static struct platform_device *marxbot_cameras[] __initdata = { | ||
| 195 | &marxbot_camera[0], | ||
| 196 | }; | ||
| 197 | |||
| 198 | static int __init marxbot_cam_init(void) | ||
| 199 | { | ||
| 200 | int ret = gpio_request(CAM_CHOICE, "cam-choice"); | ||
| 201 | if (ret) | ||
| 202 | return ret; | ||
| 203 | gpio_direction_output(CAM_CHOICE, 1); | ||
| 204 | |||
| 205 | ret = gpio_request(BASECAM_RST_B, "basecam-reset"); | ||
| 206 | if (ret) | ||
| 207 | return ret; | ||
| 208 | gpio_direction_output(BASECAM_RST_B, 1); | ||
| 209 | ret = gpio_request(BASECAM_POWER, "basecam-standby"); | ||
| 210 | if (ret) | ||
| 211 | return ret; | ||
| 212 | gpio_direction_output(BASECAM_POWER, 0); | ||
| 213 | |||
| 214 | ret = gpio_request(TURRETCAM_RST_B, "turretcam-reset"); | ||
| 215 | if (ret) | ||
| 216 | return ret; | ||
| 217 | gpio_direction_output(TURRETCAM_RST_B, 1); | ||
| 218 | ret = gpio_request(TURRETCAM_POWER, "turretcam-standby"); | ||
| 219 | if (ret) | ||
| 220 | return ret; | ||
| 221 | gpio_direction_output(TURRETCAM_POWER, 0); | ||
| 222 | |||
| 223 | return 0; | ||
| 224 | } | ||
| 225 | |||
| 226 | #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ | ||
| 227 | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) | ||
| 228 | |||
| 229 | static int marxbot_usbh1_hw_init(struct platform_device *pdev) | ||
| 230 | { | ||
| 231 | mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true); | ||
| 232 | |||
| 233 | mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG); | ||
| 234 | mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG); | ||
| 235 | mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG); | ||
| 236 | mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG); | ||
| 237 | mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG); | ||
| 238 | mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG); | ||
| 239 | mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG); | ||
| 240 | mxc_iomux_set_pad(MX31_PIN_SFS6, USB_PAD_CFG); | ||
| 241 | |||
| 242 | return 0; | ||
| 243 | } | ||
| 244 | |||
| 245 | #define USBH1_VBUSEN_B IOMUX_TO_GPIO(MX31_PIN_NFRE_B) | ||
| 246 | #define USBH1_MODE IOMUX_TO_GPIO(MX31_PIN_NFALE) | ||
| 247 | |||
| 248 | static int marxbot_isp1105_init(struct otg_transceiver *otg) | ||
| 249 | { | ||
| 250 | int ret = gpio_request(USBH1_MODE, "usbh1-mode"); | ||
| 251 | if (ret) | ||
| 252 | return ret; | ||
| 253 | /* single ended */ | ||
| 254 | gpio_direction_output(USBH1_MODE, 0); | ||
| 255 | |||
| 256 | ret = gpio_request(USBH1_VBUSEN_B, "usbh1-vbusen"); | ||
| 257 | if (ret) { | ||
| 258 | gpio_free(USBH1_MODE); | ||
| 259 | return ret; | ||
| 260 | } | ||
| 261 | gpio_direction_output(USBH1_VBUSEN_B, 1); | ||
| 262 | |||
| 263 | return 0; | ||
| 264 | } | ||
| 265 | |||
| 266 | |||
| 267 | static int marxbot_isp1105_set_vbus(struct otg_transceiver *otg, bool on) | ||
| 268 | { | ||
| 269 | if (on) | ||
| 270 | gpio_set_value(USBH1_VBUSEN_B, 0); | ||
| 271 | else | ||
| 272 | gpio_set_value(USBH1_VBUSEN_B, 1); | ||
| 273 | |||
| 274 | return 0; | ||
| 275 | } | ||
| 276 | |||
| 277 | static struct mxc_usbh_platform_data usbh1_pdata = { | ||
| 278 | .init = marxbot_usbh1_hw_init, | ||
| 279 | .portsc = MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL, | ||
| 280 | .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_SINGLE_UNI, | ||
| 281 | }; | ||
| 282 | |||
| 283 | static int __init marxbot_usbh1_init(void) | ||
| 284 | { | ||
| 285 | struct otg_transceiver *otg; | ||
| 286 | |||
| 287 | otg = kzalloc(sizeof(*otg), GFP_KERNEL); | ||
| 288 | if (!otg) | ||
| 289 | return -ENOMEM; | ||
| 290 | |||
| 291 | otg->label = "ISP1105"; | ||
| 292 | otg->init = marxbot_isp1105_init; | ||
| 293 | otg->set_vbus = marxbot_isp1105_set_vbus; | ||
| 294 | |||
| 295 | usbh1_pdata.otg = otg; | ||
| 296 | |||
| 297 | return mxc_register_device(&mx31_usbh1, &usbh1_pdata); | ||
| 298 | } | ||
| 299 | |||
| 123 | /* | 300 | /* |
| 124 | * system init for baseboard usage. Will be called by mx31moboard init. | 301 | * system init for baseboard usage. Will be called by mx31moboard init. |
| 125 | */ | 302 | */ |
| @@ -133,4 +310,17 @@ void __init mx31moboard_marxbot_init(void) | |||
| 133 | dspics_resets_init(); | 310 | dspics_resets_init(); |
| 134 | 311 | ||
| 135 | mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata); | 312 | mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata); |
| 313 | |||
| 314 | spi_register_board_info(marxbot_spi_board_info, | ||
| 315 | ARRAY_SIZE(marxbot_spi_board_info)); | ||
| 316 | |||
| 317 | marxbot_cam_init(); | ||
| 318 | platform_add_devices(marxbot_cameras, ARRAY_SIZE(marxbot_cameras)); | ||
| 319 | |||
| 320 | /* battery present pin */ | ||
| 321 | gpio_request(IOMUX_TO_GPIO(MX31_PIN_LCS0), "bat-present"); | ||
| 322 | gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_LCS0)); | ||
| 323 | gpio_export(IOMUX_TO_GPIO(MX31_PIN_LCS0), false); | ||
| 324 | |||
| 325 | marxbot_usbh1_init(); | ||
| 136 | } | 326 | } |
diff --git a/arch/arm/mach-mx3/mx31moboard.c b/arch/arm/mach-mx3/mx31moboard.c index 9243de54041..b7052914593 100644 --- a/arch/arm/mach-mx3/mx31moboard.c +++ b/arch/arm/mach-mx3/mx31moboard.c | |||
| @@ -17,6 +17,7 @@ | |||
| 17 | */ | 17 | */ |
| 18 | 18 | ||
| 19 | #include <linux/delay.h> | 19 | #include <linux/delay.h> |
| 20 | #include <linux/dma-mapping.h> | ||
| 20 | #include <linux/fsl_devices.h> | 21 | #include <linux/fsl_devices.h> |
| 21 | #include <linux/gpio.h> | 22 | #include <linux/gpio.h> |
| 22 | #include <linux/init.h> | 23 | #include <linux/init.h> |
| @@ -26,8 +27,14 @@ | |||
| 26 | #include <linux/mtd/physmap.h> | 27 | #include <linux/mtd/physmap.h> |
| 27 | #include <linux/mtd/partitions.h> | 28 | #include <linux/mtd/partitions.h> |
| 28 | #include <linux/platform_device.h> | 29 | #include <linux/platform_device.h> |
| 30 | #include <linux/regulator/machine.h> | ||
| 31 | #include <linux/mfd/mc13783.h> | ||
| 32 | #include <linux/spi/spi.h> | ||
| 29 | #include <linux/types.h> | 33 | #include <linux/types.h> |
| 30 | 34 | ||
| 35 | #include <linux/usb/otg.h> | ||
| 36 | #include <linux/usb/ulpi.h> | ||
| 37 | |||
| 31 | #include <asm/mach-types.h> | 38 | #include <asm/mach-types.h> |
| 32 | #include <asm/mach/arch.h> | 39 | #include <asm/mach/arch.h> |
| 33 | #include <asm/mach/time.h> | 40 | #include <asm/mach/time.h> |
| @@ -37,16 +44,20 @@ | |||
| 37 | #include <mach/hardware.h> | 44 | #include <mach/hardware.h> |
| 38 | #include <mach/imx-uart.h> | 45 | #include <mach/imx-uart.h> |
| 39 | #include <mach/iomux-mx3.h> | 46 | #include <mach/iomux-mx3.h> |
| 47 | #include <mach/ipu.h> | ||
| 40 | #include <mach/i2c.h> | 48 | #include <mach/i2c.h> |
| 41 | #include <mach/mmc.h> | 49 | #include <mach/mmc.h> |
| 42 | #include <mach/mx31.h> | 50 | #include <mach/mxc_ehci.h> |
| 51 | #include <mach/mx3_camera.h> | ||
| 52 | #include <mach/spi.h> | ||
| 53 | #include <mach/ulpi.h> | ||
| 43 | 54 | ||
| 44 | #include "devices.h" | 55 | #include "devices.h" |
| 45 | 56 | ||
| 46 | static unsigned int moboard_pins[] = { | 57 | static unsigned int moboard_pins[] = { |
| 47 | /* UART0 */ | 58 | /* UART0 */ |
| 48 | MX31_PIN_CTS1__CTS1, MX31_PIN_RTS1__RTS1, | ||
| 49 | MX31_PIN_TXD1__TXD1, MX31_PIN_RXD1__RXD1, | 59 | MX31_PIN_TXD1__TXD1, MX31_PIN_RXD1__RXD1, |
| 60 | MX31_PIN_CTS1__GPIO2_7, | ||
| 50 | /* UART4 */ | 61 | /* UART4 */ |
| 51 | MX31_PIN_PC_RST__CTS5, MX31_PIN_PC_VS2__RTS5, | 62 | MX31_PIN_PC_RST__CTS5, MX31_PIN_PC_VS2__RTS5, |
| 52 | MX31_PIN_PC_BVD2__TXD5, MX31_PIN_PC_BVD1__RXD5, | 63 | MX31_PIN_PC_BVD2__TXD5, MX31_PIN_PC_BVD1__RXD5, |
| @@ -73,12 +84,31 @@ static unsigned int moboard_pins[] = { | |||
| 73 | MX31_PIN_USBOTG_CLK__USBOTG_CLK, MX31_PIN_USBOTG_DIR__USBOTG_DIR, | 84 | MX31_PIN_USBOTG_CLK__USBOTG_CLK, MX31_PIN_USBOTG_DIR__USBOTG_DIR, |
| 74 | MX31_PIN_USBOTG_NXT__USBOTG_NXT, MX31_PIN_USBOTG_STP__USBOTG_STP, | 85 | MX31_PIN_USBOTG_NXT__USBOTG_NXT, MX31_PIN_USBOTG_STP__USBOTG_STP, |
| 75 | MX31_PIN_USB_OC__GPIO1_30, | 86 | MX31_PIN_USB_OC__GPIO1_30, |
| 87 | /* USB H2 */ | ||
| 88 | MX31_PIN_USBH2_DATA0__USBH2_DATA0, | ||
| 89 | MX31_PIN_USBH2_DATA1__USBH2_DATA1, | ||
| 90 | MX31_PIN_STXD3__USBH2_DATA2, MX31_PIN_SRXD3__USBH2_DATA3, | ||
| 91 | MX31_PIN_SCK3__USBH2_DATA4, MX31_PIN_SFS3__USBH2_DATA5, | ||
| 92 | MX31_PIN_STXD6__USBH2_DATA6, MX31_PIN_SRXD6__USBH2_DATA7, | ||
| 93 | MX31_PIN_USBH2_CLK__USBH2_CLK, MX31_PIN_USBH2_DIR__USBH2_DIR, | ||
| 94 | MX31_PIN_USBH2_NXT__USBH2_NXT, MX31_PIN_USBH2_STP__USBH2_STP, | ||
| 95 | MX31_PIN_SCK6__GPIO1_25, | ||
| 76 | /* LEDs */ | 96 | /* LEDs */ |
| 77 | MX31_PIN_SVEN0__GPIO2_0, MX31_PIN_STX0__GPIO2_1, | 97 | MX31_PIN_SVEN0__GPIO2_0, MX31_PIN_STX0__GPIO2_1, |
| 78 | MX31_PIN_SRX0__GPIO2_2, MX31_PIN_SIMPD0__GPIO2_3, | 98 | MX31_PIN_SRX0__GPIO2_2, MX31_PIN_SIMPD0__GPIO2_3, |
| 79 | /* SEL */ | 99 | /* SEL */ |
| 80 | MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9, | 100 | MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9, |
| 81 | MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11, | 101 | MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11, |
| 102 | /* SPI1 */ | ||
| 103 | MX31_PIN_CSPI2_MOSI__MOSI, MX31_PIN_CSPI2_MISO__MISO, | ||
| 104 | MX31_PIN_CSPI2_SCLK__SCLK, MX31_PIN_CSPI2_SPI_RDY__SPI_RDY, | ||
| 105 | MX31_PIN_CSPI2_SS0__SS0, MX31_PIN_CSPI2_SS2__SS2, | ||
| 106 | /* Atlas IRQ */ | ||
| 107 | MX31_PIN_GPIO1_3__GPIO1_3, | ||
| 108 | /* SPI2 */ | ||
| 109 | MX31_PIN_CSPI3_MOSI__MOSI, MX31_PIN_CSPI3_MISO__MISO, | ||
| 110 | MX31_PIN_CSPI3_SCLK__SCLK, MX31_PIN_CSPI3_SPI_RDY__SPI_RDY, | ||
| 111 | MX31_PIN_CSPI2_SS1__CSPI3_SS1, | ||
| 82 | }; | 112 | }; |
| 83 | 113 | ||
| 84 | static struct physmap_flash_data mx31moboard_flash_data = { | 114 | static struct physmap_flash_data mx31moboard_flash_data = { |
| @@ -101,7 +131,18 @@ static struct platform_device mx31moboard_flash = { | |||
| 101 | .num_resources = 1, | 131 | .num_resources = 1, |
| 102 | }; | 132 | }; |
| 103 | 133 | ||
| 104 | static struct imxuart_platform_data uart_pdata = { | 134 | static int moboard_uart0_init(struct platform_device *pdev) |
| 135 | { | ||
| 136 | gpio_request(IOMUX_TO_GPIO(MX31_PIN_CTS1), "uart0-cts-hack"); | ||
| 137 | gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CTS1), 0); | ||
| 138 | return 0; | ||
| 139 | } | ||
| 140 | |||
| 141 | static struct imxuart_platform_data uart0_pdata = { | ||
| 142 | .init = moboard_uart0_init, | ||
| 143 | }; | ||
| 144 | |||
| 145 | static struct imxuart_platform_data uart4_pdata = { | ||
| 105 | .flags = IMXUART_HAVE_RTSCTS, | 146 | .flags = IMXUART_HAVE_RTSCTS, |
| 106 | }; | 147 | }; |
| 107 | 148 | ||
| @@ -113,6 +154,103 @@ static struct imxi2c_platform_data moboard_i2c1_pdata = { | |||
| 113 | .bitrate = 100000, | 154 | .bitrate = 100000, |
| 114 | }; | 155 | }; |
| 115 | 156 | ||
| 157 | static int moboard_spi1_cs[] = { | ||
| 158 | MXC_SPI_CS(0), | ||
| 159 | MXC_SPI_CS(2), | ||
| 160 | }; | ||
| 161 | |||
| 162 | static struct spi_imx_master moboard_spi1_master = { | ||
| 163 | .chipselect = moboard_spi1_cs, | ||
| 164 | .num_chipselect = ARRAY_SIZE(moboard_spi1_cs), | ||
| 165 | }; | ||
| 166 | |||
| 167 | static struct regulator_consumer_supply sdhc_consumers[] = { | ||
| 168 | { | ||
| 169 | .dev = &mxcsdhc_device0.dev, | ||
| 170 | .supply = "sdhc0_vcc", | ||
| 171 | }, | ||
| 172 | { | ||
| 173 | .dev = &mxcsdhc_device1.dev, | ||
| 174 | .supply = "sdhc1_vcc", | ||
| 175 | }, | ||
| 176 | }; | ||
| 177 | |||
| 178 | static struct regulator_init_data sdhc_vreg_data = { | ||
| 179 | .constraints = { | ||
| 180 | .min_uV = 2700000, | ||
| 181 | .max_uV = 3000000, | ||
| 182 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | ||
| 183 | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, | ||
| 184 | .valid_modes_mask = REGULATOR_MODE_NORMAL | | ||
| 185 | REGULATOR_MODE_FAST, | ||
| 186 | .always_on = 0, | ||
| 187 | .boot_on = 1, | ||
| 188 | }, | ||
| 189 | .num_consumer_supplies = ARRAY_SIZE(sdhc_consumers), | ||
| 190 | .consumer_supplies = sdhc_consumers, | ||
| 191 | }; | ||
| 192 | |||
| 193 | static struct regulator_consumer_supply cam_consumers[] = { | ||
| 194 | { | ||
| 195 | .dev = &mx3_camera.dev, | ||
| 196 | .supply = "cam_vcc", | ||
| 197 | }, | ||
| 198 | }; | ||
| 199 | |||
| 200 | static struct regulator_init_data cam_vreg_data = { | ||
| 201 | .constraints = { | ||
| 202 | .min_uV = 2700000, | ||
| 203 | .max_uV = 3000000, | ||
| 204 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | ||
| 205 | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, | ||
| 206 | .valid_modes_mask = REGULATOR_MODE_NORMAL | | ||
| 207 | REGULATOR_MODE_FAST, | ||
| 208 | .always_on = 0, | ||
| 209 | .boot_on = 1, | ||
| 210 | }, | ||
| 211 | .num_consumer_supplies = ARRAY_SIZE(cam_consumers), | ||
| 212 | .consumer_supplies = cam_consumers, | ||
| 213 | }; | ||
| 214 | |||
| 215 | static struct mc13783_regulator_init_data moboard_regulators[] = { | ||
| 216 | { | ||
| 217 | .id = MC13783_REGU_VMMC1, | ||
| 218 | .init_data = &sdhc_vreg_data, | ||
| 219 | }, | ||
| 220 | { | ||
| 221 | .id = MC13783_REGU_VCAM, | ||
| 222 | .init_data = &cam_vreg_data, | ||
| 223 | }, | ||
| 224 | }; | ||
| 225 | |||
| 226 | static struct mc13783_platform_data moboard_pmic = { | ||
| 227 | .regulators = moboard_regulators, | ||
| 228 | .num_regulators = ARRAY_SIZE(moboard_regulators), | ||
| 229 | .flags = MC13783_USE_REGULATOR | MC13783_USE_RTC | | ||
| 230 | MC13783_USE_ADC, | ||
| 231 | }; | ||
| 232 | |||
| 233 | static struct spi_board_info moboard_spi_board_info[] __initdata = { | ||
| 234 | { | ||
| 235 | .modalias = "mc13783", | ||
| 236 | .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3), | ||
| 237 | .max_speed_hz = 300000, | ||
| 238 | .bus_num = 1, | ||
| 239 | .chip_select = 0, | ||
| 240 | .platform_data = &moboard_pmic, | ||
| 241 | .mode = SPI_CS_HIGH, | ||
| 242 | }, | ||
| 243 | }; | ||
| 244 | |||
| 245 | static int moboard_spi2_cs[] = { | ||
| 246 | MXC_SPI_CS(1), | ||
| 247 | }; | ||
| 248 | |||
| 249 | static struct spi_imx_master moboard_spi2_master = { | ||
| 250 | .chipselect = moboard_spi2_cs, | ||
| 251 | .num_chipselect = ARRAY_SIZE(moboard_spi2_cs), | ||
| 252 | }; | ||
| 253 | |||
| 116 | #define SDHC1_CD IOMUX_TO_GPIO(MX31_PIN_ATA_CS0) | 254 | #define SDHC1_CD IOMUX_TO_GPIO(MX31_PIN_ATA_CS0) |
| 117 | #define SDHC1_WP IOMUX_TO_GPIO(MX31_PIN_ATA_CS1) | 255 | #define SDHC1_WP IOMUX_TO_GPIO(MX31_PIN_ATA_CS1) |
| 118 | 256 | ||
| @@ -208,6 +346,56 @@ static struct fsl_usb2_platform_data usb_pdata = { | |||
| 208 | .phy_mode = FSL_USB2_PHY_ULPI, | 346 | .phy_mode = FSL_USB2_PHY_ULPI, |
| 209 | }; | 347 | }; |
| 210 | 348 | ||
| 349 | #define USBH2_EN_B IOMUX_TO_GPIO(MX31_PIN_SCK6) | ||
| 350 | |||
| 351 | static int moboard_usbh2_hw_init(struct platform_device *pdev) | ||
| 352 | { | ||
| 353 | int ret = gpio_request(USBH2_EN_B, "usbh2-en"); | ||
| 354 | if (ret) | ||
| 355 | return ret; | ||
| 356 | |||
| 357 | mxc_iomux_set_gpr(MUX_PGP_UH2, true); | ||
| 358 | |||
| 359 | mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG); | ||
| 360 | mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG); | ||
| 361 | mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG); | ||
| 362 | mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG); | ||
| 363 | mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG); | ||
| 364 | mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG); | ||
| 365 | mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG); | ||
| 366 | mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG); | ||
| 367 | mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG); | ||
| 368 | mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG); | ||
| 369 | mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG); | ||
| 370 | mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG); | ||
| 371 | |||
| 372 | gpio_direction_output(USBH2_EN_B, 0); | ||
| 373 | |||
| 374 | return 0; | ||
| 375 | } | ||
| 376 | |||
| 377 | static int moboard_usbh2_hw_exit(struct platform_device *pdev) | ||
| 378 | { | ||
| 379 | gpio_free(USBH2_EN_B); | ||
| 380 | return 0; | ||
| 381 | } | ||
| 382 | |||
| 383 | static struct mxc_usbh_platform_data usbh2_pdata = { | ||
| 384 | .init = moboard_usbh2_hw_init, | ||
| 385 | .exit = moboard_usbh2_hw_exit, | ||
| 386 | .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, | ||
| 387 | .flags = MXC_EHCI_POWER_PINS_ENABLED, | ||
| 388 | }; | ||
| 389 | |||
| 390 | static int __init moboard_usbh2_init(void) | ||
| 391 | { | ||
| 392 | usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, | ||
| 393 | USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); | ||
| 394 | |||
| 395 | return mxc_register_device(&mx31_usbh2, &usbh2_pdata); | ||
| 396 | } | ||
| 397 | |||
| 398 | |||
| 211 | static struct gpio_led mx31moboard_leds[] = { | 399 | static struct gpio_led mx31moboard_leds[] = { |
| 212 | { | 400 | { |
| 213 | .name = "coreboard-led-0:red:running", | 401 | .name = "coreboard-led-0:red:running", |
| @@ -266,11 +454,48 @@ static void mx31moboard_init_sel_gpios(void) | |||
| 266 | } | 454 | } |
| 267 | } | 455 | } |
| 268 | 456 | ||
| 457 | static struct ipu_platform_data mx3_ipu_data = { | ||
| 458 | .irq_base = MXC_IPU_IRQ_START, | ||
| 459 | }; | ||
| 460 | |||
| 269 | static struct platform_device *devices[] __initdata = { | 461 | static struct platform_device *devices[] __initdata = { |
| 270 | &mx31moboard_flash, | 462 | &mx31moboard_flash, |
| 271 | &mx31moboard_leds_device, | 463 | &mx31moboard_leds_device, |
| 272 | }; | 464 | }; |
| 273 | 465 | ||
| 466 | static struct mx3_camera_pdata camera_pdata = { | ||
| 467 | .dma_dev = &mx3_ipu.dev, | ||
| 468 | .flags = MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10, | ||
| 469 | .mclk_10khz = 4800, | ||
| 470 | }; | ||
| 471 | |||
| 472 | #define CAMERA_BUF_SIZE (4*1024*1024) | ||
| 473 | |||
| 474 | static int __init mx31moboard_cam_alloc_dma(const size_t buf_size) | ||
| 475 | { | ||
| 476 | dma_addr_t dma_handle; | ||
| 477 | void *buf; | ||
| 478 | int dma; | ||
| 479 | |||
| 480 | if (buf_size < 2 * 1024 * 1024) | ||
| 481 | return -EINVAL; | ||
| 482 | |||
| 483 | buf = dma_alloc_coherent(NULL, buf_size, &dma_handle, GFP_KERNEL); | ||
| 484 | if (!buf) { | ||
| 485 | pr_err("%s: cannot allocate camera buffer-memory\n", __func__); | ||
| 486 | return -ENOMEM; | ||
| 487 | } | ||
| 488 | |||
| 489 | memset(buf, 0, buf_size); | ||
| 490 | |||
| 491 | dma = dma_declare_coherent_memory(&mx3_camera.dev, | ||
| 492 | dma_handle, dma_handle, buf_size, | ||
| 493 | DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE); | ||
| 494 | |||
| 495 | /* The way we call dma_declare_coherent_memory only a malloc can fail */ | ||
| 496 | return dma & DMA_MEMORY_MAP ? 0 : -ENOMEM; | ||
| 497 | } | ||
| 498 | |||
| 274 | static int mx31moboard_baseboard; | 499 | static int mx31moboard_baseboard; |
| 275 | core_param(mx31moboard_baseboard, mx31moboard_baseboard, int, 0444); | 500 | core_param(mx31moboard_baseboard, mx31moboard_baseboard, int, 0444); |
| 276 | 501 | ||
| @@ -284,20 +509,34 @@ static void __init mxc_board_init(void) | |||
| 284 | 509 | ||
| 285 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 510 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
| 286 | 511 | ||
| 287 | mxc_register_device(&mxc_uart_device0, &uart_pdata); | 512 | mxc_register_device(&mxc_uart_device0, &uart0_pdata); |
| 288 | mxc_register_device(&mxc_uart_device4, &uart_pdata); | 513 | |
| 514 | mxc_register_device(&mxc_uart_device4, &uart4_pdata); | ||
| 289 | 515 | ||
| 290 | mx31moboard_init_sel_gpios(); | 516 | mx31moboard_init_sel_gpios(); |
| 291 | 517 | ||
| 292 | mxc_register_device(&mxc_i2c_device0, &moboard_i2c0_pdata); | 518 | mxc_register_device(&mxc_i2c_device0, &moboard_i2c0_pdata); |
| 293 | mxc_register_device(&mxc_i2c_device1, &moboard_i2c1_pdata); | 519 | mxc_register_device(&mxc_i2c_device1, &moboard_i2c1_pdata); |
| 294 | 520 | ||
| 521 | mxc_register_device(&mxc_spi_device1, &moboard_spi1_master); | ||
| 522 | mxc_register_device(&mxc_spi_device2, &moboard_spi2_master); | ||
| 523 | |||
| 524 | gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3), "pmic-irq"); | ||
| 525 | gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)); | ||
| 526 | spi_register_board_info(moboard_spi_board_info, | ||
| 527 | ARRAY_SIZE(moboard_spi_board_info)); | ||
| 528 | |||
| 295 | mxc_register_device(&mxcsdhc_device0, &sdhc1_pdata); | 529 | mxc_register_device(&mxcsdhc_device0, &sdhc1_pdata); |
| 296 | 530 | ||
| 531 | mxc_register_device(&mx3_ipu, &mx3_ipu_data); | ||
| 532 | if (!mx31moboard_cam_alloc_dma(CAMERA_BUF_SIZE)) | ||
| 533 | mxc_register_device(&mx3_camera, &camera_pdata); | ||
| 534 | |||
| 297 | usb_xcvr_reset(); | 535 | usb_xcvr_reset(); |
| 298 | 536 | ||
| 299 | moboard_usbotg_init(); | 537 | moboard_usbotg_init(); |
| 300 | mxc_register_device(&mxc_otg_udc_device, &usb_pdata); | 538 | mxc_register_device(&mxc_otg_udc_device, &usb_pdata); |
| 539 | moboard_usbh2_init(); | ||
| 301 | 540 | ||
| 302 | switch (mx31moboard_baseboard) { | 541 | switch (mx31moboard_baseboard) { |
| 303 | case MX31NOBOARD: | 542 | case MX31NOBOARD: |
diff --git a/arch/arm/mach-mx3/mx35pdk.c b/arch/arm/mach-mx3/mx35pdk.c index 6ff186e46ce..0bbc65ea23c 100644 --- a/arch/arm/mach-mx3/mx35pdk.c +++ b/arch/arm/mach-mx3/mx35pdk.c | |||
| @@ -23,6 +23,7 @@ | |||
| 23 | #include <linux/platform_device.h> | 23 | #include <linux/platform_device.h> |
| 24 | #include <linux/memory.h> | 24 | #include <linux/memory.h> |
| 25 | #include <linux/gpio.h> | 25 | #include <linux/gpio.h> |
| 26 | #include <linux/fsl_devices.h> | ||
| 26 | 27 | ||
| 27 | #include <asm/mach-types.h> | 28 | #include <asm/mach-types.h> |
| 28 | #include <asm/mach/arch.h> | 29 | #include <asm/mach/arch.h> |
| @@ -69,6 +70,15 @@ static struct pad_desc mx35pdk_pads[] = { | |||
| 69 | MX35_PAD_FEC_TDATA2__FEC_TDATA_2, | 70 | MX35_PAD_FEC_TDATA2__FEC_TDATA_2, |
| 70 | MX35_PAD_FEC_RDATA3__FEC_RDATA_3, | 71 | MX35_PAD_FEC_RDATA3__FEC_RDATA_3, |
| 71 | MX35_PAD_FEC_TDATA3__FEC_TDATA_3, | 72 | MX35_PAD_FEC_TDATA3__FEC_TDATA_3, |
| 73 | /* USBOTG */ | ||
| 74 | MX35_PAD_USBOTG_PWR__USB_TOP_USBOTG_PWR, | ||
| 75 | MX35_PAD_USBOTG_OC__USB_TOP_USBOTG_OC, | ||
| 76 | }; | ||
| 77 | |||
| 78 | /* OTG config */ | ||
| 79 | static struct fsl_usb2_platform_data usb_pdata = { | ||
| 80 | .operating_mode = FSL_USB2_DR_DEVICE, | ||
| 81 | .phy_mode = FSL_USB2_PHY_UTMI_WIDE, | ||
| 72 | }; | 82 | }; |
| 73 | 83 | ||
| 74 | /* | 84 | /* |
| @@ -81,6 +91,8 @@ static void __init mxc_board_init(void) | |||
| 81 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 91 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
| 82 | 92 | ||
| 83 | mxc_register_device(&mxc_uart_device0, &uart_pdata); | 93 | mxc_register_device(&mxc_uart_device0, &uart_pdata); |
| 94 | |||
| 95 | mxc_register_device(&mxc_otg_udc_device, &usb_pdata); | ||
| 84 | } | 96 | } |
| 85 | 97 | ||
| 86 | static void __init mx35pdk_timer_init(void) | 98 | static void __init mx35pdk_timer_init(void) |
diff --git a/arch/arm/mach-mx3/pcm043.c b/arch/arm/mach-mx3/pcm043.c index e18a224671f..e3aa829be58 100644 --- a/arch/arm/mach-mx3/pcm043.c +++ b/arch/arm/mach-mx3/pcm043.c | |||
| @@ -43,6 +43,7 @@ | |||
| 43 | #include <mach/iomux-mx35.h> | 43 | #include <mach/iomux-mx35.h> |
| 44 | #include <mach/ipu.h> | 44 | #include <mach/ipu.h> |
| 45 | #include <mach/mx3fb.h> | 45 | #include <mach/mx3fb.h> |
| 46 | #include <mach/mxc_nand.h> | ||
| 46 | 47 | ||
| 47 | #include "devices.h" | 48 | #include "devices.h" |
| 48 | 49 | ||
| @@ -206,6 +207,11 @@ static struct pad_desc pcm043_pads[] = { | |||
| 206 | MX35_PAD_ATA_CS0__GPIO2_6, | 207 | MX35_PAD_ATA_CS0__GPIO2_6, |
| 207 | }; | 208 | }; |
| 208 | 209 | ||
| 210 | static struct mxc_nand_platform_data pcm037_nand_board_info = { | ||
| 211 | .width = 1, | ||
| 212 | .hw_ecc = 1, | ||
| 213 | }; | ||
| 214 | |||
| 209 | /* | 215 | /* |
| 210 | * Board specific initialization. | 216 | * Board specific initialization. |
| 211 | */ | 217 | */ |
| @@ -216,6 +222,7 @@ static void __init mxc_board_init(void) | |||
| 216 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 222 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
| 217 | 223 | ||
| 218 | mxc_register_device(&mxc_uart_device0, &uart_pdata); | 224 | mxc_register_device(&mxc_uart_device0, &uart_pdata); |
| 225 | mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info); | ||
| 219 | 226 | ||
| 220 | mxc_register_device(&mxc_uart_device1, &uart_pdata); | 227 | mxc_register_device(&mxc_uart_device1, &uart_pdata); |
| 221 | 228 | ||
diff --git a/arch/arm/mach-nomadik/Kconfig b/arch/arm/mach-nomadik/Kconfig index 2a02b49c40f..3c5e0f522e9 100644 --- a/arch/arm/mach-nomadik/Kconfig +++ b/arch/arm/mach-nomadik/Kconfig | |||
| @@ -5,13 +5,13 @@ menu "Nomadik boards" | |||
| 5 | config MACH_NOMADIK_8815NHK | 5 | config MACH_NOMADIK_8815NHK |
| 6 | bool "ST 8815 Nomadik Hardware Kit (evaluation board)" | 6 | bool "ST 8815 Nomadik Hardware Kit (evaluation board)" |
| 7 | select NOMADIK_8815 | 7 | select NOMADIK_8815 |
| 8 | select HAS_MTU | ||
| 8 | 9 | ||
| 9 | endmenu | 10 | endmenu |
| 10 | 11 | ||
| 11 | config NOMADIK_8815 | 12 | config NOMADIK_8815 |
| 12 | bool | 13 | bool |
| 13 | 14 | ||
| 14 | |||
| 15 | config I2C_BITBANG_8815NHK | 15 | config I2C_BITBANG_8815NHK |
| 16 | tristate "Driver for bit-bang busses found on the 8815 NHK" | 16 | tristate "Driver for bit-bang busses found on the 8815 NHK" |
| 17 | depends on I2C && MACH_NOMADIK_8815NHK | 17 | depends on I2C && MACH_NOMADIK_8815NHK |
diff --git a/arch/arm/mach-nomadik/Makefile b/arch/arm/mach-nomadik/Makefile index 412040982a4..36f67fb207d 100644 --- a/arch/arm/mach-nomadik/Makefile +++ b/arch/arm/mach-nomadik/Makefile | |||
| @@ -7,7 +7,7 @@ | |||
| 7 | 7 | ||
| 8 | # Object file lists. | 8 | # Object file lists. |
| 9 | 9 | ||
| 10 | obj-y += clock.o timer.o gpio.o | 10 | obj-y += clock.o gpio.o |
| 11 | 11 | ||
| 12 | # Cpu revision | 12 | # Cpu revision |
| 13 | obj-$(CONFIG_NOMADIK_8815) += cpu-8815.o | 13 | obj-$(CONFIG_NOMADIK_8815) += cpu-8815.o |
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c index 6bfd537d5af..116394484e7 100644 --- a/arch/arm/mach-nomadik/board-nhk8815.c +++ b/arch/arm/mach-nomadik/board-nhk8815.c | |||
| @@ -25,11 +25,18 @@ | |||
| 25 | #include <asm/mach/arch.h> | 25 | #include <asm/mach/arch.h> |
| 26 | #include <asm/mach/irq.h> | 26 | #include <asm/mach/irq.h> |
| 27 | #include <asm/mach/flash.h> | 27 | #include <asm/mach/flash.h> |
| 28 | |||
| 29 | #include <plat/mtu.h> | ||
| 30 | |||
| 28 | #include <mach/setup.h> | 31 | #include <mach/setup.h> |
| 29 | #include <mach/nand.h> | 32 | #include <mach/nand.h> |
| 30 | #include <mach/fsmc.h> | 33 | #include <mach/fsmc.h> |
| 31 | #include "clock.h" | 34 | #include "clock.h" |
| 32 | 35 | ||
| 36 | /* Initial value for SRC control register: all timers use MXTAL/8 source */ | ||
| 37 | #define SRC_CR_INIT_MASK 0x00007fff | ||
| 38 | #define SRC_CR_INIT_VAL 0x2aaa8000 | ||
| 39 | |||
| 33 | /* These adresses span 16MB, so use three individual pages */ | 40 | /* These adresses span 16MB, so use three individual pages */ |
| 34 | static struct resource nhk8815_nand_resources[] = { | 41 | static struct resource nhk8815_nand_resources[] = { |
| 35 | { | 42 | { |
| @@ -239,6 +246,26 @@ static struct platform_device *nhk8815_platform_devices[] __initdata = { | |||
| 239 | /* will add more devices */ | 246 | /* will add more devices */ |
| 240 | }; | 247 | }; |
| 241 | 248 | ||
| 249 | static void __init nomadik_timer_init(void) | ||
| 250 | { | ||
| 251 | u32 src_cr; | ||
| 252 | |||
| 253 | /* Configure timer sources in "system reset controller" ctrl reg */ | ||
| 254 | src_cr = readl(io_p2v(NOMADIK_SRC_BASE)); | ||
| 255 | src_cr &= SRC_CR_INIT_MASK; | ||
| 256 | src_cr |= SRC_CR_INIT_VAL; | ||
| 257 | writel(src_cr, io_p2v(NOMADIK_SRC_BASE)); | ||
| 258 | |||
| 259 | /* Save global pointer to mtu, used by platform timer code */ | ||
| 260 | mtu_base = io_p2v(NOMADIK_MTU0_BASE); | ||
| 261 | |||
| 262 | nmdk_timer_init(); | ||
| 263 | } | ||
| 264 | |||
| 265 | static struct sys_timer nomadik_timer = { | ||
| 266 | .init = nomadik_timer_init, | ||
| 267 | }; | ||
| 268 | |||
| 242 | static void __init nhk8815_platform_init(void) | 269 | static void __init nhk8815_platform_init(void) |
| 243 | { | 270 | { |
| 244 | int i; | 271 | int i; |
diff --git a/arch/arm/mach-nomadik/include/mach/setup.h b/arch/arm/mach-nomadik/include/mach/setup.h index a4e468cf63d..b7897edf1f3 100644 --- a/arch/arm/mach-nomadik/include/mach/setup.h +++ b/arch/arm/mach-nomadik/include/mach/setup.h | |||
| @@ -15,7 +15,7 @@ | |||
| 15 | extern void cpu8815_map_io(void); | 15 | extern void cpu8815_map_io(void); |
| 16 | extern void cpu8815_platform_init(void); | 16 | extern void cpu8815_platform_init(void); |
| 17 | extern void cpu8815_init_irq(void); | 17 | extern void cpu8815_init_irq(void); |
| 18 | extern struct sys_timer nomadik_timer; | 18 | extern void nmdk_timer_init(void); |
| 19 | 19 | ||
| 20 | #endif /* NOMADIK_8815 */ | 20 | #endif /* NOMADIK_8815 */ |
| 21 | 21 | ||
diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig index 55ecc01ea20..27f489747bb 100644 --- a/arch/arm/mach-omap1/Kconfig +++ b/arch/arm/mach-omap1/Kconfig | |||
| @@ -11,6 +11,7 @@ config ARCH_OMAP850 | |||
| 11 | depends on ARCH_OMAP1 | 11 | depends on ARCH_OMAP1 |
| 12 | bool "OMAP850 Based System" | 12 | bool "OMAP850 Based System" |
| 13 | select CPU_ARM926T | 13 | select CPU_ARM926T |
| 14 | select ARCH_OMAP_OTG | ||
| 14 | 15 | ||
| 15 | config ARCH_OMAP15XX | 16 | config ARCH_OMAP15XX |
| 16 | depends on ARCH_OMAP1 | 17 | depends on ARCH_OMAP1 |
| @@ -56,6 +57,12 @@ config MACH_OMAP_HTCWIZARD | |||
| 56 | help | 57 | help |
| 57 | HTC Wizard smartphone support (AKA QTEK 9100, ...) | 58 | HTC Wizard smartphone support (AKA QTEK 9100, ...) |
| 58 | 59 | ||
| 60 | config MACH_HERALD | ||
| 61 | bool "HTC Herald" | ||
| 62 | depends on ARCH_OMAP850 | ||
| 63 | help | ||
| 64 | HTC Herald smartphone support (AKA T-Mobile Wing, ...) | ||
| 65 | |||
| 59 | config MACH_OMAP_OSK | 66 | config MACH_OMAP_OSK |
| 60 | bool "TI OSK Support" | 67 | bool "TI OSK Support" |
| 61 | depends on ARCH_OMAP1 && ARCH_OMAP16XX | 68 | depends on ARCH_OMAP1 && ARCH_OMAP16XX |
diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile index 6867cd3ad0b..87e539aa8ad 100644 --- a/arch/arm/mach-omap1/Makefile +++ b/arch/arm/mach-omap1/Makefile | |||
| @@ -34,6 +34,7 @@ obj-$(CONFIG_MACH_OMAP_PALMTT) += board-palmtt.o | |||
| 34 | obj-$(CONFIG_MACH_NOKIA770) += board-nokia770.o | 34 | obj-$(CONFIG_MACH_NOKIA770) += board-nokia770.o |
| 35 | obj-$(CONFIG_MACH_AMS_DELTA) += board-ams-delta.o | 35 | obj-$(CONFIG_MACH_AMS_DELTA) += board-ams-delta.o |
| 36 | obj-$(CONFIG_MACH_SX1) += board-sx1.o board-sx1-mmc.o | 36 | obj-$(CONFIG_MACH_SX1) += board-sx1.o board-sx1-mmc.o |
| 37 | obj-$(CONFIG_MACH_HERALD) += board-htcherald.o | ||
| 37 | 38 | ||
| 38 | ifeq ($(CONFIG_ARCH_OMAP15XX),y) | 39 | ifeq ($(CONFIG_ARCH_OMAP15XX),y) |
| 39 | # Innovator-1510 FPGA | 40 | # Innovator-1510 FPGA |
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 8ad5cc3e83e..7fc11c34b69 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c | |||
| @@ -25,13 +25,13 @@ | |||
| 25 | #include <asm/mach/arch.h> | 25 | #include <asm/mach/arch.h> |
| 26 | #include <asm/mach/map.h> | 26 | #include <asm/mach/map.h> |
| 27 | 27 | ||
| 28 | #include <mach/board-ams-delta.h> | 28 | #include <plat/board-ams-delta.h> |
| 29 | #include <mach/gpio.h> | 29 | #include <mach/gpio.h> |
| 30 | #include <mach/keypad.h> | 30 | #include <plat/keypad.h> |
| 31 | #include <mach/mux.h> | 31 | #include <plat/mux.h> |
| 32 | #include <mach/usb.h> | 32 | #include <plat/usb.h> |
| 33 | #include <mach/board.h> | 33 | #include <plat/board.h> |
| 34 | #include <mach/common.h> | 34 | #include <plat/common.h> |
| 35 | 35 | ||
| 36 | static u8 ams_delta_latch1_reg; | 36 | static u8 ams_delta_latch1_reg; |
| 37 | static u16 ams_delta_latch2_reg; | 37 | static u16 ams_delta_latch2_reg; |
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c index a7ead1b9322..f4b72c1654f 100644 --- a/arch/arm/mach-omap1/board-fsample.c +++ b/arch/arm/mach-omap1/board-fsample.c | |||
| @@ -26,14 +26,14 @@ | |||
| 26 | #include <asm/mach/flash.h> | 26 | #include <asm/mach/flash.h> |
| 27 | #include <asm/mach/map.h> | 27 | #include <asm/mach/map.h> |
| 28 | 28 | ||
| 29 | #include <mach/tc.h> | 29 | #include <plat/tc.h> |
| 30 | #include <mach/gpio.h> | 30 | #include <mach/gpio.h> |
| 31 | #include <mach/mux.h> | 31 | #include <plat/mux.h> |
| 32 | #include <mach/fpga.h> | 32 | #include <plat/fpga.h> |
| 33 | #include <mach/nand.h> | 33 | #include <plat/nand.h> |
| 34 | #include <mach/keypad.h> | 34 | #include <plat/keypad.h> |
| 35 | #include <mach/common.h> | 35 | #include <plat/common.h> |
| 36 | #include <mach/board.h> | 36 | #include <plat/board.h> |
| 37 | 37 | ||
| 38 | /* fsample is pretty close to p2-sample */ | 38 | /* fsample is pretty close to p2-sample */ |
| 39 | 39 | ||
| @@ -107,7 +107,7 @@ static struct resource smc91x_resources[] = { | |||
| 107 | .flags = IORESOURCE_MEM, | 107 | .flags = IORESOURCE_MEM, |
| 108 | }, | 108 | }, |
| 109 | [1] = { | 109 | [1] = { |
| 110 | .start = INT_730_MPU_EXT_NIRQ, | 110 | .start = INT_7XX_MPU_EXT_NIRQ, |
| 111 | .end = 0, | 111 | .end = 0, |
| 112 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | 112 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
| 113 | }, | 113 | }, |
| @@ -196,8 +196,8 @@ static struct platform_device smc91x_device = { | |||
| 196 | 196 | ||
| 197 | static struct resource kp_resources[] = { | 197 | static struct resource kp_resources[] = { |
| 198 | [0] = { | 198 | [0] = { |
| 199 | .start = INT_730_MPUIO_KEYPAD, | 199 | .start = INT_7XX_MPUIO_KEYPAD, |
| 200 | .end = INT_730_MPUIO_KEYPAD, | 200 | .end = INT_7XX_MPUIO_KEYPAD, |
| 201 | .flags = IORESOURCE_IRQ, | 201 | .flags = IORESOURCE_IRQ, |
| 202 | }, | 202 | }, |
| 203 | }; | 203 | }; |
| @@ -309,7 +309,7 @@ static void __init omap_fsample_map_io(void) | |||
| 309 | /* | 309 | /* |
| 310 | * Hold GSM Reset until needed | 310 | * Hold GSM Reset until needed |
| 311 | */ | 311 | */ |
| 312 | omap_writew(omap_readw(OMAP730_DSP_M_CTL) & ~1, OMAP730_DSP_M_CTL); | 312 | omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL); |
| 313 | 313 | ||
| 314 | /* | 314 | /* |
| 315 | * UARTs -> done automagically by 8250 driver | 315 | * UARTs -> done automagically by 8250 driver |
| @@ -320,21 +320,21 @@ static void __init omap_fsample_map_io(void) | |||
| 320 | */ | 320 | */ |
| 321 | 321 | ||
| 322 | /* Flash: CS0 timings setup */ | 322 | /* Flash: CS0 timings setup */ |
| 323 | omap_writel(0x0000fff3, OMAP730_FLASH_CFG_0); | 323 | omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0); |
| 324 | omap_writel(0x00000088, OMAP730_FLASH_ACFG_0); | 324 | omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0); |
| 325 | 325 | ||
| 326 | /* | 326 | /* |
| 327 | * Ethernet support through the debug board | 327 | * Ethernet support through the debug board |
| 328 | * CS1 timings setup | 328 | * CS1 timings setup |
| 329 | */ | 329 | */ |
| 330 | omap_writel(0x0000fff3, OMAP730_FLASH_CFG_1); | 330 | omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1); |
| 331 | omap_writel(0x00000000, OMAP730_FLASH_ACFG_1); | 331 | omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1); |
| 332 | 332 | ||
| 333 | /* | 333 | /* |
| 334 | * Configure MPU_EXT_NIRQ IO in IO_CONF9 register, | 334 | * Configure MPU_EXT_NIRQ IO in IO_CONF9 register, |
| 335 | * It is used as the Ethernet controller interrupt | 335 | * It is used as the Ethernet controller interrupt |
| 336 | */ | 336 | */ |
| 337 | omap_writel(omap_readl(OMAP730_IO_CONF_9) & 0x1FFFFFFF, OMAP730_IO_CONF_9); | 337 | omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF, OMAP7XX_IO_CONF_9); |
| 338 | } | 338 | } |
| 339 | 339 | ||
| 340 | MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample") | 340 | MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample") |
diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c index 6c8a41f20e5..e1195a3467b 100644 --- a/arch/arm/mach-omap1/board-generic.c +++ b/arch/arm/mach-omap1/board-generic.c | |||
| @@ -23,10 +23,10 @@ | |||
| 23 | #include <asm/mach/map.h> | 23 | #include <asm/mach/map.h> |
| 24 | 24 | ||
| 25 | #include <mach/gpio.h> | 25 | #include <mach/gpio.h> |
| 26 | #include <mach/mux.h> | 26 | #include <plat/mux.h> |
| 27 | #include <mach/usb.h> | 27 | #include <plat/usb.h> |
| 28 | #include <mach/board.h> | 28 | #include <plat/board.h> |
| 29 | #include <mach/common.h> | 29 | #include <plat/common.h> |
| 30 | 30 | ||
| 31 | static void __init omap_generic_init_irq(void) | 31 | static void __init omap_generic_init_irq(void) |
| 32 | { | 32 | { |
diff --git a/arch/arm/mach-omap1/board-h2-mmc.c b/arch/arm/mach-omap1/board-h2-mmc.c index 46098f54682..b30c4990744 100644 --- a/arch/arm/mach-omap1/board-h2-mmc.c +++ b/arch/arm/mach-omap1/board-h2-mmc.c | |||
| @@ -16,7 +16,7 @@ | |||
| 16 | 16 | ||
| 17 | #include <linux/i2c/tps65010.h> | 17 | #include <linux/i2c/tps65010.h> |
| 18 | 18 | ||
| 19 | #include <mach/mmc.h> | 19 | #include <plat/mmc.h> |
| 20 | #include <mach/gpio.h> | 20 | #include <mach/gpio.h> |
| 21 | 21 | ||
| 22 | #include "board-h2.h" | 22 | #include "board-h2.h" |
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index aab860307dc..89ba8ec4bbf 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c | |||
| @@ -37,14 +37,14 @@ | |||
| 37 | #include <asm/mach/flash.h> | 37 | #include <asm/mach/flash.h> |
| 38 | #include <asm/mach/map.h> | 38 | #include <asm/mach/map.h> |
| 39 | 39 | ||
| 40 | #include <mach/mux.h> | 40 | #include <plat/mux.h> |
| 41 | #include <mach/dma.h> | 41 | #include <plat/dma.h> |
| 42 | #include <mach/tc.h> | 42 | #include <plat/tc.h> |
| 43 | #include <mach/nand.h> | 43 | #include <plat/nand.h> |
| 44 | #include <mach/irda.h> | 44 | #include <plat/irda.h> |
| 45 | #include <mach/usb.h> | 45 | #include <plat/usb.h> |
| 46 | #include <mach/keypad.h> | 46 | #include <plat/keypad.h> |
| 47 | #include <mach/common.h> | 47 | #include <plat/common.h> |
| 48 | 48 | ||
| 49 | #include "board-h2.h" | 49 | #include "board-h2.h" |
| 50 | 50 | ||
diff --git a/arch/arm/mach-omap1/board-h3-mmc.c b/arch/arm/mach-omap1/board-h3-mmc.c index 5e8877ce35e..54b0f063e26 100644 --- a/arch/arm/mach-omap1/board-h3-mmc.c +++ b/arch/arm/mach-omap1/board-h3-mmc.c | |||
| @@ -16,7 +16,7 @@ | |||
| 16 | 16 | ||
| 17 | #include <linux/i2c/tps65010.h> | 17 | #include <linux/i2c/tps65010.h> |
| 18 | 18 | ||
| 19 | #include <mach/mmc.h> | 19 | #include <plat/mmc.h> |
| 20 | #include <mach/gpio.h> | 20 | #include <mach/gpio.h> |
| 21 | 21 | ||
| 22 | #include "board-h3.h" | 22 | #include "board-h3.h" |
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index 89586b80b8d..f5cc0a73052 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c | |||
| @@ -40,13 +40,13 @@ | |||
| 40 | #include <asm/mach/map.h> | 40 | #include <asm/mach/map.h> |
| 41 | 41 | ||
| 42 | #include <mach/irqs.h> | 42 | #include <mach/irqs.h> |
| 43 | #include <mach/mux.h> | 43 | #include <plat/mux.h> |
| 44 | #include <mach/tc.h> | 44 | #include <plat/tc.h> |
| 45 | #include <mach/nand.h> | 45 | #include <plat/nand.h> |
| 46 | #include <mach/usb.h> | 46 | #include <plat/usb.h> |
| 47 | #include <mach/keypad.h> | 47 | #include <plat/keypad.h> |
| 48 | #include <mach/dma.h> | 48 | #include <plat/dma.h> |
| 49 | #include <mach/common.h> | 49 | #include <plat/common.h> |
| 50 | 50 | ||
| 51 | #include "board-h3.h" | 51 | #include "board-h3.h" |
| 52 | 52 | ||
diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c new file mode 100644 index 00000000000..5f28a5ceaca --- /dev/null +++ b/arch/arm/mach-omap1/board-htcherald.c | |||
| @@ -0,0 +1,247 @@ | |||
| 1 | /* | ||
| 2 | * HTC Herald board configuration | ||
| 3 | * Copyright (C) 2009 Cory Maccarrone <darkstar6262@gmail.com> | ||
| 4 | * Copyright (C) 2009 Wing Linux | ||
| 5 | * | ||
| 6 | * Based on the board-htcwizard.c file from the linwizard project: | ||
| 7 | * Copyright (C) 2006 Unai Uribarri | ||
| 8 | * Copyright (C) 2008 linwizard.sourceforge.net | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or | ||
| 11 | * modify it under the terms of the GNU General Public License as | ||
| 12 | * published by the Free Software Foundation; either version 2 of the | ||
| 13 | * License, or (at your option) any later version. | ||
| 14 | * | ||
| 15 | * This program is distributed in the hope that it will be useful, but | ||
| 16 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
| 18 | * General Public License for more details. | ||
| 19 | * | ||
| 20 | * You should have received a copy of the GNU General Public License | ||
| 21 | * along with this program; if not, write to the Free Software | ||
| 22 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | ||
| 23 | * 02110-1301, USA. | ||
| 24 | * | ||
| 25 | */ | ||
| 26 | |||
| 27 | #include <linux/kernel.h> | ||
| 28 | #include <linux/init.h> | ||
| 29 | #include <linux/platform_device.h> | ||
| 30 | #include <linux/input.h> | ||
| 31 | #include <linux/bootmem.h> | ||
| 32 | #include <linux/io.h> | ||
| 33 | #include <linux/gpio.h> | ||
| 34 | |||
| 35 | #include <asm/mach-types.h> | ||
| 36 | #include <asm/mach/arch.h> | ||
| 37 | |||
| 38 | #include <plat/omap7xx.h> | ||
| 39 | #include <plat/common.h> | ||
| 40 | #include <plat/board.h> | ||
| 41 | #include <plat/keypad.h> | ||
| 42 | |||
| 43 | #include <mach/irqs.h> | ||
| 44 | |||
| 45 | #include <linux/delay.h> | ||
| 46 | |||
| 47 | /* LCD register definition */ | ||
| 48 | #define OMAP_LCDC_CONTROL (0xfffec000 + 0x00) | ||
| 49 | #define OMAP_LCDC_STATUS (0xfffec000 + 0x10) | ||
| 50 | #define OMAP_DMA_LCD_CCR (0xfffee300 + 0xc2) | ||
| 51 | #define OMAP_DMA_LCD_CTRL (0xfffee300 + 0xc4) | ||
| 52 | #define OMAP_LCDC_CTRL_LCD_EN (1 << 0) | ||
| 53 | #define OMAP_LCDC_STAT_DONE (1 << 0) | ||
| 54 | |||
| 55 | static struct omap_lcd_config htcherald_lcd_config __initdata = { | ||
| 56 | .ctrl_name = "internal", | ||
| 57 | }; | ||
| 58 | |||
| 59 | static struct omap_board_config_kernel htcherald_config[] __initdata = { | ||
| 60 | { OMAP_TAG_LCD, &htcherald_lcd_config }, | ||
| 61 | }; | ||
| 62 | |||
| 63 | /* Keyboard definition */ | ||
| 64 | |||
| 65 | static int htc_herald_keymap[] = { | ||
| 66 | KEY(0, 0, KEY_RECORD), /* Mail button */ | ||
| 67 | KEY(0, 1, KEY_CAMERA), /* Camera */ | ||
| 68 | KEY(0, 2, KEY_PHONE), /* Send key */ | ||
| 69 | KEY(0, 3, KEY_VOLUMEUP), /* Volume up */ | ||
| 70 | KEY(0, 4, KEY_F2), /* Right bar (landscape) */ | ||
| 71 | KEY(0, 5, KEY_MAIL), /* Win key (portrait) */ | ||
| 72 | KEY(0, 6, KEY_DIRECTORY), /* Right bar (protrait) */ | ||
| 73 | KEY(1, 0, KEY_LEFTCTRL), /* Windows key */ | ||
| 74 | KEY(1, 1, KEY_COMMA), | ||
| 75 | KEY(1, 2, KEY_M), | ||
| 76 | KEY(1, 3, KEY_K), | ||
| 77 | KEY(1, 4, KEY_SLASH), /* OK key */ | ||
| 78 | KEY(1, 5, KEY_I), | ||
| 79 | KEY(1, 6, KEY_U), | ||
| 80 | KEY(2, 0, KEY_LEFTALT), | ||
| 81 | KEY(2, 1, KEY_TAB), | ||
| 82 | KEY(2, 2, KEY_N), | ||
| 83 | KEY(2, 3, KEY_J), | ||
| 84 | KEY(2, 4, KEY_ENTER), | ||
| 85 | KEY(2, 5, KEY_H), | ||
| 86 | KEY(2, 6, KEY_Y), | ||
| 87 | KEY(3, 0, KEY_SPACE), | ||
| 88 | KEY(3, 1, KEY_L), | ||
| 89 | KEY(3, 2, KEY_B), | ||
| 90 | KEY(3, 3, KEY_V), | ||
| 91 | KEY(3, 4, KEY_BACKSPACE), | ||
| 92 | KEY(3, 5, KEY_G), | ||
| 93 | KEY(3, 6, KEY_T), | ||
| 94 | KEY(4, 0, KEY_CAPSLOCK), /* Shift */ | ||
| 95 | KEY(4, 1, KEY_C), | ||
| 96 | KEY(4, 2, KEY_F), | ||
| 97 | KEY(4, 3, KEY_R), | ||
| 98 | KEY(4, 4, KEY_O), | ||
| 99 | KEY(4, 5, KEY_E), | ||
| 100 | KEY(4, 6, KEY_D), | ||
| 101 | KEY(5, 0, KEY_X), | ||
| 102 | KEY(5, 1, KEY_Z), | ||
| 103 | KEY(5, 2, KEY_S), | ||
| 104 | KEY(5, 3, KEY_W), | ||
| 105 | KEY(5, 4, KEY_P), | ||
| 106 | KEY(5, 5, KEY_Q), | ||
| 107 | KEY(5, 6, KEY_A), | ||
| 108 | KEY(6, 0, KEY_CONNECT), /* Voice button */ | ||
| 109 | KEY(6, 2, KEY_CANCEL), /* End key */ | ||
| 110 | KEY(6, 3, KEY_VOLUMEDOWN), /* Volume down */ | ||
| 111 | KEY(6, 4, KEY_F1), /* Left bar (landscape) */ | ||
| 112 | KEY(6, 5, KEY_WWW), /* OK button (portrait) */ | ||
| 113 | KEY(6, 6, KEY_CALENDAR), /* Left bar (portrait) */ | ||
| 114 | 0 | ||
| 115 | }; | ||
| 116 | |||
| 117 | struct omap_kp_platform_data htcherald_kp_data = { | ||
| 118 | .rows = 7, | ||
| 119 | .cols = 7, | ||
| 120 | .delay = 20, | ||
| 121 | .rep = 1, | ||
| 122 | .keymap = htc_herald_keymap, | ||
| 123 | }; | ||
| 124 | |||
| 125 | static struct resource kp_resources[] = { | ||
| 126 | [0] = { | ||
| 127 | .start = INT_7XX_MPUIO_KEYPAD, | ||
| 128 | .end = INT_7XX_MPUIO_KEYPAD, | ||
| 129 | .flags = IORESOURCE_IRQ, | ||
| 130 | }, | ||
| 131 | }; | ||
| 132 | |||
| 133 | static struct platform_device kp_device = { | ||
| 134 | .name = "omap-keypad", | ||
| 135 | .id = -1, | ||
| 136 | .dev = { | ||
| 137 | .platform_data = &htcherald_kp_data, | ||
| 138 | }, | ||
| 139 | .num_resources = ARRAY_SIZE(kp_resources), | ||
| 140 | .resource = kp_resources, | ||
| 141 | }; | ||
| 142 | |||
| 143 | /* LCD Device resources */ | ||
| 144 | static struct platform_device lcd_device = { | ||
| 145 | .name = "lcd_htcherald", | ||
| 146 | .id = -1, | ||
| 147 | }; | ||
| 148 | |||
| 149 | static struct platform_device *devices[] __initdata = { | ||
| 150 | &kp_device, | ||
| 151 | &lcd_device, | ||
| 152 | }; | ||
| 153 | |||
| 154 | /* | ||
| 155 | * Init functions from here on | ||
| 156 | */ | ||
| 157 | |||
| 158 | static void __init htcherald_lcd_init(void) | ||
| 159 | { | ||
| 160 | u32 reg; | ||
| 161 | unsigned int tries = 200; | ||
| 162 | |||
| 163 | /* disable controller if active */ | ||
| 164 | reg = omap_readl(OMAP_LCDC_CONTROL); | ||
| 165 | if (reg & OMAP_LCDC_CTRL_LCD_EN) { | ||
| 166 | reg &= ~OMAP_LCDC_CTRL_LCD_EN; | ||
| 167 | omap_writel(reg, OMAP_LCDC_CONTROL); | ||
| 168 | |||
| 169 | /* wait for end of frame */ | ||
| 170 | while (!(omap_readl(OMAP_LCDC_STATUS) & OMAP_LCDC_STAT_DONE)) { | ||
| 171 | tries--; | ||
| 172 | if (!tries) | ||
| 173 | break; | ||
| 174 | } | ||
| 175 | if (!tries) | ||
| 176 | printk(KERN_WARNING "Timeout waiting for end of frame " | ||
| 177 | "-- LCD may not be available\n"); | ||
| 178 | |||
| 179 | /* turn off DMA */ | ||
| 180 | reg = omap_readw(OMAP_DMA_LCD_CCR); | ||
| 181 | reg &= ~(1 << 7); | ||
| 182 | omap_writew(reg, OMAP_DMA_LCD_CCR); | ||
| 183 | |||
| 184 | reg = omap_readw(OMAP_DMA_LCD_CTRL); | ||
| 185 | reg &= ~(1 << 8); | ||
| 186 | omap_writew(reg, OMAP_DMA_LCD_CTRL); | ||
| 187 | } | ||
| 188 | } | ||
| 189 | |||
| 190 | static void __init htcherald_map_io(void) | ||
| 191 | { | ||
| 192 | omap1_map_common_io(); | ||
| 193 | |||
| 194 | /* | ||
| 195 | * The LCD panel must be disabled and DMA turned off here, as doing | ||
| 196 | * it later causes the LCD never to reinitialize. | ||
| 197 | */ | ||
| 198 | htcherald_lcd_init(); | ||
| 199 | |||
| 200 | printk(KERN_INFO "htcherald_map_io done.\n"); | ||
| 201 | } | ||
| 202 | |||
| 203 | static void __init htcherald_disable_watchdog(void) | ||
| 204 | { | ||
| 205 | /* Disable watchdog if running */ | ||
| 206 | if (omap_readl(OMAP_WDT_TIMER_MODE) & 0x8000) { | ||
| 207 | /* | ||
| 208 | * disable a potentially running watchdog timer before | ||
| 209 | * it kills us. | ||
| 210 | */ | ||
| 211 | printk(KERN_WARNING "OMAP850 Watchdog seems to be activated, disabling it for now.\n"); | ||
| 212 | omap_writel(0xF5, OMAP_WDT_TIMER_MODE); | ||
| 213 | omap_writel(0xA0, OMAP_WDT_TIMER_MODE); | ||
| 214 | } | ||
| 215 | } | ||
| 216 | |||
| 217 | static void __init htcherald_init(void) | ||
| 218 | { | ||
| 219 | printk(KERN_INFO "HTC Herald init.\n"); | ||
| 220 | |||
| 221 | omap_gpio_init(); | ||
| 222 | |||
| 223 | omap_board_config = htcherald_config; | ||
| 224 | omap_board_config_size = ARRAY_SIZE(htcherald_config); | ||
| 225 | platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
| 226 | |||
| 227 | htcherald_disable_watchdog(); | ||
| 228 | } | ||
| 229 | |||
| 230 | static void __init htcherald_init_irq(void) | ||
| 231 | { | ||
| 232 | printk(KERN_INFO "htcherald_init_irq.\n"); | ||
| 233 | omap1_init_common_hw(); | ||
| 234 | omap_init_irq(); | ||
| 235 | } | ||
| 236 | |||
| 237 | MACHINE_START(HERALD, "HTC Herald") | ||
| 238 | /* Maintainer: Cory Maccarrone <darkstar6262@gmail.com> */ | ||
| 239 | /* Maintainer: wing-linux.sourceforge.net */ | ||
| 240 | .phys_io = 0xfff00000, | ||
| 241 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, | ||
| 242 | .boot_params = 0x10000100, | ||
| 243 | .map_io = htcherald_map_io, | ||
| 244 | .init_irq = htcherald_init_irq, | ||
| 245 | .init_machine = htcherald_init, | ||
| 246 | .timer = &omap_timer, | ||
| 247 | MACHINE_END | ||
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index cd6c3951482..cf0fdb9c182 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c | |||
| @@ -30,14 +30,14 @@ | |||
| 30 | #include <asm/mach/flash.h> | 30 | #include <asm/mach/flash.h> |
| 31 | #include <asm/mach/map.h> | 31 | #include <asm/mach/map.h> |
| 32 | 32 | ||
| 33 | #include <mach/mux.h> | 33 | #include <plat/mux.h> |
| 34 | #include <mach/fpga.h> | 34 | #include <plat/fpga.h> |
| 35 | #include <mach/gpio.h> | 35 | #include <mach/gpio.h> |
| 36 | #include <mach/tc.h> | 36 | #include <plat/tc.h> |
| 37 | #include <mach/usb.h> | 37 | #include <plat/usb.h> |
| 38 | #include <mach/keypad.h> | 38 | #include <plat/keypad.h> |
| 39 | #include <mach/common.h> | 39 | #include <plat/common.h> |
| 40 | #include <mach/mmc.h> | 40 | #include <plat/mmc.h> |
| 41 | 41 | ||
| 42 | /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ | 42 | /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ |
| 43 | #define INNOVATOR1610_ETHR_START 0x04000300 | 43 | #define INNOVATOR1610_ETHR_START 0x04000300 |
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c index ed2a48a9ce7..5a275bab2df 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c | |||
| @@ -26,17 +26,17 @@ | |||
| 26 | #include <asm/mach/map.h> | 26 | #include <asm/mach/map.h> |
| 27 | 27 | ||
| 28 | #include <mach/gpio.h> | 28 | #include <mach/gpio.h> |
| 29 | #include <mach/mux.h> | 29 | #include <plat/mux.h> |
| 30 | #include <mach/usb.h> | 30 | #include <plat/usb.h> |
| 31 | #include <mach/board.h> | 31 | #include <plat/board.h> |
| 32 | #include <mach/keypad.h> | 32 | #include <plat/keypad.h> |
| 33 | #include <mach/common.h> | 33 | #include <plat/common.h> |
| 34 | #include <mach/dsp_common.h> | 34 | #include <plat/dsp_common.h> |
| 35 | #include <mach/omapfb.h> | 35 | #include <plat/omapfb.h> |
| 36 | #include <mach/hwa742.h> | 36 | #include <plat/hwa742.h> |
| 37 | #include <mach/lcd_mipid.h> | 37 | #include <plat/lcd_mipid.h> |
| 38 | #include <mach/mmc.h> | 38 | #include <plat/mmc.h> |
| 39 | #include <mach/clock.h> | 39 | #include <plat/clock.h> |
| 40 | 40 | ||
| 41 | #define ADS7846_PENDOWN_GPIO 15 | 41 | #define ADS7846_PENDOWN_GPIO 15 |
| 42 | 42 | ||
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index ed891b8a6b1..50c92c13e48 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c | |||
| @@ -47,10 +47,10 @@ | |||
| 47 | #include <asm/mach/map.h> | 47 | #include <asm/mach/map.h> |
| 48 | #include <asm/mach/flash.h> | 48 | #include <asm/mach/flash.h> |
| 49 | 49 | ||
| 50 | #include <mach/usb.h> | 50 | #include <plat/usb.h> |
| 51 | #include <mach/mux.h> | 51 | #include <plat/mux.h> |
| 52 | #include <mach/tc.h> | 52 | #include <plat/tc.h> |
| 53 | #include <mach/common.h> | 53 | #include <plat/common.h> |
| 54 | 54 | ||
| 55 | /* At OMAP5912 OSK the Ethernet is directly connected to CS1 */ | 55 | /* At OMAP5912 OSK the Ethernet is directly connected to CS1 */ |
| 56 | #define OMAP_OSK_ETHR_START 0x04800300 | 56 | #define OMAP_OSK_ETHR_START 0x04800300 |
| @@ -312,7 +312,7 @@ static struct omap_board_config_kernel osk_config[] __initdata = { | |||
| 312 | #include <linux/spi/spi.h> | 312 | #include <linux/spi/spi.h> |
| 313 | #include <linux/spi/ads7846.h> | 313 | #include <linux/spi/ads7846.h> |
| 314 | 314 | ||
| 315 | #include <mach/keypad.h> | 315 | #include <plat/keypad.h> |
| 316 | 316 | ||
| 317 | static struct at24_platform_data at24c04 = { | 317 | static struct at24_platform_data at24c04 = { |
| 318 | .byte_len = SZ_4K / 8, | 318 | .byte_len = SZ_4K / 8, |
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c index 4de258420f3..9fe887262bd 100644 --- a/arch/arm/mach-omap1/board-palmte.c +++ b/arch/arm/mach-omap1/board-palmte.c | |||
| @@ -34,14 +34,14 @@ | |||
| 34 | #include <asm/mach/flash.h> | 34 | #include <asm/mach/flash.h> |
| 35 | 35 | ||
| 36 | #include <mach/gpio.h> | 36 | #include <mach/gpio.h> |
| 37 | #include <mach/mux.h> | 37 | #include <plat/mux.h> |
| 38 | #include <mach/usb.h> | 38 | #include <plat/usb.h> |
| 39 | #include <mach/tc.h> | 39 | #include <plat/tc.h> |
| 40 | #include <mach/dma.h> | 40 | #include <plat/dma.h> |
| 41 | #include <mach/board.h> | 41 | #include <plat/board.h> |
| 42 | #include <mach/irda.h> | 42 | #include <plat/irda.h> |
| 43 | #include <mach/keypad.h> | 43 | #include <plat/keypad.h> |
| 44 | #include <mach/common.h> | 44 | #include <plat/common.h> |
| 45 | 45 | ||
| 46 | #define PALMTE_USBDETECT_GPIO 0 | 46 | #define PALMTE_USBDETECT_GPIO 0 |
| 47 | #define PALMTE_USB_OR_DC_GPIO 1 | 47 | #define PALMTE_USB_OR_DC_GPIO 1 |
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c index d972cf941b7..af068e3e0fe 100644 --- a/arch/arm/mach-omap1/board-palmtt.c +++ b/arch/arm/mach-omap1/board-palmtt.c | |||
| @@ -29,16 +29,16 @@ | |||
| 29 | #include <asm/mach/map.h> | 29 | #include <asm/mach/map.h> |
| 30 | #include <asm/mach/flash.h> | 30 | #include <asm/mach/flash.h> |
| 31 | 31 | ||
| 32 | #include <mach/led.h> | 32 | #include <plat/led.h> |
| 33 | #include <mach/gpio.h> | 33 | #include <mach/gpio.h> |
| 34 | #include <mach/mux.h> | 34 | #include <plat/mux.h> |
| 35 | #include <mach/usb.h> | 35 | #include <plat/usb.h> |
| 36 | #include <mach/dma.h> | 36 | #include <plat/dma.h> |
| 37 | #include <mach/tc.h> | 37 | #include <plat/tc.h> |
| 38 | #include <mach/board.h> | 38 | #include <plat/board.h> |
| 39 | #include <mach/irda.h> | 39 | #include <plat/irda.h> |
| 40 | #include <mach/keypad.h> | 40 | #include <plat/keypad.h> |
| 41 | #include <mach/common.h> | 41 | #include <plat/common.h> |
| 42 | 42 | ||
| 43 | #include <linux/spi/spi.h> | 43 | #include <linux/spi/spi.h> |
| 44 | #include <linux/spi/ads7846.h> | 44 | #include <linux/spi/ads7846.h> |
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c index 986bd4df0e9..c7a3b6f3650 100644 --- a/arch/arm/mach-omap1/board-palmz71.c +++ b/arch/arm/mach-omap1/board-palmz71.c | |||
| @@ -33,15 +33,15 @@ | |||
| 33 | #include <asm/mach/flash.h> | 33 | #include <asm/mach/flash.h> |
| 34 | 34 | ||
| 35 | #include <mach/gpio.h> | 35 | #include <mach/gpio.h> |
| 36 | #include <mach/mux.h> | 36 | #include <plat/mux.h> |
| 37 | #include <mach/usb.h> | 37 | #include <plat/usb.h> |
| 38 | #include <mach/dma.h> | 38 | #include <plat/dma.h> |
| 39 | #include <mach/tc.h> | 39 | #include <plat/tc.h> |
| 40 | #include <mach/board.h> | 40 | #include <plat/board.h> |
| 41 | #include <mach/irda.h> | 41 | #include <plat/irda.h> |
| 42 | #include <mach/keypad.h> | 42 | #include <plat/keypad.h> |
| 43 | #include <mach/common.h> | 43 | #include <plat/common.h> |
| 44 | #include <mach/omap-alsa.h> | 44 | #include <plat/omap-alsa.h> |
| 45 | 45 | ||
| 46 | #include <linux/spi/spi.h> | 46 | #include <linux/spi/spi.h> |
| 47 | #include <linux/spi/ads7846.h> | 47 | #include <linux/spi/ads7846.h> |
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c index 83406699f31..ca7df1e93ef 100644 --- a/arch/arm/mach-omap1/board-perseus2.c +++ b/arch/arm/mach-omap1/board-perseus2.c | |||
| @@ -26,14 +26,14 @@ | |||
| 26 | #include <asm/mach/flash.h> | 26 | #include <asm/mach/flash.h> |
| 27 | #include <asm/mach/map.h> | 27 | #include <asm/mach/map.h> |
| 28 | 28 | ||
| 29 | #include <mach/tc.h> | 29 | #include <plat/tc.h> |
| 30 | #include <mach/gpio.h> | 30 | #include <mach/gpio.h> |
| 31 | #include <mach/mux.h> | 31 | #include <plat/mux.h> |
| 32 | #include <mach/fpga.h> | 32 | #include <plat/fpga.h> |
| 33 | #include <mach/nand.h> | 33 | #include <plat/nand.h> |
| 34 | #include <mach/keypad.h> | 34 | #include <plat/keypad.h> |
| 35 | #include <mach/common.h> | 35 | #include <plat/common.h> |
| 36 | #include <mach/board.h> | 36 | #include <plat/board.h> |
| 37 | 37 | ||
| 38 | static int p2_keymap[] = { | 38 | static int p2_keymap[] = { |
| 39 | KEY(0,0,KEY_UP), | 39 | KEY(0,0,KEY_UP), |
| @@ -74,7 +74,7 @@ static struct resource smc91x_resources[] = { | |||
| 74 | .flags = IORESOURCE_MEM, | 74 | .flags = IORESOURCE_MEM, |
| 75 | }, | 75 | }, |
| 76 | [1] = { | 76 | [1] = { |
| 77 | .start = INT_730_MPU_EXT_NIRQ, | 77 | .start = INT_7XX_MPU_EXT_NIRQ, |
| 78 | .end = 0, | 78 | .end = 0, |
| 79 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | 79 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
| 80 | }, | 80 | }, |
| @@ -163,8 +163,8 @@ static struct platform_device smc91x_device = { | |||
| 163 | 163 | ||
| 164 | static struct resource kp_resources[] = { | 164 | static struct resource kp_resources[] = { |
| 165 | [0] = { | 165 | [0] = { |
| 166 | .start = INT_730_MPUIO_KEYPAD, | 166 | .start = INT_7XX_MPUIO_KEYPAD, |
| 167 | .end = INT_730_MPUIO_KEYPAD, | 167 | .end = INT_7XX_MPUIO_KEYPAD, |
| 168 | .flags = IORESOURCE_IRQ, | 168 | .flags = IORESOURCE_IRQ, |
| 169 | }, | 169 | }, |
| 170 | }; | 170 | }; |
| @@ -270,7 +270,7 @@ static void __init omap_perseus2_map_io(void) | |||
| 270 | /* | 270 | /* |
| 271 | * Hold GSM Reset until needed | 271 | * Hold GSM Reset until needed |
| 272 | */ | 272 | */ |
| 273 | omap_writew(omap_readw(OMAP730_DSP_M_CTL) & ~1, OMAP730_DSP_M_CTL); | 273 | omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL); |
| 274 | 274 | ||
| 275 | /* | 275 | /* |
| 276 | * UARTs -> done automagically by 8250 driver | 276 | * UARTs -> done automagically by 8250 driver |
| @@ -281,21 +281,21 @@ static void __init omap_perseus2_map_io(void) | |||
| 281 | */ | 281 | */ |
| 282 | 282 | ||
| 283 | /* Flash: CS0 timings setup */ | 283 | /* Flash: CS0 timings setup */ |
| 284 | omap_writel(0x0000fff3, OMAP730_FLASH_CFG_0); | 284 | omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0); |
| 285 | omap_writel(0x00000088, OMAP730_FLASH_ACFG_0); | 285 | omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0); |
| 286 | 286 | ||
| 287 | /* | 287 | /* |
| 288 | * Ethernet support through the debug board | 288 | * Ethernet support through the debug board |
| 289 | * CS1 timings setup | 289 | * CS1 timings setup |
| 290 | */ | 290 | */ |
| 291 | omap_writel(0x0000fff3, OMAP730_FLASH_CFG_1); | 291 | omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1); |
| 292 | omap_writel(0x00000000, OMAP730_FLASH_ACFG_1); | 292 | omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1); |
| 293 | 293 | ||
| 294 | /* | 294 | /* |
| 295 | * Configure MPU_EXT_NIRQ IO in IO_CONF9 register, | 295 | * Configure MPU_EXT_NIRQ IO in IO_CONF9 register, |
| 296 | * It is used as the Ethernet controller interrupt | 296 | * It is used as the Ethernet controller interrupt |
| 297 | */ | 297 | */ |
| 298 | omap_writel(omap_readl(OMAP730_IO_CONF_9) & 0x1FFFFFFF, OMAP730_IO_CONF_9); | 298 | omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF, OMAP7XX_IO_CONF_9); |
| 299 | } | 299 | } |
| 300 | 300 | ||
| 301 | MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2") | 301 | MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2") |
diff --git a/arch/arm/mach-omap1/board-sx1-mmc.c b/arch/arm/mach-omap1/board-sx1-mmc.c index 58a46e4e45c..5b33ae8141b 100644 --- a/arch/arm/mach-omap1/board-sx1-mmc.c +++ b/arch/arm/mach-omap1/board-sx1-mmc.c | |||
| @@ -15,9 +15,9 @@ | |||
| 15 | #include <linux/platform_device.h> | 15 | #include <linux/platform_device.h> |
| 16 | 16 | ||
| 17 | #include <mach/hardware.h> | 17 | #include <mach/hardware.h> |
| 18 | #include <mach/mmc.h> | 18 | #include <plat/mmc.h> |
| 19 | #include <mach/gpio.h> | 19 | #include <mach/gpio.h> |
| 20 | #include <mach/board-sx1.h> | 20 | #include <plat/board-sx1.h> |
| 21 | 21 | ||
| 22 | #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) | 22 | #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) |
| 23 | 23 | ||
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c index 056ae64e0f5..7a97fac83d8 100644 --- a/arch/arm/mach-omap1/board-sx1.c +++ b/arch/arm/mach-omap1/board-sx1.c | |||
| @@ -33,15 +33,15 @@ | |||
| 33 | #include <asm/mach/map.h> | 33 | #include <asm/mach/map.h> |
| 34 | 34 | ||
| 35 | #include <mach/gpio.h> | 35 | #include <mach/gpio.h> |
| 36 | #include <mach/mux.h> | 36 | #include <plat/mux.h> |
| 37 | #include <mach/dma.h> | 37 | #include <plat/dma.h> |
| 38 | #include <mach/irda.h> | 38 | #include <plat/irda.h> |
| 39 | #include <mach/usb.h> | 39 | #include <plat/usb.h> |
| 40 | #include <mach/tc.h> | 40 | #include <plat/tc.h> |
| 41 | #include <mach/board.h> | 41 | #include <plat/board.h> |
| 42 | #include <mach/common.h> | 42 | #include <plat/common.h> |
| 43 | #include <mach/keypad.h> | 43 | #include <plat/keypad.h> |
| 44 | #include <mach/board-sx1.h> | 44 | #include <plat/board-sx1.h> |
| 45 | 45 | ||
| 46 | /* Write to I2C device */ | 46 | /* Write to I2C device */ |
| 47 | int sx1_i2c_write_byte(u8 devaddr, u8 regoffset, u8 value) | 47 | int sx1_i2c_write_byte(u8 devaddr, u8 regoffset, u8 value) |
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c index 07b07522d5b..35c75c1bd0a 100644 --- a/arch/arm/mach-omap1/board-voiceblue.c +++ b/arch/arm/mach-omap1/board-voiceblue.c | |||
| @@ -29,11 +29,11 @@ | |||
| 29 | #include <asm/mach/flash.h> | 29 | #include <asm/mach/flash.h> |
| 30 | #include <asm/mach/map.h> | 30 | #include <asm/mach/map.h> |
| 31 | 31 | ||
| 32 | #include <mach/common.h> | 32 | #include <plat/common.h> |
| 33 | #include <mach/gpio.h> | 33 | #include <mach/gpio.h> |
| 34 | #include <mach/mux.h> | 34 | #include <plat/mux.h> |
| 35 | #include <mach/tc.h> | 35 | #include <plat/tc.h> |
| 36 | #include <mach/usb.h> | 36 | #include <plat/usb.h> |
| 37 | 37 | ||
| 38 | static struct plat_serial8250_port voiceblue_ports[] = { | 38 | static struct plat_serial8250_port voiceblue_ports[] = { |
| 39 | { | 39 | { |
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index 436eed22801..42cbe203da3 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c | |||
| @@ -22,10 +22,10 @@ | |||
| 22 | #include <asm/mach-types.h> | 22 | #include <asm/mach-types.h> |
| 23 | #include <asm/clkdev.h> | 23 | #include <asm/clkdev.h> |
| 24 | 24 | ||
| 25 | #include <mach/cpu.h> | 25 | #include <plat/cpu.h> |
| 26 | #include <mach/usb.h> | 26 | #include <plat/usb.h> |
| 27 | #include <mach/clock.h> | 27 | #include <plat/clock.h> |
| 28 | #include <mach/sram.h> | 28 | #include <plat/sram.h> |
| 29 | 29 | ||
| 30 | static const struct clkops clkops_generic; | 30 | static const struct clkops clkops_generic; |
| 31 | static const struct clkops clkops_uart; | 31 | static const struct clkops clkops_uart; |
| @@ -69,13 +69,13 @@ struct omap_clk { | |||
| 69 | } | 69 | } |
| 70 | 70 | ||
| 71 | #define CK_310 (1 << 0) | 71 | #define CK_310 (1 << 0) |
| 72 | #define CK_730 (1 << 1) | 72 | #define CK_7XX (1 << 1) |
| 73 | #define CK_1510 (1 << 2) | 73 | #define CK_1510 (1 << 2) |
| 74 | #define CK_16XX (1 << 3) | 74 | #define CK_16XX (1 << 3) |
| 75 | 75 | ||
| 76 | static struct omap_clk omap_clks[] = { | 76 | static struct omap_clk omap_clks[] = { |
| 77 | /* non-ULPD clocks */ | 77 | /* non-ULPD clocks */ |
| 78 | CLK(NULL, "ck_ref", &ck_ref, CK_16XX | CK_1510 | CK_310), | 78 | CLK(NULL, "ck_ref", &ck_ref, CK_16XX | CK_1510 | CK_310 | CK_7XX), |
| 79 | CLK(NULL, "ck_dpll1", &ck_dpll1, CK_16XX | CK_1510 | CK_310), | 79 | CLK(NULL, "ck_dpll1", &ck_dpll1, CK_16XX | CK_1510 | CK_310), |
| 80 | /* CK_GEN1 clocks */ | 80 | /* CK_GEN1 clocks */ |
| 81 | CLK(NULL, "ck_dpll1out", &ck_dpll1out.clk, CK_16XX), | 81 | CLK(NULL, "ck_dpll1out", &ck_dpll1out.clk, CK_16XX), |
| @@ -83,7 +83,7 @@ static struct omap_clk omap_clks[] = { | |||
| 83 | CLK(NULL, "arm_ck", &arm_ck, CK_16XX | CK_1510 | CK_310), | 83 | CLK(NULL, "arm_ck", &arm_ck, CK_16XX | CK_1510 | CK_310), |
| 84 | CLK(NULL, "armper_ck", &armper_ck.clk, CK_16XX | CK_1510 | CK_310), | 84 | CLK(NULL, "armper_ck", &armper_ck.clk, CK_16XX | CK_1510 | CK_310), |
| 85 | CLK(NULL, "arm_gpio_ck", &arm_gpio_ck, CK_1510 | CK_310), | 85 | CLK(NULL, "arm_gpio_ck", &arm_gpio_ck, CK_1510 | CK_310), |
| 86 | CLK(NULL, "armxor_ck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310), | 86 | CLK(NULL, "armxor_ck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX), |
| 87 | CLK(NULL, "armtim_ck", &armtim_ck.clk, CK_16XX | CK_1510 | CK_310), | 87 | CLK(NULL, "armtim_ck", &armtim_ck.clk, CK_16XX | CK_1510 | CK_310), |
| 88 | CLK("omap_wdt", "fck", &armwdt_ck.clk, CK_16XX | CK_1510 | CK_310), | 88 | CLK("omap_wdt", "fck", &armwdt_ck.clk, CK_16XX | CK_1510 | CK_310), |
| 89 | CLK("omap_wdt", "ick", &armper_ck.clk, CK_16XX), | 89 | CLK("omap_wdt", "ick", &armper_ck.clk, CK_16XX), |
| @@ -97,9 +97,9 @@ static struct omap_clk omap_clks[] = { | |||
| 97 | CLK(NULL, "dspxor_ck", &dspxor_ck, CK_16XX | CK_1510 | CK_310), | 97 | CLK(NULL, "dspxor_ck", &dspxor_ck, CK_16XX | CK_1510 | CK_310), |
| 98 | CLK(NULL, "dsptim_ck", &dsptim_ck, CK_16XX | CK_1510 | CK_310), | 98 | CLK(NULL, "dsptim_ck", &dsptim_ck, CK_16XX | CK_1510 | CK_310), |
| 99 | /* CK_GEN3 clocks */ | 99 | /* CK_GEN3 clocks */ |
| 100 | CLK(NULL, "tc_ck", &tc_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_730), | 100 | CLK(NULL, "tc_ck", &tc_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX), |
| 101 | CLK(NULL, "tipb_ck", &tipb_ck, CK_1510 | CK_310), | 101 | CLK(NULL, "tipb_ck", &tipb_ck, CK_1510 | CK_310), |
| 102 | CLK(NULL, "l3_ocpi_ck", &l3_ocpi_ck, CK_16XX), | 102 | CLK(NULL, "l3_ocpi_ck", &l3_ocpi_ck, CK_16XX | CK_7XX), |
| 103 | CLK(NULL, "tc1_ck", &tc1_ck, CK_16XX), | 103 | CLK(NULL, "tc1_ck", &tc1_ck, CK_16XX), |
| 104 | CLK(NULL, "tc2_ck", &tc2_ck, CK_16XX), | 104 | CLK(NULL, "tc2_ck", &tc2_ck, CK_16XX), |
| 105 | CLK(NULL, "dma_ck", &dma_ck, CK_16XX | CK_1510 | CK_310), | 105 | CLK(NULL, "dma_ck", &dma_ck, CK_16XX | CK_1510 | CK_310), |
| @@ -108,7 +108,7 @@ static struct omap_clk omap_clks[] = { | |||
| 108 | CLK(NULL, "lb_ck", &lb_ck.clk, CK_1510 | CK_310), | 108 | CLK(NULL, "lb_ck", &lb_ck.clk, CK_1510 | CK_310), |
| 109 | CLK(NULL, "rhea1_ck", &rhea1_ck, CK_16XX), | 109 | CLK(NULL, "rhea1_ck", &rhea1_ck, CK_16XX), |
| 110 | CLK(NULL, "rhea2_ck", &rhea2_ck, CK_16XX), | 110 | CLK(NULL, "rhea2_ck", &rhea2_ck, CK_16XX), |
| 111 | CLK(NULL, "lcd_ck", &lcd_ck_16xx, CK_16XX | CK_730), | 111 | CLK(NULL, "lcd_ck", &lcd_ck_16xx, CK_16XX | CK_7XX), |
| 112 | CLK(NULL, "lcd_ck", &lcd_ck_1510.clk, CK_1510 | CK_310), | 112 | CLK(NULL, "lcd_ck", &lcd_ck_1510.clk, CK_1510 | CK_310), |
| 113 | /* ULPD clocks */ | 113 | /* ULPD clocks */ |
| 114 | CLK(NULL, "uart1_ck", &uart1_1510, CK_1510 | CK_310), | 114 | CLK(NULL, "uart1_ck", &uart1_1510, CK_1510 | CK_310), |
| @@ -120,12 +120,14 @@ static struct omap_clk omap_clks[] = { | |||
| 120 | CLK(NULL, "usb_hhc_ck", &usb_hhc_ck1510, CK_1510 | CK_310), | 120 | CLK(NULL, "usb_hhc_ck", &usb_hhc_ck1510, CK_1510 | CK_310), |
| 121 | CLK(NULL, "usb_hhc_ck", &usb_hhc_ck16xx, CK_16XX), | 121 | CLK(NULL, "usb_hhc_ck", &usb_hhc_ck16xx, CK_16XX), |
| 122 | CLK(NULL, "usb_dc_ck", &usb_dc_ck, CK_16XX), | 122 | CLK(NULL, "usb_dc_ck", &usb_dc_ck, CK_16XX), |
| 123 | CLK(NULL, "usb_dc_ck", &usb_dc_ck7xx, CK_7XX), | ||
| 123 | CLK(NULL, "mclk", &mclk_1510, CK_1510 | CK_310), | 124 | CLK(NULL, "mclk", &mclk_1510, CK_1510 | CK_310), |
| 124 | CLK(NULL, "mclk", &mclk_16xx, CK_16XX), | 125 | CLK(NULL, "mclk", &mclk_16xx, CK_16XX), |
| 125 | CLK(NULL, "bclk", &bclk_1510, CK_1510 | CK_310), | 126 | CLK(NULL, "bclk", &bclk_1510, CK_1510 | CK_310), |
| 126 | CLK(NULL, "bclk", &bclk_16xx, CK_16XX), | 127 | CLK(NULL, "bclk", &bclk_16xx, CK_16XX), |
| 127 | CLK("mmci-omap.0", "fck", &mmc1_ck, CK_16XX | CK_1510 | CK_310), | 128 | CLK("mmci-omap.0", "fck", &mmc1_ck, CK_16XX | CK_1510 | CK_310), |
| 128 | CLK("mmci-omap.0", "ick", &armper_ck.clk, CK_16XX | CK_1510 | CK_310), | 129 | CLK("mmci-omap.0", "fck", &mmc3_ck, CK_7XX), |
| 130 | CLK("mmci-omap.0", "ick", &armper_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX), | ||
| 129 | CLK("mmci-omap.1", "fck", &mmc2_ck, CK_16XX), | 131 | CLK("mmci-omap.1", "fck", &mmc2_ck, CK_16XX), |
| 130 | CLK("mmci-omap.1", "ick", &armper_ck.clk, CK_16XX), | 132 | CLK("mmci-omap.1", "ick", &armper_ck.clk, CK_16XX), |
| 131 | /* Virtual clocks */ | 133 | /* Virtual clocks */ |
| @@ -398,7 +400,7 @@ static int omap1_select_table_rate(struct clk * clk, unsigned long rate) | |||
| 398 | * Reprogramming the DPLL is tricky, it must be done from SRAM. | 400 | * Reprogramming the DPLL is tricky, it must be done from SRAM. |
| 399 | * (on 730, bit 13 must always be 1) | 401 | * (on 730, bit 13 must always be 1) |
| 400 | */ | 402 | */ |
| 401 | if (cpu_is_omap730()) | 403 | if (cpu_is_omap7xx()) |
| 402 | omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val | 0x2000); | 404 | omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val | 0x2000); |
| 403 | else | 405 | else |
| 404 | omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val); | 406 | omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val); |
| @@ -783,8 +785,8 @@ int __init omap1_clk_init(void) | |||
| 783 | cpu_mask |= CK_16XX; | 785 | cpu_mask |= CK_16XX; |
| 784 | if (cpu_is_omap1510()) | 786 | if (cpu_is_omap1510()) |
| 785 | cpu_mask |= CK_1510; | 787 | cpu_mask |= CK_1510; |
| 786 | if (cpu_is_omap730()) | 788 | if (cpu_is_omap7xx()) |
| 787 | cpu_mask |= CK_730; | 789 | cpu_mask |= CK_7XX; |
| 788 | if (cpu_is_omap310()) | 790 | if (cpu_is_omap310()) |
| 789 | cpu_mask |= CK_310; | 791 | cpu_mask |= CK_310; |
| 790 | 792 | ||
| @@ -800,7 +802,7 @@ int __init omap1_clk_init(void) | |||
| 800 | crystal_type = info->system_clock_type; | 802 | crystal_type = info->system_clock_type; |
| 801 | } | 803 | } |
| 802 | 804 | ||
| 803 | #if defined(CONFIG_ARCH_OMAP730) | 805 | #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) |
| 804 | ck_ref.rate = 13000000; | 806 | ck_ref.rate = 13000000; |
| 805 | #elif defined(CONFIG_ARCH_OMAP16XX) | 807 | #elif defined(CONFIG_ARCH_OMAP16XX) |
| 806 | if (crystal_type == 2) | 808 | if (crystal_type == 2) |
| @@ -847,7 +849,7 @@ int __init omap1_clk_init(void) | |||
| 847 | printk(KERN_ERR "System frequencies not set. Check your config.\n"); | 849 | printk(KERN_ERR "System frequencies not set. Check your config.\n"); |
| 848 | /* Guess sane values (60MHz) */ | 850 | /* Guess sane values (60MHz) */ |
| 849 | omap_writew(0x2290, DPLL_CTL); | 851 | omap_writew(0x2290, DPLL_CTL); |
| 850 | omap_writew(cpu_is_omap730() ? 0x3005 : 0x1005, ARM_CKCTL); | 852 | omap_writew(cpu_is_omap7xx() ? 0x3005 : 0x1005, ARM_CKCTL); |
| 851 | ck_dpll1.rate = 60000000; | 853 | ck_dpll1.rate = 60000000; |
| 852 | } | 854 | } |
| 853 | #endif | 855 | #endif |
| @@ -862,7 +864,7 @@ int __init omap1_clk_init(void) | |||
| 862 | 864 | ||
| 863 | #if defined(CONFIG_MACH_OMAP_PERSEUS2) || defined(CONFIG_MACH_OMAP_FSAMPLE) | 865 | #if defined(CONFIG_MACH_OMAP_PERSEUS2) || defined(CONFIG_MACH_OMAP_FSAMPLE) |
| 864 | /* Select slicer output as OMAP input clock */ | 866 | /* Select slicer output as OMAP input clock */ |
| 865 | omap_writew(omap_readw(OMAP730_PCC_UPLD_CTRL) & ~0x1, OMAP730_PCC_UPLD_CTRL); | 867 | omap_writew(omap_readw(OMAP7XX_PCC_UPLD_CTRL) & ~0x1, OMAP7XX_PCC_UPLD_CTRL); |
| 866 | #endif | 868 | #endif |
| 867 | 869 | ||
| 868 | /* Amstrad Delta wants BCLK high when inactive */ | 870 | /* Amstrad Delta wants BCLK high when inactive */ |
| @@ -873,7 +875,7 @@ int __init omap1_clk_init(void) | |||
| 873 | 875 | ||
| 874 | /* Turn off DSP and ARM_TIMXO. Make sure ARM_INTHCK is not divided */ | 876 | /* Turn off DSP and ARM_TIMXO. Make sure ARM_INTHCK is not divided */ |
| 875 | /* (on 730, bit 13 must not be cleared) */ | 877 | /* (on 730, bit 13 must not be cleared) */ |
| 876 | if (cpu_is_omap730()) | 878 | if (cpu_is_omap7xx()) |
| 877 | omap_writew(omap_readw(ARM_CKCTL) & 0x2fff, ARM_CKCTL); | 879 | omap_writew(omap_readw(ARM_CKCTL) & 0x2fff, ARM_CKCTL); |
| 878 | else | 880 | else |
| 879 | omap_writew(omap_readw(ARM_CKCTL) & 0x0fff, ARM_CKCTL); | 881 | omap_writew(omap_readw(ARM_CKCTL) & 0x0fff, ARM_CKCTL); |
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h index 17f87427125..29ffa97dc7f 100644 --- a/arch/arm/mach-omap1/clock.h +++ b/arch/arm/mach-omap1/clock.h | |||
| @@ -574,6 +574,16 @@ static struct clk usb_dc_ck = { | |||
| 574 | .enable_bit = 4, | 574 | .enable_bit = 4, |
| 575 | }; | 575 | }; |
| 576 | 576 | ||
| 577 | static struct clk usb_dc_ck7xx = { | ||
| 578 | .name = "usb_dc_ck", | ||
| 579 | .ops = &clkops_generic, | ||
| 580 | /* Direct from ULPD, no parent */ | ||
| 581 | .rate = 48000000, | ||
| 582 | .flags = RATE_FIXED, | ||
| 583 | .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), | ||
| 584 | .enable_bit = 8, | ||
| 585 | }; | ||
| 586 | |||
| 577 | static struct clk mclk_1510 = { | 587 | static struct clk mclk_1510 = { |
| 578 | .name = "mclk", | 588 | .name = "mclk", |
| 579 | .ops = &clkops_generic, | 589 | .ops = &clkops_generic, |
| @@ -637,6 +647,18 @@ static struct clk mmc2_ck = { | |||
| 637 | .enable_bit = 20, | 647 | .enable_bit = 20, |
| 638 | }; | 648 | }; |
| 639 | 649 | ||
| 650 | static struct clk mmc3_ck = { | ||
| 651 | .name = "mmc_ck", | ||
| 652 | .id = 2, | ||
| 653 | .ops = &clkops_generic, | ||
| 654 | /* Functional clock is direct from ULPD, interface clock is ARMPER */ | ||
| 655 | .parent = &armper_ck.clk, | ||
| 656 | .rate = 48000000, | ||
| 657 | .flags = RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, | ||
| 658 | .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), | ||
| 659 | .enable_bit = 12, | ||
| 660 | }; | ||
| 661 | |||
| 640 | static struct clk virtual_ck_mpu = { | 662 | static struct clk virtual_ck_mpu = { |
| 641 | .name = "mpu", | 663 | .name = "mpu", |
| 642 | .ops = &clkops_null, | 664 | .ops = &clkops_null, |
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c index 06808434ea0..23ded2d4960 100644 --- a/arch/arm/mach-omap1/devices.c +++ b/arch/arm/mach-omap1/devices.c | |||
| @@ -18,11 +18,11 @@ | |||
| 18 | #include <mach/hardware.h> | 18 | #include <mach/hardware.h> |
| 19 | #include <asm/mach/map.h> | 19 | #include <asm/mach/map.h> |
| 20 | 20 | ||
| 21 | #include <mach/tc.h> | 21 | #include <plat/tc.h> |
| 22 | #include <mach/board.h> | 22 | #include <plat/board.h> |
| 23 | #include <mach/mux.h> | 23 | #include <plat/mux.h> |
| 24 | #include <mach/gpio.h> | 24 | #include <mach/gpio.h> |
| 25 | #include <mach/mmc.h> | 25 | #include <plat/mmc.h> |
| 26 | 26 | ||
| 27 | /*-------------------------------------------------------------------------*/ | 27 | /*-------------------------------------------------------------------------*/ |
| 28 | 28 | ||
| @@ -108,15 +108,22 @@ static inline void omap1_mmc_mux(struct omap_mmc_platform_data *mmc_controller, | |||
| 108 | int controller_nr) | 108 | int controller_nr) |
| 109 | { | 109 | { |
| 110 | if (controller_nr == 0) { | 110 | if (controller_nr == 0) { |
| 111 | omap_cfg_reg(MMC_CMD); | 111 | if (cpu_is_omap7xx()) { |
| 112 | omap_cfg_reg(MMC_CLK); | 112 | omap_cfg_reg(MMC_7XX_CMD); |
| 113 | omap_cfg_reg(MMC_DAT0); | 113 | omap_cfg_reg(MMC_7XX_CLK); |
| 114 | omap_cfg_reg(MMC_7XX_DAT0); | ||
| 115 | } else { | ||
| 116 | omap_cfg_reg(MMC_CMD); | ||
| 117 | omap_cfg_reg(MMC_CLK); | ||
| 118 | omap_cfg_reg(MMC_DAT0); | ||
| 119 | } | ||
| 120 | |||
| 114 | if (cpu_is_omap1710()) { | 121 | if (cpu_is_omap1710()) { |
| 115 | omap_cfg_reg(M15_1710_MMC_CLKI); | 122 | omap_cfg_reg(M15_1710_MMC_CLKI); |
| 116 | omap_cfg_reg(P19_1710_MMC_CMDDIR); | 123 | omap_cfg_reg(P19_1710_MMC_CMDDIR); |
| 117 | omap_cfg_reg(P20_1710_MMC_DATDIR0); | 124 | omap_cfg_reg(P20_1710_MMC_DATDIR0); |
| 118 | } | 125 | } |
| 119 | if (mmc_controller->slots[0].wires == 4) { | 126 | if (mmc_controller->slots[0].wires == 4 && !cpu_is_omap7xx()) { |
| 120 | omap_cfg_reg(MMC_DAT1); | 127 | omap_cfg_reg(MMC_DAT1); |
| 121 | /* NOTE: DAT2 can be on W10 (here) or M15 */ | 128 | /* NOTE: DAT2 can be on W10 (here) or M15 */ |
| 122 | if (!mmc_controller->slots[0].nomux) | 129 | if (!mmc_controller->slots[0].nomux) |
diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c index 4f2b8a7adb1..5cfce1636da 100644 --- a/arch/arm/mach-omap1/fpga.c +++ b/arch/arm/mach-omap1/fpga.c | |||
| @@ -27,7 +27,7 @@ | |||
| 27 | #include <asm/irq.h> | 27 | #include <asm/irq.h> |
| 28 | #include <asm/mach/irq.h> | 28 | #include <asm/mach/irq.h> |
| 29 | 29 | ||
| 30 | #include <mach/fpga.h> | 30 | #include <plat/fpga.h> |
| 31 | #include <mach/gpio.h> | 31 | #include <mach/gpio.h> |
| 32 | 32 | ||
| 33 | static void fpga_mask_irq(unsigned int irq) | 33 | static void fpga_mask_irq(unsigned int irq) |
diff --git a/arch/arm/mach-omap1/id.c b/arch/arm/mach-omap1/id.c index e5dcdf764c9..a0e3560b39d 100644 --- a/arch/arm/mach-omap1/id.c +++ b/arch/arm/mach-omap1/id.c | |||
| @@ -15,7 +15,7 @@ | |||
| 15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
| 16 | #include <linux/init.h> | 16 | #include <linux/init.h> |
| 17 | #include <linux/io.h> | 17 | #include <linux/io.h> |
| 18 | #include <mach/cpu.h> | 18 | #include <plat/cpu.h> |
| 19 | 19 | ||
| 20 | #define OMAP_DIE_ID_0 0xfffe1800 | 20 | #define OMAP_DIE_ID_0 0xfffe1800 |
| 21 | #define OMAP_DIE_ID_1 0xfffe1804 | 21 | #define OMAP_DIE_ID_1 0xfffe1804 |
diff --git a/arch/arm/mach-omap1/include/mach/clkdev.h b/arch/arm/mach-omap1/include/mach/clkdev.h new file mode 100644 index 00000000000..ea8640e4603 --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/clkdev.h | |||
| @@ -0,0 +1,5 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-omap1/include/mach/clkdev.h | ||
| 3 | */ | ||
| 4 | |||
| 5 | #include <plat/clkdev.h> | ||
diff --git a/arch/arm/mach-omap1/include/mach/debug-macro.S b/arch/arm/mach-omap1/include/mach/debug-macro.S new file mode 100644 index 00000000000..aedb746fc33 --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/debug-macro.S | |||
| @@ -0,0 +1,45 @@ | |||
| 1 | /* arch/arm/mach-omap1/include/mach/debug-macro.S | ||
| 2 | * | ||
| 3 | * Debugging macro include header | ||
| 4 | * | ||
| 5 | * Copyright (C) 1994-1999 Russell King | ||
| 6 | * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | * | ||
| 12 | */ | ||
| 13 | |||
| 14 | .macro addruart,rx | ||
| 15 | mrc p15, 0, \rx, c1, c0 | ||
| 16 | tst \rx, #1 @ MMU enabled? | ||
| 17 | moveq \rx, #0xff000000 @ physical base address | ||
| 18 | movne \rx, #0xfe000000 @ virtual base | ||
| 19 | orr \rx, \rx, #0x00fb0000 | ||
| 20 | #ifdef CONFIG_OMAP_LL_DEBUG_UART3 | ||
| 21 | orr \rx, \rx, #0x00009000 @ UART 3 | ||
| 22 | #endif | ||
| 23 | #if defined(CONFIG_OMAP_LL_DEBUG_UART2) || defined(CONFIG_OMAP_LL_DEBUG_UART3) | ||
| 24 | orr \rx, \rx, #0x00000800 @ UART 2 & 3 | ||
| 25 | #endif | ||
| 26 | .endm | ||
| 27 | |||
| 28 | .macro senduart,rd,rx | ||
| 29 | strb \rd, [\rx] | ||
| 30 | .endm | ||
| 31 | |||
| 32 | .macro busyuart,rd,rx | ||
| 33 | 1001: ldrb \rd, [\rx, #(0x5 << 2)] @ OMAP-1510 and friends | ||
| 34 | and \rd, \rd, #0x60 | ||
| 35 | teq \rd, #0x60 | ||
| 36 | beq 1002f | ||
| 37 | ldrb \rd, [\rx, #(0x5 << 0)] @ OMAP-730 only | ||
| 38 | and \rd, \rd, #0x60 | ||
| 39 | teq \rd, #0x60 | ||
| 40 | bne 1001b | ||
| 41 | 1002: | ||
| 42 | .endm | ||
| 43 | |||
| 44 | .macro waituart,rd,rx | ||
| 45 | .endm | ||
diff --git a/arch/arm/mach-omap1/include/mach/entry-macro.S b/arch/arm/mach-omap1/include/mach/entry-macro.S new file mode 100644 index 00000000000..df9060edda2 --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/entry-macro.S | |||
| @@ -0,0 +1,58 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-omap1/include/mach/entry-macro.S | ||
| 3 | * | ||
| 4 | * Low-level IRQ helper macros for OMAP-based platforms | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Texas Instruments | ||
| 7 | * | ||
| 8 | * This file is licensed under the terms of the GNU General Public | ||
| 9 | * License version 2. This program is licensed "as is" without any | ||
| 10 | * warranty of any kind, whether express or implied. | ||
| 11 | */ | ||
| 12 | #include <mach/hardware.h> | ||
| 13 | #include <mach/io.h> | ||
| 14 | #include <mach/irqs.h> | ||
| 15 | #include <asm/hardware/gic.h> | ||
| 16 | |||
| 17 | #if (defined(CONFIG_ARCH_OMAP730)||defined(CONFIG_ARCH_OMAP850)) && \ | ||
| 18 | (defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)) | ||
| 19 | #error "FIXME: OMAP7XX doesn't support multiple-OMAP" | ||
| 20 | #elif defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) | ||
| 21 | #define INT_IH2_IRQ INT_7XX_IH2_IRQ | ||
| 22 | #elif defined(CONFIG_ARCH_OMAP15XX) | ||
| 23 | #define INT_IH2_IRQ INT_1510_IH2_IRQ | ||
| 24 | #elif defined(CONFIG_ARCH_OMAP16XX) | ||
| 25 | #define INT_IH2_IRQ INT_1610_IH2_IRQ | ||
| 26 | #else | ||
| 27 | #warning "IH2 IRQ defaulted" | ||
| 28 | #define INT_IH2_IRQ INT_1510_IH2_IRQ | ||
| 29 | #endif | ||
| 30 | |||
| 31 | .macro disable_fiq | ||
| 32 | .endm | ||
| 33 | |||
| 34 | .macro get_irqnr_preamble, base, tmp | ||
| 35 | .endm | ||
| 36 | |||
| 37 | .macro arch_ret_to_user, tmp1, tmp2 | ||
| 38 | .endm | ||
| 39 | |||
| 40 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
| 41 | ldr \base, =OMAP1_IO_ADDRESS(OMAP_IH1_BASE) | ||
| 42 | ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET] | ||
| 43 | ldr \tmp, [\base, #IRQ_MIR_REG_OFFSET] | ||
| 44 | mov \irqstat, #0xffffffff | ||
| 45 | bic \tmp, \irqstat, \tmp | ||
| 46 | tst \irqnr, \tmp | ||
| 47 | beq 1510f | ||
| 48 | |||
| 49 | ldr \irqnr, [\base, #IRQ_SIR_FIQ_REG_OFFSET] | ||
| 50 | cmp \irqnr, #0 | ||
| 51 | ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET] | ||
| 52 | cmpeq \irqnr, #INT_IH2_IRQ | ||
| 53 | ldreq \base, =OMAP1_IO_ADDRESS(OMAP_IH2_BASE) | ||
| 54 | ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET] | ||
| 55 | addeqs \irqnr, \irqnr, #32 | ||
| 56 | 1510: | ||
| 57 | .endm | ||
| 58 | |||
diff --git a/arch/arm/mach-omap1/include/mach/gpio.h b/arch/arm/mach-omap1/include/mach/gpio.h new file mode 100644 index 00000000000..e737706a8fe --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/gpio.h | |||
| @@ -0,0 +1,5 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-omap1/include/mach/gpio.h | ||
| 3 | */ | ||
| 4 | |||
| 5 | #include <plat/gpio.h> | ||
diff --git a/arch/arm/mach-omap1/include/mach/hardware.h b/arch/arm/mach-omap1/include/mach/hardware.h new file mode 100644 index 00000000000..a3f6287b200 --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/hardware.h | |||
| @@ -0,0 +1,5 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-omap1/include/mach/hardware.h | ||
| 3 | */ | ||
| 4 | |||
| 5 | #include <plat/hardware.h> | ||
diff --git a/arch/arm/mach-omap1/include/mach/io.h b/arch/arm/mach-omap1/include/mach/io.h new file mode 100644 index 00000000000..57bdf74a3e6 --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/io.h | |||
| @@ -0,0 +1,5 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-omap1/include/mach/io.h | ||
| 3 | */ | ||
| 4 | |||
| 5 | #include <plat/io.h> | ||
diff --git a/arch/arm/mach-omap1/include/mach/irqs.h b/arch/arm/mach-omap1/include/mach/irqs.h new file mode 100644 index 00000000000..9292fdc1cb0 --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/irqs.h | |||
| @@ -0,0 +1,5 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-omap1/include/mach/irqs.h | ||
| 3 | */ | ||
| 4 | |||
| 5 | #include <plat/irqs.h> | ||
diff --git a/arch/arm/mach-omap1/include/mach/memory.h b/arch/arm/mach-omap1/include/mach/memory.h new file mode 100644 index 00000000000..e9b600c113e --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/memory.h | |||
| @@ -0,0 +1,5 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-omap1/include/mach/memory.h | ||
| 3 | */ | ||
| 4 | |||
| 5 | #include <plat/memory.h> | ||
diff --git a/arch/arm/plat-omap/include/mach/mtd-xip.h b/arch/arm/mach-omap1/include/mach/mtd-xip.h index f82a8dcaad9..f82a8dcaad9 100644 --- a/arch/arm/plat-omap/include/mach/mtd-xip.h +++ b/arch/arm/mach-omap1/include/mach/mtd-xip.h | |||
diff --git a/arch/arm/mach-omap1/include/mach/smp.h b/arch/arm/mach-omap1/include/mach/smp.h new file mode 100644 index 00000000000..80a371c06e5 --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/smp.h | |||
| @@ -0,0 +1,5 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-omap1/include/mach/smp.h | ||
| 3 | */ | ||
| 4 | |||
| 5 | #include <plat/smp.h> | ||
diff --git a/arch/arm/mach-omap1/include/mach/system.h b/arch/arm/mach-omap1/include/mach/system.h new file mode 100644 index 00000000000..a6c1b3a16df --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/system.h | |||
| @@ -0,0 +1,5 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-omap1/include/mach/system.h | ||
| 3 | */ | ||
| 4 | |||
| 5 | #include <plat/system.h> | ||
diff --git a/arch/arm/mach-omap1/include/mach/timex.h b/arch/arm/mach-omap1/include/mach/timex.h new file mode 100644 index 00000000000..4793790d53c --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/timex.h | |||
| @@ -0,0 +1,5 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-omap1/include/mach/timex.h | ||
| 3 | */ | ||
| 4 | |||
| 5 | #include <plat/timex.h> | ||
diff --git a/arch/arm/mach-omap1/include/mach/uncompress.h b/arch/arm/mach-omap1/include/mach/uncompress.h new file mode 100644 index 00000000000..0ff22dc075c --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/uncompress.h | |||
| @@ -0,0 +1,5 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-omap1/include/mach/uncompress.h | ||
| 3 | */ | ||
| 4 | |||
| 5 | #include <plat/uncompress.h> | ||
diff --git a/arch/arm/mach-omap1/include/mach/vmalloc.h b/arch/arm/mach-omap1/include/mach/vmalloc.h new file mode 100644 index 00000000000..1b2af14df15 --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/vmalloc.h | |||
| @@ -0,0 +1,20 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-omap1/include/mach/vmalloc.h | ||
| 3 | * | ||
| 4 | * Copyright (C) 2000 Russell King. | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License as published by | ||
| 8 | * the Free Software Foundation; either version 2 of the License, or | ||
| 9 | * (at your option) any later version. | ||
| 10 | * | ||
| 11 | * This program is distributed in the hope that it will be useful, | ||
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 14 | * GNU General Public License for more details. | ||
| 15 | * | ||
| 16 | * You should have received a copy of the GNU General Public License | ||
| 17 | * along with this program; if not, write to the Free Software | ||
| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 19 | */ | ||
| 20 | #define VMALLOC_END (PAGE_OFFSET + 0x18000000) | ||
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c index 7030f9281ea..2a6d68aa348 100644 --- a/arch/arm/mach-omap1/io.c +++ b/arch/arm/mach-omap1/io.c | |||
| @@ -15,8 +15,8 @@ | |||
| 15 | 15 | ||
| 16 | #include <asm/tlb.h> | 16 | #include <asm/tlb.h> |
| 17 | #include <asm/mach/map.h> | 17 | #include <asm/mach/map.h> |
| 18 | #include <mach/mux.h> | 18 | #include <plat/mux.h> |
| 19 | #include <mach/tc.h> | 19 | #include <plat/tc.h> |
| 20 | 20 | ||
| 21 | extern int omap1_clk_init(void); | 21 | extern int omap1_clk_init(void); |
| 22 | extern void omap_check_revision(void); | 22 | extern void omap_check_revision(void); |
| @@ -36,33 +36,17 @@ static struct map_desc omap_io_desc[] __initdata = { | |||
| 36 | } | 36 | } |
| 37 | }; | 37 | }; |
| 38 | 38 | ||
| 39 | #ifdef CONFIG_ARCH_OMAP730 | 39 | #if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850) |
| 40 | static struct map_desc omap730_io_desc[] __initdata = { | 40 | static struct map_desc omap7xx_io_desc[] __initdata = { |
| 41 | { | 41 | { |
| 42 | .virtual = OMAP730_DSP_BASE, | 42 | .virtual = OMAP7XX_DSP_BASE, |
| 43 | .pfn = __phys_to_pfn(OMAP730_DSP_START), | 43 | .pfn = __phys_to_pfn(OMAP7XX_DSP_START), |
| 44 | .length = OMAP730_DSP_SIZE, | 44 | .length = OMAP7XX_DSP_SIZE, |
| 45 | .type = MT_DEVICE | 45 | .type = MT_DEVICE |
| 46 | }, { | 46 | }, { |
| 47 | .virtual = OMAP730_DSPREG_BASE, | 47 | .virtual = OMAP7XX_DSPREG_BASE, |
| 48 | .pfn = __phys_to_pfn(OMAP730_DSPREG_START), | 48 | .pfn = __phys_to_pfn(OMAP7XX_DSPREG_START), |
| 49 | .length = OMAP730_DSPREG_SIZE, | 49 | .length = OMAP7XX_DSPREG_SIZE, |
| 50 | .type = MT_DEVICE | ||
| 51 | } | ||
| 52 | }; | ||
| 53 | #endif | ||
| 54 | |||
| 55 | #ifdef CONFIG_ARCH_OMAP850 | ||
| 56 | static struct map_desc omap850_io_desc[] __initdata = { | ||
| 57 | { | ||
| 58 | .virtual = OMAP850_DSP_BASE, | ||
| 59 | .pfn = __phys_to_pfn(OMAP850_DSP_START), | ||
| 60 | .length = OMAP850_DSP_SIZE, | ||
| 61 | .type = MT_DEVICE | ||
| 62 | }, { | ||
| 63 | .virtual = OMAP850_DSPREG_BASE, | ||
| 64 | .pfn = __phys_to_pfn(OMAP850_DSPREG_START), | ||
| 65 | .length = OMAP850_DSPREG_SIZE, | ||
| 66 | .type = MT_DEVICE | 50 | .type = MT_DEVICE |
| 67 | } | 51 | } |
| 68 | }; | 52 | }; |
| @@ -120,18 +104,11 @@ void __init omap1_map_common_io(void) | |||
| 120 | */ | 104 | */ |
| 121 | omap_check_revision(); | 105 | omap_check_revision(); |
| 122 | 106 | ||
| 123 | #ifdef CONFIG_ARCH_OMAP730 | 107 | #if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850) |
| 124 | if (cpu_is_omap730()) { | 108 | if (cpu_is_omap7xx()) { |
| 125 | iotable_init(omap730_io_desc, ARRAY_SIZE(omap730_io_desc)); | 109 | iotable_init(omap7xx_io_desc, ARRAY_SIZE(omap7xx_io_desc)); |
| 126 | } | ||
| 127 | #endif | ||
| 128 | |||
| 129 | #ifdef CONFIG_ARCH_OMAP850 | ||
| 130 | if (cpu_is_omap850()) { | ||
| 131 | iotable_init(omap850_io_desc, ARRAY_SIZE(omap850_io_desc)); | ||
| 132 | } | 110 | } |
| 133 | #endif | 111 | #endif |
| 134 | |||
| 135 | #ifdef CONFIG_ARCH_OMAP15XX | 112 | #ifdef CONFIG_ARCH_OMAP15XX |
| 136 | if (cpu_is_omap15xx()) { | 113 | if (cpu_is_omap15xx()) { |
| 137 | iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc)); | 114 | iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc)); |
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c index de03c844899..db913c34d1f 100644 --- a/arch/arm/mach-omap1/irq.c +++ b/arch/arm/mach-omap1/irq.c | |||
| @@ -46,7 +46,7 @@ | |||
| 46 | #include <asm/irq.h> | 46 | #include <asm/irq.h> |
| 47 | #include <asm/mach/irq.h> | 47 | #include <asm/mach/irq.h> |
| 48 | #include <mach/gpio.h> | 48 | #include <mach/gpio.h> |
| 49 | #include <mach/cpu.h> | 49 | #include <plat/cpu.h> |
| 50 | 50 | ||
| 51 | #define IRQ_BANK(irq) ((irq) >> 5) | 51 | #define IRQ_BANK(irq) ((irq) >> 5) |
| 52 | #define IRQ_BIT(irq) ((irq) & 0x1f) | 52 | #define IRQ_BIT(irq) ((irq) & 0x1f) |
| @@ -137,16 +137,8 @@ static void omap_irq_set_cfg(int irq, int fiq, int priority, int trigger) | |||
| 137 | irq_bank_writel(val, bank, offset); | 137 | irq_bank_writel(val, bank, offset); |
| 138 | } | 138 | } |
| 139 | 139 | ||
| 140 | #ifdef CONFIG_ARCH_OMAP730 | 140 | #if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850) |
| 141 | static struct omap_irq_bank omap730_irq_banks[] = { | 141 | static struct omap_irq_bank omap7xx_irq_banks[] = { |
| 142 | { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3f8e22f }, | ||
| 143 | { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb9c1f2 }, | ||
| 144 | { .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0x800040f3 }, | ||
| 145 | }; | ||
| 146 | #endif | ||
| 147 | |||
| 148 | #ifdef CONFIG_ARCH_OMAP850 | ||
| 149 | static struct omap_irq_bank omap850_irq_banks[] = { | ||
| 150 | { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3f8e22f }, | 142 | { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3f8e22f }, |
| 151 | { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb9c1f2 }, | 143 | { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb9c1f2 }, |
| 152 | { .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0x800040f3 }, | 144 | { .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0x800040f3 }, |
| @@ -186,16 +178,10 @@ void __init omap_init_irq(void) | |||
| 186 | { | 178 | { |
| 187 | int i, j; | 179 | int i, j; |
| 188 | 180 | ||
| 189 | #ifdef CONFIG_ARCH_OMAP730 | 181 | #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) |
| 190 | if (cpu_is_omap730()) { | 182 | if (cpu_is_omap7xx()) { |
| 191 | irq_banks = omap730_irq_banks; | 183 | irq_banks = omap7xx_irq_banks; |
| 192 | irq_bank_count = ARRAY_SIZE(omap730_irq_banks); | 184 | irq_bank_count = ARRAY_SIZE(omap7xx_irq_banks); |
| 193 | } | ||
| 194 | #endif | ||
| 195 | #ifdef CONFIG_ARCH_OMAP850 | ||
| 196 | if (cpu_is_omap850()) { | ||
| 197 | irq_banks = omap850_irq_banks; | ||
| 198 | irq_bank_count = ARRAY_SIZE(omap850_irq_banks); | ||
| 199 | } | 185 | } |
| 200 | #endif | 186 | #endif |
| 201 | #ifdef CONFIG_ARCH_OMAP15XX | 187 | #ifdef CONFIG_ARCH_OMAP15XX |
| @@ -247,10 +233,8 @@ void __init omap_init_irq(void) | |||
| 247 | 233 | ||
| 248 | /* Unmask level 2 handler */ | 234 | /* Unmask level 2 handler */ |
| 249 | 235 | ||
| 250 | if (cpu_is_omap730()) | 236 | if (cpu_is_omap7xx()) |
| 251 | omap_unmask_irq(INT_730_IH2_IRQ); | 237 | omap_unmask_irq(INT_7XX_IH2_IRQ); |
| 252 | else if (cpu_is_omap850()) | ||
| 253 | omap_unmask_irq(INT_850_IH2_IRQ); | ||
| 254 | else if (cpu_is_omap15xx()) | 238 | else if (cpu_is_omap15xx()) |
| 255 | omap_unmask_irq(INT_1510_IH2_IRQ); | 239 | omap_unmask_irq(INT_1510_IH2_IRQ); |
| 256 | else if (cpu_is_omap16xx()) | 240 | else if (cpu_is_omap16xx()) |
diff --git a/arch/arm/mach-omap1/leds-h2p2-debug.c b/arch/arm/mach-omap1/leds-h2p2-debug.c index 17c9d0e0421..b4f9be52e1e 100644 --- a/arch/arm/mach-omap1/leds-h2p2-debug.c +++ b/arch/arm/mach-omap1/leds-h2p2-debug.c | |||
| @@ -19,7 +19,7 @@ | |||
| 19 | #include <asm/system.h> | 19 | #include <asm/system.h> |
| 20 | #include <asm/mach-types.h> | 20 | #include <asm/mach-types.h> |
| 21 | 21 | ||
| 22 | #include <mach/fpga.h> | 22 | #include <plat/fpga.h> |
| 23 | #include <mach/gpio.h> | 23 | #include <mach/gpio.h> |
| 24 | 24 | ||
| 25 | #include "leds.h" | 25 | #include "leds.h" |
diff --git a/arch/arm/mach-omap1/leds.c b/arch/arm/mach-omap1/leds.c index 8cbf2562dca..277f356d4cd 100644 --- a/arch/arm/mach-omap1/leds.c +++ b/arch/arm/mach-omap1/leds.c | |||
| @@ -10,7 +10,7 @@ | |||
| 10 | #include <asm/mach-types.h> | 10 | #include <asm/mach-types.h> |
| 11 | 11 | ||
| 12 | #include <mach/gpio.h> | 12 | #include <mach/gpio.h> |
| 13 | #include <mach/mux.h> | 13 | #include <plat/mux.h> |
| 14 | 14 | ||
| 15 | #include "leds.h" | 15 | #include "leds.h" |
| 16 | 16 | ||
diff --git a/arch/arm/mach-omap1/mailbox.c b/arch/arm/mach-omap1/mailbox.c index 6810b4aeb02..caf889aaa24 100644 --- a/arch/arm/mach-omap1/mailbox.c +++ b/arch/arm/mach-omap1/mailbox.c | |||
| @@ -14,7 +14,7 @@ | |||
| 14 | #include <linux/interrupt.h> | 14 | #include <linux/interrupt.h> |
| 15 | #include <linux/platform_device.h> | 15 | #include <linux/platform_device.h> |
| 16 | #include <linux/io.h> | 16 | #include <linux/io.h> |
| 17 | #include <mach/mailbox.h> | 17 | #include <plat/mailbox.h> |
| 18 | #include <mach/irqs.h> | 18 | #include <mach/irqs.h> |
| 19 | 19 | ||
| 20 | #define MAILBOX_ARM2DSP1 0x00 | 20 | #define MAILBOX_ARM2DSP1 0x00 |
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index 505d98cfe50..6bddce104ee 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c | |||
| @@ -18,11 +18,11 @@ | |||
| 18 | #include <linux/platform_device.h> | 18 | #include <linux/platform_device.h> |
| 19 | 19 | ||
| 20 | #include <mach/irqs.h> | 20 | #include <mach/irqs.h> |
| 21 | #include <mach/dma.h> | 21 | #include <plat/dma.h> |
| 22 | #include <mach/mux.h> | 22 | #include <plat/mux.h> |
| 23 | #include <mach/cpu.h> | 23 | #include <plat/cpu.h> |
| 24 | #include <mach/mcbsp.h> | 24 | #include <plat/mcbsp.h> |
| 25 | #include <mach/dsp_common.h> | 25 | #include <plat/dsp_common.h> |
| 26 | 26 | ||
| 27 | #define DPS_RSTCT2_PER_EN (1 << 0) | 27 | #define DPS_RSTCT2_PER_EN (1 << 0) |
| 28 | #define DSP_RSTCT2_WD_PER_EN (1 << 1) | 28 | #define DSP_RSTCT2_WD_PER_EN (1 << 1) |
| @@ -79,29 +79,29 @@ static struct omap_mcbsp_ops omap1_mcbsp_ops = { | |||
| 79 | .free = omap1_mcbsp_free, | 79 | .free = omap1_mcbsp_free, |
| 80 | }; | 80 | }; |
| 81 | 81 | ||
| 82 | #ifdef CONFIG_ARCH_OMAP730 | 82 | #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) |
| 83 | static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = { | 83 | static struct omap_mcbsp_platform_data omap7xx_mcbsp_pdata[] = { |
| 84 | { | 84 | { |
| 85 | .phys_base = OMAP730_MCBSP1_BASE, | 85 | .phys_base = OMAP7XX_MCBSP1_BASE, |
| 86 | .dma_rx_sync = OMAP_DMA_MCBSP1_RX, | 86 | .dma_rx_sync = OMAP_DMA_MCBSP1_RX, |
| 87 | .dma_tx_sync = OMAP_DMA_MCBSP1_TX, | 87 | .dma_tx_sync = OMAP_DMA_MCBSP1_TX, |
| 88 | .rx_irq = INT_730_McBSP1RX, | 88 | .rx_irq = INT_7XX_McBSP1RX, |
| 89 | .tx_irq = INT_730_McBSP1TX, | 89 | .tx_irq = INT_7XX_McBSP1TX, |
| 90 | .ops = &omap1_mcbsp_ops, | 90 | .ops = &omap1_mcbsp_ops, |
| 91 | }, | 91 | }, |
| 92 | { | 92 | { |
| 93 | .phys_base = OMAP730_MCBSP2_BASE, | 93 | .phys_base = OMAP7XX_MCBSP2_BASE, |
| 94 | .dma_rx_sync = OMAP_DMA_MCBSP3_RX, | 94 | .dma_rx_sync = OMAP_DMA_MCBSP3_RX, |
| 95 | .dma_tx_sync = OMAP_DMA_MCBSP3_TX, | 95 | .dma_tx_sync = OMAP_DMA_MCBSP3_TX, |
| 96 | .rx_irq = INT_730_McBSP2RX, | 96 | .rx_irq = INT_7XX_McBSP2RX, |
| 97 | .tx_irq = INT_730_McBSP2TX, | 97 | .tx_irq = INT_7XX_McBSP2TX, |
| 98 | .ops = &omap1_mcbsp_ops, | 98 | .ops = &omap1_mcbsp_ops, |
| 99 | }, | 99 | }, |
| 100 | }; | 100 | }; |
| 101 | #define OMAP730_MCBSP_PDATA_SZ ARRAY_SIZE(omap730_mcbsp_pdata) | 101 | #define OMAP7XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap7xx_mcbsp_pdata) |
| 102 | #else | 102 | #else |
| 103 | #define omap730_mcbsp_pdata NULL | 103 | #define omap7xx_mcbsp_pdata NULL |
| 104 | #define OMAP730_MCBSP_PDATA_SZ 0 | 104 | #define OMAP7XX_MCBSP_PDATA_SZ 0 |
| 105 | #endif | 105 | #endif |
| 106 | 106 | ||
| 107 | #ifdef CONFIG_ARCH_OMAP15XX | 107 | #ifdef CONFIG_ARCH_OMAP15XX |
| @@ -172,8 +172,8 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { | |||
| 172 | 172 | ||
| 173 | int __init omap1_mcbsp_init(void) | 173 | int __init omap1_mcbsp_init(void) |
| 174 | { | 174 | { |
| 175 | if (cpu_is_omap730()) | 175 | if (cpu_is_omap7xx()) |
| 176 | omap_mcbsp_count = OMAP730_MCBSP_PDATA_SZ; | 176 | omap_mcbsp_count = OMAP7XX_MCBSP_PDATA_SZ; |
| 177 | if (cpu_is_omap15xx()) | 177 | if (cpu_is_omap15xx()) |
| 178 | omap_mcbsp_count = OMAP15XX_MCBSP_PDATA_SZ; | 178 | omap_mcbsp_count = OMAP15XX_MCBSP_PDATA_SZ; |
| 179 | if (cpu_is_omap16xx()) | 179 | if (cpu_is_omap16xx()) |
| @@ -184,9 +184,9 @@ int __init omap1_mcbsp_init(void) | |||
| 184 | if (!mcbsp_ptr) | 184 | if (!mcbsp_ptr) |
| 185 | return -ENOMEM; | 185 | return -ENOMEM; |
| 186 | 186 | ||
| 187 | if (cpu_is_omap730()) | 187 | if (cpu_is_omap7xx()) |
| 188 | omap_mcbsp_register_board_cfg(omap730_mcbsp_pdata, | 188 | omap_mcbsp_register_board_cfg(omap7xx_mcbsp_pdata, |
| 189 | OMAP730_MCBSP_PDATA_SZ); | 189 | OMAP7XX_MCBSP_PDATA_SZ); |
| 190 | 190 | ||
| 191 | if (cpu_is_omap15xx()) | 191 | if (cpu_is_omap15xx()) |
| 192 | omap_mcbsp_register_board_cfg(omap15xx_mcbsp_pdata, | 192 | omap_mcbsp_register_board_cfg(omap15xx_mcbsp_pdata, |
diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c index 721e0d9d8b1..785371e982f 100644 --- a/arch/arm/mach-omap1/mux.c +++ b/arch/arm/mach-omap1/mux.c | |||
| @@ -29,53 +29,39 @@ | |||
| 29 | 29 | ||
| 30 | #include <asm/system.h> | 30 | #include <asm/system.h> |
| 31 | 31 | ||
| 32 | #include <mach/mux.h> | 32 | #include <plat/mux.h> |
| 33 | 33 | ||
| 34 | #ifdef CONFIG_OMAP_MUX | 34 | #ifdef CONFIG_OMAP_MUX |
| 35 | 35 | ||
| 36 | static struct omap_mux_cfg arch_mux_cfg; | 36 | static struct omap_mux_cfg arch_mux_cfg; |
| 37 | 37 | ||
| 38 | #ifdef CONFIG_ARCH_OMAP730 | 38 | #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) |
| 39 | static struct pin_config __initdata_or_module omap730_pins[] = { | 39 | static struct pin_config __initdata_or_module omap7xx_pins[] = { |
| 40 | MUX_CFG_730("E2_730_KBR0", 12, 21, 0, 20, 1, 0) | 40 | MUX_CFG_7XX("E2_7XX_KBR0", 12, 21, 0, 20, 1, 0) |
| 41 | MUX_CFG_730("J7_730_KBR1", 12, 25, 0, 24, 1, 0) | 41 | MUX_CFG_7XX("J7_7XX_KBR1", 12, 25, 0, 24, 1, 0) |
| 42 | MUX_CFG_730("E1_730_KBR2", 12, 29, 0, 28, 1, 0) | 42 | MUX_CFG_7XX("E1_7XX_KBR2", 12, 29, 0, 28, 1, 0) |
| 43 | MUX_CFG_730("F3_730_KBR3", 13, 1, 0, 0, 1, 0) | 43 | MUX_CFG_7XX("F3_7XX_KBR3", 13, 1, 0, 0, 1, 0) |
| 44 | MUX_CFG_730("D2_730_KBR4", 13, 5, 0, 4, 1, 0) | 44 | MUX_CFG_7XX("D2_7XX_KBR4", 13, 5, 0, 4, 1, 0) |
| 45 | MUX_CFG_730("C2_730_KBC0", 13, 9, 0, 8, 1, 0) | 45 | MUX_CFG_7XX("C2_7XX_KBC0", 13, 9, 0, 8, 1, 0) |
| 46 | MUX_CFG_730("D3_730_KBC1", 13, 13, 0, 12, 1, 0) | 46 | MUX_CFG_7XX("D3_7XX_KBC1", 13, 13, 0, 12, 1, 0) |
| 47 | MUX_CFG_730("E4_730_KBC2", 13, 17, 0, 16, 1, 0) | 47 | MUX_CFG_7XX("E4_7XX_KBC2", 13, 17, 0, 16, 1, 0) |
| 48 | MUX_CFG_730("F4_730_KBC3", 13, 21, 0, 20, 1, 0) | 48 | MUX_CFG_7XX("F4_7XX_KBC3", 13, 21, 0, 20, 1, 0) |
| 49 | MUX_CFG_730("E3_730_KBC4", 13, 25, 0, 24, 1, 0) | 49 | MUX_CFG_7XX("E3_7XX_KBC4", 13, 25, 0, 24, 1, 0) |
| 50 | 50 | ||
| 51 | MUX_CFG_730("AA17_730_USB_DM", 2, 21, 0, 20, 0, 0) | 51 | MUX_CFG_7XX("AA17_7XX_USB_DM", 2, 21, 0, 20, 0, 0) |
| 52 | MUX_CFG_730("W16_730_USB_PU_EN", 2, 25, 0, 24, 0, 0) | 52 | MUX_CFG_7XX("W16_7XX_USB_PU_EN", 2, 25, 0, 24, 0, 0) |
| 53 | MUX_CFG_730("W17_730_USB_VBUSI", 2, 29, 0, 28, 0, 0) | 53 | MUX_CFG_7XX("W17_7XX_USB_VBUSI", 2, 29, 0, 28, 0, 0) |
| 54 | |||
| 55 | /* MMC Pins */ | ||
| 56 | MUX_CFG_7XX("MMC_7XX_CMD", 2, 9, 0, 8, 1, 0) | ||
| 57 | MUX_CFG_7XX("MMC_7XX_CLK", 2, 13, 0, 12, 1, 0) | ||
| 58 | MUX_CFG_7XX("MMC_7XX_DAT0", 2, 17, 0, 16, 1, 0) | ||
| 54 | }; | 59 | }; |
| 55 | #define OMAP730_PINS_SZ ARRAY_SIZE(omap730_pins) | 60 | #define OMAP7XX_PINS_SZ ARRAY_SIZE(omap7xx_pins) |
| 56 | #else | 61 | #else |
| 57 | #define omap730_pins NULL | 62 | #define omap7xx_pins NULL |
| 58 | #define OMAP730_PINS_SZ 0 | 63 | #define OMAP7XX_PINS_SZ 0 |
| 59 | #endif /* CONFIG_ARCH_OMAP730 */ | 64 | #endif /* CONFIG_ARCH_OMAP730 || CONFIG_ARCH_OMAP850 */ |
| 60 | |||
| 61 | #ifdef CONFIG_ARCH_OMAP850 | ||
| 62 | struct pin_config __initdata_or_module omap850_pins[] = { | ||
| 63 | MUX_CFG_850("E2_850_KBR0", 12, 21, 0, 20, 1, 0) | ||
| 64 | MUX_CFG_850("J7_850_KBR1", 12, 25, 0, 24, 1, 0) | ||
| 65 | MUX_CFG_850("E1_850_KBR2", 12, 29, 0, 28, 1, 0) | ||
| 66 | MUX_CFG_850("F3_850_KBR3", 13, 1, 0, 0, 1, 0) | ||
| 67 | MUX_CFG_850("D2_850_KBR4", 13, 5, 0, 4, 1, 0) | ||
| 68 | MUX_CFG_850("C2_850_KBC0", 13, 9, 0, 8, 1, 0) | ||
| 69 | MUX_CFG_850("D3_850_KBC1", 13, 13, 0, 12, 1, 0) | ||
| 70 | MUX_CFG_850("E4_850_KBC2", 13, 17, 0, 16, 1, 0) | ||
| 71 | MUX_CFG_850("F4_850_KBC3", 13, 21, 0, 20, 1, 0) | ||
| 72 | MUX_CFG_850("E3_850_KBC4", 13, 25, 0, 24, 1, 0) | ||
| 73 | |||
| 74 | MUX_CFG_850("AA17_850_USB_DM", 2, 21, 0, 20, 0, 0) | ||
| 75 | MUX_CFG_850("W16_850_USB_PU_EN", 2, 25, 0, 24, 0, 0) | ||
| 76 | MUX_CFG_850("W17_850_USB_VBUSI", 2, 29, 0, 28, 0, 0) | ||
| 77 | }; | ||
| 78 | #endif | ||
| 79 | 65 | ||
| 80 | #if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) | 66 | #if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) |
| 81 | static struct pin_config __initdata_or_module omap1xxx_pins[] = { | 67 | static struct pin_config __initdata_or_module omap1xxx_pins[] = { |
| @@ -438,11 +424,6 @@ int __init_or_module omap1_cfg_reg(const struct pin_config *cfg) | |||
| 438 | printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n", | 424 | printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n", |
| 439 | cfg->pull_name, cfg->pull_reg, pull_orig, pull); | 425 | cfg->pull_name, cfg->pull_reg, pull_orig, pull); |
| 440 | } | 426 | } |
| 441 | |||
| 442 | #ifdef CONFIG_ARCH_OMAP850 | ||
| 443 | omap_mux_register(omap850_pins, ARRAY_SIZE(omap850_pins)); | ||
| 444 | #endif | ||
| 445 | |||
| 446 | #endif | 427 | #endif |
| 447 | 428 | ||
| 448 | #ifdef CONFIG_OMAP_MUX_ERRORS | 429 | #ifdef CONFIG_OMAP_MUX_ERRORS |
| @@ -454,9 +435,9 @@ int __init_or_module omap1_cfg_reg(const struct pin_config *cfg) | |||
| 454 | 435 | ||
| 455 | int __init omap1_mux_init(void) | 436 | int __init omap1_mux_init(void) |
| 456 | { | 437 | { |
| 457 | if (cpu_is_omap730()) { | 438 | if (cpu_is_omap7xx()) { |
| 458 | arch_mux_cfg.pins = omap730_pins; | 439 | arch_mux_cfg.pins = omap7xx_pins; |
| 459 | arch_mux_cfg.size = OMAP730_PINS_SZ; | 440 | arch_mux_cfg.size = OMAP7XX_PINS_SZ; |
| 460 | arch_mux_cfg.cfg_reg = omap1_cfg_reg; | 441 | arch_mux_cfg.cfg_reg = omap1_cfg_reg; |
| 461 | } | 442 | } |
| 462 | 443 | ||
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c index 5218943c91c..b1d3f9fade2 100644 --- a/arch/arm/mach-omap1/pm.c +++ b/arch/arm/mach-omap1/pm.c | |||
| @@ -48,21 +48,21 @@ | |||
| 48 | #include <asm/mach/time.h> | 48 | #include <asm/mach/time.h> |
| 49 | #include <asm/mach/irq.h> | 49 | #include <asm/mach/irq.h> |
| 50 | 50 | ||
| 51 | #include <mach/cpu.h> | 51 | #include <plat/cpu.h> |
| 52 | #include <mach/irqs.h> | 52 | #include <mach/irqs.h> |
| 53 | #include <mach/clock.h> | 53 | #include <plat/clock.h> |
| 54 | #include <mach/sram.h> | 54 | #include <plat/sram.h> |
| 55 | #include <mach/tc.h> | 55 | #include <plat/tc.h> |
| 56 | #include <mach/mux.h> | 56 | #include <plat/mux.h> |
| 57 | #include <mach/dma.h> | 57 | #include <plat/dma.h> |
| 58 | #include <mach/dmtimer.h> | 58 | #include <plat/dmtimer.h> |
| 59 | 59 | ||
| 60 | #include "pm.h" | 60 | #include "pm.h" |
| 61 | 61 | ||
| 62 | static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE]; | 62 | static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE]; |
| 63 | static unsigned short dsp_sleep_save[DSP_SLEEP_SAVE_SIZE]; | 63 | static unsigned short dsp_sleep_save[DSP_SLEEP_SAVE_SIZE]; |
| 64 | static unsigned short ulpd_sleep_save[ULPD_SLEEP_SAVE_SIZE]; | 64 | static unsigned short ulpd_sleep_save[ULPD_SLEEP_SAVE_SIZE]; |
| 65 | static unsigned int mpui730_sleep_save[MPUI730_SLEEP_SAVE_SIZE]; | 65 | static unsigned int mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_SIZE]; |
| 66 | static unsigned int mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_SIZE]; | 66 | static unsigned int mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_SIZE]; |
| 67 | static unsigned int mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_SIZE]; | 67 | static unsigned int mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_SIZE]; |
| 68 | 68 | ||
| @@ -183,9 +183,9 @@ static void omap_pm_wakeup_setup(void) | |||
| 183 | * drivers must still separately call omap_set_gpio_wakeup() to | 183 | * drivers must still separately call omap_set_gpio_wakeup() to |
| 184 | * wake up to a GPIO interrupt. | 184 | * wake up to a GPIO interrupt. |
| 185 | */ | 185 | */ |
| 186 | if (cpu_is_omap730()) | 186 | if (cpu_is_omap7xx()) |
| 187 | level1_wake = OMAP_IRQ_BIT(INT_730_GPIO_BANK1) | | 187 | level1_wake = OMAP_IRQ_BIT(INT_7XX_GPIO_BANK1) | |
| 188 | OMAP_IRQ_BIT(INT_730_IH2_IRQ); | 188 | OMAP_IRQ_BIT(INT_7XX_IH2_IRQ); |
| 189 | else if (cpu_is_omap15xx()) | 189 | else if (cpu_is_omap15xx()) |
| 190 | level1_wake = OMAP_IRQ_BIT(INT_GPIO_BANK1) | | 190 | level1_wake = OMAP_IRQ_BIT(INT_GPIO_BANK1) | |
| 191 | OMAP_IRQ_BIT(INT_1510_IH2_IRQ); | 191 | OMAP_IRQ_BIT(INT_1510_IH2_IRQ); |
| @@ -195,10 +195,10 @@ static void omap_pm_wakeup_setup(void) | |||
| 195 | 195 | ||
| 196 | omap_writel(~level1_wake, OMAP_IH1_MIR); | 196 | omap_writel(~level1_wake, OMAP_IH1_MIR); |
| 197 | 197 | ||
| 198 | if (cpu_is_omap730()) { | 198 | if (cpu_is_omap7xx()) { |
| 199 | omap_writel(~level2_wake, OMAP_IH2_0_MIR); | 199 | omap_writel(~level2_wake, OMAP_IH2_0_MIR); |
| 200 | omap_writel(~(OMAP_IRQ_BIT(INT_730_WAKE_UP_REQ) | | 200 | omap_writel(~(OMAP_IRQ_BIT(INT_7XX_WAKE_UP_REQ) | |
| 201 | OMAP_IRQ_BIT(INT_730_MPUIO_KEYPAD)), | 201 | OMAP_IRQ_BIT(INT_7XX_MPUIO_KEYPAD)), |
| 202 | OMAP_IH2_1_MIR); | 202 | OMAP_IH2_1_MIR); |
| 203 | } else if (cpu_is_omap15xx()) { | 203 | } else if (cpu_is_omap15xx()) { |
| 204 | level2_wake |= OMAP_IRQ_BIT(INT_KEYBOARD); | 204 | level2_wake |= OMAP_IRQ_BIT(INT_KEYBOARD); |
| @@ -253,15 +253,15 @@ void omap1_pm_suspend(void) | |||
| 253 | * Save interrupt, MPUI, ARM and UPLD control registers. | 253 | * Save interrupt, MPUI, ARM and UPLD control registers. |
| 254 | */ | 254 | */ |
| 255 | 255 | ||
| 256 | if (cpu_is_omap730()) { | 256 | if (cpu_is_omap7xx()) { |
| 257 | MPUI730_SAVE(OMAP_IH1_MIR); | 257 | MPUI7XX_SAVE(OMAP_IH1_MIR); |
| 258 | MPUI730_SAVE(OMAP_IH2_0_MIR); | 258 | MPUI7XX_SAVE(OMAP_IH2_0_MIR); |
| 259 | MPUI730_SAVE(OMAP_IH2_1_MIR); | 259 | MPUI7XX_SAVE(OMAP_IH2_1_MIR); |
| 260 | MPUI730_SAVE(MPUI_CTRL); | 260 | MPUI7XX_SAVE(MPUI_CTRL); |
| 261 | MPUI730_SAVE(MPUI_DSP_BOOT_CONFIG); | 261 | MPUI7XX_SAVE(MPUI_DSP_BOOT_CONFIG); |
| 262 | MPUI730_SAVE(MPUI_DSP_API_CONFIG); | 262 | MPUI7XX_SAVE(MPUI_DSP_API_CONFIG); |
| 263 | MPUI730_SAVE(EMIFS_CONFIG); | 263 | MPUI7XX_SAVE(EMIFS_CONFIG); |
| 264 | MPUI730_SAVE(EMIFF_SDRAM_CONFIG); | 264 | MPUI7XX_SAVE(EMIFF_SDRAM_CONFIG); |
| 265 | 265 | ||
| 266 | } else if (cpu_is_omap15xx()) { | 266 | } else if (cpu_is_omap15xx()) { |
| 267 | MPUI1510_SAVE(OMAP_IH1_MIR); | 267 | MPUI1510_SAVE(OMAP_IH1_MIR); |
| @@ -306,7 +306,7 @@ void omap1_pm_suspend(void) | |||
| 306 | omap_writew(omap_readw(ARM_RSTCT1) & ~(1 << DSP_EN), ARM_RSTCT1); | 306 | omap_writew(omap_readw(ARM_RSTCT1) & ~(1 << DSP_EN), ARM_RSTCT1); |
| 307 | 307 | ||
| 308 | /* shut down dsp_ck */ | 308 | /* shut down dsp_ck */ |
| 309 | if (!cpu_is_omap730()) | 309 | if (!cpu_is_omap7xx()) |
| 310 | omap_writew(omap_readw(ARM_CKCTL) & ~(1 << EN_DSPCK), ARM_CKCTL); | 310 | omap_writew(omap_readw(ARM_CKCTL) & ~(1 << EN_DSPCK), ARM_CKCTL); |
| 311 | 311 | ||
| 312 | /* temporarily enabling api_ck to access DSP registers */ | 312 | /* temporarily enabling api_ck to access DSP registers */ |
| @@ -383,12 +383,12 @@ void omap1_pm_suspend(void) | |||
| 383 | ULPD_RESTORE(ULPD_CLOCK_CTRL); | 383 | ULPD_RESTORE(ULPD_CLOCK_CTRL); |
| 384 | ULPD_RESTORE(ULPD_STATUS_REQ); | 384 | ULPD_RESTORE(ULPD_STATUS_REQ); |
| 385 | 385 | ||
| 386 | if (cpu_is_omap730()) { | 386 | if (cpu_is_omap7xx()) { |
| 387 | MPUI730_RESTORE(EMIFS_CONFIG); | 387 | MPUI7XX_RESTORE(EMIFS_CONFIG); |
| 388 | MPUI730_RESTORE(EMIFF_SDRAM_CONFIG); | 388 | MPUI7XX_RESTORE(EMIFF_SDRAM_CONFIG); |
| 389 | MPUI730_RESTORE(OMAP_IH1_MIR); | 389 | MPUI7XX_RESTORE(OMAP_IH1_MIR); |
| 390 | MPUI730_RESTORE(OMAP_IH2_0_MIR); | 390 | MPUI7XX_RESTORE(OMAP_IH2_0_MIR); |
| 391 | MPUI730_RESTORE(OMAP_IH2_1_MIR); | 391 | MPUI7XX_RESTORE(OMAP_IH2_1_MIR); |
| 392 | } else if (cpu_is_omap15xx()) { | 392 | } else if (cpu_is_omap15xx()) { |
| 393 | MPUI1510_RESTORE(MPUI_CTRL); | 393 | MPUI1510_RESTORE(MPUI_CTRL); |
| 394 | MPUI1510_RESTORE(MPUI_DSP_BOOT_CONFIG); | 394 | MPUI1510_RESTORE(MPUI_DSP_BOOT_CONFIG); |
| @@ -461,13 +461,13 @@ static int omap_pm_read_proc( | |||
| 461 | ULPD_SAVE(ULPD_DPLL_CTRL); | 461 | ULPD_SAVE(ULPD_DPLL_CTRL); |
| 462 | ULPD_SAVE(ULPD_POWER_CTRL); | 462 | ULPD_SAVE(ULPD_POWER_CTRL); |
| 463 | 463 | ||
| 464 | if (cpu_is_omap730()) { | 464 | if (cpu_is_omap7xx()) { |
| 465 | MPUI730_SAVE(MPUI_CTRL); | 465 | MPUI7XX_SAVE(MPUI_CTRL); |
| 466 | MPUI730_SAVE(MPUI_DSP_STATUS); | 466 | MPUI7XX_SAVE(MPUI_DSP_STATUS); |
| 467 | MPUI730_SAVE(MPUI_DSP_BOOT_CONFIG); | 467 | MPUI7XX_SAVE(MPUI_DSP_BOOT_CONFIG); |
| 468 | MPUI730_SAVE(MPUI_DSP_API_CONFIG); | 468 | MPUI7XX_SAVE(MPUI_DSP_API_CONFIG); |
| 469 | MPUI730_SAVE(EMIFF_SDRAM_CONFIG); | 469 | MPUI7XX_SAVE(EMIFF_SDRAM_CONFIG); |
| 470 | MPUI730_SAVE(EMIFS_CONFIG); | 470 | MPUI7XX_SAVE(EMIFS_CONFIG); |
| 471 | } else if (cpu_is_omap15xx()) { | 471 | } else if (cpu_is_omap15xx()) { |
| 472 | MPUI1510_SAVE(MPUI_CTRL); | 472 | MPUI1510_SAVE(MPUI_CTRL); |
| 473 | MPUI1510_SAVE(MPUI_DSP_STATUS); | 473 | MPUI1510_SAVE(MPUI_DSP_STATUS); |
| @@ -517,20 +517,20 @@ static int omap_pm_read_proc( | |||
| 517 | ULPD_SHOW(ULPD_STATUS_REQ), | 517 | ULPD_SHOW(ULPD_STATUS_REQ), |
| 518 | ULPD_SHOW(ULPD_POWER_CTRL)); | 518 | ULPD_SHOW(ULPD_POWER_CTRL)); |
| 519 | 519 | ||
| 520 | if (cpu_is_omap730()) { | 520 | if (cpu_is_omap7xx()) { |
| 521 | my_buffer_offset += sprintf(my_base + my_buffer_offset, | 521 | my_buffer_offset += sprintf(my_base + my_buffer_offset, |
| 522 | "MPUI730_CTRL_REG 0x%-8x \n" | 522 | "MPUI7XX_CTRL_REG 0x%-8x \n" |
| 523 | "MPUI730_DSP_STATUS_REG: 0x%-8x \n" | 523 | "MPUI7XX_DSP_STATUS_REG: 0x%-8x \n" |
| 524 | "MPUI730_DSP_BOOT_CONFIG_REG: 0x%-8x \n" | 524 | "MPUI7XX_DSP_BOOT_CONFIG_REG: 0x%-8x \n" |
| 525 | "MPUI730_DSP_API_CONFIG_REG: 0x%-8x \n" | 525 | "MPUI7XX_DSP_API_CONFIG_REG: 0x%-8x \n" |
| 526 | "MPUI730_SDRAM_CONFIG_REG: 0x%-8x \n" | 526 | "MPUI7XX_SDRAM_CONFIG_REG: 0x%-8x \n" |
| 527 | "MPUI730_EMIFS_CONFIG_REG: 0x%-8x \n", | 527 | "MPUI7XX_EMIFS_CONFIG_REG: 0x%-8x \n", |
| 528 | MPUI730_SHOW(MPUI_CTRL), | 528 | MPUI7XX_SHOW(MPUI_CTRL), |
| 529 | MPUI730_SHOW(MPUI_DSP_STATUS), | 529 | MPUI7XX_SHOW(MPUI_DSP_STATUS), |
| 530 | MPUI730_SHOW(MPUI_DSP_BOOT_CONFIG), | 530 | MPUI7XX_SHOW(MPUI_DSP_BOOT_CONFIG), |
| 531 | MPUI730_SHOW(MPUI_DSP_API_CONFIG), | 531 | MPUI7XX_SHOW(MPUI_DSP_API_CONFIG), |
| 532 | MPUI730_SHOW(EMIFF_SDRAM_CONFIG), | 532 | MPUI7XX_SHOW(EMIFF_SDRAM_CONFIG), |
| 533 | MPUI730_SHOW(EMIFS_CONFIG)); | 533 | MPUI7XX_SHOW(EMIFS_CONFIG)); |
| 534 | } else if (cpu_is_omap15xx()) { | 534 | } else if (cpu_is_omap15xx()) { |
| 535 | my_buffer_offset += sprintf(my_base + my_buffer_offset, | 535 | my_buffer_offset += sprintf(my_base + my_buffer_offset, |
| 536 | "MPUI1510_CTRL_REG 0x%-8x \n" | 536 | "MPUI1510_CTRL_REG 0x%-8x \n" |
| @@ -668,9 +668,9 @@ static int __init omap_pm_init(void) | |||
| 668 | * These routines need to be in SRAM as that's the only | 668 | * These routines need to be in SRAM as that's the only |
| 669 | * memory the MPU can see when it wakes up. | 669 | * memory the MPU can see when it wakes up. |
| 670 | */ | 670 | */ |
| 671 | if (cpu_is_omap730()) { | 671 | if (cpu_is_omap7xx()) { |
| 672 | omap_sram_suspend = omap_sram_push(omap730_cpu_suspend, | 672 | omap_sram_suspend = omap_sram_push(omap7xx_cpu_suspend, |
| 673 | omap730_cpu_suspend_sz); | 673 | omap7xx_cpu_suspend_sz); |
| 674 | } else if (cpu_is_omap15xx()) { | 674 | } else if (cpu_is_omap15xx()) { |
| 675 | omap_sram_suspend = omap_sram_push(omap1510_cpu_suspend, | 675 | omap_sram_suspend = omap_sram_push(omap1510_cpu_suspend, |
| 676 | omap1510_cpu_suspend_sz); | 676 | omap1510_cpu_suspend_sz); |
| @@ -686,8 +686,8 @@ static int __init omap_pm_init(void) | |||
| 686 | 686 | ||
| 687 | pm_idle = omap1_pm_idle; | 687 | pm_idle = omap1_pm_idle; |
| 688 | 688 | ||
| 689 | if (cpu_is_omap730()) | 689 | if (cpu_is_omap7xx()) |
| 690 | setup_irq(INT_730_WAKE_UP_REQ, &omap_wakeup_irq); | 690 | setup_irq(INT_7XX_WAKE_UP_REQ, &omap_wakeup_irq); |
| 691 | else if (cpu_is_omap16xx()) | 691 | else if (cpu_is_omap16xx()) |
| 692 | setup_irq(INT_1610_WAKE_UP_REQ, &omap_wakeup_irq); | 692 | setup_irq(INT_1610_WAKE_UP_REQ, &omap_wakeup_irq); |
| 693 | 693 | ||
| @@ -700,8 +700,8 @@ static int __init omap_pm_init(void) | |||
| 700 | omap_writew(ULPD_POWER_CTRL_REG_VAL, ULPD_POWER_CTRL); | 700 | omap_writew(ULPD_POWER_CTRL_REG_VAL, ULPD_POWER_CTRL); |
| 701 | 701 | ||
| 702 | /* Configure IDLECT3 */ | 702 | /* Configure IDLECT3 */ |
| 703 | if (cpu_is_omap730()) | 703 | if (cpu_is_omap7xx()) |
| 704 | omap_writel(OMAP730_IDLECT3_VAL, OMAP730_IDLECT3); | 704 | omap_writel(OMAP7XX_IDLECT3_VAL, OMAP7XX_IDLECT3); |
| 705 | else if (cpu_is_omap16xx()) | 705 | else if (cpu_is_omap16xx()) |
| 706 | omap_writel(OMAP1610_IDLECT3_VAL, OMAP1610_IDLECT3); | 706 | omap_writel(OMAP1610_IDLECT3_VAL, OMAP1610_IDLECT3); |
| 707 | 707 | ||
diff --git a/arch/arm/mach-omap1/pm.h b/arch/arm/mach-omap1/pm.h index c4f05bdcf8a..56a647986ae 100644 --- a/arch/arm/mach-omap1/pm.h +++ b/arch/arm/mach-omap1/pm.h | |||
| @@ -98,13 +98,14 @@ | |||
| 98 | #define OMAP1610_IDLECT3 0xfffece24 | 98 | #define OMAP1610_IDLECT3 0xfffece24 |
| 99 | #define OMAP1610_IDLE_LOOP_REQUEST 0x0400 | 99 | #define OMAP1610_IDLE_LOOP_REQUEST 0x0400 |
| 100 | 100 | ||
| 101 | #define OMAP730_IDLECT1_SLEEP_VAL 0x16c7 | 101 | #define OMAP7XX_IDLECT1_SLEEP_VAL 0x16c7 |
| 102 | #define OMAP730_IDLECT2_SLEEP_VAL 0x09c7 | 102 | #define OMAP7XX_IDLECT2_SLEEP_VAL 0x09c7 |
| 103 | #define OMAP730_IDLECT3_VAL 0x3f | 103 | #define OMAP7XX_IDLECT3_VAL 0x3f |
| 104 | #define OMAP730_IDLECT3 0xfffece24 | 104 | #define OMAP7XX_IDLECT3 0xfffece24 |
| 105 | #define OMAP730_IDLE_LOOP_REQUEST 0x0C00 | 105 | #define OMAP7XX_IDLE_LOOP_REQUEST 0x0C00 |
| 106 | 106 | ||
| 107 | #if !defined(CONFIG_ARCH_OMAP730) && \ | 107 | #if !defined(CONFIG_ARCH_OMAP730) && \ |
| 108 | !defined(CONFIG_ARCH_OMAP850) && \ | ||
| 108 | !defined(CONFIG_ARCH_OMAP15XX) && \ | 109 | !defined(CONFIG_ARCH_OMAP15XX) && \ |
| 109 | !defined(CONFIG_ARCH_OMAP16XX) | 110 | !defined(CONFIG_ARCH_OMAP16XX) |
| 110 | #warning "Power management for this processor not implemented yet" | 111 | #warning "Power management for this processor not implemented yet" |
| @@ -122,17 +123,17 @@ extern void allow_idle_sleep(void); | |||
| 122 | extern void omap1_pm_idle(void); | 123 | extern void omap1_pm_idle(void); |
| 123 | extern void omap1_pm_suspend(void); | 124 | extern void omap1_pm_suspend(void); |
| 124 | 125 | ||
| 125 | extern void omap730_cpu_suspend(unsigned short, unsigned short); | 126 | extern void omap7xx_cpu_suspend(unsigned short, unsigned short); |
| 126 | extern void omap1510_cpu_suspend(unsigned short, unsigned short); | 127 | extern void omap1510_cpu_suspend(unsigned short, unsigned short); |
| 127 | extern void omap1610_cpu_suspend(unsigned short, unsigned short); | 128 | extern void omap1610_cpu_suspend(unsigned short, unsigned short); |
| 128 | extern void omap730_idle_loop_suspend(void); | 129 | extern void omap7xx_idle_loop_suspend(void); |
| 129 | extern void omap1510_idle_loop_suspend(void); | 130 | extern void omap1510_idle_loop_suspend(void); |
| 130 | extern void omap1610_idle_loop_suspend(void); | 131 | extern void omap1610_idle_loop_suspend(void); |
| 131 | 132 | ||
| 132 | extern unsigned int omap730_cpu_suspend_sz; | 133 | extern unsigned int omap7xx_cpu_suspend_sz; |
| 133 | extern unsigned int omap1510_cpu_suspend_sz; | 134 | extern unsigned int omap1510_cpu_suspend_sz; |
| 134 | extern unsigned int omap1610_cpu_suspend_sz; | 135 | extern unsigned int omap1610_cpu_suspend_sz; |
| 135 | extern unsigned int omap730_idle_loop_suspend_sz; | 136 | extern unsigned int omap7xx_idle_loop_suspend_sz; |
| 136 | extern unsigned int omap1510_idle_loop_suspend_sz; | 137 | extern unsigned int omap1510_idle_loop_suspend_sz; |
| 137 | extern unsigned int omap1610_idle_loop_suspend_sz; | 138 | extern unsigned int omap1610_idle_loop_suspend_sz; |
| 138 | 139 | ||
| @@ -155,9 +156,9 @@ extern void omap_serial_wake_trigger(int enable); | |||
| 155 | #define ULPD_RESTORE(x) omap_writew((ulpd_sleep_save[ULPD_SLEEP_SAVE_##x]), (x)) | 156 | #define ULPD_RESTORE(x) omap_writew((ulpd_sleep_save[ULPD_SLEEP_SAVE_##x]), (x)) |
| 156 | #define ULPD_SHOW(x) ulpd_sleep_save[ULPD_SLEEP_SAVE_##x] | 157 | #define ULPD_SHOW(x) ulpd_sleep_save[ULPD_SLEEP_SAVE_##x] |
| 157 | 158 | ||
| 158 | #define MPUI730_SAVE(x) mpui730_sleep_save[MPUI730_SLEEP_SAVE_##x] = omap_readl(x) | 159 | #define MPUI7XX_SAVE(x) mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_##x] = omap_readl(x) |
| 159 | #define MPUI730_RESTORE(x) omap_writel((mpui730_sleep_save[MPUI730_SLEEP_SAVE_##x]), (x)) | 160 | #define MPUI7XX_RESTORE(x) omap_writel((mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_##x]), (x)) |
| 160 | #define MPUI730_SHOW(x) mpui730_sleep_save[MPUI730_SLEEP_SAVE_##x] | 161 | #define MPUI7XX_SHOW(x) mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_##x] |
| 161 | 162 | ||
| 162 | #define MPUI1510_SAVE(x) mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x] = omap_readl(x) | 163 | #define MPUI1510_SAVE(x) mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x] = omap_readl(x) |
| 163 | #define MPUI1510_RESTORE(x) omap_writel((mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x]), (x)) | 164 | #define MPUI1510_RESTORE(x) omap_writel((mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x]), (x)) |
| @@ -232,24 +233,24 @@ enum mpui1510_save_state { | |||
| 232 | #endif | 233 | #endif |
| 233 | }; | 234 | }; |
| 234 | 235 | ||
| 235 | enum mpui730_save_state { | 236 | enum mpui7xx_save_state { |
| 236 | MPUI730_SLEEP_SAVE_START = 0, | 237 | MPUI7XX_SLEEP_SAVE_START = 0, |
| 237 | /* | 238 | /* |
| 238 | * MPUI registers 32 bits | 239 | * MPUI registers 32 bits |
| 239 | */ | 240 | */ |
| 240 | MPUI730_SLEEP_SAVE_MPUI_CTRL, | 241 | MPUI7XX_SLEEP_SAVE_MPUI_CTRL, |
| 241 | MPUI730_SLEEP_SAVE_MPUI_DSP_BOOT_CONFIG, | 242 | MPUI7XX_SLEEP_SAVE_MPUI_DSP_BOOT_CONFIG, |
| 242 | MPUI730_SLEEP_SAVE_MPUI_DSP_API_CONFIG, | 243 | MPUI7XX_SLEEP_SAVE_MPUI_DSP_API_CONFIG, |
| 243 | MPUI730_SLEEP_SAVE_MPUI_DSP_STATUS, | 244 | MPUI7XX_SLEEP_SAVE_MPUI_DSP_STATUS, |
| 244 | MPUI730_SLEEP_SAVE_EMIFF_SDRAM_CONFIG, | 245 | MPUI7XX_SLEEP_SAVE_EMIFF_SDRAM_CONFIG, |
| 245 | MPUI730_SLEEP_SAVE_EMIFS_CONFIG, | 246 | MPUI7XX_SLEEP_SAVE_EMIFS_CONFIG, |
| 246 | MPUI730_SLEEP_SAVE_OMAP_IH1_MIR, | 247 | MPUI7XX_SLEEP_SAVE_OMAP_IH1_MIR, |
| 247 | MPUI730_SLEEP_SAVE_OMAP_IH2_0_MIR, | 248 | MPUI7XX_SLEEP_SAVE_OMAP_IH2_0_MIR, |
| 248 | MPUI730_SLEEP_SAVE_OMAP_IH2_1_MIR, | 249 | MPUI7XX_SLEEP_SAVE_OMAP_IH2_1_MIR, |
| 249 | #if defined(CONFIG_ARCH_OMAP730) | 250 | #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) |
| 250 | MPUI730_SLEEP_SAVE_SIZE | 251 | MPUI7XX_SLEEP_SAVE_SIZE |
| 251 | #else | 252 | #else |
| 252 | MPUI730_SLEEP_SAVE_SIZE = 0 | 253 | MPUI7XX_SLEEP_SAVE_SIZE = 0 |
| 253 | #endif | 254 | #endif |
| 254 | }; | 255 | }; |
| 255 | 256 | ||
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c index d23979bc0fd..6e5207c81cf 100644 --- a/arch/arm/mach-omap1/serial.c +++ b/arch/arm/mach-omap1/serial.c | |||
| @@ -22,10 +22,10 @@ | |||
| 22 | 22 | ||
| 23 | #include <asm/mach-types.h> | 23 | #include <asm/mach-types.h> |
| 24 | 24 | ||
| 25 | #include <mach/board.h> | 25 | #include <plat/board.h> |
| 26 | #include <mach/mux.h> | 26 | #include <plat/mux.h> |
| 27 | #include <mach/gpio.h> | 27 | #include <mach/gpio.h> |
| 28 | #include <mach/fpga.h> | 28 | #include <plat/fpga.h> |
| 29 | 29 | ||
| 30 | static struct clk * uart1_ck; | 30 | static struct clk * uart1_ck; |
| 31 | static struct clk * uart2_ck; | 31 | static struct clk * uart2_ck; |
| @@ -64,7 +64,6 @@ static void __init omap_serial_reset(struct plat_serial8250_port *p) | |||
| 64 | 64 | ||
| 65 | static struct plat_serial8250_port serial_platform_data[] = { | 65 | static struct plat_serial8250_port serial_platform_data[] = { |
| 66 | { | 66 | { |
| 67 | .membase = OMAP1_IO_ADDRESS(OMAP_UART1_BASE), | ||
| 68 | .mapbase = OMAP_UART1_BASE, | 67 | .mapbase = OMAP_UART1_BASE, |
| 69 | .irq = INT_UART1, | 68 | .irq = INT_UART1, |
| 70 | .flags = UPF_BOOT_AUTOCONF, | 69 | .flags = UPF_BOOT_AUTOCONF, |
| @@ -73,7 +72,6 @@ static struct plat_serial8250_port serial_platform_data[] = { | |||
| 73 | .uartclk = OMAP16XX_BASE_BAUD * 16, | 72 | .uartclk = OMAP16XX_BASE_BAUD * 16, |
| 74 | }, | 73 | }, |
| 75 | { | 74 | { |
| 76 | .membase = OMAP1_IO_ADDRESS(OMAP_UART2_BASE), | ||
| 77 | .mapbase = OMAP_UART2_BASE, | 75 | .mapbase = OMAP_UART2_BASE, |
| 78 | .irq = INT_UART2, | 76 | .irq = INT_UART2, |
| 79 | .flags = UPF_BOOT_AUTOCONF, | 77 | .flags = UPF_BOOT_AUTOCONF, |
| @@ -82,7 +80,6 @@ static struct plat_serial8250_port serial_platform_data[] = { | |||
| 82 | .uartclk = OMAP16XX_BASE_BAUD * 16, | 80 | .uartclk = OMAP16XX_BASE_BAUD * 16, |
| 83 | }, | 81 | }, |
| 84 | { | 82 | { |
| 85 | .membase = OMAP1_IO_ADDRESS(OMAP_UART3_BASE), | ||
| 86 | .mapbase = OMAP_UART3_BASE, | 83 | .mapbase = OMAP_UART3_BASE, |
| 87 | .irq = INT_UART3, | 84 | .irq = INT_UART3, |
| 88 | .flags = UPF_BOOT_AUTOCONF, | 85 | .flags = UPF_BOOT_AUTOCONF, |
| @@ -110,18 +107,11 @@ void __init omap_serial_init(void) | |||
| 110 | { | 107 | { |
| 111 | int i; | 108 | int i; |
| 112 | 109 | ||
| 113 | if (cpu_is_omap730()) { | 110 | if (cpu_is_omap7xx()) { |
| 114 | serial_platform_data[0].regshift = 0; | 111 | serial_platform_data[0].regshift = 0; |
| 115 | serial_platform_data[1].regshift = 0; | 112 | serial_platform_data[1].regshift = 0; |
| 116 | serial_platform_data[0].irq = INT_730_UART_MODEM_1; | 113 | serial_platform_data[0].irq = INT_7XX_UART_MODEM_1; |
| 117 | serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2; | 114 | serial_platform_data[1].irq = INT_7XX_UART_MODEM_IRDA_2; |
| 118 | } | ||
| 119 | |||
| 120 | if (cpu_is_omap850()) { | ||
| 121 | serial_platform_data[0].regshift = 0; | ||
| 122 | serial_platform_data[1].regshift = 0; | ||
| 123 | serial_platform_data[0].irq = INT_850_UART_MODEM_1; | ||
| 124 | serial_platform_data[1].irq = INT_850_UART_MODEM_IRDA_2; | ||
| 125 | } | 115 | } |
| 126 | 116 | ||
| 127 | if (cpu_is_omap15xx()) { | 117 | if (cpu_is_omap15xx()) { |
| @@ -130,7 +120,15 @@ void __init omap_serial_init(void) | |||
| 130 | serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16; | 120 | serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16; |
| 131 | } | 121 | } |
| 132 | 122 | ||
| 133 | for (i = 0; i < OMAP_MAX_NR_PORTS; i++) { | 123 | for (i = 0; i < ARRAY_SIZE(serial_platform_data) - 1; i++) { |
| 124 | |||
| 125 | /* Static mapping, never released */ | ||
| 126 | serial_platform_data[i].membase = | ||
| 127 | ioremap(serial_platform_data[i].mapbase, SZ_2K); | ||
| 128 | if (!serial_platform_data[i].membase) { | ||
| 129 | printk(KERN_ERR "Could not ioremap uart%i\n", i); | ||
| 130 | continue; | ||
| 131 | } | ||
| 134 | switch (i) { | 132 | switch (i) { |
| 135 | case 0: | 133 | case 0: |
| 136 | uart1_ck = clk_get(NULL, "uart1_ck"); | 134 | uart1_ck = clk_get(NULL, "uart1_ck"); |
diff --git a/arch/arm/mach-omap1/sleep.S b/arch/arm/mach-omap1/sleep.S index 22e8568339b..ef771ce8b03 100644 --- a/arch/arm/mach-omap1/sleep.S +++ b/arch/arm/mach-omap1/sleep.S | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * linux/arch/arm/mach-omap1/sleep.S | 2 | * linux/arch/arm/mach-omap1/sleep.S |
| 3 | * | 3 | * |
| 4 | * Low-level OMAP730/1510/1610 sleep/wakeUp support | 4 | * Low-level OMAP7XX/1510/1610 sleep/wakeUp support |
| 5 | * | 5 | * |
| 6 | * Initial SA1110 code: | 6 | * Initial SA1110 code: |
| 7 | * Copyright (c) 2001 Cliff Brake <cbrake@accelent.com> | 7 | * Copyright (c) 2001 Cliff Brake <cbrake@accelent.com> |
| @@ -57,8 +57,8 @@ | |||
| 57 | * | 57 | * |
| 58 | */ | 58 | */ |
| 59 | 59 | ||
| 60 | #if defined(CONFIG_ARCH_OMAP730) | 60 | #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) |
| 61 | ENTRY(omap730_cpu_suspend) | 61 | ENTRY(omap7xx_cpu_suspend) |
| 62 | 62 | ||
| 63 | @ save registers on stack | 63 | @ save registers on stack |
| 64 | stmfd sp!, {r0 - r12, lr} | 64 | stmfd sp!, {r0 - r12, lr} |
| @@ -91,13 +91,13 @@ ENTRY(omap730_cpu_suspend) | |||
| 91 | 91 | ||
| 92 | @ turn off clock domains | 92 | @ turn off clock domains |
| 93 | @ do not disable PERCK (0x04) | 93 | @ do not disable PERCK (0x04) |
| 94 | mov r5, #OMAP730_IDLECT2_SLEEP_VAL & 0xff | 94 | mov r5, #OMAP7XX_IDLECT2_SLEEP_VAL & 0xff |
| 95 | orr r5, r5, #OMAP730_IDLECT2_SLEEP_VAL & 0xff00 | 95 | orr r5, r5, #OMAP7XX_IDLECT2_SLEEP_VAL & 0xff00 |
| 96 | strh r5, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff] | 96 | strh r5, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff] |
| 97 | 97 | ||
| 98 | @ request ARM idle | 98 | @ request ARM idle |
| 99 | mov r3, #OMAP730_IDLECT1_SLEEP_VAL & 0xff | 99 | mov r3, #OMAP7XX_IDLECT1_SLEEP_VAL & 0xff |
| 100 | orr r3, r3, #OMAP730_IDLECT1_SLEEP_VAL & 0xff00 | 100 | orr r3, r3, #OMAP7XX_IDLECT1_SLEEP_VAL & 0xff00 |
| 101 | strh r3, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff] | 101 | strh r3, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff] |
| 102 | 102 | ||
| 103 | @ disable instruction cache | 103 | @ disable instruction cache |
| @@ -113,7 +113,7 @@ ENTRY(omap730_cpu_suspend) | |||
| 113 | mov r2, #0 | 113 | mov r2, #0 |
| 114 | mcr p15, 0, r2, c7, c0, 4 @ wait for interrupt | 114 | mcr p15, 0, r2, c7, c0, 4 @ wait for interrupt |
| 115 | /* | 115 | /* |
| 116 | * omap730_cpu_suspend()'s resume point. | 116 | * omap7xx_cpu_suspend()'s resume point. |
| 117 | * | 117 | * |
| 118 | * It will just start executing here, so we'll restore stuff from the | 118 | * It will just start executing here, so we'll restore stuff from the |
| 119 | * stack. | 119 | * stack. |
| @@ -132,9 +132,9 @@ ENTRY(omap730_cpu_suspend) | |||
| 132 | @ restore regs and return | 132 | @ restore regs and return |
| 133 | ldmfd sp!, {r0 - r12, pc} | 133 | ldmfd sp!, {r0 - r12, pc} |
| 134 | 134 | ||
| 135 | ENTRY(omap730_cpu_suspend_sz) | 135 | ENTRY(omap7xx_cpu_suspend_sz) |
| 136 | .word . - omap730_cpu_suspend | 136 | .word . - omap7xx_cpu_suspend |
| 137 | #endif /* CONFIG_ARCH_OMAP730 */ | 137 | #endif /* CONFIG_ARCH_OMAP730 || CONFIG_ARCH_OMAP850 */ |
| 138 | 138 | ||
| 139 | #ifdef CONFIG_ARCH_OMAP15XX | 139 | #ifdef CONFIG_ARCH_OMAP15XX |
| 140 | ENTRY(omap1510_cpu_suspend) | 140 | ENTRY(omap1510_cpu_suspend) |
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c index fd3f7396e16..9ad118563f7 100644 --- a/arch/arm/mach-omap1/timer32k.c +++ b/arch/arm/mach-omap1/timer32k.c | |||
| @@ -52,7 +52,7 @@ | |||
| 52 | #include <asm/irq.h> | 52 | #include <asm/irq.h> |
| 53 | #include <asm/mach/irq.h> | 53 | #include <asm/mach/irq.h> |
| 54 | #include <asm/mach/time.h> | 54 | #include <asm/mach/time.h> |
| 55 | #include <mach/dmtimer.h> | 55 | #include <plat/dmtimer.h> |
| 56 | 56 | ||
| 57 | struct sys_timer omap_timer; | 57 | struct sys_timer omap_timer; |
| 58 | 58 | ||
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index aad194f61a3..7309aab305a 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig | |||
| @@ -65,6 +65,10 @@ config MACH_OMAP3EVM | |||
| 65 | bool "OMAP 3530 EVM board" | 65 | bool "OMAP 3530 EVM board" |
| 66 | depends on ARCH_OMAP3 && ARCH_OMAP34XX | 66 | depends on ARCH_OMAP3 && ARCH_OMAP34XX |
| 67 | 67 | ||
| 68 | config MACH_OMAP3517EVM | ||
| 69 | bool "OMAP3517/ AM3517 EVM board" | ||
| 70 | depends on ARCH_OMAP3 && ARCH_OMAP34XX | ||
| 71 | |||
| 68 | config MACH_OMAP3_PANDORA | 72 | config MACH_OMAP3_PANDORA |
| 69 | bool "OMAP3 Pandora" | 73 | bool "OMAP3 Pandora" |
| 70 | depends on ARCH_OMAP3 && ARCH_OMAP34XX | 74 | depends on ARCH_OMAP3 && ARCH_OMAP34XX |
| @@ -97,6 +101,30 @@ config MACH_OMAP_ZOOM2 | |||
| 97 | bool "OMAP3 Zoom2 board" | 101 | bool "OMAP3 Zoom2 board" |
| 98 | depends on ARCH_OMAP3 && ARCH_OMAP34XX | 102 | depends on ARCH_OMAP3 && ARCH_OMAP34XX |
| 99 | 103 | ||
| 104 | config MACH_OMAP_ZOOM3 | ||
| 105 | bool "OMAP3630 Zoom3 board" | ||
| 106 | depends on ARCH_OMAP3 && ARCH_OMAP34XX | ||
| 107 | |||
| 108 | config MACH_CM_T35 | ||
| 109 | bool "CompuLab CM-T35 module" | ||
| 110 | depends on ARCH_OMAP3 && ARCH_OMAP34XX | ||
| 111 | |||
| 112 | config MACH_IGEP0020 | ||
| 113 | bool "IGEP0020" | ||
| 114 | depends on ARCH_OMAP3 && ARCH_OMAP34XX | ||
| 115 | |||
| 116 | config MACH_OMAP_3630SDP | ||
| 117 | bool "OMAP3630 SDP board" | ||
| 118 | depends on ARCH_OMAP3 && ARCH_OMAP34XX | ||
| 119 | |||
| 100 | config MACH_OMAP_4430SDP | 120 | config MACH_OMAP_4430SDP |
| 101 | bool "OMAP 4430 SDP board" | 121 | bool "OMAP 4430 SDP board" |
| 102 | depends on ARCH_OMAP4 | 122 | depends on ARCH_OMAP4 |
| 123 | |||
| 124 | config OMAP3_EMU | ||
| 125 | bool "OMAP3 debugging peripherals" | ||
| 126 | depends on ARCH_OMAP3 | ||
| 127 | select OC_ETM | ||
| 128 | help | ||
| 129 | Say Y here to enable debugging hardware of omap3 | ||
| 130 | |||
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 8cb16777661..32548a4510c 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile | |||
| @@ -31,7 +31,7 @@ obj-$(CONFIG_ARCH_OMAP2) += sdrc2xxx.o | |||
| 31 | ifeq ($(CONFIG_PM),y) | 31 | ifeq ($(CONFIG_PM),y) |
| 32 | obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o | 32 | obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o |
| 33 | obj-$(CONFIG_ARCH_OMAP24XX) += sleep24xx.o | 33 | obj-$(CONFIG_ARCH_OMAP24XX) += sleep24xx.o |
| 34 | obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o | 34 | obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o cpuidle34xx.o |
| 35 | obj-$(CONFIG_PM_DEBUG) += pm-debug.o | 35 | obj-$(CONFIG_PM_DEBUG) += pm-debug.o |
| 36 | endif | 36 | endif |
| 37 | 37 | ||
| @@ -44,6 +44,12 @@ obj-$(CONFIG_ARCH_OMAP4) += cm4xxx.o | |||
| 44 | obj-$(CONFIG_ARCH_OMAP2) += clock24xx.o | 44 | obj-$(CONFIG_ARCH_OMAP2) += clock24xx.o |
| 45 | obj-$(CONFIG_ARCH_OMAP3) += clock34xx.o | 45 | obj-$(CONFIG_ARCH_OMAP3) += clock34xx.o |
| 46 | 46 | ||
| 47 | # EMU peripherals | ||
| 48 | obj-$(CONFIG_OMAP3_EMU) += emu.o | ||
| 49 | |||
| 50 | obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox_mach.o | ||
| 51 | mailbox_mach-objs := mailbox.o | ||
| 52 | |||
| 47 | iommu-y += iommu2.o | 53 | iommu-y += iommu2.o |
| 48 | iommu-$(CONFIG_ARCH_OMAP3) += omap3-iommu.o | 54 | iommu-$(CONFIG_ARCH_OMAP3) += omap3-iommu.o |
| 49 | 55 | ||
| @@ -69,17 +75,33 @@ obj-$(CONFIG_MACH_OMAP_3430SDP) += board-3430sdp.o \ | |||
| 69 | mmc-twl4030.o | 75 | mmc-twl4030.o |
| 70 | obj-$(CONFIG_MACH_NOKIA_N8X0) += board-n8x0.o | 76 | obj-$(CONFIG_MACH_NOKIA_N8X0) += board-n8x0.o |
| 71 | obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o \ | 77 | obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o \ |
| 78 | board-rx51-sdram.o \ | ||
| 72 | board-rx51-peripherals.o \ | 79 | board-rx51-peripherals.o \ |
| 73 | mmc-twl4030.o | 80 | mmc-twl4030.o |
| 74 | obj-$(CONFIG_MACH_OMAP_ZOOM2) += board-zoom2.o \ | 81 | obj-$(CONFIG_MACH_OMAP_ZOOM2) += board-zoom2.o \ |
| 82 | board-zoom-peripherals.o \ | ||
| 83 | mmc-twl4030.o \ | ||
| 84 | board-zoom-debugboard.o | ||
| 85 | obj-$(CONFIG_MACH_OMAP_ZOOM3) += board-zoom3.o \ | ||
| 86 | board-zoom-peripherals.o \ | ||
| 75 | mmc-twl4030.o \ | 87 | mmc-twl4030.o \ |
| 76 | board-zoom-debugboard.o | 88 | board-zoom-debugboard.o |
| 89 | obj-$(CONFIG_MACH_OMAP_3630SDP) += board-3630sdp.o \ | ||
| 90 | board-zoom-peripherals.o \ | ||
| 91 | mmc-twl4030.o | ||
| 92 | obj-$(CONFIG_MACH_CM_T35) += board-cm-t35.o \ | ||
| 93 | mmc-twl4030.o | ||
| 94 | obj-$(CONFIG_MACH_IGEP0020) += board-igep0020.o \ | ||
| 95 | mmc-twl4030.o | ||
| 77 | 96 | ||
| 78 | obj-$(CONFIG_MACH_OMAP_4430SDP) += board-4430sdp.o | 97 | obj-$(CONFIG_MACH_OMAP_4430SDP) += board-4430sdp.o |
| 79 | 98 | ||
| 99 | obj-$(CONFIG_MACH_OMAP3517EVM) += board-am3517evm.o | ||
| 100 | |||
| 80 | # Platform specific device init code | 101 | # Platform specific device init code |
| 81 | obj-y += usb-musb.o | 102 | obj-y += usb-musb.o |
| 82 | obj-$(CONFIG_MACH_OMAP2_TUSB6010) += usb-tusb6010.o | 103 | obj-$(CONFIG_MACH_OMAP2_TUSB6010) += usb-tusb6010.o |
| 104 | obj-y += usb-ehci.o | ||
| 83 | 105 | ||
| 84 | onenand-$(CONFIG_MTD_ONENAND_OMAP2) := gpmc-onenand.o | 106 | onenand-$(CONFIG_MTD_ONENAND_OMAP2) := gpmc-onenand.o |
| 85 | obj-y += $(onenand-m) $(onenand-y) | 107 | obj-y += $(onenand-m) $(onenand-y) |
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c index 42217b32f83..db9374bc528 100644 --- a/arch/arm/mach-omap2/board-2430sdp.c +++ b/arch/arm/mach-omap2/board-2430sdp.c | |||
| @@ -31,12 +31,12 @@ | |||
| 31 | #include <asm/mach/flash.h> | 31 | #include <asm/mach/flash.h> |
| 32 | 32 | ||
| 33 | #include <mach/gpio.h> | 33 | #include <mach/gpio.h> |
| 34 | #include <mach/mux.h> | 34 | #include <plat/mux.h> |
| 35 | #include <mach/board.h> | 35 | #include <plat/board.h> |
| 36 | #include <mach/common.h> | 36 | #include <plat/common.h> |
| 37 | #include <mach/gpmc.h> | 37 | #include <plat/gpmc.h> |
| 38 | #include <mach/usb.h> | 38 | #include <plat/usb.h> |
| 39 | #include <mach/gpmc-smc91x.h> | 39 | #include <plat/gpmc-smc91x.h> |
| 40 | 40 | ||
| 41 | #include "mmc-twl4030.h" | 41 | #include "mmc-twl4030.h" |
| 42 | 42 | ||
| @@ -221,7 +221,7 @@ static void __init omap_2430sdp_map_io(void) | |||
| 221 | MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board") | 221 | MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board") |
| 222 | /* Maintainer: Syed Khasim - Texas Instruments Inc */ | 222 | /* Maintainer: Syed Khasim - Texas Instruments Inc */ |
| 223 | .phys_io = 0x48000000, | 223 | .phys_io = 0x48000000, |
| 224 | .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, | 224 | .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, |
| 225 | .boot_params = 0x80000100, | 225 | .boot_params = 0x80000100, |
| 226 | .map_io = omap_2430sdp_map_io, | 226 | .map_io = omap_2430sdp_map_io, |
| 227 | .init_irq = omap_2430sdp_init_irq, | 227 | .init_irq = omap_2430sdp_init_irq, |
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index 0acb5560229..491364e44c7 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c | |||
| @@ -30,16 +30,16 @@ | |||
| 30 | #include <asm/mach/arch.h> | 30 | #include <asm/mach/arch.h> |
| 31 | #include <asm/mach/map.h> | 31 | #include <asm/mach/map.h> |
| 32 | 32 | ||
| 33 | #include <mach/mcspi.h> | 33 | #include <plat/mcspi.h> |
| 34 | #include <mach/mux.h> | 34 | #include <plat/mux.h> |
| 35 | #include <mach/board.h> | 35 | #include <plat/board.h> |
| 36 | #include <mach/usb.h> | 36 | #include <plat/usb.h> |
| 37 | #include <mach/common.h> | 37 | #include <plat/common.h> |
| 38 | #include <mach/dma.h> | 38 | #include <plat/dma.h> |
| 39 | #include <mach/gpmc.h> | 39 | #include <plat/gpmc.h> |
| 40 | 40 | ||
| 41 | #include <mach/control.h> | 41 | #include <plat/control.h> |
| 42 | #include <mach/gpmc-smc91x.h> | 42 | #include <plat/gpmc-smc91x.h> |
| 43 | 43 | ||
| 44 | #include "sdram-qimonda-hyb18m512160af-6.h" | 44 | #include "sdram-qimonda-hyb18m512160af-6.h" |
| 45 | #include "mmc-twl4030.h" | 45 | #include "mmc-twl4030.h" |
| @@ -410,6 +410,15 @@ static struct regulator_init_data sdp3430_vpll2 = { | |||
| 410 | .consumer_supplies = &sdp3430_vdvi_supply, | 410 | .consumer_supplies = &sdp3430_vdvi_supply, |
| 411 | }; | 411 | }; |
| 412 | 412 | ||
| 413 | static struct twl4030_codec_audio_data sdp3430_audio = { | ||
| 414 | .audio_mclk = 26000000, | ||
| 415 | }; | ||
| 416 | |||
| 417 | static struct twl4030_codec_data sdp3430_codec = { | ||
| 418 | .audio_mclk = 26000000, | ||
| 419 | .audio = &sdp3430_audio, | ||
| 420 | }; | ||
| 421 | |||
| 413 | static struct twl4030_platform_data sdp3430_twldata = { | 422 | static struct twl4030_platform_data sdp3430_twldata = { |
| 414 | .irq_base = TWL4030_IRQ_BASE, | 423 | .irq_base = TWL4030_IRQ_BASE, |
| 415 | .irq_end = TWL4030_IRQ_END, | 424 | .irq_end = TWL4030_IRQ_END, |
| @@ -420,6 +429,7 @@ static struct twl4030_platform_data sdp3430_twldata = { | |||
| 420 | .madc = &sdp3430_madc_data, | 429 | .madc = &sdp3430_madc_data, |
| 421 | .keypad = &sdp3430_kp_data, | 430 | .keypad = &sdp3430_kp_data, |
| 422 | .usb = &sdp3430_usb_data, | 431 | .usb = &sdp3430_usb_data, |
| 432 | .codec = &sdp3430_codec, | ||
| 423 | 433 | ||
| 424 | .vaux1 = &sdp3430_vaux1, | 434 | .vaux1 = &sdp3430_vaux1, |
| 425 | .vaux2 = &sdp3430_vaux2, | 435 | .vaux2 = &sdp3430_vaux2, |
| @@ -484,6 +494,18 @@ static void enable_board_wakeup_source(void) | |||
| 484 | omap_cfg_reg(AF26_34XX_SYS_NIRQ); /* T2 interrupt line (keypad) */ | 494 | omap_cfg_reg(AF26_34XX_SYS_NIRQ); /* T2 interrupt line (keypad) */ |
| 485 | } | 495 | } |
| 486 | 496 | ||
| 497 | static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { | ||
| 498 | |||
| 499 | .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, | ||
| 500 | .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, | ||
| 501 | .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, | ||
| 502 | |||
| 503 | .phy_reset = true, | ||
| 504 | .reset_gpio_port[0] = 57, | ||
| 505 | .reset_gpio_port[1] = 61, | ||
| 506 | .reset_gpio_port[2] = -EINVAL | ||
| 507 | }; | ||
| 508 | |||
| 487 | static void __init omap_3430sdp_init(void) | 509 | static void __init omap_3430sdp_init(void) |
| 488 | { | 510 | { |
| 489 | omap3430_i2c_init(); | 511 | omap3430_i2c_init(); |
| @@ -500,6 +522,7 @@ static void __init omap_3430sdp_init(void) | |||
| 500 | usb_musb_init(); | 522 | usb_musb_init(); |
| 501 | board_smc91x_init(); | 523 | board_smc91x_init(); |
| 502 | enable_board_wakeup_source(); | 524 | enable_board_wakeup_source(); |
| 525 | usb_ehci_init(&ehci_pdata); | ||
| 503 | } | 526 | } |
| 504 | 527 | ||
| 505 | static void __init omap_3430sdp_map_io(void) | 528 | static void __init omap_3430sdp_map_io(void) |
| @@ -511,7 +534,7 @@ static void __init omap_3430sdp_map_io(void) | |||
| 511 | MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board") | 534 | MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board") |
| 512 | /* Maintainer: Syed Khasim - Texas Instruments Inc */ | 535 | /* Maintainer: Syed Khasim - Texas Instruments Inc */ |
| 513 | .phys_io = 0x48000000, | 536 | .phys_io = 0x48000000, |
| 514 | .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, | 537 | .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, |
| 515 | .boot_params = 0x80000100, | 538 | .boot_params = 0x80000100, |
| 516 | .map_io = omap_3430sdp_map_io, | 539 | .map_io = omap_3430sdp_map_io, |
| 517 | .init_irq = omap_3430sdp_init_irq, | 540 | .init_irq = omap_3430sdp_init_irq, |
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c new file mode 100755 index 00000000000..348b70b9833 --- /dev/null +++ b/arch/arm/mach-omap2/board-3630sdp.c | |||
| @@ -0,0 +1,101 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2009 Texas Instruments Inc. | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License version 2 as | ||
| 6 | * published by the Free Software Foundation. | ||
| 7 | */ | ||
| 8 | |||
| 9 | #include <linux/kernel.h> | ||
| 10 | #include <linux/init.h> | ||
| 11 | #include <linux/platform_device.h> | ||
| 12 | #include <linux/input.h> | ||
| 13 | #include <linux/gpio.h> | ||
| 14 | |||
| 15 | #include <asm/mach-types.h> | ||
| 16 | #include <asm/mach/arch.h> | ||
| 17 | |||
| 18 | #include <plat/common.h> | ||
| 19 | #include <plat/board.h> | ||
| 20 | #include <plat/gpmc-smc91x.h> | ||
| 21 | #include <plat/mux.h> | ||
| 22 | #include <plat/usb.h> | ||
| 23 | |||
| 24 | #include <mach/board-zoom.h> | ||
| 25 | |||
| 26 | #include "sdram-hynix-h8mbx00u0mer-0em.h" | ||
| 27 | |||
| 28 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | ||
| 29 | |||
| 30 | static struct omap_smc91x_platform_data board_smc91x_data = { | ||
| 31 | .cs = 3, | ||
| 32 | .flags = GPMC_MUX_ADD_DATA | IORESOURCE_IRQ_LOWLEVEL, | ||
| 33 | }; | ||
| 34 | |||
| 35 | static void __init board_smc91x_init(void) | ||
| 36 | { | ||
| 37 | board_smc91x_data.gpio_irq = 158; | ||
| 38 | gpmc_smc91x_init(&board_smc91x_data); | ||
| 39 | } | ||
| 40 | |||
| 41 | #else | ||
| 42 | |||
| 43 | static inline void board_smc91x_init(void) | ||
| 44 | { | ||
| 45 | } | ||
| 46 | |||
| 47 | #endif /* defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) */ | ||
| 48 | |||
| 49 | static void enable_board_wakeup_source(void) | ||
| 50 | { | ||
| 51 | omap_cfg_reg(AF26_34XX_SYS_NIRQ); /* T2 interrupt line (keypad) */ | ||
| 52 | } | ||
| 53 | |||
| 54 | static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { | ||
| 55 | |||
| 56 | .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, | ||
| 57 | .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, | ||
| 58 | .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, | ||
| 59 | |||
| 60 | .phy_reset = true, | ||
| 61 | .reset_gpio_port[0] = 126, | ||
| 62 | .reset_gpio_port[1] = 61, | ||
| 63 | .reset_gpio_port[2] = -EINVAL | ||
| 64 | }; | ||
| 65 | |||
| 66 | static void __init omap_sdp_map_io(void) | ||
| 67 | { | ||
| 68 | omap2_set_globals_343x(); | ||
| 69 | omap2_map_common_io(); | ||
| 70 | } | ||
| 71 | |||
| 72 | static struct omap_board_config_kernel sdp_config[] __initdata = { | ||
| 73 | }; | ||
| 74 | |||
| 75 | static void __init omap_sdp_init_irq(void) | ||
| 76 | { | ||
| 77 | omap_board_config = sdp_config; | ||
| 78 | omap_board_config_size = ARRAY_SIZE(sdp_config); | ||
| 79 | omap2_init_common_hw(h8mbx00u0mer0em_sdrc_params, | ||
| 80 | h8mbx00u0mer0em_sdrc_params); | ||
| 81 | omap_init_irq(); | ||
| 82 | omap_gpio_init(); | ||
| 83 | } | ||
| 84 | |||
| 85 | static void __init omap_sdp_init(void) | ||
| 86 | { | ||
| 87 | zoom_peripherals_init(); | ||
| 88 | board_smc91x_init(); | ||
| 89 | enable_board_wakeup_source(); | ||
| 90 | usb_ehci_init(&ehci_pdata); | ||
| 91 | } | ||
| 92 | |||
| 93 | MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board") | ||
| 94 | .phys_io = 0x48000000, | ||
| 95 | .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, | ||
| 96 | .boot_params = 0x80000100, | ||
| 97 | .map_io = omap_sdp_map_io, | ||
| 98 | .init_irq = omap_sdp_init_irq, | ||
| 99 | .init_machine = omap_sdp_init, | ||
| 100 | .timer = &omap_timer, | ||
| 101 | MACHINE_END | ||
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index 609a5a4a7e2..0c6be6b4a7e 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c | |||
| @@ -23,10 +23,10 @@ | |||
| 23 | #include <asm/mach/arch.h> | 23 | #include <asm/mach/arch.h> |
| 24 | #include <asm/mach/map.h> | 24 | #include <asm/mach/map.h> |
| 25 | 25 | ||
| 26 | #include <mach/board.h> | 26 | #include <plat/board.h> |
| 27 | #include <mach/common.h> | 27 | #include <plat/common.h> |
| 28 | #include <mach/control.h> | 28 | #include <plat/control.h> |
| 29 | #include <mach/timer-gp.h> | 29 | #include <plat/timer-gp.h> |
| 30 | #include <asm/hardware/gic.h> | 30 | #include <asm/hardware/gic.h> |
| 31 | 31 | ||
| 32 | static struct platform_device sdp4430_lcd_device = { | 32 | static struct platform_device sdp4430_lcd_device = { |
| @@ -52,8 +52,17 @@ static struct omap_board_config_kernel sdp4430_config[] __initdata = { | |||
| 52 | 52 | ||
| 53 | static void __init gic_init_irq(void) | 53 | static void __init gic_init_irq(void) |
| 54 | { | 54 | { |
| 55 | gic_dist_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_DIST_BASE), 29); | 55 | void __iomem *base; |
| 56 | gic_cpu_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)); | 56 | |
| 57 | /* Static mapping, never released */ | ||
| 58 | base = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K); | ||
| 59 | BUG_ON(!base); | ||
| 60 | gic_dist_init(0, base, 29); | ||
| 61 | |||
| 62 | /* Static mapping, never released */ | ||
| 63 | gic_cpu_base_addr = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); | ||
| 64 | BUG_ON(!gic_cpu_base_addr); | ||
| 65 | gic_cpu_init(0, gic_cpu_base_addr); | ||
| 57 | } | 66 | } |
| 58 | 67 | ||
| 59 | static void __init omap_4430sdp_init_irq(void) | 68 | static void __init omap_4430sdp_init_irq(void) |
| @@ -84,7 +93,7 @@ static void __init omap_4430sdp_map_io(void) | |||
| 84 | MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board") | 93 | MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board") |
| 85 | /* Maintainer: Santosh Shilimkar - Texas Instruments Inc */ | 94 | /* Maintainer: Santosh Shilimkar - Texas Instruments Inc */ |
| 86 | .phys_io = 0x48000000, | 95 | .phys_io = 0x48000000, |
| 87 | .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, | 96 | .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, |
| 88 | .boot_params = 0x80000100, | 97 | .boot_params = 0x80000100, |
| 89 | .map_io = omap_4430sdp_map_io, | 98 | .map_io = omap_4430sdp_map_io, |
| 90 | .init_irq = omap_4430sdp_init_irq, | 99 | .init_irq = omap_4430sdp_init_irq, |
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c new file mode 100644 index 00000000000..415a13d767c --- /dev/null +++ b/arch/arm/mach-omap2/board-am3517evm.c | |||
| @@ -0,0 +1,86 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-omap2/board-am3517evm.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009 Texas Instruments Incorporated | ||
| 5 | * Author: Ranjith Lohithakshan <ranjithl@ti.com> | ||
| 6 | * | ||
| 7 | * Based on mach-omap2/board-omap3evm.c | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify it | ||
| 10 | * under the terms of the GNU General Public License as published by the | ||
| 11 | * Free Software Foundation version 2. | ||
| 12 | * | ||
| 13 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind, | ||
| 14 | * whether express or implied; without even the implied warranty of | ||
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
| 16 | * General Public License for more details. | ||
| 17 | */ | ||
| 18 | |||
| 19 | #include <linux/kernel.h> | ||
| 20 | #include <linux/init.h> | ||
| 21 | #include <linux/platform_device.h> | ||
| 22 | #include <linux/gpio.h> | ||
| 23 | |||
| 24 | #include <mach/hardware.h> | ||
| 25 | #include <asm/mach-types.h> | ||
| 26 | #include <asm/mach/arch.h> | ||
| 27 | #include <asm/mach/map.h> | ||
| 28 | |||
| 29 | #include <plat/board.h> | ||
| 30 | #include <plat/common.h> | ||
| 31 | #include <plat/usb.h> | ||
| 32 | |||
| 33 | /* | ||
| 34 | * Board initialization | ||
| 35 | */ | ||
| 36 | static struct omap_board_config_kernel am3517_evm_config[] __initdata = { | ||
| 37 | }; | ||
| 38 | |||
| 39 | static struct platform_device *am3517_evm_devices[] __initdata = { | ||
| 40 | }; | ||
| 41 | |||
| 42 | static void __init am3517_evm_init_irq(void) | ||
| 43 | { | ||
| 44 | omap_board_config = am3517_evm_config; | ||
| 45 | omap_board_config_size = ARRAY_SIZE(am3517_evm_config); | ||
| 46 | |||
| 47 | omap2_init_common_hw(NULL, NULL); | ||
| 48 | omap_init_irq(); | ||
| 49 | omap_gpio_init(); | ||
| 50 | } | ||
| 51 | |||
| 52 | static struct ehci_hcd_omap_platform_data ehci_pdata __initdata = { | ||
| 53 | .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, | ||
| 54 | .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, | ||
| 55 | .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, | ||
| 56 | |||
| 57 | .phy_reset = true, | ||
| 58 | .reset_gpio_port[0] = 57, | ||
| 59 | .reset_gpio_port[1] = -EINVAL, | ||
| 60 | .reset_gpio_port[2] = -EINVAL | ||
| 61 | }; | ||
| 62 | |||
| 63 | static void __init am3517_evm_init(void) | ||
| 64 | { | ||
| 65 | platform_add_devices(am3517_evm_devices, | ||
| 66 | ARRAY_SIZE(am3517_evm_devices)); | ||
| 67 | |||
| 68 | omap_serial_init(); | ||
| 69 | usb_ehci_init(&ehci_pdata); | ||
| 70 | } | ||
| 71 | |||
| 72 | static void __init am3517_evm_map_io(void) | ||
| 73 | { | ||
| 74 | omap2_set_globals_343x(); | ||
| 75 | omap2_map_common_io(); | ||
| 76 | } | ||
| 77 | |||
| 78 | MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM") | ||
| 79 | .phys_io = 0x48000000, | ||
| 80 | .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, | ||
| 81 | .boot_params = 0x80000100, | ||
| 82 | .map_io = am3517_evm_map_io, | ||
| 83 | .init_irq = am3517_evm_init_irq, | ||
| 84 | .init_machine = am3517_evm_init, | ||
| 85 | .timer = &omap_timer, | ||
| 86 | MACHINE_END | ||
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c index a1132288c70..8a2ce77a02e 100644 --- a/arch/arm/mach-omap2/board-apollon.c +++ b/arch/arm/mach-omap2/board-apollon.c | |||
| @@ -33,13 +33,13 @@ | |||
| 33 | #include <asm/mach/flash.h> | 33 | #include <asm/mach/flash.h> |
| 34 | 34 | ||
| 35 | #include <mach/gpio.h> | 35 | #include <mach/gpio.h> |
| 36 | #include <mach/led.h> | 36 | #include <plat/led.h> |
| 37 | #include <mach/mux.h> | 37 | #include <plat/mux.h> |
| 38 | #include <mach/usb.h> | 38 | #include <plat/usb.h> |
| 39 | #include <mach/board.h> | 39 | #include <plat/board.h> |
| 40 | #include <mach/common.h> | 40 | #include <plat/common.h> |
| 41 | #include <mach/gpmc.h> | 41 | #include <plat/gpmc.h> |
| 42 | #include <mach/control.h> | 42 | #include <plat/control.h> |
| 43 | 43 | ||
| 44 | /* LED & Switch macros */ | 44 | /* LED & Switch macros */ |
| 45 | #define LED0_GPIO13 13 | 45 | #define LED0_GPIO13 13 |
| @@ -333,7 +333,7 @@ static void __init omap_apollon_map_io(void) | |||
| 333 | MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon") | 333 | MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon") |
| 334 | /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */ | 334 | /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */ |
| 335 | .phys_io = 0x48000000, | 335 | .phys_io = 0x48000000, |
| 336 | .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, | 336 | .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, |
| 337 | .boot_params = 0x80000100, | 337 | .boot_params = 0x80000100, |
| 338 | .map_io = omap_apollon_map_io, | 338 | .map_io = omap_apollon_map_io, |
| 339 | .init_irq = omap_apollon_init_irq, | 339 | .init_irq = omap_apollon_init_irq, |
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c new file mode 100644 index 00000000000..22c45290db6 --- /dev/null +++ b/arch/arm/mach-omap2/board-cm-t35.c | |||
| @@ -0,0 +1,507 @@ | |||
| 1 | /* | ||
| 2 | * board-cm-t35.c (CompuLab CM-T35 module) | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009 CompuLab, Ltd. | ||
| 5 | * Author: Mike Rapoport <mike@compulab.co.il> | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or | ||
| 8 | * modify it under the terms of the GNU General Public License | ||
| 9 | * version 2 as published by the Free Software Foundation. | ||
| 10 | * | ||
| 11 | * This program is distributed in the hope that it will be useful, but | ||
| 12 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
| 14 | * General Public License for more details. | ||
| 15 | * | ||
| 16 | * You should have received a copy of the GNU General Public License | ||
| 17 | * along with this program; if not, write to the Free Software | ||
| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | ||
| 19 | * 02110-1301 USA | ||
| 20 | * | ||
| 21 | */ | ||
| 22 | |||
| 23 | #include <linux/kernel.h> | ||
| 24 | #include <linux/init.h> | ||
| 25 | #include <linux/platform_device.h> | ||
| 26 | #include <linux/input.h> | ||
| 27 | #include <linux/input/matrix_keypad.h> | ||
| 28 | #include <linux/delay.h> | ||
| 29 | #include <linux/gpio.h> | ||
| 30 | |||
| 31 | #include <linux/i2c/at24.h> | ||
| 32 | #include <linux/i2c/twl4030.h> | ||
| 33 | #include <linux/regulator/machine.h> | ||
| 34 | |||
| 35 | #include <asm/mach-types.h> | ||
| 36 | #include <asm/mach/arch.h> | ||
| 37 | #include <asm/mach/map.h> | ||
| 38 | |||
| 39 | #include <plat/board.h> | ||
| 40 | #include <plat/common.h> | ||
| 41 | #include <plat/mux.h> | ||
| 42 | #include <plat/nand.h> | ||
| 43 | #include <plat/gpmc.h> | ||
| 44 | #include <plat/usb.h> | ||
| 45 | |||
| 46 | #include <mach/hardware.h> | ||
| 47 | |||
| 48 | #include "sdram-micron-mt46h32m32lf-6.h" | ||
| 49 | #include "mmc-twl4030.h" | ||
| 50 | |||
| 51 | #define CM_T35_GPIO_PENDOWN 57 | ||
| 52 | |||
| 53 | #define CM_T35_SMSC911X_CS 5 | ||
| 54 | #define CM_T35_SMSC911X_GPIO 163 | ||
| 55 | #define SB_T35_SMSC911X_CS 4 | ||
| 56 | #define SB_T35_SMSC911X_GPIO 65 | ||
| 57 | |||
| 58 | #define NAND_BLOCK_SIZE SZ_128K | ||
| 59 | #define GPMC_CS0_BASE 0x60 | ||
| 60 | #define GPMC_CS0_BASE_ADDR (OMAP34XX_GPMC_VIRT + GPMC_CS0_BASE) | ||
| 61 | |||
| 62 | #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) | ||
| 63 | #include <linux/smsc911x.h> | ||
| 64 | |||
| 65 | static struct smsc911x_platform_config cm_t35_smsc911x_config = { | ||
| 66 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | ||
| 67 | .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, | ||
| 68 | .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS, | ||
| 69 | .phy_interface = PHY_INTERFACE_MODE_MII, | ||
| 70 | }; | ||
| 71 | |||
| 72 | static struct resource cm_t35_smsc911x_resources[] = { | ||
| 73 | { | ||
| 74 | .flags = IORESOURCE_MEM, | ||
| 75 | }, | ||
| 76 | { | ||
| 77 | .start = OMAP_GPIO_IRQ(CM_T35_SMSC911X_GPIO), | ||
| 78 | .end = OMAP_GPIO_IRQ(CM_T35_SMSC911X_GPIO), | ||
| 79 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | ||
| 80 | }, | ||
| 81 | }; | ||
| 82 | |||
| 83 | static struct platform_device cm_t35_smsc911x_device = { | ||
| 84 | .name = "smsc911x", | ||
| 85 | .id = 0, | ||
| 86 | .num_resources = ARRAY_SIZE(cm_t35_smsc911x_resources), | ||
| 87 | .resource = cm_t35_smsc911x_resources, | ||
| 88 | .dev = { | ||
| 89 | .platform_data = &cm_t35_smsc911x_config, | ||
| 90 | }, | ||
| 91 | }; | ||
| 92 | |||
| 93 | static struct resource sb_t35_smsc911x_resources[] = { | ||
| 94 | { | ||
| 95 | .flags = IORESOURCE_MEM, | ||
| 96 | }, | ||
| 97 | { | ||
| 98 | .start = OMAP_GPIO_IRQ(SB_T35_SMSC911X_GPIO), | ||
| 99 | .end = OMAP_GPIO_IRQ(SB_T35_SMSC911X_GPIO), | ||
| 100 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | ||
| 101 | }, | ||
| 102 | }; | ||
| 103 | |||
| 104 | static struct platform_device sb_t35_smsc911x_device = { | ||
| 105 | .name = "smsc911x", | ||
| 106 | .id = 1, | ||
| 107 | .num_resources = ARRAY_SIZE(sb_t35_smsc911x_resources), | ||
| 108 | .resource = sb_t35_smsc911x_resources, | ||
| 109 | .dev = { | ||
| 110 | .platform_data = &cm_t35_smsc911x_config, | ||
| 111 | }, | ||
| 112 | }; | ||
| 113 | |||
| 114 | static void __init cm_t35_init_smsc911x(struct platform_device *dev, | ||
| 115 | int cs, int irq_gpio) | ||
| 116 | { | ||
| 117 | unsigned long cs_mem_base; | ||
| 118 | |||
| 119 | if (gpmc_cs_request(cs, SZ_16M, &cs_mem_base) < 0) { | ||
| 120 | pr_err("CM-T35: Failed request for GPMC mem for smsc911x\n"); | ||
| 121 | return; | ||
| 122 | } | ||
| 123 | |||
| 124 | dev->resource[0].start = cs_mem_base + 0x0; | ||
| 125 | dev->resource[0].end = cs_mem_base + 0xff; | ||
| 126 | |||
| 127 | if ((gpio_request(irq_gpio, "ETH IRQ") == 0) && | ||
| 128 | (gpio_direction_input(irq_gpio) == 0)) { | ||
| 129 | gpio_export(irq_gpio, 0); | ||
| 130 | } else { | ||
| 131 | pr_err("CM-T35: could not obtain gpio for SMSC911X IRQ\n"); | ||
| 132 | return; | ||
| 133 | } | ||
| 134 | |||
| 135 | platform_device_register(dev); | ||
| 136 | } | ||
| 137 | |||
| 138 | static void __init cm_t35_init_ethernet(void) | ||
| 139 | { | ||
| 140 | cm_t35_init_smsc911x(&cm_t35_smsc911x_device, | ||
| 141 | CM_T35_SMSC911X_CS, CM_T35_SMSC911X_GPIO); | ||
| 142 | cm_t35_init_smsc911x(&sb_t35_smsc911x_device, | ||
| 143 | SB_T35_SMSC911X_CS, SB_T35_SMSC911X_GPIO); | ||
| 144 | } | ||
| 145 | #else | ||
| 146 | static inline void __init cm_t35_init_ethernet(void) { return; } | ||
| 147 | #endif | ||
| 148 | |||
| 149 | #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) | ||
| 150 | #include <linux/leds.h> | ||
| 151 | |||
| 152 | static struct gpio_led cm_t35_leds[] = { | ||
| 153 | [0] = { | ||
| 154 | .gpio = 186, | ||
| 155 | .name = "cm-t35:green", | ||
| 156 | .default_trigger = "heartbeat", | ||
| 157 | .active_low = 0, | ||
| 158 | }, | ||
| 159 | }; | ||
| 160 | |||
| 161 | static struct gpio_led_platform_data cm_t35_led_pdata = { | ||
| 162 | .num_leds = ARRAY_SIZE(cm_t35_leds), | ||
| 163 | .leds = cm_t35_leds, | ||
| 164 | }; | ||
| 165 | |||
| 166 | static struct platform_device cm_t35_led_device = { | ||
| 167 | .name = "leds-gpio", | ||
| 168 | .id = -1, | ||
| 169 | .dev = { | ||
| 170 | .platform_data = &cm_t35_led_pdata, | ||
| 171 | }, | ||
| 172 | }; | ||
| 173 | |||
| 174 | static void __init cm_t35_init_led(void) | ||
| 175 | { | ||
| 176 | platform_device_register(&cm_t35_led_device); | ||
| 177 | } | ||
| 178 | #else | ||
| 179 | static inline void cm_t35_init_led(void) {} | ||
| 180 | #endif | ||
| 181 | |||
| 182 | #if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE) | ||
| 183 | #include <linux/mtd/mtd.h> | ||
| 184 | #include <linux/mtd/nand.h> | ||
| 185 | #include <linux/mtd/partitions.h> | ||
| 186 | |||
| 187 | static struct mtd_partition cm_t35_nand_partitions[] = { | ||
| 188 | { | ||
| 189 | .name = "xloader", | ||
| 190 | .offset = 0, /* Offset = 0x00000 */ | ||
| 191 | .size = 4 * NAND_BLOCK_SIZE, | ||
| 192 | .mask_flags = MTD_WRITEABLE | ||
| 193 | }, | ||
| 194 | { | ||
| 195 | .name = "uboot", | ||
| 196 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */ | ||
| 197 | .size = 15 * NAND_BLOCK_SIZE, | ||
| 198 | }, | ||
| 199 | { | ||
| 200 | .name = "uboot environment", | ||
| 201 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */ | ||
| 202 | .size = 2 * NAND_BLOCK_SIZE, | ||
| 203 | }, | ||
| 204 | { | ||
| 205 | .name = "linux", | ||
| 206 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */ | ||
| 207 | .size = 32 * NAND_BLOCK_SIZE, | ||
| 208 | }, | ||
| 209 | { | ||
| 210 | .name = "rootfs", | ||
| 211 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */ | ||
| 212 | .size = MTDPART_SIZ_FULL, | ||
| 213 | }, | ||
| 214 | }; | ||
| 215 | |||
| 216 | static struct omap_nand_platform_data cm_t35_nand_data = { | ||
| 217 | .parts = cm_t35_nand_partitions, | ||
| 218 | .nr_parts = ARRAY_SIZE(cm_t35_nand_partitions), | ||
| 219 | .dma_channel = -1, /* disable DMA in OMAP NAND driver */ | ||
| 220 | .cs = 0, | ||
| 221 | .gpmc_cs_baseaddr = (void __iomem *)GPMC_CS0_BASE_ADDR, | ||
| 222 | .gpmc_baseaddr = (void __iomem *)OMAP34XX_GPMC_VIRT, | ||
| 223 | |||
| 224 | }; | ||
| 225 | |||
| 226 | static struct resource cm_t35_nand_resource = { | ||
| 227 | .flags = IORESOURCE_MEM, | ||
| 228 | }; | ||
| 229 | |||
| 230 | static struct platform_device cm_t35_nand_device = { | ||
| 231 | .name = "omap2-nand", | ||
| 232 | .id = -1, | ||
| 233 | .num_resources = 1, | ||
| 234 | .resource = &cm_t35_nand_resource, | ||
| 235 | .dev = { | ||
| 236 | .platform_data = &cm_t35_nand_data, | ||
| 237 | }, | ||
| 238 | }; | ||
| 239 | |||
| 240 | static void __init cm_t35_init_nand(void) | ||
| 241 | { | ||
| 242 | if (platform_device_register(&cm_t35_nand_device) < 0) | ||
| 243 | pr_err("CM-T35: Unable to register NAND device\n"); | ||
| 244 | } | ||
| 245 | #else | ||
| 246 | static inline void cm_t35_init_nand(void) {} | ||
| 247 | #endif | ||
| 248 | |||
| 249 | #if defined(CONFIG_TOUCHSCREEN_ADS7846) || \ | ||
| 250 | defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) | ||
| 251 | #include <linux/spi/spi.h> | ||
| 252 | #include <linux/spi/ads7846.h> | ||
| 253 | |||
| 254 | #include <plat/mcspi.h> | ||
| 255 | |||
| 256 | static struct omap2_mcspi_device_config ads7846_mcspi_config = { | ||
| 257 | .turbo_mode = 0, | ||
| 258 | .single_channel = 1, /* 0: slave, 1: master */ | ||
| 259 | }; | ||
| 260 | |||
| 261 | static int ads7846_get_pendown_state(void) | ||
| 262 | { | ||
| 263 | return !gpio_get_value(CM_T35_GPIO_PENDOWN); | ||
| 264 | } | ||
| 265 | |||
| 266 | static struct ads7846_platform_data ads7846_config = { | ||
| 267 | .x_max = 0x0fff, | ||
| 268 | .y_max = 0x0fff, | ||
| 269 | .x_plate_ohms = 180, | ||
| 270 | .pressure_max = 255, | ||
| 271 | .debounce_max = 10, | ||
| 272 | .debounce_tol = 3, | ||
| 273 | .debounce_rep = 1, | ||
| 274 | .get_pendown_state = ads7846_get_pendown_state, | ||
| 275 | .keep_vref_on = 1, | ||
| 276 | }; | ||
| 277 | |||
| 278 | static struct spi_board_info cm_t35_spi_board_info[] __initdata = { | ||
| 279 | { | ||
| 280 | .modalias = "ads7846", | ||
| 281 | .bus_num = 1, | ||
| 282 | .chip_select = 0, | ||
| 283 | .max_speed_hz = 1500000, | ||
| 284 | .controller_data = &ads7846_mcspi_config, | ||
| 285 | .irq = OMAP_GPIO_IRQ(CM_T35_GPIO_PENDOWN), | ||
| 286 | .platform_data = &ads7846_config, | ||
| 287 | }, | ||
| 288 | }; | ||
| 289 | |||
| 290 | static void __init cm_t35_init_ads7846(void) | ||
| 291 | { | ||
| 292 | if ((gpio_request(CM_T35_GPIO_PENDOWN, "ADS7846_PENDOWN") == 0) && | ||
| 293 | (gpio_direction_input(CM_T35_GPIO_PENDOWN) == 0)) { | ||
| 294 | gpio_export(CM_T35_GPIO_PENDOWN, 0); | ||
| 295 | } else { | ||
| 296 | pr_err("CM-T35: could not obtain gpio for ADS7846_PENDOWN\n"); | ||
| 297 | return; | ||
| 298 | } | ||
| 299 | |||
| 300 | spi_register_board_info(cm_t35_spi_board_info, | ||
| 301 | ARRAY_SIZE(cm_t35_spi_board_info)); | ||
| 302 | } | ||
| 303 | #else | ||
| 304 | static inline void cm_t35_init_ads7846(void) {} | ||
| 305 | #endif | ||
| 306 | |||
| 307 | static struct regulator_consumer_supply cm_t35_vmmc1_supply = { | ||
| 308 | .supply = "vmmc", | ||
| 309 | }; | ||
| 310 | |||
| 311 | static struct regulator_consumer_supply cm_t35_vsim_supply = { | ||
| 312 | .supply = "vmmc_aux", | ||
| 313 | }; | ||
| 314 | |||
| 315 | /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ | ||
| 316 | static struct regulator_init_data cm_t35_vmmc1 = { | ||
| 317 | .constraints = { | ||
| 318 | .min_uV = 1850000, | ||
| 319 | .max_uV = 3150000, | ||
| 320 | .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 321 | | REGULATOR_MODE_STANDBY, | ||
| 322 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | ||
| 323 | | REGULATOR_CHANGE_MODE | ||
| 324 | | REGULATOR_CHANGE_STATUS, | ||
| 325 | }, | ||
| 326 | .num_consumer_supplies = 1, | ||
| 327 | .consumer_supplies = &cm_t35_vmmc1_supply, | ||
| 328 | }; | ||
| 329 | |||
| 330 | /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ | ||
| 331 | static struct regulator_init_data cm_t35_vsim = { | ||
| 332 | .constraints = { | ||
| 333 | .min_uV = 1800000, | ||
| 334 | .max_uV = 3000000, | ||
| 335 | .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 336 | | REGULATOR_MODE_STANDBY, | ||
| 337 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | ||
| 338 | | REGULATOR_CHANGE_MODE | ||
| 339 | | REGULATOR_CHANGE_STATUS, | ||
| 340 | }, | ||
| 341 | .num_consumer_supplies = 1, | ||
| 342 | .consumer_supplies = &cm_t35_vsim_supply, | ||
| 343 | }; | ||
| 344 | |||
| 345 | static struct twl4030_usb_data cm_t35_usb_data = { | ||
| 346 | .usb_mode = T2_USB_MODE_ULPI, | ||
| 347 | }; | ||
| 348 | |||
| 349 | static int cm_t35_keymap[] = { | ||
| 350 | KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT), | ||
| 351 | KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN), | ||
| 352 | KEY(2, 0, KEY_RIGHT), KEY(2, 1, KEY_C), KEY(2, 2, KEY_D), | ||
| 353 | }; | ||
| 354 | |||
| 355 | static struct matrix_keymap_data cm_t35_keymap_data = { | ||
| 356 | .keymap = cm_t35_keymap, | ||
| 357 | .keymap_size = ARRAY_SIZE(cm_t35_keymap), | ||
| 358 | }; | ||
| 359 | |||
| 360 | static struct twl4030_keypad_data cm_t35_kp_data = { | ||
| 361 | .keymap_data = &cm_t35_keymap_data, | ||
| 362 | .rows = 3, | ||
| 363 | .cols = 3, | ||
| 364 | .rep = 1, | ||
| 365 | }; | ||
| 366 | |||
| 367 | static struct twl4030_hsmmc_info mmc[] = { | ||
| 368 | { | ||
| 369 | .mmc = 1, | ||
| 370 | .wires = 4, | ||
| 371 | .gpio_cd = -EINVAL, | ||
| 372 | .gpio_wp = -EINVAL, | ||
| 373 | |||
| 374 | }, | ||
| 375 | { | ||
| 376 | .mmc = 2, | ||
| 377 | .wires = 4, | ||
| 378 | .transceiver = 1, | ||
| 379 | .gpio_cd = -EINVAL, | ||
| 380 | .gpio_wp = -EINVAL, | ||
| 381 | .ocr_mask = 0x00100000, /* 3.3V */ | ||
| 382 | }, | ||
| 383 | {} /* Terminator */ | ||
| 384 | }; | ||
| 385 | |||
| 386 | static struct ehci_hcd_omap_platform_data ehci_pdata = { | ||
| 387 | .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, | ||
| 388 | .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, | ||
| 389 | .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, | ||
| 390 | |||
| 391 | .phy_reset = true, | ||
| 392 | .reset_gpio_port[0] = -EINVAL, | ||
| 393 | .reset_gpio_port[1] = -EINVAL, | ||
| 394 | .reset_gpio_port[2] = -EINVAL | ||
| 395 | }; | ||
| 396 | |||
| 397 | static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio, | ||
| 398 | unsigned ngpio) | ||
| 399 | { | ||
| 400 | int wlan_rst = gpio + 2; | ||
| 401 | |||
| 402 | if ((gpio_request(wlan_rst, "WLAN RST") == 0) && | ||
| 403 | (gpio_direction_output(wlan_rst, 1) == 0)) { | ||
| 404 | gpio_export(wlan_rst, 0); | ||
| 405 | |||
| 406 | udelay(10); | ||
| 407 | gpio_set_value(wlan_rst, 0); | ||
| 408 | udelay(10); | ||
| 409 | gpio_set_value(wlan_rst, 1); | ||
| 410 | } else { | ||
| 411 | pr_err("CM-T35: could not obtain gpio for WiFi reset\n"); | ||
| 412 | } | ||
| 413 | |||
| 414 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ | ||
| 415 | mmc[0].gpio_cd = gpio + 0; | ||
| 416 | twl4030_mmc_init(mmc); | ||
| 417 | |||
| 418 | /* link regulators to MMC adapters */ | ||
| 419 | cm_t35_vmmc1_supply.dev = mmc[0].dev; | ||
| 420 | cm_t35_vsim_supply.dev = mmc[0].dev; | ||
| 421 | |||
| 422 | /* setup USB with proper PHY reset GPIOs */ | ||
| 423 | ehci_pdata.reset_gpio_port[0] = gpio + 6; | ||
| 424 | ehci_pdata.reset_gpio_port[1] = gpio + 7; | ||
| 425 | |||
| 426 | usb_ehci_init(&ehci_pdata); | ||
| 427 | |||
| 428 | return 0; | ||
| 429 | } | ||
| 430 | |||
| 431 | static struct twl4030_gpio_platform_data cm_t35_gpio_data = { | ||
| 432 | .gpio_base = OMAP_MAX_GPIO_LINES, | ||
| 433 | .irq_base = TWL4030_GPIO_IRQ_BASE, | ||
| 434 | .irq_end = TWL4030_GPIO_IRQ_END, | ||
| 435 | .setup = cm_t35_twl_gpio_setup, | ||
| 436 | }; | ||
| 437 | |||
| 438 | static struct twl4030_platform_data cm_t35_twldata = { | ||
| 439 | .irq_base = TWL4030_IRQ_BASE, | ||
| 440 | .irq_end = TWL4030_IRQ_END, | ||
| 441 | |||
| 442 | /* platform_data for children goes here */ | ||
| 443 | .keypad = &cm_t35_kp_data, | ||
| 444 | .usb = &cm_t35_usb_data, | ||
| 445 | .gpio = &cm_t35_gpio_data, | ||
| 446 | .vmmc1 = &cm_t35_vmmc1, | ||
| 447 | .vsim = &cm_t35_vsim, | ||
| 448 | }; | ||
| 449 | |||
| 450 | static struct i2c_board_info __initdata cm_t35_i2c_boardinfo[] = { | ||
| 451 | { | ||
| 452 | I2C_BOARD_INFO("tps65930", 0x48), | ||
| 453 | .flags = I2C_CLIENT_WAKE, | ||
| 454 | .irq = INT_34XX_SYS_NIRQ, | ||
| 455 | .platform_data = &cm_t35_twldata, | ||
| 456 | }, | ||
| 457 | }; | ||
| 458 | |||
| 459 | static void __init cm_t35_init_i2c(void) | ||
| 460 | { | ||
| 461 | omap_register_i2c_bus(1, 2600, cm_t35_i2c_boardinfo, | ||
| 462 | ARRAY_SIZE(cm_t35_i2c_boardinfo)); | ||
| 463 | } | ||
| 464 | |||
| 465 | static struct omap_board_config_kernel cm_t35_config[] __initdata = { | ||
| 466 | }; | ||
| 467 | |||
| 468 | static void __init cm_t35_init_irq(void) | ||
| 469 | { | ||
| 470 | omap_board_config = cm_t35_config; | ||
| 471 | omap_board_config_size = ARRAY_SIZE(cm_t35_config); | ||
| 472 | |||
| 473 | omap2_init_common_hw(mt46h32m32lf6_sdrc_params, | ||
| 474 | mt46h32m32lf6_sdrc_params); | ||
| 475 | omap_init_irq(); | ||
| 476 | omap_gpio_init(); | ||
| 477 | } | ||
| 478 | |||
| 479 | static void __init cm_t35_map_io(void) | ||
| 480 | { | ||
| 481 | omap2_set_globals_343x(); | ||
| 482 | omap2_map_common_io(); | ||
| 483 | } | ||
| 484 | |||
| 485 | static void __init cm_t35_init(void) | ||
| 486 | { | ||
| 487 | omap_serial_init(); | ||
| 488 | cm_t35_init_i2c(); | ||
| 489 | cm_t35_init_nand(); | ||
| 490 | cm_t35_init_ads7846(); | ||
| 491 | cm_t35_init_ethernet(); | ||
| 492 | cm_t35_init_led(); | ||
| 493 | |||
| 494 | usb_musb_init(); | ||
| 495 | |||
| 496 | omap_cfg_reg(AF26_34XX_SYS_NIRQ); | ||
| 497 | } | ||
| 498 | |||
| 499 | MACHINE_START(CM_T35, "Compulab CM-T35") | ||
| 500 | .phys_io = 0x48000000, | ||
| 501 | .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, | ||
| 502 | .boot_params = 0x80000100, | ||
| 503 | .map_io = cm_t35_map_io, | ||
| 504 | .init_irq = cm_t35_init_irq, | ||
| 505 | .init_machine = cm_t35_init, | ||
| 506 | .timer = &omap_timer, | ||
| 507 | MACHINE_END | ||
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 2e09a1c444c..7e6e6ca88be 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c | |||
| @@ -26,10 +26,10 @@ | |||
| 26 | #include <asm/mach/map.h> | 26 | #include <asm/mach/map.h> |
| 27 | 27 | ||
| 28 | #include <mach/gpio.h> | 28 | #include <mach/gpio.h> |
| 29 | #include <mach/mux.h> | 29 | #include <plat/mux.h> |
| 30 | #include <mach/usb.h> | 30 | #include <plat/usb.h> |
| 31 | #include <mach/board.h> | 31 | #include <plat/board.h> |
| 32 | #include <mach/common.h> | 32 | #include <plat/common.h> |
| 33 | 33 | ||
| 34 | static struct omap_board_config_kernel generic_config[] = { | 34 | static struct omap_board_config_kernel generic_config[] = { |
| 35 | }; | 35 | }; |
| @@ -56,7 +56,7 @@ static void __init omap_generic_map_io(void) | |||
| 56 | MACHINE_START(OMAP_GENERIC, "Generic OMAP24xx") | 56 | MACHINE_START(OMAP_GENERIC, "Generic OMAP24xx") |
| 57 | /* Maintainer: Paul Mundt <paul.mundt@nokia.com> */ | 57 | /* Maintainer: Paul Mundt <paul.mundt@nokia.com> */ |
| 58 | .phys_io = 0x48000000, | 58 | .phys_io = 0x48000000, |
| 59 | .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, | 59 | .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, |
| 60 | .boot_params = 0x80000100, | 60 | .boot_params = 0x80000100, |
| 61 | .map_io = omap_generic_map_io, | 61 | .map_io = omap_generic_map_io, |
| 62 | .init_irq = omap_generic_init_irq, | 62 | .init_irq = omap_generic_init_irq, |
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index eaa02d012c5..cfb7f1257d2 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c | |||
| @@ -31,16 +31,16 @@ | |||
| 31 | #include <asm/mach/map.h> | 31 | #include <asm/mach/map.h> |
| 32 | #include <asm/mach/flash.h> | 32 | #include <asm/mach/flash.h> |
| 33 | 33 | ||
| 34 | #include <mach/control.h> | 34 | #include <plat/control.h> |
| 35 | #include <mach/gpio.h> | 35 | #include <mach/gpio.h> |
| 36 | #include <mach/mux.h> | 36 | #include <plat/mux.h> |
| 37 | #include <mach/usb.h> | 37 | #include <plat/usb.h> |
| 38 | #include <mach/board.h> | 38 | #include <plat/board.h> |
| 39 | #include <mach/common.h> | 39 | #include <plat/common.h> |
| 40 | #include <mach/keypad.h> | 40 | #include <plat/keypad.h> |
| 41 | #include <mach/menelaus.h> | 41 | #include <plat/menelaus.h> |
| 42 | #include <mach/dma.h> | 42 | #include <plat/dma.h> |
| 43 | #include <mach/gpmc.h> | 43 | #include <plat/gpmc.h> |
| 44 | 44 | ||
| 45 | #define H4_FLASH_CS 0 | 45 | #define H4_FLASH_CS 0 |
| 46 | #define H4_SMC91X_CS 1 | 46 | #define H4_SMC91X_CS 1 |
| @@ -376,7 +376,7 @@ static void __init omap_h4_map_io(void) | |||
| 376 | MACHINE_START(OMAP_H4, "OMAP2420 H4 board") | 376 | MACHINE_START(OMAP_H4, "OMAP2420 H4 board") |
| 377 | /* Maintainer: Paul Mundt <paul.mundt@nokia.com> */ | 377 | /* Maintainer: Paul Mundt <paul.mundt@nokia.com> */ |
| 378 | .phys_io = 0x48000000, | 378 | .phys_io = 0x48000000, |
| 379 | .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, | 379 | .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, |
| 380 | .boot_params = 0x80000100, | 380 | .boot_params = 0x80000100, |
| 381 | .map_io = omap_h4_map_io, | 381 | .map_io = omap_h4_map_io, |
| 382 | .init_irq = omap_h4_init_irq, | 382 | .init_irq = omap_h4_init_irq, |
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c new file mode 100644 index 00000000000..fa62e80c13b --- /dev/null +++ b/arch/arm/mach-omap2/board-igep0020.c | |||
| @@ -0,0 +1,251 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2009 Integration Software and Electronic Engineering. | ||
| 3 | * | ||
| 4 | * Modified from mach-omap2/board-generic.c | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/kernel.h> | ||
| 12 | #include <linux/init.h> | ||
| 13 | #include <linux/platform_device.h> | ||
| 14 | #include <linux/delay.h> | ||
| 15 | #include <linux/err.h> | ||
| 16 | #include <linux/clk.h> | ||
| 17 | #include <linux/io.h> | ||
| 18 | #include <linux/gpio.h> | ||
| 19 | #include <linux/interrupt.h> | ||
| 20 | |||
| 21 | #include <linux/regulator/machine.h> | ||
| 22 | #include <linux/i2c/twl4030.h> | ||
| 23 | |||
| 24 | #include <asm/mach-types.h> | ||
| 25 | #include <asm/mach/arch.h> | ||
| 26 | |||
| 27 | #include <plat/board.h> | ||
| 28 | #include <plat/common.h> | ||
| 29 | #include <plat/gpmc.h> | ||
| 30 | #include <plat/mux.h> | ||
| 31 | #include <plat/usb.h> | ||
| 32 | |||
| 33 | #include "mmc-twl4030.h" | ||
| 34 | |||
| 35 | #define IGEP2_SMSC911X_CS 5 | ||
| 36 | #define IGEP2_SMSC911X_GPIO 176 | ||
| 37 | #define IGEP2_GPIO_USBH_NRESET 24 | ||
| 38 | #define IGEP2_GPIO_LED0_RED 26 | ||
| 39 | #define IGEP2_GPIO_LED0_GREEN 27 | ||
| 40 | #define IGEP2_GPIO_LED1_RED 28 | ||
| 41 | |||
| 42 | #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) | ||
| 43 | |||
| 44 | #include <linux/smsc911x.h> | ||
| 45 | |||
| 46 | static struct smsc911x_platform_config igep2_smsc911x_config = { | ||
| 47 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | ||
| 48 | .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, | ||
| 49 | .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS , | ||
| 50 | .phy_interface = PHY_INTERFACE_MODE_MII, | ||
| 51 | }; | ||
| 52 | |||
| 53 | static struct resource igep2_smsc911x_resources[] = { | ||
| 54 | { | ||
| 55 | .flags = IORESOURCE_MEM, | ||
| 56 | }, | ||
| 57 | { | ||
| 58 | .start = OMAP_GPIO_IRQ(IGEP2_SMSC911X_GPIO), | ||
| 59 | .end = OMAP_GPIO_IRQ(IGEP2_SMSC911X_GPIO), | ||
| 60 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | ||
| 61 | }, | ||
| 62 | }; | ||
| 63 | |||
| 64 | static struct platform_device igep2_smsc911x_device = { | ||
| 65 | .name = "smsc911x", | ||
| 66 | .id = 0, | ||
| 67 | .num_resources = ARRAY_SIZE(igep2_smsc911x_resources), | ||
| 68 | .resource = igep2_smsc911x_resources, | ||
| 69 | .dev = { | ||
| 70 | .platform_data = &igep2_smsc911x_config, | ||
| 71 | }, | ||
| 72 | }; | ||
| 73 | |||
| 74 | static inline void __init igep2_init_smsc911x(void) | ||
| 75 | { | ||
| 76 | unsigned long cs_mem_base; | ||
| 77 | |||
| 78 | if (gpmc_cs_request(IGEP2_SMSC911X_CS, SZ_16M, &cs_mem_base) < 0) { | ||
| 79 | pr_err("IGEP v2: Failed request for GPMC mem for smsc911x\n"); | ||
| 80 | gpmc_cs_free(IGEP2_SMSC911X_CS); | ||
| 81 | return; | ||
| 82 | } | ||
| 83 | |||
| 84 | igep2_smsc911x_resources[0].start = cs_mem_base + 0x0; | ||
| 85 | igep2_smsc911x_resources[0].end = cs_mem_base + 0xff; | ||
| 86 | |||
| 87 | if ((gpio_request(IGEP2_SMSC911X_GPIO, "SMSC911X IRQ") == 0) && | ||
| 88 | (gpio_direction_input(IGEP2_SMSC911X_GPIO) == 0)) { | ||
| 89 | gpio_export(IGEP2_SMSC911X_GPIO, 0); | ||
| 90 | } else { | ||
| 91 | pr_err("IGEP v2: Could not obtain gpio for for SMSC911X IRQ\n"); | ||
| 92 | return; | ||
| 93 | } | ||
| 94 | |||
| 95 | platform_device_register(&igep2_smsc911x_device); | ||
| 96 | } | ||
| 97 | |||
| 98 | #else | ||
| 99 | static inline void __init igep2_init_smsc911x(void) { } | ||
| 100 | #endif | ||
| 101 | |||
| 102 | static struct omap_board_config_kernel igep2_config[] __initdata = { | ||
| 103 | }; | ||
| 104 | |||
| 105 | static struct regulator_consumer_supply igep2_vmmc1_supply = { | ||
| 106 | .supply = "vmmc", | ||
| 107 | }; | ||
| 108 | |||
| 109 | /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */ | ||
| 110 | static struct regulator_init_data igep2_vmmc1 = { | ||
| 111 | .constraints = { | ||
| 112 | .min_uV = 1850000, | ||
| 113 | .max_uV = 3150000, | ||
| 114 | .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 115 | | REGULATOR_MODE_STANDBY, | ||
| 116 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | ||
| 117 | | REGULATOR_CHANGE_MODE | ||
| 118 | | REGULATOR_CHANGE_STATUS, | ||
| 119 | }, | ||
| 120 | .num_consumer_supplies = 1, | ||
| 121 | .consumer_supplies = &igep2_vmmc1_supply, | ||
| 122 | }; | ||
| 123 | |||
| 124 | static struct twl4030_hsmmc_info mmc[] = { | ||
| 125 | { | ||
| 126 | .mmc = 1, | ||
| 127 | .wires = 4, | ||
| 128 | .gpio_cd = -EINVAL, | ||
| 129 | .gpio_wp = -EINVAL, | ||
| 130 | }, | ||
| 131 | { | ||
| 132 | .mmc = 2, | ||
| 133 | .wires = 4, | ||
| 134 | .gpio_cd = -EINVAL, | ||
| 135 | .gpio_wp = -EINVAL, | ||
| 136 | }, | ||
| 137 | {} /* Terminator */ | ||
| 138 | }; | ||
| 139 | |||
| 140 | static int igep2_twl_gpio_setup(struct device *dev, | ||
| 141 | unsigned gpio, unsigned ngpio) | ||
| 142 | { | ||
| 143 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ | ||
| 144 | mmc[0].gpio_cd = gpio + 0; | ||
| 145 | twl4030_mmc_init(mmc); | ||
| 146 | |||
| 147 | /* link regulators to MMC adapters ... we "know" the | ||
| 148 | * regulators will be set up only *after* we return. | ||
| 149 | */ | ||
| 150 | igep2_vmmc1_supply.dev = mmc[0].dev; | ||
| 151 | |||
| 152 | return 0; | ||
| 153 | }; | ||
| 154 | |||
| 155 | static struct twl4030_gpio_platform_data igep2_gpio_data = { | ||
| 156 | .gpio_base = OMAP_MAX_GPIO_LINES, | ||
| 157 | .irq_base = TWL4030_GPIO_IRQ_BASE, | ||
| 158 | .irq_end = TWL4030_GPIO_IRQ_END, | ||
| 159 | .use_leds = false, | ||
| 160 | .setup = igep2_twl_gpio_setup, | ||
| 161 | }; | ||
| 162 | |||
| 163 | static struct twl4030_usb_data igep2_usb_data = { | ||
| 164 | .usb_mode = T2_USB_MODE_ULPI, | ||
| 165 | }; | ||
| 166 | |||
| 167 | static void __init igep2_init_irq(void) | ||
| 168 | { | ||
| 169 | omap_board_config = igep2_config; | ||
| 170 | omap_board_config_size = ARRAY_SIZE(igep2_config); | ||
| 171 | omap2_init_common_hw(NULL, NULL); | ||
| 172 | omap_init_irq(); | ||
| 173 | omap_gpio_init(); | ||
| 174 | } | ||
| 175 | |||
| 176 | static struct twl4030_platform_data igep2_twldata = { | ||
| 177 | .irq_base = TWL4030_IRQ_BASE, | ||
| 178 | .irq_end = TWL4030_IRQ_END, | ||
| 179 | |||
| 180 | /* platform_data for children goes here */ | ||
| 181 | .usb = &igep2_usb_data, | ||
| 182 | .gpio = &igep2_gpio_data, | ||
| 183 | .vmmc1 = &igep2_vmmc1, | ||
| 184 | |||
| 185 | }; | ||
| 186 | |||
| 187 | static struct i2c_board_info __initdata igep2_i2c_boardinfo[] = { | ||
| 188 | { | ||
| 189 | I2C_BOARD_INFO("twl4030", 0x48), | ||
| 190 | .flags = I2C_CLIENT_WAKE, | ||
| 191 | .irq = INT_34XX_SYS_NIRQ, | ||
| 192 | .platform_data = &igep2_twldata, | ||
| 193 | }, | ||
| 194 | }; | ||
| 195 | |||
| 196 | static int __init igep2_i2c_init(void) | ||
| 197 | { | ||
| 198 | omap_register_i2c_bus(1, 2600, igep2_i2c_boardinfo, | ||
| 199 | ARRAY_SIZE(igep2_i2c_boardinfo)); | ||
| 200 | /* Bus 3 is attached to the DVI port where devices like the pico DLP | ||
| 201 | * projector don't work reliably with 400kHz */ | ||
| 202 | omap_register_i2c_bus(3, 100, NULL, 0); | ||
| 203 | return 0; | ||
| 204 | } | ||
| 205 | |||
| 206 | static void __init igep2_init(void) | ||
| 207 | { | ||
| 208 | igep2_i2c_init(); | ||
| 209 | omap_serial_init(); | ||
| 210 | usb_musb_init(); | ||
| 211 | |||
| 212 | igep2_init_smsc911x(); | ||
| 213 | |||
| 214 | /* GPIO userspace leds */ | ||
| 215 | if ((gpio_request(IGEP2_GPIO_LED0_RED, "GPIO_LED0_RED") == 0) && | ||
| 216 | (gpio_direction_output(IGEP2_GPIO_LED0_RED, 1) == 0)) { | ||
| 217 | gpio_export(IGEP2_GPIO_LED0_RED, 0); | ||
| 218 | gpio_set_value(IGEP2_GPIO_LED0_RED, 0); | ||
| 219 | } else | ||
| 220 | pr_warning("IGEP v2: Could not obtain gpio GPIO_LED0_RED\n"); | ||
| 221 | |||
| 222 | if ((gpio_request(IGEP2_GPIO_LED0_GREEN, "GPIO_LED0_GREEN") == 0) && | ||
| 223 | (gpio_direction_output(IGEP2_GPIO_LED0_GREEN, 1) == 0)) { | ||
| 224 | gpio_export(IGEP2_GPIO_LED0_GREEN, 0); | ||
| 225 | gpio_set_value(IGEP2_GPIO_LED0_GREEN, 0); | ||
| 226 | } else | ||
| 227 | pr_warning("IGEP v2: Could not obtain gpio GPIO_LED0_GREEN\n"); | ||
| 228 | |||
| 229 | if ((gpio_request(IGEP2_GPIO_LED1_RED, "GPIO_LED1_RED") == 0) && | ||
| 230 | (gpio_direction_output(IGEP2_GPIO_LED1_RED, 1) == 0)) { | ||
| 231 | gpio_export(IGEP2_GPIO_LED1_RED, 0); | ||
| 232 | gpio_set_value(IGEP2_GPIO_LED1_RED, 0); | ||
| 233 | } else | ||
| 234 | pr_warning("IGEP v2: Could not obtain gpio GPIO_LED1_RED\n"); | ||
| 235 | } | ||
| 236 | |||
| 237 | static void __init igep2_map_io(void) | ||
| 238 | { | ||
| 239 | omap2_set_globals_343x(); | ||
| 240 | omap2_map_common_io(); | ||
| 241 | } | ||
| 242 | |||
| 243 | MACHINE_START(IGEP0020, "IGEP v2 board") | ||
| 244 | .phys_io = 0x48000000, | ||
| 245 | .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, | ||
| 246 | .boot_params = 0x80000100, | ||
| 247 | .map_io = igep2_map_io, | ||
| 248 | .init_irq = igep2_init_irq, | ||
| 249 | .init_machine = igep2_init, | ||
| 250 | .timer = &omap_timer, | ||
| 251 | MACHINE_END | ||
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index d57ec2f4d0a..c062238fe88 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c | |||
| @@ -33,15 +33,15 @@ | |||
| 33 | #include <asm/mach/arch.h> | 33 | #include <asm/mach/arch.h> |
| 34 | #include <asm/mach/map.h> | 34 | #include <asm/mach/map.h> |
| 35 | 35 | ||
| 36 | #include <mach/mcspi.h> | 36 | #include <plat/mcspi.h> |
| 37 | #include <mach/gpio.h> | 37 | #include <mach/gpio.h> |
| 38 | #include <mach/board.h> | 38 | #include <plat/board.h> |
| 39 | #include <mach/common.h> | 39 | #include <plat/common.h> |
| 40 | #include <mach/gpmc.h> | 40 | #include <plat/gpmc.h> |
| 41 | 41 | ||
| 42 | #include <asm/delay.h> | 42 | #include <asm/delay.h> |
| 43 | #include <mach/control.h> | 43 | #include <plat/control.h> |
| 44 | #include <mach/usb.h> | 44 | #include <plat/usb.h> |
| 45 | 45 | ||
| 46 | #include "mmc-twl4030.h" | 46 | #include "mmc-twl4030.h" |
| 47 | 47 | ||
| @@ -399,7 +399,7 @@ static void __init omap_ldp_map_io(void) | |||
| 399 | 399 | ||
| 400 | MACHINE_START(OMAP_LDP, "OMAP LDP board") | 400 | MACHINE_START(OMAP_LDP, "OMAP LDP board") |
| 401 | .phys_io = 0x48000000, | 401 | .phys_io = 0x48000000, |
| 402 | .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, | 402 | .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, |
| 403 | .boot_params = 0x80000100, | 403 | .boot_params = 0x80000100, |
| 404 | .map_io = omap_ldp_map_io, | 404 | .map_io = omap_ldp_map_io, |
| 405 | .init_irq = omap_ldp_init_irq, | 405 | .init_irq = omap_ldp_init_irq, |
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c index 8341632d260..764ab1ed576 100644 --- a/arch/arm/mach-omap2/board-n8x0.c +++ b/arch/arm/mach-omap2/board-n8x0.c | |||
| @@ -23,12 +23,12 @@ | |||
| 23 | #include <asm/mach/arch.h> | 23 | #include <asm/mach/arch.h> |
| 24 | #include <asm/mach-types.h> | 24 | #include <asm/mach-types.h> |
| 25 | 25 | ||
| 26 | #include <mach/board.h> | 26 | #include <plat/board.h> |
| 27 | #include <mach/common.h> | 27 | #include <plat/common.h> |
| 28 | #include <mach/irqs.h> | 28 | #include <mach/irqs.h> |
| 29 | #include <mach/mcspi.h> | 29 | #include <plat/mcspi.h> |
| 30 | #include <mach/onenand.h> | 30 | #include <plat/onenand.h> |
| 31 | #include <mach/serial.h> | 31 | #include <plat/serial.h> |
| 32 | 32 | ||
| 33 | static struct omap2_mcspi_device_config p54spi_mcspi_config = { | 33 | static struct omap2_mcspi_device_config p54spi_mcspi_config = { |
| 34 | .turbo_mode = 0, | 34 | .turbo_mode = 0, |
| @@ -121,7 +121,7 @@ static void __init n8x0_init_machine(void) | |||
| 121 | 121 | ||
| 122 | MACHINE_START(NOKIA_N800, "Nokia N800") | 122 | MACHINE_START(NOKIA_N800, "Nokia N800") |
| 123 | .phys_io = 0x48000000, | 123 | .phys_io = 0x48000000, |
| 124 | .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, | 124 | .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, |
| 125 | .boot_params = 0x80000100, | 125 | .boot_params = 0x80000100, |
| 126 | .map_io = n8x0_map_io, | 126 | .map_io = n8x0_map_io, |
| 127 | .init_irq = n8x0_init_irq, | 127 | .init_irq = n8x0_init_irq, |
| @@ -131,7 +131,7 @@ MACHINE_END | |||
| 131 | 131 | ||
| 132 | MACHINE_START(NOKIA_N810, "Nokia N810") | 132 | MACHINE_START(NOKIA_N810, "Nokia N810") |
| 133 | .phys_io = 0x48000000, | 133 | .phys_io = 0x48000000, |
| 134 | .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, | 134 | .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, |
| 135 | .boot_params = 0x80000100, | 135 | .boot_params = 0x80000100, |
| 136 | .map_io = n8x0_map_io, | 136 | .map_io = n8x0_map_io, |
| 137 | .init_irq = n8x0_init_irq, | 137 | .init_irq = n8x0_init_irq, |
| @@ -141,7 +141,7 @@ MACHINE_END | |||
| 141 | 141 | ||
| 142 | MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") | 142 | MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") |
| 143 | .phys_io = 0x48000000, | 143 | .phys_io = 0x48000000, |
| 144 | .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, | 144 | .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, |
| 145 | .boot_params = 0x80000100, | 145 | .boot_params = 0x80000100, |
| 146 | .map_io = n8x0_map_io, | 146 | .map_io = n8x0_map_io, |
| 147 | .init_irq = n8x0_init_irq, | 147 | .init_irq = n8x0_init_irq, |
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index 08b0816afa6..41480bd0e58 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c | |||
| @@ -37,13 +37,13 @@ | |||
| 37 | #include <asm/mach/map.h> | 37 | #include <asm/mach/map.h> |
| 38 | #include <asm/mach/flash.h> | 38 | #include <asm/mach/flash.h> |
| 39 | 39 | ||
| 40 | #include <mach/board.h> | 40 | #include <plat/board.h> |
| 41 | #include <mach/common.h> | 41 | #include <plat/common.h> |
| 42 | #include <mach/gpmc.h> | 42 | #include <plat/gpmc.h> |
| 43 | #include <mach/nand.h> | 43 | #include <plat/nand.h> |
| 44 | #include <mach/mux.h> | 44 | #include <plat/mux.h> |
| 45 | #include <mach/usb.h> | 45 | #include <plat/usb.h> |
| 46 | #include <mach/timer-gp.h> | 46 | #include <plat/timer-gp.h> |
| 47 | 47 | ||
| 48 | #include "mmc-twl4030.h" | 48 | #include "mmc-twl4030.h" |
| 49 | 49 | ||
| @@ -254,6 +254,15 @@ static struct twl4030_usb_data beagle_usb_data = { | |||
| 254 | .usb_mode = T2_USB_MODE_ULPI, | 254 | .usb_mode = T2_USB_MODE_ULPI, |
| 255 | }; | 255 | }; |
| 256 | 256 | ||
| 257 | static struct twl4030_codec_audio_data beagle_audio_data = { | ||
| 258 | .audio_mclk = 26000000, | ||
| 259 | }; | ||
| 260 | |||
| 261 | static struct twl4030_codec_data beagle_codec_data = { | ||
| 262 | .audio_mclk = 26000000, | ||
| 263 | .audio = &beagle_audio_data, | ||
| 264 | }; | ||
| 265 | |||
| 257 | static struct twl4030_platform_data beagle_twldata = { | 266 | static struct twl4030_platform_data beagle_twldata = { |
| 258 | .irq_base = TWL4030_IRQ_BASE, | 267 | .irq_base = TWL4030_IRQ_BASE, |
| 259 | .irq_end = TWL4030_IRQ_END, | 268 | .irq_end = TWL4030_IRQ_END, |
| @@ -261,6 +270,7 @@ static struct twl4030_platform_data beagle_twldata = { | |||
| 261 | /* platform_data for children goes here */ | 270 | /* platform_data for children goes here */ |
| 262 | .usb = &beagle_usb_data, | 271 | .usb = &beagle_usb_data, |
| 263 | .gpio = &beagle_gpio_data, | 272 | .gpio = &beagle_gpio_data, |
| 273 | .codec = &beagle_codec_data, | ||
| 264 | .vmmc1 = &beagle_vmmc1, | 274 | .vmmc1 = &beagle_vmmc1, |
| 265 | .vsim = &beagle_vsim, | 275 | .vsim = &beagle_vsim, |
| 266 | .vdac = &beagle_vdac, | 276 | .vdac = &beagle_vdac, |
| @@ -400,6 +410,18 @@ static void __init omap3beagle_flash_init(void) | |||
| 400 | } | 410 | } |
| 401 | } | 411 | } |
| 402 | 412 | ||
| 413 | static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { | ||
| 414 | |||
| 415 | .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, | ||
| 416 | .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, | ||
| 417 | .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, | ||
| 418 | |||
| 419 | .phy_reset = true, | ||
| 420 | .reset_gpio_port[0] = -EINVAL, | ||
| 421 | .reset_gpio_port[1] = 147, | ||
| 422 | .reset_gpio_port[2] = -EINVAL | ||
| 423 | }; | ||
| 424 | |||
| 403 | static void __init omap3_beagle_init(void) | 425 | static void __init omap3_beagle_init(void) |
| 404 | { | 426 | { |
| 405 | omap3_beagle_i2c_init(); | 427 | omap3_beagle_i2c_init(); |
| @@ -413,6 +435,7 @@ static void __init omap3_beagle_init(void) | |||
| 413 | gpio_direction_output(170, true); | 435 | gpio_direction_output(170, true); |
| 414 | 436 | ||
| 415 | usb_musb_init(); | 437 | usb_musb_init(); |
| 438 | usb_ehci_init(&ehci_pdata); | ||
| 416 | omap3beagle_flash_init(); | 439 | omap3beagle_flash_init(); |
| 417 | 440 | ||
| 418 | /* Ensure SDRC pins are mux'd for self-refresh */ | 441 | /* Ensure SDRC pins are mux'd for self-refresh */ |
| @@ -429,7 +452,7 @@ static void __init omap3_beagle_map_io(void) | |||
| 429 | MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") | 452 | MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") |
| 430 | /* Maintainer: Syed Mohammed Khasim - http://beagleboard.org */ | 453 | /* Maintainer: Syed Mohammed Khasim - http://beagleboard.org */ |
| 431 | .phys_io = 0x48000000, | 454 | .phys_io = 0x48000000, |
| 432 | .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, | 455 | .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, |
| 433 | .boot_params = 0x80000100, | 456 | .boot_params = 0x80000100, |
| 434 | .map_io = omap3_beagle_map_io, | 457 | .map_io = omap3_beagle_map_io, |
| 435 | .init_irq = omap3_beagle_init_irq, | 458 | .init_irq = omap3_beagle_init_irq, |
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index 4c4d7f8dbd7..5efc2e9068d 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c | |||
| @@ -22,34 +22,74 @@ | |||
| 22 | #include <linux/input.h> | 22 | #include <linux/input.h> |
| 23 | #include <linux/input/matrix_keypad.h> | 23 | #include <linux/input/matrix_keypad.h> |
| 24 | #include <linux/leds.h> | 24 | #include <linux/leds.h> |
| 25 | #include <linux/interrupt.h> | ||
| 25 | 26 | ||
| 26 | #include <linux/spi/spi.h> | 27 | #include <linux/spi/spi.h> |
| 27 | #include <linux/spi/ads7846.h> | 28 | #include <linux/spi/ads7846.h> |
| 28 | #include <linux/i2c/twl4030.h> | 29 | #include <linux/i2c/twl4030.h> |
| 29 | #include <linux/usb/otg.h> | 30 | #include <linux/usb/otg.h> |
| 31 | #include <linux/smsc911x.h> | ||
| 32 | |||
| 33 | #include <linux/regulator/machine.h> | ||
| 30 | 34 | ||
| 31 | #include <mach/hardware.h> | 35 | #include <mach/hardware.h> |
| 32 | #include <asm/mach-types.h> | 36 | #include <asm/mach-types.h> |
| 33 | #include <asm/mach/arch.h> | 37 | #include <asm/mach/arch.h> |
| 34 | #include <asm/mach/map.h> | 38 | #include <asm/mach/map.h> |
| 35 | 39 | ||
| 36 | #include <mach/board.h> | 40 | #include <plat/board.h> |
| 37 | #include <mach/mux.h> | 41 | #include <plat/mux.h> |
| 38 | #include <mach/usb.h> | 42 | #include <plat/usb.h> |
| 39 | #include <mach/common.h> | 43 | #include <plat/common.h> |
| 40 | #include <mach/mcspi.h> | 44 | #include <plat/mcspi.h> |
| 41 | 45 | ||
| 42 | #include "sdram-micron-mt46h32m32lf-6.h" | 46 | #include "sdram-micron-mt46h32m32lf-6.h" |
| 43 | #include "mmc-twl4030.h" | 47 | #include "mmc-twl4030.h" |
| 44 | 48 | ||
| 45 | #define OMAP3_EVM_TS_GPIO 175 | 49 | #define OMAP3_EVM_TS_GPIO 175 |
| 50 | #define OMAP3_EVM_EHCI_VBUS 22 | ||
| 51 | #define OMAP3_EVM_EHCI_SELECT 61 | ||
| 46 | 52 | ||
| 47 | #define OMAP3EVM_ETHR_START 0x2c000000 | 53 | #define OMAP3EVM_ETHR_START 0x2c000000 |
| 48 | #define OMAP3EVM_ETHR_SIZE 1024 | 54 | #define OMAP3EVM_ETHR_SIZE 1024 |
| 55 | #define OMAP3EVM_ETHR_ID_REV 0x50 | ||
| 49 | #define OMAP3EVM_ETHR_GPIO_IRQ 176 | 56 | #define OMAP3EVM_ETHR_GPIO_IRQ 176 |
| 50 | #define OMAP3EVM_SMC911X_CS 5 | 57 | #define OMAP3EVM_SMSC911X_CS 5 |
| 58 | |||
| 59 | static u8 omap3_evm_version; | ||
| 60 | |||
| 61 | u8 get_omap3_evm_rev(void) | ||
| 62 | { | ||
| 63 | return omap3_evm_version; | ||
| 64 | } | ||
| 65 | EXPORT_SYMBOL(get_omap3_evm_rev); | ||
| 66 | |||
| 67 | static void __init omap3_evm_get_revision(void) | ||
| 68 | { | ||
| 69 | void __iomem *ioaddr; | ||
| 70 | unsigned int smsc_id; | ||
| 71 | |||
| 72 | /* Ethernet PHY ID is stored at ID_REV register */ | ||
| 73 | ioaddr = ioremap_nocache(OMAP3EVM_ETHR_START, SZ_1K); | ||
| 74 | if (!ioaddr) | ||
| 75 | return; | ||
| 76 | smsc_id = readl(ioaddr + OMAP3EVM_ETHR_ID_REV) & 0xFFFF0000; | ||
| 77 | iounmap(ioaddr); | ||
| 78 | |||
| 79 | switch (smsc_id) { | ||
| 80 | /*SMSC9115 chipset*/ | ||
| 81 | case 0x01150000: | ||
| 82 | omap3_evm_version = OMAP3EVM_BOARD_GEN_1; | ||
| 83 | break; | ||
| 84 | /*SMSC 9220 chipset*/ | ||
| 85 | case 0x92200000: | ||
| 86 | default: | ||
| 87 | omap3_evm_version = OMAP3EVM_BOARD_GEN_2; | ||
| 88 | } | ||
| 89 | } | ||
| 51 | 90 | ||
| 52 | static struct resource omap3evm_smc911x_resources[] = { | 91 | #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) |
| 92 | static struct resource omap3evm_smsc911x_resources[] = { | ||
| 53 | [0] = { | 93 | [0] = { |
| 54 | .start = OMAP3EVM_ETHR_START, | 94 | .start = OMAP3EVM_ETHR_START, |
| 55 | .end = (OMAP3EVM_ETHR_START + OMAP3EVM_ETHR_SIZE - 1), | 95 | .end = (OMAP3EVM_ETHR_START + OMAP3EVM_ETHR_SIZE - 1), |
| @@ -58,24 +98,34 @@ static struct resource omap3evm_smc911x_resources[] = { | |||
| 58 | [1] = { | 98 | [1] = { |
| 59 | .start = OMAP_GPIO_IRQ(OMAP3EVM_ETHR_GPIO_IRQ), | 99 | .start = OMAP_GPIO_IRQ(OMAP3EVM_ETHR_GPIO_IRQ), |
| 60 | .end = OMAP_GPIO_IRQ(OMAP3EVM_ETHR_GPIO_IRQ), | 100 | .end = OMAP_GPIO_IRQ(OMAP3EVM_ETHR_GPIO_IRQ), |
| 61 | .flags = IORESOURCE_IRQ, | 101 | .flags = (IORESOURCE_IRQ | IRQF_TRIGGER_LOW), |
| 62 | }, | 102 | }, |
| 63 | }; | 103 | }; |
| 64 | 104 | ||
| 65 | static struct platform_device omap3evm_smc911x_device = { | 105 | static struct smsc911x_platform_config smsc911x_config = { |
| 66 | .name = "smc911x", | 106 | .phy_interface = PHY_INTERFACE_MODE_MII, |
| 107 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | ||
| 108 | .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, | ||
| 109 | .flags = (SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS), | ||
| 110 | }; | ||
| 111 | |||
| 112 | static struct platform_device omap3evm_smsc911x_device = { | ||
| 113 | .name = "smsc911x", | ||
| 67 | .id = -1, | 114 | .id = -1, |
| 68 | .num_resources = ARRAY_SIZE(omap3evm_smc911x_resources), | 115 | .num_resources = ARRAY_SIZE(omap3evm_smsc911x_resources), |
| 69 | .resource = &omap3evm_smc911x_resources[0], | 116 | .resource = &omap3evm_smsc911x_resources[0], |
| 117 | .dev = { | ||
| 118 | .platform_data = &smsc911x_config, | ||
| 119 | }, | ||
| 70 | }; | 120 | }; |
| 71 | 121 | ||
| 72 | static inline void __init omap3evm_init_smc911x(void) | 122 | static inline void __init omap3evm_init_smsc911x(void) |
| 73 | { | 123 | { |
| 74 | int eth_cs; | 124 | int eth_cs; |
| 75 | struct clk *l3ck; | 125 | struct clk *l3ck; |
| 76 | unsigned int rate; | 126 | unsigned int rate; |
| 77 | 127 | ||
| 78 | eth_cs = OMAP3EVM_SMC911X_CS; | 128 | eth_cs = OMAP3EVM_SMSC911X_CS; |
| 79 | 129 | ||
| 80 | l3ck = clk_get(NULL, "l3_ck"); | 130 | l3ck = clk_get(NULL, "l3_ck"); |
| 81 | if (IS_ERR(l3ck)) | 131 | if (IS_ERR(l3ck)) |
| @@ -83,15 +133,58 @@ static inline void __init omap3evm_init_smc911x(void) | |||
| 83 | else | 133 | else |
| 84 | rate = clk_get_rate(l3ck); | 134 | rate = clk_get_rate(l3ck); |
| 85 | 135 | ||
| 86 | if (gpio_request(OMAP3EVM_ETHR_GPIO_IRQ, "SMC911x irq") < 0) { | 136 | if (gpio_request(OMAP3EVM_ETHR_GPIO_IRQ, "SMSC911x irq") < 0) { |
| 87 | printk(KERN_ERR "Failed to request GPIO%d for smc911x IRQ\n", | 137 | printk(KERN_ERR "Failed to request GPIO%d for smsc911x IRQ\n", |
| 88 | OMAP3EVM_ETHR_GPIO_IRQ); | 138 | OMAP3EVM_ETHR_GPIO_IRQ); |
| 89 | return; | 139 | return; |
| 90 | } | 140 | } |
| 91 | 141 | ||
| 92 | gpio_direction_input(OMAP3EVM_ETHR_GPIO_IRQ); | 142 | gpio_direction_input(OMAP3EVM_ETHR_GPIO_IRQ); |
| 143 | platform_device_register(&omap3evm_smsc911x_device); | ||
| 93 | } | 144 | } |
| 94 | 145 | ||
| 146 | #else | ||
| 147 | static inline void __init omap3evm_init_smsc911x(void) { return; } | ||
| 148 | #endif | ||
| 149 | |||
| 150 | static struct regulator_consumer_supply omap3evm_vmmc1_supply = { | ||
| 151 | .supply = "vmmc", | ||
| 152 | }; | ||
| 153 | |||
| 154 | static struct regulator_consumer_supply omap3evm_vsim_supply = { | ||
| 155 | .supply = "vmmc_aux", | ||
| 156 | }; | ||
| 157 | |||
| 158 | /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ | ||
| 159 | static struct regulator_init_data omap3evm_vmmc1 = { | ||
| 160 | .constraints = { | ||
| 161 | .min_uV = 1850000, | ||
| 162 | .max_uV = 3150000, | ||
| 163 | .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 164 | | REGULATOR_MODE_STANDBY, | ||
| 165 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | ||
| 166 | | REGULATOR_CHANGE_MODE | ||
| 167 | | REGULATOR_CHANGE_STATUS, | ||
| 168 | }, | ||
| 169 | .num_consumer_supplies = 1, | ||
| 170 | .consumer_supplies = &omap3evm_vmmc1_supply, | ||
| 171 | }; | ||
| 172 | |||
| 173 | /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ | ||
| 174 | static struct regulator_init_data omap3evm_vsim = { | ||
| 175 | .constraints = { | ||
| 176 | .min_uV = 1800000, | ||
| 177 | .max_uV = 3000000, | ||
| 178 | .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 179 | | REGULATOR_MODE_STANDBY, | ||
| 180 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | ||
| 181 | | REGULATOR_CHANGE_MODE | ||
| 182 | | REGULATOR_CHANGE_STATUS, | ||
| 183 | }, | ||
| 184 | .num_consumer_supplies = 1, | ||
| 185 | .consumer_supplies = &omap3evm_vsim_supply, | ||
| 186 | }; | ||
| 187 | |||
| 95 | static struct twl4030_hsmmc_info mmc[] = { | 188 | static struct twl4030_hsmmc_info mmc[] = { |
| 96 | { | 189 | { |
| 97 | .mmc = 1, | 190 | .mmc = 1, |
| @@ -134,6 +227,10 @@ static int omap3evm_twl_gpio_setup(struct device *dev, | |||
| 134 | mmc[0].gpio_cd = gpio + 0; | 227 | mmc[0].gpio_cd = gpio + 0; |
| 135 | twl4030_mmc_init(mmc); | 228 | twl4030_mmc_init(mmc); |
| 136 | 229 | ||
| 230 | /* link regulators to MMC adapters */ | ||
| 231 | omap3evm_vmmc1_supply.dev = mmc[0].dev; | ||
| 232 | omap3evm_vsim_supply.dev = mmc[0].dev; | ||
| 233 | |||
| 137 | /* | 234 | /* |
| 138 | * Most GPIOs are for USB OTG. Some are mostly sent to | 235 | * Most GPIOs are for USB OTG. Some are mostly sent to |
| 139 | * the P2 connector; notably LEDA for the LCD backlight. | 236 | * the P2 connector; notably LEDA for the LCD backlight. |
| @@ -194,6 +291,15 @@ static struct twl4030_madc_platform_data omap3evm_madc_data = { | |||
| 194 | .irq_line = 1, | 291 | .irq_line = 1, |
| 195 | }; | 292 | }; |
| 196 | 293 | ||
| 294 | static struct twl4030_codec_audio_data omap3evm_audio_data = { | ||
| 295 | .audio_mclk = 26000000, | ||
| 296 | }; | ||
| 297 | |||
| 298 | static struct twl4030_codec_data omap3evm_codec_data = { | ||
| 299 | .audio_mclk = 26000000, | ||
| 300 | .audio = &omap3evm_audio_data, | ||
| 301 | }; | ||
| 302 | |||
| 197 | static struct twl4030_platform_data omap3evm_twldata = { | 303 | static struct twl4030_platform_data omap3evm_twldata = { |
| 198 | .irq_base = TWL4030_IRQ_BASE, | 304 | .irq_base = TWL4030_IRQ_BASE, |
| 199 | .irq_end = TWL4030_IRQ_END, | 305 | .irq_end = TWL4030_IRQ_END, |
| @@ -203,6 +309,7 @@ static struct twl4030_platform_data omap3evm_twldata = { | |||
| 203 | .madc = &omap3evm_madc_data, | 309 | .madc = &omap3evm_madc_data, |
| 204 | .usb = &omap3evm_usb_data, | 310 | .usb = &omap3evm_usb_data, |
| 205 | .gpio = &omap3evm_gpio_data, | 311 | .gpio = &omap3evm_gpio_data, |
| 312 | .codec = &omap3evm_codec_data, | ||
| 206 | }; | 313 | }; |
| 207 | 314 | ||
| 208 | static struct i2c_board_info __initdata omap3evm_i2c_boardinfo[] = { | 315 | static struct i2c_board_info __initdata omap3evm_i2c_boardinfo[] = { |
| @@ -216,6 +323,13 @@ static struct i2c_board_info __initdata omap3evm_i2c_boardinfo[] = { | |||
| 216 | 323 | ||
| 217 | static int __init omap3_evm_i2c_init(void) | 324 | static int __init omap3_evm_i2c_init(void) |
| 218 | { | 325 | { |
| 326 | /* | ||
| 327 | * REVISIT: These entries can be set in omap3evm_twl_data | ||
| 328 | * after a merge with MFD tree | ||
| 329 | */ | ||
| 330 | omap3evm_twldata.vmmc1 = &omap3evm_vmmc1; | ||
| 331 | omap3evm_twldata.vsim = &omap3evm_vsim; | ||
| 332 | |||
| 219 | omap_register_i2c_bus(1, 2600, omap3evm_i2c_boardinfo, | 333 | omap_register_i2c_bus(1, 2600, omap3evm_i2c_boardinfo, |
| 220 | ARRAY_SIZE(omap3evm_i2c_boardinfo)); | 334 | ARRAY_SIZE(omap3evm_i2c_boardinfo)); |
| 221 | omap_register_i2c_bus(2, 400, NULL, 0); | 335 | omap_register_i2c_bus(2, 400, NULL, 0); |
| @@ -289,16 +403,29 @@ static void __init omap3_evm_init_irq(void) | |||
| 289 | omap2_init_common_hw(mt46h32m32lf6_sdrc_params, NULL); | 403 | omap2_init_common_hw(mt46h32m32lf6_sdrc_params, NULL); |
| 290 | omap_init_irq(); | 404 | omap_init_irq(); |
| 291 | omap_gpio_init(); | 405 | omap_gpio_init(); |
| 292 | omap3evm_init_smc911x(); | ||
| 293 | } | 406 | } |
| 294 | 407 | ||
| 295 | static struct platform_device *omap3_evm_devices[] __initdata = { | 408 | static struct platform_device *omap3_evm_devices[] __initdata = { |
| 296 | &omap3_evm_lcd_device, | 409 | &omap3_evm_lcd_device, |
| 297 | &omap3evm_smc911x_device, | 410 | }; |
| 411 | |||
| 412 | static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { | ||
| 413 | |||
| 414 | .port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN, | ||
| 415 | .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, | ||
| 416 | .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, | ||
| 417 | |||
| 418 | .phy_reset = true, | ||
| 419 | /* PHY reset GPIO will be runtime programmed based on EVM version */ | ||
| 420 | .reset_gpio_port[0] = -EINVAL, | ||
| 421 | .reset_gpio_port[1] = -EINVAL, | ||
| 422 | .reset_gpio_port[2] = -EINVAL | ||
| 298 | }; | 423 | }; |
| 299 | 424 | ||
| 300 | static void __init omap3_evm_init(void) | 425 | static void __init omap3_evm_init(void) |
| 301 | { | 426 | { |
| 427 | omap3_evm_get_revision(); | ||
| 428 | |||
| 302 | omap3_evm_i2c_init(); | 429 | omap3_evm_i2c_init(); |
| 303 | 430 | ||
| 304 | platform_add_devices(omap3_evm_devices, ARRAY_SIZE(omap3_evm_devices)); | 431 | platform_add_devices(omap3_evm_devices, ARRAY_SIZE(omap3_evm_devices)); |
| @@ -311,8 +438,32 @@ static void __init omap3_evm_init(void) | |||
| 311 | /* OMAP3EVM uses ISP1504 phy and so register nop transceiver */ | 438 | /* OMAP3EVM uses ISP1504 phy and so register nop transceiver */ |
| 312 | usb_nop_xceiv_register(); | 439 | usb_nop_xceiv_register(); |
| 313 | #endif | 440 | #endif |
| 441 | if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) { | ||
| 442 | /* enable EHCI VBUS using GPIO22 */ | ||
| 443 | omap_cfg_reg(AF9_34XX_GPIO22); | ||
| 444 | gpio_request(OMAP3_EVM_EHCI_VBUS, "enable EHCI VBUS"); | ||
| 445 | gpio_direction_output(OMAP3_EVM_EHCI_VBUS, 0); | ||
| 446 | gpio_set_value(OMAP3_EVM_EHCI_VBUS, 1); | ||
| 447 | |||
| 448 | /* Select EHCI port on main board */ | ||
| 449 | omap_cfg_reg(U3_34XX_GPIO61); | ||
| 450 | gpio_request(OMAP3_EVM_EHCI_SELECT, "select EHCI port"); | ||
| 451 | gpio_direction_output(OMAP3_EVM_EHCI_SELECT, 0); | ||
| 452 | gpio_set_value(OMAP3_EVM_EHCI_SELECT, 0); | ||
| 453 | |||
| 454 | /* setup EHCI phy reset config */ | ||
| 455 | omap_cfg_reg(AH14_34XX_GPIO21); | ||
| 456 | ehci_pdata.reset_gpio_port[1] = 21; | ||
| 457 | |||
| 458 | } else { | ||
| 459 | /* setup EHCI phy reset on MDC */ | ||
| 460 | omap_cfg_reg(AF4_34XX_GPIO135_OUT); | ||
| 461 | ehci_pdata.reset_gpio_port[1] = 135; | ||
| 462 | } | ||
| 314 | usb_musb_init(); | 463 | usb_musb_init(); |
| 464 | usb_ehci_init(&ehci_pdata); | ||
| 315 | ads7846_dev_init(); | 465 | ads7846_dev_init(); |
| 466 | omap3evm_init_smsc911x(); | ||
| 316 | } | 467 | } |
| 317 | 468 | ||
| 318 | static void __init omap3_evm_map_io(void) | 469 | static void __init omap3_evm_map_io(void) |
| @@ -324,7 +475,7 @@ static void __init omap3_evm_map_io(void) | |||
| 324 | MACHINE_START(OMAP3EVM, "OMAP3 EVM") | 475 | MACHINE_START(OMAP3EVM, "OMAP3 EVM") |
| 325 | /* Maintainer: Syed Mohammed Khasim - Texas Instruments */ | 476 | /* Maintainer: Syed Mohammed Khasim - Texas Instruments */ |
| 326 | .phys_io = 0x48000000, | 477 | .phys_io = 0x48000000, |
| 327 | .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, | 478 | .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, |
| 328 | .boot_params = 0x80000100, | 479 | .boot_params = 0x80000100, |
| 329 | .map_io = omap3_evm_map_io, | 480 | .map_io = omap3_evm_map_io, |
| 330 | .init_irq = omap3_evm_init_irq, | 481 | .init_irq = omap3_evm_init_irq, |
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index 7519edb6915..2db5ba5b3bf 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c | |||
| @@ -34,13 +34,13 @@ | |||
| 34 | #include <asm/mach/arch.h> | 34 | #include <asm/mach/arch.h> |
| 35 | #include <asm/mach/map.h> | 35 | #include <asm/mach/map.h> |
| 36 | 36 | ||
| 37 | #include <mach/board.h> | 37 | #include <plat/board.h> |
| 38 | #include <mach/common.h> | 38 | #include <plat/common.h> |
| 39 | #include <mach/gpio.h> | 39 | #include <mach/gpio.h> |
| 40 | #include <mach/hardware.h> | 40 | #include <mach/hardware.h> |
| 41 | #include <mach/mcspi.h> | 41 | #include <plat/mcspi.h> |
| 42 | #include <mach/usb.h> | 42 | #include <plat/usb.h> |
| 43 | #include <mach/mux.h> | 43 | #include <plat/mux.h> |
| 44 | 44 | ||
| 45 | #include "sdram-micron-mt46h32m32lf-6.h" | 45 | #include "sdram-micron-mt46h32m32lf-6.h" |
| 46 | #include "mmc-twl4030.h" | 46 | #include "mmc-twl4030.h" |
| @@ -281,11 +281,21 @@ static struct twl4030_usb_data omap3pandora_usb_data = { | |||
| 281 | .usb_mode = T2_USB_MODE_ULPI, | 281 | .usb_mode = T2_USB_MODE_ULPI, |
| 282 | }; | 282 | }; |
| 283 | 283 | ||
| 284 | static struct twl4030_codec_audio_data omap3pandora_audio_data = { | ||
| 285 | .audio_mclk = 26000000, | ||
| 286 | }; | ||
| 287 | |||
| 288 | static struct twl4030_codec_data omap3pandora_codec_data = { | ||
| 289 | .audio_mclk = 26000000, | ||
| 290 | .audio = &omap3pandora_audio_data, | ||
| 291 | }; | ||
| 292 | |||
| 284 | static struct twl4030_platform_data omap3pandora_twldata = { | 293 | static struct twl4030_platform_data omap3pandora_twldata = { |
| 285 | .irq_base = TWL4030_IRQ_BASE, | 294 | .irq_base = TWL4030_IRQ_BASE, |
| 286 | .irq_end = TWL4030_IRQ_END, | 295 | .irq_end = TWL4030_IRQ_END, |
| 287 | .gpio = &omap3pandora_gpio_data, | 296 | .gpio = &omap3pandora_gpio_data, |
| 288 | .usb = &omap3pandora_usb_data, | 297 | .usb = &omap3pandora_usb_data, |
| 298 | .codec = &omap3pandora_codec_data, | ||
| 289 | .vmmc1 = &pandora_vmmc1, | 299 | .vmmc1 = &pandora_vmmc1, |
| 290 | .vmmc2 = &pandora_vmmc2, | 300 | .vmmc2 = &pandora_vmmc2, |
| 291 | .keypad = &pandora_kp_data, | 301 | .keypad = &pandora_kp_data, |
| @@ -387,6 +397,18 @@ static struct platform_device *omap3pandora_devices[] __initdata = { | |||
| 387 | &pandora_keys_gpio, | 397 | &pandora_keys_gpio, |
| 388 | }; | 398 | }; |
| 389 | 399 | ||
| 400 | static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { | ||
| 401 | |||
| 402 | .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, | ||
| 403 | .port_mode[1] = EHCI_HCD_OMAP_MODE_UNKNOWN, | ||
| 404 | .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, | ||
| 405 | |||
| 406 | .phy_reset = true, | ||
| 407 | .reset_gpio_port[0] = 16, | ||
| 408 | .reset_gpio_port[1] = -EINVAL, | ||
| 409 | .reset_gpio_port[2] = -EINVAL | ||
| 410 | }; | ||
| 411 | |||
| 390 | static void __init omap3pandora_init(void) | 412 | static void __init omap3pandora_init(void) |
| 391 | { | 413 | { |
| 392 | omap3pandora_i2c_init(); | 414 | omap3pandora_i2c_init(); |
| @@ -396,6 +418,7 @@ static void __init omap3pandora_init(void) | |||
| 396 | spi_register_board_info(omap3pandora_spi_board_info, | 418 | spi_register_board_info(omap3pandora_spi_board_info, |
| 397 | ARRAY_SIZE(omap3pandora_spi_board_info)); | 419 | ARRAY_SIZE(omap3pandora_spi_board_info)); |
| 398 | omap3pandora_ads7846_init(); | 420 | omap3pandora_ads7846_init(); |
| 421 | usb_ehci_init(&ehci_pdata); | ||
| 399 | pandora_keys_gpio_init(); | 422 | pandora_keys_gpio_init(); |
| 400 | usb_musb_init(); | 423 | usb_musb_init(); |
| 401 | 424 | ||
| @@ -412,7 +435,7 @@ static void __init omap3pandora_map_io(void) | |||
| 412 | 435 | ||
| 413 | MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console") | 436 | MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console") |
| 414 | .phys_io = 0x48000000, | 437 | .phys_io = 0x48000000, |
| 415 | .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, | 438 | .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, |
| 416 | .boot_params = 0x80000100, | 439 | .boot_params = 0x80000100, |
| 417 | .map_io = omap3pandora_map_io, | 440 | .map_io = omap3pandora_map_io, |
| 418 | .init_irq = omap3pandora_init_irq, | 441 | .init_irq = omap3pandora_init_irq, |
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c index 9917d2fddc2..52dfd51a938 100644 --- a/arch/arm/mach-omap2/board-overo.c +++ b/arch/arm/mach-omap2/board-overo.c | |||
| @@ -38,14 +38,14 @@ | |||
| 38 | #include <asm/mach/flash.h> | 38 | #include <asm/mach/flash.h> |
| 39 | #include <asm/mach/map.h> | 39 | #include <asm/mach/map.h> |
| 40 | 40 | ||
| 41 | #include <mach/board.h> | 41 | #include <plat/board.h> |
| 42 | #include <mach/common.h> | 42 | #include <plat/common.h> |
| 43 | #include <mach/gpio.h> | 43 | #include <mach/gpio.h> |
| 44 | #include <mach/gpmc.h> | 44 | #include <plat/gpmc.h> |
| 45 | #include <mach/hardware.h> | 45 | #include <mach/hardware.h> |
| 46 | #include <mach/nand.h> | 46 | #include <plat/nand.h> |
| 47 | #include <mach/mux.h> | 47 | #include <plat/mux.h> |
| 48 | #include <mach/usb.h> | 48 | #include <plat/usb.h> |
| 49 | 49 | ||
| 50 | #include "sdram-micron-mt46h32m32lf-6.h" | 50 | #include "sdram-micron-mt46h32m32lf-6.h" |
| 51 | #include "mmc-twl4030.h" | 51 | #include "mmc-twl4030.h" |
| @@ -67,7 +67,7 @@ | |||
| 67 | #if defined(CONFIG_TOUCHSCREEN_ADS7846) || \ | 67 | #if defined(CONFIG_TOUCHSCREEN_ADS7846) || \ |
| 68 | defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) | 68 | defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) |
| 69 | 69 | ||
| 70 | #include <mach/mcspi.h> | 70 | #include <plat/mcspi.h> |
| 71 | #include <linux/spi/spi.h> | 71 | #include <linux/spi/spi.h> |
| 72 | #include <linux/spi/ads7846.h> | 72 | #include <linux/spi/ads7846.h> |
| 73 | 73 | ||
| @@ -329,6 +329,15 @@ static struct regulator_init_data overo_vmmc1 = { | |||
| 329 | .consumer_supplies = &overo_vmmc1_supply, | 329 | .consumer_supplies = &overo_vmmc1_supply, |
| 330 | }; | 330 | }; |
| 331 | 331 | ||
| 332 | static struct twl4030_codec_audio_data overo_audio_data = { | ||
| 333 | .audio_mclk = 26000000, | ||
| 334 | }; | ||
| 335 | |||
| 336 | static struct twl4030_codec_data overo_codec_data = { | ||
| 337 | .audio_mclk = 26000000, | ||
| 338 | .audio = &overo_audio_data, | ||
| 339 | }; | ||
| 340 | |||
| 332 | /* mmc2 (WLAN) and Bluetooth don't use twl4030 regulators */ | 341 | /* mmc2 (WLAN) and Bluetooth don't use twl4030 regulators */ |
| 333 | 342 | ||
| 334 | static struct twl4030_platform_data overo_twldata = { | 343 | static struct twl4030_platform_data overo_twldata = { |
| @@ -336,6 +345,7 @@ static struct twl4030_platform_data overo_twldata = { | |||
| 336 | .irq_end = TWL4030_IRQ_END, | 345 | .irq_end = TWL4030_IRQ_END, |
| 337 | .gpio = &overo_gpio_data, | 346 | .gpio = &overo_gpio_data, |
| 338 | .usb = &overo_usb_data, | 347 | .usb = &overo_usb_data, |
| 348 | .codec = &overo_codec_data, | ||
| 339 | .vmmc1 = &overo_vmmc1, | 349 | .vmmc1 = &overo_vmmc1, |
| 340 | }; | 350 | }; |
| 341 | 351 | ||
| @@ -384,6 +394,18 @@ static struct platform_device *overo_devices[] __initdata = { | |||
| 384 | &overo_lcd_device, | 394 | &overo_lcd_device, |
| 385 | }; | 395 | }; |
| 386 | 396 | ||
| 397 | static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { | ||
| 398 | .port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN, | ||
| 399 | .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, | ||
| 400 | .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, | ||
| 401 | |||
| 402 | .phy_reset = true, | ||
| 403 | .reset_gpio_port[0] = -EINVAL, | ||
| 404 | .reset_gpio_port[1] = OVERO_GPIO_USBH_NRESET, | ||
| 405 | .reset_gpio_port[2] = -EINVAL | ||
| 406 | }; | ||
| 407 | |||
| 408 | |||
| 387 | static void __init overo_init(void) | 409 | static void __init overo_init(void) |
| 388 | { | 410 | { |
| 389 | overo_i2c_init(); | 411 | overo_i2c_init(); |
| @@ -391,6 +413,7 @@ static void __init overo_init(void) | |||
| 391 | omap_serial_init(); | 413 | omap_serial_init(); |
| 392 | overo_flash_init(); | 414 | overo_flash_init(); |
| 393 | usb_musb_init(); | 415 | usb_musb_init(); |
| 416 | usb_ehci_init(&ehci_pdata); | ||
| 394 | overo_ads7846_init(); | 417 | overo_ads7846_init(); |
| 395 | overo_init_smsc911x(); | 418 | overo_init_smsc911x(); |
| 396 | 419 | ||
| @@ -433,14 +456,6 @@ static void __init overo_init(void) | |||
| 433 | else | 456 | else |
| 434 | printk(KERN_ERR "could not obtain gpio for " | 457 | printk(KERN_ERR "could not obtain gpio for " |
| 435 | "OVERO_GPIO_USBH_CPEN\n"); | 458 | "OVERO_GPIO_USBH_CPEN\n"); |
| 436 | |||
| 437 | if ((gpio_request(OVERO_GPIO_USBH_NRESET, | ||
| 438 | "OVERO_GPIO_USBH_NRESET") == 0) && | ||
| 439 | (gpio_direction_output(OVERO_GPIO_USBH_NRESET, 1) == 0)) | ||
| 440 | gpio_export(OVERO_GPIO_USBH_NRESET, 0); | ||
| 441 | else | ||
| 442 | printk(KERN_ERR "could not obtain gpio for " | ||
| 443 | "OVERO_GPIO_USBH_NRESET\n"); | ||
| 444 | } | 459 | } |
| 445 | 460 | ||
| 446 | static void __init overo_map_io(void) | 461 | static void __init overo_map_io(void) |
| @@ -451,7 +466,7 @@ static void __init overo_map_io(void) | |||
| 451 | 466 | ||
| 452 | MACHINE_START(OVERO, "Gumstix Overo") | 467 | MACHINE_START(OVERO, "Gumstix Overo") |
| 453 | .phys_io = 0x48000000, | 468 | .phys_io = 0x48000000, |
| 454 | .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, | 469 | .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, |
| 455 | .boot_params = 0x80000100, | 470 | .boot_params = 0x80000100, |
| 456 | .map_io = overo_map_io, | 471 | .map_io = overo_map_io, |
| 457 | .init_irq = overo_init_irq, | 472 | .init_irq = overo_init_irq, |
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index e34d96a825e..15ce6514c5f 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c | |||
| @@ -14,28 +14,137 @@ | |||
| 14 | #include <linux/input.h> | 14 | #include <linux/input.h> |
| 15 | #include <linux/input/matrix_keypad.h> | 15 | #include <linux/input/matrix_keypad.h> |
| 16 | #include <linux/spi/spi.h> | 16 | #include <linux/spi/spi.h> |
| 17 | #include <linux/spi/wl12xx.h> | ||
| 17 | #include <linux/i2c.h> | 18 | #include <linux/i2c.h> |
| 18 | #include <linux/i2c/twl4030.h> | 19 | #include <linux/i2c/twl4030.h> |
| 19 | #include <linux/clk.h> | 20 | #include <linux/clk.h> |
| 20 | #include <linux/delay.h> | 21 | #include <linux/delay.h> |
| 21 | #include <linux/regulator/machine.h> | 22 | #include <linux/regulator/machine.h> |
| 22 | #include <linux/gpio.h> | 23 | #include <linux/gpio.h> |
| 24 | #include <linux/gpio_keys.h> | ||
| 23 | #include <linux/mmc/host.h> | 25 | #include <linux/mmc/host.h> |
| 24 | 26 | ||
| 25 | #include <mach/mcspi.h> | 27 | #include <plat/mcspi.h> |
| 26 | #include <mach/mux.h> | 28 | #include <plat/mux.h> |
| 27 | #include <mach/board.h> | 29 | #include <plat/board.h> |
| 28 | #include <mach/common.h> | 30 | #include <plat/common.h> |
| 29 | #include <mach/dma.h> | 31 | #include <plat/dma.h> |
| 30 | #include <mach/gpmc.h> | 32 | #include <plat/gpmc.h> |
| 31 | #include <mach/onenand.h> | 33 | #include <plat/onenand.h> |
| 32 | #include <mach/gpmc-smc91x.h> | 34 | #include <plat/gpmc-smc91x.h> |
| 33 | 35 | ||
| 34 | #include "mmc-twl4030.h" | 36 | #include "mmc-twl4030.h" |
| 35 | 37 | ||
| 36 | #define SYSTEM_REV_B_USES_VAUX3 0x1699 | 38 | #define SYSTEM_REV_B_USES_VAUX3 0x1699 |
| 37 | #define SYSTEM_REV_S_USES_VAUX3 0x8 | 39 | #define SYSTEM_REV_S_USES_VAUX3 0x8 |
| 38 | 40 | ||
| 41 | #define RX51_WL1251_POWER_GPIO 87 | ||
| 42 | #define RX51_WL1251_IRQ_GPIO 42 | ||
| 43 | |||
| 44 | /* list all spi devices here */ | ||
| 45 | enum { | ||
| 46 | RX51_SPI_WL1251, | ||
| 47 | }; | ||
| 48 | |||
| 49 | static struct wl12xx_platform_data wl1251_pdata; | ||
| 50 | |||
| 51 | static struct omap2_mcspi_device_config wl1251_mcspi_config = { | ||
| 52 | .turbo_mode = 0, | ||
| 53 | .single_channel = 1, | ||
| 54 | }; | ||
| 55 | |||
| 56 | static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = { | ||
| 57 | [RX51_SPI_WL1251] = { | ||
| 58 | .modalias = "wl1251", | ||
| 59 | .bus_num = 4, | ||
| 60 | .chip_select = 0, | ||
| 61 | .max_speed_hz = 48000000, | ||
| 62 | .mode = SPI_MODE_2, | ||
| 63 | .controller_data = &wl1251_mcspi_config, | ||
| 64 | .platform_data = &wl1251_pdata, | ||
| 65 | }, | ||
| 66 | }; | ||
| 67 | |||
| 68 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) | ||
| 69 | |||
| 70 | #define RX51_GPIO_CAMERA_LENS_COVER 110 | ||
| 71 | #define RX51_GPIO_CAMERA_FOCUS 68 | ||
| 72 | #define RX51_GPIO_CAMERA_CAPTURE 69 | ||
| 73 | #define RX51_GPIO_KEYPAD_SLIDE 71 | ||
| 74 | #define RX51_GPIO_LOCK_BUTTON 113 | ||
| 75 | #define RX51_GPIO_PROXIMITY 89 | ||
| 76 | |||
| 77 | #define RX51_GPIO_DEBOUNCE_TIMEOUT 10 | ||
| 78 | |||
| 79 | static struct gpio_keys_button rx51_gpio_keys[] = { | ||
| 80 | { | ||
| 81 | .desc = "Camera Lens Cover", | ||
| 82 | .type = EV_SW, | ||
| 83 | .code = SW_CAMERA_LENS_COVER, | ||
| 84 | .gpio = RX51_GPIO_CAMERA_LENS_COVER, | ||
| 85 | .active_low = 1, | ||
| 86 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | ||
| 87 | }, { | ||
| 88 | .desc = "Camera Focus", | ||
| 89 | .type = EV_KEY, | ||
| 90 | .code = KEY_CAMERA_FOCUS, | ||
| 91 | .gpio = RX51_GPIO_CAMERA_FOCUS, | ||
| 92 | .active_low = 1, | ||
| 93 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | ||
| 94 | }, { | ||
| 95 | .desc = "Camera Capture", | ||
| 96 | .type = EV_KEY, | ||
| 97 | .code = KEY_CAMERA, | ||
| 98 | .gpio = RX51_GPIO_CAMERA_CAPTURE, | ||
| 99 | .active_low = 1, | ||
| 100 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | ||
| 101 | }, { | ||
| 102 | .desc = "Lock Button", | ||
| 103 | .type = EV_KEY, | ||
| 104 | .code = KEY_SCREENLOCK, | ||
| 105 | .gpio = RX51_GPIO_LOCK_BUTTON, | ||
| 106 | .active_low = 1, | ||
| 107 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | ||
| 108 | }, { | ||
| 109 | .desc = "Keypad Slide", | ||
| 110 | .type = EV_SW, | ||
| 111 | .code = SW_KEYPAD_SLIDE, | ||
| 112 | .gpio = RX51_GPIO_KEYPAD_SLIDE, | ||
| 113 | .active_low = 1, | ||
| 114 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | ||
| 115 | }, { | ||
| 116 | .desc = "Proximity Sensor", | ||
| 117 | .type = EV_SW, | ||
| 118 | .code = SW_FRONT_PROXIMITY, | ||
| 119 | .gpio = RX51_GPIO_PROXIMITY, | ||
| 120 | .active_low = 0, | ||
| 121 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | ||
| 122 | } | ||
| 123 | }; | ||
| 124 | |||
| 125 | static struct gpio_keys_platform_data rx51_gpio_keys_data = { | ||
| 126 | .buttons = rx51_gpio_keys, | ||
| 127 | .nbuttons = ARRAY_SIZE(rx51_gpio_keys), | ||
| 128 | }; | ||
| 129 | |||
| 130 | static struct platform_device rx51_gpio_keys_device = { | ||
| 131 | .name = "gpio-keys", | ||
| 132 | .id = -1, | ||
| 133 | .dev = { | ||
| 134 | .platform_data = &rx51_gpio_keys_data, | ||
| 135 | }, | ||
| 136 | }; | ||
| 137 | |||
| 138 | static void __init rx51_add_gpio_keys(void) | ||
| 139 | { | ||
| 140 | platform_device_register(&rx51_gpio_keys_device); | ||
| 141 | } | ||
| 142 | #else | ||
| 143 | static void __init rx51_add_gpio_keys(void) | ||
| 144 | { | ||
| 145 | } | ||
| 146 | #endif /* CONFIG_KEYBOARD_GPIO || CONFIG_KEYBOARD_GPIO_MODULE */ | ||
| 147 | |||
| 39 | static int board_keymap[] = { | 148 | static int board_keymap[] = { |
| 40 | KEY(0, 0, KEY_Q), | 149 | KEY(0, 0, KEY_Q), |
| 41 | KEY(0, 1, KEY_O), | 150 | KEY(0, 1, KEY_O), |
| @@ -536,10 +645,64 @@ static inline void board_smc91x_init(void) | |||
| 536 | 645 | ||
| 537 | #endif | 646 | #endif |
| 538 | 647 | ||
| 648 | static void rx51_wl1251_set_power(bool enable) | ||
| 649 | { | ||
| 650 | gpio_set_value(RX51_WL1251_POWER_GPIO, enable); | ||
| 651 | } | ||
| 652 | |||
| 653 | static void __init rx51_init_wl1251(void) | ||
| 654 | { | ||
| 655 | int irq, ret; | ||
| 656 | |||
| 657 | ret = gpio_request(RX51_WL1251_POWER_GPIO, "wl1251 power"); | ||
| 658 | if (ret < 0) | ||
| 659 | goto error; | ||
| 660 | |||
| 661 | ret = gpio_direction_output(RX51_WL1251_POWER_GPIO, 0); | ||
| 662 | if (ret < 0) | ||
| 663 | goto err_power; | ||
| 664 | |||
| 665 | ret = gpio_request(RX51_WL1251_IRQ_GPIO, "wl1251 irq"); | ||
| 666 | if (ret < 0) | ||
| 667 | goto err_power; | ||
| 668 | |||
| 669 | ret = gpio_direction_input(RX51_WL1251_IRQ_GPIO); | ||
| 670 | if (ret < 0) | ||
| 671 | goto err_irq; | ||
| 672 | |||
| 673 | irq = gpio_to_irq(RX51_WL1251_IRQ_GPIO); | ||
| 674 | if (irq < 0) | ||
| 675 | goto err_irq; | ||
| 676 | |||
| 677 | wl1251_pdata.set_power = rx51_wl1251_set_power; | ||
| 678 | rx51_peripherals_spi_board_info[RX51_SPI_WL1251].irq = irq; | ||
| 679 | |||
| 680 | return; | ||
| 681 | |||
| 682 | err_irq: | ||
| 683 | gpio_free(RX51_WL1251_IRQ_GPIO); | ||
| 684 | |||
| 685 | err_power: | ||
| 686 | gpio_free(RX51_WL1251_POWER_GPIO); | ||
| 687 | |||
| 688 | error: | ||
| 689 | printk(KERN_ERR "wl1251 board initialisation failed\n"); | ||
| 690 | wl1251_pdata.set_power = NULL; | ||
| 691 | |||
| 692 | /* | ||
| 693 | * Now rx51_peripherals_spi_board_info[1].irq is zero and | ||
| 694 | * set_power is null, and wl1251_probe() will fail. | ||
| 695 | */ | ||
| 696 | } | ||
| 697 | |||
| 539 | void __init rx51_peripherals_init(void) | 698 | void __init rx51_peripherals_init(void) |
| 540 | { | 699 | { |
| 541 | rx51_i2c_init(); | 700 | rx51_i2c_init(); |
| 542 | board_onenand_init(); | 701 | board_onenand_init(); |
| 543 | board_smc91x_init(); | 702 | board_smc91x_init(); |
| 703 | rx51_add_gpio_keys(); | ||
| 704 | rx51_init_wl1251(); | ||
| 705 | spi_register_board_info(rx51_peripherals_spi_board_info, | ||
| 706 | ARRAY_SIZE(rx51_peripherals_spi_board_info)); | ||
| 544 | } | 707 | } |
| 545 | 708 | ||
diff --git a/arch/arm/mach-omap2/board-rx51-sdram.c b/arch/arm/mach-omap2/board-rx51-sdram.c new file mode 100644 index 00000000000..f392844195d --- /dev/null +++ b/arch/arm/mach-omap2/board-rx51-sdram.c | |||
| @@ -0,0 +1,221 @@ | |||
| 1 | /* | ||
| 2 | * SDRC register values for RX51 | ||
| 3 | * | ||
| 4 | * Copyright (C) 2008 Nokia Corporation | ||
| 5 | * | ||
| 6 | * Lauri Leukkunen <lauri.leukkunen@nokia.com> | ||
| 7 | * | ||
| 8 | * Original code by Juha Yrjola <juha.yrjola@solidboot.com> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include <linux/kernel.h> | ||
| 16 | #include <linux/clk.h> | ||
| 17 | #include <linux/err.h> | ||
| 18 | #include <linux/io.h> | ||
| 19 | |||
| 20 | #include <plat/io.h> | ||
| 21 | #include <plat/common.h> | ||
| 22 | #include <plat/clock.h> | ||
| 23 | #include <plat/sdrc.h> | ||
| 24 | |||
| 25 | |||
| 26 | /* In picoseconds, except for tREF (ns), tXP, tCKE, tWTR (clks) */ | ||
| 27 | struct sdram_timings { | ||
| 28 | u32 casl; | ||
| 29 | u32 tDAL; | ||
| 30 | u32 tDPL; | ||
| 31 | u32 tRRD; | ||
| 32 | u32 tRCD; | ||
| 33 | u32 tRP; | ||
| 34 | u32 tRAS; | ||
| 35 | u32 tRC; | ||
| 36 | u32 tRFC; | ||
| 37 | u32 tXSR; | ||
| 38 | |||
| 39 | u32 tREF; /* in ns */ | ||
| 40 | |||
| 41 | u32 tXP; | ||
| 42 | u32 tCKE; | ||
| 43 | u32 tWTR; | ||
| 44 | }; | ||
| 45 | |||
| 46 | struct omap_sdrc_params rx51_sdrc_params[4]; | ||
| 47 | |||
| 48 | static const struct sdram_timings rx51_timings[] = { | ||
| 49 | { | ||
| 50 | .casl = 3, | ||
| 51 | .tDAL = 33000, | ||
| 52 | .tDPL = 15000, | ||
| 53 | .tRRD = 12000, | ||
| 54 | .tRCD = 22500, | ||
| 55 | .tRP = 18000, | ||
| 56 | .tRAS = 42000, | ||
| 57 | .tRC = 66000, | ||
| 58 | .tRFC = 138000, | ||
| 59 | .tXSR = 200000, | ||
| 60 | |||
| 61 | .tREF = 7800, | ||
| 62 | |||
| 63 | .tXP = 2, | ||
| 64 | .tCKE = 2, | ||
| 65 | .tWTR = 2 | ||
| 66 | }, | ||
| 67 | }; | ||
| 68 | |||
| 69 | static unsigned long sdrc_get_fclk_period(long rate) | ||
| 70 | { | ||
| 71 | /* In picoseconds */ | ||
| 72 | return 1000000000 / rate; | ||
| 73 | } | ||
| 74 | |||
| 75 | static unsigned int sdrc_ps_to_ticks(unsigned int time_ps, long rate) | ||
| 76 | { | ||
| 77 | unsigned long tick_ps; | ||
| 78 | |||
| 79 | /* Calculate in picosecs to yield more exact results */ | ||
| 80 | tick_ps = sdrc_get_fclk_period(rate); | ||
| 81 | |||
| 82 | return (time_ps + tick_ps - 1) / tick_ps; | ||
| 83 | } | ||
| 84 | #undef DEBUG | ||
| 85 | #ifdef DEBUG | ||
| 86 | static int set_sdrc_timing_regval(u32 *regval, int st_bit, int end_bit, | ||
| 87 | int ticks, long rate, const char *name) | ||
| 88 | #else | ||
| 89 | static int set_sdrc_timing_regval(u32 *regval, int st_bit, int end_bit, | ||
| 90 | int ticks) | ||
| 91 | #endif | ||
| 92 | { | ||
| 93 | int mask, nr_bits; | ||
| 94 | |||
| 95 | nr_bits = end_bit - st_bit + 1; | ||
| 96 | if (ticks >= 1 << nr_bits) | ||
| 97 | return -1; | ||
| 98 | mask = (1 << nr_bits) - 1; | ||
| 99 | *regval &= ~(mask << st_bit); | ||
| 100 | *regval |= ticks << st_bit; | ||
| 101 | #ifdef DEBUG | ||
| 102 | printk(KERN_INFO "SDRC %s: %i ticks %i ns\n", name, ticks, | ||
| 103 | (unsigned int)sdrc_get_fclk_period(rate) * ticks / | ||
| 104 | 1000); | ||
| 105 | #endif | ||
| 106 | |||
| 107 | return 0; | ||
| 108 | } | ||
| 109 | |||
| 110 | #ifdef DEBUG | ||
| 111 | #define SDRC_SET_ONE(reg, st, end, field, rate) \ | ||
| 112 | if (set_sdrc_timing_regval((reg), (st), (end), \ | ||
| 113 | rx51_timings->field, (rate), #field) < 0) \ | ||
| 114 | err = -1; | ||
| 115 | #else | ||
| 116 | #define SDRC_SET_ONE(reg, st, end, field, rate) \ | ||
| 117 | if (set_sdrc_timing_regval((reg), (st), (end), \ | ||
| 118 | rx51_timings->field) < 0) \ | ||
| 119 | err = -1; | ||
| 120 | #endif | ||
| 121 | |||
| 122 | #ifdef DEBUG | ||
| 123 | static int set_sdrc_timing_regval_ps(u32 *regval, int st_bit, int end_bit, | ||
| 124 | int time, long rate, const char *name) | ||
| 125 | #else | ||
| 126 | static int set_sdrc_timing_regval_ps(u32 *regval, int st_bit, int end_bit, | ||
| 127 | int time, long rate) | ||
| 128 | #endif | ||
| 129 | { | ||
| 130 | int ticks, ret; | ||
| 131 | ret = 0; | ||
| 132 | |||
| 133 | if (time == 0) | ||
| 134 | ticks = 0; | ||
| 135 | else | ||
| 136 | ticks = sdrc_ps_to_ticks(time, rate); | ||
| 137 | |||
| 138 | #ifdef DEBUG | ||
| 139 | ret = set_sdrc_timing_regval(regval, st_bit, end_bit, ticks, | ||
| 140 | rate, name); | ||
| 141 | #else | ||
| 142 | ret = set_sdrc_timing_regval(regval, st_bit, end_bit, ticks); | ||
| 143 | #endif | ||
| 144 | |||
| 145 | return ret; | ||
| 146 | } | ||
| 147 | |||
| 148 | #ifdef DEBUG | ||
| 149 | #define SDRC_SET_ONE_PS(reg, st, end, field, rate) \ | ||
| 150 | if (set_sdrc_timing_regval_ps((reg), (st), (end), \ | ||
| 151 | rx51_timings->field, \ | ||
| 152 | (rate), #field) < 0) \ | ||
| 153 | err = -1; | ||
| 154 | |||
| 155 | #else | ||
| 156 | #define SDRC_SET_ONE_PS(reg, st, end, field, rate) \ | ||
| 157 | if (set_sdrc_timing_regval_ps((reg), (st), (end), \ | ||
| 158 | rx51_timings->field, (rate)) < 0) \ | ||
| 159 | err = -1; | ||
| 160 | #endif | ||
| 161 | |||
| 162 | static int sdrc_timings(int id, long rate) | ||
| 163 | { | ||
| 164 | u32 ticks_per_ms; | ||
| 165 | u32 rfr, l; | ||
| 166 | u32 actim_ctrla = 0, actim_ctrlb = 0; | ||
| 167 | u32 rfr_ctrl; | ||
| 168 | int err = 0; | ||
| 169 | long l3_rate = rate / 1000; | ||
| 170 | |||
| 171 | SDRC_SET_ONE_PS(&actim_ctrla, 0, 4, tDAL, l3_rate); | ||
| 172 | SDRC_SET_ONE_PS(&actim_ctrla, 6, 8, tDPL, l3_rate); | ||
| 173 | SDRC_SET_ONE_PS(&actim_ctrla, 9, 11, tRRD, l3_rate); | ||
| 174 | SDRC_SET_ONE_PS(&actim_ctrla, 12, 14, tRCD, l3_rate); | ||
| 175 | SDRC_SET_ONE_PS(&actim_ctrla, 15, 17, tRP, l3_rate); | ||
| 176 | SDRC_SET_ONE_PS(&actim_ctrla, 18, 21, tRAS, l3_rate); | ||
| 177 | SDRC_SET_ONE_PS(&actim_ctrla, 22, 26, tRC, l3_rate); | ||
| 178 | SDRC_SET_ONE_PS(&actim_ctrla, 27, 31, tRFC, l3_rate); | ||
| 179 | |||
| 180 | SDRC_SET_ONE_PS(&actim_ctrlb, 0, 7, tXSR, l3_rate); | ||
| 181 | |||
| 182 | SDRC_SET_ONE(&actim_ctrlb, 8, 10, tXP, l3_rate); | ||
| 183 | SDRC_SET_ONE(&actim_ctrlb, 12, 14, tCKE, l3_rate); | ||
| 184 | SDRC_SET_ONE(&actim_ctrlb, 16, 17, tWTR, l3_rate); | ||
| 185 | |||
| 186 | ticks_per_ms = l3_rate; | ||
| 187 | rfr = rx51_timings[0].tREF * ticks_per_ms / 1000000; | ||
| 188 | if (rfr > 65535 + 50) | ||
| 189 | rfr = 65535; | ||
| 190 | else | ||
| 191 | rfr -= 50; | ||
| 192 | |||
| 193 | #ifdef DEBUG | ||
| 194 | printk(KERN_INFO "SDRC tREF: %i ticks\n", rfr); | ||
| 195 | #endif | ||
| 196 | |||
| 197 | l = rfr << 8; | ||
| 198 | rfr_ctrl = l | 0x1; /* autorefresh, reload counter with 1xARCV */ | ||
| 199 | |||
| 200 | rx51_sdrc_params[id].rate = rate; | ||
| 201 | rx51_sdrc_params[id].actim_ctrla = actim_ctrla; | ||
| 202 | rx51_sdrc_params[id].actim_ctrlb = actim_ctrlb; | ||
| 203 | rx51_sdrc_params[id].rfr_ctrl = rfr_ctrl; | ||
| 204 | rx51_sdrc_params[id].mr = 0x32; | ||
| 205 | |||
| 206 | rx51_sdrc_params[id + 1].rate = 0; | ||
| 207 | |||
| 208 | return err; | ||
| 209 | } | ||
| 210 | |||
| 211 | struct omap_sdrc_params *rx51_get_sdram_timings(void) | ||
| 212 | { | ||
| 213 | int err; | ||
| 214 | |||
| 215 | err = sdrc_timings(0, 41500000); | ||
| 216 | err |= sdrc_timings(1, 83000000); | ||
| 217 | err |= sdrc_timings(2, 166000000); | ||
| 218 | |||
| 219 | return &rx51_sdrc_params[0]; | ||
| 220 | } | ||
| 221 | |||
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c index 78869a9a1cc..1bb1de24591 100644 --- a/arch/arm/mach-omap2/board-rx51.c +++ b/arch/arm/mach-omap2/board-rx51.c | |||
| @@ -22,13 +22,15 @@ | |||
| 22 | #include <asm/mach/arch.h> | 22 | #include <asm/mach/arch.h> |
| 23 | #include <asm/mach/map.h> | 23 | #include <asm/mach/map.h> |
| 24 | 24 | ||
| 25 | #include <mach/mcspi.h> | 25 | #include <plat/mcspi.h> |
| 26 | #include <mach/mux.h> | 26 | #include <plat/mux.h> |
| 27 | #include <mach/board.h> | 27 | #include <plat/board.h> |
| 28 | #include <mach/common.h> | 28 | #include <plat/common.h> |
| 29 | #include <mach/dma.h> | 29 | #include <plat/dma.h> |
| 30 | #include <mach/gpmc.h> | 30 | #include <plat/gpmc.h> |
| 31 | #include <mach/usb.h> | 31 | #include <plat/usb.h> |
| 32 | |||
| 33 | struct omap_sdrc_params *rx51_get_sdram_timings(void); | ||
| 32 | 34 | ||
| 33 | static struct omap_lcd_config rx51_lcd_config = { | 35 | static struct omap_lcd_config rx51_lcd_config = { |
| 34 | .ctrl_name = "internal", | 36 | .ctrl_name = "internal", |
| @@ -55,9 +57,12 @@ static struct omap_board_config_kernel rx51_config[] = { | |||
| 55 | 57 | ||
| 56 | static void __init rx51_init_irq(void) | 58 | static void __init rx51_init_irq(void) |
| 57 | { | 59 | { |
| 60 | struct omap_sdrc_params *sdrc_params; | ||
| 61 | |||
| 58 | omap_board_config = rx51_config; | 62 | omap_board_config = rx51_config; |
| 59 | omap_board_config_size = ARRAY_SIZE(rx51_config); | 63 | omap_board_config_size = ARRAY_SIZE(rx51_config); |
| 60 | omap2_init_common_hw(NULL, NULL); | 64 | sdrc_params = rx51_get_sdram_timings(); |
| 65 | omap2_init_common_hw(sdrc_params, sdrc_params); | ||
| 61 | omap_init_irq(); | 66 | omap_init_irq(); |
| 62 | omap_gpio_init(); | 67 | omap_gpio_init(); |
| 63 | } | 68 | } |
| @@ -84,7 +89,7 @@ static void __init rx51_map_io(void) | |||
| 84 | MACHINE_START(NOKIA_RX51, "Nokia RX-51 board") | 89 | MACHINE_START(NOKIA_RX51, "Nokia RX-51 board") |
| 85 | /* Maintainer: Lauri Leukkunen <lauri.leukkunen@nokia.com> */ | 90 | /* Maintainer: Lauri Leukkunen <lauri.leukkunen@nokia.com> */ |
| 86 | .phys_io = 0x48000000, | 91 | .phys_io = 0x48000000, |
| 87 | .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, | 92 | .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, |
| 88 | .boot_params = 0x80000100, | 93 | .boot_params = 0x80000100, |
| 89 | .map_io = rx51_map_io, | 94 | .map_io = rx51_map_io, |
| 90 | .init_irq = rx51_init_irq, | 95 | .init_irq = rx51_init_irq, |
diff --git a/arch/arm/mach-omap2/board-zoom-debugboard.c b/arch/arm/mach-omap2/board-zoom-debugboard.c index 1f13e2a1f32..bb4018b6064 100644 --- a/arch/arm/mach-omap2/board-zoom-debugboard.c +++ b/arch/arm/mach-omap2/board-zoom-debugboard.c | |||
| @@ -14,20 +14,20 @@ | |||
| 14 | #include <linux/smsc911x.h> | 14 | #include <linux/smsc911x.h> |
| 15 | #include <linux/interrupt.h> | 15 | #include <linux/interrupt.h> |
| 16 | 16 | ||
| 17 | #include <mach/gpmc.h> | 17 | #include <plat/gpmc.h> |
| 18 | 18 | ||
| 19 | #define ZOOM2_SMSC911X_CS 7 | 19 | #define ZOOM_SMSC911X_CS 7 |
| 20 | #define ZOOM2_SMSC911X_GPIO 158 | 20 | #define ZOOM_SMSC911X_GPIO 158 |
| 21 | #define ZOOM2_QUADUART_CS 3 | 21 | #define ZOOM_QUADUART_CS 3 |
| 22 | #define ZOOM2_QUADUART_GPIO 102 | 22 | #define ZOOM_QUADUART_GPIO 102 |
| 23 | #define QUART_CLK 1843200 | 23 | #define QUART_CLK 1843200 |
| 24 | #define DEBUG_BASE 0x08000000 | 24 | #define DEBUG_BASE 0x08000000 |
| 25 | #define ZOOM2_ETHR_START DEBUG_BASE | 25 | #define ZOOM_ETHR_START DEBUG_BASE |
| 26 | 26 | ||
| 27 | static struct resource zoom2_smsc911x_resources[] = { | 27 | static struct resource zoom_smsc911x_resources[] = { |
| 28 | [0] = { | 28 | [0] = { |
| 29 | .start = ZOOM2_ETHR_START, | 29 | .start = ZOOM_ETHR_START, |
| 30 | .end = ZOOM2_ETHR_START + SZ_4K, | 30 | .end = ZOOM_ETHR_START + SZ_4K, |
| 31 | .flags = IORESOURCE_MEM, | 31 | .flags = IORESOURCE_MEM, |
| 32 | }, | 32 | }, |
| 33 | [1] = { | 33 | [1] = { |
| @@ -35,42 +35,42 @@ static struct resource zoom2_smsc911x_resources[] = { | |||
| 35 | }, | 35 | }, |
| 36 | }; | 36 | }; |
| 37 | 37 | ||
| 38 | static struct smsc911x_platform_config zoom2_smsc911x_config = { | 38 | static struct smsc911x_platform_config zoom_smsc911x_config = { |
| 39 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | 39 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, |
| 40 | .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, | 40 | .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, |
| 41 | .flags = SMSC911X_USE_32BIT, | 41 | .flags = SMSC911X_USE_32BIT, |
| 42 | .phy_interface = PHY_INTERFACE_MODE_MII, | 42 | .phy_interface = PHY_INTERFACE_MODE_MII, |
| 43 | }; | 43 | }; |
| 44 | 44 | ||
| 45 | static struct platform_device zoom2_smsc911x_device = { | 45 | static struct platform_device zoom_smsc911x_device = { |
| 46 | .name = "smsc911x", | 46 | .name = "smsc911x", |
| 47 | .id = -1, | 47 | .id = -1, |
| 48 | .num_resources = ARRAY_SIZE(zoom2_smsc911x_resources), | 48 | .num_resources = ARRAY_SIZE(zoom_smsc911x_resources), |
| 49 | .resource = zoom2_smsc911x_resources, | 49 | .resource = zoom_smsc911x_resources, |
| 50 | .dev = { | 50 | .dev = { |
| 51 | .platform_data = &zoom2_smsc911x_config, | 51 | .platform_data = &zoom_smsc911x_config, |
| 52 | }, | 52 | }, |
| 53 | }; | 53 | }; |
| 54 | 54 | ||
| 55 | static inline void __init zoom2_init_smsc911x(void) | 55 | static inline void __init zoom_init_smsc911x(void) |
| 56 | { | 56 | { |
| 57 | int eth_cs; | 57 | int eth_cs; |
| 58 | unsigned long cs_mem_base; | 58 | unsigned long cs_mem_base; |
| 59 | int eth_gpio = 0; | 59 | int eth_gpio = 0; |
| 60 | 60 | ||
| 61 | eth_cs = ZOOM2_SMSC911X_CS; | 61 | eth_cs = ZOOM_SMSC911X_CS; |
| 62 | 62 | ||
| 63 | if (gpmc_cs_request(eth_cs, SZ_16M, &cs_mem_base) < 0) { | 63 | if (gpmc_cs_request(eth_cs, SZ_16M, &cs_mem_base) < 0) { |
| 64 | printk(KERN_ERR "Failed to request GPMC mem for smsc911x\n"); | 64 | printk(KERN_ERR "Failed to request GPMC mem for smsc911x\n"); |
| 65 | return; | 65 | return; |
| 66 | } | 66 | } |
| 67 | 67 | ||
| 68 | zoom2_smsc911x_resources[0].start = cs_mem_base + 0x0; | 68 | zoom_smsc911x_resources[0].start = cs_mem_base + 0x0; |
| 69 | zoom2_smsc911x_resources[0].end = cs_mem_base + 0xff; | 69 | zoom_smsc911x_resources[0].end = cs_mem_base + 0xff; |
| 70 | 70 | ||
| 71 | eth_gpio = ZOOM2_SMSC911X_GPIO; | 71 | eth_gpio = ZOOM_SMSC911X_GPIO; |
| 72 | 72 | ||
| 73 | zoom2_smsc911x_resources[1].start = OMAP_GPIO_IRQ(eth_gpio); | 73 | zoom_smsc911x_resources[1].start = OMAP_GPIO_IRQ(eth_gpio); |
| 74 | 74 | ||
| 75 | if (gpio_request(eth_gpio, "smsc911x irq") < 0) { | 75 | if (gpio_request(eth_gpio, "smsc911x irq") < 0) { |
| 76 | printk(KERN_ERR "Failed to request GPIO%d for smsc911x IRQ\n", | 76 | printk(KERN_ERR "Failed to request GPIO%d for smsc911x IRQ\n", |
| @@ -94,7 +94,7 @@ static struct plat_serial8250_port serial_platform_data[] = { | |||
| 94 | } | 94 | } |
| 95 | }; | 95 | }; |
| 96 | 96 | ||
| 97 | static struct platform_device zoom2_debugboard_serial_device = { | 97 | static struct platform_device zoom_debugboard_serial_device = { |
| 98 | .name = "serial8250", | 98 | .name = "serial8250", |
| 99 | .id = 3, | 99 | .id = 3, |
| 100 | .dev = { | 100 | .dev = { |
| @@ -102,13 +102,13 @@ static struct platform_device zoom2_debugboard_serial_device = { | |||
| 102 | }, | 102 | }, |
| 103 | }; | 103 | }; |
| 104 | 104 | ||
| 105 | static inline void __init zoom2_init_quaduart(void) | 105 | static inline void __init zoom_init_quaduart(void) |
| 106 | { | 106 | { |
| 107 | int quart_cs; | 107 | int quart_cs; |
| 108 | unsigned long cs_mem_base; | 108 | unsigned long cs_mem_base; |
| 109 | int quart_gpio = 0; | 109 | int quart_gpio = 0; |
| 110 | 110 | ||
| 111 | quart_cs = ZOOM2_QUADUART_CS; | 111 | quart_cs = ZOOM_QUADUART_CS; |
| 112 | 112 | ||
| 113 | if (gpmc_cs_request(quart_cs, SZ_1M, &cs_mem_base) < 0) { | 113 | if (gpmc_cs_request(quart_cs, SZ_1M, &cs_mem_base) < 0) { |
| 114 | printk(KERN_ERR "Failed to request GPMC mem" | 114 | printk(KERN_ERR "Failed to request GPMC mem" |
| @@ -116,7 +116,7 @@ static inline void __init zoom2_init_quaduart(void) | |||
| 116 | return; | 116 | return; |
| 117 | } | 117 | } |
| 118 | 118 | ||
| 119 | quart_gpio = ZOOM2_QUADUART_GPIO; | 119 | quart_gpio = ZOOM_QUADUART_GPIO; |
| 120 | 120 | ||
| 121 | if (gpio_request(quart_gpio, "TL16CP754C GPIO") < 0) { | 121 | if (gpio_request(quart_gpio, "TL16CP754C GPIO") < 0) { |
| 122 | printk(KERN_ERR "Failed to request GPIO%d for TL16CP754C\n", | 122 | printk(KERN_ERR "Failed to request GPIO%d for TL16CP754C\n", |
| @@ -126,15 +126,15 @@ static inline void __init zoom2_init_quaduart(void) | |||
| 126 | gpio_direction_input(quart_gpio); | 126 | gpio_direction_input(quart_gpio); |
| 127 | } | 127 | } |
| 128 | 128 | ||
| 129 | static inline int omap_zoom2_debugboard_detect(void) | 129 | static inline int omap_zoom_debugboard_detect(void) |
| 130 | { | 130 | { |
| 131 | int debug_board_detect = 0; | 131 | int debug_board_detect = 0; |
| 132 | int ret = 1; | 132 | int ret = 1; |
| 133 | 133 | ||
| 134 | debug_board_detect = ZOOM2_SMSC911X_GPIO; | 134 | debug_board_detect = ZOOM_SMSC911X_GPIO; |
| 135 | 135 | ||
| 136 | if (gpio_request(debug_board_detect, "Zoom2 debug board detect") < 0) { | 136 | if (gpio_request(debug_board_detect, "Zoom debug board detect") < 0) { |
| 137 | printk(KERN_ERR "Failed to request GPIO%d for Zoom2 debug" | 137 | printk(KERN_ERR "Failed to request GPIO%d for Zoom debug" |
| 138 | "board detect\n", debug_board_detect); | 138 | "board detect\n", debug_board_detect); |
| 139 | return 0; | 139 | return 0; |
| 140 | } | 140 | } |
| @@ -147,17 +147,17 @@ static inline int omap_zoom2_debugboard_detect(void) | |||
| 147 | return ret; | 147 | return ret; |
| 148 | } | 148 | } |
| 149 | 149 | ||
| 150 | static struct platform_device *zoom2_devices[] __initdata = { | 150 | static struct platform_device *zoom_devices[] __initdata = { |
| 151 | &zoom2_smsc911x_device, | 151 | &zoom_smsc911x_device, |
| 152 | &zoom2_debugboard_serial_device, | 152 | &zoom_debugboard_serial_device, |
| 153 | }; | 153 | }; |
| 154 | 154 | ||
| 155 | int __init omap_zoom2_debugboard_init(void) | 155 | int __init zoom_debugboard_init(void) |
| 156 | { | 156 | { |
| 157 | if (!omap_zoom2_debugboard_detect()) | 157 | if (!omap_zoom_debugboard_detect()) |
| 158 | return 0; | 158 | return 0; |
| 159 | 159 | ||
| 160 | zoom2_init_smsc911x(); | 160 | zoom_init_smsc911x(); |
| 161 | zoom2_init_quaduart(); | 161 | zoom_init_quaduart(); |
| 162 | return platform_add_devices(zoom2_devices, ARRAY_SIZE(zoom2_devices)); | 162 | return platform_add_devices(zoom_devices, ARRAY_SIZE(zoom_devices)); |
| 163 | } | 163 | } |
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c new file mode 100755 index 00000000000..f14baa39276 --- /dev/null +++ b/arch/arm/mach-omap2/board-zoom-peripherals.c | |||
| @@ -0,0 +1,267 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2009 Texas Instruments Inc. | ||
| 3 | * | ||
| 4 | * Modified from mach-omap2/board-zoom2.c | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/kernel.h> | ||
| 12 | #include <linux/init.h> | ||
| 13 | #include <linux/platform_device.h> | ||
| 14 | #include <linux/input.h> | ||
| 15 | #include <linux/input/matrix_keypad.h> | ||
| 16 | #include <linux/gpio.h> | ||
| 17 | #include <linux/i2c/twl4030.h> | ||
| 18 | #include <linux/regulator/machine.h> | ||
| 19 | |||
| 20 | #include <asm/mach-types.h> | ||
| 21 | #include <asm/mach/arch.h> | ||
| 22 | #include <asm/mach/map.h> | ||
| 23 | |||
| 24 | #include <plat/common.h> | ||
| 25 | #include <plat/usb.h> | ||
| 26 | |||
| 27 | #include "mmc-twl4030.h" | ||
| 28 | |||
| 29 | /* Zoom2 has Qwerty keyboard*/ | ||
| 30 | static int board_keymap[] = { | ||
| 31 | KEY(0, 0, KEY_E), | ||
| 32 | KEY(0, 1, KEY_R), | ||
| 33 | KEY(0, 2, KEY_T), | ||
| 34 | KEY(0, 3, KEY_HOME), | ||
| 35 | KEY(0, 6, KEY_I), | ||
| 36 | KEY(0, 7, KEY_LEFTSHIFT), | ||
| 37 | KEY(1, 0, KEY_D), | ||
| 38 | KEY(1, 1, KEY_F), | ||
| 39 | KEY(1, 2, KEY_G), | ||
| 40 | KEY(1, 3, KEY_SEND), | ||
| 41 | KEY(1, 6, KEY_K), | ||
| 42 | KEY(1, 7, KEY_ENTER), | ||
| 43 | KEY(2, 0, KEY_X), | ||
| 44 | KEY(2, 1, KEY_C), | ||
| 45 | KEY(2, 2, KEY_V), | ||
| 46 | KEY(2, 3, KEY_END), | ||
| 47 | KEY(2, 6, KEY_DOT), | ||
| 48 | KEY(2, 7, KEY_CAPSLOCK), | ||
| 49 | KEY(3, 0, KEY_Z), | ||
| 50 | KEY(3, 1, KEY_KPPLUS), | ||
| 51 | KEY(3, 2, KEY_B), | ||
| 52 | KEY(3, 3, KEY_F1), | ||
| 53 | KEY(3, 6, KEY_O), | ||
| 54 | KEY(3, 7, KEY_SPACE), | ||
| 55 | KEY(4, 0, KEY_W), | ||
| 56 | KEY(4, 1, KEY_Y), | ||
| 57 | KEY(4, 2, KEY_U), | ||
| 58 | KEY(4, 3, KEY_F2), | ||
| 59 | KEY(4, 4, KEY_VOLUMEUP), | ||
| 60 | KEY(4, 6, KEY_L), | ||
| 61 | KEY(4, 7, KEY_LEFT), | ||
| 62 | KEY(5, 0, KEY_S), | ||
| 63 | KEY(5, 1, KEY_H), | ||
| 64 | KEY(5, 2, KEY_J), | ||
| 65 | KEY(5, 3, KEY_F3), | ||
| 66 | KEY(5, 5, KEY_VOLUMEDOWN), | ||
| 67 | KEY(5, 6, KEY_M), | ||
| 68 | KEY(5, 7, KEY_ENTER), | ||
| 69 | KEY(6, 0, KEY_Q), | ||
| 70 | KEY(6, 1, KEY_A), | ||
| 71 | KEY(6, 2, KEY_N), | ||
| 72 | KEY(6, 3, KEY_BACKSPACE), | ||
| 73 | KEY(6, 6, KEY_P), | ||
| 74 | KEY(6, 7, KEY_SELECT), | ||
| 75 | KEY(7, 0, KEY_PROG1), /*MACRO 1 <User defined> */ | ||
| 76 | KEY(7, 1, KEY_PROG2), /*MACRO 2 <User defined> */ | ||
| 77 | KEY(7, 2, KEY_PROG3), /*MACRO 3 <User defined> */ | ||
| 78 | KEY(7, 3, KEY_PROG4), /*MACRO 4 <User defined> */ | ||
| 79 | KEY(7, 5, KEY_RIGHT), | ||
| 80 | KEY(7, 6, KEY_UP), | ||
| 81 | KEY(7, 7, KEY_DOWN) | ||
| 82 | }; | ||
| 83 | |||
| 84 | static struct matrix_keymap_data board_map_data = { | ||
| 85 | .keymap = board_keymap, | ||
| 86 | .keymap_size = ARRAY_SIZE(board_keymap), | ||
| 87 | }; | ||
| 88 | |||
| 89 | static struct twl4030_keypad_data zoom_kp_twl4030_data = { | ||
| 90 | .keymap_data = &board_map_data, | ||
| 91 | .rows = 8, | ||
| 92 | .cols = 8, | ||
| 93 | .rep = 1, | ||
| 94 | }; | ||
| 95 | |||
| 96 | static struct regulator_consumer_supply zoom_vmmc1_supply = { | ||
| 97 | .supply = "vmmc", | ||
| 98 | }; | ||
| 99 | |||
| 100 | static struct regulator_consumer_supply zoom_vsim_supply = { | ||
| 101 | .supply = "vmmc_aux", | ||
| 102 | }; | ||
| 103 | |||
| 104 | static struct regulator_consumer_supply zoom_vmmc2_supply = { | ||
| 105 | .supply = "vmmc", | ||
| 106 | }; | ||
| 107 | |||
| 108 | /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */ | ||
| 109 | static struct regulator_init_data zoom_vmmc1 = { | ||
| 110 | .constraints = { | ||
| 111 | .min_uV = 1850000, | ||
| 112 | .max_uV = 3150000, | ||
| 113 | .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 114 | | REGULATOR_MODE_STANDBY, | ||
| 115 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | ||
| 116 | | REGULATOR_CHANGE_MODE | ||
| 117 | | REGULATOR_CHANGE_STATUS, | ||
| 118 | }, | ||
| 119 | .num_consumer_supplies = 1, | ||
| 120 | .consumer_supplies = &zoom_vmmc1_supply, | ||
| 121 | }; | ||
| 122 | |||
| 123 | /* VMMC2 for MMC2 card */ | ||
| 124 | static struct regulator_init_data zoom_vmmc2 = { | ||
| 125 | .constraints = { | ||
| 126 | .min_uV = 1850000, | ||
| 127 | .max_uV = 1850000, | ||
| 128 | .apply_uV = true, | ||
| 129 | .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 130 | | REGULATOR_MODE_STANDBY, | ||
| 131 | .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 132 | | REGULATOR_CHANGE_STATUS, | ||
| 133 | }, | ||
| 134 | .num_consumer_supplies = 1, | ||
| 135 | .consumer_supplies = &zoom_vmmc2_supply, | ||
| 136 | }; | ||
| 137 | |||
| 138 | /* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */ | ||
| 139 | static struct regulator_init_data zoom_vsim = { | ||
| 140 | .constraints = { | ||
| 141 | .min_uV = 1800000, | ||
| 142 | .max_uV = 3000000, | ||
| 143 | .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 144 | | REGULATOR_MODE_STANDBY, | ||
| 145 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | ||
| 146 | | REGULATOR_CHANGE_MODE | ||
| 147 | | REGULATOR_CHANGE_STATUS, | ||
| 148 | }, | ||
| 149 | .num_consumer_supplies = 1, | ||
| 150 | .consumer_supplies = &zoom_vsim_supply, | ||
| 151 | }; | ||
| 152 | |||
| 153 | static struct twl4030_hsmmc_info mmc[] __initdata = { | ||
| 154 | { | ||
| 155 | .mmc = 1, | ||
| 156 | .wires = 4, | ||
| 157 | .gpio_wp = -EINVAL, | ||
| 158 | }, | ||
| 159 | { | ||
| 160 | .mmc = 2, | ||
| 161 | .wires = 4, | ||
| 162 | .gpio_wp = -EINVAL, | ||
| 163 | }, | ||
| 164 | {} /* Terminator */ | ||
| 165 | }; | ||
| 166 | |||
| 167 | static int zoom_twl_gpio_setup(struct device *dev, | ||
| 168 | unsigned gpio, unsigned ngpio) | ||
| 169 | { | ||
| 170 | /* gpio + 0 is "mmc0_cd" (input/IRQ), | ||
| 171 | * gpio + 1 is "mmc1_cd" (input/IRQ) | ||
| 172 | */ | ||
| 173 | mmc[0].gpio_cd = gpio + 0; | ||
| 174 | mmc[1].gpio_cd = gpio + 1; | ||
| 175 | twl4030_mmc_init(mmc); | ||
| 176 | |||
| 177 | /* link regulators to MMC adapters ... we "know" the | ||
| 178 | * regulators will be set up only *after* we return. | ||
| 179 | */ | ||
| 180 | zoom_vmmc1_supply.dev = mmc[0].dev; | ||
| 181 | zoom_vsim_supply.dev = mmc[0].dev; | ||
| 182 | zoom_vmmc2_supply.dev = mmc[1].dev; | ||
| 183 | |||
| 184 | return 0; | ||
| 185 | } | ||
| 186 | |||
| 187 | |||
| 188 | static int zoom_batt_table[] = { | ||
| 189 | /* 0 C*/ | ||
| 190 | 30800, 29500, 28300, 27100, | ||
| 191 | 26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900, | ||
| 192 | 17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100, | ||
| 193 | 11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310, | ||
| 194 | 8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830, | ||
| 195 | 5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170, | ||
| 196 | 4040, 3910, 3790, 3670, 3550 | ||
| 197 | }; | ||
| 198 | |||
| 199 | static struct twl4030_bci_platform_data zoom_bci_data = { | ||
| 200 | .battery_tmp_tbl = zoom_batt_table, | ||
| 201 | .tblsize = ARRAY_SIZE(zoom_batt_table), | ||
| 202 | }; | ||
| 203 | |||
| 204 | static struct twl4030_usb_data zoom_usb_data = { | ||
| 205 | .usb_mode = T2_USB_MODE_ULPI, | ||
| 206 | }; | ||
| 207 | |||
| 208 | static struct twl4030_gpio_platform_data zoom_gpio_data = { | ||
| 209 | .gpio_base = OMAP_MAX_GPIO_LINES, | ||
| 210 | .irq_base = TWL4030_GPIO_IRQ_BASE, | ||
| 211 | .irq_end = TWL4030_GPIO_IRQ_END, | ||
| 212 | .setup = zoom_twl_gpio_setup, | ||
| 213 | }; | ||
| 214 | |||
| 215 | static struct twl4030_madc_platform_data zoom_madc_data = { | ||
| 216 | .irq_line = 1, | ||
| 217 | }; | ||
| 218 | |||
| 219 | static struct twl4030_codec_audio_data zoom_audio_data = { | ||
| 220 | .audio_mclk = 26000000, | ||
| 221 | }; | ||
| 222 | |||
| 223 | static struct twl4030_codec_data zoom_codec_data = { | ||
| 224 | .audio_mclk = 26000000, | ||
| 225 | .audio = &zoom_audio_data, | ||
| 226 | }; | ||
| 227 | |||
| 228 | static struct twl4030_platform_data zoom_twldata = { | ||
| 229 | .irq_base = TWL4030_IRQ_BASE, | ||
| 230 | .irq_end = TWL4030_IRQ_END, | ||
| 231 | |||
| 232 | /* platform_data for children goes here */ | ||
| 233 | .bci = &zoom_bci_data, | ||
| 234 | .madc = &zoom_madc_data, | ||
| 235 | .usb = &zoom_usb_data, | ||
| 236 | .gpio = &zoom_gpio_data, | ||
| 237 | .keypad = &zoom_kp_twl4030_data, | ||
| 238 | .codec = &zoom_codec_data, | ||
| 239 | .vmmc2 = &zoom_vmmc2, | ||
| 240 | .vsim = &zoom_vsim, | ||
| 241 | |||
| 242 | }; | ||
| 243 | |||
| 244 | static struct i2c_board_info __initdata zoom_i2c_boardinfo[] = { | ||
| 245 | { | ||
| 246 | I2C_BOARD_INFO("twl5030", 0x48), | ||
| 247 | .flags = I2C_CLIENT_WAKE, | ||
| 248 | .irq = INT_34XX_SYS_NIRQ, | ||
| 249 | .platform_data = &zoom_twldata, | ||
| 250 | }, | ||
| 251 | }; | ||
| 252 | |||
| 253 | static int __init omap_i2c_init(void) | ||
| 254 | { | ||
| 255 | omap_register_i2c_bus(1, 2400, zoom_i2c_boardinfo, | ||
| 256 | ARRAY_SIZE(zoom_i2c_boardinfo)); | ||
| 257 | omap_register_i2c_bus(2, 400, NULL, 0); | ||
| 258 | omap_register_i2c_bus(3, 400, NULL, 0); | ||
| 259 | return 0; | ||
| 260 | } | ||
| 261 | |||
| 262 | void __init zoom_peripherals_init(void) | ||
| 263 | { | ||
| 264 | omap_i2c_init(); | ||
| 265 | omap_serial_init(); | ||
| 266 | usb_musb_init(); | ||
| 267 | } | ||
diff --git a/arch/arm/mach-omap2/board-zoom2.c b/arch/arm/mach-omap2/board-zoom2.c index 51e0b3ba5f3..d94d047c7dc 100644 --- a/arch/arm/mach-omap2/board-zoom2.c +++ b/arch/arm/mach-omap2/board-zoom2.c | |||
| @@ -13,223 +13,42 @@ | |||
| 13 | #include <linux/init.h> | 13 | #include <linux/init.h> |
| 14 | #include <linux/platform_device.h> | 14 | #include <linux/platform_device.h> |
| 15 | #include <linux/input.h> | 15 | #include <linux/input.h> |
| 16 | #include <linux/input/matrix_keypad.h> | ||
| 17 | #include <linux/gpio.h> | 16 | #include <linux/gpio.h> |
| 18 | #include <linux/i2c/twl4030.h> | ||
| 19 | #include <linux/regulator/machine.h> | ||
| 20 | 17 | ||
| 21 | #include <asm/mach-types.h> | 18 | #include <asm/mach-types.h> |
| 22 | #include <asm/mach/arch.h> | 19 | #include <asm/mach/arch.h> |
| 23 | 20 | ||
| 24 | #include <mach/common.h> | 21 | #include <plat/common.h> |
| 25 | #include <mach/usb.h> | 22 | #include <plat/board.h> |
| 26 | 23 | ||
| 27 | #include "mmc-twl4030.h" | 24 | #include <mach/board-zoom.h> |
| 28 | #include "sdram-micron-mt46h32m32lf-6.h" | ||
| 29 | |||
| 30 | /* Zoom2 has Qwerty keyboard*/ | ||
| 31 | static int board_keymap[] = { | ||
| 32 | KEY(0, 0, KEY_E), | ||
| 33 | KEY(0, 1, KEY_R), | ||
| 34 | KEY(0, 2, KEY_T), | ||
| 35 | KEY(0, 3, KEY_HOME), | ||
| 36 | KEY(0, 6, KEY_I), | ||
| 37 | KEY(0, 7, KEY_LEFTSHIFT), | ||
| 38 | KEY(1, 0, KEY_D), | ||
| 39 | KEY(1, 1, KEY_F), | ||
| 40 | KEY(1, 2, KEY_G), | ||
| 41 | KEY(1, 3, KEY_SEND), | ||
| 42 | KEY(1, 6, KEY_K), | ||
| 43 | KEY(1, 7, KEY_ENTER), | ||
| 44 | KEY(2, 0, KEY_X), | ||
| 45 | KEY(2, 1, KEY_C), | ||
| 46 | KEY(2, 2, KEY_V), | ||
| 47 | KEY(2, 3, KEY_END), | ||
| 48 | KEY(2, 6, KEY_DOT), | ||
| 49 | KEY(2, 7, KEY_CAPSLOCK), | ||
| 50 | KEY(3, 0, KEY_Z), | ||
| 51 | KEY(3, 1, KEY_KPPLUS), | ||
| 52 | KEY(3, 2, KEY_B), | ||
| 53 | KEY(3, 3, KEY_F1), | ||
| 54 | KEY(3, 6, KEY_O), | ||
| 55 | KEY(3, 7, KEY_SPACE), | ||
| 56 | KEY(4, 0, KEY_W), | ||
| 57 | KEY(4, 1, KEY_Y), | ||
| 58 | KEY(4, 2, KEY_U), | ||
| 59 | KEY(4, 3, KEY_F2), | ||
| 60 | KEY(4, 4, KEY_VOLUMEUP), | ||
| 61 | KEY(4, 6, KEY_L), | ||
| 62 | KEY(4, 7, KEY_LEFT), | ||
| 63 | KEY(5, 0, KEY_S), | ||
| 64 | KEY(5, 1, KEY_H), | ||
| 65 | KEY(5, 2, KEY_J), | ||
| 66 | KEY(5, 3, KEY_F3), | ||
| 67 | KEY(5, 5, KEY_VOLUMEDOWN), | ||
| 68 | KEY(5, 6, KEY_M), | ||
| 69 | KEY(5, 7, KEY_ENTER), | ||
| 70 | KEY(6, 0, KEY_Q), | ||
| 71 | KEY(6, 1, KEY_A), | ||
| 72 | KEY(6, 2, KEY_N), | ||
| 73 | KEY(6, 3, KEY_BACKSPACE), | ||
| 74 | KEY(6, 6, KEY_P), | ||
| 75 | KEY(6, 7, KEY_SELECT), | ||
| 76 | KEY(7, 0, KEY_PROG1), /*MACRO 1 <User defined> */ | ||
| 77 | KEY(7, 1, KEY_PROG2), /*MACRO 2 <User defined> */ | ||
| 78 | KEY(7, 2, KEY_PROG3), /*MACRO 3 <User defined> */ | ||
| 79 | KEY(7, 3, KEY_PROG4), /*MACRO 4 <User defined> */ | ||
| 80 | KEY(7, 5, KEY_RIGHT), | ||
| 81 | KEY(7, 6, KEY_UP), | ||
| 82 | KEY(7, 7, KEY_DOWN) | ||
| 83 | }; | ||
| 84 | |||
| 85 | static struct matrix_keymap_data board_map_data = { | ||
| 86 | .keymap = board_keymap, | ||
| 87 | .keymap_size = ARRAY_SIZE(board_keymap), | ||
| 88 | }; | ||
| 89 | |||
| 90 | static struct twl4030_keypad_data zoom2_kp_twl4030_data = { | ||
| 91 | .keymap_data = &board_map_data, | ||
| 92 | .rows = 8, | ||
| 93 | .cols = 8, | ||
| 94 | .rep = 1, | ||
| 95 | }; | ||
| 96 | |||
| 97 | static struct omap_board_config_kernel zoom2_config[] __initdata = { | ||
| 98 | }; | ||
| 99 | |||
| 100 | static struct regulator_consumer_supply zoom2_vmmc1_supply = { | ||
| 101 | .supply = "vmmc", | ||
| 102 | }; | ||
| 103 | |||
| 104 | static struct regulator_consumer_supply zoom2_vsim_supply = { | ||
| 105 | .supply = "vmmc_aux", | ||
| 106 | }; | ||
| 107 | |||
| 108 | static struct regulator_consumer_supply zoom2_vmmc2_supply = { | ||
| 109 | .supply = "vmmc", | ||
| 110 | }; | ||
| 111 | |||
| 112 | /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */ | ||
| 113 | static struct regulator_init_data zoom2_vmmc1 = { | ||
| 114 | .constraints = { | ||
| 115 | .min_uV = 1850000, | ||
| 116 | .max_uV = 3150000, | ||
| 117 | .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 118 | | REGULATOR_MODE_STANDBY, | ||
| 119 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | ||
| 120 | | REGULATOR_CHANGE_MODE | ||
| 121 | | REGULATOR_CHANGE_STATUS, | ||
| 122 | }, | ||
| 123 | .num_consumer_supplies = 1, | ||
| 124 | .consumer_supplies = &zoom2_vmmc1_supply, | ||
| 125 | }; | ||
| 126 | |||
| 127 | /* VMMC2 for MMC2 card */ | ||
| 128 | static struct regulator_init_data zoom2_vmmc2 = { | ||
| 129 | .constraints = { | ||
| 130 | .min_uV = 1850000, | ||
| 131 | .max_uV = 1850000, | ||
| 132 | .apply_uV = true, | ||
| 133 | .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 134 | | REGULATOR_MODE_STANDBY, | ||
| 135 | .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 136 | | REGULATOR_CHANGE_STATUS, | ||
| 137 | }, | ||
| 138 | .num_consumer_supplies = 1, | ||
| 139 | .consumer_supplies = &zoom2_vmmc2_supply, | ||
| 140 | }; | ||
| 141 | |||
| 142 | /* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */ | ||
| 143 | static struct regulator_init_data zoom2_vsim = { | ||
| 144 | .constraints = { | ||
| 145 | .min_uV = 1800000, | ||
| 146 | .max_uV = 3000000, | ||
| 147 | .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 148 | | REGULATOR_MODE_STANDBY, | ||
| 149 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | ||
| 150 | | REGULATOR_CHANGE_MODE | ||
| 151 | | REGULATOR_CHANGE_STATUS, | ||
| 152 | }, | ||
| 153 | .num_consumer_supplies = 1, | ||
| 154 | .consumer_supplies = &zoom2_vsim_supply, | ||
| 155 | }; | ||
| 156 | |||
| 157 | static struct twl4030_hsmmc_info mmc[] __initdata = { | ||
| 158 | { | ||
| 159 | .mmc = 1, | ||
| 160 | .wires = 4, | ||
| 161 | .gpio_wp = -EINVAL, | ||
| 162 | }, | ||
| 163 | { | ||
| 164 | .mmc = 2, | ||
| 165 | .wires = 4, | ||
| 166 | .gpio_wp = -EINVAL, | ||
| 167 | }, | ||
| 168 | {} /* Terminator */ | ||
| 169 | }; | ||
| 170 | 25 | ||
| 171 | static int zoom2_twl_gpio_setup(struct device *dev, | 26 | #include "sdram-micron-mt46h32m32lf-6.h" |
| 172 | unsigned gpio, unsigned ngpio) | ||
| 173 | { | ||
| 174 | /* gpio + 0 is "mmc0_cd" (input/IRQ), | ||
| 175 | * gpio + 1 is "mmc1_cd" (input/IRQ) | ||
| 176 | */ | ||
| 177 | mmc[0].gpio_cd = gpio + 0; | ||
| 178 | mmc[1].gpio_cd = gpio + 1; | ||
| 179 | twl4030_mmc_init(mmc); | ||
| 180 | |||
| 181 | /* link regulators to MMC adapters ... we "know" the | ||
| 182 | * regulators will be set up only *after* we return. | ||
| 183 | */ | ||
| 184 | zoom2_vmmc1_supply.dev = mmc[0].dev; | ||
| 185 | zoom2_vsim_supply.dev = mmc[0].dev; | ||
| 186 | zoom2_vmmc2_supply.dev = mmc[1].dev; | ||
| 187 | |||
| 188 | return 0; | ||
| 189 | } | ||
| 190 | |||
| 191 | |||
| 192 | static int zoom2_batt_table[] = { | ||
| 193 | /* 0 C*/ | ||
| 194 | 30800, 29500, 28300, 27100, | ||
| 195 | 26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900, | ||
| 196 | 17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100, | ||
| 197 | 11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310, | ||
| 198 | 8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830, | ||
| 199 | 5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170, | ||
| 200 | 4040, 3910, 3790, 3670, 3550 | ||
| 201 | }; | ||
| 202 | |||
| 203 | static struct twl4030_bci_platform_data zoom2_bci_data = { | ||
| 204 | .battery_tmp_tbl = zoom2_batt_table, | ||
| 205 | .tblsize = ARRAY_SIZE(zoom2_batt_table), | ||
| 206 | }; | ||
| 207 | |||
| 208 | static struct twl4030_usb_data zoom2_usb_data = { | ||
| 209 | .usb_mode = T2_USB_MODE_ULPI, | ||
| 210 | }; | ||
| 211 | 27 | ||
| 212 | static void __init omap_zoom2_init_irq(void) | 28 | static void __init omap_zoom2_init_irq(void) |
| 213 | { | 29 | { |
| 214 | omap_board_config = zoom2_config; | ||
| 215 | omap_board_config_size = ARRAY_SIZE(zoom2_config); | ||
| 216 | omap2_init_common_hw(mt46h32m32lf6_sdrc_params, | 30 | omap2_init_common_hw(mt46h32m32lf6_sdrc_params, |
| 217 | mt46h32m32lf6_sdrc_params); | 31 | mt46h32m32lf6_sdrc_params); |
| 218 | omap_init_irq(); | 32 | omap_init_irq(); |
| 219 | omap_gpio_init(); | 33 | omap_gpio_init(); |
| 220 | } | 34 | } |
| 221 | 35 | ||
| 222 | static struct twl4030_gpio_platform_data zoom2_gpio_data = { | 36 | /* REVISIT: These audio entries can be removed once MFD code is merged */ |
| 223 | .gpio_base = OMAP_MAX_GPIO_LINES, | 37 | #if 0 |
| 224 | .irq_base = TWL4030_GPIO_IRQ_BASE, | ||
| 225 | .irq_end = TWL4030_GPIO_IRQ_END, | ||
| 226 | .setup = zoom2_twl_gpio_setup, | ||
| 227 | }; | ||
| 228 | 38 | ||
| 229 | static struct twl4030_madc_platform_data zoom2_madc_data = { | 39 | static struct twl4030_madc_platform_data zoom2_madc_data = { |
| 230 | .irq_line = 1, | 40 | .irq_line = 1, |
| 231 | }; | 41 | }; |
| 232 | 42 | ||
| 43 | static struct twl4030_codec_audio_data zoom2_audio_data = { | ||
| 44 | .audio_mclk = 26000000, | ||
| 45 | }; | ||
| 46 | |||
| 47 | static struct twl4030_codec_data zoom2_codec_data = { | ||
| 48 | .audio_mclk = 26000000, | ||
| 49 | .audio = &zoom2_audio_data, | ||
| 50 | }; | ||
| 51 | |||
| 233 | static struct twl4030_platform_data zoom2_twldata = { | 52 | static struct twl4030_platform_data zoom2_twldata = { |
| 234 | .irq_base = TWL4030_IRQ_BASE, | 53 | .irq_base = TWL4030_IRQ_BASE, |
| 235 | .irq_end = TWL4030_IRQ_END, | 54 | .irq_end = TWL4030_IRQ_END, |
| @@ -240,38 +59,19 @@ static struct twl4030_platform_data zoom2_twldata = { | |||
| 240 | .usb = &zoom2_usb_data, | 59 | .usb = &zoom2_usb_data, |
| 241 | .gpio = &zoom2_gpio_data, | 60 | .gpio = &zoom2_gpio_data, |
| 242 | .keypad = &zoom2_kp_twl4030_data, | 61 | .keypad = &zoom2_kp_twl4030_data, |
| 62 | .codec = &zoom2_codec_data, | ||
| 243 | .vmmc1 = &zoom2_vmmc1, | 63 | .vmmc1 = &zoom2_vmmc1, |
| 244 | .vmmc2 = &zoom2_vmmc2, | 64 | .vmmc2 = &zoom2_vmmc2, |
| 245 | .vsim = &zoom2_vsim, | 65 | .vsim = &zoom2_vsim, |
| 246 | 66 | ||
| 247 | }; | 67 | }; |
| 248 | 68 | ||
| 249 | static struct i2c_board_info __initdata zoom2_i2c_boardinfo[] = { | 69 | #endif |
| 250 | { | ||
| 251 | I2C_BOARD_INFO("twl4030", 0x48), | ||
| 252 | .flags = I2C_CLIENT_WAKE, | ||
| 253 | .irq = INT_34XX_SYS_NIRQ, | ||
| 254 | .platform_data = &zoom2_twldata, | ||
| 255 | }, | ||
| 256 | }; | ||
| 257 | |||
| 258 | static int __init omap_i2c_init(void) | ||
| 259 | { | ||
| 260 | omap_register_i2c_bus(1, 2600, zoom2_i2c_boardinfo, | ||
| 261 | ARRAY_SIZE(zoom2_i2c_boardinfo)); | ||
| 262 | omap_register_i2c_bus(2, 400, NULL, 0); | ||
| 263 | omap_register_i2c_bus(3, 400, NULL, 0); | ||
| 264 | return 0; | ||
| 265 | } | ||
| 266 | |||
| 267 | extern int __init omap_zoom2_debugboard_init(void); | ||
| 268 | 70 | ||
| 269 | static void __init omap_zoom2_init(void) | 71 | static void __init omap_zoom2_init(void) |
| 270 | { | 72 | { |
| 271 | omap_i2c_init(); | 73 | zoom_peripherals_init(); |
| 272 | omap_serial_init(); | 74 | zoom_debugboard_init(); |
| 273 | omap_zoom2_debugboard_init(); | ||
| 274 | usb_musb_init(); | ||
| 275 | } | 75 | } |
| 276 | 76 | ||
| 277 | static void __init omap_zoom2_map_io(void) | 77 | static void __init omap_zoom2_map_io(void) |
| @@ -282,7 +82,7 @@ static void __init omap_zoom2_map_io(void) | |||
| 282 | 82 | ||
| 283 | MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board") | 83 | MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board") |
| 284 | .phys_io = 0x48000000, | 84 | .phys_io = 0x48000000, |
| 285 | .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, | 85 | .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, |
| 286 | .boot_params = 0x80000100, | 86 | .boot_params = 0x80000100, |
| 287 | .map_io = omap_zoom2_map_io, | 87 | .map_io = omap_zoom2_map_io, |
| 288 | .init_irq = omap_zoom2_init_irq, | 88 | .init_irq = omap_zoom2_init_irq, |
diff --git a/arch/arm/mach-omap2/board-zoom3.c b/arch/arm/mach-omap2/board-zoom3.c new file mode 100644 index 00000000000..8d965a6516c --- /dev/null +++ b/arch/arm/mach-omap2/board-zoom3.c | |||
| @@ -0,0 +1,59 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2009 Texas Instruments Inc. | ||
| 3 | * | ||
| 4 | * | ||
| 5 | * This program is free software; you can redistribute it and/or modify | ||
| 6 | * it under the terms of the GNU General Public License version 2 as | ||
| 7 | * published by the Free Software Foundation. | ||
| 8 | */ | ||
| 9 | |||
| 10 | #include <linux/kernel.h> | ||
| 11 | #include <linux/init.h> | ||
| 12 | #include <linux/platform_device.h> | ||
| 13 | #include <linux/input.h> | ||
| 14 | #include <linux/gpio.h> | ||
| 15 | |||
| 16 | #include <asm/mach-types.h> | ||
| 17 | #include <asm/mach/arch.h> | ||
| 18 | |||
| 19 | #include <mach/board-zoom.h> | ||
| 20 | |||
| 21 | #include <plat/common.h> | ||
| 22 | #include <plat/board.h> | ||
| 23 | |||
| 24 | #include "sdram-hynix-h8mbx00u0mer-0em.h" | ||
| 25 | |||
| 26 | static void __init omap_zoom_map_io(void) | ||
| 27 | { | ||
| 28 | omap2_set_globals_343x(); | ||
| 29 | omap2_map_common_io(); | ||
| 30 | } | ||
| 31 | |||
| 32 | static struct omap_board_config_kernel zoom_config[] __initdata = { | ||
| 33 | }; | ||
| 34 | |||
| 35 | static void __init omap_zoom_init_irq(void) | ||
| 36 | { | ||
| 37 | omap_board_config = zoom_config; | ||
| 38 | omap_board_config_size = ARRAY_SIZE(zoom_config); | ||
| 39 | omap2_init_common_hw(h8mbx00u0mer0em_sdrc_params, | ||
| 40 | h8mbx00u0mer0em_sdrc_params); | ||
| 41 | omap_init_irq(); | ||
| 42 | omap_gpio_init(); | ||
| 43 | } | ||
| 44 | |||
| 45 | static void __init omap_zoom_init(void) | ||
| 46 | { | ||
| 47 | zoom_peripherals_init(); | ||
| 48 | zoom_debugboard_init(); | ||
| 49 | } | ||
| 50 | |||
| 51 | MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") | ||
| 52 | .phys_io = 0x48000000, | ||
| 53 | .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, | ||
| 54 | .boot_params = 0x80000100, | ||
| 55 | .map_io = omap_zoom_map_io, | ||
| 56 | .init_irq = omap_zoom_init_irq, | ||
| 57 | .init_machine = omap_zoom_init, | ||
| 58 | .timer = &omap_timer, | ||
| 59 | MACHINE_END | ||
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index f2a92d614f0..4716206547a 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c | |||
| @@ -24,13 +24,13 @@ | |||
| 24 | #include <linux/io.h> | 24 | #include <linux/io.h> |
| 25 | #include <linux/bitops.h> | 25 | #include <linux/bitops.h> |
| 26 | 26 | ||
| 27 | #include <mach/clock.h> | 27 | #include <plat/clock.h> |
| 28 | #include <mach/clockdomain.h> | 28 | #include <plat/clockdomain.h> |
| 29 | #include <mach/cpu.h> | 29 | #include <plat/cpu.h> |
| 30 | #include <mach/prcm.h> | 30 | #include <plat/prcm.h> |
| 31 | #include <asm/div64.h> | 31 | #include <asm/div64.h> |
| 32 | 32 | ||
| 33 | #include <mach/sdrc.h> | 33 | #include <plat/sdrc.h> |
| 34 | #include "sdrc.h" | 34 | #include "sdrc.h" |
| 35 | #include "clock.h" | 35 | #include "clock.h" |
| 36 | #include "prm.h" | 36 | #include "prm.h" |
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h index 9ae7540f8af..43b6bedaafd 100644 --- a/arch/arm/mach-omap2/clock.h +++ b/arch/arm/mach-omap2/clock.h | |||
| @@ -16,7 +16,7 @@ | |||
| 16 | #ifndef __ARCH_ARM_MACH_OMAP2_CLOCK_H | 16 | #ifndef __ARCH_ARM_MACH_OMAP2_CLOCK_H |
| 17 | #define __ARCH_ARM_MACH_OMAP2_CLOCK_H | 17 | #define __ARCH_ARM_MACH_OMAP2_CLOCK_H |
| 18 | 18 | ||
| 19 | #include <mach/clock.h> | 19 | #include <plat/clock.h> |
| 20 | 20 | ||
| 21 | /* The maximum error between a target DPLL rate and the rounded rate in Hz */ | 21 | /* The maximum error between a target DPLL rate and the rounded rate in Hz */ |
| 22 | #define DEFAULT_DPLL_RATE_TOLERANCE 50000 | 22 | #define DEFAULT_DPLL_RATE_TOLERANCE 50000 |
diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c index e2dbedd581e..e70e7e000ea 100644 --- a/arch/arm/mach-omap2/clock24xx.c +++ b/arch/arm/mach-omap2/clock24xx.c | |||
| @@ -28,13 +28,13 @@ | |||
| 28 | #include <linux/cpufreq.h> | 28 | #include <linux/cpufreq.h> |
| 29 | #include <linux/bitops.h> | 29 | #include <linux/bitops.h> |
| 30 | 30 | ||
| 31 | #include <mach/clock.h> | 31 | #include <plat/clock.h> |
| 32 | #include <mach/sram.h> | 32 | #include <plat/sram.h> |
| 33 | #include <mach/prcm.h> | 33 | #include <plat/prcm.h> |
| 34 | #include <asm/div64.h> | 34 | #include <asm/div64.h> |
| 35 | #include <asm/clkdev.h> | 35 | #include <asm/clkdev.h> |
| 36 | 36 | ||
| 37 | #include <mach/sdrc.h> | 37 | #include <plat/sdrc.h> |
| 38 | #include "clock.h" | 38 | #include "clock.h" |
| 39 | #include "prm.h" | 39 | #include "prm.h" |
| 40 | #include "prm-regbits-24xx.h" | 40 | #include "prm-regbits-24xx.h" |
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index 7c5c00df3c7..9f2feaf7986 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c | |||
| @@ -27,13 +27,13 @@ | |||
| 27 | #include <linux/limits.h> | 27 | #include <linux/limits.h> |
| 28 | #include <linux/bitops.h> | 28 | #include <linux/bitops.h> |
| 29 | 29 | ||
| 30 | #include <mach/cpu.h> | 30 | #include <plat/cpu.h> |
| 31 | #include <mach/clock.h> | 31 | #include <plat/clock.h> |
| 32 | #include <mach/sram.h> | 32 | #include <plat/sram.h> |
| 33 | #include <asm/div64.h> | 33 | #include <asm/div64.h> |
| 34 | #include <asm/clkdev.h> | 34 | #include <asm/clkdev.h> |
| 35 | 35 | ||
| 36 | #include <mach/sdrc.h> | 36 | #include <plat/sdrc.h> |
| 37 | #include "clock.h" | 37 | #include "clock.h" |
| 38 | #include "prm.h" | 38 | #include "prm.h" |
| 39 | #include "prm-regbits-34xx.h" | 39 | #include "prm-regbits-34xx.h" |
| @@ -119,7 +119,7 @@ static struct omap_clk omap34xx_clks[] = { | |||
| 119 | CLK(NULL, "dpll3_m2x2_ck", &dpll3_m2x2_ck, CK_343X), | 119 | CLK(NULL, "dpll3_m2x2_ck", &dpll3_m2x2_ck, CK_343X), |
| 120 | CLK(NULL, "dpll3_m3_ck", &dpll3_m3_ck, CK_343X), | 120 | CLK(NULL, "dpll3_m3_ck", &dpll3_m3_ck, CK_343X), |
| 121 | CLK(NULL, "dpll3_m3x2_ck", &dpll3_m3x2_ck, CK_343X), | 121 | CLK(NULL, "dpll3_m3x2_ck", &dpll3_m3x2_ck, CK_343X), |
| 122 | CLK(NULL, "emu_core_alwon_ck", &emu_core_alwon_ck, CK_343X), | 122 | CLK("etb", "emu_core_alwon_ck", &emu_core_alwon_ck, CK_343X), |
| 123 | CLK(NULL, "dpll4_ck", &dpll4_ck, CK_343X), | 123 | CLK(NULL, "dpll4_ck", &dpll4_ck, CK_343X), |
| 124 | CLK(NULL, "dpll4_x2_ck", &dpll4_x2_ck, CK_343X), | 124 | CLK(NULL, "dpll4_x2_ck", &dpll4_x2_ck, CK_343X), |
| 125 | CLK(NULL, "omap_96m_alwon_fck", &omap_96m_alwon_fck, CK_343X), | 125 | CLK(NULL, "omap_96m_alwon_fck", &omap_96m_alwon_fck, CK_343X), |
| @@ -138,7 +138,7 @@ static struct omap_clk omap34xx_clks[] = { | |||
| 138 | CLK(NULL, "dpll4_m5x2_ck", &dpll4_m5x2_ck, CK_343X), | 138 | CLK(NULL, "dpll4_m5x2_ck", &dpll4_m5x2_ck, CK_343X), |
| 139 | CLK(NULL, "dpll4_m6_ck", &dpll4_m6_ck, CK_343X), | 139 | CLK(NULL, "dpll4_m6_ck", &dpll4_m6_ck, CK_343X), |
| 140 | CLK(NULL, "dpll4_m6x2_ck", &dpll4_m6x2_ck, CK_343X), | 140 | CLK(NULL, "dpll4_m6x2_ck", &dpll4_m6x2_ck, CK_343X), |
| 141 | CLK(NULL, "emu_per_alwon_ck", &emu_per_alwon_ck, CK_343X), | 141 | CLK("etb", "emu_per_alwon_ck", &emu_per_alwon_ck, CK_343X), |
| 142 | CLK(NULL, "dpll5_ck", &dpll5_ck, CK_3430ES2), | 142 | CLK(NULL, "dpll5_ck", &dpll5_ck, CK_3430ES2), |
| 143 | CLK(NULL, "dpll5_m2_ck", &dpll5_m2_ck, CK_3430ES2), | 143 | CLK(NULL, "dpll5_m2_ck", &dpll5_m2_ck, CK_3430ES2), |
| 144 | CLK(NULL, "clkout2_src_ck", &clkout2_src_ck, CK_343X), | 144 | CLK(NULL, "clkout2_src_ck", &clkout2_src_ck, CK_343X), |
| @@ -147,7 +147,7 @@ static struct omap_clk omap34xx_clks[] = { | |||
| 147 | CLK(NULL, "dpll1_fck", &dpll1_fck, CK_343X), | 147 | CLK(NULL, "dpll1_fck", &dpll1_fck, CK_343X), |
| 148 | CLK(NULL, "mpu_ck", &mpu_ck, CK_343X), | 148 | CLK(NULL, "mpu_ck", &mpu_ck, CK_343X), |
| 149 | CLK(NULL, "arm_fck", &arm_fck, CK_343X), | 149 | CLK(NULL, "arm_fck", &arm_fck, CK_343X), |
| 150 | CLK(NULL, "emu_mpu_alwon_ck", &emu_mpu_alwon_ck, CK_343X), | 150 | CLK("etb", "emu_mpu_alwon_ck", &emu_mpu_alwon_ck, CK_343X), |
| 151 | CLK(NULL, "dpll2_fck", &dpll2_fck, CK_343X), | 151 | CLK(NULL, "dpll2_fck", &dpll2_fck, CK_343X), |
| 152 | CLK(NULL, "iva2_ck", &iva2_ck, CK_343X), | 152 | CLK(NULL, "iva2_ck", &iva2_ck, CK_343X), |
| 153 | CLK(NULL, "l3_ick", &l3_ick, CK_343X), | 153 | CLK(NULL, "l3_ick", &l3_ick, CK_343X), |
| @@ -302,7 +302,7 @@ static struct omap_clk omap34xx_clks[] = { | |||
| 302 | CLK("omap-mcbsp.2", "fck", &mcbsp2_fck, CK_343X), | 302 | CLK("omap-mcbsp.2", "fck", &mcbsp2_fck, CK_343X), |
| 303 | CLK("omap-mcbsp.3", "fck", &mcbsp3_fck, CK_343X), | 303 | CLK("omap-mcbsp.3", "fck", &mcbsp3_fck, CK_343X), |
| 304 | CLK("omap-mcbsp.4", "fck", &mcbsp4_fck, CK_343X), | 304 | CLK("omap-mcbsp.4", "fck", &mcbsp4_fck, CK_343X), |
| 305 | CLK(NULL, "emu_src_ck", &emu_src_ck, CK_343X), | 305 | CLK("etb", "emu_src_ck", &emu_src_ck, CK_343X), |
| 306 | CLK(NULL, "pclk_fck", &pclk_fck, CK_343X), | 306 | CLK(NULL, "pclk_fck", &pclk_fck, CK_343X), |
| 307 | CLK(NULL, "pclkx2_fck", &pclkx2_fck, CK_343X), | 307 | CLK(NULL, "pclkx2_fck", &pclkx2_fck, CK_343X), |
| 308 | CLK(NULL, "atclk_fck", &atclk_fck, CK_343X), | 308 | CLK(NULL, "atclk_fck", &atclk_fck, CK_343X), |
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h index 9565c05bebd..8fe1bcb23dd 100644 --- a/arch/arm/mach-omap2/clock34xx.h +++ b/arch/arm/mach-omap2/clock34xx.h | |||
| @@ -19,7 +19,7 @@ | |||
| 19 | #ifndef __ARCH_ARM_MACH_OMAP2_CLOCK34XX_H | 19 | #ifndef __ARCH_ARM_MACH_OMAP2_CLOCK34XX_H |
| 20 | #define __ARCH_ARM_MACH_OMAP2_CLOCK34XX_H | 20 | #define __ARCH_ARM_MACH_OMAP2_CLOCK34XX_H |
| 21 | 21 | ||
| 22 | #include <mach/control.h> | 22 | #include <plat/control.h> |
| 23 | 23 | ||
| 24 | #include "clock.h" | 24 | #include "clock.h" |
| 25 | #include "cm.h" | 25 | #include "cm.h" |
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index 58aff8485df..fcd82320a6a 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c | |||
| @@ -28,14 +28,14 @@ | |||
| 28 | 28 | ||
| 29 | #include <linux/bitops.h> | 29 | #include <linux/bitops.h> |
| 30 | 30 | ||
| 31 | #include <mach/clock.h> | 31 | #include <plat/clock.h> |
| 32 | 32 | ||
| 33 | #include "prm.h" | 33 | #include "prm.h" |
| 34 | #include "prm-regbits-24xx.h" | 34 | #include "prm-regbits-24xx.h" |
| 35 | #include "cm.h" | 35 | #include "cm.h" |
| 36 | 36 | ||
| 37 | #include <mach/powerdomain.h> | 37 | #include <plat/powerdomain.h> |
| 38 | #include <mach/clockdomain.h> | 38 | #include <plat/clockdomain.h> |
| 39 | 39 | ||
| 40 | /* clkdm_list contains all registered struct clockdomains */ | 40 | /* clkdm_list contains all registered struct clockdomains */ |
| 41 | static LIST_HEAD(clkdm_list); | 41 | static LIST_HEAD(clkdm_list); |
diff --git a/arch/arm/mach-omap2/clockdomains.h b/arch/arm/mach-omap2/clockdomains.h index fe319ae4ca0..c4ee0761d90 100644 --- a/arch/arm/mach-omap2/clockdomains.h +++ b/arch/arm/mach-omap2/clockdomains.h | |||
| @@ -10,7 +10,7 @@ | |||
| 10 | #ifndef __ARCH_ARM_MACH_OMAP2_CLOCKDOMAINS_H | 10 | #ifndef __ARCH_ARM_MACH_OMAP2_CLOCKDOMAINS_H |
| 11 | #define __ARCH_ARM_MACH_OMAP2_CLOCKDOMAINS_H | 11 | #define __ARCH_ARM_MACH_OMAP2_CLOCKDOMAINS_H |
| 12 | 12 | ||
| 13 | #include <mach/clockdomain.h> | 13 | #include <plat/clockdomain.h> |
| 14 | 14 | ||
| 15 | /* | 15 | /* |
| 16 | * OMAP2/3-common clockdomains | 16 | * OMAP2/3-common clockdomains |
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h index cfd0b726ba4..a2fcfcc253c 100644 --- a/arch/arm/mach-omap2/cm.h +++ b/arch/arm/mach-omap2/cm.h | |||
| @@ -17,11 +17,11 @@ | |||
| 17 | #include "prcm-common.h" | 17 | #include "prcm-common.h" |
| 18 | 18 | ||
| 19 | #define OMAP2420_CM_REGADDR(module, reg) \ | 19 | #define OMAP2420_CM_REGADDR(module, reg) \ |
| 20 | OMAP2_IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg)) | 20 | OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg)) |
| 21 | #define OMAP2430_CM_REGADDR(module, reg) \ | 21 | #define OMAP2430_CM_REGADDR(module, reg) \ |
| 22 | OMAP2_IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg)) | 22 | OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg)) |
| 23 | #define OMAP34XX_CM_REGADDR(module, reg) \ | 23 | #define OMAP34XX_CM_REGADDR(module, reg) \ |
| 24 | OMAP2_IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg)) | 24 | OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg)) |
| 25 | 25 | ||
| 26 | /* | 26 | /* |
| 27 | * Architecture-specific global CM registers | 27 | * Architecture-specific global CM registers |
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index 5f3aad97784..cdd1f35636d 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c | |||
| @@ -15,11 +15,127 @@ | |||
| 15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
| 16 | #include <linux/io.h> | 16 | #include <linux/io.h> |
| 17 | 17 | ||
| 18 | #include <mach/common.h> | 18 | #include <plat/common.h> |
| 19 | #include <mach/control.h> | 19 | #include <plat/control.h> |
| 20 | #include <plat/sdrc.h> | ||
| 21 | #include "cm-regbits-34xx.h" | ||
| 22 | #include "prm-regbits-34xx.h" | ||
| 23 | #include "cm.h" | ||
| 24 | #include "prm.h" | ||
| 25 | #include "sdrc.h" | ||
| 20 | 26 | ||
| 21 | static void __iomem *omap2_ctrl_base; | 27 | static void __iomem *omap2_ctrl_base; |
| 22 | 28 | ||
| 29 | #if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM) | ||
| 30 | struct omap3_scratchpad { | ||
| 31 | u32 boot_config_ptr; | ||
| 32 | u32 public_restore_ptr; | ||
| 33 | u32 secure_ram_restore_ptr; | ||
| 34 | u32 sdrc_module_semaphore; | ||
| 35 | u32 prcm_block_offset; | ||
| 36 | u32 sdrc_block_offset; | ||
| 37 | }; | ||
| 38 | |||
| 39 | struct omap3_scratchpad_prcm_block { | ||
| 40 | u32 prm_clksrc_ctrl; | ||
| 41 | u32 prm_clksel; | ||
| 42 | u32 cm_clksel_core; | ||
| 43 | u32 cm_clksel_wkup; | ||
| 44 | u32 cm_clken_pll; | ||
| 45 | u32 cm_autoidle_pll; | ||
| 46 | u32 cm_clksel1_pll; | ||
| 47 | u32 cm_clksel2_pll; | ||
| 48 | u32 cm_clksel3_pll; | ||
| 49 | u32 cm_clken_pll_mpu; | ||
| 50 | u32 cm_autoidle_pll_mpu; | ||
| 51 | u32 cm_clksel1_pll_mpu; | ||
| 52 | u32 cm_clksel2_pll_mpu; | ||
| 53 | u32 prcm_block_size; | ||
| 54 | }; | ||
| 55 | |||
| 56 | struct omap3_scratchpad_sdrc_block { | ||
| 57 | u16 sysconfig; | ||
| 58 | u16 cs_cfg; | ||
| 59 | u16 sharing; | ||
| 60 | u16 err_type; | ||
| 61 | u32 dll_a_ctrl; | ||
| 62 | u32 dll_b_ctrl; | ||
| 63 | u32 power; | ||
| 64 | u32 cs_0; | ||
| 65 | u32 mcfg_0; | ||
| 66 | u16 mr_0; | ||
| 67 | u16 emr_1_0; | ||
| 68 | u16 emr_2_0; | ||
| 69 | u16 emr_3_0; | ||
| 70 | u32 actim_ctrla_0; | ||
| 71 | u32 actim_ctrlb_0; | ||
| 72 | u32 rfr_ctrl_0; | ||
| 73 | u32 cs_1; | ||
| 74 | u32 mcfg_1; | ||
| 75 | u16 mr_1; | ||
| 76 | u16 emr_1_1; | ||
| 77 | u16 emr_2_1; | ||
| 78 | u16 emr_3_1; | ||
| 79 | u32 actim_ctrla_1; | ||
| 80 | u32 actim_ctrlb_1; | ||
| 81 | u32 rfr_ctrl_1; | ||
| 82 | u16 dcdl_1_ctrl; | ||
| 83 | u16 dcdl_2_ctrl; | ||
| 84 | u32 flags; | ||
| 85 | u32 block_size; | ||
| 86 | }; | ||
| 87 | |||
| 88 | void *omap3_secure_ram_storage; | ||
| 89 | |||
| 90 | /* | ||
| 91 | * This is used to store ARM registers in SDRAM before attempting | ||
| 92 | * an MPU OFF. The save and restore happens from the SRAM sleep code. | ||
| 93 | * The address is stored in scratchpad, so that it can be used | ||
| 94 | * during the restore path. | ||
| 95 | */ | ||
| 96 | u32 omap3_arm_context[128]; | ||
| 97 | |||
| 98 | struct omap3_control_regs { | ||
| 99 | u32 sysconfig; | ||
| 100 | u32 devconf0; | ||
| 101 | u32 mem_dftrw0; | ||
| 102 | u32 mem_dftrw1; | ||
| 103 | u32 msuspendmux_0; | ||
| 104 | u32 msuspendmux_1; | ||
| 105 | u32 msuspendmux_2; | ||
| 106 | u32 msuspendmux_3; | ||
| 107 | u32 msuspendmux_4; | ||
| 108 | u32 msuspendmux_5; | ||
| 109 | u32 sec_ctrl; | ||
| 110 | u32 devconf1; | ||
| 111 | u32 csirxfe; | ||
| 112 | u32 iva2_bootaddr; | ||
| 113 | u32 iva2_bootmod; | ||
| 114 | u32 debobs_0; | ||
| 115 | u32 debobs_1; | ||
| 116 | u32 debobs_2; | ||
| 117 | u32 debobs_3; | ||
| 118 | u32 debobs_4; | ||
| 119 | u32 debobs_5; | ||
| 120 | u32 debobs_6; | ||
| 121 | u32 debobs_7; | ||
| 122 | u32 debobs_8; | ||
| 123 | u32 prog_io0; | ||
| 124 | u32 prog_io1; | ||
| 125 | u32 dss_dpll_spreading; | ||
| 126 | u32 core_dpll_spreading; | ||
| 127 | u32 per_dpll_spreading; | ||
| 128 | u32 usbhost_dpll_spreading; | ||
| 129 | u32 pbias_lite; | ||
| 130 | u32 temp_sensor; | ||
| 131 | u32 sramldo4; | ||
| 132 | u32 sramldo5; | ||
| 133 | u32 csi; | ||
| 134 | }; | ||
| 135 | |||
| 136 | static struct omap3_control_regs control_context; | ||
| 137 | #endif /* CONFIG_ARCH_OMAP3 && CONFIG_PM */ | ||
| 138 | |||
| 23 | #define OMAP_CTRL_REGADDR(reg) (omap2_ctrl_base + (reg)) | 139 | #define OMAP_CTRL_REGADDR(reg) (omap2_ctrl_base + (reg)) |
| 24 | 140 | ||
| 25 | void __init omap2_set_globals_control(struct omap_globals *omap2_globals) | 141 | void __init omap2_set_globals_control(struct omap_globals *omap2_globals) |
| @@ -62,3 +178,268 @@ void omap_ctrl_writel(u32 val, u16 offset) | |||
| 62 | __raw_writel(val, OMAP_CTRL_REGADDR(offset)); | 178 | __raw_writel(val, OMAP_CTRL_REGADDR(offset)); |
| 63 | } | 179 | } |
| 64 | 180 | ||
| 181 | #if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM) | ||
| 182 | /* | ||
| 183 | * Clears the scratchpad contents in case of cold boot- | ||
| 184 | * called during bootup | ||
| 185 | */ | ||
| 186 | void omap3_clear_scratchpad_contents(void) | ||
| 187 | { | ||
| 188 | u32 max_offset = OMAP343X_SCRATCHPAD_ROM_OFFSET; | ||
| 189 | u32 *v_addr; | ||
| 190 | u32 offset = 0; | ||
| 191 | v_addr = OMAP2_L4_IO_ADDRESS(OMAP343X_SCRATCHPAD_ROM); | ||
| 192 | if (prm_read_mod_reg(OMAP3430_GR_MOD, OMAP3_PRM_RSTST_OFFSET) & | ||
| 193 | OMAP3430_GLOBAL_COLD_RST) { | ||
| 194 | for ( ; offset <= max_offset; offset += 0x4) | ||
| 195 | __raw_writel(0x0, (v_addr + offset)); | ||
| 196 | prm_set_mod_reg_bits(OMAP3430_GLOBAL_COLD_RST, OMAP3430_GR_MOD, | ||
| 197 | OMAP3_PRM_RSTST_OFFSET); | ||
| 198 | } | ||
| 199 | } | ||
| 200 | |||
| 201 | /* Populate the scratchpad structure with restore structure */ | ||
| 202 | void omap3_save_scratchpad_contents(void) | ||
| 203 | { | ||
| 204 | void * __iomem scratchpad_address; | ||
| 205 | u32 arm_context_addr; | ||
| 206 | struct omap3_scratchpad scratchpad_contents; | ||
| 207 | struct omap3_scratchpad_prcm_block prcm_block_contents; | ||
| 208 | struct omap3_scratchpad_sdrc_block sdrc_block_contents; | ||
| 209 | |||
| 210 | /* Populate the Scratchpad contents */ | ||
| 211 | scratchpad_contents.boot_config_ptr = 0x0; | ||
| 212 | if (omap_rev() != OMAP3430_REV_ES3_0 && | ||
| 213 | omap_rev() != OMAP3430_REV_ES3_1) | ||
| 214 | scratchpad_contents.public_restore_ptr = | ||
| 215 | virt_to_phys(get_restore_pointer()); | ||
| 216 | else | ||
| 217 | scratchpad_contents.public_restore_ptr = | ||
| 218 | virt_to_phys(get_es3_restore_pointer()); | ||
| 219 | if (omap_type() == OMAP2_DEVICE_TYPE_GP) | ||
| 220 | scratchpad_contents.secure_ram_restore_ptr = 0x0; | ||
| 221 | else | ||
| 222 | scratchpad_contents.secure_ram_restore_ptr = | ||
| 223 | (u32) __pa(omap3_secure_ram_storage); | ||
| 224 | scratchpad_contents.sdrc_module_semaphore = 0x0; | ||
| 225 | scratchpad_contents.prcm_block_offset = 0x2C; | ||
| 226 | scratchpad_contents.sdrc_block_offset = 0x64; | ||
| 227 | |||
| 228 | /* Populate the PRCM block contents */ | ||
| 229 | prcm_block_contents.prm_clksrc_ctrl = prm_read_mod_reg(OMAP3430_GR_MOD, | ||
| 230 | OMAP3_PRM_CLKSRC_CTRL_OFFSET); | ||
| 231 | prcm_block_contents.prm_clksel = prm_read_mod_reg(OMAP3430_CCR_MOD, | ||
| 232 | OMAP3_PRM_CLKSEL_OFFSET); | ||
| 233 | prcm_block_contents.cm_clksel_core = | ||
| 234 | cm_read_mod_reg(CORE_MOD, CM_CLKSEL); | ||
| 235 | prcm_block_contents.cm_clksel_wkup = | ||
| 236 | cm_read_mod_reg(WKUP_MOD, CM_CLKSEL); | ||
| 237 | prcm_block_contents.cm_clken_pll = | ||
| 238 | cm_read_mod_reg(PLL_MOD, CM_CLKEN); | ||
| 239 | prcm_block_contents.cm_autoidle_pll = | ||
| 240 | cm_read_mod_reg(PLL_MOD, OMAP3430_CM_AUTOIDLE_PLL); | ||
| 241 | prcm_block_contents.cm_clksel1_pll = | ||
| 242 | cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL1_PLL); | ||
| 243 | prcm_block_contents.cm_clksel2_pll = | ||
| 244 | cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL2_PLL); | ||
| 245 | prcm_block_contents.cm_clksel3_pll = | ||
| 246 | cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL3); | ||
| 247 | prcm_block_contents.cm_clken_pll_mpu = | ||
| 248 | cm_read_mod_reg(MPU_MOD, OMAP3430_CM_CLKEN_PLL); | ||
| 249 | prcm_block_contents.cm_autoidle_pll_mpu = | ||
| 250 | cm_read_mod_reg(MPU_MOD, OMAP3430_CM_AUTOIDLE_PLL); | ||
| 251 | prcm_block_contents.cm_clksel1_pll_mpu = | ||
| 252 | cm_read_mod_reg(MPU_MOD, OMAP3430_CM_CLKSEL1_PLL); | ||
| 253 | prcm_block_contents.cm_clksel2_pll_mpu = | ||
| 254 | cm_read_mod_reg(MPU_MOD, OMAP3430_CM_CLKSEL2_PLL); | ||
| 255 | prcm_block_contents.prcm_block_size = 0x0; | ||
| 256 | |||
| 257 | /* Populate the SDRC block contents */ | ||
| 258 | sdrc_block_contents.sysconfig = | ||
| 259 | (sdrc_read_reg(SDRC_SYSCONFIG) & 0xFFFF); | ||
| 260 | sdrc_block_contents.cs_cfg = | ||
| 261 | (sdrc_read_reg(SDRC_CS_CFG) & 0xFFFF); | ||
| 262 | sdrc_block_contents.sharing = | ||
| 263 | (sdrc_read_reg(SDRC_SHARING) & 0xFFFF); | ||
| 264 | sdrc_block_contents.err_type = | ||
| 265 | (sdrc_read_reg(SDRC_ERR_TYPE) & 0xFFFF); | ||
| 266 | sdrc_block_contents.dll_a_ctrl = sdrc_read_reg(SDRC_DLLA_CTRL); | ||
| 267 | sdrc_block_contents.dll_b_ctrl = 0x0; | ||
| 268 | /* | ||
| 269 | * Due to a OMAP3 errata (1.142), on EMU/HS devices SRDC should | ||
| 270 | * be programed to issue automatic self refresh on timeout | ||
| 271 | * of AUTO_CNT = 1 prior to any transition to OFF mode. | ||
| 272 | */ | ||
| 273 | if ((omap_type() != OMAP2_DEVICE_TYPE_GP) | ||
| 274 | && (omap_rev() >= OMAP3430_REV_ES3_0)) | ||
| 275 | sdrc_block_contents.power = (sdrc_read_reg(SDRC_POWER) & | ||
| 276 | ~(SDRC_POWER_AUTOCOUNT_MASK| | ||
| 277 | SDRC_POWER_CLKCTRL_MASK)) | | ||
| 278 | (1 << SDRC_POWER_AUTOCOUNT_SHIFT) | | ||
| 279 | SDRC_SELF_REFRESH_ON_AUTOCOUNT; | ||
| 280 | else | ||
| 281 | sdrc_block_contents.power = sdrc_read_reg(SDRC_POWER); | ||
| 282 | |||
| 283 | sdrc_block_contents.cs_0 = 0x0; | ||
| 284 | sdrc_block_contents.mcfg_0 = sdrc_read_reg(SDRC_MCFG_0); | ||
| 285 | sdrc_block_contents.mr_0 = (sdrc_read_reg(SDRC_MR_0) & 0xFFFF); | ||
| 286 | sdrc_block_contents.emr_1_0 = 0x0; | ||
| 287 | sdrc_block_contents.emr_2_0 = 0x0; | ||
| 288 | sdrc_block_contents.emr_3_0 = 0x0; | ||
| 289 | sdrc_block_contents.actim_ctrla_0 = | ||
| 290 | sdrc_read_reg(SDRC_ACTIM_CTRL_A_0); | ||
| 291 | sdrc_block_contents.actim_ctrlb_0 = | ||
| 292 | sdrc_read_reg(SDRC_ACTIM_CTRL_B_0); | ||
| 293 | sdrc_block_contents.rfr_ctrl_0 = | ||
| 294 | sdrc_read_reg(SDRC_RFR_CTRL_0); | ||
| 295 | sdrc_block_contents.cs_1 = 0x0; | ||
| 296 | sdrc_block_contents.mcfg_1 = sdrc_read_reg(SDRC_MCFG_1); | ||
| 297 | sdrc_block_contents.mr_1 = sdrc_read_reg(SDRC_MR_1) & 0xFFFF; | ||
| 298 | sdrc_block_contents.emr_1_1 = 0x0; | ||
| 299 | sdrc_block_contents.emr_2_1 = 0x0; | ||
| 300 | sdrc_block_contents.emr_3_1 = 0x0; | ||
| 301 | sdrc_block_contents.actim_ctrla_1 = | ||
| 302 | sdrc_read_reg(SDRC_ACTIM_CTRL_A_1); | ||
| 303 | sdrc_block_contents.actim_ctrlb_1 = | ||
| 304 | sdrc_read_reg(SDRC_ACTIM_CTRL_B_1); | ||
| 305 | sdrc_block_contents.rfr_ctrl_1 = | ||
| 306 | sdrc_read_reg(SDRC_RFR_CTRL_1); | ||
| 307 | sdrc_block_contents.dcdl_1_ctrl = 0x0; | ||
| 308 | sdrc_block_contents.dcdl_2_ctrl = 0x0; | ||
| 309 | sdrc_block_contents.flags = 0x0; | ||
| 310 | sdrc_block_contents.block_size = 0x0; | ||
| 311 | |||
| 312 | arm_context_addr = virt_to_phys(omap3_arm_context); | ||
| 313 | |||
| 314 | /* Copy all the contents to the scratchpad location */ | ||
| 315 | scratchpad_address = OMAP2_L4_IO_ADDRESS(OMAP343X_SCRATCHPAD); | ||
| 316 | memcpy_toio(scratchpad_address, &scratchpad_contents, | ||
| 317 | sizeof(scratchpad_contents)); | ||
| 318 | /* Scratchpad contents being 32 bits, a divide by 4 done here */ | ||
| 319 | memcpy_toio(scratchpad_address + | ||
| 320 | scratchpad_contents.prcm_block_offset, | ||
| 321 | &prcm_block_contents, sizeof(prcm_block_contents)); | ||
| 322 | memcpy_toio(scratchpad_address + | ||
| 323 | scratchpad_contents.sdrc_block_offset, | ||
| 324 | &sdrc_block_contents, sizeof(sdrc_block_contents)); | ||
| 325 | /* | ||
| 326 | * Copies the address of the location in SDRAM where ARM | ||
| 327 | * registers get saved during a MPU OFF transition. | ||
| 328 | */ | ||
| 329 | memcpy_toio(scratchpad_address + | ||
| 330 | scratchpad_contents.sdrc_block_offset + | ||
| 331 | sizeof(sdrc_block_contents), &arm_context_addr, 4); | ||
| 332 | } | ||
| 333 | |||
| 334 | void omap3_control_save_context(void) | ||
| 335 | { | ||
| 336 | control_context.sysconfig = omap_ctrl_readl(OMAP2_CONTROL_SYSCONFIG); | ||
| 337 | control_context.devconf0 = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); | ||
| 338 | control_context.mem_dftrw0 = | ||
| 339 | omap_ctrl_readl(OMAP343X_CONTROL_MEM_DFTRW0); | ||
| 340 | control_context.mem_dftrw1 = | ||
| 341 | omap_ctrl_readl(OMAP343X_CONTROL_MEM_DFTRW1); | ||
| 342 | control_context.msuspendmux_0 = | ||
| 343 | omap_ctrl_readl(OMAP2_CONTROL_MSUSPENDMUX_0); | ||
| 344 | control_context.msuspendmux_1 = | ||
| 345 | omap_ctrl_readl(OMAP2_CONTROL_MSUSPENDMUX_1); | ||
| 346 | control_context.msuspendmux_2 = | ||
| 347 | omap_ctrl_readl(OMAP2_CONTROL_MSUSPENDMUX_2); | ||
| 348 | control_context.msuspendmux_3 = | ||
| 349 | omap_ctrl_readl(OMAP2_CONTROL_MSUSPENDMUX_3); | ||
| 350 | control_context.msuspendmux_4 = | ||
| 351 | omap_ctrl_readl(OMAP2_CONTROL_MSUSPENDMUX_4); | ||
| 352 | control_context.msuspendmux_5 = | ||
| 353 | omap_ctrl_readl(OMAP2_CONTROL_MSUSPENDMUX_5); | ||
| 354 | control_context.sec_ctrl = omap_ctrl_readl(OMAP2_CONTROL_SEC_CTRL); | ||
| 355 | control_context.devconf1 = omap_ctrl_readl(OMAP343X_CONTROL_DEVCONF1); | ||
| 356 | control_context.csirxfe = omap_ctrl_readl(OMAP343X_CONTROL_CSIRXFE); | ||
| 357 | control_context.iva2_bootaddr = | ||
| 358 | omap_ctrl_readl(OMAP343X_CONTROL_IVA2_BOOTADDR); | ||
| 359 | control_context.iva2_bootmod = | ||
| 360 | omap_ctrl_readl(OMAP343X_CONTROL_IVA2_BOOTMOD); | ||
| 361 | control_context.debobs_0 = omap_ctrl_readl(OMAP343X_CONTROL_DEBOBS(0)); | ||
| 362 | control_context.debobs_1 = omap_ctrl_readl(OMAP343X_CONTROL_DEBOBS(1)); | ||
| 363 | control_context.debobs_2 = omap_ctrl_readl(OMAP343X_CONTROL_DEBOBS(2)); | ||
| 364 | control_context.debobs_3 = omap_ctrl_readl(OMAP343X_CONTROL_DEBOBS(3)); | ||
| 365 | control_context.debobs_4 = omap_ctrl_readl(OMAP343X_CONTROL_DEBOBS(4)); | ||
| 366 | control_context.debobs_5 = omap_ctrl_readl(OMAP343X_CONTROL_DEBOBS(5)); | ||
| 367 | control_context.debobs_6 = omap_ctrl_readl(OMAP343X_CONTROL_DEBOBS(6)); | ||
| 368 | control_context.debobs_7 = omap_ctrl_readl(OMAP343X_CONTROL_DEBOBS(7)); | ||
| 369 | control_context.debobs_8 = omap_ctrl_readl(OMAP343X_CONTROL_DEBOBS(8)); | ||
| 370 | control_context.prog_io0 = omap_ctrl_readl(OMAP343X_CONTROL_PROG_IO0); | ||
| 371 | control_context.prog_io1 = omap_ctrl_readl(OMAP343X_CONTROL_PROG_IO1); | ||
| 372 | control_context.dss_dpll_spreading = | ||
| 373 | omap_ctrl_readl(OMAP343X_CONTROL_DSS_DPLL_SPREADING); | ||
| 374 | control_context.core_dpll_spreading = | ||
| 375 | omap_ctrl_readl(OMAP343X_CONTROL_CORE_DPLL_SPREADING); | ||
| 376 | control_context.per_dpll_spreading = | ||
| 377 | omap_ctrl_readl(OMAP343X_CONTROL_PER_DPLL_SPREADING); | ||
| 378 | control_context.usbhost_dpll_spreading = | ||
| 379 | omap_ctrl_readl(OMAP343X_CONTROL_USBHOST_DPLL_SPREADING); | ||
| 380 | control_context.pbias_lite = | ||
| 381 | omap_ctrl_readl(OMAP343X_CONTROL_PBIAS_LITE); | ||
| 382 | control_context.temp_sensor = | ||
| 383 | omap_ctrl_readl(OMAP343X_CONTROL_TEMP_SENSOR); | ||
| 384 | control_context.sramldo4 = omap_ctrl_readl(OMAP343X_CONTROL_SRAMLDO4); | ||
| 385 | control_context.sramldo5 = omap_ctrl_readl(OMAP343X_CONTROL_SRAMLDO5); | ||
| 386 | control_context.csi = omap_ctrl_readl(OMAP343X_CONTROL_CSI); | ||
| 387 | return; | ||
| 388 | } | ||
| 389 | |||
| 390 | void omap3_control_restore_context(void) | ||
| 391 | { | ||
| 392 | omap_ctrl_writel(control_context.sysconfig, OMAP2_CONTROL_SYSCONFIG); | ||
| 393 | omap_ctrl_writel(control_context.devconf0, OMAP2_CONTROL_DEVCONF0); | ||
| 394 | omap_ctrl_writel(control_context.mem_dftrw0, | ||
| 395 | OMAP343X_CONTROL_MEM_DFTRW0); | ||
| 396 | omap_ctrl_writel(control_context.mem_dftrw1, | ||
| 397 | OMAP343X_CONTROL_MEM_DFTRW1); | ||
| 398 | omap_ctrl_writel(control_context.msuspendmux_0, | ||
| 399 | OMAP2_CONTROL_MSUSPENDMUX_0); | ||
| 400 | omap_ctrl_writel(control_context.msuspendmux_1, | ||
| 401 | OMAP2_CONTROL_MSUSPENDMUX_1); | ||
| 402 | omap_ctrl_writel(control_context.msuspendmux_2, | ||
| 403 | OMAP2_CONTROL_MSUSPENDMUX_2); | ||
| 404 | omap_ctrl_writel(control_context.msuspendmux_3, | ||
| 405 | OMAP2_CONTROL_MSUSPENDMUX_3); | ||
| 406 | omap_ctrl_writel(control_context.msuspendmux_4, | ||
| 407 | OMAP2_CONTROL_MSUSPENDMUX_4); | ||
| 408 | omap_ctrl_writel(control_context.msuspendmux_5, | ||
| 409 | OMAP2_CONTROL_MSUSPENDMUX_5); | ||
| 410 | omap_ctrl_writel(control_context.sec_ctrl, OMAP2_CONTROL_SEC_CTRL); | ||
| 411 | omap_ctrl_writel(control_context.devconf1, OMAP343X_CONTROL_DEVCONF1); | ||
| 412 | omap_ctrl_writel(control_context.csirxfe, OMAP343X_CONTROL_CSIRXFE); | ||
| 413 | omap_ctrl_writel(control_context.iva2_bootaddr, | ||
| 414 | OMAP343X_CONTROL_IVA2_BOOTADDR); | ||
| 415 | omap_ctrl_writel(control_context.iva2_bootmod, | ||
| 416 | OMAP343X_CONTROL_IVA2_BOOTMOD); | ||
| 417 | omap_ctrl_writel(control_context.debobs_0, OMAP343X_CONTROL_DEBOBS(0)); | ||
| 418 | omap_ctrl_writel(control_context.debobs_1, OMAP343X_CONTROL_DEBOBS(1)); | ||
| 419 | omap_ctrl_writel(control_context.debobs_2, OMAP343X_CONTROL_DEBOBS(2)); | ||
| 420 | omap_ctrl_writel(control_context.debobs_3, OMAP343X_CONTROL_DEBOBS(3)); | ||
| 421 | omap_ctrl_writel(control_context.debobs_4, OMAP343X_CONTROL_DEBOBS(4)); | ||
| 422 | omap_ctrl_writel(control_context.debobs_5, OMAP343X_CONTROL_DEBOBS(5)); | ||
| 423 | omap_ctrl_writel(control_context.debobs_6, OMAP343X_CONTROL_DEBOBS(6)); | ||
| 424 | omap_ctrl_writel(control_context.debobs_7, OMAP343X_CONTROL_DEBOBS(7)); | ||
| 425 | omap_ctrl_writel(control_context.debobs_8, OMAP343X_CONTROL_DEBOBS(8)); | ||
| 426 | omap_ctrl_writel(control_context.prog_io0, OMAP343X_CONTROL_PROG_IO0); | ||
| 427 | omap_ctrl_writel(control_context.prog_io1, OMAP343X_CONTROL_PROG_IO1); | ||
| 428 | omap_ctrl_writel(control_context.dss_dpll_spreading, | ||
| 429 | OMAP343X_CONTROL_DSS_DPLL_SPREADING); | ||
| 430 | omap_ctrl_writel(control_context.core_dpll_spreading, | ||
| 431 | OMAP343X_CONTROL_CORE_DPLL_SPREADING); | ||
| 432 | omap_ctrl_writel(control_context.per_dpll_spreading, | ||
| 433 | OMAP343X_CONTROL_PER_DPLL_SPREADING); | ||
| 434 | omap_ctrl_writel(control_context.usbhost_dpll_spreading, | ||
| 435 | OMAP343X_CONTROL_USBHOST_DPLL_SPREADING); | ||
| 436 | omap_ctrl_writel(control_context.pbias_lite, | ||
| 437 | OMAP343X_CONTROL_PBIAS_LITE); | ||
| 438 | omap_ctrl_writel(control_context.temp_sensor, | ||
| 439 | OMAP343X_CONTROL_TEMP_SENSOR); | ||
| 440 | omap_ctrl_writel(control_context.sramldo4, OMAP343X_CONTROL_SRAMLDO4); | ||
| 441 | omap_ctrl_writel(control_context.sramldo5, OMAP343X_CONTROL_SRAMLDO5); | ||
| 442 | omap_ctrl_writel(control_context.csi, OMAP343X_CONTROL_CSI); | ||
| 443 | return; | ||
| 444 | } | ||
| 445 | #endif /* CONFIG_ARCH_OMAP3 && CONFIG_PM */ | ||
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c new file mode 100644 index 00000000000..a26d6a08ae3 --- /dev/null +++ b/arch/arm/mach-omap2/cpuidle34xx.c | |||
| @@ -0,0 +1,318 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-omap2/cpuidle34xx.c | ||
| 3 | * | ||
| 4 | * OMAP3 CPU IDLE Routines | ||
| 5 | * | ||
| 6 | * Copyright (C) 2008 Texas Instruments, Inc. | ||
| 7 | * Rajendra Nayak <rnayak@ti.com> | ||
| 8 | * | ||
| 9 | * Copyright (C) 2007 Texas Instruments, Inc. | ||
| 10 | * Karthik Dasu <karthik-dp@ti.com> | ||
| 11 | * | ||
| 12 | * Copyright (C) 2006 Nokia Corporation | ||
| 13 | * Tony Lindgren <tony@atomide.com> | ||
| 14 | * | ||
| 15 | * Copyright (C) 2005 Texas Instruments, Inc. | ||
| 16 | * Richard Woodruff <r-woodruff2@ti.com> | ||
| 17 | * | ||
| 18 | * Based on pm.c for omap2 | ||
| 19 | * | ||
| 20 | * This program is free software; you can redistribute it and/or modify | ||
| 21 | * it under the terms of the GNU General Public License version 2 as | ||
| 22 | * published by the Free Software Foundation. | ||
| 23 | */ | ||
| 24 | |||
| 25 | #include <linux/sched.h> | ||
| 26 | #include <linux/cpuidle.h> | ||
| 27 | |||
| 28 | #include <plat/prcm.h> | ||
| 29 | #include <plat/irqs.h> | ||
| 30 | #include <plat/powerdomain.h> | ||
| 31 | #include <plat/clockdomain.h> | ||
| 32 | #include <plat/control.h> | ||
| 33 | #include <plat/serial.h> | ||
| 34 | |||
| 35 | #include "pm.h" | ||
| 36 | |||
| 37 | #ifdef CONFIG_CPU_IDLE | ||
| 38 | |||
| 39 | #define OMAP3_MAX_STATES 7 | ||
| 40 | #define OMAP3_STATE_C1 0 /* C1 - MPU WFI + Core active */ | ||
| 41 | #define OMAP3_STATE_C2 1 /* C2 - MPU WFI + Core inactive */ | ||
| 42 | #define OMAP3_STATE_C3 2 /* C3 - MPU CSWR + Core inactive */ | ||
| 43 | #define OMAP3_STATE_C4 3 /* C4 - MPU OFF + Core iactive */ | ||
| 44 | #define OMAP3_STATE_C5 4 /* C5 - MPU RET + Core RET */ | ||
| 45 | #define OMAP3_STATE_C6 5 /* C6 - MPU OFF + Core RET */ | ||
| 46 | #define OMAP3_STATE_C7 6 /* C7 - MPU OFF + Core OFF */ | ||
| 47 | |||
| 48 | struct omap3_processor_cx { | ||
| 49 | u8 valid; | ||
| 50 | u8 type; | ||
| 51 | u32 sleep_latency; | ||
| 52 | u32 wakeup_latency; | ||
| 53 | u32 mpu_state; | ||
| 54 | u32 core_state; | ||
| 55 | u32 threshold; | ||
| 56 | u32 flags; | ||
| 57 | }; | ||
| 58 | |||
| 59 | struct omap3_processor_cx omap3_power_states[OMAP3_MAX_STATES]; | ||
| 60 | struct omap3_processor_cx current_cx_state; | ||
| 61 | struct powerdomain *mpu_pd, *core_pd; | ||
| 62 | |||
| 63 | static int omap3_idle_bm_check(void) | ||
| 64 | { | ||
| 65 | if (!omap3_can_sleep()) | ||
| 66 | return 1; | ||
| 67 | return 0; | ||
| 68 | } | ||
| 69 | |||
| 70 | static int _cpuidle_allow_idle(struct powerdomain *pwrdm, | ||
| 71 | struct clockdomain *clkdm) | ||
| 72 | { | ||
| 73 | omap2_clkdm_allow_idle(clkdm); | ||
| 74 | return 0; | ||
| 75 | } | ||
| 76 | |||
| 77 | static int _cpuidle_deny_idle(struct powerdomain *pwrdm, | ||
| 78 | struct clockdomain *clkdm) | ||
| 79 | { | ||
| 80 | omap2_clkdm_deny_idle(clkdm); | ||
| 81 | return 0; | ||
| 82 | } | ||
| 83 | |||
| 84 | /** | ||
| 85 | * omap3_enter_idle - Programs OMAP3 to enter the specified state | ||
| 86 | * @dev: cpuidle device | ||
| 87 | * @state: The target state to be programmed | ||
| 88 | * | ||
| 89 | * Called from the CPUidle framework to program the device to the | ||
| 90 | * specified target state selected by the governor. | ||
| 91 | */ | ||
| 92 | static int omap3_enter_idle(struct cpuidle_device *dev, | ||
| 93 | struct cpuidle_state *state) | ||
| 94 | { | ||
| 95 | struct omap3_processor_cx *cx = cpuidle_get_statedata(state); | ||
| 96 | struct timespec ts_preidle, ts_postidle, ts_idle; | ||
| 97 | u32 mpu_state = cx->mpu_state, core_state = cx->core_state; | ||
| 98 | |||
| 99 | current_cx_state = *cx; | ||
| 100 | |||
| 101 | /* Used to keep track of the total time in idle */ | ||
| 102 | getnstimeofday(&ts_preidle); | ||
| 103 | |||
| 104 | local_irq_disable(); | ||
| 105 | local_fiq_disable(); | ||
| 106 | |||
| 107 | if (!enable_off_mode) { | ||
| 108 | if (mpu_state < PWRDM_POWER_RET) | ||
| 109 | mpu_state = PWRDM_POWER_RET; | ||
| 110 | if (core_state < PWRDM_POWER_RET) | ||
| 111 | core_state = PWRDM_POWER_RET; | ||
| 112 | } | ||
| 113 | |||
| 114 | pwrdm_set_next_pwrst(mpu_pd, mpu_state); | ||
| 115 | pwrdm_set_next_pwrst(core_pd, core_state); | ||
| 116 | |||
| 117 | if (omap_irq_pending() || need_resched()) | ||
| 118 | goto return_sleep_time; | ||
| 119 | |||
| 120 | if (cx->type == OMAP3_STATE_C1) { | ||
| 121 | pwrdm_for_each_clkdm(mpu_pd, _cpuidle_deny_idle); | ||
| 122 | pwrdm_for_each_clkdm(core_pd, _cpuidle_deny_idle); | ||
| 123 | } | ||
| 124 | |||
| 125 | /* Execute ARM wfi */ | ||
| 126 | omap_sram_idle(); | ||
| 127 | |||
| 128 | if (cx->type == OMAP3_STATE_C1) { | ||
| 129 | pwrdm_for_each_clkdm(mpu_pd, _cpuidle_allow_idle); | ||
| 130 | pwrdm_for_each_clkdm(core_pd, _cpuidle_allow_idle); | ||
| 131 | } | ||
| 132 | |||
| 133 | return_sleep_time: | ||
| 134 | getnstimeofday(&ts_postidle); | ||
| 135 | ts_idle = timespec_sub(ts_postidle, ts_preidle); | ||
| 136 | |||
| 137 | local_irq_enable(); | ||
| 138 | local_fiq_enable(); | ||
| 139 | |||
| 140 | return (u32)timespec_to_ns(&ts_idle)/1000; | ||
| 141 | } | ||
| 142 | |||
| 143 | /** | ||
| 144 | * omap3_enter_idle_bm - Checks for any bus activity | ||
| 145 | * @dev: cpuidle device | ||
| 146 | * @state: The target state to be programmed | ||
| 147 | * | ||
| 148 | * Used for C states with CPUIDLE_FLAG_CHECK_BM flag set. This | ||
| 149 | * function checks for any pending activity and then programs the | ||
| 150 | * device to the specified or a safer state. | ||
| 151 | */ | ||
| 152 | static int omap3_enter_idle_bm(struct cpuidle_device *dev, | ||
| 153 | struct cpuidle_state *state) | ||
| 154 | { | ||
| 155 | struct cpuidle_state *new_state = state; | ||
| 156 | |||
| 157 | if ((state->flags & CPUIDLE_FLAG_CHECK_BM) && omap3_idle_bm_check()) { | ||
| 158 | BUG_ON(!dev->safe_state); | ||
| 159 | new_state = dev->safe_state; | ||
| 160 | } | ||
| 161 | |||
| 162 | dev->last_state = new_state; | ||
| 163 | return omap3_enter_idle(dev, new_state); | ||
| 164 | } | ||
| 165 | |||
| 166 | DEFINE_PER_CPU(struct cpuidle_device, omap3_idle_dev); | ||
| 167 | |||
| 168 | /* omap3_init_power_states - Initialises the OMAP3 specific C states. | ||
| 169 | * | ||
| 170 | * Below is the desciption of each C state. | ||
| 171 | * C1 . MPU WFI + Core active | ||
| 172 | * C2 . MPU WFI + Core inactive | ||
| 173 | * C3 . MPU CSWR + Core inactive | ||
| 174 | * C4 . MPU OFF + Core inactive | ||
| 175 | * C5 . MPU CSWR + Core CSWR | ||
| 176 | * C6 . MPU OFF + Core CSWR | ||
| 177 | * C7 . MPU OFF + Core OFF | ||
| 178 | */ | ||
| 179 | void omap_init_power_states(void) | ||
| 180 | { | ||
| 181 | /* C1 . MPU WFI + Core active */ | ||
| 182 | omap3_power_states[OMAP3_STATE_C1].valid = 1; | ||
| 183 | omap3_power_states[OMAP3_STATE_C1].type = OMAP3_STATE_C1; | ||
| 184 | omap3_power_states[OMAP3_STATE_C1].sleep_latency = 2; | ||
| 185 | omap3_power_states[OMAP3_STATE_C1].wakeup_latency = 2; | ||
| 186 | omap3_power_states[OMAP3_STATE_C1].threshold = 5; | ||
| 187 | omap3_power_states[OMAP3_STATE_C1].mpu_state = PWRDM_POWER_ON; | ||
| 188 | omap3_power_states[OMAP3_STATE_C1].core_state = PWRDM_POWER_ON; | ||
| 189 | omap3_power_states[OMAP3_STATE_C1].flags = CPUIDLE_FLAG_TIME_VALID; | ||
| 190 | |||
| 191 | /* C2 . MPU WFI + Core inactive */ | ||
| 192 | omap3_power_states[OMAP3_STATE_C2].valid = 1; | ||
| 193 | omap3_power_states[OMAP3_STATE_C2].type = OMAP3_STATE_C2; | ||
| 194 | omap3_power_states[OMAP3_STATE_C2].sleep_latency = 10; | ||
| 195 | omap3_power_states[OMAP3_STATE_C2].wakeup_latency = 10; | ||
| 196 | omap3_power_states[OMAP3_STATE_C2].threshold = 30; | ||
| 197 | omap3_power_states[OMAP3_STATE_C2].mpu_state = PWRDM_POWER_ON; | ||
| 198 | omap3_power_states[OMAP3_STATE_C2].core_state = PWRDM_POWER_ON; | ||
| 199 | omap3_power_states[OMAP3_STATE_C2].flags = CPUIDLE_FLAG_TIME_VALID; | ||
| 200 | |||
| 201 | /* C3 . MPU CSWR + Core inactive */ | ||
| 202 | omap3_power_states[OMAP3_STATE_C3].valid = 1; | ||
| 203 | omap3_power_states[OMAP3_STATE_C3].type = OMAP3_STATE_C3; | ||
| 204 | omap3_power_states[OMAP3_STATE_C3].sleep_latency = 50; | ||
| 205 | omap3_power_states[OMAP3_STATE_C3].wakeup_latency = 50; | ||
| 206 | omap3_power_states[OMAP3_STATE_C3].threshold = 300; | ||
| 207 | omap3_power_states[OMAP3_STATE_C3].mpu_state = PWRDM_POWER_RET; | ||
| 208 | omap3_power_states[OMAP3_STATE_C3].core_state = PWRDM_POWER_ON; | ||
| 209 | omap3_power_states[OMAP3_STATE_C3].flags = CPUIDLE_FLAG_TIME_VALID | | ||
| 210 | CPUIDLE_FLAG_CHECK_BM; | ||
| 211 | |||
| 212 | /* C4 . MPU OFF + Core inactive */ | ||
| 213 | omap3_power_states[OMAP3_STATE_C4].valid = 1; | ||
| 214 | omap3_power_states[OMAP3_STATE_C4].type = OMAP3_STATE_C4; | ||
| 215 | omap3_power_states[OMAP3_STATE_C4].sleep_latency = 1500; | ||
| 216 | omap3_power_states[OMAP3_STATE_C4].wakeup_latency = 1800; | ||
| 217 | omap3_power_states[OMAP3_STATE_C4].threshold = 4000; | ||
| 218 | omap3_power_states[OMAP3_STATE_C4].mpu_state = PWRDM_POWER_OFF; | ||
| 219 | omap3_power_states[OMAP3_STATE_C4].core_state = PWRDM_POWER_ON; | ||
| 220 | omap3_power_states[OMAP3_STATE_C4].flags = CPUIDLE_FLAG_TIME_VALID | | ||
| 221 | CPUIDLE_FLAG_CHECK_BM; | ||
| 222 | |||
| 223 | /* C5 . MPU CSWR + Core CSWR*/ | ||
| 224 | omap3_power_states[OMAP3_STATE_C5].valid = 1; | ||
| 225 | omap3_power_states[OMAP3_STATE_C5].type = OMAP3_STATE_C5; | ||
| 226 | omap3_power_states[OMAP3_STATE_C5].sleep_latency = 2500; | ||
| 227 | omap3_power_states[OMAP3_STATE_C5].wakeup_latency = 7500; | ||
| 228 | omap3_power_states[OMAP3_STATE_C5].threshold = 12000; | ||
| 229 | omap3_power_states[OMAP3_STATE_C5].mpu_state = PWRDM_POWER_RET; | ||
| 230 | omap3_power_states[OMAP3_STATE_C5].core_state = PWRDM_POWER_RET; | ||
| 231 | omap3_power_states[OMAP3_STATE_C5].flags = CPUIDLE_FLAG_TIME_VALID | | ||
| 232 | CPUIDLE_FLAG_CHECK_BM; | ||
| 233 | |||
| 234 | /* C6 . MPU OFF + Core CSWR */ | ||
| 235 | omap3_power_states[OMAP3_STATE_C6].valid = 1; | ||
| 236 | omap3_power_states[OMAP3_STATE_C6].type = OMAP3_STATE_C6; | ||
| 237 | omap3_power_states[OMAP3_STATE_C6].sleep_latency = 3000; | ||
| 238 | omap3_power_states[OMAP3_STATE_C6].wakeup_latency = 8500; | ||
| 239 | omap3_power_states[OMAP3_STATE_C6].threshold = 15000; | ||
| 240 | omap3_power_states[OMAP3_STATE_C6].mpu_state = PWRDM_POWER_OFF; | ||
| 241 | omap3_power_states[OMAP3_STATE_C6].core_state = PWRDM_POWER_RET; | ||
| 242 | omap3_power_states[OMAP3_STATE_C6].flags = CPUIDLE_FLAG_TIME_VALID | | ||
| 243 | CPUIDLE_FLAG_CHECK_BM; | ||
| 244 | |||
| 245 | /* C7 . MPU OFF + Core OFF */ | ||
| 246 | omap3_power_states[OMAP3_STATE_C7].valid = 1; | ||
| 247 | omap3_power_states[OMAP3_STATE_C7].type = OMAP3_STATE_C7; | ||
| 248 | omap3_power_states[OMAP3_STATE_C7].sleep_latency = 10000; | ||
| 249 | omap3_power_states[OMAP3_STATE_C7].wakeup_latency = 30000; | ||
| 250 | omap3_power_states[OMAP3_STATE_C7].threshold = 300000; | ||
| 251 | omap3_power_states[OMAP3_STATE_C7].mpu_state = PWRDM_POWER_OFF; | ||
| 252 | omap3_power_states[OMAP3_STATE_C7].core_state = PWRDM_POWER_OFF; | ||
| 253 | omap3_power_states[OMAP3_STATE_C7].flags = CPUIDLE_FLAG_TIME_VALID | | ||
| 254 | CPUIDLE_FLAG_CHECK_BM; | ||
| 255 | } | ||
| 256 | |||
| 257 | struct cpuidle_driver omap3_idle_driver = { | ||
| 258 | .name = "omap3_idle", | ||
| 259 | .owner = THIS_MODULE, | ||
| 260 | }; | ||
| 261 | |||
| 262 | /** | ||
| 263 | * omap3_idle_init - Init routine for OMAP3 idle | ||
| 264 | * | ||
| 265 | * Registers the OMAP3 specific cpuidle driver with the cpuidle | ||
| 266 | * framework with the valid set of states. | ||
| 267 | */ | ||
| 268 | int __init omap3_idle_init(void) | ||
| 269 | { | ||
| 270 | int i, count = 0; | ||
| 271 | struct omap3_processor_cx *cx; | ||
| 272 | struct cpuidle_state *state; | ||
| 273 | struct cpuidle_device *dev; | ||
| 274 | |||
| 275 | mpu_pd = pwrdm_lookup("mpu_pwrdm"); | ||
| 276 | core_pd = pwrdm_lookup("core_pwrdm"); | ||
| 277 | |||
| 278 | omap_init_power_states(); | ||
| 279 | cpuidle_register_driver(&omap3_idle_driver); | ||
| 280 | |||
| 281 | dev = &per_cpu(omap3_idle_dev, smp_processor_id()); | ||
| 282 | |||
| 283 | for (i = OMAP3_STATE_C1; i < OMAP3_MAX_STATES; i++) { | ||
| 284 | cx = &omap3_power_states[i]; | ||
| 285 | state = &dev->states[count]; | ||
| 286 | |||
| 287 | if (!cx->valid) | ||
| 288 | continue; | ||
| 289 | cpuidle_set_statedata(state, cx); | ||
| 290 | state->exit_latency = cx->sleep_latency + cx->wakeup_latency; | ||
| 291 | state->target_residency = cx->threshold; | ||
| 292 | state->flags = cx->flags; | ||
| 293 | state->enter = (state->flags & CPUIDLE_FLAG_CHECK_BM) ? | ||
| 294 | omap3_enter_idle_bm : omap3_enter_idle; | ||
| 295 | if (cx->type == OMAP3_STATE_C1) | ||
| 296 | dev->safe_state = state; | ||
| 297 | sprintf(state->name, "C%d", count+1); | ||
| 298 | count++; | ||
| 299 | } | ||
| 300 | |||
| 301 | if (!count) | ||
| 302 | return -EINVAL; | ||
| 303 | dev->state_count = count; | ||
| 304 | |||
| 305 | if (cpuidle_register_device(dev)) { | ||
| 306 | printk(KERN_ERR "%s: CPUidle register device failed\n", | ||
| 307 | __func__); | ||
| 308 | return -EIO; | ||
| 309 | } | ||
| 310 | |||
| 311 | return 0; | ||
| 312 | } | ||
| 313 | #else | ||
| 314 | int __init omap3_idle_init(void) | ||
| 315 | { | ||
| 316 | return 0; | ||
| 317 | } | ||
| 318 | #endif /* CONFIG_CPU_IDLE */ | ||
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index faf7a1e0c52..733d3dcff98 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c | |||
| @@ -20,12 +20,12 @@ | |||
| 20 | #include <asm/mach-types.h> | 20 | #include <asm/mach-types.h> |
| 21 | #include <asm/mach/map.h> | 21 | #include <asm/mach/map.h> |
| 22 | 22 | ||
| 23 | #include <mach/control.h> | 23 | #include <plat/control.h> |
| 24 | #include <mach/tc.h> | 24 | #include <plat/tc.h> |
| 25 | #include <mach/board.h> | 25 | #include <plat/board.h> |
| 26 | #include <mach/mux.h> | 26 | #include <plat/mux.h> |
| 27 | #include <mach/gpio.h> | 27 | #include <mach/gpio.h> |
| 28 | #include <mach/mmc.h> | 28 | #include <plat/mmc.h> |
| 29 | 29 | ||
| 30 | #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE) | 30 | #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE) |
| 31 | 31 | ||
| @@ -136,9 +136,10 @@ static inline void omap_init_camera(void) | |||
| 136 | 136 | ||
| 137 | #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE) | 137 | #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE) |
| 138 | 138 | ||
| 139 | #define MBOX_REG_SIZE 0x120 | 139 | #define MBOX_REG_SIZE 0x120 |
| 140 | 140 | ||
| 141 | static struct resource omap2_mbox_resources[] = { | 141 | #ifdef CONFIG_ARCH_OMAP2 |
| 142 | static struct resource omap_mbox_resources[] = { | ||
| 142 | { | 143 | { |
| 143 | .start = OMAP24XX_MAILBOX_BASE, | 144 | .start = OMAP24XX_MAILBOX_BASE, |
| 144 | .end = OMAP24XX_MAILBOX_BASE + MBOX_REG_SIZE - 1, | 145 | .end = OMAP24XX_MAILBOX_BASE + MBOX_REG_SIZE - 1, |
| @@ -153,8 +154,10 @@ static struct resource omap2_mbox_resources[] = { | |||
| 153 | .flags = IORESOURCE_IRQ, | 154 | .flags = IORESOURCE_IRQ, |
| 154 | }, | 155 | }, |
| 155 | }; | 156 | }; |
| 157 | #endif | ||
| 156 | 158 | ||
| 157 | static struct resource omap3_mbox_resources[] = { | 159 | #ifdef CONFIG_ARCH_OMAP3 |
| 160 | static struct resource omap_mbox_resources[] = { | ||
| 158 | { | 161 | { |
| 159 | .start = OMAP34XX_MAILBOX_BASE, | 162 | .start = OMAP34XX_MAILBOX_BASE, |
| 160 | .end = OMAP34XX_MAILBOX_BASE + MBOX_REG_SIZE - 1, | 163 | .end = OMAP34XX_MAILBOX_BASE + MBOX_REG_SIZE - 1, |
| @@ -165,6 +168,24 @@ static struct resource omap3_mbox_resources[] = { | |||
| 165 | .flags = IORESOURCE_IRQ, | 168 | .flags = IORESOURCE_IRQ, |
| 166 | }, | 169 | }, |
| 167 | }; | 170 | }; |
| 171 | #endif | ||
| 172 | |||
| 173 | #ifdef CONFIG_ARCH_OMAP4 | ||
| 174 | |||
| 175 | #define OMAP4_MBOX_REG_SIZE 0x130 | ||
| 176 | static struct resource omap_mbox_resources[] = { | ||
| 177 | { | ||
| 178 | .start = OMAP44XX_MAILBOX_BASE, | ||
| 179 | .end = OMAP44XX_MAILBOX_BASE + | ||
| 180 | OMAP4_MBOX_REG_SIZE - 1, | ||
| 181 | .flags = IORESOURCE_MEM, | ||
| 182 | }, | ||
| 183 | { | ||
| 184 | .start = INT_44XX_MAIL_U0_MPU, | ||
| 185 | .flags = IORESOURCE_IRQ, | ||
| 186 | }, | ||
| 187 | }; | ||
| 188 | #endif | ||
| 168 | 189 | ||
| 169 | static struct platform_device mbox_device = { | 190 | static struct platform_device mbox_device = { |
| 170 | .name = "omap2-mailbox", | 191 | .name = "omap2-mailbox", |
| @@ -173,12 +194,9 @@ static struct platform_device mbox_device = { | |||
| 173 | 194 | ||
| 174 | static inline void omap_init_mbox(void) | 195 | static inline void omap_init_mbox(void) |
| 175 | { | 196 | { |
| 176 | if (cpu_is_omap2420()) { | 197 | if (cpu_is_omap2420() || cpu_is_omap3430() || cpu_is_omap44xx()) { |
| 177 | mbox_device.num_resources = ARRAY_SIZE(omap2_mbox_resources); | 198 | mbox_device.num_resources = ARRAY_SIZE(omap_mbox_resources); |
| 178 | mbox_device.resource = omap2_mbox_resources; | 199 | mbox_device.resource = omap_mbox_resources; |
| 179 | } else if (cpu_is_omap3430()) { | ||
| 180 | mbox_device.num_resources = ARRAY_SIZE(omap3_mbox_resources); | ||
| 181 | mbox_device.resource = omap3_mbox_resources; | ||
| 182 | } else { | 200 | } else { |
| 183 | pr_err("%s: platform not supported\n", __func__); | 201 | pr_err("%s: platform not supported\n", __func__); |
| 184 | return; | 202 | return; |
| @@ -250,7 +268,7 @@ static inline void omap_init_sti(void) {} | |||
| 250 | 268 | ||
| 251 | #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE) | 269 | #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE) |
| 252 | 270 | ||
| 253 | #include <mach/mcspi.h> | 271 | #include <plat/mcspi.h> |
| 254 | 272 | ||
| 255 | #define OMAP2_MCSPI1_BASE 0x48098000 | 273 | #define OMAP2_MCSPI1_BASE 0x48098000 |
| 256 | #define OMAP2_MCSPI2_BASE 0x4809a000 | 274 | #define OMAP2_MCSPI2_BASE 0x4809a000 |
| @@ -575,7 +593,7 @@ static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller, | |||
| 575 | } | 593 | } |
| 576 | } | 594 | } |
| 577 | 595 | ||
| 578 | if (cpu_is_omap3430()) { | 596 | if (cpu_is_omap34xx()) { |
| 579 | if (controller_nr == 0) { | 597 | if (controller_nr == 0) { |
| 580 | omap_cfg_reg(N28_3430_MMC1_CLK); | 598 | omap_cfg_reg(N28_3430_MMC1_CLK); |
| 581 | omap_cfg_reg(M27_3430_MMC1_CMD); | 599 | omap_cfg_reg(M27_3430_MMC1_CMD); |
| @@ -609,6 +627,12 @@ static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller, | |||
| 609 | omap_cfg_reg(AG4_3430_MMC2_DAT2); | 627 | omap_cfg_reg(AG4_3430_MMC2_DAT2); |
| 610 | omap_cfg_reg(AF4_3430_MMC2_DAT3); | 628 | omap_cfg_reg(AF4_3430_MMC2_DAT3); |
| 611 | } | 629 | } |
| 630 | if (mmc_controller->slots[0].wires == 8) { | ||
| 631 | omap_cfg_reg(AE4_3430_MMC2_DAT4); | ||
| 632 | omap_cfg_reg(AH3_3430_MMC2_DAT5); | ||
| 633 | omap_cfg_reg(AF3_3430_MMC2_DAT6); | ||
| 634 | omap_cfg_reg(AE3_3430_MMC2_DAT7); | ||
| 635 | } | ||
| 612 | } | 636 | } |
| 613 | 637 | ||
| 614 | /* | 638 | /* |
diff --git a/arch/arm/mach-omap2/emu.c b/arch/arm/mach-omap2/emu.c new file mode 100644 index 00000000000..ec0d984a26f --- /dev/null +++ b/arch/arm/mach-omap2/emu.c | |||
| @@ -0,0 +1,66 @@ | |||
| 1 | /* | ||
| 2 | * emu.c | ||
| 3 | * | ||
| 4 | * ETM and ETB CoreSight components' resources as found in OMAP3xxx. | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Nokia Corporation. | ||
| 7 | * Alexander Shishkin | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License version 2 as | ||
| 11 | * published by the Free Software Foundation. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/kernel.h> | ||
| 15 | #include <linux/init.h> | ||
| 16 | #include <linux/types.h> | ||
| 17 | #include <linux/module.h> | ||
| 18 | #include <linux/device.h> | ||
| 19 | #include <linux/amba/bus.h> | ||
| 20 | #include <linux/io.h> | ||
| 21 | #include <linux/clk.h> | ||
| 22 | #include <linux/err.h> | ||
| 23 | |||
| 24 | MODULE_LICENSE("GPL"); | ||
| 25 | MODULE_AUTHOR("Alexander Shishkin"); | ||
| 26 | |||
| 27 | /* Cortex CoreSight components within omap3xxx EMU */ | ||
| 28 | #define ETM_BASE (L4_EMU_34XX_PHYS + 0x10000) | ||
| 29 | #define DBG_BASE (L4_EMU_34XX_PHYS + 0x11000) | ||
| 30 | #define ETB_BASE (L4_EMU_34XX_PHYS + 0x1b000) | ||
| 31 | #define DAPCTL (L4_EMU_34XX_PHYS + 0x1d000) | ||
| 32 | |||
| 33 | static struct amba_device omap3_etb_device = { | ||
| 34 | .dev = { | ||
| 35 | .init_name = "etb", | ||
| 36 | }, | ||
| 37 | .res = { | ||
| 38 | .start = ETB_BASE, | ||
| 39 | .end = ETB_BASE + SZ_4K - 1, | ||
| 40 | .flags = IORESOURCE_MEM, | ||
| 41 | }, | ||
| 42 | .periphid = 0x000bb907, | ||
| 43 | }; | ||
| 44 | |||
| 45 | static struct amba_device omap3_etm_device = { | ||
| 46 | .dev = { | ||
| 47 | .init_name = "etm", | ||
| 48 | }, | ||
| 49 | .res = { | ||
| 50 | .start = ETM_BASE, | ||
| 51 | .end = ETM_BASE + SZ_4K - 1, | ||
| 52 | .flags = IORESOURCE_MEM, | ||
| 53 | }, | ||
| 54 | .periphid = 0x102bb921, | ||
| 55 | }; | ||
| 56 | |||
| 57 | static int __init emu_init(void) | ||
| 58 | { | ||
| 59 | amba_device_register(&omap3_etb_device, &iomem_resource); | ||
| 60 | amba_device_register(&omap3_etm_device, &iomem_resource); | ||
| 61 | |||
| 62 | return 0; | ||
| 63 | } | ||
| 64 | |||
| 65 | subsys_initcall(emu_init); | ||
| 66 | |||
diff --git a/arch/arm/mach-omap2/gpmc-onenand.c b/arch/arm/mach-omap2/gpmc-onenand.c index 54fec53a48e..7bb69220adf 100644 --- a/arch/arm/mach-omap2/gpmc-onenand.c +++ b/arch/arm/mach-omap2/gpmc-onenand.c | |||
| @@ -17,9 +17,9 @@ | |||
| 17 | 17 | ||
| 18 | #include <asm/mach/flash.h> | 18 | #include <asm/mach/flash.h> |
| 19 | 19 | ||
| 20 | #include <mach/onenand.h> | 20 | #include <plat/onenand.h> |
| 21 | #include <mach/board.h> | 21 | #include <plat/board.h> |
| 22 | #include <mach/gpmc.h> | 22 | #include <plat/gpmc.h> |
| 23 | 23 | ||
| 24 | static struct omap_onenand_platform_data *gpmc_onenand_data; | 24 | static struct omap_onenand_platform_data *gpmc_onenand_data; |
| 25 | 25 | ||
diff --git a/arch/arm/mach-omap2/gpmc-smc91x.c b/arch/arm/mach-omap2/gpmc-smc91x.c index df99d31d8b6..6083e21b3be 100644 --- a/arch/arm/mach-omap2/gpmc-smc91x.c +++ b/arch/arm/mach-omap2/gpmc-smc91x.c | |||
| @@ -17,9 +17,9 @@ | |||
| 17 | #include <linux/io.h> | 17 | #include <linux/io.h> |
| 18 | #include <linux/smc91x.h> | 18 | #include <linux/smc91x.h> |
| 19 | 19 | ||
| 20 | #include <mach/board.h> | 20 | #include <plat/board.h> |
| 21 | #include <mach/gpmc.h> | 21 | #include <plat/gpmc.h> |
| 22 | #include <mach/gpmc-smc91x.h> | 22 | #include <plat/gpmc-smc91x.h> |
| 23 | 23 | ||
| 24 | static struct omap_smc91x_platform_data *gpmc_cfg; | 24 | static struct omap_smc91x_platform_data *gpmc_cfg; |
| 25 | 25 | ||
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index f3c992e2965..e86f5ca180e 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c | |||
| @@ -24,9 +24,9 @@ | |||
| 24 | #include <linux/module.h> | 24 | #include <linux/module.h> |
| 25 | 25 | ||
| 26 | #include <asm/mach-types.h> | 26 | #include <asm/mach-types.h> |
| 27 | #include <mach/gpmc.h> | 27 | #include <plat/gpmc.h> |
| 28 | 28 | ||
| 29 | #include <mach/sdrc.h> | 29 | #include <plat/sdrc.h> |
| 30 | 30 | ||
| 31 | /* GPMC register offsets */ | 31 | /* GPMC register offsets */ |
| 32 | #define GPMC_REVISION 0x00 | 32 | #define GPMC_REVISION 0x00 |
| @@ -62,6 +62,33 @@ | |||
| 62 | #define ENABLE_PREFETCH (0x1 << 7) | 62 | #define ENABLE_PREFETCH (0x1 << 7) |
| 63 | #define DMA_MPU_MODE 2 | 63 | #define DMA_MPU_MODE 2 |
| 64 | 64 | ||
| 65 | /* Structure to save gpmc cs context */ | ||
| 66 | struct gpmc_cs_config { | ||
| 67 | u32 config1; | ||
| 68 | u32 config2; | ||
| 69 | u32 config3; | ||
| 70 | u32 config4; | ||
| 71 | u32 config5; | ||
| 72 | u32 config6; | ||
| 73 | u32 config7; | ||
| 74 | int is_valid; | ||
| 75 | }; | ||
| 76 | |||
| 77 | /* | ||
| 78 | * Structure to save/restore gpmc context | ||
| 79 | * to support core off on OMAP3 | ||
| 80 | */ | ||
| 81 | struct omap3_gpmc_regs { | ||
| 82 | u32 sysconfig; | ||
| 83 | u32 irqenable; | ||
| 84 | u32 timeout_ctrl; | ||
| 85 | u32 config; | ||
| 86 | u32 prefetch_config1; | ||
| 87 | u32 prefetch_config2; | ||
| 88 | u32 prefetch_control; | ||
| 89 | struct gpmc_cs_config cs_context[GPMC_CS_NUM]; | ||
| 90 | }; | ||
| 91 | |||
| 65 | static struct resource gpmc_mem_root; | 92 | static struct resource gpmc_mem_root; |
| 66 | static struct resource gpmc_cs_mem[GPMC_CS_NUM]; | 93 | static struct resource gpmc_cs_mem[GPMC_CS_NUM]; |
| 67 | static DEFINE_SPINLOCK(gpmc_mem_lock); | 94 | static DEFINE_SPINLOCK(gpmc_mem_lock); |
| @@ -261,7 +288,7 @@ static void gpmc_cs_enable_mem(int cs, u32 base, u32 size) | |||
| 261 | l = (base >> GPMC_CHUNK_SHIFT) & 0x3f; | 288 | l = (base >> GPMC_CHUNK_SHIFT) & 0x3f; |
| 262 | l &= ~(0x0f << 8); | 289 | l &= ~(0x0f << 8); |
| 263 | l |= ((mask >> GPMC_CHUNK_SHIFT) & 0x0f) << 8; | 290 | l |= ((mask >> GPMC_CHUNK_SHIFT) & 0x0f) << 8; |
| 264 | l |= 1 << 6; /* CSVALID */ | 291 | l |= GPMC_CONFIG7_CSVALID; |
| 265 | gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l); | 292 | gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l); |
| 266 | } | 293 | } |
| 267 | 294 | ||
| @@ -270,7 +297,7 @@ static void gpmc_cs_disable_mem(int cs) | |||
| 270 | u32 l; | 297 | u32 l; |
| 271 | 298 | ||
| 272 | l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); | 299 | l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); |
| 273 | l &= ~(1 << 6); /* CSVALID */ | 300 | l &= ~GPMC_CONFIG7_CSVALID; |
| 274 | gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l); | 301 | gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l); |
| 275 | } | 302 | } |
| 276 | 303 | ||
| @@ -290,7 +317,7 @@ static int gpmc_cs_mem_enabled(int cs) | |||
| 290 | u32 l; | 317 | u32 l; |
| 291 | 318 | ||
| 292 | l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); | 319 | l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); |
| 293 | return l & (1 << 6); | 320 | return l & GPMC_CONFIG7_CSVALID; |
| 294 | } | 321 | } |
| 295 | 322 | ||
| 296 | int gpmc_cs_set_reserved(int cs, int reserved) | 323 | int gpmc_cs_set_reserved(int cs, int reserved) |
| @@ -516,3 +543,68 @@ void __init gpmc_init(void) | |||
| 516 | gpmc_write_reg(GPMC_SYSCONFIG, l); | 543 | gpmc_write_reg(GPMC_SYSCONFIG, l); |
| 517 | gpmc_mem_init(); | 544 | gpmc_mem_init(); |
| 518 | } | 545 | } |
| 546 | |||
| 547 | #ifdef CONFIG_ARCH_OMAP3 | ||
| 548 | static struct omap3_gpmc_regs gpmc_context; | ||
| 549 | |||
| 550 | void omap3_gpmc_save_context() | ||
| 551 | { | ||
| 552 | int i; | ||
| 553 | gpmc_context.sysconfig = gpmc_read_reg(GPMC_SYSCONFIG); | ||
| 554 | gpmc_context.irqenable = gpmc_read_reg(GPMC_IRQENABLE); | ||
| 555 | gpmc_context.timeout_ctrl = gpmc_read_reg(GPMC_TIMEOUT_CONTROL); | ||
| 556 | gpmc_context.config = gpmc_read_reg(GPMC_CONFIG); | ||
| 557 | gpmc_context.prefetch_config1 = gpmc_read_reg(GPMC_PREFETCH_CONFIG1); | ||
| 558 | gpmc_context.prefetch_config2 = gpmc_read_reg(GPMC_PREFETCH_CONFIG2); | ||
| 559 | gpmc_context.prefetch_control = gpmc_read_reg(GPMC_PREFETCH_CONTROL); | ||
| 560 | for (i = 0; i < GPMC_CS_NUM; i++) { | ||
| 561 | gpmc_context.cs_context[i].is_valid = gpmc_cs_mem_enabled(i); | ||
| 562 | if (gpmc_context.cs_context[i].is_valid) { | ||
| 563 | gpmc_context.cs_context[i].config1 = | ||
| 564 | gpmc_cs_read_reg(i, GPMC_CS_CONFIG1); | ||
| 565 | gpmc_context.cs_context[i].config2 = | ||
| 566 | gpmc_cs_read_reg(i, GPMC_CS_CONFIG2); | ||
| 567 | gpmc_context.cs_context[i].config3 = | ||
| 568 | gpmc_cs_read_reg(i, GPMC_CS_CONFIG3); | ||
| 569 | gpmc_context.cs_context[i].config4 = | ||
| 570 | gpmc_cs_read_reg(i, GPMC_CS_CONFIG4); | ||
| 571 | gpmc_context.cs_context[i].config5 = | ||
| 572 | gpmc_cs_read_reg(i, GPMC_CS_CONFIG5); | ||
| 573 | gpmc_context.cs_context[i].config6 = | ||
| 574 | gpmc_cs_read_reg(i, GPMC_CS_CONFIG6); | ||
| 575 | gpmc_context.cs_context[i].config7 = | ||
| 576 | gpmc_cs_read_reg(i, GPMC_CS_CONFIG7); | ||
| 577 | } | ||
| 578 | } | ||
| 579 | } | ||
| 580 | |||
| 581 | void omap3_gpmc_restore_context() | ||
| 582 | { | ||
| 583 | int i; | ||
| 584 | gpmc_write_reg(GPMC_SYSCONFIG, gpmc_context.sysconfig); | ||
| 585 | gpmc_write_reg(GPMC_IRQENABLE, gpmc_context.irqenable); | ||
| 586 | gpmc_write_reg(GPMC_TIMEOUT_CONTROL, gpmc_context.timeout_ctrl); | ||
| 587 | gpmc_write_reg(GPMC_CONFIG, gpmc_context.config); | ||
| 588 | gpmc_write_reg(GPMC_PREFETCH_CONFIG1, gpmc_context.prefetch_config1); | ||
| 589 | gpmc_write_reg(GPMC_PREFETCH_CONFIG2, gpmc_context.prefetch_config2); | ||
| 590 | gpmc_write_reg(GPMC_PREFETCH_CONTROL, gpmc_context.prefetch_control); | ||
| 591 | for (i = 0; i < GPMC_CS_NUM; i++) { | ||
| 592 | if (gpmc_context.cs_context[i].is_valid) { | ||
| 593 | gpmc_cs_write_reg(i, GPMC_CS_CONFIG1, | ||
| 594 | gpmc_context.cs_context[i].config1); | ||
| 595 | gpmc_cs_write_reg(i, GPMC_CS_CONFIG2, | ||
| 596 | gpmc_context.cs_context[i].config2); | ||
| 597 | gpmc_cs_write_reg(i, GPMC_CS_CONFIG3, | ||
| 598 | gpmc_context.cs_context[i].config3); | ||
| 599 | gpmc_cs_write_reg(i, GPMC_CS_CONFIG4, | ||
| 600 | gpmc_context.cs_context[i].config4); | ||
| 601 | gpmc_cs_write_reg(i, GPMC_CS_CONFIG5, | ||
| 602 | gpmc_context.cs_context[i].config5); | ||
| 603 | gpmc_cs_write_reg(i, GPMC_CS_CONFIG6, | ||
| 604 | gpmc_context.cs_context[i].config6); | ||
| 605 | gpmc_cs_write_reg(i, GPMC_CS_CONFIG7, | ||
| 606 | gpmc_context.cs_context[i].config7); | ||
| 607 | } | ||
| 608 | } | ||
| 609 | } | ||
| 610 | #endif /* CONFIG_ARCH_OMAP3 */ | ||
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index a98201cc265..f48a4b2654d 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c | |||
| @@ -21,13 +21,14 @@ | |||
| 21 | 21 | ||
| 22 | #include <asm/cputype.h> | 22 | #include <asm/cputype.h> |
| 23 | 23 | ||
| 24 | #include <mach/common.h> | 24 | #include <plat/common.h> |
| 25 | #include <mach/control.h> | 25 | #include <plat/control.h> |
| 26 | #include <mach/cpu.h> | 26 | #include <plat/cpu.h> |
| 27 | 27 | ||
| 28 | static struct omap_chip_id omap_chip; | 28 | static struct omap_chip_id omap_chip; |
| 29 | static unsigned int omap_revision; | 29 | static unsigned int omap_revision; |
| 30 | 30 | ||
| 31 | u32 omap3_features; | ||
| 31 | 32 | ||
| 32 | unsigned int omap_rev(void) | 33 | unsigned int omap_rev(void) |
| 33 | { | 34 | { |
| @@ -52,11 +53,11 @@ int omap_type(void) | |||
| 52 | { | 53 | { |
| 53 | u32 val = 0; | 54 | u32 val = 0; |
| 54 | 55 | ||
| 55 | if (cpu_is_omap24xx()) | 56 | if (cpu_is_omap24xx()) { |
| 56 | val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS); | 57 | val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS); |
| 57 | else if (cpu_is_omap34xx()) | 58 | } else if (cpu_is_omap34xx()) { |
| 58 | val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS); | 59 | val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS); |
| 59 | else { | 60 | } else { |
| 60 | pr_err("Cannot detect omap type!\n"); | 61 | pr_err("Cannot detect omap type!\n"); |
| 61 | goto out; | 62 | goto out; |
| 62 | } | 63 | } |
| @@ -155,12 +156,37 @@ void __init omap24xx_check_revision(void) | |||
| 155 | pr_info("\n"); | 156 | pr_info("\n"); |
| 156 | } | 157 | } |
| 157 | 158 | ||
| 158 | void __init omap34xx_check_revision(void) | 159 | #define OMAP3_CHECK_FEATURE(status,feat) \ |
| 160 | if (((status & OMAP3_ ##feat## _MASK) \ | ||
| 161 | >> OMAP3_ ##feat## _SHIFT) != FEAT_ ##feat## _NONE) { \ | ||
| 162 | omap3_features |= OMAP3_HAS_ ##feat; \ | ||
| 163 | } | ||
| 164 | |||
| 165 | void __init omap3_check_features(void) | ||
| 166 | { | ||
| 167 | u32 status; | ||
| 168 | |||
| 169 | omap3_features = 0; | ||
| 170 | |||
| 171 | status = omap_ctrl_readl(OMAP3_CONTROL_OMAP_STATUS); | ||
| 172 | |||
| 173 | OMAP3_CHECK_FEATURE(status, L2CACHE); | ||
| 174 | OMAP3_CHECK_FEATURE(status, IVA); | ||
| 175 | OMAP3_CHECK_FEATURE(status, SGX); | ||
| 176 | OMAP3_CHECK_FEATURE(status, NEON); | ||
| 177 | OMAP3_CHECK_FEATURE(status, ISP); | ||
| 178 | |||
| 179 | /* | ||
| 180 | * TODO: Get additional info (where applicable) | ||
| 181 | * e.g. Size of L2 cache. | ||
| 182 | */ | ||
| 183 | } | ||
| 184 | |||
| 185 | void __init omap3_check_revision(void) | ||
| 159 | { | 186 | { |
| 160 | u32 cpuid, idcode; | 187 | u32 cpuid, idcode; |
| 161 | u16 hawkeye; | 188 | u16 hawkeye; |
| 162 | u8 rev; | 189 | u8 rev; |
| 163 | char *rev_name = "ES1.0"; | ||
| 164 | 190 | ||
| 165 | /* | 191 | /* |
| 166 | * We cannot access revision registers on ES1.0. | 192 | * We cannot access revision registers on ES1.0. |
| @@ -170,7 +196,7 @@ void __init omap34xx_check_revision(void) | |||
| 170 | cpuid = read_cpuid(CPUID_ID); | 196 | cpuid = read_cpuid(CPUID_ID); |
| 171 | if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) { | 197 | if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) { |
| 172 | omap_revision = OMAP3430_REV_ES1_0; | 198 | omap_revision = OMAP3430_REV_ES1_0; |
| 173 | goto out; | 199 | return; |
| 174 | } | 200 | } |
| 175 | 201 | ||
| 176 | /* | 202 | /* |
| @@ -183,33 +209,115 @@ void __init omap34xx_check_revision(void) | |||
| 183 | hawkeye = (idcode >> 12) & 0xffff; | 209 | hawkeye = (idcode >> 12) & 0xffff; |
| 184 | rev = (idcode >> 28) & 0xff; | 210 | rev = (idcode >> 28) & 0xff; |
| 185 | 211 | ||
| 186 | if (hawkeye == 0xb7ae) { | 212 | switch (hawkeye) { |
| 213 | case 0xb7ae: | ||
| 214 | /* Handle 34xx/35xx devices */ | ||
| 187 | switch (rev) { | 215 | switch (rev) { |
| 188 | case 0: | 216 | case 0: /* Take care of early samples */ |
| 217 | case 1: | ||
| 189 | omap_revision = OMAP3430_REV_ES2_0; | 218 | omap_revision = OMAP3430_REV_ES2_0; |
| 190 | rev_name = "ES2.0"; | ||
| 191 | break; | 219 | break; |
| 192 | case 2: | 220 | case 2: |
| 193 | omap_revision = OMAP3430_REV_ES2_1; | 221 | omap_revision = OMAP3430_REV_ES2_1; |
| 194 | rev_name = "ES2.1"; | ||
| 195 | break; | 222 | break; |
| 196 | case 3: | 223 | case 3: |
| 197 | omap_revision = OMAP3430_REV_ES3_0; | 224 | omap_revision = OMAP3430_REV_ES3_0; |
| 198 | rev_name = "ES3.0"; | ||
| 199 | break; | 225 | break; |
| 200 | case 4: | 226 | case 4: |
| 201 | omap_revision = OMAP3430_REV_ES3_1; | 227 | /* FALLTHROUGH */ |
| 202 | rev_name = "ES3.1"; | ||
| 203 | break; | ||
| 204 | default: | 228 | default: |
| 205 | /* Use the latest known revision as default */ | 229 | /* Use the latest known revision as default */ |
| 206 | omap_revision = OMAP3430_REV_ES3_1; | 230 | omap_revision = OMAP3430_REV_ES3_1; |
| 207 | rev_name = "Unknown revision\n"; | ||
| 208 | } | 231 | } |
| 232 | break; | ||
| 233 | case 0xb868: | ||
| 234 | /* Handle OMAP35xx/AM35xx devices | ||
| 235 | * | ||
| 236 | * Set the device to be OMAP3505 here. Actual device | ||
| 237 | * is identified later based on the features. | ||
| 238 | */ | ||
| 239 | omap_revision = OMAP3505_REV(rev); | ||
| 240 | break; | ||
| 241 | case 0xb891: | ||
| 242 | /* FALLTHROUGH */ | ||
| 243 | default: | ||
| 244 | /* Unknown default to latest silicon rev as default*/ | ||
| 245 | omap_revision = OMAP3630_REV_ES1_0; | ||
| 209 | } | 246 | } |
| 247 | } | ||
| 210 | 248 | ||
| 211 | out: | 249 | #define OMAP3_SHOW_FEATURE(feat) \ |
| 212 | pr_info("OMAP%04x %s\n", omap_rev() >> 16, rev_name); | 250 | if (omap3_has_ ##feat()) \ |
| 251 | printk(#feat" "); | ||
| 252 | |||
| 253 | void __init omap3_cpuinfo(void) | ||
| 254 | { | ||
| 255 | u8 rev = GET_OMAP_REVISION(); | ||
| 256 | char cpu_name[16], cpu_rev[16]; | ||
| 257 | |||
| 258 | /* OMAP3430 and OMAP3530 are assumed to be same. | ||
| 259 | * | ||
| 260 | * OMAP3525, OMAP3515 and OMAP3503 can be detected only based | ||
| 261 | * on available features. Upon detection, update the CPU id | ||
| 262 | * and CPU class bits. | ||
| 263 | */ | ||
| 264 | if (cpu_is_omap3630()) { | ||
| 265 | strcpy(cpu_name, "OMAP3630"); | ||
| 266 | } else if (cpu_is_omap3505()) { | ||
| 267 | /* | ||
| 268 | * AM35xx devices | ||
| 269 | */ | ||
| 270 | if (omap3_has_sgx()) { | ||
| 271 | omap_revision = OMAP3517_REV(rev); | ||
| 272 | strcpy(cpu_name, "AM3517"); | ||
| 273 | } else { | ||
| 274 | /* Already set in omap3_check_revision() */ | ||
| 275 | strcpy(cpu_name, "AM3505"); | ||
| 276 | } | ||
| 277 | } else if (omap3_has_iva() && omap3_has_sgx()) { | ||
| 278 | /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */ | ||
| 279 | strcpy(cpu_name, "OMAP3430/3530"); | ||
| 280 | } else if (omap3_has_sgx()) { | ||
| 281 | omap_revision = OMAP3525_REV(rev); | ||
| 282 | strcpy(cpu_name, "OMAP3525"); | ||
| 283 | } else if (omap3_has_iva()) { | ||
| 284 | omap_revision = OMAP3515_REV(rev); | ||
| 285 | strcpy(cpu_name, "OMAP3515"); | ||
| 286 | } else { | ||
| 287 | omap_revision = OMAP3503_REV(rev); | ||
| 288 | strcpy(cpu_name, "OMAP3503"); | ||
| 289 | } | ||
| 290 | |||
| 291 | switch (rev) { | ||
| 292 | case OMAP_REVBITS_00: | ||
| 293 | strcpy(cpu_rev, "1.0"); | ||
| 294 | break; | ||
| 295 | case OMAP_REVBITS_10: | ||
| 296 | strcpy(cpu_rev, "2.0"); | ||
| 297 | break; | ||
| 298 | case OMAP_REVBITS_20: | ||
| 299 | strcpy(cpu_rev, "2.1"); | ||
| 300 | break; | ||
| 301 | case OMAP_REVBITS_30: | ||
| 302 | strcpy(cpu_rev, "3.0"); | ||
| 303 | break; | ||
| 304 | case OMAP_REVBITS_40: | ||
| 305 | /* FALLTHROUGH */ | ||
| 306 | default: | ||
| 307 | /* Use the latest known revision as default */ | ||
| 308 | strcpy(cpu_rev, "3.1"); | ||
| 309 | } | ||
| 310 | |||
| 311 | /* Print verbose information */ | ||
| 312 | pr_info("%s ES%s (", cpu_name, cpu_rev); | ||
| 313 | |||
| 314 | OMAP3_SHOW_FEATURE(l2cache); | ||
| 315 | OMAP3_SHOW_FEATURE(iva); | ||
| 316 | OMAP3_SHOW_FEATURE(sgx); | ||
| 317 | OMAP3_SHOW_FEATURE(neon); | ||
| 318 | OMAP3_SHOW_FEATURE(isp); | ||
| 319 | |||
| 320 | printk(")\n"); | ||
| 213 | } | 321 | } |
| 214 | 322 | ||
| 215 | /* | 323 | /* |
| @@ -221,15 +329,18 @@ void __init omap2_check_revision(void) | |||
| 221 | * At this point we have an idea about the processor revision set | 329 | * At this point we have an idea about the processor revision set |
| 222 | * earlier with omap2_set_globals_tap(). | 330 | * earlier with omap2_set_globals_tap(). |
| 223 | */ | 331 | */ |
| 224 | if (cpu_is_omap24xx()) | 332 | if (cpu_is_omap24xx()) { |
| 225 | omap24xx_check_revision(); | 333 | omap24xx_check_revision(); |
| 226 | else if (cpu_is_omap34xx()) | 334 | } else if (cpu_is_omap34xx()) { |
| 227 | omap34xx_check_revision(); | 335 | omap3_check_revision(); |
| 228 | else if (cpu_is_omap44xx()) { | 336 | omap3_check_features(); |
| 337 | omap3_cpuinfo(); | ||
| 338 | } else if (cpu_is_omap44xx()) { | ||
| 229 | printk(KERN_INFO "FIXME: CPU revision = OMAP4430\n"); | 339 | printk(KERN_INFO "FIXME: CPU revision = OMAP4430\n"); |
| 230 | return; | 340 | return; |
| 231 | } else | 341 | } else { |
| 232 | pr_err("OMAP revision unknown, please fix!\n"); | 342 | pr_err("OMAP revision unknown, please fix!\n"); |
| 343 | } | ||
| 233 | 344 | ||
| 234 | /* | 345 | /* |
| 235 | * OK, now we know the exact revision. Initialize omap_chip bits | 346 | * OK, now we know the exact revision. Initialize omap_chip bits |
| @@ -241,6 +352,8 @@ void __init omap2_check_revision(void) | |||
| 241 | } else if (cpu_is_omap242x()) { | 352 | } else if (cpu_is_omap242x()) { |
| 242 | /* Currently only supports 2420ES2.1.1 and 2420-all */ | 353 | /* Currently only supports 2420ES2.1.1 and 2420-all */ |
| 243 | omap_chip.oc |= CHIP_IS_OMAP2420; | 354 | omap_chip.oc |= CHIP_IS_OMAP2420; |
| 355 | } else if (cpu_is_omap3505() || cpu_is_omap3517()) { | ||
| 356 | omap_chip.oc = CHIP_IS_OMAP3430 | CHIP_IS_OMAP3430ES3_1; | ||
| 244 | } else if (cpu_is_omap343x()) { | 357 | } else if (cpu_is_omap343x()) { |
| 245 | omap_chip.oc = CHIP_IS_OMAP3430; | 358 | omap_chip.oc = CHIP_IS_OMAP3430; |
| 246 | if (omap_rev() == OMAP3430_REV_ES1_0) | 359 | if (omap_rev() == OMAP3430_REV_ES1_0) |
| @@ -252,6 +365,8 @@ void __init omap2_check_revision(void) | |||
| 252 | omap_chip.oc |= CHIP_IS_OMAP3430ES3_0; | 365 | omap_chip.oc |= CHIP_IS_OMAP3430ES3_0; |
| 253 | else if (omap_rev() == OMAP3430_REV_ES3_1) | 366 | else if (omap_rev() == OMAP3430_REV_ES3_1) |
| 254 | omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; | 367 | omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; |
| 368 | else if (omap_rev() == OMAP3630_REV_ES1_0) | ||
| 369 | omap_chip.oc |= CHIP_IS_OMAP3630ES1; | ||
| 255 | } else { | 370 | } else { |
| 256 | pr_err("Uninitialized omap_chip, please fix!\n"); | 371 | pr_err("Uninitialized omap_chip, please fix!\n"); |
| 257 | } | 372 | } |
diff --git a/arch/arm/mach-omap2/include/mach/board-zoom.h b/arch/arm/mach-omap2/include/mach/board-zoom.h new file mode 100644 index 00000000000..c93b29e21b7 --- /dev/null +++ b/arch/arm/mach-omap2/include/mach/board-zoom.h | |||
| @@ -0,0 +1,5 @@ | |||
| 1 | /* | ||
| 2 | * Defines for zoom boards | ||
| 3 | */ | ||
| 4 | extern int __init zoom_debugboard_init(void); | ||
| 5 | extern void __init zoom_peripherals_init(void); | ||
diff --git a/arch/arm/mach-omap2/include/mach/clkdev.h b/arch/arm/mach-omap2/include/mach/clkdev.h new file mode 100644 index 00000000000..53b027441c5 --- /dev/null +++ b/arch/arm/mach-omap2/include/mach/clkdev.h | |||
| @@ -0,0 +1,5 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-omap2/include/mach/clkdev.h | ||
| 3 | */ | ||
| 4 | |||
| 5 | #include <plat/clkdev.h> | ||
diff --git a/arch/arm/plat-omap/include/mach/debug-macro.S b/arch/arm/mach-omap2/include/mach/debug-macro.S index ac24050e341..e9f255df916 100644 --- a/arch/arm/plat-omap/include/mach/debug-macro.S +++ b/arch/arm/mach-omap2/include/mach/debug-macro.S | |||
| @@ -1,4 +1,4 @@ | |||
| 1 | /* arch/arm/plat-omap/include/mach/debug-macro.S | 1 | /* arch/arm/mach-omap2/include/mach/debug-macro.S |
| 2 | * | 2 | * |
| 3 | * Debugging macro include header | 3 | * Debugging macro include header |
| 4 | * | 4 | * |
| @@ -14,20 +14,9 @@ | |||
| 14 | .macro addruart,rx | 14 | .macro addruart,rx |
| 15 | mrc p15, 0, \rx, c1, c0 | 15 | mrc p15, 0, \rx, c1, c0 |
| 16 | tst \rx, #1 @ MMU enabled? | 16 | tst \rx, #1 @ MMU enabled? |
| 17 | #ifdef CONFIG_ARCH_OMAP1 | 17 | #ifdef CONFIG_ARCH_OMAP2 |
| 18 | moveq \rx, #0xff000000 @ physical base address | ||
| 19 | movne \rx, #0xfe000000 @ virtual base | ||
| 20 | orr \rx, \rx, #0x00fb0000 | ||
| 21 | #ifdef CONFIG_OMAP_LL_DEBUG_UART3 | ||
| 22 | orr \rx, \rx, #0x00009000 @ UART 3 | ||
| 23 | #endif | ||
| 24 | #if defined(CONFIG_OMAP_LL_DEBUG_UART2) || defined(CONFIG_OMAP_LL_DEBUG_UART3) | ||
| 25 | orr \rx, \rx, #0x00000800 @ UART 2 & 3 | ||
| 26 | #endif | ||
| 27 | |||
| 28 | #elif CONFIG_ARCH_OMAP2 | ||
| 29 | moveq \rx, #0x48000000 @ physical base address | 18 | moveq \rx, #0x48000000 @ physical base address |
| 30 | movne \rx, #0xd8000000 @ virtual base | 19 | movne \rx, #0xfa000000 @ virtual base |
| 31 | orr \rx, \rx, #0x0006a000 | 20 | orr \rx, \rx, #0x0006a000 |
| 32 | #ifdef CONFIG_OMAP_LL_DEBUG_UART2 | 21 | #ifdef CONFIG_OMAP_LL_DEBUG_UART2 |
| 33 | add \rx, \rx, #0x00002000 @ UART 2 | 22 | add \rx, \rx, #0x00002000 @ UART 2 |
| @@ -38,7 +27,7 @@ | |||
| 38 | 27 | ||
| 39 | #elif defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) | 28 | #elif defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) |
| 40 | moveq \rx, #0x48000000 @ physical base address | 29 | moveq \rx, #0x48000000 @ physical base address |
| 41 | movne \rx, #0xd8000000 @ virtual base | 30 | movne \rx, #0xfa000000 @ virtual base |
| 42 | orr \rx, \rx, #0x0006a000 | 31 | orr \rx, \rx, #0x0006a000 |
| 43 | #ifdef CONFIG_OMAP_LL_DEBUG_UART2 | 32 | #ifdef CONFIG_OMAP_LL_DEBUG_UART2 |
| 44 | add \rx, \rx, #0x00002000 @ UART 2 | 33 | add \rx, \rx, #0x00002000 @ UART 2 |
diff --git a/arch/arm/plat-omap/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S index a5592991634..c7f1720bf28 100644 --- a/arch/arm/plat-omap/include/mach/entry-macro.S +++ b/arch/arm/mach-omap2/include/mach/entry-macro.S | |||
| @@ -15,65 +15,17 @@ | |||
| 15 | #include <mach/irqs.h> | 15 | #include <mach/irqs.h> |
| 16 | #include <asm/hardware/gic.h> | 16 | #include <asm/hardware/gic.h> |
| 17 | 17 | ||
| 18 | #if defined(CONFIG_ARCH_OMAP1) | 18 | #include <plat/omap24xx.h> |
| 19 | 19 | #include <plat/omap34xx.h> | |
| 20 | #if defined(CONFIG_ARCH_OMAP730) && \ | ||
| 21 | (defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)) | ||
| 22 | #error "FIXME: OMAP730 doesn't support multiple-OMAP" | ||
| 23 | #elif defined(CONFIG_ARCH_OMAP730) | ||
| 24 | #define INT_IH2_IRQ INT_730_IH2_IRQ | ||
| 25 | #elif defined(CONFIG_ARCH_OMAP15XX) | ||
| 26 | #define INT_IH2_IRQ INT_1510_IH2_IRQ | ||
| 27 | #elif defined(CONFIG_ARCH_OMAP16XX) | ||
| 28 | #define INT_IH2_IRQ INT_1610_IH2_IRQ | ||
| 29 | #else | ||
| 30 | #warning "IH2 IRQ defaulted" | ||
| 31 | #define INT_IH2_IRQ INT_1510_IH2_IRQ | ||
| 32 | #endif | ||
| 33 | |||
| 34 | .macro disable_fiq | ||
| 35 | .endm | ||
| 36 | |||
| 37 | .macro get_irqnr_preamble, base, tmp | ||
| 38 | .endm | ||
| 39 | |||
| 40 | .macro arch_ret_to_user, tmp1, tmp2 | ||
| 41 | .endm | ||
| 42 | |||
| 43 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
| 44 | ldr \base, =OMAP1_IO_ADDRESS(OMAP_IH1_BASE) | ||
| 45 | ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET] | ||
| 46 | ldr \tmp, [\base, #IRQ_MIR_REG_OFFSET] | ||
| 47 | mov \irqstat, #0xffffffff | ||
| 48 | bic \tmp, \irqstat, \tmp | ||
| 49 | tst \irqnr, \tmp | ||
| 50 | beq 1510f | ||
| 51 | |||
| 52 | ldr \irqnr, [\base, #IRQ_SIR_FIQ_REG_OFFSET] | ||
| 53 | cmp \irqnr, #0 | ||
| 54 | ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET] | ||
| 55 | cmpeq \irqnr, #INT_IH2_IRQ | ||
| 56 | ldreq \base, =OMAP1_IO_ADDRESS(OMAP_IH2_BASE) | ||
| 57 | ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET] | ||
| 58 | addeqs \irqnr, \irqnr, #32 | ||
| 59 | 1510: | ||
| 60 | .endm | ||
| 61 | |||
| 62 | #endif | ||
| 63 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ | ||
| 64 | defined(CONFIG_ARCH_OMAP4) | ||
| 65 | |||
| 66 | #include <mach/omap24xx.h> | ||
| 67 | #include <mach/omap34xx.h> | ||
| 68 | 20 | ||
| 69 | /* REVISIT: This should be set dynamically if CONFIG_MULTI_OMAP2 is selected */ | 21 | /* REVISIT: This should be set dynamically if CONFIG_MULTI_OMAP2 is selected */ |
| 70 | #if defined(CONFIG_ARCH_OMAP2420) || defined(CONFIG_ARCH_OMAP2430) | 22 | #if defined(CONFIG_ARCH_OMAP2420) || defined(CONFIG_ARCH_OMAP2430) |
| 71 | #define OMAP2_VA_IC_BASE OMAP2_IO_ADDRESS(OMAP24XX_IC_BASE) | 23 | #define OMAP2_VA_IC_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE) |
| 72 | #elif defined(CONFIG_ARCH_OMAP34XX) | 24 | #elif defined(CONFIG_ARCH_OMAP34XX) |
| 73 | #define OMAP2_VA_IC_BASE OMAP2_IO_ADDRESS(OMAP34XX_IC_BASE) | 25 | #define OMAP2_VA_IC_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE) |
| 74 | #endif | 26 | #endif |
| 75 | #if defined(CONFIG_ARCH_OMAP4) | 27 | #if defined(CONFIG_ARCH_OMAP4) |
| 76 | #include <mach/omap44xx.h> | 28 | #include <plat/omap44xx.h> |
| 77 | #endif | 29 | #endif |
| 78 | #define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt offset */ | 30 | #define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt offset */ |
| 79 | #define ACTIVEIRQ_MASK 0x7f /* Active interrupt bits */ | 31 | #define ACTIVEIRQ_MASK 0x7f /* Active interrupt bits */ |
| @@ -104,6 +56,8 @@ | |||
| 104 | 56 | ||
| 105 | .endm | 57 | .endm |
| 106 | #else | 58 | #else |
| 59 | #define OMAP44XX_VA_GIC_CPU_BASE OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE) | ||
| 60 | |||
| 107 | /* | 61 | /* |
| 108 | * The interrupt numbering scheme is defined in the | 62 | * The interrupt numbering scheme is defined in the |
| 109 | * interrupt controller spec. To wit: | 63 | * interrupt controller spec. To wit: |
| @@ -168,5 +122,3 @@ | |||
| 168 | 122 | ||
| 169 | .macro irq_prio_table | 123 | .macro irq_prio_table |
| 170 | .endm | 124 | .endm |
| 171 | |||
| 172 | #endif | ||
diff --git a/arch/arm/mach-omap2/include/mach/gpio.h b/arch/arm/mach-omap2/include/mach/gpio.h new file mode 100644 index 00000000000..be4d290d57e --- /dev/null +++ b/arch/arm/mach-omap2/include/mach/gpio.h | |||
| @@ -0,0 +1,5 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-omap2/include/mach/gpio.h | ||
| 3 | */ | ||
| 4 | |||
| 5 | #include <plat/gpio.h> | ||
diff --git a/arch/arm/mach-omap2/include/mach/hardware.h b/arch/arm/mach-omap2/include/mach/hardware.h new file mode 100644 index 00000000000..78edf9d33f7 --- /dev/null +++ b/arch/arm/mach-omap2/include/mach/hardware.h | |||
| @@ -0,0 +1,5 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-omap2/include/mach/hardware.h | ||
| 3 | */ | ||
| 4 | |||
| 5 | #include <plat/hardware.h> | ||
diff --git a/arch/arm/mach-omap2/include/mach/io.h b/arch/arm/mach-omap2/include/mach/io.h new file mode 100644 index 00000000000..fd78f31aa1a --- /dev/null +++ b/arch/arm/mach-omap2/include/mach/io.h | |||
| @@ -0,0 +1,5 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-omap2/include/mach/io.h | ||
| 3 | */ | ||
| 4 | |||
| 5 | #include <plat/io.h> | ||
diff --git a/arch/arm/mach-omap2/include/mach/irqs.h b/arch/arm/mach-omap2/include/mach/irqs.h new file mode 100644 index 00000000000..44dab772569 --- /dev/null +++ b/arch/arm/mach-omap2/include/mach/irqs.h | |||
| @@ -0,0 +1,5 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-omap2/include/mach/irqs.h | ||
| 3 | */ | ||
| 4 | |||
| 5 | #include <plat/irqs.h> | ||
diff --git a/arch/arm/mach-omap2/include/mach/memory.h b/arch/arm/mach-omap2/include/mach/memory.h new file mode 100644 index 00000000000..ca6d32a917d --- /dev/null +++ b/arch/arm/mach-omap2/include/mach/memory.h | |||
| @@ -0,0 +1,5 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-omap2/include/mach/memory.h | ||
| 3 | */ | ||
| 4 | |||
| 5 | #include <plat/memory.h> | ||
diff --git a/arch/arm/mach-omap2/include/mach/smp.h b/arch/arm/mach-omap2/include/mach/smp.h new file mode 100644 index 00000000000..323675f21b6 --- /dev/null +++ b/arch/arm/mach-omap2/include/mach/smp.h | |||
| @@ -0,0 +1,5 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-omap2/include/mach/smp.h | ||
| 3 | */ | ||
| 4 | |||
| 5 | #include <plat/smp.h> | ||
diff --git a/arch/arm/mach-omap2/include/mach/system.h b/arch/arm/mach-omap2/include/mach/system.h new file mode 100644 index 00000000000..d488721ab90 --- /dev/null +++ b/arch/arm/mach-omap2/include/mach/system.h | |||
| @@ -0,0 +1,5 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-omap2/include/mach/system.h | ||
| 3 | */ | ||
| 4 | |||
| 5 | #include <plat/system.h> | ||
diff --git a/arch/arm/mach-omap2/include/mach/timex.h b/arch/arm/mach-omap2/include/mach/timex.h new file mode 100644 index 00000000000..de9f8fc40e7 --- /dev/null +++ b/arch/arm/mach-omap2/include/mach/timex.h | |||
| @@ -0,0 +1,5 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-omap2/include/mach/timex.h | ||
| 3 | */ | ||
| 4 | |||
| 5 | #include <plat/timex.h> | ||
diff --git a/arch/arm/mach-omap2/include/mach/uncompress.h b/arch/arm/mach-omap2/include/mach/uncompress.h new file mode 100644 index 00000000000..78e0557bfd4 --- /dev/null +++ b/arch/arm/mach-omap2/include/mach/uncompress.h | |||
| @@ -0,0 +1,5 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-omap2/include/mach/uncompress.h | ||
| 3 | */ | ||
| 4 | |||
| 5 | #include <plat/uncompress.h> | ||
diff --git a/arch/arm/plat-omap/include/mach/vmalloc.h b/arch/arm/mach-omap2/include/mach/vmalloc.h index b97dfafeebd..9ce9b6e8ad2 100644 --- a/arch/arm/plat-omap/include/mach/vmalloc.h +++ b/arch/arm/mach-omap2/include/mach/vmalloc.h | |||
| @@ -17,5 +17,4 @@ | |||
| 17 | * along with this program; if not, write to the Free Software | 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 19 | */ | 19 | */ |
| 20 | #define VMALLOC_END (PAGE_OFFSET + 0x18000000) | 20 | #define VMALLOC_END (PAGE_OFFSET + 0x38000000) |
| 21 | |||
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 56be87d13ed..59d28b2fd8c 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c | |||
| @@ -27,24 +27,24 @@ | |||
| 27 | 27 | ||
| 28 | #include <asm/mach/map.h> | 28 | #include <asm/mach/map.h> |
| 29 | 29 | ||
| 30 | #include <mach/mux.h> | 30 | #include <plat/mux.h> |
| 31 | #include <mach/omapfb.h> | 31 | #include <plat/omapfb.h> |
| 32 | #include <mach/sram.h> | 32 | #include <plat/sram.h> |
| 33 | #include <mach/sdrc.h> | 33 | #include <plat/sdrc.h> |
| 34 | #include <mach/gpmc.h> | 34 | #include <plat/gpmc.h> |
| 35 | #include <mach/serial.h> | 35 | #include <plat/serial.h> |
| 36 | 36 | ||
| 37 | #ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once clkdev is ready */ | 37 | #ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once clkdev is ready */ |
| 38 | #include "clock.h" | 38 | #include "clock.h" |
| 39 | 39 | ||
| 40 | #include <mach/omap-pm.h> | 40 | #include <plat/omap-pm.h> |
| 41 | #include <mach/powerdomain.h> | 41 | #include <plat/powerdomain.h> |
| 42 | #include "powerdomains.h" | 42 | #include "powerdomains.h" |
| 43 | 43 | ||
| 44 | #include <mach/clockdomain.h> | 44 | #include <plat/clockdomain.h> |
| 45 | #include "clockdomains.h" | 45 | #include "clockdomains.h" |
| 46 | #endif | 46 | #endif |
| 47 | #include <mach/omap_hwmod.h> | 47 | #include <plat/omap_hwmod.h> |
| 48 | #include "omap_hwmod_2420.h" | 48 | #include "omap_hwmod_2420.h" |
| 49 | #include "omap_hwmod_2430.h" | 49 | #include "omap_hwmod_2430.h" |
| 50 | #include "omap_hwmod_34xx.h" | 50 | #include "omap_hwmod_34xx.h" |
| @@ -203,6 +203,24 @@ static struct map_desc omap44xx_io_desc[] __initdata = { | |||
| 203 | .type = MT_DEVICE, | 203 | .type = MT_DEVICE, |
| 204 | }, | 204 | }, |
| 205 | { | 205 | { |
| 206 | .virtual = OMAP44XX_EMIF1_VIRT, | ||
| 207 | .pfn = __phys_to_pfn(OMAP44XX_EMIF1_PHYS), | ||
| 208 | .length = OMAP44XX_EMIF1_SIZE, | ||
| 209 | .type = MT_DEVICE, | ||
| 210 | }, | ||
| 211 | { | ||
| 212 | .virtual = OMAP44XX_EMIF2_VIRT, | ||
| 213 | .pfn = __phys_to_pfn(OMAP44XX_EMIF2_PHYS), | ||
| 214 | .length = OMAP44XX_EMIF2_SIZE, | ||
| 215 | .type = MT_DEVICE, | ||
| 216 | }, | ||
| 217 | { | ||
| 218 | .virtual = OMAP44XX_DMM_VIRT, | ||
| 219 | .pfn = __phys_to_pfn(OMAP44XX_DMM_PHYS), | ||
| 220 | .length = OMAP44XX_DMM_SIZE, | ||
| 221 | .type = MT_DEVICE, | ||
| 222 | }, | ||
| 223 | { | ||
| 206 | .virtual = L4_PER_44XX_VIRT, | 224 | .virtual = L4_PER_44XX_VIRT, |
| 207 | .pfn = __phys_to_pfn(L4_PER_44XX_PHYS), | 225 | .pfn = __phys_to_pfn(L4_PER_44XX_PHYS), |
| 208 | .length = L4_PER_44XX_SIZE, | 226 | .length = L4_PER_44XX_SIZE, |
diff --git a/arch/arm/mach-omap2/iommu2.c b/arch/arm/mach-omap2/iommu2.c index 4a0e1cd5c1f..6f4b7cc8f4d 100644 --- a/arch/arm/mach-omap2/iommu2.c +++ b/arch/arm/mach-omap2/iommu2.c | |||
| @@ -17,7 +17,7 @@ | |||
| 17 | #include <linux/module.h> | 17 | #include <linux/module.h> |
| 18 | #include <linux/stringify.h> | 18 | #include <linux/stringify.h> |
| 19 | 19 | ||
| 20 | #include <mach/iommu.h> | 20 | #include <plat/iommu.h> |
| 21 | 21 | ||
| 22 | /* | 22 | /* |
| 23 | * omap2 architecture specific register bit definitions | 23 | * omap2 architecture specific register bit definitions |
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index b82863887f1..e9bc782fa41 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c | |||
| @@ -25,6 +25,10 @@ | |||
| 25 | #define INTC_SYSSTATUS 0x0014 | 25 | #define INTC_SYSSTATUS 0x0014 |
| 26 | #define INTC_SIR 0x0040 | 26 | #define INTC_SIR 0x0040 |
| 27 | #define INTC_CONTROL 0x0048 | 27 | #define INTC_CONTROL 0x0048 |
| 28 | #define INTC_PROTECTION 0x004C | ||
| 29 | #define INTC_IDLE 0x0050 | ||
| 30 | #define INTC_THRESHOLD 0x0068 | ||
| 31 | #define INTC_MIR0 0x0084 | ||
| 28 | #define INTC_MIR_CLEAR0 0x0088 | 32 | #define INTC_MIR_CLEAR0 0x0088 |
| 29 | #define INTC_MIR_SET0 0x008c | 33 | #define INTC_MIR_SET0 0x008c |
| 30 | #define INTC_PENDING_IRQ0 0x0098 | 34 | #define INTC_PENDING_IRQ0 0x0098 |
| @@ -48,6 +52,18 @@ static struct omap_irq_bank { | |||
| 48 | }, | 52 | }, |
| 49 | }; | 53 | }; |
| 50 | 54 | ||
| 55 | /* Structure to save interrupt controller context */ | ||
| 56 | struct omap3_intc_regs { | ||
| 57 | u32 sysconfig; | ||
| 58 | u32 protection; | ||
| 59 | u32 idle; | ||
| 60 | u32 threshold; | ||
| 61 | u32 ilr[INTCPS_NR_IRQS]; | ||
| 62 | u32 mir[INTCPS_NR_MIR_REGS]; | ||
| 63 | }; | ||
| 64 | |||
| 65 | static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)]; | ||
| 66 | |||
| 51 | /* INTC bank register get/set */ | 67 | /* INTC bank register get/set */ |
| 52 | 68 | ||
| 53 | static void intc_bank_write_reg(u32 val, struct omap_irq_bank *bank, u16 reg) | 69 | static void intc_bank_write_reg(u32 val, struct omap_irq_bank *bank, u16 reg) |
| @@ -178,12 +194,20 @@ void __init omap_init_irq(void) | |||
| 178 | int i; | 194 | int i; |
| 179 | 195 | ||
| 180 | for (i = 0; i < ARRAY_SIZE(irq_banks); i++) { | 196 | for (i = 0; i < ARRAY_SIZE(irq_banks); i++) { |
| 197 | unsigned long base; | ||
| 181 | struct omap_irq_bank *bank = irq_banks + i; | 198 | struct omap_irq_bank *bank = irq_banks + i; |
| 182 | 199 | ||
| 183 | if (cpu_is_omap24xx()) | 200 | if (cpu_is_omap24xx()) |
| 184 | bank->base_reg = OMAP2_IO_ADDRESS(OMAP24XX_IC_BASE); | 201 | base = OMAP24XX_IC_BASE; |
| 185 | else if (cpu_is_omap34xx()) | 202 | else if (cpu_is_omap34xx()) |
| 186 | bank->base_reg = OMAP2_IO_ADDRESS(OMAP34XX_IC_BASE); | 203 | base = OMAP34XX_IC_BASE; |
| 204 | |||
| 205 | /* Static mapping, never released */ | ||
| 206 | bank->base_reg = ioremap(base, SZ_4K); | ||
| 207 | if (!bank->base_reg) { | ||
| 208 | printk(KERN_ERR "Could not ioremap irq bank%i\n", i); | ||
| 209 | continue; | ||
| 210 | } | ||
| 187 | 211 | ||
| 188 | omap_irq_bank_init_one(bank); | 212 | omap_irq_bank_init_one(bank); |
| 189 | 213 | ||
| @@ -201,3 +225,53 @@ void __init omap_init_irq(void) | |||
| 201 | } | 225 | } |
| 202 | } | 226 | } |
| 203 | 227 | ||
| 228 | #ifdef CONFIG_ARCH_OMAP3 | ||
| 229 | void omap_intc_save_context(void) | ||
| 230 | { | ||
| 231 | int ind = 0, i = 0; | ||
| 232 | for (ind = 0; ind < ARRAY_SIZE(irq_banks); ind++) { | ||
| 233 | struct omap_irq_bank *bank = irq_banks + ind; | ||
| 234 | intc_context[ind].sysconfig = | ||
| 235 | intc_bank_read_reg(bank, INTC_SYSCONFIG); | ||
| 236 | intc_context[ind].protection = | ||
| 237 | intc_bank_read_reg(bank, INTC_PROTECTION); | ||
| 238 | intc_context[ind].idle = | ||
| 239 | intc_bank_read_reg(bank, INTC_IDLE); | ||
| 240 | intc_context[ind].threshold = | ||
| 241 | intc_bank_read_reg(bank, INTC_THRESHOLD); | ||
| 242 | for (i = 0; i < INTCPS_NR_IRQS; i++) | ||
| 243 | intc_context[ind].ilr[i] = | ||
| 244 | intc_bank_read_reg(bank, (0x100 + 0x4*i)); | ||
| 245 | for (i = 0; i < INTCPS_NR_MIR_REGS; i++) | ||
| 246 | intc_context[ind].mir[i] = | ||
| 247 | intc_bank_read_reg(&irq_banks[0], INTC_MIR0 + | ||
| 248 | (0x20 * i)); | ||
| 249 | } | ||
| 250 | } | ||
| 251 | |||
| 252 | void omap_intc_restore_context(void) | ||
| 253 | { | ||
| 254 | int ind = 0, i = 0; | ||
| 255 | |||
| 256 | for (ind = 0; ind < ARRAY_SIZE(irq_banks); ind++) { | ||
| 257 | struct omap_irq_bank *bank = irq_banks + ind; | ||
| 258 | intc_bank_write_reg(intc_context[ind].sysconfig, | ||
| 259 | bank, INTC_SYSCONFIG); | ||
| 260 | intc_bank_write_reg(intc_context[ind].sysconfig, | ||
| 261 | bank, INTC_SYSCONFIG); | ||
| 262 | intc_bank_write_reg(intc_context[ind].protection, | ||
| 263 | bank, INTC_PROTECTION); | ||
| 264 | intc_bank_write_reg(intc_context[ind].idle, | ||
| 265 | bank, INTC_IDLE); | ||
| 266 | intc_bank_write_reg(intc_context[ind].threshold, | ||
| 267 | bank, INTC_THRESHOLD); | ||
| 268 | for (i = 0; i < INTCPS_NR_IRQS; i++) | ||
| 269 | intc_bank_write_reg(intc_context[ind].ilr[i], | ||
| 270 | bank, (0x100 + 0x4*i)); | ||
| 271 | for (i = 0; i < INTCPS_NR_MIR_REGS; i++) | ||
| 272 | intc_bank_write_reg(intc_context[ind].mir[i], | ||
| 273 | &irq_banks[0], INTC_MIR0 + (0x20 * i)); | ||
| 274 | } | ||
| 275 | /* MIRs are saved and restore with other PRCM registers */ | ||
| 276 | } | ||
| 277 | #endif /* CONFIG_ARCH_OMAP3 */ | ||
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c index ef57b38a56a..281ab634244 100644 --- a/arch/arm/mach-omap2/mailbox.c +++ b/arch/arm/mach-omap2/mailbox.c | |||
| @@ -15,9 +15,11 @@ | |||
| 15 | #include <linux/err.h> | 15 | #include <linux/err.h> |
| 16 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
| 17 | #include <linux/io.h> | 17 | #include <linux/io.h> |
| 18 | #include <mach/mailbox.h> | 18 | #include <plat/mailbox.h> |
| 19 | #include <mach/irqs.h> | 19 | #include <mach/irqs.h> |
| 20 | 20 | ||
| 21 | #define DRV_NAME "omap2-mailbox" | ||
| 22 | |||
| 21 | #define MAILBOX_REVISION 0x000 | 23 | #define MAILBOX_REVISION 0x000 |
| 22 | #define MAILBOX_SYSCONFIG 0x010 | 24 | #define MAILBOX_SYSCONFIG 0x010 |
| 23 | #define MAILBOX_SYSSTATUS 0x014 | 25 | #define MAILBOX_SYSSTATUS 0x014 |
| @@ -27,8 +29,12 @@ | |||
| 27 | #define MAILBOX_IRQSTATUS(u) (0x100 + 8 * (u)) | 29 | #define MAILBOX_IRQSTATUS(u) (0x100 + 8 * (u)) |
| 28 | #define MAILBOX_IRQENABLE(u) (0x104 + 8 * (u)) | 30 | #define MAILBOX_IRQENABLE(u) (0x104 + 8 * (u)) |
| 29 | 31 | ||
| 30 | #define MAILBOX_IRQ_NEWMSG(u) (1 << (2 * (u))) | 32 | #define OMAP4_MAILBOX_IRQSTATUS(u) (0x104 + 10 * (u)) |
| 31 | #define MAILBOX_IRQ_NOTFULL(u) (1 << (2 * (u) + 1)) | 33 | #define OMAP4_MAILBOX_IRQENABLE(u) (0x108 + 10 * (u)) |
| 34 | #define OMAP4_MAILBOX_IRQENABLE_CLR(u) (0x10c + 10 * (u)) | ||
| 35 | |||
| 36 | #define MAILBOX_IRQ_NEWMSG(m) (1 << (2 * (m))) | ||
| 37 | #define MAILBOX_IRQ_NOTFULL(m) (1 << (2 * (m) + 1)) | ||
| 32 | 38 | ||
| 33 | /* SYSCONFIG: register bit definition */ | 39 | /* SYSCONFIG: register bit definition */ |
| 34 | #define AUTOIDLE (1 << 0) | 40 | #define AUTOIDLE (1 << 0) |
| @@ -39,7 +45,11 @@ | |||
| 39 | #define RESETDONE (1 << 0) | 45 | #define RESETDONE (1 << 0) |
| 40 | 46 | ||
| 41 | #define MBOX_REG_SIZE 0x120 | 47 | #define MBOX_REG_SIZE 0x120 |
| 48 | |||
| 49 | #define OMAP4_MBOX_REG_SIZE 0x130 | ||
| 50 | |||
| 42 | #define MBOX_NR_REGS (MBOX_REG_SIZE / sizeof(u32)) | 51 | #define MBOX_NR_REGS (MBOX_REG_SIZE / sizeof(u32)) |
| 52 | #define OMAP4_MBOX_NR_REGS (OMAP4_MBOX_REG_SIZE / sizeof(u32)) | ||
| 43 | 53 | ||
| 44 | static void __iomem *mbox_base; | 54 | static void __iomem *mbox_base; |
| 45 | 55 | ||
| @@ -56,7 +66,8 @@ struct omap_mbox2_priv { | |||
| 56 | unsigned long irqstatus; | 66 | unsigned long irqstatus; |
| 57 | u32 newmsg_bit; | 67 | u32 newmsg_bit; |
| 58 | u32 notfull_bit; | 68 | u32 notfull_bit; |
| 59 | u32 ctx[MBOX_NR_REGS]; | 69 | u32 ctx[OMAP4_MBOX_NR_REGS]; |
| 70 | unsigned long irqdisable; | ||
| 60 | }; | 71 | }; |
| 61 | 72 | ||
| 62 | static struct clk *mbox_ick_handle; | 73 | static struct clk *mbox_ick_handle; |
| @@ -82,8 +93,9 @@ static int omap2_mbox_startup(struct omap_mbox *mbox) | |||
| 82 | 93 | ||
| 83 | mbox_ick_handle = clk_get(NULL, "mailboxes_ick"); | 94 | mbox_ick_handle = clk_get(NULL, "mailboxes_ick"); |
| 84 | if (IS_ERR(mbox_ick_handle)) { | 95 | if (IS_ERR(mbox_ick_handle)) { |
| 85 | pr_err("Can't get mailboxes_ick\n"); | 96 | printk(KERN_ERR "Could not get mailboxes_ick: %d\n", |
| 86 | return -ENODEV; | 97 | PTR_ERR(mbox_ick_handle)); |
| 98 | return PTR_ERR(mbox_ick_handle); | ||
| 87 | } | 99 | } |
| 88 | clk_enable(mbox_ick_handle); | 100 | clk_enable(mbox_ick_handle); |
| 89 | 101 | ||
| @@ -115,6 +127,7 @@ static void omap2_mbox_shutdown(struct omap_mbox *mbox) | |||
| 115 | { | 127 | { |
| 116 | clk_disable(mbox_ick_handle); | 128 | clk_disable(mbox_ick_handle); |
| 117 | clk_put(mbox_ick_handle); | 129 | clk_put(mbox_ick_handle); |
| 130 | mbox_ick_handle = NULL; | ||
| 118 | } | 131 | } |
| 119 | 132 | ||
| 120 | /* Mailbox FIFO handle functions */ | 133 | /* Mailbox FIFO handle functions */ |
| @@ -143,7 +156,7 @@ static int omap2_mbox_fifo_full(struct omap_mbox *mbox) | |||
| 143 | { | 156 | { |
| 144 | struct omap_mbox2_fifo *fifo = | 157 | struct omap_mbox2_fifo *fifo = |
| 145 | &((struct omap_mbox2_priv *)mbox->priv)->tx_fifo; | 158 | &((struct omap_mbox2_priv *)mbox->priv)->tx_fifo; |
| 146 | return (mbox_read_reg(fifo->fifo_stat)); | 159 | return mbox_read_reg(fifo->fifo_stat); |
| 147 | } | 160 | } |
| 148 | 161 | ||
| 149 | /* Mailbox IRQ handle functions */ | 162 | /* Mailbox IRQ handle functions */ |
| @@ -163,10 +176,9 @@ static void omap2_mbox_disable_irq(struct omap_mbox *mbox, | |||
| 163 | { | 176 | { |
| 164 | struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv; | 177 | struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv; |
| 165 | u32 l, bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit; | 178 | u32 l, bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit; |
| 166 | 179 | l = mbox_read_reg(p->irqdisable); | |
| 167 | l = mbox_read_reg(p->irqenable); | ||
| 168 | l &= ~bit; | 180 | l &= ~bit; |
| 169 | mbox_write_reg(l, p->irqenable); | 181 | mbox_write_reg(l, p->irqdisable); |
| 170 | } | 182 | } |
| 171 | 183 | ||
| 172 | static void omap2_mbox_ack_irq(struct omap_mbox *mbox, | 184 | static void omap2_mbox_ack_irq(struct omap_mbox *mbox, |
| @@ -189,15 +201,19 @@ static int omap2_mbox_is_irq(struct omap_mbox *mbox, | |||
| 189 | u32 enable = mbox_read_reg(p->irqenable); | 201 | u32 enable = mbox_read_reg(p->irqenable); |
| 190 | u32 status = mbox_read_reg(p->irqstatus); | 202 | u32 status = mbox_read_reg(p->irqstatus); |
| 191 | 203 | ||
| 192 | return (enable & status & bit); | 204 | return (int)(enable & status & bit); |
| 193 | } | 205 | } |
| 194 | 206 | ||
| 195 | static void omap2_mbox_save_ctx(struct omap_mbox *mbox) | 207 | static void omap2_mbox_save_ctx(struct omap_mbox *mbox) |
| 196 | { | 208 | { |
| 197 | int i; | 209 | int i; |
| 198 | struct omap_mbox2_priv *p = mbox->priv; | 210 | struct omap_mbox2_priv *p = mbox->priv; |
| 199 | 211 | int nr_regs; | |
| 200 | for (i = 0; i < MBOX_NR_REGS; i++) { | 212 | if (cpu_is_omap44xx()) |
| 213 | nr_regs = OMAP4_MBOX_NR_REGS; | ||
| 214 | else | ||
| 215 | nr_regs = MBOX_NR_REGS; | ||
| 216 | for (i = 0; i < nr_regs; i++) { | ||
| 201 | p->ctx[i] = mbox_read_reg(i * sizeof(u32)); | 217 | p->ctx[i] = mbox_read_reg(i * sizeof(u32)); |
| 202 | 218 | ||
| 203 | dev_dbg(mbox->dev, "%s: [%02x] %08x\n", __func__, | 219 | dev_dbg(mbox->dev, "%s: [%02x] %08x\n", __func__, |
| @@ -209,8 +225,12 @@ static void omap2_mbox_restore_ctx(struct omap_mbox *mbox) | |||
| 209 | { | 225 | { |
| 210 | int i; | 226 | int i; |
| 211 | struct omap_mbox2_priv *p = mbox->priv; | 227 | struct omap_mbox2_priv *p = mbox->priv; |
| 212 | 228 | int nr_regs; | |
| 213 | for (i = 0; i < MBOX_NR_REGS; i++) { | 229 | if (cpu_is_omap44xx()) |
| 230 | nr_regs = OMAP4_MBOX_NR_REGS; | ||
| 231 | else | ||
| 232 | nr_regs = MBOX_NR_REGS; | ||
| 233 | for (i = 0; i < nr_regs; i++) { | ||
| 214 | mbox_write_reg(p->ctx[i], i * sizeof(u32)); | 234 | mbox_write_reg(p->ctx[i], i * sizeof(u32)); |
| 215 | 235 | ||
| 216 | dev_dbg(mbox->dev, "%s: [%02x] %08x\n", __func__, | 236 | dev_dbg(mbox->dev, "%s: [%02x] %08x\n", __func__, |
| @@ -242,7 +262,6 @@ static struct omap_mbox_ops omap2_mbox_ops = { | |||
| 242 | */ | 262 | */ |
| 243 | 263 | ||
| 244 | /* FIXME: the following structs should be filled automatically by the user id */ | 264 | /* FIXME: the following structs should be filled automatically by the user id */ |
| 245 | |||
| 246 | /* DSP */ | 265 | /* DSP */ |
| 247 | static struct omap_mbox2_priv omap2_mbox_dsp_priv = { | 266 | static struct omap_mbox2_priv omap2_mbox_dsp_priv = { |
| 248 | .tx_fifo = { | 267 | .tx_fifo = { |
| @@ -257,8 +276,36 @@ static struct omap_mbox2_priv omap2_mbox_dsp_priv = { | |||
| 257 | .irqstatus = MAILBOX_IRQSTATUS(0), | 276 | .irqstatus = MAILBOX_IRQSTATUS(0), |
| 258 | .notfull_bit = MAILBOX_IRQ_NOTFULL(0), | 277 | .notfull_bit = MAILBOX_IRQ_NOTFULL(0), |
| 259 | .newmsg_bit = MAILBOX_IRQ_NEWMSG(1), | 278 | .newmsg_bit = MAILBOX_IRQ_NEWMSG(1), |
| 279 | .irqdisable = MAILBOX_IRQENABLE(0), | ||
| 280 | }; | ||
| 281 | |||
| 282 | |||
| 283 | |||
| 284 | /* OMAP4 specific data structure. Use the cpu_is_omap4xxx() | ||
| 285 | to use this*/ | ||
| 286 | static struct omap_mbox2_priv omap2_mbox_1_priv = { | ||
| 287 | .tx_fifo = { | ||
| 288 | .msg = MAILBOX_MESSAGE(0), | ||
| 289 | .fifo_stat = MAILBOX_FIFOSTATUS(0), | ||
| 290 | }, | ||
| 291 | .rx_fifo = { | ||
| 292 | .msg = MAILBOX_MESSAGE(1), | ||
| 293 | .msg_stat = MAILBOX_MSGSTATUS(1), | ||
| 294 | }, | ||
| 295 | .irqenable = OMAP4_MAILBOX_IRQENABLE(0), | ||
| 296 | .irqstatus = OMAP4_MAILBOX_IRQSTATUS(0), | ||
| 297 | .notfull_bit = MAILBOX_IRQ_NOTFULL(0), | ||
| 298 | .newmsg_bit = MAILBOX_IRQ_NEWMSG(1), | ||
| 299 | .irqdisable = OMAP4_MAILBOX_IRQENABLE_CLR(0), | ||
| 260 | }; | 300 | }; |
| 261 | 301 | ||
| 302 | struct omap_mbox mbox_1_info = { | ||
| 303 | .name = "mailbox-1", | ||
| 304 | .ops = &omap2_mbox_ops, | ||
| 305 | .priv = &omap2_mbox_1_priv, | ||
| 306 | }; | ||
| 307 | EXPORT_SYMBOL(mbox_1_info); | ||
| 308 | |||
| 262 | struct omap_mbox mbox_dsp_info = { | 309 | struct omap_mbox mbox_dsp_info = { |
| 263 | .name = "dsp", | 310 | .name = "dsp", |
| 264 | .ops = &omap2_mbox_ops, | 311 | .ops = &omap2_mbox_ops, |
| @@ -266,6 +313,30 @@ struct omap_mbox mbox_dsp_info = { | |||
| 266 | }; | 313 | }; |
| 267 | EXPORT_SYMBOL(mbox_dsp_info); | 314 | EXPORT_SYMBOL(mbox_dsp_info); |
| 268 | 315 | ||
| 316 | static struct omap_mbox2_priv omap2_mbox_2_priv = { | ||
| 317 | .tx_fifo = { | ||
| 318 | .msg = MAILBOX_MESSAGE(3), | ||
| 319 | .fifo_stat = MAILBOX_FIFOSTATUS(3), | ||
| 320 | }, | ||
| 321 | .rx_fifo = { | ||
| 322 | .msg = MAILBOX_MESSAGE(2), | ||
| 323 | .msg_stat = MAILBOX_MSGSTATUS(2), | ||
| 324 | }, | ||
| 325 | .irqenable = OMAP4_MAILBOX_IRQENABLE(0), | ||
| 326 | .irqstatus = OMAP4_MAILBOX_IRQSTATUS(0), | ||
| 327 | .notfull_bit = MAILBOX_IRQ_NOTFULL(3), | ||
| 328 | .newmsg_bit = MAILBOX_IRQ_NEWMSG(2), | ||
| 329 | .irqdisable = OMAP4_MAILBOX_IRQENABLE_CLR(0), | ||
| 330 | }; | ||
| 331 | |||
| 332 | struct omap_mbox mbox_2_info = { | ||
| 333 | .name = "mailbox-2", | ||
| 334 | .ops = &omap2_mbox_ops, | ||
| 335 | .priv = &omap2_mbox_2_priv, | ||
| 336 | }; | ||
| 337 | EXPORT_SYMBOL(mbox_2_info); | ||
| 338 | |||
| 339 | |||
| 269 | #if defined(CONFIG_ARCH_OMAP2420) /* IVA */ | 340 | #if defined(CONFIG_ARCH_OMAP2420) /* IVA */ |
| 270 | static struct omap_mbox2_priv omap2_mbox_iva_priv = { | 341 | static struct omap_mbox2_priv omap2_mbox_iva_priv = { |
| 271 | .tx_fifo = { | 342 | .tx_fifo = { |
| @@ -280,6 +351,7 @@ static struct omap_mbox2_priv omap2_mbox_iva_priv = { | |||
| 280 | .irqstatus = MAILBOX_IRQSTATUS(3), | 351 | .irqstatus = MAILBOX_IRQSTATUS(3), |
| 281 | .notfull_bit = MAILBOX_IRQ_NOTFULL(2), | 352 | .notfull_bit = MAILBOX_IRQ_NOTFULL(2), |
| 282 | .newmsg_bit = MAILBOX_IRQ_NEWMSG(3), | 353 | .newmsg_bit = MAILBOX_IRQ_NEWMSG(3), |
| 354 | .irqdisable = MAILBOX_IRQENABLE(3), | ||
| 283 | }; | 355 | }; |
| 284 | 356 | ||
| 285 | static struct omap_mbox mbox_iva_info = { | 357 | static struct omap_mbox mbox_iva_info = { |
| @@ -305,17 +377,31 @@ static int __devinit omap2_mbox_probe(struct platform_device *pdev) | |||
| 305 | return -ENOMEM; | 377 | return -ENOMEM; |
| 306 | 378 | ||
| 307 | /* DSP or IVA2 IRQ */ | 379 | /* DSP or IVA2 IRQ */ |
| 308 | ret = platform_get_irq(pdev, 0); | 380 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
| 309 | if (ret < 0) { | 381 | |
| 382 | if (unlikely(!res)) { | ||
| 310 | dev_err(&pdev->dev, "invalid irq resource\n"); | 383 | dev_err(&pdev->dev, "invalid irq resource\n"); |
| 384 | ret = -ENODEV; | ||
| 311 | goto err_dsp; | 385 | goto err_dsp; |
| 312 | } | 386 | } |
| 313 | mbox_dsp_info.irq = ret; | 387 | if (cpu_is_omap44xx()) { |
| 314 | 388 | mbox_1_info.irq = res->start; | |
| 315 | ret = omap_mbox_register(&pdev->dev, &mbox_dsp_info); | 389 | ret = omap_mbox_register(&pdev->dev, &mbox_1_info); |
| 390 | } else { | ||
| 391 | mbox_dsp_info.irq = res->start; | ||
| 392 | ret = omap_mbox_register(&pdev->dev, &mbox_dsp_info); | ||
| 393 | } | ||
| 316 | if (ret) | 394 | if (ret) |
| 317 | goto err_dsp; | 395 | goto err_dsp; |
| 318 | 396 | ||
| 397 | if (cpu_is_omap44xx()) { | ||
| 398 | mbox_2_info.irq = res->start; | ||
| 399 | ret = omap_mbox_register(&pdev->dev, &mbox_2_info); | ||
| 400 | if (ret) { | ||
| 401 | omap_mbox_unregister(&mbox_1_info); | ||
| 402 | goto err_dsp; | ||
| 403 | } | ||
| 404 | } | ||
| 319 | #if defined(CONFIG_ARCH_OMAP2420) /* IVA */ | 405 | #if defined(CONFIG_ARCH_OMAP2420) /* IVA */ |
| 320 | if (cpu_is_omap2420()) { | 406 | if (cpu_is_omap2420()) { |
| 321 | /* IVA IRQ */ | 407 | /* IVA IRQ */ |
| @@ -335,6 +421,7 @@ static int __devinit omap2_mbox_probe(struct platform_device *pdev) | |||
| 335 | 421 | ||
| 336 | err_iva1: | 422 | err_iva1: |
| 337 | omap_mbox_unregister(&mbox_dsp_info); | 423 | omap_mbox_unregister(&mbox_dsp_info); |
| 424 | |||
| 338 | err_dsp: | 425 | err_dsp: |
| 339 | iounmap(mbox_base); | 426 | iounmap(mbox_base); |
| 340 | return ret; | 427 | return ret; |
| @@ -345,7 +432,12 @@ static int __devexit omap2_mbox_remove(struct platform_device *pdev) | |||
| 345 | #if defined(CONFIG_ARCH_OMAP2420) | 432 | #if defined(CONFIG_ARCH_OMAP2420) |
| 346 | omap_mbox_unregister(&mbox_iva_info); | 433 | omap_mbox_unregister(&mbox_iva_info); |
| 347 | #endif | 434 | #endif |
| 348 | omap_mbox_unregister(&mbox_dsp_info); | 435 | |
| 436 | if (cpu_is_omap44xx()) { | ||
| 437 | omap_mbox_unregister(&mbox_2_info); | ||
| 438 | omap_mbox_unregister(&mbox_1_info); | ||
| 439 | } else | ||
| 440 | omap_mbox_unregister(&mbox_dsp_info); | ||
| 349 | iounmap(mbox_base); | 441 | iounmap(mbox_base); |
| 350 | return 0; | 442 | return 0; |
| 351 | } | 443 | } |
| @@ -354,7 +446,7 @@ static struct platform_driver omap2_mbox_driver = { | |||
| 354 | .probe = omap2_mbox_probe, | 446 | .probe = omap2_mbox_probe, |
| 355 | .remove = __devexit_p(omap2_mbox_remove), | 447 | .remove = __devexit_p(omap2_mbox_remove), |
| 356 | .driver = { | 448 | .driver = { |
| 357 | .name = "omap2-mailbox", | 449 | .name = DRV_NAME, |
| 358 | }, | 450 | }, |
| 359 | }; | 451 | }; |
| 360 | 452 | ||
| @@ -372,6 +464,6 @@ module_init(omap2_mbox_init); | |||
| 372 | module_exit(omap2_mbox_exit); | 464 | module_exit(omap2_mbox_exit); |
| 373 | 465 | ||
| 374 | MODULE_LICENSE("GPL v2"); | 466 | MODULE_LICENSE("GPL v2"); |
| 375 | MODULE_DESCRIPTION("omap mailbox: omap2/3 architecture specific functions"); | 467 | MODULE_DESCRIPTION("omap mailbox: omap2/3/4 architecture specific functions"); |
| 376 | MODULE_AUTHOR("Hiroshi DOYU <Hiroshi.DOYU@nokia.com>, Paul Mundt"); | 468 | MODULE_AUTHOR("Hiroshi DOYU <Hiroshi.DOYU@nokia.com>, Paul Mundt"); |
| 377 | MODULE_ALIAS("platform:omap2-mailbox"); | 469 | MODULE_ALIAS("platform:"DRV_NAME); |
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index a846aa1ebb4..baa45173385 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c | |||
| @@ -18,10 +18,10 @@ | |||
| 18 | #include <linux/platform_device.h> | 18 | #include <linux/platform_device.h> |
| 19 | 19 | ||
| 20 | #include <mach/irqs.h> | 20 | #include <mach/irqs.h> |
| 21 | #include <mach/dma.h> | 21 | #include <plat/dma.h> |
| 22 | #include <mach/mux.h> | 22 | #include <plat/mux.h> |
| 23 | #include <mach/cpu.h> | 23 | #include <plat/cpu.h> |
| 24 | #include <mach/mcbsp.h> | 24 | #include <plat/mcbsp.h> |
| 25 | 25 | ||
| 26 | static void omap2_mcbsp2_mux_setup(void) | 26 | static void omap2_mcbsp2_mux_setup(void) |
| 27 | { | 27 | { |
diff --git a/arch/arm/mach-omap2/mmc-twl4030.c b/arch/arm/mach-omap2/mmc-twl4030.c index c9c59a2db4e..0c3c72d934b 100644 --- a/arch/arm/mach-omap2/mmc-twl4030.c +++ b/arch/arm/mach-omap2/mmc-twl4030.c | |||
| @@ -20,9 +20,9 @@ | |||
| 20 | #include <linux/regulator/consumer.h> | 20 | #include <linux/regulator/consumer.h> |
| 21 | 21 | ||
| 22 | #include <mach/hardware.h> | 22 | #include <mach/hardware.h> |
| 23 | #include <mach/control.h> | 23 | #include <plat/control.h> |
| 24 | #include <mach/mmc.h> | 24 | #include <plat/mmc.h> |
| 25 | #include <mach/board.h> | 25 | #include <plat/board.h> |
| 26 | 26 | ||
| 27 | #include "mmc-twl4030.h" | 27 | #include "mmc-twl4030.h" |
| 28 | 28 | ||
| @@ -213,7 +213,7 @@ static int twl4030_mmc_get_context_loss(struct device *dev) | |||
| 213 | static int twl_mmc1_set_power(struct device *dev, int slot, int power_on, | 213 | static int twl_mmc1_set_power(struct device *dev, int slot, int power_on, |
| 214 | int vdd) | 214 | int vdd) |
| 215 | { | 215 | { |
| 216 | u32 reg; | 216 | u32 reg, prog_io; |
| 217 | int ret = 0; | 217 | int ret = 0; |
| 218 | struct twl_mmc_controller *c = &hsmmc[0]; | 218 | struct twl_mmc_controller *c = &hsmmc[0]; |
| 219 | struct omap_mmc_platform_data *mmc = dev->platform_data; | 219 | struct omap_mmc_platform_data *mmc = dev->platform_data; |
| @@ -245,7 +245,14 @@ static int twl_mmc1_set_power(struct device *dev, int slot, int power_on, | |||
| 245 | } | 245 | } |
| 246 | 246 | ||
| 247 | reg = omap_ctrl_readl(control_pbias_offset); | 247 | reg = omap_ctrl_readl(control_pbias_offset); |
| 248 | reg |= OMAP2_PBIASSPEEDCTRL0; | 248 | if (cpu_is_omap3630()) { |
| 249 | /* Set MMC I/O to 52Mhz */ | ||
| 250 | prog_io = omap_ctrl_readl(OMAP343X_CONTROL_PROG_IO1); | ||
| 251 | prog_io |= OMAP3630_PRG_SDMMC1_SPEEDCTRL; | ||
| 252 | omap_ctrl_writel(prog_io, OMAP343X_CONTROL_PROG_IO1); | ||
| 253 | } else { | ||
| 254 | reg |= OMAP2_PBIASSPEEDCTRL0; | ||
| 255 | } | ||
| 249 | reg &= ~OMAP2_PBIASLITEPWRDNZ0; | 256 | reg &= ~OMAP2_PBIASLITEPWRDNZ0; |
| 250 | omap_ctrl_writel(reg, control_pbias_offset); | 257 | omap_ctrl_writel(reg, control_pbias_offset); |
| 251 | 258 | ||
| @@ -489,6 +496,12 @@ void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers) | |||
| 489 | /* on-chip level shifting via PBIAS0/PBIAS1 */ | 496 | /* on-chip level shifting via PBIAS0/PBIAS1 */ |
| 490 | mmc->slots[0].set_power = twl_mmc1_set_power; | 497 | mmc->slots[0].set_power = twl_mmc1_set_power; |
| 491 | mmc->slots[0].set_sleep = twl_mmc1_set_sleep; | 498 | mmc->slots[0].set_sleep = twl_mmc1_set_sleep; |
| 499 | |||
| 500 | /* Omap3630 HSMMC1 supports only 4-bit */ | ||
| 501 | if (cpu_is_omap3630() && c->wires > 4) { | ||
| 502 | c->wires = 4; | ||
| 503 | mmc->slots[0].wires = c->wires; | ||
| 504 | } | ||
| 492 | break; | 505 | break; |
| 493 | case 2: | 506 | case 2: |
| 494 | if (c->ext_clock) | 507 | if (c->ext_clock) |
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index b5fac32aae7..c18a94eca64 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c | |||
| @@ -30,8 +30,8 @@ | |||
| 30 | 30 | ||
| 31 | #include <asm/system.h> | 31 | #include <asm/system.h> |
| 32 | 32 | ||
| 33 | #include <mach/control.h> | 33 | #include <plat/control.h> |
| 34 | #include <mach/mux.h> | 34 | #include <plat/mux.h> |
| 35 | 35 | ||
| 36 | #ifdef CONFIG_OMAP_MUX | 36 | #ifdef CONFIG_OMAP_MUX |
| 37 | 37 | ||
| @@ -532,6 +532,14 @@ MUX_CFG_34XX("AG4_3430_MMC2_DAT2", 0x160, | |||
| 532 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | 532 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) |
| 533 | MUX_CFG_34XX("AF4_3430_MMC2_DAT3", 0x162, | 533 | MUX_CFG_34XX("AF4_3430_MMC2_DAT3", 0x162, |
| 534 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | 534 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) |
| 535 | MUX_CFG_34XX("AE4_3430_MMC2_DAT4", 0x164, | ||
| 536 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
| 537 | MUX_CFG_34XX("AH3_3430_MMC2_DAT5", 0x166, | ||
| 538 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
| 539 | MUX_CFG_34XX("AF3_3430_MMC2_DAT6", 0x168, | ||
| 540 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
| 541 | MUX_CFG_34XX("AE3_3430_MMC2_DAT7", 0x16A, | ||
| 542 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
| 535 | 543 | ||
| 536 | /* MMC3 */ | 544 | /* MMC3 */ |
| 537 | MUX_CFG_34XX("AF10_3430_MMC3_CLK", 0x5d8, | 545 | MUX_CFG_34XX("AF10_3430_MMC3_CLK", 0x5d8, |
| @@ -551,6 +559,13 @@ MUX_CFG_34XX("AF13_3430_MMC3_DAT3", 0x5e2, | |||
| 551 | MUX_CFG_34XX("AF26_34XX_SYS_NIRQ", 0x1E0, | 559 | MUX_CFG_34XX("AF26_34XX_SYS_NIRQ", 0x1E0, |
| 552 | OMAP3_WAKEUP_EN | OMAP34XX_PIN_INPUT_PULLUP | | 560 | OMAP3_WAKEUP_EN | OMAP34XX_PIN_INPUT_PULLUP | |
| 553 | OMAP34XX_MUX_MODE0) | 561 | OMAP34XX_MUX_MODE0) |
| 562 | /* EHCI GPIO's on OMAP3EVM (Rev >= E) */ | ||
| 563 | MUX_CFG_34XX("AH14_34XX_GPIO21", 0x5ea, | ||
| 564 | OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLUP) | ||
| 565 | MUX_CFG_34XX("AF9_34XX_GPIO22", 0x5ec, | ||
| 566 | OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLUP) | ||
| 567 | MUX_CFG_34XX("U3_34XX_GPIO61", 0x0c8, | ||
| 568 | OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLUP) | ||
| 554 | }; | 569 | }; |
| 555 | 570 | ||
| 556 | #define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins) | 571 | #define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins) |
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index 48ee295db27..4890bcf4dad 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c | |||
| @@ -24,13 +24,14 @@ | |||
| 24 | #include <asm/localtimer.h> | 24 | #include <asm/localtimer.h> |
| 25 | #include <asm/smp_scu.h> | 25 | #include <asm/smp_scu.h> |
| 26 | #include <mach/hardware.h> | 26 | #include <mach/hardware.h> |
| 27 | #include <plat/common.h> | ||
| 27 | 28 | ||
| 28 | /* Registers used for communicating startup information */ | 29 | /* Registers used for communicating startup information */ |
| 29 | #define OMAP4_AUXCOREBOOT_REG0 (OMAP44XX_VA_WKUPGEN_BASE + 0x800) | 30 | static void __iomem *omap4_auxcoreboot_reg0; |
| 30 | #define OMAP4_AUXCOREBOOT_REG1 (OMAP44XX_VA_WKUPGEN_BASE + 0x804) | 31 | static void __iomem *omap4_auxcoreboot_reg1; |
| 31 | 32 | ||
| 32 | /* SCU base address */ | 33 | /* SCU base address */ |
| 33 | static void __iomem *scu_base = OMAP44XX_VA_SCU_BASE; | 34 | static void __iomem *scu_base; |
| 34 | 35 | ||
| 35 | /* | 36 | /* |
| 36 | * Use SCU config register to count number of cores | 37 | * Use SCU config register to count number of cores |
| @@ -53,8 +54,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu) | |||
| 53 | * core (e.g. timer irq), then they will not have been enabled | 54 | * core (e.g. timer irq), then they will not have been enabled |
| 54 | * for us: do so | 55 | * for us: do so |
| 55 | */ | 56 | */ |
| 56 | 57 | gic_cpu_init(0, gic_cpu_base_addr); | |
| 57 | gic_cpu_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)); | ||
| 58 | 58 | ||
| 59 | /* | 59 | /* |
| 60 | * Synchronise with the boot thread. | 60 | * Synchronise with the boot thread. |
| @@ -79,7 +79,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) | |||
| 79 | * the AuxCoreBoot1 register is updated with cpu state | 79 | * the AuxCoreBoot1 register is updated with cpu state |
| 80 | * A barrier is added to ensure that write buffer is drained | 80 | * A barrier is added to ensure that write buffer is drained |
| 81 | */ | 81 | */ |
| 82 | __raw_writel(cpu, OMAP4_AUXCOREBOOT_REG1); | 82 | __raw_writel(cpu, omap4_auxcoreboot_reg1); |
| 83 | smp_wmb(); | 83 | smp_wmb(); |
| 84 | 84 | ||
| 85 | timeout = jiffies + (1 * HZ); | 85 | timeout = jiffies + (1 * HZ); |
| @@ -104,7 +104,7 @@ static void __init wakeup_secondary(void) | |||
| 104 | * A barrier is added to ensure that write buffer is drained | 104 | * A barrier is added to ensure that write buffer is drained |
| 105 | */ | 105 | */ |
| 106 | __raw_writel(virt_to_phys(omap_secondary_startup), \ | 106 | __raw_writel(virt_to_phys(omap_secondary_startup), \ |
| 107 | OMAP4_AUXCOREBOOT_REG0); | 107 | omap4_auxcoreboot_reg0); |
| 108 | smp_wmb(); | 108 | smp_wmb(); |
| 109 | 109 | ||
| 110 | /* | 110 | /* |
| @@ -120,7 +120,13 @@ static void __init wakeup_secondary(void) | |||
| 120 | */ | 120 | */ |
| 121 | void __init smp_init_cpus(void) | 121 | void __init smp_init_cpus(void) |
| 122 | { | 122 | { |
| 123 | unsigned int i, ncores = get_core_count(); | 123 | unsigned int i, ncores; |
| 124 | |||
| 125 | /* Never released */ | ||
| 126 | scu_base = ioremap(OMAP44XX_SCU_BASE, SZ_256); | ||
| 127 | BUG_ON(!scu_base); | ||
| 128 | |||
| 129 | ncores = get_core_count(); | ||
| 124 | 130 | ||
| 125 | for (i = 0; i < ncores; i++) | 131 | for (i = 0; i < ncores; i++) |
| 126 | set_cpu_possible(i, true); | 132 | set_cpu_possible(i, true); |
| @@ -130,6 +136,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus) | |||
| 130 | { | 136 | { |
| 131 | unsigned int ncores = get_core_count(); | 137 | unsigned int ncores = get_core_count(); |
| 132 | unsigned int cpu = smp_processor_id(); | 138 | unsigned int cpu = smp_processor_id(); |
| 139 | void __iomem *omap4_wkupgen_base; | ||
| 133 | int i; | 140 | int i; |
| 134 | 141 | ||
| 135 | /* sanity check */ | 142 | /* sanity check */ |
| @@ -161,6 +168,12 @@ void __init smp_prepare_cpus(unsigned int max_cpus) | |||
| 161 | for (i = 0; i < max_cpus; i++) | 168 | for (i = 0; i < max_cpus; i++) |
| 162 | set_cpu_present(i, true); | 169 | set_cpu_present(i, true); |
| 163 | 170 | ||
| 171 | /* Never released */ | ||
| 172 | omap4_wkupgen_base = ioremap(OMAP44XX_WKUPGEN_BASE, SZ_4K); | ||
| 173 | BUG_ON(!omap4_wkupgen_base); | ||
| 174 | omap4_auxcoreboot_reg0 = omap4_wkupgen_base + 0x800; | ||
| 175 | omap4_auxcoreboot_reg1 = omap4_wkupgen_base + 0x804; | ||
| 176 | |||
| 164 | if (max_cpus > 1) { | 177 | if (max_cpus > 1) { |
| 165 | /* | 178 | /* |
| 166 | * Enable the local timer or broadcast device for the | 179 | * Enable the local timer or broadcast device for the |
diff --git a/arch/arm/mach-omap2/omap3-iommu.c b/arch/arm/mach-omap2/omap3-iommu.c index 194189c746c..fbbcb5c8336 100644 --- a/arch/arm/mach-omap2/omap3-iommu.c +++ b/arch/arm/mach-omap2/omap3-iommu.c | |||
| @@ -12,49 +12,52 @@ | |||
| 12 | 12 | ||
| 13 | #include <linux/platform_device.h> | 13 | #include <linux/platform_device.h> |
| 14 | 14 | ||
| 15 | #include <mach/iommu.h> | 15 | #include <plat/iommu.h> |
| 16 | 16 | ||
| 17 | #define OMAP3_MMU1_BASE 0x480bd400 | 17 | struct iommu_device { |
| 18 | #define OMAP3_MMU2_BASE 0x5d000000 | 18 | resource_size_t base; |
| 19 | #define OMAP3_MMU1_IRQ 24 | 19 | int irq; |
| 20 | #define OMAP3_MMU2_IRQ 28 | 20 | struct iommu_platform_data pdata; |
| 21 | 21 | struct resource res[2]; | |
| 22 | |||
| 23 | static unsigned long iommu_base[] __initdata = { | ||
| 24 | OMAP3_MMU1_BASE, | ||
| 25 | OMAP3_MMU2_BASE, | ||
| 26 | }; | ||
| 27 | |||
| 28 | static int iommu_irq[] __initdata = { | ||
| 29 | OMAP3_MMU1_IRQ, | ||
| 30 | OMAP3_MMU2_IRQ, | ||
| 31 | }; | 22 | }; |
| 32 | 23 | ||
| 33 | static const struct iommu_platform_data omap3_iommu_pdata[] __initconst = { | 24 | static struct iommu_device devices[] = { |
| 34 | { | 25 | { |
| 35 | .name = "isp", | 26 | .base = 0x480bd400, |
| 36 | .nr_tlb_entries = 8, | 27 | .irq = 24, |
| 37 | .clk_name = "cam_ick", | 28 | .pdata = { |
| 29 | .name = "isp", | ||
| 30 | .nr_tlb_entries = 8, | ||
| 31 | .clk_name = "cam_ick", | ||
| 32 | }, | ||
| 38 | }, | 33 | }, |
| 39 | #if defined(CONFIG_MPU_BRIDGE_IOMMU) | 34 | #if defined(CONFIG_MPU_BRIDGE_IOMMU) |
| 40 | { | 35 | { |
| 41 | .name = "iva2", | 36 | .base = 0x5d000000, |
| 42 | .nr_tlb_entries = 32, | 37 | .irq = 28, |
| 43 | .clk_name = "iva2_ck", | 38 | .pdata = { |
| 39 | .name = "iva2", | ||
| 40 | .nr_tlb_entries = 32, | ||
| 41 | .clk_name = "iva2_ck", | ||
| 42 | }, | ||
| 44 | }, | 43 | }, |
| 45 | #endif | 44 | #endif |
| 46 | }; | 45 | }; |
| 47 | #define NR_IOMMU_DEVICES ARRAY_SIZE(omap3_iommu_pdata) | 46 | #define NR_IOMMU_DEVICES ARRAY_SIZE(devices) |
| 48 | 47 | ||
| 49 | static struct platform_device *omap3_iommu_pdev[NR_IOMMU_DEVICES]; | 48 | static struct platform_device *omap3_iommu_pdev[NR_IOMMU_DEVICES]; |
| 50 | 49 | ||
| 51 | static int __init omap3_iommu_init(void) | 50 | static int __init omap3_iommu_init(void) |
| 52 | { | 51 | { |
| 53 | int i, err; | 52 | int i, err; |
| 53 | struct resource res[] = { | ||
| 54 | { .flags = IORESOURCE_MEM }, | ||
| 55 | { .flags = IORESOURCE_IRQ }, | ||
| 56 | }; | ||
| 54 | 57 | ||
| 55 | for (i = 0; i < NR_IOMMU_DEVICES; i++) { | 58 | for (i = 0; i < NR_IOMMU_DEVICES; i++) { |
| 56 | struct platform_device *pdev; | 59 | struct platform_device *pdev; |
| 57 | struct resource res[2]; | 60 | const struct iommu_device *d = &devices[i]; |
| 58 | 61 | ||
| 59 | pdev = platform_device_alloc("omap-iommu", i); | 62 | pdev = platform_device_alloc("omap-iommu", i); |
| 60 | if (!pdev) { | 63 | if (!pdev) { |
| @@ -62,19 +65,16 @@ static int __init omap3_iommu_init(void) | |||
| 62 | goto err_out; | 65 | goto err_out; |
| 63 | } | 66 | } |
| 64 | 67 | ||
| 65 | memset(res, 0, sizeof(res)); | 68 | res[0].start = d->base; |
| 66 | res[0].start = iommu_base[i]; | 69 | res[0].end = d->base + MMU_REG_SIZE - 1; |
| 67 | res[0].end = iommu_base[i] + MMU_REG_SIZE - 1; | 70 | res[1].start = res[1].end = d->irq; |
| 68 | res[0].flags = IORESOURCE_MEM; | ||
| 69 | res[1].start = res[1].end = iommu_irq[i]; | ||
| 70 | res[1].flags = IORESOURCE_IRQ; | ||
| 71 | 71 | ||
| 72 | err = platform_device_add_resources(pdev, res, | 72 | err = platform_device_add_resources(pdev, res, |
| 73 | ARRAY_SIZE(res)); | 73 | ARRAY_SIZE(res)); |
| 74 | if (err) | 74 | if (err) |
| 75 | goto err_out; | 75 | goto err_out; |
| 76 | err = platform_device_add_data(pdev, &omap3_iommu_pdata[i], | 76 | err = platform_device_add_data(pdev, &d->pdata, |
| 77 | sizeof(omap3_iommu_pdata[0])); | 77 | sizeof(d->pdata)); |
| 78 | if (err) | 78 | if (err) |
| 79 | goto err_out; | 79 | goto err_out; |
| 80 | err = platform_device_add(pdev); | 80 | err = platform_device_add(pdev); |
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index d2e0f1c9596..633b216a8b2 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c | |||
| @@ -45,11 +45,11 @@ | |||
| 45 | #include <linux/mutex.h> | 45 | #include <linux/mutex.h> |
| 46 | #include <linux/bootmem.h> | 46 | #include <linux/bootmem.h> |
| 47 | 47 | ||
| 48 | #include <mach/cpu.h> | 48 | #include <plat/cpu.h> |
| 49 | #include <mach/clockdomain.h> | 49 | #include <plat/clockdomain.h> |
| 50 | #include <mach/powerdomain.h> | 50 | #include <plat/powerdomain.h> |
| 51 | #include <mach/clock.h> | 51 | #include <plat/clock.h> |
| 52 | #include <mach/omap_hwmod.h> | 52 | #include <plat/omap_hwmod.h> |
| 53 | 53 | ||
| 54 | #include "cm.h" | 54 | #include "cm.h" |
| 55 | 55 | ||
| @@ -496,6 +496,7 @@ static void __iomem *_find_mpu_rt_base(struct omap_hwmod *oh, u8 index) | |||
| 496 | struct omap_hwmod_addr_space *mem; | 496 | struct omap_hwmod_addr_space *mem; |
| 497 | int i; | 497 | int i; |
| 498 | int found = 0; | 498 | int found = 0; |
| 499 | void __iomem *va_start; | ||
| 499 | 500 | ||
| 500 | if (!oh || oh->slaves_cnt == 0) | 501 | if (!oh || oh->slaves_cnt == 0) |
| 501 | return NULL; | 502 | return NULL; |
| @@ -509,16 +510,20 @@ static void __iomem *_find_mpu_rt_base(struct omap_hwmod *oh, u8 index) | |||
| 509 | } | 510 | } |
| 510 | } | 511 | } |
| 511 | 512 | ||
| 512 | /* XXX use ioremap() instead? */ | 513 | if (found) { |
| 513 | 514 | va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start); | |
| 514 | if (found) | 515 | if (!va_start) { |
| 516 | pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name); | ||
| 517 | return NULL; | ||
| 518 | } | ||
| 515 | pr_debug("omap_hwmod: %s: MPU register target at va %p\n", | 519 | pr_debug("omap_hwmod: %s: MPU register target at va %p\n", |
| 516 | oh->name, OMAP2_IO_ADDRESS(mem->pa_start)); | 520 | oh->name, va_start); |
| 517 | else | 521 | } else { |
| 518 | pr_debug("omap_hwmod: %s: no MPU register target found\n", | 522 | pr_debug("omap_hwmod: %s: no MPU register target found\n", |
| 519 | oh->name); | 523 | oh->name); |
| 524 | } | ||
| 520 | 525 | ||
| 521 | return (found) ? OMAP2_IO_ADDRESS(mem->pa_start) : NULL; | 526 | return (found) ? va_start : NULL; |
| 522 | } | 527 | } |
| 523 | 528 | ||
| 524 | /** | 529 | /** |
| @@ -1148,6 +1153,7 @@ int omap_hwmod_unregister(struct omap_hwmod *oh) | |||
| 1148 | pr_debug("omap_hwmod: %s: unregistering\n", oh->name); | 1153 | pr_debug("omap_hwmod: %s: unregistering\n", oh->name); |
| 1149 | 1154 | ||
| 1150 | mutex_lock(&omap_hwmod_mutex); | 1155 | mutex_lock(&omap_hwmod_mutex); |
| 1156 | iounmap(oh->_rt_va); | ||
| 1151 | list_del(&oh->node); | 1157 | list_del(&oh->node); |
| 1152 | mutex_unlock(&omap_hwmod_mutex); | 1158 | mutex_unlock(&omap_hwmod_mutex); |
| 1153 | 1159 | ||
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420.h b/arch/arm/mach-omap2/omap_hwmod_2420.h index 767e4965ac4..a9ca1b99a30 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420.h +++ b/arch/arm/mach-omap2/omap_hwmod_2420.h | |||
| @@ -16,10 +16,10 @@ | |||
| 16 | 16 | ||
| 17 | #ifdef CONFIG_ARCH_OMAP2420 | 17 | #ifdef CONFIG_ARCH_OMAP2420 |
| 18 | 18 | ||
| 19 | #include <mach/omap_hwmod.h> | 19 | #include <plat/omap_hwmod.h> |
| 20 | #include <mach/irqs.h> | 20 | #include <mach/irqs.h> |
| 21 | #include <mach/cpu.h> | 21 | #include <plat/cpu.h> |
| 22 | #include <mach/dma.h> | 22 | #include <plat/dma.h> |
| 23 | 23 | ||
| 24 | #include "prm-regbits-24xx.h" | 24 | #include "prm-regbits-24xx.h" |
| 25 | 25 | ||
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430.h b/arch/arm/mach-omap2/omap_hwmod_2430.h index a412be6420e..59a208bea6c 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430.h +++ b/arch/arm/mach-omap2/omap_hwmod_2430.h | |||
| @@ -16,10 +16,10 @@ | |||
| 16 | 16 | ||
| 17 | #ifdef CONFIG_ARCH_OMAP2430 | 17 | #ifdef CONFIG_ARCH_OMAP2430 |
| 18 | 18 | ||
| 19 | #include <mach/omap_hwmod.h> | 19 | #include <plat/omap_hwmod.h> |
| 20 | #include <mach/irqs.h> | 20 | #include <mach/irqs.h> |
| 21 | #include <mach/cpu.h> | 21 | #include <plat/cpu.h> |
| 22 | #include <mach/dma.h> | 22 | #include <plat/dma.h> |
| 23 | 23 | ||
| 24 | #include "prm-regbits-24xx.h" | 24 | #include "prm-regbits-24xx.h" |
| 25 | 25 | ||
diff --git a/arch/arm/mach-omap2/omap_hwmod_34xx.h b/arch/arm/mach-omap2/omap_hwmod_34xx.h index 1e069f83157..b6076b9c364 100644 --- a/arch/arm/mach-omap2/omap_hwmod_34xx.h +++ b/arch/arm/mach-omap2/omap_hwmod_34xx.h | |||
| @@ -14,10 +14,10 @@ | |||
| 14 | 14 | ||
| 15 | #ifdef CONFIG_ARCH_OMAP34XX | 15 | #ifdef CONFIG_ARCH_OMAP34XX |
| 16 | 16 | ||
| 17 | #include <mach/omap_hwmod.h> | 17 | #include <plat/omap_hwmod.h> |
| 18 | #include <mach/irqs.h> | 18 | #include <mach/irqs.h> |
| 19 | #include <mach/cpu.h> | 19 | #include <plat/cpu.h> |
| 20 | #include <mach/dma.h> | 20 | #include <plat/dma.h> |
| 21 | 21 | ||
| 22 | #include "prm-regbits-34xx.h" | 22 | #include "prm-regbits-34xx.h" |
| 23 | 23 | ||
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index 2fc4d6abbd0..8baa30d2acf 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c | |||
| @@ -26,10 +26,10 @@ | |||
| 26 | #include <linux/io.h> | 26 | #include <linux/io.h> |
| 27 | #include <linux/module.h> | 27 | #include <linux/module.h> |
| 28 | 28 | ||
| 29 | #include <mach/clock.h> | 29 | #include <plat/clock.h> |
| 30 | #include <mach/board.h> | 30 | #include <plat/board.h> |
| 31 | #include <mach/powerdomain.h> | 31 | #include <plat/powerdomain.h> |
| 32 | #include <mach/clockdomain.h> | 32 | #include <plat/clockdomain.h> |
| 33 | 33 | ||
| 34 | #include "prm.h" | 34 | #include "prm.h" |
| 35 | #include "cm.h" | 35 | #include "cm.h" |
| @@ -51,7 +51,8 @@ int omap2_pm_debug; | |||
| 51 | regs[reg_count++].val = __raw_readl(reg) | 51 | regs[reg_count++].val = __raw_readl(reg) |
| 52 | #define DUMP_INTC_REG(reg, off) \ | 52 | #define DUMP_INTC_REG(reg, off) \ |
| 53 | regs[reg_count].name = #reg; \ | 53 | regs[reg_count].name = #reg; \ |
| 54 | regs[reg_count++].val = __raw_readl(OMAP2_IO_ADDRESS(0x480fe000 + (off))) | 54 | regs[reg_count++].val = \ |
| 55 | __raw_readl(OMAP2_L4_IO_ADDRESS(0x480fe000 + (off))) | ||
| 55 | 56 | ||
| 56 | static int __init pm_dbg_init(void); | 57 | static int __init pm_dbg_init(void); |
| 57 | 58 | ||
| @@ -526,6 +527,29 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *dir) | |||
| 526 | return 0; | 527 | return 0; |
| 527 | } | 528 | } |
| 528 | 529 | ||
| 530 | static int option_get(void *data, u64 *val) | ||
| 531 | { | ||
| 532 | u32 *option = data; | ||
| 533 | |||
| 534 | *val = *option; | ||
| 535 | |||
| 536 | return 0; | ||
| 537 | } | ||
| 538 | |||
| 539 | static int option_set(void *data, u64 val) | ||
| 540 | { | ||
| 541 | u32 *option = data; | ||
| 542 | |||
| 543 | *option = val; | ||
| 544 | |||
| 545 | if (option == &enable_off_mode) | ||
| 546 | omap3_pm_off_mode_enable(val); | ||
| 547 | |||
| 548 | return 0; | ||
| 549 | } | ||
| 550 | |||
| 551 | DEFINE_SIMPLE_ATTRIBUTE(pm_dbg_option_fops, option_get, option_set, "%llu\n"); | ||
| 552 | |||
| 529 | static int __init pm_dbg_init(void) | 553 | static int __init pm_dbg_init(void) |
| 530 | { | 554 | { |
| 531 | int i; | 555 | int i; |
| @@ -568,6 +592,12 @@ static int __init pm_dbg_init(void) | |||
| 568 | 592 | ||
| 569 | } | 593 | } |
| 570 | 594 | ||
| 595 | (void) debugfs_create_file("enable_off_mode", S_IRUGO | S_IWUGO, d, | ||
| 596 | &enable_off_mode, &pm_dbg_option_fops); | ||
| 597 | (void) debugfs_create_file("sleep_while_idle", S_IRUGO | S_IWUGO, d, | ||
| 598 | &sleep_while_idle, &pm_dbg_option_fops); | ||
| 599 | (void) debugfs_create_file("wakeup_timer_seconds", S_IRUGO | S_IWUGO, d, | ||
| 600 | &wakeup_timer_seconds, &pm_dbg_option_fops); | ||
| 571 | pm_dbg_init_done = 1; | 601 | pm_dbg_init_done = 1; |
| 572 | 602 | ||
| 573 | return 0; | 603 | return 0; |
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index 8400f576892..0bf345db714 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h | |||
| @@ -11,11 +11,24 @@ | |||
| 11 | #ifndef __ARCH_ARM_MACH_OMAP2_PM_H | 11 | #ifndef __ARCH_ARM_MACH_OMAP2_PM_H |
| 12 | #define __ARCH_ARM_MACH_OMAP2_PM_H | 12 | #define __ARCH_ARM_MACH_OMAP2_PM_H |
| 13 | 13 | ||
| 14 | #include <mach/powerdomain.h> | 14 | #include <plat/powerdomain.h> |
| 15 | |||
| 16 | extern u32 enable_off_mode; | ||
| 17 | extern u32 sleep_while_idle; | ||
| 18 | |||
| 19 | extern void *omap3_secure_ram_storage; | ||
| 20 | extern void omap3_pm_off_mode_enable(int); | ||
| 21 | extern void omap_sram_idle(void); | ||
| 22 | extern int omap3_can_sleep(void); | ||
| 23 | extern int set_pwrdm_state(struct powerdomain *pwrdm, u32 state); | ||
| 24 | extern int omap3_idle_init(void); | ||
| 15 | 25 | ||
| 16 | extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm); | 26 | extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm); |
| 17 | extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state); | 27 | extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state); |
| 18 | 28 | ||
| 29 | extern u32 wakeup_timer_seconds; | ||
| 30 | extern struct omap_dm_timer *gptimer_wakeup; | ||
| 31 | |||
| 19 | #ifdef CONFIG_PM_DEBUG | 32 | #ifdef CONFIG_PM_DEBUG |
| 20 | extern void omap2_pm_dump(int mode, int resume, unsigned int us); | 33 | extern void omap2_pm_dump(int mode, int resume, unsigned int us); |
| 21 | extern int omap2_pm_debug; | 34 | extern int omap2_pm_debug; |
| @@ -36,6 +49,7 @@ extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl, | |||
| 36 | void __iomem *sdrc_power); | 49 | void __iomem *sdrc_power); |
| 37 | extern void omap34xx_cpu_suspend(u32 *addr, int save_state); | 50 | extern void omap34xx_cpu_suspend(u32 *addr, int save_state); |
| 38 | extern void save_secure_ram_context(u32 *addr); | 51 | extern void save_secure_ram_context(u32 *addr); |
| 52 | extern void omap3_save_scratchpad_contents(void); | ||
| 39 | 53 | ||
| 40 | extern unsigned int omap24xx_idle_loop_suspend_sz; | 54 | extern unsigned int omap24xx_idle_loop_suspend_sz; |
| 41 | extern unsigned int omap34xx_suspend_sz; | 55 | extern unsigned int omap34xx_suspend_sz; |
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c index bff5c4e8974..cba05b9f041 100644 --- a/arch/arm/mach-omap2/pm24xx.c +++ b/arch/arm/mach-omap2/pm24xx.c | |||
| @@ -36,12 +36,12 @@ | |||
| 36 | #include <asm/mach-types.h> | 36 | #include <asm/mach-types.h> |
| 37 | 37 | ||
| 38 | #include <mach/irqs.h> | 38 | #include <mach/irqs.h> |
| 39 | #include <mach/clock.h> | 39 | #include <plat/clock.h> |
| 40 | #include <mach/sram.h> | 40 | #include <plat/sram.h> |
| 41 | #include <mach/control.h> | 41 | #include <plat/control.h> |
| 42 | #include <mach/mux.h> | 42 | #include <plat/mux.h> |
| 43 | #include <mach/dma.h> | 43 | #include <plat/dma.h> |
| 44 | #include <mach/board.h> | 44 | #include <plat/board.h> |
| 45 | 45 | ||
| 46 | #include "prm.h" | 46 | #include "prm.h" |
| 47 | #include "prm-regbits-24xx.h" | 47 | #include "prm-regbits-24xx.h" |
| @@ -50,8 +50,8 @@ | |||
| 50 | #include "sdrc.h" | 50 | #include "sdrc.h" |
| 51 | #include "pm.h" | 51 | #include "pm.h" |
| 52 | 52 | ||
| 53 | #include <mach/powerdomain.h> | 53 | #include <plat/powerdomain.h> |
| 54 | #include <mach/clockdomain.h> | 54 | #include <plat/clockdomain.h> |
| 55 | 55 | ||
| 56 | static void (*omap2_sram_idle)(void); | 56 | static void (*omap2_sram_idle)(void); |
| 57 | static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl, | 57 | static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl, |
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 89463190923..81ed252a0f8 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c | |||
| @@ -5,6 +5,9 @@ | |||
| 5 | * Tony Lindgren <tony@atomide.com> | 5 | * Tony Lindgren <tony@atomide.com> |
| 6 | * Jouni Hogander | 6 | * Jouni Hogander |
| 7 | * | 7 | * |
| 8 | * Copyright (C) 2007 Texas Instruments, Inc. | ||
| 9 | * Rajendra Nayak <rnayak@ti.com> | ||
| 10 | * | ||
| 8 | * Copyright (C) 2005 Texas Instruments, Inc. | 11 | * Copyright (C) 2005 Texas Instruments, Inc. |
| 9 | * Richard Woodruff <r-woodruff2@ti.com> | 12 | * Richard Woodruff <r-woodruff2@ti.com> |
| 10 | * | 13 | * |
| @@ -22,12 +25,20 @@ | |||
| 22 | #include <linux/list.h> | 25 | #include <linux/list.h> |
| 23 | #include <linux/err.h> | 26 | #include <linux/err.h> |
| 24 | #include <linux/gpio.h> | 27 | #include <linux/gpio.h> |
| 28 | #include <linux/clk.h> | ||
| 29 | |||
| 30 | #include <plat/sram.h> | ||
| 31 | #include <plat/clockdomain.h> | ||
| 32 | #include <plat/powerdomain.h> | ||
| 33 | #include <plat/control.h> | ||
| 34 | #include <plat/serial.h> | ||
| 35 | #include <plat/sdrc.h> | ||
| 36 | #include <plat/prcm.h> | ||
| 37 | #include <plat/gpmc.h> | ||
| 38 | #include <plat/dma.h> | ||
| 39 | #include <plat/dmtimer.h> | ||
| 25 | 40 | ||
| 26 | #include <mach/sram.h> | 41 | #include <asm/tlbflush.h> |
| 27 | #include <mach/clockdomain.h> | ||
| 28 | #include <mach/powerdomain.h> | ||
| 29 | #include <mach/control.h> | ||
| 30 | #include <mach/serial.h> | ||
| 31 | 42 | ||
| 32 | #include "cm.h" | 43 | #include "cm.h" |
| 33 | #include "cm-regbits-34xx.h" | 44 | #include "cm-regbits-34xx.h" |
| @@ -35,6 +46,16 @@ | |||
| 35 | 46 | ||
| 36 | #include "prm.h" | 47 | #include "prm.h" |
| 37 | #include "pm.h" | 48 | #include "pm.h" |
| 49 | #include "sdrc.h" | ||
| 50 | |||
| 51 | /* Scratchpad offsets */ | ||
| 52 | #define OMAP343X_TABLE_ADDRESS_OFFSET 0x31 | ||
| 53 | #define OMAP343X_TABLE_VALUE_OFFSET 0x30 | ||
| 54 | #define OMAP343X_CONTROL_REG_VALUE_OFFSET 0x32 | ||
| 55 | |||
| 56 | u32 enable_off_mode; | ||
| 57 | u32 sleep_while_idle; | ||
| 58 | u32 wakeup_timer_seconds; | ||
| 38 | 59 | ||
| 39 | struct power_state { | 60 | struct power_state { |
| 40 | struct powerdomain *pwrdm; | 61 | struct powerdomain *pwrdm; |
| @@ -49,7 +70,112 @@ static LIST_HEAD(pwrst_list); | |||
| 49 | 70 | ||
| 50 | static void (*_omap_sram_idle)(u32 *addr, int save_state); | 71 | static void (*_omap_sram_idle)(u32 *addr, int save_state); |
| 51 | 72 | ||
| 52 | static struct powerdomain *mpu_pwrdm; | 73 | static int (*_omap_save_secure_sram)(u32 *addr); |
| 74 | |||
| 75 | static struct powerdomain *mpu_pwrdm, *neon_pwrdm; | ||
| 76 | static struct powerdomain *core_pwrdm, *per_pwrdm; | ||
| 77 | static struct powerdomain *cam_pwrdm; | ||
| 78 | |||
| 79 | static inline void omap3_per_save_context(void) | ||
| 80 | { | ||
| 81 | omap_gpio_save_context(); | ||
| 82 | } | ||
| 83 | |||
| 84 | static inline void omap3_per_restore_context(void) | ||
| 85 | { | ||
| 86 | omap_gpio_restore_context(); | ||
| 87 | } | ||
| 88 | |||
| 89 | static void omap3_enable_io_chain(void) | ||
| 90 | { | ||
| 91 | int timeout = 0; | ||
| 92 | |||
| 93 | if (omap_rev() >= OMAP3430_REV_ES3_1) { | ||
| 94 | prm_set_mod_reg_bits(OMAP3430_EN_IO_CHAIN, WKUP_MOD, PM_WKEN); | ||
| 95 | /* Do a readback to assure write has been done */ | ||
| 96 | prm_read_mod_reg(WKUP_MOD, PM_WKEN); | ||
| 97 | |||
| 98 | while (!(prm_read_mod_reg(WKUP_MOD, PM_WKST) & | ||
| 99 | OMAP3430_ST_IO_CHAIN)) { | ||
| 100 | timeout++; | ||
| 101 | if (timeout > 1000) { | ||
| 102 | printk(KERN_ERR "Wake up daisy chain " | ||
| 103 | "activation failed.\n"); | ||
| 104 | return; | ||
| 105 | } | ||
| 106 | prm_set_mod_reg_bits(OMAP3430_ST_IO_CHAIN, | ||
| 107 | WKUP_MOD, PM_WKST); | ||
| 108 | } | ||
| 109 | } | ||
| 110 | } | ||
| 111 | |||
| 112 | static void omap3_disable_io_chain(void) | ||
| 113 | { | ||
| 114 | if (omap_rev() >= OMAP3430_REV_ES3_1) | ||
| 115 | prm_clear_mod_reg_bits(OMAP3430_EN_IO_CHAIN, WKUP_MOD, PM_WKEN); | ||
| 116 | } | ||
| 117 | |||
| 118 | static void omap3_core_save_context(void) | ||
| 119 | { | ||
| 120 | u32 control_padconf_off; | ||
| 121 | |||
| 122 | /* Save the padconf registers */ | ||
| 123 | control_padconf_off = omap_ctrl_readl(OMAP343X_CONTROL_PADCONF_OFF); | ||
| 124 | control_padconf_off |= START_PADCONF_SAVE; | ||
| 125 | omap_ctrl_writel(control_padconf_off, OMAP343X_CONTROL_PADCONF_OFF); | ||
| 126 | /* wait for the save to complete */ | ||
| 127 | while (!omap_ctrl_readl(OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS) | ||
| 128 | & PADCONF_SAVE_DONE) | ||
| 129 | ; | ||
| 130 | /* Save the Interrupt controller context */ | ||
| 131 | omap_intc_save_context(); | ||
| 132 | /* Save the GPMC context */ | ||
| 133 | omap3_gpmc_save_context(); | ||
| 134 | /* Save the system control module context, padconf already save above*/ | ||
| 135 | omap3_control_save_context(); | ||
| 136 | omap_dma_global_context_save(); | ||
| 137 | } | ||
| 138 | |||
| 139 | static void omap3_core_restore_context(void) | ||
| 140 | { | ||
| 141 | /* Restore the control module context, padconf restored by h/w */ | ||
| 142 | omap3_control_restore_context(); | ||
| 143 | /* Restore the GPMC context */ | ||
| 144 | omap3_gpmc_restore_context(); | ||
| 145 | /* Restore the interrupt controller context */ | ||
| 146 | omap_intc_restore_context(); | ||
| 147 | omap_dma_global_context_restore(); | ||
| 148 | } | ||
| 149 | |||
| 150 | /* | ||
| 151 | * FIXME: This function should be called before entering off-mode after | ||
| 152 | * OMAP3 secure services have been accessed. Currently it is only called | ||
| 153 | * once during boot sequence, but this works as we are not using secure | ||
| 154 | * services. | ||
| 155 | */ | ||
| 156 | static void omap3_save_secure_ram_context(u32 target_mpu_state) | ||
| 157 | { | ||
| 158 | u32 ret; | ||
| 159 | |||
| 160 | if (omap_type() != OMAP2_DEVICE_TYPE_GP) { | ||
| 161 | /* | ||
| 162 | * MPU next state must be set to POWER_ON temporarily, | ||
| 163 | * otherwise the WFI executed inside the ROM code | ||
| 164 | * will hang the system. | ||
| 165 | */ | ||
| 166 | pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON); | ||
| 167 | ret = _omap_save_secure_sram((u32 *) | ||
| 168 | __pa(omap3_secure_ram_storage)); | ||
| 169 | pwrdm_set_next_pwrst(mpu_pwrdm, target_mpu_state); | ||
| 170 | /* Following is for error tracking, it should not happen */ | ||
| 171 | if (ret) { | ||
| 172 | printk(KERN_ERR "save_secure_sram() returns %08x\n", | ||
| 173 | ret); | ||
| 174 | while (1) | ||
| 175 | ; | ||
| 176 | } | ||
| 177 | } | ||
| 178 | } | ||
| 53 | 179 | ||
| 54 | /* | 180 | /* |
| 55 | * PRCM Interrupt Handler Helper Function | 181 | * PRCM Interrupt Handler Helper Function |
| @@ -161,7 +287,36 @@ static irqreturn_t prcm_interrupt_handler (int irq, void *dev_id) | |||
| 161 | return IRQ_HANDLED; | 287 | return IRQ_HANDLED; |
| 162 | } | 288 | } |
| 163 | 289 | ||
| 164 | static void omap_sram_idle(void) | 290 | static void restore_control_register(u32 val) |
| 291 | { | ||
| 292 | __asm__ __volatile__ ("mcr p15, 0, %0, c1, c0, 0" : : "r" (val)); | ||
| 293 | } | ||
| 294 | |||
| 295 | /* Function to restore the table entry that was modified for enabling MMU */ | ||
| 296 | static void restore_table_entry(void) | ||
| 297 | { | ||
| 298 | u32 *scratchpad_address; | ||
| 299 | u32 previous_value, control_reg_value; | ||
| 300 | u32 *address; | ||
| 301 | |||
| 302 | scratchpad_address = OMAP2_L4_IO_ADDRESS(OMAP343X_SCRATCHPAD); | ||
| 303 | |||
| 304 | /* Get address of entry that was modified */ | ||
| 305 | address = (u32 *)__raw_readl(scratchpad_address + | ||
| 306 | OMAP343X_TABLE_ADDRESS_OFFSET); | ||
| 307 | /* Get the previous value which needs to be restored */ | ||
| 308 | previous_value = __raw_readl(scratchpad_address + | ||
| 309 | OMAP343X_TABLE_VALUE_OFFSET); | ||
| 310 | address = __va(address); | ||
| 311 | *address = previous_value; | ||
| 312 | flush_tlb_all(); | ||
| 313 | control_reg_value = __raw_readl(scratchpad_address | ||
| 314 | + OMAP343X_CONTROL_REG_VALUE_OFFSET); | ||
| 315 | /* This will enable caches and prediction */ | ||
| 316 | restore_control_register(control_reg_value); | ||
| 317 | } | ||
| 318 | |||
| 319 | void omap_sram_idle(void) | ||
| 165 | { | 320 | { |
| 166 | /* Variable to tell what needs to be saved and restored | 321 | /* Variable to tell what needs to be saved and restored |
| 167 | * in omap_sram_idle*/ | 322 | * in omap_sram_idle*/ |
| @@ -169,17 +324,32 @@ static void omap_sram_idle(void) | |||
| 169 | /* save_state = 1 => Only L1 and logic lost */ | 324 | /* save_state = 1 => Only L1 and logic lost */ |
| 170 | /* save_state = 2 => Only L2 lost */ | 325 | /* save_state = 2 => Only L2 lost */ |
| 171 | /* save_state = 3 => L1, L2 and logic lost */ | 326 | /* save_state = 3 => L1, L2 and logic lost */ |
| 172 | int save_state = 0, mpu_next_state; | 327 | int save_state = 0; |
| 328 | int mpu_next_state = PWRDM_POWER_ON; | ||
| 329 | int per_next_state = PWRDM_POWER_ON; | ||
| 330 | int core_next_state = PWRDM_POWER_ON; | ||
| 331 | int core_prev_state, per_prev_state; | ||
| 332 | u32 sdrc_pwr = 0; | ||
| 333 | int per_state_modified = 0; | ||
| 173 | 334 | ||
| 174 | if (!_omap_sram_idle) | 335 | if (!_omap_sram_idle) |
| 175 | return; | 336 | return; |
| 176 | 337 | ||
| 338 | pwrdm_clear_all_prev_pwrst(mpu_pwrdm); | ||
| 339 | pwrdm_clear_all_prev_pwrst(neon_pwrdm); | ||
| 340 | pwrdm_clear_all_prev_pwrst(core_pwrdm); | ||
| 341 | pwrdm_clear_all_prev_pwrst(per_pwrdm); | ||
| 342 | |||
| 177 | mpu_next_state = pwrdm_read_next_pwrst(mpu_pwrdm); | 343 | mpu_next_state = pwrdm_read_next_pwrst(mpu_pwrdm); |
| 178 | switch (mpu_next_state) { | 344 | switch (mpu_next_state) { |
| 345 | case PWRDM_POWER_ON: | ||
| 179 | case PWRDM_POWER_RET: | 346 | case PWRDM_POWER_RET: |
| 180 | /* No need to save context */ | 347 | /* No need to save context */ |
| 181 | save_state = 0; | 348 | save_state = 0; |
| 182 | break; | 349 | break; |
| 350 | case PWRDM_POWER_OFF: | ||
| 351 | save_state = 3; | ||
| 352 | break; | ||
| 183 | default: | 353 | default: |
| 184 | /* Invalid state */ | 354 | /* Invalid state */ |
| 185 | printk(KERN_ERR "Invalid mpu state in sram_idle\n"); | 355 | printk(KERN_ERR "Invalid mpu state in sram_idle\n"); |
| @@ -187,68 +357,115 @@ static void omap_sram_idle(void) | |||
| 187 | } | 357 | } |
| 188 | pwrdm_pre_transition(); | 358 | pwrdm_pre_transition(); |
| 189 | 359 | ||
| 190 | omap2_gpio_prepare_for_retention(); | 360 | /* NEON control */ |
| 191 | omap_uart_prepare_idle(0); | 361 | if (pwrdm_read_pwrst(neon_pwrdm) == PWRDM_POWER_ON) |
| 192 | omap_uart_prepare_idle(1); | 362 | pwrdm_set_next_pwrst(neon_pwrdm, mpu_next_state); |
| 193 | omap_uart_prepare_idle(2); | 363 | |
| 364 | /* PER */ | ||
| 365 | per_next_state = pwrdm_read_next_pwrst(per_pwrdm); | ||
| 366 | core_next_state = pwrdm_read_next_pwrst(core_pwrdm); | ||
| 367 | if (per_next_state < PWRDM_POWER_ON) { | ||
| 368 | omap_uart_prepare_idle(2); | ||
| 369 | omap2_gpio_prepare_for_retention(); | ||
| 370 | if (per_next_state == PWRDM_POWER_OFF) { | ||
| 371 | if (core_next_state == PWRDM_POWER_ON) { | ||
| 372 | per_next_state = PWRDM_POWER_RET; | ||
| 373 | pwrdm_set_next_pwrst(per_pwrdm, per_next_state); | ||
| 374 | per_state_modified = 1; | ||
| 375 | } else | ||
| 376 | omap3_per_save_context(); | ||
| 377 | } | ||
| 378 | } | ||
| 379 | |||
| 380 | if (pwrdm_read_pwrst(cam_pwrdm) == PWRDM_POWER_ON) | ||
| 381 | omap2_clkdm_deny_idle(mpu_pwrdm->pwrdm_clkdms[0]); | ||
| 382 | |||
| 383 | /* CORE */ | ||
| 384 | if (core_next_state < PWRDM_POWER_ON) { | ||
| 385 | omap_uart_prepare_idle(0); | ||
| 386 | omap_uart_prepare_idle(1); | ||
| 387 | if (core_next_state == PWRDM_POWER_OFF) { | ||
| 388 | omap3_core_save_context(); | ||
| 389 | omap3_prcm_save_context(); | ||
| 390 | } | ||
| 391 | /* Enable IO-PAD and IO-CHAIN wakeups */ | ||
| 392 | prm_set_mod_reg_bits(OMAP3430_EN_IO, WKUP_MOD, PM_WKEN); | ||
| 393 | omap3_enable_io_chain(); | ||
| 394 | } | ||
| 395 | |||
| 396 | /* | ||
| 397 | * On EMU/HS devices ROM code restores a SRDC value | ||
| 398 | * from scratchpad which has automatic self refresh on timeout | ||
| 399 | * of AUTO_CNT = 1 enabled. This takes care of errata 1.142. | ||
| 400 | * Hence store/restore the SDRC_POWER register here. | ||
| 401 | */ | ||
| 402 | if (omap_rev() >= OMAP3430_REV_ES3_0 && | ||
| 403 | omap_type() != OMAP2_DEVICE_TYPE_GP && | ||
| 404 | core_next_state == PWRDM_POWER_OFF) | ||
| 405 | sdrc_pwr = sdrc_read_reg(SDRC_POWER); | ||
| 194 | 406 | ||
| 195 | _omap_sram_idle(NULL, save_state); | 407 | /* |
| 408 | * omap3_arm_context is the location where ARM registers | ||
| 409 | * get saved. The restore path then reads from this | ||
| 410 | * location and restores them back. | ||
| 411 | */ | ||
| 412 | _omap_sram_idle(omap3_arm_context, save_state); | ||
| 196 | cpu_init(); | 413 | cpu_init(); |
| 197 | 414 | ||
| 198 | omap_uart_resume_idle(2); | 415 | /* Restore normal SDRC POWER settings */ |
| 199 | omap_uart_resume_idle(1); | 416 | if (omap_rev() >= OMAP3430_REV_ES3_0 && |
| 200 | omap_uart_resume_idle(0); | 417 | omap_type() != OMAP2_DEVICE_TYPE_GP && |
| 201 | omap2_gpio_resume_after_retention(); | 418 | core_next_state == PWRDM_POWER_OFF) |
| 419 | sdrc_write_reg(sdrc_pwr, SDRC_POWER); | ||
| 420 | |||
| 421 | /* Restore table entry modified during MMU restoration */ | ||
| 422 | if (pwrdm_read_prev_pwrst(mpu_pwrdm) == PWRDM_POWER_OFF) | ||
| 423 | restore_table_entry(); | ||
| 424 | |||
| 425 | /* CORE */ | ||
| 426 | if (core_next_state < PWRDM_POWER_ON) { | ||
| 427 | core_prev_state = pwrdm_read_prev_pwrst(core_pwrdm); | ||
| 428 | if (core_prev_state == PWRDM_POWER_OFF) { | ||
| 429 | omap3_core_restore_context(); | ||
| 430 | omap3_prcm_restore_context(); | ||
| 431 | omap3_sram_restore_context(); | ||
| 432 | omap2_sms_restore_context(); | ||
| 433 | } | ||
| 434 | omap_uart_resume_idle(0); | ||
| 435 | omap_uart_resume_idle(1); | ||
| 436 | if (core_next_state == PWRDM_POWER_OFF) | ||
| 437 | prm_clear_mod_reg_bits(OMAP3430_AUTO_OFF, | ||
| 438 | OMAP3430_GR_MOD, | ||
| 439 | OMAP3_PRM_VOLTCTRL_OFFSET); | ||
| 440 | } | ||
| 202 | 441 | ||
| 203 | pwrdm_post_transition(); | 442 | /* PER */ |
| 443 | if (per_next_state < PWRDM_POWER_ON) { | ||
| 444 | per_prev_state = pwrdm_read_prev_pwrst(per_pwrdm); | ||
| 445 | if (per_prev_state == PWRDM_POWER_OFF) | ||
| 446 | omap3_per_restore_context(); | ||
| 447 | omap2_gpio_resume_after_retention(); | ||
| 448 | omap_uart_resume_idle(2); | ||
| 449 | if (per_state_modified) | ||
| 450 | pwrdm_set_next_pwrst(per_pwrdm, PWRDM_POWER_OFF); | ||
| 451 | } | ||
| 204 | 452 | ||
| 205 | } | 453 | /* Disable IO-PAD and IO-CHAIN wakeup */ |
| 454 | if (core_next_state < PWRDM_POWER_ON) { | ||
| 455 | prm_clear_mod_reg_bits(OMAP3430_EN_IO, WKUP_MOD, PM_WKEN); | ||
| 456 | omap3_disable_io_chain(); | ||
| 457 | } | ||
| 206 | 458 | ||
| 207 | /* | 459 | pwrdm_post_transition(); |
| 208 | * Check if functional clocks are enabled before entering | ||
| 209 | * sleep. This function could be behind CONFIG_PM_DEBUG | ||
| 210 | * when all drivers are configuring their sysconfig registers | ||
| 211 | * properly and using their clocks properly. | ||
| 212 | */ | ||
| 213 | static int omap3_fclks_active(void) | ||
| 214 | { | ||
| 215 | u32 fck_core1 = 0, fck_core3 = 0, fck_sgx = 0, fck_dss = 0, | ||
| 216 | fck_cam = 0, fck_per = 0, fck_usbhost = 0; | ||
| 217 | 460 | ||
| 218 | fck_core1 = cm_read_mod_reg(CORE_MOD, | 461 | omap2_clkdm_allow_idle(mpu_pwrdm->pwrdm_clkdms[0]); |
| 219 | CM_FCLKEN1); | ||
| 220 | if (omap_rev() > OMAP3430_REV_ES1_0) { | ||
| 221 | fck_core3 = cm_read_mod_reg(CORE_MOD, | ||
| 222 | OMAP3430ES2_CM_FCLKEN3); | ||
| 223 | fck_sgx = cm_read_mod_reg(OMAP3430ES2_SGX_MOD, | ||
| 224 | CM_FCLKEN); | ||
| 225 | fck_usbhost = cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, | ||
| 226 | CM_FCLKEN); | ||
| 227 | } else | ||
| 228 | fck_sgx = cm_read_mod_reg(GFX_MOD, | ||
| 229 | OMAP3430ES2_CM_FCLKEN3); | ||
| 230 | fck_dss = cm_read_mod_reg(OMAP3430_DSS_MOD, | ||
| 231 | CM_FCLKEN); | ||
| 232 | fck_cam = cm_read_mod_reg(OMAP3430_CAM_MOD, | ||
| 233 | CM_FCLKEN); | ||
| 234 | fck_per = cm_read_mod_reg(OMAP3430_PER_MOD, | ||
| 235 | CM_FCLKEN); | ||
| 236 | |||
| 237 | /* Ignore UART clocks. These are handled by UART core (serial.c) */ | ||
| 238 | fck_core1 &= ~(OMAP3430_EN_UART1 | OMAP3430_EN_UART2); | ||
| 239 | fck_per &= ~OMAP3430_EN_UART3; | ||
| 240 | |||
| 241 | if (fck_core1 | fck_core3 | fck_sgx | fck_dss | | ||
| 242 | fck_cam | fck_per | fck_usbhost) | ||
| 243 | return 1; | ||
| 244 | return 0; | ||
| 245 | } | 462 | } |
| 246 | 463 | ||
| 247 | static int omap3_can_sleep(void) | 464 | int omap3_can_sleep(void) |
| 248 | { | 465 | { |
| 249 | if (!omap_uart_can_sleep()) | 466 | if (!sleep_while_idle) |
| 250 | return 0; | 467 | return 0; |
| 251 | if (omap3_fclks_active()) | 468 | if (!omap_uart_can_sleep()) |
| 252 | return 0; | 469 | return 0; |
| 253 | return 1; | 470 | return 1; |
| 254 | } | 471 | } |
| @@ -256,7 +473,7 @@ static int omap3_can_sleep(void) | |||
| 256 | /* This sets pwrdm state (other than mpu & core. Currently only ON & | 473 | /* This sets pwrdm state (other than mpu & core. Currently only ON & |
| 257 | * RET are supported. Function is assuming that clkdm doesn't have | 474 | * RET are supported. Function is assuming that clkdm doesn't have |
| 258 | * hw_sup mode enabled. */ | 475 | * hw_sup mode enabled. */ |
| 259 | static int set_pwrdm_state(struct powerdomain *pwrdm, u32 state) | 476 | int set_pwrdm_state(struct powerdomain *pwrdm, u32 state) |
| 260 | { | 477 | { |
| 261 | u32 cur_state; | 478 | u32 cur_state; |
| 262 | int sleep_switch = 0; | 479 | int sleep_switch = 0; |
| @@ -306,7 +523,7 @@ static void omap3_pm_idle(void) | |||
| 306 | if (!omap3_can_sleep()) | 523 | if (!omap3_can_sleep()) |
| 307 | goto out; | 524 | goto out; |
| 308 | 525 | ||
| 309 | if (omap_irq_pending()) | 526 | if (omap_irq_pending() || need_resched()) |
| 310 | goto out; | 527 | goto out; |
| 311 | 528 | ||
| 312 | omap_sram_idle(); | 529 | omap_sram_idle(); |
| @@ -319,6 +536,22 @@ out: | |||
| 319 | #ifdef CONFIG_SUSPEND | 536 | #ifdef CONFIG_SUSPEND |
| 320 | static suspend_state_t suspend_state; | 537 | static suspend_state_t suspend_state; |
| 321 | 538 | ||
| 539 | static void omap2_pm_wakeup_on_timer(u32 seconds) | ||
| 540 | { | ||
| 541 | u32 tick_rate, cycles; | ||
| 542 | |||
| 543 | if (!seconds) | ||
| 544 | return; | ||
| 545 | |||
| 546 | tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer_wakeup)); | ||
| 547 | cycles = tick_rate * seconds; | ||
| 548 | omap_dm_timer_stop(gptimer_wakeup); | ||
| 549 | omap_dm_timer_set_load_start(gptimer_wakeup, 0, 0xffffffff - cycles); | ||
| 550 | |||
| 551 | pr_info("PM: Resume timer in %d secs (%d ticks at %d ticks/sec.)\n", | ||
| 552 | seconds, cycles, tick_rate); | ||
| 553 | } | ||
| 554 | |||
| 322 | static int omap3_pm_prepare(void) | 555 | static int omap3_pm_prepare(void) |
| 323 | { | 556 | { |
| 324 | disable_hlt(); | 557 | disable_hlt(); |
| @@ -330,6 +563,9 @@ static int omap3_pm_suspend(void) | |||
| 330 | struct power_state *pwrst; | 563 | struct power_state *pwrst; |
| 331 | int state, ret = 0; | 564 | int state, ret = 0; |
| 332 | 565 | ||
| 566 | if (wakeup_timer_seconds) | ||
| 567 | omap2_pm_wakeup_on_timer(wakeup_timer_seconds); | ||
| 568 | |||
| 333 | /* Read current next_pwrsts */ | 569 | /* Read current next_pwrsts */ |
| 334 | list_for_each_entry(pwrst, &pwrst_list, node) | 570 | list_for_each_entry(pwrst, &pwrst_list, node) |
| 335 | pwrst->saved_state = pwrdm_read_next_pwrst(pwrst->pwrdm); | 571 | pwrst->saved_state = pwrdm_read_next_pwrst(pwrst->pwrdm); |
| @@ -690,6 +926,22 @@ static void __init prcm_setup_regs(void) | |||
| 690 | omap3_d2d_idle(); | 926 | omap3_d2d_idle(); |
| 691 | } | 927 | } |
| 692 | 928 | ||
| 929 | void omap3_pm_off_mode_enable(int enable) | ||
| 930 | { | ||
| 931 | struct power_state *pwrst; | ||
| 932 | u32 state; | ||
| 933 | |||
| 934 | if (enable) | ||
| 935 | state = PWRDM_POWER_OFF; | ||
| 936 | else | ||
| 937 | state = PWRDM_POWER_RET; | ||
| 938 | |||
| 939 | list_for_each_entry(pwrst, &pwrst_list, node) { | ||
| 940 | pwrst->next_state = state; | ||
| 941 | set_pwrdm_state(pwrst->pwrdm, state); | ||
| 942 | } | ||
| 943 | } | ||
| 944 | |||
| 693 | int omap3_pm_get_suspend_state(struct powerdomain *pwrdm) | 945 | int omap3_pm_get_suspend_state(struct powerdomain *pwrdm) |
| 694 | { | 946 | { |
| 695 | struct power_state *pwrst; | 947 | struct power_state *pwrst; |
| @@ -749,6 +1001,15 @@ static int __init clkdms_setup(struct clockdomain *clkdm, void *unused) | |||
| 749 | return 0; | 1001 | return 0; |
| 750 | } | 1002 | } |
| 751 | 1003 | ||
| 1004 | void omap_push_sram_idle(void) | ||
| 1005 | { | ||
| 1006 | _omap_sram_idle = omap_sram_push(omap34xx_cpu_suspend, | ||
| 1007 | omap34xx_cpu_suspend_sz); | ||
| 1008 | if (omap_type() != OMAP2_DEVICE_TYPE_GP) | ||
| 1009 | _omap_save_secure_sram = omap_sram_push(save_secure_ram_context, | ||
| 1010 | save_secure_ram_context_sz); | ||
| 1011 | } | ||
| 1012 | |||
| 752 | static int __init omap3_pm_init(void) | 1013 | static int __init omap3_pm_init(void) |
| 753 | { | 1014 | { |
| 754 | struct power_state *pwrst, *tmp; | 1015 | struct power_state *pwrst, *tmp; |
| @@ -786,15 +1047,47 @@ static int __init omap3_pm_init(void) | |||
| 786 | goto err2; | 1047 | goto err2; |
| 787 | } | 1048 | } |
| 788 | 1049 | ||
| 789 | _omap_sram_idle = omap_sram_push(omap34xx_cpu_suspend, | 1050 | neon_pwrdm = pwrdm_lookup("neon_pwrdm"); |
| 790 | omap34xx_cpu_suspend_sz); | 1051 | per_pwrdm = pwrdm_lookup("per_pwrdm"); |
| 1052 | core_pwrdm = pwrdm_lookup("core_pwrdm"); | ||
| 1053 | cam_pwrdm = pwrdm_lookup("cam_pwrdm"); | ||
| 791 | 1054 | ||
| 1055 | omap_push_sram_idle(); | ||
| 792 | #ifdef CONFIG_SUSPEND | 1056 | #ifdef CONFIG_SUSPEND |
| 793 | suspend_set_ops(&omap_pm_ops); | 1057 | suspend_set_ops(&omap_pm_ops); |
| 794 | #endif /* CONFIG_SUSPEND */ | 1058 | #endif /* CONFIG_SUSPEND */ |
| 795 | 1059 | ||
| 796 | pm_idle = omap3_pm_idle; | 1060 | pm_idle = omap3_pm_idle; |
| 1061 | omap3_idle_init(); | ||
| 1062 | |||
| 1063 | pwrdm_add_wkdep(neon_pwrdm, mpu_pwrdm); | ||
| 1064 | /* | ||
| 1065 | * REVISIT: This wkdep is only necessary when GPIO2-6 are enabled for | ||
| 1066 | * IO-pad wakeup. Otherwise it will unnecessarily waste power | ||
| 1067 | * waking up PER with every CORE wakeup - see | ||
| 1068 | * http://marc.info/?l=linux-omap&m=121852150710062&w=2 | ||
| 1069 | */ | ||
| 1070 | pwrdm_add_wkdep(per_pwrdm, core_pwrdm); | ||
| 1071 | |||
| 1072 | if (omap_type() != OMAP2_DEVICE_TYPE_GP) { | ||
| 1073 | omap3_secure_ram_storage = | ||
| 1074 | kmalloc(0x803F, GFP_KERNEL); | ||
| 1075 | if (!omap3_secure_ram_storage) | ||
| 1076 | printk(KERN_ERR "Memory allocation failed when" | ||
| 1077 | "allocating for secure sram context\n"); | ||
| 1078 | |||
| 1079 | local_irq_disable(); | ||
| 1080 | local_fiq_disable(); | ||
| 1081 | |||
| 1082 | omap_dma_global_context_save(); | ||
| 1083 | omap3_save_secure_ram_context(PWRDM_POWER_ON); | ||
| 1084 | omap_dma_global_context_restore(); | ||
| 1085 | |||
| 1086 | local_irq_enable(); | ||
| 1087 | local_fiq_enable(); | ||
| 1088 | } | ||
| 797 | 1089 | ||
| 1090 | omap3_save_scratchpad_contents(); | ||
| 798 | err1: | 1091 | err1: |
| 799 | return ret; | 1092 | return ret; |
| 800 | err2: | 1093 | err2: |
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index f00289abd30..b6990e37778 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c | |||
| @@ -31,9 +31,9 @@ | |||
| 31 | #include "prm.h" | 31 | #include "prm.h" |
| 32 | #include "prm-regbits-34xx.h" | 32 | #include "prm-regbits-34xx.h" |
| 33 | 33 | ||
| 34 | #include <mach/cpu.h> | 34 | #include <plat/cpu.h> |
| 35 | #include <mach/powerdomain.h> | 35 | #include <plat/powerdomain.h> |
| 36 | #include <mach/clockdomain.h> | 36 | #include <plat/clockdomain.h> |
| 37 | 37 | ||
| 38 | #include "pm.h" | 38 | #include "pm.h" |
| 39 | 39 | ||
diff --git a/arch/arm/mach-omap2/powerdomains.h b/arch/arm/mach-omap2/powerdomains.h index 691470ea4c6..057b2e3e2c3 100644 --- a/arch/arm/mach-omap2/powerdomains.h +++ b/arch/arm/mach-omap2/powerdomains.h | |||
| @@ -63,7 +63,7 @@ | |||
| 63 | * XXX encode hardware fixed wakeup dependencies -- esp. for 3430 CORE | 63 | * XXX encode hardware fixed wakeup dependencies -- esp. for 3430 CORE |
| 64 | */ | 64 | */ |
| 65 | 65 | ||
| 66 | #include <mach/powerdomain.h> | 66 | #include <plat/powerdomain.h> |
| 67 | 67 | ||
| 68 | #include "prcm-common.h" | 68 | #include "prcm-common.h" |
| 69 | #include "prm.h" | 69 | #include "prm.h" |
diff --git a/arch/arm/mach-omap2/powerdomains24xx.h b/arch/arm/mach-omap2/powerdomains24xx.h index 9f08dc3f7fd..bd249a495aa 100644 --- a/arch/arm/mach-omap2/powerdomains24xx.h +++ b/arch/arm/mach-omap2/powerdomains24xx.h | |||
| @@ -20,7 +20,7 @@ | |||
| 20 | * the array in mach-omap2/powerdomains.h. | 20 | * the array in mach-omap2/powerdomains.h. |
| 21 | */ | 21 | */ |
| 22 | 22 | ||
| 23 | #include <mach/powerdomain.h> | 23 | #include <plat/powerdomain.h> |
| 24 | 24 | ||
| 25 | #include "prcm-common.h" | 25 | #include "prcm-common.h" |
| 26 | #include "prm.h" | 26 | #include "prm.h" |
diff --git a/arch/arm/mach-omap2/powerdomains34xx.h b/arch/arm/mach-omap2/powerdomains34xx.h index 4dcf94b800a..fd09b0827df 100644 --- a/arch/arm/mach-omap2/powerdomains34xx.h +++ b/arch/arm/mach-omap2/powerdomains34xx.h | |||
| @@ -20,7 +20,7 @@ | |||
| 20 | * the array in mach-omap2/powerdomains.h. | 20 | * the array in mach-omap2/powerdomains.h. |
| 21 | */ | 21 | */ |
| 22 | 22 | ||
| 23 | #include <mach/powerdomain.h> | 23 | #include <plat/powerdomain.h> |
| 24 | 24 | ||
| 25 | #include "prcm-common.h" | 25 | #include "prcm-common.h" |
| 26 | #include "prm.h" | 26 | #include "prm.h" |
| @@ -338,7 +338,13 @@ static struct powerdomain usbhost_pwrdm = { | |||
| 338 | .sleepdep_srcs = dss_per_usbhost_sleepdeps, | 338 | .sleepdep_srcs = dss_per_usbhost_sleepdeps, |
| 339 | .pwrsts = PWRSTS_OFF_RET_ON, | 339 | .pwrsts = PWRSTS_OFF_RET_ON, |
| 340 | .pwrsts_logic_ret = PWRDM_POWER_RET, | 340 | .pwrsts_logic_ret = PWRDM_POWER_RET, |
| 341 | .flags = PWRDM_HAS_HDWR_SAR, /* for USBHOST ctrlr only */ | 341 | /* |
| 342 | * REVISIT: Enabling usb host save and restore mechanism seems to | ||
| 343 | * leave the usb host domain permanently in ACTIVE mode after | ||
| 344 | * changing the usb host power domain state from OFF to active once. | ||
| 345 | * Disabling for now. | ||
| 346 | */ | ||
| 347 | /*.flags = PWRDM_HAS_HDWR_SAR,*/ /* for USBHOST ctrlr only */ | ||
| 342 | .banks = 1, | 348 | .banks = 1, |
| 343 | .pwrsts_mem_ret = { | 349 | .pwrsts_mem_ret = { |
| 344 | [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ | 350 | [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ |
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index ced555a4cd1..029d376198d 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c | |||
| @@ -7,6 +7,9 @@ | |||
| 7 | * | 7 | * |
| 8 | * Written by Tony Lindgren <tony.lindgren@nokia.com> | 8 | * Written by Tony Lindgren <tony.lindgren@nokia.com> |
| 9 | * | 9 | * |
| 10 | * Copyright (C) 2007 Texas Instruments, Inc. | ||
| 11 | * Rajendra Nayak <rnayak@ti.com> | ||
| 12 | * | ||
| 10 | * Some pieces of code Copyright (C) 2005 Texas Instruments, Inc. | 13 | * Some pieces of code Copyright (C) 2005 Texas Instruments, Inc. |
| 11 | * | 14 | * |
| 12 | * This program is free software; you can redistribute it and/or modify | 15 | * This program is free software; you can redistribute it and/or modify |
| @@ -19,10 +22,13 @@ | |||
| 19 | #include <linux/io.h> | 22 | #include <linux/io.h> |
| 20 | #include <linux/delay.h> | 23 | #include <linux/delay.h> |
| 21 | 24 | ||
| 22 | #include <mach/common.h> | 25 | #include <plat/common.h> |
| 23 | #include <mach/prcm.h> | 26 | #include <plat/prcm.h> |
| 27 | #include <plat/irqs.h> | ||
| 28 | #include <plat/control.h> | ||
| 24 | 29 | ||
| 25 | #include "clock.h" | 30 | #include "clock.h" |
| 31 | #include "cm.h" | ||
| 26 | #include "prm.h" | 32 | #include "prm.h" |
| 27 | #include "prm-regbits-24xx.h" | 33 | #include "prm-regbits-24xx.h" |
| 28 | 34 | ||
| @@ -31,6 +37,89 @@ static void __iomem *cm_base; | |||
| 31 | 37 | ||
| 32 | #define MAX_MODULE_ENABLE_WAIT 100000 | 38 | #define MAX_MODULE_ENABLE_WAIT 100000 |
| 33 | 39 | ||
| 40 | struct omap3_prcm_regs { | ||
| 41 | u32 control_padconf_sys_nirq; | ||
| 42 | u32 iva2_cm_clksel1; | ||
| 43 | u32 iva2_cm_clksel2; | ||
| 44 | u32 cm_sysconfig; | ||
| 45 | u32 sgx_cm_clksel; | ||
| 46 | u32 wkup_cm_clksel; | ||
| 47 | u32 dss_cm_clksel; | ||
| 48 | u32 cam_cm_clksel; | ||
| 49 | u32 per_cm_clksel; | ||
| 50 | u32 emu_cm_clksel; | ||
| 51 | u32 emu_cm_clkstctrl; | ||
| 52 | u32 pll_cm_autoidle2; | ||
| 53 | u32 pll_cm_clksel4; | ||
| 54 | u32 pll_cm_clksel5; | ||
| 55 | u32 pll_cm_clken; | ||
| 56 | u32 pll_cm_clken2; | ||
| 57 | u32 cm_polctrl; | ||
| 58 | u32 iva2_cm_fclken; | ||
| 59 | u32 iva2_cm_clken_pll; | ||
| 60 | u32 core_cm_fclken1; | ||
| 61 | u32 core_cm_fclken3; | ||
| 62 | u32 sgx_cm_fclken; | ||
| 63 | u32 wkup_cm_fclken; | ||
| 64 | u32 dss_cm_fclken; | ||
| 65 | u32 cam_cm_fclken; | ||
| 66 | u32 per_cm_fclken; | ||
| 67 | u32 usbhost_cm_fclken; | ||
| 68 | u32 core_cm_iclken1; | ||
| 69 | u32 core_cm_iclken2; | ||
| 70 | u32 core_cm_iclken3; | ||
| 71 | u32 sgx_cm_iclken; | ||
| 72 | u32 wkup_cm_iclken; | ||
| 73 | u32 dss_cm_iclken; | ||
| 74 | u32 cam_cm_iclken; | ||
| 75 | u32 per_cm_iclken; | ||
| 76 | u32 usbhost_cm_iclken; | ||
| 77 | u32 iva2_cm_autiidle2; | ||
| 78 | u32 mpu_cm_autoidle2; | ||
| 79 | u32 pll_cm_autoidle; | ||
| 80 | u32 iva2_cm_clkstctrl; | ||
| 81 | u32 mpu_cm_clkstctrl; | ||
| 82 | u32 core_cm_clkstctrl; | ||
| 83 | u32 sgx_cm_clkstctrl; | ||
| 84 | u32 dss_cm_clkstctrl; | ||
| 85 | u32 cam_cm_clkstctrl; | ||
| 86 | u32 per_cm_clkstctrl; | ||
| 87 | u32 neon_cm_clkstctrl; | ||
| 88 | u32 usbhost_cm_clkstctrl; | ||
| 89 | u32 core_cm_autoidle1; | ||
| 90 | u32 core_cm_autoidle2; | ||
| 91 | u32 core_cm_autoidle3; | ||
| 92 | u32 wkup_cm_autoidle; | ||
| 93 | u32 dss_cm_autoidle; | ||
| 94 | u32 cam_cm_autoidle; | ||
| 95 | u32 per_cm_autoidle; | ||
| 96 | u32 usbhost_cm_autoidle; | ||
| 97 | u32 sgx_cm_sleepdep; | ||
| 98 | u32 dss_cm_sleepdep; | ||
| 99 | u32 cam_cm_sleepdep; | ||
| 100 | u32 per_cm_sleepdep; | ||
| 101 | u32 usbhost_cm_sleepdep; | ||
| 102 | u32 cm_clkout_ctrl; | ||
| 103 | u32 prm_clkout_ctrl; | ||
| 104 | u32 sgx_pm_wkdep; | ||
| 105 | u32 dss_pm_wkdep; | ||
| 106 | u32 cam_pm_wkdep; | ||
| 107 | u32 per_pm_wkdep; | ||
| 108 | u32 neon_pm_wkdep; | ||
| 109 | u32 usbhost_pm_wkdep; | ||
| 110 | u32 core_pm_mpugrpsel1; | ||
| 111 | u32 iva2_pm_ivagrpsel1; | ||
| 112 | u32 core_pm_mpugrpsel3; | ||
| 113 | u32 core_pm_ivagrpsel3; | ||
| 114 | u32 wkup_pm_mpugrpsel; | ||
| 115 | u32 wkup_pm_ivagrpsel; | ||
| 116 | u32 per_pm_mpugrpsel; | ||
| 117 | u32 per_pm_ivagrpsel; | ||
| 118 | u32 wkup_pm_wken; | ||
| 119 | }; | ||
| 120 | |||
| 121 | struct omap3_prcm_regs prcm_context; | ||
| 122 | |||
| 34 | u32 omap_prcm_get_reset_sources(void) | 123 | u32 omap_prcm_get_reset_sources(void) |
| 35 | { | 124 | { |
| 36 | /* XXX This presumably needs modification for 34XX */ | 125 | /* XXX This presumably needs modification for 34XX */ |
| @@ -46,9 +135,18 @@ void omap_prcm_arch_reset(char mode) | |||
| 46 | 135 | ||
| 47 | if (cpu_is_omap24xx()) | 136 | if (cpu_is_omap24xx()) |
| 48 | prcm_offs = WKUP_MOD; | 137 | prcm_offs = WKUP_MOD; |
| 49 | else if (cpu_is_omap34xx()) | 138 | else if (cpu_is_omap34xx()) { |
| 139 | u32 l; | ||
| 140 | |||
| 50 | prcm_offs = OMAP3430_GR_MOD; | 141 | prcm_offs = OMAP3430_GR_MOD; |
| 51 | else | 142 | l = ('B' << 24) | ('M' << 16) | mode; |
| 143 | /* Reserve the first word in scratchpad for communicating | ||
| 144 | * with the boot ROM. A pointer to a data structure | ||
| 145 | * describing the boot process can be stored there, | ||
| 146 | * cf. OMAP34xx TRM, Initialization / Software Booting | ||
| 147 | * Configuration. */ | ||
| 148 | omap_writel(l, OMAP343X_SCRATCHPAD + 4); | ||
| 149 | } else | ||
| 52 | WARN_ON(1); | 150 | WARN_ON(1); |
| 53 | 151 | ||
| 54 | prm_set_mod_reg_bits(OMAP_RST_DPLL3, prcm_offs, RM_RSTCTRL); | 152 | prm_set_mod_reg_bits(OMAP_RST_DPLL3, prcm_offs, RM_RSTCTRL); |
| @@ -168,3 +266,308 @@ void __init omap2_set_globals_prcm(struct omap_globals *omap2_globals) | |||
| 168 | prm_base = omap2_globals->prm; | 266 | prm_base = omap2_globals->prm; |
| 169 | cm_base = omap2_globals->cm; | 267 | cm_base = omap2_globals->cm; |
| 170 | } | 268 | } |
| 269 | |||
| 270 | #ifdef CONFIG_ARCH_OMAP3 | ||
| 271 | void omap3_prcm_save_context(void) | ||
| 272 | { | ||
| 273 | prcm_context.control_padconf_sys_nirq = | ||
| 274 | omap_ctrl_readl(OMAP343X_CONTROL_PADCONF_SYSNIRQ); | ||
| 275 | prcm_context.iva2_cm_clksel1 = | ||
| 276 | cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSEL1); | ||
| 277 | prcm_context.iva2_cm_clksel2 = | ||
| 278 | cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSEL2); | ||
| 279 | prcm_context.cm_sysconfig = __raw_readl(OMAP3430_CM_SYSCONFIG); | ||
| 280 | prcm_context.sgx_cm_clksel = | ||
| 281 | cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_CLKSEL); | ||
| 282 | prcm_context.wkup_cm_clksel = cm_read_mod_reg(WKUP_MOD, CM_CLKSEL); | ||
| 283 | prcm_context.dss_cm_clksel = | ||
| 284 | cm_read_mod_reg(OMAP3430_DSS_MOD, CM_CLKSEL); | ||
| 285 | prcm_context.cam_cm_clksel = | ||
| 286 | cm_read_mod_reg(OMAP3430_CAM_MOD, CM_CLKSEL); | ||
| 287 | prcm_context.per_cm_clksel = | ||
| 288 | cm_read_mod_reg(OMAP3430_PER_MOD, CM_CLKSEL); | ||
| 289 | prcm_context.emu_cm_clksel = | ||
| 290 | cm_read_mod_reg(OMAP3430_EMU_MOD, CM_CLKSEL1); | ||
| 291 | prcm_context.emu_cm_clkstctrl = | ||
| 292 | cm_read_mod_reg(OMAP3430_EMU_MOD, CM_CLKSTCTRL); | ||
| 293 | prcm_context.pll_cm_autoidle2 = | ||
| 294 | cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE2); | ||
| 295 | prcm_context.pll_cm_clksel4 = | ||
| 296 | cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL4); | ||
| 297 | prcm_context.pll_cm_clksel5 = | ||
| 298 | cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL5); | ||
| 299 | prcm_context.pll_cm_clken = | ||
| 300 | cm_read_mod_reg(PLL_MOD, CM_CLKEN); | ||
| 301 | prcm_context.pll_cm_clken2 = | ||
| 302 | cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKEN2); | ||
| 303 | prcm_context.cm_polctrl = __raw_readl(OMAP3430_CM_POLCTRL); | ||
| 304 | prcm_context.iva2_cm_fclken = | ||
| 305 | cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_FCLKEN); | ||
| 306 | prcm_context.iva2_cm_clken_pll = cm_read_mod_reg(OMAP3430_IVA2_MOD, | ||
| 307 | OMAP3430_CM_CLKEN_PLL); | ||
| 308 | prcm_context.core_cm_fclken1 = | ||
| 309 | cm_read_mod_reg(CORE_MOD, CM_FCLKEN1); | ||
| 310 | prcm_context.core_cm_fclken3 = | ||
| 311 | cm_read_mod_reg(CORE_MOD, OMAP3430ES2_CM_FCLKEN3); | ||
| 312 | prcm_context.sgx_cm_fclken = | ||
| 313 | cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_FCLKEN); | ||
| 314 | prcm_context.wkup_cm_fclken = | ||
| 315 | cm_read_mod_reg(WKUP_MOD, CM_FCLKEN); | ||
| 316 | prcm_context.dss_cm_fclken = | ||
| 317 | cm_read_mod_reg(OMAP3430_DSS_MOD, CM_FCLKEN); | ||
| 318 | prcm_context.cam_cm_fclken = | ||
| 319 | cm_read_mod_reg(OMAP3430_CAM_MOD, CM_FCLKEN); | ||
| 320 | prcm_context.per_cm_fclken = | ||
| 321 | cm_read_mod_reg(OMAP3430_PER_MOD, CM_FCLKEN); | ||
| 322 | prcm_context.usbhost_cm_fclken = | ||
| 323 | cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN); | ||
| 324 | prcm_context.core_cm_iclken1 = | ||
| 325 | cm_read_mod_reg(CORE_MOD, CM_ICLKEN1); | ||
| 326 | prcm_context.core_cm_iclken2 = | ||
| 327 | cm_read_mod_reg(CORE_MOD, CM_ICLKEN2); | ||
| 328 | prcm_context.core_cm_iclken3 = | ||
| 329 | cm_read_mod_reg(CORE_MOD, CM_ICLKEN3); | ||
| 330 | prcm_context.sgx_cm_iclken = | ||
| 331 | cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_ICLKEN); | ||
| 332 | prcm_context.wkup_cm_iclken = | ||
| 333 | cm_read_mod_reg(WKUP_MOD, CM_ICLKEN); | ||
| 334 | prcm_context.dss_cm_iclken = | ||
| 335 | cm_read_mod_reg(OMAP3430_DSS_MOD, CM_ICLKEN); | ||
| 336 | prcm_context.cam_cm_iclken = | ||
| 337 | cm_read_mod_reg(OMAP3430_CAM_MOD, CM_ICLKEN); | ||
| 338 | prcm_context.per_cm_iclken = | ||
| 339 | cm_read_mod_reg(OMAP3430_PER_MOD, CM_ICLKEN); | ||
| 340 | prcm_context.usbhost_cm_iclken = | ||
| 341 | cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, CM_ICLKEN); | ||
| 342 | prcm_context.iva2_cm_autiidle2 = | ||
| 343 | cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_AUTOIDLE2); | ||
| 344 | prcm_context.mpu_cm_autoidle2 = | ||
| 345 | cm_read_mod_reg(MPU_MOD, CM_AUTOIDLE2); | ||
| 346 | prcm_context.pll_cm_autoidle = | ||
| 347 | cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE); | ||
| 348 | prcm_context.iva2_cm_clkstctrl = | ||
| 349 | cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSTCTRL); | ||
| 350 | prcm_context.mpu_cm_clkstctrl = | ||
| 351 | cm_read_mod_reg(MPU_MOD, CM_CLKSTCTRL); | ||
| 352 | prcm_context.core_cm_clkstctrl = | ||
| 353 | cm_read_mod_reg(CORE_MOD, CM_CLKSTCTRL); | ||
| 354 | prcm_context.sgx_cm_clkstctrl = | ||
| 355 | cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_CLKSTCTRL); | ||
| 356 | prcm_context.dss_cm_clkstctrl = | ||
| 357 | cm_read_mod_reg(OMAP3430_DSS_MOD, CM_CLKSTCTRL); | ||
| 358 | prcm_context.cam_cm_clkstctrl = | ||
| 359 | cm_read_mod_reg(OMAP3430_CAM_MOD, CM_CLKSTCTRL); | ||
| 360 | prcm_context.per_cm_clkstctrl = | ||
| 361 | cm_read_mod_reg(OMAP3430_PER_MOD, CM_CLKSTCTRL); | ||
| 362 | prcm_context.neon_cm_clkstctrl = | ||
| 363 | cm_read_mod_reg(OMAP3430_NEON_MOD, CM_CLKSTCTRL); | ||
| 364 | prcm_context.usbhost_cm_clkstctrl = | ||
| 365 | cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, CM_CLKSTCTRL); | ||
| 366 | prcm_context.core_cm_autoidle1 = | ||
| 367 | cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE1); | ||
| 368 | prcm_context.core_cm_autoidle2 = | ||
| 369 | cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE2); | ||
| 370 | prcm_context.core_cm_autoidle3 = | ||
| 371 | cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE3); | ||
| 372 | prcm_context.wkup_cm_autoidle = | ||
| 373 | cm_read_mod_reg(WKUP_MOD, CM_AUTOIDLE); | ||
| 374 | prcm_context.dss_cm_autoidle = | ||
| 375 | cm_read_mod_reg(OMAP3430_DSS_MOD, CM_AUTOIDLE); | ||
| 376 | prcm_context.cam_cm_autoidle = | ||
| 377 | cm_read_mod_reg(OMAP3430_CAM_MOD, CM_AUTOIDLE); | ||
| 378 | prcm_context.per_cm_autoidle = | ||
| 379 | cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE); | ||
| 380 | prcm_context.usbhost_cm_autoidle = | ||
| 381 | cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, CM_AUTOIDLE); | ||
| 382 | prcm_context.sgx_cm_sleepdep = | ||
| 383 | cm_read_mod_reg(OMAP3430ES2_SGX_MOD, OMAP3430_CM_SLEEPDEP); | ||
| 384 | prcm_context.dss_cm_sleepdep = | ||
| 385 | cm_read_mod_reg(OMAP3430_DSS_MOD, OMAP3430_CM_SLEEPDEP); | ||
| 386 | prcm_context.cam_cm_sleepdep = | ||
| 387 | cm_read_mod_reg(OMAP3430_CAM_MOD, OMAP3430_CM_SLEEPDEP); | ||
| 388 | prcm_context.per_cm_sleepdep = | ||
| 389 | cm_read_mod_reg(OMAP3430_PER_MOD, OMAP3430_CM_SLEEPDEP); | ||
| 390 | prcm_context.usbhost_cm_sleepdep = | ||
| 391 | cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, OMAP3430_CM_SLEEPDEP); | ||
| 392 | prcm_context.cm_clkout_ctrl = cm_read_mod_reg(OMAP3430_CCR_MOD, | ||
| 393 | OMAP3_CM_CLKOUT_CTRL_OFFSET); | ||
| 394 | prcm_context.prm_clkout_ctrl = prm_read_mod_reg(OMAP3430_CCR_MOD, | ||
| 395 | OMAP3_PRM_CLKOUT_CTRL_OFFSET); | ||
| 396 | prcm_context.sgx_pm_wkdep = | ||
| 397 | prm_read_mod_reg(OMAP3430ES2_SGX_MOD, PM_WKDEP); | ||
| 398 | prcm_context.dss_pm_wkdep = | ||
| 399 | prm_read_mod_reg(OMAP3430_DSS_MOD, PM_WKDEP); | ||
| 400 | prcm_context.cam_pm_wkdep = | ||
| 401 | prm_read_mod_reg(OMAP3430_CAM_MOD, PM_WKDEP); | ||
| 402 | prcm_context.per_pm_wkdep = | ||
| 403 | prm_read_mod_reg(OMAP3430_PER_MOD, PM_WKDEP); | ||
| 404 | prcm_context.neon_pm_wkdep = | ||
| 405 | prm_read_mod_reg(OMAP3430_NEON_MOD, PM_WKDEP); | ||
| 406 | prcm_context.usbhost_pm_wkdep = | ||
| 407 | prm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, PM_WKDEP); | ||
| 408 | prcm_context.core_pm_mpugrpsel1 = | ||
| 409 | prm_read_mod_reg(CORE_MOD, OMAP3430_PM_MPUGRPSEL1); | ||
| 410 | prcm_context.iva2_pm_ivagrpsel1 = | ||
| 411 | prm_read_mod_reg(OMAP3430_IVA2_MOD, OMAP3430_PM_IVAGRPSEL1); | ||
| 412 | prcm_context.core_pm_mpugrpsel3 = | ||
| 413 | prm_read_mod_reg(CORE_MOD, OMAP3430ES2_PM_MPUGRPSEL3); | ||
| 414 | prcm_context.core_pm_ivagrpsel3 = | ||
| 415 | prm_read_mod_reg(CORE_MOD, OMAP3430ES2_PM_IVAGRPSEL3); | ||
| 416 | prcm_context.wkup_pm_mpugrpsel = | ||
| 417 | prm_read_mod_reg(WKUP_MOD, OMAP3430_PM_MPUGRPSEL); | ||
| 418 | prcm_context.wkup_pm_ivagrpsel = | ||
| 419 | prm_read_mod_reg(WKUP_MOD, OMAP3430_PM_IVAGRPSEL); | ||
| 420 | prcm_context.per_pm_mpugrpsel = | ||
| 421 | prm_read_mod_reg(OMAP3430_PER_MOD, OMAP3430_PM_MPUGRPSEL); | ||
| 422 | prcm_context.per_pm_ivagrpsel = | ||
| 423 | prm_read_mod_reg(OMAP3430_PER_MOD, OMAP3430_PM_IVAGRPSEL); | ||
| 424 | prcm_context.wkup_pm_wken = prm_read_mod_reg(WKUP_MOD, PM_WKEN); | ||
| 425 | return; | ||
| 426 | } | ||
| 427 | |||
| 428 | void omap3_prcm_restore_context(void) | ||
| 429 | { | ||
| 430 | omap_ctrl_writel(prcm_context.control_padconf_sys_nirq, | ||
| 431 | OMAP343X_CONTROL_PADCONF_SYSNIRQ); | ||
| 432 | cm_write_mod_reg(prcm_context.iva2_cm_clksel1, OMAP3430_IVA2_MOD, | ||
| 433 | CM_CLKSEL1); | ||
| 434 | cm_write_mod_reg(prcm_context.iva2_cm_clksel2, OMAP3430_IVA2_MOD, | ||
| 435 | CM_CLKSEL2); | ||
| 436 | __raw_writel(prcm_context.cm_sysconfig, OMAP3430_CM_SYSCONFIG); | ||
| 437 | cm_write_mod_reg(prcm_context.sgx_cm_clksel, OMAP3430ES2_SGX_MOD, | ||
| 438 | CM_CLKSEL); | ||
| 439 | cm_write_mod_reg(prcm_context.wkup_cm_clksel, WKUP_MOD, CM_CLKSEL); | ||
| 440 | cm_write_mod_reg(prcm_context.dss_cm_clksel, OMAP3430_DSS_MOD, | ||
| 441 | CM_CLKSEL); | ||
| 442 | cm_write_mod_reg(prcm_context.cam_cm_clksel, OMAP3430_CAM_MOD, | ||
| 443 | CM_CLKSEL); | ||
| 444 | cm_write_mod_reg(prcm_context.per_cm_clksel, OMAP3430_PER_MOD, | ||
| 445 | CM_CLKSEL); | ||
| 446 | cm_write_mod_reg(prcm_context.emu_cm_clksel, OMAP3430_EMU_MOD, | ||
| 447 | CM_CLKSEL1); | ||
| 448 | cm_write_mod_reg(prcm_context.emu_cm_clkstctrl, OMAP3430_EMU_MOD, | ||
| 449 | CM_CLKSTCTRL); | ||
| 450 | cm_write_mod_reg(prcm_context.pll_cm_autoidle2, PLL_MOD, | ||
| 451 | CM_AUTOIDLE2); | ||
| 452 | cm_write_mod_reg(prcm_context.pll_cm_clksel4, PLL_MOD, | ||
| 453 | OMAP3430ES2_CM_CLKSEL4); | ||
| 454 | cm_write_mod_reg(prcm_context.pll_cm_clksel5, PLL_MOD, | ||
| 455 | OMAP3430ES2_CM_CLKSEL5); | ||
| 456 | cm_write_mod_reg(prcm_context.pll_cm_clken, PLL_MOD, CM_CLKEN); | ||
| 457 | cm_write_mod_reg(prcm_context.pll_cm_clken2, PLL_MOD, | ||
| 458 | OMAP3430ES2_CM_CLKEN2); | ||
| 459 | __raw_writel(prcm_context.cm_polctrl, OMAP3430_CM_POLCTRL); | ||
| 460 | cm_write_mod_reg(prcm_context.iva2_cm_fclken, OMAP3430_IVA2_MOD, | ||
| 461 | CM_FCLKEN); | ||
| 462 | cm_write_mod_reg(prcm_context.iva2_cm_clken_pll, OMAP3430_IVA2_MOD, | ||
| 463 | OMAP3430_CM_CLKEN_PLL); | ||
| 464 | cm_write_mod_reg(prcm_context.core_cm_fclken1, CORE_MOD, CM_FCLKEN1); | ||
| 465 | cm_write_mod_reg(prcm_context.core_cm_fclken3, CORE_MOD, | ||
| 466 | OMAP3430ES2_CM_FCLKEN3); | ||
| 467 | cm_write_mod_reg(prcm_context.sgx_cm_fclken, OMAP3430ES2_SGX_MOD, | ||
| 468 | CM_FCLKEN); | ||
| 469 | cm_write_mod_reg(prcm_context.wkup_cm_fclken, WKUP_MOD, CM_FCLKEN); | ||
| 470 | cm_write_mod_reg(prcm_context.dss_cm_fclken, OMAP3430_DSS_MOD, | ||
| 471 | CM_FCLKEN); | ||
| 472 | cm_write_mod_reg(prcm_context.cam_cm_fclken, OMAP3430_CAM_MOD, | ||
| 473 | CM_FCLKEN); | ||
| 474 | cm_write_mod_reg(prcm_context.per_cm_fclken, OMAP3430_PER_MOD, | ||
| 475 | CM_FCLKEN); | ||
| 476 | cm_write_mod_reg(prcm_context.usbhost_cm_fclken, | ||
| 477 | OMAP3430ES2_USBHOST_MOD, CM_FCLKEN); | ||
| 478 | cm_write_mod_reg(prcm_context.core_cm_iclken1, CORE_MOD, CM_ICLKEN1); | ||
| 479 | cm_write_mod_reg(prcm_context.core_cm_iclken2, CORE_MOD, CM_ICLKEN2); | ||
| 480 | cm_write_mod_reg(prcm_context.core_cm_iclken3, CORE_MOD, CM_ICLKEN3); | ||
| 481 | cm_write_mod_reg(prcm_context.sgx_cm_iclken, OMAP3430ES2_SGX_MOD, | ||
| 482 | CM_ICLKEN); | ||
| 483 | cm_write_mod_reg(prcm_context.wkup_cm_iclken, WKUP_MOD, CM_ICLKEN); | ||
| 484 | cm_write_mod_reg(prcm_context.dss_cm_iclken, OMAP3430_DSS_MOD, | ||
| 485 | CM_ICLKEN); | ||
| 486 | cm_write_mod_reg(prcm_context.cam_cm_iclken, OMAP3430_CAM_MOD, | ||
| 487 | CM_ICLKEN); | ||
| 488 | cm_write_mod_reg(prcm_context.per_cm_iclken, OMAP3430_PER_MOD, | ||
| 489 | CM_ICLKEN); | ||
| 490 | cm_write_mod_reg(prcm_context.usbhost_cm_iclken, | ||
| 491 | OMAP3430ES2_USBHOST_MOD, CM_ICLKEN); | ||
| 492 | cm_write_mod_reg(prcm_context.iva2_cm_autiidle2, OMAP3430_IVA2_MOD, | ||
| 493 | CM_AUTOIDLE2); | ||
| 494 | cm_write_mod_reg(prcm_context.mpu_cm_autoidle2, MPU_MOD, CM_AUTOIDLE2); | ||
| 495 | cm_write_mod_reg(prcm_context.pll_cm_autoidle, PLL_MOD, CM_AUTOIDLE); | ||
| 496 | cm_write_mod_reg(prcm_context.iva2_cm_clkstctrl, OMAP3430_IVA2_MOD, | ||
| 497 | CM_CLKSTCTRL); | ||
| 498 | cm_write_mod_reg(prcm_context.mpu_cm_clkstctrl, MPU_MOD, CM_CLKSTCTRL); | ||
| 499 | cm_write_mod_reg(prcm_context.core_cm_clkstctrl, CORE_MOD, | ||
| 500 | CM_CLKSTCTRL); | ||
| 501 | cm_write_mod_reg(prcm_context.sgx_cm_clkstctrl, OMAP3430ES2_SGX_MOD, | ||
| 502 | CM_CLKSTCTRL); | ||
| 503 | cm_write_mod_reg(prcm_context.dss_cm_clkstctrl, OMAP3430_DSS_MOD, | ||
| 504 | CM_CLKSTCTRL); | ||
| 505 | cm_write_mod_reg(prcm_context.cam_cm_clkstctrl, OMAP3430_CAM_MOD, | ||
| 506 | CM_CLKSTCTRL); | ||
| 507 | cm_write_mod_reg(prcm_context.per_cm_clkstctrl, OMAP3430_PER_MOD, | ||
| 508 | CM_CLKSTCTRL); | ||
| 509 | cm_write_mod_reg(prcm_context.neon_cm_clkstctrl, OMAP3430_NEON_MOD, | ||
| 510 | CM_CLKSTCTRL); | ||
| 511 | cm_write_mod_reg(prcm_context.usbhost_cm_clkstctrl, | ||
| 512 | OMAP3430ES2_USBHOST_MOD, CM_CLKSTCTRL); | ||
| 513 | cm_write_mod_reg(prcm_context.core_cm_autoidle1, CORE_MOD, | ||
| 514 | CM_AUTOIDLE1); | ||
| 515 | cm_write_mod_reg(prcm_context.core_cm_autoidle2, CORE_MOD, | ||
| 516 | CM_AUTOIDLE2); | ||
| 517 | cm_write_mod_reg(prcm_context.core_cm_autoidle3, CORE_MOD, | ||
| 518 | CM_AUTOIDLE3); | ||
| 519 | cm_write_mod_reg(prcm_context.wkup_cm_autoidle, WKUP_MOD, CM_AUTOIDLE); | ||
| 520 | cm_write_mod_reg(prcm_context.dss_cm_autoidle, OMAP3430_DSS_MOD, | ||
| 521 | CM_AUTOIDLE); | ||
| 522 | cm_write_mod_reg(prcm_context.cam_cm_autoidle, OMAP3430_CAM_MOD, | ||
| 523 | CM_AUTOIDLE); | ||
| 524 | cm_write_mod_reg(prcm_context.per_cm_autoidle, OMAP3430_PER_MOD, | ||
| 525 | CM_AUTOIDLE); | ||
| 526 | cm_write_mod_reg(prcm_context.usbhost_cm_autoidle, | ||
| 527 | OMAP3430ES2_USBHOST_MOD, CM_AUTOIDLE); | ||
| 528 | cm_write_mod_reg(prcm_context.sgx_cm_sleepdep, OMAP3430ES2_SGX_MOD, | ||
| 529 | OMAP3430_CM_SLEEPDEP); | ||
| 530 | cm_write_mod_reg(prcm_context.dss_cm_sleepdep, OMAP3430_DSS_MOD, | ||
| 531 | OMAP3430_CM_SLEEPDEP); | ||
| 532 | cm_write_mod_reg(prcm_context.cam_cm_sleepdep, OMAP3430_CAM_MOD, | ||
| 533 | OMAP3430_CM_SLEEPDEP); | ||
| 534 | cm_write_mod_reg(prcm_context.per_cm_sleepdep, OMAP3430_PER_MOD, | ||
| 535 | OMAP3430_CM_SLEEPDEP); | ||
| 536 | cm_write_mod_reg(prcm_context.usbhost_cm_sleepdep, | ||
| 537 | OMAP3430ES2_USBHOST_MOD, OMAP3430_CM_SLEEPDEP); | ||
| 538 | cm_write_mod_reg(prcm_context.cm_clkout_ctrl, OMAP3430_CCR_MOD, | ||
| 539 | OMAP3_CM_CLKOUT_CTRL_OFFSET); | ||
| 540 | prm_write_mod_reg(prcm_context.prm_clkout_ctrl, OMAP3430_CCR_MOD, | ||
| 541 | OMAP3_PRM_CLKOUT_CTRL_OFFSET); | ||
| 542 | prm_write_mod_reg(prcm_context.sgx_pm_wkdep, OMAP3430ES2_SGX_MOD, | ||
| 543 | PM_WKDEP); | ||
| 544 | prm_write_mod_reg(prcm_context.dss_pm_wkdep, OMAP3430_DSS_MOD, | ||
| 545 | PM_WKDEP); | ||
| 546 | prm_write_mod_reg(prcm_context.cam_pm_wkdep, OMAP3430_CAM_MOD, | ||
| 547 | PM_WKDEP); | ||
| 548 | prm_write_mod_reg(prcm_context.per_pm_wkdep, OMAP3430_PER_MOD, | ||
| 549 | PM_WKDEP); | ||
| 550 | prm_write_mod_reg(prcm_context.neon_pm_wkdep, OMAP3430_NEON_MOD, | ||
| 551 | PM_WKDEP); | ||
| 552 | prm_write_mod_reg(prcm_context.usbhost_pm_wkdep, | ||
| 553 | OMAP3430ES2_USBHOST_MOD, PM_WKDEP); | ||
| 554 | prm_write_mod_reg(prcm_context.core_pm_mpugrpsel1, CORE_MOD, | ||
| 555 | OMAP3430_PM_MPUGRPSEL1); | ||
| 556 | prm_write_mod_reg(prcm_context.iva2_pm_ivagrpsel1, OMAP3430_IVA2_MOD, | ||
| 557 | OMAP3430_PM_IVAGRPSEL1); | ||
| 558 | prm_write_mod_reg(prcm_context.core_pm_mpugrpsel3, CORE_MOD, | ||
| 559 | OMAP3430ES2_PM_MPUGRPSEL3); | ||
| 560 | prm_write_mod_reg(prcm_context.core_pm_ivagrpsel3, CORE_MOD, | ||
| 561 | OMAP3430ES2_PM_IVAGRPSEL3); | ||
| 562 | prm_write_mod_reg(prcm_context.wkup_pm_mpugrpsel, WKUP_MOD, | ||
| 563 | OMAP3430_PM_MPUGRPSEL); | ||
| 564 | prm_write_mod_reg(prcm_context.wkup_pm_ivagrpsel, WKUP_MOD, | ||
| 565 | OMAP3430_PM_IVAGRPSEL); | ||
| 566 | prm_write_mod_reg(prcm_context.per_pm_mpugrpsel, OMAP3430_PER_MOD, | ||
| 567 | OMAP3430_PM_MPUGRPSEL); | ||
| 568 | prm_write_mod_reg(prcm_context.per_pm_ivagrpsel, OMAP3430_PER_MOD, | ||
| 569 | OMAP3430_PM_IVAGRPSEL); | ||
| 570 | prm_write_mod_reg(prcm_context.wkup_pm_wken, WKUP_MOD, PM_WKEN); | ||
| 571 | return; | ||
| 572 | } | ||
| 573 | #endif | ||
diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h index 9fd03a2ec95..8f21bae6dc1 100644 --- a/arch/arm/mach-omap2/prm-regbits-34xx.h +++ b/arch/arm/mach-omap2/prm-regbits-34xx.h | |||
| @@ -365,6 +365,7 @@ | |||
| 365 | /* PM_PREPWSTST_GFX specific bits */ | 365 | /* PM_PREPWSTST_GFX specific bits */ |
| 366 | 366 | ||
| 367 | /* PM_WKEN_WKUP specific bits */ | 367 | /* PM_WKEN_WKUP specific bits */ |
| 368 | #define OMAP3430_EN_IO_CHAIN (1 << 16) | ||
| 368 | #define OMAP3430_EN_IO (1 << 8) | 369 | #define OMAP3430_EN_IO (1 << 8) |
| 369 | #define OMAP3430_EN_GPIO1 (1 << 3) | 370 | #define OMAP3430_EN_GPIO1 (1 << 3) |
| 370 | 371 | ||
| @@ -373,6 +374,7 @@ | |||
| 373 | /* PM_IVA2GRPSEL_WKUP specific bits */ | 374 | /* PM_IVA2GRPSEL_WKUP specific bits */ |
| 374 | 375 | ||
| 375 | /* PM_WKST_WKUP specific bits */ | 376 | /* PM_WKST_WKUP specific bits */ |
| 377 | #define OMAP3430_ST_IO_CHAIN (1 << 16) | ||
| 376 | #define OMAP3430_ST_IO (1 << 8) | 378 | #define OMAP3430_ST_IO (1 << 8) |
| 377 | 379 | ||
| 378 | /* PRM_CLKSEL */ | 380 | /* PRM_CLKSEL */ |
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index 03c467c35f5..a117f853ea3 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h | |||
| @@ -17,11 +17,11 @@ | |||
| 17 | #include "prcm-common.h" | 17 | #include "prcm-common.h" |
| 18 | 18 | ||
| 19 | #define OMAP2420_PRM_REGADDR(module, reg) \ | 19 | #define OMAP2420_PRM_REGADDR(module, reg) \ |
| 20 | OMAP2_IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg)) | 20 | OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg)) |
| 21 | #define OMAP2430_PRM_REGADDR(module, reg) \ | 21 | #define OMAP2430_PRM_REGADDR(module, reg) \ |
| 22 | OMAP2_IO_ADDRESS(OMAP2430_PRM_BASE + (module) + (reg)) | 22 | OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE + (module) + (reg)) |
| 23 | #define OMAP34XX_PRM_REGADDR(module, reg) \ | 23 | #define OMAP34XX_PRM_REGADDR(module, reg) \ |
| 24 | OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg)) | 24 | OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg)) |
| 25 | 25 | ||
| 26 | /* | 26 | /* |
| 27 | * Architecture-specific global PRM registers | 27 | * Architecture-specific global PRM registers |
diff --git a/arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h b/arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h new file mode 100644 index 00000000000..8bfaf342a02 --- /dev/null +++ b/arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h | |||
| @@ -0,0 +1,51 @@ | |||
| 1 | /* | ||
| 2 | * SDRC register values for the Hynix H8MBX00U0MER-0EM | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009 Texas Instruments, Inc. | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #ifndef __ARCH_ARM_MACH_OMAP2_SDRAM_HYNIX_H8MBX00U0MER0EM | ||
| 12 | #define __ARCH_ARM_MACH_OMAP2_SDRAM_HYNIX_H8MBX00U0MER0EM | ||
| 13 | |||
| 14 | #include <plat/sdrc.h> | ||
| 15 | |||
| 16 | /* Hynix H8MBX00U0MER-0EM */ | ||
| 17 | static struct omap_sdrc_params h8mbx00u0mer0em_sdrc_params[] = { | ||
| 18 | [0] = { | ||
| 19 | .rate = 200000000, | ||
| 20 | .actim_ctrla = 0xa2e1b4c6, | ||
| 21 | .actim_ctrlb = 0x0002131c, | ||
| 22 | .rfr_ctrl = 0x0005e601, | ||
| 23 | .mr = 0x00000032, | ||
| 24 | }, | ||
| 25 | [1] = { | ||
| 26 | .rate = 166000000, | ||
| 27 | .actim_ctrla = 0x629db4c6, | ||
| 28 | .actim_ctrlb = 0x00012214, | ||
| 29 | .rfr_ctrl = 0x0004dc01, | ||
| 30 | .mr = 0x00000032, | ||
| 31 | }, | ||
| 32 | [2] = { | ||
| 33 | .rate = 100000000, | ||
| 34 | .actim_ctrla = 0x51912284, | ||
| 35 | .actim_ctrlb = 0x0002120e, | ||
| 36 | .rfr_ctrl = 0x0002d101, | ||
| 37 | .mr = 0x00000022, | ||
| 38 | }, | ||
| 39 | [3] = { | ||
| 40 | .rate = 83000000, | ||
| 41 | .actim_ctrla = 0x31512283, | ||
| 42 | .actim_ctrlb = 0x0001220a, | ||
| 43 | .rfr_ctrl = 0x00025501, | ||
| 44 | .mr = 0x00000022, | ||
| 45 | }, | ||
| 46 | [4] = { | ||
| 47 | .rate = 0 | ||
| 48 | }, | ||
| 49 | }; | ||
| 50 | |||
| 51 | #endif | ||
diff --git a/arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h b/arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h index 02e1c2d4705..a391b4939f7 100644 --- a/arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h +++ b/arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h | |||
| @@ -14,7 +14,7 @@ | |||
| 14 | #ifndef ARCH_ARM_MACH_OMAP2_SDRAM_MICRON_MT46H32M32LF | 14 | #ifndef ARCH_ARM_MACH_OMAP2_SDRAM_MICRON_MT46H32M32LF |
| 15 | #define ARCH_ARM_MACH_OMAP2_SDRAM_MICRON_MT46H32M32LF | 15 | #define ARCH_ARM_MACH_OMAP2_SDRAM_MICRON_MT46H32M32LF |
| 16 | 16 | ||
| 17 | #include <mach/sdrc.h> | 17 | #include <plat/sdrc.h> |
| 18 | 18 | ||
| 19 | /* Micron MT46H32M32LF-6 */ | 19 | /* Micron MT46H32M32LF-6 */ |
| 20 | /* XXX Using ARE = 0x1 (no autorefresh burst) -- can this be changed? */ | 20 | /* XXX Using ARE = 0x1 (no autorefresh burst) -- can this be changed? */ |
diff --git a/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h b/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h index 3751d293cb1..0e518a72831 100644 --- a/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h +++ b/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h | |||
| @@ -14,7 +14,7 @@ | |||
| 14 | #ifndef ARCH_ARM_MACH_OMAP2_SDRAM_QIMONDA_HYB18M512160AF6 | 14 | #ifndef ARCH_ARM_MACH_OMAP2_SDRAM_QIMONDA_HYB18M512160AF6 |
| 15 | #define ARCH_ARM_MACH_OMAP2_SDRAM_QIMONDA_HYB18M512160AF6 | 15 | #define ARCH_ARM_MACH_OMAP2_SDRAM_QIMONDA_HYB18M512160AF6 |
| 16 | 16 | ||
| 17 | #include <mach/sdrc.h> | 17 | #include <plat/sdrc.h> |
| 18 | 18 | ||
| 19 | /* Qimonda HYB18M512160AF-6 */ | 19 | /* Qimonda HYB18M512160AF-6 */ |
| 20 | static struct omap_sdrc_params hyb18m512160af6_sdrc_params[] = { | 20 | static struct omap_sdrc_params hyb18m512160af6_sdrc_params[] = { |
diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c index 9e3bd4fa781..9a592199321 100644 --- a/arch/arm/mach-omap2/sdrc.c +++ b/arch/arm/mach-omap2/sdrc.c | |||
| @@ -23,13 +23,13 @@ | |||
| 23 | #include <linux/clk.h> | 23 | #include <linux/clk.h> |
| 24 | #include <linux/io.h> | 24 | #include <linux/io.h> |
| 25 | 25 | ||
| 26 | #include <mach/common.h> | 26 | #include <plat/common.h> |
| 27 | #include <mach/clock.h> | 27 | #include <plat/clock.h> |
| 28 | #include <mach/sram.h> | 28 | #include <plat/sram.h> |
| 29 | 29 | ||
| 30 | #include "prm.h" | 30 | #include "prm.h" |
| 31 | 31 | ||
| 32 | #include <mach/sdrc.h> | 32 | #include <plat/sdrc.h> |
| 33 | #include "sdrc.h" | 33 | #include "sdrc.h" |
| 34 | 34 | ||
| 35 | static struct omap_sdrc_params *sdrc_init_params_cs0, *sdrc_init_params_cs1; | 35 | static struct omap_sdrc_params *sdrc_init_params_cs0, *sdrc_init_params_cs1; |
| @@ -37,12 +37,38 @@ static struct omap_sdrc_params *sdrc_init_params_cs0, *sdrc_init_params_cs1; | |||
| 37 | void __iomem *omap2_sdrc_base; | 37 | void __iomem *omap2_sdrc_base; |
| 38 | void __iomem *omap2_sms_base; | 38 | void __iomem *omap2_sms_base; |
| 39 | 39 | ||
| 40 | struct omap2_sms_regs { | ||
| 41 | u32 sms_sysconfig; | ||
| 42 | }; | ||
| 43 | |||
| 44 | static struct omap2_sms_regs sms_context; | ||
| 45 | |||
| 40 | /* SDRC_POWER register bits */ | 46 | /* SDRC_POWER register bits */ |
| 41 | #define SDRC_POWER_EXTCLKDIS_SHIFT 3 | 47 | #define SDRC_POWER_EXTCLKDIS_SHIFT 3 |
| 42 | #define SDRC_POWER_PWDENA_SHIFT 2 | 48 | #define SDRC_POWER_PWDENA_SHIFT 2 |
| 43 | #define SDRC_POWER_PAGEPOLICY_SHIFT 0 | 49 | #define SDRC_POWER_PAGEPOLICY_SHIFT 0 |
| 44 | 50 | ||
| 45 | /** | 51 | /** |
| 52 | * omap2_sms_save_context - Save SMS registers | ||
| 53 | * | ||
| 54 | * Save SMS registers that need to be restored after off mode. | ||
| 55 | */ | ||
| 56 | void omap2_sms_save_context(void) | ||
| 57 | { | ||
| 58 | sms_context.sms_sysconfig = sms_read_reg(SMS_SYSCONFIG); | ||
| 59 | } | ||
| 60 | |||
| 61 | /** | ||
| 62 | * omap2_sms_restore_context - Restore SMS registers | ||
| 63 | * | ||
| 64 | * Restore SMS registers that need to be Restored after off mode. | ||
| 65 | */ | ||
| 66 | void omap2_sms_restore_context(void) | ||
| 67 | { | ||
| 68 | sms_write_reg(sms_context.sms_sysconfig, SMS_SYSCONFIG); | ||
| 69 | } | ||
| 70 | |||
| 71 | /** | ||
| 46 | * omap2_sdrc_get_params - return SDRC register values for a given clock rate | 72 | * omap2_sdrc_get_params - return SDRC register values for a given clock rate |
| 47 | * @r: SDRC clock rate (in Hz) | 73 | * @r: SDRC clock rate (in Hz) |
| 48 | * @sdrc_cs0: chip select 0 ram timings ** | 74 | * @sdrc_cs0: chip select 0 ram timings ** |
| @@ -132,4 +158,5 @@ void __init omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0, | |||
| 132 | l = (1 << SDRC_POWER_EXTCLKDIS_SHIFT) | | 158 | l = (1 << SDRC_POWER_EXTCLKDIS_SHIFT) | |
| 133 | (1 << SDRC_POWER_PAGEPOLICY_SHIFT); | 159 | (1 << SDRC_POWER_PAGEPOLICY_SHIFT); |
| 134 | sdrc_write_reg(l, SDRC_POWER); | 160 | sdrc_write_reg(l, SDRC_POWER); |
| 161 | omap2_sms_save_context(); | ||
| 135 | } | 162 | } |
diff --git a/arch/arm/mach-omap2/sdrc.h b/arch/arm/mach-omap2/sdrc.h index 0837eda5f2b..48207b01898 100644 --- a/arch/arm/mach-omap2/sdrc.h +++ b/arch/arm/mach-omap2/sdrc.h | |||
| @@ -15,7 +15,7 @@ | |||
| 15 | */ | 15 | */ |
| 16 | #undef DEBUG | 16 | #undef DEBUG |
| 17 | 17 | ||
| 18 | #include <mach/sdrc.h> | 18 | #include <plat/sdrc.h> |
| 19 | 19 | ||
| 20 | #ifndef __ASSEMBLER__ | 20 | #ifndef __ASSEMBLER__ |
| 21 | extern void __iomem *omap2_sdrc_base; | 21 | extern void __iomem *omap2_sdrc_base; |
| @@ -48,9 +48,12 @@ static inline u32 sms_read_reg(u16 reg) | |||
| 48 | return __raw_readl(OMAP_SMS_REGADDR(reg)); | 48 | return __raw_readl(OMAP_SMS_REGADDR(reg)); |
| 49 | } | 49 | } |
| 50 | #else | 50 | #else |
| 51 | #define OMAP242X_SDRC_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE + (reg)) | 51 | #define OMAP242X_SDRC_REGADDR(reg) \ |
| 52 | #define OMAP243X_SDRC_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE + (reg)) | 52 | OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE + (reg)) |
| 53 | #define OMAP34XX_SDRC_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE + (reg)) | 53 | #define OMAP243X_SDRC_REGADDR(reg) \ |
| 54 | OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE + (reg)) | ||
| 55 | #define OMAP34XX_SDRC_REGADDR(reg) \ | ||
| 56 | OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE + (reg)) | ||
| 54 | #endif /* __ASSEMBLER__ */ | 57 | #endif /* __ASSEMBLER__ */ |
| 55 | 58 | ||
| 56 | #endif | 59 | #endif |
diff --git a/arch/arm/mach-omap2/sdrc2xxx.c b/arch/arm/mach-omap2/sdrc2xxx.c index feaec7eaf6b..0f4d27aef44 100644 --- a/arch/arm/mach-omap2/sdrc2xxx.c +++ b/arch/arm/mach-omap2/sdrc2xxx.c | |||
| @@ -24,13 +24,13 @@ | |||
| 24 | #include <linux/clk.h> | 24 | #include <linux/clk.h> |
| 25 | #include <linux/io.h> | 25 | #include <linux/io.h> |
| 26 | 26 | ||
| 27 | #include <mach/common.h> | 27 | #include <plat/common.h> |
| 28 | #include <mach/clock.h> | 28 | #include <plat/clock.h> |
| 29 | #include <mach/sram.h> | 29 | #include <plat/sram.h> |
| 30 | 30 | ||
| 31 | #include "prm.h" | 31 | #include "prm.h" |
| 32 | #include "clock.h" | 32 | #include "clock.h" |
| 33 | #include <mach/sdrc.h> | 33 | #include <plat/sdrc.h> |
| 34 | #include "sdrc.h" | 34 | #include "sdrc.h" |
| 35 | 35 | ||
| 36 | /* Memory timing, DLL mode flags */ | 36 | /* Memory timing, DLL mode flags */ |
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 54dfeb5d566..2e17b57f5b2 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c | |||
| @@ -24,10 +24,10 @@ | |||
| 24 | #include <linux/clk.h> | 24 | #include <linux/clk.h> |
| 25 | #include <linux/io.h> | 25 | #include <linux/io.h> |
| 26 | 26 | ||
| 27 | #include <mach/common.h> | 27 | #include <plat/common.h> |
| 28 | #include <mach/board.h> | 28 | #include <plat/board.h> |
| 29 | #include <mach/clock.h> | 29 | #include <plat/clock.h> |
| 30 | #include <mach/control.h> | 30 | #include <plat/control.h> |
| 31 | 31 | ||
| 32 | #include "prm.h" | 32 | #include "prm.h" |
| 33 | #include "pm.h" | 33 | #include "pm.h" |
| @@ -73,7 +73,6 @@ static LIST_HEAD(uart_list); | |||
| 73 | 73 | ||
| 74 | static struct plat_serial8250_port serial_platform_data0[] = { | 74 | static struct plat_serial8250_port serial_platform_data0[] = { |
| 75 | { | 75 | { |
| 76 | .membase = OMAP2_IO_ADDRESS(OMAP_UART1_BASE), | ||
| 77 | .mapbase = OMAP_UART1_BASE, | 76 | .mapbase = OMAP_UART1_BASE, |
| 78 | .irq = 72, | 77 | .irq = 72, |
| 79 | .flags = UPF_BOOT_AUTOCONF, | 78 | .flags = UPF_BOOT_AUTOCONF, |
| @@ -87,7 +86,6 @@ static struct plat_serial8250_port serial_platform_data0[] = { | |||
| 87 | 86 | ||
| 88 | static struct plat_serial8250_port serial_platform_data1[] = { | 87 | static struct plat_serial8250_port serial_platform_data1[] = { |
| 89 | { | 88 | { |
| 90 | .membase = OMAP2_IO_ADDRESS(OMAP_UART2_BASE), | ||
| 91 | .mapbase = OMAP_UART2_BASE, | 89 | .mapbase = OMAP_UART2_BASE, |
| 92 | .irq = 73, | 90 | .irq = 73, |
| 93 | .flags = UPF_BOOT_AUTOCONF, | 91 | .flags = UPF_BOOT_AUTOCONF, |
| @@ -101,7 +99,6 @@ static struct plat_serial8250_port serial_platform_data1[] = { | |||
| 101 | 99 | ||
| 102 | static struct plat_serial8250_port serial_platform_data2[] = { | 100 | static struct plat_serial8250_port serial_platform_data2[] = { |
| 103 | { | 101 | { |
| 104 | .membase = OMAP2_IO_ADDRESS(OMAP_UART3_BASE), | ||
| 105 | .mapbase = OMAP_UART3_BASE, | 102 | .mapbase = OMAP_UART3_BASE, |
| 106 | .irq = 74, | 103 | .irq = 74, |
| 107 | .flags = UPF_BOOT_AUTOCONF, | 104 | .flags = UPF_BOOT_AUTOCONF, |
| @@ -116,7 +113,6 @@ static struct plat_serial8250_port serial_platform_data2[] = { | |||
| 116 | #ifdef CONFIG_ARCH_OMAP4 | 113 | #ifdef CONFIG_ARCH_OMAP4 |
| 117 | static struct plat_serial8250_port serial_platform_data3[] = { | 114 | static struct plat_serial8250_port serial_platform_data3[] = { |
| 118 | { | 115 | { |
| 119 | .membase = OMAP2_IO_ADDRESS(OMAP_UART4_BASE), | ||
| 120 | .mapbase = OMAP_UART4_BASE, | 116 | .mapbase = OMAP_UART4_BASE, |
| 121 | .irq = 70, | 117 | .irq = 70, |
| 122 | .flags = UPF_BOOT_AUTOCONF, | 118 | .flags = UPF_BOOT_AUTOCONF, |
| @@ -159,8 +155,6 @@ static inline void __init omap_uart_reset(struct omap_uart_state *uart) | |||
| 159 | 155 | ||
| 160 | #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) | 156 | #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) |
| 161 | 157 | ||
| 162 | static int enable_off_mode; /* to be removed by full off-mode patches */ | ||
| 163 | |||
| 164 | static void omap_uart_save_context(struct omap_uart_state *uart) | 158 | static void omap_uart_save_context(struct omap_uart_state *uart) |
| 165 | { | 159 | { |
| 166 | u16 lcr = 0; | 160 | u16 lcr = 0; |
| @@ -539,7 +533,7 @@ static inline void omap_uart_idle_init(struct omap_uart_state *uart) {} | |||
| 539 | #define DEV_CREATE_FILE(dev, attr) | 533 | #define DEV_CREATE_FILE(dev, attr) |
| 540 | #endif /* CONFIG_PM */ | 534 | #endif /* CONFIG_PM */ |
| 541 | 535 | ||
| 542 | static struct omap_uart_state omap_uart[OMAP_MAX_NR_PORTS] = { | 536 | static struct omap_uart_state omap_uart[] = { |
| 543 | { | 537 | { |
| 544 | .pdev = { | 538 | .pdev = { |
| 545 | .name = "serial8250", | 539 | .name = "serial8250", |
| @@ -589,12 +583,22 @@ void __init omap_serial_early_init(void) | |||
| 589 | * if not needed. | 583 | * if not needed. |
| 590 | */ | 584 | */ |
| 591 | 585 | ||
| 592 | for (i = 0; i < OMAP_MAX_NR_PORTS; i++) { | 586 | for (i = 0; i < ARRAY_SIZE(omap_uart); i++) { |
| 593 | struct omap_uart_state *uart = &omap_uart[i]; | 587 | struct omap_uart_state *uart = &omap_uart[i]; |
| 594 | struct platform_device *pdev = &uart->pdev; | 588 | struct platform_device *pdev = &uart->pdev; |
| 595 | struct device *dev = &pdev->dev; | 589 | struct device *dev = &pdev->dev; |
| 596 | struct plat_serial8250_port *p = dev->platform_data; | 590 | struct plat_serial8250_port *p = dev->platform_data; |
| 597 | 591 | ||
| 592 | /* | ||
| 593 | * Module 4KB + L4 interconnect 4KB | ||
| 594 | * Static mapping, never released | ||
| 595 | */ | ||
| 596 | p->membase = ioremap(p->mapbase, SZ_8K); | ||
| 597 | if (!p->membase) { | ||
| 598 | printk(KERN_ERR "ioremap failed for uart%i\n", i + 1); | ||
| 599 | continue; | ||
| 600 | } | ||
| 601 | |||
| 598 | sprintf(name, "uart%d_ick", i+1); | 602 | sprintf(name, "uart%d_ick", i+1); |
| 599 | uart->ick = clk_get(NULL, name); | 603 | uart->ick = clk_get(NULL, name); |
| 600 | if (IS_ERR(uart->ick)) { | 604 | if (IS_ERR(uart->ick)) { |
| @@ -631,7 +635,7 @@ void __init omap_serial_init(void) | |||
| 631 | { | 635 | { |
| 632 | int i; | 636 | int i; |
| 633 | 637 | ||
| 634 | for (i = 0; i < OMAP_MAX_NR_PORTS; i++) { | 638 | for (i = 0; i < ARRAY_SIZE(omap_uart); i++) { |
| 635 | struct omap_uart_state *uart = &omap_uart[i]; | 639 | struct omap_uart_state *uart = &omap_uart[i]; |
| 636 | struct platform_device *pdev = &uart->pdev; | 640 | struct platform_device *pdev = &uart->pdev; |
| 637 | struct device *dev = &pdev->dev; | 641 | struct device *dev = &pdev->dev; |
diff --git a/arch/arm/mach-omap2/sleep24xx.S b/arch/arm/mach-omap2/sleep24xx.S index 130aadbfa08..c7780cc8d91 100644 --- a/arch/arm/mach-omap2/sleep24xx.S +++ b/arch/arm/mach-omap2/sleep24xx.S | |||
| @@ -29,7 +29,7 @@ | |||
| 29 | #include <asm/assembler.h> | 29 | #include <asm/assembler.h> |
| 30 | #include <mach/io.h> | 30 | #include <mach/io.h> |
| 31 | 31 | ||
| 32 | #include <mach/omap24xx.h> | 32 | #include <plat/omap24xx.h> |
| 33 | 33 | ||
| 34 | #include "sdrc.h" | 34 | #include "sdrc.h" |
| 35 | 35 | ||
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S index e5e2553e79a..15268f8b61d 100644 --- a/arch/arm/mach-omap2/sleep34xx.S +++ b/arch/arm/mach-omap2/sleep34xx.S | |||
| @@ -27,22 +27,35 @@ | |||
| 27 | #include <linux/linkage.h> | 27 | #include <linux/linkage.h> |
| 28 | #include <asm/assembler.h> | 28 | #include <asm/assembler.h> |
| 29 | #include <mach/io.h> | 29 | #include <mach/io.h> |
| 30 | #include <mach/control.h> | 30 | #include <plat/control.h> |
| 31 | 31 | ||
| 32 | #include "cm.h" | ||
| 32 | #include "prm.h" | 33 | #include "prm.h" |
| 33 | #include "sdrc.h" | 34 | #include "sdrc.h" |
| 34 | 35 | ||
| 35 | #define PM_PREPWSTST_CORE_V OMAP34XX_PRM_REGADDR(CORE_MOD, \ | 36 | #define PM_PREPWSTST_CORE_V OMAP34XX_PRM_REGADDR(CORE_MOD, \ |
| 36 | OMAP3430_PM_PREPWSTST) | 37 | OMAP3430_PM_PREPWSTST) |
| 38 | #define PM_PREPWSTST_CORE_P 0x48306AE8 | ||
| 37 | #define PM_PREPWSTST_MPU_V OMAP34XX_PRM_REGADDR(MPU_MOD, \ | 39 | #define PM_PREPWSTST_MPU_V OMAP34XX_PRM_REGADDR(MPU_MOD, \ |
| 38 | OMAP3430_PM_PREPWSTST) | 40 | OMAP3430_PM_PREPWSTST) |
| 39 | #define PM_PWSTCTRL_MPU_P OMAP34XX_PRM_REGADDR(MPU_MOD, PM_PWSTCTRL) | 41 | #define PM_PWSTCTRL_MPU_P OMAP3430_PRM_BASE + MPU_MOD + PM_PWSTCTRL |
| 42 | #define CM_IDLEST1_CORE_V OMAP34XX_CM_REGADDR(CORE_MOD, CM_IDLEST1) | ||
| 43 | #define SRAM_BASE_P 0x40200000 | ||
| 44 | #define CONTROL_STAT 0x480022F0 | ||
| 40 | #define SCRATCHPAD_MEM_OFFS 0x310 /* Move this as correct place is | 45 | #define SCRATCHPAD_MEM_OFFS 0x310 /* Move this as correct place is |
| 41 | * available */ | 46 | * available */ |
| 42 | #define SCRATCHPAD_BASE_P OMAP343X_CTRL_REGADDR(\ | 47 | #define SCRATCHPAD_BASE_P (OMAP343X_CTRL_BASE + OMAP343X_CONTROL_MEM_WKUP\ |
| 43 | OMAP343X_CONTROL_MEM_WKUP +\ | 48 | + SCRATCHPAD_MEM_OFFS) |
| 44 | SCRATCHPAD_MEM_OFFS) | ||
| 45 | #define SDRC_POWER_V OMAP34XX_SDRC_REGADDR(SDRC_POWER) | 49 | #define SDRC_POWER_V OMAP34XX_SDRC_REGADDR(SDRC_POWER) |
| 50 | #define SDRC_SYSCONFIG_P (OMAP343X_SDRC_BASE + SDRC_SYSCONFIG) | ||
| 51 | #define SDRC_MR_0_P (OMAP343X_SDRC_BASE + SDRC_MR_0) | ||
| 52 | #define SDRC_EMR2_0_P (OMAP343X_SDRC_BASE + SDRC_EMR2_0) | ||
| 53 | #define SDRC_MANUAL_0_P (OMAP343X_SDRC_BASE + SDRC_MANUAL_0) | ||
| 54 | #define SDRC_MR_1_P (OMAP343X_SDRC_BASE + SDRC_MR_1) | ||
| 55 | #define SDRC_EMR2_1_P (OMAP343X_SDRC_BASE + SDRC_EMR2_1) | ||
| 56 | #define SDRC_MANUAL_1_P (OMAP343X_SDRC_BASE + SDRC_MANUAL_1) | ||
| 57 | #define SDRC_DLLA_STATUS_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_STATUS) | ||
| 58 | #define SDRC_DLLA_CTRL_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_CTRL) | ||
| 46 | 59 | ||
| 47 | .text | 60 | .text |
| 48 | /* Function call to get the restore pointer for resume from OFF */ | 61 | /* Function call to get the restore pointer for resume from OFF */ |
| @@ -51,7 +64,93 @@ ENTRY(get_restore_pointer) | |||
| 51 | adr r0, restore | 64 | adr r0, restore |
| 52 | ldmfd sp!, {pc} @ restore regs and return | 65 | ldmfd sp!, {pc} @ restore regs and return |
| 53 | ENTRY(get_restore_pointer_sz) | 66 | ENTRY(get_restore_pointer_sz) |
| 54 | .word . - get_restore_pointer_sz | 67 | .word . - get_restore_pointer |
| 68 | |||
| 69 | .text | ||
| 70 | /* Function call to get the restore pointer for for ES3 to resume from OFF */ | ||
| 71 | ENTRY(get_es3_restore_pointer) | ||
| 72 | stmfd sp!, {lr} @ save registers on stack | ||
| 73 | adr r0, restore_es3 | ||
| 74 | ldmfd sp!, {pc} @ restore regs and return | ||
| 75 | ENTRY(get_es3_restore_pointer_sz) | ||
| 76 | .word . - get_es3_restore_pointer | ||
| 77 | |||
| 78 | ENTRY(es3_sdrc_fix) | ||
| 79 | ldr r4, sdrc_syscfg @ get config addr | ||
| 80 | ldr r5, [r4] @ get value | ||
| 81 | tst r5, #0x100 @ is part access blocked | ||
| 82 | it eq | ||
| 83 | biceq r5, r5, #0x100 @ clear bit if set | ||
| 84 | str r5, [r4] @ write back change | ||
| 85 | ldr r4, sdrc_mr_0 @ get config addr | ||
| 86 | ldr r5, [r4] @ get value | ||
| 87 | str r5, [r4] @ write back change | ||
| 88 | ldr r4, sdrc_emr2_0 @ get config addr | ||
| 89 | ldr r5, [r4] @ get value | ||
| 90 | str r5, [r4] @ write back change | ||
| 91 | ldr r4, sdrc_manual_0 @ get config addr | ||
| 92 | mov r5, #0x2 @ autorefresh command | ||
| 93 | str r5, [r4] @ kick off refreshes | ||
| 94 | ldr r4, sdrc_mr_1 @ get config addr | ||
| 95 | ldr r5, [r4] @ get value | ||
| 96 | str r5, [r4] @ write back change | ||
| 97 | ldr r4, sdrc_emr2_1 @ get config addr | ||
| 98 | ldr r5, [r4] @ get value | ||
| 99 | str r5, [r4] @ write back change | ||
| 100 | ldr r4, sdrc_manual_1 @ get config addr | ||
| 101 | mov r5, #0x2 @ autorefresh command | ||
| 102 | str r5, [r4] @ kick off refreshes | ||
| 103 | bx lr | ||
| 104 | sdrc_syscfg: | ||
| 105 | .word SDRC_SYSCONFIG_P | ||
| 106 | sdrc_mr_0: | ||
| 107 | .word SDRC_MR_0_P | ||
| 108 | sdrc_emr2_0: | ||
| 109 | .word SDRC_EMR2_0_P | ||
| 110 | sdrc_manual_0: | ||
| 111 | .word SDRC_MANUAL_0_P | ||
| 112 | sdrc_mr_1: | ||
| 113 | .word SDRC_MR_1_P | ||
| 114 | sdrc_emr2_1: | ||
| 115 | .word SDRC_EMR2_1_P | ||
| 116 | sdrc_manual_1: | ||
| 117 | .word SDRC_MANUAL_1_P | ||
| 118 | ENTRY(es3_sdrc_fix_sz) | ||
| 119 | .word . - es3_sdrc_fix | ||
| 120 | |||
| 121 | /* Function to call rom code to save secure ram context */ | ||
| 122 | ENTRY(save_secure_ram_context) | ||
| 123 | stmfd sp!, {r1-r12, lr} @ save registers on stack | ||
| 124 | save_secure_ram_debug: | ||
| 125 | /* b save_secure_ram_debug */ @ enable to debug save code | ||
| 126 | adr r3, api_params @ r3 points to parameters | ||
| 127 | str r0, [r3,#0x4] @ r0 has sdram address | ||
| 128 | ldr r12, high_mask | ||
| 129 | and r3, r3, r12 | ||
| 130 | ldr r12, sram_phy_addr_mask | ||
| 131 | orr r3, r3, r12 | ||
| 132 | mov r0, #25 @ set service ID for PPA | ||
| 133 | mov r12, r0 @ copy secure service ID in r12 | ||
| 134 | mov r1, #0 @ set task id for ROM code in r1 | ||
| 135 | mov r2, #4 @ set some flags in r2, r6 | ||
| 136 | mov r6, #0xff | ||
| 137 | mcr p15, 0, r0, c7, c10, 4 @ data write barrier | ||
| 138 | mcr p15, 0, r0, c7, c10, 5 @ data memory barrier | ||
| 139 | .word 0xE1600071 @ call SMI monitor (smi #1) | ||
| 140 | nop | ||
| 141 | nop | ||
| 142 | nop | ||
| 143 | nop | ||
| 144 | ldmfd sp!, {r1-r12, pc} | ||
| 145 | sram_phy_addr_mask: | ||
| 146 | .word SRAM_BASE_P | ||
| 147 | high_mask: | ||
| 148 | .word 0xffff | ||
| 149 | api_params: | ||
| 150 | .word 0x4, 0x0, 0x0, 0x1, 0x1 | ||
| 151 | ENTRY(save_secure_ram_context_sz) | ||
| 152 | .word . - save_secure_ram_context | ||
| 153 | |||
| 55 | /* | 154 | /* |
| 56 | * Forces OMAP into idle state | 155 | * Forces OMAP into idle state |
| 57 | * | 156 | * |
| @@ -92,11 +191,29 @@ loop: | |||
| 92 | nop | 191 | nop |
| 93 | nop | 192 | nop |
| 94 | nop | 193 | nop |
| 95 | bl i_dll_wait | 194 | bl wait_sdrc_ok |
| 96 | 195 | ||
| 97 | ldmfd sp!, {r0-r12, pc} @ restore regs and return | 196 | ldmfd sp!, {r0-r12, pc} @ restore regs and return |
| 197 | restore_es3: | ||
| 198 | /*b restore_es3*/ @ Enable to debug restore code | ||
| 199 | ldr r5, pm_prepwstst_core_p | ||
| 200 | ldr r4, [r5] | ||
| 201 | and r4, r4, #0x3 | ||
| 202 | cmp r4, #0x0 @ Check if previous power state of CORE is OFF | ||
| 203 | bne restore | ||
| 204 | adr r0, es3_sdrc_fix | ||
| 205 | ldr r1, sram_base | ||
| 206 | ldr r2, es3_sdrc_fix_sz | ||
| 207 | mov r2, r2, ror #2 | ||
| 208 | copy_to_sram: | ||
| 209 | ldmia r0!, {r3} @ val = *src | ||
| 210 | stmia r1!, {r3} @ *dst = val | ||
| 211 | subs r2, r2, #0x1 @ num_words-- | ||
| 212 | bne copy_to_sram | ||
| 213 | ldr r1, sram_base | ||
| 214 | blx r1 | ||
| 98 | restore: | 215 | restore: |
| 99 | /* b restore*/ @ Enable to debug restore code | 216 | /* b restore*/ @ Enable to debug restore code |
| 100 | /* Check what was the reason for mpu reset and store the reason in r9*/ | 217 | /* Check what was the reason for mpu reset and store the reason in r9*/ |
| 101 | /* 1 - Only L1 and logic lost */ | 218 | /* 1 - Only L1 and logic lost */ |
| 102 | /* 2 - Only L2 lost - In this case, we wont be here */ | 219 | /* 2 - Only L2 lost - In this case, we wont be here */ |
| @@ -108,9 +225,44 @@ restore: | |||
| 108 | moveq r9, #0x3 @ MPU OFF => L1 and L2 lost | 225 | moveq r9, #0x3 @ MPU OFF => L1 and L2 lost |
| 109 | movne r9, #0x1 @ Only L1 and L2 lost => avoid L2 invalidation | 226 | movne r9, #0x1 @ Only L1 and L2 lost => avoid L2 invalidation |
| 110 | bne logic_l1_restore | 227 | bne logic_l1_restore |
| 228 | ldr r0, control_stat | ||
| 229 | ldr r1, [r0] | ||
| 230 | and r1, #0x700 | ||
| 231 | cmp r1, #0x300 | ||
| 232 | beq l2_inv_gp | ||
| 233 | mov r0, #40 @ set service ID for PPA | ||
| 234 | mov r12, r0 @ copy secure Service ID in r12 | ||
| 235 | mov r1, #0 @ set task id for ROM code in r1 | ||
| 236 | mov r2, #4 @ set some flags in r2, r6 | ||
| 237 | mov r6, #0xff | ||
| 238 | adr r3, l2_inv_api_params @ r3 points to dummy parameters | ||
| 239 | mcr p15, 0, r0, c7, c10, 4 @ data write barrier | ||
| 240 | mcr p15, 0, r0, c7, c10, 5 @ data memory barrier | ||
| 241 | .word 0xE1600071 @ call SMI monitor (smi #1) | ||
| 242 | /* Write to Aux control register to set some bits */ | ||
| 243 | mov r0, #42 @ set service ID for PPA | ||
| 244 | mov r12, r0 @ copy secure Service ID in r12 | ||
| 245 | mov r1, #0 @ set task id for ROM code in r1 | ||
| 246 | mov r2, #4 @ set some flags in r2, r6 | ||
| 247 | mov r6, #0xff | ||
| 248 | adr r3, write_aux_control_params @ r3 points to parameters | ||
| 249 | mcr p15, 0, r0, c7, c10, 4 @ data write barrier | ||
| 250 | mcr p15, 0, r0, c7, c10, 5 @ data memory barrier | ||
| 251 | .word 0xE1600071 @ call SMI monitor (smi #1) | ||
| 252 | |||
| 253 | b logic_l1_restore | ||
| 254 | l2_inv_api_params: | ||
| 255 | .word 0x1, 0x00 | ||
| 256 | write_aux_control_params: | ||
| 257 | .word 0x1, 0x72 | ||
| 258 | l2_inv_gp: | ||
| 111 | /* Execute smi to invalidate L2 cache */ | 259 | /* Execute smi to invalidate L2 cache */ |
| 112 | mov r12, #0x1 @ set up to invalide L2 | 260 | mov r12, #0x1 @ set up to invalide L2 |
| 113 | smi: .word 0xE1600070 @ Call SMI monitor (smieq) | 261 | smi: .word 0xE1600070 @ Call SMI monitor (smieq) |
| 262 | /* Write to Aux control register to set some bits */ | ||
| 263 | mov r0, #0x72 | ||
| 264 | mov r12, #0x3 | ||
| 265 | .word 0xE1600070 @ Call SMI monitor (smieq) | ||
| 114 | logic_l1_restore: | 266 | logic_l1_restore: |
| 115 | mov r1, #0 | 267 | mov r1, #0 |
| 116 | /* Invalidate all instruction caches to PoU | 268 | /* Invalidate all instruction caches to PoU |
| @@ -391,33 +543,55 @@ skip_l2_inval: | |||
| 391 | nop | 543 | nop |
| 392 | nop | 544 | nop |
| 393 | nop | 545 | nop |
| 394 | bl i_dll_wait | 546 | bl wait_sdrc_ok |
| 395 | /* restore regs and return */ | 547 | /* restore regs and return */ |
| 396 | ldmfd sp!, {r0-r12, pc} | 548 | ldmfd sp!, {r0-r12, pc} |
| 397 | 549 | ||
| 398 | i_dll_wait: | 550 | /* Make sure SDRC accesses are ok */ |
| 399 | ldr r4, clk_stabilize_delay | 551 | wait_sdrc_ok: |
| 552 | ldr r4, cm_idlest1_core | ||
| 553 | ldr r5, [r4] | ||
| 554 | and r5, r5, #0x2 | ||
| 555 | cmp r5, #0 | ||
| 556 | bne wait_sdrc_ok | ||
| 557 | ldr r4, sdrc_power | ||
| 558 | ldr r5, [r4] | ||
| 559 | bic r5, r5, #0x40 | ||
| 560 | str r5, [r4] | ||
| 561 | wait_dll_lock: | ||
| 562 | /* Is dll in lock mode? */ | ||
| 563 | ldr r4, sdrc_dlla_ctrl | ||
| 564 | ldr r5, [r4] | ||
| 565 | tst r5, #0x4 | ||
| 566 | bxne lr | ||
| 567 | /* wait till dll locks */ | ||
| 568 | ldr r4, sdrc_dlla_status | ||
| 569 | ldr r5, [r4] | ||
| 570 | and r5, r5, #0x4 | ||
| 571 | cmp r5, #0x4 | ||
| 572 | bne wait_dll_lock | ||
| 573 | bx lr | ||
| 400 | 574 | ||
| 401 | i_dll_delay: | 575 | cm_idlest1_core: |
| 402 | subs r4, r4, #0x1 | 576 | .word CM_IDLEST1_CORE_V |
| 403 | bne i_dll_delay | 577 | sdrc_dlla_status: |
| 404 | ldr r4, sdrc_power | 578 | .word SDRC_DLLA_STATUS_V |
| 405 | ldr r5, [r4] | 579 | sdrc_dlla_ctrl: |
| 406 | bic r5, r5, #0x40 | 580 | .word SDRC_DLLA_CTRL_V |
| 407 | str r5, [r4] | ||
| 408 | bx lr | ||
| 409 | pm_prepwstst_core: | 581 | pm_prepwstst_core: |
| 410 | .word PM_PREPWSTST_CORE_V | 582 | .word PM_PREPWSTST_CORE_V |
| 583 | pm_prepwstst_core_p: | ||
| 584 | .word PM_PREPWSTST_CORE_P | ||
| 411 | pm_prepwstst_mpu: | 585 | pm_prepwstst_mpu: |
| 412 | .word PM_PREPWSTST_MPU_V | 586 | .word PM_PREPWSTST_MPU_V |
| 413 | pm_pwstctrl_mpu: | 587 | pm_pwstctrl_mpu: |
| 414 | .word PM_PWSTCTRL_MPU_P | 588 | .word PM_PWSTCTRL_MPU_P |
| 415 | scratchpad_base: | 589 | scratchpad_base: |
| 416 | .word SCRATCHPAD_BASE_P | 590 | .word SCRATCHPAD_BASE_P |
| 591 | sram_base: | ||
| 592 | .word SRAM_BASE_P + 0x8000 | ||
| 417 | sdrc_power: | 593 | sdrc_power: |
| 418 | .word SDRC_POWER_V | 594 | .word SDRC_POWER_V |
| 419 | context_mem: | ||
| 420 | .word 0x803E3E14 | ||
| 421 | clk_stabilize_delay: | 595 | clk_stabilize_delay: |
| 422 | .word 0x000001FF | 596 | .word 0x000001FF |
| 423 | assoc_mask: | 597 | assoc_mask: |
| @@ -432,5 +606,7 @@ table_entry: | |||
| 432 | .word 0x00000C02 | 606 | .word 0x00000C02 |
| 433 | cache_pred_disable_mask: | 607 | cache_pred_disable_mask: |
| 434 | .word 0xFFFFE7FB | 608 | .word 0xFFFFE7FB |
| 609 | control_stat: | ||
| 610 | .word CONTROL_STAT | ||
| 435 | ENTRY(omap34xx_cpu_suspend_sz) | 611 | ENTRY(omap34xx_cpu_suspend_sz) |
| 436 | .word . - omap34xx_cpu_suspend | 612 | .word . - omap34xx_cpu_suspend |
diff --git a/arch/arm/mach-omap2/sram242x.S b/arch/arm/mach-omap2/sram242x.S index 9b62208658b..92e6e1a12af 100644 --- a/arch/arm/mach-omap2/sram242x.S +++ b/arch/arm/mach-omap2/sram242x.S | |||
| @@ -128,7 +128,7 @@ omap242x_sdi_prcm_voltctrl: | |||
| 128 | prcm_mask_val: | 128 | prcm_mask_val: |
| 129 | .word 0xFFFF3FFC | 129 | .word 0xFFFF3FFC |
| 130 | omap242x_sdi_timer_32ksynct_cr: | 130 | omap242x_sdi_timer_32ksynct_cr: |
| 131 | .word OMAP2_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010) | 131 | .word OMAP2_L4_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010) |
| 132 | ENTRY(omap242x_sram_ddr_init_sz) | 132 | ENTRY(omap242x_sram_ddr_init_sz) |
| 133 | .word . - omap242x_sram_ddr_init | 133 | .word . - omap242x_sram_ddr_init |
| 134 | 134 | ||
| @@ -224,7 +224,7 @@ omap242x_srs_prcm_voltctrl: | |||
| 224 | ddr_prcm_mask_val: | 224 | ddr_prcm_mask_val: |
| 225 | .word 0xFFFF3FFC | 225 | .word 0xFFFF3FFC |
| 226 | omap242x_srs_timer_32ksynct: | 226 | omap242x_srs_timer_32ksynct: |
| 227 | .word OMAP2_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010) | 227 | .word OMAP2_L4_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010) |
| 228 | 228 | ||
| 229 | ENTRY(omap242x_sram_reprogram_sdrc_sz) | 229 | ENTRY(omap242x_sram_reprogram_sdrc_sz) |
| 230 | .word . - omap242x_sram_reprogram_sdrc | 230 | .word . - omap242x_sram_reprogram_sdrc |
diff --git a/arch/arm/mach-omap2/sram243x.S b/arch/arm/mach-omap2/sram243x.S index df2cd9277c0..ab4973695c7 100644 --- a/arch/arm/mach-omap2/sram243x.S +++ b/arch/arm/mach-omap2/sram243x.S | |||
| @@ -128,7 +128,7 @@ omap243x_sdi_prcm_voltctrl: | |||
| 128 | prcm_mask_val: | 128 | prcm_mask_val: |
| 129 | .word 0xFFFF3FFC | 129 | .word 0xFFFF3FFC |
| 130 | omap243x_sdi_timer_32ksynct_cr: | 130 | omap243x_sdi_timer_32ksynct_cr: |
| 131 | .word OMAP2_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010) | 131 | .word OMAP2_L4_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010) |
| 132 | ENTRY(omap243x_sram_ddr_init_sz) | 132 | ENTRY(omap243x_sram_ddr_init_sz) |
| 133 | .word . - omap243x_sram_ddr_init | 133 | .word . - omap243x_sram_ddr_init |
| 134 | 134 | ||
| @@ -224,7 +224,7 @@ omap243x_srs_prcm_voltctrl: | |||
| 224 | ddr_prcm_mask_val: | 224 | ddr_prcm_mask_val: |
| 225 | .word 0xFFFF3FFC | 225 | .word 0xFFFF3FFC |
| 226 | omap243x_srs_timer_32ksynct: | 226 | omap243x_srs_timer_32ksynct: |
| 227 | .word OMAP2_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010) | 227 | .word OMAP2_L4_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010) |
| 228 | 228 | ||
| 229 | ENTRY(omap243x_sram_reprogram_sdrc_sz) | 229 | ENTRY(omap243x_sram_reprogram_sdrc_sz) |
| 230 | .word . - omap243x_sram_reprogram_sdrc | 230 | .word . - omap243x_sram_reprogram_sdrc |
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c index e2338c0aebc..cd04deaa88c 100644 --- a/arch/arm/mach-omap2/timer-gp.c +++ b/arch/arm/mach-omap2/timer-gp.c | |||
| @@ -37,7 +37,7 @@ | |||
| 37 | #include <linux/clockchips.h> | 37 | #include <linux/clockchips.h> |
| 38 | 38 | ||
| 39 | #include <asm/mach/time.h> | 39 | #include <asm/mach/time.h> |
| 40 | #include <mach/dmtimer.h> | 40 | #include <plat/dmtimer.h> |
| 41 | #include <asm/localtimer.h> | 41 | #include <asm/localtimer.h> |
| 42 | 42 | ||
| 43 | /* MAX_GPTIMER_ID: number of GPTIMERs on the chip */ | 43 | /* MAX_GPTIMER_ID: number of GPTIMERs on the chip */ |
| @@ -47,6 +47,7 @@ static struct omap_dm_timer *gptimer; | |||
| 47 | static struct clock_event_device clockevent_gpt; | 47 | static struct clock_event_device clockevent_gpt; |
| 48 | static u8 __initdata gptimer_id = 1; | 48 | static u8 __initdata gptimer_id = 1; |
| 49 | static u8 __initdata inited; | 49 | static u8 __initdata inited; |
| 50 | struct omap_dm_timer *gptimer_wakeup; | ||
| 50 | 51 | ||
| 51 | static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) | 52 | static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) |
| 52 | { | 53 | { |
| @@ -134,6 +135,7 @@ static void __init omap2_gp_clockevent_init(void) | |||
| 134 | 135 | ||
| 135 | gptimer = omap_dm_timer_request_specific(gptimer_id); | 136 | gptimer = omap_dm_timer_request_specific(gptimer_id); |
| 136 | BUG_ON(gptimer == NULL); | 137 | BUG_ON(gptimer == NULL); |
| 138 | gptimer_wakeup = gptimer; | ||
| 137 | 139 | ||
| 138 | #if defined(CONFIG_OMAP_32K_TIMER) | 140 | #if defined(CONFIG_OMAP_32K_TIMER) |
| 139 | src = OMAP_TIMER_SRC_32_KHZ; | 141 | src = OMAP_TIMER_SRC_32_KHZ; |
| @@ -231,7 +233,8 @@ static void __init omap2_gp_clocksource_init(void) | |||
| 231 | static void __init omap2_gp_timer_init(void) | 233 | static void __init omap2_gp_timer_init(void) |
| 232 | { | 234 | { |
| 233 | #ifdef CONFIG_LOCAL_TIMERS | 235 | #ifdef CONFIG_LOCAL_TIMERS |
| 234 | twd_base = OMAP2_IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE); | 236 | twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256); |
| 237 | BUG_ON(!twd_base); | ||
| 235 | #endif | 238 | #endif |
| 236 | omap_dm_timer_init(); | 239 | omap_dm_timer_init(); |
| 237 | 240 | ||
diff --git a/arch/arm/mach-omap2/usb-ehci.c b/arch/arm/mach-omap2/usb-ehci.c new file mode 100644 index 00000000000..e448abd5ec5 --- /dev/null +++ b/arch/arm/mach-omap2/usb-ehci.c | |||
| @@ -0,0 +1,192 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-omap2/usb-ehci.c | ||
| 3 | * | ||
| 4 | * This file will contain the board specific details for the | ||
| 5 | * Synopsys EHCI host controller on OMAP3430 | ||
| 6 | * | ||
| 7 | * Copyright (C) 2007 Texas Instruments | ||
| 8 | * Author: Vikram Pandita <vikram.pandita@ti.com> | ||
| 9 | * | ||
| 10 | * Generalization by: | ||
| 11 | * Felipe Balbi <felipe.balbi@nokia.com> | ||
| 12 | * | ||
| 13 | * This program is free software; you can redistribute it and/or modify | ||
| 14 | * it under the terms of the GNU General Public License version 2 as | ||
| 15 | * published by the Free Software Foundation. | ||
| 16 | */ | ||
| 17 | |||
| 18 | #include <linux/types.h> | ||
| 19 | #include <linux/errno.h> | ||
| 20 | #include <linux/delay.h> | ||
| 21 | #include <linux/platform_device.h> | ||
| 22 | #include <linux/clk.h> | ||
| 23 | #include <asm/io.h> | ||
| 24 | #include <plat/mux.h> | ||
| 25 | |||
| 26 | #include <mach/hardware.h> | ||
| 27 | #include <mach/irqs.h> | ||
| 28 | #include <plat/usb.h> | ||
| 29 | |||
| 30 | #if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_EHCI_HCD_MODULE) | ||
| 31 | |||
| 32 | static struct resource ehci_resources[] = { | ||
| 33 | { | ||
| 34 | .start = OMAP34XX_EHCI_BASE, | ||
| 35 | .end = OMAP34XX_EHCI_BASE + SZ_1K - 1, | ||
| 36 | .flags = IORESOURCE_MEM, | ||
| 37 | }, | ||
| 38 | { | ||
| 39 | .start = OMAP34XX_UHH_CONFIG_BASE, | ||
| 40 | .end = OMAP34XX_UHH_CONFIG_BASE + SZ_1K - 1, | ||
| 41 | .flags = IORESOURCE_MEM, | ||
| 42 | }, | ||
| 43 | { | ||
| 44 | .start = OMAP34XX_USBTLL_BASE, | ||
| 45 | .end = OMAP34XX_USBTLL_BASE + SZ_4K - 1, | ||
| 46 | .flags = IORESOURCE_MEM, | ||
| 47 | }, | ||
| 48 | { /* general IRQ */ | ||
| 49 | .start = INT_34XX_EHCI_IRQ, | ||
| 50 | .flags = IORESOURCE_IRQ, | ||
| 51 | } | ||
| 52 | }; | ||
| 53 | |||
| 54 | static u64 ehci_dmamask = ~(u32)0; | ||
| 55 | static struct platform_device ehci_device = { | ||
| 56 | .name = "ehci-omap", | ||
| 57 | .id = 0, | ||
| 58 | .dev = { | ||
| 59 | .dma_mask = &ehci_dmamask, | ||
| 60 | .coherent_dma_mask = 0xffffffff, | ||
| 61 | .platform_data = NULL, | ||
| 62 | }, | ||
| 63 | .num_resources = ARRAY_SIZE(ehci_resources), | ||
| 64 | .resource = ehci_resources, | ||
| 65 | }; | ||
| 66 | |||
| 67 | /* MUX settings for EHCI pins */ | ||
| 68 | /* | ||
| 69 | * setup_ehci_io_mux - initialize IO pad mux for USBHOST | ||
| 70 | */ | ||
| 71 | static void setup_ehci_io_mux(enum ehci_hcd_omap_mode *port_mode) | ||
| 72 | { | ||
| 73 | switch (port_mode[0]) { | ||
| 74 | case EHCI_HCD_OMAP_MODE_PHY: | ||
| 75 | omap_cfg_reg(Y9_3430_USB1HS_PHY_STP); | ||
| 76 | omap_cfg_reg(Y8_3430_USB1HS_PHY_CLK); | ||
| 77 | omap_cfg_reg(AA14_3430_USB1HS_PHY_DIR); | ||
| 78 | omap_cfg_reg(AA11_3430_USB1HS_PHY_NXT); | ||
| 79 | omap_cfg_reg(W13_3430_USB1HS_PHY_DATA0); | ||
| 80 | omap_cfg_reg(W12_3430_USB1HS_PHY_DATA1); | ||
| 81 | omap_cfg_reg(W11_3430_USB1HS_PHY_DATA2); | ||
| 82 | omap_cfg_reg(Y11_3430_USB1HS_PHY_DATA3); | ||
| 83 | omap_cfg_reg(W9_3430_USB1HS_PHY_DATA4); | ||
| 84 | omap_cfg_reg(Y12_3430_USB1HS_PHY_DATA5); | ||
| 85 | omap_cfg_reg(W8_3430_USB1HS_PHY_DATA6); | ||
| 86 | omap_cfg_reg(Y13_3430_USB1HS_PHY_DATA7); | ||
| 87 | break; | ||
| 88 | case EHCI_HCD_OMAP_MODE_TLL: | ||
| 89 | omap_cfg_reg(Y9_3430_USB1HS_TLL_STP); | ||
| 90 | omap_cfg_reg(Y8_3430_USB1HS_TLL_CLK); | ||
| 91 | omap_cfg_reg(AA14_3430_USB1HS_TLL_DIR); | ||
| 92 | omap_cfg_reg(AA11_3430_USB1HS_TLL_NXT); | ||
| 93 | omap_cfg_reg(W13_3430_USB1HS_TLL_DATA0); | ||
| 94 | omap_cfg_reg(W12_3430_USB1HS_TLL_DATA1); | ||
| 95 | omap_cfg_reg(W11_3430_USB1HS_TLL_DATA2); | ||
| 96 | omap_cfg_reg(Y11_3430_USB1HS_TLL_DATA3); | ||
| 97 | omap_cfg_reg(W9_3430_USB1HS_TLL_DATA4); | ||
| 98 | omap_cfg_reg(Y12_3430_USB1HS_TLL_DATA5); | ||
| 99 | omap_cfg_reg(W8_3430_USB1HS_TLL_DATA6); | ||
| 100 | omap_cfg_reg(Y13_3430_USB1HS_TLL_DATA7); | ||
| 101 | break; | ||
| 102 | case EHCI_HCD_OMAP_MODE_UNKNOWN: | ||
| 103 | /* FALLTHROUGH */ | ||
| 104 | default: | ||
| 105 | break; | ||
| 106 | } | ||
| 107 | |||
| 108 | switch (port_mode[1]) { | ||
| 109 | case EHCI_HCD_OMAP_MODE_PHY: | ||
| 110 | omap_cfg_reg(AA10_3430_USB2HS_PHY_STP); | ||
| 111 | omap_cfg_reg(AA8_3430_USB2HS_PHY_CLK); | ||
| 112 | omap_cfg_reg(AA9_3430_USB2HS_PHY_DIR); | ||
| 113 | omap_cfg_reg(AB11_3430_USB2HS_PHY_NXT); | ||
| 114 | omap_cfg_reg(AB10_3430_USB2HS_PHY_DATA0); | ||
| 115 | omap_cfg_reg(AB9_3430_USB2HS_PHY_DATA1); | ||
| 116 | omap_cfg_reg(W3_3430_USB2HS_PHY_DATA2); | ||
| 117 | omap_cfg_reg(T4_3430_USB2HS_PHY_DATA3); | ||
| 118 | omap_cfg_reg(T3_3430_USB2HS_PHY_DATA4); | ||
| 119 | omap_cfg_reg(R3_3430_USB2HS_PHY_DATA5); | ||
| 120 | omap_cfg_reg(R4_3430_USB2HS_PHY_DATA6); | ||
| 121 | omap_cfg_reg(T2_3430_USB2HS_PHY_DATA7); | ||
| 122 | break; | ||
| 123 | case EHCI_HCD_OMAP_MODE_TLL: | ||
| 124 | omap_cfg_reg(AA10_3430_USB2HS_TLL_STP); | ||
| 125 | omap_cfg_reg(AA8_3430_USB2HS_TLL_CLK); | ||
| 126 | omap_cfg_reg(AA9_3430_USB2HS_TLL_DIR); | ||
| 127 | omap_cfg_reg(AB11_3430_USB2HS_TLL_NXT); | ||
| 128 | omap_cfg_reg(AB10_3430_USB2HS_TLL_DATA0); | ||
| 129 | omap_cfg_reg(AB9_3430_USB2HS_TLL_DATA1); | ||
| 130 | omap_cfg_reg(W3_3430_USB2HS_TLL_DATA2); | ||
| 131 | omap_cfg_reg(T4_3430_USB2HS_TLL_DATA3); | ||
| 132 | omap_cfg_reg(T3_3430_USB2HS_TLL_DATA4); | ||
| 133 | omap_cfg_reg(R3_3430_USB2HS_TLL_DATA5); | ||
| 134 | omap_cfg_reg(R4_3430_USB2HS_TLL_DATA6); | ||
| 135 | omap_cfg_reg(T2_3430_USB2HS_TLL_DATA7); | ||
| 136 | break; | ||
| 137 | case EHCI_HCD_OMAP_MODE_UNKNOWN: | ||
| 138 | /* FALLTHROUGH */ | ||
| 139 | default: | ||
| 140 | break; | ||
| 141 | } | ||
| 142 | |||
| 143 | switch (port_mode[2]) { | ||
| 144 | case EHCI_HCD_OMAP_MODE_PHY: | ||
| 145 | printk(KERN_WARNING "Port3 can't be used in PHY mode\n"); | ||
| 146 | break; | ||
| 147 | case EHCI_HCD_OMAP_MODE_TLL: | ||
| 148 | omap_cfg_reg(AB3_3430_USB3HS_TLL_STP); | ||
| 149 | omap_cfg_reg(AA6_3430_USB3HS_TLL_CLK); | ||
| 150 | omap_cfg_reg(AA3_3430_USB3HS_TLL_DIR); | ||
| 151 | omap_cfg_reg(Y3_3430_USB3HS_TLL_NXT); | ||
| 152 | omap_cfg_reg(AA5_3430_USB3HS_TLL_DATA0); | ||
| 153 | omap_cfg_reg(Y4_3430_USB3HS_TLL_DATA1); | ||
| 154 | omap_cfg_reg(Y5_3430_USB3HS_TLL_DATA2); | ||
| 155 | omap_cfg_reg(W5_3430_USB3HS_TLL_DATA3); | ||
| 156 | omap_cfg_reg(AB12_3430_USB3HS_TLL_DATA4); | ||
| 157 | omap_cfg_reg(AB13_3430_USB3HS_TLL_DATA5); | ||
| 158 | omap_cfg_reg(AA13_3430_USB3HS_TLL_DATA6); | ||
| 159 | omap_cfg_reg(AA12_3430_USB3HS_TLL_DATA7); | ||
| 160 | break; | ||
| 161 | case EHCI_HCD_OMAP_MODE_UNKNOWN: | ||
| 162 | /* FALLTHROUGH */ | ||
| 163 | default: | ||
| 164 | break; | ||
| 165 | } | ||
| 166 | |||
| 167 | return; | ||
| 168 | } | ||
| 169 | |||
| 170 | void __init usb_ehci_init(struct ehci_hcd_omap_platform_data *pdata) | ||
| 171 | { | ||
| 172 | platform_device_add_data(&ehci_device, pdata, sizeof(*pdata)); | ||
| 173 | |||
| 174 | /* Setup Pin IO MUX for EHCI */ | ||
| 175 | if (cpu_is_omap34xx()) | ||
| 176 | setup_ehci_io_mux(pdata->port_mode); | ||
| 177 | |||
| 178 | if (platform_device_register(&ehci_device) < 0) { | ||
| 179 | printk(KERN_ERR "Unable to register HS-USB (EHCI) device\n"); | ||
| 180 | return; | ||
| 181 | } | ||
| 182 | } | ||
| 183 | |||
| 184 | #else | ||
| 185 | |||
| 186 | void __init usb_ehci_init(struct ehci_hcd_omap_platform_data *pdata) | ||
| 187 | |||
| 188 | { | ||
| 189 | } | ||
| 190 | |||
| 191 | #endif /* CONFIG_USB_EHCI_HCD */ | ||
| 192 | |||
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c index 1145a2562b0..a80441dd19b 100644 --- a/arch/arm/mach-omap2/usb-musb.c +++ b/arch/arm/mach-omap2/usb-musb.c | |||
| @@ -28,8 +28,8 @@ | |||
| 28 | 28 | ||
| 29 | #include <mach/hardware.h> | 29 | #include <mach/hardware.h> |
| 30 | #include <mach/irqs.h> | 30 | #include <mach/irqs.h> |
| 31 | #include <mach/mux.h> | 31 | #include <plat/mux.h> |
| 32 | #include <mach/usb.h> | 32 | #include <plat/usb.h> |
| 33 | 33 | ||
| 34 | #ifdef CONFIG_USB_MUSB_SOC | 34 | #ifdef CONFIG_USB_MUSB_SOC |
| 35 | 35 | ||
diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c index 8622c24cd27..10a2013c110 100644 --- a/arch/arm/mach-omap2/usb-tusb6010.c +++ b/arch/arm/mach-omap2/usb-tusb6010.c | |||
| @@ -16,8 +16,8 @@ | |||
| 16 | 16 | ||
| 17 | #include <linux/usb/musb.h> | 17 | #include <linux/usb/musb.h> |
| 18 | 18 | ||
| 19 | #include <mach/gpmc.h> | 19 | #include <plat/gpmc.h> |
| 20 | #include <mach/mux.h> | 20 | #include <plat/mux.h> |
| 21 | 21 | ||
| 22 | 22 | ||
| 23 | static u8 async_cs, sync_cs; | 23 | static u8 async_cs, sync_cs; |
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index a6f8eab14ba..d89c6adbe8b 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig | |||
| @@ -2,34 +2,105 @@ if ARCH_PXA | |||
| 2 | 2 | ||
| 3 | menu "Intel PXA2xx/PXA3xx Implementations" | 3 | menu "Intel PXA2xx/PXA3xx Implementations" |
| 4 | 4 | ||
| 5 | if PXA3xx | 5 | comment "Intel/Marvell Dev Platforms (sorted by hardware release time)" |
| 6 | 6 | ||
| 7 | menu "Supported PXA3xx Processor Variants" | 7 | config ARCH_LUBBOCK |
| 8 | bool "Intel DBPXA250 Development Platform (aka Lubbock)" | ||
| 9 | select PXA25x | ||
| 10 | select SA1111 | ||
| 11 | select PXA_HAVE_BOARD_IRQS | ||
| 8 | 12 | ||
| 9 | config CPU_PXA300 | 13 | config MACH_MAINSTONE |
| 10 | bool "PXA300 (codename Monahans-L)" | 14 | bool "Intel HCDDBBVA0 Development Platform (aka Mainstone)" |
| 15 | select PXA27x | ||
| 16 | select HAVE_PWM | ||
| 17 | select PXA_HAVE_BOARD_IRQS | ||
| 11 | 18 | ||
| 12 | config CPU_PXA310 | 19 | config MACH_ZYLONITE |
| 13 | bool "PXA310 (codename Monahans-LV)" | 20 | bool |
| 21 | select PXA3xx | ||
| 22 | select PXA_SSP | ||
| 23 | select HAVE_PWM | ||
| 24 | select PXA_HAVE_BOARD_IRQS | ||
| 25 | |||
| 26 | config MACH_ZYLONITE300 | ||
| 27 | bool "PXA3xx Development Platform (aka Zylonite) PXA300/310" | ||
| 14 | select CPU_PXA300 | 28 | select CPU_PXA300 |
| 29 | select CPU_PXA310 | ||
| 30 | select MACH_ZYLONITE | ||
| 15 | 31 | ||
| 16 | config CPU_PXA320 | 32 | config MACH_ZYLONITE320 |
| 17 | bool "PXA320 (codename Monahans-P)" | 33 | bool "PXA3xx Development Platform (aka Zylonite) PXA320" |
| 34 | select CPU_PXA320 | ||
| 35 | select MACH_ZYLONITE | ||
| 18 | 36 | ||
| 19 | config CPU_PXA930 | 37 | config MACH_LITTLETON |
| 20 | bool "PXA930 (codename Tavor-P)" | 38 | bool "PXA3xx Form Factor Platform (aka Littleton)" |
| 39 | select PXA3xx | ||
| 40 | select PXA_SSP | ||
| 21 | 41 | ||
| 22 | config CPU_PXA935 | 42 | config MACH_TAVOREVB |
| 23 | bool "PXA935 (codename Tavor-P65)" | 43 | bool "PXA930 Evaluation Board (aka TavorEVB)" |
| 44 | select PXA3xx | ||
| 24 | select CPU_PXA930 | 45 | select CPU_PXA930 |
| 25 | 46 | ||
| 26 | config CPU_PXA950 | 47 | config MACH_SAAR |
| 27 | bool "PXA950 (codename Tavor-PV2)" | 48 | bool "PXA930 Handheld Platform (aka SAAR)" |
| 49 | select PXA3xx | ||
| 28 | select CPU_PXA930 | 50 | select CPU_PXA930 |
| 29 | 51 | ||
| 30 | endmenu | 52 | comment "Third Party Dev Platforms (sorted by vendor name)" |
| 31 | 53 | ||
| 32 | endif | 54 | config ARCH_PXA_IDP |
| 55 | bool "Accelent Xscale IDP" | ||
| 56 | select PXA25x | ||
| 57 | |||
| 58 | config ARCH_VIPER | ||
| 59 | bool "Arcom/Eurotech VIPER SBC" | ||
| 60 | select PXA25x | ||
| 61 | select ISA | ||
| 62 | select I2C_GPIO | ||
| 63 | select HAVE_PWM | ||
| 64 | select PXA_HAVE_BOARD_IRQS | ||
| 65 | select PXA_HAVE_ISA_IRQS | ||
| 66 | |||
| 67 | config MACH_BALLOON3 | ||
| 68 | bool "Balloon 3 board" | ||
| 69 | select PXA27x | ||
| 70 | select IWMMXT | ||
| 71 | select PXA_HAVE_BOARD_IRQS | ||
| 72 | |||
| 73 | config MACH_CSB726 | ||
| 74 | bool "Enable Cogent CSB726 System On a Module" | ||
| 75 | select PXA27x | ||
| 76 | select IWMMXT | ||
| 77 | help | ||
| 78 | Say Y here if you intend to run this kernel on a Cogent | ||
| 79 | CSB726 System On Module. | ||
| 80 | |||
| 81 | config CSB726_CSB701 | ||
| 82 | bool "Enable support for CSB701 baseboard" | ||
| 83 | depends on MACH_CSB726 | ||
| 84 | |||
| 85 | config MACH_ARMCORE | ||
| 86 | bool "CompuLab CM-X255/CM-X270 modules" | ||
| 87 | select PXA27x | ||
| 88 | select IWMMXT | ||
| 89 | select PXA25x | ||
| 90 | select PXA_SSP | ||
| 91 | |||
| 92 | config MACH_EM_X270 | ||
| 93 | bool "CompuLab EM-x270 platform" | ||
| 94 | select PXA27x | ||
| 95 | |||
| 96 | config MACH_EXEDA | ||
| 97 | bool "CompuLab eXeda platform" | ||
| 98 | select PXA27x | ||
| 99 | |||
| 100 | config MACH_CM_X300 | ||
| 101 | bool "CompuLab CM-X300 modules" | ||
| 102 | select PXA3xx | ||
| 103 | select CPU_PXA300 | ||
| 33 | 104 | ||
| 34 | config ARCH_GUMSTIX | 105 | config ARCH_GUMSTIX |
| 35 | bool "Gumstix XScale 255 boards" | 106 | bool "Gumstix XScale 255 boards" |
| @@ -62,185 +133,24 @@ config MACH_STARGATE2 | |||
| 62 | select IWMMXT | 133 | select IWMMXT |
| 63 | select PXA_HAVE_BOARD_IRQS | 134 | select PXA_HAVE_BOARD_IRQS |
| 64 | 135 | ||
| 65 | config ARCH_LUBBOCK | 136 | config MACH_XCEP |
| 66 | bool "Intel DBPXA250 Development Platform" | 137 | bool "Iskratel Electronics XCEP" |
| 67 | select PXA25x | ||
| 68 | select SA1111 | ||
| 69 | select PXA_HAVE_BOARD_IRQS | ||
| 70 | |||
| 71 | config MACH_LOGICPD_PXA270 | ||
| 72 | bool "LogicPD PXA270 Card Engine Development Platform" | ||
| 73 | select PXA27x | ||
| 74 | select HAVE_PWM | ||
| 75 | select PXA_HAVE_BOARD_IRQS | ||
| 76 | |||
| 77 | config MACH_MAINSTONE | ||
| 78 | bool "Intel HCDDBBVA0 Development Platform" | ||
| 79 | select PXA27x | ||
| 80 | select HAVE_PWM | ||
| 81 | select PXA_HAVE_BOARD_IRQS | ||
| 82 | |||
| 83 | config MACH_MP900C | ||
| 84 | bool "Nec Mobilepro 900/c" | ||
| 85 | select PXA25x | ||
| 86 | |||
| 87 | config MACH_BALLOON3 | ||
| 88 | bool "Balloon 3 board" | ||
| 89 | select PXA27x | ||
| 90 | select IWMMXT | ||
| 91 | select PXA_HAVE_BOARD_IRQS | ||
| 92 | |||
| 93 | config ARCH_PXA_IDP | ||
| 94 | bool "Accelent Xscale IDP" | ||
| 95 | select PXA25x | ||
| 96 | |||
| 97 | config PXA_SHARPSL | ||
| 98 | bool "SHARP Zaurus SL-5600, SL-C7xx and SL-Cxx00 Models" | ||
| 99 | select SHARP_SCOOP | ||
| 100 | select SHARP_PARAM | ||
| 101 | help | ||
| 102 | Say Y here if you intend to run this kernel on a | ||
| 103 | Sharp Zaurus SL-5600 (Poodle), SL-C700 (Corgi), | ||
| 104 | SL-C750 (Shepherd), SL-C760 (Husky), SL-C1000 (Akita), | ||
| 105 | SL-C3000 (Spitz), SL-C3100 (Borzoi) or SL-C6000x (Tosa) | ||
| 106 | handheld computer. | ||
| 107 | |||
| 108 | config SHARPSL_PM | ||
| 109 | bool | ||
| 110 | select APM_EMULATION | ||
| 111 | |||
| 112 | config CORGI_SSP_DEPRECATED | ||
| 113 | bool | ||
| 114 | select PXA_SSP | ||
| 115 | help | ||
| 116 | This option will include corgi_ssp.c and corgi_lcd.c | ||
| 117 | that corgi_ts.c and other legacy drivers (corgi_bl.c | ||
| 118 | and sharpsl_pm.c) may depend on. | ||
| 119 | |||
| 120 | config MACH_POODLE | ||
| 121 | bool "Enable Sharp SL-5600 (Poodle) Support" | ||
| 122 | depends on PXA_SHARPSL | ||
| 123 | select PXA25x | 138 | select PXA25x |
| 124 | select SHARP_LOCOMO | 139 | select MTD |
| 140 | select MTD_PARTITIONS | ||
| 141 | select MTD_PHYSMAP | ||
| 142 | select MTD_CFI_INTELEXT | ||
| 143 | select MTD_CFI | ||
| 144 | select MTD_CHAR | ||
| 145 | select SMC91X | ||
| 125 | select PXA_SSP | 146 | select PXA_SSP |
| 126 | |||
| 127 | config MACH_CORGI | ||
| 128 | bool "Enable Sharp SL-C700 (Corgi) Support" | ||
| 129 | depends on PXA_SHARPSL | ||
| 130 | select PXA25x | ||
| 131 | select PXA_SHARP_C7xx | ||
| 132 | |||
| 133 | config MACH_SHEPHERD | ||
| 134 | bool "Enable Sharp SL-C750 (Shepherd) Support" | ||
| 135 | depends on PXA_SHARPSL | ||
| 136 | select PXA25x | ||
| 137 | select PXA_SHARP_C7xx | ||
| 138 | |||
| 139 | config MACH_HUSKY | ||
| 140 | bool "Enable Sharp SL-C760 (Husky) Support" | ||
| 141 | depends on PXA_SHARPSL | ||
| 142 | select PXA25x | ||
| 143 | select PXA_SHARP_C7xx | ||
| 144 | |||
| 145 | config MACH_AKITA | ||
| 146 | bool "Enable Sharp SL-1000 (Akita) Support" | ||
| 147 | depends on PXA_SHARPSL | ||
| 148 | select PXA27x | ||
| 149 | select PXA_SHARP_Cxx00 | ||
| 150 | select MACH_SPITZ | ||
| 151 | select I2C | ||
| 152 | select I2C_PXA | ||
| 153 | |||
| 154 | config MACH_SPITZ | ||
| 155 | bool "Enable Sharp Zaurus SL-3000 (Spitz) Support" | ||
| 156 | depends on PXA_SHARPSL | ||
| 157 | select PXA27x | ||
| 158 | select PXA_SHARP_Cxx00 | ||
| 159 | |||
| 160 | config MACH_BORZOI | ||
| 161 | bool "Enable Sharp Zaurus SL-3100 (Borzoi) Support" | ||
| 162 | depends on PXA_SHARPSL | ||
| 163 | select PXA27x | ||
| 164 | select PXA_SHARP_Cxx00 | ||
| 165 | |||
| 166 | config MACH_TOSA | ||
| 167 | bool "Enable Sharp SL-6000x (Tosa) Support" | ||
| 168 | depends on PXA_SHARPSL | ||
| 169 | select PXA25x | ||
| 170 | select PXA_HAVE_BOARD_IRQS | ||
| 171 | |||
| 172 | config ARCH_VIPER | ||
| 173 | bool "Arcom/Eurotech VIPER SBC" | ||
| 174 | select PXA25x | ||
| 175 | select ISA | ||
| 176 | select I2C_GPIO | ||
| 177 | select HAVE_PWM | ||
| 178 | select PXA_HAVE_BOARD_IRQS | ||
| 179 | select PXA_HAVE_ISA_IRQS | ||
| 180 | |||
| 181 | config ARCH_PXA_ESERIES | ||
| 182 | bool "PXA based Toshiba e-series PDAs" | ||
| 183 | select PXA25x | ||
| 184 | select PXA_HAVE_BOARD_IRQS | ||
| 185 | |||
| 186 | config MACH_E330 | ||
| 187 | bool "Toshiba e330" | ||
| 188 | default y | ||
| 189 | depends on ARCH_PXA_ESERIES | ||
| 190 | help | ||
| 191 | Say Y here if you intend to run this kernel on a Toshiba | ||
| 192 | e330 family PDA. | ||
| 193 | |||
| 194 | config MACH_E350 | ||
| 195 | bool "Toshiba e350" | ||
| 196 | default y | ||
| 197 | depends on ARCH_PXA_ESERIES | ||
| 198 | help | ||
| 199 | Say Y here if you intend to run this kernel on a Toshiba | ||
| 200 | e350 family PDA. | ||
| 201 | |||
| 202 | config MACH_E740 | ||
| 203 | bool "Toshiba e740" | ||
| 204 | default y | ||
| 205 | depends on ARCH_PXA_ESERIES | ||
| 206 | select FB_W100 | ||
| 207 | help | ||
| 208 | Say Y here if you intend to run this kernel on a Toshiba | ||
| 209 | e740 family PDA. | ||
| 210 | |||
| 211 | config MACH_E750 | ||
| 212 | bool "Toshiba e750" | ||
| 213 | default y | ||
| 214 | depends on ARCH_PXA_ESERIES | ||
| 215 | select FB_W100 | ||
| 216 | help | ||
| 217 | Say Y here if you intend to run this kernel on a Toshiba | ||
| 218 | e750 family PDA. | ||
| 219 | |||
| 220 | config MACH_E400 | ||
| 221 | bool "Toshiba e400" | ||
| 222 | default y | ||
| 223 | depends on ARCH_PXA_ESERIES | ||
| 224 | help | 147 | help |
| 225 | Say Y here if you intend to run this kernel on a Toshiba | 148 | PXA255 based Single Board Computer with SMC 91C111 ethernet chip and 64 MB of flash. |
| 226 | e400 family PDA. | 149 | Tuned for usage in Libera instruments for particle accelerators. |
| 227 | |||
| 228 | config MACH_E800 | ||
| 229 | bool "Toshiba e800" | ||
| 230 | default y | ||
| 231 | depends on ARCH_PXA_ESERIES | ||
| 232 | select FB_W100 | ||
| 233 | help | ||
| 234 | Say Y here if you intend to run this kernel on a Toshiba | ||
| 235 | e800 family PDA. | ||
| 236 | 150 | ||
| 237 | config TRIZEPS_PXA | 151 | config TRIZEPS_PXA |
| 238 | bool "PXA based Keith und Koep Trizeps DIMM-Modules" | 152 | bool "PXA based Keith und Koep Trizeps DIMM-Modules" |
| 239 | 153 | ||
| 240 | config MACH_H5000 | ||
| 241 | bool "HP iPAQ h5000" | ||
| 242 | select PXA25x | ||
| 243 | |||
| 244 | config MACH_TRIZEPS4 | 154 | config MACH_TRIZEPS4 |
| 245 | bool "Keith und Koep Trizeps4 DIMM-Module" | 155 | bool "Keith und Koep Trizeps4 DIMM-Module" |
| 246 | depends on TRIZEPS_PXA | 156 | depends on TRIZEPS_PXA |
| @@ -274,13 +184,38 @@ config TRIZEPS_PCMCIA | |||
| 274 | help | 184 | help |
| 275 | Enable PCMCIA support for Trizeps modules | 185 | Enable PCMCIA support for Trizeps modules |
| 276 | 186 | ||
| 277 | config MACH_EM_X270 | 187 | config MACH_LOGICPD_PXA270 |
| 278 | bool "CompuLab EM-x270 platform" | 188 | bool "LogicPD PXA270 Card Engine Development Platform" |
| 279 | select PXA27x | 189 | select PXA27x |
| 190 | select HAVE_PWM | ||
| 191 | select PXA_HAVE_BOARD_IRQS | ||
| 280 | 192 | ||
| 281 | config MACH_EXEDA | 193 | config MACH_PCM027 |
| 282 | bool "CompuLab eXeda platform" | 194 | bool "Phytec phyCORE-PXA270 CPU module (PCM-027)" |
| 283 | select PXA27x | 195 | select PXA27x |
| 196 | select IWMMXT | ||
| 197 | select PXA_SSP | ||
| 198 | select PXA_HAVE_BOARD_IRQS | ||
| 199 | |||
| 200 | config MACH_PCM990_BASEBOARD | ||
| 201 | bool "PHYTEC PCM-990 development board" | ||
| 202 | select HAVE_PWM | ||
| 203 | depends on MACH_PCM027 | ||
| 204 | |||
| 205 | choice | ||
| 206 | prompt "display on pcm990" | ||
| 207 | depends on MACH_PCM990_BASEBOARD | ||
| 208 | |||
| 209 | config PCM990_DISPLAY_SHARP | ||
| 210 | bool "sharp lq084v1dg21 stn display" | ||
| 211 | |||
| 212 | config PCM990_DISPLAY_NEC | ||
| 213 | bool "nec nl6448bc20_18d tft display" | ||
| 214 | |||
| 215 | config PCM990_DISPLAY_NONE | ||
| 216 | bool "no display" | ||
| 217 | |||
| 218 | endchoice | ||
| 284 | 219 | ||
| 285 | config MACH_COLIBRI | 220 | config MACH_COLIBRI |
| 286 | bool "Toradex Colibri PXA270" | 221 | bool "Toradex Colibri PXA270" |
| @@ -290,45 +225,15 @@ config MACH_COLIBRI300 | |||
| 290 | bool "Toradex Colibri PXA300/310" | 225 | bool "Toradex Colibri PXA300/310" |
| 291 | select PXA3xx | 226 | select PXA3xx |
| 292 | select CPU_PXA300 | 227 | select CPU_PXA300 |
| 228 | select CPU_PXA310 | ||
| 229 | select HAVE_PWM | ||
| 293 | 230 | ||
| 294 | config MACH_COLIBRI320 | 231 | config MACH_COLIBRI320 |
| 295 | bool "Toradex Colibri PXA320" | 232 | bool "Toradex Colibri PXA320" |
| 296 | select PXA3xx | 233 | select PXA3xx |
| 297 | select CPU_PXA320 | 234 | select CPU_PXA320 |
| 298 | 235 | ||
| 299 | config MACH_ZYLONITE | 236 | comment "End-user Products (sorted by vendor name)" |
| 300 | bool "PXA3xx Development Platform (aka Zylonite)" | ||
| 301 | select PXA3xx | ||
| 302 | select PXA_SSP | ||
| 303 | select HAVE_PWM | ||
| 304 | select PXA_HAVE_BOARD_IRQS | ||
| 305 | |||
| 306 | config MACH_LITTLETON | ||
| 307 | bool "PXA3xx Form Factor Platform (aka Littleton)" | ||
| 308 | select PXA3xx | ||
| 309 | select PXA_SSP | ||
| 310 | |||
| 311 | config MACH_TAVOREVB | ||
| 312 | bool "PXA930 Evaluation Board (aka TavorEVB)" | ||
| 313 | select PXA3xx | ||
| 314 | select CPU_PXA930 | ||
| 315 | |||
| 316 | config MACH_SAAR | ||
| 317 | bool "PXA930 Handheld Platform (aka SAAR)" | ||
| 318 | select PXA3xx | ||
| 319 | select CPU_PXA930 | ||
| 320 | |||
| 321 | config MACH_ARMCORE | ||
| 322 | bool "CompuLab CM-X255/CM-X270 modules" | ||
| 323 | select PXA27x | ||
| 324 | select IWMMXT | ||
| 325 | select PXA25x | ||
| 326 | select PXA_SSP | ||
| 327 | |||
| 328 | config MACH_CM_X300 | ||
| 329 | bool "CompuLab CM-X300 modules" | ||
| 330 | select PXA3xx | ||
| 331 | select CPU_PXA300 | ||
| 332 | 237 | ||
| 333 | config MACH_H4700 | 238 | config MACH_H4700 |
| 334 | bool "HP iPAQ hx4700" | 239 | bool "HP iPAQ hx4700" |
| @@ -338,6 +243,15 @@ config MACH_H4700 | |||
| 338 | select HAVE_PWM | 243 | select HAVE_PWM |
| 339 | select PXA_HAVE_BOARD_IRQS | 244 | select PXA_HAVE_BOARD_IRQS |
| 340 | 245 | ||
| 246 | config MACH_H5000 | ||
| 247 | bool "HP iPAQ h5000" | ||
| 248 | select PXA25x | ||
| 249 | |||
| 250 | config MACH_HIMALAYA | ||
| 251 | bool "HTC Himalaya Support" | ||
| 252 | select CPU_PXA26x | ||
| 253 | select FB_W100 | ||
| 254 | |||
| 341 | config MACH_MAGICIAN | 255 | config MACH_MAGICIAN |
| 342 | bool "Enable HTC Magician Support" | 256 | bool "Enable HTC Magician Support" |
| 343 | select PXA27x | 257 | select PXA27x |
| @@ -346,11 +260,6 @@ config MACH_MAGICIAN | |||
| 346 | select HAVE_PWM | 260 | select HAVE_PWM |
| 347 | select PXA_HAVE_BOARD_IRQS | 261 | select PXA_HAVE_BOARD_IRQS |
| 348 | 262 | ||
| 349 | config MACH_HIMALAYA | ||
| 350 | bool "HTC Himalaya Support" | ||
| 351 | select CPU_PXA26x | ||
| 352 | select FB_W100 | ||
| 353 | |||
| 354 | config MACH_MIOA701 | 263 | config MACH_MIOA701 |
| 355 | bool "Mitac Mio A701 Support" | 264 | bool "Mitac Mio A701 Support" |
| 356 | select PXA27x | 265 | select PXA27x |
| @@ -362,13 +271,47 @@ config MACH_MIOA701 | |||
| 362 | MIO A701. Currently there is only basic support | 271 | MIO A701. Currently there is only basic support |
| 363 | for this PDA. | 272 | for this PDA. |
| 364 | 273 | ||
| 365 | config MACH_PCM027 | 274 | config PXA_EZX |
| 366 | bool "Phytec phyCORE-PXA270 CPU module (PCM-027)" | 275 | bool "Motorola EZX Platform" |
| 367 | select PXA27x | 276 | select PXA27x |
| 368 | select IWMMXT | 277 | select IWMMXT |
| 369 | select PXA_SSP | 278 | select HAVE_PWM |
| 370 | select PXA_HAVE_BOARD_IRQS | 279 | select PXA_HAVE_BOARD_IRQS |
| 371 | 280 | ||
| 281 | config MACH_EZX_A780 | ||
| 282 | bool "Motorola EZX A780" | ||
| 283 | default y | ||
| 284 | depends on PXA_EZX | ||
| 285 | |||
| 286 | config MACH_EZX_E680 | ||
| 287 | bool "Motorola EZX E680" | ||
| 288 | default y | ||
| 289 | depends on PXA_EZX | ||
| 290 | |||
| 291 | config MACH_EZX_A1200 | ||
| 292 | bool "Motorola EZX A1200" | ||
| 293 | default y | ||
| 294 | depends on PXA_EZX | ||
| 295 | |||
| 296 | config MACH_EZX_A910 | ||
| 297 | bool "Motorola EZX A910" | ||
| 298 | default y | ||
| 299 | depends on PXA_EZX | ||
| 300 | |||
| 301 | config MACH_EZX_E6 | ||
| 302 | bool "Motorola EZX E6" | ||
| 303 | default y | ||
| 304 | depends on PXA_EZX | ||
| 305 | |||
| 306 | config MACH_EZX_E2 | ||
| 307 | bool "Motorola EZX E2" | ||
| 308 | default y | ||
| 309 | depends on PXA_EZX | ||
| 310 | |||
| 311 | config MACH_MP900C | ||
| 312 | bool "Nec Mobilepro 900/c" | ||
| 313 | select PXA25x | ||
| 314 | |||
| 372 | config ARCH_PXA_PALM | 315 | config ARCH_PXA_PALM |
| 373 | bool "PXA based Palm PDAs" | 316 | bool "PXA based Palm PDAs" |
| 374 | select HAVE_PWM | 317 | select HAVE_PWM |
| @@ -421,109 +364,172 @@ config MACH_PALMZ72 | |||
| 421 | Say Y here if you intend to run this kernel on Palm Zire 72 | 364 | Say Y here if you intend to run this kernel on Palm Zire 72 |
| 422 | handheld computer. | 365 | handheld computer. |
| 423 | 366 | ||
| 424 | config MACH_TREO680 | 367 | config MACH_PALMLD |
| 425 | bool "Palm Treo 680" | 368 | bool "Palm LifeDrive" |
| 426 | default y | 369 | default y |
| 427 | depends on ARCH_PXA_PALM | 370 | depends on ARCH_PXA_PALM |
| 428 | select PXA27x | 371 | select PXA27x |
| 429 | select IWMMXT | 372 | select IWMMXT |
| 430 | help | 373 | help |
| 431 | Say Y here if you intend to run this kernel on Palm Treo 680 | 374 | Say Y here if you intend to run this kernel on a Palm LifeDrive |
| 375 | handheld computer. | ||
| 376 | |||
| 377 | config PALM_TREO | ||
| 378 | bool | ||
| 379 | depends on ARCH_PXA_PALM | ||
| 380 | |||
| 381 | config MACH_CENTRO | ||
| 382 | bool "Palm Centro 685 (GSM)" | ||
| 383 | default y | ||
| 384 | depends on ARCH_PXA_PALM | ||
| 385 | select PXA27x | ||
| 386 | select IWMMXT | ||
| 387 | select PALM_TREO | ||
| 388 | help | ||
| 389 | Say Y here if you intend to run this kernel on Palm Centro 685 (GSM) | ||
| 432 | smartphone. | 390 | smartphone. |
| 433 | 391 | ||
| 434 | config MACH_PALMLD | 392 | config MACH_TREO680 |
| 435 | bool "Palm LifeDrive" | 393 | bool "Palm Treo 680" |
| 436 | default y | 394 | default y |
| 437 | depends on ARCH_PXA_PALM | 395 | depends on ARCH_PXA_PALM |
| 438 | select PXA27x | 396 | select PXA27x |
| 439 | select IWMMXT | 397 | select IWMMXT |
| 398 | select PALM_TREO | ||
| 440 | help | 399 | help |
| 441 | Say Y here if you intend to run this kernel on a Palm LifeDrive | 400 | Say Y here if you intend to run this kernel on Palm Treo 680 |
| 401 | smartphone. | ||
| 402 | |||
| 403 | config PXA_SHARPSL | ||
| 404 | bool "SHARP Zaurus SL-5600, SL-C7xx and SL-Cxx00 Models" | ||
| 405 | select SHARP_SCOOP | ||
| 406 | select SHARP_PARAM | ||
| 407 | help | ||
| 408 | Say Y here if you intend to run this kernel on a | ||
| 409 | Sharp Zaurus SL-5600 (Poodle), SL-C700 (Corgi), | ||
| 410 | SL-C750 (Shepherd), SL-C760 (Husky), SL-C1000 (Akita), | ||
| 411 | SL-C3000 (Spitz), SL-C3100 (Borzoi) or SL-C6000x (Tosa) | ||
| 442 | handheld computer. | 412 | handheld computer. |
| 443 | 413 | ||
| 444 | config MACH_PCM990_BASEBOARD | 414 | config SHARPSL_PM |
| 445 | bool "PHYTEC PCM-990 development board" | 415 | bool |
| 446 | select HAVE_PWM | 416 | select APM_EMULATION |
| 447 | depends on MACH_PCM027 | ||
| 448 | 417 | ||
| 449 | choice | 418 | config CORGI_SSP_DEPRECATED |
| 450 | prompt "display on pcm990" | 419 | bool |
| 451 | depends on MACH_PCM990_BASEBOARD | 420 | select PXA_SSP |
| 421 | help | ||
| 422 | This option will include corgi_ssp.c and corgi_lcd.c | ||
| 423 | that corgi_ts.c and other legacy drivers (corgi_bl.c | ||
| 424 | and sharpsl_pm.c) may depend on. | ||
| 452 | 425 | ||
| 453 | config PCM990_DISPLAY_SHARP | 426 | config MACH_POODLE |
| 454 | bool "sharp lq084v1dg21 stn display" | 427 | bool "Enable Sharp SL-5600 (Poodle) Support" |
| 428 | depends on PXA_SHARPSL | ||
| 429 | select PXA25x | ||
| 430 | select SHARP_LOCOMO | ||
| 431 | select PXA_SSP | ||
| 455 | 432 | ||
| 456 | config PCM990_DISPLAY_NEC | 433 | config MACH_CORGI |
| 457 | bool "nec nl6448bc20_18d tft display" | 434 | bool "Enable Sharp SL-C700 (Corgi) Support" |
| 435 | depends on PXA_SHARPSL | ||
| 436 | select PXA25x | ||
| 437 | select PXA_SHARP_C7xx | ||
| 458 | 438 | ||
| 459 | config PCM990_DISPLAY_NONE | 439 | config MACH_SHEPHERD |
| 460 | bool "no display" | 440 | bool "Enable Sharp SL-C750 (Shepherd) Support" |
| 441 | depends on PXA_SHARPSL | ||
| 442 | select PXA25x | ||
| 443 | select PXA_SHARP_C7xx | ||
| 461 | 444 | ||
| 462 | endchoice | 445 | config MACH_HUSKY |
| 446 | bool "Enable Sharp SL-C760 (Husky) Support" | ||
| 447 | depends on PXA_SHARPSL | ||
| 448 | select PXA25x | ||
| 449 | select PXA_SHARP_C7xx | ||
| 463 | 450 | ||
| 464 | config MACH_CSB726 | 451 | config MACH_AKITA |
| 465 | bool "Enable Cogent CSB726 System On a Module" | 452 | bool "Enable Sharp SL-1000 (Akita) Support" |
| 453 | depends on PXA_SHARPSL | ||
| 466 | select PXA27x | 454 | select PXA27x |
| 467 | select IWMMXT | 455 | select PXA_SHARP_Cxx00 |
| 468 | help | 456 | select MACH_SPITZ |
| 469 | Say Y here if you intend to run this kernel on a Cogent | 457 | select I2C |
| 470 | CSB726 System On Module. | 458 | select I2C_PXA |
| 471 | 459 | ||
| 472 | config CSB726_CSB701 | 460 | config MACH_SPITZ |
| 473 | bool "Enable supprot for CSB701 baseboard" | 461 | bool "Enable Sharp Zaurus SL-3000 (Spitz) Support" |
| 474 | depends on MACH_CSB726 | 462 | depends on PXA_SHARPSL |
| 463 | select PXA27x | ||
| 464 | select PXA_SHARP_Cxx00 | ||
| 475 | 465 | ||
| 476 | config PXA_EZX | 466 | config MACH_BORZOI |
| 477 | bool "Motorola EZX Platform" | 467 | bool "Enable Sharp Zaurus SL-3100 (Borzoi) Support" |
| 468 | depends on PXA_SHARPSL | ||
| 478 | select PXA27x | 469 | select PXA27x |
| 479 | select IWMMXT | 470 | select PXA_SHARP_Cxx00 |
| 480 | select HAVE_PWM | 471 | |
| 472 | config MACH_TOSA | ||
| 473 | bool "Enable Sharp SL-6000x (Tosa) Support" | ||
| 474 | depends on PXA_SHARPSL | ||
| 475 | select PXA25x | ||
| 481 | select PXA_HAVE_BOARD_IRQS | 476 | select PXA_HAVE_BOARD_IRQS |
| 482 | 477 | ||
| 483 | config MACH_EZX_A780 | 478 | config ARCH_PXA_ESERIES |
| 484 | bool "Motorola EZX A780" | 479 | bool "PXA based Toshiba e-series PDAs" |
| 485 | default y | 480 | select PXA25x |
| 486 | depends on PXA_EZX | 481 | select PXA_HAVE_BOARD_IRQS |
| 487 | 482 | ||
| 488 | config MACH_EZX_E680 | 483 | config MACH_E330 |
| 489 | bool "Motorola EZX E680" | 484 | bool "Toshiba e330" |
| 490 | default y | 485 | default y |
| 491 | depends on PXA_EZX | 486 | depends on ARCH_PXA_ESERIES |
| 487 | help | ||
| 488 | Say Y here if you intend to run this kernel on a Toshiba | ||
| 489 | e330 family PDA. | ||
| 492 | 490 | ||
| 493 | config MACH_EZX_A1200 | 491 | config MACH_E350 |
| 494 | bool "Motorola EZX A1200" | 492 | bool "Toshiba e350" |
| 495 | default y | 493 | default y |
| 496 | depends on PXA_EZX | 494 | depends on ARCH_PXA_ESERIES |
| 495 | help | ||
| 496 | Say Y here if you intend to run this kernel on a Toshiba | ||
| 497 | e350 family PDA. | ||
| 497 | 498 | ||
| 498 | config MACH_EZX_A910 | 499 | config MACH_E740 |
| 499 | bool "Motorola EZX A910" | 500 | bool "Toshiba e740" |
| 500 | default y | 501 | default y |
| 501 | depends on PXA_EZX | 502 | depends on ARCH_PXA_ESERIES |
| 503 | select FB_W100 | ||
| 504 | help | ||
| 505 | Say Y here if you intend to run this kernel on a Toshiba | ||
| 506 | e740 family PDA. | ||
| 502 | 507 | ||
| 503 | config MACH_EZX_E6 | 508 | config MACH_E750 |
| 504 | bool "Motorola EZX E6" | 509 | bool "Toshiba e750" |
| 505 | default y | 510 | default y |
| 506 | depends on PXA_EZX | 511 | depends on ARCH_PXA_ESERIES |
| 512 | select FB_W100 | ||
| 513 | help | ||
| 514 | Say Y here if you intend to run this kernel on a Toshiba | ||
| 515 | e750 family PDA. | ||
| 507 | 516 | ||
| 508 | config MACH_EZX_E2 | 517 | config MACH_E400 |
| 509 | bool "Motorola EZX E2" | 518 | bool "Toshiba e400" |
| 510 | default y | 519 | default y |
| 511 | depends on PXA_EZX | 520 | depends on ARCH_PXA_ESERIES |
| 521 | help | ||
| 522 | Say Y here if you intend to run this kernel on a Toshiba | ||
| 523 | e400 family PDA. | ||
| 512 | 524 | ||
| 513 | config MACH_XCEP | 525 | config MACH_E800 |
| 514 | bool "Iskratel Electronics XCEP" | 526 | bool "Toshiba e800" |
| 515 | select PXA25x | 527 | default y |
| 516 | select MTD | 528 | depends on ARCH_PXA_ESERIES |
| 517 | select MTD_PARTITIONS | 529 | select FB_W100 |
| 518 | select MTD_PHYSMAP | ||
| 519 | select MTD_CFI_INTELEXT | ||
| 520 | select MTD_CFI | ||
| 521 | select MTD_CHAR | ||
| 522 | select SMC91X | ||
| 523 | select PXA_SSP | ||
| 524 | help | 530 | help |
| 525 | PXA255 based Single Board Computer with SMC 91C111 ethernet chip and 64 MB of flash. | 531 | Say Y here if you intend to run this kernel on a Toshiba |
| 526 | Tuned for usage in Libera instruments for particle accelerators. | 532 | e800 family PDA. |
| 527 | 533 | ||
| 528 | endmenu | 534 | endmenu |
| 529 | 535 | ||
| @@ -551,6 +557,42 @@ config PXA3xx | |||
| 551 | help | 557 | help |
| 552 | Select code specific to PXA3xx variants | 558 | Select code specific to PXA3xx variants |
| 553 | 559 | ||
| 560 | config CPU_PXA300 | ||
| 561 | bool | ||
| 562 | select PXA3xx | ||
| 563 | help | ||
| 564 | PXA300 (codename Monahans-L) | ||
| 565 | |||
| 566 | config CPU_PXA310 | ||
| 567 | bool | ||
| 568 | select CPU_PXA300 | ||
| 569 | help | ||
| 570 | PXA310 (codename Monahans-LV) | ||
| 571 | |||
| 572 | config CPU_PXA320 | ||
| 573 | bool | ||
| 574 | select PXA3xx | ||
| 575 | help | ||
| 576 | PXA320 (codename Monahans-P) | ||
| 577 | |||
| 578 | config CPU_PXA930 | ||
| 579 | bool | ||
| 580 | select PXA3xx | ||
| 581 | help | ||
| 582 | PXA930 (codename Tavor-P) | ||
| 583 | |||
| 584 | config CPU_PXA935 | ||
| 585 | bool | ||
| 586 | select CPU_PXA930 | ||
| 587 | help | ||
| 588 | PXA935 (codename Tavor-P65) | ||
| 589 | |||
| 590 | config CPU_PXA950 | ||
| 591 | bool | ||
| 592 | select CPU_PXA930 | ||
| 593 | help | ||
| 594 | PXA950 (codename Tavor-PV2) | ||
| 595 | |||
| 554 | config PXA_SHARP_C7xx | 596 | config PXA_SHARP_C7xx |
| 555 | bool | 597 | bool |
| 556 | select PXA_SSP | 598 | select PXA_SSP |
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile index f10e152bfc2..b5d29e60a34 100644 --- a/arch/arm/mach-pxa/Makefile +++ b/arch/arm/mach-pxa/Makefile | |||
| @@ -24,33 +24,63 @@ obj-$(CONFIG_CPU_PXA300) += pxa300.o | |||
| 24 | obj-$(CONFIG_CPU_PXA320) += pxa320.o | 24 | obj-$(CONFIG_CPU_PXA320) += pxa320.o |
| 25 | obj-$(CONFIG_CPU_PXA930) += pxa930.o | 25 | obj-$(CONFIG_CPU_PXA930) += pxa930.o |
| 26 | 26 | ||
| 27 | # Specific board support | 27 | # NOTE: keep the order of boards in accordance to their order in Kconfig |
| 28 | obj-$(CONFIG_ARCH_GUMSTIX) += gumstix.o | 28 | |
| 29 | obj-$(CONFIG_GUMSTIX_AM200EPD) += am200epd.o | 29 | # Intel/Marvell Dev Platforms |
| 30 | obj-$(CONFIG_GUMSTIX_AM300EPD) += am300epd.o | ||
| 31 | obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o | 30 | obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o |
| 32 | obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o | ||
| 33 | obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o | 31 | obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o |
| 34 | obj-$(CONFIG_MACH_BALLOON3) += balloon3.o | 32 | obj-$(CONFIG_MACH_ZYLONITE300) += zylonite.o zylonite_pxa300.o |
| 35 | obj-$(CONFIG_MACH_MP900C) += mp900.o | 33 | obj-$(CONFIG_MACH_ZYLONITE320) += zylonite.o zylonite_pxa320.o |
| 34 | obj-$(CONFIG_MACH_LITTLETON) += littleton.o | ||
| 35 | obj-$(CONFIG_MACH_TAVOREVB) += tavorevb.o | ||
| 36 | obj-$(CONFIG_MACH_SAAR) += saar.o | ||
| 37 | |||
| 38 | # 3rd Party Dev Platforms | ||
| 36 | obj-$(CONFIG_ARCH_PXA_IDP) += idp.o | 39 | obj-$(CONFIG_ARCH_PXA_IDP) += idp.o |
| 40 | obj-$(CONFIG_ARCH_VIPER) += viper.o | ||
| 41 | obj-$(CONFIG_MACH_BALLOON3) += balloon3.o | ||
| 42 | obj-$(CONFIG_MACH_CSB726) += csb726.o | ||
| 43 | obj-$(CONFIG_CSB726_CSB701) += csb701.o | ||
| 44 | obj-$(CONFIG_MACH_ARMCORE) += cm-x2xx.o cm-x255.o cm-x270.o | ||
| 45 | ifeq ($(CONFIG_PCI),y) | ||
| 46 | obj-$(CONFIG_MACH_ARMCORE) += cm-x2xx-pci.o | ||
| 47 | endif | ||
| 48 | obj-$(CONFIG_MACH_EM_X270) += em-x270.o | ||
| 49 | obj-$(CONFIG_MACH_CM_X300) += cm-x300.o | ||
| 50 | obj-$(CONFIG_ARCH_GUMSTIX) += gumstix.o | ||
| 51 | obj-$(CONFIG_GUMSTIX_AM200EPD) += am200epd.o | ||
| 52 | obj-$(CONFIG_GUMSTIX_AM300EPD) += am300epd.o | ||
| 53 | obj-$(CONFIG_MACH_INTELMOTE2) += imote2.o | ||
| 54 | obj-$(CONFIG_MACH_STARGATE2) += stargate2.o | ||
| 55 | obj-$(CONFIG_MACH_XCEP) += xcep.o | ||
| 37 | obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o | 56 | obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o |
| 57 | obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o | ||
| 58 | obj-$(CONFIG_MACH_PCM027) += pcm027.o | ||
| 59 | obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o | ||
| 38 | obj-$(CONFIG_MACH_COLIBRI) += colibri-pxa270.o | 60 | obj-$(CONFIG_MACH_COLIBRI) += colibri-pxa270.o |
| 39 | obj-$(CONFIG_MACH_COLIBRI300) += colibri-pxa3xx.o colibri-pxa300.o | 61 | obj-$(CONFIG_MACH_COLIBRI300) += colibri-pxa3xx.o colibri-pxa300.o |
| 40 | obj-$(CONFIG_MACH_COLIBRI320) += colibri-pxa3xx.o colibri-pxa320.o | 62 | obj-$(CONFIG_MACH_COLIBRI320) += colibri-pxa3xx.o colibri-pxa320.o |
| 63 | |||
| 64 | # End-user Products | ||
| 65 | obj-$(CONFIG_MACH_H4700) += hx4700.o | ||
| 41 | obj-$(CONFIG_MACH_H5000) += h5000.o | 66 | obj-$(CONFIG_MACH_H5000) += h5000.o |
| 67 | obj-$(CONFIG_MACH_HIMALAYA) += himalaya.o | ||
| 68 | obj-$(CONFIG_MACH_MAGICIAN) += magician.o | ||
| 69 | obj-$(CONFIG_MACH_MIOA701) += mioa701.o mioa701_bootresume.o | ||
| 70 | obj-$(CONFIG_PXA_EZX) += ezx.o | ||
| 71 | obj-$(CONFIG_MACH_MP900C) += mp900.o | ||
| 72 | obj-$(CONFIG_MACH_PALMTE2) += palmte2.o | ||
| 73 | obj-$(CONFIG_MACH_PALMTC) += palmtc.o | ||
| 74 | obj-$(CONFIG_MACH_PALMT5) += palmt5.o | ||
| 75 | obj-$(CONFIG_MACH_PALMTX) += palmtx.o | ||
| 76 | obj-$(CONFIG_MACH_PALMZ72) += palmz72.o | ||
| 77 | obj-$(CONFIG_MACH_PALMLD) += palmld.o | ||
| 78 | obj-$(CONFIG_PALM_TREO) += palmtreo.o | ||
| 42 | obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o sharpsl_pm.o corgi_pm.o | 79 | obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o sharpsl_pm.o corgi_pm.o |
| 43 | obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o sharpsl_pm.o spitz_pm.o | 80 | obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o sharpsl_pm.o spitz_pm.o |
| 44 | obj-$(CONFIG_CORGI_SSP_DEPRECATED) += corgi_ssp.o corgi_lcd.o | 81 | obj-$(CONFIG_CORGI_SSP_DEPRECATED) += corgi_ssp.o corgi_lcd.o |
| 45 | obj-$(CONFIG_MACH_POODLE) += poodle.o | 82 | obj-$(CONFIG_MACH_POODLE) += poodle.o |
| 46 | obj-$(CONFIG_MACH_PCM027) += pcm027.o | ||
| 47 | obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o | ||
| 48 | obj-$(CONFIG_MACH_TOSA) += tosa.o | 83 | obj-$(CONFIG_MACH_TOSA) += tosa.o |
| 49 | obj-$(CONFIG_MACH_EM_X270) += em-x270.o | ||
| 50 | obj-$(CONFIG_MACH_H4700) += hx4700.o | ||
| 51 | obj-$(CONFIG_MACH_MAGICIAN) += magician.o | ||
| 52 | obj-$(CONFIG_MACH_HIMALAYA) += himalaya.o | ||
| 53 | obj-$(CONFIG_MACH_MIOA701) += mioa701.o mioa701_bootresume.o | ||
| 54 | obj-$(CONFIG_ARCH_PXA_ESERIES) += eseries.o | 84 | obj-$(CONFIG_ARCH_PXA_ESERIES) += eseries.o |
| 55 | obj-$(CONFIG_MACH_E330) += e330.o | 85 | obj-$(CONFIG_MACH_E330) += e330.o |
| 56 | obj-$(CONFIG_MACH_E350) += e350.o | 86 | obj-$(CONFIG_MACH_E350) += e350.o |
| @@ -58,34 +88,6 @@ obj-$(CONFIG_MACH_E740) += e740.o | |||
| 58 | obj-$(CONFIG_MACH_E750) += e750.o | 88 | obj-$(CONFIG_MACH_E750) += e750.o |
| 59 | obj-$(CONFIG_MACH_E400) += e400.o | 89 | obj-$(CONFIG_MACH_E400) += e400.o |
| 60 | obj-$(CONFIG_MACH_E800) += e800.o | 90 | obj-$(CONFIG_MACH_E800) += e800.o |
| 61 | obj-$(CONFIG_MACH_PALMTE2) += palmte2.o | ||
| 62 | obj-$(CONFIG_MACH_PALMTC) += palmtc.o | ||
| 63 | obj-$(CONFIG_MACH_PALMT5) += palmt5.o | ||
| 64 | obj-$(CONFIG_MACH_PALMTX) += palmtx.o | ||
| 65 | obj-$(CONFIG_MACH_PALMLD) += palmld.o | ||
| 66 | obj-$(CONFIG_MACH_PALMZ72) += palmz72.o | ||
| 67 | obj-$(CONFIG_MACH_TREO680) += treo680.o | ||
| 68 | obj-$(CONFIG_ARCH_VIPER) += viper.o | ||
| 69 | |||
| 70 | ifeq ($(CONFIG_MACH_ZYLONITE),y) | ||
| 71 | obj-y += zylonite.o | ||
| 72 | obj-$(CONFIG_CPU_PXA300) += zylonite_pxa300.o | ||
| 73 | obj-$(CONFIG_CPU_PXA320) += zylonite_pxa320.o | ||
| 74 | endif | ||
| 75 | obj-$(CONFIG_MACH_LITTLETON) += littleton.o | ||
| 76 | obj-$(CONFIG_MACH_TAVOREVB) += tavorevb.o | ||
| 77 | obj-$(CONFIG_MACH_SAAR) += saar.o | ||
| 78 | |||
| 79 | obj-$(CONFIG_MACH_ARMCORE) += cm-x2xx.o cm-x255.o cm-x270.o | ||
| 80 | obj-$(CONFIG_MACH_CM_X300) += cm-x300.o | ||
| 81 | obj-$(CONFIG_PXA_EZX) += ezx.o | ||
| 82 | |||
| 83 | obj-$(CONFIG_MACH_XCEP) += xcep.o | ||
| 84 | |||
| 85 | obj-$(CONFIG_MACH_INTELMOTE2) += imote2.o | ||
| 86 | obj-$(CONFIG_MACH_STARGATE2) += stargate2.o | ||
| 87 | obj-$(CONFIG_MACH_CSB726) += csb726.o | ||
| 88 | obj-$(CONFIG_CSB726_CSB701) += csb701.o | ||
| 89 | 91 | ||
| 90 | # Support for blinky lights | 92 | # Support for blinky lights |
| 91 | led-y := leds.o | 93 | led-y := leds.o |
| @@ -95,8 +97,4 @@ led-$(CONFIG_ARCH_PXA_IDP) += leds-idp.o | |||
| 95 | 97 | ||
| 96 | obj-$(CONFIG_LEDS) += $(led-y) | 98 | obj-$(CONFIG_LEDS) += $(led-y) |
| 97 | 99 | ||
| 98 | ifeq ($(CONFIG_PCI),y) | ||
| 99 | obj-$(CONFIG_MACH_ARMCORE) += cm-x2xx-pci.o | ||
| 100 | endif | ||
| 101 | |||
| 102 | obj-$(CONFIG_TOSA_BT) += tosa-bt.o | 100 | obj-$(CONFIG_TOSA_BT) += tosa-bt.o |
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c index f23138b8fca..b8cd07ca938 100644 --- a/arch/arm/mach-pxa/balloon3.c +++ b/arch/arm/mach-pxa/balloon3.c | |||
| @@ -306,6 +306,10 @@ static void __init balloon3_init(void) | |||
| 306 | */ | 306 | */ |
| 307 | ARB_CNTRL = ARB_CORE_PARK | 0x234; | 307 | ARB_CNTRL = ARB_CORE_PARK | 0x234; |
| 308 | 308 | ||
| 309 | pxa_set_ffuart_info(NULL); | ||
| 310 | pxa_set_btuart_info(NULL); | ||
| 311 | pxa_set_stuart_info(NULL); | ||
| 312 | |||
| 309 | pxa_set_i2c_info(NULL); | 313 | pxa_set_i2c_info(NULL); |
| 310 | if (balloon3_has(BALLOON3_FEATURE_AUDIO)) | 314 | if (balloon3_has(BALLOON3_FEATURE_AUDIO)) |
| 311 | pxa_set_ac97_info(NULL); | 315 | pxa_set_ac97_info(NULL); |
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c index b50ef39eabf..bff6e78f033 100644 --- a/arch/arm/mach-pxa/cm-x2xx.c +++ b/arch/arm/mach-pxa/cm-x2xx.c | |||
| @@ -453,6 +453,10 @@ static inline void cmx2xx_init_ac97(void) {} | |||
| 453 | 453 | ||
| 454 | static void __init cmx2xx_init(void) | 454 | static void __init cmx2xx_init(void) |
| 455 | { | 455 | { |
| 456 | pxa_set_ffuart_info(NULL); | ||
| 457 | pxa_set_btuart_info(NULL); | ||
| 458 | pxa_set_stuart_info(NULL); | ||
| 459 | |||
| 456 | cmx2xx_pm_init(); | 460 | cmx2xx_pm_init(); |
| 457 | 461 | ||
| 458 | if (cpu_is_pxa25x()) | 462 | if (cpu_is_pxa25x()) |
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c index 102916f1e46..d37cfa132a6 100644 --- a/arch/arm/mach-pxa/cm-x300.c +++ b/arch/arm/mach-pxa/cm-x300.c | |||
| @@ -3,9 +3,10 @@ | |||
| 3 | * | 3 | * |
| 4 | * Support for the CompuLab CM-X300 modules | 4 | * Support for the CompuLab CM-X300 modules |
| 5 | * | 5 | * |
| 6 | * Copyright (C) 2008 CompuLab Ltd. | 6 | * Copyright (C) 2008,2009 CompuLab Ltd. |
| 7 | * | 7 | * |
| 8 | * Mike Rapoport <mike@compulab.co.il> | 8 | * Mike Rapoport <mike@compulab.co.il> |
| 9 | * Igor Grinberg <grinberg@compulab.co.il> | ||
| 9 | * | 10 | * |
| 10 | * This program is free software; you can redistribute it and/or modify | 11 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License version 2 as | 12 | * it under the terms of the GNU General Public License version 2 as |
| @@ -16,30 +17,41 @@ | |||
| 16 | #include <linux/kernel.h> | 17 | #include <linux/kernel.h> |
| 17 | #include <linux/interrupt.h> | 18 | #include <linux/interrupt.h> |
| 18 | #include <linux/init.h> | 19 | #include <linux/init.h> |
| 20 | #include <linux/delay.h> | ||
| 19 | #include <linux/platform_device.h> | 21 | #include <linux/platform_device.h> |
| 20 | 22 | ||
| 21 | #include <linux/gpio.h> | 23 | #include <linux/gpio.h> |
| 22 | #include <linux/dm9000.h> | 24 | #include <linux/dm9000.h> |
| 23 | #include <linux/leds.h> | 25 | #include <linux/leds.h> |
| 24 | #include <linux/rtc-v3020.h> | 26 | #include <linux/rtc-v3020.h> |
| 27 | #include <linux/pwm_backlight.h> | ||
| 25 | 28 | ||
| 26 | #include <linux/i2c.h> | 29 | #include <linux/i2c.h> |
| 27 | #include <linux/i2c/pca953x.h> | 30 | #include <linux/i2c/pca953x.h> |
| 28 | 31 | ||
| 32 | #include <linux/mfd/da903x.h> | ||
| 33 | |||
| 34 | #include <linux/spi/spi.h> | ||
| 35 | #include <linux/spi/spi_gpio.h> | ||
| 36 | #include <linux/spi/tdo24m.h> | ||
| 37 | |||
| 29 | #include <asm/mach-types.h> | 38 | #include <asm/mach-types.h> |
| 30 | #include <asm/mach/arch.h> | 39 | #include <asm/mach/arch.h> |
| 31 | #include <asm/setup.h> | 40 | #include <asm/setup.h> |
| 32 | 41 | ||
| 33 | #include <mach/pxa300.h> | 42 | #include <mach/pxa300.h> |
| 43 | #include <mach/pxa27x-udc.h> | ||
| 34 | #include <mach/pxafb.h> | 44 | #include <mach/pxafb.h> |
| 35 | #include <mach/mmc.h> | 45 | #include <mach/mmc.h> |
| 36 | #include <mach/ohci.h> | 46 | #include <mach/ohci.h> |
| 37 | #include <plat/i2c.h> | 47 | #include <plat/i2c.h> |
| 38 | #include <mach/pxa3xx_nand.h> | 48 | #include <plat/pxa3xx_nand.h> |
| 49 | #include <mach/audio.h> | ||
| 39 | 50 | ||
| 40 | #include <asm/mach/map.h> | 51 | #include <asm/mach/map.h> |
| 41 | 52 | ||
| 42 | #include "generic.h" | 53 | #include "generic.h" |
| 54 | #include "devices.h" | ||
| 43 | 55 | ||
| 44 | #define CM_X300_ETH_PHYS 0x08000010 | 56 | #define CM_X300_ETH_PHYS 0x08000010 |
| 45 | 57 | ||
| @@ -53,7 +65,7 @@ | |||
| 53 | #define GPIO97_RTC_RD (97) | 65 | #define GPIO97_RTC_RD (97) |
| 54 | #define GPIO98_RTC_IO (98) | 66 | #define GPIO98_RTC_IO (98) |
| 55 | 67 | ||
| 56 | static mfp_cfg_t cm_x300_mfp_cfg[] __initdata = { | 68 | static mfp_cfg_t cm_x3xx_mfp_cfg[] __initdata = { |
| 57 | /* LCD */ | 69 | /* LCD */ |
| 58 | GPIO54_LCD_LDD_0, | 70 | GPIO54_LCD_LDD_0, |
| 59 | GPIO55_LCD_LDD_1, | 71 | GPIO55_LCD_LDD_1, |
| @@ -137,7 +149,6 @@ static mfp_cfg_t cm_x300_mfp_cfg[] __initdata = { | |||
| 137 | GPIO36_UART1_DTR, | 149 | GPIO36_UART1_DTR, |
| 138 | 150 | ||
| 139 | /* GPIOs */ | 151 | /* GPIOs */ |
| 140 | GPIO79_GPIO, /* LED */ | ||
| 141 | GPIO82_GPIO | MFP_PULL_HIGH, /* MMC CD */ | 152 | GPIO82_GPIO | MFP_PULL_HIGH, /* MMC CD */ |
| 142 | GPIO85_GPIO, /* MMC WP */ | 153 | GPIO85_GPIO, /* MMC WP */ |
| 143 | GPIO99_GPIO, /* Ethernet IRQ */ | 154 | GPIO99_GPIO, /* Ethernet IRQ */ |
| @@ -151,6 +162,50 @@ static mfp_cfg_t cm_x300_mfp_cfg[] __initdata = { | |||
| 151 | /* Standard I2C */ | 162 | /* Standard I2C */ |
| 152 | GPIO21_I2C_SCL, | 163 | GPIO21_I2C_SCL, |
| 153 | GPIO22_I2C_SDA, | 164 | GPIO22_I2C_SDA, |
| 165 | |||
| 166 | /* PWM Backlight */ | ||
| 167 | GPIO19_PWM2_OUT, | ||
| 168 | }; | ||
| 169 | |||
| 170 | static mfp_cfg_t cm_x3xx_rev_lt130_mfp_cfg[] __initdata = { | ||
| 171 | /* GPIOs */ | ||
| 172 | GPIO79_GPIO, /* LED */ | ||
| 173 | GPIO77_GPIO, /* WiFi reset */ | ||
| 174 | GPIO78_GPIO, /* BT reset */ | ||
| 175 | }; | ||
| 176 | |||
| 177 | static mfp_cfg_t cm_x3xx_rev_ge130_mfp_cfg[] __initdata = { | ||
| 178 | /* GPIOs */ | ||
| 179 | GPIO76_GPIO, /* LED */ | ||
| 180 | GPIO71_GPIO, /* WiFi reset */ | ||
| 181 | GPIO70_GPIO, /* BT reset */ | ||
| 182 | }; | ||
| 183 | |||
| 184 | static mfp_cfg_t cm_x310_mfp_cfg[] __initdata = { | ||
| 185 | /* USB PORT 2 */ | ||
| 186 | ULPI_STP, | ||
| 187 | ULPI_NXT, | ||
| 188 | ULPI_DIR, | ||
| 189 | GPIO30_ULPI_DATA_OUT_0, | ||
| 190 | GPIO31_ULPI_DATA_OUT_1, | ||
| 191 | GPIO32_ULPI_DATA_OUT_2, | ||
| 192 | GPIO33_ULPI_DATA_OUT_3, | ||
| 193 | GPIO34_ULPI_DATA_OUT_4, | ||
| 194 | GPIO35_ULPI_DATA_OUT_5, | ||
| 195 | GPIO36_ULPI_DATA_OUT_6, | ||
| 196 | GPIO37_ULPI_DATA_OUT_7, | ||
| 197 | GPIO38_ULPI_CLK, | ||
| 198 | /* external PHY reset pin */ | ||
| 199 | GPIO127_GPIO, | ||
| 200 | |||
| 201 | /* USB PORT 3 */ | ||
| 202 | GPIO77_USB_P3_1, | ||
| 203 | GPIO78_USB_P3_2, | ||
| 204 | GPIO79_USB_P3_3, | ||
| 205 | GPIO80_USB_P3_4, | ||
| 206 | GPIO81_USB_P3_5, | ||
| 207 | GPIO82_USB_P3_6, | ||
| 208 | GPIO0_2_USBH_PEN, | ||
| 154 | }; | 209 | }; |
| 155 | 210 | ||
| 156 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) | 211 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) |
| @@ -195,17 +250,18 @@ static void __init cm_x300_init_dm9000(void) | |||
| 195 | static inline void cm_x300_init_dm9000(void) {} | 250 | static inline void cm_x300_init_dm9000(void) {} |
| 196 | #endif | 251 | #endif |
| 197 | 252 | ||
| 253 | /* LCD */ | ||
| 198 | #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) | 254 | #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) |
| 199 | static struct pxafb_mode_info cm_x300_lcd_modes[] = { | 255 | static struct pxafb_mode_info cm_x300_lcd_modes[] = { |
| 200 | [0] = { | 256 | [0] = { |
| 201 | .pixclock = 38000, | 257 | .pixclock = 38250, |
| 202 | .bpp = 16, | 258 | .bpp = 16, |
| 203 | .xres = 480, | 259 | .xres = 480, |
| 204 | .yres = 640, | 260 | .yres = 640, |
| 205 | .hsync_len = 8, | 261 | .hsync_len = 8, |
| 206 | .vsync_len = 2, | 262 | .vsync_len = 2, |
| 207 | .left_margin = 8, | 263 | .left_margin = 8, |
| 208 | .upper_margin = 0, | 264 | .upper_margin = 2, |
| 209 | .right_margin = 24, | 265 | .right_margin = 24, |
| 210 | .lower_margin = 4, | 266 | .lower_margin = 4, |
| 211 | .cmap_greyscale = 0, | 267 | .cmap_greyscale = 0, |
| @@ -227,7 +283,7 @@ static struct pxafb_mode_info cm_x300_lcd_modes[] = { | |||
| 227 | 283 | ||
| 228 | static struct pxafb_mach_info cm_x300_lcd = { | 284 | static struct pxafb_mach_info cm_x300_lcd = { |
| 229 | .modes = cm_x300_lcd_modes, | 285 | .modes = cm_x300_lcd_modes, |
| 230 | .num_modes = 2, | 286 | .num_modes = ARRAY_SIZE(cm_x300_lcd_modes), |
| 231 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, | 287 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, |
| 232 | }; | 288 | }; |
| 233 | 289 | ||
| @@ -239,6 +295,87 @@ static void __init cm_x300_init_lcd(void) | |||
| 239 | static inline void cm_x300_init_lcd(void) {} | 295 | static inline void cm_x300_init_lcd(void) {} |
| 240 | #endif | 296 | #endif |
| 241 | 297 | ||
| 298 | #if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM_MODULE) | ||
| 299 | static struct platform_pwm_backlight_data cm_x300_backlight_data = { | ||
| 300 | .pwm_id = 2, | ||
| 301 | .max_brightness = 100, | ||
| 302 | .dft_brightness = 100, | ||
| 303 | .pwm_period_ns = 10000, | ||
| 304 | }; | ||
| 305 | |||
| 306 | static struct platform_device cm_x300_backlight_device = { | ||
| 307 | .name = "pwm-backlight", | ||
| 308 | .dev = { | ||
| 309 | .parent = &pxa27x_device_pwm0.dev, | ||
| 310 | .platform_data = &cm_x300_backlight_data, | ||
| 311 | }, | ||
| 312 | }; | ||
| 313 | |||
| 314 | static void cm_x300_init_bl(void) | ||
| 315 | { | ||
| 316 | platform_device_register(&cm_x300_backlight_device); | ||
| 317 | } | ||
| 318 | #else | ||
| 319 | static inline void cm_x300_init_bl(void) {} | ||
| 320 | #endif | ||
| 321 | |||
| 322 | #if defined(CONFIG_SPI_GPIO) || defined(CONFIG_SPI_GPIO_MODULE) | ||
| 323 | #define GPIO_LCD_BASE (144) | ||
| 324 | #define GPIO_LCD_DIN (GPIO_LCD_BASE + 8) /* aux_gpio3_0 */ | ||
| 325 | #define GPIO_LCD_DOUT (GPIO_LCD_BASE + 9) /* aux_gpio3_1 */ | ||
| 326 | #define GPIO_LCD_SCL (GPIO_LCD_BASE + 10) /* aux_gpio3_2 */ | ||
| 327 | #define GPIO_LCD_CS (GPIO_LCD_BASE + 11) /* aux_gpio3_3 */ | ||
| 328 | #define LCD_SPI_BUS_NUM (1) | ||
| 329 | |||
| 330 | static struct spi_gpio_platform_data cm_x300_spi_gpio_pdata = { | ||
| 331 | .sck = GPIO_LCD_SCL, | ||
| 332 | .mosi = GPIO_LCD_DIN, | ||
| 333 | .miso = GPIO_LCD_DOUT, | ||
| 334 | .num_chipselect = 1, | ||
| 335 | }; | ||
| 336 | |||
| 337 | static struct platform_device cm_x300_spi_gpio = { | ||
| 338 | .name = "spi_gpio", | ||
| 339 | .id = LCD_SPI_BUS_NUM, | ||
| 340 | .dev = { | ||
| 341 | .platform_data = &cm_x300_spi_gpio_pdata, | ||
| 342 | }, | ||
| 343 | }; | ||
| 344 | |||
| 345 | static struct tdo24m_platform_data cm_x300_tdo24m_pdata = { | ||
| 346 | .model = TDO35S, | ||
| 347 | }; | ||
| 348 | |||
| 349 | static struct spi_board_info cm_x300_spi_devices[] __initdata = { | ||
| 350 | { | ||
| 351 | .modalias = "tdo24m", | ||
| 352 | .max_speed_hz = 1000000, | ||
| 353 | .bus_num = LCD_SPI_BUS_NUM, | ||
| 354 | .chip_select = 0, | ||
| 355 | .controller_data = (void *) GPIO_LCD_CS, | ||
| 356 | .platform_data = &cm_x300_tdo24m_pdata, | ||
| 357 | }, | ||
| 358 | }; | ||
| 359 | |||
| 360 | static void __init cm_x300_init_spi(void) | ||
| 361 | { | ||
| 362 | spi_register_board_info(cm_x300_spi_devices, | ||
| 363 | ARRAY_SIZE(cm_x300_spi_devices)); | ||
| 364 | platform_device_register(&cm_x300_spi_gpio); | ||
| 365 | } | ||
| 366 | #else | ||
| 367 | static inline void cm_x300_init_spi(void) {} | ||
| 368 | #endif | ||
| 369 | |||
| 370 | #if defined(CONFIG_SND_PXA2XX_LIB_AC97) | ||
| 371 | static void __init cm_x300_init_ac97(void) | ||
| 372 | { | ||
| 373 | pxa_set_ac97_info(NULL); | ||
| 374 | } | ||
| 375 | #else | ||
| 376 | static inline void cm_x300_init_ac97(void) {} | ||
| 377 | #endif | ||
| 378 | |||
| 242 | #if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE) | 379 | #if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE) |
| 243 | static struct mtd_partition cm_x300_nand_partitions[] = { | 380 | static struct mtd_partition cm_x300_nand_partitions[] = { |
| 244 | [0] = { | 381 | [0] = { |
| @@ -333,9 +470,19 @@ static inline void cm_x300_init_mmc(void) {} | |||
| 333 | #endif | 470 | #endif |
| 334 | 471 | ||
| 335 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | 472 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) |
| 473 | static int cm_x300_ohci_init(struct device *dev) | ||
| 474 | { | ||
| 475 | if (cpu_is_pxa300()) | ||
| 476 | UP2OCR = UP2OCR_HXS | ||
| 477 | | UP2OCR_HXOE | UP2OCR_DMPDE | UP2OCR_DPPDE; | ||
| 478 | |||
| 479 | return 0; | ||
| 480 | } | ||
| 481 | |||
| 336 | static struct pxaohci_platform_data cm_x300_ohci_platform_data = { | 482 | static struct pxaohci_platform_data cm_x300_ohci_platform_data = { |
| 337 | .port_mode = PMM_PERPORT_MODE, | 483 | .port_mode = PMM_PERPORT_MODE, |
| 338 | .flags = ENABLE_PORT1 | ENABLE_PORT2 | POWER_CONTROL_LOW, | 484 | .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW, |
| 485 | .init = cm_x300_ohci_init, | ||
| 339 | }; | 486 | }; |
| 340 | 487 | ||
| 341 | static void __init cm_x300_init_ohci(void) | 488 | static void __init cm_x300_init_ohci(void) |
| @@ -351,7 +498,6 @@ static struct gpio_led cm_x300_leds[] = { | |||
| 351 | [0] = { | 498 | [0] = { |
| 352 | .name = "cm-x300:green", | 499 | .name = "cm-x300:green", |
| 353 | .default_trigger = "heartbeat", | 500 | .default_trigger = "heartbeat", |
| 354 | .gpio = 79, | ||
| 355 | .active_low = 1, | 501 | .active_low = 1, |
| 356 | }, | 502 | }, |
| 357 | }; | 503 | }; |
| @@ -371,6 +517,11 @@ static struct platform_device cm_x300_led_device = { | |||
| 371 | 517 | ||
| 372 | static void __init cm_x300_init_leds(void) | 518 | static void __init cm_x300_init_leds(void) |
| 373 | { | 519 | { |
| 520 | if (system_rev < 130) | ||
| 521 | cm_x300_leds[0].gpio = 79; | ||
| 522 | else | ||
| 523 | cm_x300_leds[0].gpio = 76; | ||
| 524 | |||
| 374 | platform_device_register(&cm_x300_led_device); | 525 | platform_device_register(&cm_x300_led_device); |
| 375 | } | 526 | } |
| 376 | #else | 527 | #else |
| @@ -433,11 +584,94 @@ static void __init cm_x300_init_rtc(void) | |||
| 433 | static inline void cm_x300_init_rtc(void) {} | 584 | static inline void cm_x300_init_rtc(void) {} |
| 434 | #endif | 585 | #endif |
| 435 | 586 | ||
| 436 | static void __init cm_x300_init(void) | 587 | /* DA9030 */ |
| 588 | struct da903x_subdev_info cm_x300_da9030_subdevs[] = { | ||
| 589 | { | ||
| 590 | .name = "da903x-backlight", | ||
| 591 | .id = DA9030_ID_WLED, | ||
| 592 | } | ||
| 593 | }; | ||
| 594 | |||
| 595 | static struct da903x_platform_data cm_x300_da9030_info = { | ||
| 596 | .num_subdevs = ARRAY_SIZE(cm_x300_da9030_subdevs), | ||
| 597 | .subdevs = cm_x300_da9030_subdevs, | ||
| 598 | }; | ||
| 599 | |||
| 600 | static struct i2c_board_info cm_x300_pmic_info = { | ||
| 601 | I2C_BOARD_INFO("da9030", 0x49), | ||
| 602 | .irq = IRQ_GPIO(0), | ||
| 603 | .platform_data = &cm_x300_da9030_info, | ||
| 604 | }; | ||
| 605 | |||
| 606 | static struct i2c_pxa_platform_data cm_x300_pwr_i2c_info = { | ||
| 607 | .use_pio = 1, | ||
| 608 | }; | ||
| 609 | |||
| 610 | static void __init cm_x300_init_da9030(void) | ||
| 611 | { | ||
| 612 | pxa3xx_set_i2c_power_info(&cm_x300_pwr_i2c_info); | ||
| 613 | i2c_register_board_info(1, &cm_x300_pmic_info, 1); | ||
| 614 | } | ||
| 615 | |||
| 616 | static void __init cm_x300_init_wi2wi(void) | ||
| 617 | { | ||
| 618 | int bt_reset, wlan_en; | ||
| 619 | int err; | ||
| 620 | |||
| 621 | if (system_rev < 130) { | ||
| 622 | wlan_en = 77; | ||
| 623 | bt_reset = 78; | ||
| 624 | } else { | ||
| 625 | wlan_en = 71; | ||
| 626 | bt_reset = 70; | ||
| 627 | } | ||
| 628 | |||
| 629 | /* Libertas and CSR reset */ | ||
| 630 | err = gpio_request(wlan_en, "wlan en"); | ||
| 631 | if (err) { | ||
| 632 | pr_err("CM-X300: failed to request wlan en gpio: %d\n", err); | ||
| 633 | } else { | ||
| 634 | gpio_direction_output(wlan_en, 1); | ||
| 635 | gpio_free(wlan_en); | ||
| 636 | } | ||
| 637 | |||
| 638 | err = gpio_request(bt_reset, "bt reset"); | ||
| 639 | if (err) { | ||
| 640 | pr_err("CM-X300: failed to request bt reset gpio: %d\n", err); | ||
| 641 | } else { | ||
| 642 | gpio_direction_output(bt_reset, 1); | ||
| 643 | udelay(10); | ||
| 644 | gpio_set_value(bt_reset, 0); | ||
| 645 | udelay(10); | ||
| 646 | gpio_set_value(bt_reset, 1); | ||
| 647 | gpio_free(bt_reset); | ||
| 648 | } | ||
| 649 | } | ||
| 650 | |||
| 651 | /* MFP */ | ||
| 652 | static void __init cm_x300_init_mfp(void) | ||
| 437 | { | 653 | { |
| 438 | /* board-processor specific GPIO initialization */ | 654 | /* board-processor specific GPIO initialization */ |
| 439 | pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x300_mfp_cfg)); | 655 | pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x3xx_mfp_cfg)); |
| 656 | |||
| 657 | if (system_rev < 130) | ||
| 658 | pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x3xx_rev_lt130_mfp_cfg)); | ||
| 659 | else | ||
| 660 | pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x3xx_rev_ge130_mfp_cfg)); | ||
| 661 | |||
| 662 | if (cpu_is_pxa310()) | ||
| 663 | pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x310_mfp_cfg)); | ||
| 664 | } | ||
| 665 | |||
| 666 | static void __init cm_x300_init(void) | ||
| 667 | { | ||
| 668 | cm_x300_init_mfp(); | ||
| 669 | |||
| 670 | pxa_set_ffuart_info(NULL); | ||
| 671 | pxa_set_btuart_info(NULL); | ||
| 672 | pxa_set_stuart_info(NULL); | ||
| 440 | 673 | ||
| 674 | cm_x300_init_da9030(); | ||
| 441 | cm_x300_init_dm9000(); | 675 | cm_x300_init_dm9000(); |
| 442 | cm_x300_init_lcd(); | 676 | cm_x300_init_lcd(); |
| 443 | cm_x300_init_ohci(); | 677 | cm_x300_init_ohci(); |
| @@ -445,7 +679,11 @@ static void __init cm_x300_init(void) | |||
| 445 | cm_x300_init_nand(); | 679 | cm_x300_init_nand(); |
| 446 | cm_x300_init_leds(); | 680 | cm_x300_init_leds(); |
| 447 | cm_x300_init_i2c(); | 681 | cm_x300_init_i2c(); |
| 682 | cm_x300_init_spi(); | ||
| 448 | cm_x300_init_rtc(); | 683 | cm_x300_init_rtc(); |
| 684 | cm_x300_init_ac97(); | ||
| 685 | cm_x300_init_wi2wi(); | ||
| 686 | cm_x300_init_bl(); | ||
| 449 | } | 687 | } |
| 450 | 688 | ||
| 451 | static void __init cm_x300_fixup(struct machine_desc *mdesc, struct tag *tags, | 689 | static void __init cm_x300_fixup(struct machine_desc *mdesc, struct tag *tags, |
diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c index 01bcfaae75b..061c45316de 100644 --- a/arch/arm/mach-pxa/colibri-pxa270.c +++ b/arch/arm/mach-pxa/colibri-pxa270.c | |||
| @@ -130,6 +130,9 @@ static struct platform_device *colibri_pxa270_devices[] __initdata = { | |||
| 130 | static void __init colibri_pxa270_init(void) | 130 | static void __init colibri_pxa270_init(void) |
| 131 | { | 131 | { |
| 132 | pxa2xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa270_pin_config)); | 132 | pxa2xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa270_pin_config)); |
| 133 | pxa_set_ffuart_info(NULL); | ||
| 134 | pxa_set_btuart_info(NULL); | ||
| 135 | pxa_set_stuart_info(NULL); | ||
| 133 | platform_add_devices(ARRAY_AND_SIZE(colibri_pxa270_devices)); | 136 | platform_add_devices(ARRAY_AND_SIZE(colibri_pxa270_devices)); |
| 134 | } | 137 | } |
| 135 | 138 | ||
diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c index 37c239c5656..45c23fd6df3 100644 --- a/arch/arm/mach-pxa/colibri-pxa300.c +++ b/arch/arm/mach-pxa/colibri-pxa300.c | |||
| @@ -170,6 +170,10 @@ static inline void colibri_pxa310_init_ac97(void) {} | |||
| 170 | 170 | ||
| 171 | void __init colibri_pxa300_init(void) | 171 | void __init colibri_pxa300_init(void) |
| 172 | { | 172 | { |
| 173 | pxa_set_ffuart_info(NULL); | ||
| 174 | pxa_set_btuart_info(NULL); | ||
| 175 | pxa_set_stuart_info(NULL); | ||
| 176 | |||
| 173 | colibri_pxa300_init_eth(); | 177 | colibri_pxa300_init_eth(); |
| 174 | colibri_pxa300_init_ohci(); | 178 | colibri_pxa300_init_ohci(); |
| 175 | colibri_pxa3xx_init_nand(); | 179 | colibri_pxa3xx_init_nand(); |
diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c index ec0e14b9668..ae835fad7d1 100644 --- a/arch/arm/mach-pxa/colibri-pxa320.c +++ b/arch/arm/mach-pxa/colibri-pxa320.c | |||
| @@ -199,6 +199,10 @@ static void __init colibri_pxa320_init_uart(void) | |||
| 199 | 199 | ||
| 200 | void __init colibri_pxa320_init(void) | 200 | void __init colibri_pxa320_init(void) |
| 201 | { | 201 | { |
| 202 | pxa_set_ffuart_info(NULL); | ||
| 203 | pxa_set_btuart_info(NULL); | ||
| 204 | pxa_set_stuart_info(NULL); | ||
| 205 | |||
| 202 | colibri_pxa320_init_eth(); | 206 | colibri_pxa320_init_eth(); |
| 203 | colibri_pxa320_init_ohci(); | 207 | colibri_pxa320_init_ohci(); |
| 204 | colibri_pxa3xx_init_nand(); | 208 | colibri_pxa3xx_init_nand(); |
diff --git a/arch/arm/mach-pxa/colibri-pxa3xx.c b/arch/arm/mach-pxa/colibri-pxa3xx.c index efebaf4d734..e6c0a2287eb 100644 --- a/arch/arm/mach-pxa/colibri-pxa3xx.c +++ b/arch/arm/mach-pxa/colibri-pxa3xx.c | |||
| @@ -25,7 +25,7 @@ | |||
| 25 | #include <mach/colibri.h> | 25 | #include <mach/colibri.h> |
| 26 | #include <mach/mmc.h> | 26 | #include <mach/mmc.h> |
| 27 | #include <mach/pxafb.h> | 27 | #include <mach/pxafb.h> |
| 28 | #include <mach/pxa3xx_nand.h> | 28 | #include <plat/pxa3xx_nand.h> |
| 29 | 29 | ||
| 30 | #include "generic.h" | 30 | #include "generic.h" |
| 31 | #include "devices.h" | 31 | #include "devices.h" |
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c index b536b5a5a10..74446cf8ae6 100644 --- a/arch/arm/mach-pxa/corgi.c +++ b/arch/arm/mach-pxa/corgi.c | |||
| @@ -671,6 +671,10 @@ static void __init corgi_init(void) | |||
| 671 | 671 | ||
| 672 | pxa2xx_mfp_config(ARRAY_AND_SIZE(corgi_pin_config)); | 672 | pxa2xx_mfp_config(ARRAY_AND_SIZE(corgi_pin_config)); |
| 673 | 673 | ||
| 674 | pxa_set_ffuart_info(NULL); | ||
| 675 | pxa_set_btuart_info(NULL); | ||
| 676 | pxa_set_stuart_info(NULL); | ||
| 677 | |||
| 674 | corgi_init_spi(); | 678 | corgi_init_spi(); |
| 675 | 679 | ||
| 676 | pxa_set_udc_info(&udc_info); | 680 | pxa_set_udc_info(&udc_info); |
diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c index a093282fe4d..d4a0733e905 100644 --- a/arch/arm/mach-pxa/corgi_pm.c +++ b/arch/arm/mach-pxa/corgi_pm.c | |||
| @@ -214,8 +214,8 @@ static struct sharpsl_charger_machinfo corgi_pm_machinfo = { | |||
| 214 | .fatal_acin_volt = SHARPSL_FATAL_ACIN_VOLT, | 214 | .fatal_acin_volt = SHARPSL_FATAL_ACIN_VOLT, |
| 215 | .fatal_noacin_volt= SHARPSL_FATAL_NOACIN_VOLT, | 215 | .fatal_noacin_volt= SHARPSL_FATAL_NOACIN_VOLT, |
| 216 | .bat_levels = 40, | 216 | .bat_levels = 40, |
| 217 | .bat_levels_noac = spitz_battery_levels_noac, | 217 | .bat_levels_noac = sharpsl_battery_levels_noac, |
| 218 | .bat_levels_acin = spitz_battery_levels_acin, | 218 | .bat_levels_acin = sharpsl_battery_levels_acin, |
| 219 | .status_high_acin = 188, | 219 | .status_high_acin = 188, |
| 220 | .status_low_acin = 178, | 220 | .status_low_acin = 178, |
| 221 | .status_high_noac = 185, | 221 | .status_high_noac = 185, |
diff --git a/arch/arm/mach-pxa/cpufreq-pxa2xx.c b/arch/arm/mach-pxa/cpufreq-pxa2xx.c index 983cc8c2008..9e4d9816726 100644 --- a/arch/arm/mach-pxa/cpufreq-pxa2xx.c +++ b/arch/arm/mach-pxa/cpufreq-pxa2xx.c | |||
| @@ -447,6 +447,7 @@ static __init int pxa_cpufreq_init(struct cpufreq_policy *policy) | |||
| 447 | pxa27x_freq_table[i].frequency = freq; | 447 | pxa27x_freq_table[i].frequency = freq; |
| 448 | pxa27x_freq_table[i].index = i; | 448 | pxa27x_freq_table[i].index = i; |
| 449 | } | 449 | } |
| 450 | pxa27x_freq_table[i].index = i; | ||
| 450 | pxa27x_freq_table[i].frequency = CPUFREQ_TABLE_END; | 451 | pxa27x_freq_table[i].frequency = CPUFREQ_TABLE_END; |
| 451 | 452 | ||
| 452 | /* | 453 | /* |
diff --git a/arch/arm/mach-pxa/cpufreq-pxa3xx.c b/arch/arm/mach-pxa/cpufreq-pxa3xx.c index 67f34a8d8e6..149cdd9aee4 100644 --- a/arch/arm/mach-pxa/cpufreq-pxa3xx.c +++ b/arch/arm/mach-pxa/cpufreq-pxa3xx.c | |||
| @@ -102,7 +102,7 @@ static int setup_freqs_table(struct cpufreq_policy *policy, | |||
| 102 | table[i].index = i; | 102 | table[i].index = i; |
| 103 | table[i].frequency = freqs[i].cpufreq_mhz * 1000; | 103 | table[i].frequency = freqs[i].cpufreq_mhz * 1000; |
| 104 | } | 104 | } |
| 105 | table[num].frequency = i; | 105 | table[num].index = i; |
| 106 | table[num].frequency = CPUFREQ_TABLE_END; | 106 | table[num].frequency = CPUFREQ_TABLE_END; |
| 107 | 107 | ||
| 108 | pxa3xx_freqs = freqs; | 108 | pxa3xx_freqs = freqs; |
diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c index 965480eb4fe..88575b87bd3 100644 --- a/arch/arm/mach-pxa/csb726.c +++ b/arch/arm/mach-pxa/csb726.c | |||
| @@ -268,6 +268,9 @@ static void __init csb726_init(void) | |||
| 268 | /* MSC2 = 0x06697ff4; *//* none/SM501 */ | 268 | /* MSC2 = 0x06697ff4; *//* none/SM501 */ |
| 269 | MSC2 = (MSC2 & ~0xffff) | 0x7ff4; /* SM501 */ | 269 | MSC2 = (MSC2 & ~0xffff) | 0x7ff4; /* SM501 */ |
| 270 | 270 | ||
| 271 | pxa_set_ffuart_info(NULL); | ||
| 272 | pxa_set_btuart_info(NULL); | ||
| 273 | pxa_set_stuart_info(NULL); | ||
| 271 | pxa_set_i2c_info(NULL); | 274 | pxa_set_i2c_info(NULL); |
| 272 | pxa27x_set_i2c_power_info(NULL); | 275 | pxa27x_set_i2c_power_info(NULL); |
| 273 | pxa_set_mci_info(&csb726_mci); | 276 | pxa_set_mci_info(&csb726_mci); |
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c index 46fabe1cca1..3395463bb5a 100644 --- a/arch/arm/mach-pxa/devices.c +++ b/arch/arm/mach-pxa/devices.c | |||
| @@ -4,17 +4,18 @@ | |||
| 4 | #include <linux/platform_device.h> | 4 | #include <linux/platform_device.h> |
| 5 | #include <linux/dma-mapping.h> | 5 | #include <linux/dma-mapping.h> |
| 6 | 6 | ||
| 7 | #include <mach/hardware.h> | ||
| 7 | #include <mach/udc.h> | 8 | #include <mach/udc.h> |
| 8 | #include <mach/pxafb.h> | 9 | #include <mach/pxafb.h> |
| 9 | #include <mach/mmc.h> | 10 | #include <mach/mmc.h> |
| 10 | #include <mach/irda.h> | 11 | #include <mach/irda.h> |
| 11 | #include <plat/i2c.h> | ||
| 12 | #include <mach/ohci.h> | 12 | #include <mach/ohci.h> |
| 13 | #include <mach/pxa27x_keypad.h> | 13 | #include <mach/pxa27x_keypad.h> |
| 14 | #include <mach/pxa2xx_spi.h> | 14 | #include <mach/pxa2xx_spi.h> |
| 15 | #include <mach/camera.h> | 15 | #include <mach/camera.h> |
| 16 | #include <mach/audio.h> | 16 | #include <mach/audio.h> |
| 17 | #include <mach/pxa3xx_nand.h> | 17 | #include <plat/i2c.h> |
| 18 | #include <plat/pxa3xx_nand.h> | ||
| 18 | 19 | ||
| 19 | #include "devices.h" | 20 | #include "devices.h" |
| 20 | #include "generic.h" | 21 | #include "generic.h" |
| @@ -167,13 +168,18 @@ static struct resource pxa_resource_ffuart[] = { | |||
| 167 | } | 168 | } |
| 168 | }; | 169 | }; |
| 169 | 170 | ||
| 170 | struct platform_device pxa_device_ffuart= { | 171 | struct platform_device pxa_device_ffuart = { |
| 171 | .name = "pxa2xx-uart", | 172 | .name = "pxa2xx-uart", |
| 172 | .id = 0, | 173 | .id = 0, |
| 173 | .resource = pxa_resource_ffuart, | 174 | .resource = pxa_resource_ffuart, |
| 174 | .num_resources = ARRAY_SIZE(pxa_resource_ffuart), | 175 | .num_resources = ARRAY_SIZE(pxa_resource_ffuart), |
| 175 | }; | 176 | }; |
| 176 | 177 | ||
| 178 | void __init pxa_set_ffuart_info(void *info) | ||
| 179 | { | ||
| 180 | pxa_register_device(&pxa_device_ffuart, info); | ||
| 181 | } | ||
| 182 | |||
| 177 | static struct resource pxa_resource_btuart[] = { | 183 | static struct resource pxa_resource_btuart[] = { |
| 178 | { | 184 | { |
| 179 | .start = 0x40200000, | 185 | .start = 0x40200000, |
| @@ -193,6 +199,11 @@ struct platform_device pxa_device_btuart = { | |||
| 193 | .num_resources = ARRAY_SIZE(pxa_resource_btuart), | 199 | .num_resources = ARRAY_SIZE(pxa_resource_btuart), |
| 194 | }; | 200 | }; |
| 195 | 201 | ||
| 202 | void __init pxa_set_btuart_info(void *info) | ||
| 203 | { | ||
| 204 | pxa_register_device(&pxa_device_btuart, info); | ||
| 205 | } | ||
| 206 | |||
| 196 | static struct resource pxa_resource_stuart[] = { | 207 | static struct resource pxa_resource_stuart[] = { |
| 197 | { | 208 | { |
| 198 | .start = 0x40700000, | 209 | .start = 0x40700000, |
| @@ -212,6 +223,11 @@ struct platform_device pxa_device_stuart = { | |||
| 212 | .num_resources = ARRAY_SIZE(pxa_resource_stuart), | 223 | .num_resources = ARRAY_SIZE(pxa_resource_stuart), |
| 213 | }; | 224 | }; |
| 214 | 225 | ||
| 226 | void __init pxa_set_stuart_info(void *info) | ||
| 227 | { | ||
| 228 | pxa_register_device(&pxa_device_stuart, info); | ||
| 229 | } | ||
| 230 | |||
| 215 | static struct resource pxa_resource_hwuart[] = { | 231 | static struct resource pxa_resource_hwuart[] = { |
| 216 | { | 232 | { |
| 217 | .start = 0x41600000, | 233 | .start = 0x41600000, |
| @@ -231,6 +247,14 @@ struct platform_device pxa_device_hwuart = { | |||
| 231 | .num_resources = ARRAY_SIZE(pxa_resource_hwuart), | 247 | .num_resources = ARRAY_SIZE(pxa_resource_hwuart), |
| 232 | }; | 248 | }; |
| 233 | 249 | ||
| 250 | void __init pxa_set_hwuart_info(void *info) | ||
| 251 | { | ||
| 252 | if (cpu_is_pxa255()) | ||
| 253 | pxa_register_device(&pxa_device_hwuart, info); | ||
| 254 | else | ||
| 255 | pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware"); | ||
| 256 | } | ||
| 257 | |||
| 234 | static struct resource pxai2c_resources[] = { | 258 | static struct resource pxai2c_resources[] = { |
| 235 | { | 259 | { |
| 236 | .start = 0x40301680, | 260 | .start = 0x40301680, |
diff --git a/arch/arm/mach-pxa/e330.c b/arch/arm/mach-pxa/e330.c index 74d3f8987c5..8fde3387279 100644 --- a/arch/arm/mach-pxa/e330.c +++ b/arch/arm/mach-pxa/e330.c | |||
| @@ -55,6 +55,9 @@ static struct platform_device *devices[] __initdata = { | |||
| 55 | 55 | ||
| 56 | static void __init e330_init(void) | 56 | static void __init e330_init(void) |
| 57 | { | 57 | { |
| 58 | pxa_set_ffuart_info(NULL); | ||
| 59 | pxa_set_btuart_info(NULL); | ||
| 60 | pxa_set_stuart_info(NULL); | ||
| 58 | eseries_register_clks(); | 61 | eseries_register_clks(); |
| 59 | eseries_get_tmio_gpios(); | 62 | eseries_get_tmio_gpios(); |
| 60 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 63 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
diff --git a/arch/arm/mach-pxa/e350.c b/arch/arm/mach-pxa/e350.c index 08003627213..f50f055f572 100644 --- a/arch/arm/mach-pxa/e350.c +++ b/arch/arm/mach-pxa/e350.c | |||
| @@ -56,6 +56,9 @@ static struct platform_device *devices[] __initdata = { | |||
| 56 | 56 | ||
| 57 | static void __init e350_init(void) | 57 | static void __init e350_init(void) |
| 58 | { | 58 | { |
| 59 | pxa_set_ffuart_info(NULL); | ||
| 60 | pxa_set_btuart_info(NULL); | ||
| 61 | pxa_set_stuart_info(NULL); | ||
| 59 | eseries_register_clks(); | 62 | eseries_register_clks(); |
| 60 | eseries_get_tmio_gpios(); | 63 | eseries_get_tmio_gpios(); |
| 61 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 64 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
diff --git a/arch/arm/mach-pxa/e400.c b/arch/arm/mach-pxa/e400.c index ed9c0c3f64a..55b950f1284 100644 --- a/arch/arm/mach-pxa/e400.c +++ b/arch/arm/mach-pxa/e400.c | |||
| @@ -130,6 +130,9 @@ static struct platform_device *devices[] __initdata = { | |||
| 130 | static void __init e400_init(void) | 130 | static void __init e400_init(void) |
| 131 | { | 131 | { |
| 132 | pxa2xx_mfp_config(ARRAY_AND_SIZE(e400_pin_config)); | 132 | pxa2xx_mfp_config(ARRAY_AND_SIZE(e400_pin_config)); |
| 133 | pxa_set_ffuart_info(NULL); | ||
| 134 | pxa_set_btuart_info(NULL); | ||
| 135 | pxa_set_stuart_info(NULL); | ||
| 133 | /* Fixme - e400 may have a switched clock */ | 136 | /* Fixme - e400 may have a switched clock */ |
| 134 | eseries_register_clks(); | 137 | eseries_register_clks(); |
| 135 | eseries_get_tmio_gpios(); | 138 | eseries_get_tmio_gpios(); |
diff --git a/arch/arm/mach-pxa/e740.c b/arch/arm/mach-pxa/e740.c index 49acdfa6650..94b23a9e387 100644 --- a/arch/arm/mach-pxa/e740.c +++ b/arch/arm/mach-pxa/e740.c | |||
| @@ -192,6 +192,9 @@ static struct platform_device *devices[] __initdata = { | |||
| 192 | static void __init e740_init(void) | 192 | static void __init e740_init(void) |
| 193 | { | 193 | { |
| 194 | pxa2xx_mfp_config(ARRAY_AND_SIZE(e740_pin_config)); | 194 | pxa2xx_mfp_config(ARRAY_AND_SIZE(e740_pin_config)); |
| 195 | pxa_set_ffuart_info(NULL); | ||
| 196 | pxa_set_btuart_info(NULL); | ||
| 197 | pxa_set_stuart_info(NULL); | ||
| 195 | eseries_register_clks(); | 198 | eseries_register_clks(); |
| 196 | clk_add_alias("CLK_CK48M", e740_t7l66xb_device.name, | 199 | clk_add_alias("CLK_CK48M", e740_t7l66xb_device.name, |
| 197 | "UDCCLK", &pxa25x_device_udc.dev), | 200 | "UDCCLK", &pxa25x_device_udc.dev), |
diff --git a/arch/arm/mach-pxa/e750.c b/arch/arm/mach-pxa/e750.c index 4052ece3ef4..5eccbce73a3 100644 --- a/arch/arm/mach-pxa/e750.c +++ b/arch/arm/mach-pxa/e750.c | |||
| @@ -194,6 +194,9 @@ static struct platform_device *devices[] __initdata = { | |||
| 194 | static void __init e750_init(void) | 194 | static void __init e750_init(void) |
| 195 | { | 195 | { |
| 196 | pxa2xx_mfp_config(ARRAY_AND_SIZE(e750_pin_config)); | 196 | pxa2xx_mfp_config(ARRAY_AND_SIZE(e750_pin_config)); |
| 197 | pxa_set_ffuart_info(NULL); | ||
| 198 | pxa_set_btuart_info(NULL); | ||
| 199 | pxa_set_stuart_info(NULL); | ||
| 197 | clk_add_alias("CLK_CK3P6MI", e750_tc6393xb_device.name, | 200 | clk_add_alias("CLK_CK3P6MI", e750_tc6393xb_device.name, |
| 198 | "GPIO11_CLK", NULL), | 201 | "GPIO11_CLK", NULL), |
| 199 | eseries_get_tmio_gpios(); | 202 | eseries_get_tmio_gpios(); |
diff --git a/arch/arm/mach-pxa/e800.c b/arch/arm/mach-pxa/e800.c index 9866c7b9e78..aad129bed19 100644 --- a/arch/arm/mach-pxa/e800.c +++ b/arch/arm/mach-pxa/e800.c | |||
| @@ -195,6 +195,9 @@ static struct platform_device *devices[] __initdata = { | |||
| 195 | 195 | ||
| 196 | static void __init e800_init(void) | 196 | static void __init e800_init(void) |
| 197 | { | 197 | { |
| 198 | pxa_set_ffuart_info(NULL); | ||
| 199 | pxa_set_btuart_info(NULL); | ||
| 200 | pxa_set_stuart_info(NULL); | ||
| 198 | clk_add_alias("CLK_CK3P6MI", e800_tc6393xb_device.name, | 201 | clk_add_alias("CLK_CK3P6MI", e800_tc6393xb_device.name, |
| 199 | "GPIO11_CLK", NULL), | 202 | "GPIO11_CLK", NULL), |
| 200 | eseries_get_tmio_gpios(); | 203 | eseries_get_tmio_gpios(); |
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c index aec7f4214b1..1c0de808b54 100644 --- a/arch/arm/mach-pxa/em-x270.c +++ b/arch/arm/mach-pxa/em-x270.c | |||
| @@ -967,7 +967,7 @@ static inline void em_x270_init_gpio_keys(void) {} | |||
| 967 | #if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE) | 967 | #if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE) |
| 968 | static struct regulator *em_x270_camera_ldo; | 968 | static struct regulator *em_x270_camera_ldo; |
| 969 | 969 | ||
| 970 | static int em_x270_sensor_init(struct device *dev) | 970 | static int em_x270_sensor_init(void) |
| 971 | { | 971 | { |
| 972 | int ret; | 972 | int ret; |
| 973 | 973 | ||
| @@ -996,7 +996,6 @@ static int em_x270_sensor_init(struct device *dev) | |||
| 996 | } | 996 | } |
| 997 | 997 | ||
| 998 | struct pxacamera_platform_data em_x270_camera_platform_data = { | 998 | struct pxacamera_platform_data em_x270_camera_platform_data = { |
| 999 | .init = em_x270_sensor_init, | ||
| 1000 | .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 | | 999 | .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 | |
| 1001 | PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN, | 1000 | PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN, |
| 1002 | .mclk_10khz = 2600, | 1001 | .mclk_10khz = 2600, |
| @@ -1049,8 +1048,10 @@ static struct platform_device em_x270_camera = { | |||
| 1049 | 1048 | ||
| 1050 | static void __init em_x270_init_camera(void) | 1049 | static void __init em_x270_init_camera(void) |
| 1051 | { | 1050 | { |
| 1052 | pxa_set_camera_info(&em_x270_camera_platform_data); | 1051 | if (em_x270_sensor_init() == 0) { |
| 1053 | platform_device_register(&em_x270_camera); | 1052 | pxa_set_camera_info(&em_x270_camera_platform_data); |
| 1053 | platform_device_register(&em_x270_camera); | ||
| 1054 | } | ||
| 1054 | } | 1055 | } |
| 1055 | #else | 1056 | #else |
| 1056 | static inline void em_x270_init_camera(void) {} | 1057 | static inline void em_x270_init_camera(void) {} |
| @@ -1286,6 +1287,10 @@ static void __init em_x270_init(void) | |||
| 1286 | { | 1287 | { |
| 1287 | pxa2xx_mfp_config(ARRAY_AND_SIZE(common_pin_config)); | 1288 | pxa2xx_mfp_config(ARRAY_AND_SIZE(common_pin_config)); |
| 1288 | 1289 | ||
| 1290 | pxa_set_ffuart_info(NULL); | ||
| 1291 | pxa_set_btuart_info(NULL); | ||
| 1292 | pxa_set_stuart_info(NULL); | ||
| 1293 | |||
| 1289 | #ifdef CONFIG_PM | 1294 | #ifdef CONFIG_PM |
| 1290 | pxa27x_set_pwrmode(PWRMODE_DEEPSLEEP); | 1295 | pxa27x_set_pwrmode(PWRMODE_DEEPSLEEP); |
| 1291 | #endif | 1296 | #endif |
diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c index 588b265e575..626c82b1397 100644 --- a/arch/arm/mach-pxa/ezx.c +++ b/arch/arm/mach-pxa/ezx.c | |||
| @@ -17,7 +17,11 @@ | |||
| 17 | #include <linux/delay.h> | 17 | #include <linux/delay.h> |
| 18 | #include <linux/pwm_backlight.h> | 18 | #include <linux/pwm_backlight.h> |
| 19 | #include <linux/input.h> | 19 | #include <linux/input.h> |
| 20 | #include <linux/gpio.h> | ||
| 20 | #include <linux/gpio_keys.h> | 21 | #include <linux/gpio_keys.h> |
| 22 | #include <linux/leds-lp3944.h> | ||
| 23 | |||
| 24 | #include <media/soc_camera.h> | ||
| 21 | 25 | ||
| 22 | #include <asm/setup.h> | 26 | #include <asm/setup.h> |
| 23 | #include <asm/mach-types.h> | 27 | #include <asm/mach-types.h> |
| @@ -29,6 +33,7 @@ | |||
| 29 | #include <plat/i2c.h> | 33 | #include <plat/i2c.h> |
| 30 | #include <mach/hardware.h> | 34 | #include <mach/hardware.h> |
| 31 | #include <mach/pxa27x_keypad.h> | 35 | #include <mach/pxa27x_keypad.h> |
| 36 | #include <mach/camera.h> | ||
| 32 | 37 | ||
| 33 | #include "devices.h" | 38 | #include "devices.h" |
| 34 | #include "generic.h" | 39 | #include "generic.h" |
| @@ -38,6 +43,9 @@ | |||
| 38 | #define GPIO15_A910_FLIP_LID 15 | 43 | #define GPIO15_A910_FLIP_LID 15 |
| 39 | #define GPIO12_E680_LOCK_SWITCH 12 | 44 | #define GPIO12_E680_LOCK_SWITCH 12 |
| 40 | #define GPIO15_E6_LOCK_SWITCH 15 | 45 | #define GPIO15_E6_LOCK_SWITCH 15 |
| 46 | #define GPIO50_nCAM_EN 50 | ||
| 47 | #define GPIO19_GEN1_CAM_RST 19 | ||
| 48 | #define GPIO28_GEN2_CAM_RST 28 | ||
| 41 | 49 | ||
| 42 | static struct platform_pwm_backlight_data ezx_backlight_data = { | 50 | static struct platform_pwm_backlight_data ezx_backlight_data = { |
| 43 | .pwm_id = 0, | 51 | .pwm_id = 0, |
| @@ -191,8 +199,8 @@ static unsigned long gen1_pin_config[] __initdata = { | |||
| 191 | GPIO94_CIF_DD_5, | 199 | GPIO94_CIF_DD_5, |
| 192 | GPIO17_CIF_DD_6, | 200 | GPIO17_CIF_DD_6, |
| 193 | GPIO108_CIF_DD_7, | 201 | GPIO108_CIF_DD_7, |
| 194 | GPIO50_GPIO, /* CAM_EN */ | 202 | GPIO50_GPIO | MFP_LPM_DRIVE_HIGH, /* CAM_EN */ |
| 195 | GPIO19_GPIO, /* CAM_RST */ | 203 | GPIO19_GPIO | MFP_LPM_DRIVE_HIGH, /* CAM_RST */ |
| 196 | 204 | ||
| 197 | /* EMU */ | 205 | /* EMU */ |
| 198 | GPIO120_GPIO, /* EMU_MUX1 */ | 206 | GPIO120_GPIO, /* EMU_MUX1 */ |
| @@ -248,8 +256,8 @@ static unsigned long gen2_pin_config[] __initdata = { | |||
| 248 | GPIO48_CIF_DD_5, | 256 | GPIO48_CIF_DD_5, |
| 249 | GPIO93_CIF_DD_6, | 257 | GPIO93_CIF_DD_6, |
| 250 | GPIO12_CIF_DD_7, | 258 | GPIO12_CIF_DD_7, |
| 251 | GPIO50_GPIO, /* CAM_EN */ | 259 | GPIO50_GPIO | MFP_LPM_DRIVE_HIGH, /* CAM_EN */ |
| 252 | GPIO28_GPIO, /* CAM_RST */ | 260 | GPIO28_GPIO | MFP_LPM_DRIVE_HIGH, /* CAM_RST */ |
| 253 | GPIO17_GPIO, /* CAM_FLASH */ | 261 | GPIO17_GPIO, /* CAM_FLASH */ |
| 254 | }; | 262 | }; |
| 255 | #endif | 263 | #endif |
| @@ -683,6 +691,81 @@ static struct platform_device a780_gpio_keys = { | |||
| 683 | }, | 691 | }, |
| 684 | }; | 692 | }; |
| 685 | 693 | ||
| 694 | /* camera */ | ||
| 695 | static int a780_camera_init(void) | ||
| 696 | { | ||
| 697 | int err; | ||
| 698 | |||
| 699 | /* | ||
| 700 | * GPIO50_nCAM_EN is active low | ||
| 701 | * GPIO19_GEN1_CAM_RST is active on rising edge | ||
| 702 | */ | ||
| 703 | err = gpio_request(GPIO50_nCAM_EN, "nCAM_EN"); | ||
| 704 | if (err) { | ||
| 705 | pr_err("%s: Failed to request nCAM_EN\n", __func__); | ||
| 706 | goto fail; | ||
| 707 | } | ||
| 708 | |||
| 709 | err = gpio_request(GPIO19_GEN1_CAM_RST, "CAM_RST"); | ||
| 710 | if (err) { | ||
| 711 | pr_err("%s: Failed to request CAM_RST\n", __func__); | ||
| 712 | goto fail_gpio_cam_rst; | ||
| 713 | } | ||
| 714 | |||
| 715 | gpio_direction_output(GPIO50_nCAM_EN, 1); | ||
| 716 | gpio_direction_output(GPIO19_GEN1_CAM_RST, 0); | ||
| 717 | |||
| 718 | return 0; | ||
| 719 | |||
| 720 | fail_gpio_cam_rst: | ||
| 721 | gpio_free(GPIO50_nCAM_EN); | ||
| 722 | fail: | ||
| 723 | return err; | ||
| 724 | } | ||
| 725 | |||
| 726 | static int a780_camera_power(struct device *dev, int on) | ||
| 727 | { | ||
| 728 | gpio_set_value(GPIO50_nCAM_EN, !on); | ||
| 729 | return 0; | ||
| 730 | } | ||
| 731 | |||
| 732 | static int a780_camera_reset(struct device *dev) | ||
| 733 | { | ||
| 734 | gpio_set_value(GPIO19_GEN1_CAM_RST, 0); | ||
| 735 | msleep(10); | ||
| 736 | gpio_set_value(GPIO19_GEN1_CAM_RST, 1); | ||
| 737 | |||
| 738 | return 0; | ||
| 739 | } | ||
| 740 | |||
| 741 | struct pxacamera_platform_data a780_pxacamera_platform_data = { | ||
| 742 | .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 | | ||
| 743 | PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN, | ||
| 744 | .mclk_10khz = 5000, | ||
| 745 | }; | ||
| 746 | |||
| 747 | static struct i2c_board_info a780_camera_i2c_board_info = { | ||
| 748 | I2C_BOARD_INFO("mt9m111", 0x5d), | ||
| 749 | }; | ||
| 750 | |||
| 751 | static struct soc_camera_link a780_iclink = { | ||
| 752 | .bus_id = 0, | ||
| 753 | .flags = SOCAM_SENSOR_INVERT_PCLK, | ||
| 754 | .i2c_adapter_id = 0, | ||
| 755 | .board_info = &a780_camera_i2c_board_info, | ||
| 756 | .module_name = "mt9m111", | ||
| 757 | .power = a780_camera_power, | ||
| 758 | .reset = a780_camera_reset, | ||
| 759 | }; | ||
| 760 | |||
| 761 | static struct platform_device a780_camera = { | ||
| 762 | .name = "soc-camera-pdrv", | ||
| 763 | .id = 0, | ||
| 764 | .dev = { | ||
| 765 | .platform_data = &a780_iclink, | ||
| 766 | }, | ||
| 767 | }; | ||
| 768 | |||
| 686 | static struct platform_device *a780_devices[] __initdata = { | 769 | static struct platform_device *a780_devices[] __initdata = { |
| 687 | &a780_gpio_keys, | 770 | &a780_gpio_keys, |
| 688 | }; | 771 | }; |
| @@ -693,12 +776,21 @@ static void __init a780_init(void) | |||
| 693 | pxa2xx_mfp_config(ARRAY_AND_SIZE(gen1_pin_config)); | 776 | pxa2xx_mfp_config(ARRAY_AND_SIZE(gen1_pin_config)); |
| 694 | pxa2xx_mfp_config(ARRAY_AND_SIZE(a780_pin_config)); | 777 | pxa2xx_mfp_config(ARRAY_AND_SIZE(a780_pin_config)); |
| 695 | 778 | ||
| 779 | pxa_set_ffuart_info(NULL); | ||
| 780 | pxa_set_btuart_info(NULL); | ||
| 781 | pxa_set_stuart_info(NULL); | ||
| 782 | |||
| 696 | pxa_set_i2c_info(NULL); | 783 | pxa_set_i2c_info(NULL); |
| 697 | 784 | ||
| 698 | set_pxa_fb_info(&ezx_fb_info_1); | 785 | set_pxa_fb_info(&ezx_fb_info_1); |
| 699 | 786 | ||
| 700 | pxa_set_keypad_info(&a780_keypad_platform_data); | 787 | pxa_set_keypad_info(&a780_keypad_platform_data); |
| 701 | 788 | ||
| 789 | if (a780_camera_init() == 0) { | ||
| 790 | pxa_set_camera_info(&a780_pxacamera_platform_data); | ||
| 791 | platform_device_register(&a780_camera); | ||
| 792 | } | ||
| 793 | |||
| 702 | platform_add_devices(ARRAY_AND_SIZE(ezx_devices)); | 794 | platform_add_devices(ARRAY_AND_SIZE(ezx_devices)); |
| 703 | platform_add_devices(ARRAY_AND_SIZE(a780_devices)); | 795 | platform_add_devices(ARRAY_AND_SIZE(a780_devices)); |
| 704 | } | 796 | } |
| @@ -754,6 +846,10 @@ static void __init e680_init(void) | |||
| 754 | pxa2xx_mfp_config(ARRAY_AND_SIZE(gen1_pin_config)); | 846 | pxa2xx_mfp_config(ARRAY_AND_SIZE(gen1_pin_config)); |
| 755 | pxa2xx_mfp_config(ARRAY_AND_SIZE(e680_pin_config)); | 847 | pxa2xx_mfp_config(ARRAY_AND_SIZE(e680_pin_config)); |
| 756 | 848 | ||
| 849 | pxa_set_ffuart_info(NULL); | ||
| 850 | pxa_set_btuart_info(NULL); | ||
| 851 | pxa_set_stuart_info(NULL); | ||
| 852 | |||
| 757 | pxa_set_i2c_info(NULL); | 853 | pxa_set_i2c_info(NULL); |
| 758 | i2c_register_board_info(0, ARRAY_AND_SIZE(e680_i2c_board_info)); | 854 | i2c_register_board_info(0, ARRAY_AND_SIZE(e680_i2c_board_info)); |
| 759 | 855 | ||
| @@ -816,6 +912,10 @@ static void __init a1200_init(void) | |||
| 816 | pxa2xx_mfp_config(ARRAY_AND_SIZE(gen2_pin_config)); | 912 | pxa2xx_mfp_config(ARRAY_AND_SIZE(gen2_pin_config)); |
| 817 | pxa2xx_mfp_config(ARRAY_AND_SIZE(a1200_pin_config)); | 913 | pxa2xx_mfp_config(ARRAY_AND_SIZE(a1200_pin_config)); |
| 818 | 914 | ||
| 915 | pxa_set_ffuart_info(NULL); | ||
| 916 | pxa_set_btuart_info(NULL); | ||
| 917 | pxa_set_stuart_info(NULL); | ||
| 918 | |||
| 819 | pxa_set_i2c_info(NULL); | 919 | pxa_set_i2c_info(NULL); |
| 820 | i2c_register_board_info(0, ARRAY_AND_SIZE(a1200_i2c_board_info)); | 920 | i2c_register_board_info(0, ARRAY_AND_SIZE(a1200_i2c_board_info)); |
| 821 | 921 | ||
| @@ -864,6 +964,131 @@ static struct platform_device a910_gpio_keys = { | |||
| 864 | }, | 964 | }, |
| 865 | }; | 965 | }; |
| 866 | 966 | ||
| 967 | /* camera */ | ||
| 968 | static int a910_camera_init(void) | ||
| 969 | { | ||
| 970 | int err; | ||
| 971 | |||
| 972 | /* | ||
| 973 | * GPIO50_nCAM_EN is active low | ||
| 974 | * GPIO28_GEN2_CAM_RST is active on rising edge | ||
| 975 | */ | ||
| 976 | err = gpio_request(GPIO50_nCAM_EN, "nCAM_EN"); | ||
| 977 | if (err) { | ||
| 978 | pr_err("%s: Failed to request nCAM_EN\n", __func__); | ||
| 979 | goto fail; | ||
| 980 | } | ||
| 981 | |||
| 982 | err = gpio_request(GPIO28_GEN2_CAM_RST, "CAM_RST"); | ||
| 983 | if (err) { | ||
| 984 | pr_err("%s: Failed to request CAM_RST\n", __func__); | ||
| 985 | goto fail_gpio_cam_rst; | ||
| 986 | } | ||
| 987 | |||
| 988 | gpio_direction_output(GPIO50_nCAM_EN, 1); | ||
| 989 | gpio_direction_output(GPIO28_GEN2_CAM_RST, 0); | ||
| 990 | |||
| 991 | return 0; | ||
| 992 | |||
| 993 | fail_gpio_cam_rst: | ||
| 994 | gpio_free(GPIO50_nCAM_EN); | ||
| 995 | fail: | ||
| 996 | return err; | ||
| 997 | } | ||
| 998 | |||
| 999 | static int a910_camera_power(struct device *dev, int on) | ||
| 1000 | { | ||
| 1001 | gpio_set_value(GPIO50_nCAM_EN, !on); | ||
| 1002 | return 0; | ||
| 1003 | } | ||
| 1004 | |||
| 1005 | static int a910_camera_reset(struct device *dev) | ||
| 1006 | { | ||
| 1007 | gpio_set_value(GPIO28_GEN2_CAM_RST, 0); | ||
| 1008 | msleep(10); | ||
| 1009 | gpio_set_value(GPIO28_GEN2_CAM_RST, 1); | ||
| 1010 | |||
| 1011 | return 0; | ||
| 1012 | } | ||
| 1013 | |||
| 1014 | struct pxacamera_platform_data a910_pxacamera_platform_data = { | ||
| 1015 | .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 | | ||
| 1016 | PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN, | ||
| 1017 | .mclk_10khz = 5000, | ||
| 1018 | }; | ||
| 1019 | |||
| 1020 | static struct i2c_board_info a910_camera_i2c_board_info = { | ||
| 1021 | I2C_BOARD_INFO("mt9m111", 0x5d), | ||
| 1022 | }; | ||
| 1023 | |||
| 1024 | static struct soc_camera_link a910_iclink = { | ||
| 1025 | .bus_id = 0, | ||
| 1026 | .i2c_adapter_id = 0, | ||
| 1027 | .board_info = &a910_camera_i2c_board_info, | ||
| 1028 | .module_name = "mt9m111", | ||
| 1029 | .power = a910_camera_power, | ||
| 1030 | .reset = a910_camera_reset, | ||
| 1031 | }; | ||
| 1032 | |||
| 1033 | static struct platform_device a910_camera = { | ||
| 1034 | .name = "soc-camera-pdrv", | ||
| 1035 | .id = 0, | ||
| 1036 | .dev = { | ||
| 1037 | .platform_data = &a910_iclink, | ||
| 1038 | }, | ||
| 1039 | }; | ||
| 1040 | |||
| 1041 | /* leds-lp3944 */ | ||
| 1042 | static struct lp3944_platform_data a910_lp3944_leds = { | ||
| 1043 | .leds_size = LP3944_LEDS_MAX, | ||
| 1044 | .leds = { | ||
| 1045 | [0] = { | ||
| 1046 | .name = "a910:red:", | ||
| 1047 | .status = LP3944_LED_STATUS_OFF, | ||
| 1048 | .type = LP3944_LED_TYPE_LED, | ||
| 1049 | }, | ||
| 1050 | [1] = { | ||
| 1051 | .name = "a910:green:", | ||
| 1052 | .status = LP3944_LED_STATUS_OFF, | ||
| 1053 | .type = LP3944_LED_TYPE_LED, | ||
| 1054 | }, | ||
| 1055 | [2] { | ||
| 1056 | .name = "a910:blue:", | ||
| 1057 | .status = LP3944_LED_STATUS_OFF, | ||
| 1058 | .type = LP3944_LED_TYPE_LED, | ||
| 1059 | }, | ||
| 1060 | /* Leds 3 and 4 are used as display power switches */ | ||
| 1061 | [3] = { | ||
| 1062 | .name = "a910::cli_display", | ||
| 1063 | .status = LP3944_LED_STATUS_OFF, | ||
| 1064 | .type = LP3944_LED_TYPE_LED_INVERTED | ||
| 1065 | }, | ||
| 1066 | [4] = { | ||
| 1067 | .name = "a910::main_display", | ||
| 1068 | .status = LP3944_LED_STATUS_ON, | ||
| 1069 | .type = LP3944_LED_TYPE_LED_INVERTED | ||
| 1070 | }, | ||
| 1071 | [5] = { .type = LP3944_LED_TYPE_NONE }, | ||
| 1072 | [6] = { | ||
| 1073 | .name = "a910::torch", | ||
| 1074 | .status = LP3944_LED_STATUS_OFF, | ||
| 1075 | .type = LP3944_LED_TYPE_LED, | ||
| 1076 | }, | ||
| 1077 | [7] = { | ||
| 1078 | .name = "a910::flash", | ||
| 1079 | .status = LP3944_LED_STATUS_OFF, | ||
| 1080 | .type = LP3944_LED_TYPE_LED_INVERTED, | ||
| 1081 | }, | ||
| 1082 | }, | ||
| 1083 | }; | ||
| 1084 | |||
| 1085 | static struct i2c_board_info __initdata a910_i2c_board_info[] = { | ||
| 1086 | { | ||
| 1087 | I2C_BOARD_INFO("lp3944", 0x60), | ||
| 1088 | .platform_data = &a910_lp3944_leds, | ||
| 1089 | }, | ||
| 1090 | }; | ||
| 1091 | |||
| 867 | static struct platform_device *a910_devices[] __initdata = { | 1092 | static struct platform_device *a910_devices[] __initdata = { |
| 868 | &a910_gpio_keys, | 1093 | &a910_gpio_keys, |
| 869 | }; | 1094 | }; |
| @@ -874,12 +1099,22 @@ static void __init a910_init(void) | |||
| 874 | pxa2xx_mfp_config(ARRAY_AND_SIZE(gen2_pin_config)); | 1099 | pxa2xx_mfp_config(ARRAY_AND_SIZE(gen2_pin_config)); |
| 875 | pxa2xx_mfp_config(ARRAY_AND_SIZE(a910_pin_config)); | 1100 | pxa2xx_mfp_config(ARRAY_AND_SIZE(a910_pin_config)); |
| 876 | 1101 | ||
| 1102 | pxa_set_ffuart_info(NULL); | ||
| 1103 | pxa_set_btuart_info(NULL); | ||
| 1104 | pxa_set_stuart_info(NULL); | ||
| 1105 | |||
| 877 | pxa_set_i2c_info(NULL); | 1106 | pxa_set_i2c_info(NULL); |
| 1107 | i2c_register_board_info(0, ARRAY_AND_SIZE(a910_i2c_board_info)); | ||
| 878 | 1108 | ||
| 879 | set_pxa_fb_info(&ezx_fb_info_2); | 1109 | set_pxa_fb_info(&ezx_fb_info_2); |
| 880 | 1110 | ||
| 881 | pxa_set_keypad_info(&a910_keypad_platform_data); | 1111 | pxa_set_keypad_info(&a910_keypad_platform_data); |
| 882 | 1112 | ||
| 1113 | if (a910_camera_init() == 0) { | ||
| 1114 | pxa_set_camera_info(&a910_pxacamera_platform_data); | ||
| 1115 | platform_device_register(&a910_camera); | ||
| 1116 | } | ||
| 1117 | |||
| 883 | platform_add_devices(ARRAY_AND_SIZE(ezx_devices)); | 1118 | platform_add_devices(ARRAY_AND_SIZE(ezx_devices)); |
| 884 | platform_add_devices(ARRAY_AND_SIZE(a910_devices)); | 1119 | platform_add_devices(ARRAY_AND_SIZE(a910_devices)); |
| 885 | } | 1120 | } |
| @@ -935,6 +1170,10 @@ static void __init e6_init(void) | |||
| 935 | pxa2xx_mfp_config(ARRAY_AND_SIZE(gen2_pin_config)); | 1170 | pxa2xx_mfp_config(ARRAY_AND_SIZE(gen2_pin_config)); |
| 936 | pxa2xx_mfp_config(ARRAY_AND_SIZE(e6_pin_config)); | 1171 | pxa2xx_mfp_config(ARRAY_AND_SIZE(e6_pin_config)); |
| 937 | 1172 | ||
| 1173 | pxa_set_ffuart_info(NULL); | ||
| 1174 | pxa_set_btuart_info(NULL); | ||
| 1175 | pxa_set_stuart_info(NULL); | ||
| 1176 | |||
| 938 | pxa_set_i2c_info(NULL); | 1177 | pxa_set_i2c_info(NULL); |
| 939 | i2c_register_board_info(0, ARRAY_AND_SIZE(e6_i2c_board_info)); | 1178 | i2c_register_board_info(0, ARRAY_AND_SIZE(e6_i2c_board_info)); |
| 940 | 1179 | ||
| @@ -971,6 +1210,10 @@ static void __init e2_init(void) | |||
| 971 | pxa2xx_mfp_config(ARRAY_AND_SIZE(gen2_pin_config)); | 1210 | pxa2xx_mfp_config(ARRAY_AND_SIZE(gen2_pin_config)); |
| 972 | pxa2xx_mfp_config(ARRAY_AND_SIZE(e2_pin_config)); | 1211 | pxa2xx_mfp_config(ARRAY_AND_SIZE(e2_pin_config)); |
| 973 | 1212 | ||
| 1213 | pxa_set_ffuart_info(NULL); | ||
| 1214 | pxa_set_btuart_info(NULL); | ||
| 1215 | pxa_set_stuart_info(NULL); | ||
| 1216 | |||
| 974 | pxa_set_i2c_info(NULL); | 1217 | pxa_set_i2c_info(NULL); |
| 975 | i2c_register_board_info(0, ARRAY_AND_SIZE(e2_i2c_board_info)); | 1218 | i2c_register_board_info(0, ARRAY_AND_SIZE(e2_i2c_board_info)); |
| 976 | 1219 | ||
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h index 485fede83d9..890fb90a672 100644 --- a/arch/arm/mach-pxa/generic.h +++ b/arch/arm/mach-pxa/generic.h | |||
| @@ -67,3 +67,8 @@ extern struct sysdev_class pxa_irq_sysclass; | |||
| 67 | extern struct sysdev_class pxa_gpio_sysclass; | 67 | extern struct sysdev_class pxa_gpio_sysclass; |
| 68 | extern struct sysdev_class pxa2xx_mfp_sysclass; | 68 | extern struct sysdev_class pxa2xx_mfp_sysclass; |
| 69 | extern struct sysdev_class pxa3xx_mfp_sysclass; | 69 | extern struct sysdev_class pxa3xx_mfp_sysclass; |
| 70 | |||
| 71 | void __init pxa_set_ffuart_info(void *info); | ||
| 72 | void __init pxa_set_btuart_info(void *info); | ||
| 73 | void __init pxa_set_stuart_info(void *info); | ||
| 74 | void __init pxa_set_hwuart_info(void *info); | ||
diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c index 1708c010984..96c34512913 100644 --- a/arch/arm/mach-pxa/gumstix.c +++ b/arch/arm/mach-pxa/gumstix.c | |||
| @@ -211,6 +211,11 @@ static void __init gumstix_init(void) | |||
| 211 | { | 211 | { |
| 212 | pxa2xx_mfp_config(ARRAY_AND_SIZE(gumstix_pin_config)); | 212 | pxa2xx_mfp_config(ARRAY_AND_SIZE(gumstix_pin_config)); |
| 213 | 213 | ||
| 214 | pxa_set_ffuart_info(NULL); | ||
| 215 | pxa_set_btuart_info(NULL); | ||
| 216 | pxa_set_stuart_info(NULL); | ||
| 217 | pxa_set_hwuart_info(NULL); | ||
| 218 | |||
| 214 | gumstix_bluetooth_init(); | 219 | gumstix_bluetooth_init(); |
| 215 | gumstix_udc_init(); | 220 | gumstix_udc_init(); |
| 216 | gumstix_mmc_init(); | 221 | gumstix_mmc_init(); |
diff --git a/arch/arm/mach-pxa/h5000.c b/arch/arm/mach-pxa/h5000.c index f3d220c32e0..c1cab0871c9 100644 --- a/arch/arm/mach-pxa/h5000.c +++ b/arch/arm/mach-pxa/h5000.c | |||
| @@ -193,6 +193,9 @@ static void __init h5000_init(void) | |||
| 193 | fix_msc(); | 193 | fix_msc(); |
| 194 | 194 | ||
| 195 | pxa2xx_mfp_config(ARRAY_AND_SIZE(h5000_pin_config)); | 195 | pxa2xx_mfp_config(ARRAY_AND_SIZE(h5000_pin_config)); |
| 196 | pxa_set_ffuart_info(NULL); | ||
| 197 | pxa_set_btuart_info(NULL); | ||
| 198 | pxa_set_stuart_info(NULL); | ||
| 196 | pxa_set_udc_info(&h5000_udc_mach_info); | 199 | pxa_set_udc_info(&h5000_udc_mach_info); |
| 197 | platform_add_devices(ARRAY_AND_SIZE(devices)); | 200 | platform_add_devices(ARRAY_AND_SIZE(devices)); |
| 198 | } | 201 | } |
diff --git a/arch/arm/mach-pxa/himalaya.c b/arch/arm/mach-pxa/himalaya.c index cea99fe65b9..f9a2e4b0f09 100644 --- a/arch/arm/mach-pxa/himalaya.c +++ b/arch/arm/mach-pxa/himalaya.c | |||
| @@ -150,6 +150,9 @@ static void __init himalaya_lcd_init(void) | |||
| 150 | 150 | ||
| 151 | static void __init himalaya_init(void) | 151 | static void __init himalaya_init(void) |
| 152 | { | 152 | { |
| 153 | pxa_set_ffuart_info(NULL); | ||
| 154 | pxa_set_btuart_info(NULL); | ||
| 155 | pxa_set_stuart_info(NULL); | ||
| 153 | himalaya_lcd_init(); | 156 | himalaya_lcd_init(); |
| 154 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 157 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
| 155 | } | 158 | } |
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c index 83bd3c6e388..848c861dd23 100644 --- a/arch/arm/mach-pxa/hx4700.c +++ b/arch/arm/mach-pxa/hx4700.c | |||
| @@ -820,6 +820,7 @@ static struct platform_device *devices[] __initdata = { | |||
| 820 | &gpio_keys, | 820 | &gpio_keys, |
| 821 | &backlight, | 821 | &backlight, |
| 822 | &w3220, | 822 | &w3220, |
| 823 | &hx4700_lcd, | ||
| 823 | &egpio, | 824 | &egpio, |
| 824 | &bq24022, | 825 | &bq24022, |
| 825 | &gpio_vbus, | 826 | &gpio_vbus, |
| @@ -849,6 +850,10 @@ static void __init hx4700_init(void) | |||
| 849 | pxa2xx_mfp_config(ARRAY_AND_SIZE(hx4700_pin_config)); | 850 | pxa2xx_mfp_config(ARRAY_AND_SIZE(hx4700_pin_config)); |
| 850 | hx4700_gpio_request(ARRAY_AND_SIZE(global_gpios)); | 851 | hx4700_gpio_request(ARRAY_AND_SIZE(global_gpios)); |
| 851 | 852 | ||
| 853 | pxa_set_ffuart_info(NULL); | ||
| 854 | pxa_set_btuart_info(NULL); | ||
| 855 | pxa_set_stuart_info(NULL); | ||
| 856 | |||
| 852 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 857 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
| 853 | 858 | ||
| 854 | pxa_set_ficp_info(&ficp_info); | 859 | pxa_set_ficp_info(&ficp_info); |
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c index b6486ef20b1..5c9e11d74f4 100644 --- a/arch/arm/mach-pxa/idp.c +++ b/arch/arm/mach-pxa/idp.c | |||
| @@ -179,6 +179,9 @@ static void __init idp_init(void) | |||
| 179 | printk("idp_init()\n"); | 179 | printk("idp_init()\n"); |
| 180 | 180 | ||
| 181 | pxa2xx_mfp_config(ARRAY_AND_SIZE(idp_pin_config)); | 181 | pxa2xx_mfp_config(ARRAY_AND_SIZE(idp_pin_config)); |
| 182 | pxa_set_ffuart_info(NULL); | ||
| 183 | pxa_set_btuart_info(NULL); | ||
| 184 | pxa_set_stuart_info(NULL); | ||
| 182 | 185 | ||
| 183 | platform_device_register(&smc91x_device); | 186 | platform_device_register(&smc91x_device); |
| 184 | //platform_device_register(&mst_audio_device); | 187 | //platform_device_register(&mst_audio_device); |
diff --git a/arch/arm/mach-pxa/imote2.c b/arch/arm/mach-pxa/imote2.c index 2a4945db31c..5b0862df61a 100644 --- a/arch/arm/mach-pxa/imote2.c +++ b/arch/arm/mach-pxa/imote2.c | |||
| @@ -554,8 +554,12 @@ static struct i2c_pxa_platform_data i2c_pdata = { | |||
| 554 | 554 | ||
| 555 | static void __init imote2_init(void) | 555 | static void __init imote2_init(void) |
| 556 | { | 556 | { |
| 557 | |||
| 558 | pxa2xx_mfp_config(ARRAY_AND_SIZE(imote2_pin_config)); | 557 | pxa2xx_mfp_config(ARRAY_AND_SIZE(imote2_pin_config)); |
| 558 | |||
| 559 | pxa_set_ffuart_info(NULL); | ||
| 560 | pxa_set_btuart_info(NULL); | ||
| 561 | pxa_set_stuart_info(NULL); | ||
| 562 | |||
| 559 | /* SPI chip select directions - all other directions should | 563 | /* SPI chip select directions - all other directions should |
| 560 | * be handled by drivers.*/ | 564 | * be handled by drivers.*/ |
| 561 | gpio_direction_output(37, 0); | 565 | gpio_direction_output(37, 0); |
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h index aa3d9f70a08..50f1297bf5a 100644 --- a/arch/arm/mach-pxa/include/mach/hardware.h +++ b/arch/arm/mach-pxa/include/mach/hardware.h | |||
| @@ -105,6 +105,7 @@ | |||
| 105 | * | 105 | * |
| 106 | * PXA935 A0 0x56056931 0x1E653013 | 106 | * PXA935 A0 0x56056931 0x1E653013 |
| 107 | * PXA935 B0 0x56056936 0x6E653013 | 107 | * PXA935 B0 0x56056936 0x6E653013 |
| 108 | * PXA935 B1 0x56056938 0x8E653013 | ||
| 108 | */ | 109 | */ |
| 109 | #ifdef CONFIG_PXA25x | 110 | #ifdef CONFIG_PXA25x |
| 110 | #define __cpu_is_pxa210(id) \ | 111 | #define __cpu_is_pxa210(id) \ |
| @@ -283,7 +284,7 @@ | |||
| 283 | _id == 0x3; \ | 284 | _id == 0x3; \ |
| 284 | }) | 285 | }) |
| 285 | 286 | ||
| 286 | #define __cpu_is_pxa9xx(id) \ | 287 | #define __cpu_is_pxa93x(id) \ |
| 287 | ({ \ | 288 | ({ \ |
| 288 | unsigned int _id = (id) >> 4 & 0xfff; \ | 289 | unsigned int _id = (id) >> 4 & 0xfff; \ |
| 289 | _id == 0x683 || _id == 0x693; \ | 290 | _id == 0x683 || _id == 0x693; \ |
| @@ -299,9 +300,9 @@ | |||
| 299 | __cpu_is_pxa3xx(read_cpuid_id()); \ | 300 | __cpu_is_pxa3xx(read_cpuid_id()); \ |
| 300 | }) | 301 | }) |
| 301 | 302 | ||
| 302 | #define cpu_is_pxa9xx() \ | 303 | #define cpu_is_pxa93x() \ |
| 303 | ({ \ | 304 | ({ \ |
| 304 | __cpu_is_pxa9xx(read_cpuid_id()); \ | 305 | __cpu_is_pxa93x(read_cpuid_id()); \ |
| 305 | }) | 306 | }) |
| 306 | /* | 307 | /* |
| 307 | * return current memory and LCD clock frequency in units of 10kHz | 308 | * return current memory and LCD clock frequency in units of 10kHz |
diff --git a/arch/arm/mach-pxa/include/mach/palmtreo.h b/arch/arm/mach-pxa/include/mach/palmtreo.h new file mode 100644 index 00000000000..2d3f14e3be2 --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/palmtreo.h | |||
| @@ -0,0 +1,67 @@ | |||
| 1 | /* | ||
| 2 | * GPIOs and interrupts for Palm Treo smartphones | ||
| 3 | * | ||
| 4 | * currently supported: | ||
| 5 | * Palm Treo 680 (GSM) | ||
| 6 | * Palm Centro 685 (GSM) | ||
| 7 | * | ||
| 8 | * Author: Tomas Cech <sleep_walker@suse.cz> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | * | ||
| 14 | * find more info at www.hackndev.com | ||
| 15 | * | ||
| 16 | */ | ||
| 17 | |||
| 18 | #ifndef _INCLUDE_TREO_H_ | ||
| 19 | #define _INCLUDE_TREO_H_ | ||
| 20 | |||
| 21 | /* GPIOs */ | ||
| 22 | #define GPIO_NR_TREO_POWER_DETECT 0 | ||
| 23 | #define GPIO_NR_TREO_AMP_EN 27 | ||
| 24 | #define GPIO_NR_TREO_GREEN_LED 20 | ||
| 25 | #define GPIO_NR_TREO_RED_LED 79 | ||
| 26 | #define GPIO_NR_TREO_SD_DETECT_N 113 | ||
| 27 | #define GPIO_NR_TREO_EP_DETECT_N 116 | ||
| 28 | #define GPIO_NR_TREO_USB_DETECT 1 | ||
| 29 | #define GPIO_NR_TREO_USB_PULLUP 114 | ||
| 30 | #define GPIO_NR_TREO_GSM_POWER 40 | ||
| 31 | #define GPIO_NR_TREO_GSM_RESET 87 | ||
| 32 | #define GPIO_NR_TREO_GSM_WAKE 57 | ||
| 33 | #define GPIO_NR_TREO_GSM_HOST_WAKE 14 | ||
| 34 | #define GPIO_NR_TREO_GSM_TRIGGER 10 | ||
| 35 | #define GPIO_NR_TREO_IR_EN 115 | ||
| 36 | #define GPIO_NR_TREO_IR_TXD 47 | ||
| 37 | #define GPIO_NR_TREO_BL_POWER 38 | ||
| 38 | #define GPIO_NR_TREO_LCD_POWER 25 | ||
| 39 | |||
| 40 | /* Treo680 specific GPIOs */ | ||
| 41 | #ifdef CONFIG_MACH_TREO680 | ||
| 42 | #define GPIO_NR_TREO680_SD_READONLY 33 | ||
| 43 | #define GPIO_NR_TREO680_SD_POWER 42 | ||
| 44 | #define GPIO_NR_TREO680_VIBRATE_EN 44 | ||
| 45 | #define GPIO_NR_TREO680_KEYB_BL 24 | ||
| 46 | #define GPIO_NR_TREO680_BT_EN 43 | ||
| 47 | #endif /* CONFIG_MACH_TREO680 */ | ||
| 48 | |||
| 49 | /* Centro685 specific GPIOs */ | ||
| 50 | #define GPIO_NR_CENTRO_SD_POWER 21 | ||
| 51 | #define GPIO_NR_CENTRO_VIBRATE_EN 22 | ||
| 52 | #define GPIO_NR_CENTRO_KEYB_BL 33 | ||
| 53 | #define GPIO_NR_CENTRO_BT_EN 80 | ||
| 54 | |||
| 55 | /* Various addresses */ | ||
| 56 | #define TREO_PHYS_RAM_START 0xa0000000 | ||
| 57 | #define TREO_PHYS_IO_START 0x40000000 | ||
| 58 | #define TREO_STR_BASE 0xa2000000 | ||
| 59 | |||
| 60 | /* BACKLIGHT */ | ||
| 61 | #define TREO_MAX_INTENSITY 254 | ||
| 62 | #define TREO_DEFAULT_INTENSITY 160 | ||
| 63 | #define TREO_LIMIT_MASK 0x7F | ||
| 64 | #define TREO_PRESCALER 63 | ||
| 65 | #define TREO_PERIOD_NS 3500 | ||
| 66 | |||
| 67 | #endif | ||
diff --git a/arch/arm/mach-pxa/include/mach/pxafb.h b/arch/arm/mach-pxa/include/mach/pxafb.h index f73061c90b5..160ec83f51a 100644 --- a/arch/arm/mach-pxa/include/mach/pxafb.h +++ b/arch/arm/mach-pxa/include/mach/pxafb.h | |||
| @@ -76,7 +76,8 @@ struct pxafb_mode_info { | |||
| 76 | u_char bpp; | 76 | u_char bpp; |
| 77 | u_int cmap_greyscale:1, | 77 | u_int cmap_greyscale:1, |
| 78 | depth:8, | 78 | depth:8, |
| 79 | unused:23; | 79 | transparency:1, |
| 80 | unused:22; | ||
| 80 | 81 | ||
| 81 | /* Parallel Mode Timing */ | 82 | /* Parallel Mode Timing */ |
| 82 | u_char hsync_len; | 83 | u_char hsync_len; |
diff --git a/arch/arm/mach-pxa/include/mach/regs-u2d.h b/arch/arm/mach-pxa/include/mach/regs-u2d.h new file mode 100644 index 00000000000..44b0b20b69a --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/regs-u2d.h | |||
| @@ -0,0 +1,199 @@ | |||
| 1 | #ifndef __ASM_ARCH_PXA3xx_U2D_H | ||
| 2 | #define __ASM_ARCH_PXA3xx_U2D_H | ||
| 3 | |||
| 4 | #include <mach/bitfield.h> | ||
| 5 | |||
| 6 | /* | ||
| 7 | * USB2 device controller registers and bits definitions | ||
| 8 | */ | ||
| 9 | #define U2DCR (0x0000) /* U2D Control Register */ | ||
| 10 | #define U2DCR_NDC (1 << 31) /* NAK During Config */ | ||
| 11 | #define U2DCR_HSTC (0x7 << 28) /* High Speed Timeout Calibration */ | ||
| 12 | #define U2DCR_SPEOREN (1 << 27) /* Short Packet EOR INTR generation Enable */ | ||
| 13 | #define U2DCR_FSTC (0x7 << 24) /* Full Speed Timeout Calibration */ | ||
| 14 | #define U2DCR_UCLKOVR (1 << 22) /* UTM Clock Override */ | ||
| 15 | #define U2DCR_ABP (1 << 21) /* Application Bus Power */ | ||
| 16 | #define U2DCR_ADD (1 << 20) /* Application Device Disconnect */ | ||
| 17 | #define U2DCR_CC (1 << 19) /* Configuration Change */ | ||
| 18 | #define U2DCR_HS (1 << 18) /* High Speed USB Detection */ | ||
| 19 | #define U2DCR_SMAC (1 << 17) /* Switch Endpoint Memory to Active Configuration */ | ||
| 20 | #define U2DCR_DWRE (1 << 16) /* Device Remote Wake-up Feature */ | ||
| 21 | #define U2DCR_ACN (0xf << 12) /* Active U2D Configuration Number */ | ||
| 22 | #define U2DCR_AIN (0xf << 8) /* Active U2D Interface Number */ | ||
| 23 | #define U2DCR_AAISN (0xf << 4) /* Active U2D Alternate Interface Setting Number */ | ||
| 24 | #define U2DCR_EMCE (1 << 3) /* Endpoint Memory Configuration Error */ | ||
| 25 | #define U2DCR_UDR (1 << 2) /* U2D Resume */ | ||
| 26 | #define U2DCR_UDA (1 << 1) /* U2D Active */ | ||
| 27 | #define U2DCR_UDE (1 << 0) /* U2D Enable */ | ||
| 28 | |||
| 29 | #define U2DICR (0x0004) /* U2D Interrupt Control Register */ | ||
| 30 | #define U2DISR (0x000C) /* U2D Interrupt Status Register */ | ||
| 31 | #define U2DINT_CC (1 << 31) /* Interrupt - Configuration Change */ | ||
| 32 | #define U2DINT_SOF (1 << 30) /* Interrupt - SOF */ | ||
| 33 | #define U2DINT_USOF (1 << 29) /* Interrupt - micro SOF */ | ||
| 34 | #define U2DINT_RU (1 << 28) /* Interrupt - Resume */ | ||
| 35 | #define U2DINT_SU (1 << 27) /* Interrupt - Suspend */ | ||
| 36 | #define U2DINT_RS (1 << 26) /* Interrupt - Reset */ | ||
| 37 | #define U2DINT_DPE (1 << 25) /* Interrupt - Data Packet Error */ | ||
| 38 | #define U2DINT_FIFOERR (0x4) /* Interrupt - endpoint FIFO error */ | ||
| 39 | #define U2DINT_PACKETCMP (0x2) /* Interrupt - endpoint packet complete */ | ||
| 40 | #define U2DINT_SPACKETCMP (0x1) /* Interrupt - endpoint short packet complete */ | ||
| 41 | |||
| 42 | #define U2DFNR (0x0014) /* U2D Frame Number Register */ | ||
| 43 | |||
| 44 | #define U2DINT(n, intr) (((intr) & 0x07) << (((n) & 0x07) * 3)) | ||
| 45 | #define U2DICR2 (0x0008) /* U2D Interrupt Control Register 2 */ | ||
| 46 | #define U2DISR2 (0x0010) /* U2D Interrupt Status Register 2 */ | ||
| 47 | |||
| 48 | #define U2DOTGCR (0x0020) /* U2D OTG Control Register */ | ||
| 49 | #define U2DOTGCR_OTGEN (1 << 31) /* On-The-Go Enable */ | ||
| 50 | #define U2DOTGCR_AALTHNP (1 << 30) /* A-device Alternate Host Negotiation Protocal Port Support */ | ||
| 51 | #define U2DOTGCR_AHNP (1 << 29) /* A-device Host Negotiation Protocal Support */ | ||
| 52 | #define U2DOTGCR_BHNP (1 << 28) /* B-device Host Negotiation Protocal Enable */ | ||
| 53 | |||
| 54 | #ifdef CONFIG_CPU_PXA930 | ||
| 55 | #define U2DOTGCR_LPA (1 << 15) /* ULPI low power mode active */ | ||
| 56 | #define U2DOTGCR_IESI (1 << 13) /* OTG interrupt Enable */ | ||
| 57 | #define U2DOTGCR_ISSI (1 << 12) /* OTG interrupt status */ | ||
| 58 | #endif | ||
| 59 | |||
| 60 | #define U2DOTGCR_CKAF (1 << 5) /* Carkit Mode Alternate Function Select */ | ||
| 61 | #define U2DOTGCR_UTMID (1 << 4) /* UTMI Interface Disable */ | ||
| 62 | #define U2DOTGCR_ULAF (1 << 3) /* ULPI Mode Alternate Function Select */ | ||
| 63 | #define U2DOTGCR_SMAF (1 << 2) /* Serial Mode Alternate Function Select */ | ||
| 64 | #define U2DOTGCR_RTSM (1 << 1) /* Return to Synchronous Mode (ULPI Mode) */ | ||
| 65 | #define U2DOTGCR_ULE (1 << 0) /* ULPI Wrapper Enable */ | ||
| 66 | |||
| 67 | #define U2DOTGICR (0x0024) /* U2D OTG Interrupt Control Register */ | ||
| 68 | #define U2DOTGISR (0x0028) /* U2D OTG Interrupt Status Register */ | ||
| 69 | |||
| 70 | #define U2DOTGINT_SF (1 << 17) /* OTG Set Feature Command Received */ | ||
| 71 | #define U2DOTGINT_SI (1 << 16) /* OTG Interrupt */ | ||
| 72 | #define U2DOTGINT_RLS1 (1 << 14) /* RXCMD Linestate[1] Change Interrupt Rise */ | ||
| 73 | #define U2DOTGINT_RLS0 (1 << 13) /* RXCMD Linestate[0] Change Interrupt Rise */ | ||
| 74 | #define U2DOTGINT_RID (1 << 12) /* RXCMD OTG ID Change Interrupt Rise */ | ||
| 75 | #define U2DOTGINT_RSE (1 << 11) /* RXCMD OTG Session End Interrupt Rise */ | ||
| 76 | #define U2DOTGINT_RSV (1 << 10) /* RXCMD OTG Session Valid Interrupt Rise */ | ||
| 77 | #define U2DOTGINT_RVV (1 << 9) /* RXCMD OTG Vbus Valid Interrupt Rise */ | ||
| 78 | #define U2DOTGINT_RCK (1 << 8) /* RXCMD Carkit Interrupt Rise */ | ||
| 79 | #define U2DOTGINT_FLS1 (1 << 6) /* RXCMD Linestate[1] Change Interrupt Fall */ | ||
| 80 | #define U2DOTGINT_FLS0 (1 << 5) /* RXCMD Linestate[0] Change Interrupt Fall */ | ||
| 81 | #define U2DOTGINT_FID (1 << 4) /* RXCMD OTG ID Change Interrupt Fall */ | ||
| 82 | #define U2DOTGINT_FSE (1 << 3) /* RXCMD OTG Session End Interrupt Fall */ | ||
| 83 | #define U2DOTGINT_FSV (1 << 2) /* RXCMD OTG Session Valid Interrupt Fall */ | ||
| 84 | #define U2DOTGINT_FVV (1 << 1) /* RXCMD OTG Vbus Valid Interrupt Fall */ | ||
| 85 | #define U2DOTGINT_FCK (1 << 0) /* RXCMD Carkit Interrupt Fall */ | ||
| 86 | |||
| 87 | #define U2DOTGUSR (0x002C) /* U2D OTG ULPI Status Register */ | ||
| 88 | #define U2DOTGUSR_LPA (1 << 31) /* ULPI Low Power Mode Active */ | ||
| 89 | #define U2DOTGUSR_S6A (1 << 30) /* ULPI Serial Mode (6-pin) Active */ | ||
| 90 | #define U2DOTGUSR_S3A (1 << 29) /* ULPI Serial Mode (3-pin) Active */ | ||
| 91 | #define U2DOTGUSR_CKA (1 << 28) /* ULPI Car Kit Mode Active */ | ||
| 92 | #define U2DOTGUSR_LS1 (1 << 6) /* RXCMD Linestate 1 Status */ | ||
| 93 | #define U2DOTGUSR_LS0 (1 << 5) /* RXCMD Linestate 0 Status */ | ||
| 94 | #define U2DOTGUSR_ID (1 << 4) /* OTG IDGnd Status */ | ||
| 95 | #define U2DOTGUSR_SE (1 << 3) /* OTG Session End Status */ | ||
| 96 | #define U2DOTGUSR_SV (1 << 2) /* OTG Session Valid Status */ | ||
| 97 | #define U2DOTGUSR_VV (1 << 1) /* OTG Vbus Valid Status */ | ||
| 98 | #define U2DOTGUSR_CK (1 << 0) /* Carkit Interrupt Status */ | ||
| 99 | |||
| 100 | #define U2DOTGUCR (0x0030) /* U2D OTG ULPI Control Register */ | ||
| 101 | #define U2DOTGUCR_RUN (1 << 25) /* RUN */ | ||
| 102 | #define U2DOTGUCR_RNW (1 << 24) /* Read or Write operation */ | ||
| 103 | #define U2DOTGUCR_ADDR (0x3f << 16) /* Address of the ULPI PHY register */ | ||
| 104 | #define U2DOTGUCR_WDATA (0xff << 8) /* The data for a WRITE command */ | ||
| 105 | #define U2DOTGUCR_RDATA (0xff << 0) /* The data for a READ command */ | ||
| 106 | |||
| 107 | #define U2DP3CR (0x0034) /* U2D Port 3 Control Register */ | ||
| 108 | #define U2DP3CR_P2SS (0x3 << 8) /* Host Port 2 Serial Mode Select */ | ||
| 109 | #define U2DP3CR_P3SS (0x7 << 4) /* Host Port 3 Serial Mode Select */ | ||
| 110 | #define U2DP3CR_VPVMBEN (0x1 << 2) /* Host Port 3 Vp/Vm Block Enable */ | ||
| 111 | #define U2DP3CR_CFG (0x3 << 0) /* Host Port 3 Configuration */ | ||
| 112 | |||
| 113 | #define U2DCSR0 (0x0100) /* U2D Control/Status Register - Endpoint 0 */ | ||
| 114 | #define U2DCSR0_IPA (1 << 8) /* IN Packet Adjusted */ | ||
| 115 | #define U2DCSR0_SA (1 << 7) /* SETUP Active */ | ||
| 116 | #define U2DCSR0_RNE (1 << 6) /* Receive FIFO Not Empty */ | ||
| 117 | #define U2DCSR0_FST (1 << 5) /* Force Stall */ | ||
| 118 | #define U2DCSR0_SST (1 << 4) /* Send Stall */ | ||
| 119 | #define U2DCSR0_DME (1 << 3) /* DMA Enable */ | ||
| 120 | #define U2DCSR0_FTF (1 << 2) /* Flush Transmit FIFO */ | ||
| 121 | #define U2DCSR0_IPR (1 << 1) /* IN Packet Ready */ | ||
| 122 | #define U2DCSR0_OPC (1 << 0) /* OUT Packet Complete */ | ||
| 123 | |||
| 124 | #define U2DCSR(x) (0x0100 + ((x) << 2)) /* U2D Control/Status Register - Endpoint x */ | ||
| 125 | #define U2DCSR_BF (1 << 10) /* Buffer Full, for OUT eps */ | ||
| 126 | #define U2DCSR_BE (1 << 10) /* Buffer Empty, for IN eps */ | ||
| 127 | #define U2DCSR_DPE (1 << 9) /* Data Packet Error, for ISO eps only */ | ||
| 128 | #define U2DCSR_FEF (1 << 8) /* Flush Endpoint FIFO */ | ||
| 129 | #define U2DCSR_SP (1 << 7) /* Short Packet Control/Status, for OUT eps only, readonly */ | ||
| 130 | #define U2DCSR_BNE (1 << 6) /* Buffer Not Empty, for OUT eps */ | ||
| 131 | #define U2DCSR_BNF (1 << 6) /* Buffer Not Full, for IN eps */ | ||
| 132 | #define U2DCSR_FST (1 << 5) /* Force STALL, write 1 set */ | ||
| 133 | #define U2DCSR_SST (1 << 4) /* Sent STALL, write 1 clear */ | ||
| 134 | #define U2DCSR_DME (1 << 3) /* DMA Enable */ | ||
| 135 | #define U2DCSR_TRN (1 << 2) /* Tx/Rx NAK, write 1 clear */ | ||
| 136 | #define U2DCSR_PC (1 << 1) /* Packet Complete, write 1 clear */ | ||
| 137 | #define U2DCSR_FS (1 << 0) /* FIFO needs Service */ | ||
| 138 | |||
| 139 | #define U2DBCR0 (0x0200) /* U2D Byte Count Register - Endpoint 0 */ | ||
| 140 | #define U2DBCR(x) (0x0200 + ((x) << 2)) /* U2D Byte Count Register - Endpoint x */ | ||
| 141 | |||
| 142 | #define U2DDR0 (0x0300) /* U2D Data Register - Endpoint 0 */ | ||
| 143 | |||
| 144 | #define U2DEPCR(x) (0x0400 + ((x) << 2)) /* U2D Configuration Register - Endpoint x */ | ||
| 145 | #define U2DEPCR_EE (1 << 0) /* Endpoint Enable */ | ||
| 146 | #define U2DEPCR_BS_MASK (0x3FE) /* Buffer Size, BS*8=FIFO size, max 8184B = 8KB */ | ||
| 147 | |||
| 148 | #define U2DSCA (0x0500) /* U2D Setup Command Address */ | ||
| 149 | #define U2DSCA_VALUE (0x0120) | ||
| 150 | |||
| 151 | #define U2DEN0 (0x0504) /* U2D Endpoint Information Register - Endpoint 0 */ | ||
| 152 | #define U2DEN(x) (0x0504 + ((x) << 2)) /* U2D Endpoint Information Register - Endpoint x */ | ||
| 153 | |||
| 154 | /* U2DMA registers */ | ||
| 155 | #define U2DMACSR0 (0x1000) /* U2DMA Control/Status Register - Channel 0 */ | ||
| 156 | #define U2DMACSR(x) (0x1000 + ((x) << 2)) /* U2DMA Control/Status Register - Channel x */ | ||
| 157 | #define U2DMACSR_RUN (1 << 31) /* Run Bit (read / write) */ | ||
| 158 | #define U2DMACSR_STOPIRQEN (1 << 29) /* Stop Interrupt Enable (read / write) */ | ||
| 159 | #define U2DMACSR_EORIRQEN (1 << 28) /* End of Receive Interrupt Enable (R/W) */ | ||
| 160 | #define U2DMACSR_EORJMPEN (1 << 27) /* Jump to next descriptor on EOR */ | ||
| 161 | #define U2DMACSR_EORSTOPEN (1 << 26) /* STOP on an EOR */ | ||
| 162 | #define U2DMACSR_RASIRQEN (1 << 23) /* Request After Cnannel Stopped Interrupt Enable */ | ||
| 163 | #define U2DMACSR_MASKRUN (1 << 22) /* Mask Run */ | ||
| 164 | #define U2DMACSR_SCEMC (3 << 18) /* System Bus Split Completion Error Message Class */ | ||
| 165 | #define U2DMACSR_SCEMI (0x1f << 13) /* System Bus Split Completion Error Message Index */ | ||
| 166 | #define U2DMACSR_BUSERRTYPE (7 << 10) /* PX Bus Error Type */ | ||
| 167 | #define U2DMACSR_EORINTR (1 << 9) /* End Of Receive */ | ||
| 168 | #define U2DMACSR_REQPEND (1 << 8) /* Request Pending */ | ||
| 169 | #define U2DMACSR_RASINTR (1 << 4) /* Request After Channel Stopped (read / write 1 clear) */#define U2DMACSR_STOPINTR (1 << 3) /* Stop Interrupt (read only) */ | ||
| 170 | #define U2DMACSR_ENDINTR (1 << 2) /* End Interrupt (read / write 1 clear) */ | ||
| 171 | #define U2DMACSR_STARTINTR (1 << 1) /* Start Interrupt (read / write 1 clear) */ | ||
| 172 | #define U2DMACSR_BUSERRINTR (1 << 0) /* Bus Error Interrupt (read / write 1 clear) */ | ||
| 173 | |||
| 174 | #define U2DMACR (0x1080) /* U2DMA Control Register */ | ||
| 175 | #define U2DMAINT (0x10F0) /* U2DMA Interrupt Register */ | ||
| 176 | |||
| 177 | #define U2DMABR0 (0x1100) /* U2DMA Branch Register - Channel 0 */ | ||
| 178 | #define U2DMABR(x) (0x1100 + (x) << 2) /* U2DMA Branch Register - Channel x */ | ||
| 179 | |||
| 180 | #define U2DMADADR0 (0x1200) /* U2DMA Descriptor Address Register - Channel 0 */ | ||
| 181 | #define U2DMADADR(x) (0x1200 + (x) * 0x10) /* U2DMA Descriptor Address Register - Channel x */ | ||
| 182 | |||
| 183 | #define U2DMADADR_STOP (1U << 0) | ||
| 184 | |||
| 185 | #define U2DMASADR0 (0x1204) /* U2DMA Source Address Register - Channel 0 */ | ||
| 186 | #define U2DMASADR(x) (0x1204 + (x) * 0x10) /* U2DMA Source Address Register - Channel x */ | ||
| 187 | #define U2DMATADR0 (0x1208) /* U2DMA Target Address Register - Channel 0 */ | ||
| 188 | #define U2DMATADR(x) (0x1208 + (x) * 0x10) /* U2DMA Target Address Register - Channel x */ | ||
| 189 | |||
| 190 | #define U2DMACMDR0 (0x120C) /* U2DMA Command Address Register - Channel 0 */ | ||
| 191 | #define U2DMACMDR(x) (0x120C + (x) * 0x10) /* U2DMA Command Address Register - Channel x */ | ||
| 192 | |||
| 193 | #define U2DMACMDR_XFRDIS (1 << 31) /* Transfer Direction */ | ||
| 194 | #define U2DMACMDR_STARTIRQEN (1 << 22) /* Start Interrupt Enable */ | ||
| 195 | #define U2DMACMDR_ENDIRQEN (1 << 21) /* End Interrupt Enable */ | ||
| 196 | #define U2DMACMDR_PACKCOMP (1 << 13) /* Packet Complete */ | ||
| 197 | #define U2DMACMDR_LEN (0x07ff) /* length mask (max = 2K - 1) */ | ||
| 198 | |||
| 199 | #endif /* __ASM_ARCH_PXA3xx_U2D_H */ | ||
diff --git a/arch/arm/mach-pxa/include/mach/treo680.h b/arch/arm/mach-pxa/include/mach/treo680.h deleted file mode 100644 index af443b24d99..00000000000 --- a/arch/arm/mach-pxa/include/mach/treo680.h +++ /dev/null | |||
| @@ -1,49 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * GPIOs and interrupts for Palm Treo 680 smartphone | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License version 2 as | ||
| 6 | * published by the Free Software Foundation. | ||
| 7 | * | ||
| 8 | */ | ||
| 9 | |||
| 10 | #ifndef _INCLUDE_TREO680_H_ | ||
| 11 | #define _INCLUDE_TREO680_H_ | ||
| 12 | |||
| 13 | /* GPIOs */ | ||
| 14 | #define GPIO_NR_TREO680_POWER_DETECT 0 | ||
| 15 | #define GPIO_NR_TREO680_AMP_EN 27 | ||
| 16 | #define GPIO_NR_TREO680_KEYB_BL 24 | ||
| 17 | #define GPIO_NR_TREO680_VIBRATE_EN 44 | ||
| 18 | #define GPIO_NR_TREO680_GREEN_LED 20 | ||
| 19 | #define GPIO_NR_TREO680_RED_LED 79 | ||
| 20 | #define GPIO_NR_TREO680_SD_DETECT_N 113 | ||
| 21 | #define GPIO_NR_TREO680_SD_READONLY 33 | ||
| 22 | #define GPIO_NR_TREO680_EP_DETECT_N 116 | ||
| 23 | #define GPIO_NR_TREO680_SD_POWER 42 | ||
| 24 | #define GPIO_NR_TREO680_USB_DETECT 1 | ||
| 25 | #define GPIO_NR_TREO680_USB_PULLUP 114 | ||
| 26 | #define GPIO_NR_TREO680_GSM_POWER 40 | ||
| 27 | #define GPIO_NR_TREO680_GSM_RESET 87 | ||
| 28 | #define GPIO_NR_TREO680_GSM_WAKE 57 | ||
| 29 | #define GPIO_NR_TREO680_GSM_HOST_WAKE 14 | ||
| 30 | #define GPIO_NR_TREO680_GSM_TRIGGER 10 | ||
| 31 | #define GPIO_NR_TREO680_BT_EN 43 | ||
| 32 | #define GPIO_NR_TREO680_IR_EN 115 | ||
| 33 | #define GPIO_NR_TREO680_IR_TXD 47 | ||
| 34 | #define GPIO_NR_TREO680_BL_POWER 38 | ||
| 35 | #define GPIO_NR_TREO680_LCD_POWER 25 | ||
| 36 | |||
| 37 | /* Various addresses */ | ||
| 38 | #define TREO680_PHYS_RAM_START 0xa0000000 | ||
| 39 | #define TREO680_PHYS_IO_START 0x40000000 | ||
| 40 | #define TREO680_STR_BASE 0xa2000000 | ||
| 41 | |||
| 42 | /* BACKLIGHT */ | ||
| 43 | #define TREO680_MAX_INTENSITY 254 | ||
| 44 | #define TREO680_DEFAULT_INTENSITY 160 | ||
| 45 | #define TREO680_LIMIT_MASK 0x7F | ||
| 46 | #define TREO680_PRESCALER 63 | ||
| 47 | #define TREO680_PERIOD_NS 3500 | ||
| 48 | |||
| 49 | #endif | ||
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c index 13848955d13..f28c1715b91 100644 --- a/arch/arm/mach-pxa/littleton.c +++ b/arch/arm/mach-pxa/littleton.c | |||
| @@ -44,10 +44,10 @@ | |||
| 44 | #include <mach/ssp.h> | 44 | #include <mach/ssp.h> |
| 45 | #include <mach/mmc.h> | 45 | #include <mach/mmc.h> |
| 46 | #include <mach/pxa2xx_spi.h> | 46 | #include <mach/pxa2xx_spi.h> |
| 47 | #include <plat/i2c.h> | ||
| 48 | #include <mach/pxa27x_keypad.h> | 47 | #include <mach/pxa27x_keypad.h> |
| 49 | #include <mach/pxa3xx_nand.h> | ||
| 50 | #include <mach/littleton.h> | 48 | #include <mach/littleton.h> |
| 49 | #include <plat/i2c.h> | ||
| 50 | #include <plat/pxa3xx_nand.h> | ||
| 51 | 51 | ||
| 52 | #include "generic.h" | 52 | #include "generic.h" |
| 53 | 53 | ||
| @@ -413,6 +413,10 @@ static void __init littleton_init(void) | |||
| 413 | /* initialize MFP configurations */ | 413 | /* initialize MFP configurations */ |
| 414 | pxa3xx_mfp_config(ARRAY_AND_SIZE(littleton_mfp_cfg)); | 414 | pxa3xx_mfp_config(ARRAY_AND_SIZE(littleton_mfp_cfg)); |
| 415 | 415 | ||
| 416 | pxa_set_ffuart_info(NULL); | ||
| 417 | pxa_set_btuart_info(NULL); | ||
| 418 | pxa_set_stuart_info(NULL); | ||
| 419 | |||
| 416 | /* | 420 | /* |
| 417 | * Note: we depend bootloader set the correct | 421 | * Note: we depend bootloader set the correct |
| 418 | * value to MSC register for SMC91x. | 422 | * value to MSC register for SMC91x. |
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c index d64395f26a3..1373c22dbb8 100644 --- a/arch/arm/mach-pxa/lpd270.c +++ b/arch/arm/mach-pxa/lpd270.c | |||
| @@ -455,6 +455,10 @@ static void __init lpd270_init(void) | |||
| 455 | { | 455 | { |
| 456 | pxa2xx_mfp_config(ARRAY_AND_SIZE(lpd270_pin_config)); | 456 | pxa2xx_mfp_config(ARRAY_AND_SIZE(lpd270_pin_config)); |
| 457 | 457 | ||
| 458 | pxa_set_ffuart_info(NULL); | ||
| 459 | pxa_set_btuart_info(NULL); | ||
| 460 | pxa_set_stuart_info(NULL); | ||
| 461 | |||
| 458 | lpd270_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4; | 462 | lpd270_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4; |
| 459 | lpd270_flash_data[1].width = 4; | 463 | lpd270_flash_data[1].width = 4; |
| 460 | 464 | ||
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c index c6a94d3fdd6..98ee7e59029 100644 --- a/arch/arm/mach-pxa/lubbock.c +++ b/arch/arm/mach-pxa/lubbock.c | |||
| @@ -518,6 +518,10 @@ static void __init lubbock_init(void) | |||
| 518 | 518 | ||
| 519 | pxa2xx_mfp_config(ARRAY_AND_SIZE(lubbock_pin_config)); | 519 | pxa2xx_mfp_config(ARRAY_AND_SIZE(lubbock_pin_config)); |
| 520 | 520 | ||
| 521 | pxa_set_ffuart_info(NULL); | ||
| 522 | pxa_set_btuart_info(NULL); | ||
| 523 | pxa_set_stuart_info(NULL); | ||
| 524 | |||
| 521 | clk_add_alias("SA1111_CLK", NULL, "GPIO11_CLK", NULL); | 525 | clk_add_alias("SA1111_CLK", NULL, "GPIO11_CLK", NULL); |
| 522 | pxa_set_udc_info(&udc_info); | 526 | pxa_set_udc_info(&udc_info); |
| 523 | set_pxa_fb_info(&sharp_lm8v31); | 527 | set_pxa_fb_info(&sharp_lm8v31); |
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c index 5360c07f513..8a38d604dc7 100644 --- a/arch/arm/mach-pxa/magician.c +++ b/arch/arm/mach-pxa/magician.c | |||
| @@ -742,6 +742,10 @@ static void __init magician_init(void) | |||
| 742 | 742 | ||
| 743 | pxa2xx_mfp_config(ARRAY_AND_SIZE(magician_pin_config)); | 743 | pxa2xx_mfp_config(ARRAY_AND_SIZE(magician_pin_config)); |
| 744 | 744 | ||
| 745 | pxa_set_ffuart_info(NULL); | ||
| 746 | pxa_set_btuart_info(NULL); | ||
| 747 | pxa_set_stuart_info(NULL); | ||
| 748 | |||
| 745 | platform_add_devices(ARRAY_AND_SIZE(devices)); | 749 | platform_add_devices(ARRAY_AND_SIZE(devices)); |
| 746 | 750 | ||
| 747 | err = gpio_request(GPIO83_MAGICIAN_nIR_EN, "nIR_EN"); | 751 | err = gpio_request(GPIO83_MAGICIAN_nIR_EN, "nIR_EN"); |
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c index a4eeae345e6..851ee0fc32e 100644 --- a/arch/arm/mach-pxa/mainstone.c +++ b/arch/arm/mach-pxa/mainstone.c | |||
| @@ -576,6 +576,10 @@ static void __init mainstone_init(void) | |||
| 576 | 576 | ||
| 577 | pxa2xx_mfp_config(ARRAY_AND_SIZE(mainstone_pin_config)); | 577 | pxa2xx_mfp_config(ARRAY_AND_SIZE(mainstone_pin_config)); |
| 578 | 578 | ||
| 579 | pxa_set_ffuart_info(NULL); | ||
| 580 | pxa_set_btuart_info(NULL); | ||
| 581 | pxa_set_stuart_info(NULL); | ||
| 582 | |||
| 579 | mst_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4; | 583 | mst_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4; |
| 580 | mst_flash_data[1].width = 4; | 584 | mst_flash_data[1].width = 4; |
| 581 | 585 | ||
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c index 3cab452e556..2466a44d8fd 100644 --- a/arch/arm/mach-pxa/mioa701.c +++ b/arch/arm/mach-pxa/mioa701.c | |||
| @@ -798,6 +798,9 @@ static void __init mioa701_machine_init(void) | |||
| 798 | UP2OCR = UP2OCR_HXOE; | 798 | UP2OCR = UP2OCR_HXOE; |
| 799 | 799 | ||
| 800 | pxa2xx_mfp_config(ARRAY_AND_SIZE(mioa701_pin_config)); | 800 | pxa2xx_mfp_config(ARRAY_AND_SIZE(mioa701_pin_config)); |
| 801 | pxa_set_ffuart_info(NULL); | ||
| 802 | pxa_set_btuart_info(NULL); | ||
| 803 | pxa_set_stuart_info(NULL); | ||
| 801 | mio_gpio_request(ARRAY_AND_SIZE(global_gpios)); | 804 | mio_gpio_request(ARRAY_AND_SIZE(global_gpios)); |
| 802 | bootstrap_init(); | 805 | bootstrap_init(); |
| 803 | set_pxa_fb_info(&mioa701_pxafb_info); | 806 | set_pxa_fb_info(&mioa701_pxafb_info); |
diff --git a/arch/arm/mach-pxa/mp900.c b/arch/arm/mach-pxa/mp900.c index a65713ce019..6d4503927a7 100644 --- a/arch/arm/mach-pxa/mp900.c +++ b/arch/arm/mach-pxa/mp900.c | |||
| @@ -84,6 +84,9 @@ static struct platform_device *devices[] __initdata = { | |||
| 84 | static void __init mp900c_init(void) | 84 | static void __init mp900c_init(void) |
| 85 | { | 85 | { |
| 86 | printk(KERN_INFO "MobilePro 900/C machine init\n"); | 86 | printk(KERN_INFO "MobilePro 900/C machine init\n"); |
| 87 | pxa_set_ffuart_info(NULL); | ||
| 88 | pxa_set_btuart_info(NULL); | ||
| 89 | pxa_set_stuart_info(NULL); | ||
| 87 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 90 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
| 88 | } | 91 | } |
| 89 | 92 | ||
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c index 1ad029dd443..59140217890 100644 --- a/arch/arm/mach-pxa/palmld.c +++ b/arch/arm/mach-pxa/palmld.c | |||
| @@ -530,6 +530,10 @@ static void __init palmld_init(void) | |||
| 530 | { | 530 | { |
| 531 | pxa2xx_mfp_config(ARRAY_AND_SIZE(palmld_pin_config)); | 531 | pxa2xx_mfp_config(ARRAY_AND_SIZE(palmld_pin_config)); |
| 532 | 532 | ||
| 533 | pxa_set_ffuart_info(NULL); | ||
| 534 | pxa_set_btuart_info(NULL); | ||
| 535 | pxa_set_stuart_info(NULL); | ||
| 536 | |||
| 533 | palmld_pm_init(); | 537 | palmld_pm_init(); |
| 534 | set_pxa_fb_info(&palmld_lcd_screen); | 538 | set_pxa_fb_info(&palmld_lcd_screen); |
| 535 | pxa_set_mci_info(&palmld_mci_platform_data); | 539 | pxa_set_mci_info(&palmld_mci_platform_data); |
diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c index 2dd7ce28556..7f89ca20f13 100644 --- a/arch/arm/mach-pxa/palmt5.c +++ b/arch/arm/mach-pxa/palmt5.c | |||
| @@ -419,6 +419,10 @@ static void __init palmt5_init(void) | |||
| 419 | { | 419 | { |
| 420 | pxa2xx_mfp_config(ARRAY_AND_SIZE(palmt5_pin_config)); | 420 | pxa2xx_mfp_config(ARRAY_AND_SIZE(palmt5_pin_config)); |
| 421 | 421 | ||
| 422 | pxa_set_ffuart_info(NULL); | ||
| 423 | pxa_set_btuart_info(NULL); | ||
| 424 | pxa_set_stuart_info(NULL); | ||
| 425 | |||
| 422 | palmt5_pm_init(); | 426 | palmt5_pm_init(); |
| 423 | set_pxa_fb_info(&palmt5_lcd_screen); | 427 | set_pxa_fb_info(&palmt5_lcd_screen); |
| 424 | pxa_set_mci_info(&palmt5_mci_platform_data); | 428 | pxa_set_mci_info(&palmt5_mci_platform_data); |
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c index 0b92291a58f..30841759200 100644 --- a/arch/arm/mach-pxa/palmtc.c +++ b/arch/arm/mach-pxa/palmtc.c | |||
| @@ -416,6 +416,11 @@ static void __init palmtc_init(void) | |||
| 416 | { | 416 | { |
| 417 | pxa2xx_mfp_config(ARRAY_AND_SIZE(palmtc_pin_config)); | 417 | pxa2xx_mfp_config(ARRAY_AND_SIZE(palmtc_pin_config)); |
| 418 | 418 | ||
| 419 | pxa_set_ffuart_info(NULL); | ||
| 420 | pxa_set_btuart_info(NULL); | ||
| 421 | pxa_set_stuart_info(NULL); | ||
| 422 | pxa_set_hwuart_info(NULL); | ||
| 423 | |||
| 419 | set_pxa_fb_info(&palmtc_lcd_screen); | 424 | set_pxa_fb_info(&palmtc_lcd_screen); |
| 420 | pxa_set_mci_info(&palmtc_mci_platform_data); | 425 | pxa_set_mci_info(&palmtc_mci_platform_data); |
| 421 | pxa_set_udc_info(&palmtc_udc_info); | 426 | pxa_set_udc_info(&palmtc_udc_info); |
diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c index 277c4062e3c..265d62bae7d 100644 --- a/arch/arm/mach-pxa/palmte2.c +++ b/arch/arm/mach-pxa/palmte2.c | |||
| @@ -373,6 +373,10 @@ static void __init palmte2_init(void) | |||
| 373 | { | 373 | { |
| 374 | pxa2xx_mfp_config(ARRAY_AND_SIZE(palmte2_pin_config)); | 374 | pxa2xx_mfp_config(ARRAY_AND_SIZE(palmte2_pin_config)); |
| 375 | 375 | ||
| 376 | pxa_set_ffuart_info(NULL); | ||
| 377 | pxa_set_btuart_info(NULL); | ||
| 378 | pxa_set_stuart_info(NULL); | ||
| 379 | |||
| 376 | set_pxa_fb_info(&palmte2_lcd_screen); | 380 | set_pxa_fb_info(&palmte2_lcd_screen); |
| 377 | pxa_set_mci_info(&palmte2_mci_platform_data); | 381 | pxa_set_mci_info(&palmte2_mci_platform_data); |
| 378 | palmte2_udc_init(); | 382 | palmte2_udc_init(); |
diff --git a/arch/arm/mach-pxa/treo680.c b/arch/arm/mach-pxa/palmtreo.c index fe085076fbf..606eb7e8a17 100644 --- a/arch/arm/mach-pxa/treo680.c +++ b/arch/arm/mach-pxa/palmtreo.c | |||
| @@ -1,5 +1,9 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Hardware definitions for Palm Treo 680 | 2 | * Hardware definitions for Palm Treo smartphones |
| 3 | * | ||
| 4 | * currently supported: | ||
| 5 | * Palm Treo 680 (GSM) | ||
| 6 | * Palm Centro 685 (GSM) | ||
| 3 | * | 7 | * |
| 4 | * Author: Tomas Cech <sleep_walker@suse.cz> | 8 | * Author: Tomas Cech <sleep_walker@suse.cz> |
| 5 | * | 9 | * |
| @@ -31,7 +35,7 @@ | |||
| 31 | #include <mach/pxa27x.h> | 35 | #include <mach/pxa27x.h> |
| 32 | #include <mach/pxa27x-udc.h> | 36 | #include <mach/pxa27x-udc.h> |
| 33 | #include <mach/audio.h> | 37 | #include <mach/audio.h> |
| 34 | #include <mach/treo680.h> | 38 | #include <mach/palmtreo.h> |
| 35 | #include <mach/mmc.h> | 39 | #include <mach/mmc.h> |
| 36 | #include <mach/pxafb.h> | 40 | #include <mach/pxafb.h> |
| 37 | #include <mach/irda.h> | 41 | #include <mach/irda.h> |
| @@ -50,7 +54,7 @@ | |||
| 50 | /****************************************************************************** | 54 | /****************************************************************************** |
| 51 | * Pin configuration | 55 | * Pin configuration |
| 52 | ******************************************************************************/ | 56 | ******************************************************************************/ |
| 53 | static unsigned long treo680_pin_config[] __initdata = { | 57 | static unsigned long treo_pin_config[] __initdata = { |
| 54 | /* MMC */ | 58 | /* MMC */ |
| 55 | GPIO32_MMC_CLK, | 59 | GPIO32_MMC_CLK, |
| 56 | GPIO92_MMC_DAT_0, | 60 | GPIO92_MMC_DAT_0, |
| @@ -58,7 +62,6 @@ static unsigned long treo680_pin_config[] __initdata = { | |||
| 58 | GPIO110_MMC_DAT_2, | 62 | GPIO110_MMC_DAT_2, |
| 59 | GPIO111_MMC_DAT_3, | 63 | GPIO111_MMC_DAT_3, |
| 60 | GPIO112_MMC_CMD, | 64 | GPIO112_MMC_CMD, |
| 61 | GPIO33_GPIO, /* SD read only */ | ||
| 62 | GPIO113_GPIO, /* SD detect */ | 65 | GPIO113_GPIO, /* SD detect */ |
| 63 | 66 | ||
| 64 | /* AC97 */ | 67 | /* AC97 */ |
| @@ -80,12 +83,10 @@ static unsigned long treo680_pin_config[] __initdata = { | |||
| 80 | GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH, /* usb detect */ | 83 | GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH, /* usb detect */ |
| 81 | 84 | ||
| 82 | /* MATRIX KEYPAD */ | 85 | /* MATRIX KEYPAD */ |
| 83 | GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH, | ||
| 84 | GPIO101_KP_MKIN_1, | 86 | GPIO101_KP_MKIN_1, |
| 85 | GPIO102_KP_MKIN_2, | 87 | GPIO102_KP_MKIN_2, |
| 86 | GPIO97_KP_MKIN_3, | 88 | GPIO97_KP_MKIN_3, |
| 87 | GPIO98_KP_MKIN_4, | 89 | GPIO98_KP_MKIN_4, |
| 88 | GPIO99_KP_MKIN_5, | ||
| 89 | GPIO91_KP_MKIN_6, | 90 | GPIO91_KP_MKIN_6, |
| 90 | GPIO13_KP_MKIN_7, | 91 | GPIO13_KP_MKIN_7, |
| 91 | GPIO103_KP_MKOUT_0 | MFP_LPM_DRIVE_HIGH, | 92 | GPIO103_KP_MKOUT_0 | MFP_LPM_DRIVE_HIGH, |
| @@ -150,19 +151,57 @@ static unsigned long treo680_pin_config[] __initdata = { | |||
| 150 | GPIO11_GPIO | WAKEUP_ON_EDGE_BOTH, /* bluetooth host wake up */ | 151 | GPIO11_GPIO | WAKEUP_ON_EDGE_BOTH, /* bluetooth host wake up */ |
| 151 | }; | 152 | }; |
| 152 | 153 | ||
| 154 | #ifdef CONFIG_MACH_TREO680 | ||
| 155 | static unsigned long treo680_pin_config[] __initdata = { | ||
| 156 | GPIO33_GPIO, /* SD read only */ | ||
| 157 | |||
| 158 | /* MATRIX KEYPAD - different wake up source */ | ||
| 159 | GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH, | ||
| 160 | GPIO99_KP_MKIN_5, | ||
| 161 | }; | ||
| 162 | #endif /* CONFIG_MACH_TREO680 */ | ||
| 163 | |||
| 164 | #ifdef CONFIG_MACH_CENTRO | ||
| 165 | static unsigned long centro685_pin_config[] __initdata = { | ||
| 166 | /* Bluetooth attached to BT UART*/ | ||
| 167 | MFP_CFG_OUT(GPIO80, AF0, DRIVE_LOW), /* power: LOW = off */ | ||
| 168 | GPIO42_BTUART_RXD, | ||
| 169 | GPIO43_BTUART_TXD, | ||
| 170 | GPIO44_BTUART_CTS, | ||
| 171 | GPIO45_BTUART_RTS, | ||
| 172 | |||
| 173 | /* MATRIX KEYPAD - different wake up source */ | ||
| 174 | GPIO100_KP_MKIN_0, | ||
| 175 | GPIO99_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH, | ||
| 176 | }; | ||
| 177 | #endif /* CONFIG_MACH_CENTRO */ | ||
| 178 | |||
| 153 | /****************************************************************************** | 179 | /****************************************************************************** |
| 154 | * SD/MMC card controller | 180 | * SD/MMC card controller |
| 155 | ******************************************************************************/ | 181 | ******************************************************************************/ |
| 182 | #ifdef CONFIG_MACH_TREO680 | ||
| 156 | static struct pxamci_platform_data treo680_mci_platform_data = { | 183 | static struct pxamci_platform_data treo680_mci_platform_data = { |
| 157 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, | 184 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, |
| 158 | .gpio_card_detect = GPIO_NR_TREO680_SD_DETECT_N, | 185 | .gpio_card_detect = GPIO_NR_TREO_SD_DETECT_N, |
| 159 | .gpio_card_ro = GPIO_NR_TREO680_SD_READONLY, | 186 | .gpio_card_ro = GPIO_NR_TREO680_SD_READONLY, |
| 160 | .gpio_power = GPIO_NR_TREO680_SD_POWER, | 187 | .gpio_power = GPIO_NR_TREO680_SD_POWER, |
| 161 | }; | 188 | }; |
| 189 | #endif /* CONFIG_MACH_TREO680 */ | ||
| 190 | |||
| 191 | #ifdef CONFIG_MACH_CENTRO | ||
| 192 | static struct pxamci_platform_data centro_mci_platform_data = { | ||
| 193 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, | ||
| 194 | .gpio_card_detect = GPIO_NR_TREO_SD_DETECT_N, | ||
| 195 | .gpio_card_ro = -1, | ||
| 196 | .gpio_power = GPIO_NR_CENTRO_SD_POWER, | ||
| 197 | .gpio_power_invert = 1, | ||
| 198 | }; | ||
| 199 | #endif /* CONFIG_MACH_CENTRO */ | ||
| 162 | 200 | ||
| 163 | /****************************************************************************** | 201 | /****************************************************************************** |
| 164 | * GPIO keyboard | 202 | * GPIO keyboard |
| 165 | ******************************************************************************/ | 203 | ******************************************************************************/ |
| 204 | #ifdef CONFIG_MACH_TREO680 | ||
| 166 | static unsigned int treo680_matrix_keys[] = { | 205 | static unsigned int treo680_matrix_keys[] = { |
| 167 | KEY(0, 0, KEY_F8), /* Red/Off/Power */ | 206 | KEY(0, 0, KEY_F8), /* Red/Off/Power */ |
| 168 | KEY(0, 1, KEY_LEFT), | 207 | KEY(0, 1, KEY_LEFT), |
| @@ -232,92 +271,167 @@ static struct pxa27x_keypad_platform_data treo680_keypad_platform_data = { | |||
| 232 | 271 | ||
| 233 | .debounce_interval = 30, | 272 | .debounce_interval = 30, |
| 234 | }; | 273 | }; |
| 274 | #endif /* CONFIG_MACH_TREO680 */ | ||
| 275 | |||
| 276 | #ifdef CONFIG_MACH_CENTRO | ||
| 277 | static unsigned int centro_matrix_keys[] = { | ||
| 278 | KEY(0, 0, KEY_F9), /* Home */ | ||
| 279 | KEY(0, 1, KEY_LEFT), | ||
| 280 | KEY(0, 2, KEY_LEFTCTRL), /* Alternate */ | ||
| 281 | KEY(0, 3, KEY_L), | ||
| 282 | KEY(0, 4, KEY_A), | ||
| 283 | KEY(0, 5, KEY_Q), | ||
| 284 | KEY(0, 6, KEY_P), | ||
| 285 | |||
| 286 | KEY(1, 0, KEY_RIGHTCTRL), /* Menu */ | ||
| 287 | KEY(1, 1, KEY_RIGHT), | ||
| 288 | KEY(1, 2, KEY_LEFTSHIFT), /* Left shift */ | ||
| 289 | KEY(1, 3, KEY_Z), | ||
| 290 | KEY(1, 4, KEY_S), | ||
| 291 | KEY(1, 5, KEY_W), | ||
| 292 | |||
| 293 | KEY(2, 0, KEY_F1), /* Phone */ | ||
| 294 | KEY(2, 1, KEY_UP), | ||
| 295 | KEY(2, 2, KEY_0), | ||
| 296 | KEY(2, 3, KEY_X), | ||
| 297 | KEY(2, 4, KEY_D), | ||
| 298 | KEY(2, 5, KEY_E), | ||
| 299 | |||
| 300 | KEY(3, 0, KEY_F10), /* Calendar */ | ||
| 301 | KEY(3, 1, KEY_DOWN), | ||
| 302 | KEY(3, 2, KEY_SPACE), | ||
| 303 | KEY(3, 3, KEY_C), | ||
| 304 | KEY(3, 4, KEY_F), | ||
| 305 | KEY(3, 5, KEY_R), | ||
| 306 | |||
| 307 | KEY(4, 0, KEY_F12), /* Mail */ | ||
| 308 | KEY(4, 1, KEY_KPENTER), | ||
| 309 | KEY(4, 2, KEY_RIGHTALT), /* Alt */ | ||
| 310 | KEY(4, 3, KEY_V), | ||
| 311 | KEY(4, 4, KEY_G), | ||
| 312 | KEY(4, 5, KEY_T), | ||
| 313 | |||
| 314 | KEY(5, 0, KEY_F8), /* Red/Off/Power */ | ||
| 315 | KEY(5, 1, KEY_PAGEUP), /* Side up */ | ||
| 316 | KEY(5, 2, KEY_DOT), | ||
| 317 | KEY(5, 3, KEY_B), | ||
| 318 | KEY(5, 4, KEY_H), | ||
| 319 | KEY(5, 5, KEY_Y), | ||
| 320 | |||
| 321 | KEY(6, 0, KEY_TAB), /* Side Activate */ | ||
| 322 | KEY(6, 1, KEY_PAGEDOWN), /* Side down */ | ||
| 323 | KEY(6, 2, KEY_ENTER), | ||
| 324 | KEY(6, 3, KEY_N), | ||
| 325 | KEY(6, 4, KEY_J), | ||
| 326 | KEY(6, 5, KEY_U), | ||
| 327 | |||
| 328 | KEY(7, 0, KEY_F6), /* Green/Call */ | ||
| 329 | KEY(7, 1, KEY_O), | ||
| 330 | KEY(7, 2, KEY_BACKSPACE), | ||
| 331 | KEY(7, 3, KEY_M), | ||
| 332 | KEY(7, 4, KEY_K), | ||
| 333 | KEY(7, 5, KEY_I), | ||
| 334 | }; | ||
| 335 | |||
| 336 | static struct pxa27x_keypad_platform_data centro_keypad_platform_data = { | ||
| 337 | .matrix_key_rows = 8, | ||
| 338 | .matrix_key_cols = 7, | ||
| 339 | .matrix_key_map = centro_matrix_keys, | ||
| 340 | .matrix_key_map_size = ARRAY_SIZE(centro_matrix_keys), | ||
| 341 | .direct_key_map = { KEY_CONNECT }, | ||
| 342 | .direct_key_num = 1, | ||
| 343 | |||
| 344 | .debounce_interval = 30, | ||
| 345 | }; | ||
| 346 | #endif /* CONFIG_MACH_CENTRO */ | ||
| 235 | 347 | ||
| 236 | /****************************************************************************** | 348 | /****************************************************************************** |
| 237 | * aSoC audio | 349 | * aSoC audio |
| 238 | ******************************************************************************/ | 350 | ******************************************************************************/ |
| 239 | 351 | ||
| 240 | static pxa2xx_audio_ops_t treo680_ac97_pdata = { | 352 | static pxa2xx_audio_ops_t treo_ac97_pdata = { |
| 241 | .reset_gpio = 95, | 353 | .reset_gpio = 95, |
| 242 | }; | 354 | }; |
| 243 | 355 | ||
| 244 | /****************************************************************************** | 356 | /****************************************************************************** |
| 245 | * Backlight | 357 | * Backlight |
| 246 | ******************************************************************************/ | 358 | ******************************************************************************/ |
| 247 | static int treo680_backlight_init(struct device *dev) | 359 | static int treo_backlight_init(struct device *dev) |
| 248 | { | 360 | { |
| 249 | int ret; | 361 | int ret; |
| 250 | 362 | ||
| 251 | ret = gpio_request(GPIO_NR_TREO680_BL_POWER, "BL POWER"); | 363 | ret = gpio_request(GPIO_NR_TREO_BL_POWER, "BL POWER"); |
| 252 | if (ret) | 364 | if (ret) |
| 253 | goto err; | 365 | goto err; |
| 254 | ret = gpio_direction_output(GPIO_NR_TREO680_BL_POWER, 0); | 366 | ret = gpio_direction_output(GPIO_NR_TREO_BL_POWER, 0); |
| 255 | if (ret) | 367 | if (ret) |
| 256 | goto err2; | 368 | goto err2; |
| 257 | 369 | ||
| 258 | return 0; | 370 | return 0; |
| 259 | 371 | ||
| 260 | err2: | 372 | err2: |
| 261 | gpio_free(GPIO_NR_TREO680_BL_POWER); | 373 | gpio_free(GPIO_NR_TREO_BL_POWER); |
| 262 | err: | 374 | err: |
| 263 | return ret; | 375 | return ret; |
| 264 | } | 376 | } |
| 265 | 377 | ||
| 266 | static int treo680_backlight_notify(int brightness) | 378 | static int treo_backlight_notify(int brightness) |
| 267 | { | 379 | { |
| 268 | gpio_set_value(GPIO_NR_TREO680_BL_POWER, brightness); | 380 | gpio_set_value(GPIO_NR_TREO_BL_POWER, brightness); |
| 269 | return TREO680_MAX_INTENSITY - brightness; | 381 | return TREO_MAX_INTENSITY - brightness; |
| 270 | }; | 382 | }; |
| 271 | 383 | ||
| 272 | static void treo680_backlight_exit(struct device *dev) | 384 | static void treo_backlight_exit(struct device *dev) |
| 273 | { | 385 | { |
| 274 | gpio_free(GPIO_NR_TREO680_BL_POWER); | 386 | gpio_free(GPIO_NR_TREO_BL_POWER); |
| 275 | } | 387 | } |
| 276 | 388 | ||
| 277 | static struct platform_pwm_backlight_data treo680_backlight_data = { | 389 | static struct platform_pwm_backlight_data treo_backlight_data = { |
| 278 | .pwm_id = 0, | 390 | .pwm_id = 0, |
| 279 | .max_brightness = TREO680_MAX_INTENSITY, | 391 | .max_brightness = TREO_MAX_INTENSITY, |
| 280 | .dft_brightness = TREO680_DEFAULT_INTENSITY, | 392 | .dft_brightness = TREO_DEFAULT_INTENSITY, |
| 281 | .pwm_period_ns = TREO680_PERIOD_NS, | 393 | .pwm_period_ns = TREO_PERIOD_NS, |
| 282 | .init = treo680_backlight_init, | 394 | .init = treo_backlight_init, |
| 283 | .notify = treo680_backlight_notify, | 395 | .notify = treo_backlight_notify, |
| 284 | .exit = treo680_backlight_exit, | 396 | .exit = treo_backlight_exit, |
| 285 | }; | 397 | }; |
| 286 | 398 | ||
| 287 | static struct platform_device treo680_backlight = { | 399 | static struct platform_device treo_backlight = { |
| 288 | .name = "pwm-backlight", | 400 | .name = "pwm-backlight", |
| 289 | .dev = { | 401 | .dev = { |
| 290 | .parent = &pxa27x_device_pwm0.dev, | 402 | .parent = &pxa27x_device_pwm0.dev, |
| 291 | .platform_data = &treo680_backlight_data, | 403 | .platform_data = &treo_backlight_data, |
| 292 | }, | 404 | }, |
| 293 | }; | 405 | }; |
| 294 | 406 | ||
| 295 | /****************************************************************************** | 407 | /****************************************************************************** |
| 296 | * IrDA | 408 | * IrDA |
| 297 | ******************************************************************************/ | 409 | ******************************************************************************/ |
| 298 | static struct pxaficp_platform_data treo680_ficp_info = { | 410 | static struct pxaficp_platform_data treo_ficp_info = { |
| 299 | .gpio_pwdown = GPIO_NR_TREO680_IR_EN, | 411 | .gpio_pwdown = GPIO_NR_TREO_IR_EN, |
| 300 | .transceiver_cap = IR_SIRMODE | IR_OFF, | 412 | .transceiver_cap = IR_SIRMODE | IR_OFF, |
| 301 | }; | 413 | }; |
| 302 | 414 | ||
| 303 | /****************************************************************************** | 415 | /****************************************************************************** |
| 304 | * UDC | 416 | * UDC |
| 305 | ******************************************************************************/ | 417 | ******************************************************************************/ |
| 306 | static struct pxa2xx_udc_mach_info treo680_udc_info __initdata = { | 418 | static struct pxa2xx_udc_mach_info treo_udc_info __initdata = { |
| 307 | .gpio_vbus = GPIO_NR_TREO680_USB_DETECT, | 419 | .gpio_vbus = GPIO_NR_TREO_USB_DETECT, |
| 308 | .gpio_vbus_inverted = 1, | 420 | .gpio_vbus_inverted = 1, |
| 309 | .gpio_pullup = GPIO_NR_TREO680_USB_PULLUP, | 421 | .gpio_pullup = GPIO_NR_TREO_USB_PULLUP, |
| 310 | }; | 422 | }; |
| 311 | 423 | ||
| 312 | 424 | ||
| 313 | /****************************************************************************** | 425 | /****************************************************************************** |
| 314 | * USB host | 426 | * USB host |
| 315 | ******************************************************************************/ | 427 | ******************************************************************************/ |
| 428 | #ifdef CONFIG_MACH_TREO680 | ||
| 316 | static struct pxaohci_platform_data treo680_ohci_info = { | 429 | static struct pxaohci_platform_data treo680_ohci_info = { |
| 317 | .port_mode = PMM_PERPORT_MODE, | 430 | .port_mode = PMM_PERPORT_MODE, |
| 318 | .flags = ENABLE_PORT1 | ENABLE_PORT3, | 431 | .flags = ENABLE_PORT1 | ENABLE_PORT3, |
| 319 | .power_budget = 0, | 432 | .power_budget = 0, |
| 320 | }; | 433 | }; |
| 434 | #endif /* CONFIG_MACH_TREO680 */ | ||
| 321 | 435 | ||
| 322 | /****************************************************************************** | 436 | /****************************************************************************** |
| 323 | * Power supply | 437 | * Power supply |
| @@ -326,41 +440,41 @@ static int power_supply_init(struct device *dev) | |||
| 326 | { | 440 | { |
| 327 | int ret; | 441 | int ret; |
| 328 | 442 | ||
| 329 | ret = gpio_request(GPIO_NR_TREO680_POWER_DETECT, "CABLE_STATE_AC"); | 443 | ret = gpio_request(GPIO_NR_TREO_POWER_DETECT, "CABLE_STATE_AC"); |
| 330 | if (ret) | 444 | if (ret) |
| 331 | goto err1; | 445 | goto err1; |
| 332 | ret = gpio_direction_input(GPIO_NR_TREO680_POWER_DETECT); | 446 | ret = gpio_direction_input(GPIO_NR_TREO_POWER_DETECT); |
| 333 | if (ret) | 447 | if (ret) |
| 334 | goto err2; | 448 | goto err2; |
| 335 | 449 | ||
| 336 | return 0; | 450 | return 0; |
| 337 | 451 | ||
| 338 | err2: | 452 | err2: |
| 339 | gpio_free(GPIO_NR_TREO680_POWER_DETECT); | 453 | gpio_free(GPIO_NR_TREO_POWER_DETECT); |
| 340 | err1: | 454 | err1: |
| 341 | return ret; | 455 | return ret; |
| 342 | } | 456 | } |
| 343 | 457 | ||
| 344 | static int treo680_is_ac_online(void) | 458 | static int treo_is_ac_online(void) |
| 345 | { | 459 | { |
| 346 | return gpio_get_value(GPIO_NR_TREO680_POWER_DETECT); | 460 | return gpio_get_value(GPIO_NR_TREO_POWER_DETECT); |
| 347 | } | 461 | } |
| 348 | 462 | ||
| 349 | static void power_supply_exit(struct device *dev) | 463 | static void power_supply_exit(struct device *dev) |
| 350 | { | 464 | { |
| 351 | gpio_free(GPIO_NR_TREO680_POWER_DETECT); | 465 | gpio_free(GPIO_NR_TREO_POWER_DETECT); |
| 352 | } | 466 | } |
| 353 | 467 | ||
| 354 | static char *treo680_supplicants[] = { | 468 | static char *treo_supplicants[] = { |
| 355 | "main-battery", | 469 | "main-battery", |
| 356 | }; | 470 | }; |
| 357 | 471 | ||
| 358 | static struct pda_power_pdata power_supply_info = { | 472 | static struct pda_power_pdata power_supply_info = { |
| 359 | .init = power_supply_init, | 473 | .init = power_supply_init, |
| 360 | .is_ac_online = treo680_is_ac_online, | 474 | .is_ac_online = treo_is_ac_online, |
| 361 | .exit = power_supply_exit, | 475 | .exit = power_supply_exit, |
| 362 | .supplied_to = treo680_supplicants, | 476 | .supplied_to = treo_supplicants, |
| 363 | .num_supplicants = ARRAY_SIZE(treo680_supplicants), | 477 | .num_supplicants = ARRAY_SIZE(treo_supplicants), |
| 364 | }; | 478 | }; |
| 365 | 479 | ||
| 366 | static struct platform_device power_supply = { | 480 | static struct platform_device power_supply = { |
| @@ -374,7 +488,8 @@ static struct platform_device power_supply = { | |||
| 374 | /****************************************************************************** | 488 | /****************************************************************************** |
| 375 | * Vibra and LEDs | 489 | * Vibra and LEDs |
| 376 | ******************************************************************************/ | 490 | ******************************************************************************/ |
| 377 | static struct gpio_led gpio_leds[] = { | 491 | #ifdef CONFIG_MACH_TREO680 |
| 492 | static struct gpio_led treo680_gpio_leds[] = { | ||
| 378 | { | 493 | { |
| 379 | .name = "treo680:vibra:vibra", | 494 | .name = "treo680:vibra:vibra", |
| 380 | .default_trigger = "none", | 495 | .default_trigger = "none", |
| @@ -383,34 +498,68 @@ static struct gpio_led gpio_leds[] = { | |||
| 383 | { | 498 | { |
| 384 | .name = "treo680:green:led", | 499 | .name = "treo680:green:led", |
| 385 | .default_trigger = "mmc0", | 500 | .default_trigger = "mmc0", |
| 386 | .gpio = GPIO_NR_TREO680_GREEN_LED, | 501 | .gpio = GPIO_NR_TREO_GREEN_LED, |
| 387 | }, | 502 | }, |
| 388 | { | 503 | { |
| 389 | .name = "treo680:keybbl:keybbl", | 504 | .name = "treo680:white:keybbl", |
| 390 | .default_trigger = "none", | 505 | .default_trigger = "none", |
| 391 | .gpio = GPIO_NR_TREO680_KEYB_BL, | 506 | .gpio = GPIO_NR_TREO680_KEYB_BL, |
| 392 | }, | 507 | }, |
| 393 | }; | 508 | }; |
| 394 | 509 | ||
| 395 | static struct gpio_led_platform_data gpio_led_info = { | 510 | static struct gpio_led_platform_data treo680_gpio_led_info = { |
| 396 | .leds = gpio_leds, | 511 | .leds = treo680_gpio_leds, |
| 397 | .num_leds = ARRAY_SIZE(gpio_leds), | 512 | .num_leds = ARRAY_SIZE(treo680_gpio_leds), |
| 398 | }; | 513 | }; |
| 399 | 514 | ||
| 400 | static struct platform_device treo680_leds = { | 515 | static struct platform_device treo680_leds = { |
| 401 | .name = "leds-gpio", | 516 | .name = "leds-gpio", |
| 402 | .id = -1, | 517 | .id = -1, |
| 403 | .dev = { | 518 | .dev = { |
| 404 | .platform_data = &gpio_led_info, | 519 | .platform_data = &treo680_gpio_led_info, |
| 405 | } | 520 | } |
| 406 | }; | 521 | }; |
| 522 | #endif /* CONFIG_MACH_TREO680 */ | ||
| 407 | 523 | ||
| 524 | #ifdef CONFIG_MACH_CENTRO | ||
| 525 | static struct gpio_led centro_gpio_leds[] = { | ||
| 526 | { | ||
| 527 | .name = "centro:vibra:vibra", | ||
| 528 | .default_trigger = "none", | ||
| 529 | .gpio = GPIO_NR_CENTRO_VIBRATE_EN, | ||
| 530 | }, | ||
| 531 | { | ||
| 532 | .name = "centro:green:led", | ||
| 533 | .default_trigger = "mmc0", | ||
| 534 | .gpio = GPIO_NR_TREO_GREEN_LED, | ||
| 535 | }, | ||
| 536 | { | ||
| 537 | .name = "centro:white:keybbl", | ||
| 538 | .default_trigger = "none", | ||
| 539 | .active_low = 1, | ||
| 540 | .gpio = GPIO_NR_CENTRO_KEYB_BL, | ||
| 541 | }, | ||
| 542 | }; | ||
| 543 | |||
| 544 | static struct gpio_led_platform_data centro_gpio_led_info = { | ||
| 545 | .leds = centro_gpio_leds, | ||
| 546 | .num_leds = ARRAY_SIZE(centro_gpio_leds), | ||
| 547 | }; | ||
| 548 | |||
| 549 | static struct platform_device centro_leds = { | ||
| 550 | .name = "leds-gpio", | ||
| 551 | .id = -1, | ||
| 552 | .dev = { | ||
| 553 | .platform_data = ¢ro_gpio_led_info, | ||
| 554 | } | ||
| 555 | }; | ||
| 556 | #endif /* CONFIG_MACH_CENTRO */ | ||
| 408 | 557 | ||
| 409 | /****************************************************************************** | 558 | /****************************************************************************** |
| 410 | * Framebuffer | 559 | * Framebuffer |
| 411 | ******************************************************************************/ | 560 | ******************************************************************************/ |
| 412 | /* TODO: add support for 324x324 */ | 561 | /* TODO: add support for 324x324 */ |
| 413 | static struct pxafb_mode_info treo680_lcd_modes[] = { | 562 | static struct pxafb_mode_info treo_lcd_modes[] = { |
| 414 | { | 563 | { |
| 415 | .pixclock = 86538, | 564 | .pixclock = 86538, |
| 416 | .xres = 320, | 565 | .xres = 320, |
| @@ -427,21 +576,21 @@ static struct pxafb_mode_info treo680_lcd_modes[] = { | |||
| 427 | }, | 576 | }, |
| 428 | }; | 577 | }; |
| 429 | 578 | ||
| 430 | static void treo680_lcd_power(int on, struct fb_var_screeninfo *info) | 579 | static void treo_lcd_power(int on, struct fb_var_screeninfo *info) |
| 431 | { | 580 | { |
| 432 | gpio_set_value(GPIO_NR_TREO680_BL_POWER, on); | 581 | gpio_set_value(GPIO_NR_TREO_BL_POWER, on); |
| 433 | } | 582 | } |
| 434 | 583 | ||
| 435 | static struct pxafb_mach_info treo680_lcd_screen = { | 584 | static struct pxafb_mach_info treo_lcd_screen = { |
| 436 | .modes = treo680_lcd_modes, | 585 | .modes = treo_lcd_modes, |
| 437 | .num_modes = ARRAY_SIZE(treo680_lcd_modes), | 586 | .num_modes = ARRAY_SIZE(treo_lcd_modes), |
| 438 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, | 587 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, |
| 439 | }; | 588 | }; |
| 440 | 589 | ||
| 441 | /****************************************************************************** | 590 | /****************************************************************************** |
| 442 | * Power management - standby | 591 | * Power management - standby |
| 443 | ******************************************************************************/ | 592 | ******************************************************************************/ |
| 444 | static void __init treo680_pm_init(void) | 593 | static void __init treo_pm_init(void) |
| 445 | { | 594 | { |
| 446 | static u32 resume[] = { | 595 | static u32 resume[] = { |
| 447 | 0xe3a00101, /* mov r0, #0x40000000 */ | 596 | 0xe3a00101, /* mov r0, #0x40000000 */ |
| @@ -450,70 +599,118 @@ static void __init treo680_pm_init(void) | |||
| 450 | }; | 599 | }; |
| 451 | 600 | ||
| 452 | /* this is where the bootloader jumps */ | 601 | /* this is where the bootloader jumps */ |
| 453 | memcpy(phys_to_virt(TREO680_STR_BASE), resume, sizeof(resume)); | 602 | memcpy(phys_to_virt(TREO_STR_BASE), resume, sizeof(resume)); |
| 454 | } | 603 | } |
| 455 | 604 | ||
| 456 | /****************************************************************************** | 605 | /****************************************************************************** |
| 457 | * Machine init | 606 | * Machine init |
| 458 | ******************************************************************************/ | 607 | ******************************************************************************/ |
| 459 | static struct platform_device *devices[] __initdata = { | 608 | static struct platform_device *treo_devices[] __initdata = { |
| 460 | &treo680_backlight, | 609 | &treo_backlight, |
| 461 | &treo680_leds, | ||
| 462 | &power_supply, | 610 | &power_supply, |
| 463 | }; | 611 | }; |
| 464 | 612 | ||
| 613 | #ifdef CONFIG_MACH_TREO680 | ||
| 614 | static struct platform_device *treo680_devices[] __initdata = { | ||
| 615 | &treo680_leds, | ||
| 616 | }; | ||
| 617 | #endif /* CONFIG_MACH_TREO680 */ | ||
| 618 | |||
| 619 | #ifdef CONFIG_MACH_CENTRO | ||
| 620 | static struct platform_device *centro_devices[] __initdata = { | ||
| 621 | ¢ro_leds, | ||
| 622 | }; | ||
| 623 | #endif /* CONFIG_MACH_CENTRO */ | ||
| 624 | |||
| 465 | /* setup udc GPIOs initial state */ | 625 | /* setup udc GPIOs initial state */ |
| 466 | static void __init treo680_udc_init(void) | 626 | static void __init treo_udc_init(void) |
| 467 | { | 627 | { |
| 468 | if (!gpio_request(GPIO_NR_TREO680_USB_PULLUP, "UDC Vbus")) { | 628 | if (!gpio_request(GPIO_NR_TREO_USB_PULLUP, "UDC Vbus")) { |
| 469 | gpio_direction_output(GPIO_NR_TREO680_USB_PULLUP, 1); | 629 | gpio_direction_output(GPIO_NR_TREO_USB_PULLUP, 1); |
| 470 | gpio_free(GPIO_NR_TREO680_USB_PULLUP); | 630 | gpio_free(GPIO_NR_TREO_USB_PULLUP); |
| 471 | } | 631 | } |
| 472 | } | 632 | } |
| 473 | 633 | ||
| 474 | static void __init treo680_lcd_power_init(void) | 634 | static void __init treo_lcd_power_init(void) |
| 475 | { | 635 | { |
| 476 | int ret; | 636 | int ret; |
| 477 | 637 | ||
| 478 | ret = gpio_request(GPIO_NR_TREO680_LCD_POWER, "LCD POWER"); | 638 | ret = gpio_request(GPIO_NR_TREO_LCD_POWER, "LCD POWER"); |
| 479 | if (ret) { | 639 | if (ret) { |
| 480 | pr_err("Treo680: LCD power GPIO request failed!\n"); | 640 | pr_err("Treo680: LCD power GPIO request failed!\n"); |
| 481 | return; | 641 | return; |
| 482 | } | 642 | } |
| 483 | 643 | ||
| 484 | ret = gpio_direction_output(GPIO_NR_TREO680_LCD_POWER, 0); | 644 | ret = gpio_direction_output(GPIO_NR_TREO_LCD_POWER, 0); |
| 485 | if (ret) { | 645 | if (ret) { |
| 486 | pr_err("Treo680: setting LCD power GPIO direction failed!\n"); | 646 | pr_err("Treo680: setting LCD power GPIO direction failed!\n"); |
| 487 | gpio_free(GPIO_NR_TREO680_LCD_POWER); | 647 | gpio_free(GPIO_NR_TREO_LCD_POWER); |
| 488 | return; | 648 | return; |
| 489 | } | 649 | } |
| 490 | 650 | ||
| 491 | treo680_lcd_screen.pxafb_lcd_power = treo680_lcd_power; | 651 | treo_lcd_screen.pxafb_lcd_power = treo_lcd_power; |
| 492 | } | 652 | } |
| 493 | 653 | ||
| 654 | static void __init treo_init(void) | ||
| 655 | { | ||
| 656 | pxa_set_ffuart_info(NULL); | ||
| 657 | pxa_set_btuart_info(NULL); | ||
| 658 | pxa_set_stuart_info(NULL); | ||
| 659 | |||
| 660 | treo_pm_init(); | ||
| 661 | pxa2xx_mfp_config(ARRAY_AND_SIZE(treo_pin_config)); | ||
| 662 | treo_lcd_power_init(); | ||
| 663 | set_pxa_fb_info(&treo_lcd_screen); | ||
| 664 | treo_udc_init(); | ||
| 665 | pxa_set_udc_info(&treo_udc_info); | ||
| 666 | pxa_set_ac97_info(&treo_ac97_pdata); | ||
| 667 | pxa_set_ficp_info(&treo_ficp_info); | ||
| 668 | |||
| 669 | platform_add_devices(ARRAY_AND_SIZE(treo_devices)); | ||
| 670 | } | ||
| 671 | |||
| 672 | #ifdef CONFIG_MACH_TREO680 | ||
| 494 | static void __init treo680_init(void) | 673 | static void __init treo680_init(void) |
| 495 | { | 674 | { |
| 496 | treo680_pm_init(); | 675 | treo_init(); |
| 497 | pxa2xx_mfp_config(ARRAY_AND_SIZE(treo680_pin_config)); | 676 | pxa2xx_mfp_config(ARRAY_AND_SIZE(treo680_pin_config)); |
| 498 | pxa_set_keypad_info(&treo680_keypad_platform_data); | ||
| 499 | treo680_lcd_power_init(); | ||
| 500 | set_pxa_fb_info(&treo680_lcd_screen); | ||
| 501 | pxa_set_mci_info(&treo680_mci_platform_data); | 677 | pxa_set_mci_info(&treo680_mci_platform_data); |
| 502 | treo680_udc_init(); | 678 | pxa_set_keypad_info(&treo680_keypad_platform_data); |
| 503 | pxa_set_udc_info(&treo680_udc_info); | ||
| 504 | pxa_set_ac97_info(&treo680_ac97_pdata); | ||
| 505 | pxa_set_ficp_info(&treo680_ficp_info); | ||
| 506 | pxa_set_ohci_info(&treo680_ohci_info); | 679 | pxa_set_ohci_info(&treo680_ohci_info); |
| 507 | 680 | ||
| 508 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 681 | platform_add_devices(ARRAY_AND_SIZE(treo680_devices)); |
| 509 | } | 682 | } |
| 510 | 683 | ||
| 511 | MACHINE_START(TREO680, "Palm Treo 680") | 684 | MACHINE_START(TREO680, "Palm Treo 680") |
| 512 | .phys_io = TREO680_PHYS_IO_START, | 685 | .phys_io = TREO_PHYS_IO_START, |
| 513 | .io_pg_offst = io_p2v(0x40000000), | 686 | .io_pg_offst = io_p2v(0x40000000), |
| 514 | .boot_params = 0xa0000100, | 687 | .boot_params = 0xa0000100, |
| 515 | .map_io = pxa_map_io, | 688 | .map_io = pxa_map_io, |
| 516 | .init_irq = pxa27x_init_irq, | 689 | .init_irq = pxa27x_init_irq, |
| 517 | .timer = &pxa_timer, | 690 | .timer = &pxa_timer, |
| 518 | .init_machine = treo680_init, | 691 | .init_machine = treo680_init, |
| 692 | MACHINE_END | ||
| 693 | #endif /* CONFIG_MACH_TREO680 */ | ||
| 694 | |||
| 695 | #ifdef CONFIG_MACH_CENTRO | ||
| 696 | static void __init centro_init(void) | ||
| 697 | { | ||
| 698 | treo_init(); | ||
| 699 | pxa2xx_mfp_config(ARRAY_AND_SIZE(centro685_pin_config)); | ||
| 700 | pxa_set_mci_info(¢ro_mci_platform_data); | ||
| 701 | |||
| 702 | pxa_set_keypad_info(¢ro_keypad_platform_data); | ||
| 703 | |||
| 704 | platform_add_devices(ARRAY_AND_SIZE(centro_devices)); | ||
| 705 | } | ||
| 706 | |||
| 707 | MACHINE_START(CENTRO, "Palm Centro 685") | ||
| 708 | .phys_io = TREO_PHYS_IO_START, | ||
| 709 | .io_pg_offst = io_p2v(0x40000000), | ||
| 710 | .boot_params = 0xa0000100, | ||
| 711 | .map_io = pxa_map_io, | ||
| 712 | .init_irq = pxa27x_init_irq, | ||
| 713 | .timer = &pxa_timer, | ||
| 714 | .init_machine = centro_init, | ||
| 519 | MACHINE_END | 715 | MACHINE_END |
| 716 | #endif /* CONFIG_MACH_CENTRO */ | ||
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c index 76a2b37eaf3..7bf18c2f002 100644 --- a/arch/arm/mach-pxa/palmtx.c +++ b/arch/arm/mach-pxa/palmtx.c | |||
| @@ -570,6 +570,10 @@ static void __init palmtx_init(void) | |||
| 570 | { | 570 | { |
| 571 | pxa2xx_mfp_config(ARRAY_AND_SIZE(palmtx_pin_config)); | 571 | pxa2xx_mfp_config(ARRAY_AND_SIZE(palmtx_pin_config)); |
| 572 | 572 | ||
| 573 | pxa_set_ffuart_info(NULL); | ||
| 574 | pxa_set_btuart_info(NULL); | ||
| 575 | pxa_set_stuart_info(NULL); | ||
| 576 | |||
| 573 | palmtx_pm_init(); | 577 | palmtx_pm_init(); |
| 574 | set_pxa_fb_info(&palmtx_lcd_screen); | 578 | set_pxa_fb_info(&palmtx_lcd_screen); |
| 575 | pxa_set_mci_info(&palmtx_mci_platform_data); | 579 | pxa_set_mci_info(&palmtx_mci_platform_data); |
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c index c2bf493c5f5..d787ac7cfdd 100644 --- a/arch/arm/mach-pxa/palmz72.c +++ b/arch/arm/mach-pxa/palmz72.c | |||
| @@ -491,6 +491,10 @@ static void __init palmz72_init(void) | |||
| 491 | { | 491 | { |
| 492 | pxa2xx_mfp_config(ARRAY_AND_SIZE(palmz72_pin_config)); | 492 | pxa2xx_mfp_config(ARRAY_AND_SIZE(palmz72_pin_config)); |
| 493 | 493 | ||
| 494 | pxa_set_ffuart_info(NULL); | ||
| 495 | pxa_set_btuart_info(NULL); | ||
| 496 | pxa_set_stuart_info(NULL); | ||
| 497 | |||
| 494 | set_pxa_fb_info(&palmz72_lcd_screen); | 498 | set_pxa_fb_info(&palmz72_lcd_screen); |
| 495 | pxa_set_mci_info(&palmz72_mci_platform_data); | 499 | pxa_set_mci_info(&palmz72_mci_platform_data); |
| 496 | palmz72_udc_init(); | 500 | palmz72_udc_init(); |
diff --git a/arch/arm/mach-pxa/pcm027.c b/arch/arm/mach-pxa/pcm027.c index 6abfa2979c6..2190af06647 100644 --- a/arch/arm/mach-pxa/pcm027.c +++ b/arch/arm/mach-pxa/pcm027.c | |||
| @@ -227,6 +227,10 @@ static void __init pcm027_init(void) | |||
| 227 | 227 | ||
| 228 | pxa2xx_mfp_config(pcm027_pin_config, ARRAY_SIZE(pcm027_pin_config)); | 228 | pxa2xx_mfp_config(pcm027_pin_config, ARRAY_SIZE(pcm027_pin_config)); |
| 229 | 229 | ||
| 230 | pxa_set_ffuart_info(NULL); | ||
| 231 | pxa_set_btuart_info(NULL); | ||
| 232 | pxa_set_stuart_info(NULL); | ||
| 233 | |||
| 230 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 234 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
| 231 | 235 | ||
| 232 | /* at last call the baseboard to initialize itself */ | 236 | /* at last call the baseboard to initialize itself */ |
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c index bbda57078e0..d5255ae74fe 100644 --- a/arch/arm/mach-pxa/pcm990-baseboard.c +++ b/arch/arm/mach-pxa/pcm990-baseboard.c | |||
| @@ -359,19 +359,12 @@ static unsigned long pcm990_camera_pin_config[] = { | |||
| 359 | GPIO44_CIF_LV, | 359 | GPIO44_CIF_LV, |
| 360 | }; | 360 | }; |
| 361 | 361 | ||
| 362 | static int pcm990_pxacamera_init(struct device *dev) | ||
| 363 | { | ||
| 364 | pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_camera_pin_config)); | ||
| 365 | return 0; | ||
| 366 | } | ||
| 367 | |||
| 368 | /* | 362 | /* |
| 369 | * CICR4: PCLK_EN: Pixel clock is supplied by the sensor | 363 | * CICR4: PCLK_EN: Pixel clock is supplied by the sensor |
| 370 | * MCLK_EN: Master clock is generated by PXA | 364 | * MCLK_EN: Master clock is generated by PXA |
| 371 | * PCP: Data sampled on the falling edge of pixel clock | 365 | * PCP: Data sampled on the falling edge of pixel clock |
| 372 | */ | 366 | */ |
| 373 | struct pxacamera_platform_data pcm990_pxacamera_platform_data = { | 367 | struct pxacamera_platform_data pcm990_pxacamera_platform_data = { |
| 374 | .init = pcm990_pxacamera_init, | ||
| 375 | .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 | PXA_CAMERA_DATAWIDTH_10 | | 368 | .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 | PXA_CAMERA_DATAWIDTH_10 | |
| 376 | PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN/* | PXA_CAMERA_PCP*/, | 369 | PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN/* | PXA_CAMERA_PCP*/, |
| 377 | .mclk_10khz = 1000, | 370 | .mclk_10khz = 1000, |
| @@ -532,6 +525,7 @@ void __init pcm990_baseboard_init(void) | |||
| 532 | pxa_set_ac97_info(NULL); | 525 | pxa_set_ac97_info(NULL); |
| 533 | 526 | ||
| 534 | #if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE) | 527 | #if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE) |
| 528 | pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_camera_pin_config)); | ||
| 535 | pxa_set_camera_info(&pcm990_pxacamera_platform_data); | 529 | pxa_set_camera_info(&pcm990_pxacamera_platform_data); |
| 536 | 530 | ||
| 537 | i2c_register_board_info(0, ARRAY_AND_SIZE(pcm990_i2c_devices)); | 531 | i2c_register_board_info(0, ARRAY_AND_SIZE(pcm990_i2c_devices)); |
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c index a186994f77f..e5eeb3a62d0 100644 --- a/arch/arm/mach-pxa/poodle.c +++ b/arch/arm/mach-pxa/poodle.c | |||
| @@ -449,6 +449,10 @@ static void __init poodle_init(void) | |||
| 449 | 449 | ||
| 450 | pxa2xx_mfp_config(ARRAY_AND_SIZE(poodle_pin_config)); | 450 | pxa2xx_mfp_config(ARRAY_AND_SIZE(poodle_pin_config)); |
| 451 | 451 | ||
| 452 | pxa_set_ffuart_info(NULL); | ||
| 453 | pxa_set_btuart_info(NULL); | ||
| 454 | pxa_set_stuart_info(NULL); | ||
| 455 | |||
| 452 | platform_scoop_config = &poodle_pcmcia_config; | 456 | platform_scoop_config = &poodle_pcmcia_config; |
| 453 | 457 | ||
| 454 | ret = platform_add_devices(devices, ARRAY_SIZE(devices)); | 458 | ret = platform_add_devices(devices, ARRAY_SIZE(devices)); |
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index 77c2693cfee..2c1b0b70d01 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c | |||
| @@ -322,9 +322,6 @@ void __init pxa26x_init_irq(void) | |||
| 322 | 322 | ||
| 323 | static struct platform_device *pxa25x_devices[] __initdata = { | 323 | static struct platform_device *pxa25x_devices[] __initdata = { |
| 324 | &pxa25x_device_udc, | 324 | &pxa25x_device_udc, |
| 325 | &pxa_device_ffuart, | ||
| 326 | &pxa_device_btuart, | ||
| 327 | &pxa_device_stuart, | ||
| 328 | &pxa_device_i2s, | 325 | &pxa_device_i2s, |
| 329 | &sa1100_device_rtc, | 326 | &sa1100_device_rtc, |
| 330 | &pxa25x_device_ssp, | 327 | &pxa25x_device_ssp, |
| @@ -372,10 +369,8 @@ static int __init pxa25x_init(void) | |||
| 372 | } | 369 | } |
| 373 | 370 | ||
| 374 | /* Only add HWUART for PXA255/26x; PXA210/250 do not have it. */ | 371 | /* Only add HWUART for PXA255/26x; PXA210/250 do not have it. */ |
| 375 | if (cpu_is_pxa255()) { | 372 | if (cpu_is_pxa255()) |
| 376 | clks_register(&pxa25x_hwuart_clkreg, 1); | 373 | clks_register(&pxa25x_hwuart_clkreg, 1); |
| 377 | ret = platform_device_register(&pxa_device_hwuart); | ||
| 378 | } | ||
| 379 | 374 | ||
| 380 | return ret; | 375 | return ret; |
| 381 | } | 376 | } |
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index ec68cc16b4e..6a0b73167e0 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c | |||
| @@ -364,9 +364,6 @@ void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info) | |||
| 364 | 364 | ||
| 365 | static struct platform_device *devices[] __initdata = { | 365 | static struct platform_device *devices[] __initdata = { |
| 366 | &pxa27x_device_udc, | 366 | &pxa27x_device_udc, |
| 367 | &pxa_device_ffuart, | ||
| 368 | &pxa_device_btuart, | ||
| 369 | &pxa_device_stuart, | ||
| 370 | &pxa_device_i2s, | 367 | &pxa_device_i2s, |
| 371 | &sa1100_device_rtc, | 368 | &sa1100_device_rtc, |
| 372 | &pxa_device_rtc, | 369 | &pxa_device_rtc, |
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index 09b7b1a10ca..fcb0721f466 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c | |||
| @@ -30,6 +30,7 @@ | |||
| 30 | #include <mach/pm.h> | 30 | #include <mach/pm.h> |
| 31 | #include <mach/dma.h> | 31 | #include <mach/dma.h> |
| 32 | #include <mach/ssp.h> | 32 | #include <mach/ssp.h> |
| 33 | #include <mach/regs-intc.h> | ||
| 33 | #include <plat/i2c.h> | 34 | #include <plat/i2c.h> |
| 34 | 35 | ||
| 35 | #include "generic.h" | 36 | #include "generic.h" |
| @@ -45,6 +46,9 @@ | |||
| 45 | #define ACCR_D0CS (1 << 26) | 46 | #define ACCR_D0CS (1 << 26) |
| 46 | #define ACCR_PCCE (1 << 11) | 47 | #define ACCR_PCCE (1 << 11) |
| 47 | 48 | ||
| 49 | #define PECR_IE(n) ((1 << ((n) * 2)) << 28) | ||
| 50 | #define PECR_IS(n) ((1 << ((n) * 2)) << 29) | ||
| 51 | |||
| 48 | /* crystal frequency to static memory controller multiplier (SMCFS) */ | 52 | /* crystal frequency to static memory controller multiplier (SMCFS) */ |
| 49 | static unsigned char smcfs_mult[8] = { 6, 0, 8, 0, 0, 16, }; | 53 | static unsigned char smcfs_mult[8] = { 6, 0, 8, 0, 0, 16, }; |
| 50 | 54 | ||
| @@ -237,6 +241,7 @@ static DEFINE_PXA3_CKEN(pxa3xx_stuart, STUART, 14857000, 1); | |||
| 237 | static DEFINE_PXA3_CKEN(pxa3xx_i2c, I2C, 32842000, 0); | 241 | static DEFINE_PXA3_CKEN(pxa3xx_i2c, I2C, 32842000, 0); |
| 238 | static DEFINE_PXA3_CKEN(pxa3xx_udc, UDC, 48000000, 5); | 242 | static DEFINE_PXA3_CKEN(pxa3xx_udc, UDC, 48000000, 5); |
| 239 | static DEFINE_PXA3_CKEN(pxa3xx_usbh, USBH, 48000000, 0); | 243 | static DEFINE_PXA3_CKEN(pxa3xx_usbh, USBH, 48000000, 0); |
| 244 | static DEFINE_PXA3_CKEN(pxa3xx_u2d, USB2, 48000000, 0); | ||
| 240 | static DEFINE_PXA3_CKEN(pxa3xx_keypad, KEYPAD, 32768, 0); | 245 | static DEFINE_PXA3_CKEN(pxa3xx_keypad, KEYPAD, 32768, 0); |
| 241 | static DEFINE_PXA3_CKEN(pxa3xx_ssp1, SSP1, 13000000, 0); | 246 | static DEFINE_PXA3_CKEN(pxa3xx_ssp1, SSP1, 13000000, 0); |
| 242 | static DEFINE_PXA3_CKEN(pxa3xx_ssp2, SSP2, 13000000, 0); | 247 | static DEFINE_PXA3_CKEN(pxa3xx_ssp2, SSP2, 13000000, 0); |
| @@ -261,6 +266,7 @@ static struct clk_lookup pxa3xx_clkregs[] = { | |||
| 261 | INIT_CLKREG(&clk_pxa3xx_i2c, "pxa2xx-i2c.0", NULL), | 266 | INIT_CLKREG(&clk_pxa3xx_i2c, "pxa2xx-i2c.0", NULL), |
| 262 | INIT_CLKREG(&clk_pxa3xx_udc, "pxa27x-udc", NULL), | 267 | INIT_CLKREG(&clk_pxa3xx_udc, "pxa27x-udc", NULL), |
| 263 | INIT_CLKREG(&clk_pxa3xx_usbh, "pxa27x-ohci", NULL), | 268 | INIT_CLKREG(&clk_pxa3xx_usbh, "pxa27x-ohci", NULL), |
| 269 | INIT_CLKREG(&clk_pxa3xx_u2d, NULL, "U2DCLK"), | ||
| 264 | INIT_CLKREG(&clk_pxa3xx_keypad, "pxa27x-keypad", NULL), | 270 | INIT_CLKREG(&clk_pxa3xx_keypad, "pxa27x-keypad", NULL), |
| 265 | INIT_CLKREG(&clk_pxa3xx_ssp1, "pxa27x-ssp.0", NULL), | 271 | INIT_CLKREG(&clk_pxa3xx_ssp1, "pxa27x-ssp.0", NULL), |
| 266 | INIT_CLKREG(&clk_pxa3xx_ssp2, "pxa27x-ssp.1", NULL), | 272 | INIT_CLKREG(&clk_pxa3xx_ssp2, "pxa27x-ssp.1", NULL), |
| @@ -530,6 +536,43 @@ static inline void pxa3xx_init_pm(void) {} | |||
| 530 | #define pxa3xx_set_wake NULL | 536 | #define pxa3xx_set_wake NULL |
| 531 | #endif | 537 | #endif |
| 532 | 538 | ||
| 539 | static void pxa_ack_ext_wakeup(unsigned int irq) | ||
| 540 | { | ||
| 541 | PECR |= PECR_IS(irq - IRQ_WAKEUP0); | ||
| 542 | } | ||
| 543 | |||
| 544 | static void pxa_mask_ext_wakeup(unsigned int irq) | ||
| 545 | { | ||
| 546 | ICMR2 &= ~(1 << ((irq - PXA_IRQ(0)) & 0x1f)); | ||
| 547 | PECR &= ~PECR_IE(irq - IRQ_WAKEUP0); | ||
| 548 | } | ||
| 549 | |||
| 550 | static void pxa_unmask_ext_wakeup(unsigned int irq) | ||
| 551 | { | ||
| 552 | ICMR2 |= 1 << ((irq - PXA_IRQ(0)) & 0x1f); | ||
| 553 | PECR |= PECR_IE(irq - IRQ_WAKEUP0); | ||
| 554 | } | ||
| 555 | |||
| 556 | static struct irq_chip pxa_ext_wakeup_chip = { | ||
| 557 | .name = "WAKEUP", | ||
| 558 | .ack = pxa_ack_ext_wakeup, | ||
| 559 | .mask = pxa_mask_ext_wakeup, | ||
| 560 | .unmask = pxa_unmask_ext_wakeup, | ||
| 561 | }; | ||
| 562 | |||
| 563 | static void __init pxa_init_ext_wakeup_irq(set_wake_t fn) | ||
| 564 | { | ||
| 565 | int irq; | ||
| 566 | |||
| 567 | for (irq = IRQ_WAKEUP0; irq <= IRQ_WAKEUP1; irq++) { | ||
| 568 | set_irq_chip(irq, &pxa_ext_wakeup_chip); | ||
| 569 | set_irq_handler(irq, handle_edge_irq); | ||
| 570 | set_irq_flags(irq, IRQF_VALID); | ||
| 571 | } | ||
| 572 | |||
| 573 | pxa_ext_wakeup_chip.set_wake = fn; | ||
| 574 | } | ||
| 575 | |||
| 533 | void __init pxa3xx_init_irq(void) | 576 | void __init pxa3xx_init_irq(void) |
| 534 | { | 577 | { |
| 535 | /* enable CP6 access */ | 578 | /* enable CP6 access */ |
| @@ -539,6 +582,7 @@ void __init pxa3xx_init_irq(void) | |||
| 539 | __asm__ __volatile__("mcr p15, 0, %0, c15, c1, 0\n": :"r"(value)); | 582 | __asm__ __volatile__("mcr p15, 0, %0, c15, c1, 0\n": :"r"(value)); |
| 540 | 583 | ||
| 541 | pxa_init_irq(56, pxa3xx_set_wake); | 584 | pxa_init_irq(56, pxa3xx_set_wake); |
| 585 | pxa_init_ext_wakeup_irq(pxa3xx_set_wake); | ||
| 542 | pxa_init_gpio(IRQ_GPIO_2_x, 2, 127, NULL); | 586 | pxa_init_gpio(IRQ_GPIO_2_x, 2, 127, NULL); |
| 543 | } | 587 | } |
| 544 | 588 | ||
| @@ -553,9 +597,6 @@ void __init pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info) | |||
| 553 | 597 | ||
| 554 | static struct platform_device *devices[] __initdata = { | 598 | static struct platform_device *devices[] __initdata = { |
| 555 | &pxa27x_device_udc, | 599 | &pxa27x_device_udc, |
| 556 | &pxa_device_ffuart, | ||
| 557 | &pxa_device_btuart, | ||
| 558 | &pxa_device_stuart, | ||
| 559 | &pxa_device_i2s, | 600 | &pxa_device_i2s, |
| 560 | &sa1100_device_rtc, | 601 | &sa1100_device_rtc, |
| 561 | &pxa_device_rtc, | 602 | &pxa_device_rtc, |
diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c index 8241a63ea58..115b6f234bd 100644 --- a/arch/arm/mach-pxa/saar.c +++ b/arch/arm/mach-pxa/saar.c | |||
| @@ -22,9 +22,13 @@ | |||
| 22 | #include <linux/i2c.h> | 22 | #include <linux/i2c.h> |
| 23 | #include <linux/smc91x.h> | 23 | #include <linux/smc91x.h> |
| 24 | #include <linux/mfd/da903x.h> | 24 | #include <linux/mfd/da903x.h> |
| 25 | #include <linux/mtd/mtd.h> | ||
| 26 | #include <linux/mtd/partitions.h> | ||
| 27 | #include <linux/mtd/onenand.h> | ||
| 25 | 28 | ||
| 26 | #include <asm/mach-types.h> | 29 | #include <asm/mach-types.h> |
| 27 | #include <asm/mach/arch.h> | 30 | #include <asm/mach/arch.h> |
| 31 | #include <asm/mach/flash.h> | ||
| 28 | 32 | ||
| 29 | #include <mach/pxa930.h> | 33 | #include <mach/pxa930.h> |
| 30 | #include <plat/i2c.h> | 34 | #include <plat/i2c.h> |
| @@ -33,7 +37,7 @@ | |||
| 33 | #include "devices.h" | 37 | #include "devices.h" |
| 34 | #include "generic.h" | 38 | #include "generic.h" |
| 35 | 39 | ||
| 36 | #define GPIO_LCD_RESET (16) | 40 | #define GPIO_LCD_RESET (16) |
| 37 | 41 | ||
| 38 | /* SAAR MFP configurations */ | 42 | /* SAAR MFP configurations */ |
| 39 | static mfp_cfg_t saar_mfp_cfg[] __initdata = { | 43 | static mfp_cfg_t saar_mfp_cfg[] __initdata = { |
| @@ -56,6 +60,31 @@ static mfp_cfg_t saar_mfp_cfg[] __initdata = { | |||
| 56 | /* Ethernet */ | 60 | /* Ethernet */ |
| 57 | DF_nCS1_nCS3, | 61 | DF_nCS1_nCS3, |
| 58 | GPIO97_GPIO, | 62 | GPIO97_GPIO, |
| 63 | |||
| 64 | /* DFI */ | ||
| 65 | DF_INT_RnB_ND_INT_RnB, | ||
| 66 | DF_nRE_nOE_ND_nRE, | ||
| 67 | DF_nWE_ND_nWE, | ||
| 68 | DF_CLE_nOE_ND_CLE, | ||
| 69 | DF_nADV1_ALE_ND_ALE, | ||
| 70 | DF_nADV2_ALE_nCS3, | ||
| 71 | DF_nCS0_ND_nCS0, | ||
| 72 | DF_IO0_ND_IO0, | ||
| 73 | DF_IO1_ND_IO1, | ||
| 74 | DF_IO2_ND_IO2, | ||
| 75 | DF_IO3_ND_IO3, | ||
| 76 | DF_IO4_ND_IO4, | ||
| 77 | DF_IO5_ND_IO5, | ||
| 78 | DF_IO6_ND_IO6, | ||
| 79 | DF_IO7_ND_IO7, | ||
| 80 | DF_IO8_ND_IO8, | ||
| 81 | DF_IO9_ND_IO9, | ||
| 82 | DF_IO10_ND_IO10, | ||
| 83 | DF_IO11_ND_IO11, | ||
| 84 | DF_IO12_ND_IO12, | ||
| 85 | DF_IO13_ND_IO13, | ||
| 86 | DF_IO14_ND_IO14, | ||
| 87 | DF_IO15_ND_IO15, | ||
| 59 | }; | 88 | }; |
| 60 | 89 | ||
| 61 | #define SAAR_ETH_PHYS (0x14000000) | 90 | #define SAAR_ETH_PHYS (0x14000000) |
| @@ -451,10 +480,15 @@ static inline void saar_init_lcd(void) {} | |||
| 451 | #endif | 480 | #endif |
| 452 | 481 | ||
| 453 | #if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE) | 482 | #if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE) |
| 483 | static struct da9034_backlight_pdata saar_da9034_backlight = { | ||
| 484 | .output_current = 4, /* 4mA */ | ||
| 485 | }; | ||
| 486 | |||
| 454 | static struct da903x_subdev_info saar_da9034_subdevs[] = { | 487 | static struct da903x_subdev_info saar_da9034_subdevs[] = { |
| 455 | [0] = { | 488 | [0] = { |
| 456 | .name = "da903x-backlight", | 489 | .name = "da903x-backlight", |
| 457 | .id = DA9034_ID_WLED, | 490 | .id = DA9034_ID_WLED, |
| 491 | .platform_data = &saar_da9034_backlight, | ||
| 458 | }, | 492 | }, |
| 459 | }; | 493 | }; |
| 460 | 494 | ||
| @@ -480,12 +514,81 @@ static void __init saar_init_i2c(void) | |||
| 480 | #else | 514 | #else |
| 481 | static inline void saar_init_i2c(void) {} | 515 | static inline void saar_init_i2c(void) {} |
| 482 | #endif | 516 | #endif |
| 517 | |||
| 518 | #if defined(CONFIG_MTD_ONENAND) || defined(CONFIG_MTD_ONENAND_MODULE) | ||
| 519 | static struct mtd_partition saar_onenand_partitions[] = { | ||
| 520 | { | ||
| 521 | .name = "bootloader", | ||
| 522 | .offset = 0, | ||
| 523 | .size = SZ_1M, | ||
| 524 | .mask_flags = MTD_WRITEABLE, | ||
| 525 | }, { | ||
| 526 | .name = "reserved", | ||
| 527 | .offset = MTDPART_OFS_APPEND, | ||
| 528 | .size = SZ_128K, | ||
| 529 | .mask_flags = MTD_WRITEABLE, | ||
| 530 | }, { | ||
| 531 | .name = "reserved", | ||
| 532 | .offset = MTDPART_OFS_APPEND, | ||
| 533 | .size = SZ_8M, | ||
| 534 | .mask_flags = MTD_WRITEABLE, | ||
| 535 | }, { | ||
| 536 | .name = "kernel", | ||
| 537 | .offset = MTDPART_OFS_APPEND, | ||
| 538 | .size = (SZ_2M + SZ_1M), | ||
| 539 | .mask_flags = 0, | ||
| 540 | }, { | ||
| 541 | .name = "filesystem", | ||
| 542 | .offset = MTDPART_OFS_APPEND, | ||
| 543 | .size = SZ_48M, | ||
| 544 | .mask_flags = 0, | ||
| 545 | } | ||
| 546 | }; | ||
| 547 | |||
| 548 | static struct onenand_platform_data saar_onenand_info = { | ||
| 549 | .parts = saar_onenand_partitions, | ||
| 550 | .nr_parts = ARRAY_SIZE(saar_onenand_partitions), | ||
| 551 | }; | ||
| 552 | |||
| 553 | #define SMC_CS0_PHYS_BASE (0x10000000) | ||
| 554 | |||
| 555 | static struct resource saar_resource_onenand[] = { | ||
| 556 | [0] = { | ||
| 557 | .start = SMC_CS0_PHYS_BASE, | ||
| 558 | .end = SMC_CS0_PHYS_BASE + SZ_1M, | ||
| 559 | .flags = IORESOURCE_MEM, | ||
| 560 | }, | ||
| 561 | }; | ||
| 562 | |||
| 563 | static struct platform_device saar_device_onenand = { | ||
| 564 | .name = "onenand-flash", | ||
| 565 | .id = -1, | ||
| 566 | .dev = { | ||
| 567 | .platform_data = &saar_onenand_info, | ||
| 568 | }, | ||
| 569 | .resource = saar_resource_onenand, | ||
| 570 | .num_resources = ARRAY_SIZE(saar_resource_onenand), | ||
| 571 | }; | ||
| 572 | |||
| 573 | static void __init saar_init_onenand(void) | ||
| 574 | { | ||
| 575 | platform_device_register(&saar_device_onenand); | ||
| 576 | } | ||
| 577 | #else | ||
| 578 | static void __init saar_init_onenand(void) {} | ||
| 579 | #endif | ||
| 580 | |||
| 483 | static void __init saar_init(void) | 581 | static void __init saar_init(void) |
| 484 | { | 582 | { |
| 485 | /* initialize MFP configurations */ | 583 | /* initialize MFP configurations */ |
| 486 | pxa3xx_mfp_config(ARRAY_AND_SIZE(saar_mfp_cfg)); | 584 | pxa3xx_mfp_config(ARRAY_AND_SIZE(saar_mfp_cfg)); |
| 487 | 585 | ||
| 586 | pxa_set_ffuart_info(NULL); | ||
| 587 | pxa_set_btuart_info(NULL); | ||
| 588 | pxa_set_stuart_info(NULL); | ||
| 589 | |||
| 488 | platform_device_register(&smc91x_device); | 590 | platform_device_register(&smc91x_device); |
| 591 | saar_init_onenand(); | ||
| 489 | 592 | ||
| 490 | saar_init_i2c(); | 593 | saar_init_i2c(); |
| 491 | saar_init_lcd(); | 594 | saar_init_lcd(); |
diff --git a/arch/arm/mach-pxa/sharpsl.h b/arch/arm/mach-pxa/sharpsl.h index 55259f4756c..1439785d397 100644 --- a/arch/arm/mach-pxa/sharpsl.h +++ b/arch/arm/mach-pxa/sharpsl.h | |||
| @@ -42,8 +42,8 @@ void corgi_lcdtg_hw_init(int mode); | |||
| 42 | #define MAX1111_BATT_TEMP 2u | 42 | #define MAX1111_BATT_TEMP 2u |
| 43 | #define MAX1111_ACIN_VOLT 6u | 43 | #define MAX1111_ACIN_VOLT 6u |
| 44 | 44 | ||
| 45 | extern struct battery_thresh spitz_battery_levels_acin[]; | 45 | extern struct battery_thresh sharpsl_battery_levels_acin[]; |
| 46 | extern struct battery_thresh spitz_battery_levels_noac[]; | 46 | extern struct battery_thresh sharpsl_battery_levels_noac[]; |
| 47 | int sharpsl_pm_pxa_read_max1111(int channel); | 47 | int sharpsl_pm_pxa_read_max1111(int channel); |
| 48 | 48 | ||
| 49 | 49 | ||
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c index 629e05d1196..67229a1ef55 100644 --- a/arch/arm/mach-pxa/sharpsl_pm.c +++ b/arch/arm/mach-pxa/sharpsl_pm.c | |||
| @@ -78,7 +78,7 @@ DEFINE_LED_TRIGGER(sharpsl_charge_led_trigger); | |||
| 78 | 78 | ||
| 79 | 79 | ||
| 80 | 80 | ||
| 81 | struct battery_thresh spitz_battery_levels_acin[] = { | 81 | struct battery_thresh sharpsl_battery_levels_acin[] = { |
| 82 | { 213, 100}, | 82 | { 213, 100}, |
| 83 | { 212, 98}, | 83 | { 212, 98}, |
| 84 | { 211, 95}, | 84 | { 211, 95}, |
| @@ -121,7 +121,7 @@ struct battery_thresh spitz_battery_levels_acin[] = { | |||
| 121 | { 0, 0}, | 121 | { 0, 0}, |
| 122 | }; | 122 | }; |
| 123 | 123 | ||
| 124 | struct battery_thresh spitz_battery_levels_noac[] = { | 124 | struct battery_thresh sharpsl_battery_levels_noac[] = { |
| 125 | { 213, 100}, | 125 | { 213, 100}, |
| 126 | { 212, 98}, | 126 | { 212, 98}, |
| 127 | { 211, 95}, | 127 | { 211, 95}, |
| @@ -165,19 +165,20 @@ struct battery_thresh spitz_battery_levels_noac[] = { | |||
| 165 | }; | 165 | }; |
| 166 | 166 | ||
| 167 | /* MAX1111 Commands */ | 167 | /* MAX1111 Commands */ |
| 168 | #define MAXCTRL_PD0 1u << 0 | 168 | #define MAXCTRL_PD0 (1u << 0) |
| 169 | #define MAXCTRL_PD1 1u << 1 | 169 | #define MAXCTRL_PD1 (1u << 1) |
| 170 | #define MAXCTRL_SGL 1u << 2 | 170 | #define MAXCTRL_SGL (1u << 2) |
| 171 | #define MAXCTRL_UNI 1u << 3 | 171 | #define MAXCTRL_UNI (1u << 3) |
| 172 | #define MAXCTRL_SEL_SH 4 | 172 | #define MAXCTRL_SEL_SH 4 |
| 173 | #define MAXCTRL_STR 1u << 7 | 173 | #define MAXCTRL_STR (1u << 7) |
| 174 | 174 | ||
| 175 | /* | 175 | /* |
| 176 | * Read MAX1111 ADC | 176 | * Read MAX1111 ADC |
| 177 | */ | 177 | */ |
| 178 | int sharpsl_pm_pxa_read_max1111(int channel) | 178 | int sharpsl_pm_pxa_read_max1111(int channel) |
| 179 | { | 179 | { |
| 180 | if (machine_is_tosa()) // Ugly, better move this function into another module | 180 | /* Ugly, better move this function into another module */ |
| 181 | if (machine_is_tosa()) | ||
| 181 | return 0; | 182 | return 0; |
| 182 | 183 | ||
| 183 | #ifdef CONFIG_CORGI_SSP_DEPRECATED | 184 | #ifdef CONFIG_CORGI_SSP_DEPRECATED |
| @@ -238,7 +239,7 @@ EXPORT_SYMBOL(sharpsl_battery_kick); | |||
| 238 | 239 | ||
| 239 | static void sharpsl_battery_thread(struct work_struct *private_) | 240 | static void sharpsl_battery_thread(struct work_struct *private_) |
| 240 | { | 241 | { |
| 241 | int voltage, percent, apm_status, i = 0; | 242 | int voltage, percent, apm_status, i; |
| 242 | 243 | ||
| 243 | if (!sharpsl_pm.machinfo) | 244 | if (!sharpsl_pm.machinfo) |
| 244 | return; | 245 | return; |
| @@ -250,15 +251,14 @@ static void sharpsl_battery_thread(struct work_struct *private_) | |||
| 250 | && time_after(jiffies, sharpsl_pm.charge_start_time + SHARPSL_CHARGE_ON_TIME_INTERVAL)) | 251 | && time_after(jiffies, sharpsl_pm.charge_start_time + SHARPSL_CHARGE_ON_TIME_INTERVAL)) |
| 251 | schedule_delayed_work(&toggle_charger, 0); | 252 | schedule_delayed_work(&toggle_charger, 0); |
| 252 | 253 | ||
| 253 | while(1) { | 254 | for (i = 0; i < 5; i++) { |
| 254 | voltage = sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_VOLT); | 255 | voltage = sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_VOLT); |
| 255 | 256 | if (voltage > 0) | |
| 256 | if (voltage > 0) break; | ||
| 257 | if (i++ > 5) { | ||
| 258 | voltage = sharpsl_pm.machinfo->bat_levels_noac[0].voltage; | ||
| 259 | dev_warn(sharpsl_pm.dev, "Warning: Cannot read main battery!\n"); | ||
| 260 | break; | 257 | break; |
| 261 | } | 258 | } |
| 259 | if (voltage <= 0) { | ||
| 260 | voltage = sharpsl_pm.machinfo->bat_levels_noac[0].voltage; | ||
| 261 | dev_warn(sharpsl_pm.dev, "Warning: Cannot read main battery!\n"); | ||
| 262 | } | 262 | } |
| 263 | 263 | ||
| 264 | voltage = sharpsl_average_value(voltage); | 264 | voltage = sharpsl_average_value(voltage); |
| @@ -266,8 +266,10 @@ static void sharpsl_battery_thread(struct work_struct *private_) | |||
| 266 | percent = get_percentage(voltage); | 266 | percent = get_percentage(voltage); |
| 267 | 267 | ||
| 268 | /* At low battery voltages, the voltage has a tendency to start | 268 | /* At low battery voltages, the voltage has a tendency to start |
| 269 | creeping back up so we try to avoid this here */ | 269 | creeping back up so we try to avoid this here */ |
| 270 | if ((sharpsl_pm.battstat.ac_status == APM_AC_ONLINE) || (apm_status == APM_BATTERY_STATUS_HIGH) || percent <= sharpsl_pm.battstat.mainbat_percent) { | 270 | if ((sharpsl_pm.battstat.ac_status == APM_AC_ONLINE) |
| 271 | || (apm_status == APM_BATTERY_STATUS_HIGH) | ||
| 272 | || percent <= sharpsl_pm.battstat.mainbat_percent) { | ||
| 271 | sharpsl_pm.battstat.mainbat_voltage = voltage; | 273 | sharpsl_pm.battstat.mainbat_voltage = voltage; |
| 272 | sharpsl_pm.battstat.mainbat_status = apm_status; | 274 | sharpsl_pm.battstat.mainbat_status = apm_status; |
| 273 | sharpsl_pm.battstat.mainbat_percent = percent; | 275 | sharpsl_pm.battstat.mainbat_percent = percent; |
| @@ -279,8 +281,8 @@ static void sharpsl_battery_thread(struct work_struct *private_) | |||
| 279 | #ifdef CONFIG_BACKLIGHT_CORGI | 281 | #ifdef CONFIG_BACKLIGHT_CORGI |
| 280 | /* If battery is low. limit backlight intensity to save power. */ | 282 | /* If battery is low. limit backlight intensity to save power. */ |
| 281 | if ((sharpsl_pm.battstat.ac_status != APM_AC_ONLINE) | 283 | if ((sharpsl_pm.battstat.ac_status != APM_AC_ONLINE) |
| 282 | && ((sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_LOW) || | 284 | && ((sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_LOW) |
| 283 | (sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_CRITICAL))) { | 285 | || (sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_CRITICAL))) { |
| 284 | if (!(sharpsl_pm.flags & SHARPSL_BL_LIMIT)) { | 286 | if (!(sharpsl_pm.flags & SHARPSL_BL_LIMIT)) { |
| 285 | sharpsl_pm.machinfo->backlight_limit(1); | 287 | sharpsl_pm.machinfo->backlight_limit(1); |
| 286 | sharpsl_pm.flags |= SHARPSL_BL_LIMIT; | 288 | sharpsl_pm.flags |= SHARPSL_BL_LIMIT; |
| @@ -293,8 +295,8 @@ static void sharpsl_battery_thread(struct work_struct *private_) | |||
| 293 | 295 | ||
| 294 | /* Suspend if critical battery level */ | 296 | /* Suspend if critical battery level */ |
| 295 | if ((sharpsl_pm.battstat.ac_status != APM_AC_ONLINE) | 297 | if ((sharpsl_pm.battstat.ac_status != APM_AC_ONLINE) |
| 296 | && (sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_CRITICAL) | 298 | && (sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_CRITICAL) |
| 297 | && !(sharpsl_pm.flags & SHARPSL_APM_QUEUED)) { | 299 | && !(sharpsl_pm.flags & SHARPSL_APM_QUEUED)) { |
| 298 | sharpsl_pm.flags |= SHARPSL_APM_QUEUED; | 300 | sharpsl_pm.flags |= SHARPSL_APM_QUEUED; |
| 299 | dev_err(sharpsl_pm.dev, "Fatal Off\n"); | 301 | dev_err(sharpsl_pm.dev, "Fatal Off\n"); |
| 300 | apm_queue_event(APM_CRITICAL_SUSPEND); | 302 | apm_queue_event(APM_CRITICAL_SUSPEND); |
| @@ -346,7 +348,7 @@ static void sharpsl_charge_error(void) | |||
| 346 | 348 | ||
| 347 | static void sharpsl_charge_toggle(struct work_struct *private_) | 349 | static void sharpsl_charge_toggle(struct work_struct *private_) |
| 348 | { | 350 | { |
| 349 | dev_dbg(sharpsl_pm.dev, "Toogling Charger at time: %lx\n", jiffies); | 351 | dev_dbg(sharpsl_pm.dev, "Toggling Charger at time: %lx\n", jiffies); |
| 350 | 352 | ||
| 351 | if (!sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN)) { | 353 | if (!sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN)) { |
| 352 | sharpsl_charge_off(); | 354 | sharpsl_charge_off(); |
| @@ -368,7 +370,7 @@ static void sharpsl_ac_timer(unsigned long data) | |||
| 368 | { | 370 | { |
| 369 | int acin = sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN); | 371 | int acin = sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN); |
| 370 | 372 | ||
| 371 | dev_dbg(sharpsl_pm.dev, "AC Status: %d\n",acin); | 373 | dev_dbg(sharpsl_pm.dev, "AC Status: %d\n", acin); |
| 372 | 374 | ||
| 373 | sharpsl_average_clear(); | 375 | sharpsl_average_clear(); |
| 374 | if (acin && (sharpsl_pm.charge_mode != CHRG_ON)) | 376 | if (acin && (sharpsl_pm.charge_mode != CHRG_ON)) |
| @@ -472,14 +474,14 @@ static int sharpsl_average_value(int ad) | |||
| 472 | sharpsl_ad[sharpsl_ad_index] = ad; | 474 | sharpsl_ad[sharpsl_ad_index] = ad; |
| 473 | sharpsl_ad_index++; | 475 | sharpsl_ad_index++; |
| 474 | if (sharpsl_ad_index >= SHARPSL_CNV_VALUE_NUM) { | 476 | if (sharpsl_ad_index >= SHARPSL_CNV_VALUE_NUM) { |
| 475 | for (i=0; i < (SHARPSL_CNV_VALUE_NUM-1); i++) | 477 | for (i = 0; i < (SHARPSL_CNV_VALUE_NUM-1); i++) |
| 476 | sharpsl_ad[i] = sharpsl_ad[i+1]; | 478 | sharpsl_ad[i] = sharpsl_ad[i+1]; |
| 477 | sharpsl_ad_index = SHARPSL_CNV_VALUE_NUM - 1; | 479 | sharpsl_ad_index = SHARPSL_CNV_VALUE_NUM - 1; |
| 478 | } | 480 | } |
| 479 | for (i=0; i < sharpsl_ad_index; i++) | 481 | for (i = 0; i < sharpsl_ad_index; i++) |
| 480 | ad_val += sharpsl_ad[i]; | 482 | ad_val += sharpsl_ad[i]; |
| 481 | 483 | ||
| 482 | return (ad_val / sharpsl_ad_index); | 484 | return ad_val / sharpsl_ad_index; |
| 483 | } | 485 | } |
| 484 | 486 | ||
| 485 | /* | 487 | /* |
| @@ -492,8 +494,8 @@ static int get_select_val(int *val) | |||
| 492 | 494 | ||
| 493 | /* Find MAX val */ | 495 | /* Find MAX val */ |
| 494 | temp = val[0]; | 496 | temp = val[0]; |
| 495 | j=0; | 497 | j = 0; |
| 496 | for (i=1; i<5; i++) { | 498 | for (i = 1; i < 5; i++) { |
| 497 | if (temp < val[i]) { | 499 | if (temp < val[i]) { |
| 498 | temp = val[i]; | 500 | temp = val[i]; |
| 499 | j = i; | 501 | j = i; |
| @@ -502,21 +504,21 @@ static int get_select_val(int *val) | |||
| 502 | 504 | ||
| 503 | /* Find MIN val */ | 505 | /* Find MIN val */ |
| 504 | temp = val[4]; | 506 | temp = val[4]; |
| 505 | k=4; | 507 | k = 4; |
| 506 | for (i=3; i>=0; i--) { | 508 | for (i = 3; i >= 0; i--) { |
| 507 | if (temp > val[i]) { | 509 | if (temp > val[i]) { |
| 508 | temp = val[i]; | 510 | temp = val[i]; |
| 509 | k = i; | 511 | k = i; |
| 510 | } | 512 | } |
| 511 | } | 513 | } |
| 512 | 514 | ||
| 513 | for (i=0; i<5; i++) | 515 | for (i = 0; i < 5; i++) |
| 514 | if (i != j && i != k ) | 516 | if (i != j && i != k) |
| 515 | sum += val[i]; | 517 | sum += val[i]; |
| 516 | 518 | ||
| 517 | dev_dbg(sharpsl_pm.dev, "Average: %d from values: %d, %d, %d, %d, %d\n", sum/3, val[0], val[1], val[2], val[3], val[4]); | 519 | dev_dbg(sharpsl_pm.dev, "Average: %d from values: %d, %d, %d, %d, %d\n", sum/3, val[0], val[1], val[2], val[3], val[4]); |
| 518 | 520 | ||
| 519 | return (sum/3); | 521 | return sum/3; |
| 520 | } | 522 | } |
| 521 | 523 | ||
| 522 | static int sharpsl_check_battery_temp(void) | 524 | static int sharpsl_check_battery_temp(void) |
| @@ -524,7 +526,7 @@ static int sharpsl_check_battery_temp(void) | |||
| 524 | int val, i, buff[5]; | 526 | int val, i, buff[5]; |
| 525 | 527 | ||
| 526 | /* Check battery temperature */ | 528 | /* Check battery temperature */ |
| 527 | for (i=0; i<5; i++) { | 529 | for (i = 0; i < 5; i++) { |
| 528 | mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_TEMP); | 530 | mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_TEMP); |
| 529 | sharpsl_pm.machinfo->measure_temp(1); | 531 | sharpsl_pm.machinfo->measure_temp(1); |
| 530 | mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_TEMP); | 532 | mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_TEMP); |
| @@ -557,7 +559,7 @@ static int sharpsl_check_battery_voltage(void) | |||
| 557 | sharpsl_pm.machinfo->discharge1(1); | 559 | sharpsl_pm.machinfo->discharge1(1); |
| 558 | 560 | ||
| 559 | /* Check battery voltage */ | 561 | /* Check battery voltage */ |
| 560 | for (i=0; i<5; i++) { | 562 | for (i = 0; i < 5; i++) { |
| 561 | buff[i] = sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_VOLT); | 563 | buff[i] = sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_VOLT); |
| 562 | mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_VOLT); | 564 | mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_VOLT); |
| 563 | } | 565 | } |
| @@ -581,16 +583,16 @@ static int sharpsl_ac_check(void) | |||
| 581 | { | 583 | { |
| 582 | int temp, i, buff[5]; | 584 | int temp, i, buff[5]; |
| 583 | 585 | ||
| 584 | for (i=0; i<5; i++) { | 586 | for (i = 0; i < 5; i++) { |
| 585 | buff[i] = sharpsl_pm.machinfo->read_devdata(SHARPSL_ACIN_VOLT); | 587 | buff[i] = sharpsl_pm.machinfo->read_devdata(SHARPSL_ACIN_VOLT); |
| 586 | mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_ACIN); | 588 | mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_ACIN); |
| 587 | } | 589 | } |
| 588 | 590 | ||
| 589 | temp = get_select_val(buff); | 591 | temp = get_select_val(buff); |
| 590 | dev_dbg(sharpsl_pm.dev, "AC Voltage: %d\n",temp); | 592 | dev_dbg(sharpsl_pm.dev, "AC Voltage: %d\n", temp); |
| 591 | 593 | ||
| 592 | if ((temp > sharpsl_pm.machinfo->charge_acin_high) || (temp < sharpsl_pm.machinfo->charge_acin_low)) { | 594 | if ((temp > sharpsl_pm.machinfo->charge_acin_high) || (temp < sharpsl_pm.machinfo->charge_acin_low)) { |
| 593 | dev_err(sharpsl_pm.dev, "Error: AC check failed.\n"); | 595 | dev_err(sharpsl_pm.dev, "Error: AC check failed: voltage %d.\n", temp); |
| 594 | return -1; | 596 | return -1; |
| 595 | } | 597 | } |
| 596 | 598 | ||
| @@ -624,9 +626,9 @@ static int sharpsl_pm_resume(struct platform_device *pdev) | |||
| 624 | 626 | ||
| 625 | static void corgi_goto_sleep(unsigned long alarm_time, unsigned int alarm_enable, suspend_state_t state) | 627 | static void corgi_goto_sleep(unsigned long alarm_time, unsigned int alarm_enable, suspend_state_t state) |
| 626 | { | 628 | { |
| 627 | dev_dbg(sharpsl_pm.dev, "Time is: %08x\n",RCNR); | 629 | dev_dbg(sharpsl_pm.dev, "Time is: %08x\n", RCNR); |
| 628 | 630 | ||
| 629 | dev_dbg(sharpsl_pm.dev, "Offline Charge Activate = %d\n",sharpsl_pm.flags & SHARPSL_DO_OFFLINE_CHRG); | 631 | dev_dbg(sharpsl_pm.dev, "Offline Charge Activate = %d\n", sharpsl_pm.flags & SHARPSL_DO_OFFLINE_CHRG); |
| 630 | /* not charging and AC-IN! */ | 632 | /* not charging and AC-IN! */ |
| 631 | 633 | ||
| 632 | if ((sharpsl_pm.flags & SHARPSL_DO_OFFLINE_CHRG) && (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN))) { | 634 | if ((sharpsl_pm.flags & SHARPSL_DO_OFFLINE_CHRG) && (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN))) { |
| @@ -644,12 +646,12 @@ static void corgi_goto_sleep(unsigned long alarm_time, unsigned int alarm_enable | |||
| 644 | if ((sharpsl_pm.charge_mode == CHRG_ON) && ((alarm_enable && ((alarm_time - RCNR) > (SHARPSL_BATCHK_TIME_SUSPEND + 30))) || !alarm_enable)) { | 646 | if ((sharpsl_pm.charge_mode == CHRG_ON) && ((alarm_enable && ((alarm_time - RCNR) > (SHARPSL_BATCHK_TIME_SUSPEND + 30))) || !alarm_enable)) { |
| 645 | RTSR &= RTSR_ALE; | 647 | RTSR &= RTSR_ALE; |
| 646 | RTAR = RCNR + SHARPSL_BATCHK_TIME_SUSPEND; | 648 | RTAR = RCNR + SHARPSL_BATCHK_TIME_SUSPEND; |
| 647 | dev_dbg(sharpsl_pm.dev, "Charging alarm at: %08x\n",RTAR); | 649 | dev_dbg(sharpsl_pm.dev, "Charging alarm at: %08x\n", RTAR); |
| 648 | sharpsl_pm.flags |= SHARPSL_ALARM_ACTIVE; | 650 | sharpsl_pm.flags |= SHARPSL_ALARM_ACTIVE; |
| 649 | } else if (alarm_enable) { | 651 | } else if (alarm_enable) { |
| 650 | RTSR &= RTSR_ALE; | 652 | RTSR &= RTSR_ALE; |
| 651 | RTAR = alarm_time; | 653 | RTAR = alarm_time; |
| 652 | dev_dbg(sharpsl_pm.dev, "User alarm at: %08x\n",RTAR); | 654 | dev_dbg(sharpsl_pm.dev, "User alarm at: %08x\n", RTAR); |
| 653 | } else { | 655 | } else { |
| 654 | dev_dbg(sharpsl_pm.dev, "No alarms set.\n"); | 656 | dev_dbg(sharpsl_pm.dev, "No alarms set.\n"); |
| 655 | } | 657 | } |
| @@ -658,19 +660,18 @@ static void corgi_goto_sleep(unsigned long alarm_time, unsigned int alarm_enable | |||
| 658 | 660 | ||
| 659 | sharpsl_pm.machinfo->postsuspend(); | 661 | sharpsl_pm.machinfo->postsuspend(); |
| 660 | 662 | ||
| 661 | dev_dbg(sharpsl_pm.dev, "Corgi woken up from suspend: %08x\n",PEDR); | 663 | dev_dbg(sharpsl_pm.dev, "Corgi woken up from suspend: %08x\n", PEDR); |
| 662 | } | 664 | } |
| 663 | 665 | ||
| 664 | static int corgi_enter_suspend(unsigned long alarm_time, unsigned int alarm_enable, suspend_state_t state) | 666 | static int corgi_enter_suspend(unsigned long alarm_time, unsigned int alarm_enable, suspend_state_t state) |
| 665 | { | 667 | { |
| 666 | if (!sharpsl_pm.machinfo->should_wakeup(!(sharpsl_pm.flags & SHARPSL_ALARM_ACTIVE) && alarm_enable) ) | 668 | if (!sharpsl_pm.machinfo->should_wakeup(!(sharpsl_pm.flags & SHARPSL_ALARM_ACTIVE) && alarm_enable)) { |
| 667 | { | ||
| 668 | if (!(sharpsl_pm.flags & SHARPSL_ALARM_ACTIVE)) { | 669 | if (!(sharpsl_pm.flags & SHARPSL_ALARM_ACTIVE)) { |
| 669 | dev_dbg(sharpsl_pm.dev, "No user triggered wakeup events and not charging. Strange. Suspend.\n"); | 670 | dev_dbg(sharpsl_pm.dev, "No user triggered wakeup events and not charging. Strange. Suspend.\n"); |
| 670 | corgi_goto_sleep(alarm_time, alarm_enable, state); | 671 | corgi_goto_sleep(alarm_time, alarm_enable, state); |
| 671 | return 1; | 672 | return 1; |
| 672 | } | 673 | } |
| 673 | if(sharpsl_off_charge_battery()) { | 674 | if (sharpsl_off_charge_battery()) { |
| 674 | dev_dbg(sharpsl_pm.dev, "Charging. Suspend...\n"); | 675 | dev_dbg(sharpsl_pm.dev, "Charging. Suspend...\n"); |
| 675 | corgi_goto_sleep(alarm_time, alarm_enable, state); | 676 | corgi_goto_sleep(alarm_time, alarm_enable, state); |
| 676 | return 1; | 677 | return 1; |
| @@ -697,7 +698,7 @@ static int corgi_pxa_pm_enter(suspend_state_t state) | |||
| 697 | 698 | ||
| 698 | corgi_goto_sleep(alarm_time, alarm_status, state); | 699 | corgi_goto_sleep(alarm_time, alarm_status, state); |
| 699 | 700 | ||
| 700 | while (corgi_enter_suspend(alarm_time,alarm_status,state)) | 701 | while (corgi_enter_suspend(alarm_time, alarm_status, state)) |
| 701 | {} | 702 | {} |
| 702 | 703 | ||
| 703 | if (sharpsl_pm.machinfo->earlyresume) | 704 | if (sharpsl_pm.machinfo->earlyresume) |
| @@ -732,7 +733,7 @@ static int sharpsl_fatal_check(void) | |||
| 732 | sharpsl_pm.machinfo->discharge1(1); | 733 | sharpsl_pm.machinfo->discharge1(1); |
| 733 | 734 | ||
| 734 | /* Check battery : check inserting battery ? */ | 735 | /* Check battery : check inserting battery ? */ |
| 735 | for (i=0; i<5; i++) { | 736 | for (i = 0; i < 5; i++) { |
| 736 | buff[i] = sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_VOLT); | 737 | buff[i] = sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_VOLT); |
| 737 | mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_VOLT); | 738 | mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_VOLT); |
| 738 | } | 739 | } |
| @@ -812,7 +813,7 @@ static int sharpsl_off_charge_battery(void) | |||
| 812 | mdelay(SHARPSL_CHARGE_CO_CHECK_TIME); | 813 | mdelay(SHARPSL_CHARGE_CO_CHECK_TIME); |
| 813 | 814 | ||
| 814 | time = RCNR; | 815 | time = RCNR; |
| 815 | while(1) { | 816 | while (1) { |
| 816 | /* Check if any wakeup event had occurred */ | 817 | /* Check if any wakeup event had occurred */ |
| 817 | if (sharpsl_pm.machinfo->charger_wakeup() != 0) | 818 | if (sharpsl_pm.machinfo->charger_wakeup() != 0) |
| 818 | return 0; | 819 | return 0; |
| @@ -835,9 +836,9 @@ static int sharpsl_off_charge_battery(void) | |||
| 835 | mdelay(SHARPSL_CHARGE_CO_CHECK_TIME); | 836 | mdelay(SHARPSL_CHARGE_CO_CHECK_TIME); |
| 836 | 837 | ||
| 837 | time = RCNR; | 838 | time = RCNR; |
| 838 | while(1) { | 839 | while (1) { |
| 839 | /* Check if any wakeup event had occurred */ | 840 | /* Check if any wakeup event had occurred */ |
| 840 | if (sharpsl_pm.machinfo->charger_wakeup() != 0) | 841 | if (sharpsl_pm.machinfo->charger_wakeup()) |
| 841 | return 0; | 842 | return 0; |
| 842 | /* Check for timeout */ | 843 | /* Check for timeout */ |
| 843 | if ((RCNR-time) > SHARPSL_WAIT_CO_TIME) { | 844 | if ((RCNR-time) > SHARPSL_WAIT_CO_TIME) { |
| @@ -864,12 +865,12 @@ static int sharpsl_off_charge_battery(void) | |||
| 864 | 865 | ||
| 865 | static ssize_t battery_percentage_show(struct device *dev, struct device_attribute *attr, char *buf) | 866 | static ssize_t battery_percentage_show(struct device *dev, struct device_attribute *attr, char *buf) |
| 866 | { | 867 | { |
| 867 | return sprintf(buf, "%d\n",sharpsl_pm.battstat.mainbat_percent); | 868 | return sprintf(buf, "%d\n", sharpsl_pm.battstat.mainbat_percent); |
| 868 | } | 869 | } |
| 869 | 870 | ||
| 870 | static ssize_t battery_voltage_show(struct device *dev, struct device_attribute *attr, char *buf) | 871 | static ssize_t battery_voltage_show(struct device *dev, struct device_attribute *attr, char *buf) |
| 871 | { | 872 | { |
| 872 | return sprintf(buf, "%d\n",sharpsl_pm.battstat.mainbat_voltage); | 873 | return sprintf(buf, "%d\n", sharpsl_pm.battstat.mainbat_voltage); |
| 873 | } | 874 | } |
| 874 | 875 | ||
| 875 | static DEVICE_ATTR(battery_percentage, 0444, battery_percentage_show, NULL); | 876 | static DEVICE_ATTR(battery_percentage, 0444, battery_percentage_show, NULL); |
| @@ -943,8 +944,7 @@ static int __init sharpsl_pm_probe(struct platform_device *pdev) | |||
| 943 | } | 944 | } |
| 944 | } | 945 | } |
| 945 | 946 | ||
| 946 | if (sharpsl_pm.machinfo->batfull_irq) | 947 | if (sharpsl_pm.machinfo->batfull_irq) { |
| 947 | { | ||
| 948 | /* Register interrupt handler. */ | 948 | /* Register interrupt handler. */ |
| 949 | if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING, "CO", sharpsl_chrg_full_isr)) { | 949 | if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING, "CO", sharpsl_chrg_full_isr)) { |
| 950 | dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull)); | 950 | dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull)); |
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 3da45d05174..4b50f144fa4 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c | |||
| @@ -768,6 +768,10 @@ static void __init common_init(void) | |||
| 768 | 768 | ||
| 769 | pxa2xx_mfp_config(ARRAY_AND_SIZE(spitz_pin_config)); | 769 | pxa2xx_mfp_config(ARRAY_AND_SIZE(spitz_pin_config)); |
| 770 | 770 | ||
| 771 | pxa_set_ffuart_info(NULL); | ||
| 772 | pxa_set_btuart_info(NULL); | ||
| 773 | pxa_set_stuart_info(NULL); | ||
| 774 | |||
| 771 | spitz_init_spi(); | 775 | spitz_init_spi(); |
| 772 | 776 | ||
| 773 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 777 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
| @@ -802,10 +806,12 @@ static void __init spitz_init(void) | |||
| 802 | { | 806 | { |
| 803 | spitz_ficp_platform_data.gpio_pwdown = SPITZ_GPIO_IR_ON; | 807 | spitz_ficp_platform_data.gpio_pwdown = SPITZ_GPIO_IR_ON; |
| 804 | 808 | ||
| 809 | #ifdef CONFIG_MACH_BORZOI | ||
| 805 | if (machine_is_borzoi()) { | 810 | if (machine_is_borzoi()) { |
| 806 | sharpsl_nand_platform_data.badblock_pattern = &sharpsl_akita_bbt; | 811 | sharpsl_nand_platform_data.badblock_pattern = &sharpsl_akita_bbt; |
| 807 | sharpsl_nand_platform_data.ecc_layout = &akita_oobinfo; | 812 | sharpsl_nand_platform_data.ecc_layout = &akita_oobinfo; |
| 808 | } | 813 | } |
| 814 | #endif | ||
| 809 | 815 | ||
| 810 | platform_scoop_config = &spitz_pcmcia_config; | 816 | platform_scoop_config = &spitz_pcmcia_config; |
| 811 | 817 | ||
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c index 724ffb03031..fc5a70c4035 100644 --- a/arch/arm/mach-pxa/spitz_pm.c +++ b/arch/arm/mach-pxa/spitz_pm.c | |||
| @@ -103,7 +103,7 @@ static void spitz_presuspend(void) | |||
| 103 | PFER = GPIO_bit(SPITZ_GPIO_KEY_INT) | GPIO_bit(SPITZ_GPIO_RESET); | 103 | PFER = GPIO_bit(SPITZ_GPIO_KEY_INT) | GPIO_bit(SPITZ_GPIO_RESET); |
| 104 | PWER = GPIO_bit(SPITZ_GPIO_KEY_INT) | GPIO_bit(SPITZ_GPIO_RESET) | PWER_RTC; | 104 | PWER = GPIO_bit(SPITZ_GPIO_KEY_INT) | GPIO_bit(SPITZ_GPIO_RESET) | PWER_RTC; |
| 105 | PKWR = GPIO_bit(SPITZ_GPIO_SYNC) | GPIO_bit(SPITZ_GPIO_KEY_INT) | GPIO_bit(SPITZ_GPIO_RESET); | 105 | PKWR = GPIO_bit(SPITZ_GPIO_SYNC) | GPIO_bit(SPITZ_GPIO_KEY_INT) | GPIO_bit(SPITZ_GPIO_RESET); |
| 106 | PKSR = 0xffffffff; // clear | 106 | PKSR = 0xffffffff; /* clear */ |
| 107 | 107 | ||
| 108 | /* nRESET_OUT Disable */ | 108 | /* nRESET_OUT Disable */ |
| 109 | PSLR |= PSLR_SL_ROD; | 109 | PSLR |= PSLR_SL_ROD; |
| @@ -149,7 +149,7 @@ static int spitz_should_wakeup(unsigned int resume_on_alarm) | |||
| 149 | if (resume_on_alarm && (PEDR & PWER_RTC)) | 149 | if (resume_on_alarm && (PEDR & PWER_RTC)) |
| 150 | is_resume |= PWER_RTC; | 150 | is_resume |= PWER_RTC; |
| 151 | 151 | ||
| 152 | dev_dbg(sharpsl_pm.dev, "is_resume: %x\n",is_resume); | 152 | dev_dbg(sharpsl_pm.dev, "is_resume: %x\n", is_resume); |
| 153 | return is_resume; | 153 | return is_resume; |
| 154 | } | 154 | } |
| 155 | 155 | ||
| @@ -160,7 +160,7 @@ static unsigned long spitz_charger_wakeup(void) | |||
| 160 | 160 | ||
| 161 | unsigned long spitzpm_read_devdata(int type) | 161 | unsigned long spitzpm_read_devdata(int type) |
| 162 | { | 162 | { |
| 163 | switch(type) { | 163 | switch (type) { |
| 164 | case SHARPSL_STATUS_ACIN: | 164 | case SHARPSL_STATUS_ACIN: |
| 165 | return (((~GPLR(SPITZ_GPIO_AC_IN)) & GPIO_bit(SPITZ_GPIO_AC_IN)) != 0); | 165 | return (((~GPLR(SPITZ_GPIO_AC_IN)) & GPIO_bit(SPITZ_GPIO_AC_IN)) != 0); |
| 166 | case SHARPSL_STATUS_LOCK: | 166 | case SHARPSL_STATUS_LOCK: |
| @@ -199,7 +199,7 @@ struct sharpsl_charger_machinfo spitz_pm_machinfo = { | |||
| 199 | #if defined(CONFIG_LCD_CORGI) | 199 | #if defined(CONFIG_LCD_CORGI) |
| 200 | .backlight_limit = corgi_lcd_limit_intensity, | 200 | .backlight_limit = corgi_lcd_limit_intensity, |
| 201 | #elif defined(CONFIG_BACKLIGHT_CORGI) | 201 | #elif defined(CONFIG_BACKLIGHT_CORGI) |
| 202 | .backlight_limit = corgibl_limit_intensity, | 202 | .backlight_limit = corgibl_limit_intensity, |
| 203 | #endif | 203 | #endif |
| 204 | .charge_on_volt = SHARPSL_CHARGE_ON_VOLT, | 204 | .charge_on_volt = SHARPSL_CHARGE_ON_VOLT, |
| 205 | .charge_on_temp = SHARPSL_CHARGE_ON_TEMP, | 205 | .charge_on_temp = SHARPSL_CHARGE_ON_TEMP, |
| @@ -208,8 +208,8 @@ struct sharpsl_charger_machinfo spitz_pm_machinfo = { | |||
| 208 | .fatal_acin_volt = SHARPSL_FATAL_ACIN_VOLT, | 208 | .fatal_acin_volt = SHARPSL_FATAL_ACIN_VOLT, |
| 209 | .fatal_noacin_volt= SHARPSL_FATAL_NOACIN_VOLT, | 209 | .fatal_noacin_volt= SHARPSL_FATAL_NOACIN_VOLT, |
| 210 | .bat_levels = 40, | 210 | .bat_levels = 40, |
| 211 | .bat_levels_noac = spitz_battery_levels_noac, | 211 | .bat_levels_noac = sharpsl_battery_levels_noac, |
| 212 | .bat_levels_acin = spitz_battery_levels_acin, | 212 | .bat_levels_acin = sharpsl_battery_levels_acin, |
| 213 | .status_high_acin = 188, | 213 | .status_high_acin = 188, |
| 214 | .status_low_acin = 178, | 214 | .status_low_acin = 178, |
| 215 | .status_high_noac = 185, | 215 | .status_high_noac = 185, |
| @@ -241,7 +241,7 @@ static int __devinit spitzpm_init(void) | |||
| 241 | 241 | ||
| 242 | static void spitzpm_exit(void) | 242 | static void spitzpm_exit(void) |
| 243 | { | 243 | { |
| 244 | platform_device_unregister(spitzpm_device); | 244 | platform_device_unregister(spitzpm_device); |
| 245 | } | 245 | } |
| 246 | 246 | ||
| 247 | module_init(spitzpm_init); | 247 | module_init(spitzpm_init); |
diff --git a/arch/arm/mach-pxa/ssp.c b/arch/arm/mach-pxa/ssp.c index 965e38c6baf..9ebe658590f 100644 --- a/arch/arm/mach-pxa/ssp.c +++ b/arch/arm/mach-pxa/ssp.c | |||
| @@ -342,8 +342,9 @@ void ssp_free(struct ssp_device *ssp) | |||
| 342 | } | 342 | } |
| 343 | EXPORT_SYMBOL(ssp_free); | 343 | EXPORT_SYMBOL(ssp_free); |
| 344 | 344 | ||
| 345 | static int __devinit ssp_probe(struct platform_device *pdev, int type) | 345 | static int __devinit ssp_probe(struct platform_device *pdev) |
| 346 | { | 346 | { |
| 347 | const struct platform_device_id *id = platform_get_device_id(pdev); | ||
| 347 | struct resource *res; | 348 | struct resource *res; |
| 348 | struct ssp_device *ssp; | 349 | struct ssp_device *ssp; |
| 349 | int ret = 0; | 350 | int ret = 0; |
| @@ -413,7 +414,7 @@ static int __devinit ssp_probe(struct platform_device *pdev, int type) | |||
| 413 | */ | 414 | */ |
| 414 | ssp->port_id = pdev->id + 1; | 415 | ssp->port_id = pdev->id + 1; |
| 415 | ssp->use_count = 0; | 416 | ssp->use_count = 0; |
| 416 | ssp->type = type; | 417 | ssp->type = (int)id->driver_data; |
| 417 | 418 | ||
| 418 | mutex_lock(&ssp_lock); | 419 | mutex_lock(&ssp_lock); |
| 419 | list_add(&ssp->node, &ssp_list); | 420 | list_add(&ssp->node, &ssp_list); |
| @@ -457,75 +458,31 @@ static int __devexit ssp_remove(struct platform_device *pdev) | |||
| 457 | return 0; | 458 | return 0; |
| 458 | } | 459 | } |
| 459 | 460 | ||
| 460 | static int __devinit pxa25x_ssp_probe(struct platform_device *pdev) | 461 | static const struct platform_device_id ssp_id_table[] = { |
| 461 | { | 462 | { "pxa25x-ssp", PXA25x_SSP }, |
| 462 | return ssp_probe(pdev, PXA25x_SSP); | 463 | { "pxa25x-nssp", PXA25x_NSSP }, |
| 463 | } | 464 | { "pxa27x-ssp", PXA27x_SSP }, |
| 464 | 465 | { }, | |
| 465 | static int __devinit pxa25x_nssp_probe(struct platform_device *pdev) | ||
| 466 | { | ||
| 467 | return ssp_probe(pdev, PXA25x_NSSP); | ||
| 468 | } | ||
| 469 | |||
| 470 | static int __devinit pxa27x_ssp_probe(struct platform_device *pdev) | ||
| 471 | { | ||
| 472 | return ssp_probe(pdev, PXA27x_SSP); | ||
| 473 | } | ||
| 474 | |||
| 475 | static struct platform_driver pxa25x_ssp_driver = { | ||
| 476 | .driver = { | ||
| 477 | .name = "pxa25x-ssp", | ||
| 478 | }, | ||
| 479 | .probe = pxa25x_ssp_probe, | ||
| 480 | .remove = __devexit_p(ssp_remove), | ||
| 481 | }; | 466 | }; |
| 482 | 467 | ||
| 483 | static struct platform_driver pxa25x_nssp_driver = { | 468 | static struct platform_driver ssp_driver = { |
| 484 | .driver = { | 469 | .probe = ssp_probe, |
| 485 | .name = "pxa25x-nssp", | ||
| 486 | }, | ||
| 487 | .probe = pxa25x_nssp_probe, | ||
| 488 | .remove = __devexit_p(ssp_remove), | 470 | .remove = __devexit_p(ssp_remove), |
| 489 | }; | ||
| 490 | |||
| 491 | static struct platform_driver pxa27x_ssp_driver = { | ||
| 492 | .driver = { | 471 | .driver = { |
| 493 | .name = "pxa27x-ssp", | 472 | .owner = THIS_MODULE, |
| 473 | .name = "pxa2xx-ssp", | ||
| 494 | }, | 474 | }, |
| 495 | .probe = pxa27x_ssp_probe, | 475 | .id_table = ssp_id_table, |
| 496 | .remove = __devexit_p(ssp_remove), | ||
| 497 | }; | 476 | }; |
| 498 | 477 | ||
| 499 | static int __init pxa_ssp_init(void) | 478 | static int __init pxa_ssp_init(void) |
| 500 | { | 479 | { |
| 501 | int ret = 0; | 480 | return platform_driver_register(&ssp_driver); |
| 502 | |||
| 503 | ret = platform_driver_register(&pxa25x_ssp_driver); | ||
| 504 | if (ret) { | ||
| 505 | printk(KERN_ERR "failed to register pxa25x_ssp_driver"); | ||
| 506 | return ret; | ||
| 507 | } | ||
| 508 | |||
| 509 | ret = platform_driver_register(&pxa25x_nssp_driver); | ||
| 510 | if (ret) { | ||
| 511 | printk(KERN_ERR "failed to register pxa25x_nssp_driver"); | ||
| 512 | return ret; | ||
| 513 | } | ||
| 514 | |||
| 515 | ret = platform_driver_register(&pxa27x_ssp_driver); | ||
| 516 | if (ret) { | ||
| 517 | printk(KERN_ERR "failed to register pxa27x_ssp_driver"); | ||
| 518 | return ret; | ||
| 519 | } | ||
| 520 | |||
| 521 | return ret; | ||
| 522 | } | 481 | } |
| 523 | 482 | ||
| 524 | static void __exit pxa_ssp_exit(void) | 483 | static void __exit pxa_ssp_exit(void) |
| 525 | { | 484 | { |
| 526 | platform_driver_unregister(&pxa25x_ssp_driver); | 485 | platform_driver_unregister(&ssp_driver); |
| 527 | platform_driver_unregister(&pxa25x_nssp_driver); | ||
| 528 | platform_driver_unregister(&pxa27x_ssp_driver); | ||
| 529 | } | 486 | } |
| 530 | 487 | ||
| 531 | arch_initcall(pxa_ssp_init); | 488 | arch_initcall(pxa_ssp_init); |
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c index 3b205b69f3f..a98a434f011 100644 --- a/arch/arm/mach-pxa/stargate2.c +++ b/arch/arm/mach-pxa/stargate2.c | |||
| @@ -760,6 +760,10 @@ static void __init stargate2_init(void) | |||
| 760 | 760 | ||
| 761 | pxa2xx_mfp_config(ARRAY_AND_SIZE(stargate2_pin_config)); | 761 | pxa2xx_mfp_config(ARRAY_AND_SIZE(stargate2_pin_config)); |
| 762 | 762 | ||
| 763 | pxa_set_ffuart_info(NULL); | ||
| 764 | pxa_set_btuart_info(NULL); | ||
| 765 | pxa_set_stuart_info(NULL); | ||
| 766 | |||
| 763 | /* spi chip selects */ | 767 | /* spi chip selects */ |
| 764 | gpio_direction_output(37, 0); | 768 | gpio_direction_output(37, 0); |
| 765 | gpio_direction_output(24, 0); | 769 | gpio_direction_output(24, 0); |
diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c index b75353a2ec7..f02dcb5b4e9 100644 --- a/arch/arm/mach-pxa/tavorevb.c +++ b/arch/arm/mach-pxa/tavorevb.c | |||
| @@ -477,6 +477,10 @@ static void __init tavorevb_init(void) | |||
| 477 | /* initialize MFP configurations */ | 477 | /* initialize MFP configurations */ |
| 478 | pxa3xx_mfp_config(ARRAY_AND_SIZE(tavorevb_mfp_cfg)); | 478 | pxa3xx_mfp_config(ARRAY_AND_SIZE(tavorevb_mfp_cfg)); |
| 479 | 479 | ||
| 480 | pxa_set_ffuart_info(NULL); | ||
| 481 | pxa_set_btuart_info(NULL); | ||
| 482 | pxa_set_stuart_info(NULL); | ||
| 483 | |||
| 480 | platform_device_register(&smc91x_device); | 484 | platform_device_register(&smc91x_device); |
| 481 | 485 | ||
| 482 | tavorevb_init_lcd(); | 486 | tavorevb_init_lcd(); |
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c index e81a52673d4..c854c168a45 100644 --- a/arch/arm/mach-pxa/tosa.c +++ b/arch/arm/mach-pxa/tosa.c | |||
| @@ -825,6 +825,11 @@ static void __init tosa_init(void) | |||
| 825 | int dummy; | 825 | int dummy; |
| 826 | 826 | ||
| 827 | pxa2xx_mfp_config(ARRAY_AND_SIZE(tosa_pin_config)); | 827 | pxa2xx_mfp_config(ARRAY_AND_SIZE(tosa_pin_config)); |
| 828 | |||
| 829 | pxa_set_ffuart_info(NULL); | ||
| 830 | pxa_set_btuart_info(NULL); | ||
| 831 | pxa_set_stuart_info(NULL); | ||
| 832 | |||
| 828 | gpio_set_wake(MFP_PIN_GPIO1, 1); | 833 | gpio_set_wake(MFP_PIN_GPIO1, 1); |
| 829 | /* We can't pass to gpio-keys since it will drop the Reset altfunc */ | 834 | /* We can't pass to gpio-keys since it will drop the Reset altfunc */ |
| 830 | 835 | ||
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c index 3981e0356d1..0aa858ebc57 100644 --- a/arch/arm/mach-pxa/trizeps4.c +++ b/arch/arm/mach-pxa/trizeps4.c | |||
| @@ -524,6 +524,10 @@ static void __init trizeps4_init(void) | |||
| 524 | ARRAY_SIZE(trizeps4_devices)); | 524 | ARRAY_SIZE(trizeps4_devices)); |
| 525 | } | 525 | } |
| 526 | 526 | ||
| 527 | pxa_set_ffuart_info(NULL); | ||
| 528 | pxa_set_btuart_info(NULL); | ||
| 529 | pxa_set_stuart_info(NULL); | ||
| 530 | |||
| 527 | if (0) /* dont know how to determine LCD */ | 531 | if (0) /* dont know how to determine LCD */ |
| 528 | set_pxa_fb_info(&sharp_lcd); | 532 | set_pxa_fb_info(&sharp_lcd); |
| 529 | else | 533 | else |
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c index d33c232b686..cf0d71b7797 100644 --- a/arch/arm/mach-pxa/viper.c +++ b/arch/arm/mach-pxa/viper.c | |||
| @@ -301,15 +301,6 @@ static void __init viper_init_irq(void) | |||
| 301 | set_irq_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO), | 301 | set_irq_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO), |
| 302 | viper_irq_handler); | 302 | viper_irq_handler); |
| 303 | set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH); | 303 | set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH); |
| 304 | |||
| 305 | #ifndef CONFIG_SERIAL_PXA | ||
| 306 | /* | ||
| 307 | * 8250 doesn't support IRQ_TYPE being passed as part | ||
| 308 | * of the plat_serial8250_port structure... | ||
| 309 | */ | ||
| 310 | set_irq_type(gpio_to_irq(VIPER_UARTA_GPIO), IRQ_TYPE_EDGE_RISING); | ||
| 311 | set_irq_type(gpio_to_irq(VIPER_UARTB_GPIO), IRQ_TYPE_EDGE_RISING); | ||
| 312 | #endif | ||
| 313 | } | 304 | } |
| 314 | 305 | ||
| 315 | /* Flat Panel */ | 306 | /* Flat Panel */ |
| @@ -539,6 +530,7 @@ static struct plat_serial8250_port serial_platform_data[] = { | |||
| 539 | { | 530 | { |
| 540 | .mapbase = VIPER_UARTA_PHYS, | 531 | .mapbase = VIPER_UARTA_PHYS, |
| 541 | .irq = gpio_to_irq(VIPER_UARTA_GPIO), | 532 | .irq = gpio_to_irq(VIPER_UARTA_GPIO), |
| 533 | .irqflags = IRQF_TRIGGER_RISING, | ||
| 542 | .uartclk = 1843200, | 534 | .uartclk = 1843200, |
| 543 | .regshift = 1, | 535 | .regshift = 1, |
| 544 | .iotype = UPIO_MEM, | 536 | .iotype = UPIO_MEM, |
| @@ -548,6 +540,7 @@ static struct plat_serial8250_port serial_platform_data[] = { | |||
| 548 | { | 540 | { |
| 549 | .mapbase = VIPER_UARTB_PHYS, | 541 | .mapbase = VIPER_UARTB_PHYS, |
| 550 | .irq = gpio_to_irq(VIPER_UARTB_GPIO), | 542 | .irq = gpio_to_irq(VIPER_UARTB_GPIO), |
| 543 | .irqflags = IRQF_TRIGGER_RISING, | ||
| 551 | .uartclk = 1843200, | 544 | .uartclk = 1843200, |
| 552 | .regshift = 1, | 545 | .regshift = 1, |
| 553 | .iotype = UPIO_MEM, | 546 | .iotype = UPIO_MEM, |
| @@ -908,6 +901,10 @@ static void __init viper_init(void) | |||
| 908 | 901 | ||
| 909 | pxa2xx_mfp_config(ARRAY_AND_SIZE(viper_pin_config)); | 902 | pxa2xx_mfp_config(ARRAY_AND_SIZE(viper_pin_config)); |
| 910 | 903 | ||
| 904 | pxa_set_ffuart_info(NULL); | ||
| 905 | pxa_set_btuart_info(NULL); | ||
| 906 | pxa_set_stuart_info(NULL); | ||
| 907 | |||
| 911 | /* Wake-up serial console */ | 908 | /* Wake-up serial console */ |
| 912 | viper_init_serial_gpio(); | 909 | viper_init_serial_gpio(); |
| 913 | 910 | ||
diff --git a/arch/arm/mach-pxa/xcep.c b/arch/arm/mach-pxa/xcep.c index 3fd79cbb36c..d3b4e3f2e03 100644 --- a/arch/arm/mach-pxa/xcep.c +++ b/arch/arm/mach-pxa/xcep.c | |||
| @@ -165,6 +165,11 @@ static void __init xcep_init(void) | |||
| 165 | { | 165 | { |
| 166 | pxa2xx_mfp_config(ARRAY_AND_SIZE(xcep_pin_config)); | 166 | pxa2xx_mfp_config(ARRAY_AND_SIZE(xcep_pin_config)); |
| 167 | 167 | ||
| 168 | pxa_set_ffuart_info(NULL); | ||
| 169 | pxa_set_btuart_info(NULL); | ||
| 170 | pxa_set_stuart_info(NULL); | ||
| 171 | pxa_set_hwuart_info(NULL); | ||
| 172 | |||
| 168 | /* See Intel XScale Developer's Guide for details */ | 173 | /* See Intel XScale Developer's Guide for details */ |
| 169 | /* Set RDF and RDN to appropriate values (chip select 3 (smc91x)) */ | 174 | /* Set RDF and RDN to appropriate values (chip select 3 (smc91x)) */ |
| 170 | MSC1 = (MSC1 & 0xffff) | 0xD5540000; | 175 | MSC1 = (MSC1 & 0xffff) | 0xD5540000; |
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c index 09784d3954e..b66e9e2d06e 100644 --- a/arch/arm/mach-pxa/zylonite.c +++ b/arch/arm/mach-pxa/zylonite.c | |||
| @@ -31,7 +31,7 @@ | |||
| 31 | #include <mach/mmc.h> | 31 | #include <mach/mmc.h> |
| 32 | #include <mach/ohci.h> | 32 | #include <mach/ohci.h> |
| 33 | #include <mach/pxa27x_keypad.h> | 33 | #include <mach/pxa27x_keypad.h> |
| 34 | #include <mach/pxa3xx_nand.h> | 34 | #include <plat/pxa3xx_nand.h> |
| 35 | 35 | ||
| 36 | #include "devices.h" | 36 | #include "devices.h" |
| 37 | #include "generic.h" | 37 | #include "generic.h" |
| @@ -444,6 +444,10 @@ static inline void zylonite_init_ohci(void) {} | |||
| 444 | 444 | ||
| 445 | static void __init zylonite_init(void) | 445 | static void __init zylonite_init(void) |
| 446 | { | 446 | { |
| 447 | pxa_set_ffuart_info(NULL); | ||
| 448 | pxa_set_btuart_info(NULL); | ||
| 449 | pxa_set_stuart_info(NULL); | ||
| 450 | |||
| 447 | /* board-processor specific initialization */ | 451 | /* board-processor specific initialization */ |
| 448 | zylonite_pxa300_init(); | 452 | zylonite_pxa300_init(); |
| 449 | zylonite_pxa320_init(); | 453 | zylonite_pxa320_init(); |
diff --git a/arch/arm/mach-s3c2400/include/mach/map.h b/arch/arm/mach-s3c2400/include/mach/map.h index 1535540edc8..3fd889200e9 100644 --- a/arch/arm/mach-s3c2400/include/mach/map.h +++ b/arch/arm/mach-s3c2400/include/mach/map.h | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* arch/arm/mach-s3c2400/include/mach/map.h | 1 | /* arch/arm/mach-s3c2400/include/mach/map.h |
| 2 | * | 2 | * |
| 3 | * Copyright 2003,2007 Simtec Electronics | 3 | * Copyright 2003-2007 Simtec Electronics |
| 4 | * http://armlinux.simtec.co.uk/ | 4 | * http://armlinux.simtec.co.uk/ |
| 5 | * Ben Dooks <ben@simtec.co.uk> | 5 | * Ben Dooks <ben@simtec.co.uk> |
| 6 | * | 6 | * |
diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig index 3d4e9da3fa5..dd1fcc7e670 100644 --- a/arch/arm/mach-s3c2410/Kconfig +++ b/arch/arm/mach-s3c2410/Kconfig | |||
| @@ -81,6 +81,14 @@ config ARCH_H1940 | |||
| 81 | help | 81 | help |
| 82 | Say Y here if you are using the HP IPAQ H1940 | 82 | Say Y here if you are using the HP IPAQ H1940 |
| 83 | 83 | ||
| 84 | config H1940BT | ||
| 85 | tristate "Control the state of H1940 bluetooth chip" | ||
| 86 | depends on ARCH_H1940 | ||
| 87 | select RFKILL | ||
| 88 | help | ||
| 89 | This is a simple driver that is able to control | ||
| 90 | the state of built in bluetooth chip on h1940. | ||
| 91 | |||
| 84 | config PM_H1940 | 92 | config PM_H1940 |
| 85 | bool | 93 | bool |
| 86 | help | 94 | help |
diff --git a/arch/arm/mach-s3c2410/Makefile b/arch/arm/mach-s3c2410/Makefile index 2ab5ba4b266..0d468e96e83 100644 --- a/arch/arm/mach-s3c2410/Makefile +++ b/arch/arm/mach-s3c2410/Makefile | |||
| @@ -21,7 +21,8 @@ obj-$(CONFIG_S3C2410_PLLTABLE) += pll.o | |||
| 21 | # Machine support | 21 | # Machine support |
| 22 | 22 | ||
| 23 | obj-$(CONFIG_ARCH_SMDK2410) += mach-smdk2410.o | 23 | obj-$(CONFIG_ARCH_SMDK2410) += mach-smdk2410.o |
| 24 | obj-$(CONFIG_ARCH_H1940) += mach-h1940.o h1940-bluetooth.o | 24 | obj-$(CONFIG_ARCH_H1940) += mach-h1940.o |
| 25 | obj-$(CONFIG_H1940BT) += h1940-bluetooth.o | ||
| 25 | obj-$(CONFIG_PM_H1940) += pm-h1940.o | 26 | obj-$(CONFIG_PM_H1940) += pm-h1940.o |
| 26 | obj-$(CONFIG_MACH_N30) += mach-n30.o | 27 | obj-$(CONFIG_MACH_N30) += mach-n30.o |
| 27 | obj-$(CONFIG_ARCH_BAST) += mach-bast.o usb-simtec.o | 28 | obj-$(CONFIG_ARCH_BAST) += mach-bast.o usb-simtec.o |
diff --git a/arch/arm/mach-s3c2410/bast-irq.c b/arch/arm/mach-s3c2410/bast-irq.c index 9a37c87152b..217b102866d 100644 --- a/arch/arm/mach-s3c2410/bast-irq.c +++ b/arch/arm/mach-s3c2410/bast-irq.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* linux/arch/arm/mach-s3c2410/bast-irq.c | 1 | /* linux/arch/arm/mach-s3c2410/bast-irq.c |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2003,2005 Simtec Electronics | 3 | * Copyright 2003-2005 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * | 5 | * |
| 6 | * http://www.simtec.co.uk/products/EB2410ITX/ | 6 | * http://www.simtec.co.uk/products/EB2410ITX/ |
| @@ -141,7 +141,7 @@ static __init int bast_irq_init(void) | |||
| 141 | unsigned int i; | 141 | unsigned int i; |
| 142 | 142 | ||
| 143 | if (machine_is_bast()) { | 143 | if (machine_is_bast()) { |
| 144 | printk(KERN_INFO "BAST PC104 IRQ routing, (c) 2005 Simtec Electronics\n"); | 144 | printk(KERN_INFO "BAST PC104 IRQ routing, Copyright 2005 Simtec Electronics\n"); |
| 145 | 145 | ||
| 146 | /* zap all the IRQs */ | 146 | /* zap all the IRQs */ |
| 147 | 147 | ||
diff --git a/arch/arm/mach-s3c2410/cpu-freq.c b/arch/arm/mach-s3c2410/cpu-freq.c index 9d1186877d0..75189df995a 100644 --- a/arch/arm/mach-s3c2410/cpu-freq.c +++ b/arch/arm/mach-s3c2410/cpu-freq.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* linux/arch/arm/mach-s3c2410/cpu-freq.c | 1 | /* linux/arch/arm/mach-s3c2410/cpu-freq.c |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2006,2008 Simtec Electronics | 3 | * Copyright (c) 2006-2008 Simtec Electronics |
| 4 | * http://armlinux.simtec.co.uk/ | 4 | * http://armlinux.simtec.co.uk/ |
| 5 | * Ben Dooks <ben@simtec.co.uk> | 5 | * Ben Dooks <ben@simtec.co.uk> |
| 6 | * | 6 | * |
diff --git a/arch/arm/mach-s3c2410/h1940-bluetooth.c b/arch/arm/mach-s3c2410/h1940-bluetooth.c index 5aabf117cbb..b7d1f8d27bc 100644 --- a/arch/arm/mach-s3c2410/h1940-bluetooth.c +++ b/arch/arm/mach-s3c2410/h1940-bluetooth.c | |||
| @@ -17,6 +17,7 @@ | |||
| 17 | #include <linux/ctype.h> | 17 | #include <linux/ctype.h> |
| 18 | #include <linux/leds.h> | 18 | #include <linux/leds.h> |
| 19 | #include <linux/gpio.h> | 19 | #include <linux/gpio.h> |
| 20 | #include <linux/rfkill.h> | ||
| 20 | 21 | ||
| 21 | #include <mach/regs-gpio.h> | 22 | #include <mach/regs-gpio.h> |
| 22 | #include <mach/hardware.h> | 23 | #include <mach/hardware.h> |
| @@ -24,21 +25,10 @@ | |||
| 24 | 25 | ||
| 25 | #define DRV_NAME "h1940-bt" | 26 | #define DRV_NAME "h1940-bt" |
| 26 | 27 | ||
| 27 | #ifdef CONFIG_LEDS_H1940 | ||
| 28 | DEFINE_LED_TRIGGER(bt_led_trigger); | ||
| 29 | #endif | ||
| 30 | |||
| 31 | static int state; | ||
| 32 | |||
| 33 | /* Bluetooth control */ | 28 | /* Bluetooth control */ |
| 34 | static void h1940bt_enable(int on) | 29 | static void h1940bt_enable(int on) |
| 35 | { | 30 | { |
| 36 | if (on) { | 31 | if (on) { |
| 37 | #ifdef CONFIG_LEDS_H1940 | ||
| 38 | /* flashing Blue */ | ||
| 39 | led_trigger_event(bt_led_trigger, LED_HALF); | ||
| 40 | #endif | ||
| 41 | |||
| 42 | /* Power on the chip */ | 32 | /* Power on the chip */ |
| 43 | h1940_latch_control(0, H1940_LATCH_BLUETOOTH_POWER); | 33 | h1940_latch_control(0, H1940_LATCH_BLUETOOTH_POWER); |
| 44 | /* Reset the chip */ | 34 | /* Reset the chip */ |
| @@ -46,48 +36,31 @@ static void h1940bt_enable(int on) | |||
| 46 | s3c2410_gpio_setpin(S3C2410_GPH(1), 1); | 36 | s3c2410_gpio_setpin(S3C2410_GPH(1), 1); |
| 47 | mdelay(10); | 37 | mdelay(10); |
| 48 | s3c2410_gpio_setpin(S3C2410_GPH(1), 0); | 38 | s3c2410_gpio_setpin(S3C2410_GPH(1), 0); |
| 49 | |||
| 50 | state = 1; | ||
| 51 | } | 39 | } |
| 52 | else { | 40 | else { |
| 53 | #ifdef CONFIG_LEDS_H1940 | ||
| 54 | led_trigger_event(bt_led_trigger, 0); | ||
| 55 | #endif | ||
| 56 | |||
| 57 | s3c2410_gpio_setpin(S3C2410_GPH(1), 1); | 41 | s3c2410_gpio_setpin(S3C2410_GPH(1), 1); |
| 58 | mdelay(10); | 42 | mdelay(10); |
| 59 | s3c2410_gpio_setpin(S3C2410_GPH(1), 0); | 43 | s3c2410_gpio_setpin(S3C2410_GPH(1), 0); |
| 60 | mdelay(10); | 44 | mdelay(10); |
| 61 | h1940_latch_control(H1940_LATCH_BLUETOOTH_POWER, 0); | 45 | h1940_latch_control(H1940_LATCH_BLUETOOTH_POWER, 0); |
| 62 | |||
| 63 | state = 0; | ||
| 64 | } | 46 | } |
| 65 | } | 47 | } |
| 66 | 48 | ||
| 67 | static ssize_t h1940bt_show(struct device *dev, struct device_attribute *attr, char *buf) | 49 | static int h1940bt_set_block(void *data, bool blocked) |
| 68 | { | 50 | { |
| 69 | return snprintf(buf, PAGE_SIZE, "%d\n", state); | 51 | h1940bt_enable(!blocked); |
| 52 | return 0; | ||
| 70 | } | 53 | } |
| 71 | 54 | ||
| 72 | static ssize_t h1940bt_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) | 55 | static const struct rfkill_ops h1940bt_rfkill_ops = { |
| 73 | { | 56 | .set_block = h1940bt_set_block, |
| 74 | int new_state; | 57 | }; |
| 75 | char *endp; | ||
| 76 | |||
| 77 | new_state = simple_strtoul(buf, &endp, 0); | ||
| 78 | if (*endp && !isspace(*endp)) | ||
| 79 | return -EINVAL; | ||
| 80 | |||
| 81 | h1940bt_enable(new_state); | ||
| 82 | |||
| 83 | return count; | ||
| 84 | } | ||
| 85 | static DEVICE_ATTR(enable, 0644, | ||
| 86 | h1940bt_show, | ||
| 87 | h1940bt_store); | ||
| 88 | 58 | ||
| 89 | static int __init h1940bt_probe(struct platform_device *pdev) | 59 | static int __init h1940bt_probe(struct platform_device *pdev) |
| 90 | { | 60 | { |
| 61 | struct rfkill *rfk; | ||
| 62 | int ret = 0; | ||
| 63 | |||
| 91 | /* Configures BT serial port GPIOs */ | 64 | /* Configures BT serial port GPIOs */ |
| 92 | s3c2410_gpio_cfgpin(S3C2410_GPH(0), S3C2410_GPH0_nCTS0); | 65 | s3c2410_gpio_cfgpin(S3C2410_GPH(0), S3C2410_GPH0_nCTS0); |
| 93 | s3c2410_gpio_pullup(S3C2410_GPH(0), 1); | 66 | s3c2410_gpio_pullup(S3C2410_GPH(0), 1); |
| @@ -98,21 +71,44 @@ static int __init h1940bt_probe(struct platform_device *pdev) | |||
| 98 | s3c2410_gpio_cfgpin(S3C2410_GPH(3), S3C2410_GPH3_RXD0); | 71 | s3c2410_gpio_cfgpin(S3C2410_GPH(3), S3C2410_GPH3_RXD0); |
| 99 | s3c2410_gpio_pullup(S3C2410_GPH(3), 1); | 72 | s3c2410_gpio_pullup(S3C2410_GPH(3), 1); |
| 100 | 73 | ||
| 101 | #ifdef CONFIG_LEDS_H1940 | ||
| 102 | led_trigger_register_simple("h1940-bluetooth", &bt_led_trigger); | ||
| 103 | #endif | ||
| 104 | 74 | ||
| 105 | /* disable BT by default */ | 75 | rfk = rfkill_alloc(DRV_NAME, &pdev->dev, RFKILL_TYPE_BLUETOOTH, |
| 106 | h1940bt_enable(0); | 76 | &h1940bt_rfkill_ops, NULL); |
| 77 | if (!rfk) { | ||
| 78 | ret = -ENOMEM; | ||
| 79 | goto err_rfk_alloc; | ||
| 80 | } | ||
| 81 | |||
| 82 | rfkill_set_led_trigger_name(rfk, "h1940-bluetooth"); | ||
| 83 | |||
| 84 | ret = rfkill_register(rfk); | ||
| 85 | if (ret) | ||
| 86 | goto err_rfkill; | ||
| 87 | |||
| 88 | platform_set_drvdata(pdev, rfk); | ||
| 89 | |||
| 90 | return 0; | ||
| 107 | 91 | ||
| 108 | return device_create_file(&pdev->dev, &dev_attr_enable); | 92 | err_rfkill: |
| 93 | rfkill_destroy(rfk); | ||
| 94 | err_rfk_alloc: | ||
| 95 | return ret; | ||
| 109 | } | 96 | } |
| 110 | 97 | ||
| 111 | static int h1940bt_remove(struct platform_device *pdev) | 98 | static int h1940bt_remove(struct platform_device *pdev) |
| 112 | { | 99 | { |
| 113 | #ifdef CONFIG_LEDS_H1940 | 100 | struct rfkill *rfk = platform_get_drvdata(pdev); |
| 114 | led_trigger_unregister_simple(bt_led_trigger); | 101 | |
| 115 | #endif | 102 | platform_set_drvdata(pdev, NULL); |
| 103 | |||
| 104 | if (rfk) { | ||
| 105 | rfkill_unregister(rfk); | ||
| 106 | rfkill_destroy(rfk); | ||
| 107 | } | ||
| 108 | rfk = NULL; | ||
| 109 | |||
| 110 | h1940bt_enable(0); | ||
| 111 | |||
| 116 | return 0; | 112 | return 0; |
| 117 | } | 113 | } |
| 118 | 114 | ||
diff --git a/arch/arm/mach-s3c2410/include/mach/bast-cpld.h b/arch/arm/mach-s3c2410/include/mach/bast-cpld.h index 20493b04836..bee2a7a932a 100644 --- a/arch/arm/mach-s3c2410/include/mach/bast-cpld.h +++ b/arch/arm/mach-s3c2410/include/mach/bast-cpld.h | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* arch/arm/mach-s3c2410/include/mach/bast-cpld.h | 1 | /* arch/arm/mach-s3c2410/include/mach/bast-cpld.h |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2003,2004 Simtec Electronics | 3 | * Copyright (c) 2003-2004 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * | 5 | * |
| 6 | * BAST - CPLD control constants | 6 | * BAST - CPLD control constants |
diff --git a/arch/arm/mach-s3c2410/include/mach/bast-irq.h b/arch/arm/mach-s3c2410/include/mach/bast-irq.h index 501c202b53c..cac428c42e7 100644 --- a/arch/arm/mach-s3c2410/include/mach/bast-irq.h +++ b/arch/arm/mach-s3c2410/include/mach/bast-irq.h | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* arch/arm/mach-s3c2410/include/mach/bast-irq.h | 1 | /* arch/arm/mach-s3c2410/include/mach/bast-irq.h |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2003,2004 Simtec Electronics | 3 | * Copyright (c) 2003-2004 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * | 5 | * |
| 6 | * Machine BAST - IRQ Number definitions | 6 | * Machine BAST - IRQ Number definitions |
diff --git a/arch/arm/mach-s3c2410/include/mach/bast-map.h b/arch/arm/mach-s3c2410/include/mach/bast-map.h index c2c5baf0734..6e7dc9d0cf0 100644 --- a/arch/arm/mach-s3c2410/include/mach/bast-map.h +++ b/arch/arm/mach-s3c2410/include/mach/bast-map.h | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* arch/arm/mach-s3c2410/include/mach/bast-map.h | 1 | /* arch/arm/mach-s3c2410/include/mach/bast-map.h |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2003,2004 Simtec Electronics | 3 | * Copyright (c) 2003-2004 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * | 5 | * |
| 6 | * Machine BAST - Memory map definitions | 6 | * Machine BAST - Memory map definitions |
diff --git a/arch/arm/mach-s3c2410/include/mach/bast-pmu.h b/arch/arm/mach-s3c2410/include/mach/bast-pmu.h index 61684cb8ce5..4c38b39b741 100644 --- a/arch/arm/mach-s3c2410/include/mach/bast-pmu.h +++ b/arch/arm/mach-s3c2410/include/mach/bast-pmu.h | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* arch/arm/mach-s3c2410/include/mach/bast-pmu.h | 1 | /* arch/arm/mach-s3c2410/include/mach/bast-pmu.h |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2003,2004 Simtec Electronics | 3 | * Copyright (c) 2003-2004 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * Vincent Sanders <vince@simtec.co.uk> | 5 | * Vincent Sanders <vince@simtec.co.uk> |
| 6 | * | 6 | * |
diff --git a/arch/arm/mach-s3c2410/include/mach/dma.h b/arch/arm/mach-s3c2410/include/mach/dma.h index 92e2687009e..08ac5f96c01 100644 --- a/arch/arm/mach-s3c2410/include/mach/dma.h +++ b/arch/arm/mach-s3c2410/include/mach/dma.h | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* arch/arm/mach-s3c2410/include/mach/dma.h | 1 | /* arch/arm/mach-s3c2410/include/mach/dma.h |
| 2 | * | 2 | * |
| 3 | * Copyright (C) 2003,2004,2006 Simtec Electronics | 3 | * Copyright (C) 2003-2006 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * | 5 | * |
| 6 | * Samsung S3C24XX DMA support | 6 | * Samsung S3C24XX DMA support |
diff --git a/arch/arm/mach-s3c2410/include/mach/gpio-fns.h b/arch/arm/mach-s3c2410/include/mach/gpio-fns.h index 801dff13858..035a493952d 100644 --- a/arch/arm/mach-s3c2410/include/mach/gpio-fns.h +++ b/arch/arm/mach-s3c2410/include/mach/gpio-fns.h | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* arch/arm/mach-s3c2410/include/mach/gpio-fns.h | 1 | /* arch/arm/mach-s3c2410/include/mach/gpio-fns.h |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2003,2009 Simtec Electronics | 3 | * Copyright (c) 2003-2009 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * | 5 | * |
| 6 | * S3C2410 - hardware | 6 | * S3C2410 - hardware |
diff --git a/arch/arm/mach-s3c2410/include/mach/osiris-map.h b/arch/arm/mach-s3c2410/include/mach/osiris-map.h index 639eff523d4..17380f84842 100644 --- a/arch/arm/mach-s3c2410/include/mach/osiris-map.h +++ b/arch/arm/mach-s3c2410/include/mach/osiris-map.h | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* arch/arm/mach-s3c2410/include/mach/osiris-map.h | 1 | /* arch/arm/mach-s3c2410/include/mach/osiris-map.h |
| 2 | * | 2 | * |
| 3 | * (c) 2005 Simtec Electronics | 3 | * Copyright 2005 Simtec Electronics |
| 4 | * http://www.simtec.co.uk/products/ | 4 | * http://www.simtec.co.uk/products/ |
| 5 | * Ben Dooks <ben@simtec.co.uk> | 5 | * Ben Dooks <ben@simtec.co.uk> |
| 6 | * | 6 | * |
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-clock.h b/arch/arm/mach-s3c2410/include/mach/regs-clock.h index 2a5d90e957f..9a0d169be13 100644 --- a/arch/arm/mach-s3c2410/include/mach/regs-clock.h +++ b/arch/arm/mach-s3c2410/include/mach/regs-clock.h | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | /* arch/arm/mach-s3c2410/include/mach/regs-clock.h | 1 | /* arch/arm/mach-s3c2410/include/mach/regs-clock.h |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2003,2004,2005,2006 Simtec Electronics <linux@simtec.co.uk> | 3 | * Copyright (c) 2003-2006 Simtec Electronics <linux@simtec.co.uk> |
| 4 | * http://armlinux.simtec.co.uk/ | 4 | * http://armlinux.simtec.co.uk/ |
| 5 | * | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-gpio.h b/arch/arm/mach-s3c2410/include/mach/regs-gpio.h index f6e8eec879c..ebc85c6dadb 100644 --- a/arch/arm/mach-s3c2410/include/mach/regs-gpio.h +++ b/arch/arm/mach-s3c2410/include/mach/regs-gpio.h | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | /* arch/arm/mach-s3c2410/include/mach/regs-gpio.h | 1 | /* arch/arm/mach-s3c2410/include/mach/regs-gpio.h |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2003,2004 Simtec Electronics <linux@simtec.co.uk> | 3 | * Copyright (c) 2003-2004 Simtec Electronics <linux@simtec.co.uk> |
| 4 | * http://www.simtec.co.uk/products/SWLINUX/ | 4 | * http://www.simtec.co.uk/products/SWLINUX/ |
| 5 | * | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-power.h b/arch/arm/mach-s3c2410/include/mach/regs-power.h index 2d36353f57d..4932b87bdf3 100644 --- a/arch/arm/mach-s3c2410/include/mach/regs-power.h +++ b/arch/arm/mach-s3c2410/include/mach/regs-power.h | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | /* arch/arm/mach-s3c2410/include/mach/regs-power.h | 1 | /* arch/arm/mach-s3c2410/include/mach/regs-power.h |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2003,2004,2005,2006 Simtec Electronics <linux@simtec.co.uk> | 3 | * Copyright (c) 2003-2006 Simtec Electronics <linux@simtec.co.uk> |
| 4 | * http://armlinux.simtec.co.uk/ | 4 | * http://armlinux.simtec.co.uk/ |
| 5 | * | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
diff --git a/arch/arm/mach-s3c2410/include/mach/uncompress.h b/arch/arm/mach-s3c2410/include/mach/uncompress.h index c9432103750..72f756c5e50 100644 --- a/arch/arm/mach-s3c2410/include/mach/uncompress.h +++ b/arch/arm/mach-s3c2410/include/mach/uncompress.h | |||
| @@ -1,7 +1,6 @@ | |||
| 1 | |||
| 2 | /* arch/arm/mach-s3c2410/include/mach/uncompress.h | 1 | /* arch/arm/mach-s3c2410/include/mach/uncompress.h |
| 3 | * | 2 | * |
| 4 | * Copyright (c) 2003, 2007 Simtec Electronics | 3 | * Copyright (c) 2003-2007 Simtec Electronics |
| 5 | * http://armlinux.simtec.co.uk/ | 4 | * http://armlinux.simtec.co.uk/ |
| 6 | * Ben Dooks <ben@simtec.co.uk> | 5 | * Ben Dooks <ben@simtec.co.uk> |
| 7 | * | 6 | * |
diff --git a/arch/arm/mach-s3c2410/include/mach/vr1000-irq.h b/arch/arm/mach-s3c2410/include/mach/vr1000-irq.h index f53f85b4ad8..47add133b8e 100644 --- a/arch/arm/mach-s3c2410/include/mach/vr1000-irq.h +++ b/arch/arm/mach-s3c2410/include/mach/vr1000-irq.h | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* arch/arm/mach-s3c2410/include/mach/vr1000-irq.h | 1 | /* arch/arm/mach-s3c2410/include/mach/vr1000-irq.h |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2003,2004 Simtec Electronics | 3 | * Copyright (c) 2003-2004 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * | 5 | * |
| 6 | * Machine VR1000 - IRQ Number definitions | 6 | * Machine VR1000 - IRQ Number definitions |
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c index 647c9adb018..4c79ac8a6c3 100644 --- a/arch/arm/mach-s3c2410/mach-bast.c +++ b/arch/arm/mach-s3c2410/mach-bast.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* linux/arch/arm/mach-s3c2410/mach-bast.c | 1 | /* linux/arch/arm/mach-s3c2410/mach-bast.c |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2003-2005,2008 Simtec Electronics | 3 | * Copyright 2003-2008 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * | 5 | * |
| 6 | * http://www.simtec.co.uk/products/EB2410ITX/ | 6 | * http://www.simtec.co.uk/products/EB2410ITX/ |
| @@ -61,11 +61,12 @@ | |||
| 61 | #include <plat/devs.h> | 61 | #include <plat/devs.h> |
| 62 | #include <plat/cpu.h> | 62 | #include <plat/cpu.h> |
| 63 | #include <plat/cpu-freq.h> | 63 | #include <plat/cpu-freq.h> |
| 64 | #include <plat/audio-simtec.h> | ||
| 64 | 65 | ||
| 65 | #include "usb-simtec.h" | 66 | #include "usb-simtec.h" |
| 66 | #include "nor-simtec.h" | 67 | #include "nor-simtec.h" |
| 67 | 68 | ||
| 68 | #define COPYRIGHT ", (c) 2004-2005 Simtec Electronics" | 69 | #define COPYRIGHT ", Copyright 2004-2008 Simtec Electronics" |
| 69 | 70 | ||
| 70 | /* macros for virtual address mods for the io space entries */ | 71 | /* macros for virtual address mods for the io space entries */ |
| 71 | #define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5) | 72 | #define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5) |
| @@ -247,7 +248,7 @@ static int chip0_map[] = { 1 }; | |||
| 247 | static int chip1_map[] = { 2 }; | 248 | static int chip1_map[] = { 2 }; |
| 248 | static int chip2_map[] = { 3 }; | 249 | static int chip2_map[] = { 3 }; |
| 249 | 250 | ||
| 250 | static struct mtd_partition bast_default_nand_part[] = { | 251 | static struct mtd_partition __initdata bast_default_nand_part[] = { |
| 251 | [0] = { | 252 | [0] = { |
| 252 | .name = "Boot Agent", | 253 | .name = "Boot Agent", |
| 253 | .size = SZ_16K, | 254 | .size = SZ_16K, |
| @@ -273,7 +274,7 @@ static struct mtd_partition bast_default_nand_part[] = { | |||
| 273 | * socket. | 274 | * socket. |
| 274 | */ | 275 | */ |
| 275 | 276 | ||
| 276 | static struct s3c2410_nand_set bast_nand_sets[] = { | 277 | static struct s3c2410_nand_set __initdata bast_nand_sets[] = { |
| 277 | [0] = { | 278 | [0] = { |
| 278 | .name = "SmartMedia", | 279 | .name = "SmartMedia", |
| 279 | .nr_chips = 1, | 280 | .nr_chips = 1, |
| @@ -323,7 +324,7 @@ static void bast_nand_select(struct s3c2410_nand_set *set, int slot) | |||
| 323 | __raw_writeb(tmp, BAST_VA_CTRL2); | 324 | __raw_writeb(tmp, BAST_VA_CTRL2); |
| 324 | } | 325 | } |
| 325 | 326 | ||
| 326 | static struct s3c2410_platform_nand bast_nand_info = { | 327 | static struct s3c2410_platform_nand __initdata bast_nand_info = { |
| 327 | .tacls = 30, | 328 | .tacls = 30, |
| 328 | .twrph0 = 60, | 329 | .twrph0 = 60, |
| 329 | .twrph1 = 60, | 330 | .twrph1 = 60, |
| @@ -608,6 +609,11 @@ static struct s3c_cpufreq_board __initdata bast_cpufreq = { | |||
| 608 | .need_io = 1, | 609 | .need_io = 1, |
| 609 | }; | 610 | }; |
| 610 | 611 | ||
| 612 | static struct s3c24xx_audio_simtec_pdata __initdata bast_audio = { | ||
| 613 | .have_mic = 1, | ||
| 614 | .have_lout = 1, | ||
| 615 | }; | ||
| 616 | |||
| 611 | static void __init bast_map_io(void) | 617 | static void __init bast_map_io(void) |
| 612 | { | 618 | { |
| 613 | /* initialise the clocks */ | 619 | /* initialise the clocks */ |
| @@ -625,7 +631,6 @@ static void __init bast_map_io(void) | |||
| 625 | 631 | ||
| 626 | s3c24xx_register_clocks(bast_clocks, ARRAY_SIZE(bast_clocks)); | 632 | s3c24xx_register_clocks(bast_clocks, ARRAY_SIZE(bast_clocks)); |
| 627 | 633 | ||
| 628 | s3c_device_nand.dev.platform_data = &bast_nand_info; | ||
| 629 | s3c_device_hwmon.dev.platform_data = &bast_hwmon_info; | 634 | s3c_device_hwmon.dev.platform_data = &bast_hwmon_info; |
| 630 | 635 | ||
| 631 | s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc)); | 636 | s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc)); |
| @@ -639,6 +644,7 @@ static void __init bast_init(void) | |||
| 639 | sysdev_register(&bast_pm_sysdev); | 644 | sysdev_register(&bast_pm_sysdev); |
| 640 | 645 | ||
| 641 | s3c_i2c0_set_platdata(&bast_i2c_info); | 646 | s3c_i2c0_set_platdata(&bast_i2c_info); |
| 647 | s3c_nand_set_platdata(&bast_nand_info); | ||
| 642 | s3c24xx_fb_set_platdata(&bast_fb_info); | 648 | s3c24xx_fb_set_platdata(&bast_fb_info); |
| 643 | platform_add_devices(bast_devices, ARRAY_SIZE(bast_devices)); | 649 | platform_add_devices(bast_devices, ARRAY_SIZE(bast_devices)); |
| 644 | 650 | ||
| @@ -647,6 +653,7 @@ static void __init bast_init(void) | |||
| 647 | 653 | ||
| 648 | usb_simtec_init(); | 654 | usb_simtec_init(); |
| 649 | nor_simtec_init(); | 655 | nor_simtec_init(); |
| 656 | simtec_audio_add(NULL, true, &bast_audio); | ||
| 650 | 657 | ||
| 651 | s3c_cpufreq_setboard(&bast_cpufreq); | 658 | s3c_cpufreq_setboard(&bast_cpufreq); |
| 652 | } | 659 | } |
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c index d9cd5ddecf4..49053254c98 100644 --- a/arch/arm/mach-s3c2410/mach-h1940.c +++ b/arch/arm/mach-s3c2410/mach-h1940.c | |||
| @@ -21,6 +21,11 @@ | |||
| 21 | #include <linux/serial_core.h> | 21 | #include <linux/serial_core.h> |
| 22 | #include <linux/platform_device.h> | 22 | #include <linux/platform_device.h> |
| 23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
| 24 | #include <linux/gpio.h> | ||
| 25 | #include <linux/pwm_backlight.h> | ||
| 26 | #include <video/platform_lcd.h> | ||
| 27 | |||
| 28 | #include <linux/mmc/host.h> | ||
| 24 | 29 | ||
| 25 | #include <asm/mach/arch.h> | 30 | #include <asm/mach/arch.h> |
| 26 | #include <asm/mach/map.h> | 31 | #include <asm/mach/map.h> |
| @@ -32,9 +37,12 @@ | |||
| 32 | 37 | ||
| 33 | #include <plat/regs-serial.h> | 38 | #include <plat/regs-serial.h> |
| 34 | #include <mach/regs-lcd.h> | 39 | #include <mach/regs-lcd.h> |
| 35 | #include <mach/regs-gpio.h> | ||
| 36 | #include <mach/regs-clock.h> | 40 | #include <mach/regs-clock.h> |
| 37 | 41 | ||
| 42 | #include <mach/regs-gpio.h> | ||
| 43 | #include <mach/gpio-fns.h> | ||
| 44 | #include <mach/gpio-nrs.h> | ||
| 45 | |||
| 38 | #include <mach/h1940.h> | 46 | #include <mach/h1940.h> |
| 39 | #include <mach/h1940-latch.h> | 47 | #include <mach/h1940-latch.h> |
| 40 | #include <mach/fb.h> | 48 | #include <mach/fb.h> |
| @@ -46,6 +54,7 @@ | |||
| 46 | #include <plat/cpu.h> | 54 | #include <plat/cpu.h> |
| 47 | #include <plat/pll.h> | 55 | #include <plat/pll.h> |
| 48 | #include <plat/pm.h> | 56 | #include <plat/pm.h> |
| 57 | #include <plat/mci.h> | ||
| 49 | 58 | ||
| 50 | static struct map_desc h1940_iodesc[] __initdata = { | 59 | static struct map_desc h1940_iodesc[] __initdata = { |
| 51 | [0] = { | 60 | [0] = { |
| @@ -171,16 +180,90 @@ static struct s3c2410fb_mach_info h1940_fb_info __initdata = { | |||
| 171 | .gpdup_mask= 0xffffffff, | 180 | .gpdup_mask= 0xffffffff, |
| 172 | }; | 181 | }; |
| 173 | 182 | ||
| 174 | static struct platform_device s3c_device_leds = { | 183 | static struct platform_device h1940_device_leds = { |
| 175 | .name = "h1940-leds", | 184 | .name = "h1940-leds", |
| 176 | .id = -1, | 185 | .id = -1, |
| 177 | }; | 186 | }; |
| 178 | 187 | ||
| 179 | static struct platform_device s3c_device_bluetooth = { | 188 | static struct platform_device h1940_device_bluetooth = { |
| 180 | .name = "h1940-bt", | 189 | .name = "h1940-bt", |
| 181 | .id = -1, | 190 | .id = -1, |
| 182 | }; | 191 | }; |
| 183 | 192 | ||
| 193 | static struct s3c24xx_mci_pdata h1940_mmc_cfg = { | ||
| 194 | .gpio_detect = S3C2410_GPF(5), | ||
| 195 | .gpio_wprotect = S3C2410_GPH(8), | ||
| 196 | .set_power = NULL, | ||
| 197 | .ocr_avail = MMC_VDD_32_33, | ||
| 198 | }; | ||
| 199 | |||
| 200 | static int h1940_backlight_init(struct device *dev) | ||
| 201 | { | ||
| 202 | gpio_request(S3C2410_GPB(0), "Backlight"); | ||
| 203 | |||
| 204 | s3c2410_gpio_setpin(S3C2410_GPB(0), 0); | ||
| 205 | s3c2410_gpio_pullup(S3C2410_GPB(0), 0); | ||
| 206 | s3c2410_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPB0_TOUT0); | ||
| 207 | |||
| 208 | return 0; | ||
| 209 | } | ||
| 210 | |||
| 211 | static void h1940_backlight_exit(struct device *dev) | ||
| 212 | { | ||
| 213 | s3c2410_gpio_cfgpin(S3C2410_GPB(0), 1/*S3C2410_GPB0_OUTP*/); | ||
| 214 | } | ||
| 215 | |||
| 216 | static struct platform_pwm_backlight_data backlight_data = { | ||
| 217 | .pwm_id = 0, | ||
| 218 | .max_brightness = 100, | ||
| 219 | .dft_brightness = 50, | ||
| 220 | /* tcnt = 0x31 */ | ||
| 221 | .pwm_period_ns = 36296, | ||
| 222 | .init = h1940_backlight_init, | ||
| 223 | .exit = h1940_backlight_exit, | ||
| 224 | }; | ||
| 225 | |||
| 226 | static struct platform_device h1940_backlight = { | ||
| 227 | .name = "pwm-backlight", | ||
| 228 | .dev = { | ||
| 229 | .parent = &s3c_device_timer[0].dev, | ||
| 230 | .platform_data = &backlight_data, | ||
| 231 | }, | ||
| 232 | .id = -1, | ||
| 233 | }; | ||
| 234 | |||
| 235 | static void h1940_lcd_power_set(struct plat_lcd_data *pd, | ||
| 236 | unsigned int power) | ||
| 237 | { | ||
| 238 | int value; | ||
| 239 | |||
| 240 | if (!power) { | ||
| 241 | /* set to 3ec */ | ||
| 242 | s3c2410_gpio_setpin(S3C2410_GPC(0), 0); | ||
| 243 | /* wait for 3ac */ | ||
| 244 | do { | ||
| 245 | value = s3c2410_gpio_getpin(S3C2410_GPC(6)); | ||
| 246 | } while (value); | ||
| 247 | /* set to 38c */ | ||
| 248 | s3c2410_gpio_setpin(S3C2410_GPC(5), 0); | ||
| 249 | } else { | ||
| 250 | /* Set to 3ac */ | ||
| 251 | s3c2410_gpio_setpin(S3C2410_GPC(5), 1); | ||
| 252 | /* Set to 3ad */ | ||
| 253 | s3c2410_gpio_setpin(S3C2410_GPC(0), 1); | ||
| 254 | } | ||
| 255 | } | ||
| 256 | |||
| 257 | static struct plat_lcd_data h1940_lcd_power_data = { | ||
| 258 | .set_power = h1940_lcd_power_set, | ||
| 259 | }; | ||
| 260 | |||
| 261 | static struct platform_device h1940_lcd_powerdev = { | ||
| 262 | .name = "platform-lcd", | ||
| 263 | .dev.parent = &s3c_device_lcd.dev, | ||
| 264 | .dev.platform_data = &h1940_lcd_power_data, | ||
| 265 | }; | ||
| 266 | |||
| 184 | static struct platform_device *h1940_devices[] __initdata = { | 267 | static struct platform_device *h1940_devices[] __initdata = { |
| 185 | &s3c_device_usb, | 268 | &s3c_device_usb, |
| 186 | &s3c_device_lcd, | 269 | &s3c_device_lcd, |
| @@ -188,8 +271,13 @@ static struct platform_device *h1940_devices[] __initdata = { | |||
| 188 | &s3c_device_i2c0, | 271 | &s3c_device_i2c0, |
| 189 | &s3c_device_iis, | 272 | &s3c_device_iis, |
| 190 | &s3c_device_usbgadget, | 273 | &s3c_device_usbgadget, |
| 191 | &s3c_device_leds, | 274 | &h1940_device_leds, |
| 192 | &s3c_device_bluetooth, | 275 | &h1940_device_bluetooth, |
| 276 | &s3c_device_sdi, | ||
| 277 | &s3c_device_rtc, | ||
| 278 | &s3c_device_timer[0], | ||
| 279 | &h1940_backlight, | ||
| 280 | &h1940_lcd_powerdev, | ||
| 193 | }; | 281 | }; |
| 194 | 282 | ||
| 195 | static void __init h1940_map_io(void) | 283 | static void __init h1940_map_io(void) |
| @@ -219,6 +307,8 @@ static void __init h1940_init(void) | |||
| 219 | s3c24xx_udc_set_platdata(&h1940_udc_cfg); | 307 | s3c24xx_udc_set_platdata(&h1940_udc_cfg); |
| 220 | s3c_i2c0_set_platdata(NULL); | 308 | s3c_i2c0_set_platdata(NULL); |
| 221 | 309 | ||
| 310 | s3c_device_sdi.dev.platform_data = &h1940_mmc_cfg; | ||
| 311 | |||
| 222 | /* Turn off suspend on both USB ports, and switch the | 312 | /* Turn off suspend on both USB ports, and switch the |
| 223 | * selectable USB port to USB device mode. */ | 313 | * selectable USB port to USB device mode. */ |
| 224 | 314 | ||
| @@ -231,6 +321,11 @@ static void __init h1940_init(void) | |||
| 231 | | (0x03 << S3C24XX_PLLCON_SDIVSHIFT); | 321 | | (0x03 << S3C24XX_PLLCON_SDIVSHIFT); |
| 232 | writel(tmp, S3C2410_UPLLCON); | 322 | writel(tmp, S3C2410_UPLLCON); |
| 233 | 323 | ||
| 324 | gpio_request(S3C2410_GPC(0), "LCD power"); | ||
| 325 | gpio_request(S3C2410_GPC(5), "LCD power"); | ||
| 326 | gpio_request(S3C2410_GPC(6), "LCD power"); | ||
| 327 | |||
| 328 | |||
| 234 | platform_add_devices(h1940_devices, ARRAY_SIZE(h1940_devices)); | 329 | platform_add_devices(h1940_devices, ARRAY_SIZE(h1940_devices)); |
| 235 | } | 330 | } |
| 236 | 331 | ||
diff --git a/arch/arm/mach-s3c2410/mach-n30.c b/arch/arm/mach-s3c2410/mach-n30.c index 0f6ed61af41..0405712c226 100644 --- a/arch/arm/mach-s3c2410/mach-n30.c +++ b/arch/arm/mach-s3c2410/mach-n30.c | |||
| @@ -338,7 +338,7 @@ static struct platform_device *n35_devices[] __initdata = { | |||
| 338 | &n35_button_device, | 338 | &n35_button_device, |
| 339 | }; | 339 | }; |
| 340 | 340 | ||
| 341 | static struct s3c2410_platform_i2c n30_i2ccfg = { | 341 | static struct s3c2410_platform_i2c __initdata n30_i2ccfg = { |
| 342 | .flags = 0, | 342 | .flags = 0, |
| 343 | .slave_addr = 0x10, | 343 | .slave_addr = 0x10, |
| 344 | .frequency = 10*1000, | 344 | .frequency = 10*1000, |
| @@ -500,8 +500,8 @@ static void __init n30_init_irq(void) | |||
| 500 | static void __init n30_init(void) | 500 | static void __init n30_init(void) |
| 501 | { | 501 | { |
| 502 | s3c24xx_fb_set_platdata(&n30_fb_info); | 502 | s3c24xx_fb_set_platdata(&n30_fb_info); |
| 503 | s3c_device_i2c0.dev.platform_data = &n30_i2ccfg; | ||
| 504 | s3c24xx_udc_set_platdata(&n30_udc_cfg); | 503 | s3c24xx_udc_set_platdata(&n30_udc_cfg); |
| 504 | s3c_i2c0_set_platdata(&n30_i2ccfg); | ||
| 505 | 505 | ||
| 506 | /* Turn off suspend on both USB ports, and switch the | 506 | /* Turn off suspend on both USB ports, and switch the |
| 507 | * selectable USB port to USB device mode. */ | 507 | * selectable USB port to USB device mode. */ |
diff --git a/arch/arm/mach-s3c2410/mach-qt2410.c b/arch/arm/mach-s3c2410/mach-qt2410.c index 2cc9849eb44..ab092bcda39 100644 --- a/arch/arm/mach-s3c2410/mach-qt2410.c +++ b/arch/arm/mach-s3c2410/mach-qt2410.c | |||
| @@ -258,7 +258,7 @@ static struct platform_device *qt2410_devices[] __initdata = { | |||
| 258 | &qt2410_led, | 258 | &qt2410_led, |
| 259 | }; | 259 | }; |
| 260 | 260 | ||
| 261 | static struct mtd_partition qt2410_nand_part[] = { | 261 | static struct mtd_partition __initdata qt2410_nand_part[] = { |
| 262 | [0] = { | 262 | [0] = { |
| 263 | .name = "U-Boot", | 263 | .name = "U-Boot", |
| 264 | .size = 0x30000, | 264 | .size = 0x30000, |
| @@ -286,7 +286,7 @@ static struct mtd_partition qt2410_nand_part[] = { | |||
| 286 | }, | 286 | }, |
| 287 | }; | 287 | }; |
| 288 | 288 | ||
| 289 | static struct s3c2410_nand_set qt2410_nand_sets[] = { | 289 | static struct s3c2410_nand_set __initdata qt2410_nand_sets[] = { |
| 290 | [0] = { | 290 | [0] = { |
| 291 | .name = "NAND", | 291 | .name = "NAND", |
| 292 | .nr_chips = 1, | 292 | .nr_chips = 1, |
| @@ -299,7 +299,7 @@ static struct s3c2410_nand_set qt2410_nand_sets[] = { | |||
| 299 | * chips and beyond. | 299 | * chips and beyond. |
| 300 | */ | 300 | */ |
| 301 | 301 | ||
| 302 | static struct s3c2410_platform_nand qt2410_nand_info = { | 302 | static struct s3c2410_platform_nand __initdata qt2410_nand_info = { |
| 303 | .tacls = 20, | 303 | .tacls = 20, |
| 304 | .twrph0 = 60, | 304 | .twrph0 = 60, |
| 305 | .twrph1 = 20, | 305 | .twrph1 = 20, |
| @@ -331,7 +331,7 @@ static void __init qt2410_map_io(void) | |||
| 331 | 331 | ||
| 332 | static void __init qt2410_machine_init(void) | 332 | static void __init qt2410_machine_init(void) |
| 333 | { | 333 | { |
| 334 | s3c_device_nand.dev.platform_data = &qt2410_nand_info; | 334 | s3c_nand_set_platdata(&qt2410_nand_info); |
| 335 | 335 | ||
| 336 | switch (tft_type) { | 336 | switch (tft_type) { |
| 337 | case 'p': /* production */ | 337 | case 'p': /* production */ |
diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c index 1628cc773a2..0d61fb57717 100644 --- a/arch/arm/mach-s3c2410/mach-vr1000.c +++ b/arch/arm/mach-s3c2410/mach-vr1000.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* linux/arch/arm/mach-s3c2410/mach-vr1000.c | 1 | /* linux/arch/arm/mach-s3c2410/mach-vr1000.c |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2003-2005,2008 Simtec Electronics | 3 | * Copyright (c) 2003-2008 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * | 5 | * |
| 6 | * Machine support for Thorcom VR1000 board. Designed for Thorcom by | 6 | * Machine support for Thorcom VR1000 board. Designed for Thorcom by |
| @@ -49,6 +49,7 @@ | |||
| 49 | #include <plat/devs.h> | 49 | #include <plat/devs.h> |
| 50 | #include <plat/cpu.h> | 50 | #include <plat/cpu.h> |
| 51 | #include <plat/iic.h> | 51 | #include <plat/iic.h> |
| 52 | #include <plat/audio-simtec.h> | ||
| 52 | 53 | ||
| 53 | #include "usb-simtec.h" | 54 | #include "usb-simtec.h" |
| 54 | #include "nor-simtec.h" | 55 | #include "nor-simtec.h" |
| @@ -393,6 +394,7 @@ static void __init vr1000_init(void) | |||
| 393 | ARRAY_SIZE(vr1000_i2c_devs)); | 394 | ARRAY_SIZE(vr1000_i2c_devs)); |
| 394 | 395 | ||
| 395 | nor_simtec_init(); | 396 | nor_simtec_init(); |
| 397 | simtec_audio_add(NULL, true, NULL); | ||
| 396 | } | 398 | } |
| 397 | 399 | ||
| 398 | MACHINE_START(VR1000, "Thorcom-VR1000") | 400 | MACHINE_START(VR1000, "Thorcom-VR1000") |
diff --git a/arch/arm/mach-s3c2410/pll.c b/arch/arm/mach-s3c2410/pll.c index f178c2fd9d8..8338865e11c 100644 --- a/arch/arm/mach-s3c2410/pll.c +++ b/arch/arm/mach-s3c2410/pll.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* arch/arm/mach-s3c2410/pll.c | 1 | /* arch/arm/mach-s3c2410/pll.c |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2006,2007 Simtec Electronics | 3 | * Copyright (c) 2006-2007 Simtec Electronics |
| 4 | * http://armlinux.simtec.co.uk/ | 4 | * http://armlinux.simtec.co.uk/ |
| 5 | * Ben Dooks <ben@simtec.co.uk> | 5 | * Ben Dooks <ben@simtec.co.uk> |
| 6 | * Vincent Sanders <vince@arm.linux.org.uk> | 6 | * Vincent Sanders <vince@arm.linux.org.uk> |
diff --git a/arch/arm/mach-s3c2410/usb-simtec.c b/arch/arm/mach-s3c2410/usb-simtec.c index 50e25fc5f8a..6b9d0d83a6f 100644 --- a/arch/arm/mach-s3c2410/usb-simtec.c +++ b/arch/arm/mach-s3c2410/usb-simtec.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* linux/arch/arm/mach-s3c2410/usb-simtec.c | 1 | /* linux/arch/arm/mach-s3c2410/usb-simtec.c |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2004,2005 Simtec Electronics | 3 | * Copyright 2004-2005 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * | 5 | * |
| 6 | * http://www.simtec.co.uk/products/EB2410ITX/ | 6 | * http://www.simtec.co.uk/products/EB2410ITX/ |
| @@ -108,7 +108,7 @@ int usb_simtec_init(void) | |||
| 108 | { | 108 | { |
| 109 | int ret; | 109 | int ret; |
| 110 | 110 | ||
| 111 | printk("USB Power Control, (c) 2004 Simtec Electronics\n"); | 111 | printk("USB Power Control, Copyright 2004 Simtec Electronics\n"); |
| 112 | 112 | ||
| 113 | ret = gpio_request(S3C2410_GPB(4), "USB power control"); | 113 | ret = gpio_request(S3C2410_GPB(4), "USB power control"); |
| 114 | if (ret < 0) { | 114 | if (ret < 0) { |
diff --git a/arch/arm/mach-s3c2412/mach-jive.c b/arch/arm/mach-s3c2412/mach-jive.c index 8df506eac90..c9fa3fca486 100644 --- a/arch/arm/mach-s3c2412/mach-jive.c +++ b/arch/arm/mach-s3c2412/mach-jive.c | |||
| @@ -96,7 +96,7 @@ static struct s3c2410_uartcfg jive_uartcfgs[] = { | |||
| 96 | * 0x017d0000-0x02bd0000 : cramfs B | 96 | * 0x017d0000-0x02bd0000 : cramfs B |
| 97 | * 0x02bd0000-0x03fd0000 : yaffs | 97 | * 0x02bd0000-0x03fd0000 : yaffs |
| 98 | */ | 98 | */ |
| 99 | static struct mtd_partition jive_imageA_nand_part[] = { | 99 | static struct mtd_partition __initdata jive_imageA_nand_part[] = { |
| 100 | 100 | ||
| 101 | #ifdef CONFIG_MACH_JIVE_SHOW_BOOTLOADER | 101 | #ifdef CONFIG_MACH_JIVE_SHOW_BOOTLOADER |
| 102 | /* Don't allow access to the bootloader from linux */ | 102 | /* Don't allow access to the bootloader from linux */ |
| @@ -154,7 +154,7 @@ static struct mtd_partition jive_imageA_nand_part[] = { | |||
| 154 | }, | 154 | }, |
| 155 | }; | 155 | }; |
| 156 | 156 | ||
| 157 | static struct mtd_partition jive_imageB_nand_part[] = { | 157 | static struct mtd_partition __initdata jive_imageB_nand_part[] = { |
| 158 | 158 | ||
| 159 | #ifdef CONFIG_MACH_JIVE_SHOW_BOOTLOADER | 159 | #ifdef CONFIG_MACH_JIVE_SHOW_BOOTLOADER |
| 160 | /* Don't allow access to the bootloader from linux */ | 160 | /* Don't allow access to the bootloader from linux */ |
| @@ -213,7 +213,7 @@ static struct mtd_partition jive_imageB_nand_part[] = { | |||
| 213 | }, | 213 | }, |
| 214 | }; | 214 | }; |
| 215 | 215 | ||
| 216 | static struct s3c2410_nand_set jive_nand_sets[] = { | 216 | static struct s3c2410_nand_set __initdata jive_nand_sets[] = { |
| 217 | [0] = { | 217 | [0] = { |
| 218 | .name = "flash", | 218 | .name = "flash", |
| 219 | .nr_chips = 1, | 219 | .nr_chips = 1, |
| @@ -222,7 +222,7 @@ static struct s3c2410_nand_set jive_nand_sets[] = { | |||
| 222 | }, | 222 | }, |
| 223 | }; | 223 | }; |
| 224 | 224 | ||
| 225 | static struct s3c2410_platform_nand jive_nand_info = { | 225 | static struct s3c2410_platform_nand __initdata jive_nand_info = { |
| 226 | /* set taken from osiris nand timings, possibly still conservative */ | 226 | /* set taken from osiris nand timings, possibly still conservative */ |
| 227 | .tacls = 30, | 227 | .tacls = 30, |
| 228 | .twrph0 = 55, | 228 | .twrph0 = 55, |
| @@ -631,7 +631,8 @@ static void __init jive_machine_init(void) | |||
| 631 | 631 | ||
| 632 | s3c_pm_init(); | 632 | s3c_pm_init(); |
| 633 | 633 | ||
| 634 | s3c_device_nand.dev.platform_data = &jive_nand_info; | 634 | /** TODO - check that this is after the cmdline option! */ |
| 635 | s3c_nand_set_platdata(&jive_nand_info); | ||
| 635 | 636 | ||
| 636 | /* initialise the spi */ | 637 | /* initialise the spi */ |
| 637 | 638 | ||
diff --git a/arch/arm/mach-s3c2412/mach-vstms.c b/arch/arm/mach-s3c2412/mach-vstms.c index 11e8ad49fc7..a6ba591b26b 100644 --- a/arch/arm/mach-s3c2412/mach-vstms.c +++ b/arch/arm/mach-s3c2412/mach-vstms.c | |||
| @@ -76,7 +76,7 @@ static struct s3c2410_uartcfg vstms_uartcfgs[] __initdata = { | |||
| 76 | } | 76 | } |
| 77 | }; | 77 | }; |
| 78 | 78 | ||
| 79 | static struct mtd_partition vstms_nand_part[] = { | 79 | static struct mtd_partition __initdata vstms_nand_part[] = { |
| 80 | [0] = { | 80 | [0] = { |
| 81 | .name = "Boot Agent", | 81 | .name = "Boot Agent", |
| 82 | .size = 0x7C000, | 82 | .size = 0x7C000, |
| @@ -99,7 +99,7 @@ static struct mtd_partition vstms_nand_part[] = { | |||
| 99 | }, | 99 | }, |
| 100 | }; | 100 | }; |
| 101 | 101 | ||
| 102 | static struct s3c2410_nand_set vstms_nand_sets[] = { | 102 | static struct s3c2410_nand_set __initdata vstms_nand_sets[] = { |
| 103 | [0] = { | 103 | [0] = { |
| 104 | .name = "NAND", | 104 | .name = "NAND", |
| 105 | .nr_chips = 1, | 105 | .nr_chips = 1, |
| @@ -112,7 +112,7 @@ static struct s3c2410_nand_set vstms_nand_sets[] = { | |||
| 112 | * chips and beyond. | 112 | * chips and beyond. |
| 113 | */ | 113 | */ |
| 114 | 114 | ||
| 115 | static struct s3c2410_platform_nand vstms_nand_info = { | 115 | static struct s3c2410_platform_nand __initdata vstms_nand_info = { |
| 116 | .tacls = 20, | 116 | .tacls = 20, |
| 117 | .twrph0 = 60, | 117 | .twrph0 = 60, |
| 118 | .twrph1 = 20, | 118 | .twrph1 = 20, |
| @@ -143,8 +143,6 @@ static void __init vstms_fixup(struct machine_desc *desc, | |||
| 143 | 143 | ||
| 144 | static void __init vstms_map_io(void) | 144 | static void __init vstms_map_io(void) |
| 145 | { | 145 | { |
| 146 | s3c_device_nand.dev.platform_data = &vstms_nand_info; | ||
| 147 | |||
| 148 | s3c24xx_init_io(vstms_iodesc, ARRAY_SIZE(vstms_iodesc)); | 146 | s3c24xx_init_io(vstms_iodesc, ARRAY_SIZE(vstms_iodesc)); |
| 149 | s3c24xx_init_clocks(12000000); | 147 | s3c24xx_init_clocks(12000000); |
| 150 | s3c24xx_init_uarts(vstms_uartcfgs, ARRAY_SIZE(vstms_uartcfgs)); | 148 | s3c24xx_init_uarts(vstms_uartcfgs, ARRAY_SIZE(vstms_uartcfgs)); |
| @@ -153,6 +151,8 @@ static void __init vstms_map_io(void) | |||
| 153 | static void __init vstms_init(void) | 151 | static void __init vstms_init(void) |
| 154 | { | 152 | { |
| 155 | s3c_i2c0_set_platdata(NULL); | 153 | s3c_i2c0_set_platdata(NULL); |
| 154 | s3c_nand_set_platdata(&vstms_nand_info); | ||
| 155 | |||
| 156 | platform_add_devices(vstms_devices, ARRAY_SIZE(vstms_devices)); | 156 | platform_add_devices(vstms_devices, ARRAY_SIZE(vstms_devices)); |
| 157 | } | 157 | } |
| 158 | 158 | ||
diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig index a8b69d77571..cf10e14b7b4 100644 --- a/arch/arm/mach-s3c2440/Kconfig +++ b/arch/arm/mach-s3c2440/Kconfig | |||
| @@ -53,6 +53,19 @@ config MACH_OSIRIS | |||
| 53 | Say Y here if you are using the Simtec IM2440D20 module, also | 53 | Say Y here if you are using the Simtec IM2440D20 module, also |
| 54 | known as the Osiris. | 54 | known as the Osiris. |
| 55 | 55 | ||
| 56 | config MACH_OSIRIS_DVS | ||
| 57 | tristate "Simtec IM2440D20 (OSIRIS) Dynamic Voltage Scaling driver" | ||
| 58 | depends on MACH_OSIRIS | ||
| 59 | select TPS65010 | ||
| 60 | help | ||
| 61 | Say Y/M here if you want to have dynamic voltage scaling support | ||
| 62 | on the Simtec IM2440D20 (OSIRIS) module via the TPS65011. | ||
| 63 | |||
| 64 | The DVS driver alters the voltage supplied to the ARM core | ||
| 65 | depending on the frequency it is running at. The driver itself | ||
| 66 | does not do any of the frequency alteration, which is left up | ||
| 67 | to the cpufreq driver. | ||
| 68 | |||
| 56 | config MACH_RX3715 | 69 | config MACH_RX3715 |
| 57 | bool "HP iPAQ rx3715" | 70 | bool "HP iPAQ rx3715" |
| 58 | select CPU_S3C2440 | 71 | select CPU_S3C2440 |
diff --git a/arch/arm/mach-s3c2440/Makefile b/arch/arm/mach-s3c2440/Makefile index bfadcf684a2..5f322453188 100644 --- a/arch/arm/mach-s3c2440/Makefile +++ b/arch/arm/mach-s3c2440/Makefile | |||
| @@ -23,3 +23,7 @@ obj-$(CONFIG_ARCH_S3C2440) += mach-smdk2440.o | |||
| 23 | obj-$(CONFIG_MACH_NEXCODER_2440) += mach-nexcoder.o | 23 | obj-$(CONFIG_MACH_NEXCODER_2440) += mach-nexcoder.o |
| 24 | obj-$(CONFIG_MACH_AT2440EVB) += mach-at2440evb.o | 24 | obj-$(CONFIG_MACH_AT2440EVB) += mach-at2440evb.o |
| 25 | obj-$(CONFIG_MACH_MINI2440) += mach-mini2440.o | 25 | obj-$(CONFIG_MACH_MINI2440) += mach-mini2440.o |
| 26 | |||
| 27 | # extra machine support | ||
| 28 | |||
| 29 | obj-$(CONFIG_MACH_OSIRIS_DVS) += mach-osiris-dvs.o | ||
diff --git a/arch/arm/mach-s3c2440/irq.c b/arch/arm/mach-s3c2440/irq.c index 63c5ab65727..0c049b95c37 100644 --- a/arch/arm/mach-s3c2440/irq.c +++ b/arch/arm/mach-s3c2440/irq.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* linux/arch/arm/mach-s3c2440/irq.c | 1 | /* linux/arch/arm/mach-s3c2440/irq.c |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2003,2004 Simtec Electronics | 3 | * Copyright (c) 2003-2004 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c index 68f3870991b..62a4c3eba97 100644 --- a/arch/arm/mach-s3c2440/mach-anubis.c +++ b/arch/arm/mach-s3c2440/mach-anubis.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* linux/arch/arm/mach-s3c2440/mach-anubis.c | 1 | /* linux/arch/arm/mach-s3c2440/mach-anubis.c |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2003-2005,2008 Simtec Electronics | 3 | * Copyright 2003-2009 Simtec Electronics |
| 4 | * http://armlinux.simtec.co.uk/ | 4 | * http://armlinux.simtec.co.uk/ |
| 5 | * Ben Dooks <ben@simtec.co.uk> | 5 | * Ben Dooks <ben@simtec.co.uk> |
| 6 | * | 6 | * |
| @@ -53,8 +53,9 @@ | |||
| 53 | #include <plat/clock.h> | 53 | #include <plat/clock.h> |
| 54 | #include <plat/devs.h> | 54 | #include <plat/devs.h> |
| 55 | #include <plat/cpu.h> | 55 | #include <plat/cpu.h> |
| 56 | #include <plat/audio-simtec.h> | ||
| 56 | 57 | ||
| 57 | #define COPYRIGHT ", (c) 2005 Simtec Electronics" | 58 | #define COPYRIGHT ", Copyright 2005-2009 Simtec Electronics" |
| 58 | 59 | ||
| 59 | static struct map_desc anubis_iodesc[] __initdata = { | 60 | static struct map_desc anubis_iodesc[] __initdata = { |
| 60 | /* ISA IO areas */ | 61 | /* ISA IO areas */ |
| @@ -138,7 +139,7 @@ static int external_map[] = { 2 }; | |||
| 138 | static int chip0_map[] = { 0 }; | 139 | static int chip0_map[] = { 0 }; |
| 139 | static int chip1_map[] = { 1 }; | 140 | static int chip1_map[] = { 1 }; |
| 140 | 141 | ||
| 141 | static struct mtd_partition anubis_default_nand_part[] = { | 142 | static struct mtd_partition __initdata anubis_default_nand_part[] = { |
| 142 | [0] = { | 143 | [0] = { |
| 143 | .name = "Boot Agent", | 144 | .name = "Boot Agent", |
| 144 | .size = SZ_16K, | 145 | .size = SZ_16K, |
| @@ -161,7 +162,7 @@ static struct mtd_partition anubis_default_nand_part[] = { | |||
| 161 | } | 162 | } |
| 162 | }; | 163 | }; |
| 163 | 164 | ||
| 164 | static struct mtd_partition anubis_default_nand_part_large[] = { | 165 | static struct mtd_partition __initdata anubis_default_nand_part_large[] = { |
| 165 | [0] = { | 166 | [0] = { |
| 166 | .name = "Boot Agent", | 167 | .name = "Boot Agent", |
| 167 | .size = SZ_128K, | 168 | .size = SZ_128K, |
| @@ -191,7 +192,7 @@ static struct mtd_partition anubis_default_nand_part_large[] = { | |||
| 191 | * socket. | 192 | * socket. |
| 192 | */ | 193 | */ |
| 193 | 194 | ||
| 194 | static struct s3c2410_nand_set anubis_nand_sets[] = { | 195 | static struct s3c2410_nand_set __initdata anubis_nand_sets[] = { |
| 195 | [1] = { | 196 | [1] = { |
| 196 | .name = "External", | 197 | .name = "External", |
| 197 | .nr_chips = 1, | 198 | .nr_chips = 1, |
| @@ -233,7 +234,7 @@ static void anubis_nand_select(struct s3c2410_nand_set *set, int slot) | |||
| 233 | __raw_writeb(tmp, ANUBIS_VA_CTRL1); | 234 | __raw_writeb(tmp, ANUBIS_VA_CTRL1); |
| 234 | } | 235 | } |
| 235 | 236 | ||
| 236 | static struct s3c2410_platform_nand anubis_nand_info = { | 237 | static struct s3c2410_platform_nand __initdata anubis_nand_info = { |
| 237 | .tacls = 25, | 238 | .tacls = 25, |
| 238 | .twrph0 = 55, | 239 | .twrph0 = 55, |
| 239 | .twrph1 = 40, | 240 | .twrph1 = 40, |
| @@ -437,6 +438,17 @@ static struct i2c_board_info anubis_i2c_devs[] __initdata = { | |||
| 437 | } | 438 | } |
| 438 | }; | 439 | }; |
| 439 | 440 | ||
| 441 | /* Audio setup */ | ||
| 442 | static struct s3c24xx_audio_simtec_pdata __initdata anubis_audio = { | ||
| 443 | .have_mic = 1, | ||
| 444 | .have_lout = 1, | ||
| 445 | .output_cdclk = 1, | ||
| 446 | .use_mpllin = 1, | ||
| 447 | .amp_gpio = S3C2410_GPB(2), | ||
| 448 | .amp_gain[0] = S3C2410_GPD(10), | ||
| 449 | .amp_gain[1] = S3C2410_GPD(11), | ||
| 450 | }; | ||
| 451 | |||
| 440 | static void __init anubis_map_io(void) | 452 | static void __init anubis_map_io(void) |
| 441 | { | 453 | { |
| 442 | /* initialise the clocks */ | 454 | /* initialise the clocks */ |
| @@ -454,8 +466,6 @@ static void __init anubis_map_io(void) | |||
| 454 | 466 | ||
| 455 | s3c24xx_register_clocks(anubis_clocks, ARRAY_SIZE(anubis_clocks)); | 467 | s3c24xx_register_clocks(anubis_clocks, ARRAY_SIZE(anubis_clocks)); |
| 456 | 468 | ||
| 457 | s3c_device_nand.dev.platform_data = &anubis_nand_info; | ||
| 458 | |||
| 459 | s3c24xx_init_io(anubis_iodesc, ARRAY_SIZE(anubis_iodesc)); | 469 | s3c24xx_init_io(anubis_iodesc, ARRAY_SIZE(anubis_iodesc)); |
| 460 | s3c24xx_init_clocks(0); | 470 | s3c24xx_init_clocks(0); |
| 461 | s3c24xx_init_uarts(anubis_uartcfgs, ARRAY_SIZE(anubis_uartcfgs)); | 471 | s3c24xx_init_uarts(anubis_uartcfgs, ARRAY_SIZE(anubis_uartcfgs)); |
| @@ -476,6 +486,9 @@ static void __init anubis_map_io(void) | |||
| 476 | static void __init anubis_init(void) | 486 | static void __init anubis_init(void) |
| 477 | { | 487 | { |
| 478 | s3c_i2c0_set_platdata(NULL); | 488 | s3c_i2c0_set_platdata(NULL); |
| 489 | s3c_nand_set_platdata(&anubis_nand_info); | ||
| 490 | simtec_audio_add(NULL, false, &anubis_audio); | ||
| 491 | |||
| 479 | platform_add_devices(anubis_devices, ARRAY_SIZE(anubis_devices)); | 492 | platform_add_devices(anubis_devices, ARRAY_SIZE(anubis_devices)); |
| 480 | 493 | ||
| 481 | i2c_register_board_info(0, anubis_i2c_devs, | 494 | i2c_register_board_info(0, anubis_i2c_devs, |
diff --git a/arch/arm/mach-s3c2440/mach-at2440evb.c b/arch/arm/mach-s3c2440/mach-at2440evb.c index dfc7010935d..aa69290e04c 100644 --- a/arch/arm/mach-s3c2440/mach-at2440evb.c +++ b/arch/arm/mach-s3c2440/mach-at2440evb.c | |||
| @@ -96,7 +96,7 @@ static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = { | |||
| 96 | 96 | ||
| 97 | /* NAND Flash on AT2440EVB board */ | 97 | /* NAND Flash on AT2440EVB board */ |
| 98 | 98 | ||
| 99 | static struct mtd_partition at2440evb_default_nand_part[] = { | 99 | static struct mtd_partition __initdata at2440evb_default_nand_part[] = { |
| 100 | [0] = { | 100 | [0] = { |
| 101 | .name = "Boot Agent", | 101 | .name = "Boot Agent", |
| 102 | .size = SZ_256K, | 102 | .size = SZ_256K, |
| @@ -114,7 +114,7 @@ static struct mtd_partition at2440evb_default_nand_part[] = { | |||
| 114 | }, | 114 | }, |
| 115 | }; | 115 | }; |
| 116 | 116 | ||
| 117 | static struct s3c2410_nand_set at2440evb_nand_sets[] = { | 117 | static struct s3c2410_nand_set __initdata at2440evb_nand_sets[] = { |
| 118 | [0] = { | 118 | [0] = { |
| 119 | .name = "nand", | 119 | .name = "nand", |
| 120 | .nr_chips = 1, | 120 | .nr_chips = 1, |
| @@ -123,7 +123,7 @@ static struct s3c2410_nand_set at2440evb_nand_sets[] = { | |||
| 123 | }, | 123 | }, |
| 124 | }; | 124 | }; |
| 125 | 125 | ||
| 126 | static struct s3c2410_platform_nand at2440evb_nand_info = { | 126 | static struct s3c2410_platform_nand __initdata at2440evb_nand_info = { |
| 127 | .tacls = 25, | 127 | .tacls = 25, |
| 128 | .twrph0 = 55, | 128 | .twrph0 = 55, |
| 129 | .twrph1 = 40, | 129 | .twrph1 = 40, |
| @@ -216,8 +216,6 @@ static struct platform_device *at2440evb_devices[] __initdata = { | |||
| 216 | 216 | ||
| 217 | static void __init at2440evb_map_io(void) | 217 | static void __init at2440evb_map_io(void) |
| 218 | { | 218 | { |
| 219 | s3c_device_nand.dev.platform_data = &at2440evb_nand_info; | ||
| 220 | s3c_device_sdi.name = "s3c2440-sdi"; | ||
| 221 | s3c_device_sdi.dev.platform_data = &at2440evb_mci_pdata; | 219 | s3c_device_sdi.dev.platform_data = &at2440evb_mci_pdata; |
| 222 | 220 | ||
| 223 | s3c24xx_init_io(at2440evb_iodesc, ARRAY_SIZE(at2440evb_iodesc)); | 221 | s3c24xx_init_io(at2440evb_iodesc, ARRAY_SIZE(at2440evb_iodesc)); |
| @@ -228,6 +226,7 @@ static void __init at2440evb_map_io(void) | |||
| 228 | static void __init at2440evb_init(void) | 226 | static void __init at2440evb_init(void) |
| 229 | { | 227 | { |
| 230 | s3c24xx_fb_set_platdata(&at2440evb_fb_info); | 228 | s3c24xx_fb_set_platdata(&at2440evb_fb_info); |
| 229 | s3c_nand_set_platdata(&at2440evb_nand_info); | ||
| 231 | s3c_i2c0_set_platdata(NULL); | 230 | s3c_i2c0_set_platdata(NULL); |
| 232 | 231 | ||
| 233 | platform_add_devices(at2440evb_devices, ARRAY_SIZE(at2440evb_devices)); | 232 | platform_add_devices(at2440evb_devices, ARRAY_SIZE(at2440evb_devices)); |
diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c index 1c3382fefdd..547d4fc9913 100644 --- a/arch/arm/mach-s3c2440/mach-mini2440.c +++ b/arch/arm/mach-s3c2440/mach-mini2440.c | |||
| @@ -532,7 +532,6 @@ static void __init mini2440_map_io(void) | |||
| 532 | s3c24xx_init_clocks(12000000); | 532 | s3c24xx_init_clocks(12000000); |
| 533 | s3c24xx_init_uarts(mini2440_uartcfgs, ARRAY_SIZE(mini2440_uartcfgs)); | 533 | s3c24xx_init_uarts(mini2440_uartcfgs, ARRAY_SIZE(mini2440_uartcfgs)); |
| 534 | 534 | ||
| 535 | s3c_device_nand.dev.platform_data = &mini2440_nand_info; | ||
| 536 | s3c_device_sdi.dev.platform_data = &mini2440_mmc_cfg; | 535 | s3c_device_sdi.dev.platform_data = &mini2440_mmc_cfg; |
| 537 | } | 536 | } |
| 538 | 537 | ||
| @@ -677,8 +676,11 @@ static void __init mini2440_init(void) | |||
| 677 | printk("\n"); | 676 | printk("\n"); |
| 678 | s3c24xx_fb_set_platdata(&mini2440_fb_info); | 677 | s3c24xx_fb_set_platdata(&mini2440_fb_info); |
| 679 | } | 678 | } |
| 679 | |||
| 680 | s3c24xx_udc_set_platdata(&mini2440_udc_cfg); | 680 | s3c24xx_udc_set_platdata(&mini2440_udc_cfg); |
| 681 | s3c_nand_set_platdata(&mini2440_nand_info); | ||
| 681 | s3c_i2c0_set_platdata(NULL); | 682 | s3c_i2c0_set_platdata(NULL); |
| 683 | |||
| 682 | i2c_register_board_info(0, mini2440_i2c_devs, | 684 | i2c_register_board_info(0, mini2440_i2c_devs, |
| 683 | ARRAY_SIZE(mini2440_i2c_devs)); | 685 | ARRAY_SIZE(mini2440_i2c_devs)); |
| 684 | 686 | ||
diff --git a/arch/arm/mach-s3c2440/mach-osiris-dvs.c b/arch/arm/mach-s3c2440/mach-osiris-dvs.c new file mode 100644 index 00000000000..ad2792dfbee --- /dev/null +++ b/arch/arm/mach-s3c2440/mach-osiris-dvs.c | |||
| @@ -0,0 +1,194 @@ | |||
| 1 | /* linux/arch/arm/mach-s3c2440/mach-osiris-dvs.c | ||
| 2 | * | ||
| 3 | * Copyright (c) 2009 Simtec Electronics | ||
| 4 | * http://armlinux.simtec.co.uk/ | ||
| 5 | * Ben Dooks <ben@simtec.co.uk> | ||
| 6 | * | ||
| 7 | * Simtec Osiris Dynamic Voltage Scaling support. | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License version 2 as | ||
| 11 | * published by the Free Software Foundation. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/kernel.h> | ||
| 15 | #include <linux/module.h> | ||
| 16 | #include <linux/platform_device.h> | ||
| 17 | #include <linux/cpufreq.h> | ||
| 18 | #include <linux/gpio.h> | ||
| 19 | |||
| 20 | #include <linux/i2c/tps65010.h> | ||
| 21 | |||
| 22 | #include <plat/cpu-freq.h> | ||
| 23 | |||
| 24 | #define OSIRIS_GPIO_DVS S3C2410_GPB(5) | ||
| 25 | |||
| 26 | static bool dvs_en; | ||
| 27 | |||
| 28 | static void osiris_dvs_tps_setdvs(bool on) | ||
| 29 | { | ||
| 30 | unsigned vregs1 = 0, vdcdc2 = 0; | ||
| 31 | |||
| 32 | if (!on) { | ||
| 33 | vdcdc2 = TPS_VCORE_DISCH | TPS_LP_COREOFF; | ||
| 34 | vregs1 = TPS_LDO1_OFF; /* turn off in low-power mode */ | ||
| 35 | } | ||
| 36 | |||
| 37 | dvs_en = on; | ||
| 38 | vdcdc2 |= TPS_VCORE_1_3V | TPS_VCORE_LP_1_0V; | ||
| 39 | vregs1 |= TPS_LDO2_ENABLE | TPS_LDO1_ENABLE; | ||
| 40 | |||
| 41 | tps65010_config_vregs1(vregs1); | ||
| 42 | tps65010_config_vdcdc2(vdcdc2); | ||
| 43 | } | ||
| 44 | |||
| 45 | static bool is_dvs(struct s3c_freq *f) | ||
| 46 | { | ||
| 47 | /* at the moment, we assume ARMCLK = HCLK => DVS */ | ||
| 48 | return f->armclk == f->hclk; | ||
| 49 | } | ||
| 50 | |||
| 51 | /* keep track of current state */ | ||
| 52 | static bool cur_dvs = false; | ||
| 53 | |||
| 54 | static int osiris_dvs_notify(struct notifier_block *nb, | ||
| 55 | unsigned long val, void *data) | ||
| 56 | { | ||
| 57 | struct cpufreq_freqs *cf = data; | ||
| 58 | struct s3c_cpufreq_freqs *freqs = to_s3c_cpufreq(cf); | ||
| 59 | bool old_dvs = is_dvs(&freqs->old); | ||
| 60 | bool new_dvs = is_dvs(&freqs->new); | ||
| 61 | int ret = 0; | ||
| 62 | |||
| 63 | if (!dvs_en) | ||
| 64 | return 0; | ||
| 65 | |||
| 66 | printk(KERN_DEBUG "%s: old %ld,%ld new %ld,%ld\n", __func__, | ||
| 67 | freqs->old.armclk, freqs->old.hclk, | ||
| 68 | freqs->new.armclk, freqs->new.hclk); | ||
| 69 | |||
| 70 | switch (val) { | ||
| 71 | case CPUFREQ_PRECHANGE: | ||
| 72 | if (old_dvs & !new_dvs || | ||
| 73 | cur_dvs & !new_dvs) { | ||
| 74 | pr_debug("%s: exiting dvs\n", __func__); | ||
| 75 | cur_dvs = false; | ||
| 76 | gpio_set_value(OSIRIS_GPIO_DVS, 1); | ||
| 77 | } | ||
| 78 | break; | ||
| 79 | case CPUFREQ_POSTCHANGE: | ||
| 80 | if (!old_dvs & new_dvs || | ||
| 81 | !cur_dvs & new_dvs) { | ||
| 82 | pr_debug("entering dvs\n"); | ||
| 83 | cur_dvs = true; | ||
| 84 | gpio_set_value(OSIRIS_GPIO_DVS, 0); | ||
| 85 | } | ||
| 86 | break; | ||
| 87 | } | ||
| 88 | |||
| 89 | return ret; | ||
| 90 | } | ||
| 91 | |||
| 92 | static struct notifier_block osiris_dvs_nb = { | ||
| 93 | .notifier_call = osiris_dvs_notify, | ||
| 94 | }; | ||
| 95 | |||
| 96 | static int __devinit osiris_dvs_probe(struct platform_device *pdev) | ||
| 97 | { | ||
| 98 | int ret; | ||
| 99 | |||
| 100 | dev_info(&pdev->dev, "initialising\n"); | ||
| 101 | |||
| 102 | ret = gpio_request(OSIRIS_GPIO_DVS, "osiris-dvs"); | ||
| 103 | if (ret) { | ||
| 104 | dev_err(&pdev->dev, "cannot claim gpio\n"); | ||
| 105 | goto err_nogpio; | ||
| 106 | } | ||
| 107 | |||
| 108 | /* start with dvs disabled */ | ||
| 109 | gpio_direction_output(OSIRIS_GPIO_DVS, 1); | ||
| 110 | |||
| 111 | ret = cpufreq_register_notifier(&osiris_dvs_nb, | ||
| 112 | CPUFREQ_TRANSITION_NOTIFIER); | ||
| 113 | if (ret) { | ||
| 114 | dev_err(&pdev->dev, "failed to register with cpufreq\n"); | ||
| 115 | goto err_nofreq; | ||
| 116 | } | ||
| 117 | |||
| 118 | osiris_dvs_tps_setdvs(true); | ||
| 119 | |||
| 120 | return 0; | ||
| 121 | |||
| 122 | err_nofreq: | ||
| 123 | gpio_free(OSIRIS_GPIO_DVS); | ||
| 124 | |||
| 125 | err_nogpio: | ||
| 126 | return ret; | ||
| 127 | } | ||
| 128 | |||
| 129 | static int __devexit osiris_dvs_remove(struct platform_device *pdev) | ||
| 130 | { | ||
| 131 | dev_info(&pdev->dev, "exiting\n"); | ||
| 132 | |||
| 133 | /* disable any current dvs */ | ||
| 134 | gpio_set_value(OSIRIS_GPIO_DVS, 1); | ||
| 135 | osiris_dvs_tps_setdvs(false); | ||
| 136 | |||
| 137 | cpufreq_unregister_notifier(&osiris_dvs_nb, | ||
| 138 | CPUFREQ_TRANSITION_NOTIFIER); | ||
| 139 | |||
| 140 | gpio_free(OSIRIS_GPIO_DVS); | ||
| 141 | |||
| 142 | return 0; | ||
| 143 | } | ||
| 144 | |||
| 145 | /* the CONFIG_PM block is so small, it isn't worth actaully compiling it | ||
| 146 | * out if the configuration isn't set. */ | ||
| 147 | |||
| 148 | static int osiris_dvs_suspend(struct device *dev) | ||
| 149 | { | ||
| 150 | gpio_set_value(OSIRIS_GPIO_DVS, 1); | ||
| 151 | osiris_dvs_tps_setdvs(false); | ||
| 152 | cur_dvs = false; | ||
| 153 | |||
| 154 | return 0; | ||
| 155 | } | ||
| 156 | |||
| 157 | static int osiris_dvs_resume(struct device *dev) | ||
| 158 | { | ||
| 159 | osiris_dvs_tps_setdvs(true); | ||
| 160 | return 0; | ||
| 161 | } | ||
| 162 | |||
| 163 | static const struct dev_pm_ops osiris_dvs_pm = { | ||
| 164 | .suspend = osiris_dvs_suspend, | ||
| 165 | .resume = osiris_dvs_resume, | ||
| 166 | }; | ||
| 167 | |||
| 168 | static struct platform_driver osiris_dvs_driver = { | ||
| 169 | .probe = osiris_dvs_probe, | ||
| 170 | .remove = __devexit_p(osiris_dvs_remove), | ||
| 171 | .driver = { | ||
| 172 | .name = "osiris-dvs", | ||
| 173 | .owner = THIS_MODULE, | ||
| 174 | .pm = &osiris_dvs_pm, | ||
| 175 | }, | ||
| 176 | }; | ||
| 177 | |||
| 178 | static int __init osiris_dvs_init(void) | ||
| 179 | { | ||
| 180 | return platform_driver_register(&osiris_dvs_driver); | ||
| 181 | } | ||
| 182 | |||
| 183 | static void __exit osiris_dvs_exit(void) | ||
| 184 | { | ||
| 185 | platform_driver_unregister(&osiris_dvs_driver); | ||
| 186 | } | ||
| 187 | |||
| 188 | module_init(osiris_dvs_init); | ||
| 189 | module_exit(osiris_dvs_exit); | ||
| 190 | |||
| 191 | MODULE_DESCRIPTION("Simtec OSIRIS DVS support"); | ||
| 192 | MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); | ||
| 193 | MODULE_LICENSE("GPL"); | ||
| 194 | MODULE_ALIAS("platform:osiris-dvs"); | ||
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c index 2105a41281a..015dfb2a80d 100644 --- a/arch/arm/mach-s3c2440/mach-osiris.c +++ b/arch/arm/mach-s3c2440/mach-osiris.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* linux/arch/arm/mach-s3c2440/mach-osiris.c | 1 | /* linux/arch/arm/mach-s3c2440/mach-osiris.c |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2005,2008 Simtec Electronics | 3 | * Copyright (c) 2005-2008 Simtec Electronics |
| 4 | * http://armlinux.simtec.co.uk/ | 4 | * http://armlinux.simtec.co.uk/ |
| 5 | * Ben Dooks <ben@simtec.co.uk> | 5 | * Ben Dooks <ben@simtec.co.uk> |
| 6 | * | 6 | * |
| @@ -23,6 +23,8 @@ | |||
| 23 | #include <linux/i2c.h> | 23 | #include <linux/i2c.h> |
| 24 | #include <linux/io.h> | 24 | #include <linux/io.h> |
| 25 | 25 | ||
| 26 | #include <linux/i2c/tps65010.h> | ||
| 27 | |||
| 26 | #include <asm/mach/arch.h> | 28 | #include <asm/mach/arch.h> |
| 27 | #include <asm/mach/map.h> | 29 | #include <asm/mach/map.h> |
| 28 | #include <asm/mach/irq.h> | 30 | #include <asm/mach/irq.h> |
| @@ -148,7 +150,7 @@ static int external_map[] = { 2 }; | |||
| 148 | static int chip0_map[] = { 0 }; | 150 | static int chip0_map[] = { 0 }; |
| 149 | static int chip1_map[] = { 1 }; | 151 | static int chip1_map[] = { 1 }; |
| 150 | 152 | ||
| 151 | static struct mtd_partition osiris_default_nand_part[] = { | 153 | static struct mtd_partition __initdata osiris_default_nand_part[] = { |
| 152 | [0] = { | 154 | [0] = { |
| 153 | .name = "Boot Agent", | 155 | .name = "Boot Agent", |
| 154 | .size = SZ_16K, | 156 | .size = SZ_16K, |
| @@ -171,7 +173,7 @@ static struct mtd_partition osiris_default_nand_part[] = { | |||
| 171 | } | 173 | } |
| 172 | }; | 174 | }; |
| 173 | 175 | ||
| 174 | static struct mtd_partition osiris_default_nand_part_large[] = { | 176 | static struct mtd_partition __initdata osiris_default_nand_part_large[] = { |
| 175 | [0] = { | 177 | [0] = { |
| 176 | .name = "Boot Agent", | 178 | .name = "Boot Agent", |
| 177 | .size = SZ_128K, | 179 | .size = SZ_128K, |
| @@ -201,7 +203,7 @@ static struct mtd_partition osiris_default_nand_part_large[] = { | |||
| 201 | * socket. | 203 | * socket. |
| 202 | */ | 204 | */ |
| 203 | 205 | ||
| 204 | static struct s3c2410_nand_set osiris_nand_sets[] = { | 206 | static struct s3c2410_nand_set __initdata osiris_nand_sets[] = { |
| 205 | [1] = { | 207 | [1] = { |
| 206 | .name = "External", | 208 | .name = "External", |
| 207 | .nr_chips = 1, | 209 | .nr_chips = 1, |
| @@ -243,7 +245,7 @@ static void osiris_nand_select(struct s3c2410_nand_set *set, int slot) | |||
| 243 | __raw_writeb(tmp, OSIRIS_VA_CTRL0); | 245 | __raw_writeb(tmp, OSIRIS_VA_CTRL0); |
| 244 | } | 246 | } |
| 245 | 247 | ||
| 246 | static struct s3c2410_platform_nand osiris_nand_info = { | 248 | static struct s3c2410_platform_nand __initdata osiris_nand_info = { |
| 247 | .tacls = 25, | 249 | .tacls = 25, |
| 248 | .twrph0 = 60, | 250 | .twrph0 = 60, |
| 249 | .twrph1 = 60, | 251 | .twrph1 = 60, |
| @@ -326,12 +328,44 @@ static struct sys_device osiris_pm_sysdev = { | |||
| 326 | .cls = &osiris_pm_sysclass, | 328 | .cls = &osiris_pm_sysclass, |
| 327 | }; | 329 | }; |
| 328 | 330 | ||
| 331 | /* Link for DVS driver to TPS65011 */ | ||
| 332 | |||
| 333 | static void osiris_tps_release(struct device *dev) | ||
| 334 | { | ||
| 335 | /* static device, do not need to release anything */ | ||
| 336 | } | ||
| 337 | |||
| 338 | static struct platform_device osiris_tps_device = { | ||
| 339 | .name = "osiris-dvs", | ||
| 340 | .id = -1, | ||
| 341 | .dev.release = osiris_tps_release, | ||
| 342 | }; | ||
| 343 | |||
| 344 | static int osiris_tps_setup(struct i2c_client *client, void *context) | ||
| 345 | { | ||
| 346 | osiris_tps_device.dev.parent = &client->dev; | ||
| 347 | return platform_device_register(&osiris_tps_device); | ||
| 348 | } | ||
| 349 | |||
| 350 | static int osiris_tps_remove(struct i2c_client *client, void *context) | ||
| 351 | { | ||
| 352 | platform_device_unregister(&osiris_tps_device); | ||
| 353 | return 0; | ||
| 354 | } | ||
| 355 | |||
| 356 | static struct tps65010_board osiris_tps_board = { | ||
| 357 | .base = -1, /* GPIO can go anywhere at the moment */ | ||
| 358 | .setup = osiris_tps_setup, | ||
| 359 | .teardown = osiris_tps_remove, | ||
| 360 | }; | ||
| 361 | |||
| 329 | /* I2C devices fitted. */ | 362 | /* I2C devices fitted. */ |
| 330 | 363 | ||
| 331 | static struct i2c_board_info osiris_i2c_devs[] __initdata = { | 364 | static struct i2c_board_info osiris_i2c_devs[] __initdata = { |
| 332 | { | 365 | { |
| 333 | I2C_BOARD_INFO("tps65011", 0x48), | 366 | I2C_BOARD_INFO("tps65011", 0x48), |
| 334 | .irq = IRQ_EINT20, | 367 | .irq = IRQ_EINT20, |
| 368 | .platform_data = &osiris_tps_board, | ||
| 335 | }, | 369 | }, |
| 336 | }; | 370 | }; |
| 337 | 371 | ||
| @@ -377,8 +411,6 @@ static void __init osiris_map_io(void) | |||
| 377 | 411 | ||
| 378 | s3c24xx_register_clocks(osiris_clocks, ARRAY_SIZE(osiris_clocks)); | 412 | s3c24xx_register_clocks(osiris_clocks, ARRAY_SIZE(osiris_clocks)); |
| 379 | 413 | ||
| 380 | s3c_device_nand.dev.platform_data = &osiris_nand_info; | ||
| 381 | |||
| 382 | s3c24xx_init_io(osiris_iodesc, ARRAY_SIZE(osiris_iodesc)); | 414 | s3c24xx_init_io(osiris_iodesc, ARRAY_SIZE(osiris_iodesc)); |
| 383 | s3c24xx_init_clocks(0); | 415 | s3c24xx_init_clocks(0); |
| 384 | s3c24xx_init_uarts(osiris_uartcfgs, ARRAY_SIZE(osiris_uartcfgs)); | 416 | s3c24xx_init_uarts(osiris_uartcfgs, ARRAY_SIZE(osiris_uartcfgs)); |
| @@ -408,6 +440,7 @@ static void __init osiris_init(void) | |||
| 408 | sysdev_register(&osiris_pm_sysdev); | 440 | sysdev_register(&osiris_pm_sysdev); |
| 409 | 441 | ||
| 410 | s3c_i2c0_set_platdata(NULL); | 442 | s3c_i2c0_set_platdata(NULL); |
| 443 | s3c_nand_set_platdata(&osiris_nand_info); | ||
| 411 | 444 | ||
| 412 | s3c_cpufreq_setboard(&osiris_cpufreq); | 445 | s3c_cpufreq_setboard(&osiris_cpufreq); |
| 413 | 446 | ||
diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c index bc8d8d1ebd1..a952a13afb1 100644 --- a/arch/arm/mach-s3c2440/mach-rx3715.c +++ b/arch/arm/mach-s3c2440/mach-rx3715.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* linux/arch/arm/mach-s3c2440/mach-rx3715.c | 1 | /* linux/arch/arm/mach-s3c2440/mach-rx3715.c |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2003,2004 Simtec Electronics | 3 | * Copyright (c) 2003-2004 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * | 5 | * |
| 6 | * http://www.handhelds.org/projects/rx3715.html | 6 | * http://www.handhelds.org/projects/rx3715.html |
| @@ -149,7 +149,7 @@ static struct s3c2410fb_mach_info rx3715_fb_info __initdata = { | |||
| 149 | .gpdup_mask = 0xffffffff, | 149 | .gpdup_mask = 0xffffffff, |
| 150 | }; | 150 | }; |
| 151 | 151 | ||
| 152 | static struct mtd_partition rx3715_nand_part[] = { | 152 | static struct mtd_partition __initdata rx3715_nand_part[] = { |
| 153 | [0] = { | 153 | [0] = { |
| 154 | .name = "Whole Flash", | 154 | .name = "Whole Flash", |
| 155 | .offset = 0, | 155 | .offset = 0, |
| @@ -158,7 +158,7 @@ static struct mtd_partition rx3715_nand_part[] = { | |||
| 158 | } | 158 | } |
| 159 | }; | 159 | }; |
| 160 | 160 | ||
| 161 | static struct s3c2410_nand_set rx3715_nand_sets[] = { | 161 | static struct s3c2410_nand_set __initdata rx3715_nand_sets[] = { |
| 162 | [0] = { | 162 | [0] = { |
| 163 | .name = "Internal", | 163 | .name = "Internal", |
| 164 | .nr_chips = 1, | 164 | .nr_chips = 1, |
| @@ -167,7 +167,7 @@ static struct s3c2410_nand_set rx3715_nand_sets[] = { | |||
| 167 | }, | 167 | }, |
| 168 | }; | 168 | }; |
| 169 | 169 | ||
| 170 | static struct s3c2410_platform_nand rx3715_nand_info = { | 170 | static struct s3c2410_platform_nand __initdata rx3715_nand_info = { |
| 171 | .tacls = 25, | 171 | .tacls = 25, |
| 172 | .twrph0 = 50, | 172 | .twrph0 = 50, |
| 173 | .twrph1 = 15, | 173 | .twrph1 = 15, |
| @@ -186,8 +186,6 @@ static struct platform_device *rx3715_devices[] __initdata = { | |||
| 186 | 186 | ||
| 187 | static void __init rx3715_map_io(void) | 187 | static void __init rx3715_map_io(void) |
| 188 | { | 188 | { |
| 189 | s3c_device_nand.dev.platform_data = &rx3715_nand_info; | ||
| 190 | |||
| 191 | s3c24xx_init_io(rx3715_iodesc, ARRAY_SIZE(rx3715_iodesc)); | 189 | s3c24xx_init_io(rx3715_iodesc, ARRAY_SIZE(rx3715_iodesc)); |
| 192 | s3c24xx_init_clocks(16934000); | 190 | s3c24xx_init_clocks(16934000); |
| 193 | s3c24xx_init_uarts(rx3715_uartcfgs, ARRAY_SIZE(rx3715_uartcfgs)); | 191 | s3c24xx_init_uarts(rx3715_uartcfgs, ARRAY_SIZE(rx3715_uartcfgs)); |
| @@ -205,6 +203,7 @@ static void __init rx3715_init_machine(void) | |||
| 205 | #endif | 203 | #endif |
| 206 | s3c_pm_init(); | 204 | s3c_pm_init(); |
| 207 | 205 | ||
| 206 | s3c_nand_set_platdata(&rx3715_nand_info); | ||
| 208 | s3c24xx_fb_set_platdata(&rx3715_fb_info); | 207 | s3c24xx_fb_set_platdata(&rx3715_fb_info); |
| 209 | platform_add_devices(rx3715_devices, ARRAY_SIZE(rx3715_devices)); | 208 | platform_add_devices(rx3715_devices, ARRAY_SIZE(rx3715_devices)); |
| 210 | } | 209 | } |
diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c2440/mach-smdk2440.c index db6eafbd4d9..ec13e748ccc 100644 --- a/arch/arm/mach-s3c2440/mach-smdk2440.c +++ b/arch/arm/mach-s3c2440/mach-smdk2440.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* linux/arch/arm/mach-s3c2440/mach-smdk2440.c | 1 | /* linux/arch/arm/mach-s3c2440/mach-smdk2440.c |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2004,2005 Simtec Electronics | 3 | * Copyright (c) 2004-2005 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * | 5 | * |
| 6 | * http://www.fluff.org/ben/smdk2440/ | 6 | * http://www.fluff.org/ben/smdk2440/ |
diff --git a/arch/arm/mach-s3c2442/mach-gta02.c b/arch/arm/mach-s3c2442/mach-gta02.c index 0fb385bd9cd..f76d6ff4aeb 100644 --- a/arch/arm/mach-s3c2442/mach-gta02.c +++ b/arch/arm/mach-s3c2442/mach-gta02.c | |||
| @@ -423,7 +423,7 @@ static struct i2c_board_info gta02_i2c_devs[] __initdata = { | |||
| 423 | }, | 423 | }, |
| 424 | }; | 424 | }; |
| 425 | 425 | ||
| 426 | static struct s3c2410_nand_set gta02_nand_sets[] = { | 426 | static struct s3c2410_nand_set __initdata gta02_nand_sets[] = { |
| 427 | [0] = { | 427 | [0] = { |
| 428 | /* | 428 | /* |
| 429 | * This name is also hard-coded in the boot loaders, so | 429 | * This name is also hard-coded in the boot loaders, so |
| @@ -442,7 +442,7 @@ static struct s3c2410_nand_set gta02_nand_sets[] = { | |||
| 442 | * data sheet (K5D2G13ACM-D075 MCP Memory). | 442 | * data sheet (K5D2G13ACM-D075 MCP Memory). |
| 443 | */ | 443 | */ |
| 444 | 444 | ||
| 445 | static struct s3c2410_platform_nand gta02_nand_info = { | 445 | static struct s3c2410_platform_nand __initdata gta02_nand_info = { |
| 446 | .tacls = 0, | 446 | .tacls = 0, |
| 447 | .twrph0 = 25, | 447 | .twrph0 = 25, |
| 448 | .twrph1 = 15, | 448 | .twrph1 = 15, |
| @@ -621,9 +621,9 @@ static void __init gta02_machine_init(void) | |||
| 621 | #endif | 621 | #endif |
| 622 | 622 | ||
| 623 | s3c_device_usb.dev.platform_data = >a02_usb_info; | 623 | s3c_device_usb.dev.platform_data = >a02_usb_info; |
| 624 | s3c_device_nand.dev.platform_data = >a02_nand_info; | ||
| 625 | 624 | ||
| 626 | s3c24xx_udc_set_platdata(>a02_udc_cfg); | 625 | s3c24xx_udc_set_platdata(>a02_udc_cfg); |
| 626 | s3c_nand_set_platdata(>a02_nand_info); | ||
| 627 | s3c_i2c0_set_platdata(NULL); | 627 | s3c_i2c0_set_platdata(NULL); |
| 628 | 628 | ||
| 629 | i2c_register_board_info(0, gta02_i2c_devs, ARRAY_SIZE(gta02_i2c_devs)); | 629 | i2c_register_board_info(0, gta02_i2c_devs, ARRAY_SIZE(gta02_i2c_devs)); |
diff --git a/arch/arm/mach-s3c24a0/include/mach/map.h b/arch/arm/mach-s3c24a0/include/mach/map.h index 79e4d93ea2b..d88c8b24fe3 100644 --- a/arch/arm/mach-s3c24a0/include/mach/map.h +++ b/arch/arm/mach-s3c24a0/include/mach/map.h | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* linux/arch/arm/mach-s3c24a0/include/mach/map.h | 1 | /* linux/arch/arm/mach-s3c24a0/include/mach/map.h |
| 2 | * | 2 | * |
| 3 | * Copyright 2003,2007 Simtec Electronics | 3 | * Copyright 2003-2007 Simtec Electronics |
| 4 | * http://armlinux.simtec.co.uk/ | 4 | * http://armlinux.simtec.co.uk/ |
| 5 | * Ben Dooks <ben@simtec.co.uk> | 5 | * Ben Dooks <ben@simtec.co.uk> |
| 6 | * | 6 | * |
diff --git a/arch/arm/mach-s3c24a0/include/mach/regs-clock.h b/arch/arm/mach-s3c24a0/include/mach/regs-clock.h index af2abd756c3..be0af518b48 100644 --- a/arch/arm/mach-s3c24a0/include/mach/regs-clock.h +++ b/arch/arm/mach-s3c24a0/include/mach/regs-clock.h | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | /* linux/arch/arm/mach-s3c24a0/include/mach/regs-clock.h | 1 | /* linux/arch/arm/mach-s3c24a0/include/mach/regs-clock.h |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2003,2004,2005,2006 Simtec Electronics <linux@simtec.co.uk> | 3 | * Copyright (c) 2003-2006 Simtec Electronics <linux@simtec.co.uk> |
| 4 | * http://armlinux.simtec.co.uk/ | 4 | * http://armlinux.simtec.co.uk/ |
| 5 | * | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
diff --git a/arch/arm/mach-s3c6400/include/mach/map.h b/arch/arm/mach-s3c6400/include/mach/map.h index fc8b223bad4..106ee13581e 100644 --- a/arch/arm/mach-s3c6400/include/mach/map.h +++ b/arch/arm/mach-s3c6400/include/mach/map.h | |||
| @@ -48,6 +48,8 @@ | |||
| 48 | #define S3C64XX_PA_IIS1 (0x7F003000) | 48 | #define S3C64XX_PA_IIS1 (0x7F003000) |
| 49 | #define S3C64XX_PA_TIMER (0x7F006000) | 49 | #define S3C64XX_PA_TIMER (0x7F006000) |
| 50 | #define S3C64XX_PA_IIC0 (0x7F004000) | 50 | #define S3C64XX_PA_IIC0 (0x7F004000) |
| 51 | #define S3C64XX_PA_PCM0 (0x7F009000) | ||
| 52 | #define S3C64XX_PA_PCM1 (0x7F00A000) | ||
| 51 | #define S3C64XX_PA_IISV4 (0x7F00D000) | 53 | #define S3C64XX_PA_IISV4 (0x7F00D000) |
| 52 | #define S3C64XX_PA_IIC1 (0x7F00F000) | 54 | #define S3C64XX_PA_IIC1 (0x7F00F000) |
| 53 | 55 | ||
| @@ -64,6 +66,9 @@ | |||
| 64 | 66 | ||
| 65 | #define S3C64XX_PA_USBHOST (0x74300000) | 67 | #define S3C64XX_PA_USBHOST (0x74300000) |
| 66 | 68 | ||
| 69 | #define S3C64XX_PA_USB_HSPHY (0x7C100000) | ||
| 70 | #define S3C64XX_VA_USB_HSPHY S3C_ADDR_CPU(0x00200000) | ||
| 71 | |||
| 67 | /* place VICs close together */ | 72 | /* place VICs close together */ |
| 68 | #define S3C_VA_VIC0 (S3C_VA_IRQ + 0x00) | 73 | #define S3C_VA_VIC0 (S3C_VA_IRQ + 0x00) |
| 69 | #define S3C_VA_VIC1 (S3C_VA_IRQ + 0x10000) | 74 | #define S3C_VA_VIC1 (S3C_VA_IRQ + 0x10000) |
| @@ -79,5 +84,6 @@ | |||
| 79 | #define S3C_PA_FB S3C64XX_PA_FB | 84 | #define S3C_PA_FB S3C64XX_PA_FB |
| 80 | #define S3C_PA_USBHOST S3C64XX_PA_USBHOST | 85 | #define S3C_PA_USBHOST S3C64XX_PA_USBHOST |
| 81 | #define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG | 86 | #define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG |
| 87 | #define S3C_VA_USB_HSPHY S3C64XX_VA_USB_HSPHY | ||
| 82 | 88 | ||
| 83 | #endif /* __ASM_ARCH_6400_MAP_H */ | 89 | #endif /* __ASM_ARCH_6400_MAP_H */ |
diff --git a/arch/arm/mach-s3c6400/include/mach/regs-fb.h b/arch/arm/mach-s3c6400/include/mach/regs-fb.h index 47019795ce0..f56611526c6 100644 --- a/arch/arm/mach-s3c6400/include/mach/regs-fb.h +++ b/arch/arm/mach-s3c6400/include/mach/regs-fb.h | |||
| @@ -1,195 +1,30 @@ | |||
| 1 | /* arch/arm/mach-s3c6400/include/mach/regs-fb.h | 1 | /* |
| 2 | * | ||
| 3 | * Copyright 2008 Openmoko, Inc. | 2 | * Copyright 2008 Openmoko, Inc. |
| 4 | * Copyright 2008 Simtec Electronics | 3 | * Copyright 2008 Simtec Electronics |
| 5 | * http://armlinux.simtec.co.uk/ | 4 | * Copyright 2009 Samsung Electronics Co. |
| 6 | * Ben Dooks <ben@simtec.co.uk> | ||
| 7 | * | ||
| 8 | * S3C64XX - new-style framebuffer register definitions | ||
| 9 | * | 5 | * |
| 10 | * This is the register set for the new style framebuffer interface | 6 | * Pawel Osciak <p.osciak@samsung.com> |
| 11 | * found from the S3C2443 onwards and specifically the S3C64XX series | 7 | * Based on plat-s3c/include/plat/regs-fb.h by Ben Dooks <ben@simtec.co.uk> |
| 12 | * S3C6400 and S3C6410. | ||
| 13 | * | 8 | * |
| 14 | * The file contains the cpu specific items which change between whichever | 9 | * Framebuffer register definitions for Samsung S3C64xx. |
| 15 | * architecture is selected. See <plat/regs-fb.h> for the core definitions | ||
| 16 | * that are the same. | ||
| 17 | * | 10 | * |
| 18 | * This program is free software; you can redistribute it and/or modify | 11 | * This program is free software; you can redistribute it and/or modify |
| 19 | * it under the terms of the GNU General Public License version 2 as | 12 | * it under the terms of the GNU General Public License version 2 as |
| 20 | * published by the Free Software Foundation. | 13 | * published by the Free Software Foundation. |
| 21 | */ | 14 | */ |
| 22 | 15 | ||
| 23 | /* include the core definitions here, in case we really do need to | 16 | #ifndef __ASM_ARCH_MACH_REGS_FB_H |
| 24 | * override them at a later date. | 17 | #define __ASM_ARCH_MACH_REGS_FB_H __FILE__ |
| 25 | */ | ||
| 26 | |||
| 27 | #include <plat/regs-fb.h> | ||
| 28 | |||
| 29 | #define S3C_FB_MAX_WIN (5) /* number of hardware windows available. */ | ||
| 30 | #define VIDCON1_FSTATUS_EVEN (1 << 15) | ||
| 31 | |||
| 32 | /* Video timing controls */ | ||
| 33 | #define VIDTCON0 (0x10) | ||
| 34 | #define VIDTCON1 (0x14) | ||
| 35 | #define VIDTCON2 (0x18) | ||
| 36 | |||
| 37 | /* Window position controls */ | ||
| 38 | |||
| 39 | #define WINCON(_win) (0x20 + ((_win) * 4)) | ||
| 40 | |||
| 41 | /* OSD1 and OSD4 do not have register D */ | ||
| 42 | |||
| 43 | #define VIDOSD_A(_win) (0x40 + ((_win) * 16)) | ||
| 44 | #define VIDOSD_B(_win) (0x44 + ((_win) * 16)) | ||
| 45 | #define VIDOSD_C(_win) (0x48 + ((_win) * 16)) | ||
| 46 | #define VIDOSD_D(_win) (0x4C + ((_win) * 16)) | ||
| 47 | |||
| 48 | /* Video buffer addresses */ | ||
| 49 | |||
| 50 | #define VIDW_BUF_START(_buff) (0xA0 + ((_buff) * 8)) | ||
| 51 | #define VIDW_BUF_START1(_buff) (0xA4 + ((_buff) * 8)) | ||
| 52 | #define VIDW_BUF_END(_buff) (0xD0 + ((_buff) * 8)) | ||
| 53 | #define VIDW_BUF_END1(_buff) (0xD4 + ((_buff) * 8)) | ||
| 54 | #define VIDW_BUF_SIZE(_buff) (0x100 + ((_buff) * 4)) | ||
| 55 | |||
| 56 | #define VIDINTCON0 (0x130) | ||
| 57 | |||
| 58 | #define WxKEYCONy(_win, _con) ((0x140 + ((_win) * 8)) + ((_con) * 4)) | ||
| 59 | |||
| 60 | /* WINCONx */ | ||
| 61 | |||
| 62 | #define WINCONx_CSCWIDTH_MASK (0x3 << 26) | ||
| 63 | #define WINCONx_CSCWIDTH_SHIFT (26) | ||
| 64 | #define WINCONx_CSCWIDTH_WIDE (0x0 << 26) | ||
| 65 | #define WINCONx_CSCWIDTH_NARROW (0x3 << 26) | ||
| 66 | |||
| 67 | #define WINCONx_ENLOCAL (1 << 22) | ||
| 68 | #define WINCONx_BUFSTATUS (1 << 21) | ||
| 69 | #define WINCONx_BUFSEL (1 << 20) | ||
| 70 | #define WINCONx_BUFAUTOEN (1 << 19) | ||
| 71 | #define WINCONx_YCbCr (1 << 13) | ||
| 72 | |||
| 73 | #define WINCON1_LOCALSEL_CAMIF (1 << 23) | ||
| 74 | |||
| 75 | #define WINCON2_LOCALSEL_CAMIF (1 << 23) | ||
| 76 | #define WINCON2_BLD_PIX (1 << 6) | ||
| 77 | |||
| 78 | #define WINCON2_ALPHA_SEL (1 << 1) | ||
| 79 | #define WINCON2_BPPMODE_MASK (0xf << 2) | ||
| 80 | #define WINCON2_BPPMODE_SHIFT (2) | ||
| 81 | #define WINCON2_BPPMODE_1BPP (0x0 << 2) | ||
| 82 | #define WINCON2_BPPMODE_2BPP (0x1 << 2) | ||
| 83 | #define WINCON2_BPPMODE_4BPP (0x2 << 2) | ||
| 84 | #define WINCON2_BPPMODE_8BPP_1232 (0x4 << 2) | ||
| 85 | #define WINCON2_BPPMODE_16BPP_565 (0x5 << 2) | ||
| 86 | #define WINCON2_BPPMODE_16BPP_A1555 (0x6 << 2) | ||
| 87 | #define WINCON2_BPPMODE_16BPP_I1555 (0x7 << 2) | ||
| 88 | #define WINCON2_BPPMODE_18BPP_666 (0x8 << 2) | ||
| 89 | #define WINCON2_BPPMODE_18BPP_A1665 (0x9 << 2) | ||
| 90 | #define WINCON2_BPPMODE_19BPP_A1666 (0xa << 2) | ||
| 91 | #define WINCON2_BPPMODE_24BPP_888 (0xb << 2) | ||
| 92 | #define WINCON2_BPPMODE_24BPP_A1887 (0xc << 2) | ||
| 93 | #define WINCON2_BPPMODE_25BPP_A1888 (0xd << 2) | ||
| 94 | #define WINCON2_BPPMODE_28BPP_A4888 (0xd << 2) | ||
| 95 | |||
| 96 | #define WINCON3_BLD_PIX (1 << 6) | ||
| 97 | |||
| 98 | #define WINCON3_ALPHA_SEL (1 << 1) | ||
| 99 | #define WINCON3_BPPMODE_MASK (0xf << 2) | ||
| 100 | #define WINCON3_BPPMODE_SHIFT (2) | ||
| 101 | #define WINCON3_BPPMODE_1BPP (0x0 << 2) | ||
| 102 | #define WINCON3_BPPMODE_2BPP (0x1 << 2) | ||
| 103 | #define WINCON3_BPPMODE_4BPP (0x2 << 2) | ||
| 104 | #define WINCON3_BPPMODE_16BPP_565 (0x5 << 2) | ||
| 105 | #define WINCON3_BPPMODE_16BPP_A1555 (0x6 << 2) | ||
| 106 | #define WINCON3_BPPMODE_16BPP_I1555 (0x7 << 2) | ||
| 107 | #define WINCON3_BPPMODE_18BPP_666 (0x8 << 2) | ||
| 108 | #define WINCON3_BPPMODE_18BPP_A1665 (0x9 << 2) | ||
| 109 | #define WINCON3_BPPMODE_19BPP_A1666 (0xa << 2) | ||
| 110 | #define WINCON3_BPPMODE_24BPP_888 (0xb << 2) | ||
| 111 | #define WINCON3_BPPMODE_24BPP_A1887 (0xc << 2) | ||
| 112 | #define WINCON3_BPPMODE_25BPP_A1888 (0xd << 2) | ||
| 113 | #define WINCON3_BPPMODE_28BPP_A4888 (0xd << 2) | ||
| 114 | |||
| 115 | #define VIDINTCON0_FIFIOSEL_WINDOW2 (0x10 << 5) | ||
| 116 | #define VIDINTCON0_FIFIOSEL_WINDOW3 (0x20 << 5) | ||
| 117 | #define VIDINTCON0_FIFIOSEL_WINDOW4 (0x40 << 5) | ||
| 118 | |||
| 119 | #define DITHMODE (0x170) | ||
| 120 | #define WINxMAP(_win) (0x180 + ((_win) * 4)) | ||
| 121 | |||
| 122 | |||
| 123 | #define DITHMODE_R_POS_MASK (0x3 << 5) | ||
| 124 | #define DITHMODE_R_POS_SHIFT (5) | ||
| 125 | #define DITHMODE_R_POS_8BIT (0x0 << 5) | ||
| 126 | #define DITHMODE_R_POS_6BIT (0x1 << 5) | ||
| 127 | #define DITHMODE_R_POS_5BIT (0x2 << 5) | ||
| 128 | |||
| 129 | #define DITHMODE_G_POS_MASK (0x3 << 3) | ||
| 130 | #define DITHMODE_G_POS_SHIFT (3) | ||
| 131 | #define DITHMODE_G_POS_8BIT (0x0 << 3) | ||
| 132 | #define DITHMODE_G_POS_6BIT (0x1 << 3) | ||
| 133 | #define DITHMODE_G_POS_5BIT (0x2 << 3) | ||
| 134 | |||
| 135 | #define DITHMODE_B_POS_MASK (0x3 << 1) | ||
| 136 | #define DITHMODE_B_POS_SHIFT (1) | ||
| 137 | #define DITHMODE_B_POS_8BIT (0x0 << 1) | ||
| 138 | #define DITHMODE_B_POS_6BIT (0x1 << 1) | ||
| 139 | #define DITHMODE_B_POS_5BIT (0x2 << 1) | ||
| 140 | 18 | ||
| 141 | #define DITHMODE_DITH_EN (1 << 0) | 19 | #include <plat/regs-fb-v4.h> |
| 142 | |||
| 143 | #define WPALCON (0x1A0) | ||
| 144 | |||
| 145 | #define WPALCON_W4PAL_16BPP_A555 (1 << 8) | ||
| 146 | #define WPALCON_W3PAL_16BPP_A555 (1 << 7) | ||
| 147 | #define WPALCON_W2PAL_16BPP_A555 (1 << 6) | ||
| 148 | 20 | ||
| 149 | /* Palette registers */ | 21 | /* Palette registers */ |
| 150 | |||
| 151 | #define WIN2_PAL(_entry) (0x300 + ((_entry) * 2)) | 22 | #define WIN2_PAL(_entry) (0x300 + ((_entry) * 2)) |
| 152 | #define WIN3_PAL(_entry) (0x320 + ((_entry) * 2)) | 23 | #define WIN3_PAL(_entry) (0x320 + ((_entry) * 2)) |
| 153 | #define WIN4_PAL(_entry) (0x340 + ((_entry) * 2)) | 24 | #define WIN4_PAL(_entry) (0x340 + ((_entry) * 2)) |
| 154 | #define WIN0_PAL(_entry) (0x400 + ((_entry) * 4)) | 25 | #define WIN0_PAL(_entry) (0x400 + ((_entry) * 4)) |
| 155 | #define WIN1_PAL(_entry) (0x800 + ((_entry) * 4)) | 26 | #define WIN1_PAL(_entry) (0x800 + ((_entry) * 4)) |
| 156 | 27 | ||
| 157 | /* system specific implementation code for palette sizes, and other | ||
| 158 | * information that changes depending on which architecture is being | ||
| 159 | * compiled. | ||
| 160 | */ | ||
| 161 | |||
| 162 | /* return true if window _win has OSD register D */ | ||
| 163 | #define s3c_fb_has_osd_d(_win) ((_win) != 4 && (_win) != 0) | ||
| 164 | |||
| 165 | static inline unsigned int s3c_fb_win_pal_size(unsigned int win) | ||
| 166 | { | ||
| 167 | if (win < 2) | ||
| 168 | return 256; | ||
| 169 | if (win < 4) | ||
| 170 | return 16; | ||
| 171 | if (win == 4) | ||
| 172 | return 4; | ||
| 173 | |||
| 174 | BUG(); /* shouldn't get here */ | ||
| 175 | } | ||
| 176 | |||
| 177 | static inline int s3c_fb_validate_win_bpp(unsigned int win, unsigned int bpp) | ||
| 178 | { | ||
| 179 | /* all windows can do 1/2 bpp */ | ||
| 180 | |||
| 181 | if ((bpp == 25 || bpp == 19) && win == 0) | ||
| 182 | return 0; /* win 0 does not have 19 or 25bpp modes */ | ||
| 183 | |||
| 184 | if (bpp == 4 && win == 4) | ||
| 185 | return 0; | ||
| 186 | |||
| 187 | if (bpp == 8 && (win >= 3)) | ||
| 188 | return 0; /* win 3/4 cannot do 8bpp in any mode */ | ||
| 189 | |||
| 190 | return 1; | ||
| 191 | } | ||
| 192 | |||
| 193 | static inline unsigned int s3c_fb_pal_reg(unsigned int window, int reg) | 28 | static inline unsigned int s3c_fb_pal_reg(unsigned int window, int reg) |
| 194 | { | 29 | { |
| 195 | switch (window) { | 30 | switch (window) { |
| @@ -203,57 +38,4 @@ static inline unsigned int s3c_fb_pal_reg(unsigned int window, int reg) | |||
| 203 | BUG(); | 38 | BUG(); |
| 204 | } | 39 | } |
| 205 | 40 | ||
| 206 | static inline int s3c_fb_pal_is16(unsigned int window) | 41 | #endif /* __ASM_ARCH_MACH_REGS_FB_H */ |
| 207 | { | ||
| 208 | return window > 1; | ||
| 209 | } | ||
| 210 | |||
| 211 | struct s3c_fb_palette { | ||
| 212 | struct fb_bitfield r; | ||
| 213 | struct fb_bitfield g; | ||
| 214 | struct fb_bitfield b; | ||
| 215 | struct fb_bitfield a; | ||
| 216 | }; | ||
| 217 | |||
| 218 | static inline void s3c_fb_init_palette(unsigned int window, | ||
| 219 | struct s3c_fb_palette *palette) | ||
| 220 | { | ||
| 221 | if (window < 2) { | ||
| 222 | /* Windows 0/1 are 8/8/8 or A/8/8/8 */ | ||
| 223 | palette->r.offset = 16; | ||
| 224 | palette->r.length = 8; | ||
| 225 | palette->g.offset = 8; | ||
| 226 | palette->g.length = 8; | ||
| 227 | palette->b.offset = 0; | ||
| 228 | palette->b.length = 8; | ||
| 229 | } else { | ||
| 230 | /* currently we assume RGB 5/6/5 */ | ||
| 231 | palette->r.offset = 11; | ||
| 232 | palette->r.length = 5; | ||
| 233 | palette->g.offset = 5; | ||
| 234 | palette->g.length = 6; | ||
| 235 | palette->b.offset = 0; | ||
| 236 | palette->b.length = 5; | ||
| 237 | } | ||
| 238 | } | ||
| 239 | |||
| 240 | /* Notes on per-window bpp settings | ||
| 241 | * | ||
| 242 | * Value Win0 Win1 Win2 Win3 Win 4 | ||
| 243 | * 0000 1(P) 1(P) 1(P) 1(P) 1(P) | ||
| 244 | * 0001 2(P) 2(P) 2(P) 2(P) 2(P) | ||
| 245 | * 0010 4(P) 4(P) 4(P) 4(P) -none- | ||
| 246 | * 0011 8(P) 8(P) -none- -none- -none- | ||
| 247 | * 0100 -none- 8(A232) 8(A232) -none- -none- | ||
| 248 | * 0101 16(565) 16(565) 16(565) 16(565) 16(565) | ||
| 249 | * 0110 -none- 16(A555) 16(A555) 16(A555) 16(A555) | ||
| 250 | * 0111 16(I555) 16(I565) 16(I555) 16(I555) 16(I555) | ||
| 251 | * 1000 18(666) 18(666) 18(666) 18(666) 18(666) | ||
| 252 | * 1001 -none- 18(A665) 18(A665) 18(A665) 16(A665) | ||
| 253 | * 1010 -none- 19(A666) 19(A666) 19(A666) 19(A666) | ||
| 254 | * 1011 24(888) 24(888) 24(888) 24(888) 24(888) | ||
| 255 | * 1100 -none- 24(A887) 24(A887) 24(A887) 24(A887) | ||
| 256 | * 1101 -none- 25(A888) 25(A888) 25(A888) 25(A888) | ||
| 257 | * 1110 -none- -none- -none- -none- -none- | ||
| 258 | * 1111 -none- -none- -none- -none- -none- | ||
| 259 | */ | ||
diff --git a/arch/arm/mach-s3c6400/s3c6400.c b/arch/arm/mach-s3c6400/s3c6400.c index b42bdd0f213..d876ee50367 100644 --- a/arch/arm/mach-s3c6400/s3c6400.c +++ b/arch/arm/mach-s3c6400/s3c6400.c | |||
| @@ -45,6 +45,7 @@ void __init s3c6400_map_io(void) | |||
| 45 | 45 | ||
| 46 | s3c6400_default_sdhci0(); | 46 | s3c6400_default_sdhci0(); |
| 47 | s3c6400_default_sdhci1(); | 47 | s3c6400_default_sdhci1(); |
| 48 | s3c6400_default_sdhci2(); | ||
| 48 | 49 | ||
| 49 | /* the i2c devices are directly compatible with s3c2440 */ | 50 | /* the i2c devices are directly compatible with s3c2440 */ |
| 50 | s3c_i2c0_setname("s3c2440-i2c"); | 51 | s3c_i2c0_setname("s3c2440-i2c"); |
diff --git a/arch/arm/mach-s3c6410/cpu.c b/arch/arm/mach-s3c6410/cpu.c index 9b67c663d9d..522c0869195 100644 --- a/arch/arm/mach-s3c6410/cpu.c +++ b/arch/arm/mach-s3c6410/cpu.c | |||
| @@ -58,6 +58,7 @@ void __init s3c6410_map_io(void) | |||
| 58 | /* initialise device information early */ | 58 | /* initialise device information early */ |
| 59 | s3c6410_default_sdhci0(); | 59 | s3c6410_default_sdhci0(); |
| 60 | s3c6410_default_sdhci1(); | 60 | s3c6410_default_sdhci1(); |
| 61 | s3c6410_default_sdhci2(); | ||
| 61 | 62 | ||
| 62 | /* the i2c devices are directly compatible with s3c2440 */ | 63 | /* the i2c devices are directly compatible with s3c2440 */ |
| 63 | s3c_i2c0_setname("s3c2440-i2c"); | 64 | s3c_i2c0_setname("s3c2440-i2c"); |
diff --git a/arch/arm/mach-s3c6410/mach-hmt.c b/arch/arm/mach-s3c6410/mach-hmt.c index c5741056193..cdd4b537855 100644 --- a/arch/arm/mach-s3c6410/mach-hmt.c +++ b/arch/arm/mach-s3c6410/mach-hmt.c | |||
| @@ -250,7 +250,7 @@ static void __init hmt_machine_init(void) | |||
| 250 | { | 250 | { |
| 251 | s3c_i2c0_set_platdata(NULL); | 251 | s3c_i2c0_set_platdata(NULL); |
| 252 | s3c_fb_set_platdata(&hmt_lcd_pdata); | 252 | s3c_fb_set_platdata(&hmt_lcd_pdata); |
| 253 | s3c_device_nand.dev.platform_data = &hmt_nand_info; | 253 | s3c_nand_set_platdata(&hmt_nand_info); |
| 254 | 254 | ||
| 255 | gpio_request(S3C64XX_GPC(7), "usb power"); | 255 | gpio_request(S3C64XX_GPC(7), "usb power"); |
| 256 | gpio_direction_output(S3C64XX_GPC(7), 0); | 256 | gpio_direction_output(S3C64XX_GPC(7), 0); |
diff --git a/arch/arm/mach-s3c6410/mach-smdk6410.c b/arch/arm/mach-s3c6410/mach-smdk6410.c index 9f1a2146262..480d297c1de 100644 --- a/arch/arm/mach-s3c6410/mach-smdk6410.c +++ b/arch/arm/mach-s3c6410/mach-smdk6410.c | |||
| @@ -25,6 +25,7 @@ | |||
| 25 | #include <linux/gpio.h> | 25 | #include <linux/gpio.h> |
| 26 | #include <linux/delay.h> | 26 | #include <linux/delay.h> |
| 27 | #include <linux/smsc911x.h> | 27 | #include <linux/smsc911x.h> |
| 28 | #include <linux/regulator/fixed.h> | ||
| 28 | 29 | ||
| 29 | #ifdef CONFIG_SMDK6410_WM1190_EV1 | 30 | #ifdef CONFIG_SMDK6410_WM1190_EV1 |
| 30 | #include <linux/mfd/wm8350/core.h> | 31 | #include <linux/mfd/wm8350/core.h> |
| @@ -184,6 +185,43 @@ static struct platform_device smdk6410_smsc911x = { | |||
| 184 | }, | 185 | }, |
| 185 | }; | 186 | }; |
| 186 | 187 | ||
| 188 | #ifdef CONFIG_REGULATOR | ||
| 189 | static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] = { | ||
| 190 | { | ||
| 191 | /* WM8580 */ | ||
| 192 | .supply = "PVDD", | ||
| 193 | .dev_name = "0-001b", | ||
| 194 | }, | ||
| 195 | { | ||
| 196 | /* WM8580 */ | ||
| 197 | .supply = "AVDD", | ||
| 198 | .dev_name = "0-001b", | ||
| 199 | }, | ||
| 200 | }; | ||
| 201 | |||
| 202 | static struct regulator_init_data smdk6410_b_pwr_5v_data = { | ||
| 203 | .constraints = { | ||
| 204 | .always_on = 1, | ||
| 205 | }, | ||
| 206 | .num_consumer_supplies = ARRAY_SIZE(smdk6410_b_pwr_5v_consumers), | ||
| 207 | .consumer_supplies = smdk6410_b_pwr_5v_consumers, | ||
| 208 | }; | ||
| 209 | |||
| 210 | static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = { | ||
| 211 | .supply_name = "B_PWR_5V", | ||
| 212 | .microvolts = 5000000, | ||
| 213 | .init_data = &smdk6410_b_pwr_5v_data, | ||
| 214 | }; | ||
| 215 | |||
| 216 | static struct platform_device smdk6410_b_pwr_5v = { | ||
| 217 | .name = "reg-fixed-voltage", | ||
| 218 | .id = -1, | ||
| 219 | .dev = { | ||
| 220 | .platform_data = &smdk6410_b_pwr_5v_pdata, | ||
| 221 | }, | ||
| 222 | }; | ||
| 223 | #endif | ||
| 224 | |||
| 187 | static struct map_desc smdk6410_iodesc[] = {}; | 225 | static struct map_desc smdk6410_iodesc[] = {}; |
| 188 | 226 | ||
| 189 | static struct platform_device *smdk6410_devices[] __initdata = { | 227 | static struct platform_device *smdk6410_devices[] __initdata = { |
| @@ -198,6 +236,10 @@ static struct platform_device *smdk6410_devices[] __initdata = { | |||
| 198 | &s3c_device_fb, | 236 | &s3c_device_fb, |
| 199 | &s3c_device_usb, | 237 | &s3c_device_usb, |
| 200 | &s3c_device_usb_hsotg, | 238 | &s3c_device_usb_hsotg, |
| 239 | |||
| 240 | #ifdef CONFIG_REGULATOR | ||
| 241 | &smdk6410_b_pwr_5v, | ||
| 242 | #endif | ||
| 201 | &smdk6410_lcd_powerdev, | 243 | &smdk6410_lcd_powerdev, |
| 202 | 244 | ||
| 203 | &smdk6410_smsc911x, | 245 | &smdk6410_smsc911x, |
| @@ -232,6 +274,14 @@ static struct regulator_init_data wm8350_dcdc3_data = { | |||
| 232 | }; | 274 | }; |
| 233 | 275 | ||
| 234 | /* USB, EXT, PCM, ADC/DAC, USB, MMC */ | 276 | /* USB, EXT, PCM, ADC/DAC, USB, MMC */ |
| 277 | static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = { | ||
| 278 | { | ||
| 279 | /* WM8580 */ | ||
| 280 | .supply = "DVDD", | ||
| 281 | .dev_name = "0-001b", | ||
| 282 | }, | ||
| 283 | }; | ||
| 284 | |||
| 235 | static struct regulator_init_data wm8350_dcdc4_data = { | 285 | static struct regulator_init_data wm8350_dcdc4_data = { |
| 236 | .constraints = { | 286 | .constraints = { |
| 237 | .name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV", | 287 | .name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV", |
| @@ -239,6 +289,8 @@ static struct regulator_init_data wm8350_dcdc4_data = { | |||
| 239 | .max_uV = 3000000, | 289 | .max_uV = 3000000, |
| 240 | .always_on = 1, | 290 | .always_on = 1, |
| 241 | }, | 291 | }, |
| 292 | .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers), | ||
| 293 | .consumer_supplies = wm8350_dcdc4_consumers, | ||
| 242 | }; | 294 | }; |
| 243 | 295 | ||
| 244 | /* ARM core */ | 296 | /* ARM core */ |
diff --git a/arch/arm/mach-s5pc100/Kconfig b/arch/arm/mach-s5pc100/Kconfig index b1a4ba50441..0dd2b8c6eab 100644 --- a/arch/arm/mach-s5pc100/Kconfig +++ b/arch/arm/mach-s5pc100/Kconfig | |||
| @@ -14,9 +14,23 @@ config CPU_S5PC100 | |||
| 14 | help | 14 | help |
| 15 | Enable S5PC100 CPU support | 15 | Enable S5PC100 CPU support |
| 16 | 16 | ||
| 17 | config S5PC100_SETUP_SDHCI | ||
| 18 | bool | ||
| 19 | select S5PC1XX_SETUP_SDHCI_GPIO | ||
| 20 | help | ||
| 21 | Internal helper functions for S5PC100 based SDHCI systems | ||
| 22 | |||
| 17 | config MACH_SMDKC100 | 23 | config MACH_SMDKC100 |
| 18 | bool "SMDKC100" | 24 | bool "SMDKC100" |
| 19 | select CPU_S5PC100 | 25 | select CPU_S5PC100 |
| 26 | select S3C_DEV_FB | ||
| 27 | select S3C_DEV_I2C1 | ||
| 28 | select S3C_DEV_HSMMC | ||
| 29 | select S3C_DEV_HSMMC1 | ||
| 30 | select S3C_DEV_HSMMC2 | ||
| 31 | select S5PC1XX_SETUP_I2C0 | ||
| 20 | select S5PC1XX_SETUP_I2C1 | 32 | select S5PC1XX_SETUP_I2C1 |
| 33 | select S5PC1XX_SETUP_FB_24BPP | ||
| 34 | select S5PC100_SETUP_SDHCI | ||
| 21 | help | 35 | help |
| 22 | Machine support for the Samsung SMDKC100 | 36 | Machine support for the Samsung SMDKC100 |
diff --git a/arch/arm/mach-s5pc100/Makefile b/arch/arm/mach-s5pc100/Makefile index afc89b381d7..809ff10f768 100644 --- a/arch/arm/mach-s5pc100/Makefile +++ b/arch/arm/mach-s5pc100/Makefile | |||
| @@ -13,5 +13,9 @@ obj- := | |||
| 13 | 13 | ||
| 14 | obj-$(CONFIG_CPU_S5PC100) += cpu.o | 14 | obj-$(CONFIG_CPU_S5PC100) += cpu.o |
| 15 | 15 | ||
| 16 | # Helper and device support | ||
| 17 | |||
| 18 | obj-$(CONFIG_S5PC100_SETUP_SDHCI) += setup-sdhci.o | ||
| 19 | |||
| 16 | # machine support | 20 | # machine support |
| 17 | obj-$(CONFIG_MACH_SMDKC100) += mach-smdkc100.o | 21 | obj-$(CONFIG_MACH_SMDKC100) += mach-smdkc100.o |
diff --git a/arch/arm/mach-s5pc100/cpu.c b/arch/arm/mach-s5pc100/cpu.c index 0e718890da3..d79e7574a85 100644 --- a/arch/arm/mach-s5pc100/cpu.c +++ b/arch/arm/mach-s5pc100/cpu.c | |||
| @@ -22,6 +22,8 @@ | |||
| 22 | #include <linux/serial_core.h> | 22 | #include <linux/serial_core.h> |
| 23 | #include <linux/platform_device.h> | 23 | #include <linux/platform_device.h> |
| 24 | 24 | ||
| 25 | #include <asm/proc-fns.h> | ||
| 26 | |||
| 25 | #include <asm/mach/arch.h> | 27 | #include <asm/mach/arch.h> |
| 26 | #include <asm/mach/map.h> | 28 | #include <asm/mach/map.h> |
| 27 | #include <asm/mach/irq.h> | 29 | #include <asm/mach/irq.h> |
| @@ -32,6 +34,7 @@ | |||
| 32 | 34 | ||
| 33 | #include <plat/cpu-freq.h> | 35 | #include <plat/cpu-freq.h> |
| 34 | #include <plat/regs-serial.h> | 36 | #include <plat/regs-serial.h> |
| 37 | #include <plat/regs-power.h> | ||
| 35 | 38 | ||
| 36 | #include <plat/cpu.h> | 39 | #include <plat/cpu.h> |
| 37 | #include <plat/devs.h> | 40 | #include <plat/devs.h> |
| @@ -45,6 +48,23 @@ | |||
| 45 | static struct map_desc s5pc100_iodesc[] __initdata = { | 48 | static struct map_desc s5pc100_iodesc[] __initdata = { |
| 46 | }; | 49 | }; |
| 47 | 50 | ||
| 51 | static void s5pc100_idle(void) | ||
| 52 | { | ||
| 53 | unsigned long tmp; | ||
| 54 | |||
| 55 | tmp = __raw_readl(S5PC100_PWR_CFG); | ||
| 56 | tmp &= ~S5PC100_PWRCFG_CFG_DEEP_IDLE; | ||
| 57 | tmp &= ~S5PC100_PWRCFG_CFG_WFI_MASK; | ||
| 58 | tmp |= S5PC100_PWRCFG_CFG_WFI_DEEP_IDLE; | ||
| 59 | __raw_writel(tmp, S5PC100_PWR_CFG); | ||
| 60 | |||
| 61 | tmp = __raw_readl(S5PC100_OTHERS); | ||
| 62 | tmp |= S5PC100_PMU_INT_DISABLE; | ||
| 63 | __raw_writel(tmp, S5PC100_OTHERS); | ||
| 64 | |||
| 65 | cpu_do_idle(); | ||
| 66 | } | ||
| 67 | |||
| 48 | /* s5pc100_map_io | 68 | /* s5pc100_map_io |
| 49 | * | 69 | * |
| 50 | * register the standard cpu IO areas | 70 | * register the standard cpu IO areas |
| @@ -55,6 +75,13 @@ void __init s5pc100_map_io(void) | |||
| 55 | iotable_init(s5pc100_iodesc, ARRAY_SIZE(s5pc100_iodesc)); | 75 | iotable_init(s5pc100_iodesc, ARRAY_SIZE(s5pc100_iodesc)); |
| 56 | 76 | ||
| 57 | /* initialise device information early */ | 77 | /* initialise device information early */ |
| 78 | s5pc100_default_sdhci0(); | ||
| 79 | s5pc100_default_sdhci1(); | ||
| 80 | s5pc100_default_sdhci2(); | ||
| 81 | |||
| 82 | /* the i2c devices are directly compatible with s3c2440 */ | ||
| 83 | s3c_i2c0_setname("s3c2440-i2c"); | ||
| 84 | s3c_i2c1_setname("s3c2440-i2c"); | ||
| 58 | } | 85 | } |
| 59 | 86 | ||
| 60 | void __init s5pc100_init_clocks(int xtal) | 87 | void __init s5pc100_init_clocks(int xtal) |
| @@ -93,5 +120,7 @@ int __init s5pc100_init(void) | |||
| 93 | { | 120 | { |
| 94 | printk(KERN_DEBUG "S5PC100: Initialising architecture\n"); | 121 | printk(KERN_DEBUG "S5PC100: Initialising architecture\n"); |
| 95 | 122 | ||
| 123 | s5pc1xx_idle = s5pc100_idle; | ||
| 124 | |||
| 96 | return sysdev_register(&s5pc100_sysdev); | 125 | return sysdev_register(&s5pc100_sysdev); |
| 97 | } | 126 | } |
diff --git a/arch/arm/mach-s5pc100/include/mach/gpio.h b/arch/arm/mach-s5pc100/include/mach/gpio.h index c74fc93d7d1..2c4cbe8ee6b 100644 --- a/arch/arm/mach-s5pc100/include/mach/gpio.h +++ b/arch/arm/mach-s5pc100/include/mach/gpio.h | |||
| @@ -18,40 +18,45 @@ | |||
| 18 | #define gpio_to_irq __gpio_to_irq | 18 | #define gpio_to_irq __gpio_to_irq |
| 19 | 19 | ||
| 20 | /* GPIO bank sizes */ | 20 | /* GPIO bank sizes */ |
| 21 | #define S5PC1XX_GPIO_A0_NR (8) | 21 | #define S5PC100_GPIO_A0_NR (8) |
| 22 | #define S5PC1XX_GPIO_A1_NR (5) | 22 | #define S5PC100_GPIO_A1_NR (5) |
| 23 | #define S5PC1XX_GPIO_B_NR (8) | 23 | #define S5PC100_GPIO_B_NR (8) |
| 24 | #define S5PC1XX_GPIO_C_NR (5) | 24 | #define S5PC100_GPIO_C_NR (5) |
| 25 | #define S5PC1XX_GPIO_D_NR (7) | 25 | #define S5PC100_GPIO_D_NR (7) |
| 26 | #define S5PC1XX_GPIO_E0_NR (8) | 26 | #define S5PC100_GPIO_E0_NR (8) |
| 27 | #define S5PC1XX_GPIO_E1_NR (6) | 27 | #define S5PC100_GPIO_E1_NR (6) |
| 28 | #define S5PC1XX_GPIO_F0_NR (8) | 28 | #define S5PC100_GPIO_F0_NR (8) |
| 29 | #define S5PC1XX_GPIO_F1_NR (8) | 29 | #define S5PC100_GPIO_F1_NR (8) |
| 30 | #define S5PC1XX_GPIO_F2_NR (8) | 30 | #define S5PC100_GPIO_F2_NR (8) |
| 31 | #define S5PC1XX_GPIO_F3_NR (4) | 31 | #define S5PC100_GPIO_F3_NR (4) |
| 32 | #define S5PC1XX_GPIO_G0_NR (8) | 32 | #define S5PC100_GPIO_G0_NR (8) |
| 33 | #define S5PC1XX_GPIO_G1_NR (3) | 33 | #define S5PC100_GPIO_G1_NR (3) |
| 34 | #define S5PC1XX_GPIO_G2_NR (7) | 34 | #define S5PC100_GPIO_G2_NR (7) |
| 35 | #define S5PC1XX_GPIO_G3_NR (7) | 35 | #define S5PC100_GPIO_G3_NR (7) |
| 36 | #define S5PC1XX_GPIO_H0_NR (8) | 36 | #define S5PC100_GPIO_H0_NR (8) |
| 37 | #define S5PC1XX_GPIO_H1_NR (8) | 37 | #define S5PC100_GPIO_H1_NR (8) |
| 38 | #define S5PC1XX_GPIO_H2_NR (8) | 38 | #define S5PC100_GPIO_H2_NR (8) |
| 39 | #define S5PC1XX_GPIO_H3_NR (8) | 39 | #define S5PC100_GPIO_H3_NR (8) |
| 40 | #define S5PC1XX_GPIO_I_NR (8) | 40 | #define S5PC100_GPIO_I_NR (8) |
| 41 | #define S5PC1XX_GPIO_J0_NR (8) | 41 | #define S5PC100_GPIO_J0_NR (8) |
| 42 | #define S5PC1XX_GPIO_J1_NR (5) | 42 | #define S5PC100_GPIO_J1_NR (5) |
| 43 | #define S5PC1XX_GPIO_J2_NR (8) | 43 | #define S5PC100_GPIO_J2_NR (8) |
| 44 | #define S5PC1XX_GPIO_J3_NR (8) | 44 | #define S5PC100_GPIO_J3_NR (8) |
| 45 | #define S5PC1XX_GPIO_J4_NR (4) | 45 | #define S5PC100_GPIO_J4_NR (4) |
| 46 | #define S5PC1XX_GPIO_K0_NR (8) | 46 | #define S5PC100_GPIO_K0_NR (8) |
| 47 | #define S5PC1XX_GPIO_K1_NR (6) | 47 | #define S5PC100_GPIO_K1_NR (6) |
| 48 | #define S5PC1XX_GPIO_K2_NR (8) | 48 | #define S5PC100_GPIO_K2_NR (8) |
| 49 | #define S5PC1XX_GPIO_K3_NR (8) | 49 | #define S5PC100_GPIO_K3_NR (8) |
| 50 | #define S5PC1XX_GPIO_MP00_NR (8) | 50 | #define S5PC100_GPIO_L0_NR (8) |
| 51 | #define S5PC1XX_GPIO_MP01_NR (8) | 51 | #define S5PC100_GPIO_L1_NR (8) |
| 52 | #define S5PC1XX_GPIO_MP02_NR (8) | 52 | #define S5PC100_GPIO_L2_NR (8) |
| 53 | #define S5PC1XX_GPIO_MP03_NR (8) | 53 | #define S5PC100_GPIO_L3_NR (8) |
| 54 | #define S5PC1XX_GPIO_MP04_NR (5) | 54 | #define S5PC100_GPIO_L4_NR (8) |
| 55 | #define S5PC100_GPIO_MP00_NR (8) | ||
| 56 | #define S5PC100_GPIO_MP01_NR (8) | ||
| 57 | #define S5PC100_GPIO_MP02_NR (8) | ||
| 58 | #define S5PC100_GPIO_MP03_NR (8) | ||
| 59 | #define S5PC100_GPIO_MP04_NR (5) | ||
| 55 | 60 | ||
| 56 | /* GPIO bank numbes */ | 61 | /* GPIO bank numbes */ |
| 57 | 62 | ||
| @@ -64,83 +69,94 @@ | |||
| 64 | ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1) | 69 | ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1) |
| 65 | 70 | ||
| 66 | enum s3c_gpio_number { | 71 | enum s3c_gpio_number { |
| 67 | S5PC1XX_GPIO_A0_START = 0, | 72 | S5PC100_GPIO_A0_START = 0, |
| 68 | S5PC1XX_GPIO_A1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_A0), | 73 | S5PC100_GPIO_A1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_A0), |
| 69 | S5PC1XX_GPIO_B_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_A1), | 74 | S5PC100_GPIO_B_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_A1), |
| 70 | S5PC1XX_GPIO_C_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_B), | 75 | S5PC100_GPIO_C_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_B), |
| 71 | S5PC1XX_GPIO_D_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_C), | 76 | S5PC100_GPIO_D_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_C), |
| 72 | S5PC1XX_GPIO_E0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_D), | 77 | S5PC100_GPIO_E0_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_D), |
| 73 | S5PC1XX_GPIO_E1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_E0), | 78 | S5PC100_GPIO_E1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_E0), |
| 74 | S5PC1XX_GPIO_F0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_E1), | 79 | S5PC100_GPIO_F0_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_E1), |
| 75 | S5PC1XX_GPIO_F1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_F0), | 80 | S5PC100_GPIO_F1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F0), |
| 76 | S5PC1XX_GPIO_F2_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_F1), | 81 | S5PC100_GPIO_F2_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F1), |
| 77 | S5PC1XX_GPIO_F3_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_F2), | 82 | S5PC100_GPIO_F3_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F2), |
| 78 | S5PC1XX_GPIO_G0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_F3), | 83 | S5PC100_GPIO_G0_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F3), |
| 79 | S5PC1XX_GPIO_G1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_G0), | 84 | S5PC100_GPIO_G1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G0), |
| 80 | S5PC1XX_GPIO_G2_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_G1), | 85 | S5PC100_GPIO_G2_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G1), |
| 81 | S5PC1XX_GPIO_G3_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_G2), | 86 | S5PC100_GPIO_G3_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G2), |
| 82 | S5PC1XX_GPIO_H0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_G3), | 87 | S5PC100_GPIO_H0_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G3), |
| 83 | S5PC1XX_GPIO_H1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_H0), | 88 | S5PC100_GPIO_H1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H0), |
| 84 | S5PC1XX_GPIO_H2_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_H1), | 89 | S5PC100_GPIO_H2_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H1), |
| 85 | S5PC1XX_GPIO_H3_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_H2), | 90 | S5PC100_GPIO_H3_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H2), |
| 86 | S5PC1XX_GPIO_I_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_H3), | 91 | S5PC100_GPIO_I_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H3), |
| 87 | S5PC1XX_GPIO_J0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_I), | 92 | S5PC100_GPIO_J0_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_I), |
| 88 | S5PC1XX_GPIO_J1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_J0), | 93 | S5PC100_GPIO_J1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J0), |
| 89 | S5PC1XX_GPIO_J2_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_J1), | 94 | S5PC100_GPIO_J2_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J1), |
| 90 | S5PC1XX_GPIO_J3_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_J2), | 95 | S5PC100_GPIO_J3_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J2), |
| 91 | S5PC1XX_GPIO_J4_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_J3), | 96 | S5PC100_GPIO_J4_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J3), |
| 92 | S5PC1XX_GPIO_K0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_J4), | 97 | S5PC100_GPIO_K0_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J4), |
| 93 | S5PC1XX_GPIO_K1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K0), | 98 | S5PC100_GPIO_K1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K0), |
| 94 | S5PC1XX_GPIO_K2_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K1), | 99 | S5PC100_GPIO_K2_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K1), |
| 95 | S5PC1XX_GPIO_K3_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K2), | 100 | S5PC100_GPIO_K3_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K2), |
| 96 | S5PC1XX_GPIO_MP00_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K3), | 101 | S5PC100_GPIO_L0_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K3), |
| 97 | S5PC1XX_GPIO_MP01_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP00), | 102 | S5PC100_GPIO_L1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L0), |
| 98 | S5PC1XX_GPIO_MP02_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP01), | 103 | S5PC100_GPIO_L2_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L1), |
| 99 | S5PC1XX_GPIO_MP03_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP02), | 104 | S5PC100_GPIO_L3_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L2), |
| 100 | S5PC1XX_GPIO_MP04_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP03), | 105 | S5PC100_GPIO_L4_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L3), |
| 106 | S5PC100_GPIO_MP00_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L4), | ||
| 107 | S5PC100_GPIO_MP01_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP00), | ||
| 108 | S5PC100_GPIO_MP02_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP01), | ||
| 109 | S5PC100_GPIO_MP03_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP02), | ||
| 110 | S5PC100_GPIO_MP04_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP03), | ||
| 111 | S5PC100_GPIO_END = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP04), | ||
| 101 | }; | 112 | }; |
| 102 | 113 | ||
| 103 | /* S5PC1XX GPIO number definitions. */ | 114 | /* S5PC100 GPIO number definitions. */ |
| 104 | #define S5PC1XX_GPA0(_nr) (S5PC1XX_GPIO_A0_START + (_nr)) | 115 | #define S5PC100_GPA0(_nr) (S5PC100_GPIO_A0_START + (_nr)) |
| 105 | #define S5PC1XX_GPA1(_nr) (S5PC1XX_GPIO_A1_START + (_nr)) | 116 | #define S5PC100_GPA1(_nr) (S5PC100_GPIO_A1_START + (_nr)) |
| 106 | #define S5PC1XX_GPB(_nr) (S5PC1XX_GPIO_B_START + (_nr)) | 117 | #define S5PC100_GPB(_nr) (S5PC100_GPIO_B_START + (_nr)) |
| 107 | #define S5PC1XX_GPC(_nr) (S5PC1XX_GPIO_C_START + (_nr)) | 118 | #define S5PC100_GPC(_nr) (S5PC100_GPIO_C_START + (_nr)) |
| 108 | #define S5PC1XX_GPD(_nr) (S5PC1XX_GPIO_D_START + (_nr)) | 119 | #define S5PC100_GPD(_nr) (S5PC100_GPIO_D_START + (_nr)) |
| 109 | #define S5PC1XX_GPE0(_nr) (S5PC1XX_GPIO_E0_START + (_nr)) | 120 | #define S5PC100_GPE0(_nr) (S5PC100_GPIO_E0_START + (_nr)) |
| 110 | #define S5PC1XX_GPE1(_nr) (S5PC1XX_GPIO_E1_START + (_nr)) | 121 | #define S5PC100_GPE1(_nr) (S5PC100_GPIO_E1_START + (_nr)) |
| 111 | #define S5PC1XX_GPF0(_nr) (S5PC1XX_GPIO_F0_START + (_nr)) | 122 | #define S5PC100_GPF0(_nr) (S5PC100_GPIO_F0_START + (_nr)) |
| 112 | #define S5PC1XX_GPF1(_nr) (S5PC1XX_GPIO_F1_START + (_nr)) | 123 | #define S5PC100_GPF1(_nr) (S5PC100_GPIO_F1_START + (_nr)) |
| 113 | #define S5PC1XX_GPF2(_nr) (S5PC1XX_GPIO_F2_START + (_nr)) | 124 | #define S5PC100_GPF2(_nr) (S5PC100_GPIO_F2_START + (_nr)) |
| 114 | #define S5PC1XX_GPF3(_nr) (S5PC1XX_GPIO_F3_START + (_nr)) | 125 | #define S5PC100_GPF3(_nr) (S5PC100_GPIO_F3_START + (_nr)) |
| 115 | #define S5PC1XX_GPG0(_nr) (S5PC1XX_GPIO_G0_START + (_nr)) | 126 | #define S5PC100_GPG0(_nr) (S5PC100_GPIO_G0_START + (_nr)) |
| 116 | #define S5PC1XX_GPG1(_nr) (S5PC1XX_GPIO_G1_START + (_nr)) | 127 | #define S5PC100_GPG1(_nr) (S5PC100_GPIO_G1_START + (_nr)) |
| 117 | #define S5PC1XX_GPG2(_nr) (S5PC1XX_GPIO_G2_START + (_nr)) | 128 | #define S5PC100_GPG2(_nr) (S5PC100_GPIO_G2_START + (_nr)) |
| 118 | #define S5PC1XX_GPG3(_nr) (S5PC1XX_GPIO_G3_START + (_nr)) | 129 | #define S5PC100_GPG3(_nr) (S5PC100_GPIO_G3_START + (_nr)) |
| 119 | #define S5PC1XX_GPH0(_nr) (S5PC1XX_GPIO_H0_START + (_nr)) | 130 | #define S5PC100_GPH0(_nr) (S5PC100_GPIO_H0_START + (_nr)) |
| 120 | #define S5PC1XX_GPH1(_nr) (S5PC1XX_GPIO_H1_START + (_nr)) | 131 | #define S5PC100_GPH1(_nr) (S5PC100_GPIO_H1_START + (_nr)) |
| 121 | #define S5PC1XX_GPH2(_nr) (S5PC1XX_GPIO_H2_START + (_nr)) | 132 | #define S5PC100_GPH2(_nr) (S5PC100_GPIO_H2_START + (_nr)) |
| 122 | #define S5PC1XX_GPH3(_nr) (S5PC1XX_GPIO_H3_START + (_nr)) | 133 | #define S5PC100_GPH3(_nr) (S5PC100_GPIO_H3_START + (_nr)) |
| 123 | #define S5PC1XX_GPI(_nr) (S5PC1XX_GPIO_I_START + (_nr)) | 134 | #define S5PC100_GPI(_nr) (S5PC100_GPIO_I_START + (_nr)) |
| 124 | #define S5PC1XX_GPJ0(_nr) (S5PC1XX_GPIO_J0_START + (_nr)) | 135 | #define S5PC100_GPJ0(_nr) (S5PC100_GPIO_J0_START + (_nr)) |
| 125 | #define S5PC1XX_GPJ1(_nr) (S5PC1XX_GPIO_J1_START + (_nr)) | 136 | #define S5PC100_GPJ1(_nr) (S5PC100_GPIO_J1_START + (_nr)) |
| 126 | #define S5PC1XX_GPJ2(_nr) (S5PC1XX_GPIO_J2_START + (_nr)) | 137 | #define S5PC100_GPJ2(_nr) (S5PC100_GPIO_J2_START + (_nr)) |
| 127 | #define S5PC1XX_GPJ3(_nr) (S5PC1XX_GPIO_J3_START + (_nr)) | 138 | #define S5PC100_GPJ3(_nr) (S5PC100_GPIO_J3_START + (_nr)) |
| 128 | #define S5PC1XX_GPJ4(_nr) (S5PC1XX_GPIO_J4_START + (_nr)) | 139 | #define S5PC100_GPJ4(_nr) (S5PC100_GPIO_J4_START + (_nr)) |
| 129 | #define S5PC1XX_GPK0(_nr) (S5PC1XX_GPIO_K0_START + (_nr)) | 140 | #define S5PC100_GPK0(_nr) (S5PC100_GPIO_K0_START + (_nr)) |
| 130 | #define S5PC1XX_GPK1(_nr) (S5PC1XX_GPIO_K1_START + (_nr)) | 141 | #define S5PC100_GPK1(_nr) (S5PC100_GPIO_K1_START + (_nr)) |
| 131 | #define S5PC1XX_GPK2(_nr) (S5PC1XX_GPIO_K2_START + (_nr)) | 142 | #define S5PC100_GPK2(_nr) (S5PC100_GPIO_K2_START + (_nr)) |
| 132 | #define S5PC1XX_GPK3(_nr) (S5PC1XX_GPIO_K3_START + (_nr)) | 143 | #define S5PC100_GPK3(_nr) (S5PC100_GPIO_K3_START + (_nr)) |
| 133 | #define S5PC1XX_MP00(_nr) (S5PC1XX_GPIO_MP00_START + (_nr)) | 144 | #define S5PC100_GPL0(_nr) (S5PC100_GPIO_L0_START + (_nr)) |
| 134 | #define S5PC1XX_MP01(_nr) (S5PC1XX_GPIO_MP01_START + (_nr)) | 145 | #define S5PC100_GPL1(_nr) (S5PC100_GPIO_L1_START + (_nr)) |
| 135 | #define S5PC1XX_MP02(_nr) (S5PC1XX_GPIO_MP02_START + (_nr)) | 146 | #define S5PC100_GPL2(_nr) (S5PC100_GPIO_L2_START + (_nr)) |
| 136 | #define S5PC1XX_MP03(_nr) (S5PC1XX_GPIO_MP03_START + (_nr)) | 147 | #define S5PC100_GPL3(_nr) (S5PC100_GPIO_L3_START + (_nr)) |
| 137 | #define S5PC1XX_MP04(_nr) (S5PC1XX_GPIO_MP04_START + (_nr)) | 148 | #define S5PC100_GPL4(_nr) (S5PC100_GPIO_L4_START + (_nr)) |
| 149 | #define S5PC100_MP00(_nr) (S5PC100_GPIO_MP00_START + (_nr)) | ||
| 150 | #define S5PC100_MP01(_nr) (S5PC100_GPIO_MP01_START + (_nr)) | ||
| 151 | #define S5PC100_MP02(_nr) (S5PC100_GPIO_MP02_START + (_nr)) | ||
| 152 | #define S5PC100_MP03(_nr) (S5PC100_GPIO_MP03_START + (_nr)) | ||
| 153 | #define S5PC100_MP04(_nr) (S5PC100_GPIO_MP04_START + (_nr)) | ||
| 154 | #define S5PC100_MP05(_nr) (S5PC100_GPIO_MP05_START + (_nr)) | ||
| 138 | 155 | ||
| 139 | /* the end of the S5PC1XX specific gpios */ | 156 | /* It used the end of the S5PC1XX gpios */ |
| 140 | #define S5PC1XX_GPIO_END (S5PC1XX_MP04(S5PC1XX_GPIO_MP04_NR) + 1) | 157 | #define S3C_GPIO_END S5PC100_GPIO_END |
| 141 | #define S3C_GPIO_END S5PC1XX_GPIO_END | ||
| 142 | 158 | ||
| 143 | /* define the number of gpios we need to the one after the MP04() range */ | 159 | /* define the number of gpios we need to the one after the MP04() range */ |
| 144 | #define ARCH_NR_GPIOS (S5PC1XX_MP04(S5PC1XX_GPIO_MP04_NR) + 1) | 160 | #define ARCH_NR_GPIOS (S5PC100_GPIO_END + 1) |
| 145 | 161 | ||
| 146 | #include <asm-generic/gpio.h> | 162 | #include <asm-generic/gpio.h> |
diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-s5pc100/include/mach/irqs.h index 622720dba28..b53fa48a52c 100644 --- a/arch/arm/mach-s5pc100/include/mach/irqs.h +++ b/arch/arm/mach-s5pc100/include/mach/irqs.h | |||
| @@ -11,4 +11,9 @@ | |||
| 11 | 11 | ||
| 12 | #include <plat/irqs.h> | 12 | #include <plat/irqs.h> |
| 13 | 13 | ||
| 14 | /* LCD */ | ||
| 15 | #define IRQ_LCD_FIFO IRQ_LCD0 | ||
| 16 | #define IRQ_LCD_VSYNC IRQ_LCD1 | ||
| 17 | #define IRQ_LCD_SYSTEM IRQ_LCD2 | ||
| 18 | |||
| 14 | #endif /* __ASM_ARCH_IRQ_H */ | 19 | #endif /* __ASM_ARCH_IRQ_H */ |
diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h index 9e9f39130b2..4681ebe8bef 100644 --- a/arch/arm/mach-s5pc100/include/mach/map.h +++ b/arch/arm/mach-s5pc100/include/mach/map.h | |||
| @@ -17,6 +17,19 @@ | |||
| 17 | 17 | ||
| 18 | #include <plat/map-base.h> | 18 | #include <plat/map-base.h> |
| 19 | 19 | ||
| 20 | /* | ||
| 21 | * map-base.h has already defined virtual memory address | ||
| 22 | * S3C_VA_IRQ S3C_ADDR(0x00000000) irq controller(s) | ||
| 23 | * S3C_VA_SYS S3C_ADDR(0x00100000) system control | ||
| 24 | * S3C_VA_MEM S3C_ADDR(0x00200000) system control (not used) | ||
| 25 | * S3C_VA_TIMER S3C_ADDR(0x00300000) timer block | ||
| 26 | * S3C_VA_WATCHDOG S3C_ADDR(0x00400000) watchdog | ||
| 27 | * S3C_VA_UART S3C_ADDR(0x01000000) UART | ||
| 28 | * | ||
| 29 | * S5PC100 specific virtual memory address can be defined here | ||
| 30 | * S5PC1XX_VA_GPIO S3C_ADDR(0x00500000) GPIO | ||
| 31 | * | ||
| 32 | */ | ||
| 20 | 33 | ||
| 21 | /* Chip ID */ | 34 | /* Chip ID */ |
| 22 | #define S5PC100_PA_CHIPID (0xE0000000) | 35 | #define S5PC100_PA_CHIPID (0xE0000000) |
| @@ -24,13 +37,20 @@ | |||
| 24 | #define S5PC1XX_VA_CHIPID S3C_VA_SYS | 37 | #define S5PC1XX_VA_CHIPID S3C_VA_SYS |
| 25 | 38 | ||
| 26 | /* System */ | 39 | /* System */ |
| 27 | #define S5PC100_PA_SYS (0xE0100000) | 40 | #define S5PC100_PA_CLK (0xE0100000) |
| 28 | #define S5PC100_PA_CLK (S5PC100_PA_SYS + 0x0) | 41 | #define S5PC100_PA_CLK_OTHER (0xE0200000) |
| 29 | #define S5PC100_PA_PWR (S5PC100_PA_SYS + 0x8000) | 42 | #define S5PC100_PA_PWR (0xE0108000) |
| 30 | #define S5PC1XX_PA_CLK S5PC100_PA_CLK | 43 | #define S5PC1XX_PA_CLK S5PC100_PA_CLK |
| 31 | #define S5PC1XX_PA_PWR S5PC100_PA_PWR | 44 | #define S5PC1XX_PA_PWR S5PC100_PA_PWR |
| 45 | #define S5PC1XX_PA_CLK_OTHER S5PC100_PA_CLK_OTHER | ||
| 32 | #define S5PC1XX_VA_CLK (S3C_VA_SYS + 0x10000) | 46 | #define S5PC1XX_VA_CLK (S3C_VA_SYS + 0x10000) |
| 33 | #define S5PC1XX_VA_PWR (S3C_VA_SYS + 0x20000) | 47 | #define S5PC1XX_VA_PWR (S3C_VA_SYS + 0x20000) |
| 48 | #define S5PC1XX_VA_CLK_OTHER (S3C_VA_SYS + 0x30000) | ||
| 49 | |||
| 50 | /* GPIO */ | ||
| 51 | #define S5PC100_PA_GPIO (0xE0300000) | ||
| 52 | #define S5PC1XX_PA_GPIO S5PC100_PA_GPIO | ||
| 53 | #define S5PC1XX_VA_GPIO S3C_ADDR(0x00500000) | ||
| 34 | 54 | ||
| 35 | /* Interrupt */ | 55 | /* Interrupt */ |
| 36 | #define S5PC100_PA_VIC (0xE4000000) | 56 | #define S5PC100_PA_VIC (0xE4000000) |
| @@ -40,23 +60,64 @@ | |||
| 40 | #define S5PC1XX_PA_VIC(x) (S5PC100_PA_VIC + ((x) * S5PC100_PA_VIC_OFFSET)) | 60 | #define S5PC1XX_PA_VIC(x) (S5PC100_PA_VIC + ((x) * S5PC100_PA_VIC_OFFSET)) |
| 41 | #define S5PC1XX_VA_VIC(x) (S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET)) | 61 | #define S5PC1XX_VA_VIC(x) (S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET)) |
| 42 | 62 | ||
| 63 | /* DMA */ | ||
| 64 | #define S5PC100_PA_MDMA (0xE8100000) | ||
| 65 | #define S5PC100_PA_PDMA0 (0xE9000000) | ||
| 66 | #define S5PC100_PA_PDMA1 (0xE9200000) | ||
| 67 | |||
| 43 | /* Timer */ | 68 | /* Timer */ |
| 44 | #define S5PC100_PA_TIMER (0xEA000000) | 69 | #define S5PC100_PA_TIMER (0xEA000000) |
| 45 | #define S5PC1XX_PA_TIMER S5PC100_PA_TIMER | 70 | #define S5PC1XX_PA_TIMER S5PC100_PA_TIMER |
| 46 | #define S5PC1XX_VA_TIMER S3C_VA_TIMER | 71 | #define S5PC1XX_VA_TIMER S3C_VA_TIMER |
| 47 | 72 | ||
| 73 | /* RTC */ | ||
| 74 | #define S5PC100_PA_RTC (0xEA300000) | ||
| 75 | |||
| 48 | /* UART */ | 76 | /* UART */ |
| 49 | #define S5PC100_PA_UART (0xEC000000) | 77 | #define S5PC100_PA_UART (0xEC000000) |
| 50 | #define S5PC1XX_PA_UART S5PC100_PA_UART | 78 | #define S5PC1XX_PA_UART S5PC100_PA_UART |
| 51 | #define S5PC1XX_VA_UART S3C_VA_UART | 79 | #define S5PC1XX_VA_UART S3C_VA_UART |
| 52 | 80 | ||
| 53 | /* IIC */ | 81 | /* I2C */ |
| 54 | #define S5PC100_PA_IIC (0xEC100000) | 82 | #define S5PC100_PA_I2C (0xEC100000) |
| 83 | #define S5PC100_PA_I2C1 (0xEC200000) | ||
| 84 | |||
| 85 | /* USB HS OTG */ | ||
| 86 | #define S5PC100_PA_USB_HSOTG (0xED200000) | ||
| 87 | #define S5PC100_PA_USB_HSPHY (0xED300000) | ||
| 88 | |||
| 89 | /* SD/MMC */ | ||
| 90 | #define S5PC100_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000)) | ||
| 91 | #define S5PC100_PA_HSMMC0 S5PC100_PA_HSMMC(0) | ||
| 92 | #define S5PC100_PA_HSMMC1 S5PC100_PA_HSMMC(1) | ||
| 93 | #define S5PC100_PA_HSMMC2 S5PC100_PA_HSMMC(2) | ||
| 94 | |||
| 95 | /* LCD */ | ||
| 96 | #define S5PC100_PA_FB (0xEE000000) | ||
| 97 | |||
| 98 | /* Multimedia */ | ||
| 99 | #define S5PC100_PA_G2D (0xEE800000) | ||
| 100 | #define S5PC100_PA_JPEG (0xEE500000) | ||
| 101 | #define S5PC100_PA_ROTATOR (0xEE100000) | ||
| 102 | #define S5PC100_PA_G3D (0xEF000000) | ||
| 103 | |||
| 104 | /* I2S */ | ||
| 105 | #define S5PC100_PA_I2S0 (0xF2000000) | ||
| 106 | #define S5PC100_PA_I2S1 (0xF2100000) | ||
| 107 | #define S5PC100_PA_I2S2 (0xF2200000) | ||
| 108 | |||
| 109 | /* KEYPAD */ | ||
| 110 | #define S5PC100_PA_KEYPAD (0xF3100000) | ||
| 111 | |||
| 112 | /* ADC & TouchScreen */ | ||
| 113 | #define S5PC100_PA_TSADC (0xF3000000) | ||
| 55 | 114 | ||
| 56 | /* ETC */ | 115 | /* ETC */ |
| 57 | #define S5PC100_PA_SDRAM (0x20000000) | 116 | #define S5PC100_PA_SDRAM (0x20000000) |
| 117 | #define S5PC1XX_PA_SDRAM S5PC100_PA_SDRAM | ||
| 58 | 118 | ||
| 59 | /* compatibility defines. */ | 119 | /* compatibility defines. */ |
| 120 | #define S3C_PA_RTC S5PC100_PA_RTC | ||
| 60 | #define S3C_PA_UART S5PC100_PA_UART | 121 | #define S3C_PA_UART S5PC100_PA_UART |
| 61 | #define S3C_PA_UART0 (S5PC100_PA_UART + 0x0) | 122 | #define S3C_PA_UART0 (S5PC100_PA_UART + 0x0) |
| 62 | #define S3C_PA_UART1 (S5PC100_PA_UART + 0x400) | 123 | #define S3C_PA_UART1 (S5PC100_PA_UART + 0x400) |
| @@ -67,9 +128,23 @@ | |||
| 67 | #define S3C_VA_UART2 (S3C_VA_UART + 0x800) | 128 | #define S3C_VA_UART2 (S3C_VA_UART + 0x800) |
| 68 | #define S3C_VA_UART3 (S3C_VA_UART + 0xC00) | 129 | #define S3C_VA_UART3 (S3C_VA_UART + 0xC00) |
| 69 | #define S3C_UART_OFFSET 0x400 | 130 | #define S3C_UART_OFFSET 0x400 |
| 131 | #define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) | ||
| 132 | #define S3C_PA_FB S5PC100_PA_FB | ||
| 133 | #define S3C_PA_G2D S5PC100_PA_G2D | ||
| 134 | #define S3C_PA_G3D S5PC100_PA_G3D | ||
| 135 | #define S3C_PA_JPEG S5PC100_PA_JPEG | ||
| 136 | #define S3C_PA_ROTATOR S5PC100_PA_ROTATOR | ||
| 70 | #define S3C_VA_VIC0 (S3C_VA_IRQ + 0x0) | 137 | #define S3C_VA_VIC0 (S3C_VA_IRQ + 0x0) |
| 71 | #define S3C_VA_VIC1 (S3C_VA_IRQ + 0x10000) | 138 | #define S3C_VA_VIC1 (S3C_VA_IRQ + 0x10000) |
| 72 | #define S3C_VA_VIC2 (S3C_VA_IRQ + 0x20000) | 139 | #define S3C_VA_VIC2 (S3C_VA_IRQ + 0x20000) |
| 73 | #define S3C_PA_IIC S5PC100_PA_IIC | 140 | #define S3C_PA_IIC S5PC100_PA_I2C |
| 141 | #define S3C_PA_IIC1 S5PC100_PA_I2C1 | ||
| 142 | #define S3C_PA_USB_HSOTG S5PC100_PA_USB_HSOTG | ||
| 143 | #define S3C_PA_USB_HSPHY S5PC100_PA_USB_HSPHY | ||
| 144 | #define S3C_PA_HSMMC0 S5PC100_PA_HSMMC0 | ||
| 145 | #define S3C_PA_HSMMC1 S5PC100_PA_HSMMC1 | ||
| 146 | #define S3C_PA_HSMMC2 S5PC100_PA_HSMMC2 | ||
| 147 | #define S3C_PA_KEYPAD S5PC100_PA_KEYPAD | ||
| 148 | #define S3C_PA_TSADC S5PC100_PA_TSADC | ||
| 74 | 149 | ||
| 75 | #endif /* __ASM_ARCH_C100_MAP_H */ | 150 | #endif /* __ASM_ARCH_C100_MAP_H */ |
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-fb.h b/arch/arm/mach-s5pc100/include/mach/regs-fb.h new file mode 100644 index 00000000000..1732cd28c76 --- /dev/null +++ b/arch/arm/mach-s5pc100/include/mach/regs-fb.h | |||
| @@ -0,0 +1,139 @@ | |||
| 1 | /* arch/arm/mach-s5pc100/include/mach/regs-fb.h | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics Co. | ||
| 4 | * Pawel Osciak <p.osciak@samsung.com> | ||
| 5 | * | ||
| 6 | * Framebuffer register definitions for Samsung S5PC100. | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #ifndef __ASM_ARCH_REGS_FB_H | ||
| 14 | #define __ASM_ARCH_REGS_FB_H __FILE__ | ||
| 15 | |||
| 16 | #include <plat/regs-fb-v4.h> | ||
| 17 | |||
| 18 | /* VP1 interface timing control */ | ||
| 19 | #define VP1CON0 (0x118) | ||
| 20 | #define VP1_RATECON_EN (1 << 31) | ||
| 21 | #define VP1_CLKRATE_MASK (0xff) | ||
| 22 | |||
| 23 | #define VP1CON1 (0x11c) | ||
| 24 | #define VP1_VTREGCON_EN (1 << 31) | ||
| 25 | #define VP1_VBPD_MASK (0xfff) | ||
| 26 | #define VP1_VBPD_SHIFT (16) | ||
| 27 | |||
| 28 | |||
| 29 | #define WPALCON_H (0x19c) | ||
| 30 | #define WPALCON_L (0x1a0) | ||
| 31 | |||
| 32 | /* Pallete contro for WPAL0 and WPAL1 is the same as in S3C64xx, but | ||
| 33 | * different for WPAL2-4 | ||
| 34 | */ | ||
| 35 | /* In WPALCON_L (aka WPALCON) */ | ||
| 36 | #define WPALCON_W1PAL_32BPP_A888 (0x7 << 3) | ||
| 37 | #define WPALCON_W0PAL_32BPP_A888 (0x7 << 0) | ||
| 38 | |||
| 39 | /* To set W2PAL-W4PAL consist of one bit from WPALCON_L and two from WPALCON_H, | ||
| 40 | * e.g. W2PAL[2..0] is made of (WPALCON_H[10..9], WPALCON_L[6]). | ||
| 41 | */ | ||
| 42 | #define WPALCON_L_WxPAL_L_MASK (0x1) | ||
| 43 | #define WPALCON_L_W2PAL_L_SHIFT (6) | ||
| 44 | #define WPALCON_L_W3PAL_L_SHIFT (7) | ||
| 45 | #define WPALCON_L_W4PAL_L_SHIFT (8) | ||
| 46 | |||
| 47 | #define WPALCON_L_WxPAL_H_MASK (0x3) | ||
| 48 | #define WPALCON_H_W2PAL_H_SHIFT (9) | ||
| 49 | #define WPALCON_H_W3PAL_H_SHIFT (13) | ||
| 50 | #define WPALCON_H_W4PAL_H_SHIFT (17) | ||
| 51 | |||
| 52 | /* Per-window alpha value registers */ | ||
| 53 | /* For window 0 8-bit alpha values are in VIDW0ALPHAx, | ||
| 54 | * for windows 1-4 alpha values consist of two parts, the 4 low bits are | ||
| 55 | * taken from VIDWxALPHAx and 4 high bits are from VIDOSDxC, | ||
| 56 | * e.g. WIN1_ALPHA0_B[7..0] = (VIDOSD1C[3..0], VIDW1ALPHA0[3..0]) | ||
| 57 | */ | ||
| 58 | #define VIDWxALPHA0(_win) (0x200 + (_win * 8)) | ||
| 59 | #define VIDWxALPHA1(_win) (0x204 + (_win * 8)) | ||
| 60 | |||
| 61 | /* Only for window 0 in VIDW0ALPHAx. */ | ||
| 62 | #define VIDW0ALPHAx_R(_x) ((_x) << 16) | ||
| 63 | #define VIDW0ALPHAx_R_MASK (0xff << 16) | ||
| 64 | #define VIDW0ALPHAx_R_SHIFT (16) | ||
| 65 | #define VIDW0ALPHAx_G(_x) ((_x) << 8) | ||
| 66 | #define VIDW0ALPHAx_G_MASK (0xff << 8) | ||
| 67 | #define VIDW0ALPHAx_G_SHIFT (8) | ||
| 68 | #define VIDW0ALPHAx_B(_x) ((_x) << 0) | ||
| 69 | #define VIDW0ALPHAx_B_MASK (0xff << 0) | ||
| 70 | #define VIDW0ALPHAx_B_SHIFT (0) | ||
| 71 | |||
| 72 | /* Low 4 bits of alpha0-1 for windows 1-4 */ | ||
| 73 | #define VIDW14ALPHAx_R_L(_x) ((_x) << 16) | ||
| 74 | #define VIDW14ALPHAx_R_L_MASK (0xf << 16) | ||
| 75 | #define VIDW14ALPHAx_R_L_SHIFT (16) | ||
| 76 | #define VIDW14ALPHAx_G_L(_x) ((_x) << 8) | ||
| 77 | #define VIDW14ALPHAx_G_L_MASK (0xf << 8) | ||
| 78 | #define VIDW14ALPHAx_G_L_SHIFT (8) | ||
| 79 | #define VIDW14ALPHAx_B_L(_x) ((_x) << 0) | ||
| 80 | #define VIDW14ALPHAx_B_L_MASK (0xf << 0) | ||
| 81 | #define VIDW14ALPHAx_B_L_SHIFT (0) | ||
| 82 | |||
| 83 | |||
| 84 | /* Per-window blending equation control registers */ | ||
| 85 | #define BLENDEQx(_win) (0x244 + ((_win) * 4)) | ||
| 86 | #define BLENDEQ1 (0x244) | ||
| 87 | #define BLENDEQ2 (0x248) | ||
| 88 | #define BLENDEQ3 (0x24c) | ||
| 89 | #define BLENDEQ4 (0x250) | ||
| 90 | |||
| 91 | #define BLENDEQx_Q_FUNC(_x) ((_x) << 18) | ||
| 92 | #define BLENDEQx_Q_FUNC_MASK (0xf << 18) | ||
| 93 | #define BLENDEQx_P_FUNC(_x) ((_x) << 12) | ||
| 94 | #define BLENDEQx_P_FUNC_MASK (0xf << 12) | ||
| 95 | #define BLENDEQx_B_FUNC(_x) ((_x) << 6) | ||
| 96 | #define BLENDEQx_B_FUNC_MASK (0xf << 6) | ||
| 97 | #define BLENDEQx_A_FUNC(_x) ((_x) << 0) | ||
| 98 | #define BLENDEQx_A_FUNC_MASK (0xf << 0) | ||
| 99 | |||
| 100 | #define BLENDCON (0x260) | ||
| 101 | #define BLENDCON_8BIT_ALPHA (1 << 0) | ||
| 102 | |||
| 103 | /* Per-window palette base addresses (start of palette memory). | ||
| 104 | * Each window palette area consists of 256 32-bit entries. | ||
| 105 | * START is the first address (entry 0th), END is the address of 255th entry. | ||
| 106 | */ | ||
| 107 | #define WIN0_PAL_BASE (0x2400) | ||
| 108 | #define WIN0_PAL_END (0x27fc) | ||
| 109 | #define WIN1_PAL_BASE (0x2800) | ||
| 110 | #define WIN1_PAL_END (0x2bfc) | ||
| 111 | #define WIN2_PAL_BASE (0x2c00) | ||
| 112 | #define WIN2_PAL_END (0x2ffc) | ||
| 113 | #define WIN3_PAL_BASE (0x3000) | ||
| 114 | #define WIN3_PAL_END (0x33fc) | ||
| 115 | #define WIN4_PAL_BASE (0x3400) | ||
| 116 | #define WIN4_PAL_END (0x37fc) | ||
| 117 | |||
| 118 | #define WIN0_PAL(_entry) (WIN0_PAL_BASE + ((_entry) * 4)) | ||
| 119 | #define WIN1_PAL(_entry) (WIN1_PAL_BASE + ((_entry) * 4)) | ||
| 120 | #define WIN2_PAL(_entry) (WIN2_PAL_BASE + ((_entry) * 4)) | ||
| 121 | #define WIN3_PAL(_entry) (WIN3_PAL_BASE + ((_entry) * 4)) | ||
| 122 | #define WIN4_PAL(_entry) (WIN4_PAL_BASE + ((_entry) * 4)) | ||
| 123 | |||
| 124 | static inline unsigned int s3c_fb_pal_reg(unsigned int window, int reg) | ||
| 125 | { | ||
| 126 | switch (window) { | ||
| 127 | case 0: return WIN0_PAL(reg); | ||
| 128 | case 1: return WIN1_PAL(reg); | ||
| 129 | case 2: return WIN2_PAL(reg); | ||
| 130 | case 3: return WIN3_PAL(reg); | ||
| 131 | case 4: return WIN4_PAL(reg); | ||
| 132 | } | ||
| 133 | |||
| 134 | BUG(); | ||
| 135 | } | ||
| 136 | |||
| 137 | |||
| 138 | #endif /* __ASM_ARCH_REGS_FB_H */ | ||
| 139 | |||
diff --git a/arch/arm/mach-s5pc100/include/mach/system.h b/arch/arm/mach-s5pc100/include/mach/system.h index e3901437547..f0d31a2a598 100644 --- a/arch/arm/mach-s5pc100/include/mach/system.h +++ b/arch/arm/mach-s5pc100/include/mach/system.h | |||
| @@ -11,14 +11,21 @@ | |||
| 11 | #ifndef __ASM_ARCH_SYSTEM_H | 11 | #ifndef __ASM_ARCH_SYSTEM_H |
| 12 | #define __ASM_ARCH_SYSTEM_H __FILE__ | 12 | #define __ASM_ARCH_SYSTEM_H __FILE__ |
| 13 | 13 | ||
| 14 | #include <linux/io.h> | ||
| 15 | #include <mach/map.h> | ||
| 16 | #include <plat/regs-clock.h> | ||
| 17 | |||
| 18 | void (*s5pc1xx_idle)(void); | ||
| 19 | |||
| 14 | static void arch_idle(void) | 20 | static void arch_idle(void) |
| 15 | { | 21 | { |
| 16 | /* nothing here yet */ | 22 | if (s5pc1xx_idle) |
| 23 | s5pc1xx_idle(); | ||
| 17 | } | 24 | } |
| 18 | 25 | ||
| 19 | static void arch_reset(char mode, const char *cmd) | 26 | static void arch_reset(char mode, const char *cmd) |
| 20 | { | 27 | { |
| 21 | /* nothing here yet */ | 28 | __raw_writel(S5PC100_SWRESET_RESETVAL, S5PC100_SWRESET); |
| 29 | return; | ||
| 22 | } | 30 | } |
| 23 | |||
| 24 | #endif /* __ASM_ARCH_IRQ_H */ | 31 | #endif /* __ASM_ARCH_IRQ_H */ |
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c index 214093cd763..ae3c52cd0eb 100644 --- a/arch/arm/mach-s5pc100/mach-smdkc100.c +++ b/arch/arm/mach-s5pc100/mach-smdkc100.c | |||
| @@ -27,16 +27,22 @@ | |||
| 27 | #include <asm/mach/map.h> | 27 | #include <asm/mach/map.h> |
| 28 | 28 | ||
| 29 | #include <mach/map.h> | 29 | #include <mach/map.h> |
| 30 | #include <mach/regs-fb.h> | ||
| 31 | #include <video/platform_lcd.h> | ||
| 30 | 32 | ||
| 31 | #include <asm/irq.h> | 33 | #include <asm/irq.h> |
| 32 | #include <asm/mach-types.h> | 34 | #include <asm/mach-types.h> |
| 33 | 35 | ||
| 34 | #include <plat/regs-serial.h> | 36 | #include <plat/regs-serial.h> |
| 37 | #include <plat/gpio-cfg.h> | ||
| 38 | #include <plat/regs-gpio.h> | ||
| 35 | 39 | ||
| 36 | #include <plat/clock.h> | 40 | #include <plat/clock.h> |
| 37 | #include <plat/devs.h> | 41 | #include <plat/devs.h> |
| 38 | #include <plat/cpu.h> | 42 | #include <plat/cpu.h> |
| 39 | #include <plat/s5pc100.h> | 43 | #include <plat/s5pc100.h> |
| 44 | #include <plat/fb.h> | ||
| 45 | #include <plat/iic.h> | ||
| 40 | 46 | ||
| 41 | #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK) | 47 | #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK) |
| 42 | #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) | 48 | #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) |
| @@ -73,9 +79,78 @@ static struct s3c2410_uartcfg smdkc100_uartcfgs[] __initdata = { | |||
| 73 | }, | 79 | }, |
| 74 | }; | 80 | }; |
| 75 | 81 | ||
| 82 | /* I2C0 */ | ||
| 83 | static struct i2c_board_info i2c_devs0[] __initdata = { | ||
| 84 | }; | ||
| 85 | |||
| 86 | /* I2C1 */ | ||
| 87 | static struct i2c_board_info i2c_devs1[] __initdata = { | ||
| 88 | }; | ||
| 89 | |||
| 90 | /* LCD power controller */ | ||
| 91 | static void smdkc100_lcd_power_set(struct plat_lcd_data *pd, | ||
| 92 | unsigned int power) | ||
| 93 | { | ||
| 94 | /* backlight */ | ||
| 95 | gpio_direction_output(S5PC100_GPD(0), power); | ||
| 96 | |||
| 97 | if (power) { | ||
| 98 | /* module reset */ | ||
| 99 | gpio_direction_output(S5PC100_GPH0(6), 1); | ||
| 100 | mdelay(100); | ||
| 101 | gpio_direction_output(S5PC100_GPH0(6), 0); | ||
| 102 | mdelay(10); | ||
| 103 | gpio_direction_output(S5PC100_GPH0(6), 1); | ||
| 104 | mdelay(10); | ||
| 105 | } | ||
| 106 | } | ||
| 107 | |||
| 108 | static struct plat_lcd_data smdkc100_lcd_power_data = { | ||
| 109 | .set_power = smdkc100_lcd_power_set, | ||
| 110 | }; | ||
| 111 | |||
| 112 | static struct platform_device smdkc100_lcd_powerdev = { | ||
| 113 | .name = "platform-lcd", | ||
| 114 | .dev.parent = &s3c_device_fb.dev, | ||
| 115 | .dev.platform_data = &smdkc100_lcd_power_data, | ||
| 116 | }; | ||
| 117 | |||
| 118 | /* Frame Buffer */ | ||
| 119 | static struct s3c_fb_pd_win smdkc100_fb_win0 = { | ||
| 120 | /* this is to ensure we use win0 */ | ||
| 121 | .win_mode = { | ||
| 122 | .refresh = 70, | ||
| 123 | .pixclock = (8+13+3+800)*(7+5+1+480), | ||
| 124 | .left_margin = 8, | ||
| 125 | .right_margin = 13, | ||
| 126 | .upper_margin = 7, | ||
| 127 | .lower_margin = 5, | ||
| 128 | .hsync_len = 3, | ||
| 129 | .vsync_len = 1, | ||
| 130 | .xres = 800, | ||
| 131 | .yres = 480, | ||
| 132 | }, | ||
| 133 | .max_bpp = 32, | ||
| 134 | .default_bpp = 16, | ||
| 135 | }; | ||
| 136 | |||
| 137 | static struct s3c_fb_platdata smdkc100_lcd_pdata __initdata = { | ||
| 138 | .win[0] = &smdkc100_fb_win0, | ||
| 139 | .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, | ||
| 140 | .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, | ||
| 141 | .setup_gpio = s5pc100_fb_gpio_setup_24bpp, | ||
| 142 | }; | ||
| 143 | |||
| 76 | static struct map_desc smdkc100_iodesc[] = {}; | 144 | static struct map_desc smdkc100_iodesc[] = {}; |
| 77 | 145 | ||
| 78 | static struct platform_device *smdkc100_devices[] __initdata = { | 146 | static struct platform_device *smdkc100_devices[] __initdata = { |
| 147 | &s3c_device_i2c0, | ||
| 148 | &s3c_device_i2c1, | ||
| 149 | &s3c_device_fb, | ||
| 150 | &s3c_device_hsmmc0, | ||
| 151 | &s3c_device_hsmmc1, | ||
| 152 | &s3c_device_hsmmc2, | ||
| 153 | &smdkc100_lcd_powerdev, | ||
| 79 | }; | 154 | }; |
| 80 | 155 | ||
| 81 | static void __init smdkc100_map_io(void) | 156 | static void __init smdkc100_map_io(void) |
| @@ -87,12 +162,24 @@ static void __init smdkc100_map_io(void) | |||
| 87 | 162 | ||
| 88 | static void __init smdkc100_machine_init(void) | 163 | static void __init smdkc100_machine_init(void) |
| 89 | { | 164 | { |
| 165 | /* I2C */ | ||
| 166 | s3c_i2c0_set_platdata(NULL); | ||
| 167 | s3c_i2c1_set_platdata(NULL); | ||
| 168 | i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0)); | ||
| 169 | i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); | ||
| 170 | |||
| 171 | s3c_fb_set_platdata(&smdkc100_lcd_pdata); | ||
| 172 | |||
| 173 | /* LCD init */ | ||
| 174 | gpio_request(S5PC100_GPD(0), "GPD"); | ||
| 175 | gpio_request(S5PC100_GPH0(6), "GPH0"); | ||
| 176 | smdkc100_lcd_power_set(&smdkc100_lcd_power_data, 0); | ||
| 90 | platform_add_devices(smdkc100_devices, ARRAY_SIZE(smdkc100_devices)); | 177 | platform_add_devices(smdkc100_devices, ARRAY_SIZE(smdkc100_devices)); |
| 91 | } | 178 | } |
| 92 | 179 | ||
| 93 | MACHINE_START(SMDKC100, "SMDKC100") | 180 | MACHINE_START(SMDKC100, "SMDKC100") |
| 94 | /* Maintainer: Byungho Min <bhmin@samsung.com> */ | 181 | /* Maintainer: Byungho Min <bhmin@samsung.com> */ |
| 95 | .phys_io = S5PC1XX_PA_UART & 0xfff00000, | 182 | .phys_io = S5PC100_PA_UART & 0xfff00000, |
| 96 | .io_pg_offst = (((u32)S5PC1XX_VA_UART) >> 18) & 0xfffc, | 183 | .io_pg_offst = (((u32)S5PC1XX_VA_UART) >> 18) & 0xfffc, |
| 97 | .boot_params = S5PC100_PA_SDRAM + 0x100, | 184 | .boot_params = S5PC100_PA_SDRAM + 0x100, |
| 98 | 185 | ||
diff --git a/arch/arm/mach-s5pc100/setup-sdhci.c b/arch/arm/mach-s5pc100/setup-sdhci.c new file mode 100644 index 00000000000..4385986a3da --- /dev/null +++ b/arch/arm/mach-s5pc100/setup-sdhci.c | |||
| @@ -0,0 +1,65 @@ | |||
| 1 | /* linux/arch/arm/mach-s5pc100/setup-sdhci.c | ||
| 2 | * | ||
| 3 | * Copyright 2008 Samsung Electronics | ||
| 4 | * | ||
| 5 | * S5PC100 - Helper functions for settign up SDHCI device(s) (HSMMC) | ||
| 6 | * | ||
| 7 | * Based on mach-s3c6410/setup-sdhci.c | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License version 2 as | ||
| 11 | * published by the Free Software Foundation. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/kernel.h> | ||
| 15 | #include <linux/types.h> | ||
| 16 | #include <linux/interrupt.h> | ||
| 17 | #include <linux/platform_device.h> | ||
| 18 | #include <linux/io.h> | ||
| 19 | |||
| 20 | #include <linux/mmc/card.h> | ||
| 21 | #include <linux/mmc/host.h> | ||
| 22 | |||
| 23 | #include <plat/regs-sdhci.h> | ||
| 24 | #include <plat/sdhci.h> | ||
| 25 | |||
| 26 | /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ | ||
| 27 | |||
| 28 | char *s5pc100_hsmmc_clksrcs[4] = { | ||
| 29 | [0] = "hsmmc", | ||
| 30 | [1] = "hsmmc", | ||
| 31 | /* [2] = "mmc_bus", not yet succesfuuly used yet */ | ||
| 32 | /* [3] = "48m", - note not succesfully used yet */ | ||
| 33 | }; | ||
| 34 | |||
| 35 | |||
| 36 | void s5pc100_setup_sdhci0_cfg_card(struct platform_device *dev, | ||
| 37 | void __iomem *r, | ||
| 38 | struct mmc_ios *ios, | ||
| 39 | struct mmc_card *card) | ||
| 40 | { | ||
| 41 | u32 ctrl2, ctrl3; | ||
| 42 | |||
| 43 | /* don't need to alter anything acording to card-type */ | ||
| 44 | |||
| 45 | writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4); | ||
| 46 | |||
| 47 | ctrl2 = readl(r + S3C_SDHCI_CONTROL2); | ||
| 48 | ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK; | ||
| 49 | ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR | | ||
| 50 | S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK | | ||
| 51 | S3C_SDHCI_CTRL2_ENFBCLKRX | | ||
| 52 | S3C_SDHCI_CTRL2_DFCNT_NONE | | ||
| 53 | S3C_SDHCI_CTRL2_ENCLKOUTHOLD); | ||
| 54 | |||
| 55 | if (ios->clock < 25 * 1000000) | ||
| 56 | ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 | | ||
| 57 | S3C_SDHCI_CTRL3_FCSEL2 | | ||
| 58 | S3C_SDHCI_CTRL3_FCSEL1 | | ||
| 59 | S3C_SDHCI_CTRL3_FCSEL0); | ||
| 60 | else | ||
| 61 | ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0); | ||
| 62 | |||
| 63 | writel(ctrl2, r + S3C_SDHCI_CONTROL2); | ||
| 64 | writel(ctrl3, r + S3C_SDHCI_CONTROL3); | ||
| 65 | } | ||
diff --git a/arch/arm/mach-sa1100/Kconfig b/arch/arm/mach-sa1100/Kconfig index 4e5c07f4e45..03a7f3857c5 100644 --- a/arch/arm/mach-sa1100/Kconfig +++ b/arch/arm/mach-sa1100/Kconfig | |||
| @@ -53,23 +53,23 @@ config SA1100_COLLIE | |||
| 53 | 53 | ||
| 54 | config SA1100_H3100 | 54 | config SA1100_H3100 |
| 55 | bool "Compaq iPAQ H3100" | 55 | bool "Compaq iPAQ H3100" |
| 56 | select HTC_EGPIO | ||
| 56 | help | 57 | help |
| 57 | Say Y here if you intend to run this kernel on the Compaq iPAQ | 58 | Say Y here if you intend to run this kernel on the Compaq iPAQ |
| 58 | H3100 handheld computer. Information about this machine and the | 59 | H3100 handheld computer. Information about this machine and the |
| 59 | Linux port to this machine can be found at: | 60 | Linux port to this machine can be found at: |
| 60 | 61 | ||
| 61 | <http://www.handhelds.org/Compaq/index.html#iPAQ_H3100> | 62 | <http://www.handhelds.org/Compaq/index.html#iPAQ_H3100> |
| 62 | <http://www.compaq.com/products/handhelds/pocketpc/> | ||
| 63 | 63 | ||
| 64 | config SA1100_H3600 | 64 | config SA1100_H3600 |
| 65 | bool "Compaq iPAQ H3600/H3700" | 65 | bool "Compaq iPAQ H3600/H3700" |
| 66 | select HTC_EGPIO | ||
| 66 | help | 67 | help |
| 67 | Say Y here if you intend to run this kernel on the Compaq iPAQ | 68 | Say Y here if you intend to run this kernel on the Compaq iPAQ |
| 68 | H3600 handheld computer. Information about this machine and the | 69 | H3600 handheld computer. Information about this machine and the |
| 69 | Linux port to this machine can be found at: | 70 | Linux port to this machine can be found at: |
| 70 | 71 | ||
| 71 | <http://www.handhelds.org/Compaq/index.html#iPAQ_H3600> | 72 | <http://www.handhelds.org/Compaq/index.html#iPAQ_H3600> |
| 72 | <http://www.compaq.com/products/handhelds/pocketpc/> | ||
| 73 | 73 | ||
| 74 | config SA1100_BADGE4 | 74 | config SA1100_BADGE4 |
| 75 | bool "HP Labs BadgePAD 4" | 75 | bool "HP Labs BadgePAD 4" |
diff --git a/arch/arm/mach-sa1100/Makefile b/arch/arm/mach-sa1100/Makefile index bb7b8198d0c..89349c1dd7a 100644 --- a/arch/arm/mach-sa1100/Makefile +++ b/arch/arm/mach-sa1100/Makefile | |||
| @@ -25,8 +25,8 @@ led-$(CONFIG_SA1100_CERF) += leds-cerf.o | |||
| 25 | 25 | ||
| 26 | obj-$(CONFIG_SA1100_COLLIE) += collie.o | 26 | obj-$(CONFIG_SA1100_COLLIE) += collie.o |
| 27 | 27 | ||
| 28 | obj-$(CONFIG_SA1100_H3100) += h3600.o | 28 | obj-$(CONFIG_SA1100_H3100) += h3100.o h3xxx.o |
| 29 | obj-$(CONFIG_SA1100_H3600) += h3600.o | 29 | obj-$(CONFIG_SA1100_H3600) += h3600.o h3xxx.o |
| 30 | 30 | ||
| 31 | obj-$(CONFIG_SA1100_HACKKIT) += hackkit.o | 31 | obj-$(CONFIG_SA1100_HACKKIT) += hackkit.o |
| 32 | led-$(CONFIG_SA1100_HACKKIT) += leds-hackkit.o | 32 | led-$(CONFIG_SA1100_HACKKIT) += leds-hackkit.o |
diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c index 55e64477a87..169e5b87dbf 100644 --- a/arch/arm/mach-sa1100/assabet.c +++ b/arch/arm/mach-sa1100/assabet.c | |||
| @@ -249,10 +249,10 @@ static void __init assabet_init(void) | |||
| 249 | #endif | 249 | #endif |
| 250 | } | 250 | } |
| 251 | 251 | ||
| 252 | sa11x0_set_flash_data(&assabet_flash_data, assabet_flash_resources, | 252 | sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources, |
| 253 | ARRAY_SIZE(assabet_flash_resources)); | 253 | ARRAY_SIZE(assabet_flash_resources)); |
| 254 | sa11x0_set_irda_data(&assabet_irda_data); | 254 | sa11x0_register_irda(&assabet_irda_data); |
| 255 | sa11x0_set_mcp_data(&assabet_mcp_data); | 255 | sa11x0_register_mcp(&assabet_mcp_data); |
| 256 | } | 256 | } |
| 257 | 257 | ||
| 258 | /* | 258 | /* |
diff --git a/arch/arm/mach-sa1100/badge4.c b/arch/arm/mach-sa1100/badge4.c index ab5883b39dd..051ec0f0023 100644 --- a/arch/arm/mach-sa1100/badge4.c +++ b/arch/arm/mach-sa1100/badge4.c | |||
| @@ -212,7 +212,7 @@ static int __init badge4_init(void) | |||
| 212 | /* maybe turn on 5v0 from the start */ | 212 | /* maybe turn on 5v0 from the start */ |
| 213 | badge4_set_5V(BADGE4_5V_INITIALLY, five_v_on); | 213 | badge4_set_5V(BADGE4_5V_INITIALLY, five_v_on); |
| 214 | 214 | ||
| 215 | sa11x0_set_flash_data(&badge4_flash_data, &badge4_flash_resource, 1); | 215 | sa11x0_register_mtd(&badge4_flash_data, &badge4_flash_resource, 1); |
| 216 | 216 | ||
| 217 | return 0; | 217 | return 0; |
| 218 | } | 218 | } |
diff --git a/arch/arm/mach-sa1100/cerf.c b/arch/arm/mach-sa1100/cerf.c index fd3ad9cfc91..bc950ef418a 100644 --- a/arch/arm/mach-sa1100/cerf.c +++ b/arch/arm/mach-sa1100/cerf.c | |||
| @@ -129,8 +129,8 @@ static struct mcp_plat_data cerf_mcp_data = { | |||
| 129 | static void __init cerf_init(void) | 129 | static void __init cerf_init(void) |
| 130 | { | 130 | { |
| 131 | platform_add_devices(cerf_devices, ARRAY_SIZE(cerf_devices)); | 131 | platform_add_devices(cerf_devices, ARRAY_SIZE(cerf_devices)); |
| 132 | sa11x0_set_flash_data(&cerf_flash_data, &cerf_flash_resource, 1); | 132 | sa11x0_register_mtd(&cerf_flash_data, &cerf_flash_resource, 1); |
| 133 | sa11x0_set_mcp_data(&cerf_mcp_data); | 133 | sa11x0_register_mcp(&cerf_mcp_data); |
| 134 | } | 134 | } |
| 135 | 135 | ||
| 136 | MACHINE_START(CERF, "Intrinsyc CerfBoard/CerfCube") | 136 | MACHINE_START(CERF, "Intrinsyc CerfBoard/CerfCube") |
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c index bbf2ebcc306..9982c5c28ed 100644 --- a/arch/arm/mach-sa1100/collie.c +++ b/arch/arm/mach-sa1100/collie.c | |||
| @@ -26,6 +26,7 @@ | |||
| 26 | #include <linux/mtd/partitions.h> | 26 | #include <linux/mtd/partitions.h> |
| 27 | #include <linux/timer.h> | 27 | #include <linux/timer.h> |
| 28 | #include <linux/gpio.h> | 28 | #include <linux/gpio.h> |
| 29 | #include <linux/pda_power.h> | ||
| 29 | 30 | ||
| 30 | #include <mach/hardware.h> | 31 | #include <mach/hardware.h> |
| 31 | #include <asm/mach-types.h> | 32 | #include <asm/mach-types.h> |
| @@ -56,6 +57,7 @@ static struct resource collie_scoop_resources[] = { | |||
| 56 | static struct scoop_config collie_scoop_setup = { | 57 | static struct scoop_config collie_scoop_setup = { |
| 57 | .io_dir = COLLIE_SCOOP_IO_DIR, | 58 | .io_dir = COLLIE_SCOOP_IO_DIR, |
| 58 | .io_out = COLLIE_SCOOP_IO_OUT, | 59 | .io_out = COLLIE_SCOOP_IO_OUT, |
| 60 | .gpio_base = COLLIE_SCOOP_GPIO_BASE, | ||
| 59 | }; | 61 | }; |
| 60 | 62 | ||
| 61 | struct platform_device colliescoop_device = { | 63 | struct platform_device colliescoop_device = { |
| @@ -85,6 +87,70 @@ static struct scoop_pcmcia_config collie_pcmcia_config = { | |||
| 85 | static struct mcp_plat_data collie_mcp_data = { | 87 | static struct mcp_plat_data collie_mcp_data = { |
| 86 | .mccr0 = MCCR0_ADM | MCCR0_ExtClk, | 88 | .mccr0 = MCCR0_ADM | MCCR0_ExtClk, |
| 87 | .sclk_rate = 9216000, | 89 | .sclk_rate = 9216000, |
| 90 | .gpio_base = COLLIE_TC35143_GPIO_BASE, | ||
| 91 | }; | ||
| 92 | |||
| 93 | /* | ||
| 94 | * Collie AC IN | ||
| 95 | */ | ||
| 96 | static int collie_power_init(struct device *dev) | ||
| 97 | { | ||
| 98 | int ret = gpio_request(COLLIE_GPIO_AC_IN, "ac in"); | ||
| 99 | if (ret) | ||
| 100 | goto err_gpio_req; | ||
| 101 | |||
| 102 | ret = gpio_direction_input(COLLIE_GPIO_AC_IN); | ||
| 103 | if (ret) | ||
| 104 | goto err_gpio_in; | ||
| 105 | |||
| 106 | return 0; | ||
| 107 | |||
| 108 | err_gpio_in: | ||
| 109 | gpio_free(COLLIE_GPIO_AC_IN); | ||
| 110 | err_gpio_req: | ||
| 111 | return ret; | ||
| 112 | } | ||
| 113 | |||
| 114 | static void collie_power_exit(struct device *dev) | ||
| 115 | { | ||
| 116 | gpio_free(COLLIE_GPIO_AC_IN); | ||
| 117 | } | ||
| 118 | |||
| 119 | static int collie_power_ac_online(void) | ||
| 120 | { | ||
| 121 | return gpio_get_value(COLLIE_GPIO_AC_IN) == 2; | ||
| 122 | } | ||
| 123 | |||
| 124 | static char *collie_ac_supplied_to[] = { | ||
| 125 | "main-battery", | ||
| 126 | "backup-battery", | ||
| 127 | }; | ||
| 128 | |||
| 129 | static struct pda_power_pdata collie_power_data = { | ||
| 130 | .init = collie_power_init, | ||
| 131 | .is_ac_online = collie_power_ac_online, | ||
| 132 | .exit = collie_power_exit, | ||
| 133 | .supplied_to = collie_ac_supplied_to, | ||
| 134 | .num_supplicants = ARRAY_SIZE(collie_ac_supplied_to), | ||
| 135 | }; | ||
| 136 | |||
| 137 | static struct resource collie_power_resource[] = { | ||
| 138 | { | ||
| 139 | .name = "ac", | ||
| 140 | .start = gpio_to_irq(COLLIE_GPIO_AC_IN), | ||
| 141 | .end = gpio_to_irq(COLLIE_GPIO_AC_IN), | ||
| 142 | .flags = IORESOURCE_IRQ | | ||
| 143 | IORESOURCE_IRQ_HIGHEDGE | | ||
| 144 | IORESOURCE_IRQ_LOWEDGE, | ||
| 145 | }, | ||
| 146 | }; | ||
| 147 | |||
| 148 | static struct platform_device collie_power_device = { | ||
| 149 | .name = "pda-power", | ||
| 150 | .id = -1, | ||
| 151 | .dev.platform_data = &collie_power_data, | ||
| 152 | .resource = collie_power_resource, | ||
| 153 | .num_resources = ARRAY_SIZE(collie_power_resource), | ||
| 88 | }; | 154 | }; |
| 89 | 155 | ||
| 90 | #ifdef CONFIG_SHARP_LOCOMO | 156 | #ifdef CONFIG_SHARP_LOCOMO |
| @@ -178,6 +244,7 @@ struct platform_device collie_locomo_device = { | |||
| 178 | static struct platform_device *devices[] __initdata = { | 244 | static struct platform_device *devices[] __initdata = { |
| 179 | &collie_locomo_device, | 245 | &collie_locomo_device, |
| 180 | &colliescoop_device, | 246 | &colliescoop_device, |
| 247 | &collie_power_device, | ||
| 181 | }; | 248 | }; |
| 182 | 249 | ||
| 183 | static struct mtd_partition collie_partitions[] = { | 250 | static struct mtd_partition collie_partitions[] = { |
| @@ -248,22 +315,24 @@ static void __init collie_init(void) | |||
| 248 | GPDR = GPIO_LDD8 | GPIO_LDD9 | GPIO_LDD10 | GPIO_LDD11 | GPIO_LDD12 | | 315 | GPDR = GPIO_LDD8 | GPIO_LDD9 | GPIO_LDD10 | GPIO_LDD11 | GPIO_LDD12 | |
| 249 | GPIO_LDD13 | GPIO_LDD14 | GPIO_LDD15 | GPIO_SSP_TXD | | 316 | GPIO_LDD13 | GPIO_LDD14 | GPIO_LDD15 | GPIO_SSP_TXD | |
| 250 | GPIO_SSP_SCLK | GPIO_SSP_SFRM | GPIO_SDLC_SCLK | | 317 | GPIO_SSP_SCLK | GPIO_SSP_SFRM | GPIO_SDLC_SCLK | |
| 251 | COLLIE_GPIO_UCB1x00_RESET | COLLIE_GPIO_nMIC_ON | | 318 | _COLLIE_GPIO_UCB1x00_RESET | _COLLIE_GPIO_nMIC_ON | |
| 252 | COLLIE_GPIO_nREMOCON_ON | GPIO_32_768kHz; | 319 | _COLLIE_GPIO_nREMOCON_ON | GPIO_32_768kHz; |
| 253 | 320 | ||
| 254 | PPDR = PPC_LDD0 | PPC_LDD1 | PPC_LDD2 | PPC_LDD3 | PPC_LDD4 | PPC_LDD5 | | 321 | PPDR = PPC_LDD0 | PPC_LDD1 | PPC_LDD2 | PPC_LDD3 | PPC_LDD4 | PPC_LDD5 | |
| 255 | PPC_LDD6 | PPC_LDD7 | PPC_L_PCLK | PPC_L_LCLK | PPC_L_FCLK | PPC_L_BIAS | | 322 | PPC_LDD6 | PPC_LDD7 | PPC_L_PCLK | PPC_L_LCLK | PPC_L_FCLK | PPC_L_BIAS | |
| 256 | PPC_TXD1 | PPC_TXD2 | PPC_TXD3 | PPC_TXD4 | PPC_SCLK | PPC_SFRM; | 323 | PPC_TXD1 | PPC_TXD2 | PPC_TXD3 | PPC_TXD4 | PPC_SCLK | PPC_SFRM; |
| 257 | 324 | ||
| 258 | PWER = COLLIE_GPIO_AC_IN | COLLIE_GPIO_CO | COLLIE_GPIO_ON_KEY | | 325 | PWER = _COLLIE_GPIO_AC_IN | _COLLIE_GPIO_CO | _COLLIE_GPIO_ON_KEY | |
| 259 | COLLIE_GPIO_WAKEUP | COLLIE_GPIO_nREMOCON_INT | PWER_RTC; | 326 | _COLLIE_GPIO_WAKEUP | _COLLIE_GPIO_nREMOCON_INT | PWER_RTC; |
| 260 | 327 | ||
| 261 | PGSR = COLLIE_GPIO_nREMOCON_ON; | 328 | PGSR = _COLLIE_GPIO_nREMOCON_ON; |
| 262 | 329 | ||
| 263 | PSDR = PPC_RXD1 | PPC_RXD2 | PPC_RXD3 | PPC_RXD4; | 330 | PSDR = PPC_RXD1 | PPC_RXD2 | PPC_RXD3 | PPC_RXD4; |
| 264 | 331 | ||
| 265 | PCFR = PCFR_OPDE; | 332 | PCFR = PCFR_OPDE; |
| 266 | 333 | ||
| 334 | GPSR |= _COLLIE_GPIO_UCB1x00_RESET; | ||
| 335 | |||
| 267 | 336 | ||
| 268 | platform_scoop_config = &collie_pcmcia_config; | 337 | platform_scoop_config = &collie_pcmcia_config; |
| 269 | 338 | ||
| @@ -272,9 +341,9 @@ static void __init collie_init(void) | |||
| 272 | printk(KERN_WARNING "collie: Unable to register LoCoMo device\n"); | 341 | printk(KERN_WARNING "collie: Unable to register LoCoMo device\n"); |
| 273 | } | 342 | } |
| 274 | 343 | ||
| 275 | sa11x0_set_flash_data(&collie_flash_data, collie_flash_resources, | 344 | sa11x0_register_mtd(&collie_flash_data, collie_flash_resources, |
| 276 | ARRAY_SIZE(collie_flash_resources)); | 345 | ARRAY_SIZE(collie_flash_resources)); |
| 277 | sa11x0_set_mcp_data(&collie_mcp_data); | 346 | sa11x0_register_mcp(&collie_mcp_data); |
| 278 | 347 | ||
| 279 | sharpsl_save_param(); | 348 | sharpsl_save_param(); |
| 280 | } | 349 | } |
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c index 23cfdd59395..9faea1511c1 100644 --- a/arch/arm/mach-sa1100/generic.c +++ b/arch/arm/mach-sa1100/generic.c | |||
| @@ -162,6 +162,17 @@ static void sa1100_power_off(void) | |||
| 162 | PMCR = PMCR_SF; | 162 | PMCR = PMCR_SF; |
| 163 | } | 163 | } |
| 164 | 164 | ||
| 165 | static void sa11x0_register_device(struct platform_device *dev, void *data) | ||
| 166 | { | ||
| 167 | int err; | ||
| 168 | dev->dev.platform_data = data; | ||
| 169 | err = platform_device_register(dev); | ||
| 170 | if (err) | ||
| 171 | printk(KERN_ERR "Unable to register device %s: %d\n", | ||
| 172 | dev->name, err); | ||
| 173 | } | ||
| 174 | |||
| 175 | |||
| 165 | static struct resource sa11x0udc_resources[] = { | 176 | static struct resource sa11x0udc_resources[] = { |
| 166 | [0] = { | 177 | [0] = { |
| 167 | .start = 0x80000000, | 178 | .start = 0x80000000, |
| @@ -234,9 +245,9 @@ static struct platform_device sa11x0mcp_device = { | |||
| 234 | .resource = sa11x0mcp_resources, | 245 | .resource = sa11x0mcp_resources, |
| 235 | }; | 246 | }; |
| 236 | 247 | ||
| 237 | void sa11x0_set_mcp_data(struct mcp_plat_data *data) | 248 | void sa11x0_register_mcp(struct mcp_plat_data *data) |
| 238 | { | 249 | { |
| 239 | sa11x0mcp_device.dev.platform_data = data; | 250 | sa11x0_register_device(&sa11x0mcp_device, data); |
| 240 | } | 251 | } |
| 241 | 252 | ||
| 242 | static struct resource sa11x0ssp_resources[] = { | 253 | static struct resource sa11x0ssp_resources[] = { |
| @@ -293,13 +304,13 @@ static struct platform_device sa11x0mtd_device = { | |||
| 293 | .id = -1, | 304 | .id = -1, |
| 294 | }; | 305 | }; |
| 295 | 306 | ||
| 296 | void sa11x0_set_flash_data(struct flash_platform_data *flash, | 307 | void sa11x0_register_mtd(struct flash_platform_data *flash, |
| 297 | struct resource *res, int nr) | 308 | struct resource *res, int nr) |
| 298 | { | 309 | { |
| 299 | flash->name = "sa1100"; | 310 | flash->name = "sa1100"; |
| 300 | sa11x0mtd_device.dev.platform_data = flash; | ||
| 301 | sa11x0mtd_device.resource = res; | 311 | sa11x0mtd_device.resource = res; |
| 302 | sa11x0mtd_device.num_resources = nr; | 312 | sa11x0mtd_device.num_resources = nr; |
| 313 | sa11x0_register_device(&sa11x0mtd_device, flash); | ||
| 303 | } | 314 | } |
| 304 | 315 | ||
| 305 | static struct resource sa11x0ir_resources[] = { | 316 | static struct resource sa11x0ir_resources[] = { |
| @@ -329,9 +340,9 @@ static struct platform_device sa11x0ir_device = { | |||
| 329 | .resource = sa11x0ir_resources, | 340 | .resource = sa11x0ir_resources, |
| 330 | }; | 341 | }; |
| 331 | 342 | ||
| 332 | void sa11x0_set_irda_data(struct irda_platform_data *irda) | 343 | void sa11x0_register_irda(struct irda_platform_data *irda) |
| 333 | { | 344 | { |
| 334 | sa11x0ir_device.dev.platform_data = irda; | 345 | sa11x0_register_device(&sa11x0ir_device, irda); |
| 335 | } | 346 | } |
| 336 | 347 | ||
| 337 | static struct platform_device sa11x0rtc_device = { | 348 | static struct platform_device sa11x0rtc_device = { |
| @@ -343,21 +354,15 @@ static struct platform_device *sa11x0_devices[] __initdata = { | |||
| 343 | &sa11x0udc_device, | 354 | &sa11x0udc_device, |
| 344 | &sa11x0uart1_device, | 355 | &sa11x0uart1_device, |
| 345 | &sa11x0uart3_device, | 356 | &sa11x0uart3_device, |
| 346 | &sa11x0mcp_device, | ||
| 347 | &sa11x0ssp_device, | 357 | &sa11x0ssp_device, |
| 348 | &sa11x0pcmcia_device, | 358 | &sa11x0pcmcia_device, |
| 349 | &sa11x0fb_device, | 359 | &sa11x0fb_device, |
| 350 | &sa11x0mtd_device, | ||
| 351 | &sa11x0rtc_device, | 360 | &sa11x0rtc_device, |
| 352 | }; | 361 | }; |
| 353 | 362 | ||
| 354 | static int __init sa1100_init(void) | 363 | static int __init sa1100_init(void) |
| 355 | { | 364 | { |
| 356 | pm_power_off = sa1100_power_off; | 365 | pm_power_off = sa1100_power_off; |
| 357 | |||
| 358 | if (sa11x0ir_device.dev.platform_data) | ||
| 359 | platform_device_register(&sa11x0ir_device); | ||
| 360 | |||
| 361 | return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices)); | 366 | return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices)); |
| 362 | } | 367 | } |
| 363 | 368 | ||
diff --git a/arch/arm/mach-sa1100/generic.h b/arch/arm/mach-sa1100/generic.h index 793c2e6c991..ec03f187c52 100644 --- a/arch/arm/mach-sa1100/generic.h +++ b/arch/arm/mach-sa1100/generic.h | |||
| @@ -32,14 +32,11 @@ extern unsigned int sa11x0_ppcr_to_freq(unsigned int idx); | |||
| 32 | struct flash_platform_data; | 32 | struct flash_platform_data; |
| 33 | struct resource; | 33 | struct resource; |
| 34 | 34 | ||
| 35 | extern void sa11x0_set_flash_data(struct flash_platform_data *flash, | 35 | void sa11x0_register_mtd(struct flash_platform_data *flash, |
| 36 | struct resource *res, int nr); | 36 | struct resource *res, int nr); |
| 37 | |||
| 38 | struct sa11x0_ssp_plat_ops; | ||
| 39 | extern void sa11x0_set_ssp_data(struct sa11x0_ssp_plat_ops *ops); | ||
| 40 | 37 | ||
| 41 | struct irda_platform_data; | 38 | struct irda_platform_data; |
| 42 | void sa11x0_set_irda_data(struct irda_platform_data *irda); | 39 | void sa11x0_register_irda(struct irda_platform_data *irda); |
| 43 | 40 | ||
| 44 | struct mcp_plat_data; | 41 | struct mcp_plat_data; |
| 45 | void sa11x0_set_mcp_data(struct mcp_plat_data *data); | 42 | void sa11x0_register_mcp(struct mcp_plat_data *data); |
diff --git a/arch/arm/mach-sa1100/h3100.c b/arch/arm/mach-sa1100/h3100.c new file mode 100644 index 00000000000..0c7cea0dc01 --- /dev/null +++ b/arch/arm/mach-sa1100/h3100.c | |||
| @@ -0,0 +1,95 @@ | |||
| 1 | /* | ||
| 2 | * Support for Compaq iPAQ H3100 handheld computer | ||
| 3 | * | ||
| 4 | * Copyright (c) 2000,1 Compaq Computer Corporation. (Author: Jamey Hicks) | ||
| 5 | * Copyright (c) 2009 Dmitry Artamonow <mad_soft@inbox.ru> | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | * | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/init.h> | ||
| 14 | #include <linux/kernel.h> | ||
| 15 | #include <linux/gpio.h> | ||
| 16 | |||
| 17 | #include <asm/mach-types.h> | ||
| 18 | #include <asm/mach/arch.h> | ||
| 19 | #include <asm/mach/irda.h> | ||
| 20 | |||
| 21 | #include <mach/h3xxx.h> | ||
| 22 | |||
| 23 | #include "generic.h" | ||
| 24 | |||
| 25 | /* | ||
| 26 | * helper for sa1100fb | ||
| 27 | */ | ||
| 28 | static void h3100_lcd_power(int enable) | ||
| 29 | { | ||
| 30 | if (!gpio_request(H3XXX_EGPIO_LCD_ON, "LCD ON")) { | ||
| 31 | gpio_set_value(H3100_GPIO_LCD_3V_ON, enable); | ||
| 32 | gpio_direction_output(H3XXX_EGPIO_LCD_ON, enable); | ||
| 33 | gpio_free(H3XXX_EGPIO_LCD_ON); | ||
| 34 | } else { | ||
| 35 | pr_err("%s: can't request H3XXX_EGPIO_LCD_ON\n", __func__); | ||
| 36 | } | ||
| 37 | } | ||
| 38 | |||
| 39 | |||
| 40 | static void __init h3100_map_io(void) | ||
| 41 | { | ||
| 42 | h3xxx_map_io(); | ||
| 43 | |||
| 44 | sa1100fb_lcd_power = h3100_lcd_power; | ||
| 45 | |||
| 46 | /* Older bootldrs put GPIO2-9 in alternate mode on the | ||
| 47 | assumption that they are used for video */ | ||
| 48 | GAFR &= ~0x000001fb; | ||
| 49 | } | ||
| 50 | |||
| 51 | /* | ||
| 52 | * This turns the IRDA power on or off on the Compaq H3100 | ||
| 53 | */ | ||
| 54 | static int h3100_irda_set_power(struct device *dev, unsigned int state) | ||
| 55 | { | ||
| 56 | gpio_set_value(H3100_GPIO_IR_ON, state); | ||
| 57 | return 0; | ||
| 58 | } | ||
| 59 | |||
| 60 | static void h3100_irda_set_speed(struct device *dev, unsigned int speed) | ||
| 61 | { | ||
| 62 | gpio_set_value(H3100_GPIO_IR_FSEL, !(speed < 4000000)); | ||
| 63 | } | ||
| 64 | |||
| 65 | static struct irda_platform_data h3100_irda_data = { | ||
| 66 | .set_power = h3100_irda_set_power, | ||
| 67 | .set_speed = h3100_irda_set_speed, | ||
| 68 | }; | ||
| 69 | |||
| 70 | static struct gpio_default_state h3100_default_gpio[] = { | ||
| 71 | { H3100_GPIO_IR_ON, GPIO_MODE_OUT0, "IrDA power" }, | ||
| 72 | { H3100_GPIO_IR_FSEL, GPIO_MODE_OUT0, "IrDA fsel" }, | ||
| 73 | { H3XXX_GPIO_COM_DCD, GPIO_MODE_IN, "COM DCD" }, | ||
| 74 | { H3XXX_GPIO_COM_CTS, GPIO_MODE_IN, "COM CTS" }, | ||
| 75 | { H3XXX_GPIO_COM_RTS, GPIO_MODE_OUT0, "COM RTS" }, | ||
| 76 | { H3100_GPIO_LCD_3V_ON, GPIO_MODE_OUT0, "LCD 3v" }, | ||
| 77 | }; | ||
| 78 | |||
| 79 | static void __init h3100_mach_init(void) | ||
| 80 | { | ||
| 81 | h3xxx_init_gpio(h3100_default_gpio, ARRAY_SIZE(h3100_default_gpio)); | ||
| 82 | h3xxx_mach_init(); | ||
| 83 | sa11x0_register_irda(&h3100_irda_data); | ||
| 84 | } | ||
| 85 | |||
| 86 | MACHINE_START(H3100, "Compaq iPAQ H3100") | ||
| 87 | .phys_io = 0x80000000, | ||
| 88 | .io_pg_offst = ((0xf8000000) >> 18) & 0xfffc, | ||
| 89 | .boot_params = 0xc0000100, | ||
| 90 | .map_io = h3100_map_io, | ||
| 91 | .init_irq = sa1100_init_irq, | ||
| 92 | .timer = &sa1100_timer, | ||
| 93 | .init_machine = h3100_mach_init, | ||
| 94 | MACHINE_END | ||
| 95 | |||
diff --git a/arch/arm/mach-sa1100/h3600.c b/arch/arm/mach-sa1100/h3600.c index 0eb2f159578..af3b71459f8 100644 --- a/arch/arm/mach-sa1100/h3600.c +++ b/arch/arm/mach-sa1100/h3600.c | |||
| @@ -1,421 +1,127 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Hardware definitions for Compaq iPAQ H3xxx Handheld Computers | 2 | * Support for Compaq iPAQ H3600 handheld computer |
| 3 | * | 3 | * |
| 4 | * Copyright 2000,1 Compaq Computer Corporation. | 4 | * Copyright (c) 2000,1 Compaq Computer Corporation. (Author: Jamey Hicks) |
| 5 | * Copyright (c) 2009 Dmitry Artamonow <mad_soft@inbox.ru> | ||
| 5 | * | 6 | * |
| 6 | * Use consistent with the GNU GPL is permitted, | 7 | * This program is free software; you can redistribute it and/or modify |
| 7 | * provided that this copyright notice is | 8 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * preserved in its entirety in all copies and derived works. | 9 | * published by the Free Software Foundation. |
| 9 | * | ||
| 10 | * COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED, | ||
| 11 | * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS | ||
| 12 | * FITNESS FOR ANY PARTICULAR PURPOSE. | ||
| 13 | * | ||
| 14 | * Author: Jamey Hicks. | ||
| 15 | * | ||
| 16 | * History: | ||
| 17 | * | ||
| 18 | * 2001-10-?? Andrew Christian Added support for iPAQ H3800 | ||
| 19 | * and abstracted EGPIO interface. | ||
| 20 | * | 10 | * |
| 21 | */ | 11 | */ |
| 22 | #include <linux/module.h> | 12 | |
| 23 | #include <linux/init.h> | 13 | #include <linux/init.h> |
| 24 | #include <linux/kernel.h> | 14 | #include <linux/kernel.h> |
| 25 | #include <linux/tty.h> | 15 | #include <linux/gpio.h> |
| 26 | #include <linux/pm.h> | ||
| 27 | #include <linux/device.h> | ||
| 28 | #include <linux/mtd/mtd.h> | ||
| 29 | #include <linux/mtd/partitions.h> | ||
| 30 | #include <linux/serial_core.h> | ||
| 31 | 16 | ||
| 32 | #include <asm/irq.h> | ||
| 33 | #include <mach/hardware.h> | ||
| 34 | #include <asm/mach-types.h> | 17 | #include <asm/mach-types.h> |
| 35 | #include <asm/setup.h> | ||
| 36 | |||
| 37 | #include <asm/mach/irq.h> | ||
| 38 | #include <asm/mach/arch.h> | 18 | #include <asm/mach/arch.h> |
| 39 | #include <asm/mach/flash.h> | ||
| 40 | #include <asm/mach/irda.h> | 19 | #include <asm/mach/irda.h> |
| 41 | #include <asm/mach/map.h> | ||
| 42 | #include <asm/mach/serial_sa1100.h> | ||
| 43 | 20 | ||
| 44 | #include <mach/h3600.h> | 21 | #include <mach/h3xxx.h> |
| 45 | #include <mach/h3600_gpio.h> | ||
| 46 | 22 | ||
| 47 | #include "generic.h" | 23 | #include "generic.h" |
| 48 | 24 | ||
| 49 | void (*assign_h3600_egpio)(enum ipaq_egpio_type x, int level); | ||
| 50 | EXPORT_SYMBOL(assign_h3600_egpio); | ||
| 51 | |||
| 52 | static struct mtd_partition h3xxx_partitions[] = { | ||
| 53 | { | ||
| 54 | .name = "H3XXX boot firmware", | ||
| 55 | .size = 0x00040000, | ||
| 56 | .offset = 0, | ||
| 57 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | ||
| 58 | }, { | ||
| 59 | .name = "H3XXX rootfs", | ||
| 60 | .size = MTDPART_SIZ_FULL, | ||
| 61 | .offset = 0x00040000, | ||
| 62 | } | ||
| 63 | }; | ||
| 64 | |||
| 65 | static void h3xxx_set_vpp(int vpp) | ||
| 66 | { | ||
| 67 | assign_h3600_egpio(IPAQ_EGPIO_VPP_ON, vpp); | ||
| 68 | } | ||
| 69 | |||
| 70 | static struct flash_platform_data h3xxx_flash_data = { | ||
| 71 | .map_name = "cfi_probe", | ||
| 72 | .set_vpp = h3xxx_set_vpp, | ||
| 73 | .parts = h3xxx_partitions, | ||
| 74 | .nr_parts = ARRAY_SIZE(h3xxx_partitions), | ||
| 75 | }; | ||
| 76 | |||
| 77 | static struct resource h3xxx_flash_resource = { | ||
| 78 | .start = SA1100_CS0_PHYS, | ||
| 79 | .end = SA1100_CS0_PHYS + SZ_32M - 1, | ||
| 80 | .flags = IORESOURCE_MEM, | ||
| 81 | }; | ||
| 82 | |||
| 83 | /* | 25 | /* |
| 84 | * This turns the IRDA power on or off on the Compaq H3600 | 26 | * helper for sa1100fb |
| 85 | */ | ||
| 86 | static int h3600_irda_set_power(struct device *dev, unsigned int state) | ||
| 87 | { | ||
| 88 | assign_h3600_egpio( IPAQ_EGPIO_IR_ON, state ); | ||
| 89 | |||
| 90 | return 0; | ||
| 91 | } | ||
| 92 | |||
| 93 | static void h3600_irda_set_speed(struct device *dev, unsigned int speed) | ||
| 94 | { | ||
| 95 | assign_h3600_egpio(IPAQ_EGPIO_IR_FSEL, !(speed < 4000000)); | ||
| 96 | } | ||
| 97 | |||
| 98 | static struct irda_platform_data h3600_irda_data = { | ||
| 99 | .set_power = h3600_irda_set_power, | ||
| 100 | .set_speed = h3600_irda_set_speed, | ||
| 101 | }; | ||
| 102 | |||
| 103 | static void h3xxx_mach_init(void) | ||
| 104 | { | ||
| 105 | sa11x0_set_flash_data(&h3xxx_flash_data, &h3xxx_flash_resource, 1); | ||
| 106 | sa11x0_set_irda_data(&h3600_irda_data); | ||
| 107 | } | ||
| 108 | |||
| 109 | /* | ||
| 110 | * low-level UART features | ||
| 111 | */ | 27 | */ |
| 112 | 28 | static void h3600_lcd_power(int enable) | |
| 113 | static void h3600_uart_set_mctrl(struct uart_port *port, u_int mctrl) | ||
| 114 | { | 29 | { |
| 115 | if (port->mapbase == _Ser3UTCR0) { | 30 | if (gpio_request(H3XXX_EGPIO_LCD_ON, "LCD power")) { |
| 116 | if (mctrl & TIOCM_RTS) | 31 | pr_err("%s: can't request H3XXX_EGPIO_LCD_ON\n", __func__); |
| 117 | GPCR = GPIO_H3600_COM_RTS; | 32 | goto err1; |
| 118 | else | ||
| 119 | GPSR = GPIO_H3600_COM_RTS; | ||
| 120 | } | 33 | } |
| 121 | } | 34 | if (gpio_request(H3600_EGPIO_LCD_PCI, "LCD control")) { |
| 122 | 35 | pr_err("%s: can't request H3XXX_EGPIO_LCD_PCI\n", __func__); | |
| 123 | static u_int h3600_uart_get_mctrl(struct uart_port *port) | 36 | goto err2; |
| 124 | { | 37 | } |
| 125 | u_int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR; | 38 | if (gpio_request(H3600_EGPIO_LCD_5V_ON, "LCD 5v")) { |
| 126 | 39 | pr_err("%s: can't request H3XXX_EGPIO_LCD_5V_ON\n", __func__); | |
| 127 | if (port->mapbase == _Ser3UTCR0) { | 40 | goto err3; |
| 128 | int gplr = GPLR; | 41 | } |
| 129 | /* DCD and CTS bits are inverted in GPLR by RS232 transceiver */ | 42 | if (gpio_request(H3600_EGPIO_LVDD_ON, "LCD 9v/-6.5v")) { |
| 130 | if (gplr & GPIO_H3600_COM_DCD) | 43 | pr_err("%s: can't request H3600_EGPIO_LVDD_ON\n", __func__); |
| 131 | ret &= ~TIOCM_CD; | 44 | goto err4; |
| 132 | if (gplr & GPIO_H3600_COM_CTS) | ||
| 133 | ret &= ~TIOCM_CTS; | ||
| 134 | } | 45 | } |
| 135 | 46 | ||
| 136 | return ret; | 47 | gpio_direction_output(H3XXX_EGPIO_LCD_ON, enable); |
| 137 | } | 48 | gpio_direction_output(H3600_EGPIO_LCD_PCI, enable); |
| 49 | gpio_direction_output(H3600_EGPIO_LCD_5V_ON, enable); | ||
| 50 | gpio_direction_output(H3600_EGPIO_LVDD_ON, enable); | ||
| 138 | 51 | ||
| 139 | static void h3600_uart_pm(struct uart_port *port, u_int state, u_int oldstate) | 52 | gpio_free(H3600_EGPIO_LVDD_ON); |
| 140 | { | 53 | err4: gpio_free(H3600_EGPIO_LCD_5V_ON); |
| 141 | if (port->mapbase == _Ser2UTCR0) { /* TODO: REMOVE THIS */ | 54 | err3: gpio_free(H3600_EGPIO_LCD_PCI); |
| 142 | assign_h3600_egpio(IPAQ_EGPIO_IR_ON, !state); | 55 | err2: gpio_free(H3XXX_EGPIO_LCD_ON); |
| 143 | } else if (port->mapbase == _Ser3UTCR0) { | 56 | err1: return; |
| 144 | assign_h3600_egpio(IPAQ_EGPIO_RS232_ON, !state); | ||
| 145 | } | ||
| 146 | } | 57 | } |
| 147 | 58 | ||
| 148 | /* | 59 | static void __init h3600_map_io(void) |
| 149 | * Enable/Disable wake up events for this serial port. | ||
| 150 | * Obviously, we only support this on the normal COM port. | ||
| 151 | */ | ||
| 152 | static int h3600_uart_set_wake(struct uart_port *port, u_int enable) | ||
| 153 | { | 60 | { |
| 154 | int err = -EINVAL; | 61 | h3xxx_map_io(); |
| 155 | 62 | ||
| 156 | if (port->mapbase == _Ser3UTCR0) { | 63 | sa1100fb_lcd_power = h3600_lcd_power; |
| 157 | if (enable) | ||
| 158 | PWER |= PWER_GPIO23 | PWER_GPIO25; /* DCD and CTS */ | ||
| 159 | else | ||
| 160 | PWER &= ~(PWER_GPIO23 | PWER_GPIO25); /* DCD and CTS */ | ||
| 161 | err = 0; | ||
| 162 | } | ||
| 163 | return err; | ||
| 164 | } | 64 | } |
| 165 | 65 | ||
| 166 | static struct sa1100_port_fns h3600_port_fns __initdata = { | ||
| 167 | .set_mctrl = h3600_uart_set_mctrl, | ||
| 168 | .get_mctrl = h3600_uart_get_mctrl, | ||
| 169 | .pm = h3600_uart_pm, | ||
| 170 | .set_wake = h3600_uart_set_wake, | ||
| 171 | }; | ||
| 172 | |||
| 173 | /* | 66 | /* |
| 174 | * helper for sa1100fb | 67 | * This turns the IRDA power on or off on the Compaq H3600 |
| 175 | */ | 68 | */ |
| 176 | static void h3xxx_lcd_power(int enable) | 69 | static int h3600_irda_set_power(struct device *dev, unsigned int state) |
| 177 | { | 70 | { |
| 178 | assign_h3600_egpio(IPAQ_EGPIO_LCD_POWER, enable); | 71 | gpio_set_value(H3600_EGPIO_IR_ON, state); |
| 72 | return 0; | ||
| 179 | } | 73 | } |
| 180 | 74 | ||
| 181 | static struct map_desc h3600_io_desc[] __initdata = { | 75 | static void h3600_irda_set_speed(struct device *dev, unsigned int speed) |
| 182 | { /* static memory bank 2 CS#2 */ | ||
| 183 | .virtual = H3600_BANK_2_VIRT, | ||
| 184 | .pfn = __phys_to_pfn(SA1100_CS2_PHYS), | ||
| 185 | .length = 0x02800000, | ||
| 186 | .type = MT_DEVICE | ||
| 187 | }, { /* static memory bank 4 CS#4 */ | ||
| 188 | .virtual = H3600_BANK_4_VIRT, | ||
| 189 | .pfn = __phys_to_pfn(SA1100_CS4_PHYS), | ||
| 190 | .length = 0x00800000, | ||
| 191 | .type = MT_DEVICE | ||
| 192 | }, { /* EGPIO 0 CS#5 */ | ||
| 193 | .virtual = H3600_EGPIO_VIRT, | ||
| 194 | .pfn = __phys_to_pfn(H3600_EGPIO_PHYS), | ||
| 195 | .length = 0x01000000, | ||
| 196 | .type = MT_DEVICE | ||
| 197 | } | ||
| 198 | }; | ||
| 199 | |||
| 200 | /* | ||
| 201 | * Common map_io initialization | ||
| 202 | */ | ||
| 203 | |||
| 204 | static void __init h3xxx_map_io(void) | ||
| 205 | { | 76 | { |
| 206 | sa1100_map_io(); | 77 | gpio_set_value(H3600_EGPIO_IR_FSEL, !(speed < 4000000)); |
| 207 | iotable_init(h3600_io_desc, ARRAY_SIZE(h3600_io_desc)); | ||
| 208 | |||
| 209 | sa1100_register_uart_fns(&h3600_port_fns); | ||
| 210 | sa1100_register_uart(0, 3); /* Common serial port */ | ||
| 211 | // sa1100_register_uart(1, 1); /* Microcontroller on 3100/3600 */ | ||
| 212 | |||
| 213 | /* Ensure those pins are outputs and driving low */ | ||
| 214 | PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM; | ||
| 215 | PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM); | ||
| 216 | |||
| 217 | /* Configure suspend conditions */ | ||
| 218 | PGSR = 0; | ||
| 219 | PWER = PWER_GPIO0 | PWER_RTC; | ||
| 220 | PCFR = PCFR_OPDE; | ||
| 221 | PSDR = 0; | ||
| 222 | |||
| 223 | sa1100fb_lcd_power = h3xxx_lcd_power; | ||
| 224 | } | 78 | } |
| 225 | 79 | ||
| 226 | /************************* H3100 *************************/ | 80 | static int h3600_irda_startup(struct device *dev) |
| 227 | |||
| 228 | #ifdef CONFIG_SA1100_H3100 | ||
| 229 | |||
| 230 | #define H3100_EGPIO (*(volatile unsigned int *)H3600_EGPIO_VIRT) | ||
| 231 | static unsigned int h3100_egpio = 0; | ||
| 232 | |||
| 233 | static void h3100_control_egpio(enum ipaq_egpio_type x, int setp) | ||
| 234 | { | 81 | { |
| 235 | unsigned int egpio = 0; | 82 | int err = gpio_request(H3600_EGPIO_IR_ON, "IrDA power"); |
| 236 | long gpio = 0; | 83 | if (err) |
| 237 | unsigned long flags; | 84 | goto err1; |
| 238 | 85 | err = gpio_direction_output(H3600_EGPIO_IR_ON, 0); | |
| 239 | switch (x) { | 86 | if (err) |
| 240 | case IPAQ_EGPIO_LCD_POWER: | 87 | goto err2; |
| 241 | egpio |= EGPIO_H3600_LCD_ON; | 88 | err = gpio_request(H3600_EGPIO_IR_FSEL, "IrDA fsel"); |
| 242 | gpio |= GPIO_H3100_LCD_3V_ON; | 89 | if (err) |
| 243 | break; | 90 | goto err2; |
| 244 | case IPAQ_EGPIO_LCD_ENABLE: | 91 | err = gpio_direction_output(H3600_EGPIO_IR_FSEL, 0); |
| 245 | break; | 92 | if (err) |
| 246 | case IPAQ_EGPIO_CODEC_NRESET: | 93 | goto err3; |
| 247 | egpio |= EGPIO_H3600_CODEC_NRESET; | 94 | return 0; |
| 248 | break; | ||
| 249 | case IPAQ_EGPIO_AUDIO_ON: | ||
| 250 | gpio |= GPIO_H3100_AUD_PWR_ON | ||
| 251 | | GPIO_H3100_AUD_ON; | ||
| 252 | break; | ||
| 253 | case IPAQ_EGPIO_QMUTE: | ||
| 254 | gpio |= GPIO_H3100_QMUTE; | ||
| 255 | break; | ||
| 256 | case IPAQ_EGPIO_OPT_NVRAM_ON: | ||
| 257 | egpio |= EGPIO_H3600_OPT_NVRAM_ON; | ||
| 258 | break; | ||
| 259 | case IPAQ_EGPIO_OPT_ON: | ||
| 260 | egpio |= EGPIO_H3600_OPT_ON; | ||
| 261 | break; | ||
| 262 | case IPAQ_EGPIO_CARD_RESET: | ||
| 263 | egpio |= EGPIO_H3600_CARD_RESET; | ||
| 264 | break; | ||
| 265 | case IPAQ_EGPIO_OPT_RESET: | ||
| 266 | egpio |= EGPIO_H3600_OPT_RESET; | ||
| 267 | break; | ||
| 268 | case IPAQ_EGPIO_IR_ON: | ||
| 269 | gpio |= GPIO_H3100_IR_ON; | ||
| 270 | break; | ||
| 271 | case IPAQ_EGPIO_IR_FSEL: | ||
| 272 | gpio |= GPIO_H3100_IR_FSEL; | ||
| 273 | break; | ||
| 274 | case IPAQ_EGPIO_RS232_ON: | ||
| 275 | egpio |= EGPIO_H3600_RS232_ON; | ||
| 276 | break; | ||
| 277 | case IPAQ_EGPIO_VPP_ON: | ||
| 278 | egpio |= EGPIO_H3600_VPP_ON; | ||
| 279 | break; | ||
| 280 | } | ||
| 281 | 95 | ||
| 282 | if (egpio || gpio) { | 96 | err3: gpio_free(H3600_EGPIO_IR_FSEL); |
| 283 | local_irq_save(flags); | 97 | err2: gpio_free(H3600_EGPIO_IR_ON); |
| 284 | if (setp) { | 98 | err1: return err; |
| 285 | h3100_egpio |= egpio; | ||
| 286 | GPSR = gpio; | ||
| 287 | } else { | ||
| 288 | h3100_egpio &= ~egpio; | ||
| 289 | GPCR = gpio; | ||
| 290 | } | ||
| 291 | H3100_EGPIO = h3100_egpio; | ||
| 292 | local_irq_restore(flags); | ||
| 293 | } | ||
| 294 | } | 99 | } |
| 295 | 100 | ||
| 296 | #define H3100_DIRECT_EGPIO (GPIO_H3100_BT_ON \ | 101 | static void h3600_irda_shutdown(struct device *dev) |
| 297 | | GPIO_H3100_GPIO3 \ | ||
| 298 | | GPIO_H3100_QMUTE \ | ||
| 299 | | GPIO_H3100_LCD_3V_ON \ | ||
| 300 | | GPIO_H3100_AUD_ON \ | ||
| 301 | | GPIO_H3100_AUD_PWR_ON \ | ||
| 302 | | GPIO_H3100_IR_ON \ | ||
| 303 | | GPIO_H3100_IR_FSEL) | ||
| 304 | |||
| 305 | static void __init h3100_map_io(void) | ||
| 306 | { | 102 | { |
| 307 | h3xxx_map_io(); | 103 | gpio_free(H3600_EGPIO_IR_ON); |
| 308 | 104 | gpio_free(H3600_EGPIO_IR_FSEL); | |
| 309 | /* Initialize h3100-specific values here */ | ||
| 310 | GPCR = 0x0fffffff; /* All outputs are set low by default */ | ||
| 311 | GPDR = GPIO_H3600_COM_RTS | GPIO_H3600_L3_CLOCK | | ||
| 312 | GPIO_H3600_L3_MODE | GPIO_H3600_L3_DATA | | ||
| 313 | GPIO_H3600_CLK_SET1 | GPIO_H3600_CLK_SET0 | | ||
| 314 | H3100_DIRECT_EGPIO; | ||
| 315 | |||
| 316 | /* Older bootldrs put GPIO2-9 in alternate mode on the | ||
| 317 | assumption that they are used for video */ | ||
| 318 | GAFR &= ~H3100_DIRECT_EGPIO; | ||
| 319 | |||
| 320 | H3100_EGPIO = h3100_egpio; | ||
| 321 | assign_h3600_egpio = h3100_control_egpio; | ||
| 322 | } | 105 | } |
| 323 | 106 | ||
| 324 | MACHINE_START(H3100, "Compaq iPAQ H3100") | 107 | static struct irda_platform_data h3600_irda_data = { |
| 325 | .phys_io = 0x80000000, | 108 | .set_power = h3600_irda_set_power, |
| 326 | .io_pg_offst = ((0xf8000000) >> 18) & 0xfffc, | 109 | .set_speed = h3600_irda_set_speed, |
| 327 | .boot_params = 0xc0000100, | 110 | .startup = h3600_irda_startup, |
| 328 | .map_io = h3100_map_io, | 111 | .shutdown = h3600_irda_shutdown, |
| 329 | .init_irq = sa1100_init_irq, | 112 | }; |
| 330 | .timer = &sa1100_timer, | ||
| 331 | .init_machine = h3xxx_mach_init, | ||
| 332 | MACHINE_END | ||
| 333 | |||
| 334 | #endif /* CONFIG_SA1100_H3100 */ | ||
| 335 | |||
| 336 | /************************* H3600 *************************/ | ||
| 337 | |||
| 338 | #ifdef CONFIG_SA1100_H3600 | ||
| 339 | |||
| 340 | #define H3600_EGPIO (*(volatile unsigned int *)H3600_EGPIO_VIRT) | ||
| 341 | static unsigned int h3600_egpio = EGPIO_H3600_RS232_ON; | ||
| 342 | |||
| 343 | static void h3600_control_egpio(enum ipaq_egpio_type x, int setp) | ||
| 344 | { | ||
| 345 | unsigned int egpio = 0; | ||
| 346 | unsigned long flags; | ||
| 347 | |||
| 348 | switch (x) { | ||
| 349 | case IPAQ_EGPIO_LCD_POWER: | ||
| 350 | egpio |= EGPIO_H3600_LCD_ON | | ||
| 351 | EGPIO_H3600_LCD_PCI | | ||
| 352 | EGPIO_H3600_LCD_5V_ON | | ||
| 353 | EGPIO_H3600_LVDD_ON; | ||
| 354 | break; | ||
| 355 | case IPAQ_EGPIO_LCD_ENABLE: | ||
| 356 | break; | ||
| 357 | case IPAQ_EGPIO_CODEC_NRESET: | ||
| 358 | egpio |= EGPIO_H3600_CODEC_NRESET; | ||
| 359 | break; | ||
| 360 | case IPAQ_EGPIO_AUDIO_ON: | ||
| 361 | egpio |= EGPIO_H3600_AUD_AMP_ON | | ||
| 362 | EGPIO_H3600_AUD_PWR_ON; | ||
| 363 | break; | ||
| 364 | case IPAQ_EGPIO_QMUTE: | ||
| 365 | egpio |= EGPIO_H3600_QMUTE; | ||
| 366 | break; | ||
| 367 | case IPAQ_EGPIO_OPT_NVRAM_ON: | ||
| 368 | egpio |= EGPIO_H3600_OPT_NVRAM_ON; | ||
| 369 | break; | ||
| 370 | case IPAQ_EGPIO_OPT_ON: | ||
| 371 | egpio |= EGPIO_H3600_OPT_ON; | ||
| 372 | break; | ||
| 373 | case IPAQ_EGPIO_CARD_RESET: | ||
| 374 | egpio |= EGPIO_H3600_CARD_RESET; | ||
| 375 | break; | ||
| 376 | case IPAQ_EGPIO_OPT_RESET: | ||
| 377 | egpio |= EGPIO_H3600_OPT_RESET; | ||
| 378 | break; | ||
| 379 | case IPAQ_EGPIO_IR_ON: | ||
| 380 | egpio |= EGPIO_H3600_IR_ON; | ||
| 381 | break; | ||
| 382 | case IPAQ_EGPIO_IR_FSEL: | ||
| 383 | egpio |= EGPIO_H3600_IR_FSEL; | ||
| 384 | break; | ||
| 385 | case IPAQ_EGPIO_RS232_ON: | ||
| 386 | egpio |= EGPIO_H3600_RS232_ON; | ||
| 387 | break; | ||
| 388 | case IPAQ_EGPIO_VPP_ON: | ||
| 389 | egpio |= EGPIO_H3600_VPP_ON; | ||
| 390 | break; | ||
| 391 | } | ||
| 392 | 113 | ||
| 393 | if (egpio) { | 114 | static struct gpio_default_state h3600_default_gpio[] = { |
| 394 | local_irq_save(flags); | 115 | { H3XXX_GPIO_COM_DCD, GPIO_MODE_IN, "COM DCD" }, |
| 395 | if (setp) | 116 | { H3XXX_GPIO_COM_CTS, GPIO_MODE_IN, "COM CTS" }, |
| 396 | h3600_egpio |= egpio; | 117 | { H3XXX_GPIO_COM_RTS, GPIO_MODE_OUT0, "COM RTS" }, |
| 397 | else | 118 | }; |
| 398 | h3600_egpio &= ~egpio; | ||
| 399 | H3600_EGPIO = h3600_egpio; | ||
| 400 | local_irq_restore(flags); | ||
| 401 | } | ||
| 402 | } | ||
| 403 | 119 | ||
| 404 | static void __init h3600_map_io(void) | 120 | static void __init h3600_mach_init(void) |
| 405 | { | 121 | { |
| 406 | h3xxx_map_io(); | 122 | h3xxx_init_gpio(h3600_default_gpio, ARRAY_SIZE(h3600_default_gpio)); |
| 407 | 123 | h3xxx_mach_init(); | |
| 408 | /* Initialize h3600-specific values here */ | 124 | sa11x0_register_irda(&h3600_irda_data); |
| 409 | |||
| 410 | GPCR = 0x0fffffff; /* All outputs are set low by default */ | ||
| 411 | GPDR = GPIO_H3600_COM_RTS | GPIO_H3600_L3_CLOCK | | ||
| 412 | GPIO_H3600_L3_MODE | GPIO_H3600_L3_DATA | | ||
| 413 | GPIO_H3600_CLK_SET1 | GPIO_H3600_CLK_SET0 | | ||
| 414 | GPIO_LDD15 | GPIO_LDD14 | GPIO_LDD13 | GPIO_LDD12 | | ||
| 415 | GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9 | GPIO_LDD8; | ||
| 416 | |||
| 417 | H3600_EGPIO = h3600_egpio; /* Maintains across sleep? */ | ||
| 418 | assign_h3600_egpio = h3600_control_egpio; | ||
| 419 | } | 125 | } |
| 420 | 126 | ||
| 421 | MACHINE_START(H3600, "Compaq iPAQ H3600") | 127 | MACHINE_START(H3600, "Compaq iPAQ H3600") |
| @@ -425,8 +131,6 @@ MACHINE_START(H3600, "Compaq iPAQ H3600") | |||
| 425 | .map_io = h3600_map_io, | 131 | .map_io = h3600_map_io, |
| 426 | .init_irq = sa1100_init_irq, | 132 | .init_irq = sa1100_init_irq, |
| 427 | .timer = &sa1100_timer, | 133 | .timer = &sa1100_timer, |
| 428 | .init_machine = h3xxx_mach_init, | 134 | .init_machine = h3600_mach_init, |
| 429 | MACHINE_END | 135 | MACHINE_END |
| 430 | 136 | ||
| 431 | #endif /* CONFIG_SA1100_H3600 */ | ||
| 432 | |||
diff --git a/arch/arm/mach-sa1100/h3xxx.c b/arch/arm/mach-sa1100/h3xxx.c new file mode 100644 index 00000000000..b0784c974c2 --- /dev/null +++ b/arch/arm/mach-sa1100/h3xxx.c | |||
| @@ -0,0 +1,313 @@ | |||
| 1 | /* | ||
| 2 | * Support for Compaq iPAQ H3100 and H3600 handheld computers (common code) | ||
| 3 | * | ||
| 4 | * Copyright (c) 2000,1 Compaq Computer Corporation. (Author: Jamey Hicks) | ||
| 5 | * Copyright (c) 2009 Dmitry Artamonow <mad_soft@inbox.ru> | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | * | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/kernel.h> | ||
| 14 | #include <linux/gpio.h> | ||
| 15 | #include <linux/gpio_keys.h> | ||
| 16 | #include <linux/input.h> | ||
| 17 | #include <linux/mfd/htc-egpio.h> | ||
| 18 | #include <linux/mtd/mtd.h> | ||
| 19 | #include <linux/mtd/partitions.h> | ||
| 20 | #include <linux/platform_device.h> | ||
| 21 | #include <linux/serial_core.h> | ||
| 22 | |||
| 23 | #include <asm/mach/flash.h> | ||
| 24 | #include <asm/mach/map.h> | ||
| 25 | #include <asm/mach/serial_sa1100.h> | ||
| 26 | |||
| 27 | #include <mach/h3xxx.h> | ||
| 28 | |||
| 29 | #include "generic.h" | ||
| 30 | |||
| 31 | void h3xxx_init_gpio(struct gpio_default_state *s, size_t n) | ||
| 32 | { | ||
| 33 | while (n--) { | ||
| 34 | const char *name = s->name; | ||
| 35 | int err; | ||
| 36 | |||
| 37 | if (!name) | ||
| 38 | name = "[init]"; | ||
| 39 | err = gpio_request(s->gpio, name); | ||
| 40 | if (err) { | ||
| 41 | printk(KERN_ERR "gpio%u: unable to request: %d\n", | ||
| 42 | s->gpio, err); | ||
| 43 | continue; | ||
| 44 | } | ||
| 45 | if (s->mode >= 0) { | ||
| 46 | err = gpio_direction_output(s->gpio, s->mode); | ||
| 47 | } else { | ||
| 48 | err = gpio_direction_input(s->gpio); | ||
| 49 | } | ||
| 50 | if (err) { | ||
| 51 | printk(KERN_ERR "gpio%u: unable to set direction: %d\n", | ||
| 52 | s->gpio, err); | ||
| 53 | continue; | ||
| 54 | } | ||
| 55 | if (!s->name) | ||
| 56 | gpio_free(s->gpio); | ||
| 57 | s++; | ||
| 58 | } | ||
| 59 | } | ||
| 60 | |||
| 61 | |||
| 62 | /* | ||
| 63 | * H3xxx flash support | ||
| 64 | */ | ||
| 65 | static struct mtd_partition h3xxx_partitions[] = { | ||
| 66 | { | ||
| 67 | .name = "H3XXX boot firmware", | ||
| 68 | .size = 0x00040000, | ||
| 69 | .offset = 0, | ||
| 70 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | ||
| 71 | }, { | ||
| 72 | .name = "H3XXX rootfs", | ||
| 73 | .size = MTDPART_SIZ_FULL, | ||
| 74 | .offset = 0x00040000, | ||
| 75 | } | ||
| 76 | }; | ||
| 77 | |||
| 78 | static void h3xxx_set_vpp(int vpp) | ||
| 79 | { | ||
| 80 | gpio_set_value(H3XXX_EGPIO_VPP_ON, vpp); | ||
| 81 | } | ||
| 82 | |||
| 83 | static int h3xxx_flash_init(void) | ||
| 84 | { | ||
| 85 | int err = gpio_request(H3XXX_EGPIO_VPP_ON, "Flash Vpp"); | ||
| 86 | if (err) { | ||
| 87 | pr_err("%s: can't request H3XXX_EGPIO_VPP_ON\n", __func__); | ||
| 88 | return err; | ||
| 89 | } | ||
| 90 | |||
| 91 | err = gpio_direction_output(H3XXX_EGPIO_VPP_ON, 0); | ||
| 92 | if (err) | ||
| 93 | gpio_free(H3XXX_EGPIO_VPP_ON); | ||
| 94 | |||
| 95 | return err; | ||
| 96 | } | ||
| 97 | |||
| 98 | static void h3xxx_flash_exit(void) | ||
| 99 | { | ||
| 100 | gpio_free(H3XXX_EGPIO_VPP_ON); | ||
| 101 | } | ||
| 102 | |||
| 103 | static struct flash_platform_data h3xxx_flash_data = { | ||
| 104 | .map_name = "cfi_probe", | ||
| 105 | .set_vpp = h3xxx_set_vpp, | ||
| 106 | .init = h3xxx_flash_init, | ||
| 107 | .exit = h3xxx_flash_exit, | ||
| 108 | .parts = h3xxx_partitions, | ||
| 109 | .nr_parts = ARRAY_SIZE(h3xxx_partitions), | ||
| 110 | }; | ||
| 111 | |||
| 112 | static struct resource h3xxx_flash_resource = { | ||
| 113 | .start = SA1100_CS0_PHYS, | ||
| 114 | .end = SA1100_CS0_PHYS + SZ_32M - 1, | ||
| 115 | .flags = IORESOURCE_MEM, | ||
| 116 | }; | ||
| 117 | |||
| 118 | |||
| 119 | /* | ||
| 120 | * H3xxx uart support | ||
| 121 | */ | ||
| 122 | static void h3xxx_uart_set_mctrl(struct uart_port *port, u_int mctrl) | ||
| 123 | { | ||
| 124 | if (port->mapbase == _Ser3UTCR0) { | ||
| 125 | gpio_set_value(H3XXX_GPIO_COM_RTS, !(mctrl & TIOCM_RTS)); | ||
| 126 | } | ||
| 127 | } | ||
| 128 | |||
| 129 | static u_int h3xxx_uart_get_mctrl(struct uart_port *port) | ||
| 130 | { | ||
| 131 | u_int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR; | ||
| 132 | |||
| 133 | if (port->mapbase == _Ser3UTCR0) { | ||
| 134 | /* | ||
| 135 | * DCD and CTS bits are inverted in GPLR by RS232 transceiver | ||
| 136 | */ | ||
| 137 | if (gpio_get_value(H3XXX_GPIO_COM_DCD)) | ||
| 138 | ret &= ~TIOCM_CD; | ||
| 139 | if (gpio_get_value(H3XXX_GPIO_COM_CTS)) | ||
| 140 | ret &= ~TIOCM_CTS; | ||
| 141 | } | ||
| 142 | |||
| 143 | return ret; | ||
| 144 | } | ||
| 145 | |||
| 146 | static void h3xxx_uart_pm(struct uart_port *port, u_int state, u_int oldstate) | ||
| 147 | { | ||
| 148 | if (port->mapbase == _Ser3UTCR0) { | ||
| 149 | if (!gpio_request(H3XXX_EGPIO_RS232_ON, "RS232 transceiver")) { | ||
| 150 | gpio_direction_output(H3XXX_EGPIO_RS232_ON, !state); | ||
| 151 | gpio_free(H3XXX_EGPIO_RS232_ON); | ||
| 152 | } else { | ||
| 153 | pr_err("%s: can't request H3XXX_EGPIO_RS232_ON\n", | ||
| 154 | __func__); | ||
| 155 | } | ||
| 156 | } | ||
| 157 | } | ||
| 158 | |||
| 159 | /* | ||
| 160 | * Enable/Disable wake up events for this serial port. | ||
| 161 | * Obviously, we only support this on the normal COM port. | ||
| 162 | */ | ||
| 163 | static int h3xxx_uart_set_wake(struct uart_port *port, u_int enable) | ||
| 164 | { | ||
| 165 | int err = -EINVAL; | ||
| 166 | |||
| 167 | if (port->mapbase == _Ser3UTCR0) { | ||
| 168 | if (enable) | ||
| 169 | PWER |= PWER_GPIO23 | PWER_GPIO25; /* DCD and CTS */ | ||
| 170 | else | ||
| 171 | PWER &= ~(PWER_GPIO23 | PWER_GPIO25); /* DCD and CTS */ | ||
| 172 | err = 0; | ||
| 173 | } | ||
| 174 | return err; | ||
| 175 | } | ||
| 176 | |||
| 177 | static struct sa1100_port_fns h3xxx_port_fns __initdata = { | ||
| 178 | .set_mctrl = h3xxx_uart_set_mctrl, | ||
| 179 | .get_mctrl = h3xxx_uart_get_mctrl, | ||
| 180 | .pm = h3xxx_uart_pm, | ||
| 181 | .set_wake = h3xxx_uart_set_wake, | ||
| 182 | }; | ||
| 183 | |||
| 184 | /* | ||
| 185 | * EGPIO | ||
| 186 | */ | ||
| 187 | |||
| 188 | static struct resource egpio_resources[] = { | ||
| 189 | [0] = { | ||
| 190 | .start = H3600_EGPIO_PHYS, | ||
| 191 | .end = H3600_EGPIO_PHYS + 0x4 - 1, | ||
| 192 | .flags = IORESOURCE_MEM, | ||
| 193 | }, | ||
| 194 | }; | ||
| 195 | |||
| 196 | static struct htc_egpio_chip egpio_chips[] = { | ||
| 197 | [0] = { | ||
| 198 | .reg_start = 0, | ||
| 199 | .gpio_base = H3XXX_EGPIO_BASE, | ||
| 200 | .num_gpios = 16, | ||
| 201 | .direction = HTC_EGPIO_OUTPUT, | ||
| 202 | .initial_values = 0x0080, /* H3XXX_EGPIO_RS232_ON */ | ||
| 203 | }, | ||
| 204 | }; | ||
| 205 | |||
| 206 | static struct htc_egpio_platform_data egpio_info = { | ||
| 207 | .reg_width = 16, | ||
| 208 | .bus_width = 16, | ||
| 209 | .chip = egpio_chips, | ||
| 210 | .num_chips = ARRAY_SIZE(egpio_chips), | ||
| 211 | }; | ||
| 212 | |||
| 213 | static struct platform_device h3xxx_egpio = { | ||
| 214 | .name = "htc-egpio", | ||
| 215 | .id = -1, | ||
| 216 | .resource = egpio_resources, | ||
| 217 | .num_resources = ARRAY_SIZE(egpio_resources), | ||
| 218 | .dev = { | ||
| 219 | .platform_data = &egpio_info, | ||
| 220 | }, | ||
| 221 | }; | ||
| 222 | |||
| 223 | /* | ||
| 224 | * GPIO keys | ||
| 225 | */ | ||
| 226 | |||
| 227 | static struct gpio_keys_button h3xxx_button_table[] = { | ||
| 228 | { | ||
| 229 | .code = KEY_POWER, | ||
| 230 | .gpio = H3XXX_GPIO_PWR_BUTTON, | ||
| 231 | .desc = "Power Button", | ||
| 232 | .active_low = 1, | ||
| 233 | .type = EV_KEY, | ||
| 234 | .wakeup = 1, | ||
| 235 | }, { | ||
| 236 | .code = KEY_ENTER, | ||
| 237 | .gpio = H3XXX_GPIO_ACTION_BUTTON, | ||
| 238 | .active_low = 1, | ||
| 239 | .desc = "Action button", | ||
| 240 | .type = EV_KEY, | ||
| 241 | .wakeup = 0, | ||
| 242 | }, | ||
| 243 | }; | ||
| 244 | |||
| 245 | static struct gpio_keys_platform_data h3xxx_keys_data = { | ||
| 246 | .buttons = h3xxx_button_table, | ||
| 247 | .nbuttons = ARRAY_SIZE(h3xxx_button_table), | ||
| 248 | }; | ||
| 249 | |||
| 250 | static struct platform_device h3xxx_keys = { | ||
| 251 | .name = "gpio-keys", | ||
| 252 | .id = -1, | ||
| 253 | .dev = { | ||
| 254 | .platform_data = &h3xxx_keys_data, | ||
| 255 | }, | ||
| 256 | }; | ||
| 257 | |||
| 258 | static struct platform_device *h3xxx_devices[] = { | ||
| 259 | &h3xxx_egpio, | ||
| 260 | &h3xxx_keys, | ||
| 261 | }; | ||
| 262 | |||
| 263 | void __init h3xxx_mach_init(void) | ||
| 264 | { | ||
| 265 | sa1100_register_uart_fns(&h3xxx_port_fns); | ||
| 266 | sa11x0_register_mtd(&h3xxx_flash_data, &h3xxx_flash_resource, 1); | ||
| 267 | platform_add_devices(h3xxx_devices, ARRAY_SIZE(h3xxx_devices)); | ||
| 268 | } | ||
| 269 | |||
| 270 | static struct map_desc h3600_io_desc[] __initdata = { | ||
| 271 | { /* static memory bank 2 CS#2 */ | ||
| 272 | .virtual = H3600_BANK_2_VIRT, | ||
| 273 | .pfn = __phys_to_pfn(SA1100_CS2_PHYS), | ||
| 274 | .length = 0x02800000, | ||
| 275 | .type = MT_DEVICE | ||
| 276 | }, { /* static memory bank 4 CS#4 */ | ||
| 277 | .virtual = H3600_BANK_4_VIRT, | ||
| 278 | .pfn = __phys_to_pfn(SA1100_CS4_PHYS), | ||
| 279 | .length = 0x00800000, | ||
| 280 | .type = MT_DEVICE | ||
| 281 | }, { /* EGPIO 0 CS#5 */ | ||
| 282 | .virtual = H3600_EGPIO_VIRT, | ||
| 283 | .pfn = __phys_to_pfn(H3600_EGPIO_PHYS), | ||
| 284 | .length = 0x01000000, | ||
| 285 | .type = MT_DEVICE | ||
| 286 | } | ||
| 287 | }; | ||
| 288 | |||
| 289 | /* | ||
| 290 | * Common map_io initialization | ||
| 291 | */ | ||
| 292 | |||
| 293 | void __init h3xxx_map_io(void) | ||
| 294 | { | ||
| 295 | sa1100_map_io(); | ||
| 296 | iotable_init(h3600_io_desc, ARRAY_SIZE(h3600_io_desc)); | ||
| 297 | |||
| 298 | sa1100_register_uart(0, 3); /* Common serial port */ | ||
| 299 | // sa1100_register_uart(1, 1); /* Microcontroller on 3100/3600 */ | ||
| 300 | |||
| 301 | /* Ensure those pins are outputs and driving low */ | ||
| 302 | PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM; | ||
| 303 | PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM); | ||
| 304 | |||
| 305 | /* Configure suspend conditions */ | ||
| 306 | PGSR = 0; | ||
| 307 | PCFR = PCFR_OPDE; | ||
| 308 | PSDR = 0; | ||
| 309 | |||
| 310 | GPCR = 0x0fffffff; /* All outputs are set low by default */ | ||
| 311 | GPDR = 0; /* Configure all GPIOs as input */ | ||
| 312 | } | ||
| 313 | |||
diff --git a/arch/arm/mach-sa1100/hackkit.c b/arch/arm/mach-sa1100/hackkit.c index e7056c0b562..51568dfc8e9 100644 --- a/arch/arm/mach-sa1100/hackkit.c +++ b/arch/arm/mach-sa1100/hackkit.c | |||
| @@ -187,7 +187,7 @@ static struct resource hackkit_flash_resource = { | |||
| 187 | 187 | ||
| 188 | static void __init hackkit_init(void) | 188 | static void __init hackkit_init(void) |
| 189 | { | 189 | { |
| 190 | sa11x0_set_flash_data(&hackkit_flash_data, &hackkit_flash_resource, 1); | 190 | sa11x0_register_mtd(&hackkit_flash_data, &hackkit_flash_resource, 1); |
| 191 | } | 191 | } |
| 192 | 192 | ||
| 193 | /********************************************************************** | 193 | /********************************************************************** |
diff --git a/arch/arm/mach-sa1100/include/mach/collie.h b/arch/arm/mach-sa1100/include/mach/collie.h index 9efb569cdb6..71a0b3fdcc8 100644 --- a/arch/arm/mach-sa1100/include/mach/collie.h +++ b/arch/arm/mach-sa1100/include/mach/collie.h | |||
| @@ -25,29 +25,39 @@ | |||
| 25 | #define COLLIE_GPIO_VPEN (COLLIE_SCOOP_GPIO_BASE + 7) | 25 | #define COLLIE_GPIO_VPEN (COLLIE_SCOOP_GPIO_BASE + 7) |
| 26 | #define COLLIE_SCP_LB_VOL_CHG SCOOP_GPCR_PA19 | 26 | #define COLLIE_SCP_LB_VOL_CHG SCOOP_GPCR_PA19 |
| 27 | 27 | ||
| 28 | #define COLLIE_SCOOP_IO_DIR ( COLLIE_SCP_MUTE_L | COLLIE_SCP_MUTE_R | \ | 28 | #define COLLIE_SCOOP_IO_DIR (COLLIE_SCP_MUTE_L | COLLIE_SCP_MUTE_R | \ |
| 29 | COLLIE_SCP_5VON | COLLIE_SCP_AMP_ON | \ | 29 | COLLIE_SCP_5VON | COLLIE_SCP_AMP_ON | \ |
| 30 | COLLIE_SCP_LB_VOL_CHG ) | 30 | COLLIE_SCP_LB_VOL_CHG) |
| 31 | #define COLLIE_SCOOP_IO_OUT ( COLLIE_SCP_MUTE_L | COLLIE_SCP_MUTE_R ) | 31 | #define COLLIE_SCOOP_IO_OUT (COLLIE_SCP_MUTE_L | COLLIE_SCP_MUTE_R) |
| 32 | 32 | ||
| 33 | /* GPIOs for which the generic definition doesn't say much */ | 33 | /* GPIOs for gpiolib */ |
| 34 | 34 | ||
| 35 | #define COLLIE_GPIO_ON_KEY GPIO_GPIO (0) | 35 | #define COLLIE_GPIO_ON_KEY (0) |
| 36 | #define COLLIE_GPIO_AC_IN GPIO_GPIO (1) | 36 | #define COLLIE_GPIO_AC_IN (1) |
| 37 | #define COLLIE_GPIO_SDIO_INT GPIO_GPIO (11) | 37 | #define COLLIE_GPIO_SDIO_INT (11) |
| 38 | #define COLLIE_GPIO_CF_IRQ GPIO_GPIO (14) | 38 | #define COLLIE_GPIO_CF_IRQ (14) |
| 39 | #define COLLIE_GPIO_nREMOCON_INT GPIO_GPIO (15) | 39 | #define COLLIE_GPIO_nREMOCON_INT (15) |
| 40 | #define COLLIE_GPIO_UCB1x00_RESET GPIO_GPIO (16) | 40 | #define COLLIE_GPIO_UCB1x00_RESET (16) |
| 41 | #define COLLIE_GPIO_nMIC_ON GPIO_GPIO (17) | 41 | #define COLLIE_GPIO_nMIC_ON (17) |
| 42 | #define COLLIE_GPIO_nREMOCON_ON GPIO_GPIO (18) | 42 | #define COLLIE_GPIO_nREMOCON_ON (18) |
| 43 | #define COLLIE_GPIO_CO GPIO_GPIO (20) | 43 | #define COLLIE_GPIO_CO (20) |
| 44 | #define COLLIE_GPIO_MCP_CLK GPIO_GPIO (21) | 44 | #define COLLIE_GPIO_MCP_CLK (21) |
| 45 | #define COLLIE_GPIO_CF_CD GPIO_GPIO (22) | 45 | #define COLLIE_GPIO_CF_CD (22) |
| 46 | #define COLLIE_GPIO_UCB1x00_IRQ GPIO_GPIO (23) | 46 | #define COLLIE_GPIO_UCB1x00_IRQ (23) |
| 47 | #define COLLIE_GPIO_WAKEUP GPIO_GPIO (24) | 47 | #define COLLIE_GPIO_WAKEUP (24) |
| 48 | #define COLLIE_GPIO_GA_INT GPIO_GPIO (25) | 48 | #define COLLIE_GPIO_GA_INT (25) |
| 49 | #define COLLIE_GPIO_MAIN_BAT_LOW GPIO_GPIO (26) | 49 | #define COLLIE_GPIO_MAIN_BAT_LOW (26) |
| 50 | 50 | ||
| 51 | /* GPIO definitions for direct register access */ | ||
| 52 | |||
| 53 | #define _COLLIE_GPIO_ON_KEY GPIO_GPIO(0) | ||
| 54 | #define _COLLIE_GPIO_AC_IN GPIO_GPIO(1) | ||
| 55 | #define _COLLIE_GPIO_nREMOCON_INT GPIO_GPIO(15) | ||
| 56 | #define _COLLIE_GPIO_UCB1x00_RESET GPIO_GPIO(16) | ||
| 57 | #define _COLLIE_GPIO_nMIC_ON GPIO_GPIO(17) | ||
| 58 | #define _COLLIE_GPIO_nREMOCON_ON GPIO_GPIO(18) | ||
| 59 | #define _COLLIE_GPIO_CO GPIO_GPIO(20) | ||
| 60 | #define _COLLIE_GPIO_WAKEUP GPIO_GPIO(24) | ||
| 51 | /* Interrupts */ | 61 | /* Interrupts */ |
| 52 | 62 | ||
| 53 | #define COLLIE_IRQ_GPIO_ON_KEY IRQ_GPIO0 | 63 | #define COLLIE_IRQ_GPIO_ON_KEY IRQ_GPIO0 |
| @@ -70,19 +80,20 @@ | |||
| 70 | #define COLLIE_LCM_IRQ_GPIO_nSD_WP IRQ_LOCOMO_GPIO14 | 80 | #define COLLIE_LCM_IRQ_GPIO_nSD_WP IRQ_LOCOMO_GPIO14 |
| 71 | 81 | ||
| 72 | /* GPIO's on the TC35143AF (Toshiba Analog Frontend) */ | 82 | /* GPIO's on the TC35143AF (Toshiba Analog Frontend) */ |
| 73 | #define COLLIE_TC35143_GPIO_VERSION0 UCB_IO_0 /* GPIO0=Version */ | 83 | #define COLLIE_TC35143_GPIO_BASE (GPIO_MAX + 13) |
| 74 | #define COLLIE_TC35143_GPIO_TBL_CHK UCB_IO_1 /* GPIO1=TBL_CHK */ | 84 | #define COLLIE_TC35143_GPIO_VERSION0 UCB_IO_0 |
| 75 | #define COLLIE_TC35143_GPIO_VPEN_ON UCB_IO_2 /* GPIO2=VPNE_ON */ | 85 | #define COLLIE_TC35143_GPIO_TBL_CHK UCB_IO_1 |
| 76 | #define COLLIE_TC35143_GPIO_IR_ON UCB_IO_3 /* GPIO3=IR_ON */ | 86 | #define COLLIE_TC35143_GPIO_VPEN_ON UCB_IO_2 |
| 77 | #define COLLIE_TC35143_GPIO_AMP_ON UCB_IO_4 /* GPIO4=AMP_ON */ | 87 | #define COLLIE_TC35143_GPIO_IR_ON UCB_IO_3 |
| 78 | #define COLLIE_TC35143_GPIO_VERSION1 UCB_IO_5 /* GPIO5=Version */ | 88 | #define COLLIE_TC35143_GPIO_AMP_ON UCB_IO_4 |
| 79 | #define COLLIE_TC35143_GPIO_FS8KLPF UCB_IO_5 /* GPIO5=fs 8k LPF */ | 89 | #define COLLIE_TC35143_GPIO_VERSION1 UCB_IO_5 |
| 80 | #define COLLIE_TC35143_GPIO_BUZZER_BIAS UCB_IO_6 /* GPIO6=BUZZER BIAS */ | 90 | #define COLLIE_TC35143_GPIO_FS8KLPF UCB_IO_5 |
| 81 | #define COLLIE_TC35143_GPIO_MBAT_ON UCB_IO_7 /* GPIO7=MBAT_ON */ | 91 | #define COLLIE_TC35143_GPIO_BUZZER_BIAS UCB_IO_6 |
| 82 | #define COLLIE_TC35143_GPIO_BBAT_ON UCB_IO_8 /* GPIO8=BBAT_ON */ | 92 | #define COLLIE_GPIO_MBAT_ON (COLLIE_TC35143_GPIO_BASE + 7) |
| 83 | #define COLLIE_TC35143_GPIO_TMP_ON UCB_IO_9 /* GPIO9=TMP_ON */ | 93 | #define COLLIE_GPIO_BBAT_ON (COLLIE_TC35143_GPIO_BASE + 8) |
| 84 | #define COLLIE_TC35143_GPIO_IN ( UCB_IO_0 | UCB_IO_2 | UCB_IO_5 ) | 94 | #define COLLIE_GPIO_TMP_ON (COLLIE_TC35143_GPIO_BASE + 9) |
| 85 | #define COLLIE_TC35143_GPIO_OUT ( UCB_IO_1 | UCB_IO_3 | UCB_IO_4 | UCB_IO_6 | \ | 95 | #define COLLIE_TC35143_GPIO_IN (UCB_IO_0 | UCB_IO_2 | UCB_IO_5) |
| 86 | UCB_IO_7 | UCB_IO_8 | UCB_IO_9 ) | 96 | #define COLLIE_TC35143_GPIO_OUT (UCB_IO_1 | UCB_IO_3 | UCB_IO_4 \ |
| 97 | | UCB_IO_6) | ||
| 87 | 98 | ||
| 88 | #endif | 99 | #endif |
diff --git a/arch/arm/mach-sa1100/include/mach/gpio.h b/arch/arm/mach-sa1100/include/mach/gpio.h index 582a0c92da5..7befc104e9a 100644 --- a/arch/arm/mach-sa1100/include/mach/gpio.h +++ b/arch/arm/mach-sa1100/include/mach/gpio.h | |||
| @@ -49,20 +49,9 @@ static inline void gpio_set_value(unsigned gpio, int value) | |||
| 49 | 49 | ||
| 50 | #define gpio_cansleep __gpio_cansleep | 50 | #define gpio_cansleep __gpio_cansleep |
| 51 | 51 | ||
| 52 | static inline unsigned gpio_to_irq(unsigned gpio) | 52 | #define gpio_to_irq(gpio) ((gpio < 11) ? (IRQ_GPIO0 + gpio) : \ |
| 53 | { | 53 | (IRQ_GPIO11 - 11 + gpio)) |
| 54 | if (gpio < 11) | 54 | #define irq_to_gpio(irq) ((irq < IRQ_GPIO11_27) ? (irq - IRQ_GPIO0) : \ |
| 55 | return IRQ_GPIO0 + gpio; | 55 | (irq - IRQ_GPIO11 + 11)) |
| 56 | else | ||
| 57 | return IRQ_GPIO11 - 11 + gpio; | ||
| 58 | } | ||
| 59 | |||
| 60 | static inline unsigned irq_to_gpio(unsigned irq) | ||
| 61 | { | ||
| 62 | if (irq < IRQ_GPIO11_27) | ||
| 63 | return irq - IRQ_GPIO0; | ||
| 64 | else | ||
| 65 | return irq - IRQ_GPIO11 + 11; | ||
| 66 | } | ||
| 67 | 56 | ||
| 68 | #endif | 57 | #endif |
diff --git a/arch/arm/mach-sa1100/include/mach/h3600.h b/arch/arm/mach-sa1100/include/mach/h3600.h deleted file mode 100644 index 2827faa4742..00000000000 --- a/arch/arm/mach-sa1100/include/mach/h3600.h +++ /dev/null | |||
| @@ -1,100 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * | ||
| 3 | * Definitions for H3600 Handheld Computer | ||
| 4 | * | ||
| 5 | * Copyright 2000 Compaq Computer Corporation. | ||
| 6 | * | ||
| 7 | * Use consistent with the GNU GPL is permitted, | ||
| 8 | * provided that this copyright notice is | ||
| 9 | * preserved in its entirety in all copies and derived works. | ||
| 10 | * | ||
| 11 | * COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED, | ||
| 12 | * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS | ||
| 13 | * FITNESS FOR ANY PARTICULAR PURPOSE. | ||
| 14 | * | ||
| 15 | * Author: Jamey Hicks. | ||
| 16 | * | ||
| 17 | * History: | ||
| 18 | * | ||
| 19 | * 2001-10-?? Andrew Christian Added support for iPAQ H3800 | ||
| 20 | * | ||
| 21 | */ | ||
| 22 | |||
| 23 | #ifndef _INCLUDE_H3600_H_ | ||
| 24 | #define _INCLUDE_H3600_H_ | ||
| 25 | |||
| 26 | typedef int __bitwise pm_request_t; | ||
| 27 | |||
| 28 | #define PM_SUSPEND ((__force pm_request_t) 1) /* enter D1-D3 */ | ||
| 29 | #define PM_RESUME ((__force pm_request_t) 2) /* enter D0 */ | ||
| 30 | |||
| 31 | /* generalized support for H3xxx series Compaq Pocket PC's */ | ||
| 32 | #define machine_is_h3xxx() (machine_is_h3100() || machine_is_h3600()) | ||
| 33 | |||
| 34 | /* Physical memory regions corresponding to chip selects */ | ||
| 35 | #define H3600_EGPIO_PHYS (SA1100_CS5_PHYS + 0x01000000) | ||
| 36 | #define H3600_BANK_2_PHYS SA1100_CS2_PHYS | ||
| 37 | #define H3600_BANK_4_PHYS SA1100_CS4_PHYS | ||
| 38 | |||
| 39 | /* Virtual memory regions corresponding to chip selects 2 & 4 (used on sleeves) */ | ||
| 40 | #define H3600_EGPIO_VIRT 0xf0000000 | ||
| 41 | #define H3600_BANK_2_VIRT 0xf1000000 | ||
| 42 | #define H3600_BANK_4_VIRT 0xf3800000 | ||
| 43 | |||
| 44 | /* | ||
| 45 | Machine-independent GPIO definitions | ||
| 46 | --- these are common across all current iPAQ platforms | ||
| 47 | */ | ||
| 48 | |||
| 49 | #define GPIO_H3600_NPOWER_BUTTON GPIO_GPIO (0) /* Also known as the "off button" */ | ||
| 50 | |||
| 51 | #define GPIO_H3600_PCMCIA_CD1 GPIO_GPIO (10) | ||
| 52 | #define GPIO_H3600_PCMCIA_IRQ1 GPIO_GPIO (11) | ||
| 53 | |||
| 54 | /* UDA1341 L3 Interface */ | ||
| 55 | #define GPIO_H3600_L3_DATA GPIO_GPIO (14) | ||
| 56 | #define GPIO_H3600_L3_MODE GPIO_GPIO (15) | ||
| 57 | #define GPIO_H3600_L3_CLOCK GPIO_GPIO (16) | ||
| 58 | |||
| 59 | #define GPIO_H3600_PCMCIA_CD0 GPIO_GPIO (17) | ||
| 60 | #define GPIO_H3600_SYS_CLK GPIO_GPIO (19) | ||
| 61 | #define GPIO_H3600_PCMCIA_IRQ0 GPIO_GPIO (21) | ||
| 62 | |||
| 63 | #define GPIO_H3600_COM_DCD GPIO_GPIO (23) | ||
| 64 | #define GPIO_H3600_OPT_IRQ GPIO_GPIO (24) | ||
| 65 | #define GPIO_H3600_COM_CTS GPIO_GPIO (25) | ||
| 66 | #define GPIO_H3600_COM_RTS GPIO_GPIO (26) | ||
| 67 | |||
| 68 | #define IRQ_GPIO_H3600_NPOWER_BUTTON IRQ_GPIO0 | ||
| 69 | #define IRQ_GPIO_H3600_PCMCIA_CD1 IRQ_GPIO10 | ||
| 70 | #define IRQ_GPIO_H3600_PCMCIA_IRQ1 IRQ_GPIO11 | ||
| 71 | #define IRQ_GPIO_H3600_PCMCIA_CD0 IRQ_GPIO17 | ||
| 72 | #define IRQ_GPIO_H3600_PCMCIA_IRQ0 IRQ_GPIO21 | ||
| 73 | #define IRQ_GPIO_H3600_COM_DCD IRQ_GPIO23 | ||
| 74 | #define IRQ_GPIO_H3600_OPT_IRQ IRQ_GPIO24 | ||
| 75 | #define IRQ_GPIO_H3600_COM_CTS IRQ_GPIO25 | ||
| 76 | |||
| 77 | |||
| 78 | #ifndef __ASSEMBLY__ | ||
| 79 | |||
| 80 | enum ipaq_egpio_type { | ||
| 81 | IPAQ_EGPIO_LCD_POWER, /* Power to the LCD panel */ | ||
| 82 | IPAQ_EGPIO_CODEC_NRESET, /* Clear to reset the audio codec (remember to return high) */ | ||
| 83 | IPAQ_EGPIO_AUDIO_ON, /* Audio power */ | ||
| 84 | IPAQ_EGPIO_QMUTE, /* Audio muting */ | ||
| 85 | IPAQ_EGPIO_OPT_NVRAM_ON, /* Non-volatile RAM on extension sleeves (SPI interface) */ | ||
| 86 | IPAQ_EGPIO_OPT_ON, /* Power to extension sleeves */ | ||
| 87 | IPAQ_EGPIO_CARD_RESET, /* Reset PCMCIA cards on extension sleeve (???) */ | ||
| 88 | IPAQ_EGPIO_OPT_RESET, /* Reset option pack (???) */ | ||
| 89 | IPAQ_EGPIO_IR_ON, /* IR sensor/emitter power */ | ||
| 90 | IPAQ_EGPIO_IR_FSEL, /* IR speed selection 1->fast, 0->slow */ | ||
| 91 | IPAQ_EGPIO_RS232_ON, /* Maxim RS232 chip power */ | ||
| 92 | IPAQ_EGPIO_VPP_ON, /* Turn on power to flash programming */ | ||
| 93 | IPAQ_EGPIO_LCD_ENABLE, /* Enable/disable LCD controller */ | ||
| 94 | }; | ||
| 95 | |||
| 96 | extern void (*assign_h3600_egpio)(enum ipaq_egpio_type x, int level); | ||
| 97 | |||
| 98 | #endif /* ASSEMBLY */ | ||
| 99 | |||
| 100 | #endif /* _INCLUDE_H3600_H_ */ | ||
diff --git a/arch/arm/mach-sa1100/include/mach/h3600_gpio.h b/arch/arm/mach-sa1100/include/mach/h3600_gpio.h deleted file mode 100644 index a36ca76d018..00000000000 --- a/arch/arm/mach-sa1100/include/mach/h3600_gpio.h +++ /dev/null | |||
| @@ -1,77 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * | ||
| 3 | * Definitions for H3600 Handheld Computer | ||
| 4 | * | ||
| 5 | * Copyright 2000 Compaq Computer Corporation. | ||
| 6 | * | ||
| 7 | * Use consistent with the GNU GPL is permitted, | ||
| 8 | * provided that this copyright notice is | ||
| 9 | * preserved in its entirety in all copies and derived works. | ||
| 10 | * | ||
| 11 | * COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED, | ||
| 12 | * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS | ||
| 13 | * FITNESS FOR ANY PARTICULAR PURPOSE. | ||
| 14 | * | ||
| 15 | * Author: Jamey Hicks. | ||
| 16 | * | ||
| 17 | * History: | ||
| 18 | * | ||
| 19 | * 2001-10-?? Andrew Christian Added support for iPAQ H3800 | ||
| 20 | * | ||
| 21 | */ | ||
| 22 | |||
| 23 | #ifndef _INCLUDE_H3600_GPIO_H_ | ||
| 24 | #define _INCLUDE_H3600_GPIO_H_ | ||
| 25 | |||
| 26 | /* | ||
| 27 | * GPIO lines that are common across ALL iPAQ models are in "h3600.h" | ||
| 28 | * This file contains machine-specific definitions | ||
| 29 | */ | ||
| 30 | |||
| 31 | #define GPIO_H3600_SUSPEND GPIO_GPIO (0) | ||
| 32 | /* GPIO[2:9] used by LCD on H3600/3800, used as GPIO on H3100 */ | ||
| 33 | #define GPIO_H3100_BT_ON GPIO_GPIO (2) | ||
| 34 | #define GPIO_H3100_GPIO3 GPIO_GPIO (3) | ||
| 35 | #define GPIO_H3100_QMUTE GPIO_GPIO (4) | ||
| 36 | #define GPIO_H3100_LCD_3V_ON GPIO_GPIO (5) | ||
| 37 | #define GPIO_H3100_AUD_ON GPIO_GPIO (6) | ||
| 38 | #define GPIO_H3100_AUD_PWR_ON GPIO_GPIO (7) | ||
| 39 | #define GPIO_H3100_IR_ON GPIO_GPIO (8) | ||
| 40 | #define GPIO_H3100_IR_FSEL GPIO_GPIO (9) | ||
| 41 | |||
| 42 | /* for H3600, audio sample rate clock generator */ | ||
| 43 | #define GPIO_H3600_CLK_SET0 GPIO_GPIO (12) | ||
| 44 | #define GPIO_H3600_CLK_SET1 GPIO_GPIO (13) | ||
| 45 | |||
| 46 | #define GPIO_H3600_ACTION_BUTTON GPIO_GPIO (18) | ||
| 47 | #define GPIO_H3600_SOFT_RESET GPIO_GPIO (20) /* Also known as BATT_FAULT */ | ||
| 48 | #define GPIO_H3600_OPT_LOCK GPIO_GPIO (22) | ||
| 49 | #define GPIO_H3600_OPT_DET GPIO_GPIO (27) | ||
| 50 | |||
| 51 | /****************************************************/ | ||
| 52 | |||
| 53 | #define IRQ_GPIO_H3600_ACTION_BUTTON IRQ_GPIO18 | ||
| 54 | #define IRQ_GPIO_H3600_OPT_DET IRQ_GPIO27 | ||
| 55 | |||
| 56 | /* H3100 / 3600 EGPIO pins */ | ||
| 57 | #define EGPIO_H3600_VPP_ON (1 << 0) | ||
| 58 | #define EGPIO_H3600_CARD_RESET (1 << 1) /* reset the attached pcmcia/compactflash card. active high. */ | ||
| 59 | #define EGPIO_H3600_OPT_RESET (1 << 2) /* reset the attached option pack. active high. */ | ||
| 60 | #define EGPIO_H3600_CODEC_NRESET (1 << 3) /* reset the onboard UDA1341. active low. */ | ||
| 61 | #define EGPIO_H3600_OPT_NVRAM_ON (1 << 4) /* apply power to optionpack nvram, active high. */ | ||
| 62 | #define EGPIO_H3600_OPT_ON (1 << 5) /* full power to option pack. active high. */ | ||
| 63 | #define EGPIO_H3600_LCD_ON (1 << 6) /* enable 3.3V to LCD. active high. */ | ||
| 64 | #define EGPIO_H3600_RS232_ON (1 << 7) /* UART3 transceiver force on. Active high. */ | ||
| 65 | |||
| 66 | /* H3600 only EGPIO pins */ | ||
| 67 | #define EGPIO_H3600_LCD_PCI (1 << 8) /* LCD control IC enable. active high. */ | ||
| 68 | #define EGPIO_H3600_IR_ON (1 << 9) /* apply power to IR module. active high. */ | ||
| 69 | #define EGPIO_H3600_AUD_AMP_ON (1 << 10) /* apply power to audio power amp. active high. */ | ||
| 70 | #define EGPIO_H3600_AUD_PWR_ON (1 << 11) /* apply power to reset of audio circuit. active high. */ | ||
| 71 | #define EGPIO_H3600_QMUTE (1 << 12) /* mute control for onboard UDA1341. active high. */ | ||
| 72 | #define EGPIO_H3600_IR_FSEL (1 << 13) /* IR speed select: 1->fast, 0->slow */ | ||
| 73 | #define EGPIO_H3600_LCD_5V_ON (1 << 14) /* enable 5V to LCD. active high. */ | ||
| 74 | #define EGPIO_H3600_LVDD_ON (1 << 15) /* enable 9V and -6.5V to LCD. */ | ||
| 75 | |||
| 76 | |||
| 77 | #endif /* _INCLUDE_H3600_GPIO_H_ */ | ||
diff --git a/arch/arm/mach-sa1100/include/mach/h3xxx.h b/arch/arm/mach-sa1100/include/mach/h3xxx.h new file mode 100644 index 00000000000..7d9df16f04a --- /dev/null +++ b/arch/arm/mach-sa1100/include/mach/h3xxx.h | |||
| @@ -0,0 +1,94 @@ | |||
| 1 | /* | ||
| 2 | * Definitions for Compaq iPAQ H3100 and H3600 handheld computers | ||
| 3 | * | ||
| 4 | * (c) 2000 Compaq Computer Corporation. (Author: Jamey Hicks) | ||
| 5 | * (c) 2009 Dmitry Artamonow <mad_soft@inbox.ru> | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | * | ||
| 11 | */ | ||
| 12 | |||
| 13 | #ifndef _INCLUDE_H3XXX_H_ | ||
| 14 | #define _INCLUDE_H3XXX_H_ | ||
| 15 | |||
| 16 | /* Physical memory regions corresponding to chip selects */ | ||
| 17 | #define H3600_EGPIO_PHYS (SA1100_CS5_PHYS + 0x01000000) | ||
| 18 | #define H3600_BANK_2_PHYS SA1100_CS2_PHYS | ||
| 19 | #define H3600_BANK_4_PHYS SA1100_CS4_PHYS | ||
| 20 | |||
| 21 | /* Virtual memory regions corresponding to chip selects 2 & 4 (used on sleeves) */ | ||
| 22 | #define H3600_EGPIO_VIRT 0xf0000000 | ||
| 23 | #define H3600_BANK_2_VIRT 0xf1000000 | ||
| 24 | #define H3600_BANK_4_VIRT 0xf3800000 | ||
| 25 | |||
| 26 | /* | ||
| 27 | * gpiolib numbers for all iPAQs | ||
| 28 | */ | ||
| 29 | #define H3XXX_GPIO_PWR_BUTTON 0 | ||
| 30 | #define H3XXX_GPIO_PCMCIA_CD1 10 | ||
| 31 | #define H3XXX_GPIO_PCMCIA_IRQ1 11 | ||
| 32 | #define H3XXX_GPIO_PCMCIA_CD0 17 | ||
| 33 | #define H3XXX_GPIO_ACTION_BUTTON 18 | ||
| 34 | #define H3XXX_GPIO_SYS_CLK 19 | ||
| 35 | #define H3XXX_GPIO_PCMCIA_IRQ0 21 | ||
| 36 | #define H3XXX_GPIO_COM_DCD 23 | ||
| 37 | #define H3XXX_GPIO_OPTION 24 | ||
| 38 | #define H3XXX_GPIO_COM_CTS 25 | ||
| 39 | #define H3XXX_GPIO_COM_RTS 26 | ||
| 40 | |||
| 41 | /* machine-specific gpios */ | ||
| 42 | |||
| 43 | #define H3100_GPIO_BT_ON 2 | ||
| 44 | #define H3100_GPIO_QMUTE 4 | ||
| 45 | #define H3100_GPIO_LCD_3V_ON 5 | ||
| 46 | #define H3100_GPIO_AUD_ON 6 | ||
| 47 | #define H3100_GPIO_AUD_PWR_ON 7 | ||
| 48 | #define H3100_GPIO_IR_ON 8 | ||
| 49 | #define H3100_GPIO_IR_FSEL 9 | ||
| 50 | |||
| 51 | #define H3600_GPIO_CLK_SET0 12 /* audio sample rate clock generator */ | ||
| 52 | #define H3600_GPIO_CLK_SET1 13 | ||
| 53 | #define H3600_GPIO_SOFT_RESET 20 /* also known as BATT_FAULT */ | ||
| 54 | #define H3600_GPIO_OPT_LOCK 22 | ||
| 55 | #define H3600_GPIO_OPT_DET 27 | ||
| 56 | |||
| 57 | |||
| 58 | /* H3100 / 3600 EGPIO pins */ | ||
| 59 | #define H3XXX_EGPIO_BASE (GPIO_MAX + 1) | ||
| 60 | |||
| 61 | #define H3XXX_EGPIO_VPP_ON (H3XXX_EGPIO_BASE + 0) | ||
| 62 | #define H3XXX_EGPIO_CARD_RESET (H3XXX_EGPIO_BASE + 1) /* reset the attached pcmcia/compactflash card. active high. */ | ||
| 63 | #define H3XXX_EGPIO_OPT_RESET (H3XXX_EGPIO_BASE + 2) /* reset the attached option pack. active high. */ | ||
| 64 | #define H3XXX_EGPIO_CODEC_NRESET (H3XXX_EGPIO_BASE + 3) /* reset the onboard UDA1341. active low. */ | ||
| 65 | #define H3XXX_EGPIO_OPT_NVRAM_ON (H3XXX_EGPIO_BASE + 4) /* apply power to optionpack nvram, active high. */ | ||
| 66 | #define H3XXX_EGPIO_OPT_ON (H3XXX_EGPIO_BASE + 5) /* full power to option pack. active high. */ | ||
| 67 | #define H3XXX_EGPIO_LCD_ON (H3XXX_EGPIO_BASE + 6) /* enable 3.3V to LCD. active high. */ | ||
| 68 | #define H3XXX_EGPIO_RS232_ON (H3XXX_EGPIO_BASE + 7) /* UART3 transceiver force on. Active high. */ | ||
| 69 | |||
| 70 | /* H3600 only EGPIO pins */ | ||
| 71 | #define H3600_EGPIO_LCD_PCI (H3XXX_EGPIO_BASE + 8) /* LCD control IC enable. active high. */ | ||
| 72 | #define H3600_EGPIO_IR_ON (H3XXX_EGPIO_BASE + 9) /* apply power to IR module. active high. */ | ||
| 73 | #define H3600_EGPIO_AUD_AMP_ON (H3XXX_EGPIO_BASE + 10) /* apply power to audio power amp. active high. */ | ||
| 74 | #define H3600_EGPIO_AUD_PWR_ON (H3XXX_EGPIO_BASE + 11) /* apply power to reset of audio circuit. active high. */ | ||
| 75 | #define H3600_EGPIO_QMUTE (H3XXX_EGPIO_BASE + 12) /* mute control for onboard UDA1341. active high. */ | ||
| 76 | #define H3600_EGPIO_IR_FSEL (H3XXX_EGPIO_BASE + 13) /* IR speed select: 1->fast, 0->slow */ | ||
| 77 | #define H3600_EGPIO_LCD_5V_ON (H3XXX_EGPIO_BASE + 14) /* enable 5V to LCD. active high. */ | ||
| 78 | #define H3600_EGPIO_LVDD_ON (H3XXX_EGPIO_BASE + 15) /* enable 9V and -6.5V to LCD. */ | ||
| 79 | |||
| 80 | struct gpio_default_state { | ||
| 81 | int gpio; | ||
| 82 | int mode; | ||
| 83 | const char *name; | ||
| 84 | }; | ||
| 85 | |||
| 86 | #define GPIO_MODE_IN -1 | ||
| 87 | #define GPIO_MODE_OUT0 0 | ||
| 88 | #define GPIO_MODE_OUT1 1 | ||
| 89 | |||
| 90 | void h3xxx_init_gpio(struct gpio_default_state *s, size_t n); | ||
| 91 | void __init h3xxx_map_io(void); | ||
| 92 | void __init h3xxx_mach_init(void); | ||
| 93 | |||
| 94 | #endif /* _INCLUDE_H3XXX_H_ */ | ||
diff --git a/arch/arm/mach-sa1100/include/mach/mcp.h b/arch/arm/mach-sa1100/include/mach/mcp.h index fb8b09a57ad..ed1a331508a 100644 --- a/arch/arm/mach-sa1100/include/mach/mcp.h +++ b/arch/arm/mach-sa1100/include/mach/mcp.h | |||
| @@ -16,6 +16,7 @@ struct mcp_plat_data { | |||
| 16 | u32 mccr0; | 16 | u32 mccr0; |
| 17 | u32 mccr1; | 17 | u32 mccr1; |
| 18 | unsigned int sclk_rate; | 18 | unsigned int sclk_rate; |
| 19 | int gpio_base; | ||
| 19 | }; | 20 | }; |
| 20 | 21 | ||
| 21 | #endif | 22 | #endif |
diff --git a/arch/arm/mach-sa1100/jornada720.c b/arch/arm/mach-sa1100/jornada720.c index fd776bb666c..13ebd2d99bf 100644 --- a/arch/arm/mach-sa1100/jornada720.c +++ b/arch/arm/mach-sa1100/jornada720.c | |||
| @@ -354,7 +354,7 @@ static struct resource jornada720_flash_resource = { | |||
| 354 | 354 | ||
| 355 | static void __init jornada720_mach_init(void) | 355 | static void __init jornada720_mach_init(void) |
| 356 | { | 356 | { |
| 357 | sa11x0_set_flash_data(&jornada720_flash_data, &jornada720_flash_resource, 1); | 357 | sa11x0_register_mtd(&jornada720_flash_data, &jornada720_flash_resource, 1); |
| 358 | } | 358 | } |
| 359 | 359 | ||
| 360 | MACHINE_START(JORNADA720, "HP Jornada 720") | 360 | MACHINE_START(JORNADA720, "HP Jornada 720") |
diff --git a/arch/arm/mach-sa1100/lart.c b/arch/arm/mach-sa1100/lart.c index 1f940df0e5a..68069d6dc07 100644 --- a/arch/arm/mach-sa1100/lart.c +++ b/arch/arm/mach-sa1100/lart.c | |||
| @@ -28,7 +28,7 @@ static struct mcp_plat_data lart_mcp_data = { | |||
| 28 | 28 | ||
| 29 | static void __init lart_init(void) | 29 | static void __init lart_init(void) |
| 30 | { | 30 | { |
| 31 | sa11x0_set_mcp_data(&lart_mcp_data); | 31 | sa11x0_register_mcp(&lart_mcp_data); |
| 32 | } | 32 | } |
| 33 | 33 | ||
| 34 | static struct map_desc lart_io_desc[] __initdata = { | 34 | static struct map_desc lart_io_desc[] __initdata = { |
diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c index e1458bc1868..1ccd6018d3a 100644 --- a/arch/arm/mach-sa1100/pleb.c +++ b/arch/arm/mach-sa1100/pleb.c | |||
| @@ -109,7 +109,7 @@ static struct flash_platform_data pleb_flash_data = { | |||
| 109 | 109 | ||
| 110 | static void __init pleb_init(void) | 110 | static void __init pleb_init(void) |
| 111 | { | 111 | { |
| 112 | sa11x0_set_flash_data(&pleb_flash_data, pleb_flash_resources, | 112 | sa11x0_register_mtd(&pleb_flash_data, pleb_flash_resources, |
| 113 | ARRAY_SIZE(pleb_flash_resources)); | 113 | ARRAY_SIZE(pleb_flash_resources)); |
| 114 | 114 | ||
| 115 | 115 | ||
diff --git a/arch/arm/mach-sa1100/shannon.c b/arch/arm/mach-sa1100/shannon.c index ddd917d1083..85e82bb73d7 100644 --- a/arch/arm/mach-sa1100/shannon.c +++ b/arch/arm/mach-sa1100/shannon.c | |||
| @@ -59,8 +59,8 @@ static struct mcp_plat_data shannon_mcp_data = { | |||
| 59 | 59 | ||
| 60 | static void __init shannon_init(void) | 60 | static void __init shannon_init(void) |
| 61 | { | 61 | { |
| 62 | sa11x0_set_flash_data(&shannon_flash_data, &shannon_flash_resource, 1); | 62 | sa11x0_register_mtd(&shannon_flash_data, &shannon_flash_resource, 1); |
| 63 | sa11x0_set_mcp_data(&shannon_mcp_data); | 63 | sa11x0_register_mcp(&shannon_mcp_data); |
| 64 | } | 64 | } |
| 65 | 65 | ||
| 66 | static void __init shannon_map_io(void) | 66 | static void __init shannon_map_io(void) |
diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c index 3c74534f7fe..49cfd64663a 100644 --- a/arch/arm/mach-sa1100/simpad.c +++ b/arch/arm/mach-sa1100/simpad.c | |||
| @@ -166,9 +166,9 @@ static void __init simpad_map_io(void) | |||
| 166 | PCFR = 0; | 166 | PCFR = 0; |
| 167 | PSDR = 0; | 167 | PSDR = 0; |
| 168 | 168 | ||
| 169 | sa11x0_set_flash_data(&simpad_flash_data, simpad_flash_resources, | 169 | sa11x0_register_mtd(&simpad_flash_data, simpad_flash_resources, |
| 170 | ARRAY_SIZE(simpad_flash_resources)); | 170 | ARRAY_SIZE(simpad_flash_resources)); |
| 171 | sa11x0_set_mcp_data(&simpad_mcp_data); | 171 | sa11x0_register_mcp(&simpad_mcp_data); |
| 172 | } | 172 | } |
| 173 | 173 | ||
| 174 | static void simpad_power_off(void) | 174 | static void simpad_power_off(void) |
diff --git a/arch/arm/mach-u300/Makefile b/arch/arm/mach-u300/Makefile index 885b5c027c1..fab46fe9a71 100644 --- a/arch/arm/mach-u300/Makefile +++ b/arch/arm/mach-u300/Makefile | |||
| @@ -12,3 +12,4 @@ obj-$(CONFIG_MMC) += mmc.o | |||
| 12 | obj-$(CONFIG_SPI_PL022) += spi.o | 12 | obj-$(CONFIG_SPI_PL022) += spi.o |
| 13 | obj-$(CONFIG_MACH_U300_SPIDUMMY) += dummyspichip.o | 13 | obj-$(CONFIG_MACH_U300_SPIDUMMY) += dummyspichip.o |
| 14 | obj-$(CONFIG_I2C_STU300) += i2c.o | 14 | obj-$(CONFIG_I2C_STU300) += i2c.o |
| 15 | obj-$(CONFIG_REGULATOR_AB3100) += regulator.o | ||
diff --git a/arch/arm/mach-u300/i2c.c b/arch/arm/mach-u300/i2c.c index 10be1f888b2..c73ed06b606 100644 --- a/arch/arm/mach-u300/i2c.c +++ b/arch/arm/mach-u300/i2c.c | |||
| @@ -9,13 +9,257 @@ | |||
| 9 | */ | 9 | */ |
| 10 | #include <linux/kernel.h> | 10 | #include <linux/kernel.h> |
| 11 | #include <linux/i2c.h> | 11 | #include <linux/i2c.h> |
| 12 | #include <linux/mfd/ab3100.h> | ||
| 13 | #include <linux/regulator/machine.h> | ||
| 14 | #include <linux/amba/bus.h> | ||
| 12 | #include <mach/irqs.h> | 15 | #include <mach/irqs.h> |
| 13 | 16 | ||
| 17 | /* | ||
| 18 | * Initial settings of ab3100 registers. | ||
| 19 | * Common for below LDO regulator settings are that | ||
| 20 | * bit 7-5 controls voltage. Bit 4 turns regulator ON(1) or OFF(0). | ||
| 21 | * Bit 3-2 controls sleep enable and bit 1-0 controls sleep mode. | ||
| 22 | */ | ||
| 23 | |||
| 24 | /* LDO_A 0x16: 2.75V, ON, SLEEP_A, SLEEP OFF GND */ | ||
| 25 | #define LDO_A_SETTING 0x16 | ||
| 26 | /* LDO_C 0x10: 2.65V, ON, SLEEP_A or B, SLEEP full power */ | ||
| 27 | #define LDO_C_SETTING 0x10 | ||
| 28 | /* LDO_D 0x10: 2.65V, ON, sleep mode not used */ | ||
| 29 | #define LDO_D_SETTING 0x10 | ||
| 30 | /* LDO_E 0x10: 1.8V, ON, SLEEP_A or B, SLEEP full power */ | ||
| 31 | #define LDO_E_SETTING 0x10 | ||
| 32 | /* LDO_E SLEEP 0x00: 1.8V, not used, SLEEP_A or B, not used */ | ||
| 33 | #define LDO_E_SLEEP_SETTING 0x00 | ||
| 34 | /* LDO_F 0xD0: 2.5V, ON, SLEEP_A or B, SLEEP full power */ | ||
| 35 | #define LDO_F_SETTING 0xD0 | ||
| 36 | /* LDO_G 0x00: 2.85V, OFF, SLEEP_A or B, SLEEP full power */ | ||
| 37 | #define LDO_G_SETTING 0x00 | ||
| 38 | /* LDO_H 0x18: 2.75V, ON, SLEEP_B, SLEEP full power */ | ||
| 39 | #define LDO_H_SETTING 0x18 | ||
| 40 | /* LDO_K 0x00: 2.75V, OFF, SLEEP_A or B, SLEEP full power */ | ||
| 41 | #define LDO_K_SETTING 0x00 | ||
| 42 | /* LDO_EXT 0x00: Voltage not set, OFF, not used, not used */ | ||
| 43 | #define LDO_EXT_SETTING 0x00 | ||
| 44 | /* BUCK 0x7D: 1.2V, ON, SLEEP_A and B, SLEEP low power */ | ||
| 45 | #define BUCK_SETTING 0x7D | ||
| 46 | /* BUCK SLEEP 0xAC: 1.05V, Not used, SLEEP_A and B, Not used */ | ||
| 47 | #define BUCK_SLEEP_SETTING 0xAC | ||
| 48 | |||
| 49 | static struct regulator_consumer_supply supply_ldo_c[] = { | ||
| 50 | { | ||
| 51 | .dev_name = "ab3100-codec", | ||
| 52 | .supply = "vaudio", /* Powers the codec */ | ||
| 53 | }, | ||
| 54 | }; | ||
| 55 | |||
| 56 | /* | ||
| 57 | * This one needs to be a supply so we can turn it off | ||
| 58 | * in order to shut down the system. | ||
| 59 | */ | ||
| 60 | static struct regulator_consumer_supply supply_ldo_d[] = { | ||
| 61 | { | ||
| 62 | .dev = NULL, | ||
| 63 | .supply = "vana15", /* Powers the SoC (CPU etc) */ | ||
| 64 | }, | ||
| 65 | }; | ||
| 66 | |||
| 67 | static struct regulator_consumer_supply supply_ldo_g[] = { | ||
| 68 | { | ||
| 69 | .dev_name = "mmci", | ||
| 70 | .supply = "vmmc", /* Powers MMC/SD card */ | ||
| 71 | }, | ||
| 72 | }; | ||
| 73 | |||
| 74 | static struct regulator_consumer_supply supply_ldo_h[] = { | ||
| 75 | { | ||
| 76 | .dev_name = "xgam_pdi", | ||
| 77 | .supply = "vdisp", /* Powers camera, display etc */ | ||
| 78 | }, | ||
| 79 | }; | ||
| 80 | |||
| 81 | static struct regulator_consumer_supply supply_ldo_k[] = { | ||
| 82 | { | ||
| 83 | .dev_name = "irda", | ||
| 84 | .supply = "vir", /* Power IrDA */ | ||
| 85 | }, | ||
| 86 | }; | ||
| 87 | |||
| 88 | /* | ||
| 89 | * This is a placeholder for whoever wish to use the | ||
| 90 | * external power. | ||
| 91 | */ | ||
| 92 | static struct regulator_consumer_supply supply_ldo_ext[] = { | ||
| 93 | { | ||
| 94 | .dev = NULL, | ||
| 95 | .supply = "vext", /* External power */ | ||
| 96 | }, | ||
| 97 | }; | ||
| 98 | |||
| 99 | /* Preset (hardware defined) voltages for these regulators */ | ||
| 100 | #define LDO_A_VOLTAGE 2750000 | ||
| 101 | #define LDO_C_VOLTAGE 2650000 | ||
| 102 | #define LDO_D_VOLTAGE 2650000 | ||
| 103 | |||
| 104 | static struct ab3100_platform_data ab3100_plf_data = { | ||
| 105 | .reg_constraints = { | ||
| 106 | /* LDO A routing and constraints */ | ||
| 107 | { | ||
| 108 | .constraints = { | ||
| 109 | .name = "vrad", | ||
| 110 | .min_uV = LDO_A_VOLTAGE, | ||
| 111 | .max_uV = LDO_A_VOLTAGE, | ||
| 112 | .valid_modes_mask = REGULATOR_MODE_NORMAL, | ||
| 113 | .always_on = 1, | ||
| 114 | .boot_on = 1, | ||
| 115 | }, | ||
| 116 | }, | ||
| 117 | /* LDO C routing and constraints */ | ||
| 118 | { | ||
| 119 | .constraints = { | ||
| 120 | .min_uV = LDO_C_VOLTAGE, | ||
| 121 | .max_uV = LDO_C_VOLTAGE, | ||
| 122 | .valid_modes_mask = REGULATOR_MODE_NORMAL, | ||
| 123 | }, | ||
| 124 | .num_consumer_supplies = ARRAY_SIZE(supply_ldo_c), | ||
| 125 | .consumer_supplies = supply_ldo_c, | ||
| 126 | }, | ||
| 127 | /* LDO D routing and constraints */ | ||
| 128 | { | ||
| 129 | .constraints = { | ||
| 130 | .min_uV = LDO_D_VOLTAGE, | ||
| 131 | .max_uV = LDO_D_VOLTAGE, | ||
| 132 | .valid_modes_mask = REGULATOR_MODE_NORMAL, | ||
| 133 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
| 134 | /* | ||
| 135 | * Actually this is boot_on but we need | ||
| 136 | * to reference count it externally to | ||
| 137 | * be able to shut down the system. | ||
| 138 | */ | ||
| 139 | }, | ||
| 140 | .num_consumer_supplies = ARRAY_SIZE(supply_ldo_d), | ||
| 141 | .consumer_supplies = supply_ldo_d, | ||
| 142 | }, | ||
| 143 | /* LDO E routing and constraints */ | ||
| 144 | { | ||
| 145 | .constraints = { | ||
| 146 | .name = "vio", | ||
| 147 | .min_uV = 1800000, | ||
| 148 | .max_uV = 1800000, | ||
| 149 | .valid_modes_mask = REGULATOR_MODE_NORMAL, | ||
| 150 | .valid_ops_mask = | ||
| 151 | REGULATOR_CHANGE_VOLTAGE | | ||
| 152 | REGULATOR_CHANGE_STATUS, | ||
| 153 | .always_on = 1, | ||
| 154 | .boot_on = 1, | ||
| 155 | }, | ||
| 156 | }, | ||
| 157 | /* LDO F routing and constraints */ | ||
| 158 | { | ||
| 159 | .constraints = { | ||
| 160 | .name = "vana25", | ||
| 161 | .min_uV = 2500000, | ||
| 162 | .max_uV = 2500000, | ||
| 163 | .valid_modes_mask = REGULATOR_MODE_NORMAL, | ||
| 164 | .valid_ops_mask = | ||
| 165 | REGULATOR_CHANGE_VOLTAGE | | ||
| 166 | REGULATOR_CHANGE_STATUS, | ||
| 167 | .always_on = 1, | ||
| 168 | .boot_on = 1, | ||
| 169 | }, | ||
| 170 | }, | ||
| 171 | /* LDO G routing and constraints */ | ||
| 172 | { | ||
| 173 | .constraints = { | ||
| 174 | .min_uV = 1500000, | ||
| 175 | .max_uV = 2850000, | ||
| 176 | .valid_modes_mask = REGULATOR_MODE_NORMAL, | ||
| 177 | .valid_ops_mask = | ||
| 178 | REGULATOR_CHANGE_VOLTAGE | | ||
| 179 | REGULATOR_CHANGE_STATUS, | ||
| 180 | }, | ||
| 181 | .num_consumer_supplies = ARRAY_SIZE(supply_ldo_g), | ||
| 182 | .consumer_supplies = supply_ldo_g, | ||
| 183 | }, | ||
| 184 | /* LDO H routing and constraints */ | ||
| 185 | { | ||
| 186 | .constraints = { | ||
| 187 | .min_uV = 1200000, | ||
| 188 | .max_uV = 2750000, | ||
| 189 | .valid_modes_mask = REGULATOR_MODE_NORMAL, | ||
| 190 | .valid_ops_mask = | ||
| 191 | REGULATOR_CHANGE_VOLTAGE | | ||
| 192 | REGULATOR_CHANGE_STATUS, | ||
| 193 | }, | ||
| 194 | .num_consumer_supplies = ARRAY_SIZE(supply_ldo_h), | ||
| 195 | .consumer_supplies = supply_ldo_h, | ||
| 196 | }, | ||
| 197 | /* LDO K routing and constraints */ | ||
| 198 | { | ||
| 199 | .constraints = { | ||
| 200 | .min_uV = 1800000, | ||
| 201 | .max_uV = 2750000, | ||
| 202 | .valid_modes_mask = REGULATOR_MODE_NORMAL, | ||
| 203 | .valid_ops_mask = | ||
| 204 | REGULATOR_CHANGE_VOLTAGE | | ||
| 205 | REGULATOR_CHANGE_STATUS, | ||
| 206 | }, | ||
| 207 | .num_consumer_supplies = ARRAY_SIZE(supply_ldo_k), | ||
| 208 | .consumer_supplies = supply_ldo_k, | ||
| 209 | }, | ||
| 210 | /* External regulator interface. No fixed voltage specified. | ||
| 211 | * If we knew the voltage of the external regulator and it | ||
| 212 | * was connected on the board, we could add the (fixed) | ||
| 213 | * voltage for it here. | ||
| 214 | */ | ||
| 215 | { | ||
| 216 | .constraints = { | ||
| 217 | .min_uV = 0, | ||
| 218 | .max_uV = 0, | ||
| 219 | .valid_modes_mask = REGULATOR_MODE_NORMAL, | ||
| 220 | .valid_ops_mask = | ||
| 221 | REGULATOR_CHANGE_STATUS, | ||
| 222 | }, | ||
| 223 | .num_consumer_supplies = ARRAY_SIZE(supply_ldo_ext), | ||
| 224 | .consumer_supplies = supply_ldo_ext, | ||
| 225 | }, | ||
| 226 | /* Buck converter routing and constraints */ | ||
| 227 | { | ||
| 228 | .constraints = { | ||
| 229 | .name = "vcore", | ||
| 230 | .min_uV = 1200000, | ||
| 231 | .max_uV = 1800000, | ||
| 232 | .valid_modes_mask = REGULATOR_MODE_NORMAL, | ||
| 233 | .valid_ops_mask = | ||
| 234 | REGULATOR_CHANGE_VOLTAGE | | ||
| 235 | REGULATOR_CHANGE_STATUS, | ||
| 236 | .always_on = 1, | ||
| 237 | .boot_on = 1, | ||
| 238 | }, | ||
| 239 | }, | ||
| 240 | }, | ||
| 241 | .reg_initvals = { | ||
| 242 | LDO_A_SETTING, | ||
| 243 | LDO_C_SETTING, | ||
| 244 | LDO_E_SETTING, | ||
| 245 | LDO_E_SLEEP_SETTING, | ||
| 246 | LDO_F_SETTING, | ||
| 247 | LDO_G_SETTING, | ||
| 248 | LDO_H_SETTING, | ||
| 249 | LDO_K_SETTING, | ||
| 250 | LDO_EXT_SETTING, | ||
| 251 | BUCK_SETTING, | ||
| 252 | BUCK_SLEEP_SETTING, | ||
| 253 | LDO_D_SETTING, | ||
| 254 | }, | ||
| 255 | }; | ||
| 256 | |||
| 14 | static struct i2c_board_info __initdata bus0_i2c_board_info[] = { | 257 | static struct i2c_board_info __initdata bus0_i2c_board_info[] = { |
| 15 | { | 258 | { |
| 16 | .type = "ab3100", | 259 | .type = "ab3100", |
| 17 | .addr = 0x48, | 260 | .addr = 0x48, |
| 18 | .irq = IRQ_U300_IRQ0_EXT, | 261 | .irq = IRQ_U300_IRQ0_EXT, |
| 262 | .platform_data = &ab3100_plf_data, | ||
| 19 | }, | 263 | }, |
| 20 | }; | 264 | }; |
| 21 | 265 | ||
| @@ -38,6 +282,11 @@ void __init u300_i2c_register_board_devices(void) | |||
| 38 | { | 282 | { |
| 39 | i2c_register_board_info(0, bus0_i2c_board_info, | 283 | i2c_register_board_info(0, bus0_i2c_board_info, |
| 40 | ARRAY_SIZE(bus0_i2c_board_info)); | 284 | ARRAY_SIZE(bus0_i2c_board_info)); |
| 285 | /* | ||
| 286 | * This makes the core shut down all unused regulators | ||
| 287 | * after all the initcalls have completed. | ||
| 288 | */ | ||
| 289 | regulator_has_full_constraints(); | ||
| 41 | i2c_register_board_info(1, bus1_i2c_board_info, | 290 | i2c_register_board_info(1, bus1_i2c_board_info, |
| 42 | ARRAY_SIZE(bus1_i2c_board_info)); | 291 | ARRAY_SIZE(bus1_i2c_board_info)); |
| 43 | } | 292 | } |
diff --git a/arch/arm/mach-u300/mmc.c b/arch/arm/mach-u300/mmc.c index 7b6b016786b..109f5a6e71c 100644 --- a/arch/arm/mach-u300/mmc.c +++ b/arch/arm/mach-u300/mmc.c | |||
| @@ -40,64 +40,6 @@ static unsigned int mmc_status(struct device *dev) | |||
| 40 | return mmci_card->mmc_inserted; | 40 | return mmci_card->mmc_inserted; |
| 41 | } | 41 | } |
| 42 | 42 | ||
| 43 | /* | ||
| 44 | * Here follows a large chunk of code which will only be enabled if you | ||
| 45 | * have both the AB3100 chip mounted and the MMC subsystem activated. | ||
| 46 | */ | ||
| 47 | |||
| 48 | static u32 mmc_translate_vdd(struct device *dev, unsigned int voltage) | ||
| 49 | { | ||
| 50 | int v; | ||
| 51 | |||
| 52 | /* | ||
| 53 | * MMC Spec: | ||
| 54 | * bit 7: 1.70 - 1.95V | ||
| 55 | * bit 8 - 14: 2.0 - 2.6V | ||
| 56 | * bit 15 - 23: 2.7 - 3.6V | ||
| 57 | * | ||
| 58 | * ab3100 voltages: | ||
| 59 | * 000 - 2.85V | ||
| 60 | * 001 - 2.75V | ||
| 61 | * 010 - 1.8V | ||
| 62 | * 011 - 1.5V | ||
| 63 | */ | ||
| 64 | switch (voltage) { | ||
| 65 | case 8: | ||
| 66 | v = 3; | ||
| 67 | break; | ||
| 68 | case 9: | ||
| 69 | case 10: | ||
| 70 | case 11: | ||
| 71 | case 12: | ||
| 72 | case 13: | ||
| 73 | case 14: | ||
| 74 | case 15: | ||
| 75 | v = 1; | ||
| 76 | break; | ||
| 77 | case 16: | ||
| 78 | v = 1; | ||
| 79 | break; | ||
| 80 | case 17: | ||
| 81 | case 18: | ||
| 82 | case 19: | ||
| 83 | case 20: | ||
| 84 | case 21: | ||
| 85 | case 22: | ||
| 86 | case 23: | ||
| 87 | case 24: | ||
| 88 | v = 0; | ||
| 89 | break; | ||
| 90 | default: | ||
| 91 | v = 0; | ||
| 92 | break; | ||
| 93 | } | ||
| 94 | |||
| 95 | /* PL180 voltage register bits */ | ||
| 96 | return v << 2; | ||
| 97 | } | ||
| 98 | |||
| 99 | |||
| 100 | |||
| 101 | static int mmci_callback(void *data) | 43 | static int mmci_callback(void *data) |
| 102 | { | 44 | { |
| 103 | struct mmci_card_event *mmci_card = data; | 45 | struct mmci_card_event *mmci_card = data; |
| @@ -154,9 +96,11 @@ int __devinit mmc_init(struct amba_device *adev) | |||
| 154 | if (!mmci_card) | 96 | if (!mmci_card) |
| 155 | return -ENOMEM; | 97 | return -ENOMEM; |
| 156 | 98 | ||
| 99 | /* | ||
| 100 | * Do not set ocr_mask or voltage translation function, | ||
| 101 | * we have a regulator we can control instead. | ||
| 102 | */ | ||
| 157 | /* Nominally 2.85V on our platform */ | 103 | /* Nominally 2.85V on our platform */ |
| 158 | mmci_card->mmc0_plat_data.ocr_mask = MMC_VDD_28_29; | ||
| 159 | mmci_card->mmc0_plat_data.translate_vdd = mmc_translate_vdd; | ||
| 160 | mmci_card->mmc0_plat_data.status = mmc_status; | 104 | mmci_card->mmc0_plat_data.status = mmc_status; |
| 161 | mmci_card->mmc0_plat_data.gpio_wp = -1; | 105 | mmci_card->mmc0_plat_data.gpio_wp = -1; |
| 162 | mmci_card->mmc0_plat_data.gpio_cd = -1; | 106 | mmci_card->mmc0_plat_data.gpio_cd = -1; |
diff --git a/arch/arm/mach-u300/regulator.c b/arch/arm/mach-u300/regulator.c new file mode 100644 index 00000000000..9c53f01c62e --- /dev/null +++ b/arch/arm/mach-u300/regulator.c | |||
| @@ -0,0 +1,88 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-u300/regulator.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009 ST-Ericsson AB | ||
| 5 | * License terms: GNU General Public License (GPL) version 2 | ||
| 6 | * Handle board-bound regulators and board power not related | ||
| 7 | * to any devices. | ||
| 8 | * Author: Linus Walleij <linus.walleij@stericsson.com> | ||
| 9 | */ | ||
| 10 | #include <linux/device.h> | ||
| 11 | #include <linux/signal.h> | ||
| 12 | #include <linux/err.h> | ||
| 13 | #include <linux/regulator/consumer.h> | ||
| 14 | /* Those are just for writing in syscon */ | ||
| 15 | #include <linux/io.h> | ||
| 16 | #include <mach/hardware.h> | ||
| 17 | #include <mach/syscon.h> | ||
| 18 | |||
| 19 | /* | ||
| 20 | * Regulators that power the board and chip and which are | ||
| 21 | * not copuled to specific drivers are hogged in these | ||
| 22 | * instances. | ||
| 23 | */ | ||
| 24 | static struct regulator *main_power_15; | ||
| 25 | |||
| 26 | /* | ||
| 27 | * This function is used from pm.h to shut down the system by | ||
| 28 | * resetting all regulators in turn and then disable regulator | ||
| 29 | * LDO D (main power). | ||
| 30 | */ | ||
| 31 | void u300_pm_poweroff(void) | ||
| 32 | { | ||
| 33 | sigset_t old, all; | ||
| 34 | |||
| 35 | sigfillset(&all); | ||
| 36 | if (!sigprocmask(SIG_BLOCK, &all, &old)) { | ||
| 37 | /* Disable LDO D to shut down the system */ | ||
| 38 | if (main_power_15) | ||
| 39 | regulator_disable(main_power_15); | ||
| 40 | else | ||
| 41 | pr_err("regulator not available to shut down system\n"); | ||
| 42 | (void) sigprocmask(SIG_SETMASK, &old, NULL); | ||
| 43 | } | ||
| 44 | return; | ||
| 45 | } | ||
| 46 | |||
| 47 | /* | ||
| 48 | * Hog the regulators needed to power up the board. | ||
| 49 | */ | ||
| 50 | static int __init u300_init_boardpower(void) | ||
| 51 | { | ||
| 52 | int err; | ||
| 53 | u32 val; | ||
| 54 | |||
| 55 | pr_info("U300: setting up board power\n"); | ||
| 56 | main_power_15 = regulator_get(NULL, "vana15"); | ||
| 57 | if (IS_ERR(main_power_15)) { | ||
| 58 | pr_err("could not get vana15"); | ||
| 59 | return PTR_ERR(main_power_15); | ||
| 60 | } | ||
| 61 | err = regulator_enable(main_power_15); | ||
| 62 | if (err) { | ||
| 63 | pr_err("could not enable vana15\n"); | ||
| 64 | return err; | ||
| 65 | } | ||
| 66 | |||
| 67 | /* | ||
| 68 | * On U300 a special system controller register pulls up the DC | ||
| 69 | * until the vana15 (LDO D) regulator comes up. At this point, all | ||
| 70 | * regulators are set and we do not need power control via | ||
| 71 | * DC ON anymore. This function will likely be moved whenever | ||
| 72 | * the rest of the U300 power management is implemented. | ||
| 73 | */ | ||
| 74 | pr_info("U300: disable system controller pull-up\n"); | ||
| 75 | val = readw(U300_SYSCON_VBASE + U300_SYSCON_PMCR); | ||
| 76 | val &= ~U300_SYSCON_PMCR_DCON_ENABLE; | ||
| 77 | writew(val, U300_SYSCON_VBASE + U300_SYSCON_PMCR); | ||
| 78 | |||
| 79 | /* Register globally exported PM poweroff hook */ | ||
| 80 | pm_power_off = u300_pm_poweroff; | ||
| 81 | |||
| 82 | return 0; | ||
| 83 | } | ||
| 84 | |||
| 85 | /* | ||
| 86 | * So at module init time we hog the regulator! | ||
| 87 | */ | ||
| 88 | module_init(u300_init_boardpower); | ||
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig new file mode 100644 index 00000000000..03625d74485 --- /dev/null +++ b/arch/arm/mach-ux500/Kconfig | |||
| @@ -0,0 +1,15 @@ | |||
| 1 | menu "ST-Ericsson platform type" | ||
| 2 | depends on ARCH_U8500 | ||
| 3 | |||
| 4 | comment "ST-Ericsson Multicore Mobile Platforms" | ||
| 5 | |||
| 6 | config MACH_U8500_MOP | ||
| 7 | bool "U8500 Early Development platform" | ||
| 8 | default y | ||
| 9 | select ARM_GIC | ||
| 10 | select HAS_MTU | ||
| 11 | help | ||
| 12 | Include support for mop500 development platform | ||
| 13 | based on U8500 architecture. The platform is based | ||
| 14 | on early drop silicon version of 8500. | ||
| 15 | endmenu | ||
diff --git a/arch/arm/mach-ux500/Makefile b/arch/arm/mach-ux500/Makefile new file mode 100644 index 00000000000..95e6e24c004 --- /dev/null +++ b/arch/arm/mach-ux500/Makefile | |||
| @@ -0,0 +1,8 @@ | |||
| 1 | # | ||
| 2 | # Makefile for the linux kernel, U8500 machine. | ||
| 3 | # | ||
| 4 | |||
| 5 | obj-y := clock.o | ||
| 6 | obj-$(CONFIG_ARCH_U8500) += cpu-u8500.o | ||
| 7 | obj-$(CONFIG_MACH_U8500_MOP) += board-mop500.o | ||
| 8 | obj-$(CONFIG_SMP) += platsmp.o headsmp.o localtimer.o | ||
diff --git a/arch/arm/mach-ux500/Makefile.boot b/arch/arm/mach-ux500/Makefile.boot new file mode 100644 index 00000000000..c7e75acfe6c --- /dev/null +++ b/arch/arm/mach-ux500/Makefile.boot | |||
| @@ -0,0 +1,4 @@ | |||
| 1 | zreladdr-y := 0x00008000 | ||
| 2 | params_phys-y := 0x00000100 | ||
| 3 | initrd_phys-y := 0x00800000 | ||
| 4 | |||
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c new file mode 100644 index 00000000000..aa5afbcc90f --- /dev/null +++ b/arch/arm/mach-ux500/board-mop500.c | |||
| @@ -0,0 +1,158 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2008-2009 ST-Ericsson | ||
| 3 | * | ||
| 4 | * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2, as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | * | ||
| 10 | */ | ||
| 11 | #include <linux/kernel.h> | ||
| 12 | #include <linux/init.h> | ||
| 13 | #include <linux/interrupt.h> | ||
| 14 | #include <linux/platform_device.h> | ||
| 15 | #include <linux/io.h> | ||
| 16 | #include <linux/amba/bus.h> | ||
| 17 | #include <linux/amba/pl022.h> | ||
| 18 | #include <linux/spi/spi.h> | ||
| 19 | |||
| 20 | #include <asm/localtimer.h> | ||
| 21 | #include <asm/mach-types.h> | ||
| 22 | #include <asm/mach/arch.h> | ||
| 23 | |||
| 24 | #include <plat/mtu.h> | ||
| 25 | |||
| 26 | #include <mach/hardware.h> | ||
| 27 | #include <mach/setup.h> | ||
| 28 | |||
| 29 | #define __MEM_4K_RESOURCE(x) \ | ||
| 30 | .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM} | ||
| 31 | |||
| 32 | /* These are active devices on this board */ | ||
| 33 | static struct amba_device uart0_device = { | ||
| 34 | .dev = { .init_name = "uart0" }, | ||
| 35 | __MEM_4K_RESOURCE(U8500_UART0_BASE), | ||
| 36 | .irq = {IRQ_UART0, NO_IRQ}, | ||
| 37 | }; | ||
| 38 | |||
| 39 | static struct amba_device uart1_device = { | ||
| 40 | .dev = { .init_name = "uart1" }, | ||
| 41 | __MEM_4K_RESOURCE(U8500_UART1_BASE), | ||
| 42 | .irq = {IRQ_UART1, NO_IRQ}, | ||
| 43 | }; | ||
| 44 | |||
| 45 | static struct amba_device uart2_device = { | ||
| 46 | .dev = { .init_name = "uart2" }, | ||
| 47 | __MEM_4K_RESOURCE(U8500_UART2_BASE), | ||
| 48 | .irq = {IRQ_UART2, NO_IRQ}, | ||
| 49 | }; | ||
| 50 | |||
| 51 | static void ab4500_spi_cs_control(u32 command) | ||
| 52 | { | ||
| 53 | /* set the FRM signal, which is CS - TODO */ | ||
| 54 | } | ||
| 55 | |||
| 56 | struct pl022_config_chip ab4500_chip_info = { | ||
| 57 | .lbm = LOOPBACK_DISABLED, | ||
| 58 | .com_mode = INTERRUPT_TRANSFER, | ||
| 59 | .iface = SSP_INTERFACE_MOTOROLA_SPI, | ||
| 60 | /* we can act as master only */ | ||
| 61 | .hierarchy = SSP_MASTER, | ||
| 62 | .slave_tx_disable = 0, | ||
| 63 | .endian_rx = SSP_RX_MSB, | ||
| 64 | .endian_tx = SSP_TX_MSB, | ||
| 65 | .data_size = SSP_DATA_BITS_24, | ||
| 66 | .rx_lev_trig = SSP_RX_1_OR_MORE_ELEM, | ||
| 67 | .tx_lev_trig = SSP_TX_1_OR_MORE_EMPTY_LOC, | ||
| 68 | .clk_phase = SSP_CLK_SECOND_EDGE, | ||
| 69 | .clk_pol = SSP_CLK_POL_IDLE_HIGH, | ||
| 70 | .cs_control = ab4500_spi_cs_control, | ||
| 71 | }; | ||
| 72 | |||
| 73 | static struct spi_board_info u8500_spi_devices[] = { | ||
| 74 | { | ||
| 75 | .modalias = "ab4500", | ||
| 76 | .controller_data = &ab4500_chip_info, | ||
| 77 | .max_speed_hz = 12000000, | ||
| 78 | .bus_num = 0, | ||
| 79 | .chip_select = 0, | ||
| 80 | .mode = SPI_MODE_0, | ||
| 81 | .irq = IRQ_AB4500, | ||
| 82 | }, | ||
| 83 | }; | ||
| 84 | |||
| 85 | static struct pl022_ssp_controller ssp0_platform_data = { | ||
| 86 | .bus_id = 0, | ||
| 87 | /* pl022 not yet supports dma */ | ||
| 88 | .enable_dma = 0, | ||
| 89 | /* on this platform, gpio 31,142,144,214 & | ||
| 90 | * 224 are connected as chip selects | ||
| 91 | */ | ||
| 92 | .num_chipselect = 5, | ||
| 93 | }; | ||
| 94 | |||
| 95 | static struct amba_device pl022_device = { | ||
| 96 | .dev = { | ||
| 97 | .coherent_dma_mask = ~0, | ||
| 98 | .init_name = "pl022", | ||
| 99 | .platform_data = &ssp0_platform_data, | ||
| 100 | }, | ||
| 101 | .res = { | ||
| 102 | .start = U8500_SSP0_BASE, | ||
| 103 | .end = U8500_SSP0_BASE + SZ_4K - 1, | ||
| 104 | .flags = IORESOURCE_MEM, | ||
| 105 | }, | ||
| 106 | .irq = {IRQ_SSP0, NO_IRQ }, | ||
| 107 | /* ST-Ericsson modified id */ | ||
| 108 | .periphid = SSP_PER_ID, | ||
| 109 | }; | ||
| 110 | |||
| 111 | static struct amba_device *amba_devs[] __initdata = { | ||
| 112 | &uart0_device, | ||
| 113 | &uart1_device, | ||
| 114 | &uart2_device, | ||
| 115 | &pl022_device, | ||
| 116 | }; | ||
| 117 | |||
| 118 | static void __init u8500_timer_init(void) | ||
| 119 | { | ||
| 120 | #ifdef CONFIG_LOCAL_TIMERS | ||
| 121 | /* Setup the local timer base */ | ||
| 122 | twd_base = __io_address(U8500_TWD_BASE); | ||
| 123 | #endif | ||
| 124 | /* Setup the MTU base */ | ||
| 125 | mtu_base = __io_address(U8500_MTU0_BASE); | ||
| 126 | |||
| 127 | nmdk_timer_init(); | ||
| 128 | } | ||
| 129 | |||
| 130 | static struct sys_timer u8500_timer = { | ||
| 131 | .init = u8500_timer_init, | ||
| 132 | }; | ||
| 133 | |||
| 134 | static void __init u8500_init_machine(void) | ||
| 135 | { | ||
| 136 | int i; | ||
| 137 | |||
| 138 | /* Register the active AMBA devices on this board */ | ||
| 139 | for (i = 0; i < ARRAY_SIZE(amba_devs); i++) | ||
| 140 | amba_device_register(amba_devs[i], &iomem_resource); | ||
| 141 | |||
| 142 | spi_register_board_info(u8500_spi_devices, | ||
| 143 | ARRAY_SIZE(u8500_spi_devices)); | ||
| 144 | |||
| 145 | u8500_init_devices(); | ||
| 146 | } | ||
| 147 | |||
| 148 | MACHINE_START(U8500, "ST-Ericsson MOP500 platform") | ||
| 149 | /* Maintainer: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> */ | ||
| 150 | .phys_io = U8500_UART2_BASE, | ||
| 151 | .io_pg_offst = (IO_ADDRESS(U8500_UART2_BASE) >> 18) & 0xfffc, | ||
| 152 | .boot_params = 0x100, | ||
| 153 | .map_io = u8500_map_io, | ||
| 154 | .init_irq = u8500_init_irq, | ||
| 155 | /* we re-use nomadik timer here */ | ||
| 156 | .timer = &u8500_timer, | ||
| 157 | .init_machine = u8500_init_machine, | ||
| 158 | MACHINE_END | ||
diff --git a/arch/arm/mach-ux500/clock.c b/arch/arm/mach-ux500/clock.c new file mode 100644 index 00000000000..20b6ebb6783 --- /dev/null +++ b/arch/arm/mach-ux500/clock.c | |||
| @@ -0,0 +1,95 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2009 ST-Ericsson | ||
| 3 | * heavily based on realview platform | ||
| 4 | * | ||
| 5 | * This program is free software; you can redistribute it and/or modify | ||
| 6 | * it under the terms of the GNU General Public License version 2 as | ||
| 7 | * published by the Free Software Foundation. | ||
| 8 | */ | ||
| 9 | #include <linux/module.h> | ||
| 10 | #include <linux/kernel.h> | ||
| 11 | #include <linux/list.h> | ||
| 12 | #include <linux/errno.h> | ||
| 13 | #include <linux/err.h> | ||
| 14 | #include <linux/clk.h> | ||
| 15 | #include <linux/mutex.h> | ||
| 16 | |||
| 17 | #include <asm/clkdev.h> | ||
| 18 | |||
| 19 | /* currently the clk structure | ||
| 20 | * just supports rate. This would | ||
| 21 | * be extended as and when new devices are | ||
| 22 | * added - TODO | ||
| 23 | */ | ||
| 24 | struct clk { | ||
| 25 | unsigned long rate; | ||
| 26 | }; | ||
| 27 | |||
| 28 | int clk_enable(struct clk *clk) | ||
| 29 | { | ||
| 30 | return 0; | ||
| 31 | } | ||
| 32 | EXPORT_SYMBOL(clk_enable); | ||
| 33 | |||
| 34 | void clk_disable(struct clk *clk) | ||
| 35 | { | ||
| 36 | } | ||
| 37 | EXPORT_SYMBOL(clk_disable); | ||
| 38 | |||
| 39 | unsigned long clk_get_rate(struct clk *clk) | ||
| 40 | { | ||
| 41 | return clk->rate; | ||
| 42 | } | ||
| 43 | EXPORT_SYMBOL(clk_get_rate); | ||
| 44 | |||
| 45 | long clk_round_rate(struct clk *clk, unsigned long rate) | ||
| 46 | { | ||
| 47 | /*TODO*/ | ||
| 48 | return rate; | ||
| 49 | } | ||
| 50 | EXPORT_SYMBOL(clk_round_rate); | ||
| 51 | |||
| 52 | int clk_set_rate(struct clk *clk, unsigned long rate) | ||
| 53 | { | ||
| 54 | clk->rate = rate; | ||
| 55 | return 0; | ||
| 56 | } | ||
| 57 | EXPORT_SYMBOL(clk_set_rate); | ||
| 58 | |||
| 59 | /* ssp clock */ | ||
| 60 | static struct clk ssp_clk = { | ||
| 61 | .rate = 48000000, | ||
| 62 | }; | ||
| 63 | |||
| 64 | /* fixed clock */ | ||
| 65 | static struct clk f38_clk = { | ||
| 66 | .rate = 38400000, | ||
| 67 | }; | ||
| 68 | |||
| 69 | static struct clk_lookup lookups[] = { | ||
| 70 | { | ||
| 71 | /* UART0 */ | ||
| 72 | .dev_id = "uart0", | ||
| 73 | .clk = &f38_clk, | ||
| 74 | }, { /* UART1 */ | ||
| 75 | .dev_id = "uart1", | ||
| 76 | .clk = &f38_clk, | ||
| 77 | }, { /* UART2 */ | ||
| 78 | .dev_id = "uart2", | ||
| 79 | .clk = &f38_clk, | ||
| 80 | }, { /* SSP */ | ||
| 81 | .dev_id = "pl022", | ||
| 82 | .clk = &ssp_clk, | ||
| 83 | } | ||
| 84 | }; | ||
| 85 | |||
| 86 | static int __init clk_init(void) | ||
| 87 | { | ||
| 88 | int i; | ||
| 89 | |||
| 90 | /* register the clock lookups */ | ||
| 91 | for (i = 0; i < ARRAY_SIZE(lookups); i++) | ||
| 92 | clkdev_add(&lookups[i]); | ||
| 93 | return 0; | ||
| 94 | } | ||
| 95 | arch_initcall(clk_init); | ||
diff --git a/arch/arm/mach-ux500/cpu-u8500.c b/arch/arm/mach-ux500/cpu-u8500.c new file mode 100644 index 00000000000..5f05e5850f7 --- /dev/null +++ b/arch/arm/mach-ux500/cpu-u8500.c | |||
| @@ -0,0 +1,64 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2008-2009 ST-Ericsson | ||
| 3 | * | ||
| 4 | * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2, as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | * | ||
| 10 | */ | ||
| 11 | #include <linux/types.h> | ||
| 12 | #include <linux/init.h> | ||
| 13 | #include <linux/device.h> | ||
| 14 | #include <linux/amba/bus.h> | ||
| 15 | #include <linux/irq.h> | ||
| 16 | #include <linux/platform_device.h> | ||
| 17 | |||
| 18 | #include <asm/hardware/gic.h> | ||
| 19 | #include <asm/mach/map.h> | ||
| 20 | #include <mach/hardware.h> | ||
| 21 | |||
| 22 | /* add any platform devices here - TODO */ | ||
| 23 | static struct platform_device *platform_devs[] __initdata = { | ||
| 24 | /* yet to be added, add i2c0, gpio.. */ | ||
| 25 | }; | ||
| 26 | |||
| 27 | #define __IO_DEV_DESC(x, sz) { \ | ||
| 28 | .virtual = IO_ADDRESS(x), \ | ||
| 29 | .pfn = __phys_to_pfn(x), \ | ||
| 30 | .length = sz, \ | ||
| 31 | .type = MT_DEVICE, \ | ||
| 32 | } | ||
| 33 | |||
| 34 | /* minimum static i/o mapping required to boot U8500 platforms */ | ||
| 35 | static struct map_desc u8500_io_desc[] __initdata = { | ||
| 36 | __IO_DEV_DESC(U8500_GIC_CPU_BASE, SZ_4K), | ||
| 37 | __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K), | ||
| 38 | __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K), | ||
| 39 | __IO_DEV_DESC(U8500_TWD_BASE, SZ_4K), | ||
| 40 | __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K), | ||
| 41 | __IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K), | ||
| 42 | }; | ||
| 43 | |||
| 44 | void __init u8500_map_io(void) | ||
| 45 | { | ||
| 46 | iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc)); | ||
| 47 | } | ||
| 48 | |||
| 49 | void __init u8500_init_irq(void) | ||
| 50 | { | ||
| 51 | gic_dist_init(0, __io_address(U8500_GIC_DIST_BASE), 29); | ||
| 52 | gic_cpu_init(0, __io_address(U8500_GIC_CPU_BASE)); | ||
| 53 | } | ||
| 54 | |||
| 55 | /* | ||
| 56 | * This function is called from the board init | ||
| 57 | */ | ||
| 58 | void __init u8500_init_devices(void) | ||
| 59 | { | ||
| 60 | /* Register the platform devices */ | ||
| 61 | platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs)); | ||
| 62 | |||
| 63 | return ; | ||
| 64 | } | ||
diff --git a/arch/arm/mach-ux500/headsmp.S b/arch/arm/mach-ux500/headsmp.S new file mode 100644 index 00000000000..a6be2cdf2b2 --- /dev/null +++ b/arch/arm/mach-ux500/headsmp.S | |||
| @@ -0,0 +1,38 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (c) 2009 ST-Ericsson | ||
| 3 | * This file is based ARM Realview platform | ||
| 4 | * Copyright (c) 2003 ARM Limited | ||
| 5 | * All Rights Reserved | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | */ | ||
| 11 | #include <linux/linkage.h> | ||
| 12 | #include <linux/init.h> | ||
| 13 | |||
| 14 | __INIT | ||
| 15 | |||
| 16 | /* | ||
| 17 | * U8500 specific entry point for secondary CPUs. | ||
| 18 | */ | ||
| 19 | ENTRY(u8500_secondary_startup) | ||
| 20 | mrc p15, 0, r0, c0, c0, 5 | ||
| 21 | and r0, r0, #15 | ||
| 22 | adr r4, 1f | ||
| 23 | ldmia r4, {r5, r6} | ||
| 24 | sub r4, r4, r5 | ||
| 25 | add r6, r6, r4 | ||
| 26 | dsb | ||
| 27 | pen: ldr r7, [r6] | ||
| 28 | cmp r7, r0 | ||
| 29 | bne pen | ||
| 30 | |||
| 31 | /* | ||
| 32 | * we've been released from the holding pen: secondary_stack | ||
| 33 | * should now contain the SVC stack for this core | ||
| 34 | */ | ||
| 35 | b secondary_startup | ||
| 36 | |||
| 37 | 1: .long . | ||
| 38 | .long pen_release | ||
diff --git a/arch/arm/mach-ux500/include/mach/clkdev.h b/arch/arm/mach-ux500/include/mach/clkdev.h new file mode 100644 index 00000000000..04b37a89801 --- /dev/null +++ b/arch/arm/mach-ux500/include/mach/clkdev.h | |||
| @@ -0,0 +1,7 @@ | |||
| 1 | #ifndef __ASM_MACH_CLKDEV_H | ||
| 2 | #define __ASM_MACH_CLKDEV_H | ||
| 3 | |||
| 4 | #define __clk_get(clk) ({ 1; }) | ||
| 5 | #define __clk_put(clk) do { } while (0) | ||
| 6 | |||
| 7 | #endif | ||
diff --git a/arch/arm/mach-ux500/include/mach/debug-macro.S b/arch/arm/mach-ux500/include/mach/debug-macro.S new file mode 100644 index 00000000000..8f21b6a95dc --- /dev/null +++ b/arch/arm/mach-ux500/include/mach/debug-macro.S | |||
| @@ -0,0 +1,19 @@ | |||
| 1 | /* | ||
| 2 | * Debugging macro include header | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009 ST-Ericsson | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | * | ||
| 10 | */ | ||
| 11 | .macro addruart,rx | ||
| 12 | mrc p15, 0, \rx, c1, c0 | ||
| 13 | tst \rx, #1 @MMU enabled? | ||
| 14 | moveq \rx, #0x80000000 @MMU off, Physical address | ||
| 15 | movne \rx, #0xF0000000 @MMU on, Virtual address | ||
| 16 | orr \rx, \rx, #0x7000 | ||
| 17 | .endm | ||
| 18 | |||
| 19 | #include <asm/hardware/debug-pl01x.S> | ||
diff --git a/arch/arm/mach-ux500/include/mach/entry-macro.S b/arch/arm/mach-ux500/include/mach/entry-macro.S new file mode 100644 index 00000000000..eece3301fef --- /dev/null +++ b/arch/arm/mach-ux500/include/mach/entry-macro.S | |||
| @@ -0,0 +1,89 @@ | |||
| 1 | /* | ||
| 2 | * Low-level IRQ helper macros for U8500 platforms | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009 ST-Ericsson. | ||
| 5 | * | ||
| 6 | * This file is a copy of ARM Realview platform. | ||
| 7 | * -just satisfied checkpatch script. | ||
| 8 | * | ||
| 9 | * This file is licensed under the terms of the GNU General Public | ||
| 10 | * License version 2. This program is licensed "as is" without any | ||
| 11 | * warranty of any kind, whether express or implied. | ||
| 12 | */ | ||
| 13 | #include <mach/hardware.h> | ||
| 14 | #include <asm/hardware/gic.h> | ||
| 15 | |||
| 16 | .macro disable_fiq | ||
| 17 | .endm | ||
| 18 | |||
| 19 | .macro get_irqnr_preamble, base, tmp | ||
| 20 | ldr \base, =IO_ADDRESS(U8500_GIC_CPU_BASE) | ||
| 21 | .endm | ||
| 22 | |||
| 23 | .macro arch_ret_to_user, tmp1, tmp2 | ||
| 24 | .endm | ||
| 25 | |||
| 26 | /* | ||
| 27 | * The interrupt numbering scheme is defined in the | ||
| 28 | * interrupt controller spec. To wit: | ||
| 29 | * | ||
| 30 | * Interrupts 0-15 are IPI | ||
| 31 | * 16-28 are reserved | ||
| 32 | * 29-31 are local. We allow 30 to be used for the watchdog. | ||
| 33 | * 32-1020 are global | ||
| 34 | * 1021-1022 are reserved | ||
| 35 | * 1023 is "spurious" (no interrupt) | ||
| 36 | * | ||
| 37 | * For now, we ignore all local interrupts so only return an | ||
| 38 | * interrupt if it's between 30 and 1020. The test_for_ipi | ||
| 39 | * routine below will pick up on IPIs. | ||
| 40 | * | ||
| 41 | * A simple read from the controller will tell us the number | ||
| 42 | * of the highest priority enabled interrupt. We then just | ||
| 43 | * need to check whether it is in the valid range for an | ||
| 44 | * IRQ (30-1020 inclusive). | ||
| 45 | */ | ||
| 46 | |||
| 47 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
| 48 | |||
| 49 | /* bits 12-10 = src CPU, 9-0 = int # */ | ||
| 50 | ldr \irqstat, [\base, #GIC_CPU_INTACK] | ||
| 51 | |||
| 52 | ldr \tmp, =1021 | ||
| 53 | |||
| 54 | bic \irqnr, \irqstat, #0x1c00 | ||
| 55 | |||
| 56 | cmp \irqnr, #29 | ||
| 57 | cmpcc \irqnr, \irqnr | ||
| 58 | cmpne \irqnr, \tmp | ||
| 59 | cmpcs \irqnr, \irqnr | ||
| 60 | |||
| 61 | .endm | ||
| 62 | |||
| 63 | /* We assume that irqstat (the raw value of the IRQ | ||
| 64 | * acknowledge register) is preserved from the macro above. | ||
| 65 | * If there is an IPI, we immediately signal end of | ||
| 66 | * interrupt on the controller, since this requires the | ||
| 67 | * original irqstat value which we won't easily be able | ||
| 68 | * to recreate later. | ||
| 69 | */ | ||
| 70 | |||
| 71 | .macro test_for_ipi, irqnr, irqstat, base, tmp | ||
| 72 | bic \irqnr, \irqstat, #0x1c00 | ||
| 73 | cmp \irqnr, #16 | ||
| 74 | strcc \irqstat, [\base, #GIC_CPU_EOI] | ||
| 75 | cmpcs \irqnr, \irqnr | ||
| 76 | .endm | ||
| 77 | |||
| 78 | /* As above, this assumes that irqstat and base | ||
| 79 | * are preserved.. | ||
| 80 | */ | ||
| 81 | |||
| 82 | .macro test_for_ltirq, irqnr, irqstat, base, tmp | ||
| 83 | bic \irqnr, \irqstat, #0x1c00 | ||
| 84 | mov \tmp, #0 | ||
| 85 | cmp \irqnr, #29 | ||
| 86 | moveq \tmp, #1 | ||
| 87 | streq \irqstat, [\base, #GIC_CPU_EOI] | ||
| 88 | cmp \tmp, #0 | ||
| 89 | .endm | ||
diff --git a/arch/arm/mach-ux500/include/mach/hardware.h b/arch/arm/mach-ux500/include/mach/hardware.h new file mode 100644 index 00000000000..6da650202dc --- /dev/null +++ b/arch/arm/mach-ux500/include/mach/hardware.h | |||
| @@ -0,0 +1,131 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2009 ST-Ericsson. | ||
| 3 | * | ||
| 4 | * U8500 hardware definitions | ||
| 5 | * | ||
| 6 | * This file is licensed under the terms of the GNU General Public | ||
| 7 | * License version 2. This program is licensed "as is" without any | ||
| 8 | * warranty of any kind, whether express or implied. | ||
| 9 | */ | ||
| 10 | #ifndef __MACH_HARDWARE_H | ||
| 11 | #define __MACH_HARDWARE_H | ||
| 12 | |||
| 13 | /* macros to get at IO space when running virtually | ||
| 14 | * We dont map all the peripherals, let ioremap do | ||
| 15 | * this for us. We map only very basic peripherals here. | ||
| 16 | */ | ||
| 17 | #define U8500_IO_VIRTUAL 0xf0000000 | ||
| 18 | #define U8500_IO_PHYSICAL 0xa0000000 | ||
| 19 | |||
| 20 | /* this macro is used in assembly, so no cast */ | ||
| 21 | #define IO_ADDRESS(x) \ | ||
| 22 | (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + U8500_IO_VIRTUAL) | ||
| 23 | |||
| 24 | /* typesafe io address */ | ||
| 25 | #define __io_address(n) __io(IO_ADDRESS(n)) | ||
| 26 | |||
| 27 | /* | ||
| 28 | * Base address definitions for U8500 Onchip IPs. All the | ||
| 29 | * peripherals are contained in a single 1 Mbyte region, with | ||
| 30 | * AHB peripherals at the bottom and APB peripherals at the | ||
| 31 | * top of the region. PER stands for PERIPHERAL region which | ||
| 32 | * itself divided into sub regions. | ||
| 33 | */ | ||
| 34 | #define U8500_PER3_BASE 0x80000000 | ||
| 35 | #define U8500_PER2_BASE 0x80110000 | ||
| 36 | #define U8500_PER1_BASE 0x80120000 | ||
| 37 | #define U8500_PER4_BASE 0x80150000 | ||
| 38 | |||
| 39 | #define U8500_PER6_BASE 0xa03c0000 | ||
| 40 | #define U8500_PER5_BASE 0xa03e0000 | ||
| 41 | #define U8500_PER7_BASE 0xa03d0000 | ||
| 42 | |||
| 43 | #define U8500_SVA_BASE 0xa0100000 | ||
| 44 | #define U8500_SIA_BASE 0xa0200000 | ||
| 45 | |||
| 46 | #define U8500_SGA_BASE 0xa0300000 | ||
| 47 | #define U8500_MCDE_BASE 0xa0350000 | ||
| 48 | #define U8500_DMA_BASE 0xa0362000 | ||
| 49 | |||
| 50 | #define U8500_SCU_BASE 0xa0410000 | ||
| 51 | #define U8500_GIC_CPU_BASE 0xa0410100 | ||
| 52 | #define U8500_TWD_BASE 0xa0410600 | ||
| 53 | #define U8500_GIC_DIST_BASE 0xa0411000 | ||
| 54 | #define U8500_L2CC_BASE 0xa0412000 | ||
| 55 | |||
| 56 | #define U8500_TWD_SIZE 0x100 | ||
| 57 | |||
| 58 | /* per7 base addressess */ | ||
| 59 | #define U8500_CR_BASE (U8500_PER7_BASE + 0x8000) | ||
| 60 | #define U8500_MTU0_BASE (U8500_PER7_BASE + 0xa000) | ||
| 61 | #define U8500_MTU1_BASE (U8500_PER7_BASE + 0xb000) | ||
| 62 | #define U8500_TZPC0_BASE (U8500_PER7_BASE + 0xc000) | ||
| 63 | #define U8500_CLKRST7_BASE (U8500_PER7_BASE + 0xf000) | ||
| 64 | |||
| 65 | /* per6 base addressess */ | ||
| 66 | #define U8500_RNG_BASE (U8500_PER6_BASE + 0x0000) | ||
| 67 | #define U8500_PKA_BASE (U8500_PER6_BASE + 0x1000) | ||
| 68 | #define U8500_PKAM_BASE (U8500_PER6_BASE + 0x2000) | ||
| 69 | #define U8500_CRYPTO0_BASE (U8500_PER6_BASE + 0xa000) | ||
| 70 | #define U8500_CRYPTO1_BASE (U8500_PER6_BASE + 0xb000) | ||
| 71 | #define U8500_CLKRST6_BASE (U8500_PER7_BASE + 0xf000) | ||
| 72 | |||
| 73 | /* per5 base addressess */ | ||
| 74 | #define U8500_USBOTG_BASE (U8500_PER5_BASE + 0x00000) | ||
| 75 | #define U8500_GPIO5_BASE (U8500_PER5_BASE + 0x1e000) | ||
| 76 | #define U8500_CLKRST5_BASE (U8500_PER7_BASE + 0x1f000) | ||
| 77 | |||
| 78 | /* per4 base addressess */ | ||
| 79 | #define U8500_BACKUPRAM0_BASE (U8500_PER4_BASE + 0x0000) | ||
| 80 | #define U8500_BACKUPRAM1_BASE (U8500_PER4_BASE + 0x1000) | ||
| 81 | #define U8500_RTT0_BASE (U8500_PER4_BASE + 0x2000) | ||
| 82 | #define U8500_RTT1_BASE (U8500_PER4_BASE + 0x3000) | ||
| 83 | #define U8500_RTC_BASE (U8500_PER4_BASE + 0x4000) | ||
| 84 | #define U8500_SCR_BASE (U8500_PER4_BASE + 0x5000) | ||
| 85 | #define U8500_DMC_BASE (U8500_PER4_BASE + 0x6000) | ||
| 86 | #define U8500_PRCMU_BASE (U8500_PER4_BASE + 0x7000) | ||
| 87 | |||
| 88 | /* per3 base addressess */ | ||
| 89 | #define U8500_FSMC_BASE (U8500_PER3_BASE + 0x0000) | ||
| 90 | #define U8500_SSP0_BASE (U8500_PER3_BASE + 0x2000) | ||
| 91 | #define U8500_SSP1_BASE (U8500_PER3_BASE + 0x3000) | ||
| 92 | #define U8500_I2C0_BASE (U8500_PER3_BASE + 0x4000) | ||
| 93 | #define U8500_SDI2_BASE (U8500_PER3_BASE + 0x5000) | ||
| 94 | #define U8500_SKE_BASE (U8500_PER3_BASE + 0x6000) | ||
| 95 | #define U8500_UART2_BASE (U8500_PER3_BASE + 0x7000) | ||
| 96 | #define U8500_SDI5_BASE (U8500_PER3_BASE + 0x8000) | ||
| 97 | #define U8500_GPIO3_BASE (U8500_PER3_BASE + 0xe000) | ||
| 98 | #define U8500_CLKRST3_BASE (U8500_PER7_BASE + 0xf000) | ||
| 99 | |||
| 100 | /* per2 base addressess */ | ||
| 101 | #define U8500_I2C3_BASE (U8500_PER2_BASE + 0x0000) | ||
| 102 | #define U8500_SPI2_BASE (U8500_PER2_BASE + 0x1000) | ||
| 103 | #define U8500_SPI1_BASE (U8500_PER2_BASE + 0x2000) | ||
| 104 | #define U8500_PWL_BASE (U8500_PER2_BASE + 0x3000) | ||
| 105 | #define U8500_SDI4_BASE (U8500_PER2_BASE + 0x4000) | ||
| 106 | #define U8500_MSP2_BASE (U8500_PER2_BASE + 0x7000) | ||
| 107 | #define U8500_SDI1_BASE (U8500_PER2_BASE + 0x8000) | ||
| 108 | #define U8500_SDI3_BASE (U8500_PER2_BASE + 0x9000) | ||
| 109 | #define U8500_SPI0_BASE (U8500_PER2_BASE + 0xa000) | ||
| 110 | #define U8500_HSIR_BASE (U8500_PER2_BASE + 0xb000) | ||
| 111 | #define U8500_HSIT_BASE (U8500_PER2_BASE + 0xc000) | ||
| 112 | #define U8500_GPIO2_BASE (U8500_PER2_BASE + 0xe000) | ||
| 113 | #define U8500_CLKRST2_BASE (U8500_PER2_BASE + 0xf000) | ||
| 114 | |||
| 115 | /* per1 base addresses */ | ||
| 116 | #define U8500_UART0_BASE (U8500_PER1_BASE + 0x0000) | ||
| 117 | #define U8500_UART1_BASE (U8500_PER1_BASE + 0x1000) | ||
| 118 | #define U8500_I2C1_BASE (U8500_PER1_BASE + 0x2000) | ||
| 119 | #define U8500_MSP0_BASE (U8500_PER1_BASE + 0x3000) | ||
| 120 | #define U8500_MSP1_BASE (U8500_PER1_BASE + 0x4000) | ||
| 121 | #define U8500_SDI0_BASE (U8500_PER1_BASE + 0x6000) | ||
| 122 | #define U8500_I2C2_BASE (U8500_PER1_BASE + 0x8000) | ||
| 123 | #define U8500_SPI3_BASE (U8500_PER1_BASE + 0x9000) | ||
| 124 | #define U8500_SLIM0_BASE (U8500_PER1_BASE + 0xa000) | ||
| 125 | #define U8500_GPIO1_BASE (U8500_PER1_BASE + 0xe000) | ||
| 126 | #define U8500_CLKRST1_BASE (U8500_PER2_BASE + 0xf000) | ||
| 127 | |||
| 128 | /* ST-Ericsson modified pl022 id */ | ||
| 129 | #define SSP_PER_ID 0x01080022 | ||
| 130 | |||
| 131 | #endif /* __MACH_HARDWARE_H */ | ||
diff --git a/arch/arm/mach-ux500/include/mach/io.h b/arch/arm/mach-ux500/include/mach/io.h new file mode 100644 index 00000000000..1cf3f44ce5b --- /dev/null +++ b/arch/arm/mach-ux500/include/mach/io.h | |||
| @@ -0,0 +1,22 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-u8500/include/mach/io.h | ||
| 3 | * | ||
| 4 | * Copyright (C) 1997-1999 Russell King | ||
| 5 | * | ||
| 6 | * Modifications: | ||
| 7 | * 06-12-1997 RMK Created. | ||
| 8 | * 07-04-1999 RMK Major cleanup | ||
| 9 | */ | ||
| 10 | #ifndef __ASM_ARM_ARCH_IO_H | ||
| 11 | #define __ASM_ARM_ARCH_IO_H | ||
| 12 | |||
| 13 | #define IO_SPACE_LIMIT 0xffffffff | ||
| 14 | |||
| 15 | /* | ||
| 16 | * We don't actually have real ISA nor PCI buses, but there is so many | ||
| 17 | * drivers out there that might just work if we fake them... | ||
| 18 | */ | ||
| 19 | #define __io(a) __typesafe_io(a) | ||
| 20 | #define __mem_pci(a) (a) | ||
| 21 | |||
| 22 | #endif | ||
diff --git a/arch/arm/mach-ux500/include/mach/irqs.h b/arch/arm/mach-ux500/include/mach/irqs.h new file mode 100644 index 00000000000..394b5dd2200 --- /dev/null +++ b/arch/arm/mach-ux500/include/mach/irqs.h | |||
| @@ -0,0 +1,71 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2008 STMicroelectronics | ||
| 3 | * Copyright (C) 2009 ST-Ericsson. | ||
| 4 | * | ||
| 5 | * This program is free software; you can redistribute it and/or modify | ||
| 6 | * it under the terms of the GNU General Public License as published by | ||
| 7 | * the Free Software Foundation; either version 2 of the License, or | ||
| 8 | * (at your option) any later version. | ||
| 9 | */ | ||
| 10 | #ifndef ASM_ARCH_IRQS_H | ||
| 11 | #define ASM_ARCH_IRQS_H | ||
| 12 | |||
| 13 | #include <mach/hardware.h> | ||
| 14 | |||
| 15 | #define IRQ_LOCALTIMER 29 | ||
| 16 | #define IRQ_LOCALWDOG 30 | ||
| 17 | |||
| 18 | /* Shared Peripheral Interrupt (SHPI) */ | ||
| 19 | #define IRQ_SHPI_START 32 | ||
| 20 | |||
| 21 | /* Interrupt numbers generic for shared peripheral */ | ||
| 22 | #define IRQ_MTU0 (IRQ_SHPI_START + 4) | ||
| 23 | #define IRQ_SPI2 (IRQ_SHPI_START + 6) | ||
| 24 | #define IRQ_SPI0 (IRQ_SHPI_START + 8) | ||
| 25 | #define IRQ_UART0 (IRQ_SHPI_START + 11) | ||
| 26 | #define IRQ_I2C3 (IRQ_SHPI_START + 12) | ||
| 27 | #define IRQ_SSP0 (IRQ_SHPI_START + 14) | ||
| 28 | #define IRQ_MTU1 (IRQ_SHPI_START + 17) | ||
| 29 | #define IRQ_RTC_RTT (IRQ_SHPI_START + 18) | ||
| 30 | #define IRQ_UART1 (IRQ_SHPI_START + 19) | ||
| 31 | #define IRQ_I2C0 (IRQ_SHPI_START + 21) | ||
| 32 | #define IRQ_I2C1 (IRQ_SHPI_START + 22) | ||
| 33 | #define IRQ_USBOTG (IRQ_SHPI_START + 23) | ||
| 34 | #define IRQ_DMA (IRQ_SHPI_START + 25) | ||
| 35 | #define IRQ_UART2 (IRQ_SHPI_START + 26) | ||
| 36 | #define IRQ_HSIR_EXCEP (IRQ_SHPI_START + 29) | ||
| 37 | #define IRQ_MSP0 (IRQ_SHPI_START + 31) | ||
| 38 | #define IRQ_HSIR_CH0_OVRRUN (IRQ_SHPI_START + 32) | ||
| 39 | #define IRQ_HSIR_CH1_OVRRUN (IRQ_SHPI_START + 33) | ||
| 40 | #define IRQ_HSIR_CH2_OVRRUN (IRQ_SHPI_START + 34) | ||
| 41 | #define IRQ_HSIR_CH3_OVRRUN (IRQ_SHPI_START + 35) | ||
| 42 | #define IRQ_AB4500 (IRQ_SHPI_START + 40) | ||
| 43 | #define IRQ_DISP (IRQ_SHPI_START + 48) | ||
| 44 | #define IRQ_SiPI3 (IRQ_SHPI_START + 49) | ||
| 45 | #define IRQ_SSP1 (IRQ_SHPI_START + 52) | ||
| 46 | #define IRQ_I2C2 (IRQ_SHPI_START + 55) | ||
| 47 | #define IRQ_SDMMC0 (IRQ_SHPI_START + 60) | ||
| 48 | #define IRQ_MSP1 (IRQ_SHPI_START + 62) | ||
| 49 | #define IRQ_SPI1 (IRQ_SHPI_START + 96) | ||
| 50 | #define IRQ_MSP2 (IRQ_SHPI_START + 98) | ||
| 51 | #define IRQ_SDMMC4 (IRQ_SHPI_START + 99) | ||
| 52 | #define IRQ_HSIRD0 (IRQ_SHPI_START + 104) | ||
| 53 | #define IRQ_HSIRD1 (IRQ_SHPI_START + 105) | ||
| 54 | #define IRQ_HSITD0 (IRQ_SHPI_START + 106) | ||
| 55 | #define IRQ_HSITD1 (IRQ_SHPI_START + 107) | ||
| 56 | #define IRQ_GPIO0 (IRQ_SHPI_START + 119) | ||
| 57 | #define IRQ_GPIO1 (IRQ_SHPI_START + 120) | ||
| 58 | #define IRQ_GPIO2 (IRQ_SHPI_START + 121) | ||
| 59 | #define IRQ_GPIO3 (IRQ_SHPI_START + 122) | ||
| 60 | #define IRQ_GPIO4 (IRQ_SHPI_START + 123) | ||
| 61 | #define IRQ_GPIO5 (IRQ_SHPI_START + 124) | ||
| 62 | #define IRQ_GPIO6 (IRQ_SHPI_START + 125) | ||
| 63 | #define IRQ_GPIO7 (IRQ_SHPI_START + 126) | ||
| 64 | #define IRQ_GPIO8 (IRQ_SHPI_START + 127) | ||
| 65 | |||
| 66 | /* There are 128 shared peripheral interrupts assigned to | ||
| 67 | * INTID[160:32]. The first 32 interrupts are reserved. | ||
| 68 | */ | ||
| 69 | #define NR_IRQS 161 | ||
| 70 | |||
| 71 | #endif /*ASM_ARCH_IRQS_H*/ | ||
diff --git a/arch/arm/mach-ux500/include/mach/memory.h b/arch/arm/mach-ux500/include/mach/memory.h new file mode 100644 index 00000000000..510571a59e2 --- /dev/null +++ b/arch/arm/mach-ux500/include/mach/memory.h | |||
| @@ -0,0 +1,18 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2009 ST-Ericsson | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License as published by | ||
| 6 | * the Free Software Foundation; either version 2 of the License, or | ||
| 7 | * (at your option) any later version. | ||
| 8 | */ | ||
| 9 | #ifndef __ASM_ARCH_MEMORY_H | ||
| 10 | #define __ASM_ARCH_MEMORY_H | ||
| 11 | |||
| 12 | /* | ||
| 13 | * Physical DRAM offset. | ||
| 14 | */ | ||
| 15 | #define PHYS_OFFSET UL(0x00000000) | ||
| 16 | #define BUS_OFFSET UL(0x00000000) | ||
| 17 | |||
| 18 | #endif | ||
diff --git a/arch/arm/mach-ux500/include/mach/setup.h b/arch/arm/mach-ux500/include/mach/setup.h new file mode 100644 index 00000000000..cf0ce1687f2 --- /dev/null +++ b/arch/arm/mach-ux500/include/mach/setup.h | |||
| @@ -0,0 +1,23 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2009 ST-Ericsson. | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License version 2 as | ||
| 6 | * published by the Free Software Foundation. | ||
| 7 | * | ||
| 8 | * These symbols are needed for board-specific files to call their | ||
| 9 | * own cpu-specific files | ||
| 10 | */ | ||
| 11 | #ifndef __ASM_ARCH_SETUP_H | ||
| 12 | #define __ASM_ARCH_SETUP_H | ||
| 13 | |||
| 14 | #include <asm/mach/time.h> | ||
| 15 | #include <linux/init.h> | ||
| 16 | |||
| 17 | extern void u8500_map_io(void); | ||
| 18 | extern void u8500_init_devices(void); | ||
| 19 | extern void u8500_init_irq(void); | ||
| 20 | /* We re-use nomadik_timer for this platform */ | ||
| 21 | extern void nmdk_timer_init(void); | ||
| 22 | |||
| 23 | #endif /* __ASM_ARCH_SETUP_H */ | ||
diff --git a/arch/arm/mach-ux500/include/mach/smp.h b/arch/arm/mach-ux500/include/mach/smp.h new file mode 100644 index 00000000000..b59f7bc9725 --- /dev/null +++ b/arch/arm/mach-ux500/include/mach/smp.h | |||
| @@ -0,0 +1,32 @@ | |||
| 1 | /* | ||
| 2 | * This file is based ARM realview platform. | ||
| 3 | * Copyright (C) ARM Limited. | ||
| 4 | * | ||
| 5 | * This file is licensed under the terms of the GNU General Public | ||
| 6 | * License version 2. This program is licensed "as is" without any | ||
| 7 | * warranty of any kind, whether express or implied. | ||
| 8 | */ | ||
| 9 | #ifndef ASMARM_ARCH_SMP_H | ||
| 10 | #define ASMARM_ARCH_SMP_H | ||
| 11 | |||
| 12 | #include <asm/hardware/gic.h> | ||
| 13 | |||
| 14 | /* This is required to wakeup the secondary core */ | ||
| 15 | extern void u8500_secondary_startup(void); | ||
| 16 | |||
| 17 | #define hard_smp_processor_id() \ | ||
| 18 | ({ \ | ||
| 19 | unsigned int cpunum; \ | ||
| 20 | __asm__("mrc p15, 0, %0, c0, c0, 5" \ | ||
| 21 | : "=r" (cpunum)); \ | ||
| 22 | cpunum &= 0x0F; \ | ||
| 23 | }) | ||
| 24 | |||
| 25 | /* | ||
| 26 | * We use IRQ1 as the IPI | ||
| 27 | */ | ||
| 28 | static inline void smp_cross_call(const struct cpumask *mask) | ||
| 29 | { | ||
| 30 | gic_raise_softirq(mask, 1); | ||
| 31 | } | ||
| 32 | #endif | ||
diff --git a/arch/arm/mach-ux500/include/mach/system.h b/arch/arm/mach-ux500/include/mach/system.h new file mode 100644 index 00000000000..c0cd8006f1a --- /dev/null +++ b/arch/arm/mach-ux500/include/mach/system.h | |||
| @@ -0,0 +1,25 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2009 ST-Ericsson. | ||
| 3 | * | ||
| 4 | * This file is licensed under the terms of the GNU General Public | ||
| 5 | * License version 2. This program is licensed "as is" without any | ||
| 6 | * warranty of any kind, whether express or implied. | ||
| 7 | */ | ||
| 8 | #ifndef __ASM_ARCH_SYSTEM_H | ||
| 9 | #define __ASM_ARCH_SYSTEM_H | ||
| 10 | |||
| 11 | static inline void arch_idle(void) | ||
| 12 | { | ||
| 13 | /* | ||
| 14 | * This should do all the clock switching | ||
| 15 | * and wait for interrupt tricks | ||
| 16 | */ | ||
| 17 | cpu_do_idle(); | ||
| 18 | } | ||
| 19 | |||
| 20 | static inline void arch_reset(char mode, const char *cmd) | ||
| 21 | { | ||
| 22 | /* yet to be implemented - TODO */ | ||
| 23 | } | ||
| 24 | |||
| 25 | #endif | ||
diff --git a/arch/arm/mach-ux500/include/mach/timex.h b/arch/arm/mach-ux500/include/mach/timex.h new file mode 100644 index 00000000000..d0942c17401 --- /dev/null +++ b/arch/arm/mach-ux500/include/mach/timex.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef __ASM_ARCH_TIMEX_H | ||
| 2 | #define __ASM_ARCH_TIMEX_H | ||
| 3 | |||
| 4 | #define CLOCK_TICK_RATE 110000000 | ||
| 5 | |||
| 6 | #endif | ||
diff --git a/arch/arm/mach-ux500/include/mach/uncompress.h b/arch/arm/mach-ux500/include/mach/uncompress.h new file mode 100644 index 00000000000..8552eb188b5 --- /dev/null +++ b/arch/arm/mach-ux500/include/mach/uncompress.h | |||
| @@ -0,0 +1,58 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2009 ST-Ericsson | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License as published by | ||
| 6 | * the Free Software Foundation; either version 2 of the License, or | ||
| 7 | * (at your option) any later version. | ||
| 8 | * | ||
| 9 | * This program is distributed in the hope that it will be useful, | ||
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 12 | * GNU General Public License for more details. | ||
| 13 | * | ||
| 14 | * You should have received a copy of the GNU General Public License | ||
| 15 | * along with this program; if not, write to the Free Software | ||
| 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 17 | */ | ||
| 18 | #ifndef __ASM_ARCH_UNCOMPRESS_H | ||
| 19 | #define __ASM_ARCH_UNCOMPRESS_H | ||
| 20 | |||
| 21 | #include <asm/setup.h> | ||
| 22 | #include <linux/io.h> | ||
| 23 | #include <mach/hardware.h> | ||
| 24 | |||
| 25 | #define U8500_UART_DR 0x80007000 | ||
| 26 | #define U8500_UART_LCRH 0x8000702c | ||
| 27 | #define U8500_UART_CR 0x80007030 | ||
| 28 | #define U8500_UART_FR 0x80007018 | ||
| 29 | |||
| 30 | static void putc(const char c) | ||
| 31 | { | ||
| 32 | /* Do nothing if the UART is not enabled. */ | ||
| 33 | if (!(readb(U8500_UART_CR) & 0x1)) | ||
| 34 | return; | ||
| 35 | |||
| 36 | if (c == '\n') | ||
| 37 | putc('\r'); | ||
| 38 | |||
| 39 | while (readb(U8500_UART_FR) & (1 << 5)) | ||
| 40 | barrier(); | ||
| 41 | writeb(c, U8500_UART_DR); | ||
| 42 | } | ||
| 43 | |||
| 44 | static void flush(void) | ||
| 45 | { | ||
| 46 | if (!(readb(U8500_UART_CR) & 0x1)) | ||
| 47 | return; | ||
| 48 | while (readb(U8500_UART_FR) & (1 << 3)) | ||
| 49 | barrier(); | ||
| 50 | } | ||
| 51 | |||
| 52 | static inline void arch_decomp_setup(void) | ||
| 53 | { | ||
| 54 | } | ||
| 55 | |||
| 56 | #define arch_decomp_wdog() /* nothing to do here */ | ||
| 57 | |||
| 58 | #endif /* __ASM_ARCH_UNCOMPRESS_H */ | ||
diff --git a/arch/arm/mach-ux500/include/mach/vmalloc.h b/arch/arm/mach-ux500/include/mach/vmalloc.h new file mode 100644 index 00000000000..86cdbbce184 --- /dev/null +++ b/arch/arm/mach-ux500/include/mach/vmalloc.h | |||
| @@ -0,0 +1,18 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2009 ST-Ericsson | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License as published by | ||
| 6 | * the Free Software Foundation; either version 2 of the License, or | ||
| 7 | * (at your option) any later version. | ||
| 8 | * | ||
| 9 | * This program is distributed in the hope that it will be useful, | ||
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 12 | * GNU General Public License for more details. | ||
| 13 | * | ||
| 14 | * You should have received a copy of the GNU General Public License | ||
| 15 | * along with this program; if not, write to the Free Software | ||
| 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 17 | */ | ||
| 18 | #define VMALLOC_END 0xf0000000 | ||
diff --git a/arch/arm/mach-ux500/localtimer.c b/arch/arm/mach-ux500/localtimer.c new file mode 100644 index 00000000000..2288f6a7c51 --- /dev/null +++ b/arch/arm/mach-ux500/localtimer.c | |||
| @@ -0,0 +1,28 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2008-2009 ST-Ericsson | ||
| 3 | * Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> | ||
| 4 | * | ||
| 5 | * This file is heavily based on relaview platform, almost a copy. | ||
| 6 | * | ||
| 7 | * Copyright (C) 2002 ARM Ltd. | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License version 2 as | ||
| 11 | * published by the Free Software Foundation. | ||
| 12 | */ | ||
| 13 | #include <linux/init.h> | ||
| 14 | #include <linux/smp.h> | ||
| 15 | #include <linux/clockchips.h> | ||
| 16 | |||
| 17 | #include <asm/irq.h> | ||
| 18 | #include <asm/smp_twd.h> | ||
| 19 | #include <asm/localtimer.h> | ||
| 20 | |||
| 21 | /* | ||
| 22 | * Setup the local clock events for a CPU. | ||
| 23 | */ | ||
| 24 | void __cpuinit local_timer_setup(struct clock_event_device *evt) | ||
| 25 | { | ||
| 26 | evt->irq = IRQ_LOCALTIMER; | ||
| 27 | twd_timer_setup(evt); | ||
| 28 | } | ||
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c new file mode 100644 index 00000000000..8dfe7ca245d --- /dev/null +++ b/arch/arm/mach-ux500/platsmp.c | |||
| @@ -0,0 +1,177 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2002 ARM Ltd. | ||
| 3 | * Copyright (C) 2008 STMicroelctronics. | ||
| 4 | * Copyright (C) 2009 ST-Ericsson. | ||
| 5 | * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> | ||
| 6 | * | ||
| 7 | * This file is based on arm realview platform | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License version 2 as | ||
| 11 | * published by the Free Software Foundation. | ||
| 12 | */ | ||
| 13 | #include <linux/init.h> | ||
| 14 | #include <linux/errno.h> | ||
| 15 | #include <linux/delay.h> | ||
| 16 | #include <linux/device.h> | ||
| 17 | #include <linux/smp.h> | ||
| 18 | #include <linux/io.h> | ||
| 19 | |||
| 20 | #include <asm/cacheflush.h> | ||
| 21 | #include <asm/localtimer.h> | ||
| 22 | #include <asm/smp_scu.h> | ||
| 23 | #include <mach/hardware.h> | ||
| 24 | |||
| 25 | /* | ||
| 26 | * control for which core is the next to come out of the secondary | ||
| 27 | * boot "holding pen" | ||
| 28 | */ | ||
| 29 | volatile int __cpuinitdata pen_release = -1; | ||
| 30 | |||
| 31 | static unsigned int __init get_core_count(void) | ||
| 32 | { | ||
| 33 | return scu_get_core_count(__io_address(U8500_SCU_BASE)); | ||
| 34 | } | ||
| 35 | |||
| 36 | static DEFINE_SPINLOCK(boot_lock); | ||
| 37 | |||
| 38 | void __cpuinit platform_secondary_init(unsigned int cpu) | ||
| 39 | { | ||
| 40 | trace_hardirqs_off(); | ||
| 41 | |||
| 42 | /* | ||
| 43 | * if any interrupts are already enabled for the primary | ||
| 44 | * core (e.g. timer irq), then they will not have been enabled | ||
| 45 | * for us: do so | ||
| 46 | */ | ||
| 47 | gic_cpu_init(0, __io_address(U8500_GIC_CPU_BASE)); | ||
| 48 | |||
| 49 | /* | ||
| 50 | * let the primary processor know we're out of the | ||
| 51 | * pen, then head off into the C entry point | ||
| 52 | */ | ||
| 53 | pen_release = -1; | ||
| 54 | |||
| 55 | /* | ||
| 56 | * Synchronise with the boot thread. | ||
| 57 | */ | ||
| 58 | spin_lock(&boot_lock); | ||
| 59 | spin_unlock(&boot_lock); | ||
| 60 | } | ||
| 61 | |||
| 62 | int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) | ||
| 63 | { | ||
| 64 | unsigned long timeout; | ||
| 65 | |||
| 66 | /* | ||
| 67 | * set synchronisation state between this boot processor | ||
| 68 | * and the secondary one | ||
| 69 | */ | ||
| 70 | spin_lock(&boot_lock); | ||
| 71 | |||
| 72 | /* | ||
| 73 | * The secondary processor is waiting to be released from | ||
| 74 | * the holding pen - release it, then wait for it to flag | ||
| 75 | * that it has been released by resetting pen_release. | ||
| 76 | */ | ||
| 77 | pen_release = cpu; | ||
| 78 | flush_cache_all(); | ||
| 79 | |||
| 80 | timeout = jiffies + (1 * HZ); | ||
| 81 | while (time_before(jiffies, timeout)) { | ||
| 82 | if (pen_release == -1) | ||
| 83 | break; | ||
| 84 | } | ||
| 85 | |||
| 86 | /* | ||
| 87 | * now the secondary core is starting up let it run its | ||
| 88 | * calibrations, then wait for it to finish | ||
| 89 | */ | ||
| 90 | spin_unlock(&boot_lock); | ||
| 91 | |||
| 92 | return pen_release != -1 ? -ENOSYS : 0; | ||
| 93 | } | ||
| 94 | |||
| 95 | static void __init wakeup_secondary(void) | ||
| 96 | { | ||
| 97 | /* nobody is to be released from the pen yet */ | ||
| 98 | pen_release = -1; | ||
| 99 | |||
| 100 | /* | ||
| 101 | * write the address of secondary startup into the backup ram register | ||
| 102 | * at offset 0x1FF4, then write the magic number 0xA1FEED01 to the | ||
| 103 | * backup ram register at offset 0x1FF0, which is what boot rom code | ||
| 104 | * is waiting for. This would wake up the secondary core from WFE | ||
| 105 | */ | ||
| 106 | #define U8500_CPU1_JUMPADDR_OFFSET 0x1FF4 | ||
| 107 | __raw_writel(virt_to_phys(u8500_secondary_startup), | ||
| 108 | (void __iomem *)IO_ADDRESS(U8500_BACKUPRAM0_BASE) + | ||
| 109 | U8500_CPU1_JUMPADDR_OFFSET); | ||
| 110 | |||
| 111 | #define U8500_CPU1_WAKEMAGIC_OFFSET 0x1FF0 | ||
| 112 | __raw_writel(0xA1FEED01, | ||
| 113 | (void __iomem *)IO_ADDRESS(U8500_BACKUPRAM0_BASE) + | ||
| 114 | U8500_CPU1_WAKEMAGIC_OFFSET); | ||
| 115 | |||
| 116 | /* make sure write buffer is drained */ | ||
| 117 | mb(); | ||
| 118 | } | ||
| 119 | |||
| 120 | /* | ||
| 121 | * Initialise the CPU possible map early - this describes the CPUs | ||
| 122 | * which may be present or become present in the system. | ||
| 123 | */ | ||
| 124 | void __init smp_init_cpus(void) | ||
| 125 | { | ||
| 126 | unsigned int i, ncores = get_core_count(); | ||
| 127 | |||
| 128 | for (i = 0; i < ncores; i++) | ||
| 129 | set_cpu_possible(i, true); | ||
| 130 | } | ||
| 131 | |||
| 132 | void __init smp_prepare_cpus(unsigned int max_cpus) | ||
| 133 | { | ||
| 134 | unsigned int ncores = get_core_count(); | ||
| 135 | unsigned int cpu = smp_processor_id(); | ||
| 136 | int i; | ||
| 137 | |||
| 138 | /* sanity check */ | ||
| 139 | if (ncores == 0) { | ||
| 140 | printk(KERN_ERR | ||
| 141 | "U8500: strange CM count of 0? Default to 1\n"); | ||
| 142 | ncores = 1; | ||
| 143 | } | ||
| 144 | |||
| 145 | if (ncores > num_possible_cpus()) { | ||
| 146 | printk(KERN_WARNING | ||
| 147 | "U8500: no. of cores (%d) greater than configured " | ||
| 148 | "maximum of %d - clipping\n", | ||
| 149 | ncores, num_possible_cpus()); | ||
| 150 | ncores = num_possible_cpus(); | ||
| 151 | } | ||
| 152 | |||
| 153 | smp_store_cpu_info(cpu); | ||
| 154 | |||
| 155 | /* | ||
| 156 | * are we trying to boot more cores than exist? | ||
| 157 | */ | ||
| 158 | if (max_cpus > ncores) | ||
| 159 | max_cpus = ncores; | ||
| 160 | |||
| 161 | /* | ||
| 162 | * Initialise the present map, which describes the set of CPUs | ||
| 163 | * actually populated at the present time. | ||
| 164 | */ | ||
| 165 | for (i = 0; i < max_cpus; i++) | ||
| 166 | set_cpu_present(i, true); | ||
| 167 | |||
| 168 | if (max_cpus > 1) { | ||
| 169 | /* | ||
| 170 | * Enable the local timer or broadcast device for the | ||
| 171 | * boot CPU, but only if we have more than one CPU. | ||
| 172 | */ | ||
| 173 | percpu_timer_setup(); | ||
| 174 | scu_enable(__io_address(U8500_SCU_BASE)); | ||
| 175 | wakeup_secondary(); | ||
| 176 | } | ||
| 177 | } | ||
diff --git a/arch/arm/mach-w90x900/dev.c b/arch/arm/mach-w90x900/dev.c index 2a6f98de48d..51f17b75334 100644 --- a/arch/arm/mach-w90x900/dev.c +++ b/arch/arm/mach-w90x900/dev.c | |||
| @@ -32,6 +32,7 @@ | |||
| 32 | #include <asm/mach-types.h> | 32 | #include <asm/mach-types.h> |
| 33 | 33 | ||
| 34 | #include <mach/regs-serial.h> | 34 | #include <mach/regs-serial.h> |
| 35 | #include <mach/nuc900_spi.h> | ||
| 35 | #include <mach/map.h> | 36 | #include <mach/map.h> |
| 36 | 37 | ||
| 37 | #include "cpu.h" | 38 | #include "cpu.h" |
| @@ -196,6 +197,18 @@ static struct platform_device nuc900_device_emc = { | |||
| 196 | 197 | ||
| 197 | /* SPI device */ | 198 | /* SPI device */ |
| 198 | 199 | ||
| 200 | static struct w90p910_spi_info nuc900_spiflash_data = { | ||
| 201 | .num_cs = 1, | ||
| 202 | .lsb = 0, | ||
| 203 | .txneg = 1, | ||
| 204 | .rxneg = 0, | ||
| 205 | .divider = 24, | ||
| 206 | .sleep = 0, | ||
| 207 | .txnum = 0, | ||
| 208 | .txbitlen = 1, | ||
| 209 | .bus_num = 0, | ||
| 210 | }; | ||
| 211 | |||
| 199 | static struct resource nuc900_spi_resource[] = { | 212 | static struct resource nuc900_spi_resource[] = { |
| 200 | [0] = { | 213 | [0] = { |
| 201 | .start = W90X900_PA_I2C + SPIOFFSET, | 214 | .start = W90X900_PA_I2C + SPIOFFSET, |
| @@ -214,6 +227,9 @@ static struct platform_device nuc900_device_spi = { | |||
| 214 | .id = -1, | 227 | .id = -1, |
| 215 | .num_resources = ARRAY_SIZE(nuc900_spi_resource), | 228 | .num_resources = ARRAY_SIZE(nuc900_spi_resource), |
| 216 | .resource = nuc900_spi_resource, | 229 | .resource = nuc900_spi_resource, |
| 230 | .dev = { | ||
| 231 | .platform_data = &nuc900_spiflash_data, | ||
| 232 | } | ||
| 217 | }; | 233 | }; |
| 218 | 234 | ||
| 219 | /* spi device, spi flash info */ | 235 | /* spi device, spi flash info */ |
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 9264d814cd7..dd4698c67cc 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig | |||
| @@ -388,7 +388,7 @@ config CPU_FEROCEON_OLD_ID | |||
| 388 | 388 | ||
| 389 | # ARMv6 | 389 | # ARMv6 |
| 390 | config CPU_V6 | 390 | config CPU_V6 |
| 391 | bool "Support ARM V6 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB || MACH_REALVIEW_PBX | 391 | bool "Support ARM V6 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB || MACH_REALVIEW_PBX || ARCH_DOVE |
| 392 | select CPU_32v6 | 392 | select CPU_32v6 |
| 393 | select CPU_ABRT_EV6 | 393 | select CPU_ABRT_EV6 |
| 394 | select CPU_PABRT_V6 | 394 | select CPU_PABRT_V6 |
| @@ -764,6 +764,15 @@ config CACHE_L2X0 | |||
| 764 | help | 764 | help |
| 765 | This option enables the L2x0 PrimeCell. | 765 | This option enables the L2x0 PrimeCell. |
| 766 | 766 | ||
| 767 | config CACHE_TAUROS2 | ||
| 768 | bool "Enable the Tauros2 L2 cache controller" | ||
| 769 | depends on ARCH_DOVE | ||
| 770 | default y | ||
| 771 | select OUTER_CACHE | ||
| 772 | help | ||
| 773 | This option enables the Tauros2 L2 cache controller (as | ||
| 774 | found on PJ1/PJ4). | ||
| 775 | |||
| 767 | config CACHE_XSC3L2 | 776 | config CACHE_XSC3L2 |
| 768 | bool "Enable the L2 cache on XScale3" | 777 | bool "Enable the L2 cache on XScale3" |
| 769 | depends on CPU_XSC3 | 778 | depends on CPU_XSC3 |
| @@ -774,5 +783,5 @@ config CACHE_XSC3L2 | |||
| 774 | 783 | ||
| 775 | config ARM_L1_CACHE_SHIFT | 784 | config ARM_L1_CACHE_SHIFT |
| 776 | int | 785 | int |
| 777 | default 6 if ARCH_OMAP3 | 786 | default 6 if ARCH_OMAP3 || ARCH_S5PC1XX |
| 778 | default 5 | 787 | default 5 |
diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile index 055cb2aa813..827e238e5d4 100644 --- a/arch/arm/mm/Makefile +++ b/arch/arm/mm/Makefile | |||
| @@ -6,7 +6,7 @@ obj-y := dma-mapping.o extable.o fault.o init.o \ | |||
| 6 | iomap.o | 6 | iomap.o |
| 7 | 7 | ||
| 8 | obj-$(CONFIG_MMU) += fault-armv.o flush.o ioremap.o mmap.o \ | 8 | obj-$(CONFIG_MMU) += fault-armv.o flush.o ioremap.o mmap.o \ |
| 9 | pgd.o mmu.o | 9 | pgd.o mmu.o vmregion.o |
| 10 | 10 | ||
| 11 | ifneq ($(CONFIG_MMU),y) | 11 | ifneq ($(CONFIG_MMU),y) |
| 12 | obj-y += nommu.o | 12 | obj-y += nommu.o |
| @@ -87,4 +87,4 @@ obj-$(CONFIG_CPU_V7) += proc-v7.o | |||
| 87 | obj-$(CONFIG_CACHE_FEROCEON_L2) += cache-feroceon-l2.o | 87 | obj-$(CONFIG_CACHE_FEROCEON_L2) += cache-feroceon-l2.o |
| 88 | obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o | 88 | obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o |
| 89 | obj-$(CONFIG_CACHE_XSC3L2) += cache-xsc3l2.o | 89 | obj-$(CONFIG_CACHE_XSC3L2) += cache-xsc3l2.o |
| 90 | 90 | obj-$(CONFIG_CACHE_TAUROS2) += cache-tauros2.o | |
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index b480f1d3591..747f9a9021b 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c | |||
| @@ -99,18 +99,25 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) | |||
| 99 | 99 | ||
| 100 | l2x0_base = base; | 100 | l2x0_base = base; |
| 101 | 101 | ||
| 102 | /* disable L2X0 */ | 102 | /* |
| 103 | writel(0, l2x0_base + L2X0_CTRL); | 103 | * Check if l2x0 controller is already enabled. |
| 104 | * If you are booting from non-secure mode | ||
| 105 | * accessing the below registers will fault. | ||
| 106 | */ | ||
| 107 | if (!(readl(l2x0_base + L2X0_CTRL) & 1)) { | ||
| 104 | 108 | ||
| 105 | aux = readl(l2x0_base + L2X0_AUX_CTRL); | 109 | /* l2x0 controller is disabled */ |
| 106 | aux &= aux_mask; | ||
| 107 | aux |= aux_val; | ||
| 108 | writel(aux, l2x0_base + L2X0_AUX_CTRL); | ||
| 109 | 110 | ||
| 110 | l2x0_inv_all(); | 111 | aux = readl(l2x0_base + L2X0_AUX_CTRL); |
| 112 | aux &= aux_mask; | ||
| 113 | aux |= aux_val; | ||
| 114 | writel(aux, l2x0_base + L2X0_AUX_CTRL); | ||
| 111 | 115 | ||
| 112 | /* enable L2X0 */ | 116 | l2x0_inv_all(); |
| 113 | writel(1, l2x0_base + L2X0_CTRL); | 117 | |
| 118 | /* enable L2X0 */ | ||
| 119 | writel(1, l2x0_base + L2X0_CTRL); | ||
| 120 | } | ||
| 114 | 121 | ||
| 115 | outer_cache.inv_range = l2x0_inv_range; | 122 | outer_cache.inv_range = l2x0_inv_range; |
| 116 | outer_cache.clean_range = l2x0_clean_range; | 123 | outer_cache.clean_range = l2x0_clean_range; |
diff --git a/arch/arm/mm/cache-tauros2.c b/arch/arm/mm/cache-tauros2.c new file mode 100644 index 00000000000..50868651890 --- /dev/null +++ b/arch/arm/mm/cache-tauros2.c | |||
| @@ -0,0 +1,263 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mm/cache-tauros2.c - Tauros2 L2 cache controller support | ||
| 3 | * | ||
| 4 | * Copyright (C) 2008 Marvell Semiconductor | ||
| 5 | * | ||
| 6 | * This file is licensed under the terms of the GNU General Public | ||
| 7 | * License version 2. This program is licensed "as is" without any | ||
| 8 | * warranty of any kind, whether express or implied. | ||
| 9 | * | ||
| 10 | * References: | ||
| 11 | * - PJ1 CPU Core Datasheet, | ||
| 12 | * Document ID MV-S104837-01, Rev 0.7, January 24 2008. | ||
| 13 | * - PJ4 CPU Core Datasheet, | ||
| 14 | * Document ID MV-S105190-00, Rev 0.7, March 14 2008. | ||
| 15 | */ | ||
| 16 | |||
| 17 | #include <linux/init.h> | ||
| 18 | #include <asm/cacheflush.h> | ||
| 19 | #include <asm/hardware/cache-tauros2.h> | ||
| 20 | |||
| 21 | |||
| 22 | /* | ||
| 23 | * When Tauros2 is used on a CPU that supports the v7 hierarchical | ||
| 24 | * cache operations, the cache handling code in proc-v7.S takes care | ||
| 25 | * of everything, including handling DMA coherency. | ||
| 26 | * | ||
| 27 | * So, we only need to register outer cache operations here if we're | ||
| 28 | * being used on a pre-v7 CPU, and we only need to build support for | ||
| 29 | * outer cache operations into the kernel image if the kernel has been | ||
| 30 | * configured to support a pre-v7 CPU. | ||
| 31 | */ | ||
| 32 | #if __LINUX_ARM_ARCH__ < 7 | ||
| 33 | /* | ||
| 34 | * Low-level cache maintenance operations. | ||
| 35 | */ | ||
| 36 | static inline void tauros2_clean_pa(unsigned long addr) | ||
| 37 | { | ||
| 38 | __asm__("mcr p15, 1, %0, c7, c11, 3" : : "r" (addr)); | ||
| 39 | } | ||
| 40 | |||
| 41 | static inline void tauros2_clean_inv_pa(unsigned long addr) | ||
| 42 | { | ||
| 43 | __asm__("mcr p15, 1, %0, c7, c15, 3" : : "r" (addr)); | ||
| 44 | } | ||
| 45 | |||
| 46 | static inline void tauros2_inv_pa(unsigned long addr) | ||
| 47 | { | ||
| 48 | __asm__("mcr p15, 1, %0, c7, c7, 3" : : "r" (addr)); | ||
| 49 | } | ||
| 50 | |||
| 51 | |||
| 52 | /* | ||
| 53 | * Linux primitives. | ||
| 54 | * | ||
| 55 | * Note that the end addresses passed to Linux primitives are | ||
| 56 | * noninclusive. | ||
| 57 | */ | ||
| 58 | #define CACHE_LINE_SIZE 32 | ||
| 59 | |||
| 60 | static void tauros2_inv_range(unsigned long start, unsigned long end) | ||
| 61 | { | ||
| 62 | /* | ||
| 63 | * Clean and invalidate partial first cache line. | ||
| 64 | */ | ||
| 65 | if (start & (CACHE_LINE_SIZE - 1)) { | ||
| 66 | tauros2_clean_inv_pa(start & ~(CACHE_LINE_SIZE - 1)); | ||
| 67 | start = (start | (CACHE_LINE_SIZE - 1)) + 1; | ||
| 68 | } | ||
| 69 | |||
| 70 | /* | ||
| 71 | * Clean and invalidate partial last cache line. | ||
| 72 | */ | ||
| 73 | if (end & (CACHE_LINE_SIZE - 1)) { | ||
| 74 | tauros2_clean_inv_pa(end & ~(CACHE_LINE_SIZE - 1)); | ||
| 75 | end &= ~(CACHE_LINE_SIZE - 1); | ||
| 76 | } | ||
| 77 | |||
| 78 | /* | ||
| 79 | * Invalidate all full cache lines between 'start' and 'end'. | ||
| 80 | */ | ||
| 81 | while (start < end) { | ||
| 82 | tauros2_inv_pa(start); | ||
| 83 | start += CACHE_LINE_SIZE; | ||
| 84 | } | ||
| 85 | |||
| 86 | dsb(); | ||
| 87 | } | ||
| 88 | |||
| 89 | static void tauros2_clean_range(unsigned long start, unsigned long end) | ||
| 90 | { | ||
| 91 | start &= ~(CACHE_LINE_SIZE - 1); | ||
| 92 | while (start < end) { | ||
| 93 | tauros2_clean_pa(start); | ||
| 94 | start += CACHE_LINE_SIZE; | ||
| 95 | } | ||
| 96 | |||
| 97 | dsb(); | ||
| 98 | } | ||
| 99 | |||
| 100 | static void tauros2_flush_range(unsigned long start, unsigned long end) | ||
| 101 | { | ||
| 102 | start &= ~(CACHE_LINE_SIZE - 1); | ||
| 103 | while (start < end) { | ||
| 104 | tauros2_clean_inv_pa(start); | ||
| 105 | start += CACHE_LINE_SIZE; | ||
| 106 | } | ||
| 107 | |||
| 108 | dsb(); | ||
| 109 | } | ||
| 110 | #endif | ||
| 111 | |||
| 112 | static inline u32 __init read_extra_features(void) | ||
| 113 | { | ||
| 114 | u32 u; | ||
| 115 | |||
| 116 | __asm__("mrc p15, 1, %0, c15, c1, 0" : "=r" (u)); | ||
| 117 | |||
| 118 | return u; | ||
| 119 | } | ||
| 120 | |||
| 121 | static inline void __init write_extra_features(u32 u) | ||
| 122 | { | ||
| 123 | __asm__("mcr p15, 1, %0, c15, c1, 0" : : "r" (u)); | ||
| 124 | } | ||
| 125 | |||
| 126 | static void __init disable_l2_prefetch(void) | ||
| 127 | { | ||
| 128 | u32 u; | ||
| 129 | |||
| 130 | /* | ||
| 131 | * Read the CPU Extra Features register and verify that the | ||
| 132 | * Disable L2 Prefetch bit is set. | ||
| 133 | */ | ||
| 134 | u = read_extra_features(); | ||
| 135 | if (!(u & 0x01000000)) { | ||
| 136 | printk(KERN_INFO "Tauros2: Disabling L2 prefetch.\n"); | ||
| 137 | write_extra_features(u | 0x01000000); | ||
| 138 | } | ||
| 139 | } | ||
| 140 | |||
| 141 | static inline int __init cpuid_scheme(void) | ||
| 142 | { | ||
| 143 | extern int processor_id; | ||
| 144 | |||
| 145 | return !!((processor_id & 0x000f0000) == 0x000f0000); | ||
| 146 | } | ||
| 147 | |||
| 148 | static inline u32 __init read_mmfr3(void) | ||
| 149 | { | ||
| 150 | u32 mmfr3; | ||
| 151 | |||
| 152 | __asm__("mrc p15, 0, %0, c0, c1, 7\n" : "=r" (mmfr3)); | ||
| 153 | |||
| 154 | return mmfr3; | ||
| 155 | } | ||
| 156 | |||
| 157 | static inline u32 __init read_actlr(void) | ||
| 158 | { | ||
| 159 | u32 actlr; | ||
| 160 | |||
| 161 | __asm__("mrc p15, 0, %0, c1, c0, 1\n" : "=r" (actlr)); | ||
| 162 | |||
| 163 | return actlr; | ||
| 164 | } | ||
| 165 | |||
| 166 | static inline void __init write_actlr(u32 actlr) | ||
| 167 | { | ||
| 168 | __asm__("mcr p15, 0, %0, c1, c0, 1\n" : : "r" (actlr)); | ||
| 169 | } | ||
| 170 | |||
| 171 | void __init tauros2_init(void) | ||
| 172 | { | ||
| 173 | extern int processor_id; | ||
| 174 | char *mode; | ||
| 175 | |||
| 176 | disable_l2_prefetch(); | ||
| 177 | |||
| 178 | #ifdef CONFIG_CPU_32v5 | ||
| 179 | if ((processor_id & 0xff0f0000) == 0x56050000) { | ||
| 180 | u32 feat; | ||
| 181 | |||
| 182 | /* | ||
| 183 | * v5 CPUs with Tauros2 have the L2 cache enable bit | ||
| 184 | * located in the CPU Extra Features register. | ||
| 185 | */ | ||
| 186 | feat = read_extra_features(); | ||
| 187 | if (!(feat & 0x00400000)) { | ||
| 188 | printk(KERN_INFO "Tauros2: Enabling L2 cache.\n"); | ||
| 189 | write_extra_features(feat | 0x00400000); | ||
| 190 | } | ||
| 191 | |||
| 192 | mode = "ARMv5"; | ||
| 193 | outer_cache.inv_range = tauros2_inv_range; | ||
| 194 | outer_cache.clean_range = tauros2_clean_range; | ||
| 195 | outer_cache.flush_range = tauros2_flush_range; | ||
| 196 | } | ||
| 197 | #endif | ||
| 198 | |||
| 199 | #ifdef CONFIG_CPU_32v6 | ||
| 200 | /* | ||
| 201 | * Check whether this CPU lacks support for the v7 hierarchical | ||
| 202 | * cache ops. (PJ4 is in its v6 personality mode if the MMFR3 | ||
| 203 | * register indicates no support for the v7 hierarchical cache | ||
| 204 | * ops.) | ||
| 205 | */ | ||
| 206 | if (cpuid_scheme() && (read_mmfr3() & 0xf) == 0) { | ||
| 207 | /* | ||
| 208 | * When Tauros2 is used in an ARMv6 system, the L2 | ||
| 209 | * enable bit is in the ARMv6 ARM-mandated position | ||
| 210 | * (bit [26] of the System Control Register). | ||
| 211 | */ | ||
| 212 | if (!(get_cr() & 0x04000000)) { | ||
| 213 | printk(KERN_INFO "Tauros2: Enabling L2 cache.\n"); | ||
| 214 | adjust_cr(0x04000000, 0x04000000); | ||
| 215 | } | ||
| 216 | |||
| 217 | mode = "ARMv6"; | ||
| 218 | outer_cache.inv_range = tauros2_inv_range; | ||
| 219 | outer_cache.clean_range = tauros2_clean_range; | ||
| 220 | outer_cache.flush_range = tauros2_flush_range; | ||
| 221 | } | ||
| 222 | #endif | ||
| 223 | |||
| 224 | #ifdef CONFIG_CPU_32v7 | ||
| 225 | /* | ||
| 226 | * Check whether this CPU has support for the v7 hierarchical | ||
| 227 | * cache ops. (PJ4 is in its v7 personality mode if the MMFR3 | ||
| 228 | * register indicates support for the v7 hierarchical cache | ||
| 229 | * ops.) | ||
| 230 | * | ||
| 231 | * (Although strictly speaking there may exist CPUs that | ||
| 232 | * implement the v7 cache ops but are only ARMv6 CPUs (due to | ||
| 233 | * not complying with all of the other ARMv7 requirements), | ||
| 234 | * there are no real-life examples of Tauros2 being used on | ||
| 235 | * such CPUs as of yet.) | ||
| 236 | */ | ||
| 237 | if (cpuid_scheme() && (read_mmfr3() & 0xf) == 1) { | ||
| 238 | u32 actlr; | ||
| 239 | |||
| 240 | /* | ||
| 241 | * When Tauros2 is used in an ARMv7 system, the L2 | ||
| 242 | * enable bit is located in the Auxiliary System Control | ||
| 243 | * Register (which is the only register allowed by the | ||
| 244 | * ARMv7 spec to contain fine-grained cache control bits). | ||
| 245 | */ | ||
| 246 | actlr = read_actlr(); | ||
| 247 | if (!(actlr & 0x00000002)) { | ||
| 248 | printk(KERN_INFO "Tauros2: Enabling L2 cache.\n"); | ||
| 249 | write_actlr(actlr | 0x00000002); | ||
| 250 | } | ||
| 251 | |||
| 252 | mode = "ARMv7"; | ||
| 253 | } | ||
| 254 | #endif | ||
| 255 | |||
| 256 | if (mode == NULL) { | ||
| 257 | printk(KERN_CRIT "Tauros2: Unable to detect CPU mode.\n"); | ||
| 258 | return; | ||
| 259 | } | ||
| 260 | |||
| 261 | printk(KERN_INFO "Tauros2: L2 cache support initialised " | ||
| 262 | "in %s mode.\n", mode); | ||
| 263 | } | ||
diff --git a/arch/arm/mm/copypage-v6.c b/arch/arm/mm/copypage-v6.c index 4127a7bddfe..841f355319b 100644 --- a/arch/arm/mm/copypage-v6.c +++ b/arch/arm/mm/copypage-v6.c | |||
| @@ -41,6 +41,14 @@ static void v6_copy_user_highpage_nonaliasing(struct page *to, | |||
| 41 | kfrom = kmap_atomic(from, KM_USER0); | 41 | kfrom = kmap_atomic(from, KM_USER0); |
| 42 | kto = kmap_atomic(to, KM_USER1); | 42 | kto = kmap_atomic(to, KM_USER1); |
| 43 | copy_page(kto, kfrom); | 43 | copy_page(kto, kfrom); |
| 44 | #ifdef CONFIG_HIGHMEM | ||
| 45 | /* | ||
| 46 | * kmap_atomic() doesn't set the page virtual address, and | ||
| 47 | * kunmap_atomic() takes care of cache flushing already. | ||
| 48 | */ | ||
| 49 | if (page_address(to) != NULL) | ||
| 50 | #endif | ||
| 51 | __cpuc_flush_dcache_page(kto); | ||
| 44 | kunmap_atomic(kto, KM_USER1); | 52 | kunmap_atomic(kto, KM_USER1); |
| 45 | kunmap_atomic(kfrom, KM_USER0); | 53 | kunmap_atomic(kfrom, KM_USER0); |
| 46 | } | 54 | } |
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c index b9590a7085c..26325cb5d36 100644 --- a/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c | |||
| @@ -63,194 +63,152 @@ static u64 get_coherent_dma_mask(struct device *dev) | |||
| 63 | return mask; | 63 | return mask; |
| 64 | } | 64 | } |
| 65 | 65 | ||
| 66 | #ifdef CONFIG_MMU | ||
| 67 | /* | 66 | /* |
| 68 | * These are the page tables (2MB each) covering uncached, DMA consistent allocations | 67 | * Allocate a DMA buffer for 'dev' of size 'size' using the |
| 68 | * specified gfp mask. Note that 'size' must be page aligned. | ||
| 69 | */ | 69 | */ |
| 70 | static pte_t *consistent_pte[NUM_CONSISTENT_PTES]; | 70 | static struct page *__dma_alloc_buffer(struct device *dev, size_t size, gfp_t gfp) |
| 71 | static DEFINE_SPINLOCK(consistent_lock); | 71 | { |
| 72 | unsigned long order = get_order(size); | ||
| 73 | struct page *page, *p, *e; | ||
| 74 | void *ptr; | ||
| 75 | u64 mask = get_coherent_dma_mask(dev); | ||
| 72 | 76 | ||
| 73 | /* | 77 | #ifdef CONFIG_DMA_API_DEBUG |
| 74 | * VM region handling support. | 78 | u64 limit = (mask + 1) & ~mask; |
| 75 | * | 79 | if (limit && size >= limit) { |
| 76 | * This should become something generic, handling VM region allocations for | 80 | dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n", |
| 77 | * vmalloc and similar (ioremap, module space, etc). | 81 | size, mask); |
| 78 | * | 82 | return NULL; |
| 79 | * I envisage vmalloc()'s supporting vm_struct becoming: | 83 | } |
| 80 | * | 84 | #endif |
| 81 | * struct vm_struct { | ||
| 82 | * struct vm_region region; | ||
| 83 | * unsigned long flags; | ||
| 84 | * struct page **pages; | ||
| 85 | * unsigned int nr_pages; | ||
| 86 | * unsigned long phys_addr; | ||
| 87 | * }; | ||
| 88 | * | ||
| 89 | * get_vm_area() would then call vm_region_alloc with an appropriate | ||
| 90 | * struct vm_region head (eg): | ||
| 91 | * | ||
| 92 | * struct vm_region vmalloc_head = { | ||
| 93 | * .vm_list = LIST_HEAD_INIT(vmalloc_head.vm_list), | ||
| 94 | * .vm_start = VMALLOC_START, | ||
| 95 | * .vm_end = VMALLOC_END, | ||
| 96 | * }; | ||
| 97 | * | ||
| 98 | * However, vmalloc_head.vm_start is variable (typically, it is dependent on | ||
| 99 | * the amount of RAM found at boot time.) I would imagine that get_vm_area() | ||
| 100 | * would have to initialise this each time prior to calling vm_region_alloc(). | ||
| 101 | */ | ||
| 102 | struct arm_vm_region { | ||
| 103 | struct list_head vm_list; | ||
| 104 | unsigned long vm_start; | ||
| 105 | unsigned long vm_end; | ||
| 106 | struct page *vm_pages; | ||
| 107 | int vm_active; | ||
| 108 | }; | ||
| 109 | 85 | ||
| 110 | static struct arm_vm_region consistent_head = { | 86 | if (!mask) |
| 111 | .vm_list = LIST_HEAD_INIT(consistent_head.vm_list), | 87 | return NULL; |
| 112 | .vm_start = CONSISTENT_BASE, | ||
| 113 | .vm_end = CONSISTENT_END, | ||
| 114 | }; | ||
| 115 | 88 | ||
| 116 | static struct arm_vm_region * | 89 | if (mask < 0xffffffffULL) |
| 117 | arm_vm_region_alloc(struct arm_vm_region *head, size_t size, gfp_t gfp) | 90 | gfp |= GFP_DMA; |
| 118 | { | 91 | |
| 119 | unsigned long addr = head->vm_start, end = head->vm_end - size; | 92 | page = alloc_pages(gfp, order); |
| 120 | unsigned long flags; | 93 | if (!page) |
| 121 | struct arm_vm_region *c, *new; | 94 | return NULL; |
| 122 | |||
| 123 | new = kmalloc(sizeof(struct arm_vm_region), gfp); | ||
| 124 | if (!new) | ||
| 125 | goto out; | ||
| 126 | |||
| 127 | spin_lock_irqsave(&consistent_lock, flags); | ||
| 128 | |||
| 129 | list_for_each_entry(c, &head->vm_list, vm_list) { | ||
| 130 | if ((addr + size) < addr) | ||
| 131 | goto nospc; | ||
| 132 | if ((addr + size) <= c->vm_start) | ||
| 133 | goto found; | ||
| 134 | addr = c->vm_end; | ||
| 135 | if (addr > end) | ||
| 136 | goto nospc; | ||
| 137 | } | ||
| 138 | 95 | ||
| 139 | found: | ||
| 140 | /* | 96 | /* |
| 141 | * Insert this entry _before_ the one we found. | 97 | * Now split the huge page and free the excess pages |
| 142 | */ | 98 | */ |
| 143 | list_add_tail(&new->vm_list, &c->vm_list); | 99 | split_page(page, order); |
| 144 | new->vm_start = addr; | 100 | for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++) |
| 145 | new->vm_end = addr + size; | 101 | __free_page(p); |
| 146 | new->vm_active = 1; | 102 | |
| 147 | 103 | /* | |
| 148 | spin_unlock_irqrestore(&consistent_lock, flags); | 104 | * Ensure that the allocated pages are zeroed, and that any data |
| 149 | return new; | 105 | * lurking in the kernel direct-mapped region is invalidated. |
| 150 | 106 | */ | |
| 151 | nospc: | 107 | ptr = page_address(page); |
| 152 | spin_unlock_irqrestore(&consistent_lock, flags); | 108 | memset(ptr, 0, size); |
| 153 | kfree(new); | 109 | dmac_flush_range(ptr, ptr + size); |
| 154 | out: | 110 | outer_flush_range(__pa(ptr), __pa(ptr) + size); |
| 155 | return NULL; | 111 | |
| 112 | return page; | ||
| 156 | } | 113 | } |
| 157 | 114 | ||
| 158 | static struct arm_vm_region *arm_vm_region_find(struct arm_vm_region *head, unsigned long addr) | 115 | /* |
| 116 | * Free a DMA buffer. 'size' must be page aligned. | ||
| 117 | */ | ||
| 118 | static void __dma_free_buffer(struct page *page, size_t size) | ||
| 159 | { | 119 | { |
| 160 | struct arm_vm_region *c; | 120 | struct page *e = page + (size >> PAGE_SHIFT); |
| 161 | 121 | ||
| 162 | list_for_each_entry(c, &head->vm_list, vm_list) { | 122 | while (page < e) { |
| 163 | if (c->vm_active && c->vm_start == addr) | 123 | __free_page(page); |
| 164 | goto out; | 124 | page++; |
| 165 | } | 125 | } |
| 166 | c = NULL; | ||
| 167 | out: | ||
| 168 | return c; | ||
| 169 | } | 126 | } |
| 170 | 127 | ||
| 128 | #ifdef CONFIG_MMU | ||
| 129 | /* | ||
| 130 | * These are the page tables (2MB each) covering uncached, DMA consistent allocations | ||
| 131 | */ | ||
| 132 | static pte_t *consistent_pte[NUM_CONSISTENT_PTES]; | ||
| 133 | |||
| 134 | #include "vmregion.h" | ||
| 135 | |||
| 136 | static struct arm_vmregion_head consistent_head = { | ||
| 137 | .vm_lock = __SPIN_LOCK_UNLOCKED(&consistent_head.vm_lock), | ||
| 138 | .vm_list = LIST_HEAD_INIT(consistent_head.vm_list), | ||
| 139 | .vm_start = CONSISTENT_BASE, | ||
| 140 | .vm_end = CONSISTENT_END, | ||
| 141 | }; | ||
| 142 | |||
| 171 | #ifdef CONFIG_HUGETLB_PAGE | 143 | #ifdef CONFIG_HUGETLB_PAGE |
| 172 | #error ARM Coherent DMA allocator does not (yet) support huge TLB | 144 | #error ARM Coherent DMA allocator does not (yet) support huge TLB |
| 173 | #endif | 145 | #endif |
| 174 | 146 | ||
| 175 | static void * | 147 | /* |
| 176 | __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp, | 148 | * Initialise the consistent memory allocation. |
| 177 | pgprot_t prot) | 149 | */ |
| 150 | static int __init consistent_init(void) | ||
| 178 | { | 151 | { |
| 179 | struct page *page; | 152 | int ret = 0; |
| 180 | struct arm_vm_region *c; | 153 | pgd_t *pgd; |
| 181 | unsigned long order; | 154 | pmd_t *pmd; |
| 182 | u64 mask = get_coherent_dma_mask(dev); | 155 | pte_t *pte; |
| 183 | u64 limit; | 156 | int i = 0; |
| 157 | u32 base = CONSISTENT_BASE; | ||
| 184 | 158 | ||
| 185 | if (!consistent_pte[0]) { | 159 | do { |
| 186 | printk(KERN_ERR "%s: not initialised\n", __func__); | 160 | pgd = pgd_offset(&init_mm, base); |
| 187 | dump_stack(); | 161 | pmd = pmd_alloc(&init_mm, pgd, base); |
| 188 | return NULL; | 162 | if (!pmd) { |
| 189 | } | 163 | printk(KERN_ERR "%s: no pmd tables\n", __func__); |
| 164 | ret = -ENOMEM; | ||
| 165 | break; | ||
| 166 | } | ||
| 167 | WARN_ON(!pmd_none(*pmd)); | ||
| 190 | 168 | ||
| 191 | if (!mask) | 169 | pte = pte_alloc_kernel(pmd, base); |
| 192 | goto no_page; | 170 | if (!pte) { |
| 171 | printk(KERN_ERR "%s: no pte tables\n", __func__); | ||
| 172 | ret = -ENOMEM; | ||
| 173 | break; | ||
| 174 | } | ||
| 193 | 175 | ||
| 194 | /* | 176 | consistent_pte[i++] = pte; |
| 195 | * Sanity check the allocation size. | 177 | base += (1 << PGDIR_SHIFT); |
| 196 | */ | 178 | } while (base < CONSISTENT_END); |
| 197 | size = PAGE_ALIGN(size); | ||
| 198 | limit = (mask + 1) & ~mask; | ||
| 199 | if ((limit && size >= limit) || | ||
| 200 | size >= (CONSISTENT_END - CONSISTENT_BASE)) { | ||
| 201 | printk(KERN_WARNING "coherent allocation too big " | ||
| 202 | "(requested %#x mask %#llx)\n", size, mask); | ||
| 203 | goto no_page; | ||
| 204 | } | ||
| 205 | 179 | ||
| 206 | order = get_order(size); | 180 | return ret; |
| 181 | } | ||
| 207 | 182 | ||
| 208 | if (mask < 0xffffffffULL) | 183 | core_initcall(consistent_init); |
| 209 | gfp |= GFP_DMA; | ||
| 210 | 184 | ||
| 211 | page = alloc_pages(gfp, order); | 185 | static void * |
| 212 | if (!page) | 186 | __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot) |
| 213 | goto no_page; | 187 | { |
| 188 | struct arm_vmregion *c; | ||
| 214 | 189 | ||
| 215 | /* | 190 | if (!consistent_pte[0]) { |
| 216 | * Invalidate any data that might be lurking in the | 191 | printk(KERN_ERR "%s: not initialised\n", __func__); |
| 217 | * kernel direct-mapped region for device DMA. | 192 | dump_stack(); |
| 218 | */ | 193 | return NULL; |
| 219 | { | ||
| 220 | void *ptr = page_address(page); | ||
| 221 | memset(ptr, 0, size); | ||
| 222 | dmac_flush_range(ptr, ptr + size); | ||
| 223 | outer_flush_range(__pa(ptr), __pa(ptr) + size); | ||
| 224 | } | 194 | } |
| 225 | 195 | ||
| 226 | /* | 196 | /* |
| 227 | * Allocate a virtual address in the consistent mapping region. | 197 | * Allocate a virtual address in the consistent mapping region. |
| 228 | */ | 198 | */ |
| 229 | c = arm_vm_region_alloc(&consistent_head, size, | 199 | c = arm_vmregion_alloc(&consistent_head, size, |
| 230 | gfp & ~(__GFP_DMA | __GFP_HIGHMEM)); | 200 | gfp & ~(__GFP_DMA | __GFP_HIGHMEM)); |
| 231 | if (c) { | 201 | if (c) { |
| 232 | pte_t *pte; | 202 | pte_t *pte; |
| 233 | struct page *end = page + (1 << order); | ||
| 234 | int idx = CONSISTENT_PTE_INDEX(c->vm_start); | 203 | int idx = CONSISTENT_PTE_INDEX(c->vm_start); |
| 235 | u32 off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1); | 204 | u32 off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1); |
| 236 | 205 | ||
| 237 | pte = consistent_pte[idx] + off; | 206 | pte = consistent_pte[idx] + off; |
| 238 | c->vm_pages = page; | 207 | c->vm_pages = page; |
| 239 | 208 | ||
| 240 | split_page(page, order); | ||
| 241 | |||
| 242 | /* | ||
| 243 | * Set the "dma handle" | ||
| 244 | */ | ||
| 245 | *handle = page_to_dma(dev, page); | ||
| 246 | |||
| 247 | do { | 209 | do { |
| 248 | BUG_ON(!pte_none(*pte)); | 210 | BUG_ON(!pte_none(*pte)); |
| 249 | 211 | ||
| 250 | /* | ||
| 251 | * x86 does not mark the pages reserved... | ||
| 252 | */ | ||
| 253 | SetPageReserved(page); | ||
| 254 | set_pte_ext(pte, mk_pte(page, prot), 0); | 212 | set_pte_ext(pte, mk_pte(page, prot), 0); |
| 255 | page++; | 213 | page++; |
| 256 | pte++; | 214 | pte++; |
| @@ -261,48 +219,90 @@ __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp, | |||
| 261 | } | 219 | } |
| 262 | } while (size -= PAGE_SIZE); | 220 | } while (size -= PAGE_SIZE); |
| 263 | 221 | ||
| 264 | /* | ||
| 265 | * Free the otherwise unused pages. | ||
| 266 | */ | ||
| 267 | while (page < end) { | ||
| 268 | __free_page(page); | ||
| 269 | page++; | ||
| 270 | } | ||
| 271 | |||
| 272 | return (void *)c->vm_start; | 222 | return (void *)c->vm_start; |
| 273 | } | 223 | } |
| 274 | |||
| 275 | if (page) | ||
| 276 | __free_pages(page, order); | ||
| 277 | no_page: | ||
| 278 | *handle = ~0; | ||
| 279 | return NULL; | 224 | return NULL; |
| 280 | } | 225 | } |
| 226 | |||
| 227 | static void __dma_free_remap(void *cpu_addr, size_t size) | ||
| 228 | { | ||
| 229 | struct arm_vmregion *c; | ||
| 230 | unsigned long addr; | ||
| 231 | pte_t *ptep; | ||
| 232 | int idx; | ||
| 233 | u32 off; | ||
| 234 | |||
| 235 | c = arm_vmregion_find_remove(&consistent_head, (unsigned long)cpu_addr); | ||
| 236 | if (!c) { | ||
| 237 | printk(KERN_ERR "%s: trying to free invalid coherent area: %p\n", | ||
| 238 | __func__, cpu_addr); | ||
| 239 | dump_stack(); | ||
| 240 | return; | ||
| 241 | } | ||
| 242 | |||
| 243 | if ((c->vm_end - c->vm_start) != size) { | ||
| 244 | printk(KERN_ERR "%s: freeing wrong coherent size (%ld != %d)\n", | ||
| 245 | __func__, c->vm_end - c->vm_start, size); | ||
| 246 | dump_stack(); | ||
| 247 | size = c->vm_end - c->vm_start; | ||
| 248 | } | ||
| 249 | |||
| 250 | idx = CONSISTENT_PTE_INDEX(c->vm_start); | ||
| 251 | off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1); | ||
| 252 | ptep = consistent_pte[idx] + off; | ||
| 253 | addr = c->vm_start; | ||
| 254 | do { | ||
| 255 | pte_t pte = ptep_get_and_clear(&init_mm, addr, ptep); | ||
| 256 | |||
| 257 | ptep++; | ||
| 258 | addr += PAGE_SIZE; | ||
| 259 | off++; | ||
| 260 | if (off >= PTRS_PER_PTE) { | ||
| 261 | off = 0; | ||
| 262 | ptep = consistent_pte[++idx]; | ||
| 263 | } | ||
| 264 | |||
| 265 | if (pte_none(pte) || !pte_present(pte)) | ||
| 266 | printk(KERN_CRIT "%s: bad page in kernel page table\n", | ||
| 267 | __func__); | ||
| 268 | } while (size -= PAGE_SIZE); | ||
| 269 | |||
| 270 | flush_tlb_kernel_range(c->vm_start, c->vm_end); | ||
| 271 | |||
| 272 | arm_vmregion_free(&consistent_head, c); | ||
| 273 | } | ||
| 274 | |||
| 281 | #else /* !CONFIG_MMU */ | 275 | #else /* !CONFIG_MMU */ |
| 276 | |||
| 277 | #define __dma_alloc_remap(page, size, gfp, prot) page_address(page) | ||
| 278 | #define __dma_free_remap(addr, size) do { } while (0) | ||
| 279 | |||
| 280 | #endif /* CONFIG_MMU */ | ||
| 281 | |||
| 282 | static void * | 282 | static void * |
| 283 | __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp, | 283 | __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp, |
| 284 | pgprot_t prot) | 284 | pgprot_t prot) |
| 285 | { | 285 | { |
| 286 | void *virt; | 286 | struct page *page; |
| 287 | u64 mask = get_coherent_dma_mask(dev); | 287 | void *addr; |
| 288 | 288 | ||
| 289 | if (!mask) | 289 | *handle = ~0; |
| 290 | goto error; | 290 | size = PAGE_ALIGN(size); |
| 291 | 291 | ||
| 292 | if (mask < 0xffffffffULL) | 292 | page = __dma_alloc_buffer(dev, size, gfp); |
| 293 | gfp |= GFP_DMA; | 293 | if (!page) |
| 294 | virt = kmalloc(size, gfp); | 294 | return NULL; |
| 295 | if (!virt) | ||
| 296 | goto error; | ||
| 297 | 295 | ||
| 298 | *handle = virt_to_dma(dev, virt); | 296 | if (!arch_is_coherent()) |
| 299 | return virt; | 297 | addr = __dma_alloc_remap(page, size, gfp, prot); |
| 298 | else | ||
| 299 | addr = page_address(page); | ||
| 300 | 300 | ||
| 301 | error: | 301 | if (addr) |
| 302 | *handle = ~0; | 302 | *handle = page_to_dma(dev, page); |
| 303 | return NULL; | 303 | |
| 304 | return addr; | ||
| 304 | } | 305 | } |
| 305 | #endif /* CONFIG_MMU */ | ||
| 306 | 306 | ||
| 307 | /* | 307 | /* |
| 308 | * Allocate DMA-coherent memory space and return both the kernel remapped | 308 | * Allocate DMA-coherent memory space and return both the kernel remapped |
| @@ -316,19 +316,8 @@ dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gf | |||
| 316 | if (dma_alloc_from_coherent(dev, size, handle, &memory)) | 316 | if (dma_alloc_from_coherent(dev, size, handle, &memory)) |
| 317 | return memory; | 317 | return memory; |
| 318 | 318 | ||
| 319 | if (arch_is_coherent()) { | ||
| 320 | void *virt; | ||
| 321 | |||
| 322 | virt = kmalloc(size, gfp); | ||
| 323 | if (!virt) | ||
| 324 | return NULL; | ||
| 325 | *handle = virt_to_dma(dev, virt); | ||
| 326 | |||
| 327 | return virt; | ||
| 328 | } | ||
| 329 | |||
| 330 | return __dma_alloc(dev, size, handle, gfp, | 319 | return __dma_alloc(dev, size, handle, gfp, |
| 331 | pgprot_noncached(pgprot_kernel)); | 320 | pgprot_dmacoherent(pgprot_kernel)); |
| 332 | } | 321 | } |
| 333 | EXPORT_SYMBOL(dma_alloc_coherent); | 322 | EXPORT_SYMBOL(dma_alloc_coherent); |
| 334 | 323 | ||
| @@ -349,15 +338,12 @@ static int dma_mmap(struct device *dev, struct vm_area_struct *vma, | |||
| 349 | { | 338 | { |
| 350 | int ret = -ENXIO; | 339 | int ret = -ENXIO; |
| 351 | #ifdef CONFIG_MMU | 340 | #ifdef CONFIG_MMU |
| 352 | unsigned long flags, user_size, kern_size; | 341 | unsigned long user_size, kern_size; |
| 353 | struct arm_vm_region *c; | 342 | struct arm_vmregion *c; |
| 354 | 343 | ||
| 355 | user_size = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT; | 344 | user_size = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT; |
| 356 | 345 | ||
| 357 | spin_lock_irqsave(&consistent_lock, flags); | 346 | c = arm_vmregion_find(&consistent_head, (unsigned long)cpu_addr); |
| 358 | c = arm_vm_region_find(&consistent_head, (unsigned long)cpu_addr); | ||
| 359 | spin_unlock_irqrestore(&consistent_lock, flags); | ||
| 360 | |||
| 361 | if (c) { | 347 | if (c) { |
| 362 | unsigned long off = vma->vm_pgoff; | 348 | unsigned long off = vma->vm_pgoff; |
| 363 | 349 | ||
| @@ -379,7 +365,7 @@ static int dma_mmap(struct device *dev, struct vm_area_struct *vma, | |||
| 379 | int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma, | 365 | int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma, |
| 380 | void *cpu_addr, dma_addr_t dma_addr, size_t size) | 366 | void *cpu_addr, dma_addr_t dma_addr, size_t size) |
| 381 | { | 367 | { |
| 382 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); | 368 | vma->vm_page_prot = pgprot_dmacoherent(vma->vm_page_prot); |
| 383 | return dma_mmap(dev, vma, cpu_addr, dma_addr, size); | 369 | return dma_mmap(dev, vma, cpu_addr, dma_addr, size); |
| 384 | } | 370 | } |
| 385 | EXPORT_SYMBOL(dma_mmap_coherent); | 371 | EXPORT_SYMBOL(dma_mmap_coherent); |
| @@ -396,144 +382,23 @@ EXPORT_SYMBOL(dma_mmap_writecombine); | |||
| 396 | * free a page as defined by the above mapping. | 382 | * free a page as defined by the above mapping. |
| 397 | * Must not be called with IRQs disabled. | 383 | * Must not be called with IRQs disabled. |
| 398 | */ | 384 | */ |
| 399 | #ifdef CONFIG_MMU | ||
| 400 | void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t handle) | 385 | void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t handle) |
| 401 | { | 386 | { |
| 402 | struct arm_vm_region *c; | ||
| 403 | unsigned long flags, addr; | ||
| 404 | pte_t *ptep; | ||
| 405 | int idx; | ||
| 406 | u32 off; | ||
| 407 | |||
| 408 | WARN_ON(irqs_disabled()); | 387 | WARN_ON(irqs_disabled()); |
| 409 | 388 | ||
| 410 | if (dma_release_from_coherent(dev, get_order(size), cpu_addr)) | 389 | if (dma_release_from_coherent(dev, get_order(size), cpu_addr)) |
| 411 | return; | 390 | return; |
| 412 | 391 | ||
| 413 | if (arch_is_coherent()) { | ||
| 414 | kfree(cpu_addr); | ||
| 415 | return; | ||
| 416 | } | ||
| 417 | |||
| 418 | size = PAGE_ALIGN(size); | 392 | size = PAGE_ALIGN(size); |
| 419 | 393 | ||
| 420 | spin_lock_irqsave(&consistent_lock, flags); | 394 | if (!arch_is_coherent()) |
| 421 | c = arm_vm_region_find(&consistent_head, (unsigned long)cpu_addr); | 395 | __dma_free_remap(cpu_addr, size); |
| 422 | if (!c) | ||
| 423 | goto no_area; | ||
| 424 | |||
| 425 | c->vm_active = 0; | ||
| 426 | spin_unlock_irqrestore(&consistent_lock, flags); | ||
| 427 | |||
| 428 | if ((c->vm_end - c->vm_start) != size) { | ||
| 429 | printk(KERN_ERR "%s: freeing wrong coherent size (%ld != %d)\n", | ||
| 430 | __func__, c->vm_end - c->vm_start, size); | ||
| 431 | dump_stack(); | ||
| 432 | size = c->vm_end - c->vm_start; | ||
| 433 | } | ||
| 434 | |||
| 435 | idx = CONSISTENT_PTE_INDEX(c->vm_start); | ||
| 436 | off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1); | ||
| 437 | ptep = consistent_pte[idx] + off; | ||
| 438 | addr = c->vm_start; | ||
| 439 | do { | ||
| 440 | pte_t pte = ptep_get_and_clear(&init_mm, addr, ptep); | ||
| 441 | unsigned long pfn; | ||
| 442 | |||
| 443 | ptep++; | ||
| 444 | addr += PAGE_SIZE; | ||
| 445 | off++; | ||
| 446 | if (off >= PTRS_PER_PTE) { | ||
| 447 | off = 0; | ||
| 448 | ptep = consistent_pte[++idx]; | ||
| 449 | } | ||
| 450 | |||
| 451 | if (!pte_none(pte) && pte_present(pte)) { | ||
| 452 | pfn = pte_pfn(pte); | ||
| 453 | |||
| 454 | if (pfn_valid(pfn)) { | ||
| 455 | struct page *page = pfn_to_page(pfn); | ||
| 456 | |||
| 457 | /* | ||
| 458 | * x86 does not mark the pages reserved... | ||
| 459 | */ | ||
| 460 | ClearPageReserved(page); | ||
| 461 | |||
| 462 | __free_page(page); | ||
| 463 | continue; | ||
| 464 | } | ||
| 465 | } | ||
| 466 | |||
| 467 | printk(KERN_CRIT "%s: bad page in kernel page table\n", | ||
| 468 | __func__); | ||
| 469 | } while (size -= PAGE_SIZE); | ||
| 470 | |||
| 471 | flush_tlb_kernel_range(c->vm_start, c->vm_end); | ||
| 472 | |||
| 473 | spin_lock_irqsave(&consistent_lock, flags); | ||
| 474 | list_del(&c->vm_list); | ||
| 475 | spin_unlock_irqrestore(&consistent_lock, flags); | ||
| 476 | |||
| 477 | kfree(c); | ||
| 478 | return; | ||
| 479 | 396 | ||
| 480 | no_area: | 397 | __dma_free_buffer(dma_to_page(dev, handle), size); |
| 481 | spin_unlock_irqrestore(&consistent_lock, flags); | ||
| 482 | printk(KERN_ERR "%s: trying to free invalid coherent area: %p\n", | ||
| 483 | __func__, cpu_addr); | ||
| 484 | dump_stack(); | ||
| 485 | } | 398 | } |
| 486 | #else /* !CONFIG_MMU */ | ||
| 487 | void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t handle) | ||
| 488 | { | ||
| 489 | if (dma_release_from_coherent(dev, get_order(size), cpu_addr)) | ||
| 490 | return; | ||
| 491 | kfree(cpu_addr); | ||
| 492 | } | ||
| 493 | #endif /* CONFIG_MMU */ | ||
| 494 | EXPORT_SYMBOL(dma_free_coherent); | 399 | EXPORT_SYMBOL(dma_free_coherent); |
| 495 | 400 | ||
| 496 | /* | 401 | /* |
| 497 | * Initialise the consistent memory allocation. | ||
| 498 | */ | ||
| 499 | static int __init consistent_init(void) | ||
| 500 | { | ||
| 501 | int ret = 0; | ||
| 502 | #ifdef CONFIG_MMU | ||
| 503 | pgd_t *pgd; | ||
| 504 | pmd_t *pmd; | ||
| 505 | pte_t *pte; | ||
| 506 | int i = 0; | ||
| 507 | u32 base = CONSISTENT_BASE; | ||
| 508 | |||
| 509 | do { | ||
| 510 | pgd = pgd_offset(&init_mm, base); | ||
| 511 | pmd = pmd_alloc(&init_mm, pgd, base); | ||
| 512 | if (!pmd) { | ||
| 513 | printk(KERN_ERR "%s: no pmd tables\n", __func__); | ||
| 514 | ret = -ENOMEM; | ||
| 515 | break; | ||
| 516 | } | ||
| 517 | WARN_ON(!pmd_none(*pmd)); | ||
| 518 | |||
| 519 | pte = pte_alloc_kernel(pmd, base); | ||
| 520 | if (!pte) { | ||
| 521 | printk(KERN_ERR "%s: no pte tables\n", __func__); | ||
| 522 | ret = -ENOMEM; | ||
| 523 | break; | ||
| 524 | } | ||
| 525 | |||
| 526 | consistent_pte[i++] = pte; | ||
| 527 | base += (1 << PGDIR_SHIFT); | ||
| 528 | } while (base < CONSISTENT_END); | ||
| 529 | #endif /* !CONFIG_MMU */ | ||
| 530 | |||
| 531 | return ret; | ||
| 532 | } | ||
| 533 | |||
| 534 | core_initcall(consistent_init); | ||
| 535 | |||
| 536 | /* | ||
| 537 | * Make an area consistent for devices. | 402 | * Make an area consistent for devices. |
| 538 | * Note: Drivers should NOT use this function directly, as it will break | 403 | * Note: Drivers should NOT use this function directly, as it will break |
| 539 | * platforms with CONFIG_DMABOUNCE. | 404 | * platforms with CONFIG_DMABOUNCE. |
diff --git a/arch/arm/mm/fault-armv.c b/arch/arm/mm/fault-armv.c index d0d17b6a370..72960229195 100644 --- a/arch/arm/mm/fault-armv.c +++ b/arch/arm/mm/fault-armv.c | |||
| @@ -23,6 +23,8 @@ | |||
| 23 | #include <asm/pgtable.h> | 23 | #include <asm/pgtable.h> |
| 24 | #include <asm/tlbflush.h> | 24 | #include <asm/tlbflush.h> |
| 25 | 25 | ||
| 26 | #include "mm.h" | ||
| 27 | |||
| 26 | static unsigned long shared_pte_mask = L_PTE_MT_BUFFERABLE; | 28 | static unsigned long shared_pte_mask = L_PTE_MT_BUFFERABLE; |
| 27 | 29 | ||
| 28 | /* | 30 | /* |
| @@ -151,7 +153,14 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte) | |||
| 151 | if (!pfn_valid(pfn)) | 153 | if (!pfn_valid(pfn)) |
| 152 | return; | 154 | return; |
| 153 | 155 | ||
| 156 | /* | ||
| 157 | * The zero page is never written to, so never has any dirty | ||
| 158 | * cache lines, and therefore never needs to be flushed. | ||
| 159 | */ | ||
| 154 | page = pfn_to_page(pfn); | 160 | page = pfn_to_page(pfn); |
| 161 | if (page == ZERO_PAGE(0)) | ||
| 162 | return; | ||
| 163 | |||
| 155 | mapping = page_mapping(page); | 164 | mapping = page_mapping(page); |
| 156 | #ifndef CONFIG_SMP | 165 | #ifndef CONFIG_SMP |
| 157 | if (test_and_clear_bit(PG_dcache_dirty, &page->flags)) | 166 | if (test_and_clear_bit(PG_dcache_dirty, &page->flags)) |
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c index 7f294f307c8..329594e760c 100644 --- a/arch/arm/mm/flush.c +++ b/arch/arm/mm/flush.c | |||
| @@ -35,14 +35,12 @@ static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr) | |||
| 35 | : | 35 | : |
| 36 | : "r" (to), "r" (to + PAGE_SIZE - L1_CACHE_BYTES), "r" (zero) | 36 | : "r" (to), "r" (to + PAGE_SIZE - L1_CACHE_BYTES), "r" (zero) |
| 37 | : "cc"); | 37 | : "cc"); |
| 38 | __flush_icache_all(); | ||
| 39 | } | 38 | } |
| 40 | 39 | ||
| 41 | void flush_cache_mm(struct mm_struct *mm) | 40 | void flush_cache_mm(struct mm_struct *mm) |
| 42 | { | 41 | { |
| 43 | if (cache_is_vivt()) { | 42 | if (cache_is_vivt()) { |
| 44 | if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(mm))) | 43 | vivt_flush_cache_mm(mm); |
| 45 | __cpuc_flush_user_all(); | ||
| 46 | return; | 44 | return; |
| 47 | } | 45 | } |
| 48 | 46 | ||
| @@ -52,16 +50,13 @@ void flush_cache_mm(struct mm_struct *mm) | |||
| 52 | : | 50 | : |
| 53 | : "r" (0) | 51 | : "r" (0) |
| 54 | : "cc"); | 52 | : "cc"); |
| 55 | __flush_icache_all(); | ||
| 56 | } | 53 | } |
| 57 | } | 54 | } |
| 58 | 55 | ||
| 59 | void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end) | 56 | void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end) |
| 60 | { | 57 | { |
| 61 | if (cache_is_vivt()) { | 58 | if (cache_is_vivt()) { |
| 62 | if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) | 59 | vivt_flush_cache_range(vma, start, end); |
| 63 | __cpuc_flush_user_range(start & PAGE_MASK, PAGE_ALIGN(end), | ||
| 64 | vma->vm_flags); | ||
| 65 | return; | 60 | return; |
| 66 | } | 61 | } |
| 67 | 62 | ||
| @@ -71,22 +66,26 @@ void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned | |||
| 71 | : | 66 | : |
| 72 | : "r" (0) | 67 | : "r" (0) |
| 73 | : "cc"); | 68 | : "cc"); |
| 74 | __flush_icache_all(); | ||
| 75 | } | 69 | } |
| 70 | |||
| 71 | if (vma->vm_flags & VM_EXEC) | ||
| 72 | __flush_icache_all(); | ||
| 76 | } | 73 | } |
| 77 | 74 | ||
| 78 | void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn) | 75 | void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn) |
| 79 | { | 76 | { |
| 80 | if (cache_is_vivt()) { | 77 | if (cache_is_vivt()) { |
| 81 | if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) { | 78 | vivt_flush_cache_page(vma, user_addr, pfn); |
| 82 | unsigned long addr = user_addr & PAGE_MASK; | ||
| 83 | __cpuc_flush_user_range(addr, addr + PAGE_SIZE, vma->vm_flags); | ||
| 84 | } | ||
| 85 | return; | 79 | return; |
| 86 | } | 80 | } |
| 87 | 81 | ||
| 88 | if (cache_is_vipt_aliasing()) | 82 | if (cache_is_vipt_aliasing()) { |
| 89 | flush_pfn_alias(pfn, user_addr); | 83 | flush_pfn_alias(pfn, user_addr); |
| 84 | __flush_icache_all(); | ||
| 85 | } | ||
| 86 | |||
| 87 | if (vma->vm_flags & VM_EXEC && icache_is_vivt_asid_tagged()) | ||
| 88 | __flush_icache_all(); | ||
| 90 | } | 89 | } |
| 91 | 90 | ||
| 92 | void flush_ptrace_access(struct vm_area_struct *vma, struct page *page, | 91 | void flush_ptrace_access(struct vm_area_struct *vma, struct page *page, |
| @@ -94,15 +93,13 @@ void flush_ptrace_access(struct vm_area_struct *vma, struct page *page, | |||
| 94 | unsigned long len, int write) | 93 | unsigned long len, int write) |
| 95 | { | 94 | { |
| 96 | if (cache_is_vivt()) { | 95 | if (cache_is_vivt()) { |
| 97 | if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) { | 96 | vivt_flush_ptrace_access(vma, page, uaddr, kaddr, len, write); |
| 98 | unsigned long addr = (unsigned long)kaddr; | ||
| 99 | __cpuc_coherent_kern_range(addr, addr + len); | ||
| 100 | } | ||
| 101 | return; | 97 | return; |
| 102 | } | 98 | } |
| 103 | 99 | ||
| 104 | if (cache_is_vipt_aliasing()) { | 100 | if (cache_is_vipt_aliasing()) { |
| 105 | flush_pfn_alias(page_to_pfn(page), uaddr); | 101 | flush_pfn_alias(page_to_pfn(page), uaddr); |
| 102 | __flush_icache_all(); | ||
| 106 | return; | 103 | return; |
| 107 | } | 104 | } |
| 108 | 105 | ||
| @@ -120,6 +117,8 @@ void flush_ptrace_access(struct vm_area_struct *vma, struct page *page, | |||
| 120 | 117 | ||
| 121 | void __flush_dcache_page(struct address_space *mapping, struct page *page) | 118 | void __flush_dcache_page(struct address_space *mapping, struct page *page) |
| 122 | { | 119 | { |
| 120 | void *addr = page_address(page); | ||
| 121 | |||
| 123 | /* | 122 | /* |
| 124 | * Writeback any data associated with the kernel mapping of this | 123 | * Writeback any data associated with the kernel mapping of this |
| 125 | * page. This ensures that data in the physical page is mutually | 124 | * page. This ensures that data in the physical page is mutually |
| @@ -130,9 +129,9 @@ void __flush_dcache_page(struct address_space *mapping, struct page *page) | |||
| 130 | * kmap_atomic() doesn't set the page virtual address, and | 129 | * kmap_atomic() doesn't set the page virtual address, and |
| 131 | * kunmap_atomic() takes care of cache flushing already. | 130 | * kunmap_atomic() takes care of cache flushing already. |
| 132 | */ | 131 | */ |
| 133 | if (page_address(page)) | 132 | if (addr) |
| 134 | #endif | 133 | #endif |
| 135 | __cpuc_flush_dcache_page(page_address(page)); | 134 | __cpuc_flush_dcache_page(addr); |
| 136 | 135 | ||
| 137 | /* | 136 | /* |
| 138 | * If this is a page cache page, and we have an aliasing VIPT cache, | 137 | * If this is a page cache page, and we have an aliasing VIPT cache, |
| @@ -196,7 +195,16 @@ static void __flush_dcache_aliases(struct address_space *mapping, struct page *p | |||
| 196 | */ | 195 | */ |
| 197 | void flush_dcache_page(struct page *page) | 196 | void flush_dcache_page(struct page *page) |
| 198 | { | 197 | { |
| 199 | struct address_space *mapping = page_mapping(page); | 198 | struct address_space *mapping; |
| 199 | |||
| 200 | /* | ||
| 201 | * The zero page is never written to, so never has any dirty | ||
| 202 | * cache lines, and therefore never needs to be flushed. | ||
| 203 | */ | ||
| 204 | if (page == ZERO_PAGE(0)) | ||
| 205 | return; | ||
| 206 | |||
| 207 | mapping = page_mapping(page); | ||
| 200 | 208 | ||
| 201 | #ifndef CONFIG_SMP | 209 | #ifndef CONFIG_SMP |
| 202 | if (!PageHighMem(page) && mapping && !mapping_mapped(mapping)) | 210 | if (!PageHighMem(page) && mapping && !mapping_mapped(mapping)) |
| @@ -242,6 +250,7 @@ void __flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned l | |||
| 242 | * userspace address only. | 250 | * userspace address only. |
| 243 | */ | 251 | */ |
| 244 | flush_pfn_alias(pfn, vmaddr); | 252 | flush_pfn_alias(pfn, vmaddr); |
| 253 | __flush_icache_all(); | ||
| 245 | } | 254 | } |
| 246 | 255 | ||
| 247 | /* | 256 | /* |
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h index c4f6f05198e..a888363398f 100644 --- a/arch/arm/mm/mm.h +++ b/arch/arm/mm/mm.h | |||
| @@ -24,6 +24,8 @@ struct mem_type { | |||
| 24 | 24 | ||
| 25 | const struct mem_type *get_mem_type(unsigned int type); | 25 | const struct mem_type *get_mem_type(unsigned int type); |
| 26 | 26 | ||
| 27 | extern void __flush_dcache_page(struct address_space *mapping, struct page *page); | ||
| 28 | |||
| 27 | #endif | 29 | #endif |
| 28 | 30 | ||
| 29 | struct map_desc; | 31 | struct map_desc; |
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index ea67be0223a..8c7fbd19a4b 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c | |||
| @@ -881,7 +881,7 @@ void __init reserve_node_zero(pg_data_t *pgdat) | |||
| 881 | BOOTMEM_EXCLUSIVE); | 881 | BOOTMEM_EXCLUSIVE); |
| 882 | } | 882 | } |
| 883 | 883 | ||
| 884 | if (machine_is_treo680()) { | 884 | if (machine_is_treo680() || machine_is_centro()) { |
| 885 | reserve_bootmem_node(pgdat, 0xa0000000, 0x1000, | 885 | reserve_bootmem_node(pgdat, 0xa0000000, 0x1000, |
| 886 | BOOTMEM_EXCLUSIVE); | 886 | BOOTMEM_EXCLUSIVE); |
| 887 | reserve_bootmem_node(pgdat, 0xa2000000, 0x1000, | 887 | reserve_bootmem_node(pgdat, 0xa2000000, 0x1000, |
| @@ -1036,7 +1036,7 @@ void __init paging_init(struct machine_desc *mdesc) | |||
| 1036 | */ | 1036 | */ |
| 1037 | zero_page = alloc_bootmem_low_pages(PAGE_SIZE); | 1037 | zero_page = alloc_bootmem_low_pages(PAGE_SIZE); |
| 1038 | empty_zero_page = virt_to_page(zero_page); | 1038 | empty_zero_page = virt_to_page(zero_page); |
| 1039 | flush_dcache_page(empty_zero_page); | 1039 | __flush_dcache_page(NULL, empty_zero_page); |
| 1040 | } | 1040 | } |
| 1041 | 1041 | ||
| 1042 | /* | 1042 | /* |
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index 70f75d2e3ea..5485c821101 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S | |||
| @@ -130,9 +130,16 @@ ENTRY(cpu_v6_set_pte_ext) | |||
| 130 | 130 | ||
| 131 | 131 | ||
| 132 | 132 | ||
| 133 | 133 | .type cpu_v6_name, #object | |
| 134 | cpu_v6_name: | 134 | cpu_v6_name: |
| 135 | .asciz "ARMv6-compatible processor" | 135 | .asciz "ARMv6-compatible processor" |
| 136 | .size cpu_v6_name, . - cpu_v6_name | ||
| 137 | |||
| 138 | .type cpu_pj4_name, #object | ||
| 139 | cpu_pj4_name: | ||
| 140 | .asciz "Marvell PJ4 processor" | ||
| 141 | .size cpu_pj4_name, . - cpu_pj4_name | ||
| 142 | |||
| 136 | .align | 143 | .align |
| 137 | 144 | ||
| 138 | __INIT | 145 | __INIT |
| @@ -241,3 +248,27 @@ __v6_proc_info: | |||
| 241 | .long v6_user_fns | 248 | .long v6_user_fns |
| 242 | .long v6_cache_fns | 249 | .long v6_cache_fns |
| 243 | .size __v6_proc_info, . - __v6_proc_info | 250 | .size __v6_proc_info, . - __v6_proc_info |
| 251 | |||
| 252 | .type __pj4_v6_proc_info, #object | ||
| 253 | __pj4_v6_proc_info: | ||
| 254 | .long 0x560f5810 | ||
| 255 | .long 0xff0ffff0 | ||
| 256 | .long PMD_TYPE_SECT | \ | ||
| 257 | PMD_SECT_BUFFERABLE | \ | ||
| 258 | PMD_SECT_CACHEABLE | \ | ||
| 259 | PMD_SECT_AP_WRITE | \ | ||
| 260 | PMD_SECT_AP_READ | ||
| 261 | .long PMD_TYPE_SECT | \ | ||
| 262 | PMD_SECT_XN | \ | ||
| 263 | PMD_SECT_AP_WRITE | \ | ||
| 264 | PMD_SECT_AP_READ | ||
| 265 | b __v6_setup | ||
| 266 | .long cpu_arch_name | ||
| 267 | .long cpu_elf_name | ||
| 268 | .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP | ||
| 269 | .long cpu_pj4_name | ||
| 270 | .long v6_processor_functions | ||
| 271 | .long v6wbi_tlb_fns | ||
| 272 | .long v6_user_fns | ||
| 273 | .long v6_cache_fns | ||
| 274 | .size __pj4_v6_proc_info, . - __pj4_v6_proc_info | ||
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S index 2028f370288..fab134e2982 100644 --- a/arch/arm/mm/proc-xsc3.S +++ b/arch/arm/mm/proc-xsc3.S | |||
| @@ -396,7 +396,7 @@ __xsc3_setup: | |||
| 396 | orr r4, r4, #0x18 @ cache the page table in L2 | 396 | orr r4, r4, #0x18 @ cache the page table in L2 |
| 397 | mcr p15, 0, r4, c2, c0, 0 @ load page table pointer | 397 | mcr p15, 0, r4, c2, c0, 0 @ load page table pointer |
| 398 | 398 | ||
| 399 | mov r0, #0 @ don't allow CP access | 399 | mov r0, #1 << 6 @ cp6 access for early sched_clock |
| 400 | mcr p15, 0, r0, c15, c1, 0 @ write CP access register | 400 | mcr p15, 0, r0, c15, c1, 0 @ write CP access register |
| 401 | 401 | ||
| 402 | mrc p15, 0, r0, c1, c0, 1 @ get auxiliary control reg | 402 | mrc p15, 0, r0, c1, c0, 1 @ get auxiliary control reg |
diff --git a/arch/arm/mm/vmregion.c b/arch/arm/mm/vmregion.c new file mode 100644 index 00000000000..19e09bdb1b8 --- /dev/null +++ b/arch/arm/mm/vmregion.c | |||
| @@ -0,0 +1,131 @@ | |||
| 1 | #include <linux/spinlock.h> | ||
| 2 | #include <linux/list.h> | ||
| 3 | #include <linux/slab.h> | ||
| 4 | |||
| 5 | #include "vmregion.h" | ||
| 6 | |||
| 7 | /* | ||
| 8 | * VM region handling support. | ||
| 9 | * | ||
| 10 | * This should become something generic, handling VM region allocations for | ||
| 11 | * vmalloc and similar (ioremap, module space, etc). | ||
| 12 | * | ||
| 13 | * I envisage vmalloc()'s supporting vm_struct becoming: | ||
| 14 | * | ||
| 15 | * struct vm_struct { | ||
| 16 | * struct vmregion region; | ||
| 17 | * unsigned long flags; | ||
| 18 | * struct page **pages; | ||
| 19 | * unsigned int nr_pages; | ||
| 20 | * unsigned long phys_addr; | ||
| 21 | * }; | ||
| 22 | * | ||
| 23 | * get_vm_area() would then call vmregion_alloc with an appropriate | ||
| 24 | * struct vmregion head (eg): | ||
| 25 | * | ||
| 26 | * struct vmregion vmalloc_head = { | ||
| 27 | * .vm_list = LIST_HEAD_INIT(vmalloc_head.vm_list), | ||
| 28 | * .vm_start = VMALLOC_START, | ||
| 29 | * .vm_end = VMALLOC_END, | ||
| 30 | * }; | ||
| 31 | * | ||
| 32 | * However, vmalloc_head.vm_start is variable (typically, it is dependent on | ||
| 33 | * the amount of RAM found at boot time.) I would imagine that get_vm_area() | ||
| 34 | * would have to initialise this each time prior to calling vmregion_alloc(). | ||
| 35 | */ | ||
| 36 | |||
| 37 | struct arm_vmregion * | ||
| 38 | arm_vmregion_alloc(struct arm_vmregion_head *head, size_t size, gfp_t gfp) | ||
| 39 | { | ||
| 40 | unsigned long addr = head->vm_start, end = head->vm_end - size; | ||
| 41 | unsigned long flags; | ||
| 42 | struct arm_vmregion *c, *new; | ||
| 43 | |||
| 44 | if (head->vm_end - head->vm_start < size) { | ||
| 45 | printk(KERN_WARNING "%s: allocation too big (requested %#x)\n", | ||
| 46 | __func__, size); | ||
| 47 | goto out; | ||
| 48 | } | ||
| 49 | |||
| 50 | new = kmalloc(sizeof(struct arm_vmregion), gfp); | ||
| 51 | if (!new) | ||
| 52 | goto out; | ||
| 53 | |||
| 54 | spin_lock_irqsave(&head->vm_lock, flags); | ||
| 55 | |||
| 56 | list_for_each_entry(c, &head->vm_list, vm_list) { | ||
| 57 | if ((addr + size) < addr) | ||
| 58 | goto nospc; | ||
| 59 | if ((addr + size) <= c->vm_start) | ||
| 60 | goto found; | ||
| 61 | addr = c->vm_end; | ||
| 62 | if (addr > end) | ||
| 63 | goto nospc; | ||
| 64 | } | ||
| 65 | |||
| 66 | found: | ||
| 67 | /* | ||
| 68 | * Insert this entry _before_ the one we found. | ||
| 69 | */ | ||
| 70 | list_add_tail(&new->vm_list, &c->vm_list); | ||
| 71 | new->vm_start = addr; | ||
| 72 | new->vm_end = addr + size; | ||
| 73 | new->vm_active = 1; | ||
| 74 | |||
| 75 | spin_unlock_irqrestore(&head->vm_lock, flags); | ||
| 76 | return new; | ||
| 77 | |||
| 78 | nospc: | ||
| 79 | spin_unlock_irqrestore(&head->vm_lock, flags); | ||
| 80 | kfree(new); | ||
| 81 | out: | ||
| 82 | return NULL; | ||
| 83 | } | ||
| 84 | |||
| 85 | static struct arm_vmregion *__arm_vmregion_find(struct arm_vmregion_head *head, unsigned long addr) | ||
| 86 | { | ||
| 87 | struct arm_vmregion *c; | ||
| 88 | |||
| 89 | list_for_each_entry(c, &head->vm_list, vm_list) { | ||
| 90 | if (c->vm_active && c->vm_start == addr) | ||
| 91 | goto out; | ||
| 92 | } | ||
| 93 | c = NULL; | ||
| 94 | out: | ||
| 95 | return c; | ||
| 96 | } | ||
| 97 | |||
| 98 | struct arm_vmregion *arm_vmregion_find(struct arm_vmregion_head *head, unsigned long addr) | ||
| 99 | { | ||
| 100 | struct arm_vmregion *c; | ||
| 101 | unsigned long flags; | ||
| 102 | |||
| 103 | spin_lock_irqsave(&head->vm_lock, flags); | ||
| 104 | c = __arm_vmregion_find(head, addr); | ||
| 105 | spin_unlock_irqrestore(&head->vm_lock, flags); | ||
| 106 | return c; | ||
| 107 | } | ||
| 108 | |||
| 109 | struct arm_vmregion *arm_vmregion_find_remove(struct arm_vmregion_head *head, unsigned long addr) | ||
| 110 | { | ||
| 111 | struct arm_vmregion *c; | ||
| 112 | unsigned long flags; | ||
| 113 | |||
| 114 | spin_lock_irqsave(&head->vm_lock, flags); | ||
| 115 | c = __arm_vmregion_find(head, addr); | ||
| 116 | if (c) | ||
| 117 | c->vm_active = 0; | ||
| 118 | spin_unlock_irqrestore(&head->vm_lock, flags); | ||
| 119 | return c; | ||
| 120 | } | ||
| 121 | |||
| 122 | void arm_vmregion_free(struct arm_vmregion_head *head, struct arm_vmregion *c) | ||
| 123 | { | ||
| 124 | unsigned long flags; | ||
| 125 | |||
| 126 | spin_lock_irqsave(&head->vm_lock, flags); | ||
| 127 | list_del(&c->vm_list); | ||
| 128 | spin_unlock_irqrestore(&head->vm_lock, flags); | ||
| 129 | |||
| 130 | kfree(c); | ||
| 131 | } | ||
diff --git a/arch/arm/mm/vmregion.h b/arch/arm/mm/vmregion.h new file mode 100644 index 00000000000..6b2cdbdf3a8 --- /dev/null +++ b/arch/arm/mm/vmregion.h | |||
| @@ -0,0 +1,29 @@ | |||
| 1 | #ifndef VMREGION_H | ||
| 2 | #define VMREGION_H | ||
| 3 | |||
| 4 | #include <linux/spinlock.h> | ||
| 5 | #include <linux/list.h> | ||
| 6 | |||
| 7 | struct page; | ||
| 8 | |||
| 9 | struct arm_vmregion_head { | ||
| 10 | spinlock_t vm_lock; | ||
| 11 | struct list_head vm_list; | ||
| 12 | unsigned long vm_start; | ||
| 13 | unsigned long vm_end; | ||
| 14 | }; | ||
| 15 | |||
| 16 | struct arm_vmregion { | ||
| 17 | struct list_head vm_list; | ||
| 18 | unsigned long vm_start; | ||
| 19 | unsigned long vm_end; | ||
| 20 | struct page *vm_pages; | ||
| 21 | int vm_active; | ||
| 22 | }; | ||
| 23 | |||
| 24 | struct arm_vmregion *arm_vmregion_alloc(struct arm_vmregion_head *, size_t, gfp_t); | ||
| 25 | struct arm_vmregion *arm_vmregion_find(struct arm_vmregion_head *, unsigned long); | ||
| 26 | struct arm_vmregion *arm_vmregion_find_remove(struct arm_vmregion_head *, unsigned long); | ||
| 27 | void arm_vmregion_free(struct arm_vmregion_head *, struct arm_vmregion *); | ||
| 28 | |||
| 29 | #endif | ||
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c index 8da95d57c21..6c8a02ad98e 100644 --- a/arch/arm/plat-iop/time.c +++ b/arch/arm/plat-iop/time.c | |||
| @@ -19,6 +19,8 @@ | |||
| 19 | #include <linux/init.h> | 19 | #include <linux/init.h> |
| 20 | #include <linux/timex.h> | 20 | #include <linux/timex.h> |
| 21 | #include <linux/io.h> | 21 | #include <linux/io.h> |
| 22 | #include <linux/clocksource.h> | ||
| 23 | #include <linux/clockchips.h> | ||
| 22 | #include <mach/hardware.h> | 24 | #include <mach/hardware.h> |
| 23 | #include <asm/irq.h> | 25 | #include <asm/irq.h> |
| 24 | #include <asm/uaccess.h> | 26 | #include <asm/uaccess.h> |
| @@ -26,45 +28,136 @@ | |||
| 26 | #include <asm/mach/time.h> | 28 | #include <asm/mach/time.h> |
| 27 | #include <mach/time.h> | 29 | #include <mach/time.h> |
| 28 | 30 | ||
| 31 | /* | ||
| 32 | * IOP clocksource (free-running timer 1). | ||
| 33 | */ | ||
| 34 | static cycle_t iop_clocksource_read(struct clocksource *unused) | ||
| 35 | { | ||
| 36 | return 0xffffffffu - read_tcr1(); | ||
| 37 | } | ||
| 38 | |||
| 39 | static struct clocksource iop_clocksource = { | ||
| 40 | .name = "iop_timer1", | ||
| 41 | .rating = 300, | ||
| 42 | .read = iop_clocksource_read, | ||
| 43 | .mask = CLOCKSOURCE_MASK(32), | ||
| 44 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | ||
| 45 | }; | ||
| 46 | |||
| 47 | static void __init iop_clocksource_set_hz(struct clocksource *cs, unsigned int hz) | ||
| 48 | { | ||
| 49 | u64 temp; | ||
| 50 | u32 shift; | ||
| 51 | |||
| 52 | /* Find shift and mult values for hz. */ | ||
| 53 | shift = 32; | ||
| 54 | do { | ||
| 55 | temp = (u64) NSEC_PER_SEC << shift; | ||
| 56 | do_div(temp, hz); | ||
| 57 | if ((temp >> 32) == 0) | ||
| 58 | break; | ||
| 59 | } while (--shift != 0); | ||
| 60 | |||
| 61 | cs->shift = shift; | ||
| 62 | cs->mult = (u32) temp; | ||
| 63 | |||
| 64 | printk(KERN_INFO "clocksource: %s uses shift %u mult %#x\n", | ||
| 65 | cs->name, cs->shift, cs->mult); | ||
| 66 | } | ||
| 67 | |||
| 68 | /* | ||
| 69 | * IOP sched_clock() implementation via its clocksource. | ||
| 70 | */ | ||
| 71 | unsigned long long sched_clock(void) | ||
| 72 | { | ||
| 73 | cycle_t cyc = iop_clocksource_read(NULL); | ||
| 74 | struct clocksource *cs = &iop_clocksource; | ||
| 75 | |||
| 76 | return clocksource_cyc2ns(cyc, cs->mult, cs->shift); | ||
| 77 | } | ||
| 78 | |||
| 79 | /* | ||
| 80 | * IOP clockevents (interrupting timer 0). | ||
| 81 | */ | ||
| 82 | static int iop_set_next_event(unsigned long delta, | ||
| 83 | struct clock_event_device *unused) | ||
| 84 | { | ||
| 85 | u32 tmr = IOP_TMR_PRIVILEGED | IOP_TMR_RATIO_1_1; | ||
| 86 | |||
| 87 | BUG_ON(delta == 0); | ||
| 88 | write_tmr0(tmr & ~(IOP_TMR_EN | IOP_TMR_RELOAD)); | ||
| 89 | write_tcr0(delta); | ||
| 90 | write_tmr0((tmr & ~IOP_TMR_RELOAD) | IOP_TMR_EN); | ||
| 91 | |||
| 92 | return 0; | ||
| 93 | } | ||
| 94 | |||
| 29 | static unsigned long ticks_per_jiffy; | 95 | static unsigned long ticks_per_jiffy; |
| 30 | static unsigned long ticks_per_usec; | ||
| 31 | static unsigned long next_jiffy_time; | ||
| 32 | 96 | ||
| 33 | unsigned long iop_gettimeoffset(void) | 97 | static void iop_set_mode(enum clock_event_mode mode, |
| 98 | struct clock_event_device *unused) | ||
| 34 | { | 99 | { |
| 35 | unsigned long offset, temp; | 100 | u32 tmr = read_tmr0(); |
| 101 | |||
| 102 | switch (mode) { | ||
| 103 | case CLOCK_EVT_MODE_PERIODIC: | ||
| 104 | write_tmr0(tmr & ~IOP_TMR_EN); | ||
| 105 | write_tcr0(ticks_per_jiffy - 1); | ||
| 106 | tmr |= (IOP_TMR_RELOAD | IOP_TMR_EN); | ||
| 107 | break; | ||
| 108 | case CLOCK_EVT_MODE_ONESHOT: | ||
| 109 | /* ->set_next_event sets period and enables timer */ | ||
| 110 | tmr &= ~(IOP_TMR_RELOAD | IOP_TMR_EN); | ||
| 111 | break; | ||
| 112 | case CLOCK_EVT_MODE_RESUME: | ||
| 113 | tmr |= IOP_TMR_EN; | ||
| 114 | break; | ||
| 115 | case CLOCK_EVT_MODE_SHUTDOWN: | ||
| 116 | case CLOCK_EVT_MODE_UNUSED: | ||
| 117 | default: | ||
| 118 | tmr &= ~IOP_TMR_EN; | ||
| 119 | break; | ||
| 120 | } | ||
| 36 | 121 | ||
| 37 | /* enable cp6, if necessary, to avoid taking the overhead of an | 122 | write_tmr0(tmr); |
| 38 | * undefined instruction trap | 123 | } |
| 39 | */ | 124 | |
| 40 | asm volatile ( | 125 | static struct clock_event_device iop_clockevent = { |
| 41 | "mrc p15, 0, %0, c15, c1, 0\n\t" | 126 | .name = "iop_timer0", |
| 42 | "tst %0, #(1 << 6)\n\t" | 127 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, |
| 43 | "orreq %0, %0, #(1 << 6)\n\t" | 128 | .rating = 300, |
| 44 | "mcreq p15, 0, %0, c15, c1, 0\n\t" | 129 | .set_next_event = iop_set_next_event, |
| 45 | #ifdef CONFIG_CPU_XSCALE | 130 | .set_mode = iop_set_mode, |
| 46 | "mrceq p15, 0, %0, c15, c1, 0\n\t" | 131 | }; |
| 47 | "moveq %0, %0\n\t" | 132 | |
| 48 | "subeq pc, pc, #4\n\t" | 133 | static void __init iop_clockevent_set_hz(struct clock_event_device *ce, unsigned int hz) |
| 49 | #endif | 134 | { |
| 50 | : "=r"(temp) : : "cc"); | 135 | u64 temp; |
| 51 | 136 | u32 shift; | |
| 52 | offset = next_jiffy_time - read_tcr1(); | 137 | |
| 53 | 138 | /* Find shift and mult values for hz. */ | |
| 54 | return offset / ticks_per_usec; | 139 | shift = 32; |
| 140 | do { | ||
| 141 | temp = (u64) hz << shift; | ||
| 142 | do_div(temp, NSEC_PER_SEC); | ||
| 143 | if ((temp >> 32) == 0) | ||
| 144 | break; | ||
| 145 | } while (--shift != 0); | ||
| 146 | |||
| 147 | ce->shift = shift; | ||
| 148 | ce->mult = (u32) temp; | ||
| 149 | |||
| 150 | printk(KERN_INFO "clockevent: %s uses shift %u mult %#lx\n", | ||
| 151 | ce->name, ce->shift, ce->mult); | ||
| 55 | } | 152 | } |
| 56 | 153 | ||
| 57 | static irqreturn_t | 154 | static irqreturn_t |
| 58 | iop_timer_interrupt(int irq, void *dev_id) | 155 | iop_timer_interrupt(int irq, void *dev_id) |
| 59 | { | 156 | { |
| 60 | write_tisr(1); | 157 | struct clock_event_device *evt = dev_id; |
| 61 | |||
| 62 | while ((signed long)(next_jiffy_time - read_tcr1()) | ||
| 63 | >= ticks_per_jiffy) { | ||
| 64 | timer_tick(); | ||
| 65 | next_jiffy_time -= ticks_per_jiffy; | ||
| 66 | } | ||
| 67 | 158 | ||
| 159 | write_tisr(1); | ||
| 160 | evt->event_handler(evt); | ||
| 68 | return IRQ_HANDLED; | 161 | return IRQ_HANDLED; |
| 69 | } | 162 | } |
| 70 | 163 | ||
| @@ -72,6 +165,7 @@ static struct irqaction iop_timer_irq = { | |||
| 72 | .name = "IOP Timer Tick", | 165 | .name = "IOP Timer Tick", |
| 73 | .handler = iop_timer_interrupt, | 166 | .handler = iop_timer_interrupt, |
| 74 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | 167 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, |
| 168 | .dev_id = &iop_clockevent, | ||
| 75 | }; | 169 | }; |
| 76 | 170 | ||
| 77 | static unsigned long iop_tick_rate; | 171 | static unsigned long iop_tick_rate; |
| @@ -86,21 +180,33 @@ void __init iop_init_time(unsigned long tick_rate) | |||
| 86 | u32 timer_ctl; | 180 | u32 timer_ctl; |
| 87 | 181 | ||
| 88 | ticks_per_jiffy = DIV_ROUND_CLOSEST(tick_rate, HZ); | 182 | ticks_per_jiffy = DIV_ROUND_CLOSEST(tick_rate, HZ); |
| 89 | ticks_per_usec = tick_rate / 1000000; | ||
| 90 | next_jiffy_time = 0xffffffff; | ||
| 91 | iop_tick_rate = tick_rate; | 183 | iop_tick_rate = tick_rate; |
| 92 | 184 | ||
| 93 | timer_ctl = IOP_TMR_EN | IOP_TMR_PRIVILEGED | | 185 | timer_ctl = IOP_TMR_EN | IOP_TMR_PRIVILEGED | |
| 94 | IOP_TMR_RELOAD | IOP_TMR_RATIO_1_1; | 186 | IOP_TMR_RELOAD | IOP_TMR_RATIO_1_1; |
| 95 | 187 | ||
| 96 | /* | 188 | /* |
| 97 | * We use timer 0 for our timer interrupt, and timer 1 as | 189 | * Set up interrupting clockevent timer 0. |
| 98 | * monotonic counter for tracking missed jiffies. | ||
| 99 | */ | 190 | */ |
| 191 | write_tmr0(timer_ctl & ~IOP_TMR_EN); | ||
| 192 | setup_irq(IRQ_IOP_TIMER0, &iop_timer_irq); | ||
| 193 | iop_clockevent_set_hz(&iop_clockevent, tick_rate); | ||
| 194 | iop_clockevent.max_delta_ns = | ||
| 195 | clockevent_delta2ns(0xfffffffe, &iop_clockevent); | ||
| 196 | iop_clockevent.min_delta_ns = | ||
| 197 | clockevent_delta2ns(0xf, &iop_clockevent); | ||
| 198 | iop_clockevent.cpumask = cpumask_of(0); | ||
| 199 | clockevents_register_device(&iop_clockevent); | ||
| 100 | write_trr0(ticks_per_jiffy - 1); | 200 | write_trr0(ticks_per_jiffy - 1); |
| 201 | write_tcr0(ticks_per_jiffy - 1); | ||
| 101 | write_tmr0(timer_ctl); | 202 | write_tmr0(timer_ctl); |
| 203 | |||
| 204 | /* | ||
| 205 | * Set up free-running clocksource timer 1. | ||
| 206 | */ | ||
| 102 | write_trr1(0xffffffff); | 207 | write_trr1(0xffffffff); |
| 208 | write_tcr1(0xffffffff); | ||
| 103 | write_tmr1(timer_ctl); | 209 | write_tmr1(timer_ctl); |
| 104 | 210 | iop_clocksource_set_hz(&iop_clocksource, tick_rate); | |
| 105 | setup_irq(IRQ_IOP_TIMER0, &iop_timer_irq); | 211 | clocksource_register(&iop_clocksource); |
| 106 | } | 212 | } |
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig index ca5c7c22634..8b0a1ee039f 100644 --- a/arch/arm/plat-mxc/Kconfig +++ b/arch/arm/plat-mxc/Kconfig | |||
| @@ -69,10 +69,20 @@ config MXC_PWM | |||
| 69 | help | 69 | help |
| 70 | Enable support for the i.MX PWM controller(s). | 70 | Enable support for the i.MX PWM controller(s). |
| 71 | 71 | ||
| 72 | config MXC_ULPI | ||
| 73 | bool | ||
| 74 | |||
| 72 | config ARCH_HAS_RNGA | 75 | config ARCH_HAS_RNGA |
| 73 | bool | 76 | bool |
| 74 | depends on ARCH_MXC | 77 | depends on ARCH_MXC |
| 75 | 78 | ||
| 76 | config ARCH_MXC_IOMUX_V3 | 79 | config ARCH_MXC_IOMUX_V3 |
| 77 | bool | 80 | bool |
| 81 | |||
| 82 | config ARCH_MXC_AUDMUX_V1 | ||
| 83 | bool | ||
| 84 | |||
| 85 | config ARCH_MXC_AUDMUX_V2 | ||
| 86 | bool | ||
| 87 | |||
| 78 | endif | 88 | endif |
diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile index e3212c8ff42..4cbca9da150 100644 --- a/arch/arm/plat-mxc/Makefile +++ b/arch/arm/plat-mxc/Makefile | |||
| @@ -9,3 +9,6 @@ obj-$(CONFIG_ARCH_MX1) += iomux-mx1-mx2.o dma-mx1-mx2.o | |||
| 9 | obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o dma-mx1-mx2.o | 9 | obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o dma-mx1-mx2.o |
| 10 | obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o | 10 | obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o |
| 11 | obj-$(CONFIG_MXC_PWM) += pwm.o | 11 | obj-$(CONFIG_MXC_PWM) += pwm.o |
| 12 | obj-$(CONFIG_MXC_ULPI) += ulpi.o | ||
| 13 | obj-$(CONFIG_ARCH_MXC_AUDMUX_V1) += audmux-v1.o | ||
| 14 | obj-$(CONFIG_ARCH_MXC_AUDMUX_V2) += audmux-v2.o | ||
diff --git a/arch/arm/plat-mxc/audmux-v1.c b/arch/arm/plat-mxc/audmux-v1.c new file mode 100644 index 00000000000..da6387dcdf2 --- /dev/null +++ b/arch/arm/plat-mxc/audmux-v1.c | |||
| @@ -0,0 +1,58 @@ | |||
| 1 | /* | ||
| 2 | * Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de> | ||
| 3 | * | ||
| 4 | * Initial development of this code was funded by | ||
| 5 | * Phytec Messtechnik GmbH, http://www.phytec.de | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License as published by | ||
| 9 | * the Free Software Foundation; either version 2 of the License, or | ||
| 10 | * (at your option) any later version. | ||
| 11 | * | ||
| 12 | * This program is distributed in the hope that it will be useful, | ||
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 15 | * GNU General Public License for more details. | ||
| 16 | * | ||
| 17 | * You should have received a copy of the GNU General Public License | ||
| 18 | * along with this program; if not, write to the Free Software | ||
| 19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
| 20 | */ | ||
| 21 | |||
| 22 | #include <linux/module.h> | ||
| 23 | #include <linux/err.h> | ||
| 24 | #include <linux/io.h> | ||
| 25 | #include <linux/clk.h> | ||
| 26 | #include <mach/audmux.h> | ||
| 27 | #include <mach/hardware.h> | ||
| 28 | |||
| 29 | static void __iomem *audmux_base; | ||
| 30 | |||
| 31 | static unsigned char port_mapping[] = { | ||
| 32 | 0x0, 0x4, 0x8, 0x10, 0x14, 0x1c, | ||
| 33 | }; | ||
| 34 | |||
| 35 | int mxc_audmux_v1_configure_port(unsigned int port, unsigned int pcr) | ||
| 36 | { | ||
| 37 | if (!audmux_base) { | ||
| 38 | printk("%s: not configured\n", __func__); | ||
| 39 | return -ENOSYS; | ||
| 40 | } | ||
| 41 | |||
| 42 | if (port >= ARRAY_SIZE(port_mapping)) | ||
| 43 | return -EINVAL; | ||
| 44 | |||
| 45 | writel(pcr, audmux_base + port_mapping[port]); | ||
| 46 | |||
| 47 | return 0; | ||
| 48 | } | ||
| 49 | EXPORT_SYMBOL_GPL(mxc_audmux_v1_configure_port); | ||
| 50 | |||
| 51 | static int mxc_audmux_v1_init(void) | ||
| 52 | { | ||
| 53 | if (cpu_is_mx27() || cpu_is_mx21()) | ||
| 54 | audmux_base = IO_ADDRESS(AUDMUX_BASE_ADDR); | ||
| 55 | return 0; | ||
| 56 | } | ||
| 57 | |||
| 58 | postcore_initcall(mxc_audmux_v1_init); | ||
diff --git a/arch/arm/plat-mxc/audmux-v2.c b/arch/arm/plat-mxc/audmux-v2.c new file mode 100644 index 00000000000..6f21096086f --- /dev/null +++ b/arch/arm/plat-mxc/audmux-v2.c | |||
| @@ -0,0 +1,74 @@ | |||
| 1 | /* | ||
| 2 | * Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de> | ||
| 3 | * | ||
| 4 | * Initial development of this code was funded by | ||
| 5 | * Phytec Messtechnik GmbH, http://www.phytec.de | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License as published by | ||
| 9 | * the Free Software Foundation; either version 2 of the License, or | ||
| 10 | * (at your option) any later version. | ||
| 11 | * | ||
| 12 | * This program is distributed in the hope that it will be useful, | ||
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 15 | * GNU General Public License for more details. | ||
| 16 | * | ||
| 17 | * You should have received a copy of the GNU General Public License | ||
| 18 | * along with this program; if not, write to the Free Software | ||
| 19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
| 20 | */ | ||
| 21 | |||
| 22 | #include <linux/module.h> | ||
| 23 | #include <linux/err.h> | ||
| 24 | #include <linux/io.h> | ||
| 25 | #include <linux/clk.h> | ||
| 26 | #include <mach/audmux.h> | ||
| 27 | #include <mach/hardware.h> | ||
| 28 | |||
| 29 | static struct clk *audmux_clk; | ||
| 30 | static void __iomem *audmux_base; | ||
| 31 | |||
| 32 | #define MXC_AUDMUX_V2_PTCR(x) ((x) * 8) | ||
| 33 | #define MXC_AUDMUX_V2_PDCR(x) ((x) * 8 + 4) | ||
| 34 | |||
| 35 | int mxc_audmux_v2_configure_port(unsigned int port, unsigned int ptcr, | ||
| 36 | unsigned int pdcr) | ||
| 37 | { | ||
| 38 | if (!audmux_base) | ||
| 39 | return -ENOSYS; | ||
| 40 | |||
| 41 | if (audmux_clk) | ||
| 42 | clk_enable(audmux_clk); | ||
| 43 | |||
| 44 | writel(ptcr, audmux_base + MXC_AUDMUX_V2_PTCR(port)); | ||
| 45 | writel(pdcr, audmux_base + MXC_AUDMUX_V2_PDCR(port)); | ||
| 46 | |||
| 47 | if (audmux_clk) | ||
| 48 | clk_disable(audmux_clk); | ||
| 49 | |||
| 50 | return 0; | ||
| 51 | } | ||
| 52 | EXPORT_SYMBOL_GPL(mxc_audmux_v2_configure_port); | ||
| 53 | |||
| 54 | static int mxc_audmux_v2_init(void) | ||
| 55 | { | ||
| 56 | int ret; | ||
| 57 | |||
| 58 | if (cpu_is_mx35()) { | ||
| 59 | audmux_clk = clk_get(NULL, "audmux"); | ||
| 60 | if (IS_ERR(audmux_clk)) { | ||
| 61 | ret = PTR_ERR(audmux_clk); | ||
| 62 | printk(KERN_ERR "%s: cannot get clock: %d\n", __func__, | ||
| 63 | ret); | ||
| 64 | return ret; | ||
| 65 | } | ||
| 66 | } | ||
| 67 | |||
| 68 | if (cpu_is_mx31() || cpu_is_mx35()) | ||
| 69 | audmux_base = IO_ADDRESS(AUDMUX_BASE_ADDR); | ||
| 70 | |||
| 71 | return 0; | ||
| 72 | } | ||
| 73 | |||
| 74 | postcore_initcall(mxc_audmux_v2_init); | ||
diff --git a/arch/arm/plat-mxc/dma-mx1-mx2.c b/arch/arm/plat-mxc/dma-mx1-mx2.c index 77646436c00..9c1b3f9c4f4 100644 --- a/arch/arm/plat-mxc/dma-mx1-mx2.c +++ b/arch/arm/plat-mxc/dma-mx1-mx2.c | |||
| @@ -156,7 +156,8 @@ static inline int imx_dma_sg_next(int channel, struct scatterlist *sg) | |||
| 156 | } | 156 | } |
| 157 | 157 | ||
| 158 | now = min(imxdma->resbytes, sg->length); | 158 | now = min(imxdma->resbytes, sg->length); |
| 159 | imxdma->resbytes -= now; | 159 | if (imxdma->resbytes != IMX_DMA_LENGTH_LOOP) |
| 160 | imxdma->resbytes -= now; | ||
| 160 | 161 | ||
| 161 | if ((imxdma->dma_mode & DMA_MODE_MASK) == DMA_MODE_READ) | 162 | if ((imxdma->dma_mode & DMA_MODE_MASK) == DMA_MODE_READ) |
| 162 | __raw_writel(sg->dma_address, DMA_BASE + DMA_DAR(channel)); | 163 | __raw_writel(sg->dma_address, DMA_BASE + DMA_DAR(channel)); |
diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c index cfc4a8b43e6..d65ebe303b9 100644 --- a/arch/arm/plat-mxc/gpio.c +++ b/arch/arm/plat-mxc/gpio.c | |||
| @@ -282,7 +282,7 @@ int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt) | |||
| 282 | for (j = port[i].virtual_irq_start; | 282 | for (j = port[i].virtual_irq_start; |
| 283 | j < port[i].virtual_irq_start + 32; j++) { | 283 | j < port[i].virtual_irq_start + 32; j++) { |
| 284 | set_irq_chip(j, &gpio_irq_chip); | 284 | set_irq_chip(j, &gpio_irq_chip); |
| 285 | set_irq_handler(j, handle_edge_irq); | 285 | set_irq_handler(j, handle_level_irq); |
| 286 | set_irq_flags(j, IRQF_VALID); | 286 | set_irq_flags(j, IRQF_VALID); |
| 287 | } | 287 | } |
| 288 | 288 | ||
diff --git a/arch/arm/plat-mxc/include/mach/audmux.h b/arch/arm/plat-mxc/include/mach/audmux.h new file mode 100644 index 00000000000..5cd6466964a --- /dev/null +++ b/arch/arm/plat-mxc/include/mach/audmux.h | |||
| @@ -0,0 +1,52 @@ | |||
| 1 | #ifndef __MACH_AUDMUX_H | ||
| 2 | #define __MACH_AUDMUX_H | ||
| 3 | |||
| 4 | #define MX27_AUDMUX_HPCR1_SSI0 0 | ||
| 5 | #define MX27_AUDMUX_HPCR2_SSI1 1 | ||
| 6 | #define MX27_AUDMUX_HPCR3_SSI_PINS_4 2 | ||
| 7 | #define MX27_AUDMUX_PPCR1_SSI_PINS_1 3 | ||
| 8 | #define MX27_AUDMUX_PPCR2_SSI_PINS_2 4 | ||
| 9 | #define MX27_AUDMUX_PPCR3_SSI_PINS_3 5 | ||
| 10 | |||
| 11 | #define MX31_AUDMUX_PORT1_SSI0 0 | ||
| 12 | #define MX31_AUDMUX_PORT2_SSI1 1 | ||
| 13 | #define MX31_AUDMUX_PORT3_SSI_PINS_3 2 | ||
| 14 | #define MX31_AUDMUX_PORT4_SSI_PINS_4 3 | ||
| 15 | #define MX31_AUDMUX_PORT5_SSI_PINS_5 4 | ||
| 16 | #define MX31_AUDMUX_PORT6_SSI_PINS_6 5 | ||
| 17 | |||
| 18 | /* Register definitions for the i.MX21/27 Digital Audio Multiplexer */ | ||
| 19 | #define MXC_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff) | ||
| 20 | #define MXC_AUDMUX_V1_PCR_INMEN (1 << 8) | ||
| 21 | #define MXC_AUDMUX_V1_PCR_TXRXEN (1 << 10) | ||
| 22 | #define MXC_AUDMUX_V1_PCR_SYN (1 << 12) | ||
| 23 | #define MXC_AUDMUX_V1_PCR_RXDSEL(x) (((x) & 0x7) << 13) | ||
| 24 | #define MXC_AUDMUX_V1_PCR_RFCSEL(x) (((x) & 0xf) << 20) | ||
| 25 | #define MXC_AUDMUX_V1_PCR_RCLKDIR (1 << 24) | ||
| 26 | #define MXC_AUDMUX_V1_PCR_RFSDIR (1 << 25) | ||
| 27 | #define MXC_AUDMUX_V1_PCR_TFCSEL(x) (((x) & 0xf) << 26) | ||
| 28 | #define MXC_AUDMUX_V1_PCR_TCLKDIR (1 << 30) | ||
| 29 | #define MXC_AUDMUX_V1_PCR_TFSDIR (1 << 31) | ||
| 30 | |||
| 31 | /* Register definitions for the i.MX25/31/35 Digital Audio Multiplexer */ | ||
| 32 | #define MXC_AUDMUX_V2_PTCR_TFSDIR (1 << 31) | ||
| 33 | #define MXC_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27) | ||
| 34 | #define MXC_AUDMUX_V2_PTCR_TCLKDIR (1 << 26) | ||
| 35 | #define MXC_AUDMUX_V2_PTCR_TCSEL(x) (((x) & 0xf) << 22) | ||
| 36 | #define MXC_AUDMUX_V2_PTCR_RFSDIR (1 << 21) | ||
| 37 | #define MXC_AUDMUX_V2_PTCR_RFSEL(x) (((x) & 0xf) << 17) | ||
| 38 | #define MXC_AUDMUX_V2_PTCR_RCLKDIR (1 << 16) | ||
| 39 | #define MXC_AUDMUX_V2_PTCR_RCSEL(x) (((x) & 0xf) << 12) | ||
| 40 | #define MXC_AUDMUX_V2_PTCR_SYN (1 << 11) | ||
| 41 | |||
| 42 | #define MXC_AUDMUX_V2_PDCR_RXDSEL(x) (((x) & 0x7) << 13) | ||
| 43 | #define MXC_AUDMUX_V2_PDCR_TXRXEN (1 << 12) | ||
| 44 | #define MXC_AUDMUX_V2_PDCR_MODE(x) (((x) & 0x3) << 8) | ||
| 45 | #define MXC_AUDMUX_V2_PDCR_INMMASK(x) ((x) & 0xff) | ||
| 46 | |||
| 47 | int mxc_audmux_v1_configure_port(unsigned int port, unsigned int pcr); | ||
| 48 | |||
| 49 | int mxc_audmux_v2_configure_port(unsigned int port, unsigned int ptcr, | ||
| 50 | unsigned int pdcr); | ||
| 51 | |||
| 52 | #endif /* __MACH_AUDMUX_H */ | ||
diff --git a/arch/arm/plat-mxc/include/mach/board-kzmarm11.h b/arch/arm/plat-mxc/include/mach/board-kzmarm11.h new file mode 100644 index 00000000000..05ff2f31ef1 --- /dev/null +++ b/arch/arm/plat-mxc/include/mach/board-kzmarm11.h | |||
| @@ -0,0 +1,39 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2009 Yoichi Yuasa <yuasa@linux-mips.org> | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License as published by | ||
| 6 | * the Free Software Foundation; either version 2 of the License, or | ||
| 7 | * (at your option) any later version. | ||
| 8 | * | ||
| 9 | * This program is distributed in the hope that it will be useful, | ||
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 12 | * GNU General Public License for more details. | ||
| 13 | * | ||
| 14 | * You should have received a copy of the GNU General Public License | ||
| 15 | * along with this program; if not, write to the Free Software | ||
| 16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 17 | */ | ||
| 18 | #ifndef __ARM_ARCH_BOARD_KZM_ARM11_H | ||
| 19 | #define __ARM_ARCH_BOARD_KZM_ARM11_H | ||
| 20 | |||
| 21 | /* | ||
| 22 | * KZM-ARM11-01 Board Control Registers on FPGA | ||
| 23 | */ | ||
| 24 | #define KZM_ARM11_CTL1 (CS4_BASE_ADDR + 0x1000) | ||
| 25 | #define KZM_ARM11_CTL2 (CS4_BASE_ADDR + 0x1001) | ||
| 26 | #define KZM_ARM11_RSW1 (CS4_BASE_ADDR + 0x1002) | ||
| 27 | #define KZM_ARM11_BACK_LIGHT (CS4_BASE_ADDR + 0x1004) | ||
| 28 | #define KZM_ARM11_FPGA_REV (CS4_BASE_ADDR + 0x1008) | ||
| 29 | #define KZM_ARM11_7SEG_LED (CS4_BASE_ADDR + 0x1010) | ||
| 30 | #define KZM_ARM11_LEDS (CS4_BASE_ADDR + 0x1020) | ||
| 31 | #define KZM_ARM11_DIPSW2 (CS4_BASE_ADDR + 0x1003) | ||
| 32 | |||
| 33 | /* | ||
| 34 | * External UART for touch panel on FPGA | ||
| 35 | */ | ||
| 36 | #define KZM_ARM11_16550 (CS4_BASE_ADDR + 0x1050) | ||
| 37 | |||
| 38 | #endif /* __ARM_ARCH_BOARD_KZM_ARM11_H */ | ||
| 39 | |||
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31lite.h b/arch/arm/plat-mxc/include/mach/board-mx31lite.h index 8e64325d690..0184b638c26 100644 --- a/arch/arm/plat-mxc/include/mach/board-mx31lite.h +++ b/arch/arm/plat-mxc/include/mach/board-mx31lite.h | |||
| @@ -1,15 +1,42 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved. | 2 | * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved. |
| 3 | * Copyright (C) 2009 Daniel Mack <daniel@caiaq.de> | ||
| 4 | * | ||
| 5 | * Based on code for mobots boards, | ||
| 6 | * Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or | ||
| 9 | * modify it under the terms of the GNU General Public License | ||
| 10 | * as published by the Free Software Foundation; either version 2 | ||
| 11 | * of the License, or (at your option) any later version. | ||
| 12 | * This program is distributed in the hope that it will be useful, | ||
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 15 | * GNU General Public License for more details. | ||
| 16 | * | ||
| 17 | * You should have received a copy of the GNU General Public License | ||
| 18 | * along with this program; if not, write to the Free Software | ||
| 19 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | ||
| 20 | * MA 02110-1301, USA. | ||
| 3 | */ | 21 | */ |
| 4 | 22 | ||
| 23 | #ifndef __ASM_ARCH_MXC_BOARD_MX31LITE_H__ | ||
| 24 | #define __ASM_ARCH_MXC_BOARD_MX31LITE_H__ | ||
| 25 | |||
| 26 | #ifndef __ASSEMBLY__ | ||
| 27 | |||
| 28 | enum mx31lilly_boards { | ||
| 29 | MX31LITE_NOBOARD = 0, | ||
| 30 | MX31LITE_DB = 1, | ||
| 31 | }; | ||
| 32 | |||
| 5 | /* | 33 | /* |
| 6 | * This program is free software; you can redistribute it and/or modify | 34 | * This CPU module needs a baseboard to work. After basic initializing |
| 7 | * it under the terms of the GNU General Public License version 2 as | 35 | * its own devices, it calls baseboard's init function. |
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | 36 | */ |
| 10 | 37 | ||
| 11 | #ifndef __ASM_ARCH_MXC_BOARD_MX31LITE_H__ | 38 | extern void mx31lite_db_init(void); |
| 12 | #define __ASM_ARCH_MXC_BOARD_MX31LITE_H__ | ||
| 13 | 39 | ||
| 14 | #endif /* __ASM_ARCH_MXC_BOARD_MX31LITE_H__ */ | 40 | #endif |
| 15 | 41 | ||
| 42 | #endif /* __ASM_ARCH_MXC_BOARD_MX31LITE_H__ */ | ||
diff --git a/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h b/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h index b3876cc238c..07be8ad7ec3 100644 --- a/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h +++ b/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h | |||
| @@ -58,6 +58,14 @@ imx_dma_setup_single(int channel, dma_addr_t dma_address, | |||
| 58 | unsigned int dma_length, unsigned int dev_addr, | 58 | unsigned int dma_length, unsigned int dev_addr, |
| 59 | unsigned int dmamode); | 59 | unsigned int dmamode); |
| 60 | 60 | ||
| 61 | |||
| 62 | /* | ||
| 63 | * Use this flag as the dma_length argument to imx_dma_setup_sg() | ||
| 64 | * to create an endless running dma loop. The end of the scatterlist | ||
| 65 | * must be linked to the beginning for this to work. | ||
| 66 | */ | ||
| 67 | #define IMX_DMA_LENGTH_LOOP ((unsigned int)-1) | ||
| 68 | |||
| 61 | int | 69 | int |
| 62 | imx_dma_setup_sg(int channel, struct scatterlist *sg, | 70 | imx_dma_setup_sg(int channel, struct scatterlist *sg, |
| 63 | unsigned int sgcount, unsigned int dma_length, | 71 | unsigned int sgcount, unsigned int dma_length, |
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx3.h b/arch/arm/plat-mxc/include/mach/iomux-mx3.h index 446f8676381..eaabd4e9692 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx3.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx3.h | |||
| @@ -524,10 +524,18 @@ enum iomux_pins { | |||
| 524 | #define MX31_PIN_RTS1__RTS1 IOMUX_MODE(MX31_PIN_RTS1, IOMUX_CONFIG_FUNC) | 524 | #define MX31_PIN_RTS1__RTS1 IOMUX_MODE(MX31_PIN_RTS1, IOMUX_CONFIG_FUNC) |
| 525 | #define MX31_PIN_TXD1__TXD1 IOMUX_MODE(MX31_PIN_TXD1, IOMUX_CONFIG_FUNC) | 525 | #define MX31_PIN_TXD1__TXD1 IOMUX_MODE(MX31_PIN_TXD1, IOMUX_CONFIG_FUNC) |
| 526 | #define MX31_PIN_RXD1__RXD1 IOMUX_MODE(MX31_PIN_RXD1, IOMUX_CONFIG_FUNC) | 526 | #define MX31_PIN_RXD1__RXD1 IOMUX_MODE(MX31_PIN_RXD1, IOMUX_CONFIG_FUNC) |
| 527 | #define MX31_PIN_DCD_DCE1__DCD_DCE1 IOMUX_MODE(MX31_PIN_DCD_DCE1, IOMUX_CONFIG_FUNC) | ||
| 528 | #define MX31_PIN_RI_DCE1__RI_DCE1 IOMUX_MODE(MX31_PIN_RI_DCE1, IOMUX_CONFIG_FUNC) | ||
| 529 | #define MX31_PIN_DSR_DCE1__DSR_DCE1 IOMUX_MODE(MX31_PIN_DSR_DCE1, IOMUX_CONFIG_FUNC) | ||
| 530 | #define MX31_PIN_DTR_DCE1__DTR_DCE1 IOMUX_MODE(MX31_PIN_DTR_DCE1, IOMUX_CONFIG_FUNC) | ||
| 527 | #define MX31_PIN_CTS2__CTS2 IOMUX_MODE(MX31_PIN_CTS2, IOMUX_CONFIG_FUNC) | 531 | #define MX31_PIN_CTS2__CTS2 IOMUX_MODE(MX31_PIN_CTS2, IOMUX_CONFIG_FUNC) |
| 528 | #define MX31_PIN_RTS2__RTS2 IOMUX_MODE(MX31_PIN_RTS2, IOMUX_CONFIG_FUNC) | 532 | #define MX31_PIN_RTS2__RTS2 IOMUX_MODE(MX31_PIN_RTS2, IOMUX_CONFIG_FUNC) |
| 529 | #define MX31_PIN_TXD2__TXD2 IOMUX_MODE(MX31_PIN_TXD2, IOMUX_CONFIG_FUNC) | 533 | #define MX31_PIN_TXD2__TXD2 IOMUX_MODE(MX31_PIN_TXD2, IOMUX_CONFIG_FUNC) |
| 530 | #define MX31_PIN_RXD2__RXD2 IOMUX_MODE(MX31_PIN_RXD2, IOMUX_CONFIG_FUNC) | 534 | #define MX31_PIN_RXD2__RXD2 IOMUX_MODE(MX31_PIN_RXD2, IOMUX_CONFIG_FUNC) |
| 535 | #define MX31_PIN_DCD_DTE1__DCD_DTE2 IOMUX_MODE(MX31_PIN_DCD_DTE1, IOMUX_CONFIG_ALT1) | ||
| 536 | #define MX31_PIN_RI_DTE1__RI_DTE2 IOMUX_MODE(MX31_PIN_RI_DTE1, IOMUX_CONFIG_ALT1) | ||
| 537 | #define MX31_PIN_DSR_DTE1__DSR_DTE2 IOMUX_MODE(MX31_PIN_DSR_DTE1, IOMUX_CONFIG_ALT1) | ||
| 538 | #define MX31_PIN_DTR_DTE1__DTR_DTE2 IOMUX_MODE(MX31_PIN_DTR_DTE1, IOMUX_OCONFIG_ALT3 | IOMUX_ICONFIG_NONE) | ||
| 531 | #define MX31_PIN_PC_RST__CTS5 IOMUX_MODE(MX31_PIN_PC_RST, IOMUX_CONFIG_ALT2) | 539 | #define MX31_PIN_PC_RST__CTS5 IOMUX_MODE(MX31_PIN_PC_RST, IOMUX_CONFIG_ALT2) |
| 532 | #define MX31_PIN_PC_VS2__RTS5 IOMUX_MODE(MX31_PIN_PC_VS2, IOMUX_CONFIG_ALT2) | 540 | #define MX31_PIN_PC_VS2__RTS5 IOMUX_MODE(MX31_PIN_PC_VS2, IOMUX_CONFIG_ALT2) |
| 533 | #define MX31_PIN_PC_BVD2__TXD5 IOMUX_MODE(MX31_PIN_PC_BVD2, IOMUX_CONFIG_ALT2) | 541 | #define MX31_PIN_PC_BVD2__TXD5 IOMUX_MODE(MX31_PIN_PC_BVD2, IOMUX_CONFIG_ALT2) |
| @@ -623,6 +631,8 @@ enum iomux_pins { | |||
| 623 | #define MX31_PIN_GPIO3_0__GPIO3_0 IOMUX_MODE(MX31_PIN_GPIO3_0, IOMUX_CONFIG_GPIO) | 631 | #define MX31_PIN_GPIO3_0__GPIO3_0 IOMUX_MODE(MX31_PIN_GPIO3_0, IOMUX_CONFIG_GPIO) |
| 624 | #define MX31_PIN_GPIO3_1__GPIO3_1 IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO) | 632 | #define MX31_PIN_GPIO3_1__GPIO3_1 IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO) |
| 625 | #define MX31_PIN_TXD2__GPIO1_28 IOMUX_MODE(MX31_PIN_TXD2, IOMUX_CONFIG_GPIO) | 633 | #define MX31_PIN_TXD2__GPIO1_28 IOMUX_MODE(MX31_PIN_TXD2, IOMUX_CONFIG_GPIO) |
| 634 | #define MX31_PIN_CSI_D4__GPIO3_4 IOMUX_MODE(MX31_PIN_CSI_D4, IOMUX_CONFIG_GPIO) | ||
| 635 | #define MX31_PIN_CSI_D5__GPIO3_5 IOMUX_MODE(MX31_PIN_CSI_D5, IOMUX_CONFIG_GPIO) | ||
| 626 | #define MX31_PIN_USBOTG_DATA0__USBOTG_DATA0 IOMUX_MODE(MX31_PIN_USBOTG_DATA0, IOMUX_CONFIG_FUNC) | 636 | #define MX31_PIN_USBOTG_DATA0__USBOTG_DATA0 IOMUX_MODE(MX31_PIN_USBOTG_DATA0, IOMUX_CONFIG_FUNC) |
| 627 | #define MX31_PIN_USBOTG_DATA1__USBOTG_DATA1 IOMUX_MODE(MX31_PIN_USBOTG_DATA1, IOMUX_CONFIG_FUNC) | 637 | #define MX31_PIN_USBOTG_DATA1__USBOTG_DATA1 IOMUX_MODE(MX31_PIN_USBOTG_DATA1, IOMUX_CONFIG_FUNC) |
| 628 | #define MX31_PIN_USBOTG_DATA2__USBOTG_DATA2 IOMUX_MODE(MX31_PIN_USBOTG_DATA2, IOMUX_CONFIG_FUNC) | 638 | #define MX31_PIN_USBOTG_DATA2__USBOTG_DATA2 IOMUX_MODE(MX31_PIN_USBOTG_DATA2, IOMUX_CONFIG_FUNC) |
| @@ -642,12 +652,22 @@ enum iomux_pins { | |||
| 642 | #define MX31_PIN_CSPI1_SS2__USBH1_RCV IOMUX_MODE(MX31_PIN_CSPI1_SS2, IOMUX_CONFIG_ALT1) | 652 | #define MX31_PIN_CSPI1_SS2__USBH1_RCV IOMUX_MODE(MX31_PIN_CSPI1_SS2, IOMUX_CONFIG_ALT1) |
| 643 | #define MX31_PIN_CSPI1_SCLK__USBH1_OEB IOMUX_MODE(MX31_PIN_CSPI1_SCLK, IOMUX_CONFIG_ALT1) | 653 | #define MX31_PIN_CSPI1_SCLK__USBH1_OEB IOMUX_MODE(MX31_PIN_CSPI1_SCLK, IOMUX_CONFIG_ALT1) |
| 644 | #define MX31_PIN_CSPI1_SPI_RDY__USBH1_FS IOMUX_MODE(MX31_PIN_CSPI1_SPI_RDY, IOMUX_CONFIG_ALT1) | 654 | #define MX31_PIN_CSPI1_SPI_RDY__USBH1_FS IOMUX_MODE(MX31_PIN_CSPI1_SPI_RDY, IOMUX_CONFIG_ALT1) |
| 655 | #define MX31_PIN_SFS6__USBH1_SUSPEND IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_FUNC) | ||
| 656 | #define MX31_PIN_NFRE_B__GPIO1_11 IOMUX_MODE(MX31_PIN_NFRE_B, IOMUX_CONFIG_GPIO) | ||
| 657 | #define MX31_PIN_NFALE__GPIO1_12 IOMUX_MODE(MX31_PIN_NFALE, IOMUX_CONFIG_GPIO) | ||
| 645 | #define MX31_PIN_USBH2_DATA0__USBH2_DATA0 IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC) | 658 | #define MX31_PIN_USBH2_DATA0__USBH2_DATA0 IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC) |
| 646 | #define MX31_PIN_USBH2_DATA1__USBH2_DATA1 IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC) | 659 | #define MX31_PIN_USBH2_DATA1__USBH2_DATA1 IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC) |
| 660 | #define MX31_PIN_STXD3__USBH2_DATA2 IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC) | ||
| 661 | #define MX31_PIN_SRXD3__USBH2_DATA3 IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC) | ||
| 662 | #define MX31_PIN_SCK3__USBH2_DATA4 IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC) | ||
| 663 | #define MX31_PIN_SFS3__USBH2_DATA5 IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC) | ||
| 664 | #define MX31_PIN_STXD6__USBH2_DATA6 IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC) | ||
| 665 | #define MX31_PIN_SRXD6__USBH2_DATA7 IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC) | ||
| 647 | #define MX31_PIN_USBH2_CLK__USBH2_CLK IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC) | 666 | #define MX31_PIN_USBH2_CLK__USBH2_CLK IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC) |
| 648 | #define MX31_PIN_USBH2_DIR__USBH2_DIR IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC) | 667 | #define MX31_PIN_USBH2_DIR__USBH2_DIR IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC) |
| 649 | #define MX31_PIN_USBH2_NXT__USBH2_NXT IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC) | 668 | #define MX31_PIN_USBH2_NXT__USBH2_NXT IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC) |
| 650 | #define MX31_PIN_USBH2_STP__USBH2_STP IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC) | 669 | #define MX31_PIN_USBH2_STP__USBH2_STP IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC) |
| 670 | #define MX31_PIN_SCK6__GPIO1_25 IOMUX_MODE(MX31_PIN_SCK6, IOMUX_CONFIG_GPIO) | ||
| 651 | #define MX31_PIN_USB_OC__GPIO1_30 IOMUX_MODE(MX31_PIN_USB_OC, IOMUX_CONFIG_GPIO) | 671 | #define MX31_PIN_USB_OC__GPIO1_30 IOMUX_MODE(MX31_PIN_USB_OC, IOMUX_CONFIG_GPIO) |
| 652 | #define MX31_PIN_I2C_DAT__I2C1_SDA IOMUX_MODE(MX31_PIN_I2C_DAT, IOMUX_CONFIG_FUNC) | 672 | #define MX31_PIN_I2C_DAT__I2C1_SDA IOMUX_MODE(MX31_PIN_I2C_DAT, IOMUX_CONFIG_FUNC) |
| 653 | #define MX31_PIN_I2C_CLK__I2C1_SCL IOMUX_MODE(MX31_PIN_I2C_CLK, IOMUX_CONFIG_FUNC) | 673 | #define MX31_PIN_I2C_CLK__I2C1_SCL IOMUX_MODE(MX31_PIN_I2C_CLK, IOMUX_CONFIG_FUNC) |
| @@ -693,7 +713,19 @@ enum iomux_pins { | |||
| 693 | #define MX31_PIN_DCD_DCE1__GPIO2_11 IOMUX_MODE(MX31_PIN_DCD_DCE1, IOMUX_CONFIG_GPIO) | 713 | #define MX31_PIN_DCD_DCE1__GPIO2_11 IOMUX_MODE(MX31_PIN_DCD_DCE1, IOMUX_CONFIG_GPIO) |
| 694 | #define MX31_PIN_STXD5__GPIO1_21 IOMUX_MODE(MX31_PIN_STXD5, IOMUX_CONFIG_GPIO) | 714 | #define MX31_PIN_STXD5__GPIO1_21 IOMUX_MODE(MX31_PIN_STXD5, IOMUX_CONFIG_GPIO) |
| 695 | #define MX31_PIN_SRXD5__GPIO1_22 IOMUX_MODE(MX31_PIN_SRXD5, IOMUX_CONFIG_GPIO) | 715 | #define MX31_PIN_SRXD5__GPIO1_22 IOMUX_MODE(MX31_PIN_SRXD5, IOMUX_CONFIG_GPIO) |
| 696 | 716 | #define MX31_PIN_GPIO1_3__GPIO1_3 IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO) | |
| 717 | #define MX31_PIN_CSPI2_SS1__CSPI3_SS1 IOMUX_MODE(MX31_PIN_CSPI2_SS1, IOMUX_CONFIG_ALT1) | ||
| 718 | #define MX31_PIN_RTS1__GPIO2_6 IOMUX_MODE(MX31_PIN_RTS1, IOMUX_CONFIG_GPIO) | ||
| 719 | #define MX31_PIN_CTS1__GPIO2_7 IOMUX_MODE(MX31_PIN_CTS1, IOMUX_CONFIG_GPIO) | ||
| 720 | #define MX31_PIN_LCS0__GPIO3_23 IOMUX_MODE(MX31_PIN_LCS0, IOMUX_CONFIG_GPIO) | ||
| 721 | #define MX31_PIN_STXD4__STXD4 IOMUX_MODE(MX31_PIN_STXD4, IOMUX_CONFIG_FUNC) | ||
| 722 | #define MX31_PIN_SRXD4__SRXD4 IOMUX_MODE(MX31_PIN_SRXD4, IOMUX_CONFIG_FUNC) | ||
| 723 | #define MX31_PIN_SCK4__SCK4 IOMUX_MODE(MX31_PIN_SCK4, IOMUX_CONFIG_FUNC) | ||
| 724 | #define MX31_PIN_SFS4__SFS4 IOMUX_MODE(MX31_PIN_SFS4, IOMUX_CONFIG_FUNC) | ||
| 725 | #define MX31_PIN_STXD5__STXD5 IOMUX_MODE(MX31_PIN_STXD5, IOMUX_CONFIG_FUNC) | ||
| 726 | #define MX31_PIN_SRXD5__SRXD5 IOMUX_MODE(MX31_PIN_SRXD5, IOMUX_CONFIG_FUNC) | ||
| 727 | #define MX31_PIN_SCK5__SCK5 IOMUX_MODE(MX31_PIN_SCK5, IOMUX_CONFIG_FUNC) | ||
| 728 | #define MX31_PIN_SFS5__SFS5 IOMUX_MODE(MX31_PIN_SFS5, IOMUX_CONFIG_FUNC) | ||
| 697 | 729 | ||
| 698 | /*XXX: The SS0, SS1, SS2, SS3 lines of spi3 are multiplexed by cspi2_ss0, cspi2_ss1, cspi1_ss0 | 730 | /*XXX: The SS0, SS1, SS2, SS3 lines of spi3 are multiplexed by cspi2_ss0, cspi2_ss1, cspi1_ss0 |
| 699 | * cspi1_ss1*/ | 731 | * cspi1_ss1*/ |
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v3.h b/arch/arm/plat-mxc/include/mach/iomux-v3.h index a0fa4026546..1deda018489 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-v3.h +++ b/arch/arm/plat-mxc/include/mach/iomux-v3.h | |||
| @@ -88,9 +88,7 @@ struct pad_desc { | |||
| 88 | #define PAD_CTL_SRE_FAST (1 << 0) | 88 | #define PAD_CTL_SRE_FAST (1 << 0) |
| 89 | 89 | ||
| 90 | /* | 90 | /* |
| 91 | * setups a single pad: | 91 | * setups a single pad in the iomuxer |
| 92 | * - reserves the pad so that it is not claimed by another driver | ||
| 93 | * - setups the iomux according to the configuration | ||
| 94 | */ | 92 | */ |
| 95 | int mxc_iomux_v3_setup_pad(struct pad_desc *pad); | 93 | int mxc_iomux_v3_setup_pad(struct pad_desc *pad); |
| 96 | 94 | ||
| @@ -101,19 +99,6 @@ int mxc_iomux_v3_setup_pad(struct pad_desc *pad); | |||
| 101 | int mxc_iomux_v3_setup_multiple_pads(struct pad_desc *pad_list, unsigned count); | 99 | int mxc_iomux_v3_setup_multiple_pads(struct pad_desc *pad_list, unsigned count); |
| 102 | 100 | ||
| 103 | /* | 101 | /* |
| 104 | * releases a single pad: | ||
| 105 | * - make it available for a future use by another driver | ||
| 106 | * - DOES NOT reconfigure the IOMUX in its reset state | ||
| 107 | */ | ||
| 108 | void mxc_iomux_v3_release_pad(struct pad_desc *pad); | ||
| 109 | |||
| 110 | /* | ||
| 111 | * releases multiple pads | ||
| 112 | * convenvient way to call the above function with tables | ||
| 113 | */ | ||
| 114 | void mxc_iomux_v3_release_multiple_pads(struct pad_desc *pad_list, int count); | ||
| 115 | |||
| 116 | /* | ||
| 117 | * Initialise the iomux controller | 102 | * Initialise the iomux controller |
| 118 | */ | 103 | */ |
| 119 | void mxc_iomux_v3_init(void __iomem *iomux_v3_base); | 104 | void mxc_iomux_v3_init(void __iomem *iomux_v3_base); |
diff --git a/arch/arm/plat-mxc/include/mach/iomux.h b/arch/arm/plat-mxc/include/mach/iomux.h index 6d49f8ae325..011cfcd8b82 100644 --- a/arch/arm/plat-mxc/include/mach/iomux.h +++ b/arch/arm/plat-mxc/include/mach/iomux.h | |||
| @@ -123,6 +123,7 @@ | |||
| 123 | #define IRQ_GPIOC(x) (IRQ_GPIOB(32) + x) | 123 | #define IRQ_GPIOC(x) (IRQ_GPIOB(32) + x) |
| 124 | #define IRQ_GPIOD(x) (IRQ_GPIOC(32) + x) | 124 | #define IRQ_GPIOD(x) (IRQ_GPIOC(32) + x) |
| 125 | #define IRQ_GPIOE(x) (IRQ_GPIOD(32) + x) | 125 | #define IRQ_GPIOE(x) (IRQ_GPIOD(32) + x) |
| 126 | #define IRQ_GPIOF(x) (IRQ_GPIOE(32) + x) | ||
| 126 | 127 | ||
| 127 | 128 | ||
| 128 | extern void mxc_gpio_mode(int gpio_mode); | 129 | extern void mxc_gpio_mode(int gpio_mode); |
diff --git a/arch/arm/plat-mxc/include/mach/mx21.h b/arch/arm/plat-mxc/include/mach/mx21.h index 21112c695ec..bb297d8765a 100644 --- a/arch/arm/plat-mxc/include/mach/mx21.h +++ b/arch/arm/plat-mxc/include/mach/mx21.h | |||
| @@ -25,46 +25,191 @@ | |||
| 25 | #ifndef __ASM_ARCH_MXC_MX21_H__ | 25 | #ifndef __ASM_ARCH_MXC_MX21_H__ |
| 26 | #define __ASM_ARCH_MXC_MX21_H__ | 26 | #define __ASM_ARCH_MXC_MX21_H__ |
| 27 | 27 | ||
| 28 | #define MX21_AIPI_BASE_ADDR 0x10000000 | ||
| 29 | #define MX21_AIPI_BASE_ADDR_VIRT 0xf4000000 | ||
| 30 | #define MX21_AIPI_SIZE SZ_1M | ||
| 31 | #define MX21_DMA_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x01000) | ||
| 32 | #define MX21_WDOG_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x02000) | ||
| 33 | #define MX21_GPT1_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x03000) | ||
| 34 | #define MX21_GPT2_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x04000) | ||
| 35 | #define MX21_GPT3_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x05000) | ||
| 36 | #define MX21_PWM_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x06000) | ||
| 37 | #define MX21_RTC_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x07000) | ||
| 38 | #define MX21_KPP_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x08000) | ||
| 39 | #define MX21_OWIRE_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x09000) | ||
| 40 | #define MX21_UART1_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x0a000) | ||
| 41 | #define MX21_UART2_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x0b000) | ||
| 42 | #define MX21_UART3_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x0c000) | ||
| 43 | #define MX21_UART4_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x0d000) | ||
| 44 | #define MX21_CSPI1_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x0e000) | ||
| 45 | #define MX21_CSPI2_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x0f000) | ||
| 46 | #define MX21_SSI1_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x10000) | ||
| 47 | #define MX21_SSI2_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x11000) | ||
| 48 | #define MX21_I2C_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x12000) | ||
| 49 | #define MX21_SDHC1_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x13000) | ||
| 50 | #define MX21_SDHC2_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x14000) | ||
| 51 | #define MX21_GPIO_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x15000) | ||
| 52 | #define MX21_AUDMUX_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x16000) | ||
| 53 | #define MX21_CSPI3_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x17000) | ||
| 54 | #define MX21_LCDC_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x21000) | ||
| 55 | #define MX21_SLCDC_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x22000) | ||
| 56 | #define MX21_USBOTG_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x24000) | ||
| 57 | #define MX21_EMMA_PP_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x26000) | ||
| 58 | #define MX21_EMMA_PRP_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x26400) | ||
| 59 | #define MX21_CCM_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x27000) | ||
| 60 | #define MX21_SYSCTRL_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x27800) | ||
| 61 | #define MX21_JAM_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x3e000) | ||
| 62 | #define MX21_MAX_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x3f000) | ||
| 63 | |||
| 64 | #define MX21_AVIC_BASE_ADDR 0x10040000 | ||
| 65 | |||
| 66 | #define MX21_SAHB1_BASE_ADDR 0x80000000 | ||
| 67 | #define MX21_SAHB1_BASE_ADDR_VIRT 0xf4100000 | ||
| 68 | #define MX21_SAHB1_SIZE SZ_1M | ||
| 69 | #define MX21_CSI_BASE_ADDR (MX2x_SAHB1_BASE_ADDR + 0x0000) | ||
| 70 | |||
| 28 | /* Memory regions and CS */ | 71 | /* Memory regions and CS */ |
| 29 | #define SDRAM_BASE_ADDR 0xC0000000 | 72 | #define MX21_SDRAM_BASE_ADDR 0xc0000000 |
| 30 | #define CSD1_BASE_ADDR 0xC4000000 | 73 | #define MX21_CSD1_BASE_ADDR 0xc4000000 |
| 31 | 74 | ||
| 32 | #define CS0_BASE_ADDR 0xC8000000 | 75 | #define MX21_CS0_BASE_ADDR 0xc8000000 |
| 33 | #define CS1_BASE_ADDR 0xCC000000 | 76 | #define MX21_CS1_BASE_ADDR 0xcc000000 |
| 34 | #define CS2_BASE_ADDR 0xD0000000 | 77 | #define MX21_CS2_BASE_ADDR 0xd0000000 |
| 35 | #define CS3_BASE_ADDR 0xD1000000 | 78 | #define MX21_CS3_BASE_ADDR 0xd1000000 |
| 36 | #define CS4_BASE_ADDR 0xD2000000 | 79 | #define MX21_CS4_BASE_ADDR 0xd2000000 |
| 37 | #define CS5_BASE_ADDR 0xDD000000 | 80 | #define MX21_PCMCIA_MEM_BASE_ADDR 0xd4000000 |
| 38 | #define PCMCIA_MEM_BASE_ADDR 0xD4000000 | 81 | #define MX21_CS5_BASE_ADDR 0xdd000000 |
| 39 | 82 | ||
| 40 | /* NAND, SDRAM, WEIM etc controllers */ | 83 | /* NAND, SDRAM, WEIM etc controllers */ |
| 41 | #define X_MEMC_BASE_ADDR 0xDF000000 | 84 | #define MX21_X_MEMC_BASE_ADDR 0xdf000000 |
| 42 | #define X_MEMC_BASE_ADDR_VIRT 0xF4200000 | 85 | #define MX21_X_MEMC_BASE_ADDR_VIRT 0xf4200000 |
| 43 | #define X_MEMC_SIZE SZ_256K | 86 | #define MX21_X_MEMC_SIZE SZ_256K |
| 44 | 87 | ||
| 45 | #define SDRAMC_BASE_ADDR (X_MEMC_BASE_ADDR + 0x0000) | 88 | #define MX21_SDRAMC_BASE_ADDR (MX21_X_MEMC_BASE_ADDR + 0x0000) |
| 46 | #define EIM_BASE_ADDR (X_MEMC_BASE_ADDR + 0x1000) | 89 | #define MX21_EIM_BASE_ADDR (MX21_X_MEMC_BASE_ADDR + 0x1000) |
| 47 | #define PCMCIA_CTL_BASE_ADDR (X_MEMC_BASE_ADDR + 0x2000) | 90 | #define MX21_PCMCIA_CTL_BASE_ADDR (MX21_X_MEMC_BASE_ADDR + 0x2000) |
| 48 | #define NFC_BASE_ADDR (X_MEMC_BASE_ADDR + 0x3000) | 91 | #define MX21_NFC_BASE_ADDR (MX21_X_MEMC_BASE_ADDR + 0x3000) |
| 49 | 92 | ||
| 50 | #define IRAM_BASE_ADDR 0xFFFFE800 /* internal ram */ | 93 | #define MX21_IRAM_BASE_ADDR 0xffffe800 /* internal ram */ |
| 51 | 94 | ||
| 52 | /* fixed interrupt numbers */ | 95 | /* fixed interrupt numbers */ |
| 53 | #define MXC_INT_USBCTRL 58 | 96 | #define MX21_INT_CSPI3 6 |
| 54 | #define MXC_INT_USBCTRL 58 | 97 | #define MX21_INT_GPIO 8 |
| 55 | #define MXC_INT_USBMNP 57 | 98 | #define MX21_INT_FIRI 9 |
| 56 | #define MXC_INT_USBFUNC 56 | 99 | #define MX21_INT_SDHC2 10 |
| 57 | #define MXC_INT_USBHOST 55 | 100 | #define MX21_INT_SDHC1 11 |
| 58 | #define MXC_INT_USBDMA 54 | 101 | #define MX21_INT_I2C 12 |
| 59 | #define MXC_INT_USBWKUP 53 | 102 | #define MX21_INT_SSI2 13 |
| 60 | #define MXC_INT_EMMADEC 50 | 103 | #define MX21_INT_SSI1 14 |
| 61 | #define MXC_INT_EMMAENC 49 | 104 | #define MX21_INT_CSPI2 15 |
| 62 | #define MXC_INT_BMI 30 | 105 | #define MX21_INT_CSPI1 16 |
| 63 | #define MXC_INT_FIRI 9 | 106 | #define MX21_INT_UART4 17 |
| 107 | #define MX21_INT_UART3 18 | ||
| 108 | #define MX21_INT_UART2 19 | ||
| 109 | #define MX21_INT_UART1 20 | ||
| 110 | #define MX21_INT_KPP 21 | ||
| 111 | #define MX21_INT_RTC 22 | ||
| 112 | #define MX21_INT_PWM 23 | ||
| 113 | #define MX21_INT_GPT3 24 | ||
| 114 | #define MX21_INT_GPT2 25 | ||
| 115 | #define MX21_INT_GPT1 26 | ||
| 116 | #define MX21_INT_WDOG 27 | ||
| 117 | #define MX21_INT_PCMCIA 28 | ||
| 118 | #define MX21_INT_NANDFC 29 | ||
| 119 | #define MX21_INT_BMI 30 | ||
| 120 | #define MX21_INT_CSI 31 | ||
| 121 | #define MX21_INT_DMACH0 32 | ||
| 122 | #define MX21_INT_DMACH1 33 | ||
| 123 | #define MX21_INT_DMACH2 34 | ||
| 124 | #define MX21_INT_DMACH3 35 | ||
| 125 | #define MX21_INT_DMACH4 36 | ||
| 126 | #define MX21_INT_DMACH5 37 | ||
| 127 | #define MX21_INT_DMACH6 38 | ||
| 128 | #define MX21_INT_DMACH7 39 | ||
| 129 | #define MX21_INT_DMACH8 40 | ||
| 130 | #define MX21_INT_DMACH9 41 | ||
| 131 | #define MX21_INT_DMACH10 42 | ||
| 132 | #define MX21_INT_DMACH11 43 | ||
| 133 | #define MX21_INT_DMACH12 44 | ||
| 134 | #define MX21_INT_DMACH13 45 | ||
| 135 | #define MX21_INT_DMACH14 46 | ||
| 136 | #define MX21_INT_DMACH15 47 | ||
| 137 | #define MX21_INT_EMMAENC 49 | ||
| 138 | #define MX21_INT_EMMADEC 50 | ||
| 139 | #define MX21_INT_EMMAPRP 51 | ||
| 140 | #define MX21_INT_EMMAPP 52 | ||
| 141 | #define MX21_INT_USBWKUP 53 | ||
| 142 | #define MX21_INT_USBDMA 54 | ||
| 143 | #define MX21_INT_USBHOST 55 | ||
| 144 | #define MX21_INT_USBFUNC 56 | ||
| 145 | #define MX21_INT_USBMNP 57 | ||
| 146 | #define MX21_INT_USBCTRL 58 | ||
| 147 | #define MX21_INT_SLCDC 60 | ||
| 148 | #define MX21_INT_LCDC 61 | ||
| 64 | 149 | ||
| 65 | /* fixed DMA request numbers */ | 150 | /* fixed DMA request numbers */ |
| 66 | #define DMA_REQ_BMI_RX 29 | 151 | #define MX21_DMA_REQ_CSPI3_RX 1 |
| 67 | #define DMA_REQ_BMI_TX 28 | 152 | #define MX21_DMA_REQ_CSPI3_TX 2 |
| 68 | #define DMA_REQ_FIRI_RX 4 | 153 | #define MX21_DMA_REQ_EXT 3 |
| 154 | #define MX21_DMA_REQ_FIRI_RX 4 | ||
| 155 | #define MX21_DMA_REQ_SDHC2 6 | ||
| 156 | #define MX21_DMA_REQ_SDHC1 7 | ||
| 157 | #define MX21_DMA_REQ_SSI2_RX0 8 | ||
| 158 | #define MX21_DMA_REQ_SSI2_TX0 9 | ||
| 159 | #define MX21_DMA_REQ_SSI2_RX1 10 | ||
| 160 | #define MX21_DMA_REQ_SSI2_TX1 11 | ||
| 161 | #define MX21_DMA_REQ_SSI1_RX0 12 | ||
| 162 | #define MX21_DMA_REQ_SSI1_TX0 13 | ||
| 163 | #define MX21_DMA_REQ_SSI1_RX1 14 | ||
| 164 | #define MX21_DMA_REQ_SSI1_TX1 15 | ||
| 165 | #define MX21_DMA_REQ_CSPI2_RX 16 | ||
| 166 | #define MX21_DMA_REQ_CSPI2_TX 17 | ||
| 167 | #define MX21_DMA_REQ_CSPI1_RX 18 | ||
| 168 | #define MX21_DMA_REQ_CSPI1_TX 19 | ||
| 169 | #define MX21_DMA_REQ_UART4_RX 20 | ||
| 170 | #define MX21_DMA_REQ_UART4_TX 21 | ||
| 171 | #define MX21_DMA_REQ_UART3_RX 22 | ||
| 172 | #define MX21_DMA_REQ_UART3_TX 23 | ||
| 173 | #define MX21_DMA_REQ_UART2_RX 24 | ||
| 174 | #define MX21_DMA_REQ_UART2_TX 25 | ||
| 175 | #define MX21_DMA_REQ_UART1_RX 26 | ||
| 176 | #define MX21_DMA_REQ_UART1_TX 27 | ||
| 177 | #define MX21_DMA_REQ_BMI_TX 28 | ||
| 178 | #define MX21_DMA_REQ_BMI_RX 29 | ||
| 179 | #define MX21_DMA_REQ_CSI_STAT 30 | ||
| 180 | #define MX21_DMA_REQ_CSI_RX 31 | ||
| 181 | |||
| 182 | /* these should go away */ | ||
| 183 | #define SDRAM_BASE_ADDR MX21_SDRAM_BASE_ADDR | ||
| 184 | #define CSD1_BASE_ADDR MX21_CSD1_BASE_ADDR | ||
| 185 | #define CS0_BASE_ADDR MX21_CS0_BASE_ADDR | ||
| 186 | #define CS1_BASE_ADDR MX21_CS1_BASE_ADDR | ||
| 187 | #define CS2_BASE_ADDR MX21_CS2_BASE_ADDR | ||
| 188 | #define CS3_BASE_ADDR MX21_CS3_BASE_ADDR | ||
| 189 | #define CS4_BASE_ADDR MX21_CS4_BASE_ADDR | ||
| 190 | #define PCMCIA_MEM_BASE_ADDR MX21_PCMCIA_MEM_BASE_ADDR | ||
| 191 | #define CS5_BASE_ADDR MX21_CS5_BASE_ADDR | ||
| 192 | #define X_MEMC_BASE_ADDR MX21_X_MEMC_BASE_ADDR | ||
| 193 | #define X_MEMC_BASE_ADDR_VIRT MX21_X_MEMC_BASE_ADDR_VIRT | ||
| 194 | #define X_MEMC_SIZE MX21_X_MEMC_SIZE | ||
| 195 | #define SDRAMC_BASE_ADDR MX21_SDRAMC_BASE_ADDR | ||
| 196 | #define EIM_BASE_ADDR MX21_EIM_BASE_ADDR | ||
| 197 | #define PCMCIA_CTL_BASE_ADDR MX21_PCMCIA_CTL_BASE_ADDR | ||
| 198 | #define NFC_BASE_ADDR MX21_NFC_BASE_ADDR | ||
| 199 | #define IRAM_BASE_ADDR MX21_IRAM_BASE_ADDR | ||
| 200 | #define MXC_INT_FIRI MX21_INT_FIRI | ||
| 201 | #define MXC_INT_BMI MX21_INT_BMI | ||
| 202 | #define MXC_INT_EMMAENC MX21_INT_EMMAENC | ||
| 203 | #define MXC_INT_EMMADEC MX21_INT_EMMADEC | ||
| 204 | #define MXC_INT_USBWKUP MX21_INT_USBWKUP | ||
| 205 | #define MXC_INT_USBDMA MX21_INT_USBDMA | ||
| 206 | #define MXC_INT_USBHOST MX21_INT_USBHOST | ||
| 207 | #define MXC_INT_USBFUNC MX21_INT_USBFUNC | ||
| 208 | #define MXC_INT_USBMNP MX21_INT_USBMNP | ||
| 209 | #define MXC_INT_USBCTRL MX21_INT_USBCTRL | ||
| 210 | #define MXC_INT_USBCTRL MX21_INT_USBCTRL | ||
| 211 | #define DMA_REQ_FIRI_RX MX21_DMA_REQ_FIRI_RX | ||
| 212 | #define DMA_REQ_BMI_TX MX21_DMA_REQ_BMI_TX | ||
| 213 | #define DMA_REQ_BMI_RX MX21_DMA_REQ_BMI_RX | ||
| 69 | 214 | ||
| 70 | #endif /* __ASM_ARCH_MXC_MX21_H__ */ | 215 | #endif /* __ASM_ARCH_MXC_MX21_H__ */ |
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h index ec64bd9a8ab..91e73814480 100644 --- a/arch/arm/plat-mxc/include/mach/mx25.h +++ b/arch/arm/plat-mxc/include/mach/mx25.h | |||
| @@ -1,14 +1,14 @@ | |||
| 1 | #ifndef __MACH_MX25_H__ | 1 | #ifndef __MACH_MX25_H__ |
| 2 | #define __MACH_MX25_H__ | 2 | #define __MACH_MX25_H__ |
| 3 | 3 | ||
| 4 | #define MX25_AIPS1_BASE_ADDR 0x43F00000 | 4 | #define MX25_AIPS1_BASE_ADDR 0x43f00000 |
| 5 | #define MX25_AIPS1_BASE_ADDR_VIRT 0xFC000000 | 5 | #define MX25_AIPS1_BASE_ADDR_VIRT 0xfc000000 |
| 6 | #define MX25_AIPS1_SIZE SZ_1M | 6 | #define MX25_AIPS1_SIZE SZ_1M |
| 7 | #define MX25_AIPS2_BASE_ADDR 0x53F00000 | 7 | #define MX25_AIPS2_BASE_ADDR 0x53f00000 |
| 8 | #define MX25_AIPS2_BASE_ADDR_VIRT 0xFC200000 | 8 | #define MX25_AIPS2_BASE_ADDR_VIRT 0xfc200000 |
| 9 | #define MX25_AIPS2_SIZE SZ_1M | 9 | #define MX25_AIPS2_SIZE SZ_1M |
| 10 | #define MX25_AVIC_BASE_ADDR 0x68000000 | 10 | #define MX25_AVIC_BASE_ADDR 0x68000000 |
| 11 | #define MX25_AVIC_BASE_ADDR_VIRT 0xFC400000 | 11 | #define MX25_AVIC_BASE_ADDR_VIRT 0xfc400000 |
| 12 | #define MX25_AVIC_SIZE SZ_1M | 12 | #define MX25_AVIC_SIZE SZ_1M |
| 13 | 13 | ||
| 14 | #define MX25_IOMUXC_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0xac000) | 14 | #define MX25_IOMUXC_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0xac000) |
diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/plat-mxc/include/mach/mx27.h index dc3ad9aa952..e2ae19f5171 100644 --- a/arch/arm/plat-mxc/include/mach/mx27.h +++ b/arch/arm/plat-mxc/include/mach/mx27.h | |||
| @@ -24,87 +24,198 @@ | |||
| 24 | #ifndef __ASM_ARCH_MXC_MX27_H__ | 24 | #ifndef __ASM_ARCH_MXC_MX27_H__ |
| 25 | #define __ASM_ARCH_MXC_MX27_H__ | 25 | #define __ASM_ARCH_MXC_MX27_H__ |
| 26 | 26 | ||
| 27 | /* IRAM */ | 27 | #define MX27_AIPI_BASE_ADDR 0x10000000 |
| 28 | #define IRAM_BASE_ADDR 0xFFFF4C00 /* internal ram */ | 28 | #define MX27_AIPI_BASE_ADDR_VIRT 0xf4000000 |
| 29 | 29 | #define MX27_AIPI_SIZE SZ_1M | |
| 30 | #define MSHC_BASE_ADDR (AIPI_BASE_ADDR + 0x18000) | 30 | #define MX27_DMA_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x01000) |
| 31 | #define GPT5_BASE_ADDR (AIPI_BASE_ADDR + 0x19000) | 31 | #define MX27_WDOG_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x02000) |
| 32 | #define GPT4_BASE_ADDR (AIPI_BASE_ADDR + 0x1A000) | 32 | #define MX27_GPT1_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x03000) |
| 33 | #define UART5_BASE_ADDR (AIPI_BASE_ADDR + 0x1B000) | 33 | #define MX27_GPT2_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x04000) |
| 34 | #define UART6_BASE_ADDR (AIPI_BASE_ADDR + 0x1C000) | 34 | #define MX27_GPT3_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x05000) |
| 35 | #define I2C2_BASE_ADDR (AIPI_BASE_ADDR + 0x1D000) | 35 | #define MX27_PWM_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x06000) |
| 36 | #define SDHC3_BASE_ADDR (AIPI_BASE_ADDR + 0x1E000) | 36 | #define MX27_RTC_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x07000) |
| 37 | #define GPT6_BASE_ADDR (AIPI_BASE_ADDR + 0x1F000) | 37 | #define MX27_KPP_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x08000) |
| 38 | #define VPU_BASE_ADDR (AIPI_BASE_ADDR + 0x23000) | 38 | #define MX27_OWIRE_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x09000) |
| 39 | #define OTG_BASE_ADDR USBOTG_BASE_ADDR | 39 | #define MX27_UART1_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x0a000) |
| 40 | #define SAHARA_BASE_ADDR (AIPI_BASE_ADDR + 0x25000) | 40 | #define MX27_UART2_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x0b000) |
| 41 | #define IIM_BASE_ADDR (AIPI_BASE_ADDR + 0x28000) | 41 | #define MX27_UART3_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x0c000) |
| 42 | #define RTIC_BASE_ADDR (AIPI_BASE_ADDR + 0x2A000) | 42 | #define MX27_UART4_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x0d000) |
| 43 | #define FEC_BASE_ADDR (AIPI_BASE_ADDR + 0x2B000) | 43 | #define MX27_CSPI1_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x0e000) |
| 44 | #define SCC_BASE_ADDR (AIPI_BASE_ADDR + 0x2C000) | 44 | #define MX27_CSPI2_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x0f000) |
| 45 | #define ETB_BASE_ADDR (AIPI_BASE_ADDR + 0x3B000) | 45 | #define MX27_SSI1_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x10000) |
| 46 | #define ETB_RAM_BASE_ADDR (AIPI_BASE_ADDR + 0x3C000) | 46 | #define MX27_SSI2_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x11000) |
| 47 | #define MX27_I2C_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x12000) | ||
| 48 | #define MX27_SDHC1_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x13000) | ||
| 49 | #define MX27_SDHC2_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x14000) | ||
| 50 | #define MX27_GPIO_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x15000) | ||
| 51 | #define MX27_AUDMUX_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x16000) | ||
| 52 | #define MX27_CSPI3_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x17000) | ||
| 53 | #define MX27_MSHC_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x18000) | ||
| 54 | #define MX27_GPT5_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x19000) | ||
| 55 | #define MX27_GPT4_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x1a000) | ||
| 56 | #define MX27_UART5_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x1b000) | ||
| 57 | #define MX27_UART6_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x1c000) | ||
| 58 | #define MX27_I2C2_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x1d000) | ||
| 59 | #define MX27_SDHC3_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x1e000) | ||
| 60 | #define MX27_GPT6_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x1f000) | ||
| 61 | #define MX27_LCDC_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x21000) | ||
| 62 | #define MX27_SLCDC_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x22000) | ||
| 63 | #define MX27_VPU_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x23000) | ||
| 64 | #define MX27_USBOTG_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x24000) | ||
| 65 | #define MX27_OTG_BASE_ADDR MX27_USBOTG_BASE_ADDR | ||
| 66 | #define MX27_SAHARA_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x25000) | ||
| 67 | #define MX27_EMMA_PP_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x26000) | ||
| 68 | #define MX27_EMMA_PRP_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x26400) | ||
| 69 | #define MX27_CCM_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x27000) | ||
| 70 | #define MX27_SYSCTRL_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x27800) | ||
| 71 | #define MX27_IIM_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x28000) | ||
| 72 | #define MX27_RTIC_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x2a000) | ||
| 73 | #define MX27_FEC_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x2b000) | ||
| 74 | #define MX27_SCC_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x2c000) | ||
| 75 | #define MX27_ETB_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x3b000) | ||
| 76 | #define MX27_ETB_RAM_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x3c000) | ||
| 77 | #define MX27_JAM_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x3e000) | ||
| 78 | #define MX27_MAX_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x3f000) | ||
| 79 | |||
| 80 | #define MX27_AVIC_BASE_ADDR 0x10040000 | ||
| 47 | 81 | ||
| 48 | /* ROM patch */ | 82 | /* ROM patch */ |
| 49 | #define ROMP_BASE_ADDR 0x10041000 | 83 | #define MX27_ROMP_BASE_ADDR 0x10041000 |
| 50 | 84 | ||
| 51 | #define ATA_BASE_ADDR (SAHB1_BASE_ADDR + 0x1000) | 85 | #define MX27_SAHB1_BASE_ADDR 0x80000000 |
| 86 | #define MX27_SAHB1_BASE_ADDR_VIRT 0xf4100000 | ||
| 87 | #define MX27_SAHB1_SIZE SZ_1M | ||
| 88 | #define MX27_CSI_BASE_ADDR (MX27_SAHB1_BASE_ADDR + 0x0000) | ||
| 89 | #define MX27_ATA_BASE_ADDR (MX27_SAHB1_BASE_ADDR + 0x1000) | ||
| 52 | 90 | ||
| 53 | /* Memory regions and CS */ | 91 | /* Memory regions and CS */ |
| 54 | #define SDRAM_BASE_ADDR 0xA0000000 | 92 | #define MX27_SDRAM_BASE_ADDR 0xa0000000 |
| 55 | #define CSD1_BASE_ADDR 0xB0000000 | 93 | #define MX27_CSD1_BASE_ADDR 0xb0000000 |
| 56 | 94 | ||
| 57 | #define CS0_BASE_ADDR 0xC0000000 | 95 | #define MX27_CS0_BASE_ADDR 0xc0000000 |
| 58 | #define CS1_BASE_ADDR 0xC8000000 | 96 | #define MX27_CS1_BASE_ADDR 0xc8000000 |
| 59 | #define CS2_BASE_ADDR 0xD0000000 | 97 | #define MX27_CS2_BASE_ADDR 0xd0000000 |
| 60 | #define CS3_BASE_ADDR 0xD2000000 | 98 | #define MX27_CS3_BASE_ADDR 0xd2000000 |
| 61 | #define CS4_BASE_ADDR 0xD4000000 | 99 | #define MX27_CS4_BASE_ADDR 0xd4000000 |
| 62 | #define CS5_BASE_ADDR 0xD6000000 | 100 | #define MX27_CS5_BASE_ADDR 0xd6000000 |
| 63 | #define PCMCIA_MEM_BASE_ADDR 0xDC000000 | ||
| 64 | 101 | ||
| 65 | /* NAND, SDRAM, WEIM, M3IF, EMI controllers */ | 102 | /* NAND, SDRAM, WEIM, M3IF, EMI controllers */ |
| 66 | #define X_MEMC_BASE_ADDR 0xD8000000 | 103 | #define MX27_X_MEMC_BASE_ADDR 0xd8000000 |
| 67 | #define X_MEMC_BASE_ADDR_VIRT 0xF4200000 | 104 | #define MX27_X_MEMC_BASE_ADDR_VIRT 0xf4200000 |
| 68 | #define X_MEMC_SIZE SZ_1M | 105 | #define MX27_X_MEMC_SIZE SZ_1M |
| 106 | #define MX27_NFC_BASE_ADDR (MX27_X_MEMC_BASE_ADDR) | ||
| 107 | #define MX27_SDRAMC_BASE_ADDR (MX27_X_MEMC_BASE_ADDR + 0x1000) | ||
| 108 | #define MX27_WEIM_BASE_ADDR (MX27_X_MEMC_BASE_ADDR + 0x2000) | ||
| 109 | #define MX27_M3IF_BASE_ADDR (MX27_X_MEMC_BASE_ADDR + 0x3000) | ||
| 110 | #define MX27_PCMCIA_CTL_BASE_ADDR (MX27_X_MEMC_BASE_ADDR + 0x4000) | ||
| 69 | 111 | ||
| 70 | #define NFC_BASE_ADDR (X_MEMC_BASE_ADDR) | 112 | #define MX27_PCMCIA_MEM_BASE_ADDR 0xdc000000 |
| 71 | #define SDRAMC_BASE_ADDR (X_MEMC_BASE_ADDR + 0x1000) | 113 | |
| 72 | #define WEIM_BASE_ADDR (X_MEMC_BASE_ADDR + 0x2000) | 114 | /* IRAM */ |
| 73 | #define M3IF_BASE_ADDR (X_MEMC_BASE_ADDR + 0x3000) | 115 | #define MX27_IRAM_BASE_ADDR 0xffff4c00 /* internal ram */ |
| 74 | #define PCMCIA_CTL_BASE_ADDR (X_MEMC_BASE_ADDR + 0x4000) | ||
| 75 | 116 | ||
| 76 | /* fixed interrupt numbers */ | 117 | /* fixed interrupt numbers */ |
| 77 | #define MXC_INT_CCM 63 | 118 | #define MX27_INT_I2C2 1 |
| 78 | #define MXC_INT_IIM 62 | 119 | #define MX27_INT_GPT6 2 |
| 79 | #define MXC_INT_SAHARA 59 | 120 | #define MX27_INT_GPT5 3 |
| 80 | #define MXC_INT_SCC_SCM 58 | 121 | #define MX27_INT_GPT4 4 |
| 81 | #define MXC_INT_SCC_SMN 57 | 122 | #define MX27_INT_RTIC 5 |
| 82 | #define MXC_INT_USB3 56 | 123 | #define MX27_INT_CSPI3 6 |
| 83 | #define MXC_INT_USB2 55 | 124 | #define MX27_INT_SDHC 7 |
| 84 | #define MXC_INT_USB1 54 | 125 | #define MX27_INT_GPIO 8 |
| 85 | #define MXC_INT_VPU 53 | 126 | #define MX27_INT_SDHC3 9 |
| 86 | #define MXC_INT_FEC 50 | 127 | #define MX27_INT_SDHC2 10 |
| 87 | #define MXC_INT_UART5 49 | 128 | #define MX27_INT_SDHC1 11 |
| 88 | #define MXC_INT_UART6 48 | 129 | #define MX27_INT_I2C 12 |
| 89 | #define MXC_INT_ATA 30 | 130 | #define MX27_INT_SSI2 13 |
| 90 | #define MXC_INT_SDHC3 9 | 131 | #define MX27_INT_SSI1 14 |
| 91 | #define MXC_INT_SDHC 7 | 132 | #define MX27_INT_CSPI2 15 |
| 92 | #define MXC_INT_RTIC 5 | 133 | #define MX27_INT_CSPI1 16 |
| 93 | #define MXC_INT_GPT4 4 | 134 | #define MX27_INT_UART4 17 |
| 94 | #define MXC_INT_GPT5 3 | 135 | #define MX27_INT_UART3 18 |
| 95 | #define MXC_INT_GPT6 2 | 136 | #define MX27_INT_UART2 19 |
| 96 | #define MXC_INT_I2C2 1 | 137 | #define MX27_INT_UART1 20 |
| 138 | #define MX27_INT_KPP 21 | ||
| 139 | #define MX27_INT_RTC 22 | ||
| 140 | #define MX27_INT_PWM 23 | ||
| 141 | #define MX27_INT_GPT3 24 | ||
| 142 | #define MX27_INT_GPT2 25 | ||
| 143 | #define MX27_INT_GPT1 26 | ||
| 144 | #define MX27_INT_WDOG 27 | ||
| 145 | #define MX27_INT_PCMCIA 28 | ||
| 146 | #define MX27_INT_NANDFC 29 | ||
| 147 | #define MX27_INT_ATA 30 | ||
| 148 | #define MX27_INT_CSI 31 | ||
| 149 | #define MX27_INT_DMACH0 32 | ||
| 150 | #define MX27_INT_DMACH1 33 | ||
| 151 | #define MX27_INT_DMACH2 34 | ||
| 152 | #define MX27_INT_DMACH3 35 | ||
| 153 | #define MX27_INT_DMACH4 36 | ||
| 154 | #define MX27_INT_DMACH5 37 | ||
| 155 | #define MX27_INT_DMACH6 38 | ||
| 156 | #define MX27_INT_DMACH7 39 | ||
| 157 | #define MX27_INT_DMACH8 40 | ||
| 158 | #define MX27_INT_DMACH9 41 | ||
| 159 | #define MX27_INT_DMACH10 42 | ||
| 160 | #define MX27_INT_DMACH11 43 | ||
| 161 | #define MX27_INT_DMACH12 44 | ||
| 162 | #define MX27_INT_DMACH13 45 | ||
| 163 | #define MX27_INT_DMACH14 46 | ||
| 164 | #define MX27_INT_DMACH15 47 | ||
| 165 | #define MX27_INT_UART6 48 | ||
| 166 | #define MX27_INT_UART5 49 | ||
| 167 | #define MX27_INT_FEC 50 | ||
| 168 | #define MX27_INT_EMMAPRP 51 | ||
| 169 | #define MX27_INT_EMMAPP 52 | ||
| 170 | #define MX27_INT_VPU 53 | ||
| 171 | #define MX27_INT_USB1 54 | ||
| 172 | #define MX27_INT_USB2 55 | ||
| 173 | #define MX27_INT_USB3 56 | ||
| 174 | #define MX27_INT_SCC_SMN 57 | ||
| 175 | #define MX27_INT_SCC_SCM 58 | ||
| 176 | #define MX27_INT_SAHARA 59 | ||
| 177 | #define MX27_INT_SLCDC 60 | ||
| 178 | #define MX27_INT_LCDC 61 | ||
| 179 | #define MX27_INT_IIM 62 | ||
| 180 | #define MX27_INT_CCM 63 | ||
| 97 | 181 | ||
| 98 | /* fixed DMA request numbers */ | 182 | /* fixed DMA request numbers */ |
| 99 | #define DMA_REQ_NFC 37 | 183 | #define MX27_DMA_REQ_CSPI3_RX 1 |
| 100 | #define DMA_REQ_SDHC3 36 | 184 | #define MX27_DMA_REQ_CSPI3_TX 2 |
| 101 | #define DMA_REQ_UART6_RX 35 | 185 | #define MX27_DMA_REQ_EXT 3 |
| 102 | #define DMA_REQ_UART6_TX 34 | 186 | #define MX27_DMA_REQ_MSHC 4 |
| 103 | #define DMA_REQ_UART5_RX 33 | 187 | #define MX27_DMA_REQ_SDHC2 6 |
| 104 | #define DMA_REQ_UART5_TX 32 | 188 | #define MX27_DMA_REQ_SDHC1 7 |
| 105 | #define DMA_REQ_ATA_RCV 29 | 189 | #define MX27_DMA_REQ_SSI2_RX0 8 |
| 106 | #define DMA_REQ_ATA_TX 28 | 190 | #define MX27_DMA_REQ_SSI2_TX0 9 |
| 107 | #define DMA_REQ_MSHC 4 | 191 | #define MX27_DMA_REQ_SSI2_RX1 10 |
| 192 | #define MX27_DMA_REQ_SSI2_TX1 11 | ||
| 193 | #define MX27_DMA_REQ_SSI1_RX0 12 | ||
| 194 | #define MX27_DMA_REQ_SSI1_TX0 13 | ||
| 195 | #define MX27_DMA_REQ_SSI1_RX1 14 | ||
| 196 | #define MX27_DMA_REQ_SSI1_TX1 15 | ||
| 197 | #define MX27_DMA_REQ_CSPI2_RX 16 | ||
| 198 | #define MX27_DMA_REQ_CSPI2_TX 17 | ||
| 199 | #define MX27_DMA_REQ_CSPI1_RX 18 | ||
| 200 | #define MX27_DMA_REQ_CSPI1_TX 19 | ||
| 201 | #define MX27_DMA_REQ_UART4_RX 20 | ||
| 202 | #define MX27_DMA_REQ_UART4_TX 21 | ||
| 203 | #define MX27_DMA_REQ_UART3_RX 22 | ||
| 204 | #define MX27_DMA_REQ_UART3_TX 23 | ||
| 205 | #define MX27_DMA_REQ_UART2_RX 24 | ||
| 206 | #define MX27_DMA_REQ_UART2_TX 25 | ||
| 207 | #define MX27_DMA_REQ_UART1_RX 26 | ||
| 208 | #define MX27_DMA_REQ_UART1_TX 27 | ||
| 209 | #define MX27_DMA_REQ_ATA_TX 28 | ||
| 210 | #define MX27_DMA_REQ_ATA_RCV 29 | ||
| 211 | #define MX27_DMA_REQ_CSI_STAT 30 | ||
| 212 | #define MX27_DMA_REQ_CSI_RX 31 | ||
| 213 | #define MX27_DMA_REQ_UART5_TX 32 | ||
| 214 | #define MX27_DMA_REQ_UART5_RX 33 | ||
| 215 | #define MX27_DMA_REQ_UART6_TX 34 | ||
| 216 | #define MX27_DMA_REQ_UART6_RX 35 | ||
| 217 | #define MX27_DMA_REQ_SDHC3 36 | ||
| 218 | #define MX27_DMA_REQ_NFC 37 | ||
| 108 | 219 | ||
| 109 | /* silicon revisions specific to i.MX27 */ | 220 | /* silicon revisions specific to i.MX27 */ |
| 110 | #define CHIP_REV_1_0 0x00 | 221 | #define CHIP_REV_1_0 0x00 |
| @@ -114,6 +225,72 @@ | |||
| 114 | extern int mx27_revision(void); | 225 | extern int mx27_revision(void); |
| 115 | #endif | 226 | #endif |
| 116 | 227 | ||
| 117 | /* Mandatory defines used globally */ | 228 | /* these should go away */ |
| 229 | #define MSHC_BASE_ADDR MX27_MSHC_BASE_ADDR | ||
| 230 | #define GPT5_BASE_ADDR MX27_GPT5_BASE_ADDR | ||
| 231 | #define GPT4_BASE_ADDR MX27_GPT4_BASE_ADDR | ||
| 232 | #define UART5_BASE_ADDR MX27_UART5_BASE_ADDR | ||
| 233 | #define UART6_BASE_ADDR MX27_UART6_BASE_ADDR | ||
| 234 | #define I2C2_BASE_ADDR MX27_I2C2_BASE_ADDR | ||
| 235 | #define SDHC3_BASE_ADDR MX27_SDHC3_BASE_ADDR | ||
| 236 | #define GPT6_BASE_ADDR MX27_GPT6_BASE_ADDR | ||
| 237 | #define VPU_BASE_ADDR MX27_VPU_BASE_ADDR | ||
| 238 | #define OTG_BASE_ADDR MX27_OTG_BASE_ADDR | ||
| 239 | #define SAHARA_BASE_ADDR MX27_SAHARA_BASE_ADDR | ||
| 240 | #define IIM_BASE_ADDR MX27_IIM_BASE_ADDR | ||
| 241 | #define RTIC_BASE_ADDR MX27_RTIC_BASE_ADDR | ||
| 242 | #define FEC_BASE_ADDR MX27_FEC_BASE_ADDR | ||
| 243 | #define SCC_BASE_ADDR MX27_SCC_BASE_ADDR | ||
| 244 | #define ETB_BASE_ADDR MX27_ETB_BASE_ADDR | ||
| 245 | #define ETB_RAM_BASE_ADDR MX27_ETB_RAM_BASE_ADDR | ||
| 246 | #define ROMP_BASE_ADDR MX27_ROMP_BASE_ADDR | ||
| 247 | #define ATA_BASE_ADDR MX27_ATA_BASE_ADDR | ||
| 248 | #define SDRAM_BASE_ADDR MX27_SDRAM_BASE_ADDR | ||
| 249 | #define CSD1_BASE_ADDR MX27_CSD1_BASE_ADDR | ||
| 250 | #define CS0_BASE_ADDR MX27_CS0_BASE_ADDR | ||
| 251 | #define CS1_BASE_ADDR MX27_CS1_BASE_ADDR | ||
| 252 | #define CS2_BASE_ADDR MX27_CS2_BASE_ADDR | ||
| 253 | #define CS3_BASE_ADDR MX27_CS3_BASE_ADDR | ||
| 254 | #define CS4_BASE_ADDR MX27_CS4_BASE_ADDR | ||
| 255 | #define CS5_BASE_ADDR MX27_CS5_BASE_ADDR | ||
| 256 | #define X_MEMC_BASE_ADDR MX27_X_MEMC_BASE_ADDR | ||
| 257 | #define X_MEMC_BASE_ADDR_VIRT MX27_X_MEMC_BASE_ADDR_VIRT | ||
| 258 | #define X_MEMC_SIZE MX27_X_MEMC_SIZE | ||
| 259 | #define NFC_BASE_ADDR MX27_NFC_BASE_ADDR | ||
| 260 | #define SDRAMC_BASE_ADDR MX27_SDRAMC_BASE_ADDR | ||
| 261 | #define WEIM_BASE_ADDR MX27_WEIM_BASE_ADDR | ||
| 262 | #define M3IF_BASE_ADDR MX27_M3IF_BASE_ADDR | ||
| 263 | #define PCMCIA_CTL_BASE_ADDR MX27_PCMCIA_CTL_BASE_ADDR | ||
| 264 | #define PCMCIA_MEM_BASE_ADDR MX27_PCMCIA_MEM_BASE_ADDR | ||
| 265 | #define IRAM_BASE_ADDR MX27_IRAM_BASE_ADDR | ||
| 266 | #define MXC_INT_I2C2 MX27_INT_I2C2 | ||
| 267 | #define MXC_INT_GPT6 MX27_INT_GPT6 | ||
| 268 | #define MXC_INT_GPT5 MX27_INT_GPT5 | ||
| 269 | #define MXC_INT_GPT4 MX27_INT_GPT4 | ||
| 270 | #define MXC_INT_RTIC MX27_INT_RTIC | ||
| 271 | #define MXC_INT_SDHC MX27_INT_SDHC | ||
| 272 | #define MXC_INT_SDHC3 MX27_INT_SDHC3 | ||
| 273 | #define MXC_INT_ATA MX27_INT_ATA | ||
| 274 | #define MXC_INT_UART6 MX27_INT_UART6 | ||
| 275 | #define MXC_INT_UART5 MX27_INT_UART5 | ||
| 276 | #define MXC_INT_FEC MX27_INT_FEC | ||
| 277 | #define MXC_INT_VPU MX27_INT_VPU | ||
| 278 | #define MXC_INT_USB1 MX27_INT_USB1 | ||
| 279 | #define MXC_INT_USB2 MX27_INT_USB2 | ||
| 280 | #define MXC_INT_USB3 MX27_INT_USB3 | ||
| 281 | #define MXC_INT_SCC_SMN MX27_INT_SCC_SMN | ||
| 282 | #define MXC_INT_SCC_SCM MX27_INT_SCC_SCM | ||
| 283 | #define MXC_INT_SAHARA MX27_INT_SAHARA | ||
| 284 | #define MXC_INT_IIM MX27_INT_IIM | ||
| 285 | #define MXC_INT_CCM MX27_INT_CCM | ||
| 286 | #define DMA_REQ_MSHC MX27_DMA_REQ_MSHC | ||
| 287 | #define DMA_REQ_ATA_TX MX27_DMA_REQ_ATA_TX | ||
| 288 | #define DMA_REQ_ATA_RCV MX27_DMA_REQ_ATA_RCV | ||
| 289 | #define DMA_REQ_UART5_TX MX27_DMA_REQ_UART5_TX | ||
| 290 | #define DMA_REQ_UART5_RX MX27_DMA_REQ_UART5_RX | ||
| 291 | #define DMA_REQ_UART6_TX MX27_DMA_REQ_UART6_TX | ||
| 292 | #define DMA_REQ_UART6_RX MX27_DMA_REQ_UART6_RX | ||
| 293 | #define DMA_REQ_SDHC3 MX27_DMA_REQ_SDHC3 | ||
| 294 | #define DMA_REQ_NFC MX27_DMA_REQ_NFC | ||
| 118 | 295 | ||
| 119 | #endif /* __ASM_ARCH_MXC_MX27_H__ */ | 296 | #endif /* __ASM_ARCH_MXC_MX27_H__ */ |
diff --git a/arch/arm/plat-mxc/include/mach/mx2x.h b/arch/arm/plat-mxc/include/mach/mx2x.h index db5d921e0fe..f2eaf140ed0 100644 --- a/arch/arm/plat-mxc/include/mach/mx2x.h +++ b/arch/arm/plat-mxc/include/mach/mx2x.h | |||
| @@ -25,51 +25,49 @@ | |||
| 25 | 25 | ||
| 26 | /* The following addresses are common between i.MX21 and i.MX27 */ | 26 | /* The following addresses are common between i.MX21 and i.MX27 */ |
| 27 | 27 | ||
| 28 | /* Register offests */ | 28 | /* Register offsets */ |
| 29 | #define AIPI_BASE_ADDR 0x10000000 | 29 | #define MX2x_AIPI_BASE_ADDR 0x10000000 |
| 30 | #define AIPI_BASE_ADDR_VIRT 0xF4000000 | 30 | #define MX2x_AIPI_BASE_ADDR_VIRT 0xf4000000 |
| 31 | #define AIPI_SIZE SZ_1M | 31 | #define MX2x_AIPI_SIZE SZ_1M |
| 32 | 32 | #define MX2x_DMA_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x01000) | |
| 33 | #define DMA_BASE_ADDR (AIPI_BASE_ADDR + 0x01000) | 33 | #define MX2x_WDOG_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x02000) |
| 34 | #define WDOG_BASE_ADDR (AIPI_BASE_ADDR + 0x02000) | 34 | #define MX2x_GPT1_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x03000) |
| 35 | #define GPT1_BASE_ADDR (AIPI_BASE_ADDR + 0x03000) | 35 | #define MX2x_GPT2_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x04000) |
| 36 | #define GPT2_BASE_ADDR (AIPI_BASE_ADDR + 0x04000) | 36 | #define MX2x_GPT3_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x05000) |
| 37 | #define GPT3_BASE_ADDR (AIPI_BASE_ADDR + 0x05000) | 37 | #define MX2x_PWM_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x06000) |
| 38 | #define PWM_BASE_ADDR (AIPI_BASE_ADDR + 0x06000) | 38 | #define MX2x_RTC_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x07000) |
| 39 | #define RTC_BASE_ADDR (AIPI_BASE_ADDR + 0x07000) | 39 | #define MX2x_KPP_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x08000) |
| 40 | #define KPP_BASE_ADDR (AIPI_BASE_ADDR + 0x08000) | 40 | #define MX2x_OWIRE_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x09000) |
| 41 | #define OWIRE_BASE_ADDR (AIPI_BASE_ADDR + 0x09000) | 41 | #define MX2x_UART1_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x0a000) |
| 42 | #define UART1_BASE_ADDR (AIPI_BASE_ADDR + 0x0A000) | 42 | #define MX2x_UART2_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x0b000) |
| 43 | #define UART2_BASE_ADDR (AIPI_BASE_ADDR + 0x0B000) | 43 | #define MX2x_UART3_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x0c000) |
| 44 | #define UART3_BASE_ADDR (AIPI_BASE_ADDR + 0x0C000) | 44 | #define MX2x_UART4_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x0d000) |
| 45 | #define UART4_BASE_ADDR (AIPI_BASE_ADDR + 0x0D000) | 45 | #define MX2x_CSPI1_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x0e000) |
| 46 | #define CSPI1_BASE_ADDR (AIPI_BASE_ADDR + 0x0E000) | 46 | #define MX2x_CSPI2_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x0f000) |
| 47 | #define CSPI2_BASE_ADDR (AIPI_BASE_ADDR + 0x0F000) | 47 | #define MX2x_SSI1_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x10000) |
| 48 | #define SSI1_BASE_ADDR (AIPI_BASE_ADDR + 0x10000) | 48 | #define MX2x_SSI2_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x11000) |
| 49 | #define SSI2_BASE_ADDR (AIPI_BASE_ADDR + 0x11000) | 49 | #define MX2x_I2C_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x12000) |
| 50 | #define I2C_BASE_ADDR (AIPI_BASE_ADDR + 0x12000) | 50 | #define MX2x_SDHC1_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x13000) |
| 51 | #define SDHC1_BASE_ADDR (AIPI_BASE_ADDR + 0x13000) | 51 | #define MX2x_SDHC2_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x14000) |
| 52 | #define SDHC2_BASE_ADDR (AIPI_BASE_ADDR + 0x14000) | 52 | #define MX2x_GPIO_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x15000) |
| 53 | #define GPIO_BASE_ADDR (AIPI_BASE_ADDR + 0x15000) | 53 | #define MX2x_AUDMUX_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x16000) |
| 54 | #define AUDMUX_BASE_ADDR (AIPI_BASE_ADDR + 0x16000) | 54 | #define MX2x_CSPI3_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x17000) |
| 55 | #define CSPI3_BASE_ADDR (AIPI_BASE_ADDR + 0x17000) | 55 | #define MX2x_LCDC_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x21000) |
| 56 | #define LCDC_BASE_ADDR (AIPI_BASE_ADDR + 0x21000) | 56 | #define MX2x_SLCDC_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x22000) |
| 57 | #define SLCDC_BASE_ADDR (AIPI_BASE_ADDR + 0x22000) | 57 | #define MX2x_USBOTG_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x24000) |
| 58 | #define USBOTG_BASE_ADDR (AIPI_BASE_ADDR + 0x24000) | 58 | #define MX2x_EMMA_PP_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x26000) |
| 59 | #define EMMA_PP_BASE_ADDR (AIPI_BASE_ADDR + 0x26000) | 59 | #define MX2x_EMMA_PRP_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x26400) |
| 60 | #define EMMA_PRP_BASE_ADDR (AIPI_BASE_ADDR + 0x26400) | 60 | #define MX2x_CCM_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x27000) |
| 61 | #define CCM_BASE_ADDR (AIPI_BASE_ADDR + 0x27000) | 61 | #define MX2x_SYSCTRL_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x27800) |
| 62 | #define SYSCTRL_BASE_ADDR (AIPI_BASE_ADDR + 0x27800) | 62 | #define MX2x_JAM_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x3e000) |
| 63 | #define JAM_BASE_ADDR (AIPI_BASE_ADDR + 0x3E000) | 63 | #define MX2x_MAX_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x3f000) |
| 64 | #define MAX_BASE_ADDR (AIPI_BASE_ADDR + 0x3F000) | 64 | |
| 65 | 65 | #define MX2x_AVIC_BASE_ADDR 0x10040000 | |
| 66 | #define AVIC_BASE_ADDR 0x10040000 | 66 | |
| 67 | 67 | #define MX2x_SAHB1_BASE_ADDR 0x80000000 | |
| 68 | #define SAHB1_BASE_ADDR 0x80000000 | 68 | #define MX2x_SAHB1_BASE_ADDR_VIRT 0xf4100000 |
| 69 | #define SAHB1_BASE_ADDR_VIRT 0xF4100000 | 69 | #define MX2x_SAHB1_SIZE SZ_1M |
| 70 | #define SAHB1_SIZE SZ_1M | 70 | #define MX2x_CSI_BASE_ADDR (MX2x_SAHB1_BASE_ADDR + 0x0000) |
| 71 | |||
| 72 | #define CSI_BASE_ADDR (SAHB1_BASE_ADDR + 0x0000) | ||
| 73 | 71 | ||
| 74 | /* | 72 | /* |
| 75 | * This macro defines the physical to virtual address mapping for all the | 73 | * This macro defines the physical to virtual address mapping for all the |
| @@ -105,78 +103,189 @@ | |||
| 105 | (((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT) | 103 | (((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT) |
| 106 | 104 | ||
| 107 | /* fixed interrupt numbers */ | 105 | /* fixed interrupt numbers */ |
| 108 | #define MXC_INT_LCDC 61 | 106 | #define MX2x_INT_CSPI3 6 |
| 109 | #define MXC_INT_SLCDC 60 | 107 | #define MX2x_INT_GPIO 8 |
| 110 | #define MXC_INT_EMMAPP 52 | 108 | #define MX2x_INT_SDHC2 10 |
| 111 | #define MXC_INT_EMMAPRP 51 | 109 | #define MX2x_INT_SDHC1 11 |
| 112 | #define MXC_INT_DMACH15 47 | 110 | #define MX2x_INT_I2C 12 |
| 113 | #define MXC_INT_DMACH14 46 | 111 | #define MX2x_INT_SSI2 13 |
| 114 | #define MXC_INT_DMACH13 45 | 112 | #define MX2x_INT_SSI1 14 |
| 115 | #define MXC_INT_DMACH12 44 | 113 | #define MX2x_INT_CSPI2 15 |
| 116 | #define MXC_INT_DMACH11 43 | 114 | #define MX2x_INT_CSPI1 16 |
| 117 | #define MXC_INT_DMACH10 42 | 115 | #define MX2x_INT_UART4 17 |
| 118 | #define MXC_INT_DMACH9 41 | 116 | #define MX2x_INT_UART3 18 |
| 119 | #define MXC_INT_DMACH8 40 | 117 | #define MX2x_INT_UART2 19 |
| 120 | #define MXC_INT_DMACH7 39 | 118 | #define MX2x_INT_UART1 20 |
| 121 | #define MXC_INT_DMACH6 38 | 119 | #define MX2x_INT_KPP 21 |
| 122 | #define MXC_INT_DMACH5 37 | 120 | #define MX2x_INT_RTC 22 |
| 123 | #define MXC_INT_DMACH4 36 | 121 | #define MX2x_INT_PWM 23 |
| 124 | #define MXC_INT_DMACH3 35 | 122 | #define MX2x_INT_GPT3 24 |
| 125 | #define MXC_INT_DMACH2 34 | 123 | #define MX2x_INT_GPT2 25 |
| 126 | #define MXC_INT_DMACH1 33 | 124 | #define MX2x_INT_GPT1 26 |
| 127 | #define MXC_INT_DMACH0 32 | 125 | #define MX2x_INT_WDOG 27 |
| 128 | #define MXC_INT_CSI 31 | 126 | #define MX2x_INT_PCMCIA 28 |
| 129 | #define MXC_INT_NANDFC 29 | 127 | #define MX2x_INT_NANDFC 29 |
| 130 | #define MXC_INT_PCMCIA 28 | 128 | #define MX2x_INT_CSI 31 |
| 131 | #define MXC_INT_WDOG 27 | 129 | #define MX2x_INT_DMACH0 32 |
| 132 | #define MXC_INT_GPT1 26 | 130 | #define MX2x_INT_DMACH1 33 |
| 133 | #define MXC_INT_GPT2 25 | 131 | #define MX2x_INT_DMACH2 34 |
| 134 | #define MXC_INT_GPT3 24 | 132 | #define MX2x_INT_DMACH3 35 |
| 135 | #define MXC_INT_GPT INT_GPT1 | 133 | #define MX2x_INT_DMACH4 36 |
| 136 | #define MXC_INT_PWM 23 | 134 | #define MX2x_INT_DMACH5 37 |
| 137 | #define MXC_INT_RTC 22 | 135 | #define MX2x_INT_DMACH6 38 |
| 138 | #define MXC_INT_KPP 21 | 136 | #define MX2x_INT_DMACH7 39 |
| 139 | #define MXC_INT_UART1 20 | 137 | #define MX2x_INT_DMACH8 40 |
| 140 | #define MXC_INT_UART2 19 | 138 | #define MX2x_INT_DMACH9 41 |
| 141 | #define MXC_INT_UART3 18 | 139 | #define MX2x_INT_DMACH10 42 |
| 142 | #define MXC_INT_UART4 17 | 140 | #define MX2x_INT_DMACH11 43 |
| 143 | #define MXC_INT_CSPI1 16 | 141 | #define MX2x_INT_DMACH12 44 |
| 144 | #define MXC_INT_CSPI2 15 | 142 | #define MX2x_INT_DMACH13 45 |
| 145 | #define MXC_INT_SSI1 14 | 143 | #define MX2x_INT_DMACH14 46 |
| 146 | #define MXC_INT_SSI2 13 | 144 | #define MX2x_INT_DMACH15 47 |
| 147 | #define MXC_INT_I2C 12 | 145 | #define MX2x_INT_EMMAPRP 51 |
| 148 | #define MXC_INT_SDHC1 11 | 146 | #define MX2x_INT_EMMAPP 52 |
| 149 | #define MXC_INT_SDHC2 10 | 147 | #define MX2x_INT_SLCDC 60 |
| 150 | #define MXC_INT_GPIO 8 | 148 | #define MX2x_INT_LCDC 61 |
| 151 | #define MXC_INT_CSPI3 6 | ||
| 152 | 149 | ||
| 153 | /* fixed DMA request numbers */ | 150 | /* fixed DMA request numbers */ |
| 154 | #define DMA_REQ_CSI_RX 31 | 151 | #define MX2x_DMA_REQ_CSPI3_RX 1 |
| 155 | #define DMA_REQ_CSI_STAT 30 | 152 | #define MX2x_DMA_REQ_CSPI3_TX 2 |
| 156 | #define DMA_REQ_UART1_TX 27 | 153 | #define MX2x_DMA_REQ_EXT 3 |
| 157 | #define DMA_REQ_UART1_RX 26 | 154 | #define MX2x_DMA_REQ_SDHC2 6 |
| 158 | #define DMA_REQ_UART2_TX 25 | 155 | #define MX2x_DMA_REQ_SDHC1 7 |
| 159 | #define DMA_REQ_UART2_RX 24 | 156 | #define MX2x_DMA_REQ_SSI2_RX0 8 |
| 160 | #define DMA_REQ_UART3_TX 23 | 157 | #define MX2x_DMA_REQ_SSI2_TX0 9 |
| 161 | #define DMA_REQ_UART3_RX 22 | 158 | #define MX2x_DMA_REQ_SSI2_RX1 10 |
| 162 | #define DMA_REQ_UART4_TX 21 | 159 | #define MX2x_DMA_REQ_SSI2_TX1 11 |
| 163 | #define DMA_REQ_UART4_RX 20 | 160 | #define MX2x_DMA_REQ_SSI1_RX0 12 |
| 164 | #define DMA_REQ_CSPI1_TX 19 | 161 | #define MX2x_DMA_REQ_SSI1_TX0 13 |
| 165 | #define DMA_REQ_CSPI1_RX 18 | 162 | #define MX2x_DMA_REQ_SSI1_RX1 14 |
| 166 | #define DMA_REQ_CSPI2_TX 17 | 163 | #define MX2x_DMA_REQ_SSI1_TX1 15 |
| 167 | #define DMA_REQ_CSPI2_RX 16 | 164 | #define MX2x_DMA_REQ_CSPI2_RX 16 |
| 168 | #define DMA_REQ_SSI1_TX1 15 | 165 | #define MX2x_DMA_REQ_CSPI2_TX 17 |
| 169 | #define DMA_REQ_SSI1_RX1 14 | 166 | #define MX2x_DMA_REQ_CSPI1_RX 18 |
| 170 | #define DMA_REQ_SSI1_TX0 13 | 167 | #define MX2x_DMA_REQ_CSPI1_TX 19 |
| 171 | #define DMA_REQ_SSI1_RX0 12 | 168 | #define MX2x_DMA_REQ_UART4_RX 20 |
| 172 | #define DMA_REQ_SSI2_TX1 11 | 169 | #define MX2x_DMA_REQ_UART4_TX 21 |
| 173 | #define DMA_REQ_SSI2_RX1 10 | 170 | #define MX2x_DMA_REQ_UART3_RX 22 |
| 174 | #define DMA_REQ_SSI2_TX0 9 | 171 | #define MX2x_DMA_REQ_UART3_TX 23 |
| 175 | #define DMA_REQ_SSI2_RX0 8 | 172 | #define MX2x_DMA_REQ_UART2_RX 24 |
| 176 | #define DMA_REQ_SDHC1 7 | 173 | #define MX2x_DMA_REQ_UART2_TX 25 |
| 177 | #define DMA_REQ_SDHC2 6 | 174 | #define MX2x_DMA_REQ_UART1_RX 26 |
| 178 | #define DMA_REQ_EXT 3 | 175 | #define MX2x_DMA_REQ_UART1_TX 27 |
| 179 | #define DMA_REQ_CSPI3_TX 2 | 176 | #define MX2x_DMA_REQ_CSI_STAT 30 |
| 180 | #define DMA_REQ_CSPI3_RX 1 | 177 | #define MX2x_DMA_REQ_CSI_RX 31 |
| 178 | |||
| 179 | /* these should go away */ | ||
| 180 | #define AIPI_BASE_ADDR MX2x_AIPI_BASE_ADDR | ||
| 181 | #define AIPI_BASE_ADDR_VIRT MX2x_AIPI_BASE_ADDR_VIRT | ||
| 182 | #define AIPI_SIZE MX2x_AIPI_SIZE | ||
| 183 | #define DMA_BASE_ADDR MX2x_DMA_BASE_ADDR | ||
| 184 | #define WDOG_BASE_ADDR MX2x_WDOG_BASE_ADDR | ||
| 185 | #define GPT1_BASE_ADDR MX2x_GPT1_BASE_ADDR | ||
| 186 | #define GPT2_BASE_ADDR MX2x_GPT2_BASE_ADDR | ||
| 187 | #define GPT3_BASE_ADDR MX2x_GPT3_BASE_ADDR | ||
| 188 | #define PWM_BASE_ADDR MX2x_PWM_BASE_ADDR | ||
| 189 | #define RTC_BASE_ADDR MX2x_RTC_BASE_ADDR | ||
| 190 | #define KPP_BASE_ADDR MX2x_KPP_BASE_ADDR | ||
| 191 | #define OWIRE_BASE_ADDR MX2x_OWIRE_BASE_ADDR | ||
| 192 | #define UART1_BASE_ADDR MX2x_UART1_BASE_ADDR | ||
| 193 | #define UART2_BASE_ADDR MX2x_UART2_BASE_ADDR | ||
| 194 | #define UART3_BASE_ADDR MX2x_UART3_BASE_ADDR | ||
| 195 | #define UART4_BASE_ADDR MX2x_UART4_BASE_ADDR | ||
| 196 | #define CSPI1_BASE_ADDR MX2x_CSPI1_BASE_ADDR | ||
| 197 | #define CSPI2_BASE_ADDR MX2x_CSPI2_BASE_ADDR | ||
| 198 | #define SSI1_BASE_ADDR MX2x_SSI1_BASE_ADDR | ||
| 199 | #define SSI2_BASE_ADDR MX2x_SSI2_BASE_ADDR | ||
| 200 | #define I2C_BASE_ADDR MX2x_I2C_BASE_ADDR | ||
| 201 | #define SDHC1_BASE_ADDR MX2x_SDHC1_BASE_ADDR | ||
| 202 | #define SDHC2_BASE_ADDR MX2x_SDHC2_BASE_ADDR | ||
| 203 | #define GPIO_BASE_ADDR MX2x_GPIO_BASE_ADDR | ||
| 204 | #define AUDMUX_BASE_ADDR MX2x_AUDMUX_BASE_ADDR | ||
| 205 | #define CSPI3_BASE_ADDR MX2x_CSPI3_BASE_ADDR | ||
| 206 | #define LCDC_BASE_ADDR MX2x_LCDC_BASE_ADDR | ||
| 207 | #define SLCDC_BASE_ADDR MX2x_SLCDC_BASE_ADDR | ||
| 208 | #define USBOTG_BASE_ADDR MX2x_USBOTG_BASE_ADDR | ||
| 209 | #define EMMA_PP_BASE_ADDR MX2x_EMMA_PP_BASE_ADDR | ||
| 210 | #define EMMA_PRP_BASE_ADDR MX2x_EMMA_PRP_BASE_ADDR | ||
| 211 | #define CCM_BASE_ADDR MX2x_CCM_BASE_ADDR | ||
| 212 | #define SYSCTRL_BASE_ADDR MX2x_SYSCTRL_BASE_ADDR | ||
| 213 | #define JAM_BASE_ADDR MX2x_JAM_BASE_ADDR | ||
| 214 | #define MAX_BASE_ADDR MX2x_MAX_BASE_ADDR | ||
| 215 | #define AVIC_BASE_ADDR MX2x_AVIC_BASE_ADDR | ||
| 216 | #define SAHB1_BASE_ADDR MX2x_SAHB1_BASE_ADDR | ||
| 217 | #define SAHB1_BASE_ADDR_VIRT MX2x_SAHB1_BASE_ADDR_VIRT | ||
| 218 | #define SAHB1_SIZE MX2x_SAHB1_SIZE | ||
| 219 | #define CSI_BASE_ADDR MX2x_CSI_BASE_ADDR | ||
| 220 | #define MXC_INT_CSPI3 MX2x_INT_CSPI3 | ||
| 221 | #define MXC_INT_GPIO MX2x_INT_GPIO | ||
| 222 | #define MXC_INT_SDHC2 MX2x_INT_SDHC2 | ||
| 223 | #define MXC_INT_SDHC1 MX2x_INT_SDHC1 | ||
| 224 | #define MXC_INT_I2C MX2x_INT_I2C | ||
| 225 | #define MXC_INT_SSI2 MX2x_INT_SSI2 | ||
| 226 | #define MXC_INT_SSI1 MX2x_INT_SSI1 | ||
| 227 | #define MXC_INT_CSPI2 MX2x_INT_CSPI2 | ||
| 228 | #define MXC_INT_CSPI1 MX2x_INT_CSPI1 | ||
| 229 | #define MXC_INT_UART4 MX2x_INT_UART4 | ||
| 230 | #define MXC_INT_UART3 MX2x_INT_UART3 | ||
| 231 | #define MXC_INT_UART2 MX2x_INT_UART2 | ||
| 232 | #define MXC_INT_UART1 MX2x_INT_UART1 | ||
| 233 | #define MXC_INT_KPP MX2x_INT_KPP | ||
| 234 | #define MXC_INT_RTC MX2x_INT_RTC | ||
| 235 | #define MXC_INT_PWM MX2x_INT_PWM | ||
| 236 | #define MXC_INT_GPT3 MX2x_INT_GPT3 | ||
| 237 | #define MXC_INT_GPT2 MX2x_INT_GPT2 | ||
| 238 | #define MXC_INT_GPT1 MX2x_INT_GPT1 | ||
| 239 | #define MXC_INT_WDOG MX2x_INT_WDOG | ||
| 240 | #define MXC_INT_PCMCIA MX2x_INT_PCMCIA | ||
| 241 | #define MXC_INT_NANDFC MX2x_INT_NANDFC | ||
| 242 | #define MXC_INT_CSI MX2x_INT_CSI | ||
| 243 | #define MXC_INT_DMACH0 MX2x_INT_DMACH0 | ||
| 244 | #define MXC_INT_DMACH1 MX2x_INT_DMACH1 | ||
| 245 | #define MXC_INT_DMACH2 MX2x_INT_DMACH2 | ||
| 246 | #define MXC_INT_DMACH3 MX2x_INT_DMACH3 | ||
| 247 | #define MXC_INT_DMACH4 MX2x_INT_DMACH4 | ||
| 248 | #define MXC_INT_DMACH5 MX2x_INT_DMACH5 | ||
| 249 | #define MXC_INT_DMACH6 MX2x_INT_DMACH6 | ||
| 250 | #define MXC_INT_DMACH7 MX2x_INT_DMACH7 | ||
| 251 | #define MXC_INT_DMACH8 MX2x_INT_DMACH8 | ||
| 252 | #define MXC_INT_DMACH9 MX2x_INT_DMACH9 | ||
| 253 | #define MXC_INT_DMACH10 MX2x_INT_DMACH10 | ||
| 254 | #define MXC_INT_DMACH11 MX2x_INT_DMACH11 | ||
| 255 | #define MXC_INT_DMACH12 MX2x_INT_DMACH12 | ||
| 256 | #define MXC_INT_DMACH13 MX2x_INT_DMACH13 | ||
| 257 | #define MXC_INT_DMACH14 MX2x_INT_DMACH14 | ||
| 258 | #define MXC_INT_DMACH15 MX2x_INT_DMACH15 | ||
| 259 | #define MXC_INT_EMMAPRP MX2x_INT_EMMAPRP | ||
| 260 | #define MXC_INT_EMMAPP MX2x_INT_EMMAPP | ||
| 261 | #define MXC_INT_SLCDC MX2x_INT_SLCDC | ||
| 262 | #define MXC_INT_LCDC MX2x_INT_LCDC | ||
| 263 | #define DMA_REQ_CSPI3_RX MX2x_DMA_REQ_CSPI3_RX | ||
| 264 | #define DMA_REQ_CSPI3_TX MX2x_DMA_REQ_CSPI3_TX | ||
| 265 | #define DMA_REQ_EXT MX2x_DMA_REQ_EXT | ||
| 266 | #define DMA_REQ_SDHC2 MX2x_DMA_REQ_SDHC2 | ||
| 267 | #define DMA_REQ_SDHC1 MX2x_DMA_REQ_SDHC1 | ||
| 268 | #define DMA_REQ_SSI2_RX0 MX2x_DMA_REQ_SSI2_RX0 | ||
| 269 | #define DMA_REQ_SSI2_TX0 MX2x_DMA_REQ_SSI2_TX0 | ||
| 270 | #define DMA_REQ_SSI2_RX1 MX2x_DMA_REQ_SSI2_RX1 | ||
| 271 | #define DMA_REQ_SSI2_TX1 MX2x_DMA_REQ_SSI2_TX1 | ||
| 272 | #define DMA_REQ_SSI1_RX0 MX2x_DMA_REQ_SSI1_RX0 | ||
| 273 | #define DMA_REQ_SSI1_TX0 MX2x_DMA_REQ_SSI1_TX0 | ||
| 274 | #define DMA_REQ_SSI1_RX1 MX2x_DMA_REQ_SSI1_RX1 | ||
| 275 | #define DMA_REQ_SSI1_TX1 MX2x_DMA_REQ_SSI1_TX1 | ||
| 276 | #define DMA_REQ_CSPI2_RX MX2x_DMA_REQ_CSPI2_RX | ||
| 277 | #define DMA_REQ_CSPI2_TX MX2x_DMA_REQ_CSPI2_TX | ||
| 278 | #define DMA_REQ_CSPI1_RX MX2x_DMA_REQ_CSPI1_RX | ||
| 279 | #define DMA_REQ_CSPI1_TX MX2x_DMA_REQ_CSPI1_TX | ||
| 280 | #define DMA_REQ_UART4_RX MX2x_DMA_REQ_UART4_RX | ||
| 281 | #define DMA_REQ_UART4_TX MX2x_DMA_REQ_UART4_TX | ||
| 282 | #define DMA_REQ_UART3_RX MX2x_DMA_REQ_UART3_RX | ||
| 283 | #define DMA_REQ_UART3_TX MX2x_DMA_REQ_UART3_TX | ||
| 284 | #define DMA_REQ_UART2_RX MX2x_DMA_REQ_UART2_RX | ||
| 285 | #define DMA_REQ_UART2_TX MX2x_DMA_REQ_UART2_TX | ||
| 286 | #define DMA_REQ_UART1_RX MX2x_DMA_REQ_UART1_RX | ||
| 287 | #define DMA_REQ_UART1_TX MX2x_DMA_REQ_UART1_TX | ||
| 288 | #define DMA_REQ_CSI_STAT MX2x_DMA_REQ_CSI_STAT | ||
| 289 | #define DMA_REQ_CSI_RX MX2x_DMA_REQ_CSI_RX | ||
| 181 | 290 | ||
| 182 | #endif /* __ASM_ARCH_MXC_MX2x_H__ */ | 291 | #endif /* __ASM_ARCH_MXC_MX2x_H__ */ |
diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h index 14ac0dcc82f..b8b47d139eb 100644 --- a/arch/arm/plat-mxc/include/mach/mx31.h +++ b/arch/arm/plat-mxc/include/mach/mx31.h | |||
| @@ -1,45 +1,218 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * IRAM | 2 | * IRAM |
| 3 | */ | 3 | */ |
| 4 | #define MX31_IRAM_BASE_ADDR 0x1FFC0000 /* internal ram */ | 4 | #define MX31_IRAM_BASE_ADDR 0x1ffc0000 /* internal ram */ |
| 5 | #define MX31_IRAM_SIZE SZ_16K | 5 | #define MX31_IRAM_SIZE SZ_16K |
| 6 | 6 | ||
| 7 | #define MX31_OTG_BASE_ADDR (AIPS1_BASE_ADDR + 0x00088000) | 7 | #define MX31_L2CC_BASE_ADDR 0x30000000 |
| 8 | #define ATA_BASE_ADDR (AIPS1_BASE_ADDR + 0x0008C000) | 8 | #define MX31_L2CC_SIZE SZ_1M |
| 9 | #define UART4_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B0000) | ||
| 10 | #define UART5_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B4000) | ||
| 11 | 9 | ||
| 12 | #define MMC_SDHC1_BASE_ADDR (SPBA0_BASE_ADDR + 0x00004000) | 10 | #define MX31_AIPS1_BASE_ADDR 0x43f00000 |
| 13 | #define MMC_SDHC2_BASE_ADDR (SPBA0_BASE_ADDR + 0x00008000) | 11 | #define MX31_AIPS1_BASE_ADDR_VIRT 0xfc000000 |
| 14 | #define SIM1_BASE_ADDR (SPBA0_BASE_ADDR + 0x00018000) | 12 | #define MX31_AIPS1_SIZE SZ_1M |
| 15 | #define IIM_BASE_ADDR (SPBA0_BASE_ADDR + 0x0001C000) | 13 | #define MX31_MAX_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x04000) |
| 14 | #define MX31_EVTMON_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x08000) | ||
| 15 | #define MX31_CLKCTL_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x0c000) | ||
| 16 | #define MX31_ETB_SLOT4_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x10000) | ||
| 17 | #define MX31_ETB_SLOT5_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x14000) | ||
| 18 | #define MX31_ECT_CTIO_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x18000) | ||
| 19 | #define MX31_I2C_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x80000) | ||
| 20 | #define MX31_I2C3_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x84000) | ||
| 21 | #define MX31_OTG_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x88000) | ||
| 22 | #define MX31_ATA_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x8c000) | ||
| 23 | #define MX31_UART1_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x90000) | ||
| 24 | #define MX31_UART2_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x94000) | ||
| 25 | #define MX31_I2C2_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x98000) | ||
| 26 | #define MX31_OWIRE_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x9c000) | ||
| 27 | #define MX31_SSI1_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0xa0000) | ||
| 28 | #define MX31_CSPI1_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0xa4000) | ||
| 29 | #define MX31_KPP_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0xa8000) | ||
| 30 | #define MX31_IOMUXC_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0xac000) | ||
| 31 | #define MX31_UART4_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0xb0000) | ||
| 32 | #define MX31_UART5_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0xb4000) | ||
| 33 | #define MX31_ECT_IP1_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0xb8000) | ||
| 34 | #define MX31_ECT_IP2_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0xbc000) | ||
| 16 | 35 | ||
| 17 | #define CSPI3_BASE_ADDR (AIPS2_BASE_ADDR + 0x00084000) | 36 | #define MX31_SPBA0_BASE_ADDR 0x50000000 |
| 18 | #define FIRI_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008C000) | 37 | #define MX31_SPBA0_BASE_ADDR_VIRT 0xfc100000 |
| 19 | #define SCM_BASE_ADDR (AIPS2_BASE_ADDR + 0x000AE000) | 38 | #define MX31_SPBA0_SIZE SZ_1M |
| 20 | #define SMN_BASE_ADDR (AIPS2_BASE_ADDR + 0x000AF000) | 39 | #define MX31_MMC_SDHC1_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x04000) |
| 21 | #define MPEG4_ENC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000C8000) | 40 | #define MX31_MMC_SDHC2_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x08000) |
| 41 | #define MX31_UART3_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x0c000) | ||
| 42 | #define MX31_CSPI2_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x10000) | ||
| 43 | #define MX31_SSI2_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x14000) | ||
| 44 | #define MX31_SIM1_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x18000) | ||
| 45 | #define MX31_IIM_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x1c000) | ||
| 46 | #define MX31_ATA_DMA_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x20000) | ||
| 47 | #define MX31_MSHC1_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x24000) | ||
| 48 | #define MX31_SPBA_CTRL_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x3c000) | ||
| 22 | 49 | ||
| 23 | #define MX31_NFC_BASE_ADDR (X_MEMC_BASE_ADDR + 0x0000) | 50 | #define MX31_AIPS2_BASE_ADDR 0x53f00000 |
| 51 | #define MX31_AIPS2_BASE_ADDR_VIRT 0xfc200000 | ||
| 52 | #define MX31_AIPS2_SIZE SZ_1M | ||
| 53 | #define MX31_CCM_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0x80000) | ||
| 54 | #define MX31_CSPI3_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0x84000) | ||
| 55 | #define MX31_FIRI_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0x8c000) | ||
| 56 | #define MX31_GPT1_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0x90000) | ||
| 57 | #define MX31_EPIT1_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0x94000) | ||
| 58 | #define MX31_EPIT2_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0x98000) | ||
| 59 | #define MX31_GPIO3_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0xa4000) | ||
| 60 | #define MX31_SCC_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0xac000) | ||
| 61 | #define MX31_SCM_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0xae000) | ||
| 62 | #define MX31_SMN_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0xaf000) | ||
| 63 | #define MX31_RNGA_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0xb0000) | ||
| 64 | #define MX31_IPU_CTRL_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0xc0000) | ||
| 65 | #define MX31_AUDMUX_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0xc4000) | ||
| 66 | #define MX31_MPEG4_ENC_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0xc8000) | ||
| 67 | #define MX31_GPIO1_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0xcc000) | ||
| 68 | #define MX31_GPIO2_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0xd0000) | ||
| 69 | #define MX31_SDMA_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0xd4000) | ||
| 70 | #define MX31_RTC_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0xd8000) | ||
| 71 | #define MX31_WDOG_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0xdc000) | ||
| 72 | #define MX31_PWM_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0xe0000) | ||
| 73 | #define MX31_RTIC_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0xec000) | ||
| 24 | 74 | ||
| 25 | #define MXC_INT_MPEG4_ENCODER 5 | 75 | #define MX31_ROMP_BASE_ADDR 0x60000000 |
| 26 | #define MXC_INT_FIRI 7 | 76 | #define MX31_ROMP_BASE_ADDR_VIRT 0xfc500000 |
| 77 | #define MX31_ROMP_SIZE SZ_1M | ||
| 78 | |||
| 79 | #define MX31_AVIC_BASE_ADDR 0x68000000 | ||
| 80 | #define MX31_AVIC_BASE_ADDR_VIRT 0xfc400000 | ||
| 81 | #define MX31_AVIC_SIZE SZ_1M | ||
| 82 | |||
| 83 | #define MX31_IPU_MEM_BASE_ADDR 0x70000000 | ||
| 84 | #define MX31_CSD0_BASE_ADDR 0x80000000 | ||
| 85 | #define MX31_CSD1_BASE_ADDR 0x90000000 | ||
| 86 | |||
| 87 | #define MX31_CS0_BASE_ADDR 0xa0000000 | ||
| 88 | #define MX31_CS1_BASE_ADDR 0xa8000000 | ||
| 89 | #define MX31_CS2_BASE_ADDR 0xb0000000 | ||
| 90 | #define MX31_CS3_BASE_ADDR 0xb2000000 | ||
| 91 | |||
| 92 | #define MX31_CS4_BASE_ADDR 0xb4000000 | ||
| 93 | #define MX31_CS4_BASE_ADDR_VIRT 0xf4000000 | ||
| 94 | #define MX31_CS4_SIZE SZ_32M | ||
| 95 | |||
| 96 | #define MX31_CS5_BASE_ADDR 0xb6000000 | ||
| 97 | #define MX31_CS5_BASE_ADDR_VIRT 0xf6000000 | ||
| 98 | #define MX31_CS5_SIZE SZ_32M | ||
| 99 | |||
| 100 | #define MX31_X_MEMC_BASE_ADDR 0xb8000000 | ||
| 101 | #define MX31_X_MEMC_BASE_ADDR_VIRT 0xfc320000 | ||
| 102 | #define MX31_X_MEMC_SIZE SZ_64K | ||
| 103 | #define MX31_NFC_BASE_ADDR (MX31_X_MEMC_BASE_ADDR + 0x0000) | ||
| 104 | #define MX31_ESDCTL_BASE_ADDR (MX31_X_MEMC_BASE_ADDR + 0x1000) | ||
| 105 | #define MX31_WEIM_BASE_ADDR (MX31_X_MEMC_BASE_ADDR + 0x2000) | ||
| 106 | #define MX31_M3IF_BASE_ADDR (MX31_X_MEMC_BASE_ADDR + 0x3000) | ||
| 107 | #define MX31_EMI_CTL_BASE_ADDR (MX31_X_MEMC_BASE_ADDR + 0x4000) | ||
| 108 | #define MX31_PCMCIA_CTL_BASE_ADDR MX31_EMI_CTL_BASE_ADDR | ||
| 109 | |||
| 110 | #define MX31_PCMCIA_MEM_BASE_ADDR 0xbc000000 | ||
| 111 | |||
| 112 | #define MX31_INT_I2C3 3 | ||
| 113 | #define MX31_INT_I2C2 4 | ||
| 114 | #define MX31_INT_MPEG4_ENCODER 5 | ||
| 115 | #define MX31_INT_RTIC 6 | ||
| 116 | #define MX31_INT_FIRI 7 | ||
| 27 | #define MX31_INT_MMC_SDHC2 8 | 117 | #define MX31_INT_MMC_SDHC2 8 |
| 28 | #define MXC_INT_MMC_SDHC1 9 | 118 | #define MX31_INT_MMC_SDHC1 9 |
| 119 | #define MX31_INT_I2C 10 | ||
| 29 | #define MX31_INT_SSI2 11 | 120 | #define MX31_INT_SSI2 11 |
| 30 | #define MX31_INT_SSI1 12 | 121 | #define MX31_INT_SSI1 12 |
| 31 | #define MXC_INT_MBX 16 | 122 | #define MX31_INT_CSPI2 13 |
| 32 | #define MXC_INT_CSPI3 17 | 123 | #define MX31_INT_CSPI1 14 |
| 33 | #define MXC_INT_SIM2 20 | 124 | #define MX31_INT_ATA 15 |
| 34 | #define MXC_INT_SIM1 21 | 125 | #define MX31_INT_MBX 16 |
| 35 | #define MXC_INT_CCM_DVFS 31 | 126 | #define MX31_INT_CSPI3 17 |
| 36 | #define MXC_INT_USB1 35 | 127 | #define MX31_INT_UART3 18 |
| 37 | #define MXC_INT_USB2 36 | 128 | #define MX31_INT_IIM 19 |
| 38 | #define MXC_INT_USB3 37 | 129 | #define MX31_INT_SIM2 20 |
| 39 | #define MXC_INT_USB4 38 | 130 | #define MX31_INT_SIM1 21 |
| 40 | #define MXC_INT_MSHC2 40 | 131 | #define MX31_INT_RNGA 22 |
| 41 | #define MXC_INT_UART4 46 | 132 | #define MX31_INT_EVTMON 23 |
| 42 | #define MXC_INT_UART5 47 | 133 | #define MX31_INT_KPP 24 |
| 43 | #define MXC_INT_CCM 53 | 134 | #define MX31_INT_RTC 25 |
| 44 | #define MXC_INT_PCMCIA 54 | 135 | #define MX31_INT_PWM 26 |
| 136 | #define MX31_INT_EPIT2 27 | ||
| 137 | #define MX31_INT_EPIT1 28 | ||
| 138 | #define MX31_INT_GPT 29 | ||
| 139 | #define MX31_INT_POWER_FAIL 30 | ||
| 140 | #define MX31_INT_CCM_DVFS 31 | ||
| 141 | #define MX31_INT_UART2 32 | ||
| 142 | #define MX31_INT_NANDFC 33 | ||
| 143 | #define MX31_INT_SDMA 34 | ||
| 144 | #define MX31_INT_USB1 35 | ||
| 145 | #define MX31_INT_USB2 36 | ||
| 146 | #define MX31_INT_USB3 37 | ||
| 147 | #define MX31_INT_USB4 38 | ||
| 148 | #define MX31_INT_MSHC1 39 | ||
| 149 | #define MX31_INT_MSHC2 40 | ||
| 150 | #define MX31_INT_IPU_ERR 41 | ||
| 151 | #define MX31_INT_IPU_SYN 42 | ||
| 152 | #define MX31_INT_UART1 45 | ||
| 153 | #define MX31_INT_UART4 46 | ||
| 154 | #define MX31_INT_UART5 47 | ||
| 155 | #define MX31_INT_ECT 48 | ||
| 156 | #define MX31_INT_SCC_SCM 49 | ||
| 157 | #define MX31_INT_SCC_SMN 50 | ||
| 158 | #define MX31_INT_GPIO2 51 | ||
| 159 | #define MX31_INT_GPIO1 52 | ||
| 160 | #define MX31_INT_CCM 53 | ||
| 161 | #define MX31_INT_PCMCIA 54 | ||
| 162 | #define MX31_INT_WDOG 55 | ||
| 163 | #define MX31_INT_GPIO3 56 | ||
| 164 | #define MX31_INT_EXT_POWER 58 | ||
| 165 | #define MX31_INT_EXT_TEMPER 59 | ||
| 166 | #define MX31_INT_EXT_SENSOR60 60 | ||
| 167 | #define MX31_INT_EXT_SENSOR61 61 | ||
| 168 | #define MX31_INT_EXT_WDOG 62 | ||
| 169 | #define MX31_INT_EXT_TV 63 | ||
| 170 | |||
| 171 | #define MX31_PROD_SIGNATURE 0x1 /* For MX31 */ | ||
| 172 | |||
| 173 | /* silicon revisions specific to i.MX31 */ | ||
| 174 | #define MX31_CHIP_REV_1_0 0x10 | ||
| 175 | #define MX31_CHIP_REV_1_1 0x11 | ||
| 176 | #define MX31_CHIP_REV_1_2 0x12 | ||
| 177 | #define MX31_CHIP_REV_1_3 0x13 | ||
| 178 | #define MX31_CHIP_REV_2_0 0x20 | ||
| 179 | #define MX31_CHIP_REV_2_1 0x21 | ||
| 180 | #define MX31_CHIP_REV_2_2 0x22 | ||
| 181 | #define MX31_CHIP_REV_2_3 0x23 | ||
| 182 | #define MX31_CHIP_REV_3_0 0x30 | ||
| 183 | #define MX31_CHIP_REV_3_1 0x31 | ||
| 184 | #define MX31_CHIP_REV_3_2 0x32 | ||
| 185 | |||
| 186 | #define MX31_SYSTEM_REV_MIN MX31_CHIP_REV_1_0 | ||
| 187 | #define MX31_SYSTEM_REV_NUM 3 | ||
| 45 | 188 | ||
| 189 | /* these should go away */ | ||
| 190 | #define ATA_BASE_ADDR MX31_ATA_BASE_ADDR | ||
| 191 | #define UART4_BASE_ADDR MX31_UART4_BASE_ADDR | ||
| 192 | #define UART5_BASE_ADDR MX31_UART5_BASE_ADDR | ||
| 193 | #define MMC_SDHC1_BASE_ADDR MX31_MMC_SDHC1_BASE_ADDR | ||
| 194 | #define MMC_SDHC2_BASE_ADDR MX31_MMC_SDHC2_BASE_ADDR | ||
| 195 | #define SIM1_BASE_ADDR MX31_SIM1_BASE_ADDR | ||
| 196 | #define IIM_BASE_ADDR MX31_IIM_BASE_ADDR | ||
| 197 | #define CSPI3_BASE_ADDR MX31_CSPI3_BASE_ADDR | ||
| 198 | #define FIRI_BASE_ADDR MX31_FIRI_BASE_ADDR | ||
| 199 | #define SCM_BASE_ADDR MX31_SCM_BASE_ADDR | ||
| 200 | #define SMN_BASE_ADDR MX31_SMN_BASE_ADDR | ||
| 201 | #define MPEG4_ENC_BASE_ADDR MX31_MPEG4_ENC_BASE_ADDR | ||
| 202 | #define MXC_INT_MPEG4_ENCODER MX31_INT_MPEG4_ENCODER | ||
| 203 | #define MXC_INT_FIRI MX31_INT_FIRI | ||
| 204 | #define MXC_INT_MMC_SDHC1 MX31_INT_MMC_SDHC1 | ||
| 205 | #define MXC_INT_MBX MX31_INT_MBX | ||
| 206 | #define MXC_INT_CSPI3 MX31_INT_CSPI3 | ||
| 207 | #define MXC_INT_SIM2 MX31_INT_SIM2 | ||
| 208 | #define MXC_INT_SIM1 MX31_INT_SIM1 | ||
| 209 | #define MXC_INT_CCM_DVFS MX31_INT_CCM_DVFS | ||
| 210 | #define MXC_INT_USB1 MX31_INT_USB1 | ||
| 211 | #define MXC_INT_USB2 MX31_INT_USB2 | ||
| 212 | #define MXC_INT_USB3 MX31_INT_USB3 | ||
| 213 | #define MXC_INT_USB4 MX31_INT_USB4 | ||
| 214 | #define MXC_INT_MSHC2 MX31_INT_MSHC2 | ||
| 215 | #define MXC_INT_UART4 MX31_INT_UART4 | ||
| 216 | #define MXC_INT_UART5 MX31_INT_UART5 | ||
| 217 | #define MXC_INT_CCM MX31_INT_CCM | ||
| 218 | #define MXC_INT_PCMCIA MX31_INT_PCMCIA | ||
diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h index ab4cfec6c8a..af871bce35b 100644 --- a/arch/arm/plat-mxc/include/mach/mx35.h +++ b/arch/arm/plat-mxc/include/mach/mx35.h | |||
| @@ -2,29 +2,196 @@ | |||
| 2 | * IRAM | 2 | * IRAM |
| 3 | */ | 3 | */ |
| 4 | #define MX35_IRAM_BASE_ADDR 0x10000000 /* internal ram */ | 4 | #define MX35_IRAM_BASE_ADDR 0x10000000 /* internal ram */ |
| 5 | #define MX35_IRAM_SIZE SZ_128K | 5 | #define MX35_IRAM_SIZE SZ_128K |
| 6 | 6 | ||
| 7 | #define MXC_FEC_BASE_ADDR 0x50038000 | 7 | #define MX35_L2CC_BASE_ADDR 0x30000000 |
| 8 | #define MX35_OTG_BASE_ADDR 0x53ff4000 | 8 | #define MX35_L2CC_SIZE SZ_1M |
| 9 | #define MX35_NFC_BASE_ADDR 0xBB000000 | 9 | |
| 10 | #define MX35_AIPS1_BASE_ADDR 0x43f00000 | ||
| 11 | #define MX35_AIPS1_BASE_ADDR_VIRT 0xfc000000 | ||
| 12 | #define MX35_AIPS1_SIZE SZ_1M | ||
| 13 | #define MX35_MAX_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x04000) | ||
| 14 | #define MX35_EVTMON_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x08000) | ||
| 15 | #define MX35_CLKCTL_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x0c000) | ||
| 16 | #define MX35_ETB_SLOT4_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x10000) | ||
| 17 | #define MX35_ETB_SLOT5_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x14000) | ||
| 18 | #define MX35_ECT_CTIO_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x18000) | ||
| 19 | #define MX35_I2C_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x80000) | ||
| 20 | #define MX35_I2C3_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x84000) | ||
| 21 | #define MX35_UART1_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x90000) | ||
| 22 | #define MX35_UART2_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x94000) | ||
| 23 | #define MX35_I2C2_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x98000) | ||
| 24 | #define MX35_OWIRE_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x9c000) | ||
| 25 | #define MX35_SSI1_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0xa0000) | ||
| 26 | #define MX35_CSPI1_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0xa4000) | ||
| 27 | #define MX35_KPP_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0xa8000) | ||
| 28 | #define MX35_IOMUXC_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0xac000) | ||
| 29 | #define MX35_ECT_IP1_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0xb8000) | ||
| 30 | #define MX35_ECT_IP2_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0xbc000) | ||
| 31 | |||
| 32 | #define MX35_SPBA0_BASE_ADDR 0x50000000 | ||
| 33 | #define MX35_SPBA0_BASE_ADDR_VIRT 0xfc100000 | ||
| 34 | #define MX35_SPBA0_SIZE SZ_1M | ||
| 35 | #define MX35_UART3_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x0c000) | ||
| 36 | #define MX35_CSPI2_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x10000) | ||
| 37 | #define MX35_SSI2_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x14000) | ||
| 38 | #define MX35_ATA_DMA_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x20000) | ||
| 39 | #define MX35_MSHC1_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x24000) | ||
| 40 | #define MX35_FEC_BASE_ADDR 0x50038000 | ||
| 41 | #define MX35_SPBA_CTRL_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x3c000) | ||
| 42 | |||
| 43 | #define MX35_AIPS2_BASE_ADDR 0x53f00000 | ||
| 44 | #define MX35_AIPS2_BASE_ADDR_VIRT 0xfc200000 | ||
| 45 | #define MX35_AIPS2_SIZE SZ_1M | ||
| 46 | #define MX35_CCM_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0x80000) | ||
| 47 | #define MX35_GPT1_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0x90000) | ||
| 48 | #define MX35_EPIT1_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0x94000) | ||
| 49 | #define MX35_EPIT2_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0x98000) | ||
| 50 | #define MX35_GPIO3_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xa4000) | ||
| 51 | #define MX35_SCC_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xac000) | ||
| 52 | #define MX35_RNGA_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xb0000) | ||
| 53 | #define MX35_IPU_CTRL_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xc0000) | ||
| 54 | #define MX35_AUDMUX_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xc4000) | ||
| 55 | #define MX35_GPIO1_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xcc000) | ||
| 56 | #define MX35_GPIO2_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xd0000) | ||
| 57 | #define MX35_SDMA_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xd4000) | ||
| 58 | #define MX35_RTC_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xd8000) | ||
| 59 | #define MX35_WDOG_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xdc000) | ||
| 60 | #define MX35_PWM_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xe0000) | ||
| 61 | #define MX35_RTIC_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xec000) | ||
| 62 | #define MX35_OTG_BASE_ADDR 0x53ff4000 | ||
| 63 | |||
| 64 | #define MX35_ROMP_BASE_ADDR 0x60000000 | ||
| 65 | #define MX35_ROMP_BASE_ADDR_VIRT 0xfc500000 | ||
| 66 | #define MX35_ROMP_SIZE SZ_1M | ||
| 67 | |||
| 68 | #define MX35_AVIC_BASE_ADDR 0x68000000 | ||
| 69 | #define MX35_AVIC_BASE_ADDR_VIRT 0xfc400000 | ||
| 70 | #define MX35_AVIC_SIZE SZ_1M | ||
| 71 | |||
| 72 | /* | ||
| 73 | * Memory regions and CS | ||
| 74 | */ | ||
| 75 | #define MX35_IPU_MEM_BASE_ADDR 0x70000000 | ||
| 76 | #define MX35_CSD0_BASE_ADDR 0x80000000 | ||
| 77 | #define MX35_CSD1_BASE_ADDR 0x90000000 | ||
| 78 | |||
| 79 | #define MX35_CS0_BASE_ADDR 0xa0000000 | ||
| 80 | #define MX35_CS1_BASE_ADDR 0xa8000000 | ||
| 81 | #define MX35_CS2_BASE_ADDR 0xb0000000 | ||
| 82 | #define MX35_CS3_BASE_ADDR 0xb2000000 | ||
| 83 | |||
| 84 | #define MX35_CS4_BASE_ADDR 0xb4000000 | ||
| 85 | #define MX35_CS4_BASE_ADDR_VIRT 0xf4000000 | ||
| 86 | #define MX35_CS4_SIZE SZ_32M | ||
| 87 | |||
| 88 | #define MX35_CS5_BASE_ADDR 0xb6000000 | ||
| 89 | #define MX35_CS5_BASE_ADDR_VIRT 0xf6000000 | ||
| 90 | #define MX35_CS5_SIZE SZ_32M | ||
| 91 | |||
| 92 | /* | ||
| 93 | * NAND, SDRAM, WEIM, M3IF, EMI controllers | ||
| 94 | */ | ||
| 95 | #define MX35_X_MEMC_BASE_ADDR 0xb8000000 | ||
| 96 | #define MX35_X_MEMC_BASE_ADDR_VIRT 0xfc320000 | ||
| 97 | #define MX35_X_MEMC_SIZE SZ_64K | ||
| 98 | #define MX35_ESDCTL_BASE_ADDR (MX35_X_MEMC_BASE_ADDR + 0x1000) | ||
| 99 | #define MX35_WEIM_BASE_ADDR (MX35_X_MEMC_BASE_ADDR + 0x2000) | ||
| 100 | #define MX35_M3IF_BASE_ADDR (MX35_X_MEMC_BASE_ADDR + 0x3000) | ||
| 101 | #define MX35_EMI_CTL_BASE_ADDR (MX35_X_MEMC_BASE_ADDR + 0x4000) | ||
| 102 | #define MX35_PCMCIA_CTL_BASE_ADDR MX35_EMI_CTL_BASE_ADDR | ||
| 103 | |||
| 104 | #define MX35_NFC_BASE_ADDR 0xbb000000 | ||
| 105 | #define MX35_PCMCIA_MEM_BASE_ADDR 0xbc000000 | ||
| 10 | 106 | ||
| 11 | /* | 107 | /* |
| 12 | * Interrupt numbers | 108 | * Interrupt numbers |
| 13 | */ | 109 | */ |
| 14 | #define MXC_INT_OWIRE 2 | 110 | #define MX35_INT_OWIRE 2 |
| 111 | #define MX35_INT_I2C3 3 | ||
| 112 | #define MX35_INT_I2C2 4 | ||
| 113 | #define MX35_INT_RTIC 6 | ||
| 15 | #define MX35_INT_MMC_SDHC1 7 | 114 | #define MX35_INT_MMC_SDHC1 7 |
| 16 | #define MXC_INT_MMC_SDHC2 8 | 115 | #define MX35_INT_MMC_SDHC2 8 |
| 17 | #define MXC_INT_MMC_SDHC3 9 | 116 | #define MX35_INT_MMC_SDHC3 9 |
| 117 | #define MX35_INT_I2C 10 | ||
| 18 | #define MX35_INT_SSI1 11 | 118 | #define MX35_INT_SSI1 11 |
| 19 | #define MX35_INT_SSI2 12 | 119 | #define MX35_INT_SSI2 12 |
| 20 | #define MXC_INT_GPU2D 16 | 120 | #define MX35_INT_CSPI2 13 |
| 21 | #define MXC_INT_ASRC 17 | 121 | #define MX35_INT_CSPI1 14 |
| 22 | #define MXC_INT_USBHS 35 | 122 | #define MX35_INT_ATA 15 |
| 23 | #define MXC_INT_USBOTG 37 | 123 | #define MX35_INT_GPU2D 16 |
| 24 | #define MXC_INT_ESAI 40 | 124 | #define MX35_INT_ASRC 17 |
| 25 | #define MXC_INT_CAN1 43 | 125 | #define MX35_INT_UART3 18 |
| 26 | #define MXC_INT_CAN2 44 | 126 | #define MX35_INT_IIM 19 |
| 27 | #define MXC_INT_MLB 46 | 127 | #define MX35_INT_RNGA 22 |
| 28 | #define MXC_INT_SPDIF 47 | 128 | #define MX35_INT_EVTMON 23 |
| 29 | #define MXC_INT_FEC 57 | 129 | #define MX35_INT_KPP 24 |
| 130 | #define MX35_INT_RTC 25 | ||
| 131 | #define MX35_INT_PWM 26 | ||
| 132 | #define MX35_INT_EPIT2 27 | ||
| 133 | #define MX35_INT_EPIT1 28 | ||
| 134 | #define MX35_INT_GPT 29 | ||
| 135 | #define MX35_INT_POWER_FAIL 30 | ||
| 136 | #define MX35_INT_UART2 32 | ||
| 137 | #define MX35_INT_NANDFC 33 | ||
| 138 | #define MX35_INT_SDMA 34 | ||
| 139 | #define MX35_INT_USBHS 35 | ||
| 140 | #define MX35_INT_USBOTG 37 | ||
| 141 | #define MX35_INT_MSHC1 39 | ||
| 142 | #define MX35_INT_ESAI 40 | ||
| 143 | #define MX35_INT_IPU_ERR 41 | ||
| 144 | #define MX35_INT_IPU_SYN 42 | ||
| 145 | #define MX35_INT_CAN1 43 | ||
| 146 | #define MX35_INT_CAN2 44 | ||
| 147 | #define MX35_INT_UART1 45 | ||
| 148 | #define MX35_INT_MLB 46 | ||
| 149 | #define MX35_INT_SPDIF 47 | ||
| 150 | #define MX35_INT_ECT 48 | ||
| 151 | #define MX35_INT_SCC_SCM 49 | ||
| 152 | #define MX35_INT_SCC_SMN 50 | ||
| 153 | #define MX35_INT_GPIO2 51 | ||
| 154 | #define MX35_INT_GPIO1 52 | ||
| 155 | #define MX35_INT_WDOG 55 | ||
| 156 | #define MX35_INT_GPIO3 56 | ||
| 157 | #define MX35_INT_FEC 57 | ||
| 158 | #define MX35_INT_EXT_POWER 58 | ||
| 159 | #define MX35_INT_EXT_TEMPER 59 | ||
| 160 | #define MX35_INT_EXT_SENSOR60 60 | ||
| 161 | #define MX35_INT_EXT_SENSOR61 61 | ||
| 162 | #define MX35_INT_EXT_WDOG 62 | ||
| 163 | #define MX35_INT_EXT_TV 63 | ||
| 164 | |||
| 165 | #define MX35_PROD_SIGNATURE 0x1 /* For MX31 */ | ||
| 166 | |||
| 167 | /* silicon revisions specific to i.MX31 */ | ||
| 168 | #define MX35_CHIP_REV_1_0 0x10 | ||
| 169 | #define MX35_CHIP_REV_1_1 0x11 | ||
| 170 | #define MX35_CHIP_REV_1_2 0x12 | ||
| 171 | #define MX35_CHIP_REV_1_3 0x13 | ||
| 172 | #define MX35_CHIP_REV_2_0 0x20 | ||
| 173 | #define MX35_CHIP_REV_2_1 0x21 | ||
| 174 | #define MX35_CHIP_REV_2_2 0x22 | ||
| 175 | #define MX35_CHIP_REV_2_3 0x23 | ||
| 176 | #define MX35_CHIP_REV_3_0 0x30 | ||
| 177 | #define MX35_CHIP_REV_3_1 0x31 | ||
| 178 | #define MX35_CHIP_REV_3_2 0x32 | ||
| 179 | |||
| 180 | #define MX35_SYSTEM_REV_MIN MX35_CHIP_REV_1_0 | ||
| 181 | #define MX35_SYSTEM_REV_NUM 3 | ||
| 30 | 182 | ||
| 183 | /* these should go away */ | ||
| 184 | #define MXC_FEC_BASE_ADDR MX35_FEC_BASE_ADDR | ||
| 185 | #define MXC_INT_OWIRE MX35_INT_OWIRE | ||
| 186 | #define MXC_INT_MMC_SDHC2 MX35_INT_MMC_SDHC2 | ||
| 187 | #define MXC_INT_MMC_SDHC3 MX35_INT_MMC_SDHC3 | ||
| 188 | #define MXC_INT_GPU2D MX35_INT_GPU2D | ||
| 189 | #define MXC_INT_ASRC MX35_INT_ASRC | ||
| 190 | #define MXC_INT_USBHS MX35_INT_USBHS | ||
| 191 | #define MXC_INT_USBOTG MX35_INT_USBOTG | ||
| 192 | #define MXC_INT_ESAI MX35_INT_ESAI | ||
| 193 | #define MXC_INT_CAN1 MX35_INT_CAN1 | ||
| 194 | #define MXC_INT_CAN2 MX35_INT_CAN2 | ||
| 195 | #define MXC_INT_MLB MX35_INT_MLB | ||
| 196 | #define MXC_INT_SPDIF MX35_INT_SPDIF | ||
| 197 | #define MXC_INT_FEC MX35_INT_FEC | ||
diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/plat-mxc/include/mach/mx3x.h index 009f4440276..be69272407a 100644 --- a/arch/arm/plat-mxc/include/mach/mx3x.h +++ b/arch/arm/plat-mxc/include/mach/mx3x.h | |||
| @@ -34,120 +34,117 @@ | |||
| 34 | * C0000000 64M PCMCIA/CF | 34 | * C0000000 64M PCMCIA/CF |
| 35 | */ | 35 | */ |
| 36 | 36 | ||
| 37 | #define CS0_BASE_ADDR 0xA0000000 | ||
| 38 | #define CS1_BASE_ADDR 0xA8000000 | ||
| 39 | #define CS2_BASE_ADDR 0xB0000000 | ||
| 40 | #define CS3_BASE_ADDR 0xB2000000 | ||
| 41 | |||
| 42 | #define CS4_BASE_ADDR 0xB4000000 | ||
| 43 | #define CS4_BASE_ADDR_VIRT 0xF4000000 | ||
| 44 | #define CS4_SIZE SZ_32M | ||
| 45 | |||
| 46 | #define CS5_BASE_ADDR 0xB6000000 | ||
| 47 | #define CS5_BASE_ADDR_VIRT 0xF6000000 | ||
| 48 | #define CS5_SIZE SZ_32M | ||
| 49 | |||
| 50 | #define PCMCIA_MEM_BASE_ADDR 0xBC000000 | ||
| 51 | |||
| 52 | /* | 37 | /* |
| 53 | * L2CC | 38 | * L2CC |
| 54 | */ | 39 | */ |
| 55 | #define L2CC_BASE_ADDR 0x30000000 | 40 | #define MX3x_L2CC_BASE_ADDR 0x30000000 |
| 56 | #define L2CC_SIZE SZ_1M | 41 | #define MX3x_L2CC_SIZE SZ_1M |
| 57 | 42 | ||
| 58 | /* | 43 | /* |
| 59 | * AIPS 1 | 44 | * AIPS 1 |
| 60 | */ | 45 | */ |
| 61 | #define AIPS1_BASE_ADDR 0x43F00000 | 46 | #define MX3x_AIPS1_BASE_ADDR 0x43f00000 |
| 62 | #define AIPS1_BASE_ADDR_VIRT 0xFC000000 | 47 | #define MX3x_AIPS1_BASE_ADDR_VIRT 0xfc000000 |
| 63 | #define AIPS1_SIZE SZ_1M | 48 | #define MX3x_AIPS1_SIZE SZ_1M |
| 64 | 49 | #define MX3x_MAX_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x04000) | |
| 65 | #define MAX_BASE_ADDR (AIPS1_BASE_ADDR + 0x00004000) | 50 | #define MX3x_EVTMON_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x08000) |
| 66 | #define EVTMON_BASE_ADDR (AIPS1_BASE_ADDR + 0x00008000) | 51 | #define MX3x_CLKCTL_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x0c000) |
| 67 | #define CLKCTL_BASE_ADDR (AIPS1_BASE_ADDR + 0x0000C000) | 52 | #define MX3x_ETB_SLOT4_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x10000) |
| 68 | #define ETB_SLOT4_BASE_ADDR (AIPS1_BASE_ADDR + 0x00010000) | 53 | #define MX3x_ETB_SLOT5_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x14000) |
| 69 | #define ETB_SLOT5_BASE_ADDR (AIPS1_BASE_ADDR + 0x00014000) | 54 | #define MX3x_ECT_CTIO_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x18000) |
| 70 | #define ECT_CTIO_BASE_ADDR (AIPS1_BASE_ADDR + 0x00018000) | 55 | #define MX3x_I2C_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x80000) |
| 71 | #define I2C_BASE_ADDR (AIPS1_BASE_ADDR + 0x00080000) | 56 | #define MX3x_I2C3_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x84000) |
| 72 | #define I2C3_BASE_ADDR (AIPS1_BASE_ADDR + 0x00084000) | 57 | #define MX3x_UART1_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x90000) |
| 73 | #define UART1_BASE_ADDR (AIPS1_BASE_ADDR + 0x00090000) | 58 | #define MX3x_UART2_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x94000) |
| 74 | #define UART2_BASE_ADDR (AIPS1_BASE_ADDR + 0x00094000) | 59 | #define MX3x_I2C2_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x98000) |
| 75 | #define I2C2_BASE_ADDR (AIPS1_BASE_ADDR + 0x00098000) | 60 | #define MX3x_OWIRE_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x9c000) |
| 76 | #define OWIRE_BASE_ADDR (AIPS1_BASE_ADDR + 0x0009C000) | 61 | #define MX3x_SSI1_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0xa0000) |
| 77 | #define SSI1_BASE_ADDR (AIPS1_BASE_ADDR + 0x000A0000) | 62 | #define MX3x_CSPI1_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0xa4000) |
| 78 | #define CSPI1_BASE_ADDR (AIPS1_BASE_ADDR + 0x000A4000) | 63 | #define MX3x_KPP_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0xa8000) |
| 79 | #define KPP_BASE_ADDR (AIPS1_BASE_ADDR + 0x000A8000) | 64 | #define MX3x_IOMUXC_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0xac000) |
| 80 | #define IOMUXC_BASE_ADDR (AIPS1_BASE_ADDR + 0x000AC000) | 65 | #define MX3x_ECT_IP1_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0xb8000) |
| 81 | #define ECT_IP1_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B8000) | 66 | #define MX3x_ECT_IP2_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0xbc000) |
| 82 | #define ECT_IP2_BASE_ADDR (AIPS1_BASE_ADDR + 0x000BC000) | ||
| 83 | 67 | ||
| 84 | /* | 68 | /* |
| 85 | * SPBA global module enabled #0 | 69 | * SPBA global module enabled #0 |
| 86 | */ | 70 | */ |
| 87 | #define SPBA0_BASE_ADDR 0x50000000 | 71 | #define MX3x_SPBA0_BASE_ADDR 0x50000000 |
| 88 | #define SPBA0_BASE_ADDR_VIRT 0xFC100000 | 72 | #define MX3x_SPBA0_BASE_ADDR_VIRT 0xfc100000 |
| 89 | #define SPBA0_SIZE SZ_1M | 73 | #define MX3x_SPBA0_SIZE SZ_1M |
| 90 | 74 | #define MX3x_UART3_BASE_ADDR (MX3x_SPBA0_BASE_ADDR + 0x0c000) | |
| 91 | #define UART3_BASE_ADDR (SPBA0_BASE_ADDR + 0x0000C000) | 75 | #define MX3x_CSPI2_BASE_ADDR (MX3x_SPBA0_BASE_ADDR + 0x10000) |
| 92 | #define CSPI2_BASE_ADDR (SPBA0_BASE_ADDR + 0x00010000) | 76 | #define MX3x_SSI2_BASE_ADDR (MX3x_SPBA0_BASE_ADDR + 0x14000) |
| 93 | #define SSI2_BASE_ADDR (SPBA0_BASE_ADDR + 0x00014000) | 77 | #define MX3x_ATA_DMA_BASE_ADDR (MX3x_SPBA0_BASE_ADDR + 0x20000) |
| 94 | #define ATA_DMA_BASE_ADDR (SPBA0_BASE_ADDR + 0x00020000) | 78 | #define MX3x_MSHC1_BASE_ADDR (MX3x_SPBA0_BASE_ADDR + 0x24000) |
| 95 | #define MSHC1_BASE_ADDR (SPBA0_BASE_ADDR + 0x00024000) | 79 | #define MX3x_SPBA_CTRL_BASE_ADDR (MX3x_SPBA0_BASE_ADDR + 0x3c000) |
| 96 | #define SPBA_CTRL_BASE_ADDR (SPBA0_BASE_ADDR + 0x0003C000) | ||
| 97 | 80 | ||
| 98 | /* | 81 | /* |
| 99 | * AIPS 2 | 82 | * AIPS 2 |
| 100 | */ | 83 | */ |
| 101 | #define AIPS2_BASE_ADDR 0x53F00000 | 84 | #define MX3x_AIPS2_BASE_ADDR 0x53f00000 |
| 102 | #define AIPS2_BASE_ADDR_VIRT 0xFC200000 | 85 | #define MX3x_AIPS2_BASE_ADDR_VIRT 0xfc200000 |
| 103 | #define AIPS2_SIZE SZ_1M | 86 | #define MX3x_AIPS2_SIZE SZ_1M |
| 104 | #define CCM_BASE_ADDR (AIPS2_BASE_ADDR + 0x00080000) | 87 | #define MX3x_CCM_BASE_ADDR (MX3x_AIPS2_BASE_ADDR + 0x80000) |
| 105 | #define GPT1_BASE_ADDR (AIPS2_BASE_ADDR + 0x00090000) | 88 | #define MX3x_GPT1_BASE_ADDR (MX3x_AIPS2_BASE_ADDR + 0x90000) |
| 106 | #define EPIT1_BASE_ADDR (AIPS2_BASE_ADDR + 0x00094000) | 89 | #define MX3x_EPIT1_BASE_ADDR (MX3x_AIPS2_BASE_ADDR + 0x94000) |
| 107 | #define EPIT2_BASE_ADDR (AIPS2_BASE_ADDR + 0x00098000) | 90 | #define MX3x_EPIT2_BASE_ADDR (MX3x_AIPS2_BASE_ADDR + 0x98000) |
| 108 | #define GPIO3_BASE_ADDR (AIPS2_BASE_ADDR + 0x000A4000) | 91 | #define MX3x_GPIO3_BASE_ADDR (MX3x_AIPS2_BASE_ADDR + 0xa4000) |
| 109 | #define SCC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000AC000) | 92 | #define MX3x_SCC_BASE_ADDR (MX3x_AIPS2_BASE_ADDR + 0xac000) |
| 110 | #define RNGA_BASE_ADDR (AIPS2_BASE_ADDR + 0x000B0000) | 93 | #define MX3x_RNGA_BASE_ADDR (MX3x_AIPS2_BASE_ADDR + 0xb0000) |
| 111 | #define IPU_CTRL_BASE_ADDR (AIPS2_BASE_ADDR + 0x000C0000) | 94 | #define MX3x_IPU_CTRL_BASE_ADDR (MX3x_AIPS2_BASE_ADDR + 0xc0000) |
| 112 | #define AUDMUX_BASE_ADDR (AIPS2_BASE_ADDR + 0x000C4000) | 95 | #define MX3x_AUDMUX_BASE_ADDR (MX3x_AIPS2_BASE_ADDR + 0xc4000) |
| 113 | #define GPIO1_BASE_ADDR (AIPS2_BASE_ADDR + 0x000CC000) | 96 | #define MX3x_GPIO1_BASE_ADDR (MX3x_AIPS2_BASE_ADDR + 0xcc000) |
| 114 | #define GPIO2_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D0000) | 97 | #define MX3x_GPIO2_BASE_ADDR (MX3x_AIPS2_BASE_ADDR + 0xd0000) |
| 115 | #define SDMA_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D4000) | 98 | #define MX3x_SDMA_BASE_ADDR (MX3x_AIPS2_BASE_ADDR + 0xd4000) |
| 116 | #define RTC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D8000) | 99 | #define MX3x_RTC_BASE_ADDR (MX3x_AIPS2_BASE_ADDR + 0xd8000) |
| 117 | #define WDOG_BASE_ADDR (AIPS2_BASE_ADDR + 0x000DC000) | 100 | #define MX3x_WDOG_BASE_ADDR (MX3x_AIPS2_BASE_ADDR + 0xdc000) |
| 118 | #define PWM_BASE_ADDR (AIPS2_BASE_ADDR + 0x000E0000) | 101 | #define MX3x_PWM_BASE_ADDR (MX3x_AIPS2_BASE_ADDR + 0xe0000) |
| 119 | #define RTIC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000EC000) | 102 | #define MX3x_RTIC_BASE_ADDR (MX3x_AIPS2_BASE_ADDR + 0xec000) |
| 120 | 103 | ||
| 121 | /* | 104 | /* |
| 122 | * ROMP and AVIC | 105 | * ROMP and AVIC |
| 123 | */ | 106 | */ |
| 124 | #define ROMP_BASE_ADDR 0x60000000 | 107 | #define MX3x_ROMP_BASE_ADDR 0x60000000 |
| 125 | #define ROMP_BASE_ADDR_VIRT 0xFC500000 | 108 | #define MX3x_ROMP_BASE_ADDR_VIRT 0xfc500000 |
| 126 | #define ROMP_SIZE SZ_1M | 109 | #define MX3x_ROMP_SIZE SZ_1M |
| 127 | 110 | ||
| 128 | #define AVIC_BASE_ADDR 0x68000000 | 111 | #define MX3x_AVIC_BASE_ADDR 0x68000000 |
| 129 | #define AVIC_BASE_ADDR_VIRT 0xFC400000 | 112 | #define MX3x_AVIC_BASE_ADDR_VIRT 0xfc400000 |
| 130 | #define AVIC_SIZE SZ_1M | 113 | #define MX3x_AVIC_SIZE SZ_1M |
| 131 | 114 | ||
| 132 | /* | 115 | /* |
| 133 | * NAND, SDRAM, WEIM, M3IF, EMI controllers | 116 | * Memory regions and CS |
| 134 | */ | 117 | */ |
| 135 | #define X_MEMC_BASE_ADDR 0xB8000000 | 118 | #define MX3x_IPU_MEM_BASE_ADDR 0x70000000 |
| 136 | #define X_MEMC_BASE_ADDR_VIRT 0xFC320000 | 119 | #define MX3x_CSD0_BASE_ADDR 0x80000000 |
| 137 | #define X_MEMC_SIZE SZ_64K | 120 | #define MX3x_CSD1_BASE_ADDR 0x90000000 |
| 138 | 121 | ||
| 139 | #define ESDCTL_BASE_ADDR (X_MEMC_BASE_ADDR + 0x1000) | 122 | #define MX3x_CS0_BASE_ADDR 0xa0000000 |
| 140 | #define WEIM_BASE_ADDR (X_MEMC_BASE_ADDR + 0x2000) | 123 | #define MX3x_CS1_BASE_ADDR 0xa8000000 |
| 141 | #define M3IF_BASE_ADDR (X_MEMC_BASE_ADDR + 0x3000) | 124 | #define MX3x_CS2_BASE_ADDR 0xb0000000 |
| 142 | #define EMI_CTL_BASE_ADDR (X_MEMC_BASE_ADDR + 0x4000) | 125 | #define MX3x_CS3_BASE_ADDR 0xb2000000 |
| 143 | #define PCMCIA_CTL_BASE_ADDR EMI_CTL_BASE_ADDR | 126 | |
| 127 | #define MX3x_CS4_BASE_ADDR 0xb4000000 | ||
| 128 | #define MX3x_CS4_BASE_ADDR_VIRT 0xf4000000 | ||
| 129 | #define MX3x_CS4_SIZE SZ_32M | ||
| 130 | |||
| 131 | #define MX3x_CS5_BASE_ADDR 0xb6000000 | ||
| 132 | #define MX3x_CS5_BASE_ADDR_VIRT 0xf6000000 | ||
| 133 | #define MX3x_CS5_SIZE SZ_32M | ||
| 144 | 134 | ||
| 145 | /* | 135 | /* |
| 146 | * Memory regions and CS | 136 | * NAND, SDRAM, WEIM, M3IF, EMI controllers |
| 147 | */ | 137 | */ |
| 148 | #define IPU_MEM_BASE_ADDR 0x70000000 | 138 | #define MX3x_X_MEMC_BASE_ADDR 0xb8000000 |
| 149 | #define CSD0_BASE_ADDR 0x80000000 | 139 | #define MX3x_X_MEMC_BASE_ADDR_VIRT 0xfc320000 |
| 150 | #define CSD1_BASE_ADDR 0x90000000 | 140 | #define MX3x_X_MEMC_SIZE SZ_64K |
| 141 | #define MX3x_ESDCTL_BASE_ADDR (MX3x_X_MEMC_BASE_ADDR + 0x1000) | ||
| 142 | #define MX3x_WEIM_BASE_ADDR (MX3x_X_MEMC_BASE_ADDR + 0x2000) | ||
| 143 | #define MX3x_M3IF_BASE_ADDR (MX3x_X_MEMC_BASE_ADDR + 0x3000) | ||
| 144 | #define MX3x_EMI_CTL_BASE_ADDR (MX3x_X_MEMC_BASE_ADDR + 0x4000) | ||
| 145 | #define MX3x_PCMCIA_CTL_BASE_ADDR MX3x_EMI_CTL_BASE_ADDR | ||
| 146 | |||
| 147 | #define MX3x_PCMCIA_MEM_BASE_ADDR 0xbc000000 | ||
| 151 | 148 | ||
| 152 | /*! | 149 | /*! |
| 153 | * This macro defines the physical to virtual address mapping for all the | 150 | * This macro defines the physical to virtual address mapping for all the |
| @@ -202,74 +199,207 @@ | |||
| 202 | /* | 199 | /* |
| 203 | * Interrupt numbers | 200 | * Interrupt numbers |
| 204 | */ | 201 | */ |
| 205 | #define MXC_INT_I2C3 3 | 202 | #define MX3x_INT_I2C3 3 |
| 206 | #define MXC_INT_I2C2 4 | 203 | #define MX3x_INT_I2C2 4 |
| 207 | #define MXC_INT_RTIC 6 | 204 | #define MX3x_INT_RTIC 6 |
| 208 | #define MXC_INT_I2C 10 | 205 | #define MX3x_INT_I2C 10 |
| 209 | #define MXC_INT_CSPI2 13 | 206 | #define MX3x_INT_CSPI2 13 |
| 210 | #define MXC_INT_CSPI1 14 | 207 | #define MX3x_INT_CSPI1 14 |
| 211 | #define MXC_INT_ATA 15 | 208 | #define MX3x_INT_ATA 15 |
| 212 | #define MXC_INT_UART3 18 | 209 | #define MX3x_INT_UART3 18 |
| 213 | #define MXC_INT_IIM 19 | 210 | #define MX3x_INT_IIM 19 |
| 214 | #define MXC_INT_RNGA 22 | 211 | #define MX3x_INT_RNGA 22 |
| 215 | #define MXC_INT_EVTMON 23 | 212 | #define MX3x_INT_EVTMON 23 |
| 216 | #define MXC_INT_KPP 24 | 213 | #define MX3x_INT_KPP 24 |
| 217 | #define MXC_INT_RTC 25 | 214 | #define MX3x_INT_RTC 25 |
| 218 | #define MXC_INT_PWM 26 | 215 | #define MX3x_INT_PWM 26 |
| 219 | #define MXC_INT_EPIT2 27 | 216 | #define MX3x_INT_EPIT2 27 |
| 220 | #define MXC_INT_EPIT1 28 | 217 | #define MX3x_INT_EPIT1 28 |
| 221 | #define MXC_INT_GPT 29 | 218 | #define MX3x_INT_GPT 29 |
| 222 | #define MXC_INT_POWER_FAIL 30 | 219 | #define MX3x_INT_POWER_FAIL 30 |
| 223 | #define MXC_INT_UART2 32 | 220 | #define MX3x_INT_UART2 32 |
| 224 | #define MXC_INT_NANDFC 33 | 221 | #define MX3x_INT_NANDFC 33 |
| 225 | #define MXC_INT_SDMA 34 | 222 | #define MX3x_INT_SDMA 34 |
| 226 | #define MXC_INT_MSHC1 39 | 223 | #define MX3x_INT_MSHC1 39 |
| 227 | #define MXC_INT_IPU_ERR 41 | 224 | #define MX3x_INT_IPU_ERR 41 |
| 228 | #define MXC_INT_IPU_SYN 42 | 225 | #define MX3x_INT_IPU_SYN 42 |
| 229 | #define MXC_INT_UART1 45 | 226 | #define MX3x_INT_UART1 45 |
| 230 | #define MXC_INT_ECT 48 | 227 | #define MX3x_INT_ECT 48 |
| 231 | #define MXC_INT_SCC_SCM 49 | 228 | #define MX3x_INT_SCC_SCM 49 |
| 232 | #define MXC_INT_SCC_SMN 50 | 229 | #define MX3x_INT_SCC_SMN 50 |
| 233 | #define MXC_INT_GPIO2 51 | 230 | #define MX3x_INT_GPIO2 51 |
| 234 | #define MXC_INT_GPIO1 52 | 231 | #define MX3x_INT_GPIO1 52 |
| 235 | #define MXC_INT_WDOG 55 | 232 | #define MX3x_INT_WDOG 55 |
| 236 | #define MXC_INT_GPIO3 56 | 233 | #define MX3x_INT_GPIO3 56 |
| 237 | #define MXC_INT_EXT_POWER 58 | 234 | #define MX3x_INT_EXT_POWER 58 |
| 238 | #define MXC_INT_EXT_TEMPER 59 | 235 | #define MX3x_INT_EXT_TEMPER 59 |
| 239 | #define MXC_INT_EXT_SENSOR60 60 | 236 | #define MX3x_INT_EXT_SENSOR60 60 |
| 240 | #define MXC_INT_EXT_SENSOR61 61 | 237 | #define MX3x_INT_EXT_SENSOR61 61 |
| 241 | #define MXC_INT_EXT_WDOG 62 | 238 | #define MX3x_INT_EXT_WDOG 62 |
| 242 | #define MXC_INT_EXT_TV 63 | 239 | #define MX3x_INT_EXT_TV 63 |
| 243 | 240 | ||
| 244 | #define PROD_SIGNATURE 0x1 /* For MX31 */ | 241 | #define MX3x_PROD_SIGNATURE 0x1 /* For MX31 */ |
| 245 | 242 | ||
| 246 | /* silicon revisions specific to i.MX31 */ | 243 | /* silicon revisions specific to i.MX31 */ |
| 247 | #define CHIP_REV_1_0 0x10 | 244 | #define MX3x_CHIP_REV_1_0 0x10 |
| 248 | #define CHIP_REV_1_1 0x11 | 245 | #define MX3x_CHIP_REV_1_1 0x11 |
| 249 | #define CHIP_REV_1_2 0x12 | 246 | #define MX3x_CHIP_REV_1_2 0x12 |
| 250 | #define CHIP_REV_1_3 0x13 | 247 | #define MX3x_CHIP_REV_1_3 0x13 |
| 251 | #define CHIP_REV_2_0 0x20 | 248 | #define MX3x_CHIP_REV_2_0 0x20 |
| 252 | #define CHIP_REV_2_1 0x21 | 249 | #define MX3x_CHIP_REV_2_1 0x21 |
| 253 | #define CHIP_REV_2_2 0x22 | 250 | #define MX3x_CHIP_REV_2_2 0x22 |
| 254 | #define CHIP_REV_2_3 0x23 | 251 | #define MX3x_CHIP_REV_2_3 0x23 |
| 255 | #define CHIP_REV_3_0 0x30 | 252 | #define MX3x_CHIP_REV_3_0 0x30 |
| 256 | #define CHIP_REV_3_1 0x31 | 253 | #define MX3x_CHIP_REV_3_1 0x31 |
| 257 | #define CHIP_REV_3_2 0x32 | 254 | #define MX3x_CHIP_REV_3_2 0x32 |
| 258 | 255 | ||
| 259 | #define SYSTEM_REV_MIN CHIP_REV_1_0 | 256 | #define MX3x_SYSTEM_REV_MIN MX3x_CHIP_REV_1_0 |
| 260 | #define SYSTEM_REV_NUM 3 | 257 | #define MX3x_SYSTEM_REV_NUM 3 |
| 261 | 258 | ||
| 262 | /* Mandatory defines used globally */ | 259 | /* Mandatory defines used globally */ |
| 263 | 260 | ||
| 264 | #if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS) | 261 | #if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS) |
| 265 | 262 | ||
| 266 | extern unsigned int system_rev; | 263 | extern unsigned int mx31_cpu_rev; |
| 264 | extern void mx31_read_cpu_rev(void); | ||
| 267 | 265 | ||
| 268 | static inline int mx31_revision(void) | 266 | static inline int mx31_revision(void) |
| 269 | { | 267 | { |
| 270 | return system_rev; | 268 | return mx31_cpu_rev; |
| 271 | } | 269 | } |
| 272 | #endif | 270 | #endif |
| 273 | 271 | ||
| 274 | #endif /* __ASM_ARCH_MXC_MX31_H__ */ | 272 | /* these should go away */ |
| 273 | #define L2CC_BASE_ADDR MX3x_L2CC_BASE_ADDR | ||
| 274 | #define L2CC_SIZE MX3x_L2CC_SIZE | ||
| 275 | #define AIPS1_BASE_ADDR MX3x_AIPS1_BASE_ADDR | ||
| 276 | #define AIPS1_BASE_ADDR_VIRT MX3x_AIPS1_BASE_ADDR_VIRT | ||
| 277 | #define AIPS1_SIZE MX3x_AIPS1_SIZE | ||
| 278 | #define MAX_BASE_ADDR MX3x_MAX_BASE_ADDR | ||
| 279 | #define EVTMON_BASE_ADDR MX3x_EVTMON_BASE_ADDR | ||
| 280 | #define CLKCTL_BASE_ADDR MX3x_CLKCTL_BASE_ADDR | ||
| 281 | #define ETB_SLOT4_BASE_ADDR MX3x_ETB_SLOT4_BASE_ADDR | ||
| 282 | #define ETB_SLOT5_BASE_ADDR MX3x_ETB_SLOT5_BASE_ADDR | ||
| 283 | #define ECT_CTIO_BASE_ADDR MX3x_ECT_CTIO_BASE_ADDR | ||
| 284 | #define I2C_BASE_ADDR MX3x_I2C_BASE_ADDR | ||
| 285 | #define I2C3_BASE_ADDR MX3x_I2C3_BASE_ADDR | ||
| 286 | #define UART1_BASE_ADDR MX3x_UART1_BASE_ADDR | ||
| 287 | #define UART2_BASE_ADDR MX3x_UART2_BASE_ADDR | ||
| 288 | #define I2C2_BASE_ADDR MX3x_I2C2_BASE_ADDR | ||
| 289 | #define OWIRE_BASE_ADDR MX3x_OWIRE_BASE_ADDR | ||
| 290 | #define SSI1_BASE_ADDR MX3x_SSI1_BASE_ADDR | ||
| 291 | #define CSPI1_BASE_ADDR MX3x_CSPI1_BASE_ADDR | ||
| 292 | #define KPP_BASE_ADDR MX3x_KPP_BASE_ADDR | ||
| 293 | #define IOMUXC_BASE_ADDR MX3x_IOMUXC_BASE_ADDR | ||
| 294 | #define ECT_IP1_BASE_ADDR MX3x_ECT_IP1_BASE_ADDR | ||
| 295 | #define ECT_IP2_BASE_ADDR MX3x_ECT_IP2_BASE_ADDR | ||
| 296 | #define SPBA0_BASE_ADDR MX3x_SPBA0_BASE_ADDR | ||
| 297 | #define SPBA0_BASE_ADDR_VIRT MX3x_SPBA0_BASE_ADDR_VIRT | ||
| 298 | #define SPBA0_SIZE MX3x_SPBA0_SIZE | ||
| 299 | #define UART3_BASE_ADDR MX3x_UART3_BASE_ADDR | ||
| 300 | #define CSPI2_BASE_ADDR MX3x_CSPI2_BASE_ADDR | ||
| 301 | #define SSI2_BASE_ADDR MX3x_SSI2_BASE_ADDR | ||
| 302 | #define ATA_DMA_BASE_ADDR MX3x_ATA_DMA_BASE_ADDR | ||
| 303 | #define MSHC1_BASE_ADDR MX3x_MSHC1_BASE_ADDR | ||
| 304 | #define SPBA_CTRL_BASE_ADDR MX3x_SPBA_CTRL_BASE_ADDR | ||
| 305 | #define AIPS2_BASE_ADDR MX3x_AIPS2_BASE_ADDR | ||
| 306 | #define AIPS2_BASE_ADDR_VIRT MX3x_AIPS2_BASE_ADDR_VIRT | ||
| 307 | #define AIPS2_SIZE MX3x_AIPS2_SIZE | ||
| 308 | #define CCM_BASE_ADDR MX3x_CCM_BASE_ADDR | ||
| 309 | #define GPT1_BASE_ADDR MX3x_GPT1_BASE_ADDR | ||
| 310 | #define EPIT1_BASE_ADDR MX3x_EPIT1_BASE_ADDR | ||
| 311 | #define EPIT2_BASE_ADDR MX3x_EPIT2_BASE_ADDR | ||
| 312 | #define GPIO3_BASE_ADDR MX3x_GPIO3_BASE_ADDR | ||
| 313 | #define SCC_BASE_ADDR MX3x_SCC_BASE_ADDR | ||
| 314 | #define RNGA_BASE_ADDR MX3x_RNGA_BASE_ADDR | ||
| 315 | #define IPU_CTRL_BASE_ADDR MX3x_IPU_CTRL_BASE_ADDR | ||
| 316 | #define AUDMUX_BASE_ADDR MX3x_AUDMUX_BASE_ADDR | ||
| 317 | #define GPIO1_BASE_ADDR MX3x_GPIO1_BASE_ADDR | ||
| 318 | #define GPIO2_BASE_ADDR MX3x_GPIO2_BASE_ADDR | ||
| 319 | #define SDMA_BASE_ADDR MX3x_SDMA_BASE_ADDR | ||
| 320 | #define RTC_BASE_ADDR MX3x_RTC_BASE_ADDR | ||
| 321 | #define WDOG_BASE_ADDR MX3x_WDOG_BASE_ADDR | ||
| 322 | #define PWM_BASE_ADDR MX3x_PWM_BASE_ADDR | ||
| 323 | #define RTIC_BASE_ADDR MX3x_RTIC_BASE_ADDR | ||
| 324 | #define ROMP_BASE_ADDR MX3x_ROMP_BASE_ADDR | ||
| 325 | #define ROMP_BASE_ADDR_VIRT MX3x_ROMP_BASE_ADDR_VIRT | ||
| 326 | #define ROMP_SIZE MX3x_ROMP_SIZE | ||
| 327 | #define AVIC_BASE_ADDR MX3x_AVIC_BASE_ADDR | ||
| 328 | #define AVIC_BASE_ADDR_VIRT MX3x_AVIC_BASE_ADDR_VIRT | ||
| 329 | #define AVIC_SIZE MX3x_AVIC_SIZE | ||
| 330 | #define IPU_MEM_BASE_ADDR MX3x_IPU_MEM_BASE_ADDR | ||
| 331 | #define CSD0_BASE_ADDR MX3x_CSD0_BASE_ADDR | ||
| 332 | #define CSD1_BASE_ADDR MX3x_CSD1_BASE_ADDR | ||
| 333 | #define CS0_BASE_ADDR MX3x_CS0_BASE_ADDR | ||
| 334 | #define CS1_BASE_ADDR MX3x_CS1_BASE_ADDR | ||
| 335 | #define CS2_BASE_ADDR MX3x_CS2_BASE_ADDR | ||
| 336 | #define CS3_BASE_ADDR MX3x_CS3_BASE_ADDR | ||
| 337 | #define CS4_BASE_ADDR MX3x_CS4_BASE_ADDR | ||
| 338 | #define CS4_BASE_ADDR_VIRT MX3x_CS4_BASE_ADDR_VIRT | ||
| 339 | #define CS4_SIZE MX3x_CS4_SIZE | ||
| 340 | #define CS5_BASE_ADDR MX3x_CS5_BASE_ADDR | ||
| 341 | #define CS5_BASE_ADDR_VIRT MX3x_CS5_BASE_ADDR_VIRT | ||
| 342 | #define CS5_SIZE MX3x_CS5_SIZE | ||
| 343 | #define X_MEMC_BASE_ADDR MX3x_X_MEMC_BASE_ADDR | ||
| 344 | #define X_MEMC_BASE_ADDR_VIRT MX3x_X_MEMC_BASE_ADDR_VIRT | ||
| 345 | #define X_MEMC_SIZE MX3x_X_MEMC_SIZE | ||
| 346 | #define ESDCTL_BASE_ADDR MX3x_ESDCTL_BASE_ADDR | ||
| 347 | #define WEIM_BASE_ADDR MX3x_WEIM_BASE_ADDR | ||
| 348 | #define M3IF_BASE_ADDR MX3x_M3IF_BASE_ADDR | ||
| 349 | #define EMI_CTL_BASE_ADDR MX3x_EMI_CTL_BASE_ADDR | ||
| 350 | #define PCMCIA_CTL_BASE_ADDR MX3x_PCMCIA_CTL_BASE_ADDR | ||
| 351 | #define PCMCIA_MEM_BASE_ADDR MX3x_PCMCIA_MEM_BASE_ADDR | ||
| 352 | #define MXC_INT_I2C3 MX3x_INT_I2C3 | ||
| 353 | #define MXC_INT_I2C2 MX3x_INT_I2C2 | ||
| 354 | #define MXC_INT_RTIC MX3x_INT_RTIC | ||
| 355 | #define MXC_INT_I2C MX3x_INT_I2C | ||
| 356 | #define MXC_INT_CSPI2 MX3x_INT_CSPI2 | ||
| 357 | #define MXC_INT_CSPI1 MX3x_INT_CSPI1 | ||
| 358 | #define MXC_INT_ATA MX3x_INT_ATA | ||
| 359 | #define MXC_INT_UART3 MX3x_INT_UART3 | ||
| 360 | #define MXC_INT_IIM MX3x_INT_IIM | ||
| 361 | #define MXC_INT_RNGA MX3x_INT_RNGA | ||
| 362 | #define MXC_INT_EVTMON MX3x_INT_EVTMON | ||
| 363 | #define MXC_INT_KPP MX3x_INT_KPP | ||
| 364 | #define MXC_INT_RTC MX3x_INT_RTC | ||
| 365 | #define MXC_INT_PWM MX3x_INT_PWM | ||
| 366 | #define MXC_INT_EPIT2 MX3x_INT_EPIT2 | ||
| 367 | #define MXC_INT_EPIT1 MX3x_INT_EPIT1 | ||
| 368 | #define MXC_INT_GPT MX3x_INT_GPT | ||
| 369 | #define MXC_INT_POWER_FAIL MX3x_INT_POWER_FAIL | ||
| 370 | #define MXC_INT_UART2 MX3x_INT_UART2 | ||
| 371 | #define MXC_INT_NANDFC MX3x_INT_NANDFC | ||
| 372 | #define MXC_INT_SDMA MX3x_INT_SDMA | ||
| 373 | #define MXC_INT_MSHC1 MX3x_INT_MSHC1 | ||
| 374 | #define MXC_INT_IPU_ERR MX3x_INT_IPU_ERR | ||
| 375 | #define MXC_INT_IPU_SYN MX3x_INT_IPU_SYN | ||
| 376 | #define MXC_INT_UART1 MX3x_INT_UART1 | ||
| 377 | #define MXC_INT_ECT MX3x_INT_ECT | ||
| 378 | #define MXC_INT_SCC_SCM MX3x_INT_SCC_SCM | ||
| 379 | #define MXC_INT_SCC_SMN MX3x_INT_SCC_SMN | ||
| 380 | #define MXC_INT_GPIO2 MX3x_INT_GPIO2 | ||
| 381 | #define MXC_INT_GPIO1 MX3x_INT_GPIO1 | ||
| 382 | #define MXC_INT_WDOG MX3x_INT_WDOG | ||
| 383 | #define MXC_INT_GPIO3 MX3x_INT_GPIO3 | ||
| 384 | #define MXC_INT_EXT_POWER MX3x_INT_EXT_POWER | ||
| 385 | #define MXC_INT_EXT_TEMPER MX3x_INT_EXT_TEMPER | ||
| 386 | #define MXC_INT_EXT_SENSOR60 MX3x_INT_EXT_SENSOR60 | ||
| 387 | #define MXC_INT_EXT_SENSOR61 MX3x_INT_EXT_SENSOR61 | ||
| 388 | #define MXC_INT_EXT_WDOG MX3x_INT_EXT_WDOG | ||
| 389 | #define MXC_INT_EXT_TV MX3x_INT_EXT_TV | ||
| 390 | #define PROD_SIGNATURE MX3x_PROD_SIGNATURE | ||
| 391 | #define CHIP_REV_1_0 MX3x_CHIP_REV_1_0 | ||
| 392 | #define CHIP_REV_1_1 MX3x_CHIP_REV_1_1 | ||
| 393 | #define CHIP_REV_1_2 MX3x_CHIP_REV_1_2 | ||
| 394 | #define CHIP_REV_1_3 MX3x_CHIP_REV_1_3 | ||
| 395 | #define CHIP_REV_2_0 MX3x_CHIP_REV_2_0 | ||
| 396 | #define CHIP_REV_2_1 MX3x_CHIP_REV_2_1 | ||
| 397 | #define CHIP_REV_2_2 MX3x_CHIP_REV_2_2 | ||
| 398 | #define CHIP_REV_2_3 MX3x_CHIP_REV_2_3 | ||
| 399 | #define CHIP_REV_3_0 MX3x_CHIP_REV_3_0 | ||
| 400 | #define CHIP_REV_3_1 MX3x_CHIP_REV_3_1 | ||
| 401 | #define CHIP_REV_3_2 MX3x_CHIP_REV_3_2 | ||
| 402 | #define SYSTEM_REV_MIN MX3x_SYSTEM_REV_MIN | ||
| 403 | #define SYSTEM_REV_NUM MX3x_SYSTEM_REV_NUM | ||
| 275 | 404 | ||
| 405 | #endif /* __ASM_ARCH_MXC_MX31_H__ */ | ||
diff --git a/arch/arm/plat-mxc/include/mach/ulpi.h b/arch/arm/plat-mxc/include/mach/ulpi.h new file mode 100644 index 00000000000..96b6ab4c40c --- /dev/null +++ b/arch/arm/plat-mxc/include/mach/ulpi.h | |||
| @@ -0,0 +1,7 @@ | |||
| 1 | #ifndef __MACH_ULPI_H | ||
| 2 | #define __MACH_ULPI_H | ||
| 3 | |||
| 4 | extern struct otg_io_access_ops mxc_ulpi_access_ops; | ||
| 5 | |||
| 6 | #endif /* __MACH_ULPI_H */ | ||
| 7 | |||
diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h index 082a3908256..4d5d395ad63 100644 --- a/arch/arm/plat-mxc/include/mach/uncompress.h +++ b/arch/arm/plat-mxc/include/mach/uncompress.h | |||
| @@ -83,6 +83,8 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id) | |||
| 83 | case MACH_TYPE_MX27ADS: | 83 | case MACH_TYPE_MX27ADS: |
| 84 | case MACH_TYPE_PCM038: | 84 | case MACH_TYPE_PCM038: |
| 85 | case MACH_TYPE_MX21ADS: | 85 | case MACH_TYPE_MX21ADS: |
| 86 | case MACH_TYPE_PCA100: | ||
| 87 | case MACH_TYPE_MXT_TD60: | ||
| 86 | uart_base = MX2X_UART1_BASE_ADDR; | 88 | uart_base = MX2X_UART1_BASE_ADDR; |
| 87 | break; | 89 | break; |
| 88 | case MACH_TYPE_MX31LITE: | 90 | case MACH_TYPE_MX31LITE: |
| @@ -94,6 +96,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id) | |||
| 94 | case MACH_TYPE_MX31ADS: | 96 | case MACH_TYPE_MX31ADS: |
| 95 | case MACH_TYPE_MX35_3DS: | 97 | case MACH_TYPE_MX35_3DS: |
| 96 | case MACH_TYPE_PCM043: | 98 | case MACH_TYPE_PCM043: |
| 99 | case MACH_TYPE_LILLY1131: | ||
| 97 | uart_base = MX3X_UART1_BASE_ADDR; | 100 | uart_base = MX3X_UART1_BASE_ADDR; |
| 98 | break; | 101 | break; |
| 99 | case MACH_TYPE_MAGX_ZN5: | 102 | case MACH_TYPE_MAGX_ZN5: |
diff --git a/arch/arm/plat-mxc/iomux-v3.c b/arch/arm/plat-mxc/iomux-v3.c index 851ca99bf1b..b318c6a222d 100644 --- a/arch/arm/plat-mxc/iomux-v3.c +++ b/arch/arm/plat-mxc/iomux-v3.c | |||
| @@ -31,19 +31,11 @@ | |||
| 31 | 31 | ||
| 32 | static void __iomem *base; | 32 | static void __iomem *base; |
| 33 | 33 | ||
| 34 | static unsigned long iomux_v3_pad_alloc_map[0x200 / BITS_PER_LONG]; | ||
| 35 | |||
| 36 | /* | 34 | /* |
| 37 | * setups a single pin: | 35 | * setups a single pad in the iomuxer |
| 38 | * - reserves the pin so that it is not claimed by another driver | ||
| 39 | * - setups the iomux according to the configuration | ||
| 40 | */ | 36 | */ |
| 41 | int mxc_iomux_v3_setup_pad(struct pad_desc *pad) | 37 | int mxc_iomux_v3_setup_pad(struct pad_desc *pad) |
| 42 | { | 38 | { |
| 43 | unsigned int pad_ofs = pad->pad_ctrl_ofs; | ||
| 44 | |||
| 45 | if (test_and_set_bit(pad_ofs >> 2, iomux_v3_pad_alloc_map)) | ||
| 46 | return -EBUSY; | ||
| 47 | if (pad->mux_ctrl_ofs) | 39 | if (pad->mux_ctrl_ofs) |
| 48 | __raw_writel(pad->mux_mode, base + pad->mux_ctrl_ofs); | 40 | __raw_writel(pad->mux_mode, base + pad->mux_ctrl_ofs); |
| 49 | 41 | ||
| @@ -66,37 +58,13 @@ int mxc_iomux_v3_setup_multiple_pads(struct pad_desc *pad_list, unsigned count) | |||
| 66 | for (i = 0; i < count; i++) { | 58 | for (i = 0; i < count; i++) { |
| 67 | ret = mxc_iomux_v3_setup_pad(p); | 59 | ret = mxc_iomux_v3_setup_pad(p); |
| 68 | if (ret) | 60 | if (ret) |
| 69 | goto setup_error; | 61 | return ret; |
| 70 | p++; | 62 | p++; |
| 71 | } | 63 | } |
| 72 | return 0; | 64 | return 0; |
| 73 | |||
| 74 | setup_error: | ||
| 75 | mxc_iomux_v3_release_multiple_pads(pad_list, i); | ||
| 76 | return ret; | ||
| 77 | } | 65 | } |
| 78 | EXPORT_SYMBOL(mxc_iomux_v3_setup_multiple_pads); | 66 | EXPORT_SYMBOL(mxc_iomux_v3_setup_multiple_pads); |
| 79 | 67 | ||
| 80 | void mxc_iomux_v3_release_pad(struct pad_desc *pad) | ||
| 81 | { | ||
| 82 | unsigned int pad_ofs = pad->pad_ctrl_ofs; | ||
| 83 | |||
| 84 | clear_bit(pad_ofs >> 2, iomux_v3_pad_alloc_map); | ||
| 85 | } | ||
| 86 | EXPORT_SYMBOL(mxc_iomux_v3_release_pad); | ||
| 87 | |||
| 88 | void mxc_iomux_v3_release_multiple_pads(struct pad_desc *pad_list, int count) | ||
| 89 | { | ||
| 90 | struct pad_desc *p = pad_list; | ||
| 91 | int i; | ||
| 92 | |||
| 93 | for (i = 0; i < count; i++) { | ||
| 94 | mxc_iomux_v3_release_pad(p); | ||
| 95 | p++; | ||
| 96 | } | ||
| 97 | } | ||
| 98 | EXPORT_SYMBOL(mxc_iomux_v3_release_multiple_pads); | ||
| 99 | |||
| 100 | void mxc_iomux_v3_init(void __iomem *iomux_v3_base) | 68 | void mxc_iomux_v3_init(void __iomem *iomux_v3_base) |
| 101 | { | 69 | { |
| 102 | base = iomux_v3_base; | 70 | base = iomux_v3_base; |
diff --git a/arch/arm/plat-mxc/ulpi.c b/arch/arm/plat-mxc/ulpi.c new file mode 100644 index 00000000000..582c6dfaba4 --- /dev/null +++ b/arch/arm/plat-mxc/ulpi.c | |||
| @@ -0,0 +1,113 @@ | |||
| 1 | /* | ||
| 2 | * Copyright 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de> | ||
| 3 | * Copyright 2009 Daniel Mack <daniel@caiaq.de> | ||
| 4 | * | ||
| 5 | * This program is free software; you can redistribute it and/or | ||
| 6 | * modify it under the terms of the GNU General Public License | ||
| 7 | * as published by the Free Software Foundation; either version 2 | ||
| 8 | * of the License, or (at your option) any later version. | ||
| 9 | * This program is distributed in the hope that it will be useful, | ||
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 12 | * GNU General Public License for more details. | ||
| 13 | * | ||
| 14 | * You should have received a copy of the GNU General Public License | ||
| 15 | * along with this program; if not, write to the Free Software | ||
| 16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | ||
| 17 | * MA 02110-1301, USA. | ||
| 18 | */ | ||
| 19 | |||
| 20 | #include <linux/module.h> | ||
| 21 | #include <linux/kernel.h> | ||
| 22 | #include <linux/io.h> | ||
| 23 | #include <linux/delay.h> | ||
| 24 | #include <linux/usb/otg.h> | ||
| 25 | |||
| 26 | #include <mach/ulpi.h> | ||
| 27 | |||
| 28 | /* ULPIVIEW register bits */ | ||
| 29 | #define ULPIVW_WU (1 << 31) /* Wakeup */ | ||
| 30 | #define ULPIVW_RUN (1 << 30) /* read/write run */ | ||
| 31 | #define ULPIVW_WRITE (1 << 29) /* 0 = read 1 = write */ | ||
| 32 | #define ULPIVW_SS (1 << 27) /* SyncState */ | ||
| 33 | #define ULPIVW_PORT_MASK 0x07 /* Port field */ | ||
| 34 | #define ULPIVW_PORT_SHIFT 24 | ||
| 35 | #define ULPIVW_ADDR_MASK 0xff /* data address field */ | ||
| 36 | #define ULPIVW_ADDR_SHIFT 16 | ||
| 37 | #define ULPIVW_RDATA_MASK 0xff /* read data field */ | ||
| 38 | #define ULPIVW_RDATA_SHIFT 8 | ||
| 39 | #define ULPIVW_WDATA_MASK 0xff /* write data field */ | ||
| 40 | #define ULPIVW_WDATA_SHIFT 0 | ||
| 41 | |||
| 42 | static int ulpi_poll(void __iomem *view, u32 bit) | ||
| 43 | { | ||
| 44 | int timeout = 10000; | ||
| 45 | |||
| 46 | while (timeout--) { | ||
| 47 | u32 data = __raw_readl(view); | ||
| 48 | |||
| 49 | if (!(data & bit)) | ||
| 50 | return 0; | ||
| 51 | |||
| 52 | cpu_relax(); | ||
| 53 | }; | ||
| 54 | |||
| 55 | printk(KERN_WARNING "timeout polling for ULPI device\n"); | ||
| 56 | |||
| 57 | return -ETIMEDOUT; | ||
| 58 | } | ||
| 59 | |||
| 60 | static int ulpi_read(struct otg_transceiver *otg, u32 reg) | ||
| 61 | { | ||
| 62 | int ret; | ||
| 63 | void __iomem *view = otg->io_priv; | ||
| 64 | |||
| 65 | /* make sure interface is running */ | ||
| 66 | if (!(__raw_readl(view) & ULPIVW_SS)) { | ||
| 67 | __raw_writel(ULPIVW_WU, view); | ||
| 68 | |||
| 69 | /* wait for wakeup */ | ||
| 70 | ret = ulpi_poll(view, ULPIVW_WU); | ||
| 71 | if (ret) | ||
| 72 | return ret; | ||
| 73 | } | ||
| 74 | |||
| 75 | /* read the register */ | ||
| 76 | __raw_writel((ULPIVW_RUN | (reg << ULPIVW_ADDR_SHIFT)), view); | ||
| 77 | |||
| 78 | /* wait for completion */ | ||
| 79 | ret = ulpi_poll(view, ULPIVW_RUN); | ||
| 80 | if (ret) | ||
| 81 | return ret; | ||
| 82 | |||
| 83 | return (__raw_readl(view) >> ULPIVW_RDATA_SHIFT) & ULPIVW_RDATA_MASK; | ||
| 84 | } | ||
| 85 | |||
| 86 | static int ulpi_write(struct otg_transceiver *otg, u32 val, u32 reg) | ||
| 87 | { | ||
| 88 | int ret; | ||
| 89 | void __iomem *view = otg->io_priv; | ||
| 90 | |||
| 91 | /* make sure the interface is running */ | ||
| 92 | if (!(__raw_readl(view) & ULPIVW_SS)) { | ||
| 93 | __raw_writel(ULPIVW_WU, view); | ||
| 94 | /* wait for wakeup */ | ||
| 95 | ret = ulpi_poll(view, ULPIVW_WU); | ||
| 96 | if (ret) | ||
| 97 | return ret; | ||
| 98 | } | ||
| 99 | |||
| 100 | __raw_writel((ULPIVW_RUN | ULPIVW_WRITE | | ||
| 101 | (reg << ULPIVW_ADDR_SHIFT) | | ||
| 102 | ((val & ULPIVW_WDATA_MASK) << ULPIVW_WDATA_SHIFT)), view); | ||
| 103 | |||
| 104 | /* wait for completion */ | ||
| 105 | return ulpi_poll(view, ULPIVW_RUN); | ||
| 106 | } | ||
| 107 | |||
| 108 | struct otg_io_access_ops mxc_ulpi_access_ops = { | ||
| 109 | .read = ulpi_read, | ||
| 110 | .write = ulpi_write, | ||
| 111 | }; | ||
| 112 | EXPORT_SYMBOL_GPL(mxc_ulpi_access_ops); | ||
| 113 | |||
diff --git a/arch/arm/plat-nomadik/Kconfig b/arch/arm/plat-nomadik/Kconfig new file mode 100644 index 00000000000..159daf583f8 --- /dev/null +++ b/arch/arm/plat-nomadik/Kconfig | |||
| @@ -0,0 +1,22 @@ | |||
| 1 | # We keep common IP's here for Nomadik and other similar | ||
| 2 | # familiy of processors from ST-Ericsson. At the moment we have | ||
| 3 | # just MTU, others to follow soon. | ||
| 4 | |||
| 5 | config PLAT_NOMADIK | ||
| 6 | bool | ||
| 7 | depends on ARCH_NOMADIK || ARCH_U8500 | ||
| 8 | default y | ||
| 9 | help | ||
| 10 | Common platform code for Nomadik and other ST-Ericsson | ||
| 11 | platforms. | ||
| 12 | |||
| 13 | if PLAT_NOMADIK | ||
| 14 | |||
| 15 | config HAS_MTU | ||
| 16 | bool | ||
| 17 | help | ||
| 18 | Support for Multi Timer Unit. MTU provides access | ||
| 19 | to multiple interrupt generating programmable | ||
| 20 | 32-bit free running decrementing counters. | ||
| 21 | |||
| 22 | endif | ||
diff --git a/arch/arm/plat-nomadik/Makefile b/arch/arm/plat-nomadik/Makefile new file mode 100644 index 00000000000..37c7cdd0f8f --- /dev/null +++ b/arch/arm/plat-nomadik/Makefile | |||
| @@ -0,0 +1,5 @@ | |||
| 1 | # arch/arm/plat-nomadik/Makefile | ||
| 2 | # Copyright 2009 ST-Ericsson | ||
| 3 | # Licensed under GPLv2 | ||
| 4 | |||
| 5 | obj-$(CONFIG_HAS_MTU) += timer.o | ||
diff --git a/arch/arm/mach-nomadik/include/mach/mtu.h b/arch/arm/plat-nomadik/include/plat/mtu.h index 76da7f08533..42c907258b1 100644 --- a/arch/arm/mach-nomadik/include/mach/mtu.h +++ b/arch/arm/plat-nomadik/include/plat/mtu.h | |||
| @@ -1,5 +1,8 @@ | |||
| 1 | #ifndef __ASM_ARCH_MTU_H | 1 | #ifndef __PLAT_MTU_H |
| 2 | #define __ASM_ARCH_MTU_H | 2 | #define __PLAT_MTU_H |
| 3 | |||
| 4 | /* should be set by the platform code */ | ||
| 5 | extern void __iomem *mtu_base; | ||
| 3 | 6 | ||
| 4 | /* | 7 | /* |
| 5 | * The MTU device hosts four different counters, with 4 set of | 8 | * The MTU device hosts four different counters, with 4 set of |
| @@ -41,5 +44,5 @@ | |||
| 41 | #define MTU_PCELL2 0xff8 | 44 | #define MTU_PCELL2 0xff8 |
| 42 | #define MTU_PCELL3 0xffC | 45 | #define MTU_PCELL3 0xffC |
| 43 | 46 | ||
| 44 | #endif /* __ASM_ARCH_MTU_H */ | 47 | #endif /* __PLAT_MTU_H */ |
| 45 | 48 | ||
diff --git a/arch/arm/mach-nomadik/timer.c b/arch/arm/plat-nomadik/timer.c index d1738e7061d..62f18ad43a2 100644 --- a/arch/arm/mach-nomadik/timer.c +++ b/arch/arm/plat-nomadik/timer.c | |||
| @@ -15,19 +15,14 @@ | |||
| 15 | #include <linux/clockchips.h> | 15 | #include <linux/clockchips.h> |
| 16 | #include <linux/jiffies.h> | 16 | #include <linux/jiffies.h> |
| 17 | #include <asm/mach/time.h> | 17 | #include <asm/mach/time.h> |
| 18 | #include <mach/mtu.h> | ||
| 19 | 18 | ||
| 20 | #define TIMER_CTRL 0x80 /* No divisor */ | 19 | #include <plat/mtu.h> |
| 21 | #define TIMER_PERIODIC 0x40 | ||
| 22 | #define TIMER_SZ32BIT 0x02 | ||
| 23 | |||
| 24 | /* Initial value for SRC control register: all timers use MXTAL/8 source */ | ||
| 25 | #define SRC_CR_INIT_MASK 0x00007fff | ||
| 26 | #define SRC_CR_INIT_VAL 0x2aaa8000 | ||
| 27 | 20 | ||
| 28 | static u32 nmdk_count; /* accumulated count */ | 21 | static u32 nmdk_count; /* accumulated count */ |
| 29 | static u32 nmdk_cycle; /* write-once */ | 22 | static u32 nmdk_cycle; /* write-once */ |
| 30 | static __iomem void *mtu_base; | 23 | |
| 24 | /* setup by the platform code */ | ||
| 25 | void __iomem *mtu_base; | ||
| 31 | 26 | ||
| 32 | /* | 27 | /* |
| 33 | * clocksource: the MTU device is a decrementing counters, so we negate | 28 | * clocksource: the MTU device is a decrementing counters, so we negate |
| @@ -93,7 +88,7 @@ static struct clock_event_device nmdk_clkevt = { | |||
| 93 | static irqreturn_t nmdk_timer_interrupt(int irq, void *dev_id) | 88 | static irqreturn_t nmdk_timer_interrupt(int irq, void *dev_id) |
| 94 | { | 89 | { |
| 95 | /* ack: "interrupt clear register" */ | 90 | /* ack: "interrupt clear register" */ |
| 96 | writel( 1 << 0, mtu_base + MTU_ICR); | 91 | writel(1 << 0, mtu_base + MTU_ICR); |
| 97 | 92 | ||
| 98 | /* we can't count lost ticks, unfortunately */ | 93 | /* we can't count lost ticks, unfortunately */ |
| 99 | nmdk_count += nmdk_cycle; | 94 | nmdk_count += nmdk_cycle; |
| @@ -125,24 +120,14 @@ static void nmdk_timer_reset(void) | |||
| 125 | writel(cr | MTU_CRn_ENA, mtu_base + MTU_CR(0)); | 120 | writel(cr | MTU_CRn_ENA, mtu_base + MTU_CR(0)); |
| 126 | } | 121 | } |
| 127 | 122 | ||
| 128 | static void __init nmdk_timer_init(void) | 123 | void __init nmdk_timer_init(void) |
| 129 | { | 124 | { |
| 130 | u32 src_cr; | ||
| 131 | unsigned long rate; | 125 | unsigned long rate; |
| 132 | int bits; | 126 | int bits; |
| 133 | 127 | ||
| 134 | rate = CLOCK_TICK_RATE; /* 2.4MHz */ | 128 | rate = CLOCK_TICK_RATE; /* 2.4MHz */ |
| 135 | nmdk_cycle = (rate + HZ/2) / HZ; | 129 | nmdk_cycle = (rate + HZ/2) / HZ; |
| 136 | 130 | ||
| 137 | /* Configure timer sources in "system reset controller" ctrl reg */ | ||
| 138 | src_cr = readl(io_p2v(NOMADIK_SRC_BASE)); | ||
| 139 | src_cr &= SRC_CR_INIT_MASK; | ||
| 140 | src_cr |= SRC_CR_INIT_VAL; | ||
| 141 | writel(src_cr, io_p2v(NOMADIK_SRC_BASE)); | ||
| 142 | |||
| 143 | /* Save global pointer to mtu, used by functions above */ | ||
| 144 | mtu_base = io_p2v(NOMADIK_MTU0_BASE); | ||
| 145 | |||
| 146 | /* Init the timer and register clocksource */ | 131 | /* Init the timer and register clocksource */ |
| 147 | nmdk_timer_reset(); | 132 | nmdk_timer_reset(); |
| 148 | 133 | ||
| @@ -150,7 +135,9 @@ static void __init nmdk_timer_init(void) | |||
| 150 | bits = 8*sizeof(nmdk_count); | 135 | bits = 8*sizeof(nmdk_count); |
| 151 | nmdk_clksrc.mask = CLOCKSOURCE_MASK(bits); | 136 | nmdk_clksrc.mask = CLOCKSOURCE_MASK(bits); |
| 152 | 137 | ||
| 153 | clocksource_register(&nmdk_clksrc); | 138 | if (clocksource_register(&nmdk_clksrc)) |
| 139 | printk(KERN_ERR "timer: failed to initialize clock " | ||
| 140 | "source %s\n", nmdk_clksrc.name); | ||
| 154 | 141 | ||
| 155 | /* Register irq and clockevents */ | 142 | /* Register irq and clockevents */ |
| 156 | setup_irq(IRQ_MTU0, &nmdk_timer_irq); | 143 | setup_irq(IRQ_MTU0, &nmdk_timer_irq); |
| @@ -158,7 +145,3 @@ static void __init nmdk_timer_init(void) | |||
| 158 | nmdk_clkevt.cpumask = cpumask_of(0); | 145 | nmdk_clkevt.cpumask = cpumask_of(0); |
| 159 | clockevents_register_device(&nmdk_clkevt); | 146 | clockevents_register_device(&nmdk_clkevt); |
| 160 | } | 147 | } |
| 161 | |||
| 162 | struct sys_timer nomadik_timer = { | ||
| 163 | .init = nmdk_timer_init, | ||
| 164 | }; | ||
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index 64b3f52bd9b..f348ddfb049 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig | |||
| @@ -165,7 +165,7 @@ config OMAP_DM_TIMER | |||
| 165 | choice | 165 | choice |
| 166 | prompt "Low-level debug console UART" | 166 | prompt "Low-level debug console UART" |
| 167 | depends on ARCH_OMAP | 167 | depends on ARCH_OMAP |
| 168 | default OMAP_LL_DEBUG_UART1 | 168 | default OMAP_LL_DEBUG_NONE |
| 169 | 169 | ||
| 170 | config OMAP_LL_DEBUG_UART1 | 170 | config OMAP_LL_DEBUG_UART1 |
| 171 | bool "UART1" | 171 | bool "UART1" |
| @@ -176,6 +176,9 @@ config OMAP_LL_DEBUG_UART2 | |||
| 176 | config OMAP_LL_DEBUG_UART3 | 176 | config OMAP_LL_DEBUG_UART3 |
| 177 | bool "UART3" | 177 | bool "UART3" |
| 178 | 178 | ||
| 179 | config OMAP_LL_DEBUG_NONE | ||
| 180 | bool "None" | ||
| 181 | |||
| 179 | endchoice | 182 | endchoice |
| 180 | 183 | ||
| 181 | config OMAP_SERIAL_WAKE | 184 | config OMAP_SERIAL_WAKE |
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c index bf880e966d3..681bfc37ebb 100644 --- a/arch/arm/plat-omap/clock.c +++ b/arch/arm/plat-omap/clock.c | |||
| @@ -24,7 +24,7 @@ | |||
| 24 | #include <linux/debugfs.h> | 24 | #include <linux/debugfs.h> |
| 25 | #include <linux/io.h> | 25 | #include <linux/io.h> |
| 26 | 26 | ||
| 27 | #include <mach/clock.h> | 27 | #include <plat/clock.h> |
| 28 | 28 | ||
| 29 | static LIST_HEAD(clocks); | 29 | static LIST_HEAD(clocks); |
| 30 | static DEFINE_MUTEX(clocks_mutex); | 30 | static DEFINE_MUTEX(clocks_mutex); |
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c index 3a4768d5589..cc050b3313b 100644 --- a/arch/arm/plat-omap/common.c +++ b/arch/arm/plat-omap/common.c | |||
| @@ -29,13 +29,13 @@ | |||
| 29 | #include <asm/mach/map.h> | 29 | #include <asm/mach/map.h> |
| 30 | #include <asm/setup.h> | 30 | #include <asm/setup.h> |
| 31 | 31 | ||
| 32 | #include <mach/common.h> | 32 | #include <plat/common.h> |
| 33 | #include <mach/board.h> | 33 | #include <plat/board.h> |
| 34 | #include <mach/control.h> | 34 | #include <plat/control.h> |
| 35 | #include <mach/mux.h> | 35 | #include <plat/mux.h> |
| 36 | #include <mach/fpga.h> | 36 | #include <plat/fpga.h> |
| 37 | 37 | ||
| 38 | #include <mach/clock.h> | 38 | #include <plat/clock.h> |
| 39 | 39 | ||
| 40 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) | 40 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) |
| 41 | # include "../mach-omap2/sdrc.h" | 41 | # include "../mach-omap2/sdrc.h" |
| @@ -49,6 +49,9 @@ int omap_bootloader_tag_len; | |||
| 49 | struct omap_board_config_kernel *omap_board_config; | 49 | struct omap_board_config_kernel *omap_board_config; |
| 50 | int omap_board_config_size; | 50 | int omap_board_config_size; |
| 51 | 51 | ||
| 52 | /* used by omap-smp.c and board-4430sdp.c */ | ||
| 53 | void __iomem *gic_cpu_base_addr; | ||
| 54 | |||
| 52 | static const void *get_config(u16 tag, size_t len, int skip, size_t *len_out) | 55 | static const void *get_config(u16 tag, size_t len, int skip, size_t *len_out) |
| 53 | { | 56 | { |
| 54 | struct omap_board_config_kernel *kinfo = NULL; | 57 | struct omap_board_config_kernel *kinfo = NULL; |
| @@ -224,12 +227,12 @@ static void __init __omap2_set_globals(struct omap_globals *omap2_globals) | |||
| 224 | 227 | ||
| 225 | static struct omap_globals omap242x_globals = { | 228 | static struct omap_globals omap242x_globals = { |
| 226 | .class = OMAP242X_CLASS, | 229 | .class = OMAP242X_CLASS, |
| 227 | .tap = OMAP2_IO_ADDRESS(0x48014000), | 230 | .tap = OMAP2_L4_IO_ADDRESS(0x48014000), |
| 228 | .sdrc = OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE), | 231 | .sdrc = OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE), |
| 229 | .sms = OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE), | 232 | .sms = OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE), |
| 230 | .ctrl = OMAP2_IO_ADDRESS(OMAP2420_CTRL_BASE), | 233 | .ctrl = OMAP2_L4_IO_ADDRESS(OMAP2420_CTRL_BASE), |
| 231 | .prm = OMAP2_IO_ADDRESS(OMAP2420_PRM_BASE), | 234 | .prm = OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE), |
| 232 | .cm = OMAP2_IO_ADDRESS(OMAP2420_CM_BASE), | 235 | .cm = OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE), |
| 233 | }; | 236 | }; |
| 234 | 237 | ||
| 235 | void __init omap2_set_globals_242x(void) | 238 | void __init omap2_set_globals_242x(void) |
| @@ -242,12 +245,12 @@ void __init omap2_set_globals_242x(void) | |||
| 242 | 245 | ||
| 243 | static struct omap_globals omap243x_globals = { | 246 | static struct omap_globals omap243x_globals = { |
| 244 | .class = OMAP243X_CLASS, | 247 | .class = OMAP243X_CLASS, |
| 245 | .tap = OMAP2_IO_ADDRESS(0x4900a000), | 248 | .tap = OMAP2_L4_IO_ADDRESS(0x4900a000), |
| 246 | .sdrc = OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE), | 249 | .sdrc = OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE), |
| 247 | .sms = OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE), | 250 | .sms = OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE), |
| 248 | .ctrl = OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE), | 251 | .ctrl = OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE), |
| 249 | .prm = OMAP2_IO_ADDRESS(OMAP2430_PRM_BASE), | 252 | .prm = OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE), |
| 250 | .cm = OMAP2_IO_ADDRESS(OMAP2430_CM_BASE), | 253 | .cm = OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE), |
| 251 | }; | 254 | }; |
| 252 | 255 | ||
| 253 | void __init omap2_set_globals_243x(void) | 256 | void __init omap2_set_globals_243x(void) |
| @@ -260,12 +263,12 @@ void __init omap2_set_globals_243x(void) | |||
| 260 | 263 | ||
| 261 | static struct omap_globals omap343x_globals = { | 264 | static struct omap_globals omap343x_globals = { |
| 262 | .class = OMAP343X_CLASS, | 265 | .class = OMAP343X_CLASS, |
| 263 | .tap = OMAP2_IO_ADDRESS(0x4830A000), | 266 | .tap = OMAP2_L4_IO_ADDRESS(0x4830A000), |
| 264 | .sdrc = OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE), | 267 | .sdrc = OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE), |
| 265 | .sms = OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE), | 268 | .sms = OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE), |
| 266 | .ctrl = OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE), | 269 | .ctrl = OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE), |
| 267 | .prm = OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE), | 270 | .prm = OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE), |
| 268 | .cm = OMAP2_IO_ADDRESS(OMAP3430_CM_BASE), | 271 | .cm = OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), |
| 269 | }; | 272 | }; |
| 270 | 273 | ||
| 271 | void __init omap2_set_globals_343x(void) | 274 | void __init omap2_set_globals_343x(void) |
| @@ -277,10 +280,10 @@ void __init omap2_set_globals_343x(void) | |||
| 277 | #if defined(CONFIG_ARCH_OMAP4) | 280 | #if defined(CONFIG_ARCH_OMAP4) |
| 278 | static struct omap_globals omap4_globals = { | 281 | static struct omap_globals omap4_globals = { |
| 279 | .class = OMAP443X_CLASS, | 282 | .class = OMAP443X_CLASS, |
| 280 | .tap = OMAP2_IO_ADDRESS(0x4830a000), | 283 | .tap = OMAP2_L4_IO_ADDRESS(0x4830a000), |
| 281 | .ctrl = OMAP2_IO_ADDRESS(OMAP443X_CTRL_BASE), | 284 | .ctrl = OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE), |
| 282 | .prm = OMAP2_IO_ADDRESS(OMAP4430_PRM_BASE), | 285 | .prm = OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE), |
| 283 | .cm = OMAP2_IO_ADDRESS(OMAP4430_CM_BASE), | 286 | .cm = OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE), |
| 284 | }; | 287 | }; |
| 285 | 288 | ||
| 286 | void __init omap2_set_globals_443x(void) | 289 | void __init omap2_set_globals_443x(void) |
diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c index 341235c278a..f8ddbdd8b07 100644 --- a/arch/arm/plat-omap/cpu-omap.c +++ b/arch/arm/plat-omap/cpu-omap.c | |||
| @@ -23,7 +23,7 @@ | |||
| 23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
| 24 | 24 | ||
| 25 | #include <mach/hardware.h> | 25 | #include <mach/hardware.h> |
| 26 | #include <mach/clock.h> | 26 | #include <plat/clock.h> |
| 27 | #include <asm/system.h> | 27 | #include <asm/system.h> |
| 28 | 28 | ||
| 29 | #define VERY_HI_RATE 900000000 | 29 | #define VERY_HI_RATE 900000000 |
diff --git a/arch/arm/plat-omap/debug-devices.c b/arch/arm/plat-omap/debug-devices.c index f6684832ca8..09c1107637f 100644 --- a/arch/arm/plat-omap/debug-devices.c +++ b/arch/arm/plat-omap/debug-devices.c | |||
| @@ -16,7 +16,7 @@ | |||
| 16 | 16 | ||
| 17 | #include <mach/hardware.h> | 17 | #include <mach/hardware.h> |
| 18 | 18 | ||
| 19 | #include <mach/board.h> | 19 | #include <plat/board.h> |
| 20 | #include <mach/gpio.h> | 20 | #include <mach/gpio.h> |
| 21 | 21 | ||
| 22 | 22 | ||
diff --git a/arch/arm/plat-omap/debug-leds.c b/arch/arm/plat-omap/debug-leds.c index 9395898dd49..6c768b71ad6 100644 --- a/arch/arm/plat-omap/debug-leds.c +++ b/arch/arm/plat-omap/debug-leds.c | |||
| @@ -18,7 +18,7 @@ | |||
| 18 | #include <asm/system.h> | 18 | #include <asm/system.h> |
| 19 | #include <asm/mach-types.h> | 19 | #include <asm/mach-types.h> |
| 20 | 20 | ||
| 21 | #include <mach/fpga.h> | 21 | #include <plat/fpga.h> |
| 22 | #include <mach/gpio.h> | 22 | #include <mach/gpio.h> |
| 23 | 23 | ||
| 24 | 24 | ||
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c index a64b692a1bf..f86617869b3 100644 --- a/arch/arm/plat-omap/devices.c +++ b/arch/arm/plat-omap/devices.c | |||
| @@ -19,15 +19,15 @@ | |||
| 19 | #include <asm/mach-types.h> | 19 | #include <asm/mach-types.h> |
| 20 | #include <asm/mach/map.h> | 20 | #include <asm/mach/map.h> |
| 21 | 21 | ||
| 22 | #include <mach/tc.h> | 22 | #include <plat/tc.h> |
| 23 | #include <mach/control.h> | 23 | #include <plat/control.h> |
| 24 | #include <mach/board.h> | 24 | #include <plat/board.h> |
| 25 | #include <mach/mmc.h> | 25 | #include <plat/mmc.h> |
| 26 | #include <mach/mux.h> | 26 | #include <plat/mux.h> |
| 27 | #include <mach/gpio.h> | 27 | #include <mach/gpio.h> |
| 28 | #include <mach/menelaus.h> | 28 | #include <plat/menelaus.h> |
| 29 | #include <mach/mcbsp.h> | 29 | #include <plat/mcbsp.h> |
| 30 | #include <mach/dsp_common.h> | 30 | #include <plat/dsp_common.h> |
| 31 | 31 | ||
| 32 | #if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE) | 32 | #if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE) |
| 33 | 33 | ||
| @@ -113,17 +113,17 @@ static void omap_init_kp(void) | |||
| 113 | omap_cfg_reg(E19_1610_KBR4); | 113 | omap_cfg_reg(E19_1610_KBR4); |
| 114 | omap_cfg_reg(N19_1610_KBR5); | 114 | omap_cfg_reg(N19_1610_KBR5); |
| 115 | } else if (machine_is_omap_perseus2() || machine_is_omap_fsample()) { | 115 | } else if (machine_is_omap_perseus2() || machine_is_omap_fsample()) { |
| 116 | omap_cfg_reg(E2_730_KBR0); | 116 | omap_cfg_reg(E2_7XX_KBR0); |
| 117 | omap_cfg_reg(J7_730_KBR1); | 117 | omap_cfg_reg(J7_7XX_KBR1); |
| 118 | omap_cfg_reg(E1_730_KBR2); | 118 | omap_cfg_reg(E1_7XX_KBR2); |
| 119 | omap_cfg_reg(F3_730_KBR3); | 119 | omap_cfg_reg(F3_7XX_KBR3); |
| 120 | omap_cfg_reg(D2_730_KBR4); | 120 | omap_cfg_reg(D2_7XX_KBR4); |
| 121 | 121 | ||
| 122 | omap_cfg_reg(C2_730_KBC0); | 122 | omap_cfg_reg(C2_7XX_KBC0); |
| 123 | omap_cfg_reg(D3_730_KBC1); | 123 | omap_cfg_reg(D3_7XX_KBC1); |
| 124 | omap_cfg_reg(E4_730_KBC2); | 124 | omap_cfg_reg(E4_7XX_KBC2); |
| 125 | omap_cfg_reg(F4_730_KBC3); | 125 | omap_cfg_reg(F4_7XX_KBC3); |
| 126 | omap_cfg_reg(E3_730_KBC4); | 126 | omap_cfg_reg(E3_7XX_KBC4); |
| 127 | } else if (machine_is_omap_h4()) { | 127 | } else if (machine_is_omap_h4()) { |
| 128 | omap_cfg_reg(T19_24XX_KBR0); | 128 | omap_cfg_reg(T19_24XX_KBR0); |
| 129 | omap_cfg_reg(R19_24XX_KBR1); | 129 | omap_cfg_reg(R19_24XX_KBR1); |
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index 68eaae324b6..be4ce070fb4 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c | |||
| @@ -32,9 +32,9 @@ | |||
| 32 | 32 | ||
| 33 | #include <asm/system.h> | 33 | #include <asm/system.h> |
| 34 | #include <mach/hardware.h> | 34 | #include <mach/hardware.h> |
| 35 | #include <mach/dma.h> | 35 | #include <plat/dma.h> |
| 36 | 36 | ||
| 37 | #include <mach/tc.h> | 37 | #include <plat/tc.h> |
| 38 | 38 | ||
| 39 | #undef DEBUG | 39 | #undef DEBUG |
| 40 | 40 | ||
| @@ -54,6 +54,12 @@ enum { DMA_CHAIN_STARTED, DMA_CHAIN_NOTSTARTED }; | |||
| 54 | 54 | ||
| 55 | static int enable_1510_mode; | 55 | static int enable_1510_mode; |
| 56 | 56 | ||
| 57 | static struct omap_dma_global_context_registers { | ||
| 58 | u32 dma_irqenable_l0; | ||
| 59 | u32 dma_ocp_sysconfig; | ||
| 60 | u32 dma_gcr; | ||
| 61 | } omap_dma_global_context; | ||
| 62 | |||
| 57 | struct omap_dma_lch { | 63 | struct omap_dma_lch { |
| 58 | int next_lch; | 64 | int next_lch; |
| 59 | int dev_id; | 65 | int dev_id; |
| @@ -2355,44 +2361,83 @@ void omap_stop_lcd_dma(void) | |||
| 2355 | } | 2361 | } |
| 2356 | EXPORT_SYMBOL(omap_stop_lcd_dma); | 2362 | EXPORT_SYMBOL(omap_stop_lcd_dma); |
| 2357 | 2363 | ||
| 2364 | void omap_dma_global_context_save(void) | ||
| 2365 | { | ||
| 2366 | omap_dma_global_context.dma_irqenable_l0 = | ||
| 2367 | dma_read(IRQENABLE_L0); | ||
| 2368 | omap_dma_global_context.dma_ocp_sysconfig = | ||
| 2369 | dma_read(OCP_SYSCONFIG); | ||
| 2370 | omap_dma_global_context.dma_gcr = dma_read(GCR); | ||
| 2371 | } | ||
| 2372 | |||
| 2373 | void omap_dma_global_context_restore(void) | ||
| 2374 | { | ||
| 2375 | int ch; | ||
| 2376 | |||
| 2377 | dma_write(omap_dma_global_context.dma_gcr, GCR); | ||
| 2378 | dma_write(omap_dma_global_context.dma_ocp_sysconfig, | ||
| 2379 | OCP_SYSCONFIG); | ||
| 2380 | dma_write(omap_dma_global_context.dma_irqenable_l0, | ||
| 2381 | IRQENABLE_L0); | ||
| 2382 | |||
| 2383 | /* | ||
| 2384 | * A bug in ROM code leaves IRQ status for channels 0 and 1 uncleared | ||
| 2385 | * after secure sram context save and restore. Hence we need to | ||
| 2386 | * manually clear those IRQs to avoid spurious interrupts. This | ||
| 2387 | * affects only secure devices. | ||
| 2388 | */ | ||
| 2389 | if (cpu_is_omap34xx() && (omap_type() != OMAP2_DEVICE_TYPE_GP)) | ||
| 2390 | dma_write(0x3 , IRQSTATUS_L0); | ||
| 2391 | |||
| 2392 | for (ch = 0; ch < dma_chan_count; ch++) | ||
| 2393 | if (dma_chan[ch].dev_id != -1) | ||
| 2394 | omap_clear_dma(ch); | ||
| 2395 | } | ||
| 2396 | |||
| 2358 | /*----------------------------------------------------------------------------*/ | 2397 | /*----------------------------------------------------------------------------*/ |
| 2359 | 2398 | ||
| 2360 | static int __init omap_init_dma(void) | 2399 | static int __init omap_init_dma(void) |
| 2361 | { | 2400 | { |
| 2401 | unsigned long base; | ||
| 2362 | int ch, r; | 2402 | int ch, r; |
| 2363 | 2403 | ||
| 2364 | if (cpu_class_is_omap1()) { | 2404 | if (cpu_class_is_omap1()) { |
| 2365 | omap_dma_base = OMAP1_IO_ADDRESS(OMAP1_DMA_BASE); | 2405 | base = OMAP1_DMA_BASE; |
| 2366 | dma_lch_count = OMAP1_LOGICAL_DMA_CH_COUNT; | 2406 | dma_lch_count = OMAP1_LOGICAL_DMA_CH_COUNT; |
| 2367 | } else if (cpu_is_omap24xx()) { | 2407 | } else if (cpu_is_omap24xx()) { |
| 2368 | omap_dma_base = OMAP2_IO_ADDRESS(OMAP24XX_DMA4_BASE); | 2408 | base = OMAP24XX_DMA4_BASE; |
| 2369 | dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; | 2409 | dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; |
| 2370 | } else if (cpu_is_omap34xx()) { | 2410 | } else if (cpu_is_omap34xx()) { |
| 2371 | omap_dma_base = OMAP2_IO_ADDRESS(OMAP34XX_DMA4_BASE); | 2411 | base = OMAP34XX_DMA4_BASE; |
| 2372 | dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; | 2412 | dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; |
| 2373 | } else if (cpu_is_omap44xx()) { | 2413 | } else if (cpu_is_omap44xx()) { |
| 2374 | omap_dma_base = OMAP2_IO_ADDRESS(OMAP44XX_DMA4_BASE); | 2414 | base = OMAP44XX_DMA4_BASE; |
| 2375 | dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; | 2415 | dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; |
| 2376 | } else { | 2416 | } else { |
| 2377 | pr_err("DMA init failed for unsupported omap\n"); | 2417 | pr_err("DMA init failed for unsupported omap\n"); |
| 2378 | return -ENODEV; | 2418 | return -ENODEV; |
| 2379 | } | 2419 | } |
| 2380 | 2420 | ||
| 2421 | omap_dma_base = ioremap(base, SZ_4K); | ||
| 2422 | BUG_ON(!omap_dma_base); | ||
| 2423 | |||
| 2381 | if (cpu_class_is_omap2() && omap_dma_reserve_channels | 2424 | if (cpu_class_is_omap2() && omap_dma_reserve_channels |
| 2382 | && (omap_dma_reserve_channels <= dma_lch_count)) | 2425 | && (omap_dma_reserve_channels <= dma_lch_count)) |
| 2383 | dma_lch_count = omap_dma_reserve_channels; | 2426 | dma_lch_count = omap_dma_reserve_channels; |
| 2384 | 2427 | ||
| 2385 | dma_chan = kzalloc(sizeof(struct omap_dma_lch) * dma_lch_count, | 2428 | dma_chan = kzalloc(sizeof(struct omap_dma_lch) * dma_lch_count, |
| 2386 | GFP_KERNEL); | 2429 | GFP_KERNEL); |
| 2387 | if (!dma_chan) | 2430 | if (!dma_chan) { |
| 2388 | return -ENOMEM; | 2431 | r = -ENOMEM; |
| 2432 | goto out_unmap; | ||
| 2433 | } | ||
| 2389 | 2434 | ||
| 2390 | if (cpu_class_is_omap2()) { | 2435 | if (cpu_class_is_omap2()) { |
| 2391 | dma_linked_lch = kzalloc(sizeof(struct dma_link_info) * | 2436 | dma_linked_lch = kzalloc(sizeof(struct dma_link_info) * |
| 2392 | dma_lch_count, GFP_KERNEL); | 2437 | dma_lch_count, GFP_KERNEL); |
| 2393 | if (!dma_linked_lch) { | 2438 | if (!dma_linked_lch) { |
| 2394 | kfree(dma_chan); | 2439 | r = -ENOMEM; |
| 2395 | return -ENOMEM; | 2440 | goto out_free; |
| 2396 | } | 2441 | } |
| 2397 | } | 2442 | } |
| 2398 | 2443 | ||
| @@ -2466,7 +2511,7 @@ static int __init omap_init_dma(void) | |||
| 2466 | for (i = 0; i < ch; i++) | 2511 | for (i = 0; i < ch; i++) |
| 2467 | free_irq(omap1_dma_irq[i], | 2512 | free_irq(omap1_dma_irq[i], |
| 2468 | (void *) (i + 1)); | 2513 | (void *) (i + 1)); |
| 2469 | return r; | 2514 | goto out_free; |
| 2470 | } | 2515 | } |
| 2471 | } | 2516 | } |
| 2472 | } | 2517 | } |
| @@ -2484,8 +2529,8 @@ static int __init omap_init_dma(void) | |||
| 2484 | setup_irq(irq, &omap24xx_dma_irq); | 2529 | setup_irq(irq, &omap24xx_dma_irq); |
| 2485 | } | 2530 | } |
| 2486 | 2531 | ||
| 2487 | /* Enable smartidle idlemodes and autoidle */ | ||
| 2488 | if (cpu_is_omap34xx()) { | 2532 | if (cpu_is_omap34xx()) { |
| 2533 | /* Enable smartidle idlemodes and autoidle */ | ||
| 2489 | u32 v = dma_read(OCP_SYSCONFIG); | 2534 | u32 v = dma_read(OCP_SYSCONFIG); |
| 2490 | v &= ~(DMA_SYSCONFIG_MIDLEMODE_MASK | | 2535 | v &= ~(DMA_SYSCONFIG_MIDLEMODE_MASK | |
| 2491 | DMA_SYSCONFIG_SIDLEMODE_MASK | | 2536 | DMA_SYSCONFIG_SIDLEMODE_MASK | |
| @@ -2494,6 +2539,13 @@ static int __init omap_init_dma(void) | |||
| 2494 | DMA_SYSCONFIG_SIDLEMODE(DMA_IDLEMODE_SMARTIDLE) | | 2539 | DMA_SYSCONFIG_SIDLEMODE(DMA_IDLEMODE_SMARTIDLE) | |
| 2495 | DMA_SYSCONFIG_AUTOIDLE); | 2540 | DMA_SYSCONFIG_AUTOIDLE); |
| 2496 | dma_write(v , OCP_SYSCONFIG); | 2541 | dma_write(v , OCP_SYSCONFIG); |
| 2542 | /* reserve dma channels 0 and 1 in high security devices */ | ||
| 2543 | if (omap_type() != OMAP2_DEVICE_TYPE_GP) { | ||
| 2544 | printk(KERN_INFO "Reserving DMA channels 0 and 1 for " | ||
| 2545 | "HS ROM code\n"); | ||
| 2546 | dma_chan[0].dev_id = 0; | ||
| 2547 | dma_chan[1].dev_id = 1; | ||
| 2548 | } | ||
| 2497 | } | 2549 | } |
| 2498 | 2550 | ||
| 2499 | 2551 | ||
| @@ -2508,11 +2560,19 @@ static int __init omap_init_dma(void) | |||
| 2508 | "(error %d)\n", r); | 2560 | "(error %d)\n", r); |
| 2509 | for (i = 0; i < dma_chan_count; i++) | 2561 | for (i = 0; i < dma_chan_count; i++) |
| 2510 | free_irq(omap1_dma_irq[i], (void *) (i + 1)); | 2562 | free_irq(omap1_dma_irq[i], (void *) (i + 1)); |
| 2511 | return r; | 2563 | goto out_free; |
| 2512 | } | 2564 | } |
| 2513 | } | 2565 | } |
| 2514 | 2566 | ||
| 2515 | return 0; | 2567 | return 0; |
| 2568 | |||
| 2569 | out_free: | ||
| 2570 | kfree(dma_chan); | ||
| 2571 | |||
| 2572 | out_unmap: | ||
| 2573 | iounmap(omap_dma_base); | ||
| 2574 | |||
| 2575 | return r; | ||
| 2516 | } | 2576 | } |
| 2517 | 2577 | ||
| 2518 | arch_initcall(omap_init_dma); | 2578 | arch_initcall(omap_init_dma); |
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index d325b54daeb..64f407ee0f4 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c | |||
| @@ -38,7 +38,7 @@ | |||
| 38 | #include <linux/io.h> | 38 | #include <linux/io.h> |
| 39 | #include <linux/module.h> | 39 | #include <linux/module.h> |
| 40 | #include <mach/hardware.h> | 40 | #include <mach/hardware.h> |
| 41 | #include <mach/dmtimer.h> | 41 | #include <plat/dmtimer.h> |
| 42 | #include <mach/irqs.h> | 42 | #include <mach/irqs.h> |
| 43 | 43 | ||
| 44 | /* register offsets */ | 44 | /* register offsets */ |
| @@ -742,16 +742,17 @@ EXPORT_SYMBOL_GPL(omap_dm_timers_active); | |||
| 742 | int __init omap_dm_timer_init(void) | 742 | int __init omap_dm_timer_init(void) |
| 743 | { | 743 | { |
| 744 | struct omap_dm_timer *timer; | 744 | struct omap_dm_timer *timer; |
| 745 | int i; | 745 | int i, map_size = SZ_8K; /* Module 4KB + L4 4KB except on omap1 */ |
| 746 | 746 | ||
| 747 | if (!(cpu_is_omap16xx() || cpu_class_is_omap2())) | 747 | if (!(cpu_is_omap16xx() || cpu_class_is_omap2())) |
| 748 | return -ENODEV; | 748 | return -ENODEV; |
| 749 | 749 | ||
| 750 | spin_lock_init(&dm_timer_lock); | 750 | spin_lock_init(&dm_timer_lock); |
| 751 | 751 | ||
| 752 | if (cpu_class_is_omap1()) | 752 | if (cpu_class_is_omap1()) { |
| 753 | dm_timers = omap1_dm_timers; | 753 | dm_timers = omap1_dm_timers; |
| 754 | else if (cpu_is_omap24xx()) { | 754 | map_size = SZ_2K; |
| 755 | } else if (cpu_is_omap24xx()) { | ||
| 755 | dm_timers = omap2_dm_timers; | 756 | dm_timers = omap2_dm_timers; |
| 756 | dm_source_names = omap2_dm_source_names; | 757 | dm_source_names = omap2_dm_source_names; |
| 757 | dm_source_clocks = omap2_dm_source_clocks; | 758 | dm_source_clocks = omap2_dm_source_clocks; |
| @@ -774,10 +775,11 @@ int __init omap_dm_timer_init(void) | |||
| 774 | 775 | ||
| 775 | for (i = 0; i < dm_timer_count; i++) { | 776 | for (i = 0; i < dm_timer_count; i++) { |
| 776 | timer = &dm_timers[i]; | 777 | timer = &dm_timers[i]; |
| 777 | if (cpu_class_is_omap1()) | 778 | |
| 778 | timer->io_base = OMAP1_IO_ADDRESS(timer->phys_base); | 779 | /* Static mapping, never released */ |
| 779 | else | 780 | timer->io_base = ioremap(timer->phys_base, map_size); |
| 780 | timer->io_base = OMAP2_IO_ADDRESS(timer->phys_base); | 781 | BUG_ON(!timer->io_base); |
| 782 | |||
| 781 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ | 783 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ |
| 782 | defined(CONFIG_ARCH_OMAP4) | 784 | defined(CONFIG_ARCH_OMAP4) |
| 783 | if (cpu_class_is_omap2()) { | 785 | if (cpu_class_is_omap2()) { |
diff --git a/arch/arm/plat-omap/fb.c b/arch/arm/plat-omap/fb.c index 3746222bed1..78a4ce538db 100644 --- a/arch/arm/plat-omap/fb.c +++ b/arch/arm/plat-omap/fb.c | |||
| @@ -32,9 +32,9 @@ | |||
| 32 | #include <mach/hardware.h> | 32 | #include <mach/hardware.h> |
| 33 | #include <asm/mach/map.h> | 33 | #include <asm/mach/map.h> |
| 34 | 34 | ||
| 35 | #include <mach/board.h> | 35 | #include <plat/board.h> |
| 36 | #include <mach/sram.h> | 36 | #include <plat/sram.h> |
| 37 | #include <mach/omapfb.h> | 37 | #include <plat/omapfb.h> |
| 38 | 38 | ||
| 39 | #if defined(CONFIG_FB_OMAP) || defined(CONFIG_FB_OMAP_MODULE) | 39 | #if defined(CONFIG_FB_OMAP) || defined(CONFIG_FB_OMAP_MODULE) |
| 40 | 40 | ||
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index 7c345b757df..055160e0620 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c | |||
| @@ -31,7 +31,7 @@ | |||
| 31 | /* | 31 | /* |
| 32 | * OMAP1510 GPIO registers | 32 | * OMAP1510 GPIO registers |
| 33 | */ | 33 | */ |
| 34 | #define OMAP1510_GPIO_BASE OMAP1_IO_ADDRESS(0xfffce000) | 34 | #define OMAP1510_GPIO_BASE 0xfffce000 |
| 35 | #define OMAP1510_GPIO_DATA_INPUT 0x00 | 35 | #define OMAP1510_GPIO_DATA_INPUT 0x00 |
| 36 | #define OMAP1510_GPIO_DATA_OUTPUT 0x04 | 36 | #define OMAP1510_GPIO_DATA_OUTPUT 0x04 |
| 37 | #define OMAP1510_GPIO_DIR_CONTROL 0x08 | 37 | #define OMAP1510_GPIO_DIR_CONTROL 0x08 |
| @@ -45,10 +45,10 @@ | |||
| 45 | /* | 45 | /* |
| 46 | * OMAP1610 specific GPIO registers | 46 | * OMAP1610 specific GPIO registers |
| 47 | */ | 47 | */ |
| 48 | #define OMAP1610_GPIO1_BASE OMAP1_IO_ADDRESS(0xfffbe400) | 48 | #define OMAP1610_GPIO1_BASE 0xfffbe400 |
| 49 | #define OMAP1610_GPIO2_BASE OMAP1_IO_ADDRESS(0xfffbec00) | 49 | #define OMAP1610_GPIO2_BASE 0xfffbec00 |
| 50 | #define OMAP1610_GPIO3_BASE OMAP1_IO_ADDRESS(0xfffbb400) | 50 | #define OMAP1610_GPIO3_BASE 0xfffbb400 |
| 51 | #define OMAP1610_GPIO4_BASE OMAP1_IO_ADDRESS(0xfffbbc00) | 51 | #define OMAP1610_GPIO4_BASE 0xfffbbc00 |
| 52 | #define OMAP1610_GPIO_REVISION 0x0000 | 52 | #define OMAP1610_GPIO_REVISION 0x0000 |
| 53 | #define OMAP1610_GPIO_SYSCONFIG 0x0010 | 53 | #define OMAP1610_GPIO_SYSCONFIG 0x0010 |
| 54 | #define OMAP1610_GPIO_SYSSTATUS 0x0014 | 54 | #define OMAP1610_GPIO_SYSSTATUS 0x0014 |
| @@ -68,52 +68,36 @@ | |||
| 68 | #define OMAP1610_GPIO_SET_DATAOUT 0x00f0 | 68 | #define OMAP1610_GPIO_SET_DATAOUT 0x00f0 |
| 69 | 69 | ||
| 70 | /* | 70 | /* |
| 71 | * OMAP730 specific GPIO registers | 71 | * OMAP7XX specific GPIO registers |
| 72 | */ | 72 | */ |
| 73 | #define OMAP730_GPIO1_BASE OMAP1_IO_ADDRESS(0xfffbc000) | 73 | #define OMAP7XX_GPIO1_BASE 0xfffbc000 |
| 74 | #define OMAP730_GPIO2_BASE OMAP1_IO_ADDRESS(0xfffbc800) | 74 | #define OMAP7XX_GPIO2_BASE 0xfffbc800 |
| 75 | #define OMAP730_GPIO3_BASE OMAP1_IO_ADDRESS(0xfffbd000) | 75 | #define OMAP7XX_GPIO3_BASE 0xfffbd000 |
| 76 | #define OMAP730_GPIO4_BASE OMAP1_IO_ADDRESS(0xfffbd800) | 76 | #define OMAP7XX_GPIO4_BASE 0xfffbd800 |
| 77 | #define OMAP730_GPIO5_BASE OMAP1_IO_ADDRESS(0xfffbe000) | 77 | #define OMAP7XX_GPIO5_BASE 0xfffbe000 |
| 78 | #define OMAP730_GPIO6_BASE OMAP1_IO_ADDRESS(0xfffbe800) | 78 | #define OMAP7XX_GPIO6_BASE 0xfffbe800 |
| 79 | #define OMAP730_GPIO_DATA_INPUT 0x00 | 79 | #define OMAP7XX_GPIO_DATA_INPUT 0x00 |
| 80 | #define OMAP730_GPIO_DATA_OUTPUT 0x04 | 80 | #define OMAP7XX_GPIO_DATA_OUTPUT 0x04 |
| 81 | #define OMAP730_GPIO_DIR_CONTROL 0x08 | 81 | #define OMAP7XX_GPIO_DIR_CONTROL 0x08 |
| 82 | #define OMAP730_GPIO_INT_CONTROL 0x0c | 82 | #define OMAP7XX_GPIO_INT_CONTROL 0x0c |
| 83 | #define OMAP730_GPIO_INT_MASK 0x10 | 83 | #define OMAP7XX_GPIO_INT_MASK 0x10 |
| 84 | #define OMAP730_GPIO_INT_STATUS 0x14 | 84 | #define OMAP7XX_GPIO_INT_STATUS 0x14 |
| 85 | 85 | ||
| 86 | /* | 86 | #define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE |
| 87 | * OMAP850 specific GPIO registers | ||
| 88 | */ | ||
| 89 | #define OMAP850_GPIO1_BASE OMAP1_IO_ADDRESS(0xfffbc000) | ||
| 90 | #define OMAP850_GPIO2_BASE OMAP1_IO_ADDRESS(0xfffbc800) | ||
| 91 | #define OMAP850_GPIO3_BASE OMAP1_IO_ADDRESS(0xfffbd000) | ||
| 92 | #define OMAP850_GPIO4_BASE OMAP1_IO_ADDRESS(0xfffbd800) | ||
| 93 | #define OMAP850_GPIO5_BASE OMAP1_IO_ADDRESS(0xfffbe000) | ||
| 94 | #define OMAP850_GPIO6_BASE OMAP1_IO_ADDRESS(0xfffbe800) | ||
| 95 | #define OMAP850_GPIO_DATA_INPUT 0x00 | ||
| 96 | #define OMAP850_GPIO_DATA_OUTPUT 0x04 | ||
| 97 | #define OMAP850_GPIO_DIR_CONTROL 0x08 | ||
| 98 | #define OMAP850_GPIO_INT_CONTROL 0x0c | ||
| 99 | #define OMAP850_GPIO_INT_MASK 0x10 | ||
| 100 | #define OMAP850_GPIO_INT_STATUS 0x14 | ||
| 101 | |||
| 102 | #define OMAP1_MPUIO_VBASE OMAP1_IO_ADDRESS(OMAP1_MPUIO_BASE) | ||
| 103 | 87 | ||
| 104 | /* | 88 | /* |
| 105 | * omap24xx specific GPIO registers | 89 | * omap24xx specific GPIO registers |
| 106 | */ | 90 | */ |
| 107 | #define OMAP242X_GPIO1_BASE OMAP2_IO_ADDRESS(0x48018000) | 91 | #define OMAP242X_GPIO1_BASE 0x48018000 |
| 108 | #define OMAP242X_GPIO2_BASE OMAP2_IO_ADDRESS(0x4801a000) | 92 | #define OMAP242X_GPIO2_BASE 0x4801a000 |
| 109 | #define OMAP242X_GPIO3_BASE OMAP2_IO_ADDRESS(0x4801c000) | 93 | #define OMAP242X_GPIO3_BASE 0x4801c000 |
| 110 | #define OMAP242X_GPIO4_BASE OMAP2_IO_ADDRESS(0x4801e000) | 94 | #define OMAP242X_GPIO4_BASE 0x4801e000 |
| 111 | 95 | ||
| 112 | #define OMAP243X_GPIO1_BASE OMAP2_IO_ADDRESS(0x4900C000) | 96 | #define OMAP243X_GPIO1_BASE 0x4900C000 |
| 113 | #define OMAP243X_GPIO2_BASE OMAP2_IO_ADDRESS(0x4900E000) | 97 | #define OMAP243X_GPIO2_BASE 0x4900E000 |
| 114 | #define OMAP243X_GPIO3_BASE OMAP2_IO_ADDRESS(0x49010000) | 98 | #define OMAP243X_GPIO3_BASE 0x49010000 |
| 115 | #define OMAP243X_GPIO4_BASE OMAP2_IO_ADDRESS(0x49012000) | 99 | #define OMAP243X_GPIO4_BASE 0x49012000 |
| 116 | #define OMAP243X_GPIO5_BASE OMAP2_IO_ADDRESS(0x480B6000) | 100 | #define OMAP243X_GPIO5_BASE 0x480B6000 |
| 117 | 101 | ||
| 118 | #define OMAP24XX_GPIO_REVISION 0x0000 | 102 | #define OMAP24XX_GPIO_REVISION 0x0000 |
| 119 | #define OMAP24XX_GPIO_SYSCONFIG 0x0010 | 103 | #define OMAP24XX_GPIO_SYSCONFIG 0x0010 |
| @@ -170,24 +154,25 @@ | |||
| 170 | * omap34xx specific GPIO registers | 154 | * omap34xx specific GPIO registers |
| 171 | */ | 155 | */ |
| 172 | 156 | ||
| 173 | #define OMAP34XX_GPIO1_BASE OMAP2_IO_ADDRESS(0x48310000) | 157 | #define OMAP34XX_GPIO1_BASE 0x48310000 |
| 174 | #define OMAP34XX_GPIO2_BASE OMAP2_IO_ADDRESS(0x49050000) | 158 | #define OMAP34XX_GPIO2_BASE 0x49050000 |
| 175 | #define OMAP34XX_GPIO3_BASE OMAP2_IO_ADDRESS(0x49052000) | 159 | #define OMAP34XX_GPIO3_BASE 0x49052000 |
| 176 | #define OMAP34XX_GPIO4_BASE OMAP2_IO_ADDRESS(0x49054000) | 160 | #define OMAP34XX_GPIO4_BASE 0x49054000 |
| 177 | #define OMAP34XX_GPIO5_BASE OMAP2_IO_ADDRESS(0x49056000) | 161 | #define OMAP34XX_GPIO5_BASE 0x49056000 |
| 178 | #define OMAP34XX_GPIO6_BASE OMAP2_IO_ADDRESS(0x49058000) | 162 | #define OMAP34XX_GPIO6_BASE 0x49058000 |
| 179 | 163 | ||
| 180 | /* | 164 | /* |
| 181 | * OMAP44XX specific GPIO registers | 165 | * OMAP44XX specific GPIO registers |
| 182 | */ | 166 | */ |
| 183 | #define OMAP44XX_GPIO1_BASE OMAP2_IO_ADDRESS(0x4a310000) | 167 | #define OMAP44XX_GPIO1_BASE 0x4a310000 |
| 184 | #define OMAP44XX_GPIO2_BASE OMAP2_IO_ADDRESS(0x48055000) | 168 | #define OMAP44XX_GPIO2_BASE 0x48055000 |
| 185 | #define OMAP44XX_GPIO3_BASE OMAP2_IO_ADDRESS(0x48057000) | 169 | #define OMAP44XX_GPIO3_BASE 0x48057000 |
| 186 | #define OMAP44XX_GPIO4_BASE OMAP2_IO_ADDRESS(0x48059000) | 170 | #define OMAP44XX_GPIO4_BASE 0x48059000 |
| 187 | #define OMAP44XX_GPIO5_BASE OMAP2_IO_ADDRESS(0x4805B000) | 171 | #define OMAP44XX_GPIO5_BASE 0x4805B000 |
| 188 | #define OMAP44XX_GPIO6_BASE OMAP2_IO_ADDRESS(0x4805D000) | 172 | #define OMAP44XX_GPIO6_BASE 0x4805D000 |
| 189 | 173 | ||
| 190 | struct gpio_bank { | 174 | struct gpio_bank { |
| 175 | unsigned long pbase; | ||
| 191 | void __iomem *base; | 176 | void __iomem *base; |
| 192 | u16 irq; | 177 | u16 irq; |
| 193 | u16 virtual_irq_start; | 178 | u16 virtual_irq_start; |
| @@ -210,101 +195,134 @@ struct gpio_bank { | |||
| 210 | spinlock_t lock; | 195 | spinlock_t lock; |
| 211 | struct gpio_chip chip; | 196 | struct gpio_chip chip; |
| 212 | struct clk *dbck; | 197 | struct clk *dbck; |
| 198 | u32 mod_usage; | ||
| 213 | }; | 199 | }; |
| 214 | 200 | ||
| 215 | #define METHOD_MPUIO 0 | 201 | #define METHOD_MPUIO 0 |
| 216 | #define METHOD_GPIO_1510 1 | 202 | #define METHOD_GPIO_1510 1 |
| 217 | #define METHOD_GPIO_1610 2 | 203 | #define METHOD_GPIO_1610 2 |
| 218 | #define METHOD_GPIO_730 3 | 204 | #define METHOD_GPIO_7XX 3 |
| 219 | #define METHOD_GPIO_850 4 | ||
| 220 | #define METHOD_GPIO_24XX 5 | 205 | #define METHOD_GPIO_24XX 5 |
| 221 | 206 | ||
| 222 | #ifdef CONFIG_ARCH_OMAP16XX | 207 | #ifdef CONFIG_ARCH_OMAP16XX |
| 223 | static struct gpio_bank gpio_bank_1610[5] = { | 208 | static struct gpio_bank gpio_bank_1610[5] = { |
| 224 | { OMAP1_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO}, | 209 | { OMAP1_MPUIO_VBASE, NULL, INT_MPUIO, IH_MPUIO_BASE, |
| 225 | { OMAP1610_GPIO1_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1610 }, | 210 | METHOD_MPUIO }, |
| 226 | { OMAP1610_GPIO2_BASE, INT_1610_GPIO_BANK2, IH_GPIO_BASE + 16, METHOD_GPIO_1610 }, | 211 | { OMAP1610_GPIO1_BASE, NULL, INT_GPIO_BANK1, IH_GPIO_BASE, |
| 227 | { OMAP1610_GPIO3_BASE, INT_1610_GPIO_BANK3, IH_GPIO_BASE + 32, METHOD_GPIO_1610 }, | 212 | METHOD_GPIO_1610 }, |
| 228 | { OMAP1610_GPIO4_BASE, INT_1610_GPIO_BANK4, IH_GPIO_BASE + 48, METHOD_GPIO_1610 }, | 213 | { OMAP1610_GPIO2_BASE, NULL, INT_1610_GPIO_BANK2, IH_GPIO_BASE + 16, |
| 214 | METHOD_GPIO_1610 }, | ||
| 215 | { OMAP1610_GPIO3_BASE, NULL, INT_1610_GPIO_BANK3, IH_GPIO_BASE + 32, | ||
| 216 | METHOD_GPIO_1610 }, | ||
| 217 | { OMAP1610_GPIO4_BASE, NULL, INT_1610_GPIO_BANK4, IH_GPIO_BASE + 48, | ||
| 218 | METHOD_GPIO_1610 }, | ||
| 229 | }; | 219 | }; |
| 230 | #endif | 220 | #endif |
| 231 | 221 | ||
| 232 | #ifdef CONFIG_ARCH_OMAP15XX | 222 | #ifdef CONFIG_ARCH_OMAP15XX |
| 233 | static struct gpio_bank gpio_bank_1510[2] = { | 223 | static struct gpio_bank gpio_bank_1510[2] = { |
| 234 | { OMAP1_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, | 224 | { OMAP1_MPUIO_VBASE, NULL, INT_MPUIO, IH_MPUIO_BASE, |
| 235 | { OMAP1510_GPIO_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1510 } | 225 | METHOD_MPUIO }, |
| 236 | }; | 226 | { OMAP1510_GPIO_BASE, NULL, INT_GPIO_BANK1, IH_GPIO_BASE, |
| 237 | #endif | 227 | METHOD_GPIO_1510 } |
| 238 | |||
| 239 | #ifdef CONFIG_ARCH_OMAP730 | ||
| 240 | static struct gpio_bank gpio_bank_730[7] = { | ||
| 241 | { OMAP1_MPUIO_VBASE, INT_730_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, | ||
| 242 | { OMAP730_GPIO1_BASE, INT_730_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_730 }, | ||
| 243 | { OMAP730_GPIO2_BASE, INT_730_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_730 }, | ||
| 244 | { OMAP730_GPIO3_BASE, INT_730_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_730 }, | ||
| 245 | { OMAP730_GPIO4_BASE, INT_730_GPIO_BANK4, IH_GPIO_BASE + 96, METHOD_GPIO_730 }, | ||
| 246 | { OMAP730_GPIO5_BASE, INT_730_GPIO_BANK5, IH_GPIO_BASE + 128, METHOD_GPIO_730 }, | ||
| 247 | { OMAP730_GPIO6_BASE, INT_730_GPIO_BANK6, IH_GPIO_BASE + 160, METHOD_GPIO_730 }, | ||
| 248 | }; | 228 | }; |
| 249 | #endif | 229 | #endif |
| 250 | 230 | ||
| 251 | #ifdef CONFIG_ARCH_OMAP850 | 231 | #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) |
| 252 | static struct gpio_bank gpio_bank_850[7] = { | 232 | static struct gpio_bank gpio_bank_7xx[7] = { |
| 253 | { OMAP1_MPUIO_VBASE, INT_850_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, | 233 | { OMAP1_MPUIO_VBASE, NULL, INT_7XX_MPUIO, IH_MPUIO_BASE, |
| 254 | { OMAP850_GPIO1_BASE, INT_850_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_850 }, | 234 | METHOD_MPUIO }, |
| 255 | { OMAP850_GPIO2_BASE, INT_850_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_850 }, | 235 | { OMAP7XX_GPIO1_BASE, NULL, INT_7XX_GPIO_BANK1, IH_GPIO_BASE, |
| 256 | { OMAP850_GPIO3_BASE, INT_850_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_850 }, | 236 | METHOD_GPIO_7XX }, |
| 257 | { OMAP850_GPIO4_BASE, INT_850_GPIO_BANK4, IH_GPIO_BASE + 96, METHOD_GPIO_850 }, | 237 | { OMAP7XX_GPIO2_BASE, NULL, INT_7XX_GPIO_BANK2, IH_GPIO_BASE + 32, |
| 258 | { OMAP850_GPIO5_BASE, INT_850_GPIO_BANK5, IH_GPIO_BASE + 128, METHOD_GPIO_850 }, | 238 | METHOD_GPIO_7XX }, |
| 259 | { OMAP850_GPIO6_BASE, INT_850_GPIO_BANK6, IH_GPIO_BASE + 160, METHOD_GPIO_850 }, | 239 | { OMAP7XX_GPIO3_BASE, NULL, INT_7XX_GPIO_BANK3, IH_GPIO_BASE + 64, |
| 240 | METHOD_GPIO_7XX }, | ||
| 241 | { OMAP7XX_GPIO4_BASE, NULL, INT_7XX_GPIO_BANK4, IH_GPIO_BASE + 96, | ||
| 242 | METHOD_GPIO_7XX }, | ||
| 243 | { OMAP7XX_GPIO5_BASE, NULL, INT_7XX_GPIO_BANK5, IH_GPIO_BASE + 128, | ||
| 244 | METHOD_GPIO_7XX }, | ||
| 245 | { OMAP7XX_GPIO6_BASE, NULL, INT_7XX_GPIO_BANK6, IH_GPIO_BASE + 160, | ||
| 246 | METHOD_GPIO_7XX }, | ||
| 260 | }; | 247 | }; |
| 261 | #endif | 248 | #endif |
| 262 | 249 | ||
| 263 | |||
| 264 | #ifdef CONFIG_ARCH_OMAP24XX | 250 | #ifdef CONFIG_ARCH_OMAP24XX |
| 265 | 251 | ||
| 266 | static struct gpio_bank gpio_bank_242x[4] = { | 252 | static struct gpio_bank gpio_bank_242x[4] = { |
| 267 | { OMAP242X_GPIO1_BASE, INT_24XX_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_24XX }, | 253 | { OMAP242X_GPIO1_BASE, NULL, INT_24XX_GPIO_BANK1, IH_GPIO_BASE, |
| 268 | { OMAP242X_GPIO2_BASE, INT_24XX_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_24XX }, | 254 | METHOD_GPIO_24XX }, |
| 269 | { OMAP242X_GPIO3_BASE, INT_24XX_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_24XX }, | 255 | { OMAP242X_GPIO2_BASE, NULL, INT_24XX_GPIO_BANK2, IH_GPIO_BASE + 32, |
| 270 | { OMAP242X_GPIO4_BASE, INT_24XX_GPIO_BANK4, IH_GPIO_BASE + 96, METHOD_GPIO_24XX }, | 256 | METHOD_GPIO_24XX }, |
| 257 | { OMAP242X_GPIO3_BASE, NULL, INT_24XX_GPIO_BANK3, IH_GPIO_BASE + 64, | ||
| 258 | METHOD_GPIO_24XX }, | ||
| 259 | { OMAP242X_GPIO4_BASE, NULL, INT_24XX_GPIO_BANK4, IH_GPIO_BASE + 96, | ||
| 260 | METHOD_GPIO_24XX }, | ||
| 271 | }; | 261 | }; |
| 272 | 262 | ||
| 273 | static struct gpio_bank gpio_bank_243x[5] = { | 263 | static struct gpio_bank gpio_bank_243x[5] = { |
| 274 | { OMAP243X_GPIO1_BASE, INT_24XX_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_24XX }, | 264 | { OMAP243X_GPIO1_BASE, NULL, INT_24XX_GPIO_BANK1, IH_GPIO_BASE, |
| 275 | { OMAP243X_GPIO2_BASE, INT_24XX_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_24XX }, | 265 | METHOD_GPIO_24XX }, |
| 276 | { OMAP243X_GPIO3_BASE, INT_24XX_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_24XX }, | 266 | { OMAP243X_GPIO2_BASE, NULL, INT_24XX_GPIO_BANK2, IH_GPIO_BASE + 32, |
| 277 | { OMAP243X_GPIO4_BASE, INT_24XX_GPIO_BANK4, IH_GPIO_BASE + 96, METHOD_GPIO_24XX }, | 267 | METHOD_GPIO_24XX }, |
| 278 | { OMAP243X_GPIO5_BASE, INT_24XX_GPIO_BANK5, IH_GPIO_BASE + 128, METHOD_GPIO_24XX }, | 268 | { OMAP243X_GPIO3_BASE, NULL, INT_24XX_GPIO_BANK3, IH_GPIO_BASE + 64, |
| 269 | METHOD_GPIO_24XX }, | ||
| 270 | { OMAP243X_GPIO4_BASE, NULL, INT_24XX_GPIO_BANK4, IH_GPIO_BASE + 96, | ||
| 271 | METHOD_GPIO_24XX }, | ||
| 272 | { OMAP243X_GPIO5_BASE, NULL, INT_24XX_GPIO_BANK5, IH_GPIO_BASE + 128, | ||
| 273 | METHOD_GPIO_24XX }, | ||
| 279 | }; | 274 | }; |
| 280 | 275 | ||
| 281 | #endif | 276 | #endif |
| 282 | 277 | ||
| 283 | #ifdef CONFIG_ARCH_OMAP34XX | 278 | #ifdef CONFIG_ARCH_OMAP34XX |
| 284 | static struct gpio_bank gpio_bank_34xx[6] = { | 279 | static struct gpio_bank gpio_bank_34xx[6] = { |
| 285 | { OMAP34XX_GPIO1_BASE, INT_34XX_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_24XX }, | 280 | { OMAP34XX_GPIO1_BASE, NULL, INT_34XX_GPIO_BANK1, IH_GPIO_BASE, |
| 286 | { OMAP34XX_GPIO2_BASE, INT_34XX_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_24XX }, | 281 | METHOD_GPIO_24XX }, |
| 287 | { OMAP34XX_GPIO3_BASE, INT_34XX_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_24XX }, | 282 | { OMAP34XX_GPIO2_BASE, NULL, INT_34XX_GPIO_BANK2, IH_GPIO_BASE + 32, |
| 288 | { OMAP34XX_GPIO4_BASE, INT_34XX_GPIO_BANK4, IH_GPIO_BASE + 96, METHOD_GPIO_24XX }, | 283 | METHOD_GPIO_24XX }, |
| 289 | { OMAP34XX_GPIO5_BASE, INT_34XX_GPIO_BANK5, IH_GPIO_BASE + 128, METHOD_GPIO_24XX }, | 284 | { OMAP34XX_GPIO3_BASE, NULL, INT_34XX_GPIO_BANK3, IH_GPIO_BASE + 64, |
| 290 | { OMAP34XX_GPIO6_BASE, INT_34XX_GPIO_BANK6, IH_GPIO_BASE + 160, METHOD_GPIO_24XX }, | 285 | METHOD_GPIO_24XX }, |
| 286 | { OMAP34XX_GPIO4_BASE, NULL, INT_34XX_GPIO_BANK4, IH_GPIO_BASE + 96, | ||
| 287 | METHOD_GPIO_24XX }, | ||
| 288 | { OMAP34XX_GPIO5_BASE, NULL, INT_34XX_GPIO_BANK5, IH_GPIO_BASE + 128, | ||
| 289 | METHOD_GPIO_24XX }, | ||
| 290 | { OMAP34XX_GPIO6_BASE, NULL, INT_34XX_GPIO_BANK6, IH_GPIO_BASE + 160, | ||
| 291 | METHOD_GPIO_24XX }, | ||
| 291 | }; | 292 | }; |
| 292 | 293 | ||
| 294 | struct omap3_gpio_regs { | ||
| 295 | u32 sysconfig; | ||
| 296 | u32 irqenable1; | ||
| 297 | u32 irqenable2; | ||
| 298 | u32 wake_en; | ||
| 299 | u32 ctrl; | ||
| 300 | u32 oe; | ||
| 301 | u32 leveldetect0; | ||
| 302 | u32 leveldetect1; | ||
| 303 | u32 risingdetect; | ||
| 304 | u32 fallingdetect; | ||
| 305 | u32 dataout; | ||
| 306 | u32 setwkuena; | ||
| 307 | u32 setdataout; | ||
| 308 | }; | ||
| 309 | |||
| 310 | static struct omap3_gpio_regs gpio_context[OMAP34XX_NR_GPIOS]; | ||
| 293 | #endif | 311 | #endif |
| 294 | 312 | ||
| 295 | #ifdef CONFIG_ARCH_OMAP4 | 313 | #ifdef CONFIG_ARCH_OMAP4 |
| 296 | static struct gpio_bank gpio_bank_44xx[6] = { | 314 | static struct gpio_bank gpio_bank_44xx[6] = { |
| 297 | { OMAP44XX_GPIO1_BASE, INT_44XX_GPIO_BANK1, IH_GPIO_BASE, \ | 315 | { OMAP44XX_GPIO1_BASE, NULL, INT_44XX_GPIO_BANK1, IH_GPIO_BASE, |
| 298 | METHOD_GPIO_24XX }, | 316 | METHOD_GPIO_24XX }, |
| 299 | { OMAP44XX_GPIO2_BASE, INT_44XX_GPIO_BANK2, IH_GPIO_BASE + 32, \ | 317 | { OMAP44XX_GPIO2_BASE, NULL, INT_44XX_GPIO_BANK2, IH_GPIO_BASE + 32, |
| 300 | METHOD_GPIO_24XX }, | 318 | METHOD_GPIO_24XX }, |
| 301 | { OMAP44XX_GPIO3_BASE, INT_44XX_GPIO_BANK3, IH_GPIO_BASE + 64, \ | 319 | { OMAP44XX_GPIO3_BASE, NULL, INT_44XX_GPIO_BANK3, IH_GPIO_BASE + 64, |
| 302 | METHOD_GPIO_24XX }, | 320 | METHOD_GPIO_24XX }, |
| 303 | { OMAP44XX_GPIO4_BASE, INT_44XX_GPIO_BANK4, IH_GPIO_BASE + 96, \ | 321 | { OMAP44XX_GPIO4_BASE, NULL, INT_44XX_GPIO_BANK4, IH_GPIO_BASE + 96, |
| 304 | METHOD_GPIO_24XX }, | 322 | METHOD_GPIO_24XX }, |
| 305 | { OMAP44XX_GPIO5_BASE, INT_44XX_GPIO_BANK5, IH_GPIO_BASE + 128, \ | 323 | { OMAP44XX_GPIO5_BASE, NULL, INT_44XX_GPIO_BANK5, IH_GPIO_BASE + 128, |
| 306 | METHOD_GPIO_24XX }, | 324 | METHOD_GPIO_24XX }, |
| 307 | { OMAP44XX_GPIO6_BASE, INT_44XX_GPIO_BANK6, IH_GPIO_BASE + 160, \ | 325 | { OMAP44XX_GPIO6_BASE, NULL, INT_44XX_GPIO_BANK6, IH_GPIO_BASE + 160, |
| 308 | METHOD_GPIO_24XX }, | 326 | METHOD_GPIO_24XX }, |
| 309 | }; | 327 | }; |
| 310 | 328 | ||
| @@ -402,14 +420,9 @@ static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input) | |||
| 402 | reg += OMAP1610_GPIO_DIRECTION; | 420 | reg += OMAP1610_GPIO_DIRECTION; |
| 403 | break; | 421 | break; |
| 404 | #endif | 422 | #endif |
| 405 | #ifdef CONFIG_ARCH_OMAP730 | 423 | #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) |
| 406 | case METHOD_GPIO_730: | 424 | case METHOD_GPIO_7XX: |
| 407 | reg += OMAP730_GPIO_DIR_CONTROL; | 425 | reg += OMAP7XX_GPIO_DIR_CONTROL; |
| 408 | break; | ||
| 409 | #endif | ||
| 410 | #ifdef CONFIG_ARCH_OMAP850 | ||
| 411 | case METHOD_GPIO_850: | ||
| 412 | reg += OMAP850_GPIO_DIR_CONTROL; | ||
| 413 | break; | 426 | break; |
| 414 | #endif | 427 | #endif |
| 415 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 428 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
| @@ -469,19 +482,9 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable) | |||
| 469 | l = 1 << gpio; | 482 | l = 1 << gpio; |
| 470 | break; | 483 | break; |
| 471 | #endif | 484 | #endif |
| 472 | #ifdef CONFIG_ARCH_OMAP730 | 485 | #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) |
| 473 | case METHOD_GPIO_730: | 486 | case METHOD_GPIO_7XX: |
| 474 | reg += OMAP730_GPIO_DATA_OUTPUT; | 487 | reg += OMAP7XX_GPIO_DATA_OUTPUT; |
| 475 | l = __raw_readl(reg); | ||
| 476 | if (enable) | ||
| 477 | l |= 1 << gpio; | ||
| 478 | else | ||
| 479 | l &= ~(1 << gpio); | ||
| 480 | break; | ||
| 481 | #endif | ||
| 482 | #ifdef CONFIG_ARCH_OMAP850 | ||
| 483 | case METHOD_GPIO_850: | ||
| 484 | reg += OMAP850_GPIO_DATA_OUTPUT; | ||
| 485 | l = __raw_readl(reg); | 488 | l = __raw_readl(reg); |
| 486 | if (enable) | 489 | if (enable) |
| 487 | l |= 1 << gpio; | 490 | l |= 1 << gpio; |
| @@ -537,14 +540,9 @@ static int _get_gpio_datain(struct gpio_bank *bank, int gpio) | |||
| 537 | reg += OMAP1610_GPIO_DATAIN; | 540 | reg += OMAP1610_GPIO_DATAIN; |
| 538 | break; | 541 | break; |
| 539 | #endif | 542 | #endif |
| 540 | #ifdef CONFIG_ARCH_OMAP730 | 543 | #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) |
| 541 | case METHOD_GPIO_730: | 544 | case METHOD_GPIO_7XX: |
| 542 | reg += OMAP730_GPIO_DATA_INPUT; | 545 | reg += OMAP7XX_GPIO_DATA_INPUT; |
| 543 | break; | ||
| 544 | #endif | ||
| 545 | #ifdef CONFIG_ARCH_OMAP850 | ||
| 546 | case METHOD_GPIO_850: | ||
| 547 | reg += OMAP850_GPIO_DATA_INPUT; | ||
| 548 | break; | 546 | break; |
| 549 | #endif | 547 | #endif |
| 550 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 548 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
| @@ -588,14 +586,9 @@ static int _get_gpio_dataout(struct gpio_bank *bank, int gpio) | |||
| 588 | reg += OMAP1610_GPIO_DATAOUT; | 586 | reg += OMAP1610_GPIO_DATAOUT; |
| 589 | break; | 587 | break; |
| 590 | #endif | 588 | #endif |
| 591 | #ifdef CONFIG_ARCH_OMAP730 | 589 | #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) |
| 592 | case METHOD_GPIO_730: | 590 | case METHOD_GPIO_7XX: |
| 593 | reg += OMAP730_GPIO_DATA_OUTPUT; | 591 | reg += OMAP7XX_GPIO_DATA_OUTPUT; |
| 594 | break; | ||
| 595 | #endif | ||
| 596 | #ifdef CONFIG_ARCH_OMAP850 | ||
| 597 | case METHOD_GPIO_850: | ||
| 598 | reg += OMAP850_GPIO_DATA_OUTPUT; | ||
| 599 | break; | 592 | break; |
| 600 | #endif | 593 | #endif |
| 601 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ | 594 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ |
| @@ -636,6 +629,10 @@ void omap_set_gpio_debounce(int gpio, int enable) | |||
| 636 | #else | 629 | #else |
| 637 | reg += OMAP24XX_GPIO_DEBOUNCE_EN; | 630 | reg += OMAP24XX_GPIO_DEBOUNCE_EN; |
| 638 | #endif | 631 | #endif |
| 632 | if (!(bank->mod_usage & l)) { | ||
| 633 | printk(KERN_ERR "GPIO %d not requested\n", gpio); | ||
| 634 | return; | ||
| 635 | } | ||
| 639 | 636 | ||
| 640 | spin_lock_irqsave(&bank->lock, flags); | 637 | spin_lock_irqsave(&bank->lock, flags); |
| 641 | val = __raw_readl(reg); | 638 | val = __raw_readl(reg); |
| @@ -671,6 +668,11 @@ void omap_set_gpio_debounce_time(int gpio, int enc_time) | |||
| 671 | bank = get_gpio_bank(gpio); | 668 | bank = get_gpio_bank(gpio); |
| 672 | reg = bank->base; | 669 | reg = bank->base; |
| 673 | 670 | ||
| 671 | if (!bank->mod_usage) { | ||
| 672 | printk(KERN_ERR "GPIO not requested\n"); | ||
| 673 | return; | ||
| 674 | } | ||
| 675 | |||
| 674 | enc_time &= 0xff; | 676 | enc_time &= 0xff; |
| 675 | #ifdef CONFIG_ARCH_OMAP4 | 677 | #ifdef CONFIG_ARCH_OMAP4 |
| 676 | reg += OMAP4_GPIO_DEBOUNCINGTIME; | 678 | reg += OMAP4_GPIO_DEBOUNCINGTIME; |
| @@ -797,21 +799,9 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | |||
| 797 | __raw_writel(1 << gpio, bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA); | 799 | __raw_writel(1 << gpio, bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA); |
| 798 | break; | 800 | break; |
| 799 | #endif | 801 | #endif |
| 800 | #ifdef CONFIG_ARCH_OMAP730 | 802 | #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) |
| 801 | case METHOD_GPIO_730: | 803 | case METHOD_GPIO_7XX: |
| 802 | reg += OMAP730_GPIO_INT_CONTROL; | 804 | reg += OMAP7XX_GPIO_INT_CONTROL; |
| 803 | l = __raw_readl(reg); | ||
| 804 | if (trigger & IRQ_TYPE_EDGE_RISING) | ||
| 805 | l |= 1 << gpio; | ||
| 806 | else if (trigger & IRQ_TYPE_EDGE_FALLING) | ||
| 807 | l &= ~(1 << gpio); | ||
| 808 | else | ||
| 809 | goto bad; | ||
| 810 | break; | ||
| 811 | #endif | ||
| 812 | #ifdef CONFIG_ARCH_OMAP850 | ||
| 813 | case METHOD_GPIO_850: | ||
| 814 | reg += OMAP850_GPIO_INT_CONTROL; | ||
| 815 | l = __raw_readl(reg); | 805 | l = __raw_readl(reg); |
| 816 | if (trigger & IRQ_TYPE_EDGE_RISING) | 806 | if (trigger & IRQ_TYPE_EDGE_RISING) |
| 817 | l |= 1 << gpio; | 807 | l |= 1 << gpio; |
| @@ -897,14 +887,9 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) | |||
| 897 | reg += OMAP1610_GPIO_IRQSTATUS1; | 887 | reg += OMAP1610_GPIO_IRQSTATUS1; |
| 898 | break; | 888 | break; |
| 899 | #endif | 889 | #endif |
| 900 | #ifdef CONFIG_ARCH_OMAP730 | 890 | #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) |
| 901 | case METHOD_GPIO_730: | 891 | case METHOD_GPIO_7XX: |
| 902 | reg += OMAP730_GPIO_INT_STATUS; | 892 | reg += OMAP7XX_GPIO_INT_STATUS; |
| 903 | break; | ||
| 904 | #endif | ||
| 905 | #ifdef CONFIG_ARCH_OMAP850 | ||
| 906 | case METHOD_GPIO_850: | ||
| 907 | reg += OMAP850_GPIO_INT_STATUS; | ||
| 908 | break; | 893 | break; |
| 909 | #endif | 894 | #endif |
| 910 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 895 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
| @@ -971,16 +956,9 @@ static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank) | |||
| 971 | mask = 0xffff; | 956 | mask = 0xffff; |
| 972 | break; | 957 | break; |
| 973 | #endif | 958 | #endif |
| 974 | #ifdef CONFIG_ARCH_OMAP730 | 959 | #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) |
| 975 | case METHOD_GPIO_730: | 960 | case METHOD_GPIO_7XX: |
| 976 | reg += OMAP730_GPIO_INT_MASK; | 961 | reg += OMAP7XX_GPIO_INT_MASK; |
| 977 | mask = 0xffffffff; | ||
| 978 | inv = 1; | ||
| 979 | break; | ||
| 980 | #endif | ||
| 981 | #ifdef CONFIG_ARCH_OMAP850 | ||
| 982 | case METHOD_GPIO_850: | ||
| 983 | reg += OMAP850_GPIO_INT_MASK; | ||
| 984 | mask = 0xffffffff; | 962 | mask = 0xffffffff; |
| 985 | inv = 1; | 963 | inv = 1; |
| 986 | break; | 964 | break; |
| @@ -1044,19 +1022,9 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab | |||
| 1044 | l = gpio_mask; | 1022 | l = gpio_mask; |
| 1045 | break; | 1023 | break; |
| 1046 | #endif | 1024 | #endif |
| 1047 | #ifdef CONFIG_ARCH_OMAP730 | 1025 | #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) |
| 1048 | case METHOD_GPIO_730: | 1026 | case METHOD_GPIO_7XX: |
| 1049 | reg += OMAP730_GPIO_INT_MASK; | 1027 | reg += OMAP7XX_GPIO_INT_MASK; |
| 1050 | l = __raw_readl(reg); | ||
| 1051 | if (enable) | ||
| 1052 | l &= ~(gpio_mask); | ||
| 1053 | else | ||
| 1054 | l |= gpio_mask; | ||
| 1055 | break; | ||
| 1056 | #endif | ||
| 1057 | #ifdef CONFIG_ARCH_OMAP850 | ||
| 1058 | case METHOD_GPIO_850: | ||
| 1059 | reg += OMAP850_GPIO_INT_MASK; | ||
| 1060 | l = __raw_readl(reg); | 1028 | l = __raw_readl(reg); |
| 1061 | if (enable) | 1029 | if (enable) |
| 1062 | l &= ~(gpio_mask); | 1030 | l &= ~(gpio_mask); |
| @@ -1186,6 +1154,16 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset) | |||
| 1186 | __raw_writel(__raw_readl(reg) | (1 << offset), reg); | 1154 | __raw_writel(__raw_readl(reg) | (1 << offset), reg); |
| 1187 | } | 1155 | } |
| 1188 | #endif | 1156 | #endif |
| 1157 | if (!cpu_class_is_omap1()) { | ||
| 1158 | if (!bank->mod_usage) { | ||
| 1159 | u32 ctrl; | ||
| 1160 | ctrl = __raw_readl(bank->base + OMAP24XX_GPIO_CTRL); | ||
| 1161 | ctrl &= 0xFFFFFFFE; | ||
| 1162 | /* Module is enabled, clocks are not gated */ | ||
| 1163 | __raw_writel(ctrl, bank->base + OMAP24XX_GPIO_CTRL); | ||
| 1164 | } | ||
| 1165 | bank->mod_usage |= 1 << offset; | ||
| 1166 | } | ||
| 1189 | spin_unlock_irqrestore(&bank->lock, flags); | 1167 | spin_unlock_irqrestore(&bank->lock, flags); |
| 1190 | 1168 | ||
| 1191 | return 0; | 1169 | return 0; |
| @@ -1212,6 +1190,16 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset) | |||
| 1212 | __raw_writel(1 << offset, reg); | 1190 | __raw_writel(1 << offset, reg); |
| 1213 | } | 1191 | } |
| 1214 | #endif | 1192 | #endif |
| 1193 | if (!cpu_class_is_omap1()) { | ||
| 1194 | bank->mod_usage &= ~(1 << offset); | ||
| 1195 | if (!bank->mod_usage) { | ||
| 1196 | u32 ctrl; | ||
| 1197 | ctrl = __raw_readl(bank->base + OMAP24XX_GPIO_CTRL); | ||
| 1198 | /* Module is disabled, clocks are gated */ | ||
| 1199 | ctrl |= 1; | ||
| 1200 | __raw_writel(ctrl, bank->base + OMAP24XX_GPIO_CTRL); | ||
| 1201 | } | ||
| 1202 | } | ||
| 1215 | _reset_gpio(bank, bank->chip.base + offset); | 1203 | _reset_gpio(bank, bank->chip.base + offset); |
| 1216 | spin_unlock_irqrestore(&bank->lock, flags); | 1204 | spin_unlock_irqrestore(&bank->lock, flags); |
| 1217 | } | 1205 | } |
| @@ -1249,13 +1237,9 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
| 1249 | if (bank->method == METHOD_GPIO_1610) | 1237 | if (bank->method == METHOD_GPIO_1610) |
| 1250 | isr_reg = bank->base + OMAP1610_GPIO_IRQSTATUS1; | 1238 | isr_reg = bank->base + OMAP1610_GPIO_IRQSTATUS1; |
| 1251 | #endif | 1239 | #endif |
| 1252 | #ifdef CONFIG_ARCH_OMAP730 | 1240 | #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) |
| 1253 | if (bank->method == METHOD_GPIO_730) | 1241 | if (bank->method == METHOD_GPIO_7XX) |
| 1254 | isr_reg = bank->base + OMAP730_GPIO_INT_STATUS; | 1242 | isr_reg = bank->base + OMAP7XX_GPIO_INT_STATUS; |
| 1255 | #endif | ||
| 1256 | #ifdef CONFIG_ARCH_OMAP850 | ||
| 1257 | if (bank->method == METHOD_GPIO_850) | ||
| 1258 | isr_reg = bank->base + OMAP850_GPIO_INT_STATUS; | ||
| 1259 | #endif | 1243 | #endif |
| 1260 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 1244 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
| 1261 | if (bank->method == METHOD_GPIO_24XX) | 1245 | if (bank->method == METHOD_GPIO_24XX) |
| @@ -1524,11 +1508,8 @@ static int gpio_is_input(struct gpio_bank *bank, int mask) | |||
| 1524 | case METHOD_GPIO_1610: | 1508 | case METHOD_GPIO_1610: |
| 1525 | reg += OMAP1610_GPIO_DIRECTION; | 1509 | reg += OMAP1610_GPIO_DIRECTION; |
| 1526 | break; | 1510 | break; |
| 1527 | case METHOD_GPIO_730: | 1511 | case METHOD_GPIO_7XX: |
| 1528 | reg += OMAP730_GPIO_DIR_CONTROL; | 1512 | reg += OMAP7XX_GPIO_DIR_CONTROL; |
| 1529 | break; | ||
| 1530 | case METHOD_GPIO_850: | ||
| 1531 | reg += OMAP850_GPIO_DIR_CONTROL; | ||
| 1532 | break; | 1513 | break; |
| 1533 | case METHOD_GPIO_24XX: | 1514 | case METHOD_GPIO_24XX: |
| 1534 | reg += OMAP24XX_GPIO_OE; | 1515 | reg += OMAP24XX_GPIO_OE; |
| @@ -1607,6 +1588,23 @@ static struct clk * gpio5_fck; | |||
| 1607 | static struct clk *gpio_iclks[OMAP34XX_NR_GPIOS]; | 1588 | static struct clk *gpio_iclks[OMAP34XX_NR_GPIOS]; |
| 1608 | #endif | 1589 | #endif |
| 1609 | 1590 | ||
| 1591 | static void __init omap_gpio_show_rev(void) | ||
| 1592 | { | ||
| 1593 | u32 rev; | ||
| 1594 | |||
| 1595 | if (cpu_is_omap16xx()) | ||
| 1596 | rev = __raw_readw(gpio_bank[1].base + OMAP1610_GPIO_REVISION); | ||
| 1597 | else if (cpu_is_omap24xx() || cpu_is_omap34xx()) | ||
| 1598 | rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); | ||
| 1599 | else if (cpu_is_omap44xx()) | ||
| 1600 | rev = __raw_readl(gpio_bank[0].base + OMAP4_GPIO_REVISION); | ||
| 1601 | else | ||
| 1602 | return; | ||
| 1603 | |||
| 1604 | printk(KERN_INFO "OMAP GPIO hardware version %d.%d\n", | ||
| 1605 | (rev >> 4) & 0x0f, rev & 0x0f); | ||
| 1606 | } | ||
| 1607 | |||
| 1610 | /* This lock class tells lockdep that GPIO irqs are in a different | 1608 | /* This lock class tells lockdep that GPIO irqs are in a different |
| 1611 | * category than their parents, so it won't report false recursion. | 1609 | * category than their parents, so it won't report false recursion. |
| 1612 | */ | 1610 | */ |
| @@ -1617,6 +1615,7 @@ static int __init _omap_gpio_init(void) | |||
| 1617 | int i; | 1615 | int i; |
| 1618 | int gpio = 0; | 1616 | int gpio = 0; |
| 1619 | struct gpio_bank *bank; | 1617 | struct gpio_bank *bank; |
| 1618 | int bank_size = SZ_8K; /* Module 4KB + L4 4KB except on omap1 */ | ||
| 1620 | char clk_name[11]; | 1619 | char clk_name[11]; |
| 1621 | 1620 | ||
| 1622 | initialized = 1; | 1621 | initialized = 1; |
| @@ -1679,77 +1678,45 @@ static int __init _omap_gpio_init(void) | |||
| 1679 | 1678 | ||
| 1680 | #ifdef CONFIG_ARCH_OMAP15XX | 1679 | #ifdef CONFIG_ARCH_OMAP15XX |
| 1681 | if (cpu_is_omap15xx()) { | 1680 | if (cpu_is_omap15xx()) { |
| 1682 | printk(KERN_INFO "OMAP1510 GPIO hardware\n"); | ||
| 1683 | gpio_bank_count = 2; | 1681 | gpio_bank_count = 2; |
| 1684 | gpio_bank = gpio_bank_1510; | 1682 | gpio_bank = gpio_bank_1510; |
| 1683 | bank_size = SZ_2K; | ||
| 1685 | } | 1684 | } |
| 1686 | #endif | 1685 | #endif |
| 1687 | #if defined(CONFIG_ARCH_OMAP16XX) | 1686 | #if defined(CONFIG_ARCH_OMAP16XX) |
| 1688 | if (cpu_is_omap16xx()) { | 1687 | if (cpu_is_omap16xx()) { |
| 1689 | u32 rev; | ||
| 1690 | |||
| 1691 | gpio_bank_count = 5; | 1688 | gpio_bank_count = 5; |
| 1692 | gpio_bank = gpio_bank_1610; | 1689 | gpio_bank = gpio_bank_1610; |
| 1693 | rev = __raw_readw(gpio_bank[1].base + OMAP1610_GPIO_REVISION); | 1690 | bank_size = SZ_2K; |
| 1694 | printk(KERN_INFO "OMAP GPIO hardware version %d.%d\n", | ||
| 1695 | (rev >> 4) & 0x0f, rev & 0x0f); | ||
| 1696 | } | 1691 | } |
| 1697 | #endif | 1692 | #endif |
| 1698 | #ifdef CONFIG_ARCH_OMAP730 | 1693 | #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) |
| 1699 | if (cpu_is_omap730()) { | 1694 | if (cpu_is_omap7xx()) { |
| 1700 | printk(KERN_INFO "OMAP730 GPIO hardware\n"); | ||
| 1701 | gpio_bank_count = 7; | ||
| 1702 | gpio_bank = gpio_bank_730; | ||
| 1703 | } | ||
| 1704 | #endif | ||
| 1705 | #ifdef CONFIG_ARCH_OMAP850 | ||
| 1706 | if (cpu_is_omap850()) { | ||
| 1707 | printk(KERN_INFO "OMAP850 GPIO hardware\n"); | ||
| 1708 | gpio_bank_count = 7; | 1695 | gpio_bank_count = 7; |
| 1709 | gpio_bank = gpio_bank_850; | 1696 | gpio_bank = gpio_bank_7xx; |
| 1697 | bank_size = SZ_2K; | ||
| 1710 | } | 1698 | } |
| 1711 | #endif | 1699 | #endif |
| 1712 | |||
| 1713 | #ifdef CONFIG_ARCH_OMAP24XX | 1700 | #ifdef CONFIG_ARCH_OMAP24XX |
| 1714 | if (cpu_is_omap242x()) { | 1701 | if (cpu_is_omap242x()) { |
| 1715 | int rev; | ||
| 1716 | |||
| 1717 | gpio_bank_count = 4; | 1702 | gpio_bank_count = 4; |
| 1718 | gpio_bank = gpio_bank_242x; | 1703 | gpio_bank = gpio_bank_242x; |
| 1719 | rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); | ||
| 1720 | printk(KERN_INFO "OMAP242x GPIO hardware version %d.%d\n", | ||
| 1721 | (rev >> 4) & 0x0f, rev & 0x0f); | ||
| 1722 | } | 1704 | } |
| 1723 | if (cpu_is_omap243x()) { | 1705 | if (cpu_is_omap243x()) { |
| 1724 | int rev; | ||
| 1725 | |||
| 1726 | gpio_bank_count = 5; | 1706 | gpio_bank_count = 5; |
| 1727 | gpio_bank = gpio_bank_243x; | 1707 | gpio_bank = gpio_bank_243x; |
| 1728 | rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); | ||
| 1729 | printk(KERN_INFO "OMAP243x GPIO hardware version %d.%d\n", | ||
| 1730 | (rev >> 4) & 0x0f, rev & 0x0f); | ||
| 1731 | } | 1708 | } |
| 1732 | #endif | 1709 | #endif |
| 1733 | #ifdef CONFIG_ARCH_OMAP34XX | 1710 | #ifdef CONFIG_ARCH_OMAP34XX |
| 1734 | if (cpu_is_omap34xx()) { | 1711 | if (cpu_is_omap34xx()) { |
| 1735 | int rev; | ||
| 1736 | |||
| 1737 | gpio_bank_count = OMAP34XX_NR_GPIOS; | 1712 | gpio_bank_count = OMAP34XX_NR_GPIOS; |
| 1738 | gpio_bank = gpio_bank_34xx; | 1713 | gpio_bank = gpio_bank_34xx; |
| 1739 | rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); | ||
| 1740 | printk(KERN_INFO "OMAP34xx GPIO hardware version %d.%d\n", | ||
| 1741 | (rev >> 4) & 0x0f, rev & 0x0f); | ||
| 1742 | } | 1714 | } |
| 1743 | #endif | 1715 | #endif |
| 1744 | #ifdef CONFIG_ARCH_OMAP4 | 1716 | #ifdef CONFIG_ARCH_OMAP4 |
| 1745 | if (cpu_is_omap44xx()) { | 1717 | if (cpu_is_omap44xx()) { |
| 1746 | int rev; | ||
| 1747 | |||
| 1748 | gpio_bank_count = OMAP34XX_NR_GPIOS; | 1718 | gpio_bank_count = OMAP34XX_NR_GPIOS; |
| 1749 | gpio_bank = gpio_bank_44xx; | 1719 | gpio_bank = gpio_bank_44xx; |
| 1750 | rev = __raw_readl(gpio_bank[0].base + OMAP4_GPIO_REVISION); | ||
| 1751 | printk(KERN_INFO "OMAP44xx GPIO hardware version %d.%d\n", | ||
| 1752 | (rev >> 4) & 0x0f, rev & 0x0f); | ||
| 1753 | } | 1720 | } |
| 1754 | #endif | 1721 | #endif |
| 1755 | for (i = 0; i < gpio_bank_count; i++) { | 1722 | for (i = 0; i < gpio_bank_count; i++) { |
| @@ -1757,6 +1724,14 @@ static int __init _omap_gpio_init(void) | |||
| 1757 | 1724 | ||
| 1758 | bank = &gpio_bank[i]; | 1725 | bank = &gpio_bank[i]; |
| 1759 | spin_lock_init(&bank->lock); | 1726 | spin_lock_init(&bank->lock); |
| 1727 | |||
| 1728 | /* Static mapping, never released */ | ||
| 1729 | bank->base = ioremap(bank->pbase, bank_size); | ||
| 1730 | if (!bank->base) { | ||
| 1731 | printk(KERN_ERR "Could not ioremap gpio bank%i\n", i); | ||
| 1732 | continue; | ||
| 1733 | } | ||
| 1734 | |||
| 1760 | if (bank_is_mpuio(bank)) | 1735 | if (bank_is_mpuio(bank)) |
| 1761 | __raw_writew(0xffff, bank->base + OMAP_MPUIO_GPIO_MASKIT); | 1736 | __raw_writew(0xffff, bank->base + OMAP_MPUIO_GPIO_MASKIT); |
| 1762 | if (cpu_is_omap15xx() && bank->method == METHOD_GPIO_1510) { | 1737 | if (cpu_is_omap15xx() && bank->method == METHOD_GPIO_1510) { |
| @@ -1768,11 +1743,11 @@ static int __init _omap_gpio_init(void) | |||
| 1768 | __raw_writew(0xffff, bank->base + OMAP1610_GPIO_IRQSTATUS1); | 1743 | __raw_writew(0xffff, bank->base + OMAP1610_GPIO_IRQSTATUS1); |
| 1769 | __raw_writew(0x0014, bank->base + OMAP1610_GPIO_SYSCONFIG); | 1744 | __raw_writew(0x0014, bank->base + OMAP1610_GPIO_SYSCONFIG); |
| 1770 | } | 1745 | } |
| 1771 | if (cpu_is_omap7xx() && bank->method == METHOD_GPIO_730) { | 1746 | if (cpu_is_omap7xx() && bank->method == METHOD_GPIO_7XX) { |
| 1772 | __raw_writel(0xffffffff, bank->base + OMAP730_GPIO_INT_MASK); | 1747 | __raw_writel(0xffffffff, bank->base + OMAP7XX_GPIO_INT_MASK); |
| 1773 | __raw_writel(0x00000000, bank->base + OMAP730_GPIO_INT_STATUS); | 1748 | __raw_writel(0x00000000, bank->base + OMAP7XX_GPIO_INT_STATUS); |
| 1774 | 1749 | ||
| 1775 | gpio_count = 32; /* 730 has 32-bit GPIOs */ | 1750 | gpio_count = 32; /* 7xx has 32-bit GPIOs */ |
| 1776 | } | 1751 | } |
| 1777 | 1752 | ||
| 1778 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ | 1753 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ |
| @@ -1804,6 +1779,8 @@ static int __init _omap_gpio_init(void) | |||
| 1804 | gpio_count = 32; | 1779 | gpio_count = 32; |
| 1805 | } | 1780 | } |
| 1806 | #endif | 1781 | #endif |
| 1782 | |||
| 1783 | bank->mod_usage = 0; | ||
| 1807 | /* REVISIT eventually switch from OMAP-specific gpio structs | 1784 | /* REVISIT eventually switch from OMAP-specific gpio structs |
| 1808 | * over to the generic ones | 1785 | * over to the generic ones |
| 1809 | */ | 1786 | */ |
| @@ -1862,6 +1839,8 @@ static int __init _omap_gpio_init(void) | |||
| 1862 | if (cpu_is_omap34xx()) | 1839 | if (cpu_is_omap34xx()) |
| 1863 | omap_writel(1 << 0, 0x48306814); | 1840 | omap_writel(1 << 0, 0x48306814); |
| 1864 | 1841 | ||
| 1842 | omap_gpio_show_rev(); | ||
| 1843 | |||
| 1865 | return 0; | 1844 | return 0; |
| 1866 | } | 1845 | } |
| 1867 | 1846 | ||
| @@ -2106,6 +2085,81 @@ void omap2_gpio_resume_after_retention(void) | |||
| 2106 | 2085 | ||
| 2107 | #endif | 2086 | #endif |
| 2108 | 2087 | ||
| 2088 | #ifdef CONFIG_ARCH_OMAP34XX | ||
| 2089 | /* save the registers of bank 2-6 */ | ||
| 2090 | void omap_gpio_save_context(void) | ||
| 2091 | { | ||
| 2092 | int i; | ||
| 2093 | |||
| 2094 | /* saving banks from 2-6 only since GPIO1 is in WKUP */ | ||
| 2095 | for (i = 1; i < gpio_bank_count; i++) { | ||
| 2096 | struct gpio_bank *bank = &gpio_bank[i]; | ||
| 2097 | gpio_context[i].sysconfig = | ||
| 2098 | __raw_readl(bank->base + OMAP24XX_GPIO_SYSCONFIG); | ||
| 2099 | gpio_context[i].irqenable1 = | ||
| 2100 | __raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE1); | ||
| 2101 | gpio_context[i].irqenable2 = | ||
| 2102 | __raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE2); | ||
| 2103 | gpio_context[i].wake_en = | ||
| 2104 | __raw_readl(bank->base + OMAP24XX_GPIO_WAKE_EN); | ||
| 2105 | gpio_context[i].ctrl = | ||
| 2106 | __raw_readl(bank->base + OMAP24XX_GPIO_CTRL); | ||
| 2107 | gpio_context[i].oe = | ||
| 2108 | __raw_readl(bank->base + OMAP24XX_GPIO_OE); | ||
| 2109 | gpio_context[i].leveldetect0 = | ||
| 2110 | __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0); | ||
| 2111 | gpio_context[i].leveldetect1 = | ||
| 2112 | __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1); | ||
| 2113 | gpio_context[i].risingdetect = | ||
| 2114 | __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT); | ||
| 2115 | gpio_context[i].fallingdetect = | ||
| 2116 | __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT); | ||
| 2117 | gpio_context[i].dataout = | ||
| 2118 | __raw_readl(bank->base + OMAP24XX_GPIO_DATAOUT); | ||
| 2119 | gpio_context[i].setwkuena = | ||
| 2120 | __raw_readl(bank->base + OMAP24XX_GPIO_SETWKUENA); | ||
| 2121 | gpio_context[i].setdataout = | ||
| 2122 | __raw_readl(bank->base + OMAP24XX_GPIO_SETDATAOUT); | ||
| 2123 | } | ||
| 2124 | } | ||
| 2125 | |||
| 2126 | /* restore the required registers of bank 2-6 */ | ||
| 2127 | void omap_gpio_restore_context(void) | ||
| 2128 | { | ||
| 2129 | int i; | ||
| 2130 | |||
| 2131 | for (i = 1; i < gpio_bank_count; i++) { | ||
| 2132 | struct gpio_bank *bank = &gpio_bank[i]; | ||
| 2133 | __raw_writel(gpio_context[i].sysconfig, | ||
| 2134 | bank->base + OMAP24XX_GPIO_SYSCONFIG); | ||
| 2135 | __raw_writel(gpio_context[i].irqenable1, | ||
| 2136 | bank->base + OMAP24XX_GPIO_IRQENABLE1); | ||
| 2137 | __raw_writel(gpio_context[i].irqenable2, | ||
| 2138 | bank->base + OMAP24XX_GPIO_IRQENABLE2); | ||
| 2139 | __raw_writel(gpio_context[i].wake_en, | ||
| 2140 | bank->base + OMAP24XX_GPIO_WAKE_EN); | ||
| 2141 | __raw_writel(gpio_context[i].ctrl, | ||
| 2142 | bank->base + OMAP24XX_GPIO_CTRL); | ||
| 2143 | __raw_writel(gpio_context[i].oe, | ||
| 2144 | bank->base + OMAP24XX_GPIO_OE); | ||
| 2145 | __raw_writel(gpio_context[i].leveldetect0, | ||
| 2146 | bank->base + OMAP24XX_GPIO_LEVELDETECT0); | ||
| 2147 | __raw_writel(gpio_context[i].leveldetect1, | ||
| 2148 | bank->base + OMAP24XX_GPIO_LEVELDETECT1); | ||
| 2149 | __raw_writel(gpio_context[i].risingdetect, | ||
| 2150 | bank->base + OMAP24XX_GPIO_RISINGDETECT); | ||
| 2151 | __raw_writel(gpio_context[i].fallingdetect, | ||
| 2152 | bank->base + OMAP24XX_GPIO_FALLINGDETECT); | ||
| 2153 | __raw_writel(gpio_context[i].dataout, | ||
| 2154 | bank->base + OMAP24XX_GPIO_DATAOUT); | ||
| 2155 | __raw_writel(gpio_context[i].setwkuena, | ||
| 2156 | bank->base + OMAP24XX_GPIO_SETWKUENA); | ||
| 2157 | __raw_writel(gpio_context[i].setdataout, | ||
| 2158 | bank->base + OMAP24XX_GPIO_SETDATAOUT); | ||
| 2159 | } | ||
| 2160 | } | ||
| 2161 | #endif | ||
| 2162 | |||
| 2109 | /* | 2163 | /* |
| 2110 | * This may get called early from board specific init | 2164 | * This may get called early from board specific init |
| 2111 | * for boards that have interrupts routed via FPGA. | 2165 | * for boards that have interrupts routed via FPGA. |
| @@ -2160,8 +2214,7 @@ static int dbg_gpio_show(struct seq_file *s, void *unused) | |||
| 2160 | 2214 | ||
| 2161 | if (bank_is_mpuio(bank)) | 2215 | if (bank_is_mpuio(bank)) |
| 2162 | gpio = OMAP_MPUIO(0); | 2216 | gpio = OMAP_MPUIO(0); |
| 2163 | else if (cpu_class_is_omap2() || cpu_is_omap730() || | 2217 | else if (cpu_class_is_omap2() || cpu_is_omap7xx()) |
| 2164 | cpu_is_omap850()) | ||
| 2165 | bankwidth = 32; | 2218 | bankwidth = 32; |
| 2166 | 2219 | ||
| 2167 | for (j = 0; j < bankwidth; j++, gpio++, mask <<= 1) { | 2220 | for (j = 0; j < bankwidth; j++, gpio++, mask <<= 1) { |
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c index 8b848391f0c..c08362dbb8e 100644 --- a/arch/arm/plat-omap/i2c.c +++ b/arch/arm/plat-omap/i2c.c | |||
| @@ -27,7 +27,7 @@ | |||
| 27 | #include <linux/platform_device.h> | 27 | #include <linux/platform_device.h> |
| 28 | #include <linux/i2c.h> | 28 | #include <linux/i2c.h> |
| 29 | #include <mach/irqs.h> | 29 | #include <mach/irqs.h> |
| 30 | #include <mach/mux.h> | 30 | #include <plat/mux.h> |
| 31 | 31 | ||
| 32 | #define OMAP_I2C_SIZE 0x3f | 32 | #define OMAP_I2C_SIZE 0x3f |
| 33 | #define OMAP1_I2C_BASE 0xfffb3800 | 33 | #define OMAP1_I2C_BASE 0xfffb3800 |
diff --git a/arch/arm/plat-omap/include/mach/blizzard.h b/arch/arm/plat-omap/include/plat/blizzard.h index 8d160f17137..8d160f17137 100644 --- a/arch/arm/plat-omap/include/mach/blizzard.h +++ b/arch/arm/plat-omap/include/plat/blizzard.h | |||
diff --git a/arch/arm/plat-omap/include/mach/board-ams-delta.h b/arch/arm/plat-omap/include/plat/board-ams-delta.h index 51b102dc906..51b102dc906 100644 --- a/arch/arm/plat-omap/include/mach/board-ams-delta.h +++ b/arch/arm/plat-omap/include/plat/board-ams-delta.h | |||
diff --git a/arch/arm/plat-omap/include/mach/board-sx1.h b/arch/arm/plat-omap/include/plat/board-sx1.h index 355adbdaae3..355adbdaae3 100644 --- a/arch/arm/plat-omap/include/mach/board-sx1.h +++ b/arch/arm/plat-omap/include/plat/board-sx1.h | |||
diff --git a/arch/arm/plat-omap/include/mach/board-voiceblue.h b/arch/arm/plat-omap/include/plat/board-voiceblue.h index 27916b210f5..27916b210f5 100644 --- a/arch/arm/plat-omap/include/mach/board-voiceblue.h +++ b/arch/arm/plat-omap/include/plat/board-voiceblue.h | |||
diff --git a/arch/arm/plat-omap/include/mach/board.h b/arch/arm/plat-omap/include/plat/board.h index 8e913c32281..abb17b604f8 100644 --- a/arch/arm/plat-omap/include/mach/board.h +++ b/arch/arm/plat-omap/include/plat/board.h | |||
| @@ -12,7 +12,19 @@ | |||
| 12 | 12 | ||
| 13 | #include <linux/types.h> | 13 | #include <linux/types.h> |
| 14 | 14 | ||
| 15 | #include <mach/gpio-switch.h> | 15 | #include <plat/gpio-switch.h> |
| 16 | |||
| 17 | /* | ||
| 18 | * OMAP35x EVM revision | ||
| 19 | * Run time detection of EVM revision is done by reading Ethernet | ||
| 20 | * PHY ID - | ||
| 21 | * GEN_1 = 0x01150000 | ||
| 22 | * GEN_2 = 0x92200000 | ||
| 23 | */ | ||
| 24 | enum { | ||
| 25 | OMAP3EVM_BOARD_GEN_1 = 0, /* EVM Rev between A - D */ | ||
| 26 | OMAP3EVM_BOARD_GEN_2, /* EVM Rev >= Rev E */ | ||
| 27 | }; | ||
| 16 | 28 | ||
| 17 | /* Different peripheral ids */ | 29 | /* Different peripheral ids */ |
| 18 | #define OMAP_TAG_CLOCK 0x4f01 | 30 | #define OMAP_TAG_CLOCK 0x4f01 |
| @@ -157,4 +169,10 @@ extern int omap_board_config_size; | |||
| 157 | /* for TI reference platforms sharing the same debug card */ | 169 | /* for TI reference platforms sharing the same debug card */ |
| 158 | extern int debug_card_init(u32 addr, unsigned gpio); | 170 | extern int debug_card_init(u32 addr, unsigned gpio); |
| 159 | 171 | ||
| 172 | /* OMAP3EVM revision */ | ||
| 173 | #if defined(CONFIG_MACH_OMAP3EVM) | ||
| 174 | u8 get_omap3_evm_rev(void); | ||
| 175 | #else | ||
| 176 | #define get_omap3_evm_rev() (-EINVAL) | ||
| 177 | #endif | ||
| 160 | #endif | 178 | #endif |
diff --git a/arch/arm/plat-omap/include/mach/clkdev.h b/arch/arm/plat-omap/include/plat/clkdev.h index 730c49d1ebd..730c49d1ebd 100644 --- a/arch/arm/plat-omap/include/mach/clkdev.h +++ b/arch/arm/plat-omap/include/plat/clkdev.h | |||
diff --git a/arch/arm/plat-omap/include/mach/clock.h b/arch/arm/plat-omap/include/plat/clock.h index 4b8b0d65cbf..4b8b0d65cbf 100644 --- a/arch/arm/plat-omap/include/mach/clock.h +++ b/arch/arm/plat-omap/include/plat/clock.h | |||
diff --git a/arch/arm/plat-omap/include/mach/clockdomain.h b/arch/arm/plat-omap/include/plat/clockdomain.h index 99ebd886f13..eb734826e64 100644 --- a/arch/arm/plat-omap/include/mach/clockdomain.h +++ b/arch/arm/plat-omap/include/plat/clockdomain.h | |||
| @@ -16,9 +16,9 @@ | |||
| 16 | #ifndef __ASM_ARM_ARCH_OMAP_CLOCKDOMAIN_H | 16 | #ifndef __ASM_ARM_ARCH_OMAP_CLOCKDOMAIN_H |
| 17 | #define __ASM_ARM_ARCH_OMAP_CLOCKDOMAIN_H | 17 | #define __ASM_ARM_ARCH_OMAP_CLOCKDOMAIN_H |
| 18 | 18 | ||
| 19 | #include <mach/powerdomain.h> | 19 | #include <plat/powerdomain.h> |
| 20 | #include <mach/clock.h> | 20 | #include <plat/clock.h> |
| 21 | #include <mach/cpu.h> | 21 | #include <plat/cpu.h> |
| 22 | 22 | ||
| 23 | /* Clockdomain capability flags */ | 23 | /* Clockdomain capability flags */ |
| 24 | #define CLKDM_CAN_FORCE_SLEEP (1 << 0) | 24 | #define CLKDM_CAN_FORCE_SLEEP (1 << 0) |
diff --git a/arch/arm/plat-omap/include/mach/common.h b/arch/arm/plat-omap/include/plat/common.h index fdeab421b4d..064f1730f43 100644 --- a/arch/arm/plat-omap/include/mach/common.h +++ b/arch/arm/plat-omap/include/plat/common.h | |||
| @@ -31,6 +31,9 @@ | |||
| 31 | 31 | ||
| 32 | struct sys_timer; | 32 | struct sys_timer; |
| 33 | 33 | ||
| 34 | /* used by omap-smp.c and board-4430sdp.c */ | ||
| 35 | extern void __iomem *gic_cpu_base_addr; | ||
| 36 | |||
| 34 | extern void omap_map_common_io(void); | 37 | extern void omap_map_common_io(void); |
| 35 | extern struct sys_timer omap_timer; | 38 | extern struct sys_timer omap_timer; |
| 36 | #if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE) | 39 | #if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE) |
diff --git a/arch/arm/plat-omap/include/mach/control.h b/arch/arm/plat-omap/include/plat/control.h index 826d317cdbe..2ae88437863 100644 --- a/arch/arm/plat-omap/include/mach/control.h +++ b/arch/arm/plat-omap/include/plat/control.h | |||
| @@ -20,15 +20,18 @@ | |||
| 20 | 20 | ||
| 21 | #ifndef __ASSEMBLY__ | 21 | #ifndef __ASSEMBLY__ |
| 22 | #define OMAP242X_CTRL_REGADDR(reg) \ | 22 | #define OMAP242X_CTRL_REGADDR(reg) \ |
| 23 | OMAP2_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) | 23 | OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) |
| 24 | #define OMAP243X_CTRL_REGADDR(reg) \ | 24 | #define OMAP243X_CTRL_REGADDR(reg) \ |
| 25 | OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) | 25 | OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) |
| 26 | #define OMAP343X_CTRL_REGADDR(reg) \ | 26 | #define OMAP343X_CTRL_REGADDR(reg) \ |
| 27 | OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) | 27 | OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) |
| 28 | #else | 28 | #else |
| 29 | #define OMAP242X_CTRL_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) | 29 | #define OMAP242X_CTRL_REGADDR(reg) \ |
| 30 | #define OMAP243X_CTRL_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) | 30 | OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) |
| 31 | #define OMAP343X_CTRL_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) | 31 | #define OMAP243X_CTRL_REGADDR(reg) \ |
| 32 | OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) | ||
| 33 | #define OMAP343X_CTRL_REGADDR(reg) \ | ||
| 34 | OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) | ||
| 32 | #endif /* __ASSEMBLY__ */ | 35 | #endif /* __ASSEMBLY__ */ |
| 33 | 36 | ||
| 34 | /* | 37 | /* |
| @@ -109,6 +112,8 @@ | |||
| 109 | #define OMAP24XX_CONTROL_TEST_KEY_8 (OMAP2_CONTROL_GENERAL + 0x00e0) | 112 | #define OMAP24XX_CONTROL_TEST_KEY_8 (OMAP2_CONTROL_GENERAL + 0x00e0) |
| 110 | #define OMAP24XX_CONTROL_TEST_KEY_9 (OMAP2_CONTROL_GENERAL + 0x00e4) | 113 | #define OMAP24XX_CONTROL_TEST_KEY_9 (OMAP2_CONTROL_GENERAL + 0x00e4) |
| 111 | 114 | ||
| 115 | #define OMAP343X_CONTROL_PADCONF_SYSNIRQ (OMAP2_CONTROL_INTERFACE + 0x01b0) | ||
| 116 | |||
| 112 | /* 34xx-only CONTROL_GENERAL register offsets */ | 117 | /* 34xx-only CONTROL_GENERAL register offsets */ |
| 113 | #define OMAP343X_CONTROL_PADCONF_OFF (OMAP2_CONTROL_GENERAL + 0x0000) | 118 | #define OMAP343X_CONTROL_PADCONF_OFF (OMAP2_CONTROL_GENERAL + 0x0000) |
| 114 | #define OMAP343X_CONTROL_MEM_DFTRW0 (OMAP2_CONTROL_GENERAL + 0x0008) | 119 | #define OMAP343X_CONTROL_MEM_DFTRW0 (OMAP2_CONTROL_GENERAL + 0x0008) |
| @@ -141,8 +146,51 @@ | |||
| 141 | #define OMAP343X_CONTROL_TEST_KEY_13 (OMAP2_CONTROL_GENERAL + 0x00fc) | 146 | #define OMAP343X_CONTROL_TEST_KEY_13 (OMAP2_CONTROL_GENERAL + 0x00fc) |
| 142 | #define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) | 147 | #define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) |
| 143 | #define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) | 148 | #define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) |
| 144 | #define OMAP343X_CONTROL_PBIAS_LITE (OMAP2_CONTROL_GENERAL + 0x02b0) | 149 | #define OMAP343X_CONTROL_DEBOBS(i) (OMAP2_CONTROL_GENERAL + 0x01B0 \ |
| 145 | #define OMAP343X_CONTROL_TEMP_SENSOR (OMAP2_CONTROL_GENERAL + 0x02b4) | 150 | + ((i) >> 1) * 4 + (!(i) & 1) * 2) |
| 151 | #define OMAP343X_CONTROL_PROG_IO0 (OMAP2_CONTROL_GENERAL + 0x01D4) | ||
| 152 | #define OMAP343X_CONTROL_PROG_IO1 (OMAP2_CONTROL_GENERAL + 0x01D8) | ||
| 153 | #define OMAP343X_CONTROL_DSS_DPLL_SPREADING (OMAP2_CONTROL_GENERAL + 0x01E0) | ||
| 154 | #define OMAP343X_CONTROL_CORE_DPLL_SPREADING (OMAP2_CONTROL_GENERAL + 0x01E4) | ||
| 155 | #define OMAP343X_CONTROL_PER_DPLL_SPREADING (OMAP2_CONTROL_GENERAL + 0x01E8) | ||
| 156 | #define OMAP343X_CONTROL_USBHOST_DPLL_SPREADING (OMAP2_CONTROL_GENERAL + 0x01EC) | ||
| 157 | #define OMAP343X_CONTROL_PBIAS_LITE (OMAP2_CONTROL_GENERAL + 0x02B0) | ||
| 158 | #define OMAP343X_CONTROL_TEMP_SENSOR (OMAP2_CONTROL_GENERAL + 0x02B4) | ||
| 159 | #define OMAP343X_CONTROL_SRAMLDO4 (OMAP2_CONTROL_GENERAL + 0x02B8) | ||
| 160 | #define OMAP343X_CONTROL_SRAMLDO5 (OMAP2_CONTROL_GENERAL + 0x02C0) | ||
| 161 | #define OMAP343X_CONTROL_CSI (OMAP2_CONTROL_GENERAL + 0x02C4) | ||
| 162 | |||
| 163 | |||
| 164 | /* 34xx PADCONF register offsets */ | ||
| 165 | #define OMAP343X_PADCONF_ETK(i) (OMAP2_CONTROL_PADCONFS + 0x5a8 + \ | ||
| 166 | (i)*2) | ||
| 167 | #define OMAP343X_PADCONF_ETK_CLK OMAP343X_PADCONF_ETK(0) | ||
| 168 | #define OMAP343X_PADCONF_ETK_CTL OMAP343X_PADCONF_ETK(1) | ||
| 169 | #define OMAP343X_PADCONF_ETK_D0 OMAP343X_PADCONF_ETK(2) | ||
| 170 | #define OMAP343X_PADCONF_ETK_D1 OMAP343X_PADCONF_ETK(3) | ||
| 171 | #define OMAP343X_PADCONF_ETK_D2 OMAP343X_PADCONF_ETK(4) | ||
| 172 | #define OMAP343X_PADCONF_ETK_D3 OMAP343X_PADCONF_ETK(5) | ||
| 173 | #define OMAP343X_PADCONF_ETK_D4 OMAP343X_PADCONF_ETK(6) | ||
| 174 | #define OMAP343X_PADCONF_ETK_D5 OMAP343X_PADCONF_ETK(7) | ||
| 175 | #define OMAP343X_PADCONF_ETK_D6 OMAP343X_PADCONF_ETK(8) | ||
| 176 | #define OMAP343X_PADCONF_ETK_D7 OMAP343X_PADCONF_ETK(9) | ||
| 177 | #define OMAP343X_PADCONF_ETK_D8 OMAP343X_PADCONF_ETK(10) | ||
| 178 | #define OMAP343X_PADCONF_ETK_D9 OMAP343X_PADCONF_ETK(11) | ||
| 179 | #define OMAP343X_PADCONF_ETK_D10 OMAP343X_PADCONF_ETK(12) | ||
| 180 | #define OMAP343X_PADCONF_ETK_D11 OMAP343X_PADCONF_ETK(13) | ||
| 181 | #define OMAP343X_PADCONF_ETK_D12 OMAP343X_PADCONF_ETK(14) | ||
| 182 | #define OMAP343X_PADCONF_ETK_D13 OMAP343X_PADCONF_ETK(15) | ||
| 183 | #define OMAP343X_PADCONF_ETK_D14 OMAP343X_PADCONF_ETK(16) | ||
| 184 | #define OMAP343X_PADCONF_ETK_D15 OMAP343X_PADCONF_ETK(17) | ||
| 185 | |||
| 186 | /* 34xx GENERAL_WKUP regist offsets */ | ||
| 187 | #define OMAP343X_CONTROL_WKUP_DEBOBSMUX(i) (OMAP343X_CONTROL_GENERAL_WKUP + \ | ||
| 188 | 0x008 + (i)) | ||
| 189 | #define OMAP343X_CONTROL_WKUP_DEBOBS0 (OMAP343X_CONTROL_GENERAL_WKUP + 0x008) | ||
| 190 | #define OMAP343X_CONTROL_WKUP_DEBOBS1 (OMAP343X_CONTROL_GENERAL_WKUP + 0x00C) | ||
| 191 | #define OMAP343X_CONTROL_WKUP_DEBOBS2 (OMAP343X_CONTROL_GENERAL_WKUP + 0x010) | ||
| 192 | #define OMAP343X_CONTROL_WKUP_DEBOBS3 (OMAP343X_CONTROL_GENERAL_WKUP + 0x014) | ||
| 193 | #define OMAP343X_CONTROL_WKUP_DEBOBS4 (OMAP343X_CONTROL_GENERAL_WKUP + 0x018) | ||
| 146 | 194 | ||
| 147 | /* 34xx D2D idle-related pins, handled by PM core */ | 195 | /* 34xx D2D idle-related pins, handled by PM core */ |
| 148 | #define OMAP3_PADCONF_SAD2D_MSTANDBY 0x250 | 196 | #define OMAP3_PADCONF_SAD2D_MSTANDBY 0x250 |
| @@ -193,6 +241,9 @@ | |||
| 193 | #define OMAP2_PBIASLITEPWRDNZ0 (1 << 1) | 241 | #define OMAP2_PBIASLITEPWRDNZ0 (1 << 1) |
| 194 | #define OMAP2_PBIASLITEVMODE0 (1 << 0) | 242 | #define OMAP2_PBIASLITEVMODE0 (1 << 0) |
| 195 | 243 | ||
| 244 | /* CONTROL_PROG_IO1 bits */ | ||
| 245 | #define OMAP3630_PRG_SDMMC1_SPEEDCTRL (1 << 20) | ||
| 246 | |||
| 196 | /* CONTROL_IVA2_BOOTMOD bits */ | 247 | /* CONTROL_IVA2_BOOTMOD bits */ |
| 197 | #define OMAP3_IVA2_BOOTMOD_SHIFT 0 | 248 | #define OMAP3_IVA2_BOOTMOD_SHIFT 0 |
| 198 | #define OMAP3_IVA2_BOOTMOD_MASK (0xf << 0) | 249 | #define OMAP3_IVA2_BOOTMOD_MASK (0xf << 0) |
| @@ -202,6 +253,44 @@ | |||
| 202 | #define OMAP3_PADCONF_WAKEUPEVENT0 (1 << 15) | 253 | #define OMAP3_PADCONF_WAKEUPEVENT0 (1 << 15) |
| 203 | #define OMAP3_PADCONF_WAKEUPENABLE0 (1 << 14) | 254 | #define OMAP3_PADCONF_WAKEUPENABLE0 (1 << 14) |
| 204 | 255 | ||
| 256 | #define OMAP343X_SCRATCHPAD_ROM (OMAP343X_CTRL_BASE + 0x860) | ||
| 257 | #define OMAP343X_SCRATCHPAD (OMAP343X_CTRL_BASE + 0x910) | ||
| 258 | #define OMAP343X_SCRATCHPAD_ROM_OFFSET 0x19C | ||
| 259 | |||
| 260 | /* | ||
| 261 | * CONTROL OMAP STATUS register to identify OMAP3 features | ||
| 262 | */ | ||
| 263 | #define OMAP3_CONTROL_OMAP_STATUS 0x044c | ||
| 264 | |||
| 265 | #define OMAP3_SGX_SHIFT 13 | ||
| 266 | #define OMAP3_SGX_MASK (3 << OMAP3_SGX_SHIFT) | ||
| 267 | #define FEAT_SGX_FULL 0 | ||
| 268 | #define FEAT_SGX_HALF 1 | ||
| 269 | #define FEAT_SGX_NONE 2 | ||
| 270 | |||
| 271 | #define OMAP3_IVA_SHIFT 12 | ||
| 272 | #define OMAP3_IVA_MASK (1 << OMAP3_SGX_SHIFT) | ||
| 273 | #define FEAT_IVA 0 | ||
| 274 | #define FEAT_IVA_NONE 1 | ||
| 275 | |||
| 276 | #define OMAP3_L2CACHE_SHIFT 10 | ||
| 277 | #define OMAP3_L2CACHE_MASK (3 << OMAP3_L2CACHE_SHIFT) | ||
| 278 | #define FEAT_L2CACHE_NONE 0 | ||
| 279 | #define FEAT_L2CACHE_64KB 1 | ||
| 280 | #define FEAT_L2CACHE_128KB 2 | ||
| 281 | #define FEAT_L2CACHE_256KB 3 | ||
| 282 | |||
| 283 | #define OMAP3_ISP_SHIFT 5 | ||
| 284 | #define OMAP3_ISP_MASK (1<< OMAP3_ISP_SHIFT) | ||
| 285 | #define FEAT_ISP 0 | ||
| 286 | #define FEAT_ISP_NONE 1 | ||
| 287 | |||
| 288 | #define OMAP3_NEON_SHIFT 4 | ||
| 289 | #define OMAP3_NEON_MASK (1<< OMAP3_NEON_SHIFT) | ||
| 290 | #define FEAT_NEON 0 | ||
| 291 | #define FEAT_NEON_NONE 1 | ||
| 292 | |||
| 293 | |||
| 205 | #ifndef __ASSEMBLY__ | 294 | #ifndef __ASSEMBLY__ |
| 206 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ | 295 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ |
| 207 | defined(CONFIG_ARCH_OMAP4) | 296 | defined(CONFIG_ARCH_OMAP4) |
| @@ -212,6 +301,15 @@ extern u32 omap_ctrl_readl(u16 offset); | |||
| 212 | extern void omap_ctrl_writeb(u8 val, u16 offset); | 301 | extern void omap_ctrl_writeb(u8 val, u16 offset); |
| 213 | extern void omap_ctrl_writew(u16 val, u16 offset); | 302 | extern void omap_ctrl_writew(u16 val, u16 offset); |
| 214 | extern void omap_ctrl_writel(u32 val, u16 offset); | 303 | extern void omap_ctrl_writel(u32 val, u16 offset); |
| 304 | |||
| 305 | extern void omap3_save_scratchpad_contents(void); | ||
| 306 | extern void omap3_clear_scratchpad_contents(void); | ||
| 307 | extern u32 *get_restore_pointer(void); | ||
| 308 | extern u32 *get_es3_restore_pointer(void); | ||
| 309 | extern u32 omap3_arm_context[128]; | ||
| 310 | extern void omap3_control_save_context(void); | ||
| 311 | extern void omap3_control_restore_context(void); | ||
| 312 | |||
| 215 | #else | 313 | #else |
| 216 | #define omap_ctrl_base_get() 0 | 314 | #define omap_ctrl_base_get() 0 |
| 217 | #define omap_ctrl_readb(x) 0 | 315 | #define omap_ctrl_readb(x) 0 |
diff --git a/arch/arm/plat-omap/include/mach/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h index f129efb3075..2e1789001df 100644 --- a/arch/arm/plat-omap/include/mach/cpu.h +++ b/arch/arm/plat-omap/include/plat/cpu.h | |||
| @@ -30,6 +30,8 @@ | |||
| 30 | #ifndef __ASM_ARCH_OMAP_CPU_H | 30 | #ifndef __ASM_ARCH_OMAP_CPU_H |
| 31 | #define __ASM_ARCH_OMAP_CPU_H | 31 | #define __ASM_ARCH_OMAP_CPU_H |
| 32 | 32 | ||
| 33 | #include <linux/bitops.h> | ||
| 34 | |||
| 33 | /* | 35 | /* |
| 34 | * Omap device type i.e. EMU/HS/TST/GP/BAD | 36 | * Omap device type i.e. EMU/HS/TST/GP/BAD |
| 35 | */ | 37 | */ |
| @@ -57,6 +59,23 @@ struct omap_chip_id { | |||
| 57 | unsigned int omap_rev(void); | 59 | unsigned int omap_rev(void); |
| 58 | 60 | ||
| 59 | /* | 61 | /* |
| 62 | * Define CPU revision bits | ||
| 63 | * | ||
| 64 | * Verbose meaning of the revision bits may be different for a silicon | ||
| 65 | * family. This difference can be handled separately. | ||
| 66 | */ | ||
| 67 | #define OMAP_REVBITS_00 0x00 | ||
| 68 | #define OMAP_REVBITS_10 0x10 | ||
| 69 | #define OMAP_REVBITS_20 0x20 | ||
| 70 | #define OMAP_REVBITS_30 0x30 | ||
| 71 | #define OMAP_REVBITS_40 0x40 | ||
| 72 | |||
| 73 | /* | ||
| 74 | * Get the CPU revision for OMAP devices | ||
| 75 | */ | ||
| 76 | #define GET_OMAP_REVISION() ((omap_rev() >> 8) & 0xff) | ||
| 77 | |||
| 78 | /* | ||
| 60 | * Test if multicore OMAP support is needed | 79 | * Test if multicore OMAP support is needed |
| 61 | */ | 80 | */ |
| 62 | #undef MULTI_OMAP1 | 81 | #undef MULTI_OMAP1 |
| @@ -161,6 +180,7 @@ IS_OMAP_CLASS(34xx, 0x34) | |||
| 161 | IS_OMAP_SUBCLASS(242x, 0x242) | 180 | IS_OMAP_SUBCLASS(242x, 0x242) |
| 162 | IS_OMAP_SUBCLASS(243x, 0x243) | 181 | IS_OMAP_SUBCLASS(243x, 0x243) |
| 163 | IS_OMAP_SUBCLASS(343x, 0x343) | 182 | IS_OMAP_SUBCLASS(343x, 0x343) |
| 183 | IS_OMAP_SUBCLASS(363x, 0x363) | ||
| 164 | 184 | ||
| 165 | #define cpu_is_omap7xx() 0 | 185 | #define cpu_is_omap7xx() 0 |
| 166 | #define cpu_is_omap15xx() 0 | 186 | #define cpu_is_omap15xx() 0 |
| @@ -264,6 +284,8 @@ IS_OMAP_SUBCLASS(343x, 0x343) | |||
| 264 | * cpu_is_omap2423(): True for OMAP2423 | 284 | * cpu_is_omap2423(): True for OMAP2423 |
| 265 | * cpu_is_omap2430(): True for OMAP2430 | 285 | * cpu_is_omap2430(): True for OMAP2430 |
| 266 | * cpu_is_omap3430(): True for OMAP3430 | 286 | * cpu_is_omap3430(): True for OMAP3430 |
| 287 | * cpu_is_omap3505(): True for OMAP3505 | ||
| 288 | * cpu_is_omap3517(): True for OMAP3517 | ||
| 267 | */ | 289 | */ |
| 268 | #define GET_OMAP_TYPE ((omap_rev() >> 16) & 0xffff) | 290 | #define GET_OMAP_TYPE ((omap_rev() >> 16) & 0xffff) |
| 269 | 291 | ||
| @@ -287,6 +309,8 @@ IS_OMAP_TYPE(2422, 0x2422) | |||
| 287 | IS_OMAP_TYPE(2423, 0x2423) | 309 | IS_OMAP_TYPE(2423, 0x2423) |
| 288 | IS_OMAP_TYPE(2430, 0x2430) | 310 | IS_OMAP_TYPE(2430, 0x2430) |
| 289 | IS_OMAP_TYPE(3430, 0x3430) | 311 | IS_OMAP_TYPE(3430, 0x3430) |
| 312 | IS_OMAP_TYPE(3505, 0x3505) | ||
| 313 | IS_OMAP_TYPE(3517, 0x3517) | ||
| 290 | 314 | ||
| 291 | #define cpu_is_omap310() 0 | 315 | #define cpu_is_omap310() 0 |
| 292 | #define cpu_is_omap730() 0 | 316 | #define cpu_is_omap730() 0 |
| @@ -301,7 +325,14 @@ IS_OMAP_TYPE(3430, 0x3430) | |||
| 301 | #define cpu_is_omap2422() 0 | 325 | #define cpu_is_omap2422() 0 |
| 302 | #define cpu_is_omap2423() 0 | 326 | #define cpu_is_omap2423() 0 |
| 303 | #define cpu_is_omap2430() 0 | 327 | #define cpu_is_omap2430() 0 |
| 328 | #define cpu_is_omap3503() 0 | ||
| 329 | #define cpu_is_omap3515() 0 | ||
| 330 | #define cpu_is_omap3525() 0 | ||
| 331 | #define cpu_is_omap3530() 0 | ||
| 332 | #define cpu_is_omap3505() 0 | ||
| 333 | #define cpu_is_omap3517() 0 | ||
| 304 | #define cpu_is_omap3430() 0 | 334 | #define cpu_is_omap3430() 0 |
| 335 | #define cpu_is_omap3630() 0 | ||
| 305 | 336 | ||
| 306 | /* | 337 | /* |
| 307 | * Whether we have MULTI_OMAP1 or not, we still need to distinguish | 338 | * Whether we have MULTI_OMAP1 or not, we still need to distinguish |
| @@ -351,7 +382,27 @@ IS_OMAP_TYPE(3430, 0x3430) | |||
| 351 | 382 | ||
| 352 | #if defined(CONFIG_ARCH_OMAP34XX) | 383 | #if defined(CONFIG_ARCH_OMAP34XX) |
| 353 | # undef cpu_is_omap3430 | 384 | # undef cpu_is_omap3430 |
| 385 | # undef cpu_is_omap3503 | ||
| 386 | # undef cpu_is_omap3515 | ||
| 387 | # undef cpu_is_omap3525 | ||
| 388 | # undef cpu_is_omap3530 | ||
| 389 | # undef cpu_is_omap3505 | ||
| 390 | # undef cpu_is_omap3517 | ||
| 354 | # define cpu_is_omap3430() is_omap3430() | 391 | # define cpu_is_omap3430() is_omap3430() |
| 392 | # define cpu_is_omap3503() (cpu_is_omap3430() && \ | ||
| 393 | (!omap3_has_iva()) && \ | ||
| 394 | (!omap3_has_sgx())) | ||
| 395 | # define cpu_is_omap3515() (cpu_is_omap3430() && \ | ||
| 396 | (omap3_has_iva()) && \ | ||
| 397 | (!omap3_has_sgx())) | ||
| 398 | # define cpu_is_omap3525() (cpu_is_omap3430() && \ | ||
| 399 | (omap3_has_sgx()) && \ | ||
| 400 | (!omap3_has_iva())) | ||
| 401 | # define cpu_is_omap3530() (cpu_is_omap3430()) | ||
| 402 | # define cpu_is_omap3505() is_omap3505() | ||
| 403 | # define cpu_is_omap3517() is_omap3517() | ||
| 404 | # undef cpu_is_omap3630 | ||
| 405 | # define cpu_is_omap3630() is_omap363x() | ||
| 355 | #endif | 406 | #endif |
| 356 | 407 | ||
| 357 | # if defined(CONFIG_ARCH_OMAP4) | 408 | # if defined(CONFIG_ARCH_OMAP4) |
| @@ -382,6 +433,16 @@ IS_OMAP_TYPE(3430, 0x3430) | |||
| 382 | #define OMAP3430_REV_ES3_0 0x34303034 | 433 | #define OMAP3430_REV_ES3_0 0x34303034 |
| 383 | #define OMAP3430_REV_ES3_1 0x34304034 | 434 | #define OMAP3430_REV_ES3_1 0x34304034 |
| 384 | 435 | ||
| 436 | #define OMAP3630_REV_ES1_0 0x36300034 | ||
| 437 | |||
| 438 | #define OMAP35XX_CLASS 0x35000034 | ||
| 439 | #define OMAP3503_REV(v) (OMAP35XX_CLASS | (0x3503 << 16) | (v << 12)) | ||
| 440 | #define OMAP3515_REV(v) (OMAP35XX_CLASS | (0x3515 << 16) | (v << 12)) | ||
| 441 | #define OMAP3525_REV(v) (OMAP35XX_CLASS | (0x3525 << 16) | (v << 12)) | ||
| 442 | #define OMAP3530_REV(v) (OMAP35XX_CLASS | (0x3530 << 16) | (v << 12)) | ||
| 443 | #define OMAP3505_REV(v) (OMAP35XX_CLASS | (0x3505 << 16) | (v << 12)) | ||
| 444 | #define OMAP3517_REV(v) (OMAP35XX_CLASS | (0x3517 << 16) | (v << 12)) | ||
| 445 | |||
| 385 | #define OMAP443X_CLASS 0x44300034 | 446 | #define OMAP443X_CLASS 0x44300034 |
| 386 | 447 | ||
| 387 | /* | 448 | /* |
| @@ -405,6 +466,7 @@ IS_OMAP_TYPE(3430, 0x3430) | |||
| 405 | #define CHIP_IS_OMAP3430ES2 (1 << 4) | 466 | #define CHIP_IS_OMAP3430ES2 (1 << 4) |
| 406 | #define CHIP_IS_OMAP3430ES3_0 (1 << 5) | 467 | #define CHIP_IS_OMAP3430ES3_0 (1 << 5) |
| 407 | #define CHIP_IS_OMAP3430ES3_1 (1 << 6) | 468 | #define CHIP_IS_OMAP3430ES3_1 (1 << 6) |
| 469 | #define CHIP_IS_OMAP3630ES1 (1 << 7) | ||
| 408 | 470 | ||
| 409 | #define CHIP_IS_OMAP24XX (CHIP_IS_OMAP2420 | CHIP_IS_OMAP2430) | 471 | #define CHIP_IS_OMAP24XX (CHIP_IS_OMAP2420 | CHIP_IS_OMAP2430) |
| 410 | 472 | ||
| @@ -416,11 +478,36 @@ IS_OMAP_TYPE(3430, 0x3430) | |||
| 416 | */ | 478 | */ |
| 417 | #define CHIP_GE_OMAP3430ES2 (CHIP_IS_OMAP3430ES2 | \ | 479 | #define CHIP_GE_OMAP3430ES2 (CHIP_IS_OMAP3430ES2 | \ |
| 418 | CHIP_IS_OMAP3430ES3_0 | \ | 480 | CHIP_IS_OMAP3430ES3_0 | \ |
| 419 | CHIP_IS_OMAP3430ES3_1) | 481 | CHIP_IS_OMAP3430ES3_1 | \ |
| 420 | #define CHIP_GE_OMAP3430ES3_1 (CHIP_IS_OMAP3430ES3_1) | 482 | CHIP_IS_OMAP3630ES1) |
| 483 | #define CHIP_GE_OMAP3430ES3_1 (CHIP_IS_OMAP3430ES3_1 | \ | ||
| 484 | CHIP_IS_OMAP3630ES1) | ||
| 421 | 485 | ||
| 422 | 486 | ||
| 423 | int omap_chip_is(struct omap_chip_id oci); | 487 | int omap_chip_is(struct omap_chip_id oci); |
| 424 | void omap2_check_revision(void); | 488 | void omap2_check_revision(void); |
| 425 | 489 | ||
| 490 | /* | ||
| 491 | * Runtime detection of OMAP3 features | ||
| 492 | */ | ||
| 493 | extern u32 omap3_features; | ||
| 494 | |||
| 495 | #define OMAP3_HAS_L2CACHE BIT(0) | ||
| 496 | #define OMAP3_HAS_IVA BIT(1) | ||
| 497 | #define OMAP3_HAS_SGX BIT(2) | ||
| 498 | #define OMAP3_HAS_NEON BIT(3) | ||
| 499 | #define OMAP3_HAS_ISP BIT(4) | ||
| 500 | |||
| 501 | #define OMAP3_HAS_FEATURE(feat,flag) \ | ||
| 502 | static inline unsigned int omap3_has_ ##feat(void) \ | ||
| 503 | { \ | ||
| 504 | return (omap3_features & OMAP3_HAS_ ##flag); \ | ||
| 505 | } \ | ||
| 506 | |||
| 507 | OMAP3_HAS_FEATURE(l2cache, L2CACHE) | ||
| 508 | OMAP3_HAS_FEATURE(sgx, SGX) | ||
| 509 | OMAP3_HAS_FEATURE(iva, IVA) | ||
| 510 | OMAP3_HAS_FEATURE(neon, NEON) | ||
| 511 | OMAP3_HAS_FEATURE(isp, ISP) | ||
| 512 | |||
| 426 | #endif | 513 | #endif |
diff --git a/arch/arm/plat-omap/include/mach/dma.h b/arch/arm/plat-omap/include/plat/dma.h index 72f680b7180..1c017b29b7e 100644 --- a/arch/arm/plat-omap/include/mach/dma.h +++ b/arch/arm/plat-omap/include/plat/dma.h | |||
| @@ -633,6 +633,11 @@ extern void omap_set_dma_dst_endian_type(int lch, enum end_type etype); | |||
| 633 | extern void omap_set_dma_src_endian_type(int lch, enum end_type etype); | 633 | extern void omap_set_dma_src_endian_type(int lch, enum end_type etype); |
| 634 | extern int omap_get_dma_index(int lch, int *ei, int *fi); | 634 | extern int omap_get_dma_index(int lch, int *ei, int *fi); |
| 635 | 635 | ||
| 636 | void omap_dma_global_context_save(void); | ||
| 637 | void omap_dma_global_context_restore(void); | ||
| 638 | |||
| 639 | extern void omap_dma_disable_irq(int lch); | ||
| 640 | |||
| 636 | /* Chaining APIs */ | 641 | /* Chaining APIs */ |
| 637 | #ifndef CONFIG_ARCH_OMAP1 | 642 | #ifndef CONFIG_ARCH_OMAP1 |
| 638 | extern int omap_request_dma_chain(int dev_id, const char *dev_name, | 643 | extern int omap_request_dma_chain(int dev_id, const char *dev_name, |
diff --git a/arch/arm/plat-omap/include/mach/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h index 20f1054c0a8..20f1054c0a8 100644 --- a/arch/arm/plat-omap/include/mach/dmtimer.h +++ b/arch/arm/plat-omap/include/plat/dmtimer.h | |||
diff --git a/arch/arm/plat-omap/include/mach/dsp_common.h b/arch/arm/plat-omap/include/plat/dsp_common.h index da97736f3ef..da97736f3ef 100644 --- a/arch/arm/plat-omap/include/mach/dsp_common.h +++ b/arch/arm/plat-omap/include/plat/dsp_common.h | |||
diff --git a/arch/arm/plat-omap/include/mach/fpga.h b/arch/arm/plat-omap/include/plat/fpga.h index f1864a652f7..f1864a652f7 100644 --- a/arch/arm/plat-omap/include/mach/fpga.h +++ b/arch/arm/plat-omap/include/plat/fpga.h | |||
diff --git a/arch/arm/plat-omap/include/mach/gpio-switch.h b/arch/arm/plat-omap/include/plat/gpio-switch.h index 10da0e07c0c..10da0e07c0c 100644 --- a/arch/arm/plat-omap/include/mach/gpio-switch.h +++ b/arch/arm/plat-omap/include/plat/gpio-switch.h | |||
diff --git a/arch/arm/plat-omap/include/mach/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h index 633ff688b92..de7c54731cb 100644 --- a/arch/arm/plat-omap/include/mach/gpio.h +++ b/arch/arm/plat-omap/include/plat/gpio.h | |||
| @@ -76,7 +76,8 @@ extern void omap2_gpio_prepare_for_retention(void); | |||
| 76 | extern void omap2_gpio_resume_after_retention(void); | 76 | extern void omap2_gpio_resume_after_retention(void); |
| 77 | extern void omap_set_gpio_debounce(int gpio, int enable); | 77 | extern void omap_set_gpio_debounce(int gpio, int enable); |
| 78 | extern void omap_set_gpio_debounce_time(int gpio, int enable); | 78 | extern void omap_set_gpio_debounce_time(int gpio, int enable); |
| 79 | 79 | extern void omap_gpio_save_context(void); | |
| 80 | extern void omap_gpio_restore_context(void); | ||
| 80 | /*-------------------------------------------------------------------------*/ | 81 | /*-------------------------------------------------------------------------*/ |
| 81 | 82 | ||
| 82 | /* Wrappers for "new style" GPIO calls, using the new infrastructure | 83 | /* Wrappers for "new style" GPIO calls, using the new infrastructure |
diff --git a/arch/arm/plat-omap/include/mach/gpmc-smc91x.h b/arch/arm/plat-omap/include/plat/gpmc-smc91x.h index b64fbee4d56..b64fbee4d56 100644 --- a/arch/arm/plat-omap/include/mach/gpmc-smc91x.h +++ b/arch/arm/plat-omap/include/plat/gpmc-smc91x.h | |||
diff --git a/arch/arm/plat-omap/include/mach/gpmc.h b/arch/arm/plat-omap/include/plat/gpmc.h index 9c99cda77ba..696e0ca051b 100644 --- a/arch/arm/plat-omap/include/mach/gpmc.h +++ b/arch/arm/plat-omap/include/plat/gpmc.h | |||
| @@ -52,6 +52,7 @@ | |||
| 52 | #define GPMC_CONFIG1_FCLK_DIV2 (GPMC_CONFIG1_FCLK_DIV(1)) | 52 | #define GPMC_CONFIG1_FCLK_DIV2 (GPMC_CONFIG1_FCLK_DIV(1)) |
| 53 | #define GPMC_CONFIG1_FCLK_DIV3 (GPMC_CONFIG1_FCLK_DIV(2)) | 53 | #define GPMC_CONFIG1_FCLK_DIV3 (GPMC_CONFIG1_FCLK_DIV(2)) |
| 54 | #define GPMC_CONFIG1_FCLK_DIV4 (GPMC_CONFIG1_FCLK_DIV(3)) | 54 | #define GPMC_CONFIG1_FCLK_DIV4 (GPMC_CONFIG1_FCLK_DIV(3)) |
| 55 | #define GPMC_CONFIG7_CSVALID (1 << 6) | ||
| 55 | 56 | ||
| 56 | /* | 57 | /* |
| 57 | * Note that all values in this struct are in nanoseconds, while | 58 | * Note that all values in this struct are in nanoseconds, while |
| @@ -107,6 +108,8 @@ extern int gpmc_prefetch_enable(int cs, int dma_mode, | |||
| 107 | unsigned int u32_count, int is_write); | 108 | unsigned int u32_count, int is_write); |
| 108 | extern void gpmc_prefetch_reset(void); | 109 | extern void gpmc_prefetch_reset(void); |
| 109 | extern int gpmc_prefetch_status(void); | 110 | extern int gpmc_prefetch_status(void); |
| 111 | extern void omap3_gpmc_save_context(void); | ||
| 112 | extern void omap3_gpmc_restore_context(void); | ||
| 110 | extern void __init gpmc_init(void); | 113 | extern void __init gpmc_init(void); |
| 111 | 114 | ||
| 112 | #endif | 115 | #endif |
diff --git a/arch/arm/plat-omap/include/mach/hardware.h b/arch/arm/plat-omap/include/plat/hardware.h index 26c1fbff08a..d5b26adfb89 100644 --- a/arch/arm/plat-omap/include/mach/hardware.h +++ b/arch/arm/plat-omap/include/plat/hardware.h | |||
| @@ -39,9 +39,9 @@ | |||
| 39 | #include <asm/sizes.h> | 39 | #include <asm/sizes.h> |
| 40 | #ifndef __ASSEMBLER__ | 40 | #ifndef __ASSEMBLER__ |
| 41 | #include <asm/types.h> | 41 | #include <asm/types.h> |
| 42 | #include <mach/cpu.h> | 42 | #include <plat/cpu.h> |
| 43 | #endif | 43 | #endif |
| 44 | #include <mach/serial.h> | 44 | #include <plat/serial.h> |
| 45 | 45 | ||
| 46 | /* | 46 | /* |
| 47 | * --------------------------------------------------------------------------- | 47 | * --------------------------------------------------------------------------- |
| @@ -280,11 +280,11 @@ | |||
| 280 | * --------------------------------------------------------------------------- | 280 | * --------------------------------------------------------------------------- |
| 281 | */ | 281 | */ |
| 282 | 282 | ||
| 283 | #include "omap730.h" | 283 | #include <plat/omap7xx.h> |
| 284 | #include "omap1510.h" | 284 | #include <plat/omap1510.h> |
| 285 | #include "omap16xx.h" | 285 | #include <plat/omap16xx.h> |
| 286 | #include "omap24xx.h" | 286 | #include <plat/omap24xx.h> |
| 287 | #include "omap34xx.h" | 287 | #include <plat/omap34xx.h> |
| 288 | #include "omap44xx.h" | 288 | #include <plat/omap44xx.h> |
| 289 | 289 | ||
| 290 | #endif /* __ASM_ARCH_OMAP_HARDWARE_H */ | 290 | #endif /* __ASM_ARCH_OMAP_HARDWARE_H */ |
diff --git a/arch/arm/plat-omap/include/mach/hwa742.h b/arch/arm/plat-omap/include/plat/hwa742.h index 886248d32b4..886248d32b4 100644 --- a/arch/arm/plat-omap/include/mach/hwa742.h +++ b/arch/arm/plat-omap/include/plat/hwa742.h | |||
diff --git a/arch/arm/plat-omap/include/mach/io.h b/arch/arm/plat-omap/include/plat/io.h index 8d32df32b0b..7e5319f907d 100644 --- a/arch/arm/plat-omap/include/mach/io.h +++ b/arch/arm/plat-omap/include/plat/io.h | |||
| @@ -63,8 +63,24 @@ | |||
| 63 | #define OMAP1_IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ | 63 | #define OMAP1_IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ |
| 64 | #define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET) | 64 | #define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET) |
| 65 | 65 | ||
| 66 | #define OMAP2_IO_OFFSET 0x90000000 | 66 | #define OMAP2_L3_IO_OFFSET 0x90000000 |
| 67 | #define OMAP2_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_IO_OFFSET) /* L3 and L4 */ | 67 | #define OMAP2_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L3_IO_OFFSET) /* L3 */ |
| 68 | |||
| 69 | |||
| 70 | #define OMAP2_L4_IO_OFFSET 0xb2000000 | ||
| 71 | #define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET) /* L4 */ | ||
| 72 | |||
| 73 | #define OMAP4_L3_IO_OFFSET 0xb4000000 | ||
| 74 | #define OMAP4_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_IO_OFFSET) /* L3 */ | ||
| 75 | |||
| 76 | #define OMAP4_L3_PER_IO_OFFSET 0xb1100000 | ||
| 77 | #define OMAP4_L3_PER_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_PER_IO_OFFSET) | ||
| 78 | |||
| 79 | #define OMAP4_GPMC_IO_OFFSET 0xa9000000 | ||
| 80 | #define OMAP4_GPMC_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_GPMC_IO_OFFSET) | ||
| 81 | |||
| 82 | #define OMAP2_EMU_IO_OFFSET 0xaa800000 /* Emulation */ | ||
| 83 | #define OMAP2_EMU_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_EMU_IO_OFFSET) | ||
| 68 | 84 | ||
| 69 | /* | 85 | /* |
| 70 | * ---------------------------------------------------------------------------- | 86 | * ---------------------------------------------------------------------------- |
| @@ -83,24 +99,27 @@ | |||
| 83 | */ | 99 | */ |
| 84 | 100 | ||
| 85 | /* We map both L3 and L4 on OMAP2 */ | 101 | /* We map both L3 and L4 on OMAP2 */ |
| 86 | #define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 */ | 102 | #define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 --> 0xf8000000*/ |
| 87 | #define L3_24XX_VIRT 0xf8000000 | 103 | #define L3_24XX_VIRT (L3_24XX_PHYS + OMAP2_L3_IO_OFFSET) |
| 88 | #define L3_24XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */ | 104 | #define L3_24XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */ |
| 89 | #define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 */ | 105 | #define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 --> 0xfa000000 */ |
| 90 | #define L4_24XX_VIRT 0xd8000000 | 106 | #define L4_24XX_VIRT (L4_24XX_PHYS + OMAP2_L4_IO_OFFSET) |
| 91 | #define L4_24XX_SIZE SZ_1M /* 1MB of 128MB used, want 1MB sect */ | 107 | #define L4_24XX_SIZE SZ_1M /* 1MB of 128MB used, want 1MB sect */ |
| 92 | 108 | ||
| 93 | #define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 */ | 109 | #define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 --> 0xfb000000 */ |
| 94 | #define L4_WK_243X_VIRT 0xd9000000 | 110 | #define L4_WK_243X_VIRT (L4_WK_243X_PHYS + OMAP2_L4_IO_OFFSET) |
| 95 | #define L4_WK_243X_SIZE SZ_1M | 111 | #define L4_WK_243X_SIZE SZ_1M |
| 96 | #define OMAP243X_GPMC_PHYS OMAP243X_GPMC_BASE /* 0x49000000 */ | 112 | #define OMAP243X_GPMC_PHYS OMAP243X_GPMC_BASE |
| 97 | #define OMAP243X_GPMC_VIRT 0xFE000000 | 113 | #define OMAP243X_GPMC_VIRT (OMAP243X_GPMC_PHYS + OMAP2_L3_IO_OFFSET) |
| 114 | /* 0x6e000000 --> 0xfe000000 */ | ||
| 98 | #define OMAP243X_GPMC_SIZE SZ_1M | 115 | #define OMAP243X_GPMC_SIZE SZ_1M |
| 99 | #define OMAP243X_SDRC_PHYS OMAP243X_SDRC_BASE | 116 | #define OMAP243X_SDRC_PHYS OMAP243X_SDRC_BASE |
| 100 | #define OMAP243X_SDRC_VIRT 0xFD000000 | 117 | /* 0x6D000000 --> 0xfd000000 */ |
| 118 | #define OMAP243X_SDRC_VIRT (OMAP243X_SDRC_PHYS + OMAP2_L3_IO_OFFSET) | ||
| 101 | #define OMAP243X_SDRC_SIZE SZ_1M | 119 | #define OMAP243X_SDRC_SIZE SZ_1M |
| 102 | #define OMAP243X_SMS_PHYS OMAP243X_SMS_BASE | 120 | #define OMAP243X_SMS_PHYS OMAP243X_SMS_BASE |
| 103 | #define OMAP243X_SMS_VIRT 0xFC000000 | 121 | /* 0x6c000000 --> 0xfc000000 */ |
| 122 | #define OMAP243X_SMS_VIRT (OMAP243X_SMS_PHYS + OMAP2_L3_IO_OFFSET) | ||
| 104 | #define OMAP243X_SMS_SIZE SZ_1M | 123 | #define OMAP243X_SMS_SIZE SZ_1M |
| 105 | 124 | ||
| 106 | /* DSP */ | 125 | /* DSP */ |
| @@ -121,12 +140,12 @@ | |||
| 121 | */ | 140 | */ |
| 122 | 141 | ||
| 123 | /* We map both L3 and L4 on OMAP3 */ | 142 | /* We map both L3 and L4 on OMAP3 */ |
| 124 | #define L3_34XX_PHYS L3_34XX_BASE /* 0x68000000 */ | 143 | #define L3_34XX_PHYS L3_34XX_BASE /* 0x68000000 --> 0xf8000000 */ |
| 125 | #define L3_34XX_VIRT 0xf8000000 | 144 | #define L3_34XX_VIRT (L3_34XX_PHYS + OMAP2_L3_IO_OFFSET) |
| 126 | #define L3_34XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */ | 145 | #define L3_34XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */ |
| 127 | 146 | ||
| 128 | #define L4_34XX_PHYS L4_34XX_BASE /* 0x48000000 */ | 147 | #define L4_34XX_PHYS L4_34XX_BASE /* 0x48000000 --> 0xfa000000 */ |
| 129 | #define L4_34XX_VIRT 0xd8000000 | 148 | #define L4_34XX_VIRT (L4_34XX_PHYS + OMAP2_L4_IO_OFFSET) |
| 130 | #define L4_34XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */ | 149 | #define L4_34XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */ |
| 131 | 150 | ||
| 132 | /* | 151 | /* |
| @@ -134,28 +153,33 @@ | |||
| 134 | * VPOM3430 was not working for Int controller | 153 | * VPOM3430 was not working for Int controller |
| 135 | */ | 154 | */ |
| 136 | 155 | ||
| 137 | #define L4_WK_34XX_PHYS L4_WK_34XX_BASE /* 0x48300000 */ | 156 | #define L4_WK_34XX_PHYS L4_WK_34XX_BASE /* 0x48300000 --> 0xfa300000 */ |
| 138 | #define L4_WK_34XX_VIRT 0xd8300000 | 157 | #define L4_WK_34XX_VIRT (L4_WK_34XX_PHYS + OMAP2_L4_IO_OFFSET) |
| 139 | #define L4_WK_34XX_SIZE SZ_1M | 158 | #define L4_WK_34XX_SIZE SZ_1M |
| 140 | 159 | ||
| 141 | #define L4_PER_34XX_PHYS L4_PER_34XX_BASE /* 0x49000000 */ | 160 | #define L4_PER_34XX_PHYS L4_PER_34XX_BASE |
| 142 | #define L4_PER_34XX_VIRT 0xd9000000 | 161 | /* 0x49000000 --> 0xfb000000 */ |
| 162 | #define L4_PER_34XX_VIRT (L4_PER_34XX_PHYS + OMAP2_L4_IO_OFFSET) | ||
| 143 | #define L4_PER_34XX_SIZE SZ_1M | 163 | #define L4_PER_34XX_SIZE SZ_1M |
| 144 | 164 | ||
| 145 | #define L4_EMU_34XX_PHYS L4_EMU_34XX_BASE /* 0x54000000 */ | 165 | #define L4_EMU_34XX_PHYS L4_EMU_34XX_BASE |
| 146 | #define L4_EMU_34XX_VIRT 0xe4000000 | 166 | /* 0x54000000 --> 0xfe800000 */ |
| 147 | #define L4_EMU_34XX_SIZE SZ_64M | 167 | #define L4_EMU_34XX_VIRT (L4_EMU_34XX_PHYS + OMAP2_EMU_IO_OFFSET) |
| 168 | #define L4_EMU_34XX_SIZE SZ_8M | ||
| 148 | 169 | ||
| 149 | #define OMAP34XX_GPMC_PHYS OMAP34XX_GPMC_BASE /* 0x6E000000 */ | 170 | #define OMAP34XX_GPMC_PHYS OMAP34XX_GPMC_BASE |
| 150 | #define OMAP34XX_GPMC_VIRT 0xFE000000 | 171 | /* 0x6e000000 --> 0xfe000000 */ |
| 172 | #define OMAP34XX_GPMC_VIRT (OMAP34XX_GPMC_PHYS + OMAP2_L3_IO_OFFSET) | ||
| 151 | #define OMAP34XX_GPMC_SIZE SZ_1M | 173 | #define OMAP34XX_GPMC_SIZE SZ_1M |
| 152 | 174 | ||
| 153 | #define OMAP343X_SMS_PHYS OMAP343X_SMS_BASE /* 0x6C000000 */ | 175 | #define OMAP343X_SMS_PHYS OMAP343X_SMS_BASE |
| 154 | #define OMAP343X_SMS_VIRT 0xFC000000 | 176 | /* 0x6c000000 --> 0xfc000000 */ |
| 177 | #define OMAP343X_SMS_VIRT (OMAP343X_SMS_PHYS + OMAP2_L3_IO_OFFSET) | ||
| 155 | #define OMAP343X_SMS_SIZE SZ_1M | 178 | #define OMAP343X_SMS_SIZE SZ_1M |
| 156 | 179 | ||
| 157 | #define OMAP343X_SDRC_PHYS OMAP343X_SDRC_BASE /* 0x6D000000 */ | 180 | #define OMAP343X_SDRC_PHYS OMAP343X_SDRC_BASE |
| 158 | #define OMAP343X_SDRC_VIRT 0xFD000000 | 181 | /* 0x6D000000 --> 0xfd000000 */ |
| 182 | #define OMAP343X_SDRC_VIRT (OMAP343X_SDRC_PHYS + OMAP2_L3_IO_OFFSET) | ||
| 159 | #define OMAP343X_SDRC_SIZE SZ_1M | 183 | #define OMAP343X_SDRC_SIZE SZ_1M |
| 160 | 184 | ||
| 161 | /* DSP */ | 185 | /* DSP */ |
| @@ -176,32 +200,54 @@ | |||
| 176 | */ | 200 | */ |
| 177 | 201 | ||
| 178 | /* We map both L3 and L4 on OMAP4 */ | 202 | /* We map both L3 and L4 on OMAP4 */ |
| 179 | #define L3_44XX_PHYS L3_44XX_BASE | 203 | #define L3_44XX_PHYS L3_44XX_BASE /* 0x44000000 --> 0xf8000000 */ |
| 180 | #define L3_44XX_VIRT 0xd4000000 | 204 | #define L3_44XX_VIRT (L3_44XX_PHYS + OMAP4_L3_IO_OFFSET) |
| 181 | #define L3_44XX_SIZE SZ_1M | 205 | #define L3_44XX_SIZE SZ_1M |
| 182 | 206 | ||
| 183 | #define L4_44XX_PHYS L4_44XX_BASE | 207 | #define L4_44XX_PHYS L4_44XX_BASE /* 0x4a000000 --> 0xfc000000 */ |
| 184 | #define L4_44XX_VIRT 0xda000000 | 208 | #define L4_44XX_VIRT (L4_44XX_PHYS + OMAP2_L4_IO_OFFSET) |
| 185 | #define L4_44XX_SIZE SZ_4M | 209 | #define L4_44XX_SIZE SZ_4M |
| 186 | 210 | ||
| 187 | 211 | ||
| 188 | #define L4_WK_44XX_PHYS L4_WK_44XX_BASE | 212 | #define L4_WK_44XX_PHYS L4_WK_44XX_BASE /* 0x4a300000 --> 0xfc300000 */ |
| 189 | #define L4_WK_44XX_VIRT 0xda300000 | 213 | #define L4_WK_44XX_VIRT (L4_WK_44XX_PHYS + OMAP2_L4_IO_OFFSET) |
| 190 | #define L4_WK_44XX_SIZE SZ_1M | 214 | #define L4_WK_44XX_SIZE SZ_1M |
| 191 | 215 | ||
| 192 | #define L4_PER_44XX_PHYS L4_PER_44XX_BASE | 216 | #define L4_PER_44XX_PHYS L4_PER_44XX_BASE |
| 193 | #define L4_PER_44XX_VIRT 0xd8000000 | 217 | /* 0x48000000 --> 0xfa000000 */ |
| 218 | #define L4_PER_44XX_VIRT (L4_PER_44XX_PHYS + OMAP2_L4_IO_OFFSET) | ||
| 194 | #define L4_PER_44XX_SIZE SZ_4M | 219 | #define L4_PER_44XX_SIZE SZ_4M |
| 195 | 220 | ||
| 221 | #define L4_ABE_44XX_PHYS L4_ABE_44XX_BASE | ||
| 222 | /* 0x49000000 --> 0xfb000000 */ | ||
| 223 | #define L4_ABE_44XX_VIRT (L4_ABE_44XX_PHYS + OMAP2_L4_IO_OFFSET) | ||
| 224 | #define L4_ABE_44XX_SIZE SZ_1M | ||
| 225 | |||
| 196 | #define L4_EMU_44XX_PHYS L4_EMU_44XX_BASE | 226 | #define L4_EMU_44XX_PHYS L4_EMU_44XX_BASE |
| 197 | #define L4_EMU_44XX_VIRT 0xe4000000 | 227 | /* 0x54000000 --> 0xfe800000 */ |
| 198 | #define L4_EMU_44XX_SIZE SZ_64M | 228 | #define L4_EMU_44XX_VIRT (L4_EMU_44XX_PHYS + OMAP2_EMU_IO_OFFSET) |
| 229 | #define L4_EMU_44XX_SIZE SZ_8M | ||
| 199 | 230 | ||
| 200 | #define OMAP44XX_GPMC_PHYS OMAP44XX_GPMC_BASE | 231 | #define OMAP44XX_GPMC_PHYS OMAP44XX_GPMC_BASE |
| 201 | #define OMAP44XX_GPMC_VIRT 0xe0000000 | 232 | /* 0x50000000 --> 0xf9000000 */ |
| 233 | #define OMAP44XX_GPMC_VIRT (OMAP44XX_GPMC_PHYS + OMAP4_GPMC_IO_OFFSET) | ||
| 202 | #define OMAP44XX_GPMC_SIZE SZ_1M | 234 | #define OMAP44XX_GPMC_SIZE SZ_1M |
| 203 | 235 | ||
| 204 | 236 | ||
| 237 | #define OMAP44XX_EMIF1_PHYS OMAP44XX_EMIF1_BASE | ||
| 238 | /* 0x4c000000 --> 0xfd100000 */ | ||
| 239 | #define OMAP44XX_EMIF1_VIRT (OMAP44XX_EMIF1_PHYS + OMAP4_L3_PER_IO_OFFSET) | ||
| 240 | #define OMAP44XX_EMIF1_SIZE SZ_1M | ||
| 241 | |||
| 242 | #define OMAP44XX_EMIF2_PHYS OMAP44XX_EMIF2_BASE | ||
| 243 | /* 0x4d000000 --> 0xfd200000 */ | ||
| 244 | #define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF2_PHYS + OMAP4_L3_PER_IO_OFFSET) | ||
| 245 | #define OMAP44XX_EMIF2_SIZE SZ_1M | ||
| 246 | |||
| 247 | #define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE | ||
| 248 | /* 0x4e000000 --> 0xfd300000 */ | ||
| 249 | #define OMAP44XX_DMM_VIRT (OMAP44XX_DMM_PHYS + OMAP4_L3_PER_IO_OFFSET) | ||
| 250 | #define OMAP44XX_DMM_SIZE SZ_1M | ||
| 205 | /* | 251 | /* |
| 206 | * ---------------------------------------------------------------------------- | 252 | * ---------------------------------------------------------------------------- |
| 207 | * Omap specific register access | 253 | * Omap specific register access |
diff --git a/arch/arm/plat-omap/include/mach/iommu.h b/arch/arm/plat-omap/include/plat/iommu.h index 46d41ac83db..0752af9d099 100644 --- a/arch/arm/plat-omap/include/mach/iommu.h +++ b/arch/arm/plat-omap/include/plat/iommu.h | |||
| @@ -107,7 +107,7 @@ struct iommu_platform_data { | |||
| 107 | #if defined(CONFIG_ARCH_OMAP1) | 107 | #if defined(CONFIG_ARCH_OMAP1) |
| 108 | #error "iommu for this processor not implemented yet" | 108 | #error "iommu for this processor not implemented yet" |
| 109 | #else | 109 | #else |
| 110 | #include <mach/iommu2.h> | 110 | #include <plat/iommu2.h> |
| 111 | #endif | 111 | #endif |
| 112 | 112 | ||
| 113 | /* | 113 | /* |
diff --git a/arch/arm/plat-omap/include/mach/iommu2.h b/arch/arm/plat-omap/include/plat/iommu2.h index 10ad05f410e..10ad05f410e 100644 --- a/arch/arm/plat-omap/include/mach/iommu2.h +++ b/arch/arm/plat-omap/include/plat/iommu2.h | |||
diff --git a/arch/arm/plat-omap/include/mach/iovmm.h b/arch/arm/plat-omap/include/plat/iovmm.h index bdc7ce5d7a4..bdc7ce5d7a4 100644 --- a/arch/arm/plat-omap/include/mach/iovmm.h +++ b/arch/arm/plat-omap/include/plat/iovmm.h | |||
diff --git a/arch/arm/plat-omap/include/mach/irda.h b/arch/arm/plat-omap/include/plat/irda.h index 40f60339d1c..40f60339d1c 100644 --- a/arch/arm/plat-omap/include/mach/irda.h +++ b/arch/arm/plat-omap/include/plat/irda.h | |||
diff --git a/arch/arm/plat-omap/include/mach/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h index 28a165058b6..ce5dd2d1dc2 100644 --- a/arch/arm/plat-omap/include/mach/irqs.h +++ b/arch/arm/plat-omap/include/plat/irqs.h | |||
| @@ -86,49 +86,26 @@ | |||
| 86 | #define INT_1610_SSR_FIFO_0 29 | 86 | #define INT_1610_SSR_FIFO_0 29 |
| 87 | 87 | ||
| 88 | /* | 88 | /* |
| 89 | * OMAP-730 specific IRQ numbers for interrupt handler 1 | 89 | * OMAP-7xx specific IRQ numbers for interrupt handler 1 |
| 90 | */ | 90 | */ |
| 91 | #define INT_730_IH2_FIQ 0 | 91 | #define INT_7XX_IH2_FIQ 0 |
| 92 | #define INT_730_IH2_IRQ 1 | 92 | #define INT_7XX_IH2_IRQ 1 |
| 93 | #define INT_730_USB_NON_ISO 2 | 93 | #define INT_7XX_USB_NON_ISO 2 |
| 94 | #define INT_730_USB_ISO 3 | 94 | #define INT_7XX_USB_ISO 3 |
| 95 | #define INT_730_ICR 4 | 95 | #define INT_7XX_ICR 4 |
| 96 | #define INT_730_EAC 5 | 96 | #define INT_7XX_EAC 5 |
| 97 | #define INT_730_GPIO_BANK1 6 | 97 | #define INT_7XX_GPIO_BANK1 6 |
| 98 | #define INT_730_GPIO_BANK2 7 | 98 | #define INT_7XX_GPIO_BANK2 7 |
| 99 | #define INT_730_GPIO_BANK3 8 | 99 | #define INT_7XX_GPIO_BANK3 8 |
| 100 | #define INT_730_McBSP2TX 10 | 100 | #define INT_7XX_McBSP2TX 10 |
| 101 | #define INT_730_McBSP2RX 11 | 101 | #define INT_7XX_McBSP2RX 11 |
| 102 | #define INT_730_McBSP2RX_OVF 12 | 102 | #define INT_7XX_McBSP2RX_OVF 12 |
| 103 | #define INT_730_LCD_LINE 14 | 103 | #define INT_7XX_LCD_LINE 14 |
| 104 | #define INT_730_GSM_PROTECT 15 | 104 | #define INT_7XX_GSM_PROTECT 15 |
| 105 | #define INT_730_TIMER3 16 | 105 | #define INT_7XX_TIMER3 16 |
| 106 | #define INT_730_GPIO_BANK5 17 | 106 | #define INT_7XX_GPIO_BANK5 17 |
| 107 | #define INT_730_GPIO_BANK6 18 | 107 | #define INT_7XX_GPIO_BANK6 18 |
| 108 | #define INT_730_SPGIO_WR 29 | 108 | #define INT_7XX_SPGIO_WR 29 |
| 109 | |||
| 110 | /* | ||
| 111 | * OMAP-850 specific IRQ numbers for interrupt handler 1 | ||
| 112 | */ | ||
| 113 | #define INT_850_IH2_FIQ 0 | ||
| 114 | #define INT_850_IH2_IRQ 1 | ||
| 115 | #define INT_850_USB_NON_ISO 2 | ||
| 116 | #define INT_850_USB_ISO 3 | ||
| 117 | #define INT_850_ICR 4 | ||
| 118 | #define INT_850_EAC 5 | ||
| 119 | #define INT_850_GPIO_BANK1 6 | ||
| 120 | #define INT_850_GPIO_BANK2 7 | ||
| 121 | #define INT_850_GPIO_BANK3 8 | ||
| 122 | #define INT_850_McBSP2TX 10 | ||
| 123 | #define INT_850_McBSP2RX 11 | ||
| 124 | #define INT_850_McBSP2RX_OVF 12 | ||
| 125 | #define INT_850_LCD_LINE 14 | ||
| 126 | #define INT_850_GSM_PROTECT 15 | ||
| 127 | #define INT_850_TIMER3 16 | ||
| 128 | #define INT_850_GPIO_BANK5 17 | ||
| 129 | #define INT_850_GPIO_BANK6 18 | ||
| 130 | #define INT_850_SPGIO_WR 29 | ||
| 131 | |||
| 132 | 109 | ||
| 133 | /* | 110 | /* |
| 134 | * IRQ numbers for interrupt handler 2 | 111 | * IRQ numbers for interrupt handler 2 |
| @@ -206,120 +183,62 @@ | |||
| 206 | #define INT_1610_SHA1MD5 (91 + IH2_BASE) | 183 | #define INT_1610_SHA1MD5 (91 + IH2_BASE) |
| 207 | 184 | ||
| 208 | /* | 185 | /* |
| 209 | * OMAP-730 specific IRQ numbers for interrupt handler 2 | 186 | * OMAP-7xx specific IRQ numbers for interrupt handler 2 |
| 210 | */ | 187 | */ |
| 211 | #define INT_730_HW_ERRORS (0 + IH2_BASE) | 188 | #define INT_7XX_HW_ERRORS (0 + IH2_BASE) |
| 212 | #define INT_730_NFIQ_PWR_FAIL (1 + IH2_BASE) | 189 | #define INT_7XX_NFIQ_PWR_FAIL (1 + IH2_BASE) |
| 213 | #define INT_730_CFCD (2 + IH2_BASE) | 190 | #define INT_7XX_CFCD (2 + IH2_BASE) |
| 214 | #define INT_730_CFIREQ (3 + IH2_BASE) | 191 | #define INT_7XX_CFIREQ (3 + IH2_BASE) |
| 215 | #define INT_730_I2C (4 + IH2_BASE) | 192 | #define INT_7XX_I2C (4 + IH2_BASE) |
| 216 | #define INT_730_PCC (5 + IH2_BASE) | 193 | #define INT_7XX_PCC (5 + IH2_BASE) |
| 217 | #define INT_730_MPU_EXT_NIRQ (6 + IH2_BASE) | 194 | #define INT_7XX_MPU_EXT_NIRQ (6 + IH2_BASE) |
| 218 | #define INT_730_SPI_100K_1 (7 + IH2_BASE) | 195 | #define INT_7XX_SPI_100K_1 (7 + IH2_BASE) |
| 219 | #define INT_730_SYREN_SPI (8 + IH2_BASE) | 196 | #define INT_7XX_SYREN_SPI (8 + IH2_BASE) |
| 220 | #define INT_730_VLYNQ (9 + IH2_BASE) | 197 | #define INT_7XX_VLYNQ (9 + IH2_BASE) |
| 221 | #define INT_730_GPIO_BANK4 (10 + IH2_BASE) | 198 | #define INT_7XX_GPIO_BANK4 (10 + IH2_BASE) |
| 222 | #define INT_730_McBSP1TX (11 + IH2_BASE) | 199 | #define INT_7XX_McBSP1TX (11 + IH2_BASE) |
| 223 | #define INT_730_McBSP1RX (12 + IH2_BASE) | 200 | #define INT_7XX_McBSP1RX (12 + IH2_BASE) |
| 224 | #define INT_730_McBSP1RX_OF (13 + IH2_BASE) | 201 | #define INT_7XX_McBSP1RX_OF (13 + IH2_BASE) |
| 225 | #define INT_730_UART_MODEM_IRDA_2 (14 + IH2_BASE) | 202 | #define INT_7XX_UART_MODEM_IRDA_2 (14 + IH2_BASE) |
| 226 | #define INT_730_UART_MODEM_1 (15 + IH2_BASE) | 203 | #define INT_7XX_UART_MODEM_1 (15 + IH2_BASE) |
| 227 | #define INT_730_MCSI (16 + IH2_BASE) | 204 | #define INT_7XX_MCSI (16 + IH2_BASE) |
| 228 | #define INT_730_uWireTX (17 + IH2_BASE) | 205 | #define INT_7XX_uWireTX (17 + IH2_BASE) |
| 229 | #define INT_730_uWireRX (18 + IH2_BASE) | 206 | #define INT_7XX_uWireRX (18 + IH2_BASE) |
| 230 | #define INT_730_SMC_CD (19 + IH2_BASE) | 207 | #define INT_7XX_SMC_CD (19 + IH2_BASE) |
| 231 | #define INT_730_SMC_IREQ (20 + IH2_BASE) | 208 | #define INT_7XX_SMC_IREQ (20 + IH2_BASE) |
| 232 | #define INT_730_HDQ_1WIRE (21 + IH2_BASE) | 209 | #define INT_7XX_HDQ_1WIRE (21 + IH2_BASE) |
| 233 | #define INT_730_TIMER32K (22 + IH2_BASE) | 210 | #define INT_7XX_TIMER32K (22 + IH2_BASE) |
| 234 | #define INT_730_MMC_SDIO (23 + IH2_BASE) | 211 | #define INT_7XX_MMC_SDIO (23 + IH2_BASE) |
| 235 | #define INT_730_UPLD (24 + IH2_BASE) | 212 | #define INT_7XX_UPLD (24 + IH2_BASE) |
| 236 | #define INT_730_USB_HHC_1 (27 + IH2_BASE) | 213 | #define INT_7XX_USB_HHC_1 (27 + IH2_BASE) |
| 237 | #define INT_730_USB_HHC_2 (28 + IH2_BASE) | 214 | #define INT_7XX_USB_HHC_2 (28 + IH2_BASE) |
| 238 | #define INT_730_USB_GENI (29 + IH2_BASE) | 215 | #define INT_7XX_USB_GENI (29 + IH2_BASE) |
| 239 | #define INT_730_USB_OTG (30 + IH2_BASE) | 216 | #define INT_7XX_USB_OTG (30 + IH2_BASE) |
| 240 | #define INT_730_CAMERA_IF (31 + IH2_BASE) | 217 | #define INT_7XX_CAMERA_IF (31 + IH2_BASE) |
| 241 | #define INT_730_RNG (32 + IH2_BASE) | 218 | #define INT_7XX_RNG (32 + IH2_BASE) |
| 242 | #define INT_730_DUAL_MODE_TIMER (33 + IH2_BASE) | 219 | #define INT_7XX_DUAL_MODE_TIMER (33 + IH2_BASE) |
| 243 | #define INT_730_DBB_RF_EN (34 + IH2_BASE) | 220 | #define INT_7XX_DBB_RF_EN (34 + IH2_BASE) |
| 244 | #define INT_730_MPUIO_KEYPAD (35 + IH2_BASE) | 221 | #define INT_7XX_MPUIO_KEYPAD (35 + IH2_BASE) |
| 245 | #define INT_730_SHA1_MD5 (36 + IH2_BASE) | 222 | #define INT_7XX_SHA1_MD5 (36 + IH2_BASE) |
| 246 | #define INT_730_SPI_100K_2 (37 + IH2_BASE) | 223 | #define INT_7XX_SPI_100K_2 (37 + IH2_BASE) |
| 247 | #define INT_730_RNG_IDLE (38 + IH2_BASE) | 224 | #define INT_7XX_RNG_IDLE (38 + IH2_BASE) |
| 248 | #define INT_730_MPUIO (39 + IH2_BASE) | 225 | #define INT_7XX_MPUIO (39 + IH2_BASE) |
| 249 | #define INT_730_LLPC_LCD_CTRL_CAN_BE_OFF (40 + IH2_BASE) | 226 | #define INT_7XX_LLPC_LCD_CTRL_CAN_BE_OFF (40 + IH2_BASE) |
| 250 | #define INT_730_LLPC_OE_FALLING (41 + IH2_BASE) | 227 | #define INT_7XX_LLPC_OE_FALLING (41 + IH2_BASE) |
| 251 | #define INT_730_LLPC_OE_RISING (42 + IH2_BASE) | 228 | #define INT_7XX_LLPC_OE_RISING (42 + IH2_BASE) |
| 252 | #define INT_730_LLPC_VSYNC (43 + IH2_BASE) | 229 | #define INT_7XX_LLPC_VSYNC (43 + IH2_BASE) |
| 253 | #define INT_730_WAKE_UP_REQ (46 + IH2_BASE) | 230 | #define INT_7XX_WAKE_UP_REQ (46 + IH2_BASE) |
| 254 | #define INT_730_DMA_CH6 (53 + IH2_BASE) | 231 | #define INT_7XX_DMA_CH6 (53 + IH2_BASE) |
| 255 | #define INT_730_DMA_CH7 (54 + IH2_BASE) | 232 | #define INT_7XX_DMA_CH7 (54 + IH2_BASE) |
| 256 | #define INT_730_DMA_CH8 (55 + IH2_BASE) | 233 | #define INT_7XX_DMA_CH8 (55 + IH2_BASE) |
| 257 | #define INT_730_DMA_CH9 (56 + IH2_BASE) | 234 | #define INT_7XX_DMA_CH9 (56 + IH2_BASE) |
| 258 | #define INT_730_DMA_CH10 (57 + IH2_BASE) | 235 | #define INT_7XX_DMA_CH10 (57 + IH2_BASE) |
| 259 | #define INT_730_DMA_CH11 (58 + IH2_BASE) | 236 | #define INT_7XX_DMA_CH11 (58 + IH2_BASE) |
| 260 | #define INT_730_DMA_CH12 (59 + IH2_BASE) | 237 | #define INT_7XX_DMA_CH12 (59 + IH2_BASE) |
| 261 | #define INT_730_DMA_CH13 (60 + IH2_BASE) | 238 | #define INT_7XX_DMA_CH13 (60 + IH2_BASE) |
| 262 | #define INT_730_DMA_CH14 (61 + IH2_BASE) | 239 | #define INT_7XX_DMA_CH14 (61 + IH2_BASE) |
| 263 | #define INT_730_DMA_CH15 (62 + IH2_BASE) | 240 | #define INT_7XX_DMA_CH15 (62 + IH2_BASE) |
| 264 | #define INT_730_NAND (63 + IH2_BASE) | 241 | #define INT_7XX_NAND (63 + IH2_BASE) |
| 265 | |||
| 266 | /* | ||
| 267 | * OMAP-850 specific IRQ numbers for interrupt handler 2 | ||
| 268 | */ | ||
| 269 | #define INT_850_HW_ERRORS (0 + IH2_BASE) | ||
| 270 | #define INT_850_NFIQ_PWR_FAIL (1 + IH2_BASE) | ||
| 271 | #define INT_850_CFCD (2 + IH2_BASE) | ||
| 272 | #define INT_850_CFIREQ (3 + IH2_BASE) | ||
| 273 | #define INT_850_I2C (4 + IH2_BASE) | ||
| 274 | #define INT_850_PCC (5 + IH2_BASE) | ||
| 275 | #define INT_850_MPU_EXT_NIRQ (6 + IH2_BASE) | ||
| 276 | #define INT_850_SPI_100K_1 (7 + IH2_BASE) | ||
| 277 | #define INT_850_SYREN_SPI (8 + IH2_BASE) | ||
| 278 | #define INT_850_VLYNQ (9 + IH2_BASE) | ||
| 279 | #define INT_850_GPIO_BANK4 (10 + IH2_BASE) | ||
| 280 | #define INT_850_McBSP1TX (11 + IH2_BASE) | ||
| 281 | #define INT_850_McBSP1RX (12 + IH2_BASE) | ||
| 282 | #define INT_850_McBSP1RX_OF (13 + IH2_BASE) | ||
| 283 | #define INT_850_UART_MODEM_IRDA_2 (14 + IH2_BASE) | ||
| 284 | #define INT_850_UART_MODEM_1 (15 + IH2_BASE) | ||
| 285 | #define INT_850_MCSI (16 + IH2_BASE) | ||
| 286 | #define INT_850_uWireTX (17 + IH2_BASE) | ||
| 287 | #define INT_850_uWireRX (18 + IH2_BASE) | ||
| 288 | #define INT_850_SMC_CD (19 + IH2_BASE) | ||
| 289 | #define INT_850_SMC_IREQ (20 + IH2_BASE) | ||
| 290 | #define INT_850_HDQ_1WIRE (21 + IH2_BASE) | ||
| 291 | #define INT_850_TIMER32K (22 + IH2_BASE) | ||
| 292 | #define INT_850_MMC_SDIO (23 + IH2_BASE) | ||
| 293 | #define INT_850_UPLD (24 + IH2_BASE) | ||
| 294 | #define INT_850_USB_HHC_1 (27 + IH2_BASE) | ||
| 295 | #define INT_850_USB_HHC_2 (28 + IH2_BASE) | ||
| 296 | #define INT_850_USB_GENI (29 + IH2_BASE) | ||
| 297 | #define INT_850_USB_OTG (30 + IH2_BASE) | ||
| 298 | #define INT_850_CAMERA_IF (31 + IH2_BASE) | ||
| 299 | #define INT_850_RNG (32 + IH2_BASE) | ||
| 300 | #define INT_850_DUAL_MODE_TIMER (33 + IH2_BASE) | ||
| 301 | #define INT_850_DBB_RF_EN (34 + IH2_BASE) | ||
| 302 | #define INT_850_MPUIO_KEYPAD (35 + IH2_BASE) | ||
| 303 | #define INT_850_SHA1_MD5 (36 + IH2_BASE) | ||
| 304 | #define INT_850_SPI_100K_2 (37 + IH2_BASE) | ||
| 305 | #define INT_850_RNG_IDLE (38 + IH2_BASE) | ||
| 306 | #define INT_850_MPUIO (39 + IH2_BASE) | ||
| 307 | #define INT_850_LLPC_LCD_CTRL_CAN_BE_OFF (40 + IH2_BASE) | ||
| 308 | #define INT_850_LLPC_OE_FALLING (41 + IH2_BASE) | ||
| 309 | #define INT_850_LLPC_OE_RISING (42 + IH2_BASE) | ||
| 310 | #define INT_850_LLPC_VSYNC (43 + IH2_BASE) | ||
| 311 | #define INT_850_WAKE_UP_REQ (46 + IH2_BASE) | ||
| 312 | #define INT_850_DMA_CH6 (53 + IH2_BASE) | ||
| 313 | #define INT_850_DMA_CH7 (54 + IH2_BASE) | ||
| 314 | #define INT_850_DMA_CH8 (55 + IH2_BASE) | ||
| 315 | #define INT_850_DMA_CH9 (56 + IH2_BASE) | ||
| 316 | #define INT_850_DMA_CH10 (57 + IH2_BASE) | ||
| 317 | #define INT_850_DMA_CH11 (58 + IH2_BASE) | ||
| 318 | #define INT_850_DMA_CH12 (59 + IH2_BASE) | ||
| 319 | #define INT_850_DMA_CH13 (60 + IH2_BASE) | ||
| 320 | #define INT_850_DMA_CH14 (61 + IH2_BASE) | ||
| 321 | #define INT_850_DMA_CH15 (62 + IH2_BASE) | ||
| 322 | #define INT_850_NAND (63 + IH2_BASE) | ||
| 323 | 242 | ||
| 324 | #define INT_24XX_SYS_NIRQ 7 | 243 | #define INT_24XX_SYS_NIRQ 7 |
| 325 | #define INT_24XX_SDMA_IRQ0 12 | 244 | #define INT_24XX_SDMA_IRQ0 12 |
| @@ -558,9 +477,14 @@ | |||
| 558 | 477 | ||
| 559 | #define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32)) | 478 | #define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32)) |
| 560 | 479 | ||
| 480 | #define INTCPS_NR_MIR_REGS 3 | ||
| 481 | #define INTCPS_NR_IRQS 96 | ||
| 482 | |||
| 561 | #ifndef __ASSEMBLY__ | 483 | #ifndef __ASSEMBLY__ |
| 562 | extern void omap_init_irq(void); | 484 | extern void omap_init_irq(void); |
| 563 | extern int omap_irq_pending(void); | 485 | extern int omap_irq_pending(void); |
| 486 | void omap_intc_save_context(void); | ||
| 487 | void omap_intc_restore_context(void); | ||
| 564 | #endif | 488 | #endif |
| 565 | 489 | ||
| 566 | #include <mach/hardware.h> | 490 | #include <mach/hardware.h> |
diff --git a/arch/arm/plat-omap/include/mach/keypad.h b/arch/arm/plat-omap/include/plat/keypad.h index 3ae52ccc793..3ae52ccc793 100644 --- a/arch/arm/plat-omap/include/mach/keypad.h +++ b/arch/arm/plat-omap/include/plat/keypad.h | |||
diff --git a/arch/arm/plat-omap/include/mach/lcd_mipid.h b/arch/arm/plat-omap/include/plat/lcd_mipid.h index 8e52c657228..8e52c657228 100644 --- a/arch/arm/plat-omap/include/mach/lcd_mipid.h +++ b/arch/arm/plat-omap/include/plat/lcd_mipid.h | |||
diff --git a/arch/arm/plat-omap/include/mach/led.h b/arch/arm/plat-omap/include/plat/led.h index 25e451e7e2f..25e451e7e2f 100644 --- a/arch/arm/plat-omap/include/mach/led.h +++ b/arch/arm/plat-omap/include/plat/led.h | |||
diff --git a/arch/arm/plat-omap/include/mach/mailbox.h b/arch/arm/plat-omap/include/plat/mailbox.h index b7a6991814e..729166b76a7 100644 --- a/arch/arm/plat-omap/include/mach/mailbox.h +++ b/arch/arm/plat-omap/include/plat/mailbox.h | |||
| @@ -6,9 +6,9 @@ | |||
| 6 | #include <linux/wait.h> | 6 | #include <linux/wait.h> |
| 7 | #include <linux/workqueue.h> | 7 | #include <linux/workqueue.h> |
| 8 | #include <linux/blkdev.h> | 8 | #include <linux/blkdev.h> |
| 9 | #include <linux/interrupt.h> | ||
| 9 | 10 | ||
| 10 | typedef u32 mbox_msg_t; | 11 | typedef u32 mbox_msg_t; |
| 11 | typedef void (mbox_receiver_t)(mbox_msg_t msg); | ||
| 12 | struct omap_mbox; | 12 | struct omap_mbox; |
| 13 | 13 | ||
| 14 | typedef int __bitwise omap_mbox_irq_t; | 14 | typedef int __bitwise omap_mbox_irq_t; |
| @@ -29,8 +29,10 @@ struct omap_mbox_ops { | |||
| 29 | int (*fifo_empty)(struct omap_mbox *mbox); | 29 | int (*fifo_empty)(struct omap_mbox *mbox); |
| 30 | int (*fifo_full)(struct omap_mbox *mbox); | 30 | int (*fifo_full)(struct omap_mbox *mbox); |
| 31 | /* irq */ | 31 | /* irq */ |
| 32 | void (*enable_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq); | 32 | void (*enable_irq)(struct omap_mbox *mbox, |
| 33 | void (*disable_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq); | 33 | omap_mbox_irq_t irq); |
| 34 | void (*disable_irq)(struct omap_mbox *mbox, | ||
| 35 | omap_mbox_irq_t irq); | ||
| 34 | void (*ack_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq); | 36 | void (*ack_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq); |
| 35 | int (*is_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq); | 37 | int (*is_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq); |
| 36 | /* ctx */ | 38 | /* ctx */ |
| @@ -42,6 +44,7 @@ struct omap_mbox_queue { | |||
| 42 | spinlock_t lock; | 44 | spinlock_t lock; |
| 43 | struct request_queue *queue; | 45 | struct request_queue *queue; |
| 44 | struct work_struct work; | 46 | struct work_struct work; |
| 47 | struct tasklet_struct tasklet; | ||
| 45 | int (*callback)(void *); | 48 | int (*callback)(void *); |
| 46 | struct omap_mbox *mbox; | 49 | struct omap_mbox *mbox; |
| 47 | }; | 50 | }; |
| @@ -64,7 +67,7 @@ struct omap_mbox { | |||
| 64 | void (*err_notify)(void); | 67 | void (*err_notify)(void); |
| 65 | }; | 68 | }; |
| 66 | 69 | ||
| 67 | int omap_mbox_msg_send(struct omap_mbox *, mbox_msg_t msg, void *); | 70 | int omap_mbox_msg_send(struct omap_mbox *, mbox_msg_t msg); |
| 68 | void omap_mbox_init_seq(struct omap_mbox *); | 71 | void omap_mbox_init_seq(struct omap_mbox *); |
| 69 | 72 | ||
| 70 | struct omap_mbox *omap_mbox_get(const char *); | 73 | struct omap_mbox *omap_mbox_get(const char *); |
| @@ -93,4 +96,16 @@ static inline void omap_mbox_restore_ctx(struct omap_mbox *mbox) | |||
| 93 | mbox->ops->restore_ctx(mbox); | 96 | mbox->ops->restore_ctx(mbox); |
| 94 | } | 97 | } |
| 95 | 98 | ||
| 99 | static inline void omap_mbox_enable_irq(struct omap_mbox *mbox, | ||
| 100 | omap_mbox_irq_t irq) | ||
| 101 | { | ||
| 102 | mbox->ops->enable_irq(mbox, irq); | ||
| 103 | } | ||
| 104 | |||
| 105 | static inline void omap_mbox_disable_irq(struct omap_mbox *mbox, | ||
| 106 | omap_mbox_irq_t irq) | ||
| 107 | { | ||
| 108 | mbox->ops->disable_irq(mbox, irq); | ||
| 109 | } | ||
| 110 | |||
| 96 | #endif /* MAILBOX_H */ | 111 | #endif /* MAILBOX_H */ |
diff --git a/arch/arm/plat-omap/include/mach/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index e0d6eca222c..4f22e5bb7ff 100644 --- a/arch/arm/plat-omap/include/mach/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h | |||
| @@ -28,10 +28,10 @@ | |||
| 28 | #include <linux/spinlock.h> | 28 | #include <linux/spinlock.h> |
| 29 | 29 | ||
| 30 | #include <mach/hardware.h> | 30 | #include <mach/hardware.h> |
| 31 | #include <mach/clock.h> | 31 | #include <plat/clock.h> |
| 32 | 32 | ||
| 33 | #define OMAP730_MCBSP1_BASE 0xfffb1000 | 33 | #define OMAP7XX_MCBSP1_BASE 0xfffb1000 |
| 34 | #define OMAP730_MCBSP2_BASE 0xfffb1800 | 34 | #define OMAP7XX_MCBSP2_BASE 0xfffb1800 |
| 35 | 35 | ||
| 36 | #define OMAP1510_MCBSP1_BASE 0xe1011800 | 36 | #define OMAP1510_MCBSP1_BASE 0xe1011800 |
| 37 | #define OMAP1510_MCBSP2_BASE 0xfffb1000 | 37 | #define OMAP1510_MCBSP2_BASE 0xfffb1000 |
| @@ -58,7 +58,7 @@ | |||
| 58 | #define OMAP44XX_MCBSP3_BASE 0x49026000 | 58 | #define OMAP44XX_MCBSP3_BASE 0x49026000 |
| 59 | #define OMAP44XX_MCBSP4_BASE 0x48074000 | 59 | #define OMAP44XX_MCBSP4_BASE 0x48074000 |
| 60 | 60 | ||
| 61 | #if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP730) | 61 | #if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) |
| 62 | 62 | ||
| 63 | #define OMAP_MCBSP_REG_DRR2 0x00 | 63 | #define OMAP_MCBSP_REG_DRR2 0x00 |
| 64 | #define OMAP_MCBSP_REG_DRR1 0x02 | 64 | #define OMAP_MCBSP_REG_DRR1 0x02 |
diff --git a/arch/arm/plat-omap/include/mach/mcspi.h b/arch/arm/plat-omap/include/plat/mcspi.h index 1254e4945b6..1254e4945b6 100644 --- a/arch/arm/plat-omap/include/mach/mcspi.h +++ b/arch/arm/plat-omap/include/plat/mcspi.h | |||
diff --git a/arch/arm/plat-omap/include/mach/memory.h b/arch/arm/plat-omap/include/plat/memory.h index 9ad41dc484c..3325f7b49ea 100644 --- a/arch/arm/plat-omap/include/mach/memory.h +++ b/arch/arm/plat-omap/include/plat/memory.h | |||
| @@ -68,6 +68,13 @@ | |||
| 68 | __dma = __dma - PHYS_OFFSET + OMAP1510_LB_OFFSET; \ | 68 | __dma = __dma - PHYS_OFFSET + OMAP1510_LB_OFFSET; \ |
| 69 | __dma; }) | 69 | __dma; }) |
| 70 | 70 | ||
| 71 | #define __arch_dma_to_page(dev, addr) \ | ||
| 72 | ({ dma_addr_t __dma = addr; \ | ||
| 73 | if (is_lbus_device(dev)) \ | ||
| 74 | __dma += PHYS_OFFSET - OMAP1510_LB_OFFSET; \ | ||
| 75 | phys_to_page(__dma); \ | ||
| 76 | }) | ||
| 77 | |||
| 71 | #define __arch_dma_to_virt(dev, addr) ({ (void *) (is_lbus_device(dev) ? \ | 78 | #define __arch_dma_to_virt(dev, addr) ({ (void *) (is_lbus_device(dev) ? \ |
| 72 | lbus_to_virt(addr) : \ | 79 | lbus_to_virt(addr) : \ |
| 73 | __phys_to_virt(addr)); }) | 80 | __phys_to_virt(addr)); }) |
diff --git a/arch/arm/plat-omap/include/mach/menelaus.h b/arch/arm/plat-omap/include/plat/menelaus.h index 3122bf68c7c..3122bf68c7c 100644 --- a/arch/arm/plat-omap/include/mach/menelaus.h +++ b/arch/arm/plat-omap/include/plat/menelaus.h | |||
diff --git a/arch/arm/plat-omap/include/mach/mmc.h b/arch/arm/plat-omap/include/plat/mmc.h index 7229b959330..29937137bf3 100644 --- a/arch/arm/plat-omap/include/mach/mmc.h +++ b/arch/arm/plat-omap/include/plat/mmc.h | |||
| @@ -15,7 +15,7 @@ | |||
| 15 | #include <linux/device.h> | 15 | #include <linux/device.h> |
| 16 | #include <linux/mmc/host.h> | 16 | #include <linux/mmc/host.h> |
| 17 | 17 | ||
| 18 | #include <mach/board.h> | 18 | #include <plat/board.h> |
| 19 | 19 | ||
| 20 | #define OMAP15XX_NR_MMC 1 | 20 | #define OMAP15XX_NR_MMC 1 |
| 21 | #define OMAP16XX_NR_MMC 2 | 21 | #define OMAP16XX_NR_MMC 2 |
diff --git a/arch/arm/plat-omap/include/mach/mux.h b/arch/arm/plat-omap/include/plat/mux.h index 0f49d2d563d..ba77de60150 100644 --- a/arch/arm/plat-omap/include/mach/mux.h +++ b/arch/arm/plat-omap/include/plat/mux.h | |||
| @@ -51,23 +51,13 @@ | |||
| 51 | .pu_pd_reg = PU_PD_SEL_##reg, \ | 51 | .pu_pd_reg = PU_PD_SEL_##reg, \ |
| 52 | .pu_pd_val = status, | 52 | .pu_pd_val = status, |
| 53 | 53 | ||
| 54 | #define MUX_REG_730(reg, mode_offset, mode) .mux_reg_name = "OMAP730_IO_CONF_"#reg, \ | 54 | #define MUX_REG_7XX(reg, mode_offset, mode) .mux_reg_name = "OMAP7XX_IO_CONF_"#reg, \ |
| 55 | .mux_reg = OMAP730_IO_CONF_##reg, \ | 55 | .mux_reg = OMAP7XX_IO_CONF_##reg, \ |
| 56 | .mask_offset = mode_offset, \ | 56 | .mask_offset = mode_offset, \ |
| 57 | .mask = mode, | 57 | .mask = mode, |
| 58 | 58 | ||
| 59 | #define PULL_REG_730(reg, bit, status) .pull_name = "OMAP730_IO_CONF_"#reg, \ | 59 | #define PULL_REG_7XX(reg, bit, status) .pull_name = "OMAP7XX_IO_CONF_"#reg, \ |
| 60 | .pull_reg = OMAP730_IO_CONF_##reg, \ | 60 | .pull_reg = OMAP7XX_IO_CONF_##reg, \ |
| 61 | .pull_bit = bit, \ | ||
| 62 | .pull_val = status, | ||
| 63 | |||
| 64 | #define MUX_REG_850(reg, mode_offset, mode) .mux_reg_name = "OMAP850_IO_CONF_"#reg, \ | ||
| 65 | .mux_reg = OMAP850_IO_CONF_##reg, \ | ||
| 66 | .mask_offset = mode_offset, \ | ||
| 67 | .mask = mode, | ||
| 68 | |||
| 69 | #define PULL_REG_850(reg, bit, status) .pull_name = "OMAP850_IO_CONF_"#reg, \ | ||
| 70 | .pull_reg = OMAP850_IO_CONF_##reg, \ | ||
| 71 | .pull_bit = bit, \ | 61 | .pull_bit = bit, \ |
| 72 | .pull_val = status, | 62 | .pull_val = status, |
| 73 | 63 | ||
| @@ -84,21 +74,12 @@ | |||
| 84 | #define PU_PD_REG(reg, status) .pu_pd_reg = PU_PD_SEL_##reg, \ | 74 | #define PU_PD_REG(reg, status) .pu_pd_reg = PU_PD_SEL_##reg, \ |
| 85 | .pu_pd_val = status, | 75 | .pu_pd_val = status, |
| 86 | 76 | ||
| 87 | #define MUX_REG_730(reg, mode_offset, mode) \ | 77 | #define MUX_REG_7XX(reg, mode_offset, mode) \ |
| 88 | .mux_reg = OMAP730_IO_CONF_##reg, \ | 78 | .mux_reg = OMAP7XX_IO_CONF_##reg, \ |
| 89 | .mask_offset = mode_offset, \ | 79 | .mask_offset = mode_offset, \ |
| 90 | .mask = mode, | 80 | .mask = mode, |
| 91 | 81 | ||
| 92 | #define PULL_REG_730(reg, bit, status) .pull_reg = OMAP730_IO_CONF_##reg, \ | 82 | #define PULL_REG_7XX(reg, bit, status) .pull_reg = OMAP7XX_IO_CONF_##reg, \ |
| 93 | .pull_bit = bit, \ | ||
| 94 | .pull_val = status, | ||
| 95 | |||
| 96 | #define MUX_REG_850(reg, mode_offset, mode) \ | ||
| 97 | .mux_reg = OMAP850_IO_CONF_##reg, \ | ||
| 98 | .mask_offset = mode_offset, \ | ||
| 99 | .mask = mode, | ||
| 100 | |||
| 101 | #define PULL_REG_850(reg, bit, status) .pull_reg = OMAP850_IO_CONF_##reg, \ | ||
| 102 | .pull_bit = bit, \ | 83 | .pull_bit = bit, \ |
| 103 | .pull_val = status, | 84 | .pull_val = status, |
| 104 | 85 | ||
| @@ -118,32 +99,21 @@ | |||
| 118 | 99 | ||
| 119 | /* | 100 | /* |
| 120 | * OMAP730/850 has a slightly different config for the pin mux. | 101 | * OMAP730/850 has a slightly different config for the pin mux. |
| 121 | * - config regs are the OMAP730_IO_CONF_x regs (see omap730.h) regs and | 102 | * - config regs are the OMAP7XX_IO_CONF_x regs (see omap730.h) regs and |
| 122 | * not the FUNC_MUX_CTRL_x regs from hardware.h | 103 | * not the FUNC_MUX_CTRL_x regs from hardware.h |
| 123 | * - for pull-up/down, only has one enable bit which is is in the same register | 104 | * - for pull-up/down, only has one enable bit which is is in the same register |
| 124 | * as mux config | 105 | * as mux config |
| 125 | */ | 106 | */ |
| 126 | #define MUX_CFG_730(desc, mux_reg, mode_offset, mode, \ | 107 | #define MUX_CFG_7XX(desc, mux_reg, mode_offset, mode, \ |
| 127 | pull_bit, pull_status, debug_status)\ | ||
| 128 | { \ | ||
| 129 | .name = desc, \ | ||
| 130 | .debug = debug_status, \ | ||
| 131 | MUX_REG_730(mux_reg, mode_offset, mode) \ | ||
| 132 | PULL_REG_730(mux_reg, pull_bit, pull_status) \ | ||
| 133 | PU_PD_REG(NA, 0) \ | ||
| 134 | }, | ||
| 135 | |||
| 136 | #define MUX_CFG_850(desc, mux_reg, mode_offset, mode, \ | ||
| 137 | pull_bit, pull_status, debug_status)\ | 108 | pull_bit, pull_status, debug_status)\ |
| 138 | { \ | 109 | { \ |
| 139 | .name = desc, \ | 110 | .name = desc, \ |
| 140 | .debug = debug_status, \ | 111 | .debug = debug_status, \ |
| 141 | MUX_REG_850(mux_reg, mode_offset, mode) \ | 112 | MUX_REG_7XX(mux_reg, mode_offset, mode) \ |
| 142 | PULL_REG_850(mux_reg, pull_bit, pull_status) \ | 113 | PULL_REG_7XX(mux_reg, pull_bit, pull_status) \ |
| 143 | PU_PD_REG(NA, 0) \ | 114 | PU_PD_REG(NA, 0) \ |
| 144 | }, | 115 | }, |
| 145 | 116 | ||
| 146 | |||
| 147 | #define MUX_CFG_24XX(desc, reg_offset, mode, \ | 117 | #define MUX_CFG_24XX(desc, reg_offset, mode, \ |
| 148 | pull_en, pull_mode, dbg) \ | 118 | pull_en, pull_mode, dbg) \ |
| 149 | { \ | 119 | { \ |
| @@ -232,45 +202,30 @@ struct pin_config { | |||
| 232 | 202 | ||
| 233 | }; | 203 | }; |
| 234 | 204 | ||
| 235 | enum omap730_index { | 205 | enum omap7xx_index { |
| 236 | /* OMAP 730 keyboard */ | 206 | /* OMAP 730 keyboard */ |
| 237 | E2_730_KBR0, | 207 | E2_7XX_KBR0, |
| 238 | J7_730_KBR1, | 208 | J7_7XX_KBR1, |
| 239 | E1_730_KBR2, | 209 | E1_7XX_KBR2, |
| 240 | F3_730_KBR3, | 210 | F3_7XX_KBR3, |
| 241 | D2_730_KBR4, | 211 | D2_7XX_KBR4, |
| 242 | C2_730_KBC0, | 212 | C2_7XX_KBC0, |
| 243 | D3_730_KBC1, | 213 | D3_7XX_KBC1, |
| 244 | E4_730_KBC2, | 214 | E4_7XX_KBC2, |
| 245 | F4_730_KBC3, | 215 | F4_7XX_KBC3, |
| 246 | E3_730_KBC4, | 216 | E3_7XX_KBC4, |
| 247 | 217 | ||
| 248 | /* USB */ | 218 | /* USB */ |
| 249 | AA17_730_USB_DM, | 219 | AA17_7XX_USB_DM, |
| 250 | W16_730_USB_PU_EN, | 220 | W16_7XX_USB_PU_EN, |
| 251 | W17_730_USB_VBUSI, | 221 | W17_7XX_USB_VBUSI, |
| 222 | |||
| 223 | /* MMC */ | ||
| 224 | MMC_7XX_CMD, | ||
| 225 | MMC_7XX_CLK, | ||
| 226 | MMC_7XX_DAT0, | ||
| 252 | }; | 227 | }; |
| 253 | 228 | ||
| 254 | enum omap850_index { | ||
| 255 | /* OMAP 850 keyboard */ | ||
| 256 | E2_850_KBR0, | ||
| 257 | J7_850_KBR1, | ||
| 258 | E1_850_KBR2, | ||
| 259 | F3_850_KBR3, | ||
| 260 | D2_850_KBR4, | ||
| 261 | C2_850_KBC0, | ||
| 262 | D3_850_KBC1, | ||
| 263 | E4_850_KBC2, | ||
| 264 | F4_850_KBC3, | ||
| 265 | E3_850_KBC4, | ||
| 266 | |||
| 267 | /* USB */ | ||
| 268 | AA17_850_USB_DM, | ||
| 269 | W16_850_USB_PU_EN, | ||
| 270 | W17_850_USB_VBUSI, | ||
| 271 | }; | ||
| 272 | |||
| 273 | |||
| 274 | enum omap1xxx_index { | 229 | enum omap1xxx_index { |
| 275 | /* UART1 (BT_UART_GATING)*/ | 230 | /* UART1 (BT_UART_GATING)*/ |
| 276 | UART1_TX = 0, | 231 | UART1_TX = 0, |
| @@ -879,6 +834,10 @@ enum omap34xx_index { | |||
| 879 | AH4_3430_MMC2_DAT1, | 834 | AH4_3430_MMC2_DAT1, |
| 880 | AG4_3430_MMC2_DAT2, | 835 | AG4_3430_MMC2_DAT2, |
| 881 | AF4_3430_MMC2_DAT3, | 836 | AF4_3430_MMC2_DAT3, |
| 837 | AE4_3430_MMC2_DAT4, | ||
| 838 | AH3_3430_MMC2_DAT5, | ||
| 839 | AF3_3430_MMC2_DAT6, | ||
| 840 | AE3_3430_MMC2_DAT7, | ||
| 882 | 841 | ||
| 883 | /* MMC3 */ | 842 | /* MMC3 */ |
| 884 | AF10_3430_MMC3_CLK, | 843 | AF10_3430_MMC3_CLK, |
| @@ -890,6 +849,11 @@ enum omap34xx_index { | |||
| 890 | 849 | ||
| 891 | /* SYS_NIRQ T2 INT1 */ | 850 | /* SYS_NIRQ T2 INT1 */ |
| 892 | AF26_34XX_SYS_NIRQ, | 851 | AF26_34XX_SYS_NIRQ, |
| 852 | |||
| 853 | /* EHCI GPIO's for OMAP3EVM (Rev >= E) */ | ||
| 854 | AH14_34XX_GPIO21, | ||
| 855 | AF9_34XX_GPIO22, | ||
| 856 | U3_34XX_GPIO61, | ||
| 893 | }; | 857 | }; |
| 894 | 858 | ||
| 895 | struct omap_mux_cfg { | 859 | struct omap_mux_cfg { |
diff --git a/arch/arm/plat-omap/include/mach/nand.h b/arch/arm/plat-omap/include/plat/nand.h index 631a7bed1ee..631a7bed1ee 100644 --- a/arch/arm/plat-omap/include/mach/nand.h +++ b/arch/arm/plat-omap/include/plat/nand.h | |||
diff --git a/arch/arm/plat-omap/include/mach/omap-alsa.h b/arch/arm/plat-omap/include/plat/omap-alsa.h index bdf30a0f87f..b53055b390d 100644 --- a/arch/arm/plat-omap/include/mach/omap-alsa.h +++ b/arch/arm/plat-omap/include/plat/omap-alsa.h | |||
| @@ -40,10 +40,10 @@ | |||
| 40 | #ifndef __OMAP_ALSA_H | 40 | #ifndef __OMAP_ALSA_H |
| 41 | #define __OMAP_ALSA_H | 41 | #define __OMAP_ALSA_H |
| 42 | 42 | ||
| 43 | #include <mach/dma.h> | 43 | #include <plat/dma.h> |
| 44 | #include <sound/core.h> | 44 | #include <sound/core.h> |
| 45 | #include <sound/pcm.h> | 45 | #include <sound/pcm.h> |
| 46 | #include <mach/mcbsp.h> | 46 | #include <plat/mcbsp.h> |
| 47 | #include <linux/platform_device.h> | 47 | #include <linux/platform_device.h> |
| 48 | 48 | ||
| 49 | #define DMA_BUF_SIZE (1024 * 8) | 49 | #define DMA_BUF_SIZE (1024 * 8) |
diff --git a/arch/arm/plat-omap/include/mach/omap-pm.h b/arch/arm/plat-omap/include/plat/omap-pm.h index 3ee41d71149..3ee41d71149 100644 --- a/arch/arm/plat-omap/include/mach/omap-pm.h +++ b/arch/arm/plat-omap/include/plat/omap-pm.h | |||
diff --git a/arch/arm/plat-omap/include/mach/omap1510.h b/arch/arm/plat-omap/include/plat/omap1510.h index d2400466813..d2400466813 100644 --- a/arch/arm/plat-omap/include/mach/omap1510.h +++ b/arch/arm/plat-omap/include/plat/omap1510.h | |||
diff --git a/arch/arm/plat-omap/include/mach/omap16xx.h b/arch/arm/plat-omap/include/plat/omap16xx.h index 0e69b504c25..0e69b504c25 100644 --- a/arch/arm/plat-omap/include/mach/omap16xx.h +++ b/arch/arm/plat-omap/include/plat/omap16xx.h | |||
diff --git a/arch/arm/plat-omap/include/mach/omap24xx.h b/arch/arm/plat-omap/include/plat/omap24xx.h index 696edfc145a..696edfc145a 100644 --- a/arch/arm/plat-omap/include/mach/omap24xx.h +++ b/arch/arm/plat-omap/include/plat/omap24xx.h | |||
diff --git a/arch/arm/plat-omap/include/mach/omap34xx.h b/arch/arm/plat-omap/include/plat/omap34xx.h index f8d186a7371..077f05979f8 100644 --- a/arch/arm/plat-omap/include/mach/omap34xx.h +++ b/arch/arm/plat-omap/include/plat/omap34xx.h | |||
| @@ -72,16 +72,15 @@ | |||
| 72 | #define OMAP3430_ISP_CSI2A_END (OMAP3430_ISP_CSI2A_BASE + 0x16F) | 72 | #define OMAP3430_ISP_CSI2A_END (OMAP3430_ISP_CSI2A_BASE + 0x16F) |
| 73 | #define OMAP3430_ISP_CSI2PHY_END (OMAP3430_ISP_CSI2PHY_BASE + 0x007) | 73 | #define OMAP3430_ISP_CSI2PHY_END (OMAP3430_ISP_CSI2PHY_BASE + 0x007) |
| 74 | 74 | ||
| 75 | #define OMAP34XX_IVA_INTC_BASE 0x40000000 | ||
| 76 | #define OMAP34XX_HSUSB_OTG_BASE (L4_34XX_BASE + 0xAB000) | 75 | #define OMAP34XX_HSUSB_OTG_BASE (L4_34XX_BASE + 0xAB000) |
| 77 | #define OMAP34XX_HSUSB_HOST_BASE (L4_34XX_BASE + 0x64000) | ||
| 78 | #define OMAP34XX_USBTLL_BASE (L4_34XX_BASE + 0x62000) | 76 | #define OMAP34XX_USBTLL_BASE (L4_34XX_BASE + 0x62000) |
| 77 | #define OMAP34XX_UHH_CONFIG_BASE (L4_34XX_BASE + 0x64000) | ||
| 78 | #define OMAP34XX_OHCI_BASE (L4_34XX_BASE + 0x64400) | ||
| 79 | #define OMAP34XX_EHCI_BASE (L4_34XX_BASE + 0x64800) | ||
| 80 | #define OMAP34XX_SR1_BASE 0x480C9000 | ||
| 81 | #define OMAP34XX_SR2_BASE 0x480CB000 | ||
| 79 | 82 | ||
| 80 | #define OMAP34XX_MAILBOX_BASE (L4_34XX_BASE + 0x94000) | 83 | #define OMAP34XX_MAILBOX_BASE (L4_34XX_BASE + 0x94000) |
| 81 | 84 | ||
| 82 | #define OMAP34XX_DSP_BASE 0x58000000 | ||
| 83 | #define OMAP34XX_DSP_MEM_BASE (OMAP34XX_DSP_BASE + 0x0) | ||
| 84 | #define OMAP34XX_DSP_IPI_BASE (OMAP34XX_DSP_BASE + 0x1000000) | ||
| 85 | #define OMAP34XX_DSP_MMU_BASE (OMAP34XX_DSP_BASE + 0x2000000) | ||
| 86 | #endif /* __ASM_ARCH_OMAP34XX_H */ | 85 | #endif /* __ASM_ARCH_OMAP34XX_H */ |
| 87 | 86 | ||
diff --git a/arch/arm/plat-omap/include/mach/omap44xx.h b/arch/arm/plat-omap/include/plat/omap44xx.h index b3ba5ac7b4a..e52902a15c1 100644 --- a/arch/arm/plat-omap/include/mach/omap44xx.h +++ b/arch/arm/plat-omap/include/plat/omap44xx.h | |||
| @@ -22,6 +22,9 @@ | |||
| 22 | #define L4_PER_44XX_BASE 0x48000000 | 22 | #define L4_PER_44XX_BASE 0x48000000 |
| 23 | #define L4_EMU_44XX_BASE 0x54000000 | 23 | #define L4_EMU_44XX_BASE 0x54000000 |
| 24 | #define L3_44XX_BASE 0x44000000 | 24 | #define L3_44XX_BASE 0x44000000 |
| 25 | #define OMAP44XX_EMIF1_BASE 0x4c000000 | ||
| 26 | #define OMAP44XX_EMIF2_BASE 0x4d000000 | ||
| 27 | #define OMAP44XX_DMM_BASE 0x4e000000 | ||
| 25 | #define OMAP4430_32KSYNCT_BASE 0x4a304000 | 28 | #define OMAP4430_32KSYNCT_BASE 0x4a304000 |
| 26 | #define OMAP4430_CM_BASE 0x4a004000 | 29 | #define OMAP4430_CM_BASE 0x4a004000 |
| 27 | #define OMAP4430_PRM_BASE 0x48306000 | 30 | #define OMAP4430_PRM_BASE 0x48306000 |
| @@ -33,14 +36,11 @@ | |||
| 33 | #define IRQ_SIR_IRQ 0x0040 | 36 | #define IRQ_SIR_IRQ 0x0040 |
| 34 | #define OMAP44XX_GIC_DIST_BASE 0x48241000 | 37 | #define OMAP44XX_GIC_DIST_BASE 0x48241000 |
| 35 | #define OMAP44XX_GIC_CPU_BASE 0x48240100 | 38 | #define OMAP44XX_GIC_CPU_BASE 0x48240100 |
| 36 | #define OMAP44XX_VA_GIC_CPU_BASE OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE) | ||
| 37 | #define OMAP44XX_SCU_BASE 0x48240000 | 39 | #define OMAP44XX_SCU_BASE 0x48240000 |
| 38 | #define OMAP44XX_VA_SCU_BASE OMAP2_IO_ADDRESS(OMAP44XX_SCU_BASE) | ||
| 39 | #define OMAP44XX_LOCAL_TWD_BASE 0x48240600 | 40 | #define OMAP44XX_LOCAL_TWD_BASE 0x48240600 |
| 40 | #define OMAP44XX_VA_LOCAL_TWD_BASE OMAP2_IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE) | ||
| 41 | #define OMAP44XX_LOCAL_TWD_SIZE 0x00000100 | ||
| 42 | #define OMAP44XX_WKUPGEN_BASE 0x48281000 | 41 | #define OMAP44XX_WKUPGEN_BASE 0x48281000 |
| 43 | #define OMAP44XX_VA_WKUPGEN_BASE OMAP2_IO_ADDRESS(OMAP44XX_WKUPGEN_BASE) | 42 | |
| 43 | #define OMAP44XX_MAILBOX_BASE (L4_44XX_BASE + 0xF4000) | ||
| 44 | 44 | ||
| 45 | #endif /* __ASM_ARCH_OMAP44XX_H */ | 45 | #endif /* __ASM_ARCH_OMAP44XX_H */ |
| 46 | 46 | ||
diff --git a/arch/arm/plat-omap/include/mach/omap730.h b/arch/arm/plat-omap/include/plat/omap730.h index 14272bc1a6f..14272bc1a6f 100644 --- a/arch/arm/plat-omap/include/mach/omap730.h +++ b/arch/arm/plat-omap/include/plat/omap730.h | |||
diff --git a/arch/arm/plat-omap/include/plat/omap7xx.h b/arch/arm/plat-omap/include/plat/omap7xx.h new file mode 100644 index 00000000000..53f52414b0e --- /dev/null +++ b/arch/arm/plat-omap/include/plat/omap7xx.h | |||
| @@ -0,0 +1,104 @@ | |||
| 1 | /* arch/arm/plat-omap/include/mach/omap7xx.h | ||
| 2 | * | ||
| 3 | * Hardware definitions for TI OMAP7XX processor. | ||
| 4 | * | ||
| 5 | * Cleanup for Linux-2.6 by Dirk Behme <dirk.behme@de.bosch.com> | ||
| 6 | * Adapted for omap850 by Zebediah C. McClure <zmc@lurian.net> | ||
| 7 | * Adapted for omap7xx by Alistair Buxton <a.j.buxton@gmail.com> | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify it | ||
| 10 | * under the terms of the GNU General Public License as published by the | ||
| 11 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 12 | * option) any later version. | ||
| 13 | * | ||
| 14 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | ||
| 15 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
| 16 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | ||
| 17 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | ||
| 18 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | ||
| 19 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | ||
| 20 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | ||
| 21 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
| 22 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | ||
| 23 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
| 24 | * | ||
| 25 | * You should have received a copy of the GNU General Public License along | ||
| 26 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
| 27 | * 675 Mass Ave, Cambridge, MA 02139, USA. | ||
| 28 | */ | ||
| 29 | |||
| 30 | #ifndef __ASM_ARCH_OMAP7XX_H | ||
| 31 | #define __ASM_ARCH_OMAP7XX_H | ||
| 32 | |||
| 33 | /* | ||
| 34 | * ---------------------------------------------------------------------------- | ||
| 35 | * Base addresses | ||
| 36 | * ---------------------------------------------------------------------------- | ||
| 37 | */ | ||
| 38 | |||
| 39 | /* Syntax: XX_BASE = Virtual base address, XX_START = Physical base address */ | ||
| 40 | |||
| 41 | #define OMAP7XX_DSP_BASE 0xE0000000 | ||
| 42 | #define OMAP7XX_DSP_SIZE 0x50000 | ||
| 43 | #define OMAP7XX_DSP_START 0xE0000000 | ||
| 44 | |||
| 45 | #define OMAP7XX_DSPREG_BASE 0xE1000000 | ||
| 46 | #define OMAP7XX_DSPREG_SIZE SZ_128K | ||
| 47 | #define OMAP7XX_DSPREG_START 0xE1000000 | ||
| 48 | |||
| 49 | /* | ||
| 50 | * ---------------------------------------------------------------------------- | ||
| 51 | * OMAP7XX specific configuration registers | ||
| 52 | * ---------------------------------------------------------------------------- | ||
| 53 | */ | ||
| 54 | #define OMAP7XX_CONFIG_BASE 0xfffe1000 | ||
| 55 | #define OMAP7XX_IO_CONF_0 0xfffe1070 | ||
| 56 | #define OMAP7XX_IO_CONF_1 0xfffe1074 | ||
| 57 | #define OMAP7XX_IO_CONF_2 0xfffe1078 | ||
| 58 | #define OMAP7XX_IO_CONF_3 0xfffe107c | ||
| 59 | #define OMAP7XX_IO_CONF_4 0xfffe1080 | ||
| 60 | #define OMAP7XX_IO_CONF_5 0xfffe1084 | ||
| 61 | #define OMAP7XX_IO_CONF_6 0xfffe1088 | ||
| 62 | #define OMAP7XX_IO_CONF_7 0xfffe108c | ||
| 63 | #define OMAP7XX_IO_CONF_8 0xfffe1090 | ||
| 64 | #define OMAP7XX_IO_CONF_9 0xfffe1094 | ||
| 65 | #define OMAP7XX_IO_CONF_10 0xfffe1098 | ||
| 66 | #define OMAP7XX_IO_CONF_11 0xfffe109c | ||
| 67 | #define OMAP7XX_IO_CONF_12 0xfffe10a0 | ||
| 68 | #define OMAP7XX_IO_CONF_13 0xfffe10a4 | ||
| 69 | |||
| 70 | #define OMAP7XX_MODE_1 0xfffe1010 | ||
| 71 | #define OMAP7XX_MODE_2 0xfffe1014 | ||
| 72 | |||
| 73 | /* CSMI specials: in terms of base + offset */ | ||
| 74 | #define OMAP7XX_MODE2_OFFSET 0x14 | ||
| 75 | |||
| 76 | /* | ||
| 77 | * ---------------------------------------------------------------------------- | ||
| 78 | * OMAP7XX traffic controller configuration registers | ||
| 79 | * ---------------------------------------------------------------------------- | ||
| 80 | */ | ||
| 81 | #define OMAP7XX_FLASH_CFG_0 0xfffecc10 | ||
| 82 | #define OMAP7XX_FLASH_ACFG_0 0xfffecc50 | ||
| 83 | #define OMAP7XX_FLASH_CFG_1 0xfffecc14 | ||
| 84 | #define OMAP7XX_FLASH_ACFG_1 0xfffecc54 | ||
| 85 | |||
| 86 | /* | ||
| 87 | * ---------------------------------------------------------------------------- | ||
| 88 | * OMAP7XX DSP control registers | ||
| 89 | * ---------------------------------------------------------------------------- | ||
| 90 | */ | ||
| 91 | #define OMAP7XX_ICR_BASE 0xfffbb800 | ||
| 92 | #define OMAP7XX_DSP_M_CTL 0xfffbb804 | ||
| 93 | #define OMAP7XX_DSP_MMU_BASE 0xfffed200 | ||
| 94 | |||
| 95 | /* | ||
| 96 | * ---------------------------------------------------------------------------- | ||
| 97 | * OMAP7XX PCC_UPLD configuration registers | ||
| 98 | * ---------------------------------------------------------------------------- | ||
| 99 | */ | ||
| 100 | #define OMAP7XX_PCC_UPLD_CTRL_BASE (0xfffe0900) | ||
| 101 | #define OMAP7XX_PCC_UPLD_CTRL (OMAP7XX_PCC_UPLD_CTRL_BASE + 0x00) | ||
| 102 | |||
| 103 | #endif /* __ASM_ARCH_OMAP7XX_H */ | ||
| 104 | |||
diff --git a/arch/arm/plat-omap/include/mach/omap850.h b/arch/arm/plat-omap/include/plat/omap850.h index c33f6798171..c33f6798171 100644 --- a/arch/arm/plat-omap/include/mach/omap850.h +++ b/arch/arm/plat-omap/include/plat/omap850.h | |||
diff --git a/arch/arm/plat-omap/include/mach/omap_device.h b/arch/arm/plat-omap/include/plat/omap_device.h index bd0e136db33..11a9773a4e7 100644 --- a/arch/arm/plat-omap/include/mach/omap_device.h +++ b/arch/arm/plat-omap/include/plat/omap_device.h | |||
| @@ -34,7 +34,7 @@ | |||
| 34 | #include <linux/kernel.h> | 34 | #include <linux/kernel.h> |
| 35 | #include <linux/platform_device.h> | 35 | #include <linux/platform_device.h> |
| 36 | 36 | ||
| 37 | #include <mach/omap_hwmod.h> | 37 | #include <plat/omap_hwmod.h> |
| 38 | 38 | ||
| 39 | /* omap_device._state values */ | 39 | /* omap_device._state values */ |
| 40 | #define OMAP_DEVICE_STATE_UNKNOWN 0 | 40 | #define OMAP_DEVICE_STATE_UNKNOWN 0 |
diff --git a/arch/arm/plat-omap/include/mach/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 1f79c20e292..dbdd123eca1 100644 --- a/arch/arm/plat-omap/include/mach/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h | |||
| @@ -35,7 +35,7 @@ | |||
| 35 | #include <linux/kernel.h> | 35 | #include <linux/kernel.h> |
| 36 | #include <linux/ioport.h> | 36 | #include <linux/ioport.h> |
| 37 | 37 | ||
| 38 | #include <mach/cpu.h> | 38 | #include <plat/cpu.h> |
| 39 | 39 | ||
| 40 | struct omap_device; | 40 | struct omap_device; |
| 41 | 41 | ||
diff --git a/arch/arm/plat-omap/include/mach/omapfb.h b/arch/arm/plat-omap/include/plat/omapfb.h index b226bdf4573..bfef7ab95f1 100644 --- a/arch/arm/plat-omap/include/mach/omapfb.h +++ b/arch/arm/plat-omap/include/plat/omapfb.h | |||
| @@ -168,7 +168,7 @@ enum omapfb_update_mode { | |||
| 168 | #include <linux/fb.h> | 168 | #include <linux/fb.h> |
| 169 | #include <linux/mutex.h> | 169 | #include <linux/mutex.h> |
| 170 | 170 | ||
| 171 | #include <mach/board.h> | 171 | #include <plat/board.h> |
| 172 | 172 | ||
| 173 | #define OMAP_LCDC_INV_VSYNC 0x0001 | 173 | #define OMAP_LCDC_INV_VSYNC 0x0001 |
| 174 | #define OMAP_LCDC_INV_HSYNC 0x0002 | 174 | #define OMAP_LCDC_INV_HSYNC 0x0002 |
diff --git a/arch/arm/plat-omap/include/mach/onenand.h b/arch/arm/plat-omap/include/plat/onenand.h index 72f433d7d82..72f433d7d82 100644 --- a/arch/arm/plat-omap/include/mach/onenand.h +++ b/arch/arm/plat-omap/include/plat/onenand.h | |||
diff --git a/arch/arm/plat-omap/include/mach/param.h b/arch/arm/plat-omap/include/plat/param.h index 1eb4dc32697..1eb4dc32697 100644 --- a/arch/arm/plat-omap/include/mach/param.h +++ b/arch/arm/plat-omap/include/plat/param.h | |||
diff --git a/arch/arm/plat-omap/include/mach/powerdomain.h b/arch/arm/plat-omap/include/plat/powerdomain.h index fa6461423bd..3d45ee1d3cf 100644 --- a/arch/arm/plat-omap/include/mach/powerdomain.h +++ b/arch/arm/plat-omap/include/plat/powerdomain.h | |||
| @@ -19,7 +19,7 @@ | |||
| 19 | 19 | ||
| 20 | #include <asm/atomic.h> | 20 | #include <asm/atomic.h> |
| 21 | 21 | ||
| 22 | #include <mach/cpu.h> | 22 | #include <plat/cpu.h> |
| 23 | 23 | ||
| 24 | 24 | ||
| 25 | /* Powerdomain basic power states */ | 25 | /* Powerdomain basic power states */ |
diff --git a/arch/arm/plat-omap/include/mach/prcm.h b/arch/arm/plat-omap/include/plat/prcm.h index cda2a70397b..e63e94e1897 100644 --- a/arch/arm/plat-omap/include/mach/prcm.h +++ b/arch/arm/plat-omap/include/plat/prcm.h | |||
| @@ -27,9 +27,13 @@ u32 omap_prcm_get_reset_sources(void); | |||
| 27 | void omap_prcm_arch_reset(char mode); | 27 | void omap_prcm_arch_reset(char mode); |
| 28 | int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, const char *name); | 28 | int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, const char *name); |
| 29 | 29 | ||
| 30 | #endif | 30 | #define START_PADCONF_SAVE 0x2 |
| 31 | #define PADCONF_SAVE_DONE 0x1 | ||
| 31 | 32 | ||
| 33 | void omap3_prcm_save_context(void); | ||
| 34 | void omap3_prcm_restore_context(void); | ||
| 32 | 35 | ||
| 36 | #endif | ||
| 33 | 37 | ||
| 34 | 38 | ||
| 35 | 39 | ||
diff --git a/arch/arm/plat-omap/include/mach/sdrc.h b/arch/arm/plat-omap/include/plat/sdrc.h index 1c09c78a48f..f704030d2a7 100644 --- a/arch/arm/plat-omap/include/mach/sdrc.h +++ b/arch/arm/plat-omap/include/plat/sdrc.h | |||
| @@ -44,6 +44,12 @@ | |||
| 44 | #define SDRC_RFR_CTRL_1 0x0D4 | 44 | #define SDRC_RFR_CTRL_1 0x0D4 |
| 45 | #define SDRC_MANUAL_1 0x0D8 | 45 | #define SDRC_MANUAL_1 0x0D8 |
| 46 | 46 | ||
| 47 | #define SDRC_POWER_AUTOCOUNT_SHIFT 8 | ||
| 48 | #define SDRC_POWER_AUTOCOUNT_MASK (0xffff << SDRC_POWER_AUTOCOUNT_SHIFT) | ||
| 49 | #define SDRC_POWER_CLKCTRL_SHIFT 4 | ||
| 50 | #define SDRC_POWER_CLKCTRL_MASK (0x3 << SDRC_POWER_CLKCTRL_SHIFT) | ||
| 51 | #define SDRC_SELF_REFRESH_ON_AUTOCOUNT (0x2 << SDRC_POWER_CLKCTRL_SHIFT) | ||
| 52 | |||
| 47 | /* | 53 | /* |
| 48 | * These values represent the number of memory clock cycles between | 54 | * These values represent the number of memory clock cycles between |
| 49 | * autorefresh initiation. They assume 1 refresh per 64 ms (JEDEC), 8192 | 55 | * autorefresh initiation. They assume 1 refresh per 64 ms (JEDEC), 8192 |
| @@ -80,11 +86,11 @@ | |||
| 80 | */ | 86 | */ |
| 81 | 87 | ||
| 82 | #define OMAP242X_SMS_REGADDR(reg) \ | 88 | #define OMAP242X_SMS_REGADDR(reg) \ |
| 83 | (void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE + reg) | 89 | (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE + reg) |
| 84 | #define OMAP243X_SMS_REGADDR(reg) \ | 90 | #define OMAP243X_SMS_REGADDR(reg) \ |
| 85 | (void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE + reg) | 91 | (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE + reg) |
| 86 | #define OMAP343X_SMS_REGADDR(reg) \ | 92 | #define OMAP343X_SMS_REGADDR(reg) \ |
| 87 | (void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE + reg) | 93 | (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE + reg) |
| 88 | 94 | ||
| 89 | /* SMS register offsets - read/write with sms_{read,write}_reg() */ | 95 | /* SMS register offsets - read/write with sms_{read,write}_reg() */ |
| 90 | 96 | ||
| @@ -120,6 +126,8 @@ void __init omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0, | |||
| 120 | int omap2_sdrc_get_params(unsigned long r, | 126 | int omap2_sdrc_get_params(unsigned long r, |
| 121 | struct omap_sdrc_params **sdrc_cs0, | 127 | struct omap_sdrc_params **sdrc_cs0, |
| 122 | struct omap_sdrc_params **sdrc_cs1); | 128 | struct omap_sdrc_params **sdrc_cs1); |
| 129 | void omap2_sms_save_context(void); | ||
| 130 | void omap2_sms_restore_context(void); | ||
| 123 | 131 | ||
| 124 | #ifdef CONFIG_ARCH_OMAP2 | 132 | #ifdef CONFIG_ARCH_OMAP2 |
| 125 | 133 | ||
diff --git a/arch/arm/plat-omap/include/mach/serial.h b/arch/arm/plat-omap/include/plat/serial.h index e249186d26e..9951345a25d 100644 --- a/arch/arm/plat-omap/include/mach/serial.h +++ b/arch/arm/plat-omap/include/plat/serial.h | |||
| @@ -20,26 +20,22 @@ | |||
| 20 | #define OMAP_UART1_BASE 0xfffb0000 | 20 | #define OMAP_UART1_BASE 0xfffb0000 |
| 21 | #define OMAP_UART2_BASE 0xfffb0800 | 21 | #define OMAP_UART2_BASE 0xfffb0800 |
| 22 | #define OMAP_UART3_BASE 0xfffb9800 | 22 | #define OMAP_UART3_BASE 0xfffb9800 |
| 23 | #define OMAP_MAX_NR_PORTS 3 | ||
| 24 | #elif defined(CONFIG_ARCH_OMAP2) | 23 | #elif defined(CONFIG_ARCH_OMAP2) |
| 25 | /* OMAP2 serial ports */ | 24 | /* OMAP2 serial ports */ |
| 26 | #define OMAP_UART1_BASE 0x4806a000 | 25 | #define OMAP_UART1_BASE 0x4806a000 |
| 27 | #define OMAP_UART2_BASE 0x4806c000 | 26 | #define OMAP_UART2_BASE 0x4806c000 |
| 28 | #define OMAP_UART3_BASE 0x4806e000 | 27 | #define OMAP_UART3_BASE 0x4806e000 |
| 29 | #define OMAP_MAX_NR_PORTS 3 | ||
| 30 | #elif defined(CONFIG_ARCH_OMAP3) | 28 | #elif defined(CONFIG_ARCH_OMAP3) |
| 31 | /* OMAP3 serial ports */ | 29 | /* OMAP3 serial ports */ |
| 32 | #define OMAP_UART1_BASE 0x4806a000 | 30 | #define OMAP_UART1_BASE 0x4806a000 |
| 33 | #define OMAP_UART2_BASE 0x4806c000 | 31 | #define OMAP_UART2_BASE 0x4806c000 |
| 34 | #define OMAP_UART3_BASE 0x49020000 | 32 | #define OMAP_UART3_BASE 0x49020000 |
| 35 | #define OMAP_MAX_NR_PORTS 3 | ||
| 36 | #elif defined(CONFIG_ARCH_OMAP4) | 33 | #elif defined(CONFIG_ARCH_OMAP4) |
| 37 | /* OMAP4 serial ports */ | 34 | /* OMAP4 serial ports */ |
| 38 | #define OMAP_UART1_BASE 0x4806a000 | 35 | #define OMAP_UART1_BASE 0x4806a000 |
| 39 | #define OMAP_UART2_BASE 0x4806c000 | 36 | #define OMAP_UART2_BASE 0x4806c000 |
| 40 | #define OMAP_UART3_BASE 0x48020000 | 37 | #define OMAP_UART3_BASE 0x48020000 |
| 41 | #define OMAP_UART4_BASE 0x4806e000 | 38 | #define OMAP_UART4_BASE 0x4806e000 |
| 42 | #define OMAP_MAX_NR_PORTS 4 | ||
| 43 | #endif | 39 | #endif |
| 44 | 40 | ||
| 45 | #define OMAP1510_BASE_BAUD (12000000/16) | 41 | #define OMAP1510_BASE_BAUD (12000000/16) |
diff --git a/arch/arm/plat-omap/include/mach/smp.h b/arch/arm/plat-omap/include/plat/smp.h index dcaa8fde706..dcaa8fde706 100644 --- a/arch/arm/plat-omap/include/mach/smp.h +++ b/arch/arm/plat-omap/include/plat/smp.h | |||
diff --git a/arch/arm/plat-omap/include/mach/sram.h b/arch/arm/plat-omap/include/plat/sram.h index 8974e3fc269..16a1b458d53 100644 --- a/arch/arm/plat-omap/include/mach/sram.h +++ b/arch/arm/plat-omap/include/plat/sram.h | |||
| @@ -27,6 +27,7 @@ extern u32 omap3_configure_core_dpll( | |||
| 27 | u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0, | 27 | u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0, |
| 28 | u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1, | 28 | u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1, |
| 29 | u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1); | 29 | u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1); |
| 30 | extern void omap3_sram_restore_context(void); | ||
| 30 | 31 | ||
| 31 | /* Do not use these */ | 32 | /* Do not use these */ |
| 32 | extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl); | 33 | extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl); |
| @@ -68,4 +69,10 @@ extern u32 omap3_sram_configure_core_dpll( | |||
| 68 | u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1); | 69 | u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1); |
| 69 | extern unsigned long omap3_sram_configure_core_dpll_sz; | 70 | extern unsigned long omap3_sram_configure_core_dpll_sz; |
| 70 | 71 | ||
| 72 | #ifdef CONFIG_PM | ||
| 73 | extern void omap_push_sram_idle(void); | ||
| 74 | #else | ||
| 75 | static inline void omap_push_sram_idle(void) {} | ||
| 76 | #endif /* CONFIG_PM */ | ||
| 77 | |||
| 71 | #endif | 78 | #endif |
diff --git a/arch/arm/plat-omap/include/mach/system.h b/arch/arm/plat-omap/include/plat/system.h index ed8ec747726..c58a4ef42a4 100644 --- a/arch/arm/plat-omap/include/mach/system.h +++ b/arch/arm/plat-omap/include/plat/system.h | |||
| @@ -9,7 +9,7 @@ | |||
| 9 | #include <asm/mach-types.h> | 9 | #include <asm/mach-types.h> |
| 10 | #include <mach/hardware.h> | 10 | #include <mach/hardware.h> |
| 11 | 11 | ||
| 12 | #include <mach/prcm.h> | 12 | #include <plat/prcm.h> |
| 13 | 13 | ||
| 14 | #ifndef CONFIG_MACH_VOICEBLUE | 14 | #ifndef CONFIG_MACH_VOICEBLUE |
| 15 | #define voiceblue_reset() do {} while (0) | 15 | #define voiceblue_reset() do {} while (0) |
diff --git a/arch/arm/plat-omap/include/mach/tc.h b/arch/arm/plat-omap/include/plat/tc.h index d2fcd789bb9..d2fcd789bb9 100644 --- a/arch/arm/plat-omap/include/mach/tc.h +++ b/arch/arm/plat-omap/include/plat/tc.h | |||
diff --git a/arch/arm/plat-omap/include/mach/timer-gp.h b/arch/arm/plat-omap/include/plat/timer-gp.h index c88d346b59d..c88d346b59d 100644 --- a/arch/arm/plat-omap/include/mach/timer-gp.h +++ b/arch/arm/plat-omap/include/plat/timer-gp.h | |||
diff --git a/arch/arm/plat-omap/include/mach/timex.h b/arch/arm/plat-omap/include/plat/timex.h index 6d35767bc48..6d35767bc48 100644 --- a/arch/arm/plat-omap/include/mach/timex.h +++ b/arch/arm/plat-omap/include/plat/timex.h | |||
diff --git a/arch/arm/plat-omap/include/mach/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h index 0814c5f210c..13c305d6212 100644 --- a/arch/arm/plat-omap/include/mach/uncompress.h +++ b/arch/arm/plat-omap/include/plat/uncompress.h | |||
| @@ -19,12 +19,13 @@ | |||
| 19 | 19 | ||
| 20 | #include <linux/types.h> | 20 | #include <linux/types.h> |
| 21 | #include <linux/serial_reg.h> | 21 | #include <linux/serial_reg.h> |
| 22 | #include <mach/serial.h> | 22 | #include <plat/serial.h> |
| 23 | 23 | ||
| 24 | unsigned int system_rev; | 24 | unsigned int system_rev; |
| 25 | 25 | ||
| 26 | #define UART_OMAP_MDR1 0x08 /* mode definition register */ | 26 | #define UART_OMAP_MDR1 0x08 /* mode definition register */ |
| 27 | #define OMAP_ID_730 0x355F | 27 | #define OMAP_ID_730 0x355F |
| 28 | #define OMAP_ID_850 0x362C | ||
| 28 | #define ID_MASK 0x7fff | 29 | #define ID_MASK 0x7fff |
| 29 | #define check_port(base, shift) ((base[UART_OMAP_MDR1 << shift] & 7) == 0) | 30 | #define check_port(base, shift) ((base[UART_OMAP_MDR1 << shift] & 7) == 0) |
| 30 | #define omap_get_id() ((*(volatile unsigned int *)(0xfffed404)) >> 12) & ID_MASK | 31 | #define omap_get_id() ((*(volatile unsigned int *)(0xfffed404)) >> 12) & ID_MASK |
| @@ -43,8 +44,12 @@ static void putc(int c) | |||
| 43 | uart = (volatile u8 *)(OMAP_UART3_BASE); | 44 | uart = (volatile u8 *)(OMAP_UART3_BASE); |
| 44 | #elif defined(CONFIG_OMAP_LL_DEBUG_UART2) | 45 | #elif defined(CONFIG_OMAP_LL_DEBUG_UART2) |
| 45 | uart = (volatile u8 *)(OMAP_UART2_BASE); | 46 | uart = (volatile u8 *)(OMAP_UART2_BASE); |
| 46 | #else | 47 | #elif defined(CONFIG_OMAP_LL_DEBUG_UART1) |
| 47 | uart = (volatile u8 *)(OMAP_UART1_BASE); | 48 | uart = (volatile u8 *)(OMAP_UART1_BASE); |
| 49 | #elif defined(CONFIG_OMAP_LL_DEBUG_NONE) | ||
| 50 | return; | ||
| 51 | #else | ||
| 52 | return; | ||
| 48 | #endif | 53 | #endif |
| 49 | 54 | ||
| 50 | #ifdef CONFIG_ARCH_OMAP1 | 55 | #ifdef CONFIG_ARCH_OMAP1 |
| @@ -53,7 +58,7 @@ static void putc(int c) | |||
| 53 | /* MMU is not on, so cpu_is_omapXXXX() won't work here */ | 58 | /* MMU is not on, so cpu_is_omapXXXX() won't work here */ |
| 54 | unsigned int omap_id = omap_get_id(); | 59 | unsigned int omap_id = omap_get_id(); |
| 55 | 60 | ||
| 56 | if (omap_id == OMAP_ID_730) | 61 | if (omap_id == OMAP_ID_730 || omap_id == OMAP_ID_850) |
| 57 | shift = 0; | 62 | shift = 0; |
| 58 | 63 | ||
| 59 | if (check_port(uart, shift)) | 64 | if (check_port(uart, shift)) |
diff --git a/arch/arm/plat-omap/include/mach/usb.h b/arch/arm/plat-omap/include/plat/usb.h index f337e1761e2..33a500eb2f9 100644 --- a/arch/arm/plat-omap/include/mach/usb.h +++ b/arch/arm/plat-omap/include/plat/usb.h | |||
| @@ -3,7 +3,22 @@ | |||
| 3 | #ifndef __ASM_ARCH_OMAP_USB_H | 3 | #ifndef __ASM_ARCH_OMAP_USB_H |
| 4 | #define __ASM_ARCH_OMAP_USB_H | 4 | #define __ASM_ARCH_OMAP_USB_H |
| 5 | 5 | ||
| 6 | #include <mach/board.h> | 6 | #include <plat/board.h> |
| 7 | |||
| 8 | #define OMAP3_HS_USB_PORTS 3 | ||
| 9 | enum ehci_hcd_omap_mode { | ||
| 10 | EHCI_HCD_OMAP_MODE_UNKNOWN, | ||
| 11 | EHCI_HCD_OMAP_MODE_PHY, | ||
| 12 | EHCI_HCD_OMAP_MODE_TLL, | ||
| 13 | }; | ||
| 14 | |||
| 15 | struct ehci_hcd_omap_platform_data { | ||
| 16 | enum ehci_hcd_omap_mode port_mode[OMAP3_HS_USB_PORTS]; | ||
| 17 | unsigned phy_reset:1; | ||
| 18 | |||
| 19 | /* have to be valid if phy_reset is true and portx is in phy mode */ | ||
| 20 | int reset_gpio_port[OMAP3_HS_USB_PORTS]; | ||
| 21 | }; | ||
| 7 | 22 | ||
| 8 | /*-------------------------------------------------------------------------*/ | 23 | /*-------------------------------------------------------------------------*/ |
| 9 | 24 | ||
| @@ -29,6 +44,8 @@ | |||
| 29 | 44 | ||
| 30 | extern void usb_musb_init(void); | 45 | extern void usb_musb_init(void); |
| 31 | 46 | ||
| 47 | extern void usb_ehci_init(struct ehci_hcd_omap_platform_data *pdata); | ||
| 48 | |||
| 32 | #endif | 49 | #endif |
| 33 | 50 | ||
| 34 | void omap_usb_init(struct omap_usb_config *pdata); | 51 | void omap_usb_init(struct omap_usb_config *pdata); |
diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c index b6defa23e77..11f5d7961c7 100644 --- a/arch/arm/plat-omap/io.c +++ b/arch/arm/plat-omap/io.c | |||
| @@ -13,12 +13,12 @@ | |||
| 13 | #include <linux/io.h> | 13 | #include <linux/io.h> |
| 14 | #include <linux/mm.h> | 14 | #include <linux/mm.h> |
| 15 | 15 | ||
| 16 | #include <mach/omap730.h> | 16 | #include <plat/omap7xx.h> |
| 17 | #include <mach/omap1510.h> | 17 | #include <plat/omap1510.h> |
| 18 | #include <mach/omap16xx.h> | 18 | #include <plat/omap16xx.h> |
| 19 | #include <mach/omap24xx.h> | 19 | #include <plat/omap24xx.h> |
| 20 | #include <mach/omap34xx.h> | 20 | #include <plat/omap34xx.h> |
| 21 | #include <mach/omap44xx.h> | 21 | #include <plat/omap44xx.h> |
| 22 | 22 | ||
| 23 | #define BETWEEN(p,st,sz) ((p) >= (st) && (p) < ((st) + (sz))) | 23 | #define BETWEEN(p,st,sz) ((p) >= (st) && (p) < ((st) + (sz))) |
| 24 | #define XLATE(p,pst,vst) ((void __iomem *)((p) - (pst) + (vst))) | 24 | #define XLATE(p,pst,vst) ((void __iomem *)((p) - (pst) + (vst))) |
| @@ -33,13 +33,13 @@ void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type) | |||
| 33 | if (BETWEEN(p, OMAP1_IO_PHYS, OMAP1_IO_SIZE)) | 33 | if (BETWEEN(p, OMAP1_IO_PHYS, OMAP1_IO_SIZE)) |
| 34 | return XLATE(p, OMAP1_IO_PHYS, OMAP1_IO_VIRT); | 34 | return XLATE(p, OMAP1_IO_PHYS, OMAP1_IO_VIRT); |
| 35 | } | 35 | } |
| 36 | if (cpu_is_omap730()) { | 36 | if (cpu_is_omap7xx()) { |
| 37 | if (BETWEEN(p, OMAP730_DSP_BASE, OMAP730_DSP_SIZE)) | 37 | if (BETWEEN(p, OMAP7XX_DSP_BASE, OMAP7XX_DSP_SIZE)) |
| 38 | return XLATE(p, OMAP730_DSP_BASE, OMAP730_DSP_START); | 38 | return XLATE(p, OMAP7XX_DSP_BASE, OMAP7XX_DSP_START); |
| 39 | 39 | ||
| 40 | if (BETWEEN(p, OMAP730_DSPREG_BASE, OMAP730_DSPREG_SIZE)) | 40 | if (BETWEEN(p, OMAP7XX_DSPREG_BASE, OMAP7XX_DSPREG_SIZE)) |
| 41 | return XLATE(p, OMAP730_DSPREG_BASE, | 41 | return XLATE(p, OMAP7XX_DSPREG_BASE, |
| 42 | OMAP730_DSPREG_START); | 42 | OMAP7XX_DSPREG_START); |
| 43 | } | 43 | } |
| 44 | if (cpu_is_omap15xx()) { | 44 | if (cpu_is_omap15xx()) { |
| 45 | if (BETWEEN(p, OMAP1510_DSP_BASE, OMAP1510_DSP_SIZE)) | 45 | if (BETWEEN(p, OMAP1510_DSP_BASE, OMAP1510_DSP_SIZE)) |
| @@ -114,6 +114,14 @@ void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type) | |||
| 114 | return XLATE(p, L4_WK_44XX_PHYS, L4_WK_44XX_VIRT); | 114 | return XLATE(p, L4_WK_44XX_PHYS, L4_WK_44XX_VIRT); |
| 115 | if (BETWEEN(p, OMAP44XX_GPMC_PHYS, OMAP44XX_GPMC_SIZE)) | 115 | if (BETWEEN(p, OMAP44XX_GPMC_PHYS, OMAP44XX_GPMC_SIZE)) |
| 116 | return XLATE(p, OMAP44XX_GPMC_PHYS, OMAP44XX_GPMC_VIRT); | 116 | return XLATE(p, OMAP44XX_GPMC_PHYS, OMAP44XX_GPMC_VIRT); |
| 117 | if (BETWEEN(p, OMAP44XX_EMIF1_PHYS, OMAP44XX_EMIF1_SIZE)) | ||
| 118 | return XLATE(p, OMAP44XX_EMIF1_PHYS, \ | ||
| 119 | OMAP44XX_EMIF1_VIRT); | ||
| 120 | if (BETWEEN(p, OMAP44XX_EMIF2_PHYS, OMAP44XX_EMIF2_SIZE)) | ||
| 121 | return XLATE(p, OMAP44XX_EMIF2_PHYS, \ | ||
| 122 | OMAP44XX_EMIF2_VIRT); | ||
| 123 | if (BETWEEN(p, OMAP44XX_DMM_PHYS, OMAP44XX_DMM_SIZE)) | ||
| 124 | return XLATE(p, OMAP44XX_DMM_PHYS, OMAP44XX_DMM_VIRT); | ||
| 117 | if (BETWEEN(p, L4_PER_44XX_PHYS, L4_PER_44XX_SIZE)) | 125 | if (BETWEEN(p, L4_PER_44XX_PHYS, L4_PER_44XX_SIZE)) |
| 118 | return XLATE(p, L4_PER_44XX_PHYS, L4_PER_44XX_VIRT); | 126 | return XLATE(p, L4_PER_44XX_PHYS, L4_PER_44XX_VIRT); |
| 119 | if (BETWEEN(p, L4_EMU_44XX_PHYS, L4_EMU_44XX_SIZE)) | 127 | if (BETWEEN(p, L4_EMU_44XX_PHYS, L4_EMU_44XX_SIZE)) |
| @@ -142,7 +150,7 @@ u8 omap_readb(u32 pa) | |||
| 142 | if (cpu_class_is_omap1()) | 150 | if (cpu_class_is_omap1()) |
| 143 | return __raw_readb(OMAP1_IO_ADDRESS(pa)); | 151 | return __raw_readb(OMAP1_IO_ADDRESS(pa)); |
| 144 | else | 152 | else |
| 145 | return __raw_readb(OMAP2_IO_ADDRESS(pa)); | 153 | return __raw_readb(OMAP2_L4_IO_ADDRESS(pa)); |
| 146 | } | 154 | } |
| 147 | EXPORT_SYMBOL(omap_readb); | 155 | EXPORT_SYMBOL(omap_readb); |
| 148 | 156 | ||
| @@ -151,7 +159,7 @@ u16 omap_readw(u32 pa) | |||
| 151 | if (cpu_class_is_omap1()) | 159 | if (cpu_class_is_omap1()) |
| 152 | return __raw_readw(OMAP1_IO_ADDRESS(pa)); | 160 | return __raw_readw(OMAP1_IO_ADDRESS(pa)); |
| 153 | else | 161 | else |
| 154 | return __raw_readw(OMAP2_IO_ADDRESS(pa)); | 162 | return __raw_readw(OMAP2_L4_IO_ADDRESS(pa)); |
| 155 | } | 163 | } |
| 156 | EXPORT_SYMBOL(omap_readw); | 164 | EXPORT_SYMBOL(omap_readw); |
| 157 | 165 | ||
| @@ -160,7 +168,7 @@ u32 omap_readl(u32 pa) | |||
| 160 | if (cpu_class_is_omap1()) | 168 | if (cpu_class_is_omap1()) |
| 161 | return __raw_readl(OMAP1_IO_ADDRESS(pa)); | 169 | return __raw_readl(OMAP1_IO_ADDRESS(pa)); |
| 162 | else | 170 | else |
| 163 | return __raw_readl(OMAP2_IO_ADDRESS(pa)); | 171 | return __raw_readl(OMAP2_L4_IO_ADDRESS(pa)); |
| 164 | } | 172 | } |
| 165 | EXPORT_SYMBOL(omap_readl); | 173 | EXPORT_SYMBOL(omap_readl); |
| 166 | 174 | ||
| @@ -169,7 +177,7 @@ void omap_writeb(u8 v, u32 pa) | |||
| 169 | if (cpu_class_is_omap1()) | 177 | if (cpu_class_is_omap1()) |
| 170 | __raw_writeb(v, OMAP1_IO_ADDRESS(pa)); | 178 | __raw_writeb(v, OMAP1_IO_ADDRESS(pa)); |
| 171 | else | 179 | else |
| 172 | __raw_writeb(v, OMAP2_IO_ADDRESS(pa)); | 180 | __raw_writeb(v, OMAP2_L4_IO_ADDRESS(pa)); |
| 173 | } | 181 | } |
| 174 | EXPORT_SYMBOL(omap_writeb); | 182 | EXPORT_SYMBOL(omap_writeb); |
| 175 | 183 | ||
| @@ -178,7 +186,7 @@ void omap_writew(u16 v, u32 pa) | |||
| 178 | if (cpu_class_is_omap1()) | 186 | if (cpu_class_is_omap1()) |
| 179 | __raw_writew(v, OMAP1_IO_ADDRESS(pa)); | 187 | __raw_writew(v, OMAP1_IO_ADDRESS(pa)); |
| 180 | else | 188 | else |
| 181 | __raw_writew(v, OMAP2_IO_ADDRESS(pa)); | 189 | __raw_writew(v, OMAP2_L4_IO_ADDRESS(pa)); |
| 182 | } | 190 | } |
| 183 | EXPORT_SYMBOL(omap_writew); | 191 | EXPORT_SYMBOL(omap_writew); |
| 184 | 192 | ||
| @@ -187,6 +195,6 @@ void omap_writel(u32 v, u32 pa) | |||
| 187 | if (cpu_class_is_omap1()) | 195 | if (cpu_class_is_omap1()) |
| 188 | __raw_writel(v, OMAP1_IO_ADDRESS(pa)); | 196 | __raw_writel(v, OMAP1_IO_ADDRESS(pa)); |
| 189 | else | 197 | else |
| 190 | __raw_writel(v, OMAP2_IO_ADDRESS(pa)); | 198 | __raw_writel(v, OMAP2_L4_IO_ADDRESS(pa)); |
| 191 | } | 199 | } |
| 192 | EXPORT_SYMBOL(omap_writel); | 200 | EXPORT_SYMBOL(omap_writel); |
diff --git a/arch/arm/plat-omap/iommu-debug.c b/arch/arm/plat-omap/iommu-debug.c index c799b3b0d70..afd1c27cff7 100644 --- a/arch/arm/plat-omap/iommu-debug.c +++ b/arch/arm/plat-omap/iommu-debug.c | |||
| @@ -17,8 +17,8 @@ | |||
| 17 | #include <linux/platform_device.h> | 17 | #include <linux/platform_device.h> |
| 18 | #include <linux/debugfs.h> | 18 | #include <linux/debugfs.h> |
| 19 | 19 | ||
| 20 | #include <mach/iommu.h> | 20 | #include <plat/iommu.h> |
| 21 | #include <mach/iovmm.h> | 21 | #include <plat/iovmm.h> |
| 22 | 22 | ||
| 23 | #include "iopgtable.h" | 23 | #include "iopgtable.h" |
| 24 | 24 | ||
diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c index 94584f167a8..c0ff1e39d89 100644 --- a/arch/arm/plat-omap/iommu.c +++ b/arch/arm/plat-omap/iommu.c | |||
| @@ -20,7 +20,7 @@ | |||
| 20 | 20 | ||
| 21 | #include <asm/cacheflush.h> | 21 | #include <asm/cacheflush.h> |
| 22 | 22 | ||
| 23 | #include <mach/iommu.h> | 23 | #include <plat/iommu.h> |
| 24 | 24 | ||
| 25 | #include "iopgtable.h" | 25 | #include "iopgtable.h" |
| 26 | 26 | ||
diff --git a/arch/arm/plat-omap/iovmm.c b/arch/arm/plat-omap/iovmm.c index dc3fac3dd0e..936aef1971c 100644 --- a/arch/arm/plat-omap/iovmm.c +++ b/arch/arm/plat-omap/iovmm.c | |||
| @@ -18,8 +18,8 @@ | |||
| 18 | #include <asm/cacheflush.h> | 18 | #include <asm/cacheflush.h> |
| 19 | #include <asm/mach/map.h> | 19 | #include <asm/mach/map.h> |
| 20 | 20 | ||
| 21 | #include <mach/iommu.h> | 21 | #include <plat/iommu.h> |
| 22 | #include <mach/iovmm.h> | 22 | #include <plat/iovmm.h> |
| 23 | 23 | ||
| 24 | #include "iopgtable.h" | 24 | #include "iopgtable.h" |
| 25 | 25 | ||
| @@ -392,7 +392,6 @@ static void sgtable_fill_vmalloc(struct sg_table *sgt, void *_va) | |||
| 392 | } | 392 | } |
| 393 | 393 | ||
| 394 | va_end = _va + PAGE_SIZE * i; | 394 | va_end = _va + PAGE_SIZE * i; |
| 395 | flush_cache_vmap((unsigned long)_va, (unsigned long)va_end); | ||
| 396 | } | 395 | } |
| 397 | 396 | ||
| 398 | static inline void sgtable_drain_vmalloc(struct sg_table *sgt) | 397 | static inline void sgtable_drain_vmalloc(struct sg_table *sgt) |
| @@ -427,8 +426,6 @@ static void sgtable_fill_kmalloc(struct sg_table *sgt, u32 pa, size_t len) | |||
| 427 | len -= bytes; | 426 | len -= bytes; |
| 428 | } | 427 | } |
| 429 | BUG_ON(len); | 428 | BUG_ON(len); |
| 430 | |||
| 431 | clean_dcache_area(va, len); | ||
| 432 | } | 429 | } |
| 433 | 430 | ||
| 434 | static inline void sgtable_drain_kmalloc(struct sg_table *sgt) | 431 | static inline void sgtable_drain_kmalloc(struct sg_table *sgt) |
| @@ -449,7 +446,7 @@ static int map_iovm_area(struct iommu *obj, struct iovm_struct *new, | |||
| 449 | struct scatterlist *sg; | 446 | struct scatterlist *sg; |
| 450 | u32 da = new->da_start; | 447 | u32 da = new->da_start; |
| 451 | 448 | ||
| 452 | if (!obj || !new || !sgt) | 449 | if (!obj || !sgt) |
| 453 | return -EINVAL; | 450 | return -EINVAL; |
| 454 | 451 | ||
| 455 | BUG_ON(!sgtable_ok(sgt)); | 452 | BUG_ON(!sgtable_ok(sgt)); |
| @@ -617,7 +614,7 @@ u32 iommu_vmap(struct iommu *obj, u32 da, const struct sg_table *sgt, | |||
| 617 | u32 flags) | 614 | u32 flags) |
| 618 | { | 615 | { |
| 619 | size_t bytes; | 616 | size_t bytes; |
| 620 | void *va; | 617 | void *va = NULL; |
| 621 | 618 | ||
| 622 | if (!obj || !obj->dev || !sgt) | 619 | if (!obj || !obj->dev || !sgt) |
| 623 | return -EINVAL; | 620 | return -EINVAL; |
| @@ -627,9 +624,11 @@ u32 iommu_vmap(struct iommu *obj, u32 da, const struct sg_table *sgt, | |||
| 627 | return -EINVAL; | 624 | return -EINVAL; |
| 628 | bytes = PAGE_ALIGN(bytes); | 625 | bytes = PAGE_ALIGN(bytes); |
| 629 | 626 | ||
| 630 | va = vmap_sg(sgt); | 627 | if (flags & IOVMF_MMIO) { |
| 631 | if (IS_ERR(va)) | 628 | va = vmap_sg(sgt); |
| 632 | return PTR_ERR(va); | 629 | if (IS_ERR(va)) |
| 630 | return PTR_ERR(va); | ||
| 631 | } | ||
| 633 | 632 | ||
| 634 | flags &= IOVMF_HW_MASK; | 633 | flags &= IOVMF_HW_MASK; |
| 635 | flags |= IOVMF_DISCONT; | 634 | flags |= IOVMF_DISCONT; |
diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c index 40424edae93..8e90633e4cb 100644 --- a/arch/arm/plat-omap/mailbox.c +++ b/arch/arm/plat-omap/mailbox.c | |||
| @@ -26,55 +26,12 @@ | |||
| 26 | #include <linux/device.h> | 26 | #include <linux/device.h> |
| 27 | #include <linux/delay.h> | 27 | #include <linux/delay.h> |
| 28 | 28 | ||
| 29 | #include <mach/mailbox.h> | 29 | #include <plat/mailbox.h> |
| 30 | |||
| 31 | static int enable_seq_bit; | ||
| 32 | module_param(enable_seq_bit, bool, 0); | ||
| 33 | MODULE_PARM_DESC(enable_seq_bit, "Enable sequence bit checking."); | ||
| 34 | 30 | ||
| 35 | static struct omap_mbox *mboxes; | 31 | static struct omap_mbox *mboxes; |
| 36 | static DEFINE_RWLOCK(mboxes_lock); | 32 | static DEFINE_RWLOCK(mboxes_lock); |
| 37 | 33 | ||
| 38 | /* | 34 | static int mbox_configured; |
| 39 | * Mailbox sequence bit API | ||
| 40 | */ | ||
| 41 | |||
| 42 | /* seq_rcv should be initialized with any value other than | ||
| 43 | * 0 and 1 << 31, to allow either value for the first | ||
| 44 | * message. */ | ||
| 45 | static inline void mbox_seq_init(struct omap_mbox *mbox) | ||
| 46 | { | ||
| 47 | if (!enable_seq_bit) | ||
| 48 | return; | ||
| 49 | |||
| 50 | /* any value other than 0 and 1 << 31 */ | ||
| 51 | mbox->seq_rcv = 0xffffffff; | ||
| 52 | } | ||
| 53 | |||
| 54 | static inline void mbox_seq_toggle(struct omap_mbox *mbox, mbox_msg_t * msg) | ||
| 55 | { | ||
| 56 | if (!enable_seq_bit) | ||
| 57 | return; | ||
| 58 | |||
| 59 | /* add seq_snd to msg */ | ||
| 60 | *msg = (*msg & 0x7fffffff) | mbox->seq_snd; | ||
| 61 | /* flip seq_snd */ | ||
| 62 | mbox->seq_snd ^= 1 << 31; | ||
| 63 | } | ||
| 64 | |||
| 65 | static inline int mbox_seq_test(struct omap_mbox *mbox, mbox_msg_t msg) | ||
| 66 | { | ||
| 67 | mbox_msg_t seq; | ||
| 68 | |||
| 69 | if (!enable_seq_bit) | ||
| 70 | return 0; | ||
| 71 | |||
| 72 | seq = msg & (1 << 31); | ||
| 73 | if (seq == mbox->seq_rcv) | ||
| 74 | return -1; | ||
| 75 | mbox->seq_rcv = seq; | ||
| 76 | return 0; | ||
| 77 | } | ||
| 78 | 35 | ||
| 79 | /* Mailbox FIFO handle functions */ | 36 | /* Mailbox FIFO handle functions */ |
| 80 | static inline mbox_msg_t mbox_fifo_read(struct omap_mbox *mbox) | 37 | static inline mbox_msg_t mbox_fifo_read(struct omap_mbox *mbox) |
| @@ -95,14 +52,6 @@ static inline int mbox_fifo_full(struct omap_mbox *mbox) | |||
| 95 | } | 52 | } |
| 96 | 53 | ||
| 97 | /* Mailbox IRQ handle functions */ | 54 | /* Mailbox IRQ handle functions */ |
| 98 | static inline void enable_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) | ||
| 99 | { | ||
| 100 | mbox->ops->enable_irq(mbox, irq); | ||
| 101 | } | ||
| 102 | static inline void disable_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) | ||
| 103 | { | ||
| 104 | mbox->ops->disable_irq(mbox, irq); | ||
| 105 | } | ||
| 106 | static inline void ack_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) | 55 | static inline void ack_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) |
| 107 | { | 56 | { |
| 108 | if (mbox->ops->ack_irq) | 57 | if (mbox->ops->ack_irq) |
| @@ -113,17 +62,10 @@ static inline int is_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) | |||
| 113 | return mbox->ops->is_irq(mbox, irq); | 62 | return mbox->ops->is_irq(mbox, irq); |
| 114 | } | 63 | } |
| 115 | 64 | ||
| 116 | /* Mailbox Sequence Bit function */ | ||
| 117 | void omap_mbox_init_seq(struct omap_mbox *mbox) | ||
| 118 | { | ||
| 119 | mbox_seq_init(mbox); | ||
| 120 | } | ||
| 121 | EXPORT_SYMBOL(omap_mbox_init_seq); | ||
| 122 | |||
| 123 | /* | 65 | /* |
| 124 | * message sender | 66 | * message sender |
| 125 | */ | 67 | */ |
| 126 | static int __mbox_msg_send(struct omap_mbox *mbox, mbox_msg_t msg, void *arg) | 68 | static int __mbox_msg_send(struct omap_mbox *mbox, mbox_msg_t msg) |
| 127 | { | 69 | { |
| 128 | int ret = 0, i = 1000; | 70 | int ret = 0, i = 1000; |
| 129 | 71 | ||
| @@ -134,89 +76,49 @@ static int __mbox_msg_send(struct omap_mbox *mbox, mbox_msg_t msg, void *arg) | |||
| 134 | return -1; | 76 | return -1; |
| 135 | udelay(1); | 77 | udelay(1); |
| 136 | } | 78 | } |
| 137 | |||
| 138 | if (arg && mbox->txq->callback) { | ||
| 139 | ret = mbox->txq->callback(arg); | ||
| 140 | if (ret) | ||
| 141 | goto out; | ||
| 142 | } | ||
| 143 | |||
| 144 | mbox_seq_toggle(mbox, &msg); | ||
| 145 | mbox_fifo_write(mbox, msg); | 79 | mbox_fifo_write(mbox, msg); |
| 146 | out: | ||
| 147 | return ret; | 80 | return ret; |
| 148 | } | 81 | } |
| 149 | 82 | ||
| 150 | struct omap_msg_tx_data { | ||
| 151 | mbox_msg_t msg; | ||
| 152 | void *arg; | ||
| 153 | }; | ||
| 154 | 83 | ||
| 155 | static void omap_msg_tx_end_io(struct request *rq, int error) | 84 | int omap_mbox_msg_send(struct omap_mbox *mbox, mbox_msg_t msg) |
| 156 | { | 85 | { |
| 157 | kfree(rq->special); | ||
| 158 | __blk_put_request(rq->q, rq); | ||
| 159 | } | ||
| 160 | 86 | ||
| 161 | int omap_mbox_msg_send(struct omap_mbox *mbox, mbox_msg_t msg, void* arg) | ||
| 162 | { | ||
| 163 | struct omap_msg_tx_data *tx_data; | ||
| 164 | struct request *rq; | 87 | struct request *rq; |
| 165 | struct request_queue *q = mbox->txq->queue; | 88 | struct request_queue *q = mbox->txq->queue; |
| 166 | 89 | ||
| 167 | tx_data = kmalloc(sizeof(*tx_data), GFP_ATOMIC); | ||
| 168 | if (unlikely(!tx_data)) | ||
| 169 | return -ENOMEM; | ||
| 170 | |||
| 171 | rq = blk_get_request(q, WRITE, GFP_ATOMIC); | 90 | rq = blk_get_request(q, WRITE, GFP_ATOMIC); |
| 172 | if (unlikely(!rq)) { | 91 | if (unlikely(!rq)) |
| 173 | kfree(tx_data); | ||
| 174 | return -ENOMEM; | 92 | return -ENOMEM; |
| 175 | } | ||
| 176 | 93 | ||
| 177 | tx_data->msg = msg; | 94 | blk_insert_request(q, rq, 0, (void *) msg); |
| 178 | tx_data->arg = arg; | 95 | tasklet_schedule(&mbox->txq->tasklet); |
| 179 | rq->end_io = omap_msg_tx_end_io; | ||
| 180 | blk_insert_request(q, rq, 0, tx_data); | ||
| 181 | 96 | ||
| 182 | schedule_work(&mbox->txq->work); | ||
| 183 | return 0; | 97 | return 0; |
| 184 | } | 98 | } |
| 185 | EXPORT_SYMBOL(omap_mbox_msg_send); | 99 | EXPORT_SYMBOL(omap_mbox_msg_send); |
| 186 | 100 | ||
| 187 | static void mbox_tx_work(struct work_struct *work) | 101 | static void mbox_tx_tasklet(unsigned long tx_data) |
| 188 | { | 102 | { |
| 189 | int ret; | 103 | int ret; |
| 190 | struct request *rq; | 104 | struct request *rq; |
| 191 | struct omap_mbox_queue *mq = container_of(work, | 105 | struct omap_mbox *mbox = (struct omap_mbox *)tx_data; |
| 192 | struct omap_mbox_queue, work); | ||
| 193 | struct omap_mbox *mbox = mq->queue->queuedata; | ||
| 194 | struct request_queue *q = mbox->txq->queue; | 106 | struct request_queue *q = mbox->txq->queue; |
| 195 | 107 | ||
| 196 | while (1) { | 108 | while (1) { |
| 197 | struct omap_msg_tx_data *tx_data; | ||
| 198 | 109 | ||
| 199 | spin_lock(q->queue_lock); | ||
| 200 | rq = blk_fetch_request(q); | 110 | rq = blk_fetch_request(q); |
| 201 | spin_unlock(q->queue_lock); | ||
| 202 | 111 | ||
| 203 | if (!rq) | 112 | if (!rq) |
| 204 | break; | 113 | break; |
| 205 | 114 | ||
| 206 | tx_data = rq->special; | 115 | ret = __mbox_msg_send(mbox, (mbox_msg_t)rq->special); |
| 207 | |||
| 208 | ret = __mbox_msg_send(mbox, tx_data->msg, tx_data->arg); | ||
| 209 | if (ret) { | 116 | if (ret) { |
| 210 | enable_mbox_irq(mbox, IRQ_TX); | 117 | omap_mbox_enable_irq(mbox, IRQ_TX); |
| 211 | spin_lock(q->queue_lock); | ||
| 212 | blk_requeue_request(q, rq); | 118 | blk_requeue_request(q, rq); |
| 213 | spin_unlock(q->queue_lock); | ||
| 214 | return; | 119 | return; |
| 215 | } | 120 | } |
| 216 | 121 | blk_end_request_all(rq, 0); | |
| 217 | spin_lock(q->queue_lock); | ||
| 218 | __blk_end_request_all(rq, 0); | ||
| 219 | spin_unlock(q->queue_lock); | ||
| 220 | } | 122 | } |
| 221 | } | 123 | } |
| 222 | 124 | ||
| @@ -233,11 +135,6 @@ static void mbox_rx_work(struct work_struct *work) | |||
| 233 | mbox_msg_t msg; | 135 | mbox_msg_t msg; |
| 234 | unsigned long flags; | 136 | unsigned long flags; |
| 235 | 137 | ||
| 236 | if (mbox->rxq->callback == NULL) { | ||
| 237 | sysfs_notify(&mbox->dev->kobj, NULL, "mbox"); | ||
| 238 | return; | ||
| 239 | } | ||
| 240 | |||
| 241 | while (1) { | 138 | while (1) { |
| 242 | spin_lock_irqsave(q->queue_lock, flags); | 139 | spin_lock_irqsave(q->queue_lock, flags); |
| 243 | rq = blk_fetch_request(q); | 140 | rq = blk_fetch_request(q); |
| @@ -254,19 +151,19 @@ static void mbox_rx_work(struct work_struct *work) | |||
| 254 | /* | 151 | /* |
| 255 | * Mailbox interrupt handler | 152 | * Mailbox interrupt handler |
| 256 | */ | 153 | */ |
| 257 | static void mbox_txq_fn(struct request_queue * q) | 154 | static void mbox_txq_fn(struct request_queue *q) |
| 258 | { | 155 | { |
| 259 | } | 156 | } |
| 260 | 157 | ||
| 261 | static void mbox_rxq_fn(struct request_queue * q) | 158 | static void mbox_rxq_fn(struct request_queue *q) |
| 262 | { | 159 | { |
| 263 | } | 160 | } |
| 264 | 161 | ||
| 265 | static void __mbox_tx_interrupt(struct omap_mbox *mbox) | 162 | static void __mbox_tx_interrupt(struct omap_mbox *mbox) |
| 266 | { | 163 | { |
| 267 | disable_mbox_irq(mbox, IRQ_TX); | 164 | omap_mbox_disable_irq(mbox, IRQ_TX); |
| 268 | ack_mbox_irq(mbox, IRQ_TX); | 165 | ack_mbox_irq(mbox, IRQ_TX); |
| 269 | schedule_work(&mbox->txq->work); | 166 | tasklet_schedule(&mbox->txq->tasklet); |
| 270 | } | 167 | } |
| 271 | 168 | ||
| 272 | static void __mbox_rx_interrupt(struct omap_mbox *mbox) | 169 | static void __mbox_rx_interrupt(struct omap_mbox *mbox) |
| @@ -275,8 +172,6 @@ static void __mbox_rx_interrupt(struct omap_mbox *mbox) | |||
| 275 | mbox_msg_t msg; | 172 | mbox_msg_t msg; |
| 276 | struct request_queue *q = mbox->rxq->queue; | 173 | struct request_queue *q = mbox->rxq->queue; |
| 277 | 174 | ||
| 278 | disable_mbox_irq(mbox, IRQ_RX); | ||
| 279 | |||
| 280 | while (!mbox_fifo_empty(mbox)) { | 175 | while (!mbox_fifo_empty(mbox)) { |
| 281 | rq = blk_get_request(q, WRITE, GFP_ATOMIC); | 176 | rq = blk_get_request(q, WRITE, GFP_ATOMIC); |
| 282 | if (unlikely(!rq)) | 177 | if (unlikely(!rq)) |
| @@ -284,11 +179,6 @@ static void __mbox_rx_interrupt(struct omap_mbox *mbox) | |||
| 284 | 179 | ||
| 285 | msg = mbox_fifo_read(mbox); | 180 | msg = mbox_fifo_read(mbox); |
| 286 | 181 | ||
| 287 | if (unlikely(mbox_seq_test(mbox, msg))) { | ||
| 288 | pr_info("mbox: Illegal seq bit!(%08x)\n", msg); | ||
| 289 | if (mbox->err_notify) | ||
| 290 | mbox->err_notify(); | ||
| 291 | } | ||
| 292 | 182 | ||
| 293 | blk_insert_request(q, rq, 0, (void *)msg); | 183 | blk_insert_request(q, rq, 0, (void *)msg); |
| 294 | if (mbox->ops->type == OMAP_MBOX_TYPE1) | 184 | if (mbox->ops->type == OMAP_MBOX_TYPE1) |
| @@ -297,7 +187,6 @@ static void __mbox_rx_interrupt(struct omap_mbox *mbox) | |||
| 297 | 187 | ||
| 298 | /* no more messages in the fifo. clear IRQ source. */ | 188 | /* no more messages in the fifo. clear IRQ source. */ |
| 299 | ack_mbox_irq(mbox, IRQ_RX); | 189 | ack_mbox_irq(mbox, IRQ_RX); |
| 300 | enable_mbox_irq(mbox, IRQ_RX); | ||
| 301 | nomem: | 190 | nomem: |
| 302 | schedule_work(&mbox->rxq->work); | 191 | schedule_work(&mbox->rxq->work); |
| 303 | } | 192 | } |
| @@ -315,76 +204,10 @@ static irqreturn_t mbox_interrupt(int irq, void *p) | |||
| 315 | return IRQ_HANDLED; | 204 | return IRQ_HANDLED; |
| 316 | } | 205 | } |
| 317 | 206 | ||
| 318 | /* | ||
| 319 | * sysfs files | ||
| 320 | */ | ||
| 321 | static ssize_t | ||
| 322 | omap_mbox_write(struct device *dev, struct device_attribute *attr, | ||
| 323 | const char * buf, size_t count) | ||
| 324 | { | ||
| 325 | int ret; | ||
| 326 | mbox_msg_t *p = (mbox_msg_t *)buf; | ||
| 327 | struct omap_mbox *mbox = dev_get_drvdata(dev); | ||
| 328 | |||
| 329 | for (; count >= sizeof(mbox_msg_t); count -= sizeof(mbox_msg_t)) { | ||
| 330 | ret = omap_mbox_msg_send(mbox, be32_to_cpu(*p), NULL); | ||
| 331 | if (ret) | ||
| 332 | return -EAGAIN; | ||
| 333 | p++; | ||
| 334 | } | ||
| 335 | |||
| 336 | return (size_t)((char *)p - buf); | ||
| 337 | } | ||
| 338 | |||
| 339 | static ssize_t | ||
| 340 | omap_mbox_read(struct device *dev, struct device_attribute *attr, char *buf) | ||
| 341 | { | ||
| 342 | unsigned long flags; | ||
| 343 | struct request *rq; | ||
| 344 | mbox_msg_t *p = (mbox_msg_t *) buf; | ||
| 345 | struct omap_mbox *mbox = dev_get_drvdata(dev); | ||
| 346 | struct request_queue *q = mbox->rxq->queue; | ||
| 347 | |||
| 348 | while (1) { | ||
| 349 | spin_lock_irqsave(q->queue_lock, flags); | ||
| 350 | rq = blk_fetch_request(q); | ||
| 351 | spin_unlock_irqrestore(q->queue_lock, flags); | ||
| 352 | |||
| 353 | if (!rq) | ||
| 354 | break; | ||
| 355 | |||
| 356 | *p = (mbox_msg_t)rq->special; | ||
| 357 | |||
| 358 | blk_end_request_all(rq, 0); | ||
| 359 | |||
| 360 | if (unlikely(mbox_seq_test(mbox, *p))) { | ||
| 361 | pr_info("mbox: Illegal seq bit!(%08x) ignored\n", *p); | ||
| 362 | continue; | ||
| 363 | } | ||
| 364 | p++; | ||
| 365 | } | ||
| 366 | |||
| 367 | pr_debug("%02x %02x %02x %02x\n", buf[0], buf[1], buf[2], buf[3]); | ||
| 368 | |||
| 369 | return (size_t) ((char *)p - buf); | ||
| 370 | } | ||
| 371 | |||
| 372 | static DEVICE_ATTR(mbox, S_IRUGO | S_IWUSR, omap_mbox_read, omap_mbox_write); | ||
| 373 | |||
| 374 | static ssize_t mbox_show(struct class *class, char *buf) | ||
| 375 | { | ||
| 376 | return sprintf(buf, "mbox"); | ||
| 377 | } | ||
| 378 | |||
| 379 | static CLASS_ATTR(mbox, S_IRUGO, mbox_show, NULL); | ||
| 380 | |||
| 381 | static struct class omap_mbox_class = { | ||
| 382 | .name = "omap-mailbox", | ||
| 383 | }; | ||
| 384 | |||
| 385 | static struct omap_mbox_queue *mbox_queue_alloc(struct omap_mbox *mbox, | 207 | static struct omap_mbox_queue *mbox_queue_alloc(struct omap_mbox *mbox, |
| 386 | request_fn_proc * proc, | 208 | request_fn_proc *proc, |
| 387 | void (*work) (struct work_struct *)) | 209 | void (*work) (struct work_struct *), |
| 210 | void (*tasklet)(unsigned long)) | ||
| 388 | { | 211 | { |
| 389 | struct request_queue *q; | 212 | struct request_queue *q; |
| 390 | struct omap_mbox_queue *mq; | 213 | struct omap_mbox_queue *mq; |
| @@ -401,8 +224,11 @@ static struct omap_mbox_queue *mbox_queue_alloc(struct omap_mbox *mbox, | |||
| 401 | q->queuedata = mbox; | 224 | q->queuedata = mbox; |
| 402 | mq->queue = q; | 225 | mq->queue = q; |
| 403 | 226 | ||
| 404 | INIT_WORK(&mq->work, work); | 227 | if (work) |
| 228 | INIT_WORK(&mq->work, work); | ||
| 405 | 229 | ||
| 230 | if (tasklet) | ||
| 231 | tasklet_init(&mq->tasklet, tasklet, (unsigned long)mbox); | ||
| 406 | return mq; | 232 | return mq; |
| 407 | error: | 233 | error: |
| 408 | kfree(mq); | 234 | kfree(mq); |
| @@ -415,18 +241,25 @@ static void mbox_queue_free(struct omap_mbox_queue *q) | |||
| 415 | kfree(q); | 241 | kfree(q); |
| 416 | } | 242 | } |
| 417 | 243 | ||
| 418 | static int omap_mbox_init(struct omap_mbox *mbox) | 244 | static int omap_mbox_startup(struct omap_mbox *mbox) |
| 419 | { | 245 | { |
| 420 | int ret; | 246 | int ret = 0; |
| 421 | struct omap_mbox_queue *mq; | 247 | struct omap_mbox_queue *mq; |
| 422 | 248 | ||
| 423 | if (likely(mbox->ops->startup)) { | 249 | if (likely(mbox->ops->startup)) { |
| 424 | ret = mbox->ops->startup(mbox); | 250 | write_lock(&mboxes_lock); |
| 425 | if (unlikely(ret)) | 251 | if (!mbox_configured) |
| 252 | ret = mbox->ops->startup(mbox); | ||
| 253 | |||
| 254 | if (unlikely(ret)) { | ||
| 255 | write_unlock(&mboxes_lock); | ||
| 426 | return ret; | 256 | return ret; |
| 257 | } | ||
| 258 | mbox_configured++; | ||
| 259 | write_unlock(&mboxes_lock); | ||
| 427 | } | 260 | } |
| 428 | 261 | ||
| 429 | ret = request_irq(mbox->irq, mbox_interrupt, IRQF_DISABLED, | 262 | ret = request_irq(mbox->irq, mbox_interrupt, IRQF_SHARED, |
| 430 | mbox->name, mbox); | 263 | mbox->name, mbox); |
| 431 | if (unlikely(ret)) { | 264 | if (unlikely(ret)) { |
| 432 | printk(KERN_ERR | 265 | printk(KERN_ERR |
| @@ -434,14 +267,14 @@ static int omap_mbox_init(struct omap_mbox *mbox) | |||
| 434 | goto fail_request_irq; | 267 | goto fail_request_irq; |
| 435 | } | 268 | } |
| 436 | 269 | ||
| 437 | mq = mbox_queue_alloc(mbox, mbox_txq_fn, mbox_tx_work); | 270 | mq = mbox_queue_alloc(mbox, mbox_txq_fn, NULL, mbox_tx_tasklet); |
| 438 | if (!mq) { | 271 | if (!mq) { |
| 439 | ret = -ENOMEM; | 272 | ret = -ENOMEM; |
| 440 | goto fail_alloc_txq; | 273 | goto fail_alloc_txq; |
| 441 | } | 274 | } |
| 442 | mbox->txq = mq; | 275 | mbox->txq = mq; |
| 443 | 276 | ||
| 444 | mq = mbox_queue_alloc(mbox, mbox_rxq_fn, mbox_rx_work); | 277 | mq = mbox_queue_alloc(mbox, mbox_rxq_fn, mbox_rx_work, NULL); |
| 445 | if (!mq) { | 278 | if (!mq) { |
| 446 | ret = -ENOMEM; | 279 | ret = -ENOMEM; |
| 447 | goto fail_alloc_rxq; | 280 | goto fail_alloc_rxq; |
| @@ -468,8 +301,14 @@ static void omap_mbox_fini(struct omap_mbox *mbox) | |||
| 468 | 301 | ||
| 469 | free_irq(mbox->irq, mbox); | 302 | free_irq(mbox->irq, mbox); |
| 470 | 303 | ||
| 471 | if (unlikely(mbox->ops->shutdown)) | 304 | if (unlikely(mbox->ops->shutdown)) { |
| 472 | mbox->ops->shutdown(mbox); | 305 | write_lock(&mboxes_lock); |
| 306 | if (mbox_configured > 0) | ||
| 307 | mbox_configured--; | ||
| 308 | if (!mbox_configured) | ||
| 309 | mbox->ops->shutdown(mbox); | ||
| 310 | write_unlock(&mboxes_lock); | ||
| 311 | } | ||
| 473 | } | 312 | } |
| 474 | 313 | ||
| 475 | static struct omap_mbox **find_mboxes(const char *name) | 314 | static struct omap_mbox **find_mboxes(const char *name) |
| @@ -498,7 +337,7 @@ struct omap_mbox *omap_mbox_get(const char *name) | |||
| 498 | 337 | ||
| 499 | read_unlock(&mboxes_lock); | 338 | read_unlock(&mboxes_lock); |
| 500 | 339 | ||
| 501 | ret = omap_mbox_init(mbox); | 340 | ret = omap_mbox_startup(mbox); |
| 502 | if (ret) | 341 | if (ret) |
| 503 | return ERR_PTR(-ENODEV); | 342 | return ERR_PTR(-ENODEV); |
| 504 | 343 | ||
| @@ -522,15 +361,6 @@ int omap_mbox_register(struct device *parent, struct omap_mbox *mbox) | |||
| 522 | if (mbox->next) | 361 | if (mbox->next) |
| 523 | return -EBUSY; | 362 | return -EBUSY; |
| 524 | 363 | ||
| 525 | mbox->dev = device_create(&omap_mbox_class, | ||
| 526 | parent, 0, mbox, "%s", mbox->name); | ||
| 527 | if (IS_ERR(mbox->dev)) | ||
| 528 | return PTR_ERR(mbox->dev); | ||
| 529 | |||
| 530 | ret = device_create_file(mbox->dev, &dev_attr_mbox); | ||
| 531 | if (ret) | ||
| 532 | goto err_sysfs; | ||
| 533 | |||
| 534 | write_lock(&mboxes_lock); | 364 | write_lock(&mboxes_lock); |
| 535 | tmp = find_mboxes(mbox->name); | 365 | tmp = find_mboxes(mbox->name); |
| 536 | if (*tmp) { | 366 | if (*tmp) { |
| @@ -544,9 +374,6 @@ int omap_mbox_register(struct device *parent, struct omap_mbox *mbox) | |||
| 544 | return 0; | 374 | return 0; |
| 545 | 375 | ||
| 546 | err_find: | 376 | err_find: |
| 547 | device_remove_file(mbox->dev, &dev_attr_mbox); | ||
| 548 | err_sysfs: | ||
| 549 | device_unregister(mbox->dev); | ||
| 550 | return ret; | 377 | return ret; |
| 551 | } | 378 | } |
| 552 | EXPORT_SYMBOL(omap_mbox_register); | 379 | EXPORT_SYMBOL(omap_mbox_register); |
| @@ -562,8 +389,6 @@ int omap_mbox_unregister(struct omap_mbox *mbox) | |||
| 562 | *tmp = mbox->next; | 389 | *tmp = mbox->next; |
| 563 | mbox->next = NULL; | 390 | mbox->next = NULL; |
| 564 | write_unlock(&mboxes_lock); | 391 | write_unlock(&mboxes_lock); |
| 565 | device_remove_file(mbox->dev, &dev_attr_mbox); | ||
| 566 | device_unregister(mbox->dev); | ||
| 567 | return 0; | 392 | return 0; |
| 568 | } | 393 | } |
| 569 | tmp = &(*tmp)->next; | 394 | tmp = &(*tmp)->next; |
| @@ -574,23 +399,16 @@ int omap_mbox_unregister(struct omap_mbox *mbox) | |||
| 574 | } | 399 | } |
| 575 | EXPORT_SYMBOL(omap_mbox_unregister); | 400 | EXPORT_SYMBOL(omap_mbox_unregister); |
| 576 | 401 | ||
| 577 | static int __init omap_mbox_class_init(void) | 402 | static int __init omap_mbox_init(void) |
| 578 | { | 403 | { |
| 579 | int ret = class_register(&omap_mbox_class); | 404 | return 0; |
| 580 | if (!ret) | ||
| 581 | ret = class_create_file(&omap_mbox_class, &class_attr_mbox); | ||
| 582 | |||
| 583 | return ret; | ||
| 584 | } | 405 | } |
| 406 | module_init(omap_mbox_init); | ||
| 585 | 407 | ||
| 586 | static void __exit omap_mbox_class_exit(void) | 408 | static void __exit omap_mbox_exit(void) |
| 587 | { | 409 | { |
| 588 | class_remove_file(&omap_mbox_class, &class_attr_mbox); | ||
| 589 | class_unregister(&omap_mbox_class); | ||
| 590 | } | 410 | } |
| 591 | 411 | module_exit(omap_mbox_exit); | |
| 592 | subsys_initcall(omap_mbox_class_init); | ||
| 593 | module_exit(omap_mbox_class_exit); | ||
| 594 | 412 | ||
| 595 | MODULE_LICENSE("GPL v2"); | 413 | MODULE_LICENSE("GPL v2"); |
| 596 | MODULE_DESCRIPTION("omap mailbox: interrupt driven messaging"); | 414 | MODULE_DESCRIPTION("omap mailbox: interrupt driven messaging"); |
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index e664b912d7b..2cc1cc328ba 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c | |||
| @@ -24,8 +24,8 @@ | |||
| 24 | #include <linux/delay.h> | 24 | #include <linux/delay.h> |
| 25 | #include <linux/io.h> | 25 | #include <linux/io.h> |
| 26 | 26 | ||
| 27 | #include <mach/dma.h> | 27 | #include <plat/dma.h> |
| 28 | #include <mach/mcbsp.h> | 28 | #include <plat/mcbsp.h> |
| 29 | 29 | ||
| 30 | struct omap_mcbsp **mcbsp_ptr; | 30 | struct omap_mcbsp **mcbsp_ptr; |
| 31 | int omap_mcbsp_count; | 31 | int omap_mcbsp_count; |
| @@ -298,9 +298,7 @@ int omap_mcbsp_get_dma_op_mode(unsigned int id) | |||
| 298 | } | 298 | } |
| 299 | mcbsp = id_to_mcbsp_ptr(id); | 299 | mcbsp = id_to_mcbsp_ptr(id); |
| 300 | 300 | ||
| 301 | spin_lock_irq(&mcbsp->lock); | ||
| 302 | dma_op_mode = mcbsp->dma_op_mode; | 301 | dma_op_mode = mcbsp->dma_op_mode; |
| 303 | spin_unlock_irq(&mcbsp->lock); | ||
| 304 | 302 | ||
| 305 | return dma_op_mode; | 303 | return dma_op_mode; |
| 306 | } | 304 | } |
| @@ -318,7 +316,6 @@ static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp) | |||
| 318 | syscon = OMAP_MCBSP_READ(mcbsp->io_base, SYSCON); | 316 | syscon = OMAP_MCBSP_READ(mcbsp->io_base, SYSCON); |
| 319 | syscon &= ~(ENAWAKEUP | SIDLEMODE(0x03) | CLOCKACTIVITY(0x03)); | 317 | syscon &= ~(ENAWAKEUP | SIDLEMODE(0x03) | CLOCKACTIVITY(0x03)); |
| 320 | 318 | ||
| 321 | spin_lock_irq(&mcbsp->lock); | ||
| 322 | if (mcbsp->dma_op_mode == MCBSP_DMA_MODE_THRESHOLD) { | 319 | if (mcbsp->dma_op_mode == MCBSP_DMA_MODE_THRESHOLD) { |
| 323 | syscon |= (ENAWAKEUP | SIDLEMODE(0x02) | | 320 | syscon |= (ENAWAKEUP | SIDLEMODE(0x02) | |
| 324 | CLOCKACTIVITY(0x02)); | 321 | CLOCKACTIVITY(0x02)); |
| @@ -327,7 +324,6 @@ static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp) | |||
| 327 | } else { | 324 | } else { |
| 328 | syscon |= SIDLEMODE(0x01); | 325 | syscon |= SIDLEMODE(0x01); |
| 329 | } | 326 | } |
| 330 | spin_unlock_irq(&mcbsp->lock); | ||
| 331 | 327 | ||
| 332 | OMAP_MCBSP_WRITE(mcbsp->io_base, SYSCON, syscon); | 328 | OMAP_MCBSP_WRITE(mcbsp->io_base, SYSCON, syscon); |
| 333 | } | 329 | } |
| @@ -1145,9 +1141,7 @@ static ssize_t dma_op_mode_show(struct device *dev, | |||
| 1145 | ssize_t len = 0; | 1141 | ssize_t len = 0; |
| 1146 | const char * const *s; | 1142 | const char * const *s; |
| 1147 | 1143 | ||
| 1148 | spin_lock_irq(&mcbsp->lock); | ||
| 1149 | dma_op_mode = mcbsp->dma_op_mode; | 1144 | dma_op_mode = mcbsp->dma_op_mode; |
| 1150 | spin_unlock_irq(&mcbsp->lock); | ||
| 1151 | 1145 | ||
| 1152 | for (s = &dma_op_modes[i]; i < ARRAY_SIZE(dma_op_modes); s++, i++) { | 1146 | for (s = &dma_op_modes[i]; i < ARRAY_SIZE(dma_op_modes); s++, i++) { |
| 1153 | if (dma_op_mode == i) | 1147 | if (dma_op_mode == i) |
diff --git a/arch/arm/plat-omap/mux.c b/arch/arm/plat-omap/mux.c index 8d329fb2074..05aebcad215 100644 --- a/arch/arm/plat-omap/mux.c +++ b/arch/arm/plat-omap/mux.c | |||
| @@ -28,7 +28,7 @@ | |||
| 28 | #include <linux/io.h> | 28 | #include <linux/io.h> |
| 29 | #include <asm/system.h> | 29 | #include <asm/system.h> |
| 30 | #include <linux/spinlock.h> | 30 | #include <linux/spinlock.h> |
| 31 | #include <mach/mux.h> | 31 | #include <plat/mux.h> |
| 32 | 32 | ||
| 33 | #ifdef CONFIG_OMAP_MUX | 33 | #ifdef CONFIG_OMAP_MUX |
| 34 | 34 | ||
diff --git a/arch/arm/plat-omap/omap-pm-noop.c b/arch/arm/plat-omap/omap-pm-noop.c index e98f0a2a6c2..186bca82cfa 100644 --- a/arch/arm/plat-omap/omap-pm-noop.c +++ b/arch/arm/plat-omap/omap-pm-noop.c | |||
| @@ -22,9 +22,9 @@ | |||
| 22 | #include <linux/device.h> | 22 | #include <linux/device.h> |
| 23 | 23 | ||
| 24 | /* Interface documentation is in mach/omap-pm.h */ | 24 | /* Interface documentation is in mach/omap-pm.h */ |
| 25 | #include <mach/omap-pm.h> | 25 | #include <plat/omap-pm.h> |
| 26 | 26 | ||
| 27 | #include <mach/powerdomain.h> | 27 | #include <plat/powerdomain.h> |
| 28 | 28 | ||
| 29 | struct omap_opp *dsp_opps; | 29 | struct omap_opp *dsp_opps; |
| 30 | struct omap_opp *mpu_opps; | 30 | struct omap_opp *mpu_opps; |
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c index 2c409fc6dd2..bb16e624a55 100644 --- a/arch/arm/plat-omap/omap_device.c +++ b/arch/arm/plat-omap/omap_device.c | |||
| @@ -82,8 +82,8 @@ | |||
| 82 | #include <linux/err.h> | 82 | #include <linux/err.h> |
| 83 | #include <linux/io.h> | 83 | #include <linux/io.h> |
| 84 | 84 | ||
| 85 | #include <mach/omap_device.h> | 85 | #include <plat/omap_device.h> |
| 86 | #include <mach/omap_hwmod.h> | 86 | #include <plat/omap_hwmod.h> |
| 87 | 87 | ||
| 88 | /* These parameters are passed to _omap_device_{de,}activate() */ | 88 | /* These parameters are passed to _omap_device_{de,}activate() */ |
| 89 | #define USE_WAKEUP_LAT 0 | 89 | #define USE_WAKEUP_LAT 0 |
| @@ -103,21 +103,6 @@ | |||
| 103 | /* Private functions */ | 103 | /* Private functions */ |
| 104 | 104 | ||
| 105 | /** | 105 | /** |
| 106 | * _read_32ksynct - read the OMAP 32K sync timer | ||
| 107 | * | ||
| 108 | * Returns the current value of the 32KiHz synchronization counter. | ||
| 109 | * XXX this should be generalized to simply read the system clocksource. | ||
| 110 | * XXX this should be moved to a separate synctimer32k.c file | ||
| 111 | */ | ||
| 112 | static u32 _read_32ksynct(void) | ||
| 113 | { | ||
| 114 | if (!cpu_class_is_omap2()) | ||
| 115 | BUG(); | ||
| 116 | |||
| 117 | return __raw_readl(OMAP2_IO_ADDRESS(OMAP_32KSYNCT_BASE + 0x010)); | ||
| 118 | } | ||
| 119 | |||
| 120 | /** | ||
| 121 | * _omap_device_activate - increase device readiness | 106 | * _omap_device_activate - increase device readiness |
| 122 | * @od: struct omap_device * | 107 | * @od: struct omap_device * |
| 123 | * @ignore_lat: increase to latency target (0) or full readiness (1)? | 108 | * @ignore_lat: increase to latency target (0) or full readiness (1)? |
| @@ -133,13 +118,13 @@ static u32 _read_32ksynct(void) | |||
| 133 | */ | 118 | */ |
| 134 | static int _omap_device_activate(struct omap_device *od, u8 ignore_lat) | 119 | static int _omap_device_activate(struct omap_device *od, u8 ignore_lat) |
| 135 | { | 120 | { |
| 136 | u32 a, b; | 121 | struct timespec a, b, c; |
| 137 | 122 | ||
| 138 | pr_debug("omap_device: %s: activating\n", od->pdev.name); | 123 | pr_debug("omap_device: %s: activating\n", od->pdev.name); |
| 139 | 124 | ||
| 140 | while (od->pm_lat_level > 0) { | 125 | while (od->pm_lat_level > 0) { |
| 141 | struct omap_device_pm_latency *odpl; | 126 | struct omap_device_pm_latency *odpl; |
| 142 | int act_lat = 0; | 127 | unsigned long long act_lat = 0; |
| 143 | 128 | ||
| 144 | od->pm_lat_level--; | 129 | od->pm_lat_level--; |
| 145 | 130 | ||
| @@ -149,20 +134,22 @@ static int _omap_device_activate(struct omap_device *od, u8 ignore_lat) | |||
| 149 | (od->dev_wakeup_lat <= od->_dev_wakeup_lat_limit)) | 134 | (od->dev_wakeup_lat <= od->_dev_wakeup_lat_limit)) |
| 150 | break; | 135 | break; |
| 151 | 136 | ||
| 152 | a = _read_32ksynct(); | 137 | getnstimeofday(&a); |
| 153 | 138 | ||
| 154 | /* XXX check return code */ | 139 | /* XXX check return code */ |
| 155 | odpl->activate_func(od); | 140 | odpl->activate_func(od); |
| 156 | 141 | ||
| 157 | b = _read_32ksynct(); | 142 | getnstimeofday(&b); |
| 158 | 143 | ||
| 159 | act_lat = (b - a) >> 15; /* 32KiHz cycles to microseconds */ | 144 | c = timespec_sub(b, a); |
| 145 | act_lat = timespec_to_ns(&c) * NSEC_PER_USEC; | ||
| 160 | 146 | ||
| 161 | pr_debug("omap_device: %s: pm_lat %d: activate: elapsed time " | 147 | pr_debug("omap_device: %s: pm_lat %d: activate: elapsed time " |
| 162 | "%d usec\n", od->pdev.name, od->pm_lat_level, act_lat); | 148 | "%llu usec\n", od->pdev.name, od->pm_lat_level, |
| 149 | act_lat); | ||
| 163 | 150 | ||
| 164 | WARN(act_lat > odpl->activate_lat, "omap_device: %s.%d: " | 151 | WARN(act_lat > odpl->activate_lat, "omap_device: %s.%d: " |
| 165 | "activate step %d took longer than expected (%d > %d)\n", | 152 | "activate step %d took longer than expected (%llu > %d)\n", |
| 166 | od->pdev.name, od->pdev.id, od->pm_lat_level, | 153 | od->pdev.name, od->pdev.id, od->pm_lat_level, |
| 167 | act_lat, odpl->activate_lat); | 154 | act_lat, odpl->activate_lat); |
| 168 | 155 | ||
| @@ -188,13 +175,13 @@ static int _omap_device_activate(struct omap_device *od, u8 ignore_lat) | |||
| 188 | */ | 175 | */ |
| 189 | static int _omap_device_deactivate(struct omap_device *od, u8 ignore_lat) | 176 | static int _omap_device_deactivate(struct omap_device *od, u8 ignore_lat) |
| 190 | { | 177 | { |
| 191 | u32 a, b; | 178 | struct timespec a, b, c; |
| 192 | 179 | ||
| 193 | pr_debug("omap_device: %s: deactivating\n", od->pdev.name); | 180 | pr_debug("omap_device: %s: deactivating\n", od->pdev.name); |
| 194 | 181 | ||
| 195 | while (od->pm_lat_level < od->pm_lats_cnt) { | 182 | while (od->pm_lat_level < od->pm_lats_cnt) { |
| 196 | struct omap_device_pm_latency *odpl; | 183 | struct omap_device_pm_latency *odpl; |
| 197 | int deact_lat = 0; | 184 | unsigned long long deact_lat = 0; |
| 198 | 185 | ||
| 199 | odpl = od->pm_lats + od->pm_lat_level; | 186 | odpl = od->pm_lats + od->pm_lat_level; |
| 200 | 187 | ||
| @@ -203,23 +190,24 @@ static int _omap_device_deactivate(struct omap_device *od, u8 ignore_lat) | |||
| 203 | od->_dev_wakeup_lat_limit)) | 190 | od->_dev_wakeup_lat_limit)) |
| 204 | break; | 191 | break; |
| 205 | 192 | ||
| 206 | a = _read_32ksynct(); | 193 | getnstimeofday(&a); |
| 207 | 194 | ||
| 208 | /* XXX check return code */ | 195 | /* XXX check return code */ |
| 209 | odpl->deactivate_func(od); | 196 | odpl->deactivate_func(od); |
| 210 | 197 | ||
| 211 | b = _read_32ksynct(); | 198 | getnstimeofday(&b); |
| 212 | 199 | ||
| 213 | deact_lat = (b - a) >> 15; /* 32KiHz cycles to microseconds */ | 200 | c = timespec_sub(b, a); |
| 201 | deact_lat = timespec_to_ns(&c) * NSEC_PER_USEC; | ||
| 214 | 202 | ||
| 215 | pr_debug("omap_device: %s: pm_lat %d: deactivate: elapsed time " | 203 | pr_debug("omap_device: %s: pm_lat %d: deactivate: elapsed time " |
| 216 | "%d usec\n", od->pdev.name, od->pm_lat_level, | 204 | "%llu usec\n", od->pdev.name, od->pm_lat_level, |
| 217 | deact_lat); | 205 | deact_lat); |
| 218 | 206 | ||
| 219 | WARN(deact_lat > odpl->deactivate_lat, "omap_device: %s.%d: " | 207 | WARN(deact_lat > odpl->deactivate_lat, "omap_device: %s.%d: " |
| 220 | "deactivate step %d took longer than expected (%d > %d)\n", | 208 | "deactivate step %d took longer than expected " |
| 221 | od->pdev.name, od->pdev.id, od->pm_lat_level, | 209 | "(%llu > %d)\n", od->pdev.name, od->pdev.id, |
| 222 | deact_lat, odpl->deactivate_lat); | 210 | od->pm_lat_level, deact_lat, odpl->deactivate_lat); |
| 223 | 211 | ||
| 224 | od->dev_wakeup_lat += odpl->activate_lat; | 212 | od->dev_wakeup_lat += odpl->activate_lat; |
| 225 | 213 | ||
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c index 75d1f26e5b1..3e923668778 100644 --- a/arch/arm/plat-omap/sram.c +++ b/arch/arm/plat-omap/sram.c | |||
| @@ -25,11 +25,11 @@ | |||
| 25 | 25 | ||
| 26 | #include <asm/mach/map.h> | 26 | #include <asm/mach/map.h> |
| 27 | 27 | ||
| 28 | #include <mach/sram.h> | 28 | #include <plat/sram.h> |
| 29 | #include <mach/board.h> | 29 | #include <plat/board.h> |
| 30 | #include <mach/cpu.h> | 30 | #include <plat/cpu.h> |
| 31 | 31 | ||
| 32 | #include <mach/control.h> | 32 | #include <plat/control.h> |
| 33 | 33 | ||
| 34 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) | 34 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) |
| 35 | # include "../mach-omap2/prm.h" | 35 | # include "../mach-omap2/prm.h" |
| @@ -41,14 +41,14 @@ | |||
| 41 | #define OMAP1_SRAM_VA VMALLOC_END | 41 | #define OMAP1_SRAM_VA VMALLOC_END |
| 42 | #define OMAP2_SRAM_PA 0x40200000 | 42 | #define OMAP2_SRAM_PA 0x40200000 |
| 43 | #define OMAP2_SRAM_PUB_PA 0x4020f800 | 43 | #define OMAP2_SRAM_PUB_PA 0x4020f800 |
| 44 | #define OMAP2_SRAM_VA 0xe3000000 | 44 | #define OMAP2_SRAM_VA 0xfe400000 |
| 45 | #define OMAP2_SRAM_PUB_VA (OMAP2_SRAM_VA + 0x800) | 45 | #define OMAP2_SRAM_PUB_VA (OMAP2_SRAM_VA + 0x800) |
| 46 | #define OMAP3_SRAM_PA 0x40200000 | 46 | #define OMAP3_SRAM_PA 0x40200000 |
| 47 | #define OMAP3_SRAM_VA 0xe3000000 | 47 | #define OMAP3_SRAM_VA 0xfe400000 |
| 48 | #define OMAP3_SRAM_PUB_PA 0x40208000 | 48 | #define OMAP3_SRAM_PUB_PA 0x40208000 |
| 49 | #define OMAP3_SRAM_PUB_VA (OMAP3_SRAM_VA + 0x8000) | 49 | #define OMAP3_SRAM_PUB_VA (OMAP3_SRAM_VA + 0x8000) |
| 50 | #define OMAP4_SRAM_PA 0x40200000 /*0x402f0000*/ | 50 | #define OMAP4_SRAM_PA 0x40200000 /*0x402f0000*/ |
| 51 | #define OMAP4_SRAM_VA 0xd7000000 /*0xd70f0000*/ | 51 | #define OMAP4_SRAM_VA 0xfe400000 /*0xfe4f0000*/ |
| 52 | 52 | ||
| 53 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 53 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
| 54 | #define SRAM_BOOTLOADER_SZ 0x00 | 54 | #define SRAM_BOOTLOADER_SZ 0x00 |
| @@ -56,16 +56,16 @@ | |||
| 56 | #define SRAM_BOOTLOADER_SZ 0x80 | 56 | #define SRAM_BOOTLOADER_SZ 0x80 |
| 57 | #endif | 57 | #endif |
| 58 | 58 | ||
| 59 | #define OMAP24XX_VA_REQINFOPERM0 OMAP2_IO_ADDRESS(0x68005048) | 59 | #define OMAP24XX_VA_REQINFOPERM0 OMAP2_L3_IO_ADDRESS(0x68005048) |
| 60 | #define OMAP24XX_VA_READPERM0 OMAP2_IO_ADDRESS(0x68005050) | 60 | #define OMAP24XX_VA_READPERM0 OMAP2_L3_IO_ADDRESS(0x68005050) |
| 61 | #define OMAP24XX_VA_WRITEPERM0 OMAP2_IO_ADDRESS(0x68005058) | 61 | #define OMAP24XX_VA_WRITEPERM0 OMAP2_L3_IO_ADDRESS(0x68005058) |
| 62 | 62 | ||
| 63 | #define OMAP34XX_VA_REQINFOPERM0 OMAP2_IO_ADDRESS(0x68012848) | 63 | #define OMAP34XX_VA_REQINFOPERM0 OMAP2_L3_IO_ADDRESS(0x68012848) |
| 64 | #define OMAP34XX_VA_READPERM0 OMAP2_IO_ADDRESS(0x68012850) | 64 | #define OMAP34XX_VA_READPERM0 OMAP2_L3_IO_ADDRESS(0x68012850) |
| 65 | #define OMAP34XX_VA_WRITEPERM0 OMAP2_IO_ADDRESS(0x68012858) | 65 | #define OMAP34XX_VA_WRITEPERM0 OMAP2_L3_IO_ADDRESS(0x68012858) |
| 66 | #define OMAP34XX_VA_ADDR_MATCH2 OMAP2_IO_ADDRESS(0x68012880) | 66 | #define OMAP34XX_VA_ADDR_MATCH2 OMAP2_L3_IO_ADDRESS(0x68012880) |
| 67 | #define OMAP34XX_VA_SMS_RG_ATT0 OMAP2_IO_ADDRESS(0x6C000048) | 67 | #define OMAP34XX_VA_SMS_RG_ATT0 OMAP2_L3_IO_ADDRESS(0x6C000048) |
| 68 | #define OMAP34XX_VA_CONTROL_STAT OMAP2_IO_ADDRESS(0x480022F0) | 68 | #define OMAP34XX_VA_CONTROL_STAT OMAP2_L4_IO_ADDRESS(0x480022F0) |
| 69 | 69 | ||
| 70 | #define GP_DEVICE 0x300 | 70 | #define GP_DEVICE 0x300 |
| 71 | 71 | ||
| @@ -396,22 +396,24 @@ u32 omap3_configure_core_dpll(u32 m2, u32 unlock_dll, u32 f, u32 inc, | |||
| 396 | sdrc_actim_ctrl_b_1, sdrc_mr_1); | 396 | sdrc_actim_ctrl_b_1, sdrc_mr_1); |
| 397 | } | 397 | } |
| 398 | 398 | ||
| 399 | /* REVISIT: Should this be same as omap34xx_sram_init() after off-idle? */ | 399 | #ifdef CONFIG_PM |
| 400 | void restore_sram_functions(void) | 400 | void omap3_sram_restore_context(void) |
| 401 | { | 401 | { |
| 402 | omap_sram_ceil = omap_sram_base + omap_sram_size; | 402 | omap_sram_ceil = omap_sram_base + omap_sram_size; |
| 403 | 403 | ||
| 404 | _omap3_sram_configure_core_dpll = | 404 | _omap3_sram_configure_core_dpll = |
| 405 | omap_sram_push(omap3_sram_configure_core_dpll, | 405 | omap_sram_push(omap3_sram_configure_core_dpll, |
| 406 | omap3_sram_configure_core_dpll_sz); | 406 | omap3_sram_configure_core_dpll_sz); |
| 407 | omap_push_sram_idle(); | ||
| 407 | } | 408 | } |
| 409 | #endif /* CONFIG_PM */ | ||
| 408 | 410 | ||
| 409 | int __init omap34xx_sram_init(void) | 411 | int __init omap34xx_sram_init(void) |
| 410 | { | 412 | { |
| 411 | _omap3_sram_configure_core_dpll = | 413 | _omap3_sram_configure_core_dpll = |
| 412 | omap_sram_push(omap3_sram_configure_core_dpll, | 414 | omap_sram_push(omap3_sram_configure_core_dpll, |
| 413 | omap3_sram_configure_core_dpll_sz); | 415 | omap3_sram_configure_core_dpll_sz); |
| 414 | 416 | omap_push_sram_idle(); | |
| 415 | return 0; | 417 | return 0; |
| 416 | } | 418 | } |
| 417 | #else | 419 | #else |
diff --git a/arch/arm/plat-omap/usb.c b/arch/arm/plat-omap/usb.c index 509f2ed99e2..51033a4503c 100644 --- a/arch/arm/plat-omap/usb.c +++ b/arch/arm/plat-omap/usb.c | |||
| @@ -33,10 +33,10 @@ | |||
| 33 | #include <asm/system.h> | 33 | #include <asm/system.h> |
| 34 | #include <mach/hardware.h> | 34 | #include <mach/hardware.h> |
| 35 | 35 | ||
| 36 | #include <mach/control.h> | 36 | #include <plat/control.h> |
| 37 | #include <mach/mux.h> | 37 | #include <plat/mux.h> |
| 38 | #include <mach/usb.h> | 38 | #include <plat/usb.h> |
| 39 | #include <mach/board.h> | 39 | #include <plat/board.h> |
| 40 | 40 | ||
| 41 | #ifdef CONFIG_ARCH_OMAP1 | 41 | #ifdef CONFIG_ARCH_OMAP1 |
| 42 | 42 | ||
| @@ -159,11 +159,14 @@ static u32 __init omap_usb0_init(unsigned nwires, unsigned is_device) | |||
| 159 | * - OTG support on this port not yet written | 159 | * - OTG support on this port not yet written |
| 160 | */ | 160 | */ |
| 161 | 161 | ||
| 162 | l = omap_readl(USB_TRANSCEIVER_CTRL); | 162 | /* Don't do this for omap7xx -- it causes USB to not work correctly */ |
| 163 | l &= ~(7 << 4); | 163 | if (!cpu_is_omap7xx()) { |
| 164 | if (!is_device) | 164 | l = omap_readl(USB_TRANSCEIVER_CTRL); |
| 165 | l |= (3 << 1); | 165 | l &= ~(7 << 4); |
| 166 | omap_writel(l, USB_TRANSCEIVER_CTRL); | 166 | if (!is_device) |
| 167 | l |= (3 << 1); | ||
| 168 | omap_writel(l, USB_TRANSCEIVER_CTRL); | ||
| 169 | } | ||
| 167 | 170 | ||
| 168 | return 3 << 16; | 171 | return 3 << 16; |
| 169 | } | 172 | } |
| @@ -603,7 +606,12 @@ omap_otg_init(struct omap_usb_config *config) | |||
| 603 | if (config->otg || config->register_dev) { | 606 | if (config->otg || config->register_dev) { |
| 604 | syscon &= ~DEV_IDLE_EN; | 607 | syscon &= ~DEV_IDLE_EN; |
| 605 | udc_device.dev.platform_data = config; | 608 | udc_device.dev.platform_data = config; |
| 606 | /* FIXME patch IRQ numbers for omap730 */ | 609 | /* IRQ numbers for omap7xx */ |
| 610 | if(cpu_is_omap7xx()) { | ||
| 611 | udc_resources[1].start = INT_7XX_USB_GENI; | ||
| 612 | udc_resources[2].start = INT_7XX_USB_NON_ISO; | ||
| 613 | udc_resources[3].start = INT_7XX_USB_ISO; | ||
| 614 | } | ||
| 607 | status = platform_device_register(&udc_device); | 615 | status = platform_device_register(&udc_device); |
| 608 | if (status) | 616 | if (status) |
| 609 | pr_debug("can't register UDC device, %d\n", status); | 617 | pr_debug("can't register UDC device, %d\n", status); |
| @@ -614,8 +622,8 @@ omap_otg_init(struct omap_usb_config *config) | |||
| 614 | if (config->otg || config->register_host) { | 622 | if (config->otg || config->register_host) { |
| 615 | syscon &= ~HST_IDLE_EN; | 623 | syscon &= ~HST_IDLE_EN; |
| 616 | ohci_device.dev.platform_data = config; | 624 | ohci_device.dev.platform_data = config; |
| 617 | if (cpu_is_omap730()) | 625 | if (cpu_is_omap7xx()) |
| 618 | ohci_resources[1].start = INT_730_USB_HHC_1; | 626 | ohci_resources[1].start = INT_7XX_USB_HHC_1; |
| 619 | status = platform_device_register(&ohci_device); | 627 | status = platform_device_register(&ohci_device); |
| 620 | if (status) | 628 | if (status) |
| 621 | pr_debug("can't register OHCI device, %d\n", status); | 629 | pr_debug("can't register OHCI device, %d\n", status); |
| @@ -626,8 +634,8 @@ omap_otg_init(struct omap_usb_config *config) | |||
| 626 | if (config->otg) { | 634 | if (config->otg) { |
| 627 | syscon &= ~OTG_IDLE_EN; | 635 | syscon &= ~OTG_IDLE_EN; |
| 628 | otg_device.dev.platform_data = config; | 636 | otg_device.dev.platform_data = config; |
| 629 | if (cpu_is_omap730()) | 637 | if (cpu_is_omap7xx()) |
| 630 | otg_resources[1].start = INT_730_USB_OTG; | 638 | otg_resources[1].start = INT_7XX_USB_OTG; |
| 631 | status = platform_device_register(&otg_device); | 639 | status = platform_device_register(&otg_device); |
| 632 | if (status) | 640 | if (status) |
| 633 | pr_debug("can't register OTG device, %d\n", status); | 641 | pr_debug("can't register OTG device, %d\n", status); |
| @@ -731,7 +739,7 @@ static inline void omap_1510_usb_init(struct omap_usb_config *config) {} | |||
| 731 | 739 | ||
| 732 | void __init omap_usb_init(struct omap_usb_config *pdata) | 740 | void __init omap_usb_init(struct omap_usb_config *pdata) |
| 733 | { | 741 | { |
| 734 | if (cpu_is_omap730() || cpu_is_omap16xx() || cpu_is_omap24xx()) | 742 | if (cpu_is_omap7xx() || cpu_is_omap16xx() || cpu_is_omap24xx()) |
| 735 | omap_otg_init(pdata); | 743 | omap_otg_init(pdata); |
| 736 | else if (cpu_is_omap15xx()) | 744 | else if (cpu_is_omap15xx()) |
| 737 | omap_1510_usb_init(pdata); | 745 | omap_1510_usb_init(pdata); |
diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx_nand.h b/arch/arm/plat-pxa/include/plat/pxa3xx_nand.h index 3478eae32d8..3478eae32d8 100644 --- a/arch/arm/mach-pxa/include/mach/pxa3xx_nand.h +++ b/arch/arm/plat-pxa/include/plat/pxa3xx_nand.h | |||
diff --git a/arch/arm/plat-s3c/Kconfig b/arch/arm/plat-s3c/Kconfig index 8931c5f0e46..e139a72c214 100644 --- a/arch/arm/plat-s3c/Kconfig +++ b/arch/arm/plat-s3c/Kconfig | |||
| @@ -159,6 +159,12 @@ config S3C_GPIO_CFG_S3C64XX | |||
| 159 | Internal configuration to enable S3C64XX style GPIO configuration | 159 | Internal configuration to enable S3C64XX style GPIO configuration |
| 160 | functions. | 160 | functions. |
| 161 | 161 | ||
| 162 | config S5P_GPIO_CFG_S5PC1XX | ||
| 163 | bool | ||
| 164 | help | ||
| 165 | Internal configuration to enable S5PC1XX style GPIO configuration | ||
| 166 | functions. | ||
| 167 | |||
| 162 | # DMA | 168 | # DMA |
| 163 | 169 | ||
| 164 | config S3C_DMA | 170 | config S3C_DMA |
| @@ -178,6 +184,11 @@ config S3C_DEV_HSMMC1 | |||
| 178 | help | 184 | help |
| 179 | Compile in platform device definitions for HSMMC channel 1 | 185 | Compile in platform device definitions for HSMMC channel 1 |
| 180 | 186 | ||
| 187 | config S3C_DEV_HSMMC2 | ||
| 188 | bool | ||
| 189 | help | ||
| 190 | Compile in platform device definitions for HSMMC channel 2 | ||
| 191 | |||
| 181 | config S3C_DEV_I2C1 | 192 | config S3C_DEV_I2C1 |
| 182 | bool | 193 | bool |
| 183 | help | 194 | help |
diff --git a/arch/arm/plat-s3c/Makefile b/arch/arm/plat-s3c/Makefile index 3c09109e9e8..50444da9842 100644 --- a/arch/arm/plat-s3c/Makefile +++ b/arch/arm/plat-s3c/Makefile | |||
| @@ -36,6 +36,7 @@ obj-$(CONFIG_HAVE_PWM) += pwm.o | |||
| 36 | 36 | ||
| 37 | obj-$(CONFIG_S3C_DEV_HSMMC) += dev-hsmmc.o | 37 | obj-$(CONFIG_S3C_DEV_HSMMC) += dev-hsmmc.o |
| 38 | obj-$(CONFIG_S3C_DEV_HSMMC1) += dev-hsmmc1.o | 38 | obj-$(CONFIG_S3C_DEV_HSMMC1) += dev-hsmmc1.o |
| 39 | obj-$(CONFIG_S3C_DEV_HSMMC2) += dev-hsmmc2.o | ||
| 39 | obj-y += dev-i2c0.o | 40 | obj-y += dev-i2c0.o |
| 40 | obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o | 41 | obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o |
| 41 | obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o | 42 | obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o |
diff --git a/arch/arm/plat-s3c/clock.c b/arch/arm/plat-s3c/clock.c index 4d01ef1a25d..619cfa82dca 100644 --- a/arch/arm/plat-s3c/clock.c +++ b/arch/arm/plat-s3c/clock.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* linux/arch/arm/plat-s3c24xx/clock.c | 1 | /* linux/arch/arm/plat-s3c24xx/clock.c |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2004-2005 Simtec Electronics | 3 | * Copyright 2004-2005 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * | 5 | * |
| 6 | * S3C24XX Core clock control support | 6 | * S3C24XX Core clock control support |
| @@ -337,7 +337,7 @@ int s3c24xx_register_clocks(struct clk **clks, int nr_clks) | |||
| 337 | 337 | ||
| 338 | int __init s3c24xx_register_baseclocks(unsigned long xtal) | 338 | int __init s3c24xx_register_baseclocks(unsigned long xtal) |
| 339 | { | 339 | { |
| 340 | printk(KERN_INFO "S3C24XX Clocks, (c) 2004 Simtec Electronics\n"); | 340 | printk(KERN_INFO "S3C24XX Clocks, Copyright 2004 Simtec Electronics\n"); |
| 341 | 341 | ||
| 342 | clk_xtal.rate = xtal; | 342 | clk_xtal.rate = xtal; |
| 343 | 343 | ||
diff --git a/arch/arm/plat-s3c/dev-hsmmc2.c b/arch/arm/plat-s3c/dev-hsmmc2.c new file mode 100644 index 00000000000..824580bc0e0 --- /dev/null +++ b/arch/arm/plat-s3c/dev-hsmmc2.c | |||
| @@ -0,0 +1,69 @@ | |||
| 1 | /* linux/arch/arm/plat-s3c/dev-hsmmc2.c | ||
| 2 | * | ||
| 3 | * Copyright (c) 2009 Samsung Electronics | ||
| 4 | * Copyright (c) 2009 Maurus Cuelenaere | ||
| 5 | * | ||
| 6 | * Based on arch/arm/plat-s3c/dev-hsmmc1.c | ||
| 7 | * original file Copyright (c) 2008 Simtec Electronics | ||
| 8 | * | ||
| 9 | * S3C series device definition for hsmmc device 2 | ||
| 10 | * | ||
| 11 | * This program is free software; you can redistribute it and/or modify | ||
| 12 | * it under the terms of the GNU General Public License version 2 as | ||
| 13 | * published by the Free Software Foundation. | ||
| 14 | */ | ||
| 15 | |||
| 16 | #include <linux/kernel.h> | ||
| 17 | #include <linux/platform_device.h> | ||
| 18 | #include <linux/mmc/host.h> | ||
| 19 | |||
| 20 | #include <mach/map.h> | ||
| 21 | #include <plat/sdhci.h> | ||
| 22 | #include <plat/devs.h> | ||
| 23 | |||
| 24 | #define S3C_SZ_HSMMC (0x1000) | ||
| 25 | |||
| 26 | static struct resource s3c_hsmmc2_resource[] = { | ||
| 27 | [0] = { | ||
| 28 | .start = S3C_PA_HSMMC2, | ||
| 29 | .end = S3C_PA_HSMMC2 + S3C_SZ_HSMMC - 1, | ||
| 30 | .flags = IORESOURCE_MEM, | ||
| 31 | }, | ||
| 32 | [1] = { | ||
| 33 | .start = IRQ_HSMMC2, | ||
| 34 | .end = IRQ_HSMMC2, | ||
| 35 | .flags = IORESOURCE_IRQ, | ||
| 36 | } | ||
| 37 | }; | ||
| 38 | |||
| 39 | static u64 s3c_device_hsmmc2_dmamask = 0xffffffffUL; | ||
| 40 | |||
| 41 | struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = { | ||
| 42 | .max_width = 4, | ||
| 43 | .host_caps = (MMC_CAP_4_BIT_DATA | | ||
| 44 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), | ||
| 45 | }; | ||
| 46 | |||
| 47 | struct platform_device s3c_device_hsmmc2 = { | ||
| 48 | .name = "s3c-sdhci", | ||
| 49 | .id = 2, | ||
| 50 | .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource), | ||
| 51 | .resource = s3c_hsmmc2_resource, | ||
| 52 | .dev = { | ||
| 53 | .dma_mask = &s3c_device_hsmmc2_dmamask, | ||
| 54 | .coherent_dma_mask = 0xffffffffUL, | ||
| 55 | .platform_data = &s3c_hsmmc2_def_platdata, | ||
| 56 | }, | ||
| 57 | }; | ||
| 58 | |||
| 59 | void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd) | ||
| 60 | { | ||
| 61 | struct s3c_sdhci_platdata *set = &s3c_hsmmc2_def_platdata; | ||
| 62 | |||
| 63 | set->max_width = pd->max_width; | ||
| 64 | |||
| 65 | if (pd->cfg_gpio) | ||
| 66 | set->cfg_gpio = pd->cfg_gpio; | ||
| 67 | if (pd->cfg_card) | ||
| 68 | set->cfg_card = pd->cfg_card; | ||
| 69 | } | ||
diff --git a/arch/arm/plat-s3c/dev-i2c0.c b/arch/arm/plat-s3c/dev-i2c0.c index 428372868fb..4c761529b94 100644 --- a/arch/arm/plat-s3c/dev-i2c0.c +++ b/arch/arm/plat-s3c/dev-i2c0.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* linux/arch/arm/plat-s3c/dev-i2c0.c | 1 | /* linux/arch/arm/plat-s3c/dev-i2c0.c |
| 2 | * | 2 | * |
| 3 | * Copyright 2008,2009 Simtec Electronics | 3 | * Copyright 2008-2009 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * http://armlinux.simtec.co.uk/ | 5 | * http://armlinux.simtec.co.uk/ |
| 6 | * | 6 | * |
diff --git a/arch/arm/plat-s3c/dev-i2c1.c b/arch/arm/plat-s3c/dev-i2c1.c index 8349c462788..d44f7911050 100644 --- a/arch/arm/plat-s3c/dev-i2c1.c +++ b/arch/arm/plat-s3c/dev-i2c1.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* linux/arch/arm/plat-s3c/dev-i2c1.c | 1 | /* linux/arch/arm/plat-s3c/dev-i2c1.c |
| 2 | * | 2 | * |
| 3 | * Copyright 2008,2009 Simtec Electronics | 3 | * Copyright 2008-2009 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * http://armlinux.simtec.co.uk/ | 5 | * http://armlinux.simtec.co.uk/ |
| 6 | * | 6 | * |
diff --git a/arch/arm/plat-s3c/dev-nand.c b/arch/arm/plat-s3c/dev-nand.c index 4e532373243..e771e77dcd5 100644 --- a/arch/arm/plat-s3c/dev-nand.c +++ b/arch/arm/plat-s3c/dev-nand.c | |||
| @@ -9,8 +9,12 @@ | |||
| 9 | #include <linux/kernel.h> | 9 | #include <linux/kernel.h> |
| 10 | #include <linux/platform_device.h> | 10 | #include <linux/platform_device.h> |
| 11 | 11 | ||
| 12 | #include <linux/mtd/mtd.h> | ||
| 13 | #include <linux/mtd/partitions.h> | ||
| 14 | |||
| 12 | #include <mach/map.h> | 15 | #include <mach/map.h> |
| 13 | #include <plat/devs.h> | 16 | #include <plat/devs.h> |
| 17 | #include <plat/nand.h> | ||
| 14 | 18 | ||
| 15 | static struct resource s3c_nand_resource[] = { | 19 | static struct resource s3c_nand_resource[] = { |
| 16 | [0] = { | 20 | [0] = { |
| @@ -28,3 +32,96 @@ struct platform_device s3c_device_nand = { | |||
| 28 | }; | 32 | }; |
| 29 | 33 | ||
| 30 | EXPORT_SYMBOL(s3c_device_nand); | 34 | EXPORT_SYMBOL(s3c_device_nand); |
| 35 | |||
| 36 | /** | ||
| 37 | * s3c_nand_copy_set() - copy nand set data | ||
| 38 | * @set: The new structure, directly copied from the old. | ||
| 39 | * | ||
| 40 | * Copy all the fields from the NAND set field from what is probably __initdata | ||
| 41 | * to new kernel memory. The code returns 0 if the copy happened correctly or | ||
| 42 | * an error code for the calling function to display. | ||
| 43 | * | ||
| 44 | * Note, we currently do not try and look to see if we've already copied the | ||
| 45 | * data in a previous set. | ||
| 46 | */ | ||
| 47 | static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set) | ||
| 48 | { | ||
| 49 | void *ptr; | ||
| 50 | int size; | ||
| 51 | |||
| 52 | size = sizeof(struct mtd_partition) * set->nr_partitions; | ||
| 53 | if (size) { | ||
| 54 | ptr = kmemdup(set->partitions, size, GFP_KERNEL); | ||
| 55 | set->partitions = ptr; | ||
| 56 | |||
| 57 | if (!ptr) | ||
| 58 | return -ENOMEM; | ||
| 59 | } | ||
| 60 | |||
| 61 | size = sizeof(int) * set->nr_chips; | ||
| 62 | if (size) { | ||
| 63 | ptr = kmemdup(set->nr_map, size, GFP_KERNEL); | ||
| 64 | set->nr_map = ptr; | ||
| 65 | |||
| 66 | if (!ptr) | ||
| 67 | return -ENOMEM; | ||
| 68 | } | ||
| 69 | |||
| 70 | if (set->ecc_layout) { | ||
| 71 | ptr = kmemdup(set->ecc_layout, | ||
| 72 | sizeof(struct nand_ecclayout), GFP_KERNEL); | ||
| 73 | set->ecc_layout = ptr; | ||
| 74 | |||
| 75 | if (!ptr) | ||
| 76 | return -ENOMEM; | ||
| 77 | } | ||
| 78 | |||
| 79 | return 0; | ||
| 80 | } | ||
| 81 | |||
| 82 | void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand) | ||
| 83 | { | ||
| 84 | struct s3c2410_platform_nand *npd; | ||
| 85 | int size; | ||
| 86 | int ret; | ||
| 87 | |||
| 88 | /* note, if we get a failure in allocation, we simply drop out of the | ||
| 89 | * function. If there is so little memory available at initialisation | ||
| 90 | * time then there is little chance the system is going to run. | ||
| 91 | */ | ||
| 92 | |||
| 93 | npd = kmemdup(nand, sizeof(struct s3c2410_platform_nand), GFP_KERNEL); | ||
| 94 | if (!npd) { | ||
| 95 | printk(KERN_ERR "%s: failed copying platform data\n", __func__); | ||
| 96 | return; | ||
| 97 | } | ||
| 98 | |||
| 99 | /* now see if we need to copy any of the nand set data */ | ||
| 100 | |||
| 101 | size = sizeof(struct s3c2410_nand_set) * npd->nr_sets; | ||
| 102 | if (size) { | ||
| 103 | struct s3c2410_nand_set *from = npd->sets; | ||
| 104 | struct s3c2410_nand_set *to; | ||
| 105 | int i; | ||
| 106 | |||
| 107 | to = kmemdup(from, size, GFP_KERNEL); | ||
| 108 | npd->sets = to; /* set, even if we failed */ | ||
| 109 | |||
| 110 | if (!to) { | ||
| 111 | printk(KERN_ERR "%s: no memory for sets\n", __func__); | ||
| 112 | return; | ||
| 113 | } | ||
| 114 | |||
| 115 | for (i = 0; i < npd->nr_sets; i++) { | ||
| 116 | ret = s3c_nand_copy_set(to); | ||
| 117 | if (!ret) { | ||
| 118 | printk(KERN_ERR "%s: failed to copy set %d\n", | ||
| 119 | __func__, i); | ||
| 120 | return; | ||
| 121 | } | ||
| 122 | to++; | ||
| 123 | } | ||
| 124 | } | ||
| 125 | } | ||
| 126 | |||
| 127 | EXPORT_SYMBOL_GPL(s3c_nand_set_platdata); | ||
diff --git a/arch/arm/plat-s3c/dma.c b/arch/arm/plat-s3c/dma.c index c9db75c06af..a995850cd9d 100644 --- a/arch/arm/plat-s3c/dma.c +++ b/arch/arm/plat-s3c/dma.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* linux/arch/arm/plat-s3c/dma.c | 1 | /* linux/arch/arm/plat-s3c/dma.c |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2003-2005,2006,2009 Simtec Electronics | 3 | * Copyright (c) 2003-2009 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * http://armlinux.simtec.co.uk/ | 5 | * http://armlinux.simtec.co.uk/ |
| 6 | * | 6 | * |
diff --git a/arch/arm/plat-s3c/include/plat/audio-simtec.h b/arch/arm/plat-s3c/include/plat/audio-simtec.h index 0f440b9168d..53a93656d5d 100644 --- a/arch/arm/plat-s3c/include/plat/audio-simtec.h +++ b/arch/arm/plat-s3c/include/plat/audio-simtec.h | |||
| @@ -33,5 +33,5 @@ struct s3c24xx_audio_simtec_pdata { | |||
| 33 | void (*startup)(void); | 33 | void (*startup)(void); |
| 34 | }; | 34 | }; |
| 35 | 35 | ||
| 36 | extern int simtec_audio_add(const char *codec_name, | 36 | extern int simtec_audio_add(const char *codec_name, bool has_lr_routing, |
| 37 | struct s3c24xx_audio_simtec_pdata *pdata); | 37 | struct s3c24xx_audio_simtec_pdata *pdata); |
diff --git a/arch/arm/plat-s3c/include/plat/audio.h b/arch/arm/plat-s3c/include/plat/audio.h index de0e8da48bc..f22d23bb627 100644 --- a/arch/arm/plat-s3c/include/plat/audio.h +++ b/arch/arm/plat-s3c/include/plat/audio.h | |||
| @@ -1,45 +1,17 @@ | |||
| 1 | /* arch/arm/mach-s3c2410/include/mach/audio.h | 1 | /* arch/arm/plat-s3c/include/plat/audio.h |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2004-2005 Simtec Electronics | 3 | * Copyright (c) 2009 Samsung Electronics Co. Ltd |
| 4 | * http://www.simtec.co.uk/products/SWLINUX/ | 4 | * Author: Jaswinder Singh <jassi.brar@samsung.com> |
| 5 | * Ben Dooks <ben@simtec.co.uk> | ||
| 6 | * | ||
| 7 | * S3C24XX - Audio platfrom_device info | ||
| 8 | * | 5 | * |
| 9 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
| 11 | * published by the Free Software Foundation. | 8 | * published by the Free Software Foundation. |
| 12 | */ | 9 | */ |
| 13 | |||
| 14 | #ifndef __ASM_ARCH_AUDIO_H | ||
| 15 | #define __ASM_ARCH_AUDIO_H __FILE__ | ||
| 16 | |||
| 17 | /* struct s3c24xx_iis_ops | ||
| 18 | * | ||
| 19 | * called from the s3c24xx audio core to deal with the architecture | ||
| 20 | * or the codec's setup and control. | ||
| 21 | * | ||
| 22 | * the pointer to itself is passed through in case the caller wants to | ||
| 23 | * embed this in an larger structure for easy reference to it's context. | ||
| 24 | */ | ||
| 25 | 10 | ||
| 26 | struct s3c24xx_iis_ops { | 11 | /** |
| 27 | struct module *owner; | 12 | * struct s3c_audio_pdata - common platform data for audio device drivers |
| 28 | 13 | * @cfg_gpio: Callback function to setup mux'ed pins in I2S/PCM/AC97 mode | |
| 29 | int (*startup)(struct s3c24xx_iis_ops *me); | 14 | */ |
| 30 | void (*shutdown)(struct s3c24xx_iis_ops *me); | 15 | struct s3c_audio_pdata { |
| 31 | int (*suspend)(struct s3c24xx_iis_ops *me); | 16 | int (*cfg_gpio)(struct platform_device *); |
| 32 | int (*resume)(struct s3c24xx_iis_ops *me); | ||
| 33 | |||
| 34 | int (*open)(struct s3c24xx_iis_ops *me, struct snd_pcm_substream *strm); | ||
| 35 | int (*close)(struct s3c24xx_iis_ops *me, struct snd_pcm_substream *strm); | ||
| 36 | int (*prepare)(struct s3c24xx_iis_ops *me, struct snd_pcm_substream *strm, struct snd_pcm_runtime *rt); | ||
| 37 | }; | 17 | }; |
| 38 | |||
| 39 | struct s3c24xx_platdata_iis { | ||
| 40 | const char *codec_clk; | ||
| 41 | struct s3c24xx_iis_ops *ops; | ||
| 42 | int (*match_dev)(struct device *dev); | ||
| 43 | }; | ||
| 44 | |||
| 45 | #endif /* __ASM_ARCH_AUDIO_H */ | ||
diff --git a/arch/arm/plat-s3c/include/plat/cpu-freq.h b/arch/arm/plat-s3c/include/plat/cpu-freq.h index 7b982b7f28c..94eb06a2ea5 100644 --- a/arch/arm/plat-s3c/include/plat/cpu-freq.h +++ b/arch/arm/plat-s3c/include/plat/cpu-freq.h | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* arch/arm/plat-s3c/include/plat/cpu-freq.h | 1 | /* arch/arm/plat-s3c/include/plat/cpu-freq.h |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2006,2007 Simtec Electronics | 3 | * Copyright (c) 2006-2007 Simtec Electronics |
| 4 | * http://armlinux.simtec.co.uk/ | 4 | * http://armlinux.simtec.co.uk/ |
| 5 | * Ben Dooks <ben@simtec.co.uk> | 5 | * Ben Dooks <ben@simtec.co.uk> |
| 6 | * | 6 | * |
diff --git a/arch/arm/plat-s3c/include/plat/cpu.h b/arch/arm/plat-s3c/include/plat/cpu.h index fbc3d498e02..d1131ca11e9 100644 --- a/arch/arm/plat-s3c/include/plat/cpu.h +++ b/arch/arm/plat-s3c/include/plat/cpu.h | |||
| @@ -12,6 +12,9 @@ | |||
| 12 | 12 | ||
| 13 | /* todo - fix when rmk changes iodescs to use `void __iomem *` */ | 13 | /* todo - fix when rmk changes iodescs to use `void __iomem *` */ |
| 14 | 14 | ||
| 15 | #ifndef __SAMSUNG_PLAT_CPU_H | ||
| 16 | #define __SAMSUNG_PLAT_CPU_H | ||
| 17 | |||
| 15 | #define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE } | 18 | #define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE } |
| 16 | 19 | ||
| 17 | #ifndef MHZ | 20 | #ifndef MHZ |
| @@ -73,3 +76,6 @@ extern struct sysdev_class s3c2443_sysclass; | |||
| 73 | extern struct sysdev_class s3c6410_sysclass; | 76 | extern struct sysdev_class s3c6410_sysclass; |
| 74 | extern struct sysdev_class s3c64xx_sysclass; | 77 | extern struct sysdev_class s3c64xx_sysclass; |
| 75 | 78 | ||
| 79 | extern void (*s5pc1xx_idle)(void); | ||
| 80 | |||
| 81 | #endif | ||
diff --git a/arch/arm/plat-s3c/include/plat/devs.h b/arch/arm/plat-s3c/include/plat/devs.h index 0f540ea1e99..932cbbbb427 100644 --- a/arch/arm/plat-s3c/include/plat/devs.h +++ b/arch/arm/plat-s3c/include/plat/devs.h | |||
| @@ -28,6 +28,9 @@ extern struct platform_device s3c64xx_device_iis0; | |||
| 28 | extern struct platform_device s3c64xx_device_iis1; | 28 | extern struct platform_device s3c64xx_device_iis1; |
| 29 | extern struct platform_device s3c64xx_device_iisv4; | 29 | extern struct platform_device s3c64xx_device_iisv4; |
| 30 | 30 | ||
| 31 | extern struct platform_device s3c64xx_device_pcm0; | ||
| 32 | extern struct platform_device s3c64xx_device_pcm1; | ||
| 33 | |||
| 31 | extern struct platform_device s3c_device_fb; | 34 | extern struct platform_device s3c_device_fb; |
| 32 | extern struct platform_device s3c_device_usb; | 35 | extern struct platform_device s3c_device_usb; |
| 33 | extern struct platform_device s3c_device_lcd; | 36 | extern struct platform_device s3c_device_lcd; |
diff --git a/arch/arm/plat-s3c/include/plat/dma.h b/arch/arm/plat-s3c/include/plat/dma.h index 34dba98f08e..e429d10be3a 100644 --- a/arch/arm/plat-s3c/include/plat/dma.h +++ b/arch/arm/plat-s3c/include/plat/dma.h | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* arch/arm/plat-s3c/include/plat/dma.h | 1 | /* arch/arm/plat-s3c/include/plat/dma.h |
| 2 | * | 2 | * |
| 3 | * Copyright (C) 2003,2004,2006 Simtec Electronics | 3 | * Copyright (C) 2003-2006 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * | 5 | * |
| 6 | * Samsung S3C DMA support | 6 | * Samsung S3C DMA support |
diff --git a/arch/arm/plat-s3c/include/plat/fb.h b/arch/arm/plat-s3c/include/plat/fb.h index 214ff561b0d..f8db87930f8 100644 --- a/arch/arm/plat-s3c/include/plat/fb.h +++ b/arch/arm/plat-s3c/include/plat/fb.h | |||
| @@ -70,4 +70,11 @@ extern void s3c_fb_set_platdata(struct s3c_fb_platdata *pd); | |||
| 70 | */ | 70 | */ |
| 71 | extern void s3c64xx_fb_gpio_setup_24bpp(void); | 71 | extern void s3c64xx_fb_gpio_setup_24bpp(void); |
| 72 | 72 | ||
| 73 | /** | ||
| 74 | * s5pc100_fb_gpio_setup_24bpp() - S5PC100 setup function for 24bpp LCD | ||
| 75 | * | ||
| 76 | * Initialise the GPIO for an 24bpp LCD display on the RGB interface. | ||
| 77 | */ | ||
| 78 | extern void s5pc100_fb_gpio_setup_24bpp(void); | ||
| 79 | |||
| 73 | #endif /* __PLAT_S3C_FB_H */ | 80 | #endif /* __PLAT_S3C_FB_H */ |
diff --git a/arch/arm/plat-s3c/include/plat/iic.h b/arch/arm/plat-s3c/include/plat/iic.h index 67450f11574..3083df00dee 100644 --- a/arch/arm/plat-s3c/include/plat/iic.h +++ b/arch/arm/plat-s3c/include/plat/iic.h | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* arch/arm/plat-s3c/include/plat/iic.h | 1 | /* arch/arm/plat-s3c/include/plat/iic.h |
| 2 | * | 2 | * |
| 3 | * Copyright 2004,2009 Simtec Electronics | 3 | * Copyright 2004-2009 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * | 5 | * |
| 6 | * S3C - I2C Controller platform_device info | 6 | * S3C - I2C Controller platform_device info |
diff --git a/arch/arm/plat-s3c/include/plat/nand.h b/arch/arm/plat-s3c/include/plat/nand.h index 18f958801e6..06598597841 100644 --- a/arch/arm/plat-s3c/include/plat/nand.h +++ b/arch/arm/plat-s3c/include/plat/nand.h | |||
| @@ -55,3 +55,11 @@ struct s3c2410_platform_nand { | |||
| 55 | int chip); | 55 | int chip); |
| 56 | }; | 56 | }; |
| 57 | 57 | ||
| 58 | /** | ||
| 59 | * s3c_nand_set_platdata() - register NAND platform data. | ||
| 60 | * @nand: The NAND platform data to register with s3c_device_nand. | ||
| 61 | * | ||
| 62 | * This function copies the given NAND platform data, @nand and registers | ||
| 63 | * it with the s3c_device_nand. This allows @nand to be __initdata. | ||
| 64 | */ | ||
| 65 | extern void s3c_nand_set_platdata(struct s3c2410_platform_nand *nand); | ||
diff --git a/arch/arm/plat-s3c/include/plat/regs-fb-v4.h b/arch/arm/plat-s3c/include/plat/regs-fb-v4.h new file mode 100644 index 00000000000..a60ed0d06c9 --- /dev/null +++ b/arch/arm/plat-s3c/include/plat/regs-fb-v4.h | |||
| @@ -0,0 +1,235 @@ | |||
| 1 | /* arch/arm/plat-s3c/include/plat/regs-fb-v4.h | ||
| 2 | * | ||
| 3 | * Copyright 2008 Openmoko, Inc. | ||
| 4 | * Copyright 2008 Simtec Electronics | ||
| 5 | * http://armlinux.simtec.co.uk/ | ||
| 6 | * Ben Dooks <ben@simtec.co.uk> | ||
| 7 | * | ||
| 8 | * S3C64XX - new-style framebuffer register definitions | ||
| 9 | * | ||
| 10 | * This is the register set for the new style framebuffer interface | ||
| 11 | * found from the S3C2443 onwards and specifically the S3C64XX series | ||
| 12 | * S3C6400 and S3C6410. | ||
| 13 | * | ||
| 14 | * The file contains the cpu specific items which change between whichever | ||
| 15 | * architecture is selected. See <plat/regs-fb.h> for the core definitions | ||
| 16 | * that are the same. | ||
| 17 | * | ||
| 18 | * This program is free software; you can redistribute it and/or modify | ||
| 19 | * it under the terms of the GNU General Public License version 2 as | ||
| 20 | * published by the Free Software Foundation. | ||
| 21 | */ | ||
| 22 | |||
| 23 | /* include the core definitions here, in case we really do need to | ||
| 24 | * override them at a later date. | ||
| 25 | */ | ||
| 26 | |||
| 27 | #include <plat/regs-fb.h> | ||
| 28 | |||
| 29 | #define S3C_FB_MAX_WIN (5) /* number of hardware windows available. */ | ||
| 30 | #define VIDCON1_FSTATUS_EVEN (1 << 15) | ||
| 31 | |||
| 32 | /* Video timing controls */ | ||
| 33 | #define VIDTCON0 (0x10) | ||
| 34 | #define VIDTCON1 (0x14) | ||
| 35 | #define VIDTCON2 (0x18) | ||
| 36 | |||
| 37 | /* Window position controls */ | ||
| 38 | |||
| 39 | #define WINCON(_win) (0x20 + ((_win) * 4)) | ||
| 40 | |||
| 41 | /* OSD1 and OSD4 do not have register D */ | ||
| 42 | |||
| 43 | #define VIDOSD_A(_win) (0x40 + ((_win) * 16)) | ||
| 44 | #define VIDOSD_B(_win) (0x44 + ((_win) * 16)) | ||
| 45 | #define VIDOSD_C(_win) (0x48 + ((_win) * 16)) | ||
| 46 | #define VIDOSD_D(_win) (0x4C + ((_win) * 16)) | ||
| 47 | |||
| 48 | |||
| 49 | #define VIDINTCON0 (0x130) | ||
| 50 | |||
| 51 | #define WxKEYCONy(_win, _con) ((0x140 + ((_win) * 8)) + ((_con) * 4)) | ||
| 52 | |||
| 53 | /* WINCONx */ | ||
| 54 | |||
| 55 | #define WINCONx_CSCWIDTH_MASK (0x3 << 26) | ||
| 56 | #define WINCONx_CSCWIDTH_SHIFT (26) | ||
| 57 | #define WINCONx_CSCWIDTH_WIDE (0x0 << 26) | ||
| 58 | #define WINCONx_CSCWIDTH_NARROW (0x3 << 26) | ||
| 59 | |||
| 60 | #define WINCONx_ENLOCAL (1 << 22) | ||
| 61 | #define WINCONx_BUFSTATUS (1 << 21) | ||
| 62 | #define WINCONx_BUFSEL (1 << 20) | ||
| 63 | #define WINCONx_BUFAUTOEN (1 << 19) | ||
| 64 | #define WINCONx_YCbCr (1 << 13) | ||
| 65 | |||
| 66 | #define WINCON1_LOCALSEL_CAMIF (1 << 23) | ||
| 67 | |||
| 68 | #define WINCON2_LOCALSEL_CAMIF (1 << 23) | ||
| 69 | #define WINCON2_BLD_PIX (1 << 6) | ||
| 70 | |||
| 71 | #define WINCON2_ALPHA_SEL (1 << 1) | ||
| 72 | #define WINCON2_BPPMODE_MASK (0xf << 2) | ||
| 73 | #define WINCON2_BPPMODE_SHIFT (2) | ||
| 74 | #define WINCON2_BPPMODE_1BPP (0x0 << 2) | ||
| 75 | #define WINCON2_BPPMODE_2BPP (0x1 << 2) | ||
| 76 | #define WINCON2_BPPMODE_4BPP (0x2 << 2) | ||
| 77 | #define WINCON2_BPPMODE_8BPP_1232 (0x4 << 2) | ||
| 78 | #define WINCON2_BPPMODE_16BPP_565 (0x5 << 2) | ||
| 79 | #define WINCON2_BPPMODE_16BPP_A1555 (0x6 << 2) | ||
| 80 | #define WINCON2_BPPMODE_16BPP_I1555 (0x7 << 2) | ||
| 81 | #define WINCON2_BPPMODE_18BPP_666 (0x8 << 2) | ||
| 82 | #define WINCON2_BPPMODE_18BPP_A1665 (0x9 << 2) | ||
| 83 | #define WINCON2_BPPMODE_19BPP_A1666 (0xa << 2) | ||
| 84 | #define WINCON2_BPPMODE_24BPP_888 (0xb << 2) | ||
| 85 | #define WINCON2_BPPMODE_24BPP_A1887 (0xc << 2) | ||
| 86 | #define WINCON2_BPPMODE_25BPP_A1888 (0xd << 2) | ||
| 87 | #define WINCON2_BPPMODE_28BPP_A4888 (0xd << 2) | ||
| 88 | |||
| 89 | #define WINCON3_BLD_PIX (1 << 6) | ||
| 90 | |||
| 91 | #define WINCON3_ALPHA_SEL (1 << 1) | ||
| 92 | #define WINCON3_BPPMODE_MASK (0xf << 2) | ||
| 93 | #define WINCON3_BPPMODE_SHIFT (2) | ||
| 94 | #define WINCON3_BPPMODE_1BPP (0x0 << 2) | ||
| 95 | #define WINCON3_BPPMODE_2BPP (0x1 << 2) | ||
| 96 | #define WINCON3_BPPMODE_4BPP (0x2 << 2) | ||
| 97 | #define WINCON3_BPPMODE_16BPP_565 (0x5 << 2) | ||
| 98 | #define WINCON3_BPPMODE_16BPP_A1555 (0x6 << 2) | ||
| 99 | #define WINCON3_BPPMODE_16BPP_I1555 (0x7 << 2) | ||
| 100 | #define WINCON3_BPPMODE_18BPP_666 (0x8 << 2) | ||
| 101 | #define WINCON3_BPPMODE_18BPP_A1665 (0x9 << 2) | ||
| 102 | #define WINCON3_BPPMODE_19BPP_A1666 (0xa << 2) | ||
| 103 | #define WINCON3_BPPMODE_24BPP_888 (0xb << 2) | ||
| 104 | #define WINCON3_BPPMODE_24BPP_A1887 (0xc << 2) | ||
| 105 | #define WINCON3_BPPMODE_25BPP_A1888 (0xd << 2) | ||
| 106 | #define WINCON3_BPPMODE_28BPP_A4888 (0xd << 2) | ||
| 107 | |||
| 108 | #define VIDINTCON0_FIFIOSEL_WINDOW2 (0x10 << 5) | ||
| 109 | #define VIDINTCON0_FIFIOSEL_WINDOW3 (0x20 << 5) | ||
| 110 | #define VIDINTCON0_FIFIOSEL_WINDOW4 (0x40 << 5) | ||
| 111 | |||
| 112 | #define DITHMODE (0x170) | ||
| 113 | #define WINxMAP(_win) (0x180 + ((_win) * 4)) | ||
| 114 | |||
| 115 | |||
| 116 | #define DITHMODE_R_POS_MASK (0x3 << 5) | ||
| 117 | #define DITHMODE_R_POS_SHIFT (5) | ||
| 118 | #define DITHMODE_R_POS_8BIT (0x0 << 5) | ||
| 119 | #define DITHMODE_R_POS_6BIT (0x1 << 5) | ||
| 120 | #define DITHMODE_R_POS_5BIT (0x2 << 5) | ||
| 121 | |||
| 122 | #define DITHMODE_G_POS_MASK (0x3 << 3) | ||
| 123 | #define DITHMODE_G_POS_SHIFT (3) | ||
| 124 | #define DITHMODE_G_POS_8BIT (0x0 << 3) | ||
| 125 | #define DITHMODE_G_POS_6BIT (0x1 << 3) | ||
| 126 | #define DITHMODE_G_POS_5BIT (0x2 << 3) | ||
| 127 | |||
| 128 | #define DITHMODE_B_POS_MASK (0x3 << 1) | ||
| 129 | #define DITHMODE_B_POS_SHIFT (1) | ||
| 130 | #define DITHMODE_B_POS_8BIT (0x0 << 1) | ||
| 131 | #define DITHMODE_B_POS_6BIT (0x1 << 1) | ||
| 132 | #define DITHMODE_B_POS_5BIT (0x2 << 1) | ||
| 133 | |||
| 134 | #define DITHMODE_DITH_EN (1 << 0) | ||
| 135 | |||
| 136 | #define WPALCON (0x1A0) | ||
| 137 | |||
| 138 | /* Palette control */ | ||
| 139 | /* Note for S5PC100: you can still use those macros on WPALCON (aka WPALCON_L), | ||
| 140 | * but make sure that WPALCON_H W2PAL-W4PAL entries are zeroed out */ | ||
| 141 | #define WPALCON_W4PAL_16BPP_A555 (1 << 8) | ||
| 142 | #define WPALCON_W3PAL_16BPP_A555 (1 << 7) | ||
| 143 | #define WPALCON_W2PAL_16BPP_A555 (1 << 6) | ||
| 144 | |||
| 145 | |||
| 146 | /* system specific implementation code for palette sizes, and other | ||
| 147 | * information that changes depending on which architecture is being | ||
| 148 | * compiled. | ||
| 149 | */ | ||
| 150 | |||
| 151 | /* return true if window _win has OSD register D */ | ||
| 152 | #define s3c_fb_has_osd_d(_win) ((_win) != 4 && (_win) != 0) | ||
| 153 | |||
| 154 | static inline unsigned int s3c_fb_win_pal_size(unsigned int win) | ||
| 155 | { | ||
| 156 | if (win < 2) | ||
| 157 | return 256; | ||
| 158 | if (win < 4) | ||
| 159 | return 16; | ||
| 160 | if (win == 4) | ||
| 161 | return 4; | ||
| 162 | |||
| 163 | BUG(); /* shouldn't get here */ | ||
| 164 | } | ||
| 165 | |||
| 166 | static inline int s3c_fb_validate_win_bpp(unsigned int win, unsigned int bpp) | ||
| 167 | { | ||
| 168 | /* all windows can do 1/2 bpp */ | ||
| 169 | |||
| 170 | if ((bpp == 25 || bpp == 19) && win == 0) | ||
| 171 | return 0; /* win 0 does not have 19 or 25bpp modes */ | ||
| 172 | |||
| 173 | if (bpp == 4 && win == 4) | ||
| 174 | return 0; | ||
| 175 | |||
| 176 | if (bpp == 8 && (win >= 3)) | ||
| 177 | return 0; /* win 3/4 cannot do 8bpp in any mode */ | ||
| 178 | |||
| 179 | return 1; | ||
| 180 | } | ||
| 181 | |||
| 182 | static inline int s3c_fb_pal_is16(unsigned int window) | ||
| 183 | { | ||
| 184 | return window > 1; | ||
| 185 | } | ||
| 186 | |||
| 187 | struct s3c_fb_palette { | ||
| 188 | struct fb_bitfield r; | ||
| 189 | struct fb_bitfield g; | ||
| 190 | struct fb_bitfield b; | ||
| 191 | struct fb_bitfield a; | ||
| 192 | }; | ||
| 193 | |||
| 194 | static inline void s3c_fb_init_palette(unsigned int window, | ||
| 195 | struct s3c_fb_palette *palette) | ||
| 196 | { | ||
| 197 | if (window < 2) { | ||
| 198 | /* Windows 0/1 are 8/8/8 or A/8/8/8 */ | ||
| 199 | palette->r.offset = 16; | ||
| 200 | palette->r.length = 8; | ||
| 201 | palette->g.offset = 8; | ||
| 202 | palette->g.length = 8; | ||
| 203 | palette->b.offset = 0; | ||
| 204 | palette->b.length = 8; | ||
| 205 | } else { | ||
| 206 | /* currently we assume RGB 5/6/5 */ | ||
| 207 | palette->r.offset = 11; | ||
| 208 | palette->r.length = 5; | ||
| 209 | palette->g.offset = 5; | ||
| 210 | palette->g.length = 6; | ||
| 211 | palette->b.offset = 0; | ||
| 212 | palette->b.length = 5; | ||
| 213 | } | ||
| 214 | } | ||
| 215 | |||
| 216 | /* Notes on per-window bpp settings | ||
| 217 | * | ||
| 218 | * Value Win0 Win1 Win2 Win3 Win 4 | ||
| 219 | * 0000 1(P) 1(P) 1(P) 1(P) 1(P) | ||
| 220 | * 0001 2(P) 2(P) 2(P) 2(P) 2(P) | ||
| 221 | * 0010 4(P) 4(P) 4(P) 4(P) -none- | ||
| 222 | * 0011 8(P) 8(P) -none- -none- -none- | ||
| 223 | * 0100 -none- 8(A232) 8(A232) -none- -none- | ||
| 224 | * 0101 16(565) 16(565) 16(565) 16(565) 16(565) | ||
| 225 | * 0110 -none- 16(A555) 16(A555) 16(A555) 16(A555) | ||
| 226 | * 0111 16(I555) 16(I565) 16(I555) 16(I555) 16(I555) | ||
| 227 | * 1000 18(666) 18(666) 18(666) 18(666) 18(666) | ||
| 228 | * 1001 -none- 18(A665) 18(A665) 18(A665) 16(A665) | ||
| 229 | * 1010 -none- 19(A666) 19(A666) 19(A666) 19(A666) | ||
| 230 | * 1011 24(888) 24(888) 24(888) 24(888) 24(888) | ||
| 231 | * 1100 -none- 24(A887) 24(A887) 24(A887) 24(A887) | ||
| 232 | * 1101 -none- 25(A888) 25(A888) 25(A888) 25(A888) | ||
| 233 | * 1110 -none- -none- -none- -none- -none- | ||
| 234 | * 1111 -none- -none- -none- -none- -none- | ||
| 235 | */ | ||
diff --git a/arch/arm/plat-s3c/include/plat/regs-nand.h b/arch/arm/plat-s3c/include/plat/regs-nand.h index b2caa4bca27..238efea7b9e 100644 --- a/arch/arm/plat-s3c/include/plat/regs-nand.h +++ b/arch/arm/plat-s3c/include/plat/regs-nand.h | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | /* arch/arm/mach-s3c2410/include/mach/regs-nand.h | 1 | /* arch/arm/mach-s3c2410/include/mach/regs-nand.h |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2004,2005 Simtec Electronics <linux@simtec.co.uk> | 3 | * Copyright (c) 2004-2005 Simtec Electronics <linux@simtec.co.uk> |
| 4 | * http://www.simtec.co.uk/products/SWLINUX/ | 4 | * http://www.simtec.co.uk/products/SWLINUX/ |
| 5 | * | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
diff --git a/arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h b/arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h index 07659dad174..abf2fbc2eb2 100644 --- a/arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h +++ b/arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h | |||
| @@ -67,6 +67,8 @@ | |||
| 67 | #define S3C2412_IISMOD_BCLK_MASK (3 << 1) | 67 | #define S3C2412_IISMOD_BCLK_MASK (3 << 1) |
| 68 | #define S3C2412_IISMOD_8BIT (1 << 0) | 68 | #define S3C2412_IISMOD_8BIT (1 << 0) |
| 69 | 69 | ||
| 70 | #define S3C64XX_IISMOD_CDCLKCON (1 << 12) | ||
| 71 | |||
| 70 | #define S3C2412_IISPSR_PSREN (1 << 15) | 72 | #define S3C2412_IISPSR_PSREN (1 << 15) |
| 71 | 73 | ||
| 72 | #define S3C2412_IISFIC_TXFLUSH (1 << 15) | 74 | #define S3C2412_IISFIC_TXFLUSH (1 << 15) |
diff --git a/arch/arm/plat-s3c/include/plat/regs-serial.h b/arch/arm/plat-s3c/include/plat/regs-serial.h index 66af75a5cdd..85d8904e7f2 100644 --- a/arch/arm/plat-s3c/include/plat/regs-serial.h +++ b/arch/arm/plat-s3c/include/plat/regs-serial.h | |||
| @@ -6,7 +6,7 @@ | |||
| 6 | * | 6 | * |
| 7 | * Copyright (C) 2002 Shane Nay (shane@minirl.com) | 7 | * Copyright (C) 2002 Shane Nay (shane@minirl.com) |
| 8 | * | 8 | * |
| 9 | * Additional defines, (c) 2003 Simtec Electronics (linux@simtec.co.uk) | 9 | * Additional defines, Copyright 2003 Simtec Electronics (linux@simtec.co.uk) |
| 10 | * | 10 | * |
| 11 | * Adapted from: | 11 | * Adapted from: |
| 12 | * | 12 | * |
diff --git a/arch/arm/plat-s3c/include/plat/sdhci.h b/arch/arm/plat-s3c/include/plat/sdhci.h index f615308ccdf..53198673b6b 100644 --- a/arch/arm/plat-s3c/include/plat/sdhci.h +++ b/arch/arm/plat-s3c/include/plat/sdhci.h | |||
| @@ -57,6 +57,7 @@ struct s3c_sdhci_platdata { | |||
| 57 | */ | 57 | */ |
| 58 | extern void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd); | 58 | extern void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd); |
| 59 | extern void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd); | 59 | extern void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd); |
| 60 | extern void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd); | ||
| 60 | 61 | ||
| 61 | /* Default platform data, exported so that per-cpu initialisation can | 62 | /* Default platform data, exported so that per-cpu initialisation can |
| 62 | * set the correct one when there are more than one cpu type selected. | 63 | * set the correct one when there are more than one cpu type selected. |
| @@ -64,11 +65,16 @@ extern void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd); | |||
| 64 | 65 | ||
| 65 | extern struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata; | 66 | extern struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata; |
| 66 | extern struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata; | 67 | extern struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata; |
| 68 | extern struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata; | ||
| 67 | 69 | ||
| 68 | /* Helper function availablity */ | 70 | /* Helper function availablity */ |
| 69 | 71 | ||
| 70 | extern void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *, int w); | 72 | extern void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *, int w); |
| 71 | extern void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *, int w); | 73 | extern void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *, int w); |
| 74 | extern void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *, int w); | ||
| 75 | extern void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *, int w); | ||
| 76 | extern void s5pc100_setup_sdhci2_cfg_gpio(struct platform_device *, int w); | ||
| 77 | extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w); | ||
| 72 | 78 | ||
| 73 | /* S3C6400 SDHCI setup */ | 79 | /* S3C6400 SDHCI setup */ |
| 74 | 80 | ||
| @@ -103,6 +109,17 @@ static inline void s3c6400_default_sdhci1(void) | |||
| 103 | static inline void s3c6400_default_sdhci1(void) { } | 109 | static inline void s3c6400_default_sdhci1(void) { } |
| 104 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | 110 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ |
| 105 | 111 | ||
| 112 | #ifdef CONFIG_S3C_DEV_HSMMC2 | ||
| 113 | static inline void s3c6400_default_sdhci2(void) | ||
| 114 | { | ||
| 115 | s3c_hsmmc2_def_platdata.clocks = s3c6400_hsmmc_clksrcs; | ||
| 116 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; | ||
| 117 | s3c_hsmmc2_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; | ||
| 118 | } | ||
| 119 | #else | ||
| 120 | static inline void s3c6400_default_sdhci2(void) { } | ||
| 121 | #endif /* CONFIG_S3C_DEV_HSMMC2 */ | ||
| 122 | |||
| 106 | #else | 123 | #else |
| 107 | static inline void s3c6400_default_sdhci0(void) { } | 124 | static inline void s3c6400_default_sdhci0(void) { } |
| 108 | static inline void s3c6400_default_sdhci1(void) { } | 125 | static inline void s3c6400_default_sdhci1(void) { } |
| @@ -140,9 +157,70 @@ static inline void s3c6410_default_sdhci1(void) | |||
| 140 | static inline void s3c6410_default_sdhci1(void) { } | 157 | static inline void s3c6410_default_sdhci1(void) { } |
| 141 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | 158 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ |
| 142 | 159 | ||
| 160 | #ifdef CONFIG_S3C_DEV_HSMMC2 | ||
| 161 | static inline void s3c6410_default_sdhci2(void) | ||
| 162 | { | ||
| 163 | s3c_hsmmc2_def_platdata.clocks = s3c6410_hsmmc_clksrcs; | ||
| 164 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; | ||
| 165 | s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card; | ||
| 166 | } | ||
| 167 | #else | ||
| 168 | static inline void s3c6410_default_sdhci2(void) { } | ||
| 169 | #endif /* CONFIG_S3C_DEV_HSMMC2 */ | ||
| 170 | |||
| 143 | #else | 171 | #else |
| 144 | static inline void s3c6410_default_sdhci0(void) { } | 172 | static inline void s3c6410_default_sdhci0(void) { } |
| 145 | static inline void s3c6410_default_sdhci1(void) { } | 173 | static inline void s3c6410_default_sdhci1(void) { } |
| 146 | #endif /* CONFIG_S3C6410_SETUP_SDHCI */ | 174 | #endif /* CONFIG_S3C6410_SETUP_SDHCI */ |
| 147 | 175 | ||
| 176 | /* S5PC100 SDHCI setup */ | ||
| 177 | |||
| 178 | #ifdef CONFIG_S5PC100_SETUP_SDHCI | ||
| 179 | extern char *s5pc100_hsmmc_clksrcs[4]; | ||
| 180 | |||
| 181 | extern void s5pc100_setup_sdhci0_cfg_card(struct platform_device *dev, | ||
| 182 | void __iomem *r, | ||
| 183 | struct mmc_ios *ios, | ||
| 184 | struct mmc_card *card); | ||
| 185 | |||
| 186 | #ifdef CONFIG_S3C_DEV_HSMMC | ||
| 187 | static inline void s5pc100_default_sdhci0(void) | ||
| 188 | { | ||
| 189 | s3c_hsmmc0_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | ||
| 190 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio; | ||
| 191 | s3c_hsmmc0_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card; | ||
| 192 | } | ||
| 193 | #else | ||
| 194 | static inline void s5pc100_default_sdhci0(void) { } | ||
| 195 | #endif /* CONFIG_S3C_DEV_HSMMC */ | ||
| 196 | |||
| 197 | #ifdef CONFIG_S3C_DEV_HSMMC1 | ||
| 198 | static inline void s5pc100_default_sdhci1(void) | ||
| 199 | { | ||
| 200 | s3c_hsmmc1_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | ||
| 201 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio; | ||
| 202 | s3c_hsmmc1_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card; | ||
| 203 | } | ||
| 204 | #else | ||
| 205 | static inline void s5pc100_default_sdhci1(void) { } | ||
| 206 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | ||
| 207 | |||
| 208 | #ifdef CONFIG_S3C_DEV_HSMMC2 | ||
| 209 | static inline void s5pc100_default_sdhci2(void) | ||
| 210 | { | ||
| 211 | s3c_hsmmc2_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | ||
| 212 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio; | ||
| 213 | s3c_hsmmc2_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card; | ||
| 214 | } | ||
| 215 | #else | ||
| 216 | static inline void s5pc100_default_sdhci2(void) { } | ||
| 217 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | ||
| 218 | |||
| 219 | |||
| 220 | #else | ||
| 221 | static inline void s5pc100_default_sdhci0(void) { } | ||
| 222 | static inline void s5pc100_default_sdhci1(void) { } | ||
| 223 | static inline void s5pc100_default_sdhci2(void) { } | ||
| 224 | #endif /* CONFIG_S5PC100_SETUP_SDHCI */ | ||
| 225 | |||
| 148 | #endif /* __PLAT_S3C_SDHCI_H */ | 226 | #endif /* __PLAT_S3C_SDHCI_H */ |
diff --git a/arch/arm/plat-s3c/pm-check.c b/arch/arm/plat-s3c/pm-check.c index 39f2555564d..8eb1f439861 100644 --- a/arch/arm/plat-s3c/pm-check.c +++ b/arch/arm/plat-s3c/pm-check.c | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | /* linux/arch/arm/plat-s3c/pm-check.c | 1 | /* linux/arch/arm/plat-s3c/pm-check.c |
| 2 | * originally in linux/arch/arm/plat-s3c24xx/pm.c | 2 | * originally in linux/arch/arm/plat-s3c24xx/pm.c |
| 3 | * | 3 | * |
| 4 | * Copyright (c) 2004,2006,2008 Simtec Electronics | 4 | * Copyright (c) 2004-2008 Simtec Electronics |
| 5 | * http://armlinux.simtec.co.uk | 5 | * http://armlinux.simtec.co.uk |
| 6 | * Ben Dooks <ben@simtec.co.uk> | 6 | * Ben Dooks <ben@simtec.co.uk> |
| 7 | * | 7 | * |
diff --git a/arch/arm/plat-s3c/pm.c b/arch/arm/plat-s3c/pm.c index 8d97db2c7a0..767470601e5 100644 --- a/arch/arm/plat-s3c/pm.c +++ b/arch/arm/plat-s3c/pm.c | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | /* linux/arch/arm/plat-s3c/pm.c | 1 | /* linux/arch/arm/plat-s3c/pm.c |
| 2 | * | 2 | * |
| 3 | * Copyright 2008 Openmoko, Inc. | 3 | * Copyright 2008 Openmoko, Inc. |
| 4 | * Copyright 2004,2006,2008 Simtec Electronics | 4 | * Copyright 2004-2008 Simtec Electronics |
| 5 | * Ben Dooks <ben@simtec.co.uk> | 5 | * Ben Dooks <ben@simtec.co.uk> |
| 6 | * http://armlinux.simtec.co.uk/ | 6 | * http://armlinux.simtec.co.uk/ |
| 7 | * | 7 | * |
diff --git a/arch/arm/plat-s3c24xx/Kconfig b/arch/arm/plat-s3c24xx/Kconfig index 9c7aca48964..20fbf936bb9 100644 --- a/arch/arm/plat-s3c24xx/Kconfig +++ b/arch/arm/plat-s3c24xx/Kconfig | |||
| @@ -178,4 +178,11 @@ config MACH_SMDK | |||
| 178 | help | 178 | help |
| 179 | Common machine code for SMDK2410 and SMDK2440 | 179 | Common machine code for SMDK2410 and SMDK2440 |
| 180 | 180 | ||
| 181 | config S3C24XX_SIMTEC_AUDIO | ||
| 182 | bool | ||
| 183 | depends on (ARCH_BAST || MACH_VR1000 || MACH_OSIRIS || MACH_ANUBIS) | ||
| 184 | default y | ||
| 185 | help | ||
| 186 | Add audio devices for common Simtec S3C24XX boards | ||
| 187 | |||
| 181 | endif | 188 | endif |
diff --git a/arch/arm/plat-s3c24xx/Makefile b/arch/arm/plat-s3c24xx/Makefile index 7780d2dd833..5dee8c12e8b 100644 --- a/arch/arm/plat-s3c24xx/Makefile +++ b/arch/arm/plat-s3c24xx/Makefile | |||
| @@ -55,3 +55,4 @@ obj-$(CONFIG_S3C24XX_SPI_BUS1_GPD8_GPD9_GPD10) += spi-bus1-gpd8_9_10.o | |||
| 55 | # machine common support | 55 | # machine common support |
| 56 | 56 | ||
| 57 | obj-$(CONFIG_MACH_SMDK) += common-smdk.o | 57 | obj-$(CONFIG_MACH_SMDK) += common-smdk.o |
| 58 | obj-$(CONFIG_S3C24XX_SIMTEC_AUDIO) += simtec-audio.o | ||
diff --git a/arch/arm/plat-s3c24xx/clock-dclk.c b/arch/arm/plat-s3c24xx/clock-dclk.c index 0afb217a775..ac061a1bcb3 100644 --- a/arch/arm/plat-s3c24xx/clock-dclk.c +++ b/arch/arm/plat-s3c24xx/clock-dclk.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* linux/arch/arm/plat-s3c24xx/clock-dclk.c | 1 | /* linux/arch/arm/plat-s3c24xx/clock-dclk.c |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2004,2008 Simtec Electronics | 3 | * Copyright (c) 2004-2008 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * http://armlinux.simtec.co.uk/ | 5 | * http://armlinux.simtec.co.uk/ |
| 6 | * | 6 | * |
diff --git a/arch/arm/plat-s3c24xx/common-smdk.c b/arch/arm/plat-s3c24xx/common-smdk.c index aa119863c5c..9e0e20ad2e4 100644 --- a/arch/arm/plat-s3c24xx/common-smdk.c +++ b/arch/arm/plat-s3c24xx/common-smdk.c | |||
| @@ -198,7 +198,7 @@ void __init smdk_machine_init(void) | |||
| 198 | if (machine_is_smdk2443()) | 198 | if (machine_is_smdk2443()) |
| 199 | smdk_nand_info.twrph0 = 50; | 199 | smdk_nand_info.twrph0 = 50; |
| 200 | 200 | ||
| 201 | s3c_device_nand.dev.platform_data = &smdk_nand_info; | 201 | s3c_nand_set_platdata(&smdk_nand_info); |
| 202 | 202 | ||
| 203 | platform_add_devices(smdk_devs, ARRAY_SIZE(smdk_devs)); | 203 | platform_add_devices(smdk_devs, ARRAY_SIZE(smdk_devs)); |
| 204 | 204 | ||
diff --git a/arch/arm/plat-s3c24xx/cpu-freq.c b/arch/arm/plat-s3c24xx/cpu-freq.c index 4f1b789a117..2d42efb9f4e 100644 --- a/arch/arm/plat-s3c24xx/cpu-freq.c +++ b/arch/arm/plat-s3c24xx/cpu-freq.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* linux/arch/arm/plat-s3c24xx/cpu-freq.c | 1 | /* linux/arch/arm/plat-s3c24xx/cpu-freq.c |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2006,2007,2008 Simtec Electronics | 3 | * Copyright (c) 2006-2008 Simtec Electronics |
| 4 | * http://armlinux.simtec.co.uk/ | 4 | * http://armlinux.simtec.co.uk/ |
| 5 | * Ben Dooks <ben@simtec.co.uk> | 5 | * Ben Dooks <ben@simtec.co.uk> |
| 6 | * | 6 | * |
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c index f046f8c5108..f65192d5b1d 100644 --- a/arch/arm/plat-s3c24xx/dma.c +++ b/arch/arm/plat-s3c24xx/dma.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* linux/arch/arm/plat-s3c24xx/dma.c | 1 | /* linux/arch/arm/plat-s3c24xx/dma.c |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2003-2005,2006 Simtec Electronics | 3 | * Copyright 2003-2006 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * | 5 | * |
| 6 | * S3C2410 DMA core | 6 | * S3C2410 DMA core |
| @@ -1310,7 +1310,7 @@ int __init s3c24xx_dma_init(unsigned int channels, unsigned int irq, | |||
| 1310 | int channel; | 1310 | int channel; |
| 1311 | int ret; | 1311 | int ret; |
| 1312 | 1312 | ||
| 1313 | printk("S3C24XX DMA Driver, (c) 2003-2004,2006 Simtec Electronics\n"); | 1313 | printk("S3C24XX DMA Driver, Copyright 2003-2006 Simtec Electronics\n"); |
| 1314 | 1314 | ||
| 1315 | dma_channels = channels; | 1315 | dma_channels = channels; |
| 1316 | 1316 | ||
diff --git a/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h b/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h index c776120b99e..33d421d78ba 100644 --- a/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h +++ b/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* arch/arm/plat-s3c/include/plat/cpu-freq.h | 1 | /* arch/arm/plat-s3c/include/plat/cpu-freq.h |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2006,2007,2009 Simtec Electronics | 3 | * Copyright (c) 2006-2009 Simtec Electronics |
| 4 | * http://armlinux.simtec.co.uk/ | 4 | * http://armlinux.simtec.co.uk/ |
| 5 | * Ben Dooks <ben@simtec.co.uk> | 5 | * Ben Dooks <ben@simtec.co.uk> |
| 6 | * | 6 | * |
diff --git a/arch/arm/plat-s3c24xx/include/plat/mci.h b/arch/arm/plat-s3c24xx/include/plat/mci.h index c2cef613968..36aaa10fad0 100644 --- a/arch/arm/plat-s3c24xx/include/plat/mci.h +++ b/arch/arm/plat-s3c24xx/include/plat/mci.h | |||
| @@ -1,6 +1,31 @@ | |||
| 1 | #ifndef _ARCH_MCI_H | 1 | #ifndef _ARCH_MCI_H |
| 2 | #define _ARCH_MCI_H | 2 | #define _ARCH_MCI_H |
| 3 | 3 | ||
| 4 | /** | ||
| 5 | * struct s3c24xx_mci_pdata - sd/mmc controller platform data | ||
| 6 | * @no_wprotect: Set this to indicate there is no write-protect switch. | ||
| 7 | * @no_detect: Set this if there is no detect switch. | ||
| 8 | * @wprotect_invert: Invert the default sense of the write protect switch. | ||
| 9 | * @detect_invert: Invert the default sense of the write protect switch. | ||
| 10 | * @use_dma: Set to allow the use of DMA. | ||
| 11 | * @gpio_detect: GPIO number for the card detect line. | ||
| 12 | * @gpio_wprotect: GPIO number for the write protect line. | ||
| 13 | * @ocr_avail: The mask of the available power states, non-zero to use. | ||
| 14 | * @set_power: Callback to control the power mode. | ||
| 15 | * | ||
| 16 | * The @gpio_detect is used for card detection when @no_wprotect is unset, | ||
| 17 | * and the default sense is that 0 returned from gpio_get_value() means | ||
| 18 | * that a card is inserted. If @detect_invert is set, then the value from | ||
| 19 | * gpio_get_value() is inverted, which makes 1 mean card inserted. | ||
| 20 | * | ||
| 21 | * The driver will use @gpio_wprotect to signal whether the card is write | ||
| 22 | * protected if @no_wprotect is not set. A 0 returned from gpio_get_value() | ||
| 23 | * means the card is read/write, and 1 means read-only. The @wprotect_invert | ||
| 24 | * will invert the value returned from gpio_get_value(). | ||
| 25 | * | ||
| 26 | * Card power is set by @ocr_availa, using MCC_VDD_ constants if it is set | ||
| 27 | * to a non-zero value, otherwise the default of 3.2-3.4V is used. | ||
| 28 | */ | ||
| 4 | struct s3c24xx_mci_pdata { | 29 | struct s3c24xx_mci_pdata { |
| 5 | unsigned int no_wprotect : 1; | 30 | unsigned int no_wprotect : 1; |
| 6 | unsigned int no_detect : 1; | 31 | unsigned int no_detect : 1; |
diff --git a/arch/arm/plat-s3c24xx/include/plat/regs-dma.h b/arch/arm/plat-s3c24xx/include/plat/regs-dma.h index 3bc0a216df9..1b0f4c36d38 100644 --- a/arch/arm/plat-s3c24xx/include/plat/regs-dma.h +++ b/arch/arm/plat-s3c24xx/include/plat/regs-dma.h | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* arch/arm/mach-s3c2410/include/mach/dma.h | 1 | /* arch/arm/mach-s3c2410/include/mach/dma.h |
| 2 | * | 2 | * |
| 3 | * Copyright (C) 2003,2004,2006 Simtec Electronics | 3 | * Copyright (C) 2003-2006 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * | 5 | * |
| 6 | * Samsung S3C24XX DMA support | 6 | * Samsung S3C24XX DMA support |
diff --git a/arch/arm/plat-s3c24xx/irq-pm.c b/arch/arm/plat-s3c24xx/irq-pm.c index b7acf1a8ecd..ea8dea3339a 100644 --- a/arch/arm/plat-s3c24xx/irq-pm.c +++ b/arch/arm/plat-s3c24xx/irq-pm.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* linux/arch/arm/plat-s3c24xx/irq-om.c | 1 | /* linux/arch/arm/plat-s3c24xx/irq-om.c |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2003,2004 Simtec Electronics | 3 | * Copyright (c) 2003-2004 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * http://armlinux.simtec.co.uk/ | 5 | * http://armlinux.simtec.co.uk/ |
| 6 | * | 6 | * |
diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c index d02f5f02045..ef0f521437d 100644 --- a/arch/arm/plat-s3c24xx/irq.c +++ b/arch/arm/plat-s3c24xx/irq.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* linux/arch/arm/plat-s3c24xx/irq.c | 1 | /* linux/arch/arm/plat-s3c24xx/irq.c |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2003,2004 Simtec Electronics | 3 | * Copyright (c) 2003-2004 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
diff --git a/arch/arm/plat-s3c24xx/pm-simtec.c b/arch/arm/plat-s3c24xx/pm-simtec.c index da0d3217d3e..663b280d65d 100644 --- a/arch/arm/plat-s3c24xx/pm-simtec.c +++ b/arch/arm/plat-s3c24xx/pm-simtec.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* linux/arch/arm/plat-s3c24xx/pm-simtec.c | 1 | /* linux/arch/arm/plat-s3c24xx/pm-simtec.c |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2004 Simtec Electronics | 3 | * Copyright 2004 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * | 5 | * |
| 6 | * http://armlinux.simtec.co.uk/ | 6 | * http://armlinux.simtec.co.uk/ |
| @@ -35,7 +35,7 @@ | |||
| 35 | 35 | ||
| 36 | #include <plat/pm.h> | 36 | #include <plat/pm.h> |
| 37 | 37 | ||
| 38 | #define COPYRIGHT ", (c) 2005 Simtec Electronics" | 38 | #define COPYRIGHT ", Copyright 2005 Simtec Electronics" |
| 39 | 39 | ||
| 40 | /* pm_simtec_init | 40 | /* pm_simtec_init |
| 41 | * | 41 | * |
diff --git a/arch/arm/plat-s3c24xx/pm.c b/arch/arm/plat-s3c24xx/pm.c index 56e5253ca02..3620dd29909 100644 --- a/arch/arm/plat-s3c24xx/pm.c +++ b/arch/arm/plat-s3c24xx/pm.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* linux/arch/arm/plat-s3c24xx/pm.c | 1 | /* linux/arch/arm/plat-s3c24xx/pm.c |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2004,2006 Simtec Electronics | 3 | * Copyright (c) 2004-2006 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * | 5 | * |
| 6 | * S3C24XX Power Manager (Suspend-To-RAM) support | 6 | * S3C24XX Power Manager (Suspend-To-RAM) support |
diff --git a/arch/arm/plat-s3c24xx/s3c2410-iotiming.c b/arch/arm/plat-s3c24xx/s3c2410-iotiming.c index d0a3a145cd4..963fb0b4379 100644 --- a/arch/arm/plat-s3c24xx/s3c2410-iotiming.c +++ b/arch/arm/plat-s3c24xx/s3c2410-iotiming.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* linux/arch/arm/plat-s3c24xx/s3c2410-iotiming.c | 1 | /* linux/arch/arm/plat-s3c24xx/s3c2410-iotiming.c |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2006,2008,2009 Simtec Electronics | 3 | * Copyright (c) 2006-2009 Simtec Electronics |
| 4 | * http://armlinux.simtec.co.uk/ | 4 | * http://armlinux.simtec.co.uk/ |
| 5 | * Ben Dooks <ben@simtec.co.uk> | 5 | * Ben Dooks <ben@simtec.co.uk> |
| 6 | * | 6 | * |
diff --git a/arch/arm/plat-s3c24xx/s3c2412-iotiming.c b/arch/arm/plat-s3c24xx/s3c2412-iotiming.c index fd45e47facb..24993dce10b 100644 --- a/arch/arm/plat-s3c24xx/s3c2412-iotiming.c +++ b/arch/arm/plat-s3c24xx/s3c2412-iotiming.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* linux/arch/arm/plat-s3c24xx/s3c2412-iotiming.c | 1 | /* linux/arch/arm/plat-s3c24xx/s3c2412-iotiming.c |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2006,2008 Simtec Electronics | 3 | * Copyright (c) 2006-2008 Simtec Electronics |
| 4 | * http://armlinux.simtec.co.uk/ | 4 | * http://armlinux.simtec.co.uk/ |
| 5 | * Ben Dooks <ben@simtec.co.uk> | 5 | * Ben Dooks <ben@simtec.co.uk> |
| 6 | * | 6 | * |
diff --git a/arch/arm/plat-s3c24xx/s3c2440-cpufreq.c b/arch/arm/plat-s3c24xx/s3c2440-cpufreq.c index ae2e6c604f2..976002fb1b8 100644 --- a/arch/arm/plat-s3c24xx/s3c2440-cpufreq.c +++ b/arch/arm/plat-s3c24xx/s3c2440-cpufreq.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* linux/arch/arm/plat-s3c24xx/s3c2440-cpufreq.c | 1 | /* linux/arch/arm/plat-s3c24xx/s3c2440-cpufreq.c |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2006,2008,2009 Simtec Electronics | 3 | * Copyright (c) 2006-2009 Simtec Electronics |
| 4 | * http://armlinux.simtec.co.uk/ | 4 | * http://armlinux.simtec.co.uk/ |
| 5 | * Ben Dooks <ben@simtec.co.uk> | 5 | * Ben Dooks <ben@simtec.co.uk> |
| 6 | * Vincent Sanders <vince@simtec.co.uk> | 6 | * Vincent Sanders <vince@simtec.co.uk> |
diff --git a/arch/arm/plat-s3c24xx/s3c2440-pll-12000000.c b/arch/arm/plat-s3c24xx/s3c2440-pll-12000000.c index ff9443b233a..49f65032f2c 100644 --- a/arch/arm/plat-s3c24xx/s3c2440-pll-12000000.c +++ b/arch/arm/plat-s3c24xx/s3c2440-pll-12000000.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* arch/arm/plat-s3c24xx/s3c2440-pll-12000000.c | 1 | /* arch/arm/plat-s3c24xx/s3c2440-pll-12000000.c |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2006,2007 Simtec Electronics | 3 | * Copyright (c) 2006-2007 Simtec Electronics |
| 4 | * http://armlinux.simtec.co.uk/ | 4 | * http://armlinux.simtec.co.uk/ |
| 5 | * Ben Dooks <ben@simtec.co.uk> | 5 | * Ben Dooks <ben@simtec.co.uk> |
| 6 | * Vincent Sanders <vince@arm.linux.org.uk> | 6 | * Vincent Sanders <vince@arm.linux.org.uk> |
diff --git a/arch/arm/plat-s3c24xx/s3c244x-clock.c b/arch/arm/plat-s3c24xx/s3c244x-clock.c index dde41f171af..79371091aa3 100644 --- a/arch/arm/plat-s3c24xx/s3c244x-clock.c +++ b/arch/arm/plat-s3c24xx/s3c244x-clock.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* linux/arch/arm/plat-s3c24xx/s3c24xx-clock.c | 1 | /* linux/arch/arm/plat-s3c24xx/s3c24xx-clock.c |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2004-2005,2008 Simtec Electronics | 3 | * Copyright (c) 2004-2008 Simtec Electronics |
| 4 | * http://armlinux.simtec.co.uk/ | 4 | * http://armlinux.simtec.co.uk/ |
| 5 | * Ben Dooks <ben@simtec.co.uk> | 5 | * Ben Dooks <ben@simtec.co.uk> |
| 6 | * | 6 | * |
diff --git a/arch/arm/plat-s3c24xx/s3c244x-irq.c b/arch/arm/plat-s3c24xx/s3c244x-irq.c index 0902afd227c..a75c0c2431e 100644 --- a/arch/arm/plat-s3c24xx/s3c244x-irq.c +++ b/arch/arm/plat-s3c24xx/s3c244x-irq.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* linux/arch/arm/plat-s3c24xx/s3c244x-irq.c | 1 | /* linux/arch/arm/plat-s3c24xx/s3c244x-irq.c |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2003,2004 Simtec Electronics | 3 | * Copyright (c) 2003-2004 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
diff --git a/arch/arm/plat-s3c24xx/simtec-audio.c b/arch/arm/plat-s3c24xx/simtec-audio.c new file mode 100644 index 00000000000..6bc832e0d8e --- /dev/null +++ b/arch/arm/plat-s3c24xx/simtec-audio.c | |||
| @@ -0,0 +1,77 @@ | |||
| 1 | /* linux/arch/arm/plat-s3c24xx/simtec-audio.c | ||
| 2 | * | ||
| 3 | * Copyright (c) 2009 Simtec Electronics | ||
| 4 | * http://armlinux.simtec.co.uk/ | ||
| 5 | * Ben Dooks <ben@simtec.co.uk> | ||
| 6 | * | ||
| 7 | * Audio setup for various Simtec S3C24XX implementations | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License version 2 as | ||
| 11 | * published by the Free Software Foundation. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/kernel.h> | ||
| 15 | #include <linux/interrupt.h> | ||
| 16 | #include <linux/init.h> | ||
| 17 | #include <linux/device.h> | ||
| 18 | #include <linux/io.h> | ||
| 19 | |||
| 20 | #include <mach/bast-map.h> | ||
| 21 | #include <mach/bast-irq.h> | ||
| 22 | #include <mach/bast-cpld.h> | ||
| 23 | |||
| 24 | #include <mach/hardware.h> | ||
| 25 | #include <mach/regs-gpio.h> | ||
| 26 | |||
| 27 | #include <plat/audio-simtec.h> | ||
| 28 | #include <plat/devs.h> | ||
| 29 | |||
| 30 | /* platform ops for audio */ | ||
| 31 | |||
| 32 | static void simtec_audio_startup_lrroute(void) | ||
| 33 | { | ||
| 34 | unsigned int tmp; | ||
| 35 | unsigned long flags; | ||
| 36 | |||
| 37 | local_irq_save(flags); | ||
| 38 | |||
| 39 | tmp = __raw_readb(BAST_VA_CTRL1); | ||
| 40 | tmp &= ~BAST_CPLD_CTRL1_LRMASK; | ||
| 41 | tmp |= BAST_CPLD_CTRL1_LRCDAC; | ||
| 42 | __raw_writeb(tmp, BAST_VA_CTRL1); | ||
| 43 | |||
| 44 | local_irq_restore(flags); | ||
| 45 | } | ||
| 46 | |||
| 47 | static struct s3c24xx_audio_simtec_pdata simtec_audio_platdata; | ||
| 48 | static char our_name[32]; | ||
| 49 | |||
| 50 | static struct platform_device simtec_audio_dev = { | ||
| 51 | .name = our_name, | ||
| 52 | .id = -1, | ||
| 53 | .dev = { | ||
| 54 | .parent = &s3c_device_iis.dev, | ||
| 55 | .platform_data = &simtec_audio_platdata, | ||
| 56 | }, | ||
| 57 | }; | ||
| 58 | |||
| 59 | int __init simtec_audio_add(const char *name, bool has_lr_routing, | ||
| 60 | struct s3c24xx_audio_simtec_pdata *spd) | ||
| 61 | { | ||
| 62 | if (!name) | ||
| 63 | name = "tlv320aic23"; | ||
| 64 | |||
| 65 | snprintf(our_name, sizeof(our_name)-1, "s3c24xx-simtec-%s", name); | ||
| 66 | |||
| 67 | /* copy platform data so the source can be __initdata */ | ||
| 68 | if (spd) | ||
| 69 | simtec_audio_platdata = *spd; | ||
| 70 | |||
| 71 | if (has_lr_routing) | ||
| 72 | simtec_audio_platdata.startup = simtec_audio_startup_lrroute; | ||
| 73 | |||
| 74 | platform_device_register(&s3c_device_iis); | ||
| 75 | platform_device_register(&simtec_audio_dev); | ||
| 76 | return 0; | ||
| 77 | } | ||
diff --git a/arch/arm/plat-s3c64xx/cpu.c b/arch/arm/plat-s3c64xx/cpu.c index b1fdd83940a..49796d2db86 100644 --- a/arch/arm/plat-s3c64xx/cpu.c +++ b/arch/arm/plat-s3c64xx/cpu.c | |||
| @@ -107,6 +107,11 @@ static struct map_desc s3c_iodesc[] __initdata = { | |||
| 107 | .pfn = __phys_to_pfn(S3C64XX_PA_WATCHDOG), | 107 | .pfn = __phys_to_pfn(S3C64XX_PA_WATCHDOG), |
| 108 | .length = SZ_4K, | 108 | .length = SZ_4K, |
| 109 | .type = MT_DEVICE, | 109 | .type = MT_DEVICE, |
| 110 | }, { | ||
| 111 | .virtual = (unsigned long)S3C_VA_USB_HSPHY, | ||
| 112 | .pfn = __phys_to_pfn(S3C64XX_PA_USB_HSPHY), | ||
| 113 | .length = SZ_1K, | ||
| 114 | .type = MT_DEVICE, | ||
| 110 | }, | 115 | }, |
| 111 | }; | 116 | }; |
| 112 | 117 | ||
diff --git a/arch/arm/plat-s3c64xx/cpufreq.c b/arch/arm/plat-s3c64xx/cpufreq.c index e6e0843215d..74c0e8347de 100644 --- a/arch/arm/plat-s3c64xx/cpufreq.c +++ b/arch/arm/plat-s3c64xx/cpufreq.c | |||
| @@ -19,6 +19,7 @@ | |||
| 19 | 19 | ||
| 20 | static struct clk *armclk; | 20 | static struct clk *armclk; |
| 21 | static struct regulator *vddarm; | 21 | static struct regulator *vddarm; |
| 22 | static unsigned long regulator_latency; | ||
| 22 | 23 | ||
| 23 | #ifdef CONFIG_CPU_S3C6410 | 24 | #ifdef CONFIG_CPU_S3C6410 |
| 24 | struct s3c64xx_dvfs { | 25 | struct s3c64xx_dvfs { |
| @@ -27,11 +28,10 @@ struct s3c64xx_dvfs { | |||
| 27 | }; | 28 | }; |
| 28 | 29 | ||
| 29 | static struct s3c64xx_dvfs s3c64xx_dvfs_table[] = { | 30 | static struct s3c64xx_dvfs s3c64xx_dvfs_table[] = { |
| 30 | [0] = { 1000000, 1000000 }, | 31 | [0] = { 1000000, 1150000 }, |
| 31 | [1] = { 1000000, 1050000 }, | 32 | [1] = { 1050000, 1150000 }, |
| 32 | [2] = { 1050000, 1100000 }, | 33 | [2] = { 1100000, 1150000 }, |
| 33 | [3] = { 1050000, 1150000 }, | 34 | [3] = { 1200000, 1350000 }, |
| 34 | [4] = { 1250000, 1350000 }, | ||
| 35 | }; | 35 | }; |
| 36 | 36 | ||
| 37 | static struct cpufreq_frequency_table s3c64xx_freq_table[] = { | 37 | static struct cpufreq_frequency_table s3c64xx_freq_table[] = { |
| @@ -41,9 +41,9 @@ static struct cpufreq_frequency_table s3c64xx_freq_table[] = { | |||
| 41 | { 1, 266000 }, | 41 | { 1, 266000 }, |
| 42 | { 2, 333000 }, | 42 | { 2, 333000 }, |
| 43 | { 2, 400000 }, | 43 | { 2, 400000 }, |
| 44 | { 3, 532000 }, | 44 | { 2, 532000 }, |
| 45 | { 3, 533000 }, | 45 | { 2, 533000 }, |
| 46 | { 4, 667000 }, | 46 | { 3, 667000 }, |
| 47 | { 0, CPUFREQ_TABLE_END }, | 47 | { 0, CPUFREQ_TABLE_END }, |
| 48 | }; | 48 | }; |
| 49 | #endif | 49 | #endif |
| @@ -141,7 +141,7 @@ err: | |||
| 141 | } | 141 | } |
| 142 | 142 | ||
| 143 | #ifdef CONFIG_REGULATOR | 143 | #ifdef CONFIG_REGULATOR |
| 144 | static void __init s3c64xx_cpufreq_constrain_voltages(void) | 144 | static void __init s3c64xx_cpufreq_config_regulator(void) |
| 145 | { | 145 | { |
| 146 | int count, v, i, found; | 146 | int count, v, i, found; |
| 147 | struct cpufreq_frequency_table *freq; | 147 | struct cpufreq_frequency_table *freq; |
| @@ -150,11 +150,10 @@ static void __init s3c64xx_cpufreq_constrain_voltages(void) | |||
| 150 | count = regulator_count_voltages(vddarm); | 150 | count = regulator_count_voltages(vddarm); |
| 151 | if (count < 0) { | 151 | if (count < 0) { |
| 152 | pr_err("cpufreq: Unable to check supported voltages\n"); | 152 | pr_err("cpufreq: Unable to check supported voltages\n"); |
| 153 | return; | ||
| 154 | } | 153 | } |
| 155 | 154 | ||
| 156 | freq = s3c64xx_freq_table; | 155 | freq = s3c64xx_freq_table; |
| 157 | while (freq->frequency != CPUFREQ_TABLE_END) { | 156 | while (count > 0 && freq->frequency != CPUFREQ_TABLE_END) { |
| 158 | if (freq->frequency == CPUFREQ_ENTRY_INVALID) | 157 | if (freq->frequency == CPUFREQ_ENTRY_INVALID) |
| 159 | continue; | 158 | continue; |
| 160 | 159 | ||
| @@ -175,6 +174,10 @@ static void __init s3c64xx_cpufreq_constrain_voltages(void) | |||
| 175 | 174 | ||
| 176 | freq++; | 175 | freq++; |
| 177 | } | 176 | } |
| 177 | |||
| 178 | /* Guess based on having to do an I2C/SPI write; in future we | ||
| 179 | * will be able to query the regulator performance here. */ | ||
| 180 | regulator_latency = 1 * 1000 * 1000; | ||
| 178 | } | 181 | } |
| 179 | #endif | 182 | #endif |
| 180 | 183 | ||
| @@ -206,7 +209,7 @@ static int __init s3c64xx_cpufreq_driver_init(struct cpufreq_policy *policy) | |||
| 206 | pr_err("cpufreq: Only frequency scaling available\n"); | 209 | pr_err("cpufreq: Only frequency scaling available\n"); |
| 207 | vddarm = NULL; | 210 | vddarm = NULL; |
| 208 | } else { | 211 | } else { |
| 209 | s3c64xx_cpufreq_constrain_voltages(); | 212 | s3c64xx_cpufreq_config_regulator(); |
| 210 | } | 213 | } |
| 211 | #endif | 214 | #endif |
| 212 | 215 | ||
| @@ -217,8 +220,11 @@ static int __init s3c64xx_cpufreq_driver_init(struct cpufreq_policy *policy) | |||
| 217 | /* Check for frequencies we can generate */ | 220 | /* Check for frequencies we can generate */ |
| 218 | r = clk_round_rate(armclk, freq->frequency * 1000); | 221 | r = clk_round_rate(armclk, freq->frequency * 1000); |
| 219 | r /= 1000; | 222 | r /= 1000; |
| 220 | if (r != freq->frequency) | 223 | if (r != freq->frequency) { |
| 224 | pr_debug("cpufreq: %dkHz unsupported by clock\n", | ||
| 225 | freq->frequency); | ||
| 221 | freq->frequency = CPUFREQ_ENTRY_INVALID; | 226 | freq->frequency = CPUFREQ_ENTRY_INVALID; |
| 227 | } | ||
| 222 | 228 | ||
| 223 | /* If we have no regulator then assume startup | 229 | /* If we have no regulator then assume startup |
| 224 | * frequency is the maximum we can support. */ | 230 | * frequency is the maximum we can support. */ |
| @@ -230,9 +236,11 @@ static int __init s3c64xx_cpufreq_driver_init(struct cpufreq_policy *policy) | |||
| 230 | 236 | ||
| 231 | policy->cur = clk_get_rate(armclk) / 1000; | 237 | policy->cur = clk_get_rate(armclk) / 1000; |
| 232 | 238 | ||
| 233 | /* Pick a conservative guess in ns: we'll need ~1 I2C/SPI | 239 | /* Datasheet says PLL stabalisation time (if we were to use |
| 234 | * write plus clock reprogramming. */ | 240 | * the PLLs, which we don't currently) is ~300us worst case, |
| 235 | policy->cpuinfo.transition_latency = 2 * 1000 * 1000; | 241 | * but add some fudge. |
| 242 | */ | ||
| 243 | policy->cpuinfo.transition_latency = (500 * 1000) + regulator_latency; | ||
| 236 | 244 | ||
| 237 | ret = cpufreq_frequency_table_cpuinfo(policy, s3c64xx_freq_table); | 245 | ret = cpufreq_frequency_table_cpuinfo(policy, s3c64xx_freq_table); |
| 238 | if (ret != 0) { | 246 | if (ret != 0) { |
diff --git a/arch/arm/plat-s3c64xx/dev-audio.c b/arch/arm/plat-s3c64xx/dev-audio.c index 1322beb40dd..a21a88fbb7e 100644 --- a/arch/arm/plat-s3c64xx/dev-audio.c +++ b/arch/arm/plat-s3c64xx/dev-audio.c | |||
| @@ -15,9 +15,14 @@ | |||
| 15 | 15 | ||
| 16 | #include <mach/irqs.h> | 16 | #include <mach/irqs.h> |
| 17 | #include <mach/map.h> | 17 | #include <mach/map.h> |
| 18 | #include <mach/dma.h> | ||
| 19 | #include <mach/gpio.h> | ||
| 18 | 20 | ||
| 19 | #include <plat/devs.h> | 21 | #include <plat/devs.h> |
| 20 | 22 | #include <plat/audio.h> | |
| 23 | #include <plat/gpio-bank-d.h> | ||
| 24 | #include <plat/gpio-bank-e.h> | ||
| 25 | #include <plat/gpio-cfg.h> | ||
| 21 | 26 | ||
| 22 | static struct resource s3c64xx_iis0_resource[] = { | 27 | static struct resource s3c64xx_iis0_resource[] = { |
| 23 | [0] = { | 28 | [0] = { |
| @@ -66,3 +71,97 @@ struct platform_device s3c64xx_device_iisv4 = { | |||
| 66 | .resource = s3c64xx_iisv4_resource, | 71 | .resource = s3c64xx_iisv4_resource, |
| 67 | }; | 72 | }; |
| 68 | EXPORT_SYMBOL(s3c64xx_device_iisv4); | 73 | EXPORT_SYMBOL(s3c64xx_device_iisv4); |
| 74 | |||
| 75 | |||
| 76 | /* PCM Controller platform_devices */ | ||
| 77 | |||
| 78 | static int s3c64xx_pcm_cfg_gpio(struct platform_device *pdev) | ||
| 79 | { | ||
| 80 | switch (pdev->id) { | ||
| 81 | case 0: | ||
| 82 | s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_PCM0_SCLK); | ||
| 83 | s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_PCM0_EXTCLK); | ||
| 84 | s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_PCM0_FSYNC); | ||
| 85 | s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_PCM0_SIN); | ||
| 86 | s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_PCM0_SOUT); | ||
| 87 | break; | ||
| 88 | case 1: | ||
| 89 | s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_PCM1_SCLK); | ||
| 90 | s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_PCM1_EXTCLK); | ||
| 91 | s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_PCM1_FSYNC); | ||
| 92 | s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_PCM1_SIN); | ||
| 93 | s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_PCM1_SOUT); | ||
| 94 | break; | ||
| 95 | default: | ||
| 96 | printk(KERN_DEBUG "Invalid PCM Controller number!"); | ||
| 97 | return -EINVAL; | ||
| 98 | } | ||
| 99 | |||
| 100 | return 0; | ||
| 101 | } | ||
| 102 | |||
| 103 | static struct resource s3c64xx_pcm0_resource[] = { | ||
| 104 | [0] = { | ||
| 105 | .start = S3C64XX_PA_PCM0, | ||
| 106 | .end = S3C64XX_PA_PCM0 + 0x100 - 1, | ||
| 107 | .flags = IORESOURCE_MEM, | ||
| 108 | }, | ||
| 109 | [1] = { | ||
| 110 | .start = DMACH_PCM0_TX, | ||
| 111 | .end = DMACH_PCM0_TX, | ||
| 112 | .flags = IORESOURCE_DMA, | ||
| 113 | }, | ||
| 114 | [2] = { | ||
| 115 | .start = DMACH_PCM0_RX, | ||
| 116 | .end = DMACH_PCM0_RX, | ||
| 117 | .flags = IORESOURCE_DMA, | ||
| 118 | }, | ||
| 119 | }; | ||
| 120 | |||
| 121 | static struct s3c_audio_pdata s3c_pcm0_pdata = { | ||
| 122 | .cfg_gpio = s3c64xx_pcm_cfg_gpio, | ||
| 123 | }; | ||
| 124 | |||
| 125 | struct platform_device s3c64xx_device_pcm0 = { | ||
| 126 | .name = "samsung-pcm", | ||
| 127 | .id = 0, | ||
| 128 | .num_resources = ARRAY_SIZE(s3c64xx_pcm0_resource), | ||
| 129 | .resource = s3c64xx_pcm0_resource, | ||
| 130 | .dev = { | ||
| 131 | .platform_data = &s3c_pcm0_pdata, | ||
| 132 | }, | ||
| 133 | }; | ||
| 134 | EXPORT_SYMBOL(s3c64xx_device_pcm0); | ||
| 135 | |||
| 136 | static struct resource s3c64xx_pcm1_resource[] = { | ||
| 137 | [0] = { | ||
| 138 | .start = S3C64XX_PA_PCM1, | ||
| 139 | .end = S3C64XX_PA_PCM1 + 0x100 - 1, | ||
| 140 | .flags = IORESOURCE_MEM, | ||
| 141 | }, | ||
| 142 | [1] = { | ||
| 143 | .start = DMACH_PCM1_TX, | ||
| 144 | .end = DMACH_PCM1_TX, | ||
| 145 | .flags = IORESOURCE_DMA, | ||
| 146 | }, | ||
| 147 | [2] = { | ||
| 148 | .start = DMACH_PCM1_RX, | ||
| 149 | .end = DMACH_PCM1_RX, | ||
| 150 | .flags = IORESOURCE_DMA, | ||
| 151 | }, | ||
| 152 | }; | ||
| 153 | |||
| 154 | static struct s3c_audio_pdata s3c_pcm1_pdata = { | ||
| 155 | .cfg_gpio = s3c64xx_pcm_cfg_gpio, | ||
| 156 | }; | ||
| 157 | |||
| 158 | struct platform_device s3c64xx_device_pcm1 = { | ||
| 159 | .name = "samsung-pcm", | ||
| 160 | .id = 1, | ||
| 161 | .num_resources = ARRAY_SIZE(s3c64xx_pcm1_resource), | ||
| 162 | .resource = s3c64xx_pcm1_resource, | ||
| 163 | .dev = { | ||
| 164 | .platform_data = &s3c_pcm1_pdata, | ||
| 165 | }, | ||
| 166 | }; | ||
| 167 | EXPORT_SYMBOL(s3c64xx_device_pcm1); | ||
diff --git a/arch/arm/plat-s3c64xx/gpiolib.c b/arch/arm/plat-s3c64xx/gpiolib.c index 92859290ea3..77856045727 100644 --- a/arch/arm/plat-s3c64xx/gpiolib.c +++ b/arch/arm/plat-s3c64xx/gpiolib.c | |||
| @@ -213,6 +213,11 @@ static struct s3c_gpio_cfg gpio_4bit_cfg_eint0011 = { | |||
| 213 | .get_pull = s3c_gpio_getpull_updown, | 213 | .get_pull = s3c_gpio_getpull_updown, |
| 214 | }; | 214 | }; |
| 215 | 215 | ||
| 216 | int s3c64xx_gpio2int_gpm(struct gpio_chip *chip, unsigned pin) | ||
| 217 | { | ||
| 218 | return pin < 5 ? IRQ_EINT(23) + pin : -ENXIO; | ||
| 219 | } | ||
| 220 | |||
| 216 | static struct s3c_gpio_chip gpio_4bit[] = { | 221 | static struct s3c_gpio_chip gpio_4bit[] = { |
| 217 | { | 222 | { |
| 218 | .base = S3C64XX_GPA_BASE, | 223 | .base = S3C64XX_GPA_BASE, |
| @@ -269,10 +274,16 @@ static struct s3c_gpio_chip gpio_4bit[] = { | |||
| 269 | .base = S3C64XX_GPM(0), | 274 | .base = S3C64XX_GPM(0), |
| 270 | .ngpio = S3C64XX_GPIO_M_NR, | 275 | .ngpio = S3C64XX_GPIO_M_NR, |
| 271 | .label = "GPM", | 276 | .label = "GPM", |
| 277 | .to_irq = s3c64xx_gpio2int_gpm, | ||
| 272 | }, | 278 | }, |
| 273 | }, | 279 | }, |
| 274 | }; | 280 | }; |
| 275 | 281 | ||
| 282 | int s3c64xx_gpio2int_gpl(struct gpio_chip *chip, unsigned pin) | ||
| 283 | { | ||
| 284 | return pin >= 8 ? IRQ_EINT(16) + pin - 8 : -ENXIO; | ||
| 285 | } | ||
| 286 | |||
| 276 | static struct s3c_gpio_chip gpio_4bit2[] = { | 287 | static struct s3c_gpio_chip gpio_4bit2[] = { |
| 277 | { | 288 | { |
| 278 | .base = S3C64XX_GPH_BASE + 0x4, | 289 | .base = S3C64XX_GPH_BASE + 0x4, |
| @@ -297,6 +308,7 @@ static struct s3c_gpio_chip gpio_4bit2[] = { | |||
| 297 | .base = S3C64XX_GPL(0), | 308 | .base = S3C64XX_GPL(0), |
| 298 | .ngpio = S3C64XX_GPIO_L_NR, | 309 | .ngpio = S3C64XX_GPIO_L_NR, |
| 299 | .label = "GPL", | 310 | .label = "GPL", |
| 311 | .to_irq = s3c64xx_gpio2int_gpl, | ||
| 300 | }, | 312 | }, |
| 301 | }, | 313 | }, |
| 302 | }; | 314 | }; |
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-c.h b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-c.h index c47daf7e272..e22b49f4f98 100644 --- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-c.h +++ b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-c.h | |||
| @@ -36,18 +36,18 @@ | |||
| 36 | 36 | ||
| 37 | #define S3C64XX_GPC4_SPI_MISO1 (0x02 << 16) | 37 | #define S3C64XX_GPC4_SPI_MISO1 (0x02 << 16) |
| 38 | #define S3C64XX_GPC4_MMC2_CMD (0x03 << 16) | 38 | #define S3C64XX_GPC4_MMC2_CMD (0x03 << 16) |
| 39 | #define S3C64XX_GPC4_I2S0_V40_DO (0x05 << 16) | 39 | #define S3C64XX_GPC4_I2S_V40_DO0 (0x05 << 16) |
| 40 | #define S3C64XX_GPC4_EINT_G2_4 (0x07 << 16) | 40 | #define S3C64XX_GPC4_EINT_G2_4 (0x07 << 16) |
| 41 | 41 | ||
| 42 | #define S3C64XX_GPC5_SPI_CLK1 (0x02 << 20) | 42 | #define S3C64XX_GPC5_SPI_CLK1 (0x02 << 20) |
| 43 | #define S3C64XX_GPC5_MMC2_CLK (0x03 << 20) | 43 | #define S3C64XX_GPC5_MMC2_CLK (0x03 << 20) |
| 44 | #define S3C64XX_GPC5_I2S1_V40_DO (0x05 << 20) | 44 | #define S3C64XX_GPC5_I2S_V40_DO1 (0x05 << 20) |
| 45 | #define S3C64XX_GPC5_EINT_G2_5 (0x07 << 20) | 45 | #define S3C64XX_GPC5_EINT_G2_5 (0x07 << 20) |
| 46 | 46 | ||
| 47 | #define S3C64XX_GPC6_SPI_MOSI1 (0x02 << 24) | 47 | #define S3C64XX_GPC6_SPI_MOSI1 (0x02 << 24) |
| 48 | #define S3C64XX_GPC6_EINT_G2_6 (0x07 << 24) | 48 | #define S3C64XX_GPC6_EINT_G2_6 (0x07 << 24) |
| 49 | 49 | ||
| 50 | #define S3C64XX_GPC7_SPI_nCS1 (0x02 << 28) | 50 | #define S3C64XX_GPC7_SPI_nCS1 (0x02 << 28) |
| 51 | #define S3C64XX_GPC7_I2S2_V40_DO (0x05 << 28) | 51 | #define S3C64XX_GPC7_I2S_V40_DO2 (0x05 << 28) |
| 52 | #define S3C64XX_GPC7_EINT_G2_7 (0x07 << 28) | 52 | #define S3C64XX_GPC7_EINT_G2_7 (0x07 << 28) |
| 53 | 53 | ||
diff --git a/arch/arm/plat-s3c64xx/irq-eint.c b/arch/arm/plat-s3c64xx/irq-eint.c index f81b7b818ba..ebdf183a091 100644 --- a/arch/arm/plat-s3c64xx/irq-eint.c +++ b/arch/arm/plat-s3c64xx/irq-eint.c | |||
| @@ -65,7 +65,7 @@ static void s3c_irq_eint_maskack(unsigned int irq) | |||
| 65 | static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type) | 65 | static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type) |
| 66 | { | 66 | { |
| 67 | int offs = eint_offset(irq); | 67 | int offs = eint_offset(irq); |
| 68 | int pin; | 68 | int pin, pin_val; |
| 69 | int shift; | 69 | int shift; |
| 70 | u32 ctrl, mask; | 70 | u32 ctrl, mask; |
| 71 | u32 newvalue = 0; | 71 | u32 newvalue = 0; |
| @@ -109,7 +109,10 @@ static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type) | |||
| 109 | return -1; | 109 | return -1; |
| 110 | } | 110 | } |
| 111 | 111 | ||
| 112 | shift = (offs / 2) * 4; | 112 | if (offs <= 15) |
| 113 | shift = (offs / 2) * 4; | ||
| 114 | else | ||
| 115 | shift = ((offs - 16) / 2) * 4; | ||
| 113 | mask = 0x7 << shift; | 116 | mask = 0x7 << shift; |
| 114 | 117 | ||
| 115 | ctrl = __raw_readl(reg); | 118 | ctrl = __raw_readl(reg); |
| @@ -119,12 +122,18 @@ static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type) | |||
| 119 | 122 | ||
| 120 | /* set the GPIO pin appropriately */ | 123 | /* set the GPIO pin appropriately */ |
| 121 | 124 | ||
| 122 | if (offs < 23) | 125 | if (offs < 16) { |
| 123 | pin = S3C64XX_GPN(offs); | 126 | pin = S3C64XX_GPN(offs); |
| 124 | else | 127 | pin_val = S3C_GPIO_SFN(2); |
| 128 | } else if (offs < 23) { | ||
| 129 | pin = S3C64XX_GPL(offs + 8 - 16); | ||
| 130 | pin_val = S3C_GPIO_SFN(3); | ||
| 131 | } else { | ||
| 125 | pin = S3C64XX_GPM(offs - 23); | 132 | pin = S3C64XX_GPM(offs - 23); |
| 133 | pin_val = S3C_GPIO_SFN(3); | ||
| 134 | } | ||
| 126 | 135 | ||
| 127 | s3c_gpio_cfgpin(pin, S3C_GPIO_SFN(2)); | 136 | s3c_gpio_cfgpin(pin, pin_val); |
| 128 | 137 | ||
| 129 | return 0; | 138 | return 0; |
| 130 | } | 139 | } |
diff --git a/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c b/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c index 5417123b0ac..a58c0cc7ba5 100644 --- a/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c +++ b/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c | |||
| @@ -53,3 +53,23 @@ void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) | |||
| 53 | s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); | 53 | s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); |
| 54 | s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(3)); | 54 | s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(3)); |
| 55 | } | 55 | } |
| 56 | |||
| 57 | void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) | ||
| 58 | { | ||
| 59 | unsigned int gpio; | ||
| 60 | unsigned int end; | ||
| 61 | |||
| 62 | end = S3C64XX_GPH(6 + width); | ||
| 63 | |||
| 64 | /* Set all the necessary GPH pins to special-function 1 */ | ||
| 65 | for (gpio = S3C64XX_GPH(6); gpio < end; gpio++) { | ||
| 66 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); | ||
| 67 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 68 | } | ||
| 69 | |||
| 70 | /* Set all the necessary GPC pins to special-function 1 */ | ||
| 71 | for (gpio = S3C64XX_GPC(4); gpio < S3C64XX_GPC(6); gpio++) { | ||
| 72 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); | ||
| 73 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 74 | } | ||
| 75 | } | ||
diff --git a/arch/arm/plat-s5pc1xx/Kconfig b/arch/arm/plat-s5pc1xx/Kconfig index a8a711c3c06..1608e62b0c9 100644 --- a/arch/arm/plat-s5pc1xx/Kconfig +++ b/arch/arm/plat-s5pc1xx/Kconfig | |||
| @@ -15,6 +15,9 @@ config PLAT_S5PC1XX | |||
| 15 | select ARCH_REQUIRE_GPIOLIB | 15 | select ARCH_REQUIRE_GPIOLIB |
| 16 | select S3C_GPIO_TRACK | 16 | select S3C_GPIO_TRACK |
| 17 | select S3C_GPIO_PULL_UPDOWN | 17 | select S3C_GPIO_PULL_UPDOWN |
| 18 | select S3C_GPIO_CFG_S3C24XX | ||
| 19 | select S3C_GPIO_CFG_S3C64XX | ||
| 20 | select S5P_GPIO_CFG_S5PC1XX | ||
| 18 | help | 21 | help |
| 19 | Base platform code for any Samsung S5PC1XX device | 22 | Base platform code for any Samsung S5PC1XX device |
| 20 | 23 | ||
| @@ -34,7 +37,12 @@ config CPU_S5PC100_CLOCK | |||
| 34 | 37 | ||
| 35 | # platform specific device setup | 38 | # platform specific device setup |
| 36 | 39 | ||
| 37 | config S5PC100_SETUP_I2C0 | 40 | config S5PC1XX_SETUP_FB_24BPP |
| 41 | bool | ||
| 42 | help | ||
| 43 | Common setup code for S5PC1XX with an 24bpp RGB display helper. | ||
| 44 | |||
| 45 | config S5PC1XX_SETUP_I2C0 | ||
| 38 | bool | 46 | bool |
| 39 | default y | 47 | default y |
| 40 | help | 48 | help |
| @@ -43,8 +51,14 @@ config S5PC100_SETUP_I2C0 | |||
| 43 | Note, currently since i2c0 is always compiled, this setup helper | 51 | Note, currently since i2c0 is always compiled, this setup helper |
| 44 | is always compiled with it. | 52 | is always compiled with it. |
| 45 | 53 | ||
| 46 | config S5PC100_SETUP_I2C1 | 54 | config S5PC1XX_SETUP_I2C1 |
| 47 | bool | 55 | bool |
| 48 | help | 56 | help |
| 49 | Common setup code for i2c bus 1. | 57 | Common setup code for i2c bus 1. |
| 58 | |||
| 59 | config S5PC1XX_SETUP_SDHCI_GPIO | ||
| 60 | bool | ||
| 61 | help | ||
| 62 | Common setup code for SDHCI gpio. | ||
| 63 | |||
| 50 | endif | 64 | endif |
diff --git a/arch/arm/plat-s5pc1xx/Makefile b/arch/arm/plat-s5pc1xx/Makefile index f1ecb2c37ee..278f2680608 100644 --- a/arch/arm/plat-s5pc1xx/Makefile +++ b/arch/arm/plat-s5pc1xx/Makefile | |||
| @@ -13,7 +13,9 @@ obj- := | |||
| 13 | 13 | ||
| 14 | obj-y += dev-uart.o | 14 | obj-y += dev-uart.o |
| 15 | obj-y += cpu.o | 15 | obj-y += cpu.o |
| 16 | obj-y += irq.o | 16 | obj-y += irq.o irq-gpio.o irq-eint.o |
| 17 | obj-y += clock.o | ||
| 18 | obj-y += gpiolib.o | ||
| 17 | 19 | ||
| 18 | # CPU support | 20 | # CPU support |
| 19 | 21 | ||
| @@ -22,5 +24,8 @@ obj-$(CONFIG_CPU_S5PC100_CLOCK) += s5pc100-clock.o | |||
| 22 | 24 | ||
| 23 | # Device setup | 25 | # Device setup |
| 24 | 26 | ||
| 25 | obj-$(CONFIG_S5PC100_SETUP_I2C0) += setup-i2c0.o | 27 | obj-$(CONFIG_S5P_GPIO_CFG_S5PC1XX) += gpio-config.o |
| 26 | obj-$(CONFIG_S5PC100_SETUP_I2C1) += setup-i2c1.o | 28 | obj-$(CONFIG_S5PC1XX_SETUP_FB_24BPP) += setup-fb-24bpp.o |
| 29 | obj-$(CONFIG_S5PC1XX_SETUP_I2C0) += setup-i2c0.o | ||
| 30 | obj-$(CONFIG_S5PC1XX_SETUP_I2C1) += setup-i2c1.o | ||
| 31 | obj-$(CONFIG_S5PC1XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o | ||
diff --git a/arch/arm/plat-s5pc1xx/clock.c b/arch/arm/plat-s5pc1xx/clock.c new file mode 100644 index 00000000000..26c21d84979 --- /dev/null +++ b/arch/arm/plat-s5pc1xx/clock.c | |||
| @@ -0,0 +1,728 @@ | |||
| 1 | /* linux/arch/arm/plat-s5pc1xx/clock.c | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics Co. | ||
| 4 | * | ||
| 5 | * S5PC1XX Base clock support | ||
| 6 | * | ||
| 7 | * Based on plat-s3c64xx/clock.c | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License version 2 as | ||
| 11 | * published by the Free Software Foundation. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/init.h> | ||
| 15 | #include <linux/module.h> | ||
| 16 | #include <linux/interrupt.h> | ||
| 17 | #include <linux/ioport.h> | ||
| 18 | #include <linux/clk.h> | ||
| 19 | #include <linux/io.h> | ||
| 20 | |||
| 21 | #include <mach/hardware.h> | ||
| 22 | #include <mach/map.h> | ||
| 23 | |||
| 24 | #include <plat/regs-clock.h> | ||
| 25 | #include <plat/devs.h> | ||
| 26 | #include <plat/clock.h> | ||
| 27 | |||
| 28 | struct clk clk_27m = { | ||
| 29 | .name = "clk_27m", | ||
| 30 | .id = -1, | ||
| 31 | .rate = 27000000, | ||
| 32 | }; | ||
| 33 | |||
| 34 | static int clk_48m_ctrl(struct clk *clk, int enable) | ||
| 35 | { | ||
| 36 | unsigned long flags; | ||
| 37 | u32 val; | ||
| 38 | |||
| 39 | /* can't rely on clock lock, this register has other usages */ | ||
| 40 | local_irq_save(flags); | ||
| 41 | |||
| 42 | val = __raw_readl(S5PC100_CLKSRC1); | ||
| 43 | if (enable) | ||
| 44 | val |= S5PC100_CLKSRC1_CLK48M_MASK; | ||
| 45 | else | ||
| 46 | val &= ~S5PC100_CLKSRC1_CLK48M_MASK; | ||
| 47 | |||
| 48 | __raw_writel(val, S5PC100_CLKSRC1); | ||
| 49 | local_irq_restore(flags); | ||
| 50 | |||
| 51 | return 0; | ||
| 52 | } | ||
| 53 | |||
| 54 | struct clk clk_48m = { | ||
| 55 | .name = "clk_48m", | ||
| 56 | .id = -1, | ||
| 57 | .rate = 48000000, | ||
| 58 | .enable = clk_48m_ctrl, | ||
| 59 | }; | ||
| 60 | |||
| 61 | struct clk clk_54m = { | ||
| 62 | .name = "clk_54m", | ||
| 63 | .id = -1, | ||
| 64 | .rate = 54000000, | ||
| 65 | }; | ||
| 66 | |||
| 67 | static int clk_default_setrate(struct clk *clk, unsigned long rate) | ||
| 68 | { | ||
| 69 | clk->rate = rate; | ||
| 70 | return 0; | ||
| 71 | } | ||
| 72 | |||
| 73 | static int clk_dummy_enable(struct clk *clk, int enable) | ||
| 74 | { | ||
| 75 | return 0; | ||
| 76 | } | ||
| 77 | |||
| 78 | struct clk clk_hd0 = { | ||
| 79 | .name = "hclkd0", | ||
| 80 | .id = -1, | ||
| 81 | .rate = 0, | ||
| 82 | .parent = NULL, | ||
| 83 | .ctrlbit = 0, | ||
| 84 | .set_rate = clk_default_setrate, | ||
| 85 | .enable = clk_dummy_enable, | ||
| 86 | }; | ||
| 87 | |||
| 88 | struct clk clk_pd0 = { | ||
| 89 | .name = "pclkd0", | ||
| 90 | .id = -1, | ||
| 91 | .rate = 0, | ||
| 92 | .parent = NULL, | ||
| 93 | .ctrlbit = 0, | ||
| 94 | .set_rate = clk_default_setrate, | ||
| 95 | .enable = clk_dummy_enable, | ||
| 96 | }; | ||
| 97 | |||
| 98 | static int s5pc1xx_clk_gate(void __iomem *reg, struct clk *clk, int enable) | ||
| 99 | { | ||
| 100 | unsigned int ctrlbit = clk->ctrlbit; | ||
| 101 | u32 con; | ||
| 102 | |||
| 103 | con = __raw_readl(reg); | ||
| 104 | if (enable) | ||
| 105 | con |= ctrlbit; | ||
| 106 | else | ||
| 107 | con &= ~ctrlbit; | ||
| 108 | __raw_writel(con, reg); | ||
| 109 | |||
| 110 | return 0; | ||
| 111 | } | ||
| 112 | |||
| 113 | static int s5pc100_clk_d00_ctrl(struct clk *clk, int enable) | ||
| 114 | { | ||
| 115 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D00, clk, enable); | ||
| 116 | } | ||
| 117 | |||
| 118 | static int s5pc100_clk_d01_ctrl(struct clk *clk, int enable) | ||
| 119 | { | ||
| 120 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D01, clk, enable); | ||
| 121 | } | ||
| 122 | |||
| 123 | static int s5pc100_clk_d02_ctrl(struct clk *clk, int enable) | ||
| 124 | { | ||
| 125 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D02, clk, enable); | ||
| 126 | } | ||
| 127 | |||
| 128 | static int s5pc100_clk_d10_ctrl(struct clk *clk, int enable) | ||
| 129 | { | ||
| 130 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D10, clk, enable); | ||
| 131 | } | ||
| 132 | |||
| 133 | static int s5pc100_clk_d11_ctrl(struct clk *clk, int enable) | ||
| 134 | { | ||
| 135 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D11, clk, enable); | ||
| 136 | } | ||
| 137 | |||
| 138 | static int s5pc100_clk_d12_ctrl(struct clk *clk, int enable) | ||
| 139 | { | ||
| 140 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D12, clk, enable); | ||
| 141 | } | ||
| 142 | |||
| 143 | static int s5pc100_clk_d13_ctrl(struct clk *clk, int enable) | ||
| 144 | { | ||
| 145 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D13, clk, enable); | ||
| 146 | } | ||
| 147 | |||
| 148 | static int s5pc100_clk_d14_ctrl(struct clk *clk, int enable) | ||
| 149 | { | ||
| 150 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D14, clk, enable); | ||
| 151 | } | ||
| 152 | |||
| 153 | static int s5pc100_clk_d15_ctrl(struct clk *clk, int enable) | ||
| 154 | { | ||
| 155 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D15, clk, enable); | ||
| 156 | } | ||
| 157 | |||
| 158 | static int s5pc100_clk_d20_ctrl(struct clk *clk, int enable) | ||
| 159 | { | ||
| 160 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D20, clk, enable); | ||
| 161 | } | ||
| 162 | |||
| 163 | int s5pc100_sclk0_ctrl(struct clk *clk, int enable) | ||
| 164 | { | ||
| 165 | return s5pc1xx_clk_gate(S5PC100_SCLKGATE0, clk, enable); | ||
| 166 | } | ||
| 167 | |||
| 168 | int s5pc100_sclk1_ctrl(struct clk *clk, int enable) | ||
| 169 | { | ||
| 170 | return s5pc1xx_clk_gate(S5PC100_SCLKGATE1, clk, enable); | ||
| 171 | } | ||
| 172 | |||
| 173 | static struct clk s5pc100_init_clocks_disable[] = { | ||
| 174 | { | ||
| 175 | .name = "dsi", | ||
| 176 | .id = -1, | ||
| 177 | .parent = &clk_p, | ||
| 178 | .enable = s5pc100_clk_d11_ctrl, | ||
| 179 | .ctrlbit = S5PC100_CLKGATE_D11_DSI, | ||
| 180 | }, { | ||
| 181 | .name = "csi", | ||
| 182 | .id = -1, | ||
| 183 | .parent = &clk_h, | ||
| 184 | .enable = s5pc100_clk_d11_ctrl, | ||
| 185 | .ctrlbit = S5PC100_CLKGATE_D11_CSI, | ||
| 186 | }, { | ||
| 187 | .name = "ccan", | ||
| 188 | .id = 0, | ||
| 189 | .parent = &clk_p, | ||
| 190 | .enable = s5pc100_clk_d14_ctrl, | ||
| 191 | .ctrlbit = S5PC100_CLKGATE_D14_CCAN0, | ||
| 192 | }, { | ||
| 193 | .name = "ccan", | ||
| 194 | .id = 1, | ||
| 195 | .parent = &clk_p, | ||
| 196 | .enable = s5pc100_clk_d14_ctrl, | ||
| 197 | .ctrlbit = S5PC100_CLKGATE_D14_CCAN1, | ||
| 198 | }, { | ||
| 199 | .name = "keypad", | ||
| 200 | .id = -1, | ||
| 201 | .parent = &clk_p, | ||
| 202 | .enable = s5pc100_clk_d15_ctrl, | ||
| 203 | .ctrlbit = S5PC100_CLKGATE_D15_KEYIF, | ||
| 204 | }, { | ||
| 205 | .name = "hclkd2", | ||
| 206 | .id = -1, | ||
| 207 | .parent = NULL, | ||
| 208 | .enable = s5pc100_clk_d20_ctrl, | ||
| 209 | .ctrlbit = S5PC100_CLKGATE_D20_HCLKD2, | ||
| 210 | }, { | ||
| 211 | .name = "iis-d2", | ||
| 212 | .id = -1, | ||
| 213 | .parent = NULL, | ||
| 214 | .enable = s5pc100_clk_d20_ctrl, | ||
| 215 | .ctrlbit = S5PC100_CLKGATE_D20_I2SD2, | ||
| 216 | }, | ||
| 217 | }; | ||
| 218 | |||
| 219 | static struct clk s5pc100_init_clocks[] = { | ||
| 220 | /* System1 (D0_0) devices */ | ||
| 221 | { | ||
| 222 | .name = "intc", | ||
| 223 | .id = -1, | ||
| 224 | .parent = &clk_hd0, | ||
| 225 | .enable = s5pc100_clk_d00_ctrl, | ||
| 226 | .ctrlbit = S5PC100_CLKGATE_D00_INTC, | ||
| 227 | }, { | ||
| 228 | .name = "tzic", | ||
| 229 | .id = -1, | ||
| 230 | .parent = &clk_hd0, | ||
| 231 | .enable = s5pc100_clk_d00_ctrl, | ||
| 232 | .ctrlbit = S5PC100_CLKGATE_D00_TZIC, | ||
| 233 | }, { | ||
| 234 | .name = "cf-ata", | ||
| 235 | .id = -1, | ||
| 236 | .parent = &clk_hd0, | ||
| 237 | .enable = s5pc100_clk_d00_ctrl, | ||
| 238 | .ctrlbit = S5PC100_CLKGATE_D00_CFCON, | ||
| 239 | }, { | ||
| 240 | .name = "mdma", | ||
| 241 | .id = -1, | ||
| 242 | .parent = &clk_hd0, | ||
| 243 | .enable = s5pc100_clk_d00_ctrl, | ||
| 244 | .ctrlbit = S5PC100_CLKGATE_D00_MDMA, | ||
| 245 | }, { | ||
| 246 | .name = "g2d", | ||
| 247 | .id = -1, | ||
| 248 | .parent = &clk_hd0, | ||
| 249 | .enable = s5pc100_clk_d00_ctrl, | ||
| 250 | .ctrlbit = S5PC100_CLKGATE_D00_G2D, | ||
| 251 | }, { | ||
| 252 | .name = "secss", | ||
| 253 | .id = -1, | ||
| 254 | .parent = &clk_hd0, | ||
| 255 | .enable = s5pc100_clk_d00_ctrl, | ||
| 256 | .ctrlbit = S5PC100_CLKGATE_D00_SECSS, | ||
| 257 | }, { | ||
| 258 | .name = "cssys", | ||
| 259 | .id = -1, | ||
| 260 | .parent = &clk_hd0, | ||
| 261 | .enable = s5pc100_clk_d00_ctrl, | ||
| 262 | .ctrlbit = S5PC100_CLKGATE_D00_CSSYS, | ||
| 263 | }, | ||
| 264 | |||
| 265 | /* Memory (D0_1) devices */ | ||
| 266 | { | ||
| 267 | .name = "dmc", | ||
| 268 | .id = -1, | ||
| 269 | .parent = &clk_hd0, | ||
| 270 | .enable = s5pc100_clk_d01_ctrl, | ||
| 271 | .ctrlbit = S5PC100_CLKGATE_D01_DMC, | ||
| 272 | }, { | ||
| 273 | .name = "sromc", | ||
| 274 | .id = -1, | ||
| 275 | .parent = &clk_hd0, | ||
| 276 | .enable = s5pc100_clk_d01_ctrl, | ||
| 277 | .ctrlbit = S5PC100_CLKGATE_D01_SROMC, | ||
| 278 | }, { | ||
| 279 | .name = "onenand", | ||
| 280 | .id = -1, | ||
| 281 | .parent = &clk_hd0, | ||
| 282 | .enable = s5pc100_clk_d01_ctrl, | ||
| 283 | .ctrlbit = S5PC100_CLKGATE_D01_ONENAND, | ||
| 284 | }, { | ||
| 285 | .name = "nand", | ||
| 286 | .id = -1, | ||
| 287 | .parent = &clk_hd0, | ||
| 288 | .enable = s5pc100_clk_d01_ctrl, | ||
| 289 | .ctrlbit = S5PC100_CLKGATE_D01_NFCON, | ||
| 290 | }, { | ||
| 291 | .name = "intmem", | ||
| 292 | .id = -1, | ||
| 293 | .parent = &clk_hd0, | ||
| 294 | .enable = s5pc100_clk_d01_ctrl, | ||
| 295 | .ctrlbit = S5PC100_CLKGATE_D01_INTMEM, | ||
| 296 | }, { | ||
| 297 | .name = "ebi", | ||
| 298 | .id = -1, | ||
| 299 | .parent = &clk_hd0, | ||
| 300 | .enable = s5pc100_clk_d01_ctrl, | ||
| 301 | .ctrlbit = S5PC100_CLKGATE_D01_EBI, | ||
| 302 | }, | ||
| 303 | |||
| 304 | /* System2 (D0_2) devices */ | ||
| 305 | { | ||
| 306 | .name = "seckey", | ||
| 307 | .id = -1, | ||
| 308 | .parent = &clk_pd0, | ||
| 309 | .enable = s5pc100_clk_d02_ctrl, | ||
| 310 | .ctrlbit = S5PC100_CLKGATE_D02_SECKEY, | ||
| 311 | }, { | ||
| 312 | .name = "sdm", | ||
| 313 | .id = -1, | ||
| 314 | .parent = &clk_hd0, | ||
| 315 | .enable = s5pc100_clk_d02_ctrl, | ||
| 316 | .ctrlbit = S5PC100_CLKGATE_D02_SDM, | ||
| 317 | }, | ||
| 318 | |||
| 319 | /* File (D1_0) devices */ | ||
| 320 | { | ||
| 321 | .name = "pdma", | ||
| 322 | .id = 0, | ||
| 323 | .parent = &clk_h, | ||
| 324 | .enable = s5pc100_clk_d10_ctrl, | ||
| 325 | .ctrlbit = S5PC100_CLKGATE_D10_PDMA0, | ||
| 326 | }, { | ||
| 327 | .name = "pdma", | ||
| 328 | .id = 1, | ||
| 329 | .parent = &clk_h, | ||
| 330 | .enable = s5pc100_clk_d10_ctrl, | ||
| 331 | .ctrlbit = S5PC100_CLKGATE_D10_PDMA1, | ||
| 332 | }, { | ||
| 333 | .name = "usb-host", | ||
| 334 | .id = -1, | ||
| 335 | .parent = &clk_h, | ||
| 336 | .enable = s5pc100_clk_d10_ctrl, | ||
| 337 | .ctrlbit = S5PC100_CLKGATE_D10_USBHOST, | ||
| 338 | }, { | ||
| 339 | .name = "otg", | ||
| 340 | .id = -1, | ||
| 341 | .parent = &clk_h, | ||
| 342 | .enable = s5pc100_clk_d10_ctrl, | ||
| 343 | .ctrlbit = S5PC100_CLKGATE_D10_USBOTG, | ||
| 344 | }, { | ||
| 345 | .name = "modem", | ||
| 346 | .id = -1, | ||
| 347 | .parent = &clk_h, | ||
| 348 | .enable = s5pc100_clk_d10_ctrl, | ||
| 349 | .ctrlbit = S5PC100_CLKGATE_D10_MODEMIF, | ||
| 350 | }, { | ||
| 351 | .name = "hsmmc", | ||
| 352 | .id = 0, | ||
| 353 | .parent = &clk_48m, | ||
| 354 | .enable = s5pc100_clk_d10_ctrl, | ||
| 355 | .ctrlbit = S5PC100_CLKGATE_D10_HSMMC0, | ||
| 356 | }, { | ||
| 357 | .name = "hsmmc", | ||
| 358 | .id = 1, | ||
| 359 | .parent = &clk_48m, | ||
| 360 | .enable = s5pc100_clk_d10_ctrl, | ||
| 361 | .ctrlbit = S5PC100_CLKGATE_D10_HSMMC1, | ||
| 362 | }, { | ||
| 363 | .name = "hsmmc", | ||
| 364 | .id = 2, | ||
| 365 | .parent = &clk_48m, | ||
| 366 | .enable = s5pc100_clk_d10_ctrl, | ||
| 367 | .ctrlbit = S5PC100_CLKGATE_D10_HSMMC2, | ||
| 368 | }, | ||
| 369 | |||
| 370 | /* Multimedia1 (D1_1) devices */ | ||
| 371 | { | ||
| 372 | .name = "lcd", | ||
| 373 | .id = -1, | ||
| 374 | .parent = &clk_p, | ||
| 375 | .enable = s5pc100_clk_d11_ctrl, | ||
| 376 | .ctrlbit = S5PC100_CLKGATE_D11_LCD, | ||
| 377 | }, { | ||
| 378 | .name = "rotator", | ||
| 379 | .id = -1, | ||
| 380 | .parent = &clk_p, | ||
| 381 | .enable = s5pc100_clk_d11_ctrl, | ||
| 382 | .ctrlbit = S5PC100_CLKGATE_D11_ROTATOR, | ||
| 383 | }, { | ||
| 384 | .name = "fimc", | ||
| 385 | .id = -1, | ||
| 386 | .parent = &clk_p, | ||
| 387 | .enable = s5pc100_clk_d11_ctrl, | ||
| 388 | .ctrlbit = S5PC100_CLKGATE_D11_FIMC0, | ||
| 389 | }, { | ||
| 390 | .name = "fimc", | ||
| 391 | .id = -1, | ||
| 392 | .parent = &clk_p, | ||
| 393 | .enable = s5pc100_clk_d11_ctrl, | ||
| 394 | .ctrlbit = S5PC100_CLKGATE_D11_FIMC1, | ||
| 395 | }, { | ||
| 396 | .name = "fimc", | ||
| 397 | .id = -1, | ||
| 398 | .parent = &clk_p, | ||
| 399 | .enable = s5pc100_clk_d11_ctrl, | ||
| 400 | .ctrlbit = S5PC100_CLKGATE_D11_FIMC2, | ||
| 401 | }, { | ||
| 402 | .name = "jpeg", | ||
| 403 | .id = -1, | ||
| 404 | .parent = &clk_p, | ||
| 405 | .enable = s5pc100_clk_d11_ctrl, | ||
| 406 | .ctrlbit = S5PC100_CLKGATE_D11_JPEG, | ||
| 407 | }, { | ||
| 408 | .name = "g3d", | ||
| 409 | .id = -1, | ||
| 410 | .parent = &clk_p, | ||
| 411 | .enable = s5pc100_clk_d11_ctrl, | ||
| 412 | .ctrlbit = S5PC100_CLKGATE_D11_G3D, | ||
| 413 | }, | ||
| 414 | |||
| 415 | /* Multimedia2 (D1_2) devices */ | ||
| 416 | { | ||
| 417 | .name = "tv", | ||
| 418 | .id = -1, | ||
| 419 | .parent = &clk_p, | ||
| 420 | .enable = s5pc100_clk_d12_ctrl, | ||
| 421 | .ctrlbit = S5PC100_CLKGATE_D12_TV, | ||
| 422 | }, { | ||
| 423 | .name = "vp", | ||
| 424 | .id = -1, | ||
| 425 | .parent = &clk_p, | ||
| 426 | .enable = s5pc100_clk_d12_ctrl, | ||
| 427 | .ctrlbit = S5PC100_CLKGATE_D12_VP, | ||
| 428 | }, { | ||
| 429 | .name = "mixer", | ||
| 430 | .id = -1, | ||
| 431 | .parent = &clk_p, | ||
| 432 | .enable = s5pc100_clk_d12_ctrl, | ||
| 433 | .ctrlbit = S5PC100_CLKGATE_D12_MIXER, | ||
| 434 | }, { | ||
| 435 | .name = "hdmi", | ||
| 436 | .id = -1, | ||
| 437 | .parent = &clk_p, | ||
| 438 | .enable = s5pc100_clk_d12_ctrl, | ||
| 439 | .ctrlbit = S5PC100_CLKGATE_D12_HDMI, | ||
| 440 | }, { | ||
| 441 | .name = "mfc", | ||
| 442 | .id = -1, | ||
| 443 | .parent = &clk_p, | ||
| 444 | .enable = s5pc100_clk_d12_ctrl, | ||
| 445 | .ctrlbit = S5PC100_CLKGATE_D12_MFC, | ||
| 446 | }, | ||
| 447 | |||
| 448 | /* System (D1_3) devices */ | ||
| 449 | { | ||
| 450 | .name = "chipid", | ||
| 451 | .id = -1, | ||
| 452 | .parent = &clk_p, | ||
| 453 | .enable = s5pc100_clk_d13_ctrl, | ||
| 454 | .ctrlbit = S5PC100_CLKGATE_D13_CHIPID, | ||
| 455 | }, { | ||
| 456 | .name = "gpio", | ||
| 457 | .id = -1, | ||
| 458 | .parent = &clk_p, | ||
| 459 | .enable = s5pc100_clk_d13_ctrl, | ||
| 460 | .ctrlbit = S5PC100_CLKGATE_D13_GPIO, | ||
| 461 | }, { | ||
| 462 | .name = "apc", | ||
| 463 | .id = -1, | ||
| 464 | .parent = &clk_p, | ||
| 465 | .enable = s5pc100_clk_d13_ctrl, | ||
| 466 | .ctrlbit = S5PC100_CLKGATE_D13_APC, | ||
| 467 | }, { | ||
| 468 | .name = "iec", | ||
| 469 | .id = -1, | ||
| 470 | .parent = &clk_p, | ||
| 471 | .enable = s5pc100_clk_d13_ctrl, | ||
| 472 | .ctrlbit = S5PC100_CLKGATE_D13_IEC, | ||
| 473 | }, { | ||
| 474 | .name = "timers", | ||
| 475 | .id = -1, | ||
| 476 | .parent = &clk_p, | ||
| 477 | .enable = s5pc100_clk_d13_ctrl, | ||
| 478 | .ctrlbit = S5PC100_CLKGATE_D13_PWM, | ||
| 479 | }, { | ||
| 480 | .name = "systimer", | ||
| 481 | .id = -1, | ||
| 482 | .parent = &clk_p, | ||
| 483 | .enable = s5pc100_clk_d13_ctrl, | ||
| 484 | .ctrlbit = S5PC100_CLKGATE_D13_SYSTIMER, | ||
| 485 | }, { | ||
| 486 | .name = "watchdog", | ||
| 487 | .id = -1, | ||
| 488 | .parent = &clk_p, | ||
| 489 | .enable = s5pc100_clk_d13_ctrl, | ||
| 490 | .ctrlbit = S5PC100_CLKGATE_D13_WDT, | ||
| 491 | }, { | ||
| 492 | .name = "rtc", | ||
| 493 | .id = -1, | ||
| 494 | .parent = &clk_p, | ||
| 495 | .enable = s5pc100_clk_d13_ctrl, | ||
| 496 | .ctrlbit = S5PC100_CLKGATE_D13_RTC, | ||
| 497 | }, | ||
| 498 | |||
| 499 | /* Connectivity (D1_4) devices */ | ||
| 500 | { | ||
| 501 | .name = "uart", | ||
| 502 | .id = 0, | ||
| 503 | .parent = &clk_p, | ||
| 504 | .enable = s5pc100_clk_d14_ctrl, | ||
| 505 | .ctrlbit = S5PC100_CLKGATE_D14_UART0, | ||
| 506 | }, { | ||
| 507 | .name = "uart", | ||
| 508 | .id = 1, | ||
| 509 | .parent = &clk_p, | ||
| 510 | .enable = s5pc100_clk_d14_ctrl, | ||
| 511 | .ctrlbit = S5PC100_CLKGATE_D14_UART1, | ||
| 512 | }, { | ||
| 513 | .name = "uart", | ||
| 514 | .id = 2, | ||
| 515 | .parent = &clk_p, | ||
| 516 | .enable = s5pc100_clk_d14_ctrl, | ||
| 517 | .ctrlbit = S5PC100_CLKGATE_D14_UART2, | ||
| 518 | }, { | ||
| 519 | .name = "uart", | ||
| 520 | .id = 3, | ||
| 521 | .parent = &clk_p, | ||
| 522 | .enable = s5pc100_clk_d14_ctrl, | ||
| 523 | .ctrlbit = S5PC100_CLKGATE_D14_UART3, | ||
| 524 | }, { | ||
| 525 | .name = "i2c", | ||
| 526 | .id = -1, | ||
| 527 | .parent = &clk_p, | ||
| 528 | .enable = s5pc100_clk_d14_ctrl, | ||
| 529 | .ctrlbit = S5PC100_CLKGATE_D14_IIC, | ||
| 530 | }, { | ||
| 531 | .name = "hdmi-i2c", | ||
| 532 | .id = -1, | ||
| 533 | .parent = &clk_p, | ||
| 534 | .enable = s5pc100_clk_d14_ctrl, | ||
| 535 | .ctrlbit = S5PC100_CLKGATE_D14_HDMI_IIC, | ||
| 536 | }, { | ||
| 537 | .name = "spi", | ||
| 538 | .id = 0, | ||
| 539 | .parent = &clk_p, | ||
| 540 | .enable = s5pc100_clk_d14_ctrl, | ||
| 541 | .ctrlbit = S5PC100_CLKGATE_D14_SPI0, | ||
| 542 | }, { | ||
| 543 | .name = "spi", | ||
| 544 | .id = 1, | ||
| 545 | .parent = &clk_p, | ||
| 546 | .enable = s5pc100_clk_d14_ctrl, | ||
| 547 | .ctrlbit = S5PC100_CLKGATE_D14_SPI1, | ||
| 548 | }, { | ||
| 549 | .name = "spi", | ||
| 550 | .id = 2, | ||
| 551 | .parent = &clk_p, | ||
| 552 | .enable = s5pc100_clk_d14_ctrl, | ||
| 553 | .ctrlbit = S5PC100_CLKGATE_D14_SPI2, | ||
| 554 | }, { | ||
| 555 | .name = "irda", | ||
| 556 | .id = -1, | ||
| 557 | .parent = &clk_p, | ||
| 558 | .enable = s5pc100_clk_d14_ctrl, | ||
| 559 | .ctrlbit = S5PC100_CLKGATE_D14_IRDA, | ||
| 560 | }, { | ||
| 561 | .name = "hsitx", | ||
| 562 | .id = -1, | ||
| 563 | .parent = &clk_p, | ||
| 564 | .enable = s5pc100_clk_d14_ctrl, | ||
| 565 | .ctrlbit = S5PC100_CLKGATE_D14_HSITX, | ||
| 566 | }, { | ||
| 567 | .name = "hsirx", | ||
| 568 | .id = -1, | ||
| 569 | .parent = &clk_p, | ||
| 570 | .enable = s5pc100_clk_d14_ctrl, | ||
| 571 | .ctrlbit = S5PC100_CLKGATE_D14_HSIRX, | ||
| 572 | }, | ||
| 573 | |||
| 574 | /* Audio (D1_5) devices */ | ||
| 575 | { | ||
| 576 | .name = "iis", | ||
| 577 | .id = 0, | ||
| 578 | .parent = &clk_p, | ||
| 579 | .enable = s5pc100_clk_d15_ctrl, | ||
| 580 | .ctrlbit = S5PC100_CLKGATE_D15_IIS0, | ||
| 581 | }, { | ||
| 582 | .name = "iis", | ||
| 583 | .id = 1, | ||
| 584 | .parent = &clk_p, | ||
| 585 | .enable = s5pc100_clk_d15_ctrl, | ||
| 586 | .ctrlbit = S5PC100_CLKGATE_D15_IIS1, | ||
| 587 | }, { | ||
| 588 | .name = "iis", | ||
| 589 | .id = 2, | ||
| 590 | .parent = &clk_p, | ||
| 591 | .enable = s5pc100_clk_d15_ctrl, | ||
| 592 | .ctrlbit = S5PC100_CLKGATE_D15_IIS2, | ||
| 593 | }, { | ||
| 594 | .name = "ac97", | ||
| 595 | .id = -1, | ||
| 596 | .parent = &clk_p, | ||
| 597 | .enable = s5pc100_clk_d15_ctrl, | ||
| 598 | .ctrlbit = S5PC100_CLKGATE_D15_AC97, | ||
| 599 | }, { | ||
| 600 | .name = "pcm", | ||
| 601 | .id = 0, | ||
| 602 | .parent = &clk_p, | ||
| 603 | .enable = s5pc100_clk_d15_ctrl, | ||
| 604 | .ctrlbit = S5PC100_CLKGATE_D15_PCM0, | ||
| 605 | }, { | ||
| 606 | .name = "pcm", | ||
| 607 | .id = 1, | ||
| 608 | .parent = &clk_p, | ||
| 609 | .enable = s5pc100_clk_d15_ctrl, | ||
| 610 | .ctrlbit = S5PC100_CLKGATE_D15_PCM1, | ||
| 611 | }, { | ||
| 612 | .name = "spdif", | ||
| 613 | .id = -1, | ||
| 614 | .parent = &clk_p, | ||
| 615 | .enable = s5pc100_clk_d15_ctrl, | ||
| 616 | .ctrlbit = S5PC100_CLKGATE_D15_SPDIF, | ||
| 617 | }, { | ||
| 618 | .name = "adc", | ||
| 619 | .id = -1, | ||
| 620 | .parent = &clk_p, | ||
| 621 | .enable = s5pc100_clk_d15_ctrl, | ||
| 622 | .ctrlbit = S5PC100_CLKGATE_D15_TSADC, | ||
| 623 | }, { | ||
| 624 | .name = "cg", | ||
| 625 | .id = -1, | ||
| 626 | .parent = &clk_p, | ||
| 627 | .enable = s5pc100_clk_d15_ctrl, | ||
| 628 | .ctrlbit = S5PC100_CLKGATE_D15_CG, | ||
| 629 | }, | ||
| 630 | |||
| 631 | /* Audio (D2_0) devices: all disabled */ | ||
| 632 | |||
| 633 | /* Special Clocks 0 */ | ||
| 634 | { | ||
| 635 | .name = "sclk_hpm", | ||
| 636 | .id = -1, | ||
| 637 | .parent = NULL, | ||
| 638 | .enable = s5pc100_sclk0_ctrl, | ||
| 639 | .ctrlbit = S5PC100_CLKGATE_SCLK0_HPM, | ||
| 640 | }, { | ||
| 641 | .name = "sclk_onenand", | ||
| 642 | .id = -1, | ||
| 643 | .parent = NULL, | ||
| 644 | .enable = s5pc100_sclk0_ctrl, | ||
| 645 | .ctrlbit = S5PC100_CLKGATE_SCLK0_ONENAND, | ||
| 646 | }, { | ||
| 647 | .name = "spi_48", | ||
| 648 | .id = 0, | ||
| 649 | .parent = &clk_48m, | ||
| 650 | .enable = s5pc100_sclk0_ctrl, | ||
| 651 | .ctrlbit = S5PC100_CLKGATE_SCLK0_SPI0_48, | ||
| 652 | }, { | ||
| 653 | .name = "spi_48", | ||
| 654 | .id = 1, | ||
| 655 | .parent = &clk_48m, | ||
| 656 | .enable = s5pc100_sclk0_ctrl, | ||
| 657 | .ctrlbit = S5PC100_CLKGATE_SCLK0_SPI1_48, | ||
| 658 | }, { | ||
| 659 | .name = "spi_48", | ||
| 660 | .id = 2, | ||
| 661 | .parent = &clk_48m, | ||
| 662 | .enable = s5pc100_sclk0_ctrl, | ||
| 663 | .ctrlbit = S5PC100_CLKGATE_SCLK0_SPI2_48, | ||
| 664 | }, { | ||
| 665 | .name = "mmc_48", | ||
| 666 | .id = 0, | ||
| 667 | .parent = &clk_48m, | ||
| 668 | .enable = s5pc100_sclk0_ctrl, | ||
| 669 | .ctrlbit = S5PC100_CLKGATE_SCLK0_MMC0_48, | ||
| 670 | }, { | ||
| 671 | .name = "mmc_48", | ||
| 672 | .id = 1, | ||
| 673 | .parent = &clk_48m, | ||
| 674 | .enable = s5pc100_sclk0_ctrl, | ||
| 675 | .ctrlbit = S5PC100_CLKGATE_SCLK0_MMC1_48, | ||
| 676 | }, { | ||
| 677 | .name = "mmc_48", | ||
| 678 | .id = 2, | ||
| 679 | .parent = &clk_48m, | ||
| 680 | .enable = s5pc100_sclk0_ctrl, | ||
| 681 | .ctrlbit = S5PC100_CLKGATE_SCLK0_MMC2_48, | ||
| 682 | }, | ||
| 683 | /* Special Clocks 1 */ | ||
| 684 | }; | ||
| 685 | |||
| 686 | static struct clk *clks[] __initdata = { | ||
| 687 | &clk_ext, | ||
| 688 | &clk_epll, | ||
| 689 | &clk_27m, | ||
| 690 | &clk_48m, | ||
| 691 | &clk_54m, | ||
| 692 | }; | ||
| 693 | |||
| 694 | void __init s5pc1xx_register_clocks(void) | ||
| 695 | { | ||
| 696 | struct clk *clkp; | ||
| 697 | int ret; | ||
| 698 | int ptr; | ||
| 699 | int size; | ||
| 700 | |||
| 701 | s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); | ||
| 702 | |||
| 703 | clkp = s5pc100_init_clocks; | ||
| 704 | size = ARRAY_SIZE(s5pc100_init_clocks); | ||
| 705 | |||
| 706 | for (ptr = 0; ptr < size; ptr++, clkp++) { | ||
| 707 | ret = s3c24xx_register_clock(clkp); | ||
| 708 | if (ret < 0) { | ||
| 709 | printk(KERN_ERR "Failed to register clock %s (%d)\n", | ||
| 710 | clkp->name, ret); | ||
| 711 | } | ||
| 712 | } | ||
| 713 | |||
| 714 | clkp = s5pc100_init_clocks_disable; | ||
| 715 | size = ARRAY_SIZE(s5pc100_init_clocks_disable); | ||
| 716 | |||
| 717 | for (ptr = 0; ptr < size; ptr++, clkp++) { | ||
| 718 | ret = s3c24xx_register_clock(clkp); | ||
| 719 | if (ret < 0) { | ||
| 720 | printk(KERN_ERR "Failed to register clock %s (%d)\n", | ||
| 721 | clkp->name, ret); | ||
| 722 | } | ||
| 723 | |||
| 724 | (clkp->enable)(clkp, 0); | ||
| 725 | } | ||
| 726 | |||
| 727 | s3c_pwmclk_init(); | ||
| 728 | } | ||
diff --git a/arch/arm/plat-s5pc1xx/cpu.c b/arch/arm/plat-s5pc1xx/cpu.c index 715a7330794..02baeaa2a12 100644 --- a/arch/arm/plat-s5pc1xx/cpu.c +++ b/arch/arm/plat-s5pc1xx/cpu.c | |||
| @@ -55,6 +55,16 @@ static struct cpu_table cpu_ids[] __initdata = { | |||
| 55 | 55 | ||
| 56 | static struct map_desc s5pc1xx_iodesc[] __initdata = { | 56 | static struct map_desc s5pc1xx_iodesc[] __initdata = { |
| 57 | { | 57 | { |
| 58 | .virtual = (unsigned long)S5PC1XX_VA_CLK_OTHER, | ||
| 59 | .pfn = __phys_to_pfn(S5PC1XX_PA_CLK_OTHER), | ||
| 60 | .length = SZ_4K, | ||
| 61 | .type = MT_DEVICE, | ||
| 62 | }, { | ||
| 63 | .virtual = (unsigned long)S5PC1XX_VA_GPIO, | ||
| 64 | .pfn = __phys_to_pfn(S5PC100_PA_GPIO), | ||
| 65 | .length = SZ_4K, | ||
| 66 | .type = MT_DEVICE, | ||
| 67 | }, { | ||
| 58 | .virtual = (unsigned long)S5PC1XX_VA_CHIPID, | 68 | .virtual = (unsigned long)S5PC1XX_VA_CHIPID, |
| 59 | .pfn = __phys_to_pfn(S5PC1XX_PA_CHIPID), | 69 | .pfn = __phys_to_pfn(S5PC1XX_PA_CHIPID), |
| 60 | .length = SZ_16, | 70 | .length = SZ_16, |
diff --git a/arch/arm/plat-s5pc1xx/gpio-config.c b/arch/arm/plat-s5pc1xx/gpio-config.c new file mode 100644 index 00000000000..bba675df9c7 --- /dev/null +++ b/arch/arm/plat-s5pc1xx/gpio-config.c | |||
| @@ -0,0 +1,62 @@ | |||
| 1 | /* linux/arch/arm/plat-s5pc1xx/gpio-config.c | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics | ||
| 4 | * | ||
| 5 | * S5PC1XX GPIO Configuration. | ||
| 6 | * | ||
| 7 | * Based on plat-s3c64xx/gpio-config.c | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License version 2 as | ||
| 11 | * published by the Free Software Foundation. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/kernel.h> | ||
| 15 | #include <linux/module.h> | ||
| 16 | #include <linux/gpio.h> | ||
| 17 | #include <linux/io.h> | ||
| 18 | |||
| 19 | #include <mach/gpio-core.h> | ||
| 20 | #include <plat/gpio-cfg-s5pc1xx.h> | ||
| 21 | |||
| 22 | s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin, unsigned int off) | ||
| 23 | { | ||
| 24 | struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin); | ||
| 25 | void __iomem *reg; | ||
| 26 | int shift = off * 2; | ||
| 27 | u32 drvstr; | ||
| 28 | |||
| 29 | if (!chip) | ||
| 30 | return -EINVAL; | ||
| 31 | |||
| 32 | reg = chip->base + 0x0C; | ||
| 33 | |||
| 34 | drvstr = __raw_readl(reg); | ||
| 35 | drvstr = 0xffff & (0x3 << shift); | ||
| 36 | drvstr = drvstr >> shift; | ||
| 37 | |||
| 38 | return (__force s5p_gpio_drvstr_t)drvstr; | ||
| 39 | } | ||
| 40 | EXPORT_SYMBOL(s5p_gpio_get_drvstr); | ||
| 41 | |||
| 42 | int s5p_gpio_set_drvstr(unsigned int pin, unsigned int off, | ||
| 43 | s5p_gpio_drvstr_t drvstr) | ||
| 44 | { | ||
| 45 | struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin); | ||
| 46 | void __iomem *reg; | ||
| 47 | int shift = off * 2; | ||
| 48 | u32 tmp; | ||
| 49 | |||
| 50 | if (!chip) | ||
| 51 | return -EINVAL; | ||
| 52 | |||
| 53 | reg = chip->base + 0x0C; | ||
| 54 | |||
| 55 | tmp = __raw_readl(reg); | ||
| 56 | tmp |= drvstr << shift; | ||
| 57 | |||
| 58 | __raw_writel(tmp, reg); | ||
| 59 | |||
| 60 | return 0; | ||
| 61 | } | ||
| 62 | EXPORT_SYMBOL(s5p_gpio_set_drvstr); | ||
diff --git a/arch/arm/plat-s5pc1xx/gpiolib.c b/arch/arm/plat-s5pc1xx/gpiolib.c new file mode 100644 index 00000000000..facb410e7a7 --- /dev/null +++ b/arch/arm/plat-s5pc1xx/gpiolib.c | |||
| @@ -0,0 +1,503 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/plat-s5pc1xx/gpiolib.c | ||
| 3 | * | ||
| 4 | * Copyright 2009 Samsung Electronics Co | ||
| 5 | * Kyungmin Park <kyungmin.park@samsung.com> | ||
| 6 | * | ||
| 7 | * S5PC1XX - GPIOlib support | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License version 2 as | ||
| 11 | * published by the Free Software Foundation. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/kernel.h> | ||
| 15 | #include <linux/irq.h> | ||
| 16 | #include <linux/io.h> | ||
| 17 | #include <linux/gpio.h> | ||
| 18 | |||
| 19 | #include <mach/map.h> | ||
| 20 | #include <mach/gpio-core.h> | ||
| 21 | |||
| 22 | #include <plat/gpio-cfg.h> | ||
| 23 | #include <plat/gpio-cfg-helpers.h> | ||
| 24 | #include <plat/regs-gpio.h> | ||
| 25 | |||
| 26 | /* S5PC100 GPIO bank summary: | ||
| 27 | * | ||
| 28 | * Bank GPIOs Style INT Type | ||
| 29 | * A0 8 4Bit GPIO_INT0 | ||
| 30 | * A1 5 4Bit GPIO_INT1 | ||
| 31 | * B 8 4Bit GPIO_INT2 | ||
| 32 | * C 5 4Bit GPIO_INT3 | ||
| 33 | * D 7 4Bit GPIO_INT4 | ||
| 34 | * E0 8 4Bit GPIO_INT5 | ||
| 35 | * E1 6 4Bit GPIO_INT6 | ||
| 36 | * F0 8 4Bit GPIO_INT7 | ||
| 37 | * F1 8 4Bit GPIO_INT8 | ||
| 38 | * F2 8 4Bit GPIO_INT9 | ||
| 39 | * F3 4 4Bit GPIO_INT10 | ||
| 40 | * G0 8 4Bit GPIO_INT11 | ||
| 41 | * G1 3 4Bit GPIO_INT12 | ||
| 42 | * G2 7 4Bit GPIO_INT13 | ||
| 43 | * G3 7 4Bit GPIO_INT14 | ||
| 44 | * H0 8 4Bit WKUP_INT | ||
| 45 | * H1 8 4Bit WKUP_INT | ||
| 46 | * H2 8 4Bit WKUP_INT | ||
| 47 | * H3 8 4Bit WKUP_INT | ||
| 48 | * I 8 4Bit GPIO_INT15 | ||
| 49 | * J0 8 4Bit GPIO_INT16 | ||
| 50 | * J1 5 4Bit GPIO_INT17 | ||
| 51 | * J2 8 4Bit GPIO_INT18 | ||
| 52 | * J3 8 4Bit GPIO_INT19 | ||
| 53 | * J4 4 4Bit GPIO_INT20 | ||
| 54 | * K0 8 4Bit None | ||
| 55 | * K1 6 4Bit None | ||
| 56 | * K2 8 4Bit None | ||
| 57 | * K3 8 4Bit None | ||
| 58 | * L0 8 4Bit None | ||
| 59 | * L1 8 4Bit None | ||
| 60 | * L2 8 4Bit None | ||
| 61 | * L3 8 4Bit None | ||
| 62 | */ | ||
| 63 | |||
| 64 | #define OFF_GPCON (0x00) | ||
| 65 | #define OFF_GPDAT (0x04) | ||
| 66 | |||
| 67 | #define con_4bit_shift(__off) ((__off) * 4) | ||
| 68 | |||
| 69 | #if 1 | ||
| 70 | #define gpio_dbg(x...) do { } while (0) | ||
| 71 | #else | ||
| 72 | #define gpio_dbg(x...) printk(KERN_DEBUG x) | ||
| 73 | #endif | ||
| 74 | |||
| 75 | /* The s5pc1xx_gpiolib routines are to control the gpio banks where | ||
| 76 | * the gpio configuration register (GPxCON) has 4 bits per GPIO, as the | ||
| 77 | * following example: | ||
| 78 | * | ||
| 79 | * base + 0x00: Control register, 4 bits per gpio | ||
| 80 | * gpio n: 4 bits starting at (4*n) | ||
| 81 | * 0000 = input, 0001 = output, others mean special-function | ||
| 82 | * base + 0x04: Data register, 1 bit per gpio | ||
| 83 | * bit n: data bit n | ||
| 84 | * | ||
| 85 | * Note, since the data register is one bit per gpio and is at base + 0x4 | ||
| 86 | * we can use s3c_gpiolib_get and s3c_gpiolib_set to change the state of | ||
| 87 | * the output. | ||
| 88 | */ | ||
| 89 | |||
| 90 | static int s5pc1xx_gpiolib_input(struct gpio_chip *chip, unsigned offset) | ||
| 91 | { | ||
| 92 | struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip); | ||
| 93 | void __iomem *base = ourchip->base; | ||
| 94 | unsigned long con; | ||
| 95 | |||
| 96 | con = __raw_readl(base + OFF_GPCON); | ||
| 97 | con &= ~(0xf << con_4bit_shift(offset)); | ||
| 98 | __raw_writel(con, base + OFF_GPCON); | ||
| 99 | |||
| 100 | gpio_dbg("%s: %p: CON now %08lx\n", __func__, base, con); | ||
| 101 | |||
| 102 | return 0; | ||
| 103 | } | ||
| 104 | |||
| 105 | static int s5pc1xx_gpiolib_output(struct gpio_chip *chip, | ||
| 106 | unsigned offset, int value) | ||
| 107 | { | ||
| 108 | struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip); | ||
| 109 | void __iomem *base = ourchip->base; | ||
| 110 | unsigned long con; | ||
| 111 | unsigned long dat; | ||
| 112 | |||
| 113 | con = __raw_readl(base + OFF_GPCON); | ||
| 114 | con &= ~(0xf << con_4bit_shift(offset)); | ||
| 115 | con |= 0x1 << con_4bit_shift(offset); | ||
| 116 | |||
| 117 | dat = __raw_readl(base + OFF_GPDAT); | ||
| 118 | if (value) | ||
| 119 | dat |= 1 << offset; | ||
| 120 | else | ||
| 121 | dat &= ~(1 << offset); | ||
| 122 | |||
| 123 | __raw_writel(dat, base + OFF_GPDAT); | ||
| 124 | __raw_writel(con, base + OFF_GPCON); | ||
| 125 | __raw_writel(dat, base + OFF_GPDAT); | ||
| 126 | |||
| 127 | gpio_dbg("%s: %p: CON %08lx, DAT %08lx\n", __func__, base, con, dat); | ||
| 128 | |||
| 129 | return 0; | ||
| 130 | } | ||
| 131 | |||
| 132 | static int s5pc1xx_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset) | ||
| 133 | { | ||
| 134 | return S3C_IRQ_GPIO(chip->base + offset); | ||
| 135 | } | ||
| 136 | |||
| 137 | static int s5pc1xx_gpiolib_to_eint(struct gpio_chip *chip, unsigned int offset) | ||
| 138 | { | ||
| 139 | int base; | ||
| 140 | |||
| 141 | base = chip->base - S5PC100_GPH0(0); | ||
| 142 | if (base == 0) | ||
| 143 | return IRQ_EINT(offset); | ||
| 144 | base = chip->base - S5PC100_GPH1(0); | ||
| 145 | if (base == 0) | ||
| 146 | return IRQ_EINT(8 + offset); | ||
| 147 | base = chip->base - S5PC100_GPH2(0); | ||
| 148 | if (base == 0) | ||
| 149 | return IRQ_EINT(16 + offset); | ||
| 150 | base = chip->base - S5PC100_GPH3(0); | ||
| 151 | if (base == 0) | ||
| 152 | return IRQ_EINT(24 + offset); | ||
| 153 | return -EINVAL; | ||
| 154 | } | ||
| 155 | |||
| 156 | static struct s3c_gpio_cfg gpio_cfg = { | ||
| 157 | .set_config = s3c_gpio_setcfg_s3c64xx_4bit, | ||
| 158 | .set_pull = s3c_gpio_setpull_updown, | ||
| 159 | .get_pull = s3c_gpio_getpull_updown, | ||
| 160 | }; | ||
| 161 | |||
| 162 | static struct s3c_gpio_cfg gpio_cfg_eint = { | ||
| 163 | .cfg_eint = 0xf, | ||
| 164 | .set_config = s3c_gpio_setcfg_s3c64xx_4bit, | ||
| 165 | .set_pull = s3c_gpio_setpull_updown, | ||
| 166 | .get_pull = s3c_gpio_getpull_updown, | ||
| 167 | }; | ||
| 168 | |||
| 169 | static struct s3c_gpio_cfg gpio_cfg_noint = { | ||
| 170 | .set_config = s3c_gpio_setcfg_s3c64xx_4bit, | ||
| 171 | .set_pull = s3c_gpio_setpull_updown, | ||
| 172 | .get_pull = s3c_gpio_getpull_updown, | ||
| 173 | }; | ||
| 174 | |||
| 175 | static struct s3c_gpio_chip s5pc100_gpio_chips[] = { | ||
| 176 | { | ||
| 177 | .base = S5PC100_GPA0_BASE, | ||
| 178 | .config = &gpio_cfg, | ||
| 179 | .chip = { | ||
| 180 | .base = S5PC100_GPA0(0), | ||
| 181 | .ngpio = S5PC100_GPIO_A0_NR, | ||
| 182 | .label = "GPA0", | ||
| 183 | }, | ||
| 184 | }, { | ||
| 185 | .base = S5PC100_GPA1_BASE, | ||
| 186 | .config = &gpio_cfg, | ||
| 187 | .chip = { | ||
| 188 | .base = S5PC100_GPA1(0), | ||
| 189 | .ngpio = S5PC100_GPIO_A1_NR, | ||
| 190 | .label = "GPA1", | ||
| 191 | }, | ||
| 192 | }, { | ||
| 193 | .base = S5PC100_GPB_BASE, | ||
| 194 | .config = &gpio_cfg, | ||
| 195 | .chip = { | ||
| 196 | .base = S5PC100_GPB(0), | ||
| 197 | .ngpio = S5PC100_GPIO_B_NR, | ||
| 198 | .label = "GPB", | ||
| 199 | }, | ||
| 200 | }, { | ||
| 201 | .base = S5PC100_GPC_BASE, | ||
| 202 | .config = &gpio_cfg, | ||
| 203 | .chip = { | ||
| 204 | .base = S5PC100_GPC(0), | ||
| 205 | .ngpio = S5PC100_GPIO_C_NR, | ||
| 206 | .label = "GPC", | ||
| 207 | }, | ||
| 208 | }, { | ||
| 209 | .base = S5PC100_GPD_BASE, | ||
| 210 | .config = &gpio_cfg, | ||
| 211 | .chip = { | ||
| 212 | .base = S5PC100_GPD(0), | ||
| 213 | .ngpio = S5PC100_GPIO_D_NR, | ||
| 214 | .label = "GPD", | ||
| 215 | }, | ||
| 216 | }, { | ||
| 217 | .base = S5PC100_GPE0_BASE, | ||
| 218 | .config = &gpio_cfg, | ||
| 219 | .chip = { | ||
| 220 | .base = S5PC100_GPE0(0), | ||
| 221 | .ngpio = S5PC100_GPIO_E0_NR, | ||
| 222 | .label = "GPE0", | ||
| 223 | }, | ||
| 224 | }, { | ||
| 225 | .base = S5PC100_GPE1_BASE, | ||
| 226 | .config = &gpio_cfg, | ||
| 227 | .chip = { | ||
| 228 | .base = S5PC100_GPE1(0), | ||
| 229 | .ngpio = S5PC100_GPIO_E1_NR, | ||
| 230 | .label = "GPE1", | ||
| 231 | }, | ||
| 232 | }, { | ||
| 233 | .base = S5PC100_GPF0_BASE, | ||
| 234 | .config = &gpio_cfg, | ||
| 235 | .chip = { | ||
| 236 | .base = S5PC100_GPF0(0), | ||
| 237 | .ngpio = S5PC100_GPIO_F0_NR, | ||
| 238 | .label = "GPF0", | ||
| 239 | }, | ||
| 240 | }, { | ||
| 241 | .base = S5PC100_GPF1_BASE, | ||
| 242 | .config = &gpio_cfg, | ||
| 243 | .chip = { | ||
| 244 | .base = S5PC100_GPF1(0), | ||
| 245 | .ngpio = S5PC100_GPIO_F1_NR, | ||
| 246 | .label = "GPF1", | ||
| 247 | }, | ||
| 248 | }, { | ||
| 249 | .base = S5PC100_GPF2_BASE, | ||
| 250 | .config = &gpio_cfg, | ||
| 251 | .chip = { | ||
| 252 | .base = S5PC100_GPF2(0), | ||
| 253 | .ngpio = S5PC100_GPIO_F2_NR, | ||
| 254 | .label = "GPF2", | ||
| 255 | }, | ||
| 256 | }, { | ||
| 257 | .base = S5PC100_GPF3_BASE, | ||
| 258 | .config = &gpio_cfg, | ||
| 259 | .chip = { | ||
| 260 | .base = S5PC100_GPF3(0), | ||
| 261 | .ngpio = S5PC100_GPIO_F3_NR, | ||
| 262 | .label = "GPF3", | ||
| 263 | }, | ||
| 264 | }, { | ||
| 265 | .base = S5PC100_GPG0_BASE, | ||
| 266 | .config = &gpio_cfg, | ||
| 267 | .chip = { | ||
| 268 | .base = S5PC100_GPG0(0), | ||
| 269 | .ngpio = S5PC100_GPIO_G0_NR, | ||
| 270 | .label = "GPG0", | ||
| 271 | }, | ||
| 272 | }, { | ||
| 273 | .base = S5PC100_GPG1_BASE, | ||
| 274 | .config = &gpio_cfg, | ||
| 275 | .chip = { | ||
| 276 | .base = S5PC100_GPG1(0), | ||
| 277 | .ngpio = S5PC100_GPIO_G1_NR, | ||
| 278 | .label = "GPG1", | ||
| 279 | }, | ||
| 280 | }, { | ||
| 281 | .base = S5PC100_GPG2_BASE, | ||
| 282 | .config = &gpio_cfg, | ||
| 283 | .chip = { | ||
| 284 | .base = S5PC100_GPG2(0), | ||
| 285 | .ngpio = S5PC100_GPIO_G2_NR, | ||
| 286 | .label = "GPG2", | ||
| 287 | }, | ||
| 288 | }, { | ||
| 289 | .base = S5PC100_GPG3_BASE, | ||
| 290 | .config = &gpio_cfg, | ||
| 291 | .chip = { | ||
| 292 | .base = S5PC100_GPG3(0), | ||
| 293 | .ngpio = S5PC100_GPIO_G3_NR, | ||
| 294 | .label = "GPG3", | ||
| 295 | }, | ||
| 296 | }, { | ||
| 297 | .base = S5PC100_GPH0_BASE, | ||
| 298 | .config = &gpio_cfg_eint, | ||
| 299 | .chip = { | ||
| 300 | .base = S5PC100_GPH0(0), | ||
| 301 | .ngpio = S5PC100_GPIO_H0_NR, | ||
| 302 | .label = "GPH0", | ||
| 303 | }, | ||
| 304 | }, { | ||
| 305 | .base = S5PC100_GPH1_BASE, | ||
| 306 | .config = &gpio_cfg_eint, | ||
| 307 | .chip = { | ||
| 308 | .base = S5PC100_GPH1(0), | ||
| 309 | .ngpio = S5PC100_GPIO_H1_NR, | ||
| 310 | .label = "GPH1", | ||
| 311 | }, | ||
| 312 | }, { | ||
| 313 | .base = S5PC100_GPH2_BASE, | ||
| 314 | .config = &gpio_cfg_eint, | ||
| 315 | .chip = { | ||
| 316 | .base = S5PC100_GPH2(0), | ||
| 317 | .ngpio = S5PC100_GPIO_H2_NR, | ||
| 318 | .label = "GPH2", | ||
| 319 | }, | ||
| 320 | }, { | ||
| 321 | .base = S5PC100_GPH3_BASE, | ||
| 322 | .config = &gpio_cfg_eint, | ||
| 323 | .chip = { | ||
| 324 | .base = S5PC100_GPH3(0), | ||
| 325 | .ngpio = S5PC100_GPIO_H3_NR, | ||
| 326 | .label = "GPH3", | ||
| 327 | }, | ||
| 328 | }, { | ||
| 329 | .base = S5PC100_GPI_BASE, | ||
| 330 | .config = &gpio_cfg, | ||
| 331 | .chip = { | ||
| 332 | .base = S5PC100_GPI(0), | ||
| 333 | .ngpio = S5PC100_GPIO_I_NR, | ||
| 334 | .label = "GPI", | ||
| 335 | }, | ||
| 336 | }, { | ||
| 337 | .base = S5PC100_GPJ0_BASE, | ||
| 338 | .config = &gpio_cfg, | ||
| 339 | .chip = { | ||
| 340 | .base = S5PC100_GPJ0(0), | ||
| 341 | .ngpio = S5PC100_GPIO_J0_NR, | ||
| 342 | .label = "GPJ0", | ||
| 343 | }, | ||
| 344 | }, { | ||
| 345 | .base = S5PC100_GPJ1_BASE, | ||
| 346 | .config = &gpio_cfg, | ||
| 347 | .chip = { | ||
| 348 | .base = S5PC100_GPJ1(0), | ||
| 349 | .ngpio = S5PC100_GPIO_J1_NR, | ||
| 350 | .label = "GPJ1", | ||
| 351 | }, | ||
| 352 | }, { | ||
| 353 | .base = S5PC100_GPJ2_BASE, | ||
| 354 | .config = &gpio_cfg, | ||
| 355 | .chip = { | ||
| 356 | .base = S5PC100_GPJ2(0), | ||
| 357 | .ngpio = S5PC100_GPIO_J2_NR, | ||
| 358 | .label = "GPJ2", | ||
| 359 | }, | ||
| 360 | }, { | ||
| 361 | .base = S5PC100_GPJ3_BASE, | ||
| 362 | .config = &gpio_cfg, | ||
| 363 | .chip = { | ||
| 364 | .base = S5PC100_GPJ3(0), | ||
| 365 | .ngpio = S5PC100_GPIO_J3_NR, | ||
| 366 | .label = "GPJ3", | ||
| 367 | }, | ||
| 368 | }, { | ||
| 369 | .base = S5PC100_GPJ4_BASE, | ||
| 370 | .config = &gpio_cfg, | ||
| 371 | .chip = { | ||
| 372 | .base = S5PC100_GPJ4(0), | ||
| 373 | .ngpio = S5PC100_GPIO_J4_NR, | ||
| 374 | .label = "GPJ4", | ||
| 375 | }, | ||
| 376 | }, { | ||
| 377 | .base = S5PC100_GPK0_BASE, | ||
| 378 | .config = &gpio_cfg_noint, | ||
| 379 | .chip = { | ||
| 380 | .base = S5PC100_GPK0(0), | ||
| 381 | .ngpio = S5PC100_GPIO_K0_NR, | ||
| 382 | .label = "GPK0", | ||
| 383 | }, | ||
| 384 | }, { | ||
| 385 | .base = S5PC100_GPK1_BASE, | ||
| 386 | .config = &gpio_cfg_noint, | ||
| 387 | .chip = { | ||
| 388 | .base = S5PC100_GPK1(0), | ||
| 389 | .ngpio = S5PC100_GPIO_K1_NR, | ||
| 390 | .label = "GPK1", | ||
| 391 | }, | ||
| 392 | }, { | ||
| 393 | .base = S5PC100_GPK2_BASE, | ||
| 394 | .config = &gpio_cfg_noint, | ||
| 395 | .chip = { | ||
| 396 | .base = S5PC100_GPK2(0), | ||
| 397 | .ngpio = S5PC100_GPIO_K2_NR, | ||
| 398 | .label = "GPK2", | ||
| 399 | }, | ||
| 400 | }, { | ||
| 401 | .base = S5PC100_GPK3_BASE, | ||
| 402 | .config = &gpio_cfg_noint, | ||
| 403 | .chip = { | ||
| 404 | .base = S5PC100_GPK3(0), | ||
| 405 | .ngpio = S5PC100_GPIO_K3_NR, | ||
| 406 | .label = "GPK3", | ||
| 407 | }, | ||
| 408 | }, { | ||
| 409 | .base = S5PC100_GPL0_BASE, | ||
| 410 | .config = &gpio_cfg_noint, | ||
| 411 | .chip = { | ||
| 412 | .base = S5PC100_GPL0(0), | ||
| 413 | .ngpio = S5PC100_GPIO_L0_NR, | ||
| 414 | .label = "GPL0", | ||
| 415 | }, | ||
| 416 | }, { | ||
| 417 | .base = S5PC100_GPL1_BASE, | ||
| 418 | .config = &gpio_cfg_noint, | ||
| 419 | .chip = { | ||
| 420 | .base = S5PC100_GPL1(0), | ||
| 421 | .ngpio = S5PC100_GPIO_L1_NR, | ||
| 422 | .label = "GPL1", | ||
| 423 | }, | ||
| 424 | }, { | ||
| 425 | .base = S5PC100_GPL2_BASE, | ||
| 426 | .config = &gpio_cfg_noint, | ||
| 427 | .chip = { | ||
| 428 | .base = S5PC100_GPL2(0), | ||
| 429 | .ngpio = S5PC100_GPIO_L2_NR, | ||
| 430 | .label = "GPL2", | ||
| 431 | }, | ||
| 432 | }, { | ||
| 433 | .base = S5PC100_GPL3_BASE, | ||
| 434 | .config = &gpio_cfg_noint, | ||
| 435 | .chip = { | ||
| 436 | .base = S5PC100_GPL3(0), | ||
| 437 | .ngpio = S5PC100_GPIO_L3_NR, | ||
| 438 | .label = "GPL3", | ||
| 439 | }, | ||
| 440 | }, { | ||
| 441 | .base = S5PC100_GPL4_BASE, | ||
| 442 | .config = &gpio_cfg_noint, | ||
| 443 | .chip = { | ||
| 444 | .base = S5PC100_GPL4(0), | ||
| 445 | .ngpio = S5PC100_GPIO_L4_NR, | ||
| 446 | .label = "GPL4", | ||
| 447 | }, | ||
| 448 | }, | ||
| 449 | }; | ||
| 450 | |||
| 451 | /* FIXME move from irq-gpio.c */ | ||
| 452 | extern struct irq_chip s5pc1xx_gpioint; | ||
| 453 | extern void s5pc1xx_irq_gpioint_handler(unsigned int irq, struct irq_desc *desc); | ||
| 454 | |||
| 455 | static __init void s5pc1xx_gpiolib_link(struct s3c_gpio_chip *chip) | ||
| 456 | { | ||
| 457 | chip->chip.direction_input = s5pc1xx_gpiolib_input; | ||
| 458 | chip->chip.direction_output = s5pc1xx_gpiolib_output; | ||
| 459 | chip->pm = __gpio_pm(&s3c_gpio_pm_4bit); | ||
| 460 | |||
| 461 | /* Interrupt */ | ||
| 462 | if (chip->config == &gpio_cfg) { | ||
| 463 | int i, irq; | ||
| 464 | |||
| 465 | chip->chip.to_irq = s5pc1xx_gpiolib_to_irq; | ||
| 466 | |||
| 467 | for (i = 0; i < chip->chip.ngpio; i++) { | ||
| 468 | irq = S3C_IRQ_GPIO_BASE + chip->chip.base + i; | ||
| 469 | set_irq_chip(irq, &s5pc1xx_gpioint); | ||
| 470 | set_irq_data(irq, &chip->chip); | ||
| 471 | set_irq_handler(irq, handle_level_irq); | ||
| 472 | set_irq_flags(irq, IRQF_VALID); | ||
| 473 | } | ||
| 474 | } else if (chip->config == &gpio_cfg_eint) | ||
| 475 | chip->chip.to_irq = s5pc1xx_gpiolib_to_eint; | ||
| 476 | } | ||
| 477 | |||
| 478 | static __init void s5pc1xx_gpiolib_add(struct s3c_gpio_chip *chips, | ||
| 479 | int nr_chips, | ||
| 480 | void (*fn)(struct s3c_gpio_chip *)) | ||
| 481 | { | ||
| 482 | for (; nr_chips > 0; nr_chips--, chips++) { | ||
| 483 | if (fn) | ||
| 484 | (fn)(chips); | ||
| 485 | s3c_gpiolib_add(chips); | ||
| 486 | } | ||
| 487 | } | ||
| 488 | |||
| 489 | static __init int s5pc1xx_gpiolib_init(void) | ||
| 490 | { | ||
| 491 | struct s3c_gpio_chip *chips; | ||
| 492 | int nr_chips; | ||
| 493 | |||
| 494 | chips = s5pc100_gpio_chips; | ||
| 495 | nr_chips = ARRAY_SIZE(s5pc100_gpio_chips); | ||
| 496 | |||
| 497 | s5pc1xx_gpiolib_add(chips, nr_chips, s5pc1xx_gpiolib_link); | ||
| 498 | /* Interrupt */ | ||
| 499 | set_irq_chained_handler(IRQ_GPIOINT, s5pc1xx_irq_gpioint_handler); | ||
| 500 | |||
| 501 | return 0; | ||
| 502 | } | ||
| 503 | core_initcall(s5pc1xx_gpiolib_init); | ||
diff --git a/arch/arm/plat-s5pc1xx/include/plat/gpio-cfg-s5pc1xx.h b/arch/arm/plat-s5pc1xx/include/plat/gpio-cfg-s5pc1xx.h new file mode 100644 index 00000000000..72ad59f61ef --- /dev/null +++ b/arch/arm/plat-s5pc1xx/include/plat/gpio-cfg-s5pc1xx.h | |||
| @@ -0,0 +1,32 @@ | |||
| 1 | /* linux/arch/arm/plat-s5pc1xx/include/plat/gpio-cfg.h | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronic | ||
| 4 | * | ||
| 5 | * S5PC1XX Platform - GPIO pin configuration | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | */ | ||
| 11 | |||
| 12 | /* This file contains the necessary definitions to get the basic gpio | ||
| 13 | * pin configuration done such as setting a pin to input or output or | ||
| 14 | * changing the pull-{up,down} configurations. | ||
| 15 | */ | ||
| 16 | |||
| 17 | #ifndef __GPIO_CFG_S5PC1XX_H | ||
| 18 | #define __GPIO_CFG_S5PC1XX_H __FILE__ | ||
| 19 | |||
| 20 | typedef unsigned int __bitwise__ s5p_gpio_drvstr_t; | ||
| 21 | |||
| 22 | #define S5P_GPIO_DRVSTR_LV1 0x00 | ||
| 23 | #define S5P_GPIO_DRVSTR_LV2 0x01 | ||
| 24 | #define S5P_GPIO_DRVSTR_LV3 0x10 | ||
| 25 | #define S5P_GPIO_DRVSTR_LV4 0x11 | ||
| 26 | |||
| 27 | extern s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin, unsigned int off); | ||
| 28 | |||
| 29 | extern int s5p_gpio_set_drvstr(unsigned int pin, unsigned int off, | ||
| 30 | s5p_gpio_drvstr_t drvstr); | ||
| 31 | |||
| 32 | #endif /* __GPIO_CFG_S5PC1XX_H */ | ||
diff --git a/arch/arm/plat-s5pc1xx/include/plat/gpio-ext.h b/arch/arm/plat-s5pc1xx/include/plat/gpio-ext.h new file mode 100644 index 00000000000..33ad267e847 --- /dev/null +++ b/arch/arm/plat-s5pc1xx/include/plat/gpio-ext.h | |||
| @@ -0,0 +1,44 @@ | |||
| 1 | /* linux/arch/arm/plat-s5pc1xx/include/plat/gpio-eint.h | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics Co. | ||
| 4 | * | ||
| 5 | * External Interrupt (GPH0 ~ GPH3) control register definitions | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | */ | ||
| 11 | |||
| 12 | #define S5PC1XX_WKUP_INT_CON0_7 (S5PC1XX_EINT_BASE + 0x0) | ||
| 13 | #define S5PC1XX_WKUP_INT_CON8_15 (S5PC1XX_EINT_BASE + 0x4) | ||
| 14 | #define S5PC1XX_WKUP_INT_CON16_23 (S5PC1XX_EINT_BASE + 0x8) | ||
| 15 | #define S5PC1XX_WKUP_INT_CON24_31 (S5PC1XX_EINT_BASE + 0xC) | ||
| 16 | #define S5PC1XX_WKUP_INT_CON(x) (S5PC1XX_WKUP_INT_CON0_7 + (x * 0x4)) | ||
| 17 | |||
| 18 | #define S5PC1XX_WKUP_INT_FLTCON0_3 (S5PC1XX_EINT_BASE + 0x80) | ||
| 19 | #define S5PC1XX_WKUP_INT_FLTCON4_7 (S5PC1XX_EINT_BASE + 0x84) | ||
| 20 | #define S5PC1XX_WKUP_INT_FLTCON8_11 (S5PC1XX_EINT_BASE + 0x88) | ||
| 21 | #define S5PC1XX_WKUP_INT_FLTCON12_15 (S5PC1XX_EINT_BASE + 0x8C) | ||
| 22 | #define S5PC1XX_WKUP_INT_FLTCON16_19 (S5PC1XX_EINT_BASE + 0x90) | ||
| 23 | #define S5PC1XX_WKUP_INT_FLTCON20_23 (S5PC1XX_EINT_BASE + 0x94) | ||
| 24 | #define S5PC1XX_WKUP_INT_FLTCON24_27 (S5PC1XX_EINT_BASE + 0x98) | ||
| 25 | #define S5PC1XX_WKUP_INT_FLTCON28_31 (S5PC1XX_EINT_BASE + 0x9C) | ||
| 26 | #define S5PC1XX_WKUP_INT_FLTCON(x) (S5PC1XX_WKUP_INT_FLTCON0_3 + (x * 0x4)) | ||
| 27 | |||
| 28 | #define S5PC1XX_WKUP_INT_MASK0_7 (S5PC1XX_EINT_BASE + 0x100) | ||
| 29 | #define S5PC1XX_WKUP_INT_MASK8_15 (S5PC1XX_EINT_BASE + 0x104) | ||
| 30 | #define S5PC1XX_WKUP_INT_MASK16_23 (S5PC1XX_EINT_BASE + 0x108) | ||
| 31 | #define S5PC1XX_WKUP_INT_MASK24_31 (S5PC1XX_EINT_BASE + 0x10C) | ||
| 32 | #define S5PC1XX_WKUP_INT_MASK(x) (S5PC1XX_WKUP_INT_MASK0_7 + (x * 0x4)) | ||
| 33 | |||
| 34 | #define S5PC1XX_WKUP_INT_PEND0_7 (S5PC1XX_EINT_BASE + 0x140) | ||
| 35 | #define S5PC1XX_WKUP_INT_PEND8_15 (S5PC1XX_EINT_BASE + 0x144) | ||
| 36 | #define S5PC1XX_WKUP_INT_PEND16_23 (S5PC1XX_EINT_BASE + 0x148) | ||
| 37 | #define S5PC1XX_WKUP_INT_PEND24_31 (S5PC1XX_EINT_BASE + 0x14C) | ||
| 38 | #define S5PC1XX_WKUP_INT_PEND(x) (S5PC1XX_WKUP_INT_PEND0_7 + (x * 0x4)) | ||
| 39 | |||
| 40 | #define S5PC1XX_WKUP_INT_LOWLEV (0x00) | ||
| 41 | #define S5PC1XX_WKUP_INT_HILEV (0x01) | ||
| 42 | #define S5PC1XX_WKUP_INT_FALLEDGE (0x02) | ||
| 43 | #define S5PC1XX_WKUP_INT_RISEEDGE (0x03) | ||
| 44 | #define S5PC1XX_WKUP_INT_BOTHEDGE (0x04) | ||
diff --git a/arch/arm/plat-s5pc1xx/include/plat/irqs.h b/arch/arm/plat-s5pc1xx/include/plat/irqs.h index f07d8c3b25d..ef8736366f0 100644 --- a/arch/arm/plat-s5pc1xx/include/plat/irqs.h +++ b/arch/arm/plat-s5pc1xx/include/plat/irqs.h | |||
| @@ -171,12 +171,21 @@ | |||
| 171 | #define IRQ_SDMIRQ S5PC1XX_IRQ_VIC2(30) | 171 | #define IRQ_SDMIRQ S5PC1XX_IRQ_VIC2(30) |
| 172 | #define IRQ_SDMFIQ S5PC1XX_IRQ_VIC2(31) | 172 | #define IRQ_SDMFIQ S5PC1XX_IRQ_VIC2(31) |
| 173 | 173 | ||
| 174 | /* External interrupt */ | ||
| 174 | #define S3C_IRQ_EINT_BASE (IRQ_SDMFIQ + 1) | 175 | #define S3C_IRQ_EINT_BASE (IRQ_SDMFIQ + 1) |
| 175 | 176 | ||
| 176 | #define S3C_EINT(x) ((x) + S3C_IRQ_EINT_BASE) | 177 | #define S3C_EINT(x) (S3C_IRQ_EINT_BASE + (x - 16)) |
| 177 | #define IRQ_EINT(x) S3C_EINT(x) | 178 | #define IRQ_EINT(x) (x < 16 ? IRQ_EINT0 + x : S3C_EINT(x)) |
| 179 | #define IRQ_EINT_BIT(x) (x < IRQ_EINT16_31 ? x - IRQ_EINT0 : x - S3C_EINT(0)) | ||
| 178 | 180 | ||
| 179 | #define NR_IRQS (IRQ_EINT(31)+1) | 181 | /* GPIO interrupt */ |
| 182 | #define S3C_IRQ_GPIO_BASE (IRQ_EINT(31) + 1) | ||
| 183 | #define S3C_IRQ_GPIO(x) (S3C_IRQ_GPIO_BASE + (x)) | ||
| 184 | |||
| 185 | /* | ||
| 186 | * Until MP04 Groups -> 40 (exactly 39) Groups * 8 ~= 320 GPIOs | ||
| 187 | */ | ||
| 188 | #define NR_IRQS (S3C_IRQ_GPIO(320) + 1) | ||
| 180 | 189 | ||
| 181 | #endif /* __ASM_PLAT_S5PC1XX_IRQS_H */ | 190 | #endif /* __ASM_PLAT_S5PC1XX_IRQS_H */ |
| 182 | 191 | ||
diff --git a/arch/arm/plat-s5pc1xx/include/plat/regs-clock.h b/arch/arm/plat-s5pc1xx/include/plat/regs-clock.h index 75c8390cb82..c5cc86e92d6 100644 --- a/arch/arm/plat-s5pc1xx/include/plat/regs-clock.h +++ b/arch/arm/plat-s5pc1xx/include/plat/regs-clock.h | |||
| @@ -13,68 +13,69 @@ | |||
| 13 | #ifndef __PLAT_REGS_CLOCK_H | 13 | #ifndef __PLAT_REGS_CLOCK_H |
| 14 | #define __PLAT_REGS_CLOCK_H __FILE__ | 14 | #define __PLAT_REGS_CLOCK_H __FILE__ |
| 15 | 15 | ||
| 16 | #define S5PC1XX_CLKREG(x) (S5PC1XX_VA_CLK + (x)) | 16 | #define S5PC100_CLKREG(x) (S5PC1XX_VA_CLK + (x)) |
| 17 | 17 | #define S5PC100_CLKREG_OTHER(x) (S5PC1XX_VA_CLK_OTHER + (x)) | |
| 18 | #define S5PC1XX_APLL_LOCK S5PC1XX_CLKREG(0x00) | 18 | |
| 19 | #define S5PC1XX_MPLL_LOCK S5PC1XX_CLKREG(0x04) | 19 | /* s5pc100 register for clock */ |
| 20 | #define S5PC1XX_EPLL_LOCK S5PC1XX_CLKREG(0x08) | 20 | #define S5PC100_APLL_LOCK S5PC100_CLKREG(0x00) |
| 21 | #define S5PC100_HPLL_LOCK S5PC1XX_CLKREG(0x0C) | 21 | #define S5PC100_MPLL_LOCK S5PC100_CLKREG(0x04) |
| 22 | 22 | #define S5PC100_EPLL_LOCK S5PC100_CLKREG(0x08) | |
| 23 | #define S5PC1XX_APLL_CON S5PC1XX_CLKREG(0x100) | 23 | #define S5PC100_HPLL_LOCK S5PC100_CLKREG(0x0C) |
| 24 | #define S5PC1XX_MPLL_CON S5PC1XX_CLKREG(0x104) | 24 | |
| 25 | #define S5PC1XX_EPLL_CON S5PC1XX_CLKREG(0x108) | 25 | #define S5PC100_APLL_CON S5PC100_CLKREG(0x100) |
| 26 | #define S5PC100_HPLL_CON S5PC1XX_CLKREG(0x10C) | 26 | #define S5PC100_MPLL_CON S5PC100_CLKREG(0x104) |
| 27 | 27 | #define S5PC100_EPLL_CON S5PC100_CLKREG(0x108) | |
| 28 | #define S5PC1XX_CLK_SRC0 S5PC1XX_CLKREG(0x200) | 28 | #define S5PC100_HPLL_CON S5PC100_CLKREG(0x10C) |
| 29 | #define S5PC1XX_CLK_SRC1 S5PC1XX_CLKREG(0x204) | 29 | |
| 30 | #define S5PC1XX_CLK_SRC2 S5PC1XX_CLKREG(0x208) | 30 | #define S5PC100_CLKSRC0 S5PC100_CLKREG(0x200) |
| 31 | #define S5PC1XX_CLK_SRC3 S5PC1XX_CLKREG(0x20C) | 31 | #define S5PC100_CLKSRC1 S5PC100_CLKREG(0x204) |
| 32 | 32 | #define S5PC100_CLKSRC2 S5PC100_CLKREG(0x208) | |
| 33 | #define S5PC1XX_CLK_DIV0 S5PC1XX_CLKREG(0x300) | 33 | #define S5PC100_CLKSRC3 S5PC100_CLKREG(0x20C) |
| 34 | #define S5PC1XX_CLK_DIV1 S5PC1XX_CLKREG(0x304) | 34 | |
| 35 | #define S5PC1XX_CLK_DIV2 S5PC1XX_CLKREG(0x308) | 35 | #define S5PC100_CLKDIV0 S5PC100_CLKREG(0x300) |
| 36 | #define S5PC1XX_CLK_DIV3 S5PC1XX_CLKREG(0x30C) | 36 | #define S5PC100_CLKDIV1 S5PC100_CLKREG(0x304) |
| 37 | #define S5PC1XX_CLK_DIV4 S5PC1XX_CLKREG(0x310) | 37 | #define S5PC100_CLKDIV2 S5PC100_CLKREG(0x308) |
| 38 | 38 | #define S5PC100_CLKDIV3 S5PC100_CLKREG(0x30C) | |
| 39 | #define S5PC100_CLK_OUT S5PC1XX_CLKREG(0x400) | 39 | #define S5PC100_CLKDIV4 S5PC100_CLKREG(0x310) |
| 40 | 40 | ||
| 41 | #define S5PC100_CLKGATE_D00 S5PC1XX_CLKREG(0x500) | 41 | #define S5PC100_CLK_OUT S5PC100_CLKREG(0x400) |
| 42 | #define S5PC100_CLKGATE_D01 S5PC1XX_CLKREG(0x504) | 42 | |
| 43 | #define S5PC100_CLKGATE_D02 S5PC1XX_CLKREG(0x508) | 43 | #define S5PC100_CLKGATE_D00 S5PC100_CLKREG(0x500) |
| 44 | 44 | #define S5PC100_CLKGATE_D01 S5PC100_CLKREG(0x504) | |
| 45 | #define S5PC100_CLKGATE_D10 S5PC1XX_CLKREG(0x520) | 45 | #define S5PC100_CLKGATE_D02 S5PC100_CLKREG(0x508) |
| 46 | #define S5PC100_CLKGATE_D11 S5PC1XX_CLKREG(0x524) | 46 | |
| 47 | #define S5PC100_CLKGATE_D12 S5PC1XX_CLKREG(0x528) | 47 | #define S5PC100_CLKGATE_D10 S5PC100_CLKREG(0x520) |
| 48 | #define S5PC100_CLKGATE_D13 S5PC1XX_CLKREG(0x52C) | 48 | #define S5PC100_CLKGATE_D11 S5PC100_CLKREG(0x524) |
| 49 | #define S5PC100_CLKGATE_D14 S5PC1XX_CLKREG(0x530) | 49 | #define S5PC100_CLKGATE_D12 S5PC100_CLKREG(0x528) |
| 50 | #define S5PC100_CLKGATE_D15 S5PC1XX_CLKREG(0x534) | 50 | #define S5PC100_CLKGATE_D13 S5PC100_CLKREG(0x52C) |
| 51 | 51 | #define S5PC100_CLKGATE_D14 S5PC100_CLKREG(0x530) | |
| 52 | #define S5PC100_CLKGATE_D20 S5PC1XX_CLKREG(0x540) | 52 | #define S5PC100_CLKGATE_D15 S5PC100_CLKREG(0x534) |
| 53 | 53 | ||
| 54 | #define S5PC100_SCLKGATE0 S5PC1XX_CLKREG(0x560) | 54 | #define S5PC100_CLKGATE_D20 S5PC100_CLKREG(0x540) |
| 55 | #define S5PC100_SCLKGATE1 S5PC1XX_CLKREG(0x564) | 55 | |
| 56 | 56 | #define S5PC100_SCLKGATE0 S5PC100_CLKREG(0x560) | |
| 57 | #define S5PC100_OTHERS S5PC1XX_CLKREG(0x8200) | 57 | #define S5PC100_SCLKGATE1 S5PC100_CLKREG(0x564) |
| 58 | 58 | ||
| 59 | #define S5PC1XX_EPLL_EN (1<<31) | 59 | /* EPLL_CON */ |
| 60 | #define S5PC1XX_EPLL_MASK 0xffffffff | 60 | #define S5PC100_EPLL_EN (1<<31) |
| 61 | #define S5PC1XX_EPLLVAL(_m, _p, _s) ((_m) << 16 | ((_p) << 8) | ((_s))) | 61 | #define S5PC100_EPLL_MASK 0xffffffff |
| 62 | #define S5PC100_EPLLVAL(_m, _p, _s) ((_m) << 16 | ((_p) << 8) | ((_s))) | ||
| 62 | 63 | ||
| 63 | /* CLKSRC0 */ | 64 | /* CLKSRC0 */ |
| 64 | #define S5PC1XX_CLKSRC0_APLL_MASK (0x1<<0) | 65 | #define S5PC100_CLKSRC0_APLL_MASK (0x1<<0) |
| 65 | #define S5PC1XX_CLKSRC0_APLL_SHIFT (0) | 66 | #define S5PC100_CLKSRC0_APLL_SHIFT (0) |
| 66 | #define S5PC1XX_CLKSRC0_MPLL_MASK (0x1<<4) | 67 | #define S5PC100_CLKSRC0_MPLL_MASK (0x1<<4) |
| 67 | #define S5PC1XX_CLKSRC0_MPLL_SHIFT (4) | 68 | #define S5PC100_CLKSRC0_MPLL_SHIFT (4) |
| 68 | #define S5PC1XX_CLKSRC0_EPLL_MASK (0x1<<8) | 69 | #define S5PC100_CLKSRC0_EPLL_MASK (0x1<<8) |
| 69 | #define S5PC1XX_CLKSRC0_EPLL_SHIFT (8) | 70 | #define S5PC100_CLKSRC0_EPLL_SHIFT (8) |
| 70 | #define S5PC100_CLKSRC0_HPLL_MASK (0x1<<12) | 71 | #define S5PC100_CLKSRC0_HPLL_MASK (0x1<<12) |
| 71 | #define S5PC100_CLKSRC0_HPLL_SHIFT (12) | 72 | #define S5PC100_CLKSRC0_HPLL_SHIFT (12) |
| 72 | #define S5PC100_CLKSRC0_AMMUX_MASK (0x1<<16) | 73 | #define S5PC100_CLKSRC0_AMMUX_MASK (0x1<<16) |
| 73 | #define S5PC100_CLKSRC0_AMMUX_SHIFT (16) | 74 | #define S5PC100_CLKSRC0_AMMUX_SHIFT (16) |
| 74 | #define S5PC100_CLKSRC0_HREF_MASK (0x1<<20) | 75 | #define S5PC100_CLKSRC0_HREF_MASK (0x1<<20) |
| 75 | #define S5PC100_CLKSRC0_HREF_SHIFT (20) | 76 | #define S5PC100_CLKSRC0_HREF_SHIFT (20) |
| 76 | #define S5PC1XX_CLKSRC0_ONENAND_MASK (0x1<<24) | 77 | #define S5PC100_CLKSRC0_ONENAND_MASK (0x1<<24) |
| 77 | #define S5PC1XX_CLKSRC0_ONENAND_SHIFT (24) | 78 | #define S5PC100_CLKSRC0_ONENAND_SHIFT (24) |
| 78 | 79 | ||
| 79 | 80 | ||
| 80 | /* CLKSRC1 */ | 81 | /* CLKSRC1 */ |
| @@ -127,10 +128,9 @@ | |||
| 127 | #define S5PC100_CLKSRC3_SPDIF_MASK (0x3<<24) | 128 | #define S5PC100_CLKSRC3_SPDIF_MASK (0x3<<24) |
| 128 | #define S5PC100_CLKSRC3_SPDIF_SHIFT (24) | 129 | #define S5PC100_CLKSRC3_SPDIF_SHIFT (24) |
| 129 | 130 | ||
| 130 | |||
| 131 | /* CLKDIV0 */ | 131 | /* CLKDIV0 */ |
| 132 | #define S5PC1XX_CLKDIV0_APLL_MASK (0x1<<0) | 132 | #define S5PC100_CLKDIV0_APLL_MASK (0x1<<0) |
| 133 | #define S5PC1XX_CLKDIV0_APLL_SHIFT (0) | 133 | #define S5PC100_CLKDIV0_APLL_SHIFT (0) |
| 134 | #define S5PC100_CLKDIV0_ARM_MASK (0x7<<4) | 134 | #define S5PC100_CLKDIV0_ARM_MASK (0x7<<4) |
| 135 | #define S5PC100_CLKDIV0_ARM_SHIFT (4) | 135 | #define S5PC100_CLKDIV0_ARM_SHIFT (4) |
| 136 | #define S5PC100_CLKDIV0_D0_MASK (0x7<<8) | 136 | #define S5PC100_CLKDIV0_D0_MASK (0x7<<8) |
| @@ -141,8 +141,8 @@ | |||
| 141 | #define S5PC100_CLKDIV0_SECSS_SHIFT (16) | 141 | #define S5PC100_CLKDIV0_SECSS_SHIFT (16) |
| 142 | 142 | ||
| 143 | /* CLKDIV1 */ | 143 | /* CLKDIV1 */ |
| 144 | #define S5PC100_CLKDIV1_AM_MASK (0x7<<0) | 144 | #define S5PC100_CLKDIV1_APLL2_MASK (0x7<<0) |
| 145 | #define S5PC100_CLKDIV1_AM_SHIFT (0) | 145 | #define S5PC100_CLKDIV1_APLL2_SHIFT (0) |
| 146 | #define S5PC100_CLKDIV1_MPLL_MASK (0x3<<4) | 146 | #define S5PC100_CLKDIV1_MPLL_MASK (0x3<<4) |
| 147 | #define S5PC100_CLKDIV1_MPLL_SHIFT (4) | 147 | #define S5PC100_CLKDIV1_MPLL_SHIFT (4) |
| 148 | #define S5PC100_CLKDIV1_MPLL2_MASK (0x1<<8) | 148 | #define S5PC100_CLKDIV1_MPLL2_MASK (0x1<<8) |
| @@ -202,7 +202,6 @@ | |||
| 202 | #define S5PC100_CLKDIV4_AUDIO2_MASK (0xf<<20) | 202 | #define S5PC100_CLKDIV4_AUDIO2_MASK (0xf<<20) |
| 203 | #define S5PC100_CLKDIV4_AUDIO2_SHIFT (20) | 203 | #define S5PC100_CLKDIV4_AUDIO2_SHIFT (20) |
| 204 | 204 | ||
| 205 | |||
| 206 | /* HCLKD0/PCLKD0 Clock Gate 0 Registers */ | 205 | /* HCLKD0/PCLKD0 Clock Gate 0 Registers */ |
| 207 | #define S5PC100_CLKGATE_D00_INTC (1<<0) | 206 | #define S5PC100_CLKGATE_D00_INTC (1<<0) |
| 208 | #define S5PC100_CLKGATE_D00_TZIC (1<<1) | 207 | #define S5PC100_CLKGATE_D00_TZIC (1<<1) |
| @@ -295,8 +294,8 @@ | |||
| 295 | #define S5PC100_CLKGATE_D20_I2SD2 (1<<1) | 294 | #define S5PC100_CLKGATE_D20_I2SD2 (1<<1) |
| 296 | 295 | ||
| 297 | /* Special Clock Gate 0 Registers */ | 296 | /* Special Clock Gate 0 Registers */ |
| 298 | #define S5PC1XX_CLKGATE_SCLK0_HPM (1<<0) | 297 | #define S5PC100_CLKGATE_SCLK0_HPM (1<<0) |
| 299 | #define S5PC1XX_CLKGATE_SCLK0_PWI (1<<1) | 298 | #define S5PC100_CLKGATE_SCLK0_PWI (1<<1) |
| 300 | #define S5PC100_CLKGATE_SCLK0_ONENAND (1<<2) | 299 | #define S5PC100_CLKGATE_SCLK0_ONENAND (1<<2) |
| 301 | #define S5PC100_CLKGATE_SCLK0_UART (1<<3) | 300 | #define S5PC100_CLKGATE_SCLK0_UART (1<<3) |
| 302 | #define S5PC100_CLKGATE_SCLK0_SPI0 (1<<4) | 301 | #define S5PC100_CLKGATE_SCLK0_SPI0 (1<<4) |
| @@ -329,89 +328,28 @@ | |||
| 329 | #define S5PC100_CLKGATE_SCLK1_SPDIF (1<<11) | 328 | #define S5PC100_CLKGATE_SCLK1_SPDIF (1<<11) |
| 330 | #define S5PC100_CLKGATE_SCLK1_CAM (1<<12) | 329 | #define S5PC100_CLKGATE_SCLK1_CAM (1<<12) |
| 331 | 330 | ||
| 332 | /* register for power management */ | 331 | #define S5PC100_SWRESET S5PC100_CLKREG_OTHER(0x000) |
| 333 | #define S5PC100_PWR_CFG S5PC1XX_CLKREG(0x8000) | 332 | #define S5PC100_OND_SWRESET S5PC100_CLKREG_OTHER(0x008) |
| 334 | #define S5PC100_EINT_WAKEUP_MASK S5PC1XX_CLKREG(0x8004) | 333 | #define S5PC100_GEN_CTRL S5PC100_CLKREG_OTHER(0x100) |
| 335 | #define S5PC100_NORMAL_CFG S5PC1XX_CLKREG(0x8010) | 334 | #define S5PC100_GEN_STATUS S5PC100_CLKREG_OTHER(0x104) |
| 336 | #define S5PC100_STOP_CFG S5PC1XX_CLKREG(0x8014) | 335 | #define S5PC100_MEM_SYS_CFG S5PC100_CLKREG_OTHER(0x200) |
| 337 | #define S5PC100_SLEEP_CFG S5PC1XX_CLKREG(0x8018) | 336 | #define S5PC100_CAM_MUX_SEL S5PC100_CLKREG_OTHER(0x300) |
| 338 | #define S5PC100_STOP_MEM_CFG S5PC1XX_CLKREG(0x801C) | 337 | #define S5PC100_MIXER_OUT_SEL S5PC100_CLKREG_OTHER(0x304) |
| 339 | #define S5PC100_OSC_FREQ S5PC1XX_CLKREG(0x8100) | 338 | #define S5PC100_LPMP_MODE_SEL S5PC100_CLKREG_OTHER(0x308) |
| 340 | #define S5PC100_OSC_STABLE S5PC1XX_CLKREG(0x8104) | 339 | #define S5PC100_MIPI_PHY_CON0 S5PC100_CLKREG_OTHER(0x400) |
| 341 | #define S5PC100_PWR_STABLE S5PC1XX_CLKREG(0x8108) | 340 | #define S5PC100_MIPI_PHY_CON1 S5PC100_CLKREG_OTHER(0x414) |
| 342 | #define S5PC100_MTC_STABLE S5PC1XX_CLKREG(0x8110) | 341 | #define S5PC100_HDMI_PHY_CON0 S5PC100_CLKREG_OTHER(0x420) |
| 343 | #define S5PC100_CLAMP_STABLE S5PC1XX_CLKREG(0x8114) | 342 | |
| 344 | #define S5PC100_OTHERS S5PC1XX_CLKREG(0x8200) | 343 | #define S5PC100_SWRESET_RESETVAL 0xc100 |
| 345 | #define S5PC100_RST_STAT S5PC1XX_CLKREG(0x8300) | ||
| 346 | #define S5PC100_WAKEUP_STAT S5PC1XX_CLKREG(0x8304) | ||
| 347 | #define S5PC100_BLK_PWR_STAT S5PC1XX_CLKREG(0x8308) | ||
| 348 | #define S5PC100_INFORM0 S5PC1XX_CLKREG(0x8400) | ||
| 349 | #define S5PC100_INFORM1 S5PC1XX_CLKREG(0x8404) | ||
| 350 | #define S5PC100_INFORM2 S5PC1XX_CLKREG(0x8408) | ||
| 351 | #define S5PC100_INFORM3 S5PC1XX_CLKREG(0x840C) | ||
| 352 | #define S5PC100_INFORM4 S5PC1XX_CLKREG(0x8410) | ||
| 353 | #define S5PC100_INFORM5 S5PC1XX_CLKREG(0x8414) | ||
| 354 | #define S5PC100_INFORM6 S5PC1XX_CLKREG(0x8418) | ||
| 355 | #define S5PC100_INFORM7 S5PC1XX_CLKREG(0x841C) | ||
| 356 | #define S5PC100_DCGIDX_MAP0 S5PC1XX_CLKREG(0x8500) | ||
| 357 | #define S5PC100_DCGIDX_MAP1 S5PC1XX_CLKREG(0x8504) | ||
| 358 | #define S5PC100_DCGIDX_MAP2 S5PC1XX_CLKREG(0x8508) | ||
| 359 | #define S5PC100_DCGPERF_MAP0 S5PC1XX_CLKREG(0x850C) | ||
| 360 | #define S5PC100_DCGPERF_MAP1 S5PC1XX_CLKREG(0x8510) | ||
| 361 | #define S5PC100_DVCIDX_MAP S5PC1XX_CLKREG(0x8514) | ||
| 362 | #define S5PC100_FREQ_CPU S5PC1XX_CLKREG(0x8518) | ||
| 363 | #define S5PC100_FREQ_DPM S5PC1XX_CLKREG(0x851C) | ||
| 364 | #define S5PC100_DVSEMCLK_EN S5PC1XX_CLKREG(0x8520) | ||
| 365 | #define S5PC100_APLL_CON_L8 S5PC1XX_CLKREG(0x8600) | ||
| 366 | #define S5PC100_APLL_CON_L7 S5PC1XX_CLKREG(0x8604) | ||
| 367 | #define S5PC100_APLL_CON_L6 S5PC1XX_CLKREG(0x8608) | ||
| 368 | #define S5PC100_APLL_CON_L5 S5PC1XX_CLKREG(0x860C) | ||
| 369 | #define S5PC100_APLL_CON_L4 S5PC1XX_CLKREG(0x8610) | ||
| 370 | #define S5PC100_APLL_CON_L3 S5PC1XX_CLKREG(0x8614) | ||
| 371 | #define S5PC100_APLL_CON_L2 S5PC1XX_CLKREG(0x8618) | ||
| 372 | #define S5PC100_APLL_CON_L1 S5PC1XX_CLKREG(0x861C) | ||
| 373 | #define S5PC100_IEM_CONTROL S5PC1XX_CLKREG(0x8620) | ||
| 374 | #define S5PC100_CLKDIV_IEM_L8 S5PC1XX_CLKREG(0x8700) | ||
| 375 | #define S5PC100_CLKDIV_IEM_L7 S5PC1XX_CLKREG(0x8704) | ||
| 376 | #define S5PC100_CLKDIV_IEM_L6 S5PC1XX_CLKREG(0x8708) | ||
| 377 | #define S5PC100_CLKDIV_IEM_L5 S5PC1XX_CLKREG(0x870C) | ||
| 378 | #define S5PC100_CLKDIV_IEM_L4 S5PC1XX_CLKREG(0x8710) | ||
| 379 | #define S5PC100_CLKDIV_IEM_L3 S5PC1XX_CLKREG(0x8714) | ||
| 380 | #define S5PC100_CLKDIV_IEM_L2 S5PC1XX_CLKREG(0x8718) | ||
| 381 | #define S5PC100_CLKDIV_IEM_L1 S5PC1XX_CLKREG(0x871C) | ||
| 382 | #define S5PC100_IEM_HPMCLK_DIV S5PC1XX_CLKREG(0x8724) | ||
| 383 | |||
| 384 | #define S5PC100_SWRESET S5PC1XX_CLKREG(0x100000) | ||
| 385 | #define S5PC100_OND_SWRESET S5PC1XX_CLKREG(0x100008) | ||
| 386 | #define S5PC100_GEN_CTRL S5PC1XX_CLKREG(0x100100) | ||
| 387 | #define S5PC100_GEN_STATUS S5PC1XX_CLKREG(0x100104) | ||
| 388 | #define S5PC100_MEM_SYS_CFG S5PC1XX_CLKREG(0x100200) | ||
| 389 | #define S5PC100_CAM_MUX_SEL S5PC1XX_CLKREG(0x100300) | ||
| 390 | #define S5PC100_MIXER_OUT_SEL S5PC1XX_CLKREG(0x100304) | ||
| 391 | #define S5PC100_LPMP_MODE_SEL S5PC1XX_CLKREG(0x100308) | ||
| 392 | #define S5PC100_MIPI_PHY_CON0 S5PC1XX_CLKREG(0x100400) | ||
| 393 | #define S5PC100_MIPI_PHY_CON1 S5PC1XX_CLKREG(0x100414) | ||
| 394 | #define S5PC100_HDMI_PHY_CON0 S5PC1XX_CLKREG(0x100420) | ||
| 395 | |||
| 396 | #define S5PC100_CFG_WFI_CLEAN (~(3<<5)) | ||
| 397 | #define S5PC100_CFG_WFI_IDLE (1<<5) | ||
| 398 | #define S5PC100_CFG_WFI_STOP (2<<5) | ||
| 399 | #define S5PC100_CFG_WFI_SLEEP (3<<5) | ||
| 400 | |||
| 401 | #define S5PC100_OTHER_SYS_INT 24 | 344 | #define S5PC100_OTHER_SYS_INT 24 |
| 402 | #define S5PC100_OTHER_STA_TYPE 23 | 345 | #define S5PC100_OTHER_STA_TYPE 23 |
| 403 | #define STA_TYPE_EXPON 0 | 346 | #define STA_TYPE_EXPON 0 |
| 404 | #define STA_TYPE_SFR 1 | 347 | #define STA_TYPE_SFR 1 |
| 405 | 348 | ||
| 406 | #define S5PC100_PWR_STA_EXP_SCALE 0 | ||
| 407 | #define S5PC100_PWR_STA_CNT 4 | ||
| 408 | |||
| 409 | #define S5PC100_PWR_STABLE_COUNT 85500 | ||
| 410 | |||
| 411 | #define S5PC100_SLEEP_CFG_OSC_EN 0 | 349 | #define S5PC100_SLEEP_CFG_OSC_EN 0 |
| 412 | 350 | ||
| 413 | /* OTHERS Resgister */ | 351 | /* OTHERS Resgister */ |
| 414 | #define S5PC100_OTHERS_USB_SIG_MASK (1 << 16) | 352 | #define S5PC100_OTHERS_USB_SIG_MASK (1 << 16) |
| 415 | #define S5PC100_OTHERS_MIPI_DPHY_EN (1 << 28) | 353 | #define S5PC100_OTHERS_MIPI_DPHY_EN (1 << 28) |
| 416 | 354 | ||
| 417 | /* MIPI D-PHY Control Register 0 */ | 355 | /* MIPI D-PHY Control Register 0 */ |
diff --git a/arch/arm/plat-s5pc1xx/include/plat/regs-gpio.h b/arch/arm/plat-s5pc1xx/include/plat/regs-gpio.h new file mode 100644 index 00000000000..43c7bc8bf78 --- /dev/null +++ b/arch/arm/plat-s5pc1xx/include/plat/regs-gpio.h | |||
| @@ -0,0 +1,70 @@ | |||
| 1 | /* linux/arch/arm/plat-s5pc1xx/include/plat/regs-gpio.h | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics Co. | ||
| 4 | * Byungho Min <bhmin@samsung.com> | ||
| 5 | * | ||
| 6 | * S5PC1XX - GPIO register definitions | ||
| 7 | */ | ||
| 8 | |||
| 9 | #ifndef __ASM_PLAT_S5PC1XX_REGS_GPIO_H | ||
| 10 | #define __ASM_PLAT_S5PC1XX_REGS_GPIO_H __FILE__ | ||
| 11 | |||
| 12 | #include <mach/map.h> | ||
| 13 | |||
| 14 | /* S5PC100 */ | ||
| 15 | #define S5PC100_GPIO_BASE S5PC1XX_VA_GPIO | ||
| 16 | #define S5PC100_GPA0_BASE (S5PC100_GPIO_BASE + 0x0000) | ||
| 17 | #define S5PC100_GPA1_BASE (S5PC100_GPIO_BASE + 0x0020) | ||
| 18 | #define S5PC100_GPB_BASE (S5PC100_GPIO_BASE + 0x0040) | ||
| 19 | #define S5PC100_GPC_BASE (S5PC100_GPIO_BASE + 0x0060) | ||
| 20 | #define S5PC100_GPD_BASE (S5PC100_GPIO_BASE + 0x0080) | ||
| 21 | #define S5PC100_GPE0_BASE (S5PC100_GPIO_BASE + 0x00A0) | ||
| 22 | #define S5PC100_GPE1_BASE (S5PC100_GPIO_BASE + 0x00C0) | ||
| 23 | #define S5PC100_GPF0_BASE (S5PC100_GPIO_BASE + 0x00E0) | ||
| 24 | #define S5PC100_GPF1_BASE (S5PC100_GPIO_BASE + 0x0100) | ||
| 25 | #define S5PC100_GPF2_BASE (S5PC100_GPIO_BASE + 0x0120) | ||
| 26 | #define S5PC100_GPF3_BASE (S5PC100_GPIO_BASE + 0x0140) | ||
| 27 | #define S5PC100_GPG0_BASE (S5PC100_GPIO_BASE + 0x0160) | ||
| 28 | #define S5PC100_GPG1_BASE (S5PC100_GPIO_BASE + 0x0180) | ||
| 29 | #define S5PC100_GPG2_BASE (S5PC100_GPIO_BASE + 0x01A0) | ||
| 30 | #define S5PC100_GPG3_BASE (S5PC100_GPIO_BASE + 0x01C0) | ||
| 31 | #define S5PC100_GPH0_BASE (S5PC100_GPIO_BASE + 0x0C00) | ||
| 32 | #define S5PC100_GPH1_BASE (S5PC100_GPIO_BASE + 0x0C20) | ||
| 33 | #define S5PC100_GPH2_BASE (S5PC100_GPIO_BASE + 0x0C40) | ||
| 34 | #define S5PC100_GPH3_BASE (S5PC100_GPIO_BASE + 0x0C60) | ||
| 35 | #define S5PC100_GPI_BASE (S5PC100_GPIO_BASE + 0x01E0) | ||
| 36 | #define S5PC100_GPJ0_BASE (S5PC100_GPIO_BASE + 0x0200) | ||
| 37 | #define S5PC100_GPJ1_BASE (S5PC100_GPIO_BASE + 0x0220) | ||
| 38 | #define S5PC100_GPJ2_BASE (S5PC100_GPIO_BASE + 0x0240) | ||
| 39 | #define S5PC100_GPJ3_BASE (S5PC100_GPIO_BASE + 0x0260) | ||
| 40 | #define S5PC100_GPJ4_BASE (S5PC100_GPIO_BASE + 0x0280) | ||
| 41 | #define S5PC100_GPK0_BASE (S5PC100_GPIO_BASE + 0x02A0) | ||
| 42 | #define S5PC100_GPK1_BASE (S5PC100_GPIO_BASE + 0x02C0) | ||
| 43 | #define S5PC100_GPK2_BASE (S5PC100_GPIO_BASE + 0x02E0) | ||
| 44 | #define S5PC100_GPK3_BASE (S5PC100_GPIO_BASE + 0x0300) | ||
| 45 | #define S5PC100_GPL0_BASE (S5PC100_GPIO_BASE + 0x0320) | ||
| 46 | #define S5PC100_GPL1_BASE (S5PC100_GPIO_BASE + 0x0340) | ||
| 47 | #define S5PC100_GPL2_BASE (S5PC100_GPIO_BASE + 0x0360) | ||
| 48 | #define S5PC100_GPL3_BASE (S5PC100_GPIO_BASE + 0x0380) | ||
| 49 | #define S5PC100_GPL4_BASE (S5PC100_GPIO_BASE + 0x03A0) | ||
| 50 | #define S5PC100_EINT_BASE (S5PC100_GPIO_BASE + 0x0E00) | ||
| 51 | |||
| 52 | #define S5PC100_UHOST (S5PC100_GPIO_BASE + 0x0B68) | ||
| 53 | #define S5PC100_PDNEN (S5PC100_GPIO_BASE + 0x0F80) | ||
| 54 | |||
| 55 | /* PDNEN */ | ||
| 56 | #define S5PC100_PDNEN_CFG_PDNEN (1 << 1) | ||
| 57 | #define S5PC100_PDNEN_CFG_AUTO (0 << 1) | ||
| 58 | #define S5PC100_PDNEN_POWERDOWN (1 << 0) | ||
| 59 | #define S5PC100_PDNEN_NORMAL (0 << 0) | ||
| 60 | |||
| 61 | /* Common part */ | ||
| 62 | /* External interrupt base is same at both s5pc100 and s5pc110 */ | ||
| 63 | #define S5PC1XX_EINT_BASE (S5PC100_EINT_BASE) | ||
| 64 | |||
| 65 | #define S5PC100_GPx_INPUT(__gpio) (0x0 << ((__gpio) * 4)) | ||
| 66 | #define S5PC100_GPx_OUTPUT(__gpio) (0x1 << ((__gpio) * 4)) | ||
| 67 | #define S5PC100_GPx_CONMASK(__gpio) (0xf << ((__gpio) * 4)) | ||
| 68 | |||
| 69 | #endif /* __ASM_PLAT_S5PC1XX_REGS_GPIO_H */ | ||
| 70 | |||
diff --git a/arch/arm/plat-s5pc1xx/include/plat/regs-power.h b/arch/arm/plat-s5pc1xx/include/plat/regs-power.h new file mode 100644 index 00000000000..02ffa491b53 --- /dev/null +++ b/arch/arm/plat-s5pc1xx/include/plat/regs-power.h | |||
| @@ -0,0 +1,84 @@ | |||
| 1 | /* arch/arm/plat-s5pc1xx/include/plat/regs-clock.h | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics Co. | ||
| 4 | * Jongse Won <jongse.won@samsung.com> | ||
| 5 | * | ||
| 6 | * S5PC1XX clock register definitions | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #ifndef __ASM_ARM_REGS_PWR | ||
| 14 | #define __ASM_ARM_REGS_PWR __FILE__ | ||
| 15 | |||
| 16 | #define S5PC1XX_PWRREG(x) (S5PC1XX_VA_PWR + (x)) | ||
| 17 | |||
| 18 | /* s5pc100 (0xE0108000) register for power management */ | ||
| 19 | #define S5PC100_PWR_CFG S5PC1XX_PWRREG(0x0) | ||
| 20 | #define S5PC100_EINT_WAKEUP_MASK S5PC1XX_PWRREG(0x4) | ||
| 21 | #define S5PC100_NORMAL_CFG S5PC1XX_PWRREG(0x10) | ||
| 22 | #define S5PC100_STOP_CFG S5PC1XX_PWRREG(0x14) | ||
| 23 | #define S5PC100_SLEEP_CFG S5PC1XX_PWRREG(0x18) | ||
| 24 | #define S5PC100_STOP_MEM_CFG S5PC1XX_PWRREG(0x1C) | ||
| 25 | #define S5PC100_OSC_FREQ S5PC1XX_PWRREG(0x100) | ||
| 26 | #define S5PC100_OSC_STABLE S5PC1XX_PWRREG(0x104) | ||
| 27 | #define S5PC100_PWR_STABLE S5PC1XX_PWRREG(0x108) | ||
| 28 | #define S5PC100_MTC_STABLE S5PC1XX_PWRREG(0x110) | ||
| 29 | #define S5PC100_CLAMP_STABLE S5PC1XX_PWRREG(0x114) | ||
| 30 | #define S5PC100_OTHERS S5PC1XX_PWRREG(0x200) | ||
| 31 | #define S5PC100_RST_STAT S5PC1XX_PWRREG(0x300) | ||
| 32 | #define S5PC100_WAKEUP_STAT S5PC1XX_PWRREG(0x304) | ||
| 33 | #define S5PC100_BLK_PWR_STAT S5PC1XX_PWRREG(0x308) | ||
| 34 | #define S5PC100_INFORM0 S5PC1XX_PWRREG(0x400) | ||
| 35 | #define S5PC100_INFORM1 S5PC1XX_PWRREG(0x404) | ||
| 36 | #define S5PC100_INFORM2 S5PC1XX_PWRREG(0x408) | ||
| 37 | #define S5PC100_INFORM3 S5PC1XX_PWRREG(0x40C) | ||
| 38 | #define S5PC100_INFORM4 S5PC1XX_PWRREG(0x410) | ||
| 39 | #define S5PC100_INFORM5 S5PC1XX_PWRREG(0x414) | ||
| 40 | #define S5PC100_INFORM6 S5PC1XX_PWRREG(0x418) | ||
| 41 | #define S5PC100_INFORM7 S5PC1XX_PWRREG(0x41C) | ||
| 42 | #define S5PC100_DCGIDX_MAP0 S5PC1XX_PWRREG(0x500) | ||
| 43 | #define S5PC100_DCGIDX_MAP1 S5PC1XX_PWRREG(0x504) | ||
| 44 | #define S5PC100_DCGIDX_MAP2 S5PC1XX_PWRREG(0x508) | ||
| 45 | #define S5PC100_DCGPERF_MAP0 S5PC1XX_PWRREG(0x50C) | ||
| 46 | #define S5PC100_DCGPERF_MAP1 S5PC1XX_PWRREG(0x510) | ||
| 47 | #define S5PC100_DVCIDX_MAP S5PC1XX_PWRREG(0x514) | ||
| 48 | #define S5PC100_FREQ_CPU S5PC1XX_PWRREG(0x518) | ||
| 49 | #define S5PC100_FREQ_DPM S5PC1XX_PWRREG(0x51C) | ||
| 50 | #define S5PC100_DVSEMCLK_EN S5PC1XX_PWRREG(0x520) | ||
| 51 | #define S5PC100_APLL_CON_L8 S5PC1XX_PWRREG(0x600) | ||
| 52 | #define S5PC100_APLL_CON_L7 S5PC1XX_PWRREG(0x604) | ||
| 53 | #define S5PC100_APLL_CON_L6 S5PC1XX_PWRREG(0x608) | ||
| 54 | #define S5PC100_APLL_CON_L5 S5PC1XX_PWRREG(0x60C) | ||
| 55 | #define S5PC100_APLL_CON_L4 S5PC1XX_PWRREG(0x610) | ||
| 56 | #define S5PC100_APLL_CON_L3 S5PC1XX_PWRREG(0x614) | ||
| 57 | #define S5PC100_APLL_CON_L2 S5PC1XX_PWRREG(0x618) | ||
| 58 | #define S5PC100_APLL_CON_L1 S5PC1XX_PWRREG(0x61C) | ||
| 59 | #define S5PC100_IEM_CONTROL S5PC1XX_PWRREG(0x620) | ||
| 60 | #define S5PC100_CLKDIV_IEM_L8 S5PC1XX_PWRREG(0x700) | ||
| 61 | #define S5PC100_CLKDIV_IEM_L7 S5PC1XX_PWRREG(0x704) | ||
| 62 | #define S5PC100_CLKDIV_IEM_L6 S5PC1XX_PWRREG(0x708) | ||
| 63 | #define S5PC100_CLKDIV_IEM_L5 S5PC1XX_PWRREG(0x70C) | ||
| 64 | #define S5PC100_CLKDIV_IEM_L4 S5PC1XX_PWRREG(0x710) | ||
| 65 | #define S5PC100_CLKDIV_IEM_L3 S5PC1XX_PWRREG(0x714) | ||
| 66 | #define S5PC100_CLKDIV_IEM_L2 S5PC1XX_PWRREG(0x718) | ||
| 67 | #define S5PC100_CLKDIV_IEM_L1 S5PC1XX_PWRREG(0x71C) | ||
| 68 | #define S5PC100_IEM_HPMCLK_DIV S5PC1XX_PWRREG(0x724) | ||
| 69 | |||
| 70 | /* PWR_CFG */ | ||
| 71 | #define S5PC100_PWRCFG_CFG_DEEP_IDLE (1 << 31) | ||
| 72 | #define S5PC100_PWRCFG_CFG_WFI_MASK (3 << 5) | ||
| 73 | #define S5PC100_PWRCFG_CFG_WFI_IDLE (0 << 5) | ||
| 74 | #define S5PC100_PWRCFG_CFG_WFI_DEEP_IDLE (1 << 5) | ||
| 75 | #define S5PC100_PWRCFG_CFG_WFI_STOP (2 << 5) | ||
| 76 | #define S5PC100_PWRCFG_CFG_WFI_SLEEP (3 << 5) | ||
| 77 | |||
| 78 | /* SLEEP_CFG */ | ||
| 79 | #define S5PC100_SLEEP_OSC_EN_SLEEP (1 << 0) | ||
| 80 | |||
| 81 | /* OTHERS */ | ||
| 82 | #define S5PC100_PMU_INT_DISABLE (1 << 24) | ||
| 83 | |||
| 84 | #endif /* __ASM_ARM_REGS_PWR */ | ||
diff --git a/arch/arm/plat-s5pc1xx/include/plat/s5pc100.h b/arch/arm/plat-s5pc1xx/include/plat/s5pc100.h index 45e27513166..2531f34a56f 100644 --- a/arch/arm/plat-s5pc1xx/include/plat/s5pc100.h +++ b/arch/arm/plat-s5pc1xx/include/plat/s5pc100.h | |||
| @@ -35,10 +35,9 @@ extern struct clk clk_hpll; | |||
| 35 | extern struct clk clk_hd0; | 35 | extern struct clk clk_hd0; |
| 36 | extern struct clk clk_pd0; | 36 | extern struct clk clk_pd0; |
| 37 | extern struct clk clk_54m; | 37 | extern struct clk clk_54m; |
| 38 | extern struct clk clk_dout_mpll2; | ||
| 39 | extern void s5pc1xx_register_clocks(void); | 38 | extern void s5pc1xx_register_clocks(void); |
| 40 | extern int s5pc1xx_sclk0_ctrl(struct clk *clk, int enable); | 39 | extern int s5pc100_sclk0_ctrl(struct clk *clk, int enable); |
| 41 | extern int s5pc1xx_sclk1_ctrl(struct clk *clk, int enable); | 40 | extern int s5pc100_sclk1_ctrl(struct clk *clk, int enable); |
| 42 | 41 | ||
| 43 | /* Some day, belows will be moved to plat-s5pc/include/plat/devs.h */ | 42 | /* Some day, belows will be moved to plat-s5pc/include/plat/devs.h */ |
| 44 | extern struct s3c24xx_uart_resources s5pc1xx_uart_resources[]; | 43 | extern struct s3c24xx_uart_resources s5pc1xx_uart_resources[]; |
diff --git a/arch/arm/plat-s5pc1xx/irq-eint.c b/arch/arm/plat-s5pc1xx/irq-eint.c new file mode 100644 index 00000000000..373122f57d5 --- /dev/null +++ b/arch/arm/plat-s5pc1xx/irq-eint.c | |||
| @@ -0,0 +1,281 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/plat-s5pc1xx/irq-eint.c | ||
| 3 | * | ||
| 4 | * Copyright 2009 Samsung Electronics Co. | ||
| 5 | * Byungho Min <bhmin@samsung.com> | ||
| 6 | * Kyungin Park <kyungmin.park@samsung.com> | ||
| 7 | * | ||
| 8 | * Based on plat-s3c64xx/irq-eint.c | ||
| 9 | * | ||
| 10 | * S5PC1XX - Interrupt handling for IRQ_EINT(x) | ||
| 11 | * | ||
| 12 | * This program is free software; you can redistribute it and/or modify | ||
| 13 | * it under the terms of the GNU General Public License version 2 as | ||
| 14 | * published by the Free Software Foundation. | ||
| 15 | */ | ||
| 16 | |||
| 17 | #include <linux/kernel.h> | ||
| 18 | #include <linux/interrupt.h> | ||
| 19 | #include <linux/irq.h> | ||
| 20 | #include <linux/io.h> | ||
| 21 | #include <linux/sysdev.h> | ||
| 22 | #include <linux/pm.h> | ||
| 23 | #include <linux/gpio.h> | ||
| 24 | |||
| 25 | #include <asm/hardware/vic.h> | ||
| 26 | |||
| 27 | #include <mach/map.h> | ||
| 28 | |||
| 29 | #include <plat/gpio-cfg.h> | ||
| 30 | #include <plat/gpio-ext.h> | ||
| 31 | #include <plat/pm.h> | ||
| 32 | #include <plat/regs-gpio.h> | ||
| 33 | #include <plat/regs-irqtype.h> | ||
| 34 | |||
| 35 | /* | ||
| 36 | * bank is a group of external interrupt | ||
| 37 | * bank0 means EINT0 ... EINT7 | ||
| 38 | * bank1 means EINT8 ... EINT15 | ||
| 39 | * bank2 means EINT16 ... EINT23 | ||
| 40 | * bank3 means EINT24 ... EINT31 | ||
| 41 | */ | ||
| 42 | |||
| 43 | static inline int s3c_get_eint(unsigned int irq) | ||
| 44 | { | ||
| 45 | int real; | ||
| 46 | |||
| 47 | if (irq < IRQ_EINT16_31) | ||
| 48 | real = (irq - IRQ_EINT0); | ||
| 49 | else | ||
| 50 | real = (irq - S3C_IRQ_EINT_BASE) + IRQ_EINT16_31 - IRQ_EINT0; | ||
| 51 | |||
| 52 | return real; | ||
| 53 | } | ||
| 54 | |||
| 55 | static inline int s3c_get_bank(unsigned int irq) | ||
| 56 | { | ||
| 57 | return s3c_get_eint(irq) >> 3; | ||
| 58 | } | ||
| 59 | |||
| 60 | static inline int s3c_eint_to_bit(unsigned int irq) | ||
| 61 | { | ||
| 62 | int real, bit; | ||
| 63 | |||
| 64 | real = s3c_get_eint(irq); | ||
| 65 | bit = 1 << (real & (8 - 1)); | ||
| 66 | |||
| 67 | return bit; | ||
| 68 | } | ||
| 69 | |||
| 70 | static inline void s3c_irq_eint_mask(unsigned int irq) | ||
| 71 | { | ||
| 72 | u32 mask; | ||
| 73 | u32 bank = s3c_get_bank(irq); | ||
| 74 | |||
| 75 | mask = __raw_readl(S5PC1XX_WKUP_INT_MASK(bank)); | ||
| 76 | mask |= s3c_eint_to_bit(irq); | ||
| 77 | __raw_writel(mask, S5PC1XX_WKUP_INT_MASK(bank)); | ||
| 78 | } | ||
| 79 | |||
| 80 | static void s3c_irq_eint_unmask(unsigned int irq) | ||
| 81 | { | ||
| 82 | u32 mask; | ||
| 83 | u32 bank = s3c_get_bank(irq); | ||
| 84 | |||
| 85 | mask = __raw_readl(S5PC1XX_WKUP_INT_MASK(bank)); | ||
| 86 | mask &= ~(s3c_eint_to_bit(irq)); | ||
| 87 | __raw_writel(mask, S5PC1XX_WKUP_INT_MASK(bank)); | ||
| 88 | } | ||
| 89 | |||
| 90 | static inline void s3c_irq_eint_ack(unsigned int irq) | ||
| 91 | { | ||
| 92 | u32 bank = s3c_get_bank(irq); | ||
| 93 | |||
| 94 | __raw_writel(s3c_eint_to_bit(irq), S5PC1XX_WKUP_INT_PEND(bank)); | ||
| 95 | } | ||
| 96 | |||
| 97 | static void s3c_irq_eint_maskack(unsigned int irq) | ||
| 98 | { | ||
| 99 | /* compiler should in-line these */ | ||
| 100 | s3c_irq_eint_mask(irq); | ||
| 101 | s3c_irq_eint_ack(irq); | ||
| 102 | } | ||
| 103 | |||
| 104 | static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type) | ||
| 105 | { | ||
| 106 | u32 bank = s3c_get_bank(irq); | ||
| 107 | int real = s3c_get_eint(irq); | ||
| 108 | int gpio, shift, sfn; | ||
| 109 | u32 ctrl, con = 0; | ||
| 110 | |||
| 111 | switch (type) { | ||
| 112 | case IRQ_TYPE_NONE: | ||
| 113 | printk(KERN_WARNING "No edge setting!\n"); | ||
| 114 | break; | ||
| 115 | |||
| 116 | case IRQ_TYPE_EDGE_RISING: | ||
| 117 | con = S5PC1XX_WKUP_INT_RISEEDGE; | ||
| 118 | break; | ||
| 119 | |||
| 120 | case IRQ_TYPE_EDGE_FALLING: | ||
| 121 | con = S5PC1XX_WKUP_INT_FALLEDGE; | ||
| 122 | break; | ||
| 123 | |||
| 124 | case IRQ_TYPE_EDGE_BOTH: | ||
| 125 | con = S5PC1XX_WKUP_INT_BOTHEDGE; | ||
| 126 | break; | ||
| 127 | |||
| 128 | case IRQ_TYPE_LEVEL_LOW: | ||
| 129 | con = S5PC1XX_WKUP_INT_LOWLEV; | ||
| 130 | break; | ||
| 131 | |||
| 132 | case IRQ_TYPE_LEVEL_HIGH: | ||
| 133 | con = S5PC1XX_WKUP_INT_HILEV; | ||
| 134 | break; | ||
| 135 | |||
| 136 | default: | ||
| 137 | printk(KERN_ERR "No such irq type %d", type); | ||
| 138 | return -EINVAL; | ||
| 139 | } | ||
| 140 | |||
| 141 | gpio = real & (8 - 1); | ||
| 142 | shift = gpio << 2; | ||
| 143 | |||
| 144 | ctrl = __raw_readl(S5PC1XX_WKUP_INT_CON(bank)); | ||
| 145 | ctrl &= ~(0x7 << shift); | ||
| 146 | ctrl |= con << shift; | ||
| 147 | __raw_writel(ctrl, S5PC1XX_WKUP_INT_CON(bank)); | ||
| 148 | |||
| 149 | switch (real) { | ||
| 150 | case 0 ... 7: | ||
| 151 | gpio = S5PC100_GPH0(gpio); | ||
| 152 | break; | ||
| 153 | case 8 ... 15: | ||
| 154 | gpio = S5PC100_GPH1(gpio); | ||
| 155 | break; | ||
| 156 | case 16 ... 23: | ||
| 157 | gpio = S5PC100_GPH2(gpio); | ||
| 158 | break; | ||
| 159 | case 24 ... 31: | ||
| 160 | gpio = S5PC100_GPH3(gpio); | ||
| 161 | break; | ||
| 162 | default: | ||
| 163 | return -EINVAL; | ||
| 164 | } | ||
| 165 | |||
| 166 | sfn = S3C_GPIO_SFN(0x2); | ||
| 167 | s3c_gpio_cfgpin(gpio, sfn); | ||
| 168 | |||
| 169 | return 0; | ||
| 170 | } | ||
| 171 | |||
| 172 | static struct irq_chip s3c_irq_eint = { | ||
| 173 | .name = "EINT", | ||
| 174 | .mask = s3c_irq_eint_mask, | ||
| 175 | .unmask = s3c_irq_eint_unmask, | ||
| 176 | .mask_ack = s3c_irq_eint_maskack, | ||
| 177 | .ack = s3c_irq_eint_ack, | ||
| 178 | .set_type = s3c_irq_eint_set_type, | ||
| 179 | .set_wake = s3c_irqext_wake, | ||
| 180 | }; | ||
| 181 | |||
| 182 | /* s3c_irq_demux_eint | ||
| 183 | * | ||
| 184 | * This function demuxes the IRQ from external interrupts, | ||
| 185 | * from IRQ_EINT(16) to IRQ_EINT(31). It is designed to be inlined into | ||
| 186 | * the specific handlers s3c_irq_demux_eintX_Y. | ||
| 187 | */ | ||
| 188 | static inline void s3c_irq_demux_eint(unsigned int start, unsigned int end) | ||
| 189 | { | ||
| 190 | u32 status = __raw_readl(S5PC1XX_WKUP_INT_PEND((start >> 3))); | ||
| 191 | u32 mask = __raw_readl(S5PC1XX_WKUP_INT_MASK((start >> 3))); | ||
| 192 | unsigned int irq; | ||
| 193 | |||
| 194 | status &= ~mask; | ||
| 195 | status &= (1 << (end - start + 1)) - 1; | ||
| 196 | |||
| 197 | for (irq = IRQ_EINT(start); irq <= IRQ_EINT(end); irq++) { | ||
| 198 | if (status & 1) | ||
| 199 | generic_handle_irq(irq); | ||
| 200 | |||
| 201 | status >>= 1; | ||
| 202 | } | ||
| 203 | } | ||
| 204 | |||
| 205 | static void s3c_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc) | ||
| 206 | { | ||
| 207 | s3c_irq_demux_eint(16, 23); | ||
| 208 | s3c_irq_demux_eint(24, 31); | ||
| 209 | } | ||
| 210 | |||
| 211 | /* | ||
| 212 | * Handle EINT0 ... EINT15 at VIC directly | ||
| 213 | */ | ||
| 214 | static void s3c_irq_vic_eint_mask(unsigned int irq) | ||
| 215 | { | ||
| 216 | void __iomem *base = get_irq_chip_data(irq); | ||
| 217 | unsigned int real; | ||
| 218 | |||
| 219 | s3c_irq_eint_mask(irq); | ||
| 220 | real = s3c_get_eint(irq); | ||
| 221 | writel(1 << real, base + VIC_INT_ENABLE_CLEAR); | ||
| 222 | } | ||
| 223 | |||
| 224 | static void s3c_irq_vic_eint_unmask(unsigned int irq) | ||
| 225 | { | ||
| 226 | void __iomem *base = get_irq_chip_data(irq); | ||
| 227 | unsigned int real; | ||
| 228 | |||
| 229 | s3c_irq_eint_unmask(irq); | ||
| 230 | real = s3c_get_eint(irq); | ||
| 231 | writel(1 << real, base + VIC_INT_ENABLE); | ||
| 232 | } | ||
| 233 | |||
| 234 | static inline void s3c_irq_vic_eint_ack(unsigned int irq) | ||
| 235 | { | ||
| 236 | u32 bit; | ||
| 237 | u32 bank = s3c_get_bank(irq); | ||
| 238 | |||
| 239 | bit = s3c_eint_to_bit(irq); | ||
| 240 | __raw_writel(bit, S5PC1XX_WKUP_INT_PEND(bank)); | ||
| 241 | } | ||
| 242 | |||
| 243 | static void s3c_irq_vic_eint_maskack(unsigned int irq) | ||
| 244 | { | ||
| 245 | /* compiler should in-line these */ | ||
| 246 | s3c_irq_vic_eint_mask(irq); | ||
| 247 | s3c_irq_vic_eint_ack(irq); | ||
| 248 | } | ||
| 249 | |||
| 250 | static struct irq_chip s3c_irq_vic_eint = { | ||
| 251 | .name = "EINT", | ||
| 252 | .mask = s3c_irq_vic_eint_mask, | ||
| 253 | .unmask = s3c_irq_vic_eint_unmask, | ||
| 254 | .mask_ack = s3c_irq_vic_eint_maskack, | ||
| 255 | .ack = s3c_irq_vic_eint_ack, | ||
| 256 | .set_type = s3c_irq_eint_set_type, | ||
| 257 | .set_wake = s3c_irqext_wake, | ||
| 258 | }; | ||
| 259 | |||
| 260 | static int __init s5pc1xx_init_irq_eint(void) | ||
| 261 | { | ||
| 262 | int irq; | ||
| 263 | |||
| 264 | for (irq = IRQ_EINT0; irq <= IRQ_EINT15; irq++) { | ||
| 265 | set_irq_chip(irq, &s3c_irq_vic_eint); | ||
| 266 | set_irq_handler(irq, handle_level_irq); | ||
| 267 | set_irq_flags(irq, IRQF_VALID); | ||
| 268 | } | ||
| 269 | |||
| 270 | for (irq = IRQ_EINT(16); irq <= IRQ_EINT(31); irq++) { | ||
| 271 | set_irq_chip(irq, &s3c_irq_eint); | ||
| 272 | set_irq_handler(irq, handle_level_irq); | ||
| 273 | set_irq_flags(irq, IRQF_VALID); | ||
| 274 | } | ||
| 275 | |||
| 276 | set_irq_chained_handler(IRQ_EINT16_31, s3c_irq_demux_eint16_31); | ||
| 277 | |||
| 278 | return 0; | ||
| 279 | } | ||
| 280 | |||
| 281 | arch_initcall(s5pc1xx_init_irq_eint); | ||
diff --git a/arch/arm/plat-s5pc1xx/irq-gpio.c b/arch/arm/plat-s5pc1xx/irq-gpio.c new file mode 100644 index 00000000000..fecca7a679b --- /dev/null +++ b/arch/arm/plat-s5pc1xx/irq-gpio.c | |||
| @@ -0,0 +1,266 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/plat-s5pc1xx/irq-gpio.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009 Samsung Electronics | ||
| 5 | * | ||
| 6 | * S5PC1XX - Interrupt handling for IRQ_GPIO${group}(x) | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/kernel.h> | ||
| 14 | #include <linux/interrupt.h> | ||
| 15 | #include <linux/irq.h> | ||
| 16 | #include <linux/io.h> | ||
| 17 | #include <linux/gpio.h> | ||
| 18 | |||
| 19 | #include <mach/map.h> | ||
| 20 | #include <plat/gpio-cfg.h> | ||
| 21 | |||
| 22 | #define S5PC1XX_GPIOREG(x) (S5PC1XX_VA_GPIO + (x)) | ||
| 23 | |||
| 24 | #define CON_OFFSET 0x700 | ||
| 25 | #define MASK_OFFSET 0x900 | ||
| 26 | #define PEND_OFFSET 0xA00 | ||
| 27 | #define CON_OFFSET_2 0xE00 | ||
| 28 | #define MASK_OFFSET_2 0xF00 | ||
| 29 | #define PEND_OFFSET_2 0xF40 | ||
| 30 | |||
| 31 | #define GPIOINT_LEVEL_LOW 0x0 | ||
| 32 | #define GPIOINT_LEVEL_HIGH 0x1 | ||
| 33 | #define GPIOINT_EDGE_FALLING 0x2 | ||
| 34 | #define GPIOINT_EDGE_RISING 0x3 | ||
| 35 | #define GPIOINT_EDGE_BOTH 0x4 | ||
| 36 | |||
| 37 | static int group_to_con_offset(int group) | ||
| 38 | { | ||
| 39 | return group << 2; | ||
| 40 | } | ||
| 41 | |||
| 42 | static int group_to_mask_offset(int group) | ||
| 43 | { | ||
| 44 | return group << 2; | ||
| 45 | } | ||
| 46 | |||
| 47 | static int group_to_pend_offset(int group) | ||
| 48 | { | ||
| 49 | return group << 2; | ||
| 50 | } | ||
| 51 | |||
| 52 | static int s5pc1xx_get_start(unsigned int group) | ||
| 53 | { | ||
| 54 | switch (group) { | ||
| 55 | case 0: return S5PC100_GPIO_A0_START; | ||
| 56 | case 1: return S5PC100_GPIO_A1_START; | ||
| 57 | case 2: return S5PC100_GPIO_B_START; | ||
| 58 | case 3: return S5PC100_GPIO_C_START; | ||
| 59 | case 4: return S5PC100_GPIO_D_START; | ||
| 60 | case 5: return S5PC100_GPIO_E0_START; | ||
| 61 | case 6: return S5PC100_GPIO_E1_START; | ||
| 62 | case 7: return S5PC100_GPIO_F0_START; | ||
| 63 | case 8: return S5PC100_GPIO_F1_START; | ||
| 64 | case 9: return S5PC100_GPIO_F2_START; | ||
| 65 | case 10: return S5PC100_GPIO_F3_START; | ||
| 66 | case 11: return S5PC100_GPIO_G0_START; | ||
| 67 | case 12: return S5PC100_GPIO_G1_START; | ||
| 68 | case 13: return S5PC100_GPIO_G2_START; | ||
| 69 | case 14: return S5PC100_GPIO_G3_START; | ||
| 70 | case 15: return S5PC100_GPIO_I_START; | ||
| 71 | case 16: return S5PC100_GPIO_J0_START; | ||
| 72 | case 17: return S5PC100_GPIO_J1_START; | ||
| 73 | case 18: return S5PC100_GPIO_J2_START; | ||
| 74 | case 19: return S5PC100_GPIO_J3_START; | ||
| 75 | case 20: return S5PC100_GPIO_J4_START; | ||
| 76 | default: | ||
| 77 | BUG(); | ||
| 78 | } | ||
| 79 | |||
| 80 | return -EINVAL; | ||
| 81 | } | ||
| 82 | |||
| 83 | static int s5pc1xx_get_group(unsigned int irq) | ||
| 84 | { | ||
| 85 | irq -= S3C_IRQ_GPIO(0); | ||
| 86 | |||
| 87 | switch (irq) { | ||
| 88 | case S5PC100_GPIO_A0_START ... S5PC100_GPIO_A1_START - 1: | ||
| 89 | return 0; | ||
| 90 | case S5PC100_GPIO_A1_START ... S5PC100_GPIO_B_START - 1: | ||
| 91 | return 1; | ||
| 92 | case S5PC100_GPIO_B_START ... S5PC100_GPIO_C_START - 1: | ||
| 93 | return 2; | ||
| 94 | case S5PC100_GPIO_C_START ... S5PC100_GPIO_D_START - 1: | ||
| 95 | return 3; | ||
| 96 | case S5PC100_GPIO_D_START ... S5PC100_GPIO_E0_START - 1: | ||
| 97 | return 4; | ||
| 98 | case S5PC100_GPIO_E0_START ... S5PC100_GPIO_E1_START - 1: | ||
| 99 | return 5; | ||
| 100 | case S5PC100_GPIO_E1_START ... S5PC100_GPIO_F0_START - 1: | ||
| 101 | return 6; | ||
| 102 | case S5PC100_GPIO_F0_START ... S5PC100_GPIO_F1_START - 1: | ||
| 103 | return 7; | ||
| 104 | case S5PC100_GPIO_F1_START ... S5PC100_GPIO_F2_START - 1: | ||
| 105 | return 8; | ||
| 106 | case S5PC100_GPIO_F2_START ... S5PC100_GPIO_F3_START - 1: | ||
| 107 | return 9; | ||
| 108 | case S5PC100_GPIO_F3_START ... S5PC100_GPIO_G0_START - 1: | ||
| 109 | return 10; | ||
| 110 | case S5PC100_GPIO_G0_START ... S5PC100_GPIO_G1_START - 1: | ||
| 111 | return 11; | ||
| 112 | case S5PC100_GPIO_G1_START ... S5PC100_GPIO_G2_START - 1: | ||
| 113 | return 12; | ||
| 114 | case S5PC100_GPIO_G2_START ... S5PC100_GPIO_G3_START - 1: | ||
| 115 | return 13; | ||
| 116 | case S5PC100_GPIO_G3_START ... S5PC100_GPIO_H0_START - 1: | ||
| 117 | return 14; | ||
| 118 | case S5PC100_GPIO_I_START ... S5PC100_GPIO_J0_START - 1: | ||
| 119 | return 15; | ||
| 120 | case S5PC100_GPIO_J0_START ... S5PC100_GPIO_J1_START - 1: | ||
| 121 | return 16; | ||
| 122 | case S5PC100_GPIO_J1_START ... S5PC100_GPIO_J2_START - 1: | ||
| 123 | return 17; | ||
| 124 | case S5PC100_GPIO_J2_START ... S5PC100_GPIO_J3_START - 1: | ||
| 125 | return 18; | ||
| 126 | case S5PC100_GPIO_J3_START ... S5PC100_GPIO_J4_START - 1: | ||
| 127 | return 19; | ||
| 128 | case S5PC100_GPIO_J4_START ... S5PC100_GPIO_K0_START - 1: | ||
| 129 | return 20; | ||
| 130 | default: | ||
| 131 | BUG(); | ||
| 132 | } | ||
| 133 | |||
| 134 | return -EINVAL; | ||
| 135 | } | ||
| 136 | |||
| 137 | static int s5pc1xx_get_offset(unsigned int irq) | ||
| 138 | { | ||
| 139 | struct gpio_chip *chip = get_irq_data(irq); | ||
| 140 | return irq - S3C_IRQ_GPIO(chip->base); | ||
| 141 | } | ||
| 142 | |||
| 143 | static void s5pc1xx_gpioint_ack(unsigned int irq) | ||
| 144 | { | ||
| 145 | int group, offset, pend_offset; | ||
| 146 | unsigned int value; | ||
| 147 | |||
| 148 | group = s5pc1xx_get_group(irq); | ||
| 149 | offset = s5pc1xx_get_offset(irq); | ||
| 150 | pend_offset = group_to_pend_offset(group); | ||
| 151 | |||
| 152 | value = __raw_readl(S5PC1XX_GPIOREG(PEND_OFFSET) + pend_offset); | ||
| 153 | value |= 1 << offset; | ||
| 154 | __raw_writel(value, S5PC1XX_GPIOREG(PEND_OFFSET) + pend_offset); | ||
| 155 | } | ||
| 156 | |||
| 157 | static void s5pc1xx_gpioint_mask(unsigned int irq) | ||
| 158 | { | ||
| 159 | int group, offset, mask_offset; | ||
| 160 | unsigned int value; | ||
| 161 | |||
| 162 | group = s5pc1xx_get_group(irq); | ||
| 163 | offset = s5pc1xx_get_offset(irq); | ||
| 164 | mask_offset = group_to_mask_offset(group); | ||
| 165 | |||
| 166 | value = __raw_readl(S5PC1XX_GPIOREG(MASK_OFFSET) + mask_offset); | ||
| 167 | value |= 1 << offset; | ||
| 168 | __raw_writel(value, S5PC1XX_GPIOREG(MASK_OFFSET) + mask_offset); | ||
| 169 | } | ||
| 170 | |||
| 171 | static void s5pc1xx_gpioint_unmask(unsigned int irq) | ||
| 172 | { | ||
| 173 | int group, offset, mask_offset; | ||
| 174 | unsigned int value; | ||
| 175 | |||
| 176 | group = s5pc1xx_get_group(irq); | ||
| 177 | offset = s5pc1xx_get_offset(irq); | ||
| 178 | mask_offset = group_to_mask_offset(group); | ||
| 179 | |||
| 180 | value = __raw_readl(S5PC1XX_GPIOREG(MASK_OFFSET) + mask_offset); | ||
| 181 | value &= ~(1 << offset); | ||
| 182 | __raw_writel(value, S5PC1XX_GPIOREG(MASK_OFFSET) + mask_offset); | ||
| 183 | } | ||
| 184 | |||
| 185 | static void s5pc1xx_gpioint_mask_ack(unsigned int irq) | ||
| 186 | { | ||
| 187 | s5pc1xx_gpioint_mask(irq); | ||
| 188 | s5pc1xx_gpioint_ack(irq); | ||
| 189 | } | ||
| 190 | |||
| 191 | static int s5pc1xx_gpioint_set_type(unsigned int irq, unsigned int type) | ||
| 192 | { | ||
| 193 | int group, offset, con_offset; | ||
| 194 | unsigned int value; | ||
| 195 | |||
| 196 | group = s5pc1xx_get_group(irq); | ||
| 197 | offset = s5pc1xx_get_offset(irq); | ||
| 198 | con_offset = group_to_con_offset(group); | ||
| 199 | |||
| 200 | switch (type) { | ||
| 201 | case IRQ_TYPE_NONE: | ||
| 202 | printk(KERN_WARNING "No irq type\n"); | ||
| 203 | return -EINVAL; | ||
| 204 | case IRQ_TYPE_EDGE_RISING: | ||
| 205 | type = GPIOINT_EDGE_RISING; | ||
| 206 | break; | ||
| 207 | case IRQ_TYPE_EDGE_FALLING: | ||
| 208 | type = GPIOINT_EDGE_FALLING; | ||
| 209 | break; | ||
| 210 | case IRQ_TYPE_EDGE_BOTH: | ||
| 211 | type = GPIOINT_EDGE_BOTH; | ||
| 212 | break; | ||
| 213 | case IRQ_TYPE_LEVEL_HIGH: | ||
| 214 | type = GPIOINT_LEVEL_HIGH; | ||
| 215 | break; | ||
| 216 | case IRQ_TYPE_LEVEL_LOW: | ||
| 217 | type = GPIOINT_LEVEL_LOW; | ||
| 218 | break; | ||
| 219 | default: | ||
| 220 | BUG(); | ||
| 221 | } | ||
| 222 | |||
| 223 | |||
| 224 | value = __raw_readl(S5PC1XX_GPIOREG(CON_OFFSET) + con_offset); | ||
| 225 | value &= ~(0xf << (offset * 0x4)); | ||
| 226 | value |= (type << (offset * 0x4)); | ||
| 227 | __raw_writel(value, S5PC1XX_GPIOREG(CON_OFFSET) + con_offset); | ||
| 228 | |||
| 229 | return 0; | ||
| 230 | } | ||
| 231 | |||
| 232 | struct irq_chip s5pc1xx_gpioint = { | ||
| 233 | .name = "GPIO", | ||
| 234 | .ack = s5pc1xx_gpioint_ack, | ||
| 235 | .mask = s5pc1xx_gpioint_mask, | ||
| 236 | .mask_ack = s5pc1xx_gpioint_mask_ack, | ||
| 237 | .unmask = s5pc1xx_gpioint_unmask, | ||
| 238 | .set_type = s5pc1xx_gpioint_set_type, | ||
| 239 | }; | ||
| 240 | |||
| 241 | void s5pc1xx_irq_gpioint_handler(unsigned int irq, struct irq_desc *desc) | ||
| 242 | { | ||
| 243 | int group, offset, pend_offset, mask_offset; | ||
| 244 | int real_irq, group_end; | ||
| 245 | unsigned int pend, mask; | ||
| 246 | |||
| 247 | group_end = 21; | ||
| 248 | |||
| 249 | for (group = 0; group < group_end; group++) { | ||
| 250 | pend_offset = group_to_pend_offset(group); | ||
| 251 | pend = __raw_readl(S5PC1XX_GPIOREG(PEND_OFFSET) + pend_offset); | ||
| 252 | if (!pend) | ||
| 253 | continue; | ||
| 254 | |||
| 255 | mask_offset = group_to_mask_offset(group); | ||
| 256 | mask = __raw_readl(S5PC1XX_GPIOREG(MASK_OFFSET) + mask_offset); | ||
| 257 | pend &= ~mask; | ||
| 258 | |||
| 259 | for (offset = 0; offset < 8; offset++) { | ||
| 260 | if (pend & (1 << offset)) { | ||
| 261 | real_irq = s5pc1xx_get_start(group) + offset; | ||
| 262 | generic_handle_irq(S3C_IRQ_GPIO(real_irq)); | ||
| 263 | } | ||
| 264 | } | ||
| 265 | } | ||
| 266 | } | ||
diff --git a/arch/arm/plat-s5pc1xx/irq.c b/arch/arm/plat-s5pc1xx/irq.c index 80d6dd942cb..e44fd04ef33 100644 --- a/arch/arm/plat-s5pc1xx/irq.c +++ b/arch/arm/plat-s5pc1xx/irq.c | |||
| @@ -79,7 +79,7 @@ static void s3c_irq_timer_ack(unsigned int irq) | |||
| 79 | { | 79 | { |
| 80 | u32 reg = __raw_readl(S3C64XX_TINT_CSTAT); | 80 | u32 reg = __raw_readl(S3C64XX_TINT_CSTAT); |
| 81 | 81 | ||
| 82 | reg &= 0x1f; | 82 | reg &= 0x1f; /* mask out pending interrupts */ |
| 83 | reg |= (1 << 5) << (irq - IRQ_TIMER0); | 83 | reg |= (1 << 5) << (irq - IRQ_TIMER0); |
| 84 | __raw_writel(reg, S3C64XX_TINT_CSTAT); | 84 | __raw_writel(reg, S3C64XX_TINT_CSTAT); |
| 85 | } | 85 | } |
diff --git a/arch/arm/plat-s5pc1xx/s5pc100-clock.c b/arch/arm/plat-s5pc1xx/s5pc100-clock.c index 6b24035172f..b436d44510c 100644 --- a/arch/arm/plat-s5pc1xx/s5pc100-clock.c +++ b/arch/arm/plat-s5pc1xx/s5pc100-clock.c | |||
| @@ -49,6 +49,7 @@ static struct clk clk_ext_xtal_mux = { | |||
| 49 | #define clk_fin_hpll clk_ext_xtal_mux | 49 | #define clk_fin_hpll clk_ext_xtal_mux |
| 50 | 50 | ||
| 51 | #define clk_fout_mpll clk_mpll | 51 | #define clk_fout_mpll clk_mpll |
| 52 | #define clk_vclk_54m clk_54m | ||
| 52 | 53 | ||
| 53 | struct clk_sources { | 54 | struct clk_sources { |
| 54 | unsigned int nr_sources; | 55 | unsigned int nr_sources; |
| @@ -67,746 +68,327 @@ struct clksrc_clk { | |||
| 67 | void __iomem *reg_source; | 68 | void __iomem *reg_source; |
| 68 | }; | 69 | }; |
| 69 | 70 | ||
| 70 | static int clk_default_setrate(struct clk *clk, unsigned long rate) | 71 | /* APLL */ |
| 71 | { | 72 | static struct clk clk_fout_apll = { |
| 72 | clk->rate = rate; | 73 | .name = "fout_apll", |
| 73 | return 1; | ||
| 74 | } | ||
| 75 | |||
| 76 | struct clk clk_27m = { | ||
| 77 | .name = "clk_27m", | ||
| 78 | .id = -1, | 74 | .id = -1, |
| 79 | .rate = 27000000, | 75 | .rate = 27000000, |
| 80 | }; | 76 | }; |
| 81 | 77 | ||
| 82 | static int clk_48m_ctrl(struct clk *clk, int enable) | 78 | static struct clk *clk_src_apll_list[] = { |
| 83 | { | 79 | [0] = &clk_fin_apll, |
| 84 | unsigned long flags; | 80 | [1] = &clk_fout_apll, |
| 85 | u32 val; | 81 | }; |
| 82 | |||
| 83 | static struct clk_sources clk_src_apll = { | ||
| 84 | .sources = clk_src_apll_list, | ||
| 85 | .nr_sources = ARRAY_SIZE(clk_src_apll_list), | ||
| 86 | }; | ||
| 86 | 87 | ||
| 87 | /* can't rely on clock lock, this register has other usages */ | 88 | static struct clksrc_clk clk_mout_apll = { |
| 88 | local_irq_save(flags); | 89 | .clk = { |
| 90 | .name = "mout_apll", | ||
| 91 | .id = -1, | ||
| 92 | }, | ||
| 93 | .shift = S5PC100_CLKSRC0_APLL_SHIFT, | ||
| 94 | .mask = S5PC100_CLKSRC0_APLL_MASK, | ||
| 95 | .sources = &clk_src_apll, | ||
| 96 | .reg_source = S5PC100_CLKSRC0, | ||
| 97 | }; | ||
| 89 | 98 | ||
| 90 | val = __raw_readl(S5PC1XX_CLK_SRC1); | 99 | static unsigned long s5pc100_clk_dout_apll_get_rate(struct clk *clk) |
| 91 | if (enable) | 100 | { |
| 92 | val |= S5PC100_CLKSRC1_CLK48M_MASK; | 101 | unsigned long rate = clk_get_rate(clk->parent); |
| 93 | else | 102 | unsigned int ratio; |
| 94 | val &= ~S5PC100_CLKSRC1_CLK48M_MASK; | ||
| 95 | 103 | ||
| 96 | __raw_writel(val, S5PC1XX_CLK_SRC1); | 104 | ratio = __raw_readl(S5PC100_CLKDIV0) & S5PC100_CLKDIV0_APLL_MASK; |
| 97 | local_irq_restore(flags); | 105 | ratio >>= S5PC100_CLKDIV0_APLL_SHIFT; |
| 98 | 106 | ||
| 99 | return 0; | 107 | return rate / (ratio + 1); |
| 100 | } | 108 | } |
| 101 | 109 | ||
| 102 | struct clk clk_48m = { | 110 | static struct clk clk_dout_apll = { |
| 103 | .name = "clk_48m", | 111 | .name = "dout_apll", |
| 104 | .id = -1, | 112 | .id = -1, |
| 105 | .rate = 48000000, | 113 | .parent = &clk_mout_apll.clk, |
| 106 | .enable = clk_48m_ctrl, | 114 | .get_rate = s5pc100_clk_dout_apll_get_rate, |
| 107 | }; | 115 | }; |
| 108 | 116 | ||
| 109 | struct clk clk_54m = { | 117 | static unsigned long s5pc100_clk_arm_get_rate(struct clk *clk) |
| 110 | .name = "clk_54m", | 118 | { |
| 111 | .id = -1, | 119 | unsigned long rate = clk_get_rate(clk->parent); |
| 112 | .rate = 54000000, | 120 | unsigned int ratio; |
| 113 | }; | ||
| 114 | |||
| 115 | struct clk clk_hpll = { | ||
| 116 | .name = "hpll", | ||
| 117 | .id = -1, | ||
| 118 | }; | ||
| 119 | 121 | ||
| 120 | struct clk clk_hd0 = { | 122 | ratio = __raw_readl(S5PC100_CLKDIV0) & S5PC100_CLKDIV0_ARM_MASK; |
| 121 | .name = "hclkd0", | 123 | ratio >>= S5PC100_CLKDIV0_ARM_SHIFT; |
| 122 | .id = -1, | ||
| 123 | .rate = 0, | ||
| 124 | .parent = NULL, | ||
| 125 | .ctrlbit = 0, | ||
| 126 | .set_rate = clk_default_setrate, | ||
| 127 | }; | ||
| 128 | 124 | ||
| 129 | struct clk clk_pd0 = { | 125 | return rate / (ratio + 1); |
| 130 | .name = "pclkd0", | 126 | } |
| 131 | .id = -1, | ||
| 132 | .rate = 0, | ||
| 133 | .parent = NULL, | ||
| 134 | .ctrlbit = 0, | ||
| 135 | .set_rate = clk_default_setrate, | ||
| 136 | }; | ||
| 137 | 127 | ||
| 138 | static int s5pc1xx_clk_gate(void __iomem *reg, | 128 | static unsigned long s5pc100_clk_arm_round_rate(struct clk *clk, |
| 139 | struct clk *clk, | 129 | unsigned long rate) |
| 140 | int enable) | ||
| 141 | { | 130 | { |
| 142 | unsigned int ctrlbit = clk->ctrlbit; | 131 | unsigned long parent = clk_get_rate(clk->parent); |
| 143 | u32 con; | 132 | u32 div; |
| 144 | 133 | ||
| 145 | con = __raw_readl(reg); | 134 | if (parent < rate) |
| 135 | return rate; | ||
| 146 | 136 | ||
| 147 | if (enable) | 137 | div = (parent / rate) - 1; |
| 148 | con |= ctrlbit; | 138 | if (div > S5PC100_CLKDIV0_ARM_MASK) |
| 149 | else | 139 | div = S5PC100_CLKDIV0_ARM_MASK; |
| 150 | con &= ~ctrlbit; | ||
| 151 | 140 | ||
| 152 | __raw_writel(con, reg); | 141 | return parent / (div + 1); |
| 153 | return 0; | ||
| 154 | } | 142 | } |
| 155 | 143 | ||
| 156 | static int s5pc1xx_clk_d00_ctrl(struct clk *clk, int enable) | 144 | static int s5pc100_clk_arm_set_rate(struct clk *clk, unsigned long rate) |
| 157 | { | 145 | { |
| 158 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D00, clk, enable); | 146 | unsigned long parent = clk_get_rate(clk->parent); |
| 159 | } | 147 | u32 div; |
| 148 | u32 val; | ||
| 160 | 149 | ||
| 161 | static int s5pc1xx_clk_d01_ctrl(struct clk *clk, int enable) | 150 | if (rate < parent / (S5PC100_CLKDIV0_ARM_MASK + 1)) |
| 162 | { | 151 | return -EINVAL; |
| 163 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D01, clk, enable); | ||
| 164 | } | ||
| 165 | 152 | ||
| 166 | static int s5pc1xx_clk_d02_ctrl(struct clk *clk, int enable) | 153 | rate = clk_round_rate(clk, rate); |
| 167 | { | 154 | div = clk_get_rate(clk->parent) / rate; |
| 168 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D02, clk, enable); | ||
| 169 | } | ||
| 170 | 155 | ||
| 171 | static int s5pc1xx_clk_d10_ctrl(struct clk *clk, int enable) | 156 | val = __raw_readl(S5PC100_CLKDIV0); |
| 172 | { | 157 | val &= S5PC100_CLKDIV0_ARM_MASK; |
| 173 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D10, clk, enable); | 158 | val |= (div - 1); |
| 174 | } | 159 | __raw_writel(val, S5PC100_CLKDIV0); |
| 175 | 160 | ||
| 176 | static int s5pc1xx_clk_d11_ctrl(struct clk *clk, int enable) | 161 | return 0; |
| 177 | { | ||
| 178 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D11, clk, enable); | ||
| 179 | } | 162 | } |
| 180 | 163 | ||
| 181 | static int s5pc1xx_clk_d12_ctrl(struct clk *clk, int enable) | 164 | static struct clk clk_arm = { |
| 182 | { | 165 | .name = "armclk", |
| 183 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D12, clk, enable); | 166 | .id = -1, |
| 184 | } | 167 | .parent = &clk_dout_apll, |
| 168 | .get_rate = s5pc100_clk_arm_get_rate, | ||
| 169 | .set_rate = s5pc100_clk_arm_set_rate, | ||
| 170 | .round_rate = s5pc100_clk_arm_round_rate, | ||
| 171 | }; | ||
| 185 | 172 | ||
| 186 | static int s5pc1xx_clk_d13_ctrl(struct clk *clk, int enable) | 173 | static unsigned long s5pc100_clk_dout_d0_bus_get_rate(struct clk *clk) |
| 187 | { | 174 | { |
| 188 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D13, clk, enable); | 175 | unsigned long rate = clk_get_rate(clk->parent); |
| 189 | } | 176 | unsigned int ratio; |
| 190 | 177 | ||
| 191 | static int s5pc1xx_clk_d14_ctrl(struct clk *clk, int enable) | 178 | ratio = __raw_readl(S5PC100_CLKDIV0) & S5PC100_CLKDIV0_D0_MASK; |
| 192 | { | 179 | ratio >>= S5PC100_CLKDIV0_D0_SHIFT; |
| 193 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D14, clk, enable); | ||
| 194 | } | ||
| 195 | 180 | ||
| 196 | static int s5pc1xx_clk_d15_ctrl(struct clk *clk, int enable) | 181 | return rate / (ratio + 1); |
| 197 | { | ||
| 198 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D15, clk, enable); | ||
| 199 | } | 182 | } |
| 200 | 183 | ||
| 201 | static int s5pc1xx_clk_d20_ctrl(struct clk *clk, int enable) | 184 | static struct clk clk_dout_d0_bus = { |
| 202 | { | 185 | .name = "dout_d0_bus", |
| 203 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D20, clk, enable); | 186 | .id = -1, |
| 204 | } | 187 | .parent = &clk_arm, |
| 188 | .get_rate = s5pc100_clk_dout_d0_bus_get_rate, | ||
| 189 | }; | ||
| 205 | 190 | ||
| 206 | int s5pc1xx_sclk0_ctrl(struct clk *clk, int enable) | 191 | static unsigned long s5pc100_clk_dout_pclkd0_get_rate(struct clk *clk) |
| 207 | { | 192 | { |
| 208 | return s5pc1xx_clk_gate(S5PC100_SCLKGATE0, clk, enable); | 193 | unsigned long rate = clk_get_rate(clk->parent); |
| 194 | unsigned int ratio; | ||
| 195 | |||
| 196 | ratio = __raw_readl(S5PC100_CLKDIV0) & S5PC100_CLKDIV0_PCLKD0_MASK; | ||
| 197 | ratio >>= S5PC100_CLKDIV0_PCLKD0_SHIFT; | ||
| 198 | |||
| 199 | return rate / (ratio + 1); | ||
| 209 | } | 200 | } |
| 210 | 201 | ||
| 211 | int s5pc1xx_sclk1_ctrl(struct clk *clk, int enable) | 202 | static struct clk clk_dout_pclkd0 = { |
| 203 | .name = "dout_pclkd0", | ||
| 204 | .id = -1, | ||
| 205 | .parent = &clk_dout_d0_bus, | ||
| 206 | .get_rate = s5pc100_clk_dout_pclkd0_get_rate, | ||
| 207 | }; | ||
| 208 | |||
| 209 | static unsigned long s5pc100_clk_dout_apll2_get_rate(struct clk *clk) | ||
| 212 | { | 210 | { |
| 213 | return s5pc1xx_clk_gate(S5PC100_SCLKGATE1, clk, enable); | 211 | unsigned long rate = clk_get_rate(clk->parent); |
| 212 | unsigned int ratio; | ||
| 213 | |||
| 214 | ratio = __raw_readl(S5PC100_CLKDIV1) & S5PC100_CLKDIV1_APLL2_MASK; | ||
| 215 | ratio >>= S5PC100_CLKDIV1_APLL2_SHIFT; | ||
| 216 | |||
| 217 | return rate / (ratio + 1); | ||
| 214 | } | 218 | } |
| 215 | 219 | ||
| 216 | static struct clk init_clocks_disable[] = { | 220 | static struct clk clk_dout_apll2 = { |
| 217 | { | 221 | .name = "dout_apll2", |
| 218 | .name = "dsi", | 222 | .id = -1, |
| 219 | .id = -1, | 223 | .parent = &clk_mout_apll.clk, |
| 220 | .parent = &clk_p, | 224 | .get_rate = s5pc100_clk_dout_apll2_get_rate, |
| 221 | .enable = s5pc1xx_clk_d11_ctrl, | ||
| 222 | .ctrlbit = S5PC100_CLKGATE_D11_DSI, | ||
| 223 | }, { | ||
| 224 | .name = "csi", | ||
| 225 | .id = -1, | ||
| 226 | .parent = &clk_h, | ||
| 227 | .enable = s5pc1xx_clk_d11_ctrl, | ||
| 228 | .ctrlbit = S5PC100_CLKGATE_D11_CSI, | ||
| 229 | }, { | ||
| 230 | .name = "ccan0", | ||
| 231 | .id = 0, | ||
| 232 | .parent = &clk_p, | ||
| 233 | .enable = s5pc1xx_clk_d14_ctrl, | ||
| 234 | .ctrlbit = S5PC100_CLKGATE_D14_CCAN0, | ||
| 235 | }, { | ||
| 236 | .name = "ccan1", | ||
| 237 | .id = 1, | ||
| 238 | .parent = &clk_p, | ||
| 239 | .enable = s5pc1xx_clk_d14_ctrl, | ||
| 240 | .ctrlbit = S5PC100_CLKGATE_D14_CCAN1, | ||
| 241 | }, { | ||
| 242 | .name = "keypad", | ||
| 243 | .id = -1, | ||
| 244 | .parent = &clk_p, | ||
| 245 | .enable = s5pc1xx_clk_d15_ctrl, | ||
| 246 | .ctrlbit = S5PC100_CLKGATE_D15_KEYIF, | ||
| 247 | }, { | ||
| 248 | .name = "hclkd2", | ||
| 249 | .id = -1, | ||
| 250 | .parent = NULL, | ||
| 251 | .enable = s5pc1xx_clk_d20_ctrl, | ||
| 252 | .ctrlbit = S5PC100_CLKGATE_D20_HCLKD2, | ||
| 253 | }, { | ||
| 254 | .name = "iis-d2", | ||
| 255 | .id = -1, | ||
| 256 | .parent = NULL, | ||
| 257 | .enable = s5pc1xx_clk_d20_ctrl, | ||
| 258 | .ctrlbit = S5PC100_CLKGATE_D20_I2SD2, | ||
| 259 | }, { | ||
| 260 | .name = "otg", | ||
| 261 | .id = -1, | ||
| 262 | .parent = &clk_h, | ||
| 263 | .enable = s5pc1xx_clk_d10_ctrl, | ||
| 264 | .ctrlbit = S5PC100_CLKGATE_D10_USBOTG, | ||
| 265 | }, | ||
| 266 | }; | 225 | }; |
| 267 | 226 | ||
| 268 | static struct clk init_clocks[] = { | 227 | /* MPLL */ |
| 269 | /* System1 (D0_0) devices */ | 228 | static struct clk *clk_src_mpll_list[] = { |
| 270 | { | 229 | [0] = &clk_fin_mpll, |
| 271 | .name = "intc", | 230 | [1] = &clk_fout_mpll, |
| 272 | .id = -1, | 231 | }; |
| 273 | .parent = &clk_hd0, | ||
| 274 | .enable = s5pc1xx_clk_d00_ctrl, | ||
| 275 | .ctrlbit = S5PC100_CLKGATE_D00_INTC, | ||
| 276 | }, { | ||
| 277 | .name = "tzic", | ||
| 278 | .id = -1, | ||
| 279 | .parent = &clk_hd0, | ||
| 280 | .enable = s5pc1xx_clk_d00_ctrl, | ||
| 281 | .ctrlbit = S5PC100_CLKGATE_D00_TZIC, | ||
| 282 | }, { | ||
| 283 | .name = "cf-ata", | ||
| 284 | .id = -1, | ||
| 285 | .parent = &clk_hd0, | ||
| 286 | .enable = s5pc1xx_clk_d00_ctrl, | ||
| 287 | .ctrlbit = S5PC100_CLKGATE_D00_CFCON, | ||
| 288 | }, { | ||
| 289 | .name = "mdma", | ||
| 290 | .id = -1, | ||
| 291 | .parent = &clk_hd0, | ||
| 292 | .enable = s5pc1xx_clk_d00_ctrl, | ||
| 293 | .ctrlbit = S5PC100_CLKGATE_D00_MDMA, | ||
| 294 | }, { | ||
| 295 | .name = "g2d", | ||
| 296 | .id = -1, | ||
| 297 | .parent = &clk_hd0, | ||
| 298 | .enable = s5pc1xx_clk_d00_ctrl, | ||
| 299 | .ctrlbit = S5PC100_CLKGATE_D00_G2D, | ||
| 300 | }, { | ||
| 301 | .name = "secss", | ||
| 302 | .id = -1, | ||
| 303 | .parent = &clk_hd0, | ||
| 304 | .enable = s5pc1xx_clk_d00_ctrl, | ||
| 305 | .ctrlbit = S5PC100_CLKGATE_D00_SECSS, | ||
| 306 | }, { | ||
| 307 | .name = "cssys", | ||
| 308 | .id = -1, | ||
| 309 | .parent = &clk_hd0, | ||
| 310 | .enable = s5pc1xx_clk_d00_ctrl, | ||
| 311 | .ctrlbit = S5PC100_CLKGATE_D00_CSSYS, | ||
| 312 | }, | ||
| 313 | 232 | ||
| 314 | /* Memory (D0_1) devices */ | 233 | static struct clk_sources clk_src_mpll = { |
| 315 | { | 234 | .sources = clk_src_mpll_list, |
| 316 | .name = "dmc", | 235 | .nr_sources = ARRAY_SIZE(clk_src_mpll_list), |
| 317 | .id = -1, | 236 | }; |
| 318 | .parent = &clk_hd0, | ||
| 319 | .enable = s5pc1xx_clk_d01_ctrl, | ||
| 320 | .ctrlbit = S5PC100_CLKGATE_D01_DMC, | ||
| 321 | }, { | ||
| 322 | .name = "sromc", | ||
| 323 | .id = -1, | ||
| 324 | .parent = &clk_hd0, | ||
| 325 | .enable = s5pc1xx_clk_d01_ctrl, | ||
| 326 | .ctrlbit = S5PC100_CLKGATE_D01_SROMC, | ||
| 327 | }, { | ||
| 328 | .name = "onenand", | ||
| 329 | .id = -1, | ||
| 330 | .parent = &clk_hd0, | ||
| 331 | .enable = s5pc1xx_clk_d01_ctrl, | ||
| 332 | .ctrlbit = S5PC100_CLKGATE_D01_ONENAND, | ||
| 333 | }, { | ||
| 334 | .name = "nand", | ||
| 335 | .id = -1, | ||
| 336 | .parent = &clk_hd0, | ||
| 337 | .enable = s5pc1xx_clk_d01_ctrl, | ||
| 338 | .ctrlbit = S5PC100_CLKGATE_D01_NFCON, | ||
| 339 | }, { | ||
| 340 | .name = "intmem", | ||
| 341 | .id = -1, | ||
| 342 | .parent = &clk_hd0, | ||
| 343 | .enable = s5pc1xx_clk_d01_ctrl, | ||
| 344 | .ctrlbit = S5PC100_CLKGATE_D01_INTMEM, | ||
| 345 | }, { | ||
| 346 | .name = "ebi", | ||
| 347 | .id = -1, | ||
| 348 | .parent = &clk_hd0, | ||
| 349 | .enable = s5pc1xx_clk_d01_ctrl, | ||
| 350 | .ctrlbit = S5PC100_CLKGATE_D01_EBI, | ||
| 351 | }, | ||
| 352 | 237 | ||
| 353 | /* System2 (D0_2) devices */ | 238 | static struct clksrc_clk clk_mout_mpll = { |
| 354 | { | 239 | .clk = { |
| 355 | .name = "seckey", | 240 | .name = "mout_mpll", |
| 356 | .id = -1, | ||
| 357 | .parent = &clk_pd0, | ||
| 358 | .enable = s5pc1xx_clk_d02_ctrl, | ||
| 359 | .ctrlbit = S5PC100_CLKGATE_D02_SECKEY, | ||
| 360 | }, { | ||
| 361 | .name = "sdm", | ||
| 362 | .id = -1, | 241 | .id = -1, |
| 363 | .parent = &clk_hd0, | ||
| 364 | .enable = s5pc1xx_clk_d02_ctrl, | ||
| 365 | .ctrlbit = S5PC100_CLKGATE_D02_SDM, | ||
| 366 | }, | 242 | }, |
| 243 | .shift = S5PC100_CLKSRC0_MPLL_SHIFT, | ||
| 244 | .mask = S5PC100_CLKSRC0_MPLL_MASK, | ||
| 245 | .sources = &clk_src_mpll, | ||
| 246 | .reg_source = S5PC100_CLKSRC0, | ||
| 247 | }; | ||
| 367 | 248 | ||
| 368 | /* File (D1_0) devices */ | 249 | static struct clk *clkset_am_list[] = { |
| 369 | { | 250 | [0] = &clk_mout_mpll.clk, |
| 370 | .name = "pdma0", | 251 | [1] = &clk_dout_apll2, |
| 371 | .id = -1, | 252 | }; |
| 372 | .parent = &clk_h, | ||
| 373 | .enable = s5pc1xx_clk_d10_ctrl, | ||
| 374 | .ctrlbit = S5PC100_CLKGATE_D10_PDMA0, | ||
| 375 | }, { | ||
| 376 | .name = "pdma1", | ||
| 377 | .id = -1, | ||
| 378 | .parent = &clk_h, | ||
| 379 | .enable = s5pc1xx_clk_d10_ctrl, | ||
| 380 | .ctrlbit = S5PC100_CLKGATE_D10_PDMA1, | ||
| 381 | }, { | ||
| 382 | .name = "usb-host", | ||
| 383 | .id = -1, | ||
| 384 | .parent = &clk_h, | ||
| 385 | .enable = s5pc1xx_clk_d10_ctrl, | ||
| 386 | .ctrlbit = S5PC100_CLKGATE_D10_USBHOST, | ||
| 387 | }, { | ||
| 388 | .name = "modem", | ||
| 389 | .id = -1, | ||
| 390 | .parent = &clk_h, | ||
| 391 | .enable = s5pc1xx_clk_d10_ctrl, | ||
| 392 | .ctrlbit = S5PC100_CLKGATE_D10_MODEMIF, | ||
| 393 | }, { | ||
| 394 | .name = "hsmmc", | ||
| 395 | .id = 0, | ||
| 396 | .parent = &clk_h, | ||
| 397 | .enable = s5pc1xx_clk_d10_ctrl, | ||
| 398 | .ctrlbit = S5PC100_CLKGATE_D10_HSMMC0, | ||
| 399 | }, { | ||
| 400 | .name = "hsmmc", | ||
| 401 | .id = 1, | ||
| 402 | .parent = &clk_h, | ||
| 403 | .enable = s5pc1xx_clk_d10_ctrl, | ||
| 404 | .ctrlbit = S5PC100_CLKGATE_D10_HSMMC1, | ||
| 405 | }, { | ||
| 406 | .name = "hsmmc", | ||
| 407 | .id = 2, | ||
| 408 | .parent = &clk_h, | ||
| 409 | .enable = s5pc1xx_clk_d10_ctrl, | ||
| 410 | .ctrlbit = S5PC100_CLKGATE_D10_HSMMC2, | ||
| 411 | }, | ||
| 412 | 253 | ||
| 413 | /* Multimedia1 (D1_1) devices */ | 254 | static struct clk_sources clk_src_am = { |
| 414 | { | 255 | .sources = clkset_am_list, |
| 415 | .name = "lcd", | 256 | .nr_sources = ARRAY_SIZE(clkset_am_list), |
| 416 | .id = -1, | 257 | }; |
| 417 | .parent = &clk_h, | ||
| 418 | .enable = s5pc1xx_clk_d11_ctrl, | ||
| 419 | .ctrlbit = S5PC100_CLKGATE_D11_LCD, | ||
| 420 | }, { | ||
| 421 | .name = "rotator", | ||
| 422 | .id = -1, | ||
| 423 | .parent = &clk_h, | ||
| 424 | .enable = s5pc1xx_clk_d11_ctrl, | ||
| 425 | .ctrlbit = S5PC100_CLKGATE_D11_ROTATOR, | ||
| 426 | }, { | ||
| 427 | .name = "fimc", | ||
| 428 | .id = 0, | ||
| 429 | .parent = &clk_h, | ||
| 430 | .enable = s5pc1xx_clk_d11_ctrl, | ||
| 431 | .ctrlbit = S5PC100_CLKGATE_D11_FIMC0, | ||
| 432 | }, { | ||
| 433 | .name = "fimc", | ||
| 434 | .id = 1, | ||
| 435 | .parent = &clk_h, | ||
| 436 | .enable = s5pc1xx_clk_d11_ctrl, | ||
| 437 | .ctrlbit = S5PC100_CLKGATE_D11_FIMC1, | ||
| 438 | }, { | ||
| 439 | .name = "fimc", | ||
| 440 | .id = 2, | ||
| 441 | .parent = &clk_h, | ||
| 442 | .enable = s5pc1xx_clk_d11_ctrl, | ||
| 443 | .ctrlbit = S5PC100_CLKGATE_D11_FIMC2, | ||
| 444 | }, { | ||
| 445 | .name = "jpeg", | ||
| 446 | .id = -1, | ||
| 447 | .parent = &clk_h, | ||
| 448 | .enable = s5pc1xx_clk_d11_ctrl, | ||
| 449 | .ctrlbit = S5PC100_CLKGATE_D11_JPEG, | ||
| 450 | }, { | ||
| 451 | .name = "g3d", | ||
| 452 | .id = -1, | ||
| 453 | .parent = &clk_h, | ||
| 454 | .enable = s5pc1xx_clk_d11_ctrl, | ||
| 455 | .ctrlbit = S5PC100_CLKGATE_D11_G3D, | ||
| 456 | }, | ||
| 457 | 258 | ||
| 458 | /* Multimedia2 (D1_2) devices */ | 259 | static struct clksrc_clk clk_mout_am = { |
| 459 | { | 260 | .clk = { |
| 460 | .name = "tv", | 261 | .name = "mout_am", |
| 461 | .id = -1, | ||
| 462 | .parent = &clk_h, | ||
| 463 | .enable = s5pc1xx_clk_d12_ctrl, | ||
| 464 | .ctrlbit = S5PC100_CLKGATE_D12_TV, | ||
| 465 | }, { | ||
| 466 | .name = "vp", | ||
| 467 | .id = -1, | ||
| 468 | .parent = &clk_h, | ||
| 469 | .enable = s5pc1xx_clk_d12_ctrl, | ||
| 470 | .ctrlbit = S5PC100_CLKGATE_D12_VP, | ||
| 471 | }, { | ||
| 472 | .name = "mixer", | ||
| 473 | .id = -1, | ||
| 474 | .parent = &clk_h, | ||
| 475 | .enable = s5pc1xx_clk_d12_ctrl, | ||
| 476 | .ctrlbit = S5PC100_CLKGATE_D12_MIXER, | ||
| 477 | }, { | ||
| 478 | .name = "hdmi", | ||
| 479 | .id = -1, | ||
| 480 | .parent = &clk_h, | ||
| 481 | .enable = s5pc1xx_clk_d12_ctrl, | ||
| 482 | .ctrlbit = S5PC100_CLKGATE_D12_HDMI, | ||
| 483 | }, { | ||
| 484 | .name = "mfc", | ||
| 485 | .id = -1, | 262 | .id = -1, |
| 486 | .parent = &clk_h, | ||
| 487 | .enable = s5pc1xx_clk_d12_ctrl, | ||
| 488 | .ctrlbit = S5PC100_CLKGATE_D12_MFC, | ||
| 489 | }, | 263 | }, |
| 264 | .shift = S5PC100_CLKSRC0_AMMUX_SHIFT, | ||
| 265 | .mask = S5PC100_CLKSRC0_AMMUX_MASK, | ||
| 266 | .sources = &clk_src_am, | ||
| 267 | .reg_source = S5PC100_CLKSRC0, | ||
| 268 | }; | ||
| 490 | 269 | ||
| 491 | /* System (D1_3) devices */ | 270 | static unsigned long s5pc100_clk_dout_d1_bus_get_rate(struct clk *clk) |
| 492 | { | 271 | { |
| 493 | .name = "chipid", | 272 | unsigned long rate = clk_get_rate(clk->parent); |
| 494 | .id = -1, | 273 | unsigned int ratio; |
| 495 | .parent = &clk_p, | ||
| 496 | .enable = s5pc1xx_clk_d13_ctrl, | ||
| 497 | .ctrlbit = S5PC100_CLKGATE_D13_CHIPID, | ||
| 498 | }, { | ||
| 499 | .name = "gpio", | ||
| 500 | .id = -1, | ||
| 501 | .parent = &clk_p, | ||
| 502 | .enable = s5pc1xx_clk_d13_ctrl, | ||
| 503 | .ctrlbit = S5PC100_CLKGATE_D13_GPIO, | ||
| 504 | }, { | ||
| 505 | .name = "apc", | ||
| 506 | .id = -1, | ||
| 507 | .parent = &clk_p, | ||
| 508 | .enable = s5pc1xx_clk_d13_ctrl, | ||
| 509 | .ctrlbit = S5PC100_CLKGATE_D13_APC, | ||
| 510 | }, { | ||
| 511 | .name = "iec", | ||
| 512 | .id = -1, | ||
| 513 | .parent = &clk_p, | ||
| 514 | .enable = s5pc1xx_clk_d13_ctrl, | ||
| 515 | .ctrlbit = S5PC100_CLKGATE_D13_IEC, | ||
| 516 | }, { | ||
| 517 | .name = "timers", | ||
| 518 | .id = -1, | ||
| 519 | .parent = &clk_p, | ||
| 520 | .enable = s5pc1xx_clk_d13_ctrl, | ||
| 521 | .ctrlbit = S5PC100_CLKGATE_D13_PWM, | ||
| 522 | }, { | ||
| 523 | .name = "systimer", | ||
| 524 | .id = -1, | ||
| 525 | .parent = &clk_p, | ||
| 526 | .enable = s5pc1xx_clk_d13_ctrl, | ||
| 527 | .ctrlbit = S5PC100_CLKGATE_D13_SYSTIMER, | ||
| 528 | }, { | ||
| 529 | .name = "watchdog", | ||
| 530 | .id = -1, | ||
| 531 | .parent = &clk_p, | ||
| 532 | .enable = s5pc1xx_clk_d13_ctrl, | ||
| 533 | .ctrlbit = S5PC100_CLKGATE_D13_WDT, | ||
| 534 | }, { | ||
| 535 | .name = "rtc", | ||
| 536 | .id = -1, | ||
| 537 | .parent = &clk_p, | ||
| 538 | .enable = s5pc1xx_clk_d13_ctrl, | ||
| 539 | .ctrlbit = S5PC100_CLKGATE_D13_RTC, | ||
| 540 | }, | ||
| 541 | 274 | ||
| 542 | /* Connectivity (D1_4) devices */ | 275 | printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate); |
| 543 | { | ||
| 544 | .name = "uart", | ||
| 545 | .id = 0, | ||
| 546 | .parent = &clk_p, | ||
| 547 | .enable = s5pc1xx_clk_d14_ctrl, | ||
| 548 | .ctrlbit = S5PC100_CLKGATE_D14_UART0, | ||
| 549 | }, { | ||
| 550 | .name = "uart", | ||
| 551 | .id = 1, | ||
| 552 | .parent = &clk_p, | ||
| 553 | .enable = s5pc1xx_clk_d14_ctrl, | ||
| 554 | .ctrlbit = S5PC100_CLKGATE_D14_UART1, | ||
| 555 | }, { | ||
| 556 | .name = "uart", | ||
| 557 | .id = 2, | ||
| 558 | .parent = &clk_p, | ||
| 559 | .enable = s5pc1xx_clk_d14_ctrl, | ||
| 560 | .ctrlbit = S5PC100_CLKGATE_D14_UART2, | ||
| 561 | }, { | ||
| 562 | .name = "uart", | ||
| 563 | .id = 3, | ||
| 564 | .parent = &clk_p, | ||
| 565 | .enable = s5pc1xx_clk_d14_ctrl, | ||
| 566 | .ctrlbit = S5PC100_CLKGATE_D14_UART3, | ||
| 567 | }, { | ||
| 568 | .name = "i2c", | ||
| 569 | .id = -1, | ||
| 570 | .parent = &clk_p, | ||
| 571 | .enable = s5pc1xx_clk_d14_ctrl, | ||
| 572 | .ctrlbit = S5PC100_CLKGATE_D14_IIC, | ||
| 573 | }, { | ||
| 574 | .name = "hdmi-i2c", | ||
| 575 | .id = -1, | ||
| 576 | .parent = &clk_p, | ||
| 577 | .enable = s5pc1xx_clk_d14_ctrl, | ||
| 578 | .ctrlbit = S5PC100_CLKGATE_D14_HDMI_IIC, | ||
| 579 | }, { | ||
| 580 | .name = "spi", | ||
| 581 | .id = 0, | ||
| 582 | .parent = &clk_p, | ||
| 583 | .enable = s5pc1xx_clk_d14_ctrl, | ||
| 584 | .ctrlbit = S5PC100_CLKGATE_D14_SPI0, | ||
| 585 | }, { | ||
| 586 | .name = "spi", | ||
| 587 | .id = 1, | ||
| 588 | .parent = &clk_p, | ||
| 589 | .enable = s5pc1xx_clk_d14_ctrl, | ||
| 590 | .ctrlbit = S5PC100_CLKGATE_D14_SPI1, | ||
| 591 | }, { | ||
| 592 | .name = "spi", | ||
| 593 | .id = 2, | ||
| 594 | .parent = &clk_p, | ||
| 595 | .enable = s5pc1xx_clk_d14_ctrl, | ||
| 596 | .ctrlbit = S5PC100_CLKGATE_D14_SPI2, | ||
| 597 | }, { | ||
| 598 | .name = "irda", | ||
| 599 | .id = -1, | ||
| 600 | .parent = &clk_p, | ||
| 601 | .enable = s5pc1xx_clk_d14_ctrl, | ||
| 602 | .ctrlbit = S5PC100_CLKGATE_D14_IRDA, | ||
| 603 | }, { | ||
| 604 | .name = "hsitx", | ||
| 605 | .id = -1, | ||
| 606 | .parent = &clk_p, | ||
| 607 | .enable = s5pc1xx_clk_d14_ctrl, | ||
| 608 | .ctrlbit = S5PC100_CLKGATE_D14_HSITX, | ||
| 609 | }, { | ||
| 610 | .name = "hsirx", | ||
| 611 | .id = -1, | ||
| 612 | .parent = &clk_p, | ||
| 613 | .enable = s5pc1xx_clk_d14_ctrl, | ||
| 614 | .ctrlbit = S5PC100_CLKGATE_D14_HSIRX, | ||
| 615 | }, | ||
| 616 | 276 | ||
| 617 | /* Audio (D1_5) devices */ | 277 | ratio = __raw_readl(S5PC100_CLKDIV1) & S5PC100_CLKDIV1_D1_MASK; |
| 618 | { | 278 | ratio >>= S5PC100_CLKDIV1_D1_SHIFT; |
| 619 | .name = "iis", | ||
| 620 | .id = 0, | ||
| 621 | .parent = &clk_p, | ||
| 622 | .enable = s5pc1xx_clk_d15_ctrl, | ||
| 623 | .ctrlbit = S5PC100_CLKGATE_D15_IIS0, | ||
| 624 | }, { | ||
| 625 | .name = "iis", | ||
| 626 | .id = 1, | ||
| 627 | .parent = &clk_p, | ||
| 628 | .enable = s5pc1xx_clk_d15_ctrl, | ||
| 629 | .ctrlbit = S5PC100_CLKGATE_D15_IIS1, | ||
| 630 | }, { | ||
| 631 | .name = "iis", | ||
| 632 | .id = 2, | ||
| 633 | .parent = &clk_p, | ||
| 634 | .enable = s5pc1xx_clk_d15_ctrl, | ||
| 635 | .ctrlbit = S5PC100_CLKGATE_D15_IIS2, | ||
| 636 | }, { | ||
| 637 | .name = "ac97", | ||
| 638 | .id = -1, | ||
| 639 | .parent = &clk_p, | ||
| 640 | .enable = s5pc1xx_clk_d15_ctrl, | ||
| 641 | .ctrlbit = S5PC100_CLKGATE_D15_AC97, | ||
| 642 | }, { | ||
| 643 | .name = "pcm", | ||
| 644 | .id = 0, | ||
| 645 | .parent = &clk_p, | ||
| 646 | .enable = s5pc1xx_clk_d15_ctrl, | ||
| 647 | .ctrlbit = S5PC100_CLKGATE_D15_PCM0, | ||
| 648 | }, { | ||
| 649 | .name = "pcm", | ||
| 650 | .id = 1, | ||
| 651 | .parent = &clk_p, | ||
| 652 | .enable = s5pc1xx_clk_d15_ctrl, | ||
| 653 | .ctrlbit = S5PC100_CLKGATE_D15_PCM1, | ||
| 654 | }, { | ||
| 655 | .name = "spdif", | ||
| 656 | .id = -1, | ||
| 657 | .parent = &clk_p, | ||
| 658 | .enable = s5pc1xx_clk_d15_ctrl, | ||
| 659 | .ctrlbit = S5PC100_CLKGATE_D15_SPDIF, | ||
| 660 | }, { | ||
| 661 | .name = "adc", | ||
| 662 | .id = -1, | ||
| 663 | .parent = &clk_p, | ||
| 664 | .enable = s5pc1xx_clk_d15_ctrl, | ||
| 665 | .ctrlbit = S5PC100_CLKGATE_D15_TSADC, | ||
| 666 | }, { | ||
| 667 | .name = "keyif", | ||
| 668 | .id = -1, | ||
| 669 | .parent = &clk_p, | ||
| 670 | .enable = s5pc1xx_clk_d15_ctrl, | ||
| 671 | .ctrlbit = S5PC100_CLKGATE_D15_KEYIF, | ||
| 672 | }, { | ||
| 673 | .name = "cg", | ||
| 674 | .id = -1, | ||
| 675 | .parent = &clk_p, | ||
| 676 | .enable = s5pc1xx_clk_d15_ctrl, | ||
| 677 | .ctrlbit = S5PC100_CLKGATE_D15_CG, | ||
| 678 | }, | ||
| 679 | 279 | ||
| 680 | /* Audio (D2_0) devices: all disabled */ | 280 | return rate / (ratio + 1); |
| 281 | } | ||
| 681 | 282 | ||
| 682 | /* Special Clocks 1 */ | 283 | static struct clk clk_dout_d1_bus = { |
| 683 | { | 284 | .name = "dout_d1_bus", |
| 684 | .name = "sclk_hpm", | 285 | .id = -1, |
| 685 | .id = -1, | 286 | .parent = &clk_mout_am.clk, |
| 686 | .parent = NULL, | 287 | .get_rate = s5pc100_clk_dout_d1_bus_get_rate, |
| 687 | .enable = s5pc1xx_sclk0_ctrl, | 288 | }; |
| 688 | .ctrlbit = S5PC1XX_CLKGATE_SCLK0_HPM, | ||
| 689 | }, { | ||
| 690 | .name = "sclk_onenand", | ||
| 691 | .id = -1, | ||
| 692 | .parent = NULL, | ||
| 693 | .enable = s5pc1xx_sclk0_ctrl, | ||
| 694 | .ctrlbit = S5PC100_CLKGATE_SCLK0_ONENAND, | ||
| 695 | }, { | ||
| 696 | .name = "sclk_spi_48", | ||
| 697 | .id = 0, | ||
| 698 | .parent = &clk_48m, | ||
| 699 | .enable = s5pc1xx_sclk0_ctrl, | ||
| 700 | .ctrlbit = S5PC100_CLKGATE_SCLK0_SPI0_48, | ||
| 701 | }, { | ||
| 702 | .name = "sclk_spi_48", | ||
| 703 | .id = 1, | ||
| 704 | .parent = &clk_48m, | ||
| 705 | .enable = s5pc1xx_sclk0_ctrl, | ||
| 706 | .ctrlbit = S5PC100_CLKGATE_SCLK0_SPI1_48, | ||
| 707 | }, { | ||
| 708 | .name = "sclk_spi_48", | ||
| 709 | .id = 2, | ||
| 710 | .parent = &clk_48m, | ||
| 711 | .enable = s5pc1xx_sclk0_ctrl, | ||
| 712 | .ctrlbit = S5PC100_CLKGATE_SCLK0_SPI2_48, | ||
| 713 | }, { | ||
| 714 | .name = "sclk_mmc_48", | ||
| 715 | .id = 0, | ||
| 716 | .parent = &clk_48m, | ||
| 717 | .enable = s5pc1xx_sclk0_ctrl, | ||
| 718 | .ctrlbit = S5PC100_CLKGATE_SCLK0_MMC0_48, | ||
| 719 | }, { | ||
| 720 | .name = "sclk_mmc_48", | ||
| 721 | .id = 1, | ||
| 722 | .parent = &clk_48m, | ||
| 723 | .enable = s5pc1xx_sclk0_ctrl, | ||
| 724 | .ctrlbit = S5PC100_CLKGATE_SCLK0_MMC1_48, | ||
| 725 | }, { | ||
| 726 | .name = "sclk_mmc_48", | ||
| 727 | .id = 2, | ||
| 728 | .parent = &clk_48m, | ||
| 729 | .enable = s5pc1xx_sclk0_ctrl, | ||
| 730 | .ctrlbit = S5PC100_CLKGATE_SCLK0_MMC2_48, | ||
| 731 | }, | ||
| 732 | 289 | ||
| 733 | /* Special Clocks 2 */ | 290 | static struct clk *clkset_onenand_list[] = { |
| 734 | { | 291 | [0] = &clk_dout_d0_bus, |
| 735 | .name = "sclk_tv_54", | 292 | [1] = &clk_dout_d1_bus, |
| 736 | .id = -1, | 293 | }; |
| 737 | .parent = &clk_54m, | 294 | |
| 738 | .enable = s5pc1xx_sclk1_ctrl, | 295 | static struct clk_sources clk_src_onenand = { |
| 739 | .ctrlbit = S5PC100_CLKGATE_SCLK1_TV54, | 296 | .sources = clkset_onenand_list, |
| 740 | }, { | 297 | .nr_sources = ARRAY_SIZE(clkset_onenand_list), |
| 741 | .name = "sclk_vdac_54", | 298 | }; |
| 742 | .id = -1, | 299 | |
| 743 | .parent = &clk_54m, | 300 | static struct clksrc_clk clk_mout_onenand = { |
| 744 | .enable = s5pc1xx_sclk1_ctrl, | 301 | .clk = { |
| 745 | .ctrlbit = S5PC100_CLKGATE_SCLK1_VDAC54, | 302 | .name = "mout_onenand", |
| 746 | }, { | ||
| 747 | .name = "sclk_spdif", | ||
| 748 | .id = -1, | 303 | .id = -1, |
| 749 | .parent = NULL, | ||
| 750 | .enable = s5pc1xx_sclk1_ctrl, | ||
| 751 | .ctrlbit = S5PC100_CLKGATE_SCLK1_SPDIF, | ||
| 752 | }, | 304 | }, |
| 305 | .shift = S5PC100_CLKSRC0_ONENAND_SHIFT, | ||
| 306 | .mask = S5PC100_CLKSRC0_ONENAND_MASK, | ||
| 307 | .sources = &clk_src_onenand, | ||
| 308 | .reg_source = S5PC100_CLKSRC0, | ||
| 753 | }; | 309 | }; |
| 754 | 310 | ||
| 755 | void __init s5pc1xx_register_clocks(void) | 311 | static unsigned long s5pc100_clk_dout_pclkd1_get_rate(struct clk *clk) |
| 756 | { | 312 | { |
| 757 | struct clk *clkp; | 313 | unsigned long rate = clk_get_rate(clk->parent); |
| 758 | int ret; | 314 | unsigned int ratio; |
| 759 | int ptr; | ||
| 760 | 315 | ||
| 761 | clkp = init_clocks; | 316 | printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate); |
| 762 | for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++, clkp++) { | ||
| 763 | ret = s3c24xx_register_clock(clkp); | ||
| 764 | if (ret < 0) { | ||
| 765 | printk(KERN_ERR "Failed to register clock %s (%d)\n", | ||
| 766 | clkp->name, ret); | ||
| 767 | } | ||
| 768 | } | ||
| 769 | 317 | ||
| 770 | clkp = init_clocks_disable; | 318 | ratio = __raw_readl(S5PC100_CLKDIV1) & S5PC100_CLKDIV1_PCLKD1_MASK; |
| 771 | for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { | 319 | ratio >>= S5PC100_CLKDIV1_PCLKD1_SHIFT; |
| 772 | 320 | ||
| 773 | ret = s3c24xx_register_clock(clkp); | 321 | return rate / (ratio + 1); |
| 774 | if (ret < 0) { | 322 | } |
| 775 | printk(KERN_ERR "Failed to register clock %s (%d)\n", | ||
| 776 | clkp->name, ret); | ||
| 777 | } | ||
| 778 | 323 | ||
| 779 | (clkp->enable)(clkp, 0); | 324 | static struct clk clk_dout_pclkd1 = { |
| 780 | } | 325 | .name = "dout_pclkd1", |
| 326 | .id = -1, | ||
| 327 | .parent = &clk_dout_d1_bus, | ||
| 328 | .get_rate = s5pc100_clk_dout_pclkd1_get_rate, | ||
| 329 | }; | ||
| 330 | |||
| 331 | static unsigned long s5pc100_clk_dout_mpll2_get_rate(struct clk *clk) | ||
| 332 | { | ||
| 333 | unsigned long rate = clk_get_rate(clk->parent); | ||
| 334 | unsigned int ratio; | ||
| 335 | |||
| 336 | printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate); | ||
| 337 | |||
| 338 | ratio = __raw_readl(S5PC100_CLKDIV1) & S5PC100_CLKDIV1_MPLL2_MASK; | ||
| 339 | ratio >>= S5PC100_CLKDIV1_MPLL2_SHIFT; | ||
| 781 | 340 | ||
| 782 | s3c_pwmclk_init(); | 341 | return rate / (ratio + 1); |
| 783 | } | 342 | } |
| 784 | static struct clk clk_fout_apll = { | 343 | |
| 785 | .name = "fout_apll", | 344 | static struct clk clk_dout_mpll2 = { |
| 345 | .name = "dout_mpll2", | ||
| 786 | .id = -1, | 346 | .id = -1, |
| 347 | .parent = &clk_mout_am.clk, | ||
| 348 | .get_rate = s5pc100_clk_dout_mpll2_get_rate, | ||
| 787 | }; | 349 | }; |
| 788 | 350 | ||
| 789 | static struct clk *clk_src_apll_list[] = { | 351 | static unsigned long s5pc100_clk_dout_cam_get_rate(struct clk *clk) |
| 790 | [0] = &clk_fin_apll, | 352 | { |
| 791 | [1] = &clk_fout_apll, | 353 | unsigned long rate = clk_get_rate(clk->parent); |
| 792 | }; | 354 | unsigned int ratio; |
| 793 | 355 | ||
| 794 | static struct clk_sources clk_src_apll = { | 356 | printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate); |
| 795 | .sources = clk_src_apll_list, | 357 | |
| 796 | .nr_sources = ARRAY_SIZE(clk_src_apll_list), | 358 | ratio = __raw_readl(S5PC100_CLKDIV1) & S5PC100_CLKDIV1_CAM_MASK; |
| 359 | ratio >>= S5PC100_CLKDIV1_CAM_SHIFT; | ||
| 360 | |||
| 361 | return rate / (ratio + 1); | ||
| 362 | } | ||
| 363 | |||
| 364 | static struct clk clk_dout_cam = { | ||
| 365 | .name = "dout_cam", | ||
| 366 | .id = -1, | ||
| 367 | .parent = &clk_dout_mpll2, | ||
| 368 | .get_rate = s5pc100_clk_dout_cam_get_rate, | ||
| 797 | }; | 369 | }; |
| 798 | 370 | ||
| 799 | static struct clksrc_clk clk_mout_apll = { | 371 | static unsigned long s5pc100_clk_dout_mpll_get_rate(struct clk *clk) |
| 800 | .clk = { | 372 | { |
| 801 | .name = "mout_apll", | 373 | unsigned long rate = clk_get_rate(clk->parent); |
| 802 | .id = -1, | 374 | unsigned int ratio; |
| 803 | }, | 375 | |
| 804 | .shift = S5PC1XX_CLKSRC0_APLL_SHIFT, | 376 | printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate); |
| 805 | .mask = S5PC1XX_CLKSRC0_APLL_MASK, | 377 | |
| 806 | .sources = &clk_src_apll, | 378 | ratio = __raw_readl(S5PC100_CLKDIV1) & S5PC100_CLKDIV1_MPLL_MASK; |
| 807 | .reg_source = S5PC1XX_CLK_SRC0, | 379 | ratio >>= S5PC100_CLKDIV1_MPLL_SHIFT; |
| 380 | |||
| 381 | return rate / (ratio + 1); | ||
| 382 | } | ||
| 383 | |||
| 384 | static struct clk clk_dout_mpll = { | ||
| 385 | .name = "dout_mpll", | ||
| 386 | .id = -1, | ||
| 387 | .parent = &clk_mout_am.clk, | ||
| 388 | .get_rate = s5pc100_clk_dout_mpll_get_rate, | ||
| 808 | }; | 389 | }; |
| 809 | 390 | ||
| 391 | /* EPLL */ | ||
| 810 | static struct clk clk_fout_epll = { | 392 | static struct clk clk_fout_epll = { |
| 811 | .name = "fout_epll", | 393 | .name = "fout_epll", |
| 812 | .id = -1, | 394 | .id = -1, |
| @@ -827,91 +409,57 @@ static struct clksrc_clk clk_mout_epll = { | |||
| 827 | .name = "mout_epll", | 409 | .name = "mout_epll", |
| 828 | .id = -1, | 410 | .id = -1, |
| 829 | }, | 411 | }, |
| 830 | .shift = S5PC1XX_CLKSRC0_EPLL_SHIFT, | 412 | .shift = S5PC100_CLKSRC0_EPLL_SHIFT, |
| 831 | .mask = S5PC1XX_CLKSRC0_EPLL_MASK, | 413 | .mask = S5PC100_CLKSRC0_EPLL_MASK, |
| 832 | .sources = &clk_src_epll, | 414 | .sources = &clk_src_epll, |
| 833 | .reg_source = S5PC1XX_CLK_SRC0, | 415 | .reg_source = S5PC100_CLKSRC0, |
| 834 | }; | 416 | }; |
| 835 | 417 | ||
| 836 | static struct clk *clk_src_mpll_list[] = { | 418 | /* HPLL */ |
| 837 | [0] = &clk_fin_mpll, | 419 | static struct clk clk_fout_hpll = { |
| 838 | [1] = &clk_fout_mpll, | 420 | .name = "fout_hpll", |
| 839 | }; | ||
| 840 | |||
| 841 | static struct clk_sources clk_src_mpll = { | ||
| 842 | .sources = clk_src_mpll_list, | ||
| 843 | .nr_sources = ARRAY_SIZE(clk_src_mpll_list), | ||
| 844 | }; | ||
| 845 | |||
| 846 | static struct clksrc_clk clk_mout_mpll = { | ||
| 847 | .clk = { | ||
| 848 | .name = "mout_mpll", | ||
| 849 | .id = -1, | ||
| 850 | }, | ||
| 851 | .shift = S5PC1XX_CLKSRC0_MPLL_SHIFT, | ||
| 852 | .mask = S5PC1XX_CLKSRC0_MPLL_MASK, | ||
| 853 | .sources = &clk_src_mpll, | ||
| 854 | .reg_source = S5PC1XX_CLK_SRC0, | ||
| 855 | }; | ||
| 856 | |||
| 857 | static unsigned long s5pc1xx_clk_doutmpll_get_rate(struct clk *clk) | ||
| 858 | { | ||
| 859 | unsigned long rate = clk_get_rate(clk->parent); | ||
| 860 | unsigned long clkdiv; | ||
| 861 | |||
| 862 | printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate); | ||
| 863 | |||
| 864 | clkdiv = __raw_readl(S5PC1XX_CLK_DIV1) & S5PC100_CLKDIV1_MPLL_MASK; | ||
| 865 | rate /= (clkdiv >> S5PC100_CLKDIV1_MPLL_SHIFT) + 1; | ||
| 866 | |||
| 867 | return rate; | ||
| 868 | } | ||
| 869 | |||
| 870 | static struct clk clk_dout_mpll = { | ||
| 871 | .name = "dout_mpll", | ||
| 872 | .id = -1, | 421 | .id = -1, |
| 873 | .parent = &clk_mout_mpll.clk, | ||
| 874 | .get_rate = s5pc1xx_clk_doutmpll_get_rate, | ||
| 875 | }; | 422 | }; |
| 876 | 423 | ||
| 877 | static unsigned long s5pc1xx_clk_doutmpll2_get_rate(struct clk *clk) | 424 | static struct clk *clk_src_hpll_list[] = { |
| 878 | { | 425 | [0] = &clk_27m, |
| 879 | unsigned long rate = clk_get_rate(clk->parent); | 426 | [1] = &clk_fout_hpll, |
| 880 | unsigned long clkdiv; | ||
| 881 | |||
| 882 | printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate); | ||
| 883 | |||
| 884 | clkdiv = __raw_readl(S5PC1XX_CLK_DIV1) & S5PC100_CLKDIV1_MPLL2_MASK; | ||
| 885 | rate /= (clkdiv >> S5PC100_CLKDIV1_MPLL2_SHIFT) + 1; | ||
| 886 | |||
| 887 | return rate; | ||
| 888 | } | ||
| 889 | |||
| 890 | struct clk clk_dout_mpll2 = { | ||
| 891 | .name = "dout_mpll2", | ||
| 892 | .id = -1, | ||
| 893 | .parent = &clk_mout_mpll.clk, | ||
| 894 | .get_rate = s5pc1xx_clk_doutmpll2_get_rate, | ||
| 895 | }; | 427 | }; |
| 896 | 428 | ||
| 897 | static struct clk *clkset_uart_list[] = { | 429 | static struct clk_sources clk_src_hpll = { |
| 898 | &clk_mout_epll.clk, | 430 | .sources = clk_src_hpll_list, |
| 899 | &clk_dout_mpll, | 431 | .nr_sources = ARRAY_SIZE(clk_src_hpll_list), |
| 900 | NULL, | ||
| 901 | NULL | ||
| 902 | }; | 432 | }; |
| 903 | 433 | ||
| 904 | static struct clk_sources clkset_uart = { | 434 | static struct clksrc_clk clk_mout_hpll = { |
| 905 | .sources = clkset_uart_list, | 435 | .clk = { |
| 906 | .nr_sources = ARRAY_SIZE(clkset_uart_list), | 436 | .name = "mout_hpll", |
| 437 | .id = -1, | ||
| 438 | }, | ||
| 439 | .shift = S5PC100_CLKSRC0_HPLL_SHIFT, | ||
| 440 | .mask = S5PC100_CLKSRC0_HPLL_MASK, | ||
| 441 | .sources = &clk_src_hpll, | ||
| 442 | .reg_source = S5PC100_CLKSRC0, | ||
| 907 | }; | 443 | }; |
| 908 | 444 | ||
| 445 | /* Peripherals */ | ||
| 446 | /* | ||
| 447 | * The peripheral clocks are all controlled via clocksource followed | ||
| 448 | * by an optional divider and gate stage. We currently roll this into | ||
| 449 | * one clock which hides the intermediate clock from the mux. | ||
| 450 | * | ||
| 451 | * Note, the JPEG clock can only be an even divider... | ||
| 452 | * | ||
| 453 | * The scaler and LCD clocks depend on the S5PC100 version, and also | ||
| 454 | * have a common parent divisor so are not included here. | ||
| 455 | */ | ||
| 456 | |||
| 909 | static inline struct clksrc_clk *to_clksrc(struct clk *clk) | 457 | static inline struct clksrc_clk *to_clksrc(struct clk *clk) |
| 910 | { | 458 | { |
| 911 | return container_of(clk, struct clksrc_clk, clk); | 459 | return container_of(clk, struct clksrc_clk, clk); |
| 912 | } | 460 | } |
| 913 | 461 | ||
| 914 | static unsigned long s5pc1xx_getrate_clksrc(struct clk *clk) | 462 | static unsigned long s5pc100_getrate_clksrc(struct clk *clk) |
| 915 | { | 463 | { |
| 916 | struct clksrc_clk *sclk = to_clksrc(clk); | 464 | struct clksrc_clk *sclk = to_clksrc(clk); |
| 917 | unsigned long rate = clk_get_rate(clk->parent); | 465 | unsigned long rate = clk_get_rate(clk->parent); |
| @@ -925,7 +473,7 @@ static unsigned long s5pc1xx_getrate_clksrc(struct clk *clk) | |||
| 925 | return rate; | 473 | return rate; |
| 926 | } | 474 | } |
| 927 | 475 | ||
| 928 | static int s5pc1xx_setrate_clksrc(struct clk *clk, unsigned long rate) | 476 | static int s5pc100_setrate_clksrc(struct clk *clk, unsigned long rate) |
| 929 | { | 477 | { |
| 930 | struct clksrc_clk *sclk = to_clksrc(clk); | 478 | struct clksrc_clk *sclk = to_clksrc(clk); |
| 931 | void __iomem *reg = sclk->reg_divider; | 479 | void __iomem *reg = sclk->reg_divider; |
| @@ -938,14 +486,14 @@ static int s5pc1xx_setrate_clksrc(struct clk *clk, unsigned long rate) | |||
| 938 | return -EINVAL; | 486 | return -EINVAL; |
| 939 | 487 | ||
| 940 | val = __raw_readl(reg); | 488 | val = __raw_readl(reg); |
| 941 | val &= ~(0xf << sclk->shift); | 489 | val &= ~(0xf << sclk->divider_shift); |
| 942 | val |= (div - 1) << sclk->shift; | 490 | val |= (div - 1) << sclk->divider_shift; |
| 943 | __raw_writel(val, reg); | 491 | __raw_writel(val, reg); |
| 944 | 492 | ||
| 945 | return 0; | 493 | return 0; |
| 946 | } | 494 | } |
| 947 | 495 | ||
| 948 | static int s5pc1xx_setparent_clksrc(struct clk *clk, struct clk *parent) | 496 | static int s5pc100_setparent_clksrc(struct clk *clk, struct clk *parent) |
| 949 | { | 497 | { |
| 950 | struct clksrc_clk *sclk = to_clksrc(clk); | 498 | struct clksrc_clk *sclk = to_clksrc(clk); |
| 951 | struct clk_sources *srcs = sclk->sources; | 499 | struct clk_sources *srcs = sclk->sources; |
| @@ -970,7 +518,7 @@ static int s5pc1xx_setparent_clksrc(struct clk *clk, struct clk *parent) | |||
| 970 | return -EINVAL; | 518 | return -EINVAL; |
| 971 | } | 519 | } |
| 972 | 520 | ||
| 973 | static unsigned long s5pc1xx_roundrate_clksrc(struct clk *clk, | 521 | static unsigned long s5pc100_roundrate_clksrc(struct clk *clk, |
| 974 | unsigned long rate) | 522 | unsigned long rate) |
| 975 | { | 523 | { |
| 976 | unsigned long parent_rate = clk_get_rate(clk->parent); | 524 | unsigned long parent_rate = clk_get_rate(clk->parent); |
| @@ -992,35 +540,466 @@ static unsigned long s5pc1xx_roundrate_clksrc(struct clk *clk, | |||
| 992 | return rate; | 540 | return rate; |
| 993 | } | 541 | } |
| 994 | 542 | ||
| 543 | static struct clk *clkset_spi_list[] = { | ||
| 544 | &clk_mout_epll.clk, | ||
| 545 | &clk_dout_mpll2, | ||
| 546 | &clk_fin_epll, | ||
| 547 | &clk_mout_hpll.clk, | ||
| 548 | }; | ||
| 549 | |||
| 550 | static struct clk_sources clkset_spi = { | ||
| 551 | .sources = clkset_spi_list, | ||
| 552 | .nr_sources = ARRAY_SIZE(clkset_spi_list), | ||
| 553 | }; | ||
| 554 | |||
| 555 | static struct clksrc_clk clk_spi0 = { | ||
| 556 | .clk = { | ||
| 557 | .name = "spi_bus", | ||
| 558 | .id = 0, | ||
| 559 | .ctrlbit = S5PC100_CLKGATE_SCLK0_SPI0, | ||
| 560 | .enable = s5pc100_sclk0_ctrl, | ||
| 561 | .set_parent = s5pc100_setparent_clksrc, | ||
| 562 | .get_rate = s5pc100_getrate_clksrc, | ||
| 563 | .set_rate = s5pc100_setrate_clksrc, | ||
| 564 | .round_rate = s5pc100_roundrate_clksrc, | ||
| 565 | }, | ||
| 566 | .shift = S5PC100_CLKSRC1_SPI0_SHIFT, | ||
| 567 | .mask = S5PC100_CLKSRC1_SPI0_MASK, | ||
| 568 | .sources = &clkset_spi, | ||
| 569 | .divider_shift = S5PC100_CLKDIV2_SPI0_SHIFT, | ||
| 570 | .reg_divider = S5PC100_CLKDIV2, | ||
| 571 | .reg_source = S5PC100_CLKSRC1, | ||
| 572 | }; | ||
| 573 | |||
| 574 | static struct clksrc_clk clk_spi1 = { | ||
| 575 | .clk = { | ||
| 576 | .name = "spi_bus", | ||
| 577 | .id = 1, | ||
| 578 | .ctrlbit = S5PC100_CLKGATE_SCLK0_SPI1, | ||
| 579 | .enable = s5pc100_sclk0_ctrl, | ||
| 580 | .set_parent = s5pc100_setparent_clksrc, | ||
| 581 | .get_rate = s5pc100_getrate_clksrc, | ||
| 582 | .set_rate = s5pc100_setrate_clksrc, | ||
| 583 | .round_rate = s5pc100_roundrate_clksrc, | ||
| 584 | }, | ||
| 585 | .shift = S5PC100_CLKSRC1_SPI1_SHIFT, | ||
| 586 | .mask = S5PC100_CLKSRC1_SPI1_MASK, | ||
| 587 | .sources = &clkset_spi, | ||
| 588 | .divider_shift = S5PC100_CLKDIV2_SPI1_SHIFT, | ||
| 589 | .reg_divider = S5PC100_CLKDIV2, | ||
| 590 | .reg_source = S5PC100_CLKSRC1, | ||
| 591 | }; | ||
| 592 | |||
| 593 | static struct clksrc_clk clk_spi2 = { | ||
| 594 | .clk = { | ||
| 595 | .name = "spi_bus", | ||
| 596 | .id = 2, | ||
| 597 | .ctrlbit = S5PC100_CLKGATE_SCLK0_SPI2, | ||
| 598 | .enable = s5pc100_sclk0_ctrl, | ||
| 599 | .set_parent = s5pc100_setparent_clksrc, | ||
| 600 | .get_rate = s5pc100_getrate_clksrc, | ||
| 601 | .set_rate = s5pc100_setrate_clksrc, | ||
| 602 | .round_rate = s5pc100_roundrate_clksrc, | ||
| 603 | }, | ||
| 604 | .shift = S5PC100_CLKSRC1_SPI2_SHIFT, | ||
| 605 | .mask = S5PC100_CLKSRC1_SPI2_MASK, | ||
| 606 | .sources = &clkset_spi, | ||
| 607 | .divider_shift = S5PC100_CLKDIV2_SPI2_SHIFT, | ||
| 608 | .reg_divider = S5PC100_CLKDIV2, | ||
| 609 | .reg_source = S5PC100_CLKSRC1, | ||
| 610 | }; | ||
| 611 | |||
| 612 | static struct clk *clkset_uart_list[] = { | ||
| 613 | &clk_mout_epll.clk, | ||
| 614 | &clk_dout_mpll, | ||
| 615 | }; | ||
| 616 | |||
| 617 | static struct clk_sources clkset_uart = { | ||
| 618 | .sources = clkset_uart_list, | ||
| 619 | .nr_sources = ARRAY_SIZE(clkset_uart_list), | ||
| 620 | }; | ||
| 621 | |||
| 995 | static struct clksrc_clk clk_uart_uclk1 = { | 622 | static struct clksrc_clk clk_uart_uclk1 = { |
| 996 | .clk = { | 623 | .clk = { |
| 997 | .name = "uclk1", | 624 | .name = "uclk1", |
| 998 | .id = -1, | 625 | .id = -1, |
| 999 | .ctrlbit = S5PC100_CLKGATE_SCLK0_UART, | 626 | .ctrlbit = S5PC100_CLKGATE_SCLK0_UART, |
| 1000 | .enable = s5pc1xx_sclk0_ctrl, | 627 | .enable = s5pc100_sclk0_ctrl, |
| 1001 | .set_parent = s5pc1xx_setparent_clksrc, | 628 | .set_parent = s5pc100_setparent_clksrc, |
| 1002 | .get_rate = s5pc1xx_getrate_clksrc, | 629 | .get_rate = s5pc100_getrate_clksrc, |
| 1003 | .set_rate = s5pc1xx_setrate_clksrc, | 630 | .set_rate = s5pc100_setrate_clksrc, |
| 1004 | .round_rate = s5pc1xx_roundrate_clksrc, | 631 | .round_rate = s5pc100_roundrate_clksrc, |
| 1005 | }, | 632 | }, |
| 1006 | .shift = S5PC100_CLKSRC1_UART_SHIFT, | 633 | .shift = S5PC100_CLKSRC1_UART_SHIFT, |
| 1007 | .mask = S5PC100_CLKSRC1_UART_MASK, | 634 | .mask = S5PC100_CLKSRC1_UART_MASK, |
| 1008 | .sources = &clkset_uart, | 635 | .sources = &clkset_uart, |
| 1009 | .divider_shift = S5PC100_CLKDIV2_UART_SHIFT, | 636 | .divider_shift = S5PC100_CLKDIV2_UART_SHIFT, |
| 1010 | .reg_divider = S5PC1XX_CLK_DIV2, | 637 | .reg_divider = S5PC100_CLKDIV2, |
| 1011 | .reg_source = S5PC1XX_CLK_SRC1, | 638 | .reg_source = S5PC100_CLKSRC1, |
| 639 | }; | ||
| 640 | |||
| 641 | static struct clk clk_iis_cd0 = { | ||
| 642 | .name = "iis_cdclk0", | ||
| 643 | .id = -1, | ||
| 644 | }; | ||
| 645 | |||
| 646 | static struct clk clk_iis_cd1 = { | ||
| 647 | .name = "iis_cdclk1", | ||
| 648 | .id = -1, | ||
| 649 | }; | ||
| 650 | |||
| 651 | static struct clk clk_iis_cd2 = { | ||
| 652 | .name = "iis_cdclk2", | ||
| 653 | .id = -1, | ||
| 654 | }; | ||
| 655 | |||
| 656 | static struct clk clk_pcm_cd0 = { | ||
| 657 | .name = "pcm_cdclk0", | ||
| 658 | .id = -1, | ||
| 659 | }; | ||
| 660 | |||
| 661 | static struct clk clk_pcm_cd1 = { | ||
| 662 | .name = "pcm_cdclk1", | ||
| 663 | .id = -1, | ||
| 664 | }; | ||
| 665 | |||
| 666 | static struct clk *clkset_audio0_list[] = { | ||
| 667 | &clk_mout_epll.clk, | ||
| 668 | &clk_dout_mpll, | ||
| 669 | &clk_fin_epll, | ||
| 670 | &clk_iis_cd0, | ||
| 671 | &clk_pcm_cd0, | ||
| 672 | &clk_mout_hpll.clk, | ||
| 673 | }; | ||
| 674 | |||
| 675 | static struct clk_sources clkset_audio0 = { | ||
| 676 | .sources = clkset_audio0_list, | ||
| 677 | .nr_sources = ARRAY_SIZE(clkset_audio0_list), | ||
| 678 | }; | ||
| 679 | |||
| 680 | static struct clksrc_clk clk_audio0 = { | ||
| 681 | .clk = { | ||
| 682 | .name = "audio-bus", | ||
| 683 | .id = 0, | ||
| 684 | .ctrlbit = S5PC100_CLKGATE_SCLK1_AUDIO0, | ||
| 685 | .enable = s5pc100_sclk1_ctrl, | ||
| 686 | .set_parent = s5pc100_setparent_clksrc, | ||
| 687 | .get_rate = s5pc100_getrate_clksrc, | ||
| 688 | .set_rate = s5pc100_setrate_clksrc, | ||
| 689 | .round_rate = s5pc100_roundrate_clksrc, | ||
| 690 | }, | ||
| 691 | .shift = S5PC100_CLKSRC3_AUDIO0_SHIFT, | ||
| 692 | .mask = S5PC100_CLKSRC3_AUDIO0_MASK, | ||
| 693 | .sources = &clkset_audio0, | ||
| 694 | .divider_shift = S5PC100_CLKDIV4_AUDIO0_SHIFT, | ||
| 695 | .reg_divider = S5PC100_CLKDIV4, | ||
| 696 | .reg_source = S5PC100_CLKSRC3, | ||
| 697 | }; | ||
| 698 | |||
| 699 | static struct clk *clkset_audio1_list[] = { | ||
| 700 | &clk_mout_epll.clk, | ||
| 701 | &clk_dout_mpll, | ||
| 702 | &clk_fin_epll, | ||
| 703 | &clk_iis_cd1, | ||
| 704 | &clk_pcm_cd1, | ||
| 705 | &clk_mout_hpll.clk, | ||
| 706 | }; | ||
| 707 | |||
| 708 | static struct clk_sources clkset_audio1 = { | ||
| 709 | .sources = clkset_audio1_list, | ||
| 710 | .nr_sources = ARRAY_SIZE(clkset_audio1_list), | ||
| 711 | }; | ||
| 712 | |||
| 713 | static struct clksrc_clk clk_audio1 = { | ||
| 714 | .clk = { | ||
| 715 | .name = "audio-bus", | ||
| 716 | .id = 1, | ||
| 717 | .ctrlbit = S5PC100_CLKGATE_SCLK1_AUDIO1, | ||
| 718 | .enable = s5pc100_sclk1_ctrl, | ||
| 719 | .set_parent = s5pc100_setparent_clksrc, | ||
| 720 | .get_rate = s5pc100_getrate_clksrc, | ||
| 721 | .set_rate = s5pc100_setrate_clksrc, | ||
| 722 | .round_rate = s5pc100_roundrate_clksrc, | ||
| 723 | }, | ||
| 724 | .shift = S5PC100_CLKSRC3_AUDIO1_SHIFT, | ||
| 725 | .mask = S5PC100_CLKSRC3_AUDIO1_MASK, | ||
| 726 | .sources = &clkset_audio1, | ||
| 727 | .divider_shift = S5PC100_CLKDIV4_AUDIO1_SHIFT, | ||
| 728 | .reg_divider = S5PC100_CLKDIV4, | ||
| 729 | .reg_source = S5PC100_CLKSRC3, | ||
| 730 | }; | ||
| 731 | |||
| 732 | static struct clk *clkset_audio2_list[] = { | ||
| 733 | &clk_mout_epll.clk, | ||
| 734 | &clk_dout_mpll, | ||
| 735 | &clk_fin_epll, | ||
| 736 | &clk_iis_cd2, | ||
| 737 | &clk_mout_hpll.clk, | ||
| 738 | }; | ||
| 739 | |||
| 740 | static struct clk_sources clkset_audio2 = { | ||
| 741 | .sources = clkset_audio2_list, | ||
| 742 | .nr_sources = ARRAY_SIZE(clkset_audio2_list), | ||
| 743 | }; | ||
| 744 | |||
| 745 | static struct clksrc_clk clk_audio2 = { | ||
| 746 | .clk = { | ||
| 747 | .name = "audio-bus", | ||
| 748 | .id = 2, | ||
| 749 | .ctrlbit = S5PC100_CLKGATE_SCLK1_AUDIO2, | ||
| 750 | .enable = s5pc100_sclk1_ctrl, | ||
| 751 | .set_parent = s5pc100_setparent_clksrc, | ||
| 752 | .get_rate = s5pc100_getrate_clksrc, | ||
| 753 | .set_rate = s5pc100_setrate_clksrc, | ||
| 754 | .round_rate = s5pc100_roundrate_clksrc, | ||
| 755 | }, | ||
| 756 | .shift = S5PC100_CLKSRC3_AUDIO2_SHIFT, | ||
| 757 | .mask = S5PC100_CLKSRC3_AUDIO2_MASK, | ||
| 758 | .sources = &clkset_audio2, | ||
| 759 | .divider_shift = S5PC100_CLKDIV4_AUDIO2_SHIFT, | ||
| 760 | .reg_divider = S5PC100_CLKDIV4, | ||
| 761 | .reg_source = S5PC100_CLKSRC3, | ||
| 762 | }; | ||
| 763 | |||
| 764 | static struct clk *clkset_spdif_list[] = { | ||
| 765 | &clk_audio0.clk, | ||
| 766 | &clk_audio1.clk, | ||
| 767 | &clk_audio2.clk, | ||
| 768 | }; | ||
| 769 | |||
| 770 | static struct clk_sources clkset_spdif = { | ||
| 771 | .sources = clkset_spdif_list, | ||
| 772 | .nr_sources = ARRAY_SIZE(clkset_spdif_list), | ||
| 773 | }; | ||
| 774 | |||
| 775 | static struct clksrc_clk clk_spdif = { | ||
| 776 | .clk = { | ||
| 777 | .name = "spdif", | ||
| 778 | .id = -1, | ||
| 779 | }, | ||
| 780 | .shift = S5PC100_CLKSRC3_SPDIF_SHIFT, | ||
| 781 | .mask = S5PC100_CLKSRC3_SPDIF_MASK, | ||
| 782 | .sources = &clkset_spdif, | ||
| 783 | .reg_source = S5PC100_CLKSRC3, | ||
| 784 | }; | ||
| 785 | |||
| 786 | static struct clk *clkset_lcd_fimc_list[] = { | ||
| 787 | &clk_mout_epll.clk, | ||
| 788 | &clk_dout_mpll, | ||
| 789 | &clk_mout_hpll.clk, | ||
| 790 | &clk_vclk_54m, | ||
| 791 | }; | ||
| 792 | |||
| 793 | static struct clk_sources clkset_lcd_fimc = { | ||
| 794 | .sources = clkset_lcd_fimc_list, | ||
| 795 | .nr_sources = ARRAY_SIZE(clkset_lcd_fimc_list), | ||
| 796 | }; | ||
| 797 | |||
| 798 | static struct clksrc_clk clk_lcd = { | ||
| 799 | .clk = { | ||
| 800 | .name = "lcd", | ||
| 801 | .id = -1, | ||
| 802 | .ctrlbit = S5PC100_CLKGATE_SCLK1_LCD, | ||
| 803 | .enable = s5pc100_sclk1_ctrl, | ||
| 804 | .set_parent = s5pc100_setparent_clksrc, | ||
| 805 | .get_rate = s5pc100_getrate_clksrc, | ||
| 806 | .set_rate = s5pc100_setrate_clksrc, | ||
| 807 | .round_rate = s5pc100_roundrate_clksrc, | ||
| 808 | }, | ||
| 809 | .shift = S5PC100_CLKSRC2_LCD_SHIFT, | ||
| 810 | .mask = S5PC100_CLKSRC2_LCD_MASK, | ||
| 811 | .sources = &clkset_lcd_fimc, | ||
| 812 | .divider_shift = S5PC100_CLKDIV3_LCD_SHIFT, | ||
| 813 | .reg_divider = S5PC100_CLKDIV3, | ||
| 814 | .reg_source = S5PC100_CLKSRC2, | ||
| 815 | }; | ||
| 816 | |||
| 817 | static struct clksrc_clk clk_fimc0 = { | ||
| 818 | .clk = { | ||
| 819 | .name = "fimc", | ||
| 820 | .id = 0, | ||
| 821 | .ctrlbit = S5PC100_CLKGATE_SCLK1_FIMC0, | ||
| 822 | .enable = s5pc100_sclk1_ctrl, | ||
| 823 | .set_parent = s5pc100_setparent_clksrc, | ||
| 824 | .get_rate = s5pc100_getrate_clksrc, | ||
| 825 | .set_rate = s5pc100_setrate_clksrc, | ||
| 826 | .round_rate = s5pc100_roundrate_clksrc, | ||
| 827 | }, | ||
| 828 | .shift = S5PC100_CLKSRC2_FIMC0_SHIFT, | ||
| 829 | .mask = S5PC100_CLKSRC2_FIMC0_MASK, | ||
| 830 | .sources = &clkset_lcd_fimc, | ||
| 831 | .divider_shift = S5PC100_CLKDIV3_FIMC0_SHIFT, | ||
| 832 | .reg_divider = S5PC100_CLKDIV3, | ||
| 833 | .reg_source = S5PC100_CLKSRC2, | ||
| 834 | }; | ||
| 835 | |||
| 836 | static struct clksrc_clk clk_fimc1 = { | ||
| 837 | .clk = { | ||
| 838 | .name = "fimc", | ||
| 839 | .id = 1, | ||
| 840 | .ctrlbit = S5PC100_CLKGATE_SCLK1_FIMC1, | ||
| 841 | .enable = s5pc100_sclk1_ctrl, | ||
| 842 | .set_parent = s5pc100_setparent_clksrc, | ||
| 843 | .get_rate = s5pc100_getrate_clksrc, | ||
| 844 | .set_rate = s5pc100_setrate_clksrc, | ||
| 845 | .round_rate = s5pc100_roundrate_clksrc, | ||
| 846 | }, | ||
| 847 | .shift = S5PC100_CLKSRC2_FIMC1_SHIFT, | ||
| 848 | .mask = S5PC100_CLKSRC2_FIMC1_MASK, | ||
| 849 | .sources = &clkset_lcd_fimc, | ||
| 850 | .divider_shift = S5PC100_CLKDIV3_FIMC1_SHIFT, | ||
| 851 | .reg_divider = S5PC100_CLKDIV3, | ||
| 852 | .reg_source = S5PC100_CLKSRC2, | ||
| 853 | }; | ||
| 854 | |||
| 855 | static struct clksrc_clk clk_fimc2 = { | ||
| 856 | .clk = { | ||
| 857 | .name = "fimc", | ||
| 858 | .id = 2, | ||
| 859 | .ctrlbit = S5PC100_CLKGATE_SCLK1_FIMC2, | ||
| 860 | .enable = s5pc100_sclk1_ctrl, | ||
| 861 | .set_parent = s5pc100_setparent_clksrc, | ||
| 862 | .get_rate = s5pc100_getrate_clksrc, | ||
| 863 | .set_rate = s5pc100_setrate_clksrc, | ||
| 864 | .round_rate = s5pc100_roundrate_clksrc, | ||
| 865 | }, | ||
| 866 | .shift = S5PC100_CLKSRC2_FIMC2_SHIFT, | ||
| 867 | .mask = S5PC100_CLKSRC2_FIMC2_MASK, | ||
| 868 | .sources = &clkset_lcd_fimc, | ||
| 869 | .divider_shift = S5PC100_CLKDIV3_FIMC2_SHIFT, | ||
| 870 | .reg_divider = S5PC100_CLKDIV3, | ||
| 871 | .reg_source = S5PC100_CLKSRC2, | ||
| 872 | }; | ||
| 873 | |||
| 874 | static struct clk *clkset_mmc_list[] = { | ||
| 875 | &clk_mout_epll.clk, | ||
| 876 | &clk_dout_mpll, | ||
| 877 | &clk_fin_epll, | ||
| 878 | &clk_mout_hpll.clk , | ||
| 879 | }; | ||
| 880 | |||
| 881 | static struct clk_sources clkset_mmc = { | ||
| 882 | .sources = clkset_mmc_list, | ||
| 883 | .nr_sources = ARRAY_SIZE(clkset_mmc_list), | ||
| 884 | }; | ||
| 885 | |||
| 886 | static struct clksrc_clk clk_mmc0 = { | ||
| 887 | .clk = { | ||
| 888 | .name = "mmc_bus", | ||
| 889 | .id = 0, | ||
| 890 | .ctrlbit = S5PC100_CLKGATE_SCLK0_MMC0, | ||
| 891 | .enable = s5pc100_sclk0_ctrl, | ||
| 892 | .set_parent = s5pc100_setparent_clksrc, | ||
| 893 | .get_rate = s5pc100_getrate_clksrc, | ||
| 894 | .set_rate = s5pc100_setrate_clksrc, | ||
| 895 | .round_rate = s5pc100_roundrate_clksrc, | ||
| 896 | }, | ||
| 897 | .shift = S5PC100_CLKSRC2_MMC0_SHIFT, | ||
| 898 | .mask = S5PC100_CLKSRC2_MMC0_MASK, | ||
| 899 | .sources = &clkset_mmc, | ||
| 900 | .divider_shift = S5PC100_CLKDIV3_MMC0_SHIFT, | ||
| 901 | .reg_divider = S5PC100_CLKDIV3, | ||
| 902 | .reg_source = S5PC100_CLKSRC2, | ||
| 903 | }; | ||
| 904 | |||
| 905 | static struct clksrc_clk clk_mmc1 = { | ||
| 906 | .clk = { | ||
| 907 | .name = "mmc_bus", | ||
| 908 | .id = 1, | ||
| 909 | .ctrlbit = S5PC100_CLKGATE_SCLK0_MMC1, | ||
| 910 | .enable = s5pc100_sclk0_ctrl, | ||
| 911 | .set_parent = s5pc100_setparent_clksrc, | ||
| 912 | .get_rate = s5pc100_getrate_clksrc, | ||
| 913 | .set_rate = s5pc100_setrate_clksrc, | ||
| 914 | .round_rate = s5pc100_roundrate_clksrc, | ||
| 915 | }, | ||
| 916 | .shift = S5PC100_CLKSRC2_MMC1_SHIFT, | ||
| 917 | .mask = S5PC100_CLKSRC2_MMC1_MASK, | ||
| 918 | .sources = &clkset_mmc, | ||
| 919 | .divider_shift = S5PC100_CLKDIV3_MMC1_SHIFT, | ||
| 920 | .reg_divider = S5PC100_CLKDIV3, | ||
| 921 | .reg_source = S5PC100_CLKSRC2, | ||
| 922 | }; | ||
| 923 | |||
| 924 | static struct clksrc_clk clk_mmc2 = { | ||
| 925 | .clk = { | ||
| 926 | .name = "mmc_bus", | ||
| 927 | .id = 2, | ||
| 928 | .ctrlbit = S5PC100_CLKGATE_SCLK0_MMC2, | ||
| 929 | .enable = s5pc100_sclk0_ctrl, | ||
| 930 | .set_parent = s5pc100_setparent_clksrc, | ||
| 931 | .get_rate = s5pc100_getrate_clksrc, | ||
| 932 | .set_rate = s5pc100_setrate_clksrc, | ||
| 933 | .round_rate = s5pc100_roundrate_clksrc, | ||
| 934 | }, | ||
| 935 | .shift = S5PC100_CLKSRC2_MMC2_SHIFT, | ||
| 936 | .mask = S5PC100_CLKSRC2_MMC2_MASK, | ||
| 937 | .sources = &clkset_mmc, | ||
| 938 | .divider_shift = S5PC100_CLKDIV3_MMC2_SHIFT, | ||
| 939 | .reg_divider = S5PC100_CLKDIV3, | ||
| 940 | .reg_source = S5PC100_CLKSRC2, | ||
| 941 | }; | ||
| 942 | |||
| 943 | |||
| 944 | static struct clk *clkset_usbhost_list[] = { | ||
| 945 | &clk_mout_epll.clk, | ||
| 946 | &clk_dout_mpll, | ||
| 947 | &clk_mout_hpll.clk, | ||
| 948 | &clk_48m, | ||
| 949 | }; | ||
| 950 | |||
| 951 | static struct clk_sources clkset_usbhost = { | ||
| 952 | .sources = clkset_usbhost_list, | ||
| 953 | .nr_sources = ARRAY_SIZE(clkset_usbhost_list), | ||
| 954 | }; | ||
| 955 | |||
| 956 | static struct clksrc_clk clk_usbhost = { | ||
| 957 | .clk = { | ||
| 958 | .name = "usbhost", | ||
| 959 | .id = -1, | ||
| 960 | .ctrlbit = S5PC100_CLKGATE_SCLK0_USBHOST, | ||
| 961 | .enable = s5pc100_sclk0_ctrl, | ||
| 962 | .set_parent = s5pc100_setparent_clksrc, | ||
| 963 | .get_rate = s5pc100_getrate_clksrc, | ||
| 964 | .set_rate = s5pc100_setrate_clksrc, | ||
| 965 | .round_rate = s5pc100_roundrate_clksrc, | ||
| 966 | }, | ||
| 967 | .shift = S5PC100_CLKSRC1_UHOST_SHIFT, | ||
| 968 | .mask = S5PC100_CLKSRC1_UHOST_MASK, | ||
| 969 | .sources = &clkset_usbhost, | ||
| 970 | .divider_shift = S5PC100_CLKDIV2_UHOST_SHIFT, | ||
| 971 | .reg_divider = S5PC100_CLKDIV2, | ||
| 972 | .reg_source = S5PC100_CLKSRC1, | ||
| 1012 | }; | 973 | }; |
| 1013 | 974 | ||
| 1014 | /* Clock initialisation code */ | 975 | /* Clock initialisation code */ |
| 1015 | 976 | ||
| 1016 | static struct clksrc_clk *init_parents[] = { | 977 | static struct clksrc_clk *init_parents[] = { |
| 1017 | &clk_mout_apll, | 978 | &clk_mout_apll, |
| 1018 | &clk_mout_epll, | ||
| 1019 | &clk_mout_mpll, | 979 | &clk_mout_mpll, |
| 980 | &clk_mout_am, | ||
| 981 | &clk_mout_onenand, | ||
| 982 | &clk_mout_epll, | ||
| 983 | &clk_mout_hpll, | ||
| 984 | &clk_spi0, | ||
| 985 | &clk_spi1, | ||
| 986 | &clk_spi2, | ||
| 1020 | &clk_uart_uclk1, | 987 | &clk_uart_uclk1, |
| 988 | &clk_audio0, | ||
| 989 | &clk_audio1, | ||
| 990 | &clk_audio2, | ||
| 991 | &clk_spdif, | ||
| 992 | &clk_lcd, | ||
| 993 | &clk_fimc0, | ||
| 994 | &clk_fimc1, | ||
| 995 | &clk_fimc2, | ||
| 996 | &clk_mmc0, | ||
| 997 | &clk_mmc1, | ||
| 998 | &clk_mmc2, | ||
| 999 | &clk_usbhost, | ||
| 1021 | }; | 1000 | }; |
| 1022 | 1001 | ||
| 1023 | static void __init_or_cpufreq s5pc1xx_set_clksrc(struct clksrc_clk *clk) | 1002 | static void __init_or_cpufreq s5pc100_set_clksrc(struct clksrc_clk *clk) |
| 1024 | { | 1003 | { |
| 1025 | struct clk_sources *srcs = clk->sources; | 1004 | struct clk_sources *srcs = clk->sources; |
| 1026 | u32 clksrc = __raw_readl(clk->reg_source); | 1005 | u32 clksrc = __raw_readl(clk->reg_source); |
| @@ -1036,9 +1015,9 @@ static void __init_or_cpufreq s5pc1xx_set_clksrc(struct clksrc_clk *clk) | |||
| 1036 | 1015 | ||
| 1037 | clk->clk.parent = srcs->sources[clksrc]; | 1016 | clk->clk.parent = srcs->sources[clksrc]; |
| 1038 | 1017 | ||
| 1039 | printk(KERN_INFO "%s: source is %s (%d), rate is %ld\n", | 1018 | printk(KERN_INFO "%s: source is %s (%d), rate is %ld.%03ld MHz\n", |
| 1040 | clk->clk.name, clk->clk.parent->name, clksrc, | 1019 | clk->clk.name, clk->clk.parent->name, clksrc, |
| 1041 | clk_get_rate(&clk->clk)); | 1020 | print_mhz(clk_get_rate(&clk->clk))); |
| 1042 | } | 1021 | } |
| 1043 | 1022 | ||
| 1044 | #define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1) | 1023 | #define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1) |
| @@ -1052,20 +1031,16 @@ void __init_or_cpufreq s5pc100_setup_clocks(void) | |||
| 1052 | unsigned long hclk; | 1031 | unsigned long hclk; |
| 1053 | unsigned long pclkd0; | 1032 | unsigned long pclkd0; |
| 1054 | unsigned long pclk; | 1033 | unsigned long pclk; |
| 1055 | unsigned long apll; | 1034 | unsigned long apll, mpll, epll, hpll; |
| 1056 | unsigned long mpll; | ||
| 1057 | unsigned long hpll; | ||
| 1058 | unsigned long epll; | ||
| 1059 | unsigned int ptr; | 1035 | unsigned int ptr; |
| 1060 | u32 clkdiv0, clkdiv1; | 1036 | u32 clkdiv0, clkdiv1; |
| 1061 | 1037 | ||
| 1062 | printk(KERN_DEBUG "%s: registering clocks\n", __func__); | 1038 | printk(KERN_DEBUG "%s: registering clocks\n", __func__); |
| 1063 | 1039 | ||
| 1064 | clkdiv0 = __raw_readl(S5PC1XX_CLK_DIV0); | 1040 | clkdiv0 = __raw_readl(S5PC100_CLKDIV0); |
| 1065 | clkdiv1 = __raw_readl(S5PC1XX_CLK_DIV1); | 1041 | clkdiv1 = __raw_readl(S5PC100_CLKDIV1); |
| 1066 | 1042 | ||
| 1067 | printk(KERN_DEBUG "%s: clkdiv0 = %08x, clkdiv1 = %08x\n", | 1043 | printk(KERN_DEBUG "%s: clkdiv0 = %08x, clkdiv1 = %08x\n", __func__, clkdiv0, clkdiv1); |
| 1068 | __func__, clkdiv0, clkdiv1); | ||
| 1069 | 1044 | ||
| 1070 | xtal_clk = clk_get(NULL, "xtal"); | 1045 | xtal_clk = clk_get(NULL, "xtal"); |
| 1071 | BUG_ON(IS_ERR(xtal_clk)); | 1046 | BUG_ON(IS_ERR(xtal_clk)); |
| @@ -1075,48 +1050,81 @@ void __init_or_cpufreq s5pc100_setup_clocks(void) | |||
| 1075 | 1050 | ||
| 1076 | printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal); | 1051 | printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal); |
| 1077 | 1052 | ||
| 1078 | apll = s5pc1xx_get_pll(xtal, __raw_readl(S5PC1XX_APLL_CON)); | 1053 | apll = s5pc1xx_get_pll(xtal, __raw_readl(S5PC100_APLL_CON)); |
| 1079 | mpll = s5pc1xx_get_pll(xtal, __raw_readl(S5PC1XX_MPLL_CON)); | 1054 | mpll = s5pc1xx_get_pll(xtal, __raw_readl(S5PC100_MPLL_CON)); |
| 1080 | epll = s5pc1xx_get_pll(xtal, __raw_readl(S5PC1XX_EPLL_CON)); | 1055 | epll = s5pc1xx_get_pll(xtal, __raw_readl(S5PC100_EPLL_CON)); |
| 1081 | hpll = s5pc1xx_get_pll(xtal, __raw_readl(S5PC100_HPLL_CON)); | 1056 | hpll = s5pc1xx_get_pll(xtal, __raw_readl(S5PC100_HPLL_CON)); |
| 1082 | 1057 | ||
| 1083 | printk(KERN_INFO "S5PC100: PLL settings, A=%ld, M=%ld, E=%ld, H=%ld\n", | 1058 | printk(KERN_INFO "S5PC100: Apll=%ld.%03ld Mhz, Mpll=%ld.%03ld Mhz" |
| 1084 | apll, mpll, epll, hpll); | 1059 | ", Epll=%ld.%03ld Mhz, Hpll=%ld.%03ld Mhz\n", |
| 1060 | print_mhz(apll), print_mhz(mpll), | ||
| 1061 | print_mhz(epll), print_mhz(hpll)); | ||
| 1085 | 1062 | ||
| 1086 | armclk = apll / GET_DIV(clkdiv0, S5PC1XX_CLKDIV0_APLL); | 1063 | armclk = apll / GET_DIV(clkdiv0, S5PC100_CLKDIV0_APLL); |
| 1087 | armclk = armclk / GET_DIV(clkdiv0, S5PC100_CLKDIV0_ARM); | 1064 | armclk = armclk / GET_DIV(clkdiv0, S5PC100_CLKDIV0_ARM); |
| 1088 | hclkd0 = armclk / GET_DIV(clkdiv0, S5PC100_CLKDIV0_D0); | 1065 | hclkd0 = armclk / GET_DIV(clkdiv0, S5PC100_CLKDIV0_D0); |
| 1089 | pclkd0 = hclkd0 / GET_DIV(clkdiv0, S5PC100_CLKDIV0_PCLKD0); | 1066 | pclkd0 = hclkd0 / GET_DIV(clkdiv0, S5PC100_CLKDIV0_PCLKD0); |
| 1090 | hclk = mpll / GET_DIV(clkdiv1, S5PC100_CLKDIV1_D1); | 1067 | hclk = mpll / GET_DIV(clkdiv1, S5PC100_CLKDIV1_D1); |
| 1091 | pclk = hclk / GET_DIV(clkdiv1, S5PC100_CLKDIV1_PCLKD1); | 1068 | pclk = hclk / GET_DIV(clkdiv1, S5PC100_CLKDIV1_PCLKD1); |
| 1092 | 1069 | ||
| 1093 | printk(KERN_INFO "S5PC100: ARMCLK=%ld, HCLKD0=%ld, PCLKD0=%ld, HCLK=%ld, PCLK=%ld\n", | 1070 | printk(KERN_INFO "S5PC100: ARMCLK=%ld.%03ld MHz, HCLKD0=%ld.%03ld MHz," |
| 1094 | armclk, hclkd0, pclkd0, hclk, pclk); | 1071 | " PCLKD0=%ld.%03ld MHz\n, HCLK=%ld.%03ld MHz," |
| 1072 | " PCLK=%ld.%03ld MHz\n", | ||
| 1073 | print_mhz(armclk), print_mhz(hclkd0), | ||
| 1074 | print_mhz(pclkd0), print_mhz(hclk), print_mhz(pclk)); | ||
| 1095 | 1075 | ||
| 1096 | clk_fout_apll.rate = apll; | 1076 | clk_fout_apll.rate = apll; |
| 1097 | clk_fout_mpll.rate = mpll; | 1077 | clk_fout_mpll.rate = mpll; |
| 1098 | clk_fout_epll.rate = epll; | 1078 | clk_fout_epll.rate = epll; |
| 1099 | clk_fout_apll.rate = apll; | 1079 | clk_fout_hpll.rate = hpll; |
| 1100 | 1080 | ||
| 1101 | clk_h.rate = hclk; | 1081 | clk_h.rate = hclk; |
| 1102 | clk_p.rate = pclk; | 1082 | clk_p.rate = pclk; |
| 1083 | clk_f.rate = armclk; | ||
| 1103 | 1084 | ||
| 1104 | for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++) | 1085 | for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++) |
| 1105 | s5pc1xx_set_clksrc(init_parents[ptr]); | 1086 | s5pc100_set_clksrc(init_parents[ptr]); |
| 1106 | } | 1087 | } |
| 1107 | 1088 | ||
| 1108 | static struct clk *clks[] __initdata = { | 1089 | static struct clk *clks[] __initdata = { |
| 1109 | &clk_ext_xtal_mux, | 1090 | &clk_ext_xtal_mux, |
| 1110 | &clk_mout_epll.clk, | 1091 | &clk_mout_apll.clk, |
| 1111 | &clk_fout_epll, | 1092 | &clk_dout_apll, |
| 1093 | &clk_dout_d0_bus, | ||
| 1094 | &clk_dout_pclkd0, | ||
| 1095 | &clk_dout_apll2, | ||
| 1112 | &clk_mout_mpll.clk, | 1096 | &clk_mout_mpll.clk, |
| 1097 | &clk_mout_am.clk, | ||
| 1098 | &clk_dout_d1_bus, | ||
| 1099 | &clk_mout_onenand.clk, | ||
| 1100 | &clk_dout_pclkd1, | ||
| 1101 | &clk_dout_mpll2, | ||
| 1102 | &clk_dout_cam, | ||
| 1113 | &clk_dout_mpll, | 1103 | &clk_dout_mpll, |
| 1104 | &clk_mout_epll.clk, | ||
| 1105 | &clk_fout_epll, | ||
| 1106 | &clk_iis_cd0, | ||
| 1107 | &clk_iis_cd1, | ||
| 1108 | &clk_iis_cd2, | ||
| 1109 | &clk_pcm_cd0, | ||
| 1110 | &clk_pcm_cd1, | ||
| 1111 | &clk_spi0.clk, | ||
| 1112 | &clk_spi1.clk, | ||
| 1113 | &clk_spi2.clk, | ||
| 1114 | &clk_uart_uclk1.clk, | 1114 | &clk_uart_uclk1.clk, |
| 1115 | &clk_ext, | 1115 | &clk_audio0.clk, |
| 1116 | &clk_epll, | 1116 | &clk_audio1.clk, |
| 1117 | &clk_27m, | 1117 | &clk_audio2.clk, |
| 1118 | &clk_48m, | 1118 | &clk_spdif.clk, |
| 1119 | &clk_54m, | 1119 | &clk_lcd.clk, |
| 1120 | &clk_fimc0.clk, | ||
| 1121 | &clk_fimc1.clk, | ||
| 1122 | &clk_fimc2.clk, | ||
| 1123 | &clk_mmc0.clk, | ||
| 1124 | &clk_mmc1.clk, | ||
| 1125 | &clk_mmc2.clk, | ||
| 1126 | &clk_usbhost.clk, | ||
| 1127 | &clk_arm, | ||
| 1120 | }; | 1128 | }; |
| 1121 | 1129 | ||
| 1122 | void __init s5pc100_register_clocks(void) | 1130 | void __init s5pc100_register_clocks(void) |
| @@ -1133,7 +1141,4 @@ void __init s5pc100_register_clocks(void) | |||
| 1133 | clkp->name, ret); | 1141 | clkp->name, ret); |
| 1134 | } | 1142 | } |
| 1135 | } | 1143 | } |
| 1136 | |||
| 1137 | clk_mpll.parent = &clk_mout_mpll.clk; | ||
| 1138 | clk_epll.parent = &clk_mout_epll.clk; | ||
| 1139 | } | 1144 | } |
diff --git a/arch/arm/plat-s5pc1xx/setup-fb-24bpp.c b/arch/arm/plat-s5pc1xx/setup-fb-24bpp.c new file mode 100644 index 00000000000..1a63768a9a2 --- /dev/null +++ b/arch/arm/plat-s5pc1xx/setup-fb-24bpp.c | |||
| @@ -0,0 +1,49 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/plat-s5pc100/setup-fb-24bpp.c | ||
| 3 | * | ||
| 4 | * Copyright 2009 Samsung Electronics | ||
| 5 | * | ||
| 6 | * Base S5PC1XX setup information for 24bpp LCD framebuffer | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/kernel.h> | ||
| 14 | #include <linux/types.h> | ||
| 15 | #include <linux/fb.h> | ||
| 16 | #include <linux/gpio.h> | ||
| 17 | |||
| 18 | #include <mach/regs-fb.h> | ||
| 19 | #include <mach/map.h> | ||
| 20 | #include <plat/fb.h> | ||
| 21 | #include <plat/gpio-cfg.h> | ||
| 22 | #include <plat/gpio-cfg-s5pc1xx.h> | ||
| 23 | |||
| 24 | #define DISR_OFFSET 0x7008 | ||
| 25 | |||
| 26 | void s5pc100_fb_gpio_setup_24bpp(void) | ||
| 27 | { | ||
| 28 | unsigned int gpio = 0; | ||
| 29 | |||
| 30 | for (gpio = S5PC100_GPF0(0); gpio <= S5PC100_GPF0(7); gpio++) { | ||
| 31 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
| 32 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 33 | } | ||
| 34 | |||
| 35 | for (gpio = S5PC100_GPF1(0); gpio <= S5PC100_GPF1(7); gpio++) { | ||
| 36 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
| 37 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 38 | } | ||
| 39 | |||
| 40 | for (gpio = S5PC100_GPF2(0); gpio <= S5PC100_GPF2(7); gpio++) { | ||
| 41 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
| 42 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 43 | } | ||
| 44 | |||
| 45 | for (gpio = S5PC100_GPF3(0); gpio <= S5PC100_GPF3(3); gpio++) { | ||
| 46 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
| 47 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 48 | } | ||
| 49 | } | ||
diff --git a/arch/arm/plat-s5pc1xx/setup-i2c0.c b/arch/arm/plat-s5pc1xx/setup-i2c0.c index 3d00c025fff..5e4a7c3a231 100644 --- a/arch/arm/plat-s5pc1xx/setup-i2c0.c +++ b/arch/arm/plat-s5pc1xx/setup-i2c0.c | |||
| @@ -17,9 +17,14 @@ | |||
| 17 | 17 | ||
| 18 | struct platform_device; /* don't need the contents */ | 18 | struct platform_device; /* don't need the contents */ |
| 19 | 19 | ||
| 20 | #include <linux/gpio.h> | ||
| 20 | #include <plat/iic.h> | 21 | #include <plat/iic.h> |
| 22 | #include <plat/gpio-cfg.h> | ||
| 21 | 23 | ||
| 22 | void s3c_i2c0_cfg_gpio(struct platform_device *dev) | 24 | void s3c_i2c0_cfg_gpio(struct platform_device *dev) |
| 23 | { | 25 | { |
| 24 | /* Pin configuration would be needed */ | 26 | s3c_gpio_cfgpin(S5PC100_GPD(3), S3C_GPIO_SFN(2)); |
| 27 | s3c_gpio_setpull(S5PC100_GPD(3), S3C_GPIO_PULL_UP); | ||
| 28 | s3c_gpio_cfgpin(S5PC100_GPD(4), S3C_GPIO_SFN(2)); | ||
| 29 | s3c_gpio_setpull(S5PC100_GPD(4), S3C_GPIO_PULL_UP); | ||
| 25 | } | 30 | } |
diff --git a/arch/arm/plat-s5pc1xx/setup-i2c1.c b/arch/arm/plat-s5pc1xx/setup-i2c1.c index c8f3ca42f51..a0a8b4ae6ad 100644 --- a/arch/arm/plat-s5pc1xx/setup-i2c1.c +++ b/arch/arm/plat-s5pc1xx/setup-i2c1.c | |||
| @@ -17,9 +17,14 @@ | |||
| 17 | 17 | ||
| 18 | struct platform_device; /* don't need the contents */ | 18 | struct platform_device; /* don't need the contents */ |
| 19 | 19 | ||
| 20 | #include <linux/gpio.h> | ||
| 20 | #include <plat/iic.h> | 21 | #include <plat/iic.h> |
| 22 | #include <plat/gpio-cfg.h> | ||
| 21 | 23 | ||
| 22 | void s3c_i2c1_cfg_gpio(struct platform_device *dev) | 24 | void s3c_i2c1_cfg_gpio(struct platform_device *dev) |
| 23 | { | 25 | { |
| 24 | /* Pin configuration would be needed */ | 26 | s3c_gpio_cfgpin(S5PC100_GPD(5), S3C_GPIO_SFN(2)); |
| 27 | s3c_gpio_setpull(S5PC100_GPD(5), S3C_GPIO_PULL_UP); | ||
| 28 | s3c_gpio_cfgpin(S5PC100_GPD(6), S3C_GPIO_SFN(2)); | ||
| 29 | s3c_gpio_setpull(S5PC100_GPD(6), S3C_GPIO_PULL_UP); | ||
| 25 | } | 30 | } |
diff --git a/arch/arm/plat-s5pc1xx/setup-sdhci-gpio.c b/arch/arm/plat-s5pc1xx/setup-sdhci-gpio.c new file mode 100644 index 00000000000..185c8941e64 --- /dev/null +++ b/arch/arm/plat-s5pc1xx/setup-sdhci-gpio.c | |||
| @@ -0,0 +1,86 @@ | |||
| 1 | /* linux/arch/arm/plat-s5pc1xx/setup-sdhci-gpio.c | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Eletronics | ||
| 4 | * | ||
| 5 | * S5PC1XX - Helper functions for setting up SDHCI device(s) GPIO (HSMMC) | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <linux/kernel.h> | ||
| 13 | #include <linux/types.h> | ||
| 14 | #include <linux/interrupt.h> | ||
| 15 | #include <linux/platform_device.h> | ||
| 16 | #include <linux/io.h> | ||
| 17 | #include <linux/gpio.h> | ||
| 18 | #include <linux/mmc/host.h> | ||
| 19 | #include <linux/mmc/card.h> | ||
| 20 | |||
| 21 | #include <plat/gpio-cfg.h> | ||
| 22 | #include <plat/regs-sdhci.h> | ||
| 23 | |||
| 24 | void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) | ||
| 25 | { | ||
| 26 | unsigned int gpio; | ||
| 27 | unsigned int end; | ||
| 28 | unsigned int num; | ||
| 29 | |||
| 30 | num = width; | ||
| 31 | /* In case of 8 width, we should decrease the 2 */ | ||
| 32 | if (width == 8) | ||
| 33 | num = width - 2; | ||
| 34 | |||
| 35 | end = S5PC100_GPG0(2 + num); | ||
| 36 | |||
| 37 | /* Set all the necessary GPG0/GPG1 pins to special-function 0 */ | ||
| 38 | for (gpio = S5PC100_GPG0(0); gpio < end; gpio++) { | ||
| 39 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
| 40 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 41 | } | ||
| 42 | |||
| 43 | if (width == 8) { | ||
| 44 | for (gpio = S5PC100_GPG1(0); gpio <= S5PC100_GPG1(1); gpio++) { | ||
| 45 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
| 46 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 47 | } | ||
| 48 | } | ||
| 49 | |||
| 50 | s3c_gpio_setpull(S5PC100_GPG1(2), S3C_GPIO_PULL_UP); | ||
| 51 | s3c_gpio_cfgpin(S5PC100_GPG1(2), S3C_GPIO_SFN(2)); | ||
| 52 | } | ||
| 53 | |||
| 54 | void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) | ||
| 55 | { | ||
| 56 | unsigned int gpio; | ||
| 57 | unsigned int end; | ||
| 58 | |||
| 59 | end = S5PC100_GPG2(2 + width); | ||
| 60 | |||
| 61 | /* Set all the necessary GPG2 pins to special-function 2 */ | ||
| 62 | for (gpio = S5PC100_GPG2(0); gpio < end; gpio++) { | ||
| 63 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
| 64 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 65 | } | ||
| 66 | |||
| 67 | s3c_gpio_setpull(S5PC100_GPG2(6), S3C_GPIO_PULL_UP); | ||
| 68 | s3c_gpio_cfgpin(S5PC100_GPG2(6), S3C_GPIO_SFN(2)); | ||
| 69 | } | ||
| 70 | |||
| 71 | void s5pc100_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) | ||
| 72 | { | ||
| 73 | unsigned int gpio; | ||
| 74 | unsigned int end; | ||
| 75 | |||
| 76 | end = S5PC100_GPG3(2 + width); | ||
| 77 | |||
| 78 | /* Set all the necessary GPG3 pins to special-function 2 */ | ||
| 79 | for (gpio = S5PC100_GPG3(0); gpio < end; gpio++) { | ||
| 80 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
| 81 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 82 | } | ||
| 83 | |||
| 84 | s3c_gpio_setpull(S5PC100_GPG3(6), S3C_GPIO_PULL_UP); | ||
| 85 | s3c_gpio_cfgpin(S5PC100_GPG3(6), S3C_GPIO_SFN(2)); | ||
| 86 | } | ||
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig new file mode 100644 index 00000000000..486a0d6301e --- /dev/null +++ b/arch/arm/plat-samsung/Kconfig | |||
| @@ -0,0 +1,17 @@ | |||
| 1 | # arch/arm/plat-samsung/Kconfig | ||
| 2 | # | ||
| 3 | # Copyright 2009 Simtec Electronics | ||
| 4 | # | ||
| 5 | # Licensed under GPLv2 | ||
| 6 | |||
| 7 | config PLAT_SAMSUNG | ||
| 8 | bool | ||
| 9 | depends on ARCH_S3C2410 || ARCH_S3C24A0 || ARCH_S3C64XX || ARCH_S5PC1XX | ||
| 10 | default y | ||
| 11 | help | ||
| 12 | Base platform code for all Samsung SoC based systems | ||
| 13 | |||
| 14 | if PLAT_SAMSUNG | ||
| 15 | |||
| 16 | |||
| 17 | endif | ||
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile new file mode 100644 index 00000000000..4478b9f7dc3 --- /dev/null +++ b/arch/arm/plat-samsung/Makefile | |||
| @@ -0,0 +1,11 @@ | |||
| 1 | # arch/arm/plat-s3c64xx/Makefile | ||
| 2 | # | ||
| 3 | # Copyright 2009 Simtec Electronics | ||
| 4 | # | ||
| 5 | # Licensed under GPLv2 | ||
| 6 | |||
| 7 | obj-y := | ||
| 8 | obj-m := | ||
| 9 | obj-n := dummy.o | ||
| 10 | obj- := | ||
| 11 | |||
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types index 94be7bb6cb9..07b976da617 100644 --- a/arch/arm/tools/mach-types +++ b/arch/arm/tools/mach-types | |||
| @@ -12,7 +12,7 @@ | |||
| 12 | # | 12 | # |
| 13 | # http://www.arm.linux.org.uk/developer/machines/?action=new | 13 | # http://www.arm.linux.org.uk/developer/machines/?action=new |
| 14 | # | 14 | # |
| 15 | # Last update: Fri Sep 18 21:42:00 2009 | 15 | # Last update: Wed Nov 25 22:14:58 2009 |
| 16 | # | 16 | # |
| 17 | # machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number | 17 | # machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number |
| 18 | # | 18 | # |
| @@ -928,7 +928,7 @@ palmt5 MACH_PALMT5 PALMT5 917 | |||
| 928 | palmtc MACH_PALMTC PALMTC 918 | 928 | palmtc MACH_PALMTC PALMTC 918 |
| 929 | omap_apollon MACH_OMAP_APOLLON OMAP_APOLLON 919 | 929 | omap_apollon MACH_OMAP_APOLLON OMAP_APOLLON 919 |
| 930 | mxc30030evb MACH_MXC30030EVB MXC30030EVB 920 | 930 | mxc30030evb MACH_MXC30030EVB MXC30030EVB 920 |
| 931 | rea_2d MACH_REA_2D REA_2D 921 | 931 | rea_cpu2 MACH_REA_2D REA_2D 921 |
| 932 | eti3e524 MACH_TI3E524 TI3E524 922 | 932 | eti3e524 MACH_TI3E524 TI3E524 922 |
| 933 | ateb9200 MACH_ATEB9200 ATEB9200 923 | 933 | ateb9200 MACH_ATEB9200 ATEB9200 923 |
| 934 | auckland MACH_AUCKLAND AUCKLAND 924 | 934 | auckland MACH_AUCKLAND AUCKLAND 924 |
| @@ -2421,3 +2421,118 @@ liberty MACH_LIBERTY LIBERTY 2434 | |||
| 2421 | mh355 MACH_MH355 MH355 2435 | 2421 | mh355 MACH_MH355 MH355 2435 |
| 2422 | pc7802 MACH_PC7802 PC7802 2436 | 2422 | pc7802 MACH_PC7802 PC7802 2436 |
| 2423 | gnet_sgc MACH_GNET_SGC GNET_SGC 2437 | 2423 | gnet_sgc MACH_GNET_SGC GNET_SGC 2437 |
| 2424 | einstein15 MACH_EINSTEIN15 EINSTEIN15 2438 | ||
| 2425 | cmpd MACH_CMPD CMPD 2439 | ||
| 2426 | davinci_hase1 MACH_DAVINCI_HASE1 DAVINCI_HASE1 2440 | ||
| 2427 | lgeincitephone MACH_LGEINCITEPHONE LGEINCITEPHONE 2441 | ||
| 2428 | ea313x MACH_EA313X EA313X 2442 | ||
| 2429 | fwbd_39064 MACH_FWBD_39064 FWBD_39064 2443 | ||
| 2430 | fwbd_390128 MACH_FWBD_390128 FWBD_390128 2444 | ||
| 2431 | pelco_moe MACH_PELCO_MOE PELCO_MOE 2445 | ||
| 2432 | minimix27 MACH_MINIMIX27 MINIMIX27 2446 | ||
| 2433 | omap3_thunder MACH_OMAP3_THUNDER OMAP3_THUNDER 2447 | ||
| 2434 | passionc MACH_PASSIONC PASSIONC 2448 | ||
| 2435 | mx27amata MACH_MX27AMATA MX27AMATA 2449 | ||
| 2436 | bgat1 MACH_BGAT1 BGAT1 2450 | ||
| 2437 | buzz MACH_BUZZ BUZZ 2451 | ||
| 2438 | mb9g20 MACH_MB9G20 MB9G20 2452 | ||
| 2439 | yushan MACH_YUSHAN YUSHAN 2453 | ||
| 2440 | lizard MACH_LIZARD LIZARD 2454 | ||
| 2441 | omap3polycom MACH_OMAP3POLYCOM OMAP3POLYCOM 2455 | ||
| 2442 | smdkv210 MACH_SMDKV210 SMDKV210 2456 | ||
| 2443 | bravo MACH_BRAVO BRAVO 2457 | ||
| 2444 | siogentoo1 MACH_SIOGENTOO1 SIOGENTOO1 2458 | ||
| 2445 | siogentoo2 MACH_SIOGENTOO2 SIOGENTOO2 2459 | ||
| 2446 | sm3k MACH_SM3K SM3K 2460 | ||
| 2447 | acer_tempo_f900 MACH_ACER_TEMPO_F900 ACER_TEMPO_F900 2461 | ||
| 2448 | sst61vc010_dev MACH_SST61VC010_DEV SST61VC010_DEV 2462 | ||
| 2449 | glittertind MACH_GLITTERTIND GLITTERTIND 2463 | ||
| 2450 | omap_zoom3 MACH_OMAP_ZOOM3 OMAP_ZOOM3 2464 | ||
| 2451 | omap_3630sdp MACH_OMAP_3630SDP OMAP_3630SDP 2465 | ||
| 2452 | cybook2440 MACH_CYBOOK2440 CYBOOK2440 2466 | ||
| 2453 | torino_s MACH_TORINO_S TORINO_S 2467 | ||
| 2454 | havana MACH_HAVANA HAVANA 2468 | ||
| 2455 | beaumont_11 MACH_BEAUMONT_11 BEAUMONT_11 2469 | ||
| 2456 | vanguard MACH_VANGUARD VANGUARD 2470 | ||
| 2457 | s5pc110_draco MACH_S5PC110_DRACO S5PC110_DRACO 2471 | ||
| 2458 | cartesio_two MACH_CARTESIO_TWO CARTESIO_TWO 2472 | ||
| 2459 | aster MACH_ASTER ASTER 2473 | ||
| 2460 | voguesv210 MACH_VOGUESV210 VOGUESV210 2474 | ||
| 2461 | acm500x MACH_ACM500X ACM500X 2475 | ||
| 2462 | km9260 MACH_KM9260 KM9260 2476 | ||
| 2463 | nideflexg1 MACH_NIDEFLEXG1 NIDEFLEXG1 2477 | ||
| 2464 | ctera_plug_io MACH_CTERA_PLUG_IO CTERA_PLUG_IO 2478 | ||
| 2465 | smartq7 MACH_SMARTQ7 SMARTQ7 2479 | ||
| 2466 | at91sam9g10ek2 MACH_AT91SAM9G10EK2 AT91SAM9G10EK2 2480 | ||
| 2467 | asusp527 MACH_ASUSP527 ASUSP527 2481 | ||
| 2468 | at91sam9g20mpm2 MACH_AT91SAM9G20MPM2 AT91SAM9G20MPM2 2482 | ||
| 2469 | topasa900 MACH_TOPASA900 TOPASA900 2483 | ||
| 2470 | electrum_100 MACH_ELECTRUM_100 ELECTRUM_100 2484 | ||
| 2471 | mx51grb MACH_MX51GRB MX51GRB 2485 | ||
| 2472 | xea300 MACH_XEA300 XEA300 2486 | ||
| 2473 | htcstartrek MACH_HTCSTARTREK HTCSTARTREK 2487 | ||
| 2474 | lima MACH_LIMA LIMA 2488 | ||
| 2475 | csb740 MACH_CSB740 CSB740 2489 | ||
| 2476 | usb_s8815 MACH_USB_S8815 USB_S8815 2490 | ||
| 2477 | watson_efm_plugin MACH_WATSON_EFM_PLUGIN WATSON_EFM_PLUGIN 2491 | ||
| 2478 | milkyway MACH_MILKYWAY MILKYWAY 2492 | ||
| 2479 | g4evm MACH_G4EVM G4EVM 2493 | ||
| 2480 | picomod6 MACH_PICOMOD6 PICOMOD6 2494 | ||
| 2481 | omapl138_hawkboard MACH_OMAPL138_HAWKBOARD OMAPL138_HAWKBOARD 2495 | ||
| 2482 | ip6000 MACH_IP6000 IP6000 2496 | ||
| 2483 | ip6010 MACH_IP6010 IP6010 2497 | ||
| 2484 | utm400 MACH_UTM400 UTM400 2498 | ||
| 2485 | omap3_zybex MACH_OMAP3_ZYBEX OMAP3_ZYBEX 2499 | ||
| 2486 | wireless_space MACH_WIRELESS_SPACE WIRELESS_SPACE 2500 | ||
| 2487 | sx560 MACH_SX560 SX560 2501 | ||
| 2488 | ts41x MACH_TS41X TS41X 2502 | ||
| 2489 | elphel10373 MACH_ELPHEL10373 ELPHEL10373 2503 | ||
| 2490 | rhobot MACH_RHOBOT RHOBOT 2504 | ||
| 2491 | mx51_refresh MACH_MX51_REFRESH MX51_REFRESH 2505 | ||
| 2492 | ls9260 MACH_LS9260 LS9260 2506 | ||
| 2493 | shank MACH_SHANK SHANK 2507 | ||
| 2494 | qsd8x50_st1 MACH_QSD8X50_ST1 QSD8X50_ST1 2508 | ||
| 2495 | at91sam9m10ekes MACH_AT91SAM9M10EKES AT91SAM9M10EKES 2509 | ||
| 2496 | hiram MACH_HIRAM HIRAM 2510 | ||
| 2497 | phy3250 MACH_PHY3250 PHY3250 2511 | ||
| 2498 | ea3250 MACH_EA3250 EA3250 2512 | ||
| 2499 | fdi3250 MACH_FDI3250 FDI3250 2513 | ||
| 2500 | whitestone MACH_WHITESTONE WHITESTONE 2514 | ||
| 2501 | at91sam9263nit MACH_AT91SAM9263NIT AT91SAM9263NIT 2515 | ||
| 2502 | ccmx51 MACH_CCMX51 CCMX51 2516 | ||
| 2503 | ccmx51js MACH_CCMX51JS CCMX51JS 2517 | ||
| 2504 | ccwmx51 MACH_CCWMX51 CCWMX51 2518 | ||
| 2505 | ccwmx51js MACH_CCWMX51JS CCWMX51JS 2519 | ||
| 2506 | mini6410 MACH_MINI6410 MINI6410 2520 | ||
| 2507 | tiny6410 MACH_TINY6410 TINY6410 2521 | ||
| 2508 | nano6410 MACH_NANO6410 NANO6410 2522 | ||
| 2509 | at572d940hfnldb MACH_AT572D940HFNLDB AT572D940HFNLDB 2523 | ||
| 2510 | htcleo MACH_HTCLEO HTCLEO 2524 | ||
| 2511 | avp13 MACH_AVP13 AVP13 2525 | ||
| 2512 | xxsvideod MACH_XXSVIDEOD XXSVIDEOD 2526 | ||
| 2513 | vpnext MACH_VPNEXT VPNEXT 2527 | ||
| 2514 | swarco_itc3 MACH_SWARCO_ITC3 SWARCO_ITC3 2528 | ||
| 2515 | tx51 MACH_TX51 TX51 2529 | ||
| 2516 | dolby_cat1021 MACH_DOLBY_CAT1021 DOLBY_CAT1021 2530 | ||
| 2517 | mx28evk MACH_MX28EVK MX28EVK 2531 | ||
| 2518 | phoenix260 MACH_PHOENIX260 PHOENIX260 2532 | ||
| 2519 | uvaca_stork MACH_UVACA_STORK UVACA_STORK 2533 | ||
| 2520 | smartq5 MACH_SMARTQ5 SMARTQ5 2534 | ||
| 2521 | all3078 MACH_ALL3078 ALL3078 2535 | ||
| 2522 | ctera_2bay_ds MACH_CTERA_2BAY_DS CTERA_2BAY_DS 2536 | ||
| 2523 | siogentoo3 MACH_SIOGENTOO3 SIOGENTOO3 2537 | ||
| 2524 | epb5000 MACH_EPB5000 EPB5000 2538 | ||
| 2525 | hy9263 MACH_HY9263 HY9263 2539 | ||
| 2526 | acer_tempo_m900 MACH_ACER_TEMPO_M900 ACER_TEMPO_M900 2540 | ||
| 2527 | acer_tempo_dx650 MACH_ACER_TEMPO_DX900 ACER_TEMPO_DX900 2541 | ||
| 2528 | acer_tempo_x960 MACH_ACER_TEMPO_X960 ACER_TEMPO_X960 2542 | ||
| 2529 | acer_eten_v900 MACH_ACER_ETEN_V900 ACER_ETEN_V900 2543 | ||
| 2530 | acer_eten_x900 MACH_ACER_ETEN_X900 ACER_ETEN_X900 2544 | ||
| 2531 | bonnell MACH_BONNELL BONNELL 2545 | ||
| 2532 | oht_mx27 MACH_OHT_MX27 OHT_MX27 2546 | ||
| 2533 | htcquartz MACH_HTCQUARTZ HTCQUARTZ 2547 | ||
| 2534 | davinci_dm6467tevm MACH_DAVINCI_DM6467TEVM DAVINCI_DM6467TEVM 2548 | ||
| 2535 | c3ax03 MACH_C3AX03 C3AX03 2549 | ||
| 2536 | mxt_td60 MACH_MXT_TD60 MXT_TD60 2550 | ||
| 2537 | esyx MACH_ESYX ESYX 2551 | ||
| 2538 | bulldog MACH_BULLDOG BULLDOG 2553 | ||