diff options
Diffstat (limited to 'arch/arm/mach-s5pv210/setup-sdhci.c')
| -rw-r--r-- | arch/arm/mach-s5pv210/setup-sdhci.c | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/arch/arm/mach-s5pv210/setup-sdhci.c b/arch/arm/mach-s5pv210/setup-sdhci.c new file mode 100644 index 00000000000..51815ec60c2 --- /dev/null +++ b/arch/arm/mach-s5pv210/setup-sdhci.c | |||
| @@ -0,0 +1,63 @@ | |||
| 1 | /* linux/arch/arm/mach-s5pv210/setup-sdhci.c | ||
| 2 | * | ||
| 3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
| 4 | * http://www.samsung.com/ | ||
| 5 | * | ||
| 6 | * S5PV210 - Helper functions for settign up SDHCI device(s) (HSMMC) | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/kernel.h> | ||
| 14 | #include <linux/types.h> | ||
| 15 | #include <linux/interrupt.h> | ||
| 16 | #include <linux/platform_device.h> | ||
| 17 | #include <linux/io.h> | ||
| 18 | |||
| 19 | #include <linux/mmc/card.h> | ||
| 20 | #include <linux/mmc/host.h> | ||
| 21 | |||
| 22 | #include <plat/regs-sdhci.h> | ||
| 23 | #include <plat/sdhci.h> | ||
| 24 | |||
| 25 | /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ | ||
| 26 | |||
| 27 | char *s5pv210_hsmmc_clksrcs[4] = { | ||
| 28 | [0] = "hsmmc", /* HCLK */ | ||
| 29 | [1] = "hsmmc", /* HCLK */ | ||
| 30 | [2] = "sclk_mmc", /* mmc_bus */ | ||
| 31 | /*[4] = reserved */ | ||
| 32 | }; | ||
| 33 | |||
| 34 | void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, | ||
| 35 | void __iomem *r, | ||
| 36 | struct mmc_ios *ios, | ||
| 37 | struct mmc_card *card) | ||
| 38 | { | ||
| 39 | u32 ctrl2, ctrl3; | ||
| 40 | |||
| 41 | /* don't need to alter anything acording to card-type */ | ||
| 42 | |||
| 43 | writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4); | ||
| 44 | |||
| 45 | ctrl2 = readl(r + S3C_SDHCI_CONTROL2); | ||
| 46 | ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK; | ||
| 47 | ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR | | ||
| 48 | S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK | | ||
| 49 | S3C_SDHCI_CTRL2_ENFBCLKRX | | ||
| 50 | S3C_SDHCI_CTRL2_DFCNT_NONE | | ||
| 51 | S3C_SDHCI_CTRL2_ENCLKOUTHOLD); | ||
| 52 | |||
| 53 | if (ios->clock < 25 * 1000000) | ||
| 54 | ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 | | ||
| 55 | S3C_SDHCI_CTRL3_FCSEL2 | | ||
| 56 | S3C_SDHCI_CTRL3_FCSEL1 | | ||
| 57 | S3C_SDHCI_CTRL3_FCSEL0); | ||
| 58 | else | ||
| 59 | ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0); | ||
| 60 | |||
| 61 | writel(ctrl2, r + S3C_SDHCI_CONTROL2); | ||
| 62 | writel(ctrl3, r + S3C_SDHCI_CONTROL3); | ||
| 63 | } | ||
