diff options
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_bios.c | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_bios.c b/drivers/gpu/drm/radeon/radeon_bios.c index 8f2c7b50dcf..1aba85cad1a 100644 --- a/drivers/gpu/drm/radeon/radeon_bios.c +++ b/drivers/gpu/drm/radeon/radeon_bios.c | |||
| @@ -131,6 +131,45 @@ static bool radeon_atrm_get_bios(struct radeon_device *rdev) | |||
| 131 | return true; | 131 | return true; |
| 132 | } | 132 | } |
| 133 | 133 | ||
| 134 | static bool ni_read_disabled_bios(struct radeon_device *rdev) | ||
| 135 | { | ||
| 136 | u32 bus_cntl; | ||
| 137 | u32 d1vga_control; | ||
| 138 | u32 d2vga_control; | ||
| 139 | u32 vga_render_control; | ||
| 140 | u32 rom_cntl; | ||
| 141 | bool r; | ||
| 142 | |||
| 143 | bus_cntl = RREG32(R600_BUS_CNTL); | ||
| 144 | d1vga_control = RREG32(AVIVO_D1VGA_CONTROL); | ||
| 145 | d2vga_control = RREG32(AVIVO_D2VGA_CONTROL); | ||
| 146 | vga_render_control = RREG32(AVIVO_VGA_RENDER_CONTROL); | ||
| 147 | rom_cntl = RREG32(R600_ROM_CNTL); | ||
| 148 | |||
| 149 | /* enable the rom */ | ||
| 150 | WREG32(R600_BUS_CNTL, (bus_cntl & ~R600_BIOS_ROM_DIS)); | ||
| 151 | /* Disable VGA mode */ | ||
| 152 | WREG32(AVIVO_D1VGA_CONTROL, | ||
| 153 | (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | | ||
| 154 | AVIVO_DVGA_CONTROL_TIMING_SELECT))); | ||
| 155 | WREG32(AVIVO_D2VGA_CONTROL, | ||
| 156 | (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | | ||
| 157 | AVIVO_DVGA_CONTROL_TIMING_SELECT))); | ||
| 158 | WREG32(AVIVO_VGA_RENDER_CONTROL, | ||
| 159 | (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK)); | ||
| 160 | WREG32(R600_ROM_CNTL, rom_cntl | R600_SCK_OVERWRITE); | ||
| 161 | |||
| 162 | r = radeon_read_bios(rdev); | ||
| 163 | |||
| 164 | /* restore regs */ | ||
| 165 | WREG32(R600_BUS_CNTL, bus_cntl); | ||
| 166 | WREG32(AVIVO_D1VGA_CONTROL, d1vga_control); | ||
| 167 | WREG32(AVIVO_D2VGA_CONTROL, d2vga_control); | ||
| 168 | WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control); | ||
| 169 | WREG32(R600_ROM_CNTL, rom_cntl); | ||
| 170 | return r; | ||
| 171 | } | ||
| 172 | |||
| 134 | static bool r700_read_disabled_bios(struct radeon_device *rdev) | 173 | static bool r700_read_disabled_bios(struct radeon_device *rdev) |
| 135 | { | 174 | { |
| 136 | uint32_t viph_control; | 175 | uint32_t viph_control; |
| @@ -416,6 +455,8 @@ static bool radeon_read_disabled_bios(struct radeon_device *rdev) | |||
| 416 | { | 455 | { |
| 417 | if (rdev->flags & RADEON_IS_IGP) | 456 | if (rdev->flags & RADEON_IS_IGP) |
| 418 | return igp_read_bios_from_vram(rdev); | 457 | return igp_read_bios_from_vram(rdev); |
| 458 | else if (rdev->family >= CHIP_BARTS) | ||
| 459 | return ni_read_disabled_bios(rdev); | ||
| 419 | else if (rdev->family >= CHIP_RV770) | 460 | else if (rdev->family >= CHIP_RV770) |
| 420 | return r700_read_disabled_bios(rdev); | 461 | return r700_read_disabled_bios(rdev); |
| 421 | else if (rdev->family >= CHIP_R600) | 462 | else if (rdev->family >= CHIP_R600) |
