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authorChaoming_Li <chaoming_li@realsil.com.cn>2011-04-25 14:23:15 -0400
committerJohn W. Linville <linville@tuxdriver.com>2011-04-26 16:13:32 -0400
commitc7cfe38ee0f946415b0b39e3905a91a51d99cf7d (patch)
tree830972c931ceb26d9832eb097a14cda6a2265d9f /drivers/net/wireless/rtlwifi/pci.c
parent0baa0fd76f3f5a134461d6cf30294f6bb1bb824c (diff)
rtlwifi: Convert pci routines for addition of rtl8192se and rtl8192de
Convert pci routines for addition of RTL8192SE and RTL8192DE code These changes allow the upper-level driver to specify the BAR to be used as it is different for rtl8192se than for the others. Signed-off-by: Chaoming_Li <chaoming_li@realsil.com.cn> Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/rtlwifi/pci.c')
-rw-r--r--drivers/net/wireless/rtlwifi/pci.c788
1 files changed, 561 insertions, 227 deletions
diff --git a/drivers/net/wireless/rtlwifi/pci.c b/drivers/net/wireless/rtlwifi/pci.c
index e2fa78bc129..fa66205d8b9 100644
--- a/drivers/net/wireless/rtlwifi/pci.c
+++ b/drivers/net/wireless/rtlwifi/pci.c
@@ -32,6 +32,7 @@
32#include "pci.h" 32#include "pci.h"
33#include "base.h" 33#include "base.h"
34#include "ps.h" 34#include "ps.h"
35#include "efuse.h"
35 36
36static const u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = { 37static const u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = {
37 INTEL_VENDOR_ID, 38 INTEL_VENDOR_ID,
@@ -40,6 +41,31 @@ static const u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = {
40 SIS_VENDOR_ID 41 SIS_VENDOR_ID
41}; 42};
42 43
44static const u8 ac_to_hwq[] = {
45 VO_QUEUE,
46 VI_QUEUE,
47 BE_QUEUE,
48 BK_QUEUE
49};
50
51u8 _rtl_mac_to_hwqueue(struct ieee80211_hw *hw,
52 struct sk_buff *skb)
53{
54 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
55 u16 fc = rtl_get_fc(skb);
56 u8 queue_index = skb_get_queue_mapping(skb);
57
58 if (unlikely(ieee80211_is_beacon(fc)))
59 return BEACON_QUEUE;
60 if (ieee80211_is_mgmt(fc))
61 return MGNT_QUEUE;
62 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
63 if (ieee80211_is_nullfunc(fc))
64 return HIGH_QUEUE;
65
66 return ac_to_hwq[queue_index];
67}
68
43/* Update PCI dependent default settings*/ 69/* Update PCI dependent default settings*/
44static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw) 70static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
45{ 71{
@@ -48,6 +74,7 @@ static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
48 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw)); 74 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
49 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 75 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
50 u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor; 76 u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
77 u8 init_aspm;
51 78
52 ppsc->reg_rfps_level = 0; 79 ppsc->reg_rfps_level = 0;
53 ppsc->support_aspm = 0; 80 ppsc->support_aspm = 0;
@@ -113,25 +140,110 @@ static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
113 140
114 /*Set HW definition to determine if it supports ASPM. */ 141 /*Set HW definition to determine if it supports ASPM. */
115 switch (rtlpci->const_support_pciaspm) { 142 switch (rtlpci->const_support_pciaspm) {
116 case 0: 143 case 0:{
117 /*Not support ASPM. */ 144 /*Not support ASPM. */
118 ppsc->support_aspm = false; 145 bool support_aspm = false;
119 break; 146 ppsc->support_aspm = support_aspm;
120 case 1: 147 break;
121 /*Support ASPM. */ 148 }
122 ppsc->support_aspm = true; 149 case 1:{
123 ppsc->support_backdoor = true; 150 /*Support ASPM. */
124 break; 151 bool support_aspm = true;
152 bool support_backdoor = true;
153 ppsc->support_aspm = support_aspm;
154
155 /*if (priv->oem_id == RT_CID_TOSHIBA &&
156 !priv->ndis_adapter.amd_l1_patch)
157 support_backdoor = false; */
158
159 ppsc->support_backdoor = support_backdoor;
160
161 break;
162 }
125 case 2: 163 case 2:
126 /*ASPM value set by chipset. */ 164 /*ASPM value set by chipset. */
127 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL) 165 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL) {
128 ppsc->support_aspm = true; 166 bool support_aspm = true;
167 ppsc->support_aspm = support_aspm;
168 }
129 break; 169 break;
130 default: 170 default:
131 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 171 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
132 ("switch case not process\n")); 172 ("switch case not process\n"));
133 break; 173 break;
134 } 174 }
175
176 /* toshiba aspm issue, toshiba will set aspm selfly
177 * so we should not set aspm in driver */
178 pci_read_config_byte(rtlpci->pdev, 0x80, &init_aspm);
179 if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8192SE &&
180 init_aspm == 0x43)
181 ppsc->support_aspm = false;
182}
183
184/*Disable L0s dirtectly. We will disable host L0s by default. */
185void rtl_pci_disable_host_l0s(struct ieee80211_hw *hw)
186{
187 struct rtl_priv *rtlpriv = rtl_priv(hw);
188 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
189 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
190 u8 pcibridge_busnum = pcipriv->ndis_adapter.pcibridge_busnum;
191 u8 pcibridge_devnum = pcipriv->ndis_adapter.pcibridge_devnum;
192 u8 pcibridge_funcnum = pcipriv->ndis_adapter.pcibridge_funcnum;
193 u32 pcicfg_addrport = pcipriv->ndis_adapter.pcicfg_addrport;
194 u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
195 u8 u_pcibridge_aspmsetting = 0;
196
197 /*Read Link Control Register */
198 rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
199 pcicfg_addrport + (num4bytes << 2));
200 rtl_pci_raw_read_port_uchar(PCI_CONF_DATA, &u_pcibridge_aspmsetting);
201
202 if (u_pcibridge_aspmsetting & BIT(0))
203 u_pcibridge_aspmsetting &= ~(BIT(0));
204
205 rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
206 pcicfg_addrport + (num4bytes << 2));
207 rtl_pci_raw_write_port_uchar(PCI_CONF_DATA, u_pcibridge_aspmsetting);
208
209 udelay(50);
210
211 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
212 ("PciBridge busnumber[%x], DevNumbe[%x], "
213 "funcnumber[%x], Write reg[%x] = %lx\n",
214 pcibridge_busnum, pcibridge_devnum, pcibridge_funcnum,
215 (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10),
216 (pcipriv->ndis_adapter.pcibridge_linkctrlreg |
217 (rtlpci->const_devicepci_aspm_setting & ~BIT(0)))));
218}
219
220/*Enable rtl8192ce backdoor to control ASPM and clock request.*/
221bool rtl_pci_enable_back_door(struct ieee80211_hw *hw)
222{
223 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
224 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
225 u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
226 bool bresult = true;
227 u8 value;
228
229 pci_read_config_byte(rtlpci->pdev, 0x70f, &value);
230
231 /*0x70f BIT(7) is used to control L0S */
232 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL) {
233 value |= BIT(7);
234 } else {
235 /*Set 0x70f to 0x23 when non-Intel platform. */
236 value = 0x23;
237 }
238
239 pci_write_config_byte(rtlpci->pdev, 0x70f, value);
240
241 pci_read_config_byte(rtlpci->pdev, 0x719, &value);
242 /*0x719 BIT(3) is for L1 BIT(4) is for clock request */
243 value |= (BIT(3) | BIT(4));
244 pci_write_config_byte(rtlpci->pdev, 0x719, value);
245
246 return bresult;
135} 247}
136 248
137static bool _rtl_pci_platform_switch_device_pci_aspm( 249static bool _rtl_pci_platform_switch_device_pci_aspm(
@@ -139,8 +251,11 @@ static bool _rtl_pci_platform_switch_device_pci_aspm(
139 u8 value) 251 u8 value)
140{ 252{
141 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 253 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
254 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
255
256 if (rtlhal->hw_type != HARDWARE_TYPE_RTL8192SE)
257 value |= 0x40;
142 258
143 value |= 0x40;
144 pci_write_config_byte(rtlpci->pdev, 0x80, value); 259 pci_write_config_byte(rtlpci->pdev, 0x80, value);
145 260
146 return false; 261 return false;
@@ -150,11 +265,13 @@ static bool _rtl_pci_platform_switch_device_pci_aspm(
150static bool _rtl_pci_switch_clk_req(struct ieee80211_hw *hw, u8 value) 265static bool _rtl_pci_switch_clk_req(struct ieee80211_hw *hw, u8 value)
151{ 266{
152 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 267 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
153 u8 buffer; 268 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
154 269
155 buffer = value;
156 pci_write_config_byte(rtlpci->pdev, 0x81, value); 270 pci_write_config_byte(rtlpci->pdev, 0x81, value);
157 271
272 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
273 udelay(100);
274
158 return true; 275 return true;
159} 276}
160 277
@@ -175,6 +292,9 @@ static void rtl_pci_disable_aspm(struct ieee80211_hw *hw)
175 u16 aspmlevel = 0; 292 u16 aspmlevel = 0;
176 u8 tmp_u1b = 0; 293 u8 tmp_u1b = 0;
177 294
295 if (!ppsc->support_aspm)
296 return;
297
178 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) { 298 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
179 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE, 299 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
180 ("PCI(Bridge) UNKNOWN.\n")); 300 ("PCI(Bridge) UNKNOWN.\n"));
@@ -228,6 +348,9 @@ static void rtl_pci_enable_aspm(struct ieee80211_hw *hw)
228 u8 u_pcibridge_aspmsetting; 348 u8 u_pcibridge_aspmsetting;
229 u8 u_device_aspmsetting; 349 u8 u_device_aspmsetting;
230 350
351 if (!ppsc->support_aspm)
352 return;
353
231 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) { 354 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
232 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE, 355 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
233 ("PCI(Bridge) UNKNOWN.\n")); 356 ("PCI(Bridge) UNKNOWN.\n"));
@@ -272,7 +395,7 @@ static void rtl_pci_enable_aspm(struct ieee80211_hw *hw)
272 RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0); 395 RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0);
273 RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ); 396 RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
274 } 397 }
275 udelay(200); 398 udelay(100);
276} 399}
277 400
278static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw) 401static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw)
@@ -303,19 +426,19 @@ static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw)
303 return status; 426 return status;
304} 427}
305 428
306static void rtl_pci_get_linkcontrol_field(struct ieee80211_hw *hw) 429void rtl_pci_get_linkcontrol_field(struct ieee80211_hw *hw)
307{ 430{
308 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw); 431 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
309 u8 capabilityoffset = pcipriv->ndis_adapter.pcibridge_pciehdr_offset; 432 u8 capabilityoffset = pcipriv->ndis_adapter.pcibridge_pciehdr_offset;
310 u32 pcicfg_addrport = pcipriv->ndis_adapter.pcicfg_addrport; 433 u32 pcicfg_addrport = pcipriv->ndis_adapter.pcicfg_addrport;
311 u8 linkctrl_reg; 434 u8 linkctrl_reg;
312 u8 num4bBytes; 435 u8 num4bbytes;
313 436
314 num4bBytes = (capabilityoffset + 0x10) / 4; 437 num4bbytes = (capabilityoffset + 0x10) / 4;
315 438
316 /*Read Link Control Register */ 439 /*Read Link Control Register */
317 rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS, 440 rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
318 pcicfg_addrport + (num4bBytes << 2)); 441 pcicfg_addrport + (num4bbytes << 2));
319 rtl_pci_raw_read_port_uchar(PCI_CONF_DATA, &linkctrl_reg); 442 rtl_pci_raw_read_port_uchar(PCI_CONF_DATA, &linkctrl_reg);
320 443
321 pcipriv->ndis_adapter.pcibridge_linkctrlreg = linkctrl_reg; 444 pcipriv->ndis_adapter.pcibridge_linkctrlreg = linkctrl_reg;
@@ -348,7 +471,7 @@ static void rtl_pci_parse_configuration(struct pci_dev *pdev,
348 pci_write_config_byte(pdev, 0x70f, tmp); 471 pci_write_config_byte(pdev, 0x70f, tmp);
349} 472}
350 473
351static void _rtl_pci_initialize_adapter_common(struct ieee80211_hw *hw) 474static void rtl_pci_init_aspm(struct ieee80211_hw *hw)
352{ 475{
353 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw)); 476 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
354 477
@@ -362,52 +485,6 @@ static void _rtl_pci_initialize_adapter_common(struct ieee80211_hw *hw)
362 485
363} 486}
364 487
365static void rtl_pci_init_aspm(struct ieee80211_hw *hw)
366{
367 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
368
369 /*close ASPM for AMD defaultly */
370 rtlpci->const_amdpci_aspm = 0;
371
372 /*
373 * ASPM PS mode.
374 * 0 - Disable ASPM,
375 * 1 - Enable ASPM without Clock Req,
376 * 2 - Enable ASPM with Clock Req,
377 * 3 - Alwyas Enable ASPM with Clock Req,
378 * 4 - Always Enable ASPM without Clock Req.
379 * set defult to RTL8192CE:3 RTL8192E:2
380 * */
381 rtlpci->const_pci_aspm = 3;
382
383 /*Setting for PCI-E device */
384 rtlpci->const_devicepci_aspm_setting = 0x03;
385
386 /*Setting for PCI-E bridge */
387 rtlpci->const_hostpci_aspm_setting = 0x02;
388
389 /*
390 * In Hw/Sw Radio Off situation.
391 * 0 - Default,
392 * 1 - From ASPM setting without low Mac Pwr,
393 * 2 - From ASPM setting with low Mac Pwr,
394 * 3 - Bus D3
395 * set default to RTL8192CE:0 RTL8192SE:2
396 */
397 rtlpci->const_hwsw_rfoff_d3 = 0;
398
399 /*
400 * This setting works for those device with
401 * backdoor ASPM setting such as EPHY setting.
402 * 0 - Not support ASPM,
403 * 1 - Support ASPM,
404 * 2 - According to chipset.
405 */
406 rtlpci->const_support_pciaspm = 1;
407
408 _rtl_pci_initialize_adapter_common(hw);
409}
410
411static void _rtl_pci_io_handler_init(struct device *dev, 488static void _rtl_pci_io_handler_init(struct device *dev,
412 struct ieee80211_hw *hw) 489 struct ieee80211_hw *hw)
413{ 490{
@@ -429,6 +506,92 @@ static void _rtl_pci_io_handler_release(struct ieee80211_hw *hw)
429{ 506{
430} 507}
431 508
509static bool _rtl_update_earlymode_info(struct ieee80211_hw *hw,
510 struct sk_buff *skb, struct rtl_tcb_desc *tcb_desc, u8 tid)
511{
512 struct rtl_priv *rtlpriv = rtl_priv(hw);
513 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
514 u8 additionlen = FCS_LEN;
515 struct sk_buff *next_skb;
516
517 /* here open is 4, wep/tkip is 8, aes is 12*/
518 if (info->control.hw_key)
519 additionlen += info->control.hw_key->icv_len;
520
521 /* The most skb num is 6 */
522 tcb_desc->empkt_num = 0;
523 spin_lock_bh(&rtlpriv->locks.waitq_lock);
524 skb_queue_walk(&rtlpriv->mac80211.skb_waitq[tid], next_skb) {
525 struct ieee80211_tx_info *next_info;
526
527 next_info = IEEE80211_SKB_CB(next_skb);
528 if (next_info->flags & IEEE80211_TX_CTL_AMPDU) {
529 tcb_desc->empkt_len[tcb_desc->empkt_num] =
530 next_skb->len + additionlen;
531 tcb_desc->empkt_num++;
532 } else {
533 break;
534 }
535
536 if (skb_queue_is_last(&rtlpriv->mac80211.skb_waitq[tid],
537 next_skb))
538 break;
539
540 if (tcb_desc->empkt_num >= 5)
541 break;
542 }
543 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
544
545 return true;
546}
547
548/* just for early mode now */
549static void _rtl_pci_tx_chk_waitq(struct ieee80211_hw *hw)
550{
551 struct rtl_priv *rtlpriv = rtl_priv(hw);
552 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
553 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
554 struct sk_buff *skb = NULL;
555 struct ieee80211_tx_info *info = NULL;
556 int tid; /* should be int */
557
558 if (!rtlpriv->rtlhal.earlymode_enable)
559 return;
560
561 /* we juse use em for BE/BK/VI/VO */
562 for (tid = 7; tid >= 0; tid--) {
563 u8 hw_queue = ac_to_hwq[rtl_tid_to_ac(hw, tid)];
564 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
565 while (!mac->act_scanning &&
566 rtlpriv->psc.rfpwr_state == ERFON) {
567 struct rtl_tcb_desc tcb_desc;
568 memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
569
570 spin_lock_bh(&rtlpriv->locks.waitq_lock);
571 if (!skb_queue_empty(&mac->skb_waitq[tid]) &&
572 (ring->entries - skb_queue_len(&ring->queue) > 5)) {
573 skb = skb_dequeue(&mac->skb_waitq[tid]);
574 } else {
575 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
576 break;
577 }
578 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
579
580 /* Some macaddr can't do early mode. like
581 * multicast/broadcast/no_qos data */
582 info = IEEE80211_SKB_CB(skb);
583 if (info->flags & IEEE80211_TX_CTL_AMPDU)
584 _rtl_update_earlymode_info(hw, skb,
585 &tcb_desc, tid);
586
587#if 0 /* temporary */
588 rtlpriv->intf_ops->adapter_tx(hw, skb, &tcb_desc);
589#endif
590 }
591 }
592}
593
594
432static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio) 595static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
433{ 596{
434 struct rtl_priv *rtlpriv = rtl_priv(hw); 597 struct rtl_priv *rtlpriv = rtl_priv(hw);
@@ -440,6 +603,8 @@ static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
440 struct rtl_tx_desc *entry = &ring->desc[ring->idx]; 603 struct rtl_tx_desc *entry = &ring->desc[ring->idx];
441 struct sk_buff *skb; 604 struct sk_buff *skb;
442 struct ieee80211_tx_info *info; 605 struct ieee80211_tx_info *info;
606 __le16 fc;
607 u8 tid;
443 608
444 u8 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) entry, true, 609 u8 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) entry, true,
445 HW_DESC_OWN); 610 HW_DESC_OWN);
@@ -455,11 +620,15 @@ static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
455 620
456 skb = __skb_dequeue(&ring->queue); 621 skb = __skb_dequeue(&ring->queue);
457 pci_unmap_single(rtlpci->pdev, 622 pci_unmap_single(rtlpci->pdev,
458 rtlpriv->cfg->ops-> 623 le32_to_cpu(rtlpriv->cfg->ops->
459 get_desc((u8 *) entry, true, 624 get_desc((u8 *) entry, true,
460 HW_DESC_TXBUFF_ADDR), 625 HW_DESC_TXBUFF_ADDR)),
461 skb->len, PCI_DMA_TODEVICE); 626 skb->len, PCI_DMA_TODEVICE);
462 627
628 /* remove early mode header */
629 if (rtlpriv->rtlhal.earlymode_enable)
630 skb_pull(skb, EM_HDR_LEN);
631
463 RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_TRACE, 632 RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_TRACE,
464 ("new ring->idx:%d, " 633 ("new ring->idx:%d, "
465 "free: skb_queue_len:%d, free: seq:%x\n", 634 "free: skb_queue_len:%d, free: seq:%x\n",
@@ -467,6 +636,30 @@ static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
467 skb_queue_len(&ring->queue), 636 skb_queue_len(&ring->queue),
468 *(u16 *) (skb->data + 22))); 637 *(u16 *) (skb->data + 22)));
469 638
639 if (prio == TXCMD_QUEUE) {
640 dev_kfree_skb(skb);
641 goto tx_status_ok;
642
643 }
644
645 /* for sw LPS, just after NULL skb send out, we can
646 * sure AP kown we are sleeped, our we should not let
647 * rf to sleep*/
648 fc = rtl_get_fc(skb);
649 if (ieee80211_is_nullfunc(fc)) {
650 if (ieee80211_has_pm(fc)) {
651 rtlpriv->mac80211.offchan_deley = true;
652 rtlpriv->psc.state_inap = 1;
653 } else {
654 rtlpriv->psc.state_inap = 0;
655 }
656 }
657
658 /* update tid tx pkt num */
659 tid = rtl_get_tid(skb);
660 if (tid <= 7)
661 rtlpriv->link_info.tidtx_inperiod[tid]++;
662
470 info = IEEE80211_SKB_CB(skb); 663 info = IEEE80211_SKB_CB(skb);
471 ieee80211_tx_info_clear_status(info); 664 ieee80211_tx_info_clear_status(info);
472 665
@@ -489,7 +682,7 @@ static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
489 skb_get_queue_mapping 682 skb_get_queue_mapping
490 (skb)); 683 (skb));
491 } 684 }
492 685tx_status_ok:
493 skb = NULL; 686 skb = NULL;
494 } 687 }
495 688
@@ -561,23 +754,21 @@ static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
561 *skb_trim(skb, skb->len - 4); 754 *skb_trim(skb, skb->len - 4);
562 */ 755 */
563 756
564 hdr = (struct ieee80211_hdr *)(skb->data); 757 hdr = rtl_get_hdr(skb);
565 fc = hdr->frame_control; 758 fc = rtl_get_fc(skb);
566 759
567 if (!stats.crc) { 760 if (!stats.crc || !stats.hwerror) {
568 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, 761 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status,
569 sizeof(rx_status)); 762 sizeof(rx_status));
570 763
571 if (is_broadcast_ether_addr(hdr->addr1)) 764 if (is_broadcast_ether_addr(hdr->addr1)) {
572 ;/*TODO*/ 765 ;/*TODO*/
573 else { 766 } else if (is_multicast_ether_addr(hdr->addr1)) {
574 if (is_multicast_ether_addr(hdr->addr1)) 767 ;/*TODO*/
575 ;/*TODO*/ 768 } else {
576 else { 769 unicast = true;
577 unicast = true; 770 rtlpriv->stats.rxbytesunicast +=
578 rtlpriv->stats.rxbytesunicast += 771 skb->len;
579 skb->len;
580 }
581 } 772 }
582 773
583 rtl_is_special_data(hw, skb, false); 774 rtl_is_special_data(hw, skb, false);
@@ -591,28 +782,38 @@ static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
591 num_rx_inperiod++; 782 num_rx_inperiod++;
592 } 783 }
593 784
594 if (unlikely(!rtl_action_proc(hw, skb, 785 /* for sw lps */
595 false))) { 786 rtl_swlps_beacon(hw, (void *)skb->data,
787 skb->len);
788 rtl_recognize_peer(hw, (void *)skb->data,
789 skb->len);
790 if ((rtlpriv->mac80211.opmode ==
791 NL80211_IFTYPE_AP) &&
792 (rtlpriv->rtlhal.current_bandtype ==
793 BAND_ON_2_4G) &&
794 (ieee80211_is_beacon(fc) ||
795 ieee80211_is_probe_resp(fc))) {
596 dev_kfree_skb_any(skb); 796 dev_kfree_skb_any(skb);
597 } else { 797 } else {
598 struct sk_buff *uskb = NULL; 798 if (unlikely(!rtl_action_proc(hw, skb,
599 u8 *pdata; 799 false))) {
600 uskb = dev_alloc_skb(skb->len + 128); 800 dev_kfree_skb_any(skb);
601 if (!uskb) { 801 } else {
602 RT_TRACE(rtlpriv, 802 struct sk_buff *uskb = NULL;
603 (COMP_INTR | COMP_RECV), 803 u8 *pdata;
604 DBG_EMERG, 804 uskb = dev_alloc_skb(skb->len
605 ("can't alloc rx skb\n")); 805 + 128);
606 goto done; 806 memcpy(IEEE80211_SKB_RXCB(uskb),
807 &rx_status,
808 sizeof(rx_status));
809 pdata = (u8 *)skb_put(uskb,
810 skb->len);
811 memcpy(pdata, skb->data,
812 skb->len);
813 dev_kfree_skb_any(skb);
814
815 ieee80211_rx_irqsafe(hw, uskb);
607 } 816 }
608 memcpy(IEEE80211_SKB_RXCB(uskb),
609 &rx_status,
610 sizeof(rx_status));
611 pdata = (u8 *)skb_put(uskb, skb->len);
612 memcpy(pdata, skb->data, skb->len);
613 dev_kfree_skb_any(skb);
614
615 ieee80211_rx_irqsafe(hw, uskb);
616 } 817 }
617 } else { 818 } else {
618 dev_kfree_skb_any(skb); 819 dev_kfree_skb_any(skb);
@@ -627,7 +828,7 @@ static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
627 new_skb = dev_alloc_skb(rtlpci->rxbuffersize); 828 new_skb = dev_alloc_skb(rtlpci->rxbuffersize);
628 if (unlikely(!new_skb)) { 829 if (unlikely(!new_skb)) {
629 RT_TRACE(rtlpriv, (COMP_INTR | COMP_RECV), 830 RT_TRACE(rtlpriv, (COMP_INTR | COMP_RECV),
630 DBG_EMERG, 831 DBG_DMESG,
631 ("can't alloc skb for rx\n")); 832 ("can't alloc skb for rx\n"));
632 goto done; 833 goto done;
633 } 834 }
@@ -645,7 +846,7 @@ static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
645 846
646 } 847 }
647done: 848done:
648 bufferaddress = (u32)(*((dma_addr_t *) skb->cb)); 849 bufferaddress = cpu_to_le32(*((dma_addr_t *)skb->cb));
649 tmp_one = 1; 850 tmp_one = 1;
650 rtlpriv->cfg->ops->set_desc((u8 *) pdesc, false, 851 rtlpriv->cfg->ops->set_desc((u8 *) pdesc, false,
651 HW_DESC_RXBUFF_ADDR, 852 HW_DESC_RXBUFF_ADDR,
@@ -669,11 +870,81 @@ done:
669 870
670} 871}
671 872
873void _rtl_pci_tx_interrupt(struct ieee80211_hw *hw)
874{
875 struct rtl_priv *rtlpriv = rtl_priv(hw);
876 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
877 int prio;
878
879 for (prio = 0; prio < RTL_PCI_MAX_TX_QUEUE_COUNT; prio++) {
880 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
881
882 while (skb_queue_len(&ring->queue)) {
883 struct rtl_tx_desc *entry = &ring->desc[ring->idx];
884 struct sk_buff *skb;
885 struct ieee80211_tx_info *info;
886 u8 own;
887
888 /*
889 *beacon packet will only use the first
890 *descriptor defautly, and the own may not
891 *be cleared by the hardware, and
892 *beacon will free in prepare beacon
893 */
894 if (prio == BEACON_QUEUE || prio == TXCMD_QUEUE ||
895 prio == HCCA_QUEUE)
896 break;
897
898 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) entry,
899 true,
900 HW_DESC_OWN);
901
902 if (own)
903 break;
904
905 skb = __skb_dequeue(&ring->queue);
906 pci_unmap_single(rtlpci->pdev,
907 le32_to_cpu(rtlpriv->cfg->ops->
908 get_desc((u8 *) entry,
909 true,
910 HW_DESC_TXBUFF_ADDR)),
911 skb->len, PCI_DMA_TODEVICE);
912
913 ring->idx = (ring->idx + 1) % ring->entries;
914
915 info = IEEE80211_SKB_CB(skb);
916 ieee80211_tx_info_clear_status(info);
917
918 info->flags |= IEEE80211_TX_STAT_ACK;
919 /*info->status.rates[0].count = 1; */
920
921 ieee80211_tx_status_irqsafe(hw, skb);
922
923 if ((ring->entries - skb_queue_len(&ring->queue))
924 == 2 && prio != BEACON_QUEUE) {
925 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
926 ("more desc left, wake "
927 "skb_queue@%d,ring->idx = %d,"
928 "skb_queue_len = 0x%d\n",
929 prio, ring->idx,
930 skb_queue_len(&ring->queue)));
931
932 ieee80211_wake_queue(hw,
933 skb_get_queue_mapping
934 (skb));
935 }
936
937 skb = NULL;
938 }
939 }
940}
941
672static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id) 942static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id)
673{ 943{
674 struct ieee80211_hw *hw = dev_id; 944 struct ieee80211_hw *hw = dev_id;
675 struct rtl_priv *rtlpriv = rtl_priv(hw); 945 struct rtl_priv *rtlpriv = rtl_priv(hw);
676 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 946 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
947 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
677 unsigned long flags; 948 unsigned long flags;
678 u32 inta = 0; 949 u32 inta = 0;
679 u32 intb = 0; 950 u32 intb = 0;
@@ -760,23 +1031,36 @@ static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id)
760 _rtl_pci_tx_isr(hw, VO_QUEUE); 1031 _rtl_pci_tx_isr(hw, VO_QUEUE);
761 } 1032 }
762 1033
1034 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE) {
1035 if (inta & rtlpriv->cfg->maps[RTL_IMR_COMDOK]) {
1036 rtlpriv->link_info.num_tx_inperiod++;
1037
1038 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1039 ("CMD TX OK interrupt!\n"));
1040 _rtl_pci_tx_isr(hw, TXCMD_QUEUE);
1041 }
1042 }
1043
763 /*<2> Rx related */ 1044 /*<2> Rx related */
764 if (inta & rtlpriv->cfg->maps[RTL_IMR_ROK]) { 1045 if (inta & rtlpriv->cfg->maps[RTL_IMR_ROK]) {
765 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, ("Rx ok interrupt!\n")); 1046 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, ("Rx ok interrupt!\n"));
766 tasklet_schedule(&rtlpriv->works.irq_tasklet); 1047 _rtl_pci_rx_interrupt(hw);
767 } 1048 }
768 1049
769 if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RDU])) { 1050 if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RDU])) {
770 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, 1051 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
771 ("rx descriptor unavailable!\n")); 1052 ("rx descriptor unavailable!\n"));
772 tasklet_schedule(&rtlpriv->works.irq_tasklet); 1053 _rtl_pci_rx_interrupt(hw);
773 } 1054 }
774 1055
775 if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RXFOVW])) { 1056 if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RXFOVW])) {
776 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, ("rx overflow !\n")); 1057 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, ("rx overflow !\n"));
777 tasklet_schedule(&rtlpriv->works.irq_tasklet); 1058 _rtl_pci_rx_interrupt(hw);
778 } 1059 }
779 1060
1061 if (rtlpriv->rtlhal.earlymode_enable)
1062 tasklet_schedule(&rtlpriv->works.irq_tasklet);
1063
780 spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags); 1064 spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
781 return IRQ_HANDLED; 1065 return IRQ_HANDLED;
782 1066
@@ -787,7 +1071,7 @@ done:
787 1071
788static void _rtl_pci_irq_tasklet(struct ieee80211_hw *hw) 1072static void _rtl_pci_irq_tasklet(struct ieee80211_hw *hw)
789{ 1073{
790 _rtl_pci_rx_interrupt(hw); 1074 _rtl_pci_tx_chk_waitq(hw);
791} 1075}
792 1076
793static void _rtl_pci_prepare_bcn_tasklet(struct ieee80211_hw *hw) 1077static void _rtl_pci_prepare_bcn_tasklet(struct ieee80211_hw *hw)
@@ -795,14 +1079,15 @@ static void _rtl_pci_prepare_bcn_tasklet(struct ieee80211_hw *hw)
795 struct rtl_priv *rtlpriv = rtl_priv(hw); 1079 struct rtl_priv *rtlpriv = rtl_priv(hw);
796 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 1080 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
797 struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); 1081 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
798 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[BEACON_QUEUE]; 1082 struct rtl8192_tx_ring *ring = NULL;
799 struct ieee80211_hdr *hdr = NULL; 1083 struct ieee80211_hdr *hdr = NULL;
800 struct ieee80211_tx_info *info = NULL; 1084 struct ieee80211_tx_info *info = NULL;
801 struct sk_buff *pskb = NULL; 1085 struct sk_buff *pskb = NULL;
802 struct rtl_tx_desc *pdesc = NULL; 1086 struct rtl_tx_desc *pdesc = NULL;
803 unsigned int queue_index; 1087 struct rtl_tcb_desc tcb_desc;
804 u8 temp_one = 1; 1088 u8 temp_one = 1;
805 1089
1090 memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
806 ring = &rtlpci->tx_ring[BEACON_QUEUE]; 1091 ring = &rtlpci->tx_ring[BEACON_QUEUE];
807 pskb = __skb_dequeue(&ring->queue); 1092 pskb = __skb_dequeue(&ring->queue);
808 if (pskb) 1093 if (pskb)
@@ -812,14 +1097,13 @@ static void _rtl_pci_prepare_bcn_tasklet(struct ieee80211_hw *hw)
812 pskb = ieee80211_beacon_get(hw, mac->vif); 1097 pskb = ieee80211_beacon_get(hw, mac->vif);
813 if (pskb == NULL) 1098 if (pskb == NULL)
814 return; 1099 return;
815 hdr = (struct ieee80211_hdr *)(pskb->data); 1100 hdr = rtl_get_hdr(pskb);
816 info = IEEE80211_SKB_CB(pskb); 1101 info = IEEE80211_SKB_CB(pskb);
817
818 queue_index = BEACON_QUEUE;
819
820 pdesc = &ring->desc[0]; 1102 pdesc = &ring->desc[0];
1103#if 0 /* temporary */
821 rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *) pdesc, 1104 rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *) pdesc,
822 info, pskb, queue_index); 1105 info, pskb, BEACON_QUEUE, &tcb_desc);
1106#endif
823 1107
824 __skb_queue_tail(&ring->queue, pskb); 1108 __skb_queue_tail(&ring->queue, pskb);
825 1109
@@ -861,7 +1145,6 @@ static void _rtl_pci_init_struct(struct ieee80211_hw *hw,
861 struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); 1145 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
862 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 1146 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
863 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); 1147 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
864 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
865 1148
866 rtlpci->up_first_time = true; 1149 rtlpci->up_first_time = true;
867 rtlpci->being_init_adapter = false; 1150 rtlpci->being_init_adapter = false;
@@ -869,31 +1152,20 @@ static void _rtl_pci_init_struct(struct ieee80211_hw *hw,
869 rtlhal->hw = hw; 1152 rtlhal->hw = hw;
870 rtlpci->pdev = pdev; 1153 rtlpci->pdev = pdev;
871 1154
872 ppsc->inactiveps = false;
873 ppsc->leisure_ps = true;
874 ppsc->fwctrl_lps = true;
875 ppsc->reg_fwctrl_lps = 3;
876 ppsc->reg_max_lps_awakeintvl = 5;
877
878 if (ppsc->reg_fwctrl_lps == 1)
879 ppsc->fwctrl_psmode = FW_PS_MIN_MODE;
880 else if (ppsc->reg_fwctrl_lps == 2)
881 ppsc->fwctrl_psmode = FW_PS_MAX_MODE;
882 else if (ppsc->reg_fwctrl_lps == 3)
883 ppsc->fwctrl_psmode = FW_PS_DTIM_MODE;
884
885 /*Tx/Rx related var */ 1155 /*Tx/Rx related var */
886 _rtl_pci_init_trx_var(hw); 1156 _rtl_pci_init_trx_var(hw);
887 1157
888 /*IBSS*/ mac->beacon_interval = 100; 1158 /*IBSS*/ mac->beacon_interval = 100;
889 1159
890 /*AMPDU*/ mac->min_space_cfg = 0; 1160 /*AMPDU*/
1161 mac->min_space_cfg = 0;
891 mac->max_mss_density = 0; 1162 mac->max_mss_density = 0;
892 /*set sane AMPDU defaults */ 1163 /*set sane AMPDU defaults */
893 mac->current_ampdu_density = 7; 1164 mac->current_ampdu_density = 7;
894 mac->current_ampdu_factor = 3; 1165 mac->current_ampdu_factor = 3;
895 1166
896 /*QOS*/ rtlpci->acm_method = eAcmWay2_SW; 1167 /*QOS*/
1168 rtlpci->acm_method = eAcmWay2_SW;
897 1169
898 /*task */ 1170 /*task */
899 tasklet_init(&rtlpriv->works.irq_tasklet, 1171 tasklet_init(&rtlpriv->works.irq_tasklet,
@@ -934,8 +1206,9 @@ static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
934 ("queue:%d, ring_addr:%p\n", prio, ring)); 1206 ("queue:%d, ring_addr:%p\n", prio, ring));
935 1207
936 for (i = 0; i < entries; i++) { 1208 for (i = 0; i < entries; i++) {
937 nextdescaddress = (u32) dma + ((i + 1) % entries) * 1209 nextdescaddress = cpu_to_le32((u32) dma +
938 sizeof(*ring); 1210 ((i + 11) % entries) *
1211 sizeof(*ring));
939 1212
940 rtlpriv->cfg->ops->set_desc((u8 *)&(ring[i]), 1213 rtlpriv->cfg->ops->set_desc((u8 *)&(ring[i]),
941 true, HW_DESC_TX_NEXTDESC_ADDR, 1214 true, HW_DESC_TX_NEXTDESC_ADDR,
@@ -999,7 +1272,7 @@ static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw)
999 rtlpci->rxbuffersize, 1272 rtlpci->rxbuffersize,
1000 PCI_DMA_FROMDEVICE); 1273 PCI_DMA_FROMDEVICE);
1001 1274
1002 bufferaddress = (u32)(*((dma_addr_t *)skb->cb)); 1275 bufferaddress = cpu_to_le32(*((dma_addr_t *)skb->cb));
1003 rtlpriv->cfg->ops->set_desc((u8 *)entry, false, 1276 rtlpriv->cfg->ops->set_desc((u8 *)entry, false,
1004 HW_DESC_RXBUFF_ADDR, 1277 HW_DESC_RXBUFF_ADDR,
1005 (u8 *)&bufferaddress); 1278 (u8 *)&bufferaddress);
@@ -1030,9 +1303,9 @@ static void _rtl_pci_free_tx_ring(struct ieee80211_hw *hw,
1030 struct sk_buff *skb = __skb_dequeue(&ring->queue); 1303 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1031 1304
1032 pci_unmap_single(rtlpci->pdev, 1305 pci_unmap_single(rtlpci->pdev,
1033 rtlpriv->cfg-> 1306 le32_to_cpu(rtlpriv->cfg->
1034 ops->get_desc((u8 *) entry, true, 1307 ops->get_desc((u8 *) entry, true,
1035 HW_DESC_TXBUFF_ADDR), 1308 HW_DESC_TXBUFF_ADDR)),
1036 skb->len, PCI_DMA_TODEVICE); 1309 skb->len, PCI_DMA_TODEVICE);
1037 kfree_skb(skb); 1310 kfree_skb(skb);
1038 ring->idx = (ring->idx + 1) % ring->entries; 1311 ring->idx = (ring->idx + 1) % ring->entries;
@@ -1164,11 +1437,11 @@ int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
1164 __skb_dequeue(&ring->queue); 1437 __skb_dequeue(&ring->queue);
1165 1438
1166 pci_unmap_single(rtlpci->pdev, 1439 pci_unmap_single(rtlpci->pdev,
1167 rtlpriv->cfg->ops-> 1440 le32_to_cpu(rtlpriv->cfg->ops->
1168 get_desc((u8 *) 1441 get_desc((u8 *)
1169 entry, 1442 entry,
1170 true, 1443 true,
1171 HW_DESC_TXBUFF_ADDR), 1444 HW_DESC_TXBUFF_ADDR)),
1172 skb->len, PCI_DMA_TODEVICE); 1445 skb->len, PCI_DMA_TODEVICE);
1173 kfree_skb(skb); 1446 kfree_skb(skb);
1174 ring->idx = (ring->idx + 1) % ring->entries; 1447 ring->idx = (ring->idx + 1) % ring->entries;
@@ -1182,70 +1455,73 @@ int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
1182 return 0; 1455 return 0;
1183} 1456}
1184 1457
1185static unsigned int _rtl_mac_to_hwqueue(__le16 fc, 1458static bool rtl_pci_tx_chk_waitq_insert(struct ieee80211_hw *hw,
1186 unsigned int mac80211_queue_index) 1459 struct sk_buff *skb)
1187{ 1460{
1188 unsigned int hw_queue_index; 1461 struct rtl_priv *rtlpriv = rtl_priv(hw);
1189 1462 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1190 if (unlikely(ieee80211_is_beacon(fc))) { 1463 struct ieee80211_sta *sta = info->control.sta;
1191 hw_queue_index = BEACON_QUEUE; 1464 struct rtl_sta_info *sta_entry = NULL;
1192 goto out; 1465 u8 tid = rtl_get_tid(skb);
1193 } 1466
1194 1467 if (!sta)
1195 if (ieee80211_is_mgmt(fc)) { 1468 return false;
1196 hw_queue_index = MGNT_QUEUE; 1469 sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1197 goto out; 1470
1198 } 1471 if (!rtlpriv->rtlhal.earlymode_enable)
1199 1472 return false;
1200 switch (mac80211_queue_index) { 1473 if (sta_entry->tids[tid].agg.agg_state != RTL_AGG_OPERATIONAL)
1201 case 0: 1474 return false;
1202 hw_queue_index = VO_QUEUE; 1475 if (_rtl_mac_to_hwqueue(hw, skb) > VO_QUEUE)
1203 break; 1476 return false;
1204 case 1: 1477 if (tid > 7)
1205 hw_queue_index = VI_QUEUE; 1478 return false;
1206 break; 1479
1207 case 2: 1480 /* maybe every tid should be checked */
1208 hw_queue_index = BE_QUEUE;; 1481 if (!rtlpriv->link_info.higher_busytxtraffic[tid])
1209 break; 1482 return false;
1210 case 3: 1483
1211 hw_queue_index = BK_QUEUE; 1484 spin_lock_bh(&rtlpriv->locks.waitq_lock);
1212 break; 1485 skb_queue_tail(&rtlpriv->mac80211.skb_waitq[tid], skb);
1213 default: 1486 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
1214 hw_queue_index = BE_QUEUE;
1215 RT_ASSERT(false, ("QSLT_BE queue, skb_queue:%d\n",
1216 mac80211_queue_index));
1217 break;
1218 }
1219 1487
1220out: 1488 return true;
1221 return hw_queue_index;
1222} 1489}
1223 1490
1224static int rtl_pci_tx(struct ieee80211_hw *hw, struct sk_buff *skb) 1491int rtl_pci_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
1492 struct rtl_tcb_desc *ptcb_desc)
1225{ 1493{
1226 struct rtl_priv *rtlpriv = rtl_priv(hw); 1494 struct rtl_priv *rtlpriv = rtl_priv(hw);
1227 struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); 1495 struct rtl_sta_info *sta_entry = NULL;
1228 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 1496 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1497 struct ieee80211_sta *sta = info->control.sta;
1229 struct rtl8192_tx_ring *ring; 1498 struct rtl8192_tx_ring *ring;
1230 struct rtl_tx_desc *pdesc; 1499 struct rtl_tx_desc *pdesc;
1231 u8 idx; 1500 u8 idx;
1232 unsigned int queue_index, hw_queue; 1501 u8 hw_queue = _rtl_mac_to_hwqueue(hw, skb);
1233 unsigned long flags; 1502 unsigned long flags;
1234 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data); 1503 struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
1235 __le16 fc = hdr->frame_control; 1504 __le16 fc = rtl_get_fc(skb);
1236 u8 *pda_addr = hdr->addr1; 1505 u8 *pda_addr = hdr->addr1;
1237 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 1506 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1238 /*ssn */ 1507 /*ssn */
1239 u8 *qc = NULL;
1240 u8 tid = 0; 1508 u8 tid = 0;
1241 u16 seq_number = 0; 1509 u16 seq_number = 0;
1242 u8 own; 1510 u8 own;
1243 u8 temp_one = 1; 1511 u8 temp_one = 1;
1244 1512
1245 rtl_action_proc(hw, skb, true); 1513 if (ieee80211_is_auth(fc)) {
1514 RT_TRACE(rtlpriv, COMP_SEND, DBG_DMESG, ("MAC80211_LINKING\n"));
1515 rtl_ips_nic_on(hw);
1516 }
1517
1518 if (rtlpriv->psc.sw_ps_enabled) {
1519 if (ieee80211_is_data(fc) && !ieee80211_is_nullfunc(fc) &&
1520 !ieee80211_has_pm(fc))
1521 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1522 }
1246 1523
1247 queue_index = skb_get_queue_mapping(skb); 1524 rtl_action_proc(hw, skb, true);
1248 hw_queue = _rtl_mac_to_hwqueue(fc, queue_index);
1249 1525
1250 if (is_multicast_ether_addr(pda_addr)) 1526 if (is_multicast_ether_addr(pda_addr))
1251 rtlpriv->stats.txbytesmulticast += skb->len; 1527 rtlpriv->stats.txbytesmulticast += skb->len;
@@ -1255,7 +1531,6 @@ static int rtl_pci_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
1255 rtlpriv->stats.txbytesunicast += skb->len; 1531 rtlpriv->stats.txbytesunicast += skb->len;
1256 1532
1257 spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags); 1533 spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1258
1259 ring = &rtlpci->tx_ring[hw_queue]; 1534 ring = &rtlpci->tx_ring[hw_queue];
1260 if (hw_queue != BEACON_QUEUE) 1535 if (hw_queue != BEACON_QUEUE)
1261 idx = (ring->idx + skb_queue_len(&ring->queue)) % 1536 idx = (ring->idx + skb_queue_len(&ring->queue)) %
@@ -1278,43 +1553,32 @@ static int rtl_pci_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
1278 return skb->len; 1553 return skb->len;
1279 } 1554 }
1280 1555
1281 /*
1282 *if(ieee80211_is_nullfunc(fc)) {
1283 * spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1284 * return 1;
1285 *}
1286 */
1287
1288 if (ieee80211_is_data_qos(fc)) { 1556 if (ieee80211_is_data_qos(fc)) {
1289 qc = ieee80211_get_qos_ctl(hdr); 1557 tid = rtl_get_tid(skb);
1290 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK; 1558 if (sta) {
1291 1559 sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1292 seq_number = mac->tids[tid].seq_number; 1560 seq_number = (le16_to_cpu(hdr->seq_ctrl) &
1293 seq_number &= IEEE80211_SCTL_SEQ; 1561 IEEE80211_SCTL_SEQ) >> 4;
1294 /* 1562 seq_number += 1;
1295 *hdr->seq_ctrl = hdr->seq_ctrl & 1563
1296 *cpu_to_le16(IEEE80211_SCTL_FRAG); 1564 if (!ieee80211_has_morefrags(hdr->frame_control))
1297 *hdr->seq_ctrl |= cpu_to_le16(seq_number); 1565 sta_entry->tids[tid].seq_number = seq_number;
1298 */ 1566 }
1299
1300 seq_number += 1;
1301 } 1567 }
1302 1568
1303 if (ieee80211_is_data(fc)) 1569 if (ieee80211_is_data(fc))
1304 rtlpriv->cfg->ops->led_control(hw, LED_CTL_TX); 1570 rtlpriv->cfg->ops->led_control(hw, LED_CTL_TX);
1305 1571
1306 rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *) pdesc, 1572#if 0 /* temporary */
1307 info, skb, hw_queue); 1573 rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1574 info, skb, hw_queue, ptcb_desc);
1575#endif
1308 1576
1309 __skb_queue_tail(&ring->queue, skb); 1577 __skb_queue_tail(&ring->queue, skb);
1310 1578
1311 rtlpriv->cfg->ops->set_desc((u8 *) pdesc, true, 1579 rtlpriv->cfg->ops->set_desc((u8 *)pdesc, true,
1312 HW_DESC_OWN, (u8 *)&temp_one); 1580 HW_DESC_OWN, (u8 *)&temp_one);
1313 1581
1314 if (!ieee80211_has_morefrags(hdr->frame_control)) {
1315 if (qc)
1316 mac->tids[tid].seq_number = seq_number;
1317 }
1318 1582
1319 if ((ring->entries - skb_queue_len(&ring->queue)) < 2 && 1583 if ((ring->entries - skb_queue_len(&ring->queue)) < 2 &&
1320 hw_queue != BEACON_QUEUE) { 1584 hw_queue != BEACON_QUEUE) {
@@ -1336,7 +1600,36 @@ static int rtl_pci_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
1336 return 0; 1600 return 0;
1337} 1601}
1338 1602
1339static void rtl_pci_deinit(struct ieee80211_hw *hw) 1603static void rtl_pci_flush(struct ieee80211_hw *hw, bool drop)
1604{
1605 struct rtl_priv *rtlpriv = rtl_priv(hw);
1606 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1607 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1608 u16 i = 0;
1609 int queue_id;
1610 struct rtl8192_tx_ring *ring;
1611
1612 for (queue_id = RTL_PCI_MAX_TX_QUEUE_COUNT - 1; queue_id >= 0;) {
1613 u32 queue_len;
1614 ring = &pcipriv->dev.tx_ring[queue_id];
1615 queue_len = skb_queue_len(&ring->queue);
1616 if (queue_len == 0 || queue_id == BEACON_QUEUE ||
1617 queue_id == TXCMD_QUEUE) {
1618 queue_id--;
1619 continue;
1620 } else {
1621 msleep(20);
1622 i++;
1623 }
1624
1625 /* we just wait 1s for all queues */
1626 if (rtlpriv->psc.rfpwr_state == ERFOFF ||
1627 is_hal_stop(rtlhal) || i >= 200)
1628 return;
1629 }
1630}
1631
1632void rtl_pci_deinit(struct ieee80211_hw *hw)
1340{ 1633{
1341 struct rtl_priv *rtlpriv = rtl_priv(hw); 1634 struct rtl_priv *rtlpriv = rtl_priv(hw);
1342 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 1635 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
@@ -1351,7 +1644,7 @@ static void rtl_pci_deinit(struct ieee80211_hw *hw)
1351 1644
1352} 1645}
1353 1646
1354static int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev) 1647int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
1355{ 1648{
1356 struct rtl_priv *rtlpriv = rtl_priv(hw); 1649 struct rtl_priv *rtlpriv = rtl_priv(hw);
1357 int err; 1650 int err;
@@ -1368,7 +1661,7 @@ static int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
1368 return 1; 1661 return 1;
1369} 1662}
1370 1663
1371static int rtl_pci_start(struct ieee80211_hw *hw) 1664int rtl_pci_start(struct ieee80211_hw *hw)
1372{ 1665{
1373 struct rtl_priv *rtlpriv = rtl_priv(hw); 1666 struct rtl_priv *rtlpriv = rtl_priv(hw);
1374 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); 1667 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
@@ -1403,7 +1696,7 @@ static int rtl_pci_start(struct ieee80211_hw *hw)
1403 return 0; 1696 return 0;
1404} 1697}
1405 1698
1406static void rtl_pci_stop(struct ieee80211_hw *hw) 1699void rtl_pci_stop(struct ieee80211_hw *hw)
1407{ 1700{
1408 struct rtl_priv *rtlpriv = rtl_priv(hw); 1701 struct rtl_priv *rtlpriv = rtl_priv(hw);
1409 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 1702 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
@@ -1454,11 +1747,13 @@ static bool _rtl_pci_find_adapter(struct pci_dev *pdev,
1454 struct pci_dev *bridge_pdev = pdev->bus->self; 1747 struct pci_dev *bridge_pdev = pdev->bus->self;
1455 u16 venderid; 1748 u16 venderid;
1456 u16 deviceid; 1749 u16 deviceid;
1750 u8 revisionid;
1457 u16 irqline; 1751 u16 irqline;
1458 u8 tmp; 1752 u8 tmp;
1459 1753
1460 venderid = pdev->vendor; 1754 venderid = pdev->vendor;
1461 deviceid = pdev->device; 1755 deviceid = pdev->device;
1756 pci_read_config_byte(pdev, 0x8, &revisionid);
1462 pci_read_config_word(pdev, 0x3C, &irqline); 1757 pci_read_config_word(pdev, 0x3C, &irqline);
1463 1758
1464 if (deviceid == RTL_PCI_8192_DID || 1759 if (deviceid == RTL_PCI_8192_DID ||
@@ -1469,7 +1764,7 @@ static bool _rtl_pci_find_adapter(struct pci_dev *pdev,
1469 deviceid == RTL_PCI_8173_DID || 1764 deviceid == RTL_PCI_8173_DID ||
1470 deviceid == RTL_PCI_8172_DID || 1765 deviceid == RTL_PCI_8172_DID ||
1471 deviceid == RTL_PCI_8171_DID) { 1766 deviceid == RTL_PCI_8171_DID) {
1472 switch (pdev->revision) { 1767 switch (revisionid) {
1473 case RTL_PCI_REVISION_ID_8192PCIE: 1768 case RTL_PCI_REVISION_ID_8192PCIE:
1474 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 1769 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1475 ("8192 PCI-E is found - " 1770 ("8192 PCI-E is found - "
@@ -1498,6 +1793,12 @@ static bool _rtl_pci_find_adapter(struct pci_dev *pdev,
1498 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 1793 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1499 ("8192C PCI-E is found - " 1794 ("8192C PCI-E is found - "
1500 "vid/did=%x/%x\n", venderid, deviceid)); 1795 "vid/did=%x/%x\n", venderid, deviceid));
1796 } else if (deviceid == RTL_PCI_8192DE_DID ||
1797 deviceid == RTL_PCI_8192DE_DID2) {
1798 rtlhal->hw_type = HARDWARE_TYPE_RTL8192DE;
1799 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1800 ("8192D PCI-E is found - "
1801 "vid/did=%x/%x\n", venderid, deviceid));
1501 } else { 1802 } else {
1502 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, 1803 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1503 ("Err: Unknown device -" 1804 ("Err: Unknown device -"
@@ -1506,6 +1807,25 @@ static bool _rtl_pci_find_adapter(struct pci_dev *pdev,
1506 rtlhal->hw_type = RTL_DEFAULT_HARDWARE_TYPE; 1807 rtlhal->hw_type = RTL_DEFAULT_HARDWARE_TYPE;
1507 } 1808 }
1508 1809
1810 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192DE) {
1811 if (revisionid == 0 || revisionid == 1) {
1812 if (revisionid == 0) {
1813 RT_TRACE(rtlpriv, COMP_INIT,
1814 DBG_LOUD, ("Find 92DE MAC0.\n"));
1815 rtlhal->interfaceindex = 0;
1816 } else if (revisionid == 1) {
1817 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1818 ("Find 92DE MAC1.\n"));
1819 rtlhal->interfaceindex = 1;
1820 }
1821 } else {
1822 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1823 ("Unknown device - "
1824 "VendorID/DeviceID=%x/%x, Revision=%x\n",
1825 venderid, deviceid, revisionid));
1826 rtlhal->interfaceindex = 0;
1827 }
1828 }
1509 /*find bus info */ 1829 /*find bus info */
1510 pcipriv->ndis_adapter.busnumber = pdev->bus->number; 1830 pcipriv->ndis_adapter.busnumber = pdev->bus->number;
1511 pcipriv->ndis_adapter.devnumber = PCI_SLOT(pdev->devfn); 1831 pcipriv->ndis_adapter.devnumber = PCI_SLOT(pdev->devfn);
@@ -1531,12 +1851,12 @@ static bool _rtl_pci_find_adapter(struct pci_dev *pdev,
1531 PCI_SLOT(bridge_pdev->devfn); 1851 PCI_SLOT(bridge_pdev->devfn);
1532 pcipriv->ndis_adapter.pcibridge_funcnum = 1852 pcipriv->ndis_adapter.pcibridge_funcnum =
1533 PCI_FUNC(bridge_pdev->devfn); 1853 PCI_FUNC(bridge_pdev->devfn);
1534 pcipriv->ndis_adapter.pcibridge_pciehdr_offset =
1535 pci_pcie_cap(bridge_pdev);
1536 pcipriv->ndis_adapter.pcicfg_addrport = 1854 pcipriv->ndis_adapter.pcicfg_addrport =
1537 (pcipriv->ndis_adapter.pcibridge_busnum << 16) | 1855 (pcipriv->ndis_adapter.pcibridge_busnum << 16) |
1538 (pcipriv->ndis_adapter.pcibridge_devnum << 11) | 1856 (pcipriv->ndis_adapter.pcibridge_devnum << 11) |
1539 (pcipriv->ndis_adapter.pcibridge_funcnum << 8) | (1 << 31); 1857 (pcipriv->ndis_adapter.pcibridge_funcnum << 8) | (1 << 31);
1858 pcipriv->ndis_adapter.pcibridge_pciehdr_offset =
1859 pci_pcie_cap(bridge_pdev);
1540 pcipriv->ndis_adapter.num4bytes = 1860 pcipriv->ndis_adapter.num4bytes =
1541 (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10) / 4; 1861 (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10) / 4;
1542 1862
@@ -1619,6 +1939,11 @@ int __devinit rtl_pci_probe(struct pci_dev *pdev,
1619 pcipriv = (void *)rtlpriv->priv; 1939 pcipriv = (void *)rtlpriv->priv;
1620 pcipriv->dev.pdev = pdev; 1940 pcipriv->dev.pdev = pdev;
1621 1941
1942 /* init cfg & intf_ops */
1943 rtlpriv->rtlhal.interface = INTF_PCI;
1944 rtlpriv->cfg = (struct rtl_hal_cfg *)(id->driver_data);
1945 rtlpriv->intf_ops = &rtl_pci_ops;
1946
1622 /* 1947 /*
1623 *init dbgp flags before all 1948 *init dbgp flags before all
1624 *other functions, because we will 1949 *other functions, because we will
@@ -1636,13 +1961,14 @@ int __devinit rtl_pci_probe(struct pci_dev *pdev,
1636 return err; 1961 return err;
1637 } 1962 }
1638 1963
1639 pmem_start = pci_resource_start(pdev, 2); 1964 pmem_start = pci_resource_start(pdev, rtlpriv->cfg->bar_id);
1640 pmem_len = pci_resource_len(pdev, 2); 1965 pmem_len = pci_resource_len(pdev, rtlpriv->cfg->bar_id);
1641 pmem_flags = pci_resource_flags(pdev, 2); 1966 pmem_flags = pci_resource_flags(pdev, rtlpriv->cfg->bar_id);
1642 1967
1643 /*shared mem start */ 1968 /*shared mem start */
1644 rtlpriv->io.pci_mem_start = 1969 rtlpriv->io.pci_mem_start =
1645 (unsigned long)pci_iomap(pdev, 2, pmem_len); 1970 (unsigned long)pci_iomap(pdev,
1971 rtlpriv->cfg->bar_id, pmem_len);
1646 if (rtlpriv->io.pci_mem_start == 0) { 1972 if (rtlpriv->io.pci_mem_start == 0) {
1647 RT_ASSERT(false, ("Can't map PCI mem\n")); 1973 RT_ASSERT(false, ("Can't map PCI mem\n"));
1648 goto fail2; 1974 goto fail2;
@@ -1661,11 +1987,6 @@ int __devinit rtl_pci_probe(struct pci_dev *pdev,
1661 pci_write_config_byte(pdev, 0x04, 0x06); 1987 pci_write_config_byte(pdev, 0x04, 0x06);
1662 pci_write_config_byte(pdev, 0x04, 0x07); 1988 pci_write_config_byte(pdev, 0x04, 0x07);
1663 1989
1664 /* init cfg & intf_ops */
1665 rtlpriv->rtlhal.interface = INTF_PCI;
1666 rtlpriv->cfg = (struct rtl_hal_cfg *)(id->driver_data);
1667 rtlpriv->intf_ops = &rtl_pci_ops;
1668
1669 /* find adapter */ 1990 /* find adapter */
1670 _rtl_pci_find_adapter(pdev, hw); 1991 _rtl_pci_find_adapter(pdev, hw);
1671 1992
@@ -1783,8 +2104,6 @@ void rtl_pci_disconnect(struct pci_dev *pdev)
1783 2104
1784 rtl_pci_deinit(hw); 2105 rtl_pci_deinit(hw);
1785 rtl_deinit_core(hw); 2106 rtl_deinit_core(hw);
1786 if (rtlpriv->cfg->ops->deinit_sw_leds)
1787 rtlpriv->cfg->ops->deinit_sw_leds(hw);
1788 _rtl_pci_io_handler_release(hw); 2107 _rtl_pci_io_handler_release(hw);
1789 rtlpriv->cfg->ops->deinit_sw_vars(hw); 2108 rtlpriv->cfg->ops->deinit_sw_vars(hw);
1790 2109
@@ -1799,6 +2118,9 @@ void rtl_pci_disconnect(struct pci_dev *pdev)
1799 } 2118 }
1800 2119
1801 pci_disable_device(pdev); 2120 pci_disable_device(pdev);
2121
2122 rtl_pci_disable_aspm(hw);
2123
1802 pci_set_drvdata(pdev, NULL); 2124 pci_set_drvdata(pdev, NULL);
1803 2125
1804 ieee80211_free_hw(hw); 2126 ieee80211_free_hw(hw);
@@ -1822,10 +2144,15 @@ no need to call hw_disable here.
1822****************************************/ 2144****************************************/
1823int rtl_pci_suspend(struct pci_dev *pdev, pm_message_t state) 2145int rtl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1824{ 2146{
2147 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2148 struct rtl_priv *rtlpriv = rtl_priv(hw);
2149
2150 rtlpriv->cfg->ops->hw_suspend(hw);
2151 rtl_deinit_rfkill(hw);
2152
1825 pci_save_state(pdev); 2153 pci_save_state(pdev);
1826 pci_disable_device(pdev); 2154 pci_disable_device(pdev);
1827 pci_set_power_state(pdev, PCI_D3hot); 2155 pci_set_power_state(pdev, PCI_D3hot);
1828
1829 return 0; 2156 return 0;
1830} 2157}
1831EXPORT_SYMBOL(rtl_pci_suspend); 2158EXPORT_SYMBOL(rtl_pci_suspend);
@@ -1833,6 +2160,8 @@ EXPORT_SYMBOL(rtl_pci_suspend);
1833int rtl_pci_resume(struct pci_dev *pdev) 2160int rtl_pci_resume(struct pci_dev *pdev)
1834{ 2161{
1835 int ret; 2162 int ret;
2163 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2164 struct rtl_priv *rtlpriv = rtl_priv(hw);
1836 2165
1837 pci_set_power_state(pdev, PCI_D0); 2166 pci_set_power_state(pdev, PCI_D0);
1838 ret = pci_enable_device(pdev); 2167 ret = pci_enable_device(pdev);
@@ -1843,15 +2172,20 @@ int rtl_pci_resume(struct pci_dev *pdev)
1843 2172
1844 pci_restore_state(pdev); 2173 pci_restore_state(pdev);
1845 2174
2175 rtlpriv->cfg->ops->hw_resume(hw);
2176 rtl_init_rfkill(hw);
1846 return 0; 2177 return 0;
1847} 2178}
1848EXPORT_SYMBOL(rtl_pci_resume); 2179EXPORT_SYMBOL(rtl_pci_resume);
1849 2180
1850struct rtl_intf_ops rtl_pci_ops = { 2181struct rtl_intf_ops rtl_pci_ops = {
2182 .read_efuse_byte = read_efuse_byte,
1851 .adapter_start = rtl_pci_start, 2183 .adapter_start = rtl_pci_start,
1852 .adapter_stop = rtl_pci_stop, 2184 .adapter_stop = rtl_pci_stop,
1853 .adapter_tx = rtl_pci_tx, 2185 .adapter_tx = rtl_pci_tx,
2186 .flush = rtl_pci_flush,
1854 .reset_trx_ring = rtl_pci_reset_trx_ring, 2187 .reset_trx_ring = rtl_pci_reset_trx_ring,
2188 .waitq_insert = rtl_pci_tx_chk_waitq_insert,
1855 2189
1856 .disable_aspm = rtl_pci_disable_aspm, 2190 .disable_aspm = rtl_pci_disable_aspm,
1857 .enable_aspm = rtl_pci_enable_aspm, 2191 .enable_aspm = rtl_pci_enable_aspm,