diff options
| author | Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com> | 2010-12-22 07:04:11 -0500 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@suse.de> | 2011-03-14 19:24:10 -0400 |
| commit | 1a738dcf6dac74a0ce10853a068d822f66f73268 (patch) | |
| tree | 96b45c0306e1412fc6628fb0cf014bf7433a18ee /drivers/misc | |
| parent | ed43b47b29bce303f86e1bff69b6f9924f5afcc4 (diff) | |
pch_phub: add new device ML7213
Add ML7213 device information.
ML7213 is companion chip of Intel Atom E6xx series for IVI(In-Vehicle Infotainment).
ML7213 is completely compatible for Intel EG20T PCH.
Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/misc')
| -rw-r--r-- | drivers/misc/Kconfig | 7 | ||||
| -rw-r--r-- | drivers/misc/pch_phub.c | 69 |
2 files changed, 53 insertions, 23 deletions
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index cc8e49db45f..b7d5ef234ac 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig | |||
| @@ -441,7 +441,7 @@ config BMP085 | |||
| 441 | module will be called bmp085. | 441 | module will be called bmp085. |
| 442 | 442 | ||
| 443 | config PCH_PHUB | 443 | config PCH_PHUB |
| 444 | tristate "PCH Packet Hub of Intel Topcliff" | 444 | tristate "PCH Packet Hub of Intel Topcliff / OKI SEMICONDUCTOR ML7213" |
| 445 | depends on PCI | 445 | depends on PCI |
| 446 | help | 446 | help |
| 447 | This driver is for PCH(Platform controller Hub) PHUB(Packet Hub) of | 447 | This driver is for PCH(Platform controller Hub) PHUB(Packet Hub) of |
| @@ -449,6 +449,11 @@ config PCH_PHUB | |||
| 449 | processor. The Topcliff has MAC address and Option ROM data in SROM. | 449 | processor. The Topcliff has MAC address and Option ROM data in SROM. |
| 450 | This driver can access MAC address and Option ROM data in SROM. | 450 | This driver can access MAC address and Option ROM data in SROM. |
| 451 | 451 | ||
| 452 | This driver also can be used for OKI SEMICONDUCTOR's ML7213 which is | ||
| 453 | for IVI(In-Vehicle Infotainment) use. | ||
| 454 | ML7213 is companion chip for Intel Atom E6xx series. | ||
| 455 | ML7213 is completely compatible for Intel EG20T PCH. | ||
| 456 | |||
| 452 | To compile this driver as a module, choose M here: the module will | 457 | To compile this driver as a module, choose M here: the module will |
| 453 | be called pch_phub. | 458 | be called pch_phub. |
| 454 | 459 | ||
diff --git a/drivers/misc/pch_phub.c b/drivers/misc/pch_phub.c index 744b804aca1..98bffc471b1 100644 --- a/drivers/misc/pch_phub.c +++ b/drivers/misc/pch_phub.c | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 2010 OKI SEMICONDUCTOR Co., LTD. | 2 | * Copyright (C) 2010 OKI SEMICONDUCTOR CO., LTD. |
| 3 | * | 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify | 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License as published by | 5 | * it under the terms of the GNU General Public License as published by |
| @@ -33,7 +33,12 @@ | |||
| 33 | #define PHUB_TIMEOUT 0x05 /* Time out value for Status Register */ | 33 | #define PHUB_TIMEOUT 0x05 /* Time out value for Status Register */ |
| 34 | #define PCH_PHUB_ROM_WRITE_ENABLE 0x01 /* Enabling for writing ROM */ | 34 | #define PCH_PHUB_ROM_WRITE_ENABLE 0x01 /* Enabling for writing ROM */ |
| 35 | #define PCH_PHUB_ROM_WRITE_DISABLE 0x00 /* Disabling for writing ROM */ | 35 | #define PCH_PHUB_ROM_WRITE_DISABLE 0x00 /* Disabling for writing ROM */ |
| 36 | #define PCH_PHUB_ROM_START_ADDR 0x14 /* ROM data area start address offset */ | 36 | #define PCH_PHUB_MAC_START_ADDR 0x20C /* MAC data area start address offset */ |
| 37 | #define PCH_PHUB_ROM_START_ADDR_EG20T 0x14 /* ROM data area start address offset | ||
| 38 | (Intel EG20T PCH)*/ | ||
| 39 | #define PCH_PHUB_ROM_START_ADDR_ML7213 0x400 /* ROM data area start address | ||
| 40 | offset(OKI SEMICONDUCTOR ML7213) | ||
| 41 | */ | ||
| 37 | 42 | ||
| 38 | /* MAX number of INT_REDUCE_CONTROL registers */ | 43 | /* MAX number of INT_REDUCE_CONTROL registers */ |
| 39 | #define MAX_NUM_INT_REDUCE_CONTROL_REG 128 | 44 | #define MAX_NUM_INT_REDUCE_CONTROL_REG 128 |
| @@ -42,6 +47,10 @@ | |||
| 42 | #define CLKCFG_CAN_50MHZ 0x12000000 | 47 | #define CLKCFG_CAN_50MHZ 0x12000000 |
| 43 | #define CLKCFG_CANCLK_MASK 0xFF000000 | 48 | #define CLKCFG_CANCLK_MASK 0xFF000000 |
| 44 | 49 | ||
| 50 | /* Macros for ML7213 */ | ||
| 51 | #define PCI_VENDOR_ID_ROHM 0x10db | ||
| 52 | #define PCI_DEVICE_ID_ROHM_ML7213_PHUB 0x801A | ||
| 53 | |||
| 45 | /* SROM ACCESS Macro */ | 54 | /* SROM ACCESS Macro */ |
| 46 | #define PCH_WORD_ADDR_MASK (~((1 << 2) - 1)) | 55 | #define PCH_WORD_ADDR_MASK (~((1 << 2) - 1)) |
| 47 | 56 | ||
| @@ -298,7 +307,7 @@ static void pch_phub_read_serial_rom_val(struct pch_phub_reg *chip, | |||
| 298 | { | 307 | { |
| 299 | unsigned int mem_addr; | 308 | unsigned int mem_addr; |
| 300 | 309 | ||
| 301 | mem_addr = PCH_PHUB_ROM_START_ADDR + | 310 | mem_addr = PCH_PHUB_ROM_START_ADDR_EG20T + |
| 302 | pch_phub_mac_offset[offset_address]; | 311 | pch_phub_mac_offset[offset_address]; |
| 303 | 312 | ||
| 304 | pch_phub_read_serial_rom(chip, mem_addr, data); | 313 | pch_phub_read_serial_rom(chip, mem_addr, data); |
| @@ -315,7 +324,7 @@ static int pch_phub_write_serial_rom_val(struct pch_phub_reg *chip, | |||
| 315 | int retval; | 324 | int retval; |
| 316 | unsigned int mem_addr; | 325 | unsigned int mem_addr; |
| 317 | 326 | ||
| 318 | mem_addr = PCH_PHUB_ROM_START_ADDR + | 327 | mem_addr = PCH_PHUB_ROM_START_ADDR_EG20T + |
| 319 | pch_phub_mac_offset[offset_address]; | 328 | pch_phub_mac_offset[offset_address]; |
| 320 | 329 | ||
| 321 | retval = pch_phub_write_serial_rom(chip, mem_addr, data); | 330 | retval = pch_phub_write_serial_rom(chip, mem_addr, data); |
| @@ -594,23 +603,38 @@ static int __devinit pch_phub_probe(struct pci_dev *pdev, | |||
| 594 | "pch_phub_extrom_base_address variable is %p\n", __func__, | 603 | "pch_phub_extrom_base_address variable is %p\n", __func__, |
| 595 | chip->pch_phub_extrom_base_address); | 604 | chip->pch_phub_extrom_base_address); |
| 596 | 605 | ||
| 597 | pci_set_drvdata(pdev, chip); | 606 | if (id->driver_data == 1) { |
| 598 | 607 | retval = sysfs_create_file(&pdev->dev.kobj, | |
| 599 | retval = sysfs_create_file(&pdev->dev.kobj, &dev_attr_pch_mac.attr); | 608 | &dev_attr_pch_mac.attr); |
| 600 | if (retval) | 609 | if (retval) |
| 601 | goto err_sysfs_create; | 610 | goto err_sysfs_create; |
| 602 | |||
| 603 | retval = sysfs_create_bin_file(&pdev->dev.kobj, &pch_bin_attr); | ||
| 604 | if (retval) | ||
| 605 | goto exit_bin_attr; | ||
| 606 | |||
| 607 | pch_phub_read_modify_write_reg(chip, (unsigned int)CLKCFG_REG_OFFSET, | ||
| 608 | CLKCFG_CAN_50MHZ, CLKCFG_CANCLK_MASK); | ||
| 609 | 611 | ||
| 610 | /* set the prefech value */ | 612 | retval = sysfs_create_bin_file(&pdev->dev.kobj, &pch_bin_attr); |
| 611 | iowrite32(0x000affaa, chip->pch_phub_base_address + 0x14); | 613 | if (retval) |
| 612 | /* set the interrupt delay value */ | 614 | goto exit_bin_attr; |
| 613 | iowrite32(0x25, chip->pch_phub_base_address + 0x44); | 615 | |
| 616 | pch_phub_read_modify_write_reg(chip, | ||
| 617 | (unsigned int)CLKCFG_REG_OFFSET, | ||
| 618 | CLKCFG_CAN_50MHZ, | ||
| 619 | CLKCFG_CANCLK_MASK); | ||
| 620 | |||
| 621 | /* set the prefech value */ | ||
| 622 | iowrite32(0x000affaa, chip->pch_phub_base_address + 0x14); | ||
| 623 | /* set the interrupt delay value */ | ||
| 624 | iowrite32(0x25, chip->pch_phub_base_address + 0x44); | ||
| 625 | } else if (id->driver_data == 2) { | ||
| 626 | retval = sysfs_create_bin_file(&pdev->dev.kobj, &pch_bin_attr); | ||
| 627 | if (retval) | ||
| 628 | goto err_sysfs_create; | ||
| 629 | /* set the prefech value | ||
| 630 | * Device2(USB OHCI #1/ USB EHCI #1/ USB Device):a | ||
| 631 | * Device4(SDIO #0,1,2):f | ||
| 632 | * Device6(SATA 2):f | ||
| 633 | * Device8(USB OHCI #0/ USB EHCI #0):a | ||
| 634 | */ | ||
| 635 | iowrite32(0x000affa0, chip->pch_phub_base_address + 0x14); | ||
| 636 | } | ||
| 637 | pci_set_drvdata(pdev, chip); | ||
| 614 | 638 | ||
| 615 | return 0; | 639 | return 0; |
| 616 | exit_bin_attr: | 640 | exit_bin_attr: |
| @@ -687,8 +711,9 @@ static int pch_phub_resume(struct pci_dev *pdev) | |||
| 687 | #endif /* CONFIG_PM */ | 711 | #endif /* CONFIG_PM */ |
| 688 | 712 | ||
| 689 | static struct pci_device_id pch_phub_pcidev_id[] = { | 713 | static struct pci_device_id pch_phub_pcidev_id[] = { |
| 690 | {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_PCH1_PHUB)}, | 714 | { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_PCH1_PHUB), 1, }, |
| 691 | {0,} | 715 | { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ROHM_ML7213_PHUB), 2, }, |
| 716 | { } | ||
| 692 | }; | 717 | }; |
| 693 | 718 | ||
| 694 | static struct pci_driver pch_phub_driver = { | 719 | static struct pci_driver pch_phub_driver = { |
