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authorHemant Hariyani <hemanthariyani@ti.com>2011-08-25 02:57:15 -0400
committerPaolo Pisati <paolo.pisati@canonical.com>2012-08-17 04:18:33 -0400
commit6e90775f610ab87bd86a79f189aca993e44b3bdf (patch)
tree3b44756d6a8e69dea6c0dbeb2244482b31d32ffc /drivers/gpu/pvr/omap3/sysconfig.c
parent1d63da95fb8e073f94c3c63d82f91c49bb2bd08a (diff)
SGX-KM Initial SGX driver integration for 2.6.35 kernel.
This is the first version of SGX driver integration to ensure UI boot-up. Power management and hwmod modifications will be added as patches. Change-Id: If71e6cd651a53f4809e7b978b693cb7d1a89178d Signed-off-by: Hemant Hariyani <hemanthariyani@ti.com>
Diffstat (limited to 'drivers/gpu/pvr/omap3/sysconfig.c')
-rw-r--r--drivers/gpu/pvr/omap3/sysconfig.c970
1 files changed, 970 insertions, 0 deletions
diff --git a/drivers/gpu/pvr/omap3/sysconfig.c b/drivers/gpu/pvr/omap3/sysconfig.c
new file mode 100644
index 00000000000..00520992b93
--- /dev/null
+++ b/drivers/gpu/pvr/omap3/sysconfig.c
@@ -0,0 +1,970 @@
1/**********************************************************************
2 *
3 * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful but, except
10 * as otherwise stated in writing, without any warranty; without even the
11 * implied warranty of merchantability or fitness for a particular purpose.
12 * See the GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * Imagination Technologies Ltd. <gpl-support@imgtec.com>
23 * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
24 *
25 ******************************************************************************/
26
27#include "services_headers.h"
28#include "kerneldisplay.h"
29#include "oemfuncs.h"
30#include "sgxinfo.h"
31#include "sgxinfokm.h"
32#include "syslocal.h"
33#include "sysconfig.h"
34
35#include "ocpdefs.h"
36
37#if !defined(NO_HARDWARE) && \
38 defined(SYS_USING_INTERRUPTS) && \
39 defined(SGX530) && (SGX_CORE_REV == 125)
40#define SGX_OCP_REGS_ENABLED
41#endif
42
43SYS_DATA* gpsSysData = (SYS_DATA*)IMG_NULL;
44SYS_DATA gsSysData;
45
46static SYS_SPECIFIC_DATA gsSysSpecificData;
47SYS_SPECIFIC_DATA *gpsSysSpecificData;
48
49static IMG_UINT32 gui32SGXDeviceID;
50static SGX_DEVICE_MAP gsSGXDeviceMap;
51static PVRSRV_DEVICE_NODE *gpsSGXDevNode;
52
53#define DEVICE_SGX_INTERRUPT (1 << 0)
54
55#if defined(NO_HARDWARE)
56static IMG_CPU_VIRTADDR gsSGXRegsCPUVAddr;
57#endif
58
59IMG_UINT32 PVRSRV_BridgeDispatchKM(IMG_UINT32 Ioctl,
60 IMG_BYTE *pInBuf,
61 IMG_UINT32 InBufLen,
62 IMG_BYTE *pOutBuf,
63 IMG_UINT32 OutBufLen,
64 IMG_UINT32 *pdwBytesTransferred);
65
66#if defined(DEBUG) && defined(DUMP_OMAP34xx_CLOCKS) && defined(__linux__)
67
68#pragma GCC diagnostic ignored "-Wstrict-prototypes"
69#include <mach/clock.h>
70
71#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29))
72#include <../mach-omap2/clock_34xx.h>
73#define ONCHIP_CLKS onchip_clks
74#else
75#include <../mach-omap2/clock34xx.h>
76#define ONCHIP_CLKS onchip_34xx_clks
77#endif
78
79static void omap3_clk_recalc(struct clk *clk) {}
80static void omap3_followparent_recalc(struct clk *clk) {}
81static void omap3_propagate_rate(struct clk *clk) {}
82static void omap3_table_recalc(struct clk *clk) {}
83static long omap3_round_to_table_rate(struct clk *clk, unsigned long rate) { return 0; }
84static int omap3_select_table_rate(struct clk *clk, unsigned long rate) { return 0; }
85
86#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29))
87static void omap3_dpll_recalc(struct clk *clk, unsigned long parent_rate,
88 u8 rate_storage) {}
89static void omap3_clkoutx2_recalc(struct clk *clk, unsigned long parent_rate,
90 u8 rate_storage) {}
91static void omap3_dpll_allow_idle(struct clk *clk) {}
92static void omap3_dpll_deny_idle(struct clk *clk) {}
93static u32 omap3_dpll_autoidle_read(struct clk *clk) { return 0; }
94static int omap3_noncore_dpll_enable(struct clk *clk) { return 0; }
95static void omap3_noncore_dpll_disable(struct clk *clk) {}
96static int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate) { return 0; }
97static int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate) { return 0; }
98void followparent_recalc(struct clk *clk, unsigned long new_parent_rate,
99 u8 rate_storage) {}
100long omap2_dpll_round_rate(struct clk *clk, unsigned long target_rate) { return 0; }
101void omap2_clksel_recalc(struct clk *clk, unsigned long new_parent_rate,
102 u8 rate_storage) {}
103long omap2_clksel_round_rate(struct clk *clk, unsigned long target_rate) { return 0; }
104int omap2_clksel_set_rate(struct clk *clk, unsigned long rate) { return 0; }
105void omap2_fixed_divisor_recalc(struct clk *clk, unsigned long new_parent_rate,
106 u8 rate_storage) {}
107void omap2_init_clksel_parent(struct clk *clk) {}
108#endif
109
110static void dump_omap34xx_clocks(void)
111{
112 struct clk **c;
113#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29))
114 struct vdd_prcm_config *t1 = vdd1_rate_table;
115 struct vdd_prcm_config *t2 = vdd2_rate_table;
116
117 t1 = t1;
118 t2 = t2;
119#else
120
121 omap3_dpll_allow_idle(0);
122 omap3_dpll_deny_idle(0);
123 omap3_dpll_autoidle_read(0);
124 omap3_clk_recalc(0);
125 omap3_followparent_recalc(0);
126 omap3_propagate_rate(0);
127 omap3_table_recalc(0);
128 omap3_round_to_table_rate(0, 0);
129 omap3_select_table_rate(0, 0);
130#endif
131
132 for(c = ONCHIP_CLKS; c < ONCHIP_CLKS + ARRAY_SIZE(ONCHIP_CLKS); c++)
133 {
134 struct clk *cp = *c, *copy;
135 unsigned long rate;
136 copy = clk_get(NULL, cp->name);
137 if(!copy)
138 continue;
139 rate = clk_get_rate(copy);
140 if (rate < 1000000)
141 {
142 PVR_DPF((PVR_DBG_ERROR, "%s: clock %s is %lu KHz (%lu Hz)", __func__, cp->name, rate/1000, rate));
143 }
144 else
145 {
146 PVR_DPF((PVR_DBG_ERROR, "%s: clock %s is %lu MHz (%lu Hz)", __func__, cp->name, rate/1000000, rate));
147 }
148 }
149}
150
151#else
152
153static INLINE void dump_omap34xx_clocks(void) {}
154
155#endif
156
157#if defined(SGX_OCP_REGS_ENABLED)
158
159#define SYS_OMAP3430_OCP_REGS_SYS_PHYS_BASE (SYS_OMAP3430_SGX_REGS_SYS_PHYS_BASE + EUR_CR_OCP_REVISION)
160#define SYS_OMAP3430_OCP_REGS_SIZE 0x110
161
162static IMG_CPU_VIRTADDR gpvOCPRegsLinAddr;
163
164static PVRSRV_ERROR EnableSGXClocksWrap(SYS_DATA *psSysData)
165{
166 PVRSRV_ERROR eError = EnableSGXClocks(psSysData);
167
168 if(eError == PVRSRV_OK)
169 {
170 OSWriteHWReg(gpvOCPRegsLinAddr,
171 EUR_CR_OCP_DEBUG_CONFIG - EUR_CR_OCP_REVISION,
172 EUR_CR_OCP_DEBUG_CONFIG_THALIA_INT_BYPASS_MASK);
173 }
174
175 return eError;
176}
177
178#else
179
180static INLINE PVRSRV_ERROR EnableSGXClocksWrap(SYS_DATA *psSysData)
181{
182 return EnableSGXClocks(psSysData);
183}
184
185#endif
186
187static INLINE PVRSRV_ERROR EnableSystemClocksWrap(SYS_DATA *psSysData)
188{
189 PVRSRV_ERROR eError = EnableSystemClocks(psSysData);
190
191#if !defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
192 if(eError == PVRSRV_OK)
193 {
194
195 EnableSGXClocksWrap(psSysData);
196 }
197#endif
198
199 return eError;
200}
201
202static PVRSRV_ERROR SysLocateDevices(SYS_DATA *psSysData)
203{
204#if defined(NO_HARDWARE)
205 PVRSRV_ERROR eError;
206 IMG_CPU_PHYADDR sCpuPAddr;
207#endif
208
209 PVR_UNREFERENCED_PARAMETER(psSysData);
210
211
212 gsSGXDeviceMap.ui32Flags = 0x0;
213
214#if defined(NO_HARDWARE)
215
216
217 eError = OSBaseAllocContigMemory(SYS_OMAP3430_SGX_REGS_SIZE,
218 &gsSGXRegsCPUVAddr,
219 &sCpuPAddr);
220 if(eError != PVRSRV_OK)
221 {
222 return eError;
223 }
224 gsSGXDeviceMap.sRegsCpuPBase = sCpuPAddr;
225 gsSGXDeviceMap.sRegsSysPBase = SysCpuPAddrToSysPAddr(gsSGXDeviceMap.sRegsCpuPBase);
226 gsSGXDeviceMap.ui32RegsSize = SYS_OMAP3430_SGX_REGS_SIZE;
227#if defined(__linux__)
228
229 gsSGXDeviceMap.pvRegsCpuVBase = gsSGXRegsCPUVAddr;
230#else
231
232 gsSGXDeviceMap.pvRegsCpuVBase = IMG_NULL;
233#endif
234
235 OSMemSet(gsSGXRegsCPUVAddr, 0, SYS_OMAP3430_SGX_REGS_SIZE);
236
237
238
239
240 gsSGXDeviceMap.ui32IRQ = 0;
241
242#else
243
244 gsSGXDeviceMap.sRegsSysPBase.uiAddr = SYS_OMAP3430_SGX_REGS_SYS_PHYS_BASE;
245 gsSGXDeviceMap.sRegsCpuPBase = SysSysPAddrToCpuPAddr(gsSGXDeviceMap.sRegsSysPBase);
246 gsSGXDeviceMap.ui32RegsSize = SYS_OMAP3430_SGX_REGS_SIZE;
247
248 gsSGXDeviceMap.ui32IRQ = SYS_OMAP3430_SGX_IRQ;
249
250#endif
251
252#if defined(PDUMP)
253 {
254 static IMG_CHAR pszPDumpDevName[] = "SGXMEM";
255 gsSGXDeviceMap.pszPDumpDevName = pszPDumpDevName;
256 }
257#endif
258
259
260 return PVRSRV_OK;
261}
262
263
264IMG_CHAR *SysCreateVersionString(IMG_CPU_PHYADDR sRegRegion)
265{
266 static IMG_CHAR aszVersionString[100];
267 SYS_DATA *psSysData;
268 IMG_UINT32 ui32SGXRevision;
269 IMG_INT32 i32Count;
270#if !defined(NO_HARDWARE)
271 IMG_VOID *pvRegsLinAddr;
272
273 pvRegsLinAddr = OSMapPhysToLin(sRegRegion,
274 SYS_OMAP3430_SGX_REGS_SIZE,
275 PVRSRV_HAP_UNCACHED|PVRSRV_HAP_KERNEL_ONLY,
276 IMG_NULL);
277 if(!pvRegsLinAddr)
278 {
279 return IMG_NULL;
280 }
281
282 ui32SGXRevision = OSReadHWReg((IMG_PVOID)((IMG_PBYTE)pvRegsLinAddr),
283 EUR_CR_CORE_REVISION);
284#else
285 ui32SGXRevision = 0;
286#endif
287
288 SysAcquireData(&psSysData);
289
290 i32Count = OSSNPrintf(aszVersionString, 100,
291 "SGX revision = %u.%u.%u",
292 (IMG_UINT)((ui32SGXRevision & EUR_CR_CORE_REVISION_MAJOR_MASK)
293 >> EUR_CR_CORE_REVISION_MAJOR_SHIFT),
294 (IMG_UINT)((ui32SGXRevision & EUR_CR_CORE_REVISION_MINOR_MASK)
295 >> EUR_CR_CORE_REVISION_MINOR_SHIFT),
296 (IMG_UINT)((ui32SGXRevision & EUR_CR_CORE_REVISION_MAINTENANCE_MASK)
297 >> EUR_CR_CORE_REVISION_MAINTENANCE_SHIFT)
298 );
299
300#if !defined(NO_HARDWARE)
301 OSUnMapPhysToLin(pvRegsLinAddr,
302 SYS_OMAP3430_SGX_REGS_SIZE,
303 PVRSRV_HAP_UNCACHED|PVRSRV_HAP_KERNEL_ONLY,
304 IMG_NULL);
305#endif
306
307 if(i32Count == -1)
308 {
309 return IMG_NULL;
310 }
311
312 return aszVersionString;
313}
314
315
316PVRSRV_ERROR SysInitialise(IMG_VOID)
317{
318 IMG_UINT32 i;
319 PVRSRV_ERROR eError;
320 PVRSRV_DEVICE_NODE *psDeviceNode;
321 IMG_CPU_PHYADDR TimerRegPhysBase;
322#if !defined(SGX_DYNAMIC_TIMING_INFO)
323 SGX_TIMING_INFORMATION* psTimingInfo;
324#endif
325 gpsSysData = &gsSysData;
326 OSMemSet(gpsSysData, 0, sizeof(SYS_DATA));
327
328 gpsSysSpecificData = &gsSysSpecificData;
329 OSMemSet(gpsSysSpecificData, 0, sizeof(SYS_SPECIFIC_DATA));
330
331 gpsSysData->pvSysSpecificData = gpsSysSpecificData;
332
333 eError = OSInitEnvData(&gpsSysData->pvEnvSpecificData);
334 if (eError != PVRSRV_OK)
335 {
336 PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to setup env structure"));
337 (IMG_VOID)SysDeinitialise(gpsSysData);
338 gpsSysData = IMG_NULL;
339 return eError;
340 }
341 SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_ENVDATA);
342
343 gpsSysData->ui32NumDevices = SYS_DEVICE_COUNT;
344
345
346 for(i=0; i<SYS_DEVICE_COUNT; i++)
347 {
348 gpsSysData->sDeviceID[i].uiID = i;
349 gpsSysData->sDeviceID[i].bInUse = IMG_FALSE;
350 }
351
352 gpsSysData->psDeviceNodeList = IMG_NULL;
353 gpsSysData->psQueueList = IMG_NULL;
354
355 eError = SysInitialiseCommon(gpsSysData);
356 if (eError != PVRSRV_OK)
357 {
358 PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed in SysInitialiseCommon"));
359 (IMG_VOID)SysDeinitialise(gpsSysData);
360 gpsSysData = IMG_NULL;
361 return eError;
362 }
363
364 TimerRegPhysBase.uiAddr = SYS_OMAP3430_GP11TIMER_REGS_SYS_PHYS_BASE;
365 gpsSysData->pvSOCTimerRegisterKM = IMG_NULL;
366 gpsSysData->hSOCTimerRegisterOSMemHandle = 0;
367 OSReservePhys(TimerRegPhysBase,
368 4,
369 PVRSRV_HAP_MULTI_PROCESS|PVRSRV_HAP_UNCACHED,
370 (IMG_VOID **)&gpsSysData->pvSOCTimerRegisterKM,
371 &gpsSysData->hSOCTimerRegisterOSMemHandle);
372
373#if !defined(SGX_DYNAMIC_TIMING_INFO)
374
375 psTimingInfo = &gsSGXDeviceMap.sTimingInfo;
376 psTimingInfo->ui32CoreClockSpeed = SYS_SGX_CLOCK_SPEED;
377 psTimingInfo->ui32HWRecoveryFreq = SYS_SGX_HWRECOVERY_TIMEOUT_FREQ;
378#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
379 psTimingInfo->bEnableActivePM = IMG_TRUE;
380#else
381 psTimingInfo->bEnableActivePM = IMG_FALSE;
382#endif
383 psTimingInfo->ui32ActivePowManLatencyms = SYS_SGX_ACTIVE_POWER_LATENCY_MS;
384 psTimingInfo->ui32uKernelFreq = SYS_SGX_PDS_TIMER_FREQ;
385#endif
386
387
388
389 gpsSysSpecificData->ui32SrcClockDiv = 3;
390
391
392
393
394
395 eError = SysLocateDevices(gpsSysData);
396 if (eError != PVRSRV_OK)
397 {
398 PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to locate devices"));
399 (IMG_VOID)SysDeinitialise(gpsSysData);
400 gpsSysData = IMG_NULL;
401 return eError;
402 }
403 SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LOCATEDEV);
404
405#if defined(SGX_OCP_REGS_ENABLED)
406 {
407 IMG_SYS_PHYADDR sOCPRegsSysPBase;
408 IMG_CPU_PHYADDR sOCPRegsCpuPBase;
409
410 sOCPRegsSysPBase.uiAddr = SYS_OMAP3430_OCP_REGS_SYS_PHYS_BASE;
411 sOCPRegsCpuPBase = SysSysPAddrToCpuPAddr(sOCPRegsSysPBase);
412
413 gpvOCPRegsLinAddr = OSMapPhysToLin(sOCPRegsCpuPBase,
414 SYS_OMAP3430_OCP_REGS_SIZE,
415 PVRSRV_HAP_UNCACHED|PVRSRV_HAP_KERNEL_ONLY,
416 IMG_NULL);
417
418 if (gpvOCPRegsLinAddr == IMG_NULL)
419 {
420 PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to map OCP registers"));
421 return PVRSRV_ERROR_BAD_MAPPING;
422 }
423 }
424#endif
425
426
427
428
429 eError = PVRSRVRegisterDevice(gpsSysData, SGXRegisterDevice,
430 DEVICE_SGX_INTERRUPT, &gui32SGXDeviceID);
431 if (eError != PVRSRV_OK)
432 {
433 PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to register device!"));
434 (IMG_VOID)SysDeinitialise(gpsSysData);
435 gpsSysData = IMG_NULL;
436 return eError;
437 }
438 SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_REGDEV);
439
440
441
442
443
444 psDeviceNode = gpsSysData->psDeviceNodeList;
445 while(psDeviceNode)
446 {
447
448 switch(psDeviceNode->sDevId.eDeviceType)
449 {
450 case PVRSRV_DEVICE_TYPE_SGX:
451 {
452 DEVICE_MEMORY_INFO *psDevMemoryInfo;
453 DEVICE_MEMORY_HEAP_INFO *psDeviceMemoryHeap;
454
455
456
457
458 psDeviceNode->psLocalDevMemArena = IMG_NULL;
459
460
461 psDevMemoryInfo = &psDeviceNode->sDevMemoryInfo;
462 psDeviceMemoryHeap = psDevMemoryInfo->psDeviceMemoryHeap;
463
464
465 for(i=0; i<psDevMemoryInfo->ui32HeapCount; i++)
466 {
467 psDeviceMemoryHeap[i].ui32Attribs |= PVRSRV_BACKINGSTORE_SYSMEM_NONCONTIG;
468 }
469
470 gpsSGXDevNode = psDeviceNode;
471 gsSysSpecificData.psSGXDevNode = psDeviceNode;
472
473 break;
474 }
475 default:
476 PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to find SGX device node!"));
477 return PVRSRV_ERROR_INIT_FAILURE;
478 }
479
480
481 psDeviceNode = psDeviceNode->psNext;
482 }
483
484 eError = EnableSystemClocksWrap(gpsSysData);
485 if (eError != PVRSRV_OK)
486 {
487 PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to Enable system clocks (%d)", eError));
488 (IMG_VOID)SysDeinitialise(gpsSysData);
489 gpsSysData = IMG_NULL;
490 return eError;
491 }
492 SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_SYSCLOCKS);
493#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
494 eError = EnableSGXClocksWrap(gpsSysData);
495 if (eError != PVRSRV_OK)
496 {
497 PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to Enable SGX clocks (%d)", eError));
498 (IMG_VOID)SysDeinitialise(gpsSysData);
499 gpsSysData = IMG_NULL;
500 return eError;
501 }
502#endif
503
504 dump_omap34xx_clocks();
505
506 eError = PVRSRVInitialiseDevice(gui32SGXDeviceID);
507 if (eError != PVRSRV_OK)
508 {
509 PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to initialise device!"));
510 (IMG_VOID)SysDeinitialise(gpsSysData);
511 gpsSysData = IMG_NULL;
512 return eError;
513 }
514 SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_INITDEV);
515
516#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
517
518 DisableSGXClocks(gpsSysData);
519#endif
520
521 return PVRSRV_OK;
522}
523
524
525PVRSRV_ERROR SysFinalise(IMG_VOID)
526{
527 PVRSRV_ERROR eError = PVRSRV_OK;
528
529#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
530 eError = EnableSGXClocksWrap(gpsSysData);
531 if (eError != PVRSRV_OK)
532 {
533 PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to Enable SGX clocks (%d)", eError));
534 (IMG_VOID)SysDeinitialise(gpsSysData);
535 gpsSysData = IMG_NULL;
536 return eError;
537 }
538#endif
539
540#if defined(SYS_USING_INTERRUPTS)
541
542 eError = OSInstallMISR(gpsSysData);
543 if (eError != PVRSRV_OK)
544 {
545 PVR_DPF((PVR_DBG_ERROR,"SysFinalise: Failed to install MISR"));
546 (IMG_VOID)SysDeinitialise(gpsSysData);
547 gpsSysData = IMG_NULL;
548 return eError;
549 }
550 SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_MISR);
551
552
553 eError = OSInstallDeviceLISR(gpsSysData, gsSGXDeviceMap.ui32IRQ, "SGX ISR", gpsSGXDevNode);
554 if (eError != PVRSRV_OK)
555 {
556 PVR_DPF((PVR_DBG_ERROR,"SysFinalise: Failed to install ISR"));
557 (IMG_VOID)SysDeinitialise(gpsSysData);
558 gpsSysData = IMG_NULL;
559 return eError;
560 }
561 SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LISR);
562#endif
563
564
565 gpsSysData->pszVersionString = SysCreateVersionString(gsSGXDeviceMap.sRegsCpuPBase);
566 if (!gpsSysData->pszVersionString)
567 {
568 PVR_DPF((PVR_DBG_ERROR,"SysFinalise: Failed to create a system version string"));
569 }
570 else
571 {
572 PVR_DPF((PVR_DBG_WARNING, "SysFinalise: Version string: %s", gpsSysData->pszVersionString));
573 }
574
575#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
576
577 DisableSGXClocks(gpsSysData);
578#endif
579
580 gpsSysSpecificData->bSGXInitComplete = IMG_TRUE;
581
582 return eError;
583}
584
585
586PVRSRV_ERROR SysDeinitialise (SYS_DATA *psSysData)
587{
588 PVRSRV_ERROR eError;
589
590#if defined(SYS_USING_INTERRUPTS)
591 if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LISR))
592 {
593 eError = OSUninstallDeviceLISR(psSysData);
594 if (eError != PVRSRV_OK)
595 {
596 PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: OSUninstallDeviceLISR failed"));
597 return eError;
598 }
599 }
600
601 if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_MISR))
602 {
603 eError = OSUninstallMISR(psSysData);
604 if (eError != PVRSRV_OK)
605 {
606 PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: OSUninstallMISR failed"));
607 return eError;
608 }
609 }
610#else
611 PVR_UNREFERENCED_PARAMETER(psSysData);
612#endif
613
614 if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_INITDEV))
615 {
616#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
617 PVR_ASSERT(SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_SYSCLOCKS));
618
619 eError = EnableSGXClocksWrap(gpsSysData);
620 if (eError != PVRSRV_OK)
621 {
622 PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: EnableSGXClocks failed"));
623 return eError;
624 }
625#endif
626
627
628 eError = PVRSRVDeinitialiseDevice (gui32SGXDeviceID);
629 if (eError != PVRSRV_OK)
630 {
631 PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: failed to de-init the device"));
632 return eError;
633 }
634 }
635
636#if defined(SGX_OCP_REGS_ENABLED)
637 OSUnMapPhysToLin(gpvOCPRegsLinAddr,
638 SYS_OMAP3430_OCP_REGS_SIZE,
639 PVRSRV_HAP_UNCACHED|PVRSRV_HAP_KERNEL_ONLY,
640 IMG_NULL);
641#endif
642
643
644
645 if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_SYSCLOCKS))
646 {
647 DisableSystemClocks(gpsSysData);
648 }
649
650 if (SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_ENVDATA))
651 {
652 eError = OSDeInitEnvData(gpsSysData->pvEnvSpecificData);
653 if (eError != PVRSRV_OK)
654 {
655 PVR_DPF((PVR_DBG_ERROR,"SysDeinitialise: failed to de-init env structure"));
656 return eError;
657 }
658 }
659
660 if(gpsSysData->pvSOCTimerRegisterKM)
661 {
662 OSUnReservePhys(gpsSysData->pvSOCTimerRegisterKM,
663 4,
664 PVRSRV_HAP_MULTI_PROCESS|PVRSRV_HAP_UNCACHED,
665 gpsSysData->hSOCTimerRegisterOSMemHandle);
666 }
667
668 SysDeinitialiseCommon(gpsSysData);
669
670#if defined(NO_HARDWARE)
671 if(SYS_SPECIFIC_DATA_TEST(gpsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LOCATEDEV))
672 {
673
674 OSBaseFreeContigMemory(SYS_OMAP3430_SGX_REGS_SIZE, gsSGXRegsCPUVAddr, gsSGXDeviceMap.sRegsCpuPBase);
675 }
676#endif
677
678
679 gpsSysSpecificData->ui32SysSpecificData = 0;
680 gpsSysSpecificData->bSGXInitComplete = IMG_FALSE;
681
682 gpsSysData = IMG_NULL;
683
684 return PVRSRV_OK;
685}
686
687
688PVRSRV_ERROR SysGetDeviceMemoryMap(PVRSRV_DEVICE_TYPE eDeviceType,
689 IMG_VOID **ppvDeviceMap)
690{
691
692 switch(eDeviceType)
693 {
694 case PVRSRV_DEVICE_TYPE_SGX:
695 {
696
697 *ppvDeviceMap = (IMG_VOID*)&gsSGXDeviceMap;
698
699 break;
700 }
701 default:
702 {
703 PVR_DPF((PVR_DBG_ERROR,"SysGetDeviceMemoryMap: unsupported device type"));
704 }
705 }
706 return PVRSRV_OK;
707}
708
709
710IMG_DEV_PHYADDR SysCpuPAddrToDevPAddr(PVRSRV_DEVICE_TYPE eDeviceType,
711 IMG_CPU_PHYADDR CpuPAddr)
712{
713 IMG_DEV_PHYADDR DevPAddr;
714
715 PVR_UNREFERENCED_PARAMETER(eDeviceType);
716
717
718 DevPAddr.uiAddr = CpuPAddr.uiAddr;
719
720 return DevPAddr;
721}
722
723IMG_CPU_PHYADDR SysSysPAddrToCpuPAddr (IMG_SYS_PHYADDR sys_paddr)
724{
725 IMG_CPU_PHYADDR cpu_paddr;
726
727
728 cpu_paddr.uiAddr = sys_paddr.uiAddr;
729 return cpu_paddr;
730}
731
732IMG_SYS_PHYADDR SysCpuPAddrToSysPAddr (IMG_CPU_PHYADDR cpu_paddr)
733{
734 IMG_SYS_PHYADDR sys_paddr;
735
736
737 sys_paddr.uiAddr = cpu_paddr.uiAddr;
738 return sys_paddr;
739}
740
741
742IMG_DEV_PHYADDR SysSysPAddrToDevPAddr(PVRSRV_DEVICE_TYPE eDeviceType, IMG_SYS_PHYADDR SysPAddr)
743{
744 IMG_DEV_PHYADDR DevPAddr;
745
746 PVR_UNREFERENCED_PARAMETER(eDeviceType);
747
748
749 DevPAddr.uiAddr = SysPAddr.uiAddr;
750
751 return DevPAddr;
752}
753
754
755IMG_SYS_PHYADDR SysDevPAddrToSysPAddr(PVRSRV_DEVICE_TYPE eDeviceType, IMG_DEV_PHYADDR DevPAddr)
756{
757 IMG_SYS_PHYADDR SysPAddr;
758
759 PVR_UNREFERENCED_PARAMETER(eDeviceType);
760
761
762 SysPAddr.uiAddr = DevPAddr.uiAddr;
763
764 return SysPAddr;
765}
766
767
768IMG_VOID SysRegisterExternalDevice(PVRSRV_DEVICE_NODE *psDeviceNode)
769{
770 PVR_UNREFERENCED_PARAMETER(psDeviceNode);
771}
772
773
774IMG_VOID SysRemoveExternalDevice(PVRSRV_DEVICE_NODE *psDeviceNode)
775{
776 PVR_UNREFERENCED_PARAMETER(psDeviceNode);
777}
778
779
780IMG_UINT32 SysGetInterruptSource(SYS_DATA *psSysData,
781 PVRSRV_DEVICE_NODE *psDeviceNode)
782{
783 PVR_UNREFERENCED_PARAMETER(psSysData);
784#if defined(NO_HARDWARE)
785
786 return 0xFFFFFFFF;
787#else
788
789 return psDeviceNode->ui32SOCInterruptBit;
790#endif
791}
792
793
794IMG_VOID SysClearInterrupts(SYS_DATA* psSysData, IMG_UINT32 ui32ClearBits)
795{
796 PVR_UNREFERENCED_PARAMETER(psSysData);
797 PVR_UNREFERENCED_PARAMETER(ui32ClearBits);
798
799
800 OSReadHWReg(((PVRSRV_SGXDEV_INFO *)gpsSGXDevNode->pvDevice)->pvRegsBaseKM,
801 EUR_CR_EVENT_HOST_CLEAR);
802}
803
804
805PVRSRV_ERROR SysSystemPrePowerState(PVRSRV_SYS_POWER_STATE eNewPowerState)
806{
807 PVRSRV_ERROR eError = PVRSRV_OK;
808
809 if (eNewPowerState == PVRSRV_SYS_POWER_STATE_D3)
810 {
811 PVR_TRACE(("SysSystemPrePowerState: Entering state D3"));
812
813#if defined(SYS_USING_INTERRUPTS)
814 if (SYS_SPECIFIC_DATA_TEST(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LISR))
815 {
816#if defined(SYS_CUSTOM_POWERLOCK_WRAP)
817 IMG_BOOL bWrapped = WrapSystemPowerChange(&gsSysSpecificData);
818#endif
819 eError = OSUninstallDeviceLISR(gpsSysData);
820#if defined(SYS_CUSTOM_POWERLOCK_WRAP)
821 if (bWrapped)
822 {
823 UnwrapSystemPowerChange(&gsSysSpecificData);
824 }
825#endif
826 if (eError != PVRSRV_OK)
827 {
828 PVR_DPF((PVR_DBG_ERROR,"SysSystemPrePowerState: OSUninstallDeviceLISR failed (%d)", eError));
829 return eError;
830 }
831 SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_PM_UNINSTALL_LISR);
832 SYS_SPECIFIC_DATA_CLEAR(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LISR);
833 }
834#endif
835
836 if (SYS_SPECIFIC_DATA_TEST(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_SYSCLOCKS))
837 {
838 DisableSystemClocks(gpsSysData);
839
840 SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_PM_DISABLE_SYSCLOCKS);
841 SYS_SPECIFIC_DATA_CLEAR(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_SYSCLOCKS);
842 }
843 }
844
845 return eError;
846}
847
848
849PVRSRV_ERROR SysSystemPostPowerState(PVRSRV_SYS_POWER_STATE eNewPowerState)
850{
851 PVRSRV_ERROR eError = PVRSRV_OK;
852
853 if (eNewPowerState == PVRSRV_SYS_POWER_STATE_D0)
854 {
855 PVR_TRACE(("SysSystemPostPowerState: Entering state D0"));
856
857 if (SYS_SPECIFIC_DATA_TEST(&gsSysSpecificData, SYS_SPECIFIC_DATA_PM_DISABLE_SYSCLOCKS))
858 {
859 eError = EnableSystemClocksWrap(gpsSysData);
860 if (eError != PVRSRV_OK)
861 {
862 PVR_DPF((PVR_DBG_ERROR,"SysSystemPostPowerState: EnableSystemClocksWrap failed (%d)", eError));
863 return eError;
864 }
865 SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_SYSCLOCKS);
866 SYS_SPECIFIC_DATA_CLEAR(&gsSysSpecificData, SYS_SPECIFIC_DATA_PM_DISABLE_SYSCLOCKS);
867 }
868
869#if defined(SYS_USING_INTERRUPTS)
870 if (SYS_SPECIFIC_DATA_TEST(&gsSysSpecificData, SYS_SPECIFIC_DATA_PM_UNINSTALL_LISR))
871 {
872#if defined(SYS_CUSTOM_POWERLOCK_WRAP)
873 IMG_BOOL bWrapped = WrapSystemPowerChange(&gsSysSpecificData);
874#endif
875
876 eError = OSInstallDeviceLISR(gpsSysData, gsSGXDeviceMap.ui32IRQ, "SGX ISR", gpsSGXDevNode);
877#if defined(SYS_CUSTOM_POWERLOCK_WRAP)
878 if (bWrapped)
879 {
880 UnwrapSystemPowerChange(&gsSysSpecificData);
881 }
882#endif
883 if (eError != PVRSRV_OK)
884 {
885 PVR_DPF((PVR_DBG_ERROR,"SysSystemPostPowerState: OSInstallDeviceLISR failed to install ISR (%d)", eError));
886 return eError;
887 }
888 SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LISR);
889 SYS_SPECIFIC_DATA_CLEAR(&gsSysSpecificData, SYS_SPECIFIC_DATA_PM_UNINSTALL_LISR);
890 }
891#endif
892 }
893 return eError;
894}
895
896
897PVRSRV_ERROR SysDevicePrePowerState(IMG_UINT32 ui32DeviceIndex,
898 PVRSRV_DEV_POWER_STATE eNewPowerState,
899 PVRSRV_DEV_POWER_STATE eCurrentPowerState)
900{
901 PVR_UNREFERENCED_PARAMETER(eCurrentPowerState);
902
903 if (ui32DeviceIndex != gui32SGXDeviceID)
904 {
905 return PVRSRV_OK;
906 }
907
908#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
909 if (eNewPowerState == PVRSRV_DEV_POWER_STATE_OFF)
910 {
911 PVR_DPF((PVR_DBG_MESSAGE, "SysDevicePrePowerState: SGX Entering state D3"));
912 DisableSGXClocks(gpsSysData);
913 }
914#else
915 PVR_UNREFERENCED_PARAMETER(eNewPowerState );
916#endif
917 return PVRSRV_OK;
918}
919
920
921PVRSRV_ERROR SysDevicePostPowerState(IMG_UINT32 ui32DeviceIndex,
922 PVRSRV_DEV_POWER_STATE eNewPowerState,
923 PVRSRV_DEV_POWER_STATE eCurrentPowerState)
924{
925 PVRSRV_ERROR eError = PVRSRV_OK;
926
927 PVR_UNREFERENCED_PARAMETER(eNewPowerState);
928
929 if (ui32DeviceIndex != gui32SGXDeviceID)
930 {
931 return eError;
932 }
933
934#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
935 if (eCurrentPowerState == PVRSRV_DEV_POWER_STATE_OFF)
936 {
937 PVR_DPF((PVR_DBG_MESSAGE, "SysDevicePostPowerState: SGX Leaving state D3"));
938 eError = EnableSGXClocksWrap(gpsSysData);
939 }
940#else
941 PVR_UNREFERENCED_PARAMETER(eCurrentPowerState);
942#endif
943
944 return eError;
945}
946
947
948PVRSRV_ERROR SysOEMFunction ( IMG_UINT32 ui32ID,
949 IMG_VOID *pvIn,
950 IMG_UINT32 ulInSize,
951 IMG_VOID *pvOut,
952 IMG_UINT32 ulOutSize)
953{
954 PVR_UNREFERENCED_PARAMETER(ui32ID);
955 PVR_UNREFERENCED_PARAMETER(pvIn);
956 PVR_UNREFERENCED_PARAMETER(ulInSize);
957 PVR_UNREFERENCED_PARAMETER(pvOut);
958 PVR_UNREFERENCED_PARAMETER(ulOutSize);
959
960 if ((ui32ID == OEM_GET_EXT_FUNCS) &&
961 (ulOutSize == sizeof(PVRSRV_DC_OEM_JTABLE)))
962 {
963
964 PVRSRV_DC_OEM_JTABLE *psOEMJTable = (PVRSRV_DC_OEM_JTABLE*) pvOut;
965 psOEMJTable->pfnOEMBridgeDispatch = &PVRSRV_BridgeDispatchKM;
966 return PVRSRV_OK;
967 }
968
969 return PVRSRV_ERROR_INVALID_PARAMS;
970}
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-25 15:10:00 -0400