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authorGrant Likely <grant.likely@secretlab.ca>2011-05-26 19:30:03 -0400
committerGrant Likely <grant.likely@secretlab.ca>2011-05-26 19:30:03 -0400
commit37d72457644a1ded37d57dd9ae664e4e228a034d (patch)
treea3fc8147452e79ae45b4b912ba5ab16161a0e2fa /drivers/gpio
parent06caa7ad8341db2f03165fa763559475cc404584 (diff)
gpio: move Nomadik GPIO driver to drivers/gpio
This moves the Nomadik GPIO driver out of arch/arm/plat-nomadik and into the desired location indicated by the subsystem maintainer. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> [grant.likely: squashed with kconfig fixup] Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'drivers/gpio')
-rw-r--r--drivers/gpio/Makefile1
-rw-r--r--drivers/gpio/gpio-nomadik.c1020
2 files changed, 1021 insertions, 0 deletions
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 27a22086739..7481e7da2ad 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -35,6 +35,7 @@ obj-$(CONFIG_GPIO_WM8350) += wm8350-gpiolib.o
35obj-$(CONFIG_GPIO_WM8994) += wm8994-gpio.o 35obj-$(CONFIG_GPIO_WM8994) += wm8994-gpio.o
36obj-$(CONFIG_GPIO_SCH) += sch_gpio.o 36obj-$(CONFIG_GPIO_SCH) += sch_gpio.o
37obj-$(CONFIG_MACH_U300) += gpio-u300.o 37obj-$(CONFIG_MACH_U300) += gpio-u300.o
38obj-$(CONFIG_PLAT_NOMADIK) += gpio-nomadik.o
38obj-$(CONFIG_GPIO_RDC321X) += rdc321x-gpio.o 39obj-$(CONFIG_GPIO_RDC321X) += rdc321x-gpio.o
39obj-$(CONFIG_GPIO_JANZ_TTL) += janz-ttl.o 40obj-$(CONFIG_GPIO_JANZ_TTL) += janz-ttl.o
40obj-$(CONFIG_GPIO_SX150X) += sx150x.o 41obj-$(CONFIG_GPIO_SX150X) += sx150x.o
diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c
new file mode 100644
index 00000000000..307b8131aa8
--- /dev/null
+++ b/drivers/gpio/gpio-nomadik.c
@@ -0,0 +1,1020 @@
1/*
2 * Generic GPIO driver for logic cells found in the Nomadik SoC
3 *
4 * Copyright (C) 2008,2009 STMicroelectronics
5 * Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it>
6 * Rewritten based on work by Prafulla WADASKAR <prafulla.wadaskar@st.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/init.h>
15#include <linux/device.h>
16#include <linux/platform_device.h>
17#include <linux/io.h>
18#include <linux/clk.h>
19#include <linux/err.h>
20#include <linux/gpio.h>
21#include <linux/spinlock.h>
22#include <linux/interrupt.h>
23#include <linux/irq.h>
24#include <linux/slab.h>
25
26#include <asm/mach/irq.h>
27
28#include <plat/pincfg.h>
29#include <mach/hardware.h>
30#include <mach/gpio.h>
31
32/*
33 * The GPIO module in the Nomadik family of Systems-on-Chip is an
34 * AMBA device, managing 32 pins and alternate functions. The logic block
35 * is currently used in the Nomadik and ux500.
36 *
37 * Symbols in this file are called "nmk_gpio" for "nomadik gpio"
38 */
39
40#define NMK_GPIO_PER_CHIP 32
41
42struct nmk_gpio_chip {
43 struct gpio_chip chip;
44 void __iomem *addr;
45 struct clk *clk;
46 unsigned int bank;
47 unsigned int parent_irq;
48 int secondary_parent_irq;
49 u32 (*get_secondary_status)(unsigned int bank);
50 void (*set_ioforce)(bool enable);
51 spinlock_t lock;
52 /* Keep track of configured edges */
53 u32 edge_rising;
54 u32 edge_falling;
55 u32 real_wake;
56 u32 rwimsc;
57 u32 fwimsc;
58 u32 slpm;
59 u32 enabled;
60};
61
62static struct nmk_gpio_chip *
63nmk_gpio_chips[DIV_ROUND_UP(ARCH_NR_GPIOS, NMK_GPIO_PER_CHIP)];
64
65static DEFINE_SPINLOCK(nmk_gpio_slpm_lock);
66
67#define NUM_BANKS ARRAY_SIZE(nmk_gpio_chips)
68
69static void __nmk_gpio_set_mode(struct nmk_gpio_chip *nmk_chip,
70 unsigned offset, int gpio_mode)
71{
72 u32 bit = 1 << offset;
73 u32 afunc, bfunc;
74
75 afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & ~bit;
76 bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & ~bit;
77 if (gpio_mode & NMK_GPIO_ALT_A)
78 afunc |= bit;
79 if (gpio_mode & NMK_GPIO_ALT_B)
80 bfunc |= bit;
81 writel(afunc, nmk_chip->addr + NMK_GPIO_AFSLA);
82 writel(bfunc, nmk_chip->addr + NMK_GPIO_AFSLB);
83}
84
85static void __nmk_gpio_set_slpm(struct nmk_gpio_chip *nmk_chip,
86 unsigned offset, enum nmk_gpio_slpm mode)
87{
88 u32 bit = 1 << offset;
89 u32 slpm;
90
91 slpm = readl(nmk_chip->addr + NMK_GPIO_SLPC);
92 if (mode == NMK_GPIO_SLPM_NOCHANGE)
93 slpm |= bit;
94 else
95 slpm &= ~bit;
96 writel(slpm, nmk_chip->addr + NMK_GPIO_SLPC);
97}
98
99static void __nmk_gpio_set_pull(struct nmk_gpio_chip *nmk_chip,
100 unsigned offset, enum nmk_gpio_pull pull)
101{
102 u32 bit = 1 << offset;
103 u32 pdis;
104
105 pdis = readl(nmk_chip->addr + NMK_GPIO_PDIS);
106 if (pull == NMK_GPIO_PULL_NONE)
107 pdis |= bit;
108 else
109 pdis &= ~bit;
110 writel(pdis, nmk_chip->addr + NMK_GPIO_PDIS);
111
112 if (pull == NMK_GPIO_PULL_UP)
113 writel(bit, nmk_chip->addr + NMK_GPIO_DATS);
114 else if (pull == NMK_GPIO_PULL_DOWN)
115 writel(bit, nmk_chip->addr + NMK_GPIO_DATC);
116}
117
118static void __nmk_gpio_make_input(struct nmk_gpio_chip *nmk_chip,
119 unsigned offset)
120{
121 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);
122}
123
124static void __nmk_gpio_set_output(struct nmk_gpio_chip *nmk_chip,
125 unsigned offset, int val)
126{
127 if (val)
128 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DATS);
129 else
130 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DATC);
131}
132
133static void __nmk_gpio_make_output(struct nmk_gpio_chip *nmk_chip,
134 unsigned offset, int val)
135{
136 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRS);
137 __nmk_gpio_set_output(nmk_chip, offset, val);
138}
139
140static void __nmk_gpio_set_mode_safe(struct nmk_gpio_chip *nmk_chip,
141 unsigned offset, int gpio_mode,
142 bool glitch)
143{
144 u32 rwimsc = readl(nmk_chip->addr + NMK_GPIO_RWIMSC);
145 u32 fwimsc = readl(nmk_chip->addr + NMK_GPIO_FWIMSC);
146
147 if (glitch && nmk_chip->set_ioforce) {
148 u32 bit = BIT(offset);
149
150 /* Prevent spurious wakeups */
151 writel(rwimsc & ~bit, nmk_chip->addr + NMK_GPIO_RWIMSC);
152 writel(fwimsc & ~bit, nmk_chip->addr + NMK_GPIO_FWIMSC);
153
154 nmk_chip->set_ioforce(true);
155 }
156
157 __nmk_gpio_set_mode(nmk_chip, offset, gpio_mode);
158
159 if (glitch && nmk_chip->set_ioforce) {
160 nmk_chip->set_ioforce(false);
161
162 writel(rwimsc, nmk_chip->addr + NMK_GPIO_RWIMSC);
163 writel(fwimsc, nmk_chip->addr + NMK_GPIO_FWIMSC);
164 }
165}
166
167static void __nmk_config_pin(struct nmk_gpio_chip *nmk_chip, unsigned offset,
168 pin_cfg_t cfg, bool sleep, unsigned int *slpmregs)
169{
170 static const char *afnames[] = {
171 [NMK_GPIO_ALT_GPIO] = "GPIO",
172 [NMK_GPIO_ALT_A] = "A",
173 [NMK_GPIO_ALT_B] = "B",
174 [NMK_GPIO_ALT_C] = "C"
175 };
176 static const char *pullnames[] = {
177 [NMK_GPIO_PULL_NONE] = "none",
178 [NMK_GPIO_PULL_UP] = "up",
179 [NMK_GPIO_PULL_DOWN] = "down",
180 [3] /* illegal */ = "??"
181 };
182 static const char *slpmnames[] = {
183 [NMK_GPIO_SLPM_INPUT] = "input/wakeup",
184 [NMK_GPIO_SLPM_NOCHANGE] = "no-change/no-wakeup",
185 };
186
187 int pin = PIN_NUM(cfg);
188 int pull = PIN_PULL(cfg);
189 int af = PIN_ALT(cfg);
190 int slpm = PIN_SLPM(cfg);
191 int output = PIN_DIR(cfg);
192 int val = PIN_VAL(cfg);
193 bool glitch = af == NMK_GPIO_ALT_C;
194
195 dev_dbg(nmk_chip->chip.dev, "pin %d [%#lx]: af %s, pull %s, slpm %s (%s%s)\n",
196 pin, cfg, afnames[af], pullnames[pull], slpmnames[slpm],
197 output ? "output " : "input",
198 output ? (val ? "high" : "low") : "");
199
200 if (sleep) {
201 int slpm_pull = PIN_SLPM_PULL(cfg);
202 int slpm_output = PIN_SLPM_DIR(cfg);
203 int slpm_val = PIN_SLPM_VAL(cfg);
204
205 af = NMK_GPIO_ALT_GPIO;
206
207 /*
208 * The SLPM_* values are normal values + 1 to allow zero to
209 * mean "same as normal".
210 */
211 if (slpm_pull)
212 pull = slpm_pull - 1;
213 if (slpm_output)
214 output = slpm_output - 1;
215 if (slpm_val)
216 val = slpm_val - 1;
217
218 dev_dbg(nmk_chip->chip.dev, "pin %d: sleep pull %s, dir %s, val %s\n",
219 pin,
220 slpm_pull ? pullnames[pull] : "same",
221 slpm_output ? (output ? "output" : "input") : "same",
222 slpm_val ? (val ? "high" : "low") : "same");
223 }
224
225 if (output)
226 __nmk_gpio_make_output(nmk_chip, offset, val);
227 else {
228 __nmk_gpio_make_input(nmk_chip, offset);
229 __nmk_gpio_set_pull(nmk_chip, offset, pull);
230 }
231
232 /*
233 * If we've backed up the SLPM registers (glitch workaround), modify
234 * the backups since they will be restored.
235 */
236 if (slpmregs) {
237 if (slpm == NMK_GPIO_SLPM_NOCHANGE)
238 slpmregs[nmk_chip->bank] |= BIT(offset);
239 else
240 slpmregs[nmk_chip->bank] &= ~BIT(offset);
241 } else
242 __nmk_gpio_set_slpm(nmk_chip, offset, slpm);
243
244 __nmk_gpio_set_mode_safe(nmk_chip, offset, af, glitch);
245}
246
247/*
248 * Safe sequence used to switch IOs between GPIO and Alternate-C mode:
249 * - Save SLPM registers
250 * - Set SLPM=0 for the IOs you want to switch and others to 1
251 * - Configure the GPIO registers for the IOs that are being switched
252 * - Set IOFORCE=1
253 * - Modify the AFLSA/B registers for the IOs that are being switched
254 * - Set IOFORCE=0
255 * - Restore SLPM registers
256 * - Any spurious wake up event during switch sequence to be ignored and
257 * cleared
258 */
259static void nmk_gpio_glitch_slpm_init(unsigned int *slpm)
260{
261 int i;
262
263 for (i = 0; i < NUM_BANKS; i++) {
264 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
265 unsigned int temp = slpm[i];
266
267 if (!chip)
268 break;
269
270 slpm[i] = readl(chip->addr + NMK_GPIO_SLPC);
271 writel(temp, chip->addr + NMK_GPIO_SLPC);
272 }
273}
274
275static void nmk_gpio_glitch_slpm_restore(unsigned int *slpm)
276{
277 int i;
278
279 for (i = 0; i < NUM_BANKS; i++) {
280 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
281
282 if (!chip)
283 break;
284
285 writel(slpm[i], chip->addr + NMK_GPIO_SLPC);
286 }
287}
288
289static int __nmk_config_pins(pin_cfg_t *cfgs, int num, bool sleep)
290{
291 static unsigned int slpm[NUM_BANKS];
292 unsigned long flags;
293 bool glitch = false;
294 int ret = 0;
295 int i;
296
297 for (i = 0; i < num; i++) {
298 if (PIN_ALT(cfgs[i]) == NMK_GPIO_ALT_C) {
299 glitch = true;
300 break;
301 }
302 }
303
304 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
305
306 if (glitch) {
307 memset(slpm, 0xff, sizeof(slpm));
308
309 for (i = 0; i < num; i++) {
310 int pin = PIN_NUM(cfgs[i]);
311 int offset = pin % NMK_GPIO_PER_CHIP;
312
313 if (PIN_ALT(cfgs[i]) == NMK_GPIO_ALT_C)
314 slpm[pin / NMK_GPIO_PER_CHIP] &= ~BIT(offset);
315 }
316
317 nmk_gpio_glitch_slpm_init(slpm);
318 }
319
320 for (i = 0; i < num; i++) {
321 struct nmk_gpio_chip *nmk_chip;
322 int pin = PIN_NUM(cfgs[i]);
323
324 nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(pin));
325 if (!nmk_chip) {
326 ret = -EINVAL;
327 break;
328 }
329
330 spin_lock(&nmk_chip->lock);
331 __nmk_config_pin(nmk_chip, pin - nmk_chip->chip.base,
332 cfgs[i], sleep, glitch ? slpm : NULL);
333 spin_unlock(&nmk_chip->lock);
334 }
335
336 if (glitch)
337 nmk_gpio_glitch_slpm_restore(slpm);
338
339 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
340
341 return ret;
342}
343
344/**
345 * nmk_config_pin - configure a pin's mux attributes
346 * @cfg: pin confguration
347 *
348 * Configures a pin's mode (alternate function or GPIO), its pull up status,
349 * and its sleep mode based on the specified configuration. The @cfg is
350 * usually one of the SoC specific macros defined in mach/<soc>-pins.h. These
351 * are constructed using, and can be further enhanced with, the macros in
352 * plat/pincfg.h.
353 *
354 * If a pin's mode is set to GPIO, it is configured as an input to avoid
355 * side-effects. The gpio can be manipulated later using standard GPIO API
356 * calls.
357 */
358int nmk_config_pin(pin_cfg_t cfg, bool sleep)
359{
360 return __nmk_config_pins(&cfg, 1, sleep);
361}
362EXPORT_SYMBOL(nmk_config_pin);
363
364/**
365 * nmk_config_pins - configure several pins at once
366 * @cfgs: array of pin configurations
367 * @num: number of elments in the array
368 *
369 * Configures several pins using nmk_config_pin(). Refer to that function for
370 * further information.
371 */
372int nmk_config_pins(pin_cfg_t *cfgs, int num)
373{
374 return __nmk_config_pins(cfgs, num, false);
375}
376EXPORT_SYMBOL(nmk_config_pins);
377
378int nmk_config_pins_sleep(pin_cfg_t *cfgs, int num)
379{
380 return __nmk_config_pins(cfgs, num, true);
381}
382EXPORT_SYMBOL(nmk_config_pins_sleep);
383
384/**
385 * nmk_gpio_set_slpm() - configure the sleep mode of a pin
386 * @gpio: pin number
387 * @mode: NMK_GPIO_SLPM_INPUT or NMK_GPIO_SLPM_NOCHANGE,
388 *
389 * Sets the sleep mode of a pin. If @mode is NMK_GPIO_SLPM_INPUT, the pin is
390 * changed to an input (with pullup/down enabled) in sleep and deep sleep. If
391 * @mode is NMK_GPIO_SLPM_NOCHANGE, the pin remains in the state it was
392 * configured even when in sleep and deep sleep.
393 *
394 * On DB8500v2 onwards, this setting loses the previous meaning and instead
395 * indicates if wakeup detection is enabled on the pin. Note that
396 * enable_irq_wake() will automatically enable wakeup detection.
397 */
398int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode)
399{
400 struct nmk_gpio_chip *nmk_chip;
401 unsigned long flags;
402
403 nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
404 if (!nmk_chip)
405 return -EINVAL;
406
407 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
408 spin_lock(&nmk_chip->lock);
409
410 __nmk_gpio_set_slpm(nmk_chip, gpio - nmk_chip->chip.base, mode);
411
412 spin_unlock(&nmk_chip->lock);
413 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
414
415 return 0;
416}
417
418/**
419 * nmk_gpio_set_pull() - enable/disable pull up/down on a gpio
420 * @gpio: pin number
421 * @pull: one of NMK_GPIO_PULL_DOWN, NMK_GPIO_PULL_UP, and NMK_GPIO_PULL_NONE
422 *
423 * Enables/disables pull up/down on a specified pin. This only takes effect if
424 * the pin is configured as an input (either explicitly or by the alternate
425 * function).
426 *
427 * NOTE: If enabling the pull up/down, the caller must ensure that the GPIO is
428 * configured as an input. Otherwise, due to the way the controller registers
429 * work, this function will change the value output on the pin.
430 */
431int nmk_gpio_set_pull(int gpio, enum nmk_gpio_pull pull)
432{
433 struct nmk_gpio_chip *nmk_chip;
434 unsigned long flags;
435
436 nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
437 if (!nmk_chip)
438 return -EINVAL;
439
440 spin_lock_irqsave(&nmk_chip->lock, flags);
441 __nmk_gpio_set_pull(nmk_chip, gpio - nmk_chip->chip.base, pull);
442 spin_unlock_irqrestore(&nmk_chip->lock, flags);
443
444 return 0;
445}
446
447/* Mode functions */
448/**
449 * nmk_gpio_set_mode() - set the mux mode of a gpio pin
450 * @gpio: pin number
451 * @gpio_mode: one of NMK_GPIO_ALT_GPIO, NMK_GPIO_ALT_A,
452 * NMK_GPIO_ALT_B, and NMK_GPIO_ALT_C
453 *
454 * Sets the mode of the specified pin to one of the alternate functions or
455 * plain GPIO.
456 */
457int nmk_gpio_set_mode(int gpio, int gpio_mode)
458{
459 struct nmk_gpio_chip *nmk_chip;
460 unsigned long flags;
461
462 nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
463 if (!nmk_chip)
464 return -EINVAL;
465
466 spin_lock_irqsave(&nmk_chip->lock, flags);
467 __nmk_gpio_set_mode(nmk_chip, gpio - nmk_chip->chip.base, gpio_mode);
468 spin_unlock_irqrestore(&nmk_chip->lock, flags);
469
470 return 0;
471}
472EXPORT_SYMBOL(nmk_gpio_set_mode);
473
474int nmk_gpio_get_mode(int gpio)
475{
476 struct nmk_gpio_chip *nmk_chip;
477 u32 afunc, bfunc, bit;
478
479 nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
480 if (!nmk_chip)
481 return -EINVAL;
482
483 bit = 1 << (gpio - nmk_chip->chip.base);
484
485 afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & bit;
486 bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & bit;
487
488 return (afunc ? NMK_GPIO_ALT_A : 0) | (bfunc ? NMK_GPIO_ALT_B : 0);
489}
490EXPORT_SYMBOL(nmk_gpio_get_mode);
491
492
493/* IRQ functions */
494static inline int nmk_gpio_get_bitmask(int gpio)
495{
496 return 1 << (gpio % 32);
497}
498
499static void nmk_gpio_irq_ack(struct irq_data *d)
500{
501 int gpio;
502 struct nmk_gpio_chip *nmk_chip;
503
504 gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
505 nmk_chip = irq_data_get_irq_chip_data(d);
506 if (!nmk_chip)
507 return;
508 writel(nmk_gpio_get_bitmask(gpio), nmk_chip->addr + NMK_GPIO_IC);
509}
510
511enum nmk_gpio_irq_type {
512 NORMAL,
513 WAKE,
514};
515
516static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip,
517 int gpio, enum nmk_gpio_irq_type which,
518 bool enable)
519{
520 u32 rimsc = which == WAKE ? NMK_GPIO_RWIMSC : NMK_GPIO_RIMSC;
521 u32 fimsc = which == WAKE ? NMK_GPIO_FWIMSC : NMK_GPIO_FIMSC;
522 u32 bitmask = nmk_gpio_get_bitmask(gpio);
523 u32 reg;
524
525 /* we must individually set/clear the two edges */
526 if (nmk_chip->edge_rising & bitmask) {
527 reg = readl(nmk_chip->addr + rimsc);
528 if (enable)
529 reg |= bitmask;
530 else
531 reg &= ~bitmask;
532 writel(reg, nmk_chip->addr + rimsc);
533 }
534 if (nmk_chip->edge_falling & bitmask) {
535 reg = readl(nmk_chip->addr + fimsc);
536 if (enable)
537 reg |= bitmask;
538 else
539 reg &= ~bitmask;
540 writel(reg, nmk_chip->addr + fimsc);
541 }
542}
543
544static void __nmk_gpio_set_wake(struct nmk_gpio_chip *nmk_chip,
545 int gpio, bool on)
546{
547 __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, on);
548}
549
550static int nmk_gpio_irq_maskunmask(struct irq_data *d, bool enable)
551{
552 int gpio;
553 struct nmk_gpio_chip *nmk_chip;
554 unsigned long flags;
555 u32 bitmask;
556
557 gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
558 nmk_chip = irq_data_get_irq_chip_data(d);
559 bitmask = nmk_gpio_get_bitmask(gpio);
560 if (!nmk_chip)
561 return -EINVAL;
562
563 if (enable)
564 nmk_chip->enabled |= bitmask;
565 else
566 nmk_chip->enabled &= ~bitmask;
567
568 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
569 spin_lock(&nmk_chip->lock);
570
571 __nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, enable);
572
573 if (!(nmk_chip->real_wake & bitmask))
574 __nmk_gpio_set_wake(nmk_chip, gpio, enable);
575
576 spin_unlock(&nmk_chip->lock);
577 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
578
579 return 0;
580}
581
582static void nmk_gpio_irq_mask(struct irq_data *d)
583{
584 nmk_gpio_irq_maskunmask(d, false);
585}
586
587static void nmk_gpio_irq_unmask(struct irq_data *d)
588{
589 nmk_gpio_irq_maskunmask(d, true);
590}
591
592static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
593{
594 struct nmk_gpio_chip *nmk_chip;
595 unsigned long flags;
596 u32 bitmask;
597 int gpio;
598
599 gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
600 nmk_chip = irq_data_get_irq_chip_data(d);
601 if (!nmk_chip)
602 return -EINVAL;
603 bitmask = nmk_gpio_get_bitmask(gpio);
604
605 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
606 spin_lock(&nmk_chip->lock);
607
608 if (!(nmk_chip->enabled & bitmask))
609 __nmk_gpio_set_wake(nmk_chip, gpio, on);
610
611 if (on)
612 nmk_chip->real_wake |= bitmask;
613 else
614 nmk_chip->real_wake &= ~bitmask;
615
616 spin_unlock(&nmk_chip->lock);
617 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
618
619 return 0;
620}
621
622static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type)
623{
624 bool enabled, wake = irqd_is_wakeup_set(d);
625 int gpio;
626 struct nmk_gpio_chip *nmk_chip;
627 unsigned long flags;
628 u32 bitmask;
629
630 gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
631 nmk_chip = irq_data_get_irq_chip_data(d);
632 bitmask = nmk_gpio_get_bitmask(gpio);
633 if (!nmk_chip)
634 return -EINVAL;
635
636 if (type & IRQ_TYPE_LEVEL_HIGH)
637 return -EINVAL;
638 if (type & IRQ_TYPE_LEVEL_LOW)
639 return -EINVAL;
640
641 enabled = nmk_chip->enabled & bitmask;
642
643 spin_lock_irqsave(&nmk_chip->lock, flags);
644
645 if (enabled)
646 __nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, false);
647
648 if (enabled || wake)
649 __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, false);
650
651 nmk_chip->edge_rising &= ~bitmask;
652 if (type & IRQ_TYPE_EDGE_RISING)
653 nmk_chip->edge_rising |= bitmask;
654
655 nmk_chip->edge_falling &= ~bitmask;
656 if (type & IRQ_TYPE_EDGE_FALLING)
657 nmk_chip->edge_falling |= bitmask;
658
659 if (enabled)
660 __nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, true);
661
662 if (enabled || wake)
663 __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, true);
664
665 spin_unlock_irqrestore(&nmk_chip->lock, flags);
666
667 return 0;
668}
669
670static struct irq_chip nmk_gpio_irq_chip = {
671 .name = "Nomadik-GPIO",
672 .irq_ack = nmk_gpio_irq_ack,
673 .irq_mask = nmk_gpio_irq_mask,
674 .irq_unmask = nmk_gpio_irq_unmask,
675 .irq_set_type = nmk_gpio_irq_set_type,
676 .irq_set_wake = nmk_gpio_irq_set_wake,
677};
678
679static void __nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc,
680 u32 status)
681{
682 struct nmk_gpio_chip *nmk_chip;
683 struct irq_chip *host_chip = irq_get_chip(irq);
684 unsigned int first_irq;
685
686 chained_irq_enter(host_chip, desc);
687
688 nmk_chip = irq_get_handler_data(irq);
689 first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
690 while (status) {
691 int bit = __ffs(status);
692
693 generic_handle_irq(first_irq + bit);
694 status &= ~BIT(bit);
695 }
696
697 chained_irq_exit(host_chip, desc);
698}
699
700static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
701{
702 struct nmk_gpio_chip *nmk_chip = irq_get_handler_data(irq);
703 u32 status = readl(nmk_chip->addr + NMK_GPIO_IS);
704
705 __nmk_gpio_irq_handler(irq, desc, status);
706}
707
708static void nmk_gpio_secondary_irq_handler(unsigned int irq,
709 struct irq_desc *desc)
710{
711 struct nmk_gpio_chip *nmk_chip = irq_get_handler_data(irq);
712 u32 status = nmk_chip->get_secondary_status(nmk_chip->bank);
713
714 __nmk_gpio_irq_handler(irq, desc, status);
715}
716
717static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip)
718{
719 unsigned int first_irq;
720 int i;
721
722 first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
723 for (i = first_irq; i < first_irq + nmk_chip->chip.ngpio; i++) {
724 irq_set_chip_and_handler(i, &nmk_gpio_irq_chip,
725 handle_edge_irq);
726 set_irq_flags(i, IRQF_VALID);
727 irq_set_chip_data(i, nmk_chip);
728 irq_set_irq_type(i, IRQ_TYPE_EDGE_FALLING);
729 }
730
731 irq_set_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler);
732 irq_set_handler_data(nmk_chip->parent_irq, nmk_chip);
733
734 if (nmk_chip->secondary_parent_irq >= 0) {
735 irq_set_chained_handler(nmk_chip->secondary_parent_irq,
736 nmk_gpio_secondary_irq_handler);
737 irq_set_handler_data(nmk_chip->secondary_parent_irq, nmk_chip);
738 }
739
740 return 0;
741}
742
743/* I/O Functions */
744static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned offset)
745{
746 struct nmk_gpio_chip *nmk_chip =
747 container_of(chip, struct nmk_gpio_chip, chip);
748
749 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);
750 return 0;
751}
752
753static int nmk_gpio_get_input(struct gpio_chip *chip, unsigned offset)
754{
755 struct nmk_gpio_chip *nmk_chip =
756 container_of(chip, struct nmk_gpio_chip, chip);
757 u32 bit = 1 << offset;
758
759 return (readl(nmk_chip->addr + NMK_GPIO_DAT) & bit) != 0;
760}
761
762static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned offset,
763 int val)
764{
765 struct nmk_gpio_chip *nmk_chip =
766 container_of(chip, struct nmk_gpio_chip, chip);
767
768 __nmk_gpio_set_output(nmk_chip, offset, val);
769}
770
771static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset,
772 int val)
773{
774 struct nmk_gpio_chip *nmk_chip =
775 container_of(chip, struct nmk_gpio_chip, chip);
776
777 __nmk_gpio_make_output(nmk_chip, offset, val);
778
779 return 0;
780}
781
782static int nmk_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
783{
784 struct nmk_gpio_chip *nmk_chip =
785 container_of(chip, struct nmk_gpio_chip, chip);
786
787 return NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base) + offset;
788}
789
790#ifdef CONFIG_DEBUG_FS
791
792#include <linux/seq_file.h>
793
794static void nmk_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
795{
796 int mode;
797 unsigned i;
798 unsigned gpio = chip->base;
799 int is_out;
800 struct nmk_gpio_chip *nmk_chip =
801 container_of(chip, struct nmk_gpio_chip, chip);
802 const char *modes[] = {
803 [NMK_GPIO_ALT_GPIO] = "gpio",
804 [NMK_GPIO_ALT_A] = "altA",
805 [NMK_GPIO_ALT_B] = "altB",
806 [NMK_GPIO_ALT_C] = "altC",
807 };
808
809 for (i = 0; i < chip->ngpio; i++, gpio++) {
810 const char *label = gpiochip_is_requested(chip, i);
811 bool pull;
812 u32 bit = 1 << i;
813
814 if (!label)
815 continue;
816
817 is_out = readl(nmk_chip->addr + NMK_GPIO_DIR) & bit;
818 pull = !(readl(nmk_chip->addr + NMK_GPIO_PDIS) & bit);
819 mode = nmk_gpio_get_mode(gpio);
820 seq_printf(s, " gpio-%-3d (%-20.20s) %s %s %s %s",
821 gpio, label,
822 is_out ? "out" : "in ",
823 chip->get
824 ? (chip->get(chip, i) ? "hi" : "lo")
825 : "? ",
826 (mode < 0) ? "unknown" : modes[mode],
827 pull ? "pull" : "none");
828 seq_printf(s, "\n");
829 }
830}
831
832#else
833#define nmk_gpio_dbg_show NULL
834#endif
835
836/* This structure is replicated for each GPIO block allocated at probe time */
837static struct gpio_chip nmk_gpio_template = {
838 .direction_input = nmk_gpio_make_input,
839 .get = nmk_gpio_get_input,
840 .direction_output = nmk_gpio_make_output,
841 .set = nmk_gpio_set_output,
842 .to_irq = nmk_gpio_to_irq,
843 .dbg_show = nmk_gpio_dbg_show,
844 .can_sleep = 0,
845};
846
847/*
848 * Called from the suspend/resume path to only keep the real wakeup interrupts
849 * (those that have had set_irq_wake() called on them) as wakeup interrupts,
850 * and not the rest of the interrupts which we needed to have as wakeups for
851 * cpuidle.
852 *
853 * PM ops are not used since this needs to be done at the end, after all the
854 * other drivers are done with their suspend callbacks.
855 */
856void nmk_gpio_wakeups_suspend(void)
857{
858 int i;
859
860 for (i = 0; i < NUM_BANKS; i++) {
861 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
862
863 if (!chip)
864 break;
865
866 chip->rwimsc = readl(chip->addr + NMK_GPIO_RWIMSC);
867 chip->fwimsc = readl(chip->addr + NMK_GPIO_FWIMSC);
868
869 writel(chip->rwimsc & chip->real_wake,
870 chip->addr + NMK_GPIO_RWIMSC);
871 writel(chip->fwimsc & chip->real_wake,
872 chip->addr + NMK_GPIO_FWIMSC);
873
874 if (cpu_is_u8500v2()) {
875 chip->slpm = readl(chip->addr + NMK_GPIO_SLPC);
876
877 /* 0 -> wakeup enable */
878 writel(~chip->real_wake, chip->addr + NMK_GPIO_SLPC);
879 }
880 }
881}
882
883void nmk_gpio_wakeups_resume(void)
884{
885 int i;
886
887 for (i = 0; i < NUM_BANKS; i++) {
888 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
889
890 if (!chip)
891 break;
892
893 writel(chip->rwimsc, chip->addr + NMK_GPIO_RWIMSC);
894 writel(chip->fwimsc, chip->addr + NMK_GPIO_FWIMSC);
895
896 if (cpu_is_u8500v2())
897 writel(chip->slpm, chip->addr + NMK_GPIO_SLPC);
898 }
899}
900
901static int __devinit nmk_gpio_probe(struct platform_device *dev)
902{
903 struct nmk_gpio_platform_data *pdata = dev->dev.platform_data;
904 struct nmk_gpio_chip *nmk_chip;
905 struct gpio_chip *chip;
906 struct resource *res;
907 struct clk *clk;
908 int secondary_irq;
909 int irq;
910 int ret;
911
912 if (!pdata)
913 return -ENODEV;
914
915 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
916 if (!res) {
917 ret = -ENOENT;
918 goto out;
919 }
920
921 irq = platform_get_irq(dev, 0);
922 if (irq < 0) {
923 ret = irq;
924 goto out;
925 }
926
927 secondary_irq = platform_get_irq(dev, 1);
928 if (secondary_irq >= 0 && !pdata->get_secondary_status) {
929 ret = -EINVAL;
930 goto out;
931 }
932
933 if (request_mem_region(res->start, resource_size(res),
934 dev_name(&dev->dev)) == NULL) {
935 ret = -EBUSY;
936 goto out;
937 }
938
939 clk = clk_get(&dev->dev, NULL);
940 if (IS_ERR(clk)) {
941 ret = PTR_ERR(clk);
942 goto out_release;
943 }
944
945 clk_enable(clk);
946
947 nmk_chip = kzalloc(sizeof(*nmk_chip), GFP_KERNEL);
948 if (!nmk_chip) {
949 ret = -ENOMEM;
950 goto out_clk;
951 }
952 /*
953 * The virt address in nmk_chip->addr is in the nomadik register space,
954 * so we can simply convert the resource address, without remapping
955 */
956 nmk_chip->bank = dev->id;
957 nmk_chip->clk = clk;
958 nmk_chip->addr = io_p2v(res->start);
959 nmk_chip->chip = nmk_gpio_template;
960 nmk_chip->parent_irq = irq;
961 nmk_chip->secondary_parent_irq = secondary_irq;
962 nmk_chip->get_secondary_status = pdata->get_secondary_status;
963 nmk_chip->set_ioforce = pdata->set_ioforce;
964 spin_lock_init(&nmk_chip->lock);
965
966 chip = &nmk_chip->chip;
967 chip->base = pdata->first_gpio;
968 chip->ngpio = pdata->num_gpio;
969 chip->label = pdata->name ?: dev_name(&dev->dev);
970 chip->dev = &dev->dev;
971 chip->owner = THIS_MODULE;
972
973 ret = gpiochip_add(&nmk_chip->chip);
974 if (ret)
975 goto out_free;
976
977 BUG_ON(nmk_chip->bank >= ARRAY_SIZE(nmk_gpio_chips));
978
979 nmk_gpio_chips[nmk_chip->bank] = nmk_chip;
980 platform_set_drvdata(dev, nmk_chip);
981
982 nmk_gpio_init_irq(nmk_chip);
983
984 dev_info(&dev->dev, "Bits %i-%i at address %p\n",
985 nmk_chip->chip.base, nmk_chip->chip.base+31, nmk_chip->addr);
986 return 0;
987
988out_free:
989 kfree(nmk_chip);
990out_clk:
991 clk_disable(clk);
992 clk_put(clk);
993out_release:
994 release_mem_region(res->start, resource_size(res));
995out:
996 dev_err(&dev->dev, "Failure %i for GPIO %i-%i\n", ret,
997 pdata->first_gpio, pdata->first_gpio+31);
998 return ret;
999}
1000
1001static struct platform_driver nmk_gpio_driver = {
1002 .driver = {
1003 .owner = THIS_MODULE,
1004 .name = "gpio",
1005 },
1006 .probe = nmk_gpio_probe,
1007};
1008
1009static int __init nmk_gpio_init(void)
1010{
1011 return platform_driver_register(&nmk_gpio_driver);
1012}
1013
1014core_initcall(nmk_gpio_init);
1015
1016MODULE_AUTHOR("Prafulla WADASKAR and Alessandro Rubini");
1017MODULE_DESCRIPTION("Nomadik GPIO Driver");
1018MODULE_LICENSE("GPL");
1019
1020
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-06 11:50:25 -0500