x86, amd: Move BSP code to cpu_dev helper

BugLink: http://bugs.launchpad.net/bugs/862583

Move code which is run once on the BSP during boot into the cpu_dev
helper.

[ hpa: removed bogus cpu_has -> static_cpu_has conversion ]

Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Link: http://lkml.kernel.org/r/20110805180409.GC26217@aftab
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
(cherry picked from git://tesla.tglx.de/git/linux-2.6-tip x86/cpu commit 8fa8b035085e7320c15875c1f6b03b290ca2dd66)

Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Acked-by: Leann Ogasawara <leann.ogasawara@canonical.com>
Acked-by: Stefan Bader <stefan.bader@canonical.com>
Acked-by: John Johansen <john.johansen@canonical.com>

1 files changed, 29 insertions, 30 deletions

diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index b0234bcbd32..b6e3e87d25f 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -410,6 +410,34 @@ static void __cpuinit early_init_amd_mc(struct cpuinfo_x86 *c)
 #endif
 }
 
+static void __cpuinit bsp_init_amd(struct cpuinfo_x86 *c)
+{
+        if (cpu_has(c, X86_FEATURE_CONSTANT_TSC)) {
+
+                if (c->x86 > 0x10 ||
+                    (c->x86 == 0x10 && c->x86_model >= 0x2)) {
+                        u64 val;
+
+                        rdmsrl(MSR_K7_HWCR, val);
+                        if (!(val & BIT(24)))
+                                printk(KERN_WARNING FW_BUG "TSC doesn't count "
+                                        "with P0 frequency!\n");
+                }
+        }
+
+        if (c->x86 == 0x15) {
+                unsigned long upperbit;
+                u32 cpuid, assoc;
+
+                cpuid    = cpuid_edx(0x80000005);
+                assoc    = cpuid >> 16 & 0xff;
+                upperbit = ((cpuid >> 24) << 10) / assoc;
+
+                va_align.mask     = (upperbit - 1) & PAGE_MASK;
+                va_align.flags    = ALIGN_VA_32 | ALIGN_VA_64;
+        }
+}
+
 static void __cpuinit early_init_amd(struct cpuinfo_x86 *c)
 {
         early_init_amd_mc(c);
@@ -441,36 +469,6 @@ static void __cpuinit early_init_amd(struct cpuinfo_x86 *c)
                         set_cpu_cap(c, X86_FEATURE_EXTD_APICID);
         }
 #endif
-
-        /* We need to do the following only once */
-        if (c != &boot_cpu_data)
-                return;
-
-        if (cpu_has(c, X86_FEATURE_CONSTANT_TSC)) {
-
-                if (c->x86 > 0x10 ||
-                    (c->x86 == 0x10 && c->x86_model >= 0x2)) {
-                        u64 val;
-
-                        rdmsrl(MSR_K7_HWCR, val);
-                        if (!(val & BIT(24)))
-                                printk(KERN_WARNING FW_BUG "TSC doesn't count "
-                                        "with P0 frequency!\n");
-                }
-        }
-
-        if (c->x86 == 0x15) {
-                unsigned long upperbit;
-                u32 cpuid, assoc;
-
-                cpuid    = cpuid_edx(0x80000005);
-                assoc    = cpuid >> 16 & 0xff;
-                upperbit = ((cpuid >> 24) << 10) / assoc;
-
-                va_align.mask     = (upperbit - 1) & PAGE_MASK;
-                va_align.flags    = ALIGN_VA_32 | ALIGN_VA_64;
-
-        }
 }
 
 static void __cpuinit init_amd(struct cpuinfo_x86 *c)
@@ -692,6 +690,7 @@ static const struct cpu_dev __cpuinitconst amd_cpu_dev = {
         .c_size_cache   = amd_size_cache,
 #endif
         .c_early_init   = early_init_amd,
+        .c_bsp_init     = bsp_init_amd,
         .c_init         = init_amd,
         .c_x86_vendor   = X86_VENDOR_AMD,
 };