diff options
author | Matt Fleming <matt@console-pimps.org> | 2010-03-29 02:24:54 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2010-03-29 02:24:54 -0400 |
commit | 6ae6650232ddcf2f50e8817acd63cde37cf1d093 (patch) | |
tree | 0f60b6501f0c5efd2fdf4c997b54004bc91f3df1 /arch/sh/include/cpu-sh4/cpu | |
parent | 4bea3418c737891894b9d3d3e9f8bbd67d66fa38 (diff) |
sh: tlb debugfs support.
Export the status of the utlb and itlb entries through debugfs.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/include/cpu-sh4/cpu')
-rw-r--r-- | arch/sh/include/cpu-sh4/cpu/mmu_context.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/sh/include/cpu-sh4/cpu/mmu_context.h b/arch/sh/include/cpu-sh4/cpu/mmu_context.h index 5963124c1d4..2941be617a5 100644 --- a/arch/sh/include/cpu-sh4/cpu/mmu_context.h +++ b/arch/sh/include/cpu-sh4/cpu/mmu_context.h | |||
@@ -19,10 +19,17 @@ | |||
19 | 19 | ||
20 | #define MMUCR 0xFF000010 /* MMU Control Register */ | 20 | #define MMUCR 0xFF000010 /* MMU Control Register */ |
21 | 21 | ||
22 | #define MMU_TLB_ENTRY_SHIFT 8 | ||
23 | |||
22 | #define MMU_ITLB_ADDRESS_ARRAY 0xF2000000 | 24 | #define MMU_ITLB_ADDRESS_ARRAY 0xF2000000 |
23 | #define MMU_ITLB_ADDRESS_ARRAY2 0xF2800000 | 25 | #define MMU_ITLB_ADDRESS_ARRAY2 0xF2800000 |
26 | #define MMU_ITLB_DATA_ARRAY 0xF3000000 | ||
27 | #define MMU_ITLB_DATA_ARRAY2 0xF3800000 | ||
28 | |||
24 | #define MMU_UTLB_ADDRESS_ARRAY 0xF6000000 | 29 | #define MMU_UTLB_ADDRESS_ARRAY 0xF6000000 |
25 | #define MMU_UTLB_ADDRESS_ARRAY2 0xF6800000 | 30 | #define MMU_UTLB_ADDRESS_ARRAY2 0xF6800000 |
31 | #define MMU_UTLB_DATA_ARRAY 0xF7000000 | ||
32 | #define MMU_UTLB_DATA_ARRAY2 0xF7800000 | ||
26 | #define MMU_PAGE_ASSOC_BIT 0x80 | 33 | #define MMU_PAGE_ASSOC_BIT 0x80 |
27 | 34 | ||
28 | #define MMUCR_TI (1<<2) | 35 | #define MMUCR_TI (1<<2) |