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authorLinus Torvalds <torvalds@linux-foundation.org>2009-08-04 18:49:11 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2009-08-04 18:49:11 -0400
commit90bc1a658a53f8832ee799685703977a450e5af9 (patch)
tree98c5ceb22d634508614e42330ed1e27e6930a983 /arch/mips/kernel/smtc.c
parent6ce90c430baef6e411dcf32e872913888bb3ef54 (diff)
parent54822de7793bf9aa56d79cc173281cdb23b37f9f (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (32 commits) MIPS: Wire up accept4 syscall. MIPS: VPE: Delete unused function get_tc_unused(). MIPS: VPE: Fix bogus indentation. MIPS: VPE: Make various functions static. MIPS: VPE: Free relocation chain on error. MIPS: VPE: Fix compiler warning. MIPS: Module: Make error messages unique. MIPS: Octeon: Run IPI code with interrupts disabled. MIPS: Jazz: Fix read buffer overflow MIPS: Use DIV_ROUND_CLOSEST MIPS: MTX-1: Request button GPIO before setting its direction MIPS: AR7: Override CFLAGS with -Werror MIPS: AR7: Remove unused tnetd7200_get_clock function MIPS: AR7: Use DMA_BIT_MASK(nn) instead of deprecated DMA_nnBIT_MASK MIPS: AR7: Fix build failures when CONFIG_SERIAL_8250 is not enabled MIPS: Fix read buffer overflow MIPS: AR7: Fix build warning on memory.c MIPS: Octeon PCIe: Make hardware and software bus numbers match. MIPS: RBTX4939: Fix IOC pin-enable register updating MIPS: Simplify and correct interrupt handling for MSP4200 ...
Diffstat (limited to 'arch/mips/kernel/smtc.c')
-rw-r--r--arch/mips/kernel/smtc.c13
1 files changed, 8 insertions, 5 deletions
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index 8a0626cbb10..c16bb6d6c25 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -465,11 +465,8 @@ void smtc_prepare_cpus(int cpus)
465 smtc_configure_tlb(); 465 smtc_configure_tlb();
466 466
467 for (tc = 0, vpe = 0 ; (vpe < nvpe) && (tc < ntc) ; vpe++) { 467 for (tc = 0, vpe = 0 ; (vpe < nvpe) && (tc < ntc) ; vpe++) {
468 /* 468 if (tcpervpe[vpe] == 0)
469 * Set the MVP bits. 469 continue;
470 */
471 settc(tc);
472 write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() | VPECONF0_MVP);
473 if (vpe != 0) 470 if (vpe != 0)
474 printk(", "); 471 printk(", ");
475 printk("VPE %d: TC", vpe); 472 printk("VPE %d: TC", vpe);
@@ -488,6 +485,12 @@ void smtc_prepare_cpus(int cpus)
488 } 485 }
489 if (vpe != 0) { 486 if (vpe != 0) {
490 /* 487 /*
488 * Allow this VPE to control others.
489 */
490 write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() |
491 VPECONF0_MVP);
492
493 /*
491 * Clear any stale software interrupts from VPE's Cause 494 * Clear any stale software interrupts from VPE's Cause
492 */ 495 */
493 write_vpe_c0_cause(0); 496 write_vpe_c0_cause(0);