diff options
author | David S. Miller <davem@davemloft.net> | 2011-04-11 16:44:25 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2011-04-11 16:44:25 -0400 |
commit | 1c01a80cfec6f806246f31ff2680cd3639b30e67 (patch) | |
tree | 0b554aad2ec1da71ecf6339d4ba51617bfe1dc3c /arch/mips/include/asm/mipsregs.h | |
parent | c44d79950b2daa1025e62eede73e4e4a274d1ef3 (diff) | |
parent | 4a9f65f6304a00f6473e83b19c1e83caa1e42530 (diff) |
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
Conflicts:
drivers/net/smsc911x.c
Diffstat (limited to 'arch/mips/include/asm/mipsregs.h')
-rw-r--r-- | arch/mips/include/asm/mipsregs.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index 4d987097538..6a6f8a8f542 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h | |||
@@ -922,7 +922,7 @@ do { \ | |||
922 | #define write_c0_config7(val) __write_32bit_c0_register($16, 7, val) | 922 | #define write_c0_config7(val) __write_32bit_c0_register($16, 7, val) |
923 | 923 | ||
924 | /* | 924 | /* |
925 | * The WatchLo register. There may be upto 8 of them. | 925 | * The WatchLo register. There may be up to 8 of them. |
926 | */ | 926 | */ |
927 | #define read_c0_watchlo0() __read_ulong_c0_register($18, 0) | 927 | #define read_c0_watchlo0() __read_ulong_c0_register($18, 0) |
928 | #define read_c0_watchlo1() __read_ulong_c0_register($18, 1) | 928 | #define read_c0_watchlo1() __read_ulong_c0_register($18, 1) |
@@ -942,7 +942,7 @@ do { \ | |||
942 | #define write_c0_watchlo7(val) __write_ulong_c0_register($18, 7, val) | 942 | #define write_c0_watchlo7(val) __write_ulong_c0_register($18, 7, val) |
943 | 943 | ||
944 | /* | 944 | /* |
945 | * The WatchHi register. There may be upto 8 of them. | 945 | * The WatchHi register. There may be up to 8 of them. |
946 | */ | 946 | */ |
947 | #define read_c0_watchhi0() __read_32bit_c0_register($19, 0) | 947 | #define read_c0_watchhi0() __read_32bit_c0_register($19, 0) |
948 | #define read_c0_watchhi1() __read_32bit_c0_register($19, 1) | 948 | #define read_c0_watchhi1() __read_32bit_c0_register($19, 1) |