omap4: iommu: add pm constraints for ducati iommu

A constraint for CORE domain is requested by the IOMMU driver
before releasing the Ducati's RST3, and is released when the
IOMMU is being disabled.

This ensures that the CORE domain does not go into Retention
after releasing RST3, thereby eliminating any context loss in
the Ducati Unicache registers due to CORE domain OSWR transitions.

For runtime PM, the constraint is relaxed after the IOMMU driver
has saved its context when Ducati is either self-hibernating or
being suspended, and the constraint is requested again before
restoring the context for ducati resume.

Change-Id: Ib4042226d2529be141d69917bdb211ee6f30bd22
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Miguel Vadillo <vadillo@ti.com>
Signed-off-by: Juan Gutierrez <jgutierrez@ti.com>
Signed-off-by: Paul Hunt <hunt@ti.com>

1 files changed, 30 insertions, 0 deletions

diff --git a/arch/arm/mach-omap2/iommu2.c b/arch/arm/mach-omap2/iommu2.c
index 055269b560c..ef255161466 100644
--- a/arch/arm/mach-omap2/iommu2.c
+++ b/arch/arm/mach-omap2/iommu2.c
@@ -20,6 +20,9 @@
 
 #include <plat/iommu.h>
 #include <plat/omap_device.h>
+#ifdef CONFIG_OMAP_PM
+#include <plat/omap-pm.h>
+#endif
 
 /*
  * omap2 architecture specific register bit definitions
@@ -66,6 +69,12 @@
          ((pgsz) == MMU_CAM_PGSZ_64K) ? 0xffff0000 :    \
          ((pgsz) == MMU_CAM_PGSZ_4K)  ? 0xfffff000 : 0)
 
+#ifdef CONFIG_OMAP_PM
+struct pm_qos_request_list *pm_iommu1_handle;
+#define PM_IOMMU1_SDMA_LAT_CONSTRAINT   400
+#define PM_IOMMU1_NO_LAT_CONSTRAINT     -1
+#endif
+
 
 static void __iommu_set_twl(struct iommu *obj, bool on)
 {
@@ -103,6 +112,16 @@ static int omap2_iommu_enable(struct iommu *obj)
         if (!IS_ALIGNED(pa, SZ_16K))
                 return -EINVAL;
 
+#ifdef CONFIG_OMAP_PM
+        if (!strcmp(obj->name, "ducati")) {
+                ret = omap_pm_set_max_sdma_lat(&pm_iommu1_handle,
+                                PM_IOMMU1_SDMA_LAT_CONSTRAINT);
+                if (ret) {
+                        pr_err("omap2_iommu_enable - Unable to set constraint "
+                                "on CORE domain\n");
+                }
+        }
+#endif
         ret = omap_device_enable(obj->pdev);
         if (ret)
                 return ret;
@@ -153,6 +172,17 @@ static void omap2_iommu_disable(struct iommu *obj)
         dev_dbg(obj->dev, "%s is shutting down\n", obj->name);
         if (omap_device_shutdown(obj->pdev))
                 dev_err(obj->dev, "%s err 0x%x\n", __func__, ret);
+
+#ifdef CONFIG_OMAP_PM
+        if (!strcmp(obj->name, "ducati")) {
+                int status1 = omap_pm_set_max_sdma_lat(&pm_iommu1_handle,
+                                        PM_IOMMU1_NO_LAT_CONSTRAINT);
+                if (status1) {
+                        pr_err("omap2_iommu_disable failed to release "
+                                "constraint on CORE domain\n");
+                }
+        }
+#endif
 }
 
 static void omap2_iommu_set_twl(struct iommu *obj, bool on)