omap:ipu_pm: Patchset to introduce ipu_pm functionality. omap:ipu_pm: add ipu_dev header to mach-omap2 tree

Header file needed fot mach-omap2/ipu_dev.c file

Signed-off-by: Paul Hunt <hunt@ti.com>

omap:ipu_pm: add ipu_utility to mach-omap2 tree

IVAHD Sequencer WFI Boot Code for IPU PM Driver

Signed-off-by: Paul Hunt <hunt@ti.com>

omap:ipu_pm: add ipu_drv to mach-omap2 tree

Add needed api for ipu_pm module

Signed-off-by: Paul Hunt <hunt@ti.com>

omap:ipu_pm: add ipu_dev to mach-omap2 tree.

Platform Device handling for IPU PM Driver

Includes:
- ipu_pm_module_start
- ipu_pm_module_stop
- platform data definition for the following devices:
 + fdif
 + ipu
 + ipu_c0
 + ipu_c1
 + iss
 + iva
 + iva_seq0
 + iva_seq1
 + L3
 + mpu
-ipussdev_init to init all devices.

Signed-off-by: Paul Hunt <hunt@ti.com>

syslink:ipu_pm: add/remove ipu_pm_start/stop

Add the calls to api that will enable:
- iva_hd
- iva_seq0
- iva_seq1
- fdif
- iss
modules using the hwmod implementation.

Hibernation disabled.
Gptimer3 used for hibernation was disabled.
Setting CM_MPU_M3_CLKSTCTRL.CLKTRCTRL[1:0] = HW_AUTO

Retention is disable by default.

Signed-off-by: Paul Hunt <hunt@ti.com>

syslink:ipu_pm: fix req/rel aux_clk/iss/iva/idle

The current implementation was not meeting all
the requiriments needed to properly enable and
use aux_clk.
Anyway this is a hack way to do it, the proper
implementation is still pending.
Signed-off-by: Miguel Vadillo <vadillo@ti.com>

Temporary path using cmm_write_reg to enable CAM_PHY
Signed-off-by: Paul Hunt <hunt@ti.com>

Ivahd requesting was not fully working since
sl2 was not being requested and that is needed
for ivahd to be fully functional.
In ipu_dev sl2 is initialized
In ipu_pm the flow to request iva should be:
 - Requesting (ivaseq1 call is requesting sl2)
  ivahd>ivaseq0>(ivaseq1>sl2)
 - Releasing (iva call is first releasing sl2)
  ivaseq0>ivaseq1>(sl2>ivahd)
Signed-off-by: Miguel Vadillo <vadillo@ti.com>

Setting IdleAllowed flag that enables the idle mode
in Ducati. WFI can be called in Ducati flag
whenever this flag is set
Signed-off-by: Juan Gutierrez <jgutierrez@ti.com>

Fix a compile error related to iva/iss when trying
to build with ES1.0 configuration. In ES1.0, the
PM is not supported.
Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com>
Signed-off-by: Miguel Vadillo <vadillo@ti.com>

syslink:ipu_pm: DFVS support for freq

Fix bug in error message string referencing
Signed-off-by: Paul Hunt <hunt@ti.com>

Add platform data for DSP resource and fix
attributes for MPU and L3 interconnect.
Signed-off-by: Paul Hunt <hunt@ti.com>

Provide internal APIs for performance and
latency constraint frameworks to use to assert
these constraints into the system power management.
Signed-off-by: Paul Hunt <hunt@ti.com>

MPU and CORE freq/lat cstrs
Add special handling for MPU and CORE frequency and
latency constraints.
To specify a constraint to MPU or CORE the api needs
to be called passing the following to the api:
- IPUPM_SELF
- IPUPM_MPU
- IPUPM_CORE
Signed-off-by: Paul Hunt <hunt@ti.com>

DVFS support in ipu_pm
Calling the dvfs apis per resource.
Included:
- ipu[perf|lat]
- iss[perf|lat]
- ivahd[perf|lat]
- L3 bus[lat]
- mpu[perf|lat]
Pending:
- fdif
- dsp

Note: Latency calls are working but hasnt been tested.
      Perf/rate calls are working.
Signed-off-by: Miguel Vadillo <vadillo@ti.com>
Signed-off-by: Paul Hunt <hunt@ti.com>
(cherry picked from commit 3c1cdb45bb67d11eda14420a7b8eaacff0c24173)

SYSLINK:IPU-PM-move iommu handles to attach and detach

Move getting iommu handle to attach and detach from setup/destroy.
Having the iommu get in setup is causing the mmu fault recovery fail
since the iommu object gets incremented before the fault application
closes the iommu handle which leads to failure in shutting down the
iommu device completely.

Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com>

syslink:ipu_pm: add L3 bw and fdif cstr

ipu_pm api to set the bandwidth constraint for L3 bus
New api is:
ipu_pm_module_set_bandwidth(rsrc,
                            target_rsrc,
                            bw);
bw is received in KiB/s and converted into Hz

Add support to set performance and latency cstrs to
fdif.

Signed-off-by: Miguel Vadillo <vadillo@ti.com>
Signed-off-by: Paul Hunt <hunt@ti.com>
Signed-off-by: Juan Gutierrez <jgutierrez@ti.com>

syslink:ipu_pm: send pid_death just to appm3

ipu_pm_notification is broadcasting all events to both
sys/app processors whenever an event is sent using that
api.

For PID_DEATH event the requirement is only to send the
message to APPM3 since is the one that will be executing
the resource manager; also  because of that sending the
message to SYSM3 is unnecessary.

Signed-off-by: Miguel Vadillo <vadillo@ti.com>

syslink:ipu_pm: allow IPU hibernation

-IPU self hibernation-
After 5 seconds of inactivity ipu will send a notification to
MPU indicating it can be turned off, mpu can proceed to turn off
IPU just if there is no message (notify_send_event) going to IPU,
in that case hibernation will be aborted. IPU is prepared to abort
hibernation when a message arrives to its mbox. When mpu is
hibernating IPU the iommu and mbox context will be saved and then
rproc_sleep will be called to disable each core and also the
associated gptimer, that is needed to allow retention. Whenever a
message is sent to IPU the ipu_pm_restore will check and wake up IPU,
if needed, restoring the iommu and mbox context and calling rproc_wake
that will enable IPU and the associated gptimer again.

-MPU hibernating IPU-
Whenever the system suspend is sent to ipu_drv the suspend_drv will
send a SUSPEND notification to IPU, it will send back an ack to MPU
and then start the hibernation proccess by it self following the same
scheme mentioned above but without waiting the 5 seconds, once
ipu_drv receives the suspend ack it will call ipu_pm_save_ctx() in
order to wait for IPU to be hibernated and in really idle then turn IPU
off. This will work even if self hibernation in IPU is disable.

Signed-off-by: Miguel Vadillo <vadillo@ti.com>
Signed-off-by: Juan Gutierrez <jgutierrez@ti.com>
Signed-off-by: Paul Hunt <hunt@ti.com>

IPU PM: adapt aux clk funcs to new framework entities

Signed-off-by: Paul Hunt <hunt@ti.com>

IPU PM: temporary workaround for missing MM AUX_CLK requests

Signed-off-by: Paul Hunt <hunt@ti.com>

syslink: ipu_pm: add support for all the auxclk

Previously ipu_pm was only supporting the request of
AUX_CLK_1/3 now all the available aux_clk 0-5 are
supported and can be requested/released via ipu_pm.

Also the base address of the AUX_CLK was fixed since
it was assuming AUX_CLK_0 as AUX_CLK_1 leading to a
misalignment when requesting.

Signed-off-by: Miguel Vadillo <vadillo@ti.com>

syslink: ipu_pm: add a core latency constraint when the ipu is running.

Due to the enabling of C4 and C5 states IPU was being
put in reset without allowing it to properly save the
context leading to an invalid resume operation and an
MMU fault by IPU side.

Putting a latency constraint on IPU_CORE whenever IPU
is up and running is avoiding this scenario.

The constraint is released once the IPU has properly
saved the context and requested again when resuming
to avoid letting the ipu_core going to retention.

Change-Id: Iced64ff0744b2d6b0a0ecfc1952ed26e9e560278
Signed-off-by: Miguel Vadillo <vadillo@ti.com>
Signed-off-by: Paul Hunt <hunt@ti.com>

omap:syslink: removing gpt4 as available

Gptimers 3 & 4 are reserving for ipu_pm internal use
gpt3 was removed in previous patch from the list of
available gptimers that IPU can request but gpt4 was
still in the list.
This patch removes gpt4 from the list.

Signed-off-by: Miguel Vadillo <vadillo@ti.com>

4 files changed, 903 insertions, 0 deletions

diff --git a/arch/arm/mach-omap2/ipu_dev.c b/arch/arm/mach-omap2/ipu_dev.c
new file mode 100644
index 00000000000..8d3386f1f86
--- /dev/null
+++ b/arch/arm/mach-omap2/ipu_dev.c
@@ -0,0 +1,384 @@
+/**
+ * linux/arch/arm/mach-omap2/ipu_dev.c
+ *
+ * Copyright (C) 2010 Texas Instruments, Inc.
+ * Paul Hunt <hunt@ti.com>
+ *
+ * OMAP4 Image Processing Unit
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/err.h>
+
+#include <mach/irqs.h>
+#include <plat/omap_hwmod.h>
+#include <plat/omap_device.h>
+#include <plat/omap-pm.h>
+#include <linux/platform_device.h>
+#include <plat/remoteproc.h>
+
+#include <plat/ipu_dev.h>
+
+#include "../../../drivers/dsp/syslink/ipu_pm/ipu_pm.h"
+
+#define IPU_DRIVER_NAME "omap-ipu-pm"
+#define ISS_IPU_BUS_ID 0
+#define IVA_IPU_BUS_ID 1
+
+struct omap_ipupm_mod_platform_data *ipupm_get_plat_data(void);
+
+static char *hwmod_state_strings[] = {
+        "_HWMOD_STATE_UNKNOWN",
+        "_HWMOD_STATE_REGISTERED",
+        "_HWMOD_STATE_CLKS_INITED",
+        "_HWMOD_STATE_INITIALIZED",
+        "_HWMOD_STATE_ENABLED",
+        "_HWMOD_STATE_IDLE",
+        "_HWMOD_STATE_DISABLED",
+};
+static void print_hwmod_state(struct omap_hwmod *oh)
+{
+        u32 _state = (u32) oh->_state;
+        pr_info("HWMOD name = %s\n", oh->name);
+        if (_state > _HWMOD_STATE_LAST)
+                WARN(1, "Illegal hwmod _state = %d\n", _state);
+        else
+                pr_info("state = %s\n", hwmod_state_strings[_state]);
+}
+
+inline int ipu_pm_module_start(unsigned rsrc)
+{
+        int ret;
+        struct omap_ipupm_mod_platform_data *pd;
+
+        pd = ipupm_get_plat_data();
+
+        print_hwmod_state(pd[rsrc].oh);
+        ret = omap_device_enable(pd[rsrc].pdev);
+        if (ret)
+                pr_err("device enable failed %s", pd[rsrc].oh_name);
+
+        return ret;
+}
+EXPORT_SYMBOL(ipu_pm_module_start);
+
+inline int ipu_pm_module_stop(unsigned rsrc)
+{
+        int ret;
+        struct omap_ipupm_mod_platform_data *pd;
+
+        pd = ipupm_get_plat_data();
+
+        print_hwmod_state(pd[rsrc].oh);
+        ret = omap_device_shutdown(pd[rsrc].pdev);
+        if (ret)
+                pr_err("device disable failed %s", pd[rsrc].oh_name);
+
+        return ret;
+}
+EXPORT_SYMBOL(ipu_pm_module_stop);
+
+inline int ipu_pm_module_set_rate(unsigned rsrc,
+                                  unsigned target_rsrc,
+                                  unsigned rate)
+{
+        int ret;
+        unsigned target;
+        struct device *dp;
+        struct omap_ipupm_mod_platform_data *pd;
+
+        pd = ipupm_get_plat_data();
+
+        if (target_rsrc == IPU_PM_MPU)
+                dp = omap2_get_mpuss_device();
+        else if (target_rsrc == IPU_PM_CORE)
+                dp = omap2_get_l3_device();
+        else {
+                if (target_rsrc == IPU_PM_SELF)
+                        target = rsrc;
+                else
+                        target = target_rsrc;
+
+                if ((pd[target].caps & IPUPM_CAPS_PERF) == 0) {
+                        pr_err("device set rate not supported for %s",
+                                pd[target].oh_name);
+                        ret = -EINVAL;
+                        goto err_ret;
+                } else
+                        dp = pd[target].dev;
+        }
+
+        ret = omap_device_set_rate(pd[rsrc].dev, dp, rate);
+        if (ret)
+                pr_err("device set rate failed %s", pd[target_rsrc].oh_name);
+err_ret:
+        return ret;
+}
+EXPORT_SYMBOL(ipu_pm_module_set_rate);
+
+inline int ipu_pm_module_set_latency(unsigned rsrc,
+                                     unsigned target_rsrc,
+                                     int latency)
+{
+        int ret = 0;
+        unsigned target;
+        struct omap_ipupm_mod_platform_data *pd;
+
+        pd = ipupm_get_plat_data();
+
+        if (target_rsrc == IPU_PM_MPU) {
+#ifdef CONFIG_OMAP_PM
+                ret = omap_pm_set_max_mpu_wakeup_lat(&pd[rsrc].qos_request,
+                                                     latency);
+#endif
+                if (ret)
+                        goto err_ret;
+        } else if (target_rsrc == IPU_PM_CORE) {
+#ifdef CONFIG_OMAP_PM
+                ret = omap_pm_set_max_sdma_lat(&pd[rsrc].qos_request,
+                                               latency);
+#endif
+                if (ret)
+                        goto err_ret;
+        } else {
+                if (target_rsrc == IPU_PM_SELF)
+                        target = rsrc;
+                else
+                        target = target_rsrc;
+
+                if ((pd[target].caps & IPUPM_CAPS_LAT) == 0) {
+                        pr_err("device set latency not supported for %s",
+                                pd[target].oh_name);
+                        ret = -EINVAL;
+                } else {
+#ifdef CONFIG_OMAP_PM
+                        ret = omap_pm_set_max_dev_wakeup_lat(pd[rsrc].dev,
+                                                             pd[target].dev,
+                                                             latency);
+#endif
+                }
+        }
+
+        if (ret)
+                pr_err("module set latency failed %s", pd[target].oh_name);
+err_ret:
+        return ret;
+}
+EXPORT_SYMBOL(ipu_pm_module_set_latency);
+
+inline int ipu_pm_module_set_bandwidth(unsigned rsrc,
+                                       unsigned target_rsrc,
+                                       int bandwidth)
+{
+        int ret = 0;
+        struct omap_ipupm_mod_platform_data *pd;
+
+        pd = ipupm_get_plat_data();
+
+        if ((pd[target_rsrc].caps & IPUPM_CAPS_BDW) == 0) {
+                pr_err("device set bandwidth not supported for %s",
+                        pd[target_rsrc].oh_name);
+                ret = -EINVAL;
+        } else {
+#ifdef CONFIG_OMAP_PM
+                struct device *dp;
+                dp = omap2_get_l3_device();
+                ret = omap_pm_set_min_bus_tput(dp,
+                                               OCP_INITIATOR_AGENT,
+                                               bandwidth);
+#endif
+        }
+
+        if (ret)
+                pr_err("module set bandwidth failed %s",
+                                                pd[target_rsrc].oh_name);
+        return ret;
+}
+EXPORT_SYMBOL(ipu_pm_module_set_bandwidth);
+
+/* FIXME: not in use now
+ * static struct omap_ipupm_mod_ops omap_ipu_ops = {
+ *      .start = NULL,
+ *      .stop = NULL,
+ * };
+ *
+ * static struct omap_ipupm_mod_ops omap_ipu0_ops = {
+ *      .start = NULL,
+ *      .stop = NULL,
+ * };
+ *
+ * static struct omap_ipupm_mod_ops omap_ipu1_ops = {
+ *      .start = NULL,
+ *      .stop = NULL,
+ * };
+ */
+
+/* ipupm generic operations */
+static struct omap_ipupm_mod_ops omap_ipupm_ops = {
+        .start = NULL,
+        .stop = NULL,
+};
+
+static struct omap_ipupm_mod_platform_data omap_ipupm_data[] = {
+        {
+                .name = "omap-ipu-pm",
+                .oh_name = "fdif",
+                .caps = IPUPM_CAPS_START | IPUPM_CAPS_STOP
+                        | IPUPM_CAPS_PERF | IPUPM_CAPS_LAT,
+                .ops = &omap_ipupm_ops,
+        },
+        {
+                .name = "omap-ipu-pm",
+                .oh_name = "ipu",
+                .caps = IPUPM_CAPS_START | IPUPM_CAPS_STOP
+                        | IPUPM_CAPS_PERF | IPUPM_CAPS_LAT
+                        | IPUPM_CAPS_EXTINIT,
+                .ops = &omap_ipupm_ops,
+        },
+        {
+                .name = "omap-ipu-pm",
+                .oh_name = "ipu_c0",
+                .caps = IPUPM_CAPS_START | IPUPM_CAPS_STOP
+                        | IPUPM_CAPS_EXTINIT,
+                .ops = &omap_ipupm_ops,
+        },
+        {
+                .name = "omap-ipu-pm",
+                .oh_name = "ipu_c1",
+                .caps = IPUPM_CAPS_START | IPUPM_CAPS_STOP
+                        | IPUPM_CAPS_EXTINIT,
+                .ops = &omap_ipupm_ops,
+        },
+        {
+                .name = "omap-ipu-pm",
+                .oh_name = "iss",
+                .caps = IPUPM_CAPS_START | IPUPM_CAPS_STOP
+                        | IPUPM_CAPS_PERF | IPUPM_CAPS_LAT,
+                .ops = &omap_ipupm_ops,
+        },
+        {
+                .name = "omap-ipu-pm",
+                .oh_name = "iva",
+                .caps = IPUPM_CAPS_START | IPUPM_CAPS_STOP
+                        | IPUPM_CAPS_PERF | IPUPM_CAPS_LAT,
+                .ops = &omap_ipupm_ops,
+        },
+        {
+                .name = "omap-ipu-pm",
+                .oh_name = "iva_seq0",
+                .caps = IPUPM_CAPS_START | IPUPM_CAPS_STOP,
+                .ops = &omap_ipupm_ops,
+        },
+        {
+                .name = "omap-ipu-pm",
+                .oh_name = "iva_seq1",
+                .caps = IPUPM_CAPS_START | IPUPM_CAPS_STOP,
+                .ops = &omap_ipupm_ops,
+        },
+        {
+                .name = "omap-ipu-pm",
+                .oh_name = "l3_main_1",
+                .caps = IPUPM_CAPS_LAT | IPUPM_CAPS_BDW
+                        | IPUPM_CAPS_EXTINIT,
+                .ops = &omap_ipupm_ops,
+        },
+        {
+                .name = "omap-ipu-pm",
+                .oh_name = "mpu",
+                .caps = IPUPM_CAPS_PERF | IPUPM_CAPS_LAT
+                        | IPUPM_CAPS_EXTINIT,
+                .ops = &omap_ipupm_ops,
+        },
+        {
+                .name = "omap-ipu-pm",
+                .oh_name = "sl2if",
+                .caps = IPUPM_CAPS_START | IPUPM_CAPS_STOP,
+                .ops = &omap_ipupm_ops,
+        },
+        {
+                .name = "omap-ipu-pm",
+                .oh_name = "dsp",
+                .caps = IPUPM_CAPS_START | IPUPM_CAPS_STOP
+                        | IPUPM_CAPS_PERF | IPUPM_CAPS_LAT
+                        | IPUPM_CAPS_EXTINIT,
+                .ops = &omap_ipupm_ops,
+        },
+};
+
+struct omap_ipupm_mod_platform_data *ipupm_get_plat_data(void)
+{
+        return omap_ipupm_data;
+}
+EXPORT_SYMBOL(ipupm_get_plat_data);
+
+static struct omap_device_pm_latency omap_ipupm_latency[] = {
+        {
+                .deactivate_func = omap_device_idle_hwmods,
+                .activate_func   = omap_device_enable_hwmods,
+                .flags           = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
+        },
+};
+
+static int __init omap_ipussdev_init(void)
+{
+        int status = -ENODEV;
+        int i;
+        int first = 1;
+        struct omap_hwmod *oh;
+        struct omap_device *od;
+        char *oh_name;
+        char *pdev_name = IPU_DRIVER_NAME;
+        struct omap_device_pm_latency *ohl = omap_ipupm_latency;
+        int ohl_cnt = ARRAY_SIZE(omap_ipupm_latency);
+
+        for (i = 0; i < ARRAY_SIZE(omap_ipupm_data); i++) {
+                oh_name = omap_ipupm_data[i].oh_name;
+
+                if (omap_ipupm_data[i].caps & IPUPM_CAPS_EXTINIT)
+                        continue;
+
+                oh = omap_hwmod_lookup(oh_name);
+                if (!oh) {
+                        pr_err("%s: could not look up %s\n", __func__, oh_name);
+
+                        continue; /* to allow init to continue with other IPs
+                        * we probably do not want to completely stop progress
+                        * due to one module anyway, but need to be able to
+                        * not try to use it if init fails
+                        * this was put in to handle disabled hwmods
+                        */
+
+                        status = -ENODEV;
+                        goto err_init;
+                }
+                omap_ipupm_data[i].oh = oh;
+
+                od = omap_device_build(pdev_name, IVA_IPU_BUS_ID+i, oh,
+                                    &omap_ipupm_data[i],
+                                    sizeof(struct omap_ipupm_mod_platform_data),
+                                    ohl, ohl_cnt, false);
+
+                status = IS_ERR(od);
+                WARN(status, "Could not build omap_device for %s %s\n",
+                                                        pdev_name, oh_name);
+                if (!status) {
+                        /* Save the id of the first registered dev */
+                        if (first) {
+                                ipu_pm_first_dev = od->pdev.id;
+                                first = 0;
+                        }
+                        omap_ipupm_data[i].pdev = &od->pdev;
+                        omap_ipupm_data[i].dev = &od->pdev.dev;
+                }
+        }
+
+err_init:
+        return status;
+}
+
+arch_initcall(omap_ipussdev_init);
diff --git a/arch/arm/mach-omap2/ipu_drv.c b/arch/arm/mach-omap2/ipu_drv.c
new file mode 100644
index 00000000000..88a78ba7be2
--- /dev/null
+++ b/arch/arm/mach-omap2/ipu_drv.c
@@ -0,0 +1,343 @@
+/*
+ * linux/arch/arm/mach-omap2/ipu_drv.c
+ *
+ * OMAP Image Processing Unit Power Management Driver
+ *
+ * Copyright (C) 2010 Texas Instruments
+ * Paul Hunt <hunt@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the  GNU General Public License along
+ * with this program; if not, write  to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/types.h>
+#include <linux/mm.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/file.h>
+#include <linux/fs.h>
+#include <linux/sysfs.h>
+#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
+#include <linux/platform_device.h>
+#include <asm/uaccess.h>
+#include <plat/ipu_dev.h>
+
+#define IPU_CLASS_NAME "ipu-power"
+#define IPU_DRIVER_NAME "omap-ipu-pm"
+
+static struct class *omap_ipu_pm_class;
+static dev_t omap_ipu_pm_dev;
+
+int ipu_pm_first_dev;
+
+static struct proc_dir_entry *ipu_pm_proc_entry;
+/* we could iterate over something much more
+ * complicated than a set of lines of text
+ * Just debugging.
+ */
+static char *lines[] = {
+        "This is the first line from ipu_pm_seq",
+        "This is the second line from ipu_pm_seq",
+};
+
+static int ipu_pm_num_procs = ARRAY_SIZE(lines);
+
+static void *ipu_pm_seq_start(struct seq_file *s, loff_t *pos)
+{
+        if (*pos >= ipu_pm_num_procs)
+                return NULL;/* no more to read */
+        return lines[*pos];
+}
+static void *ipu_pm_seq_next(struct seq_file *s, void *v, loff_t *pos)
+{
+        (*pos)++;
+        if (*pos >= ipu_pm_num_procs)
+                return NULL;/* no more to read */
+        return lines[*pos];
+}
+static void ipu_pm_seq_stop(struct seq_file *s, void *v)
+{
+        /* nothing to do */
+}
+static int ipu_pm_seq_show(struct seq_file *s, void *v)
+{
+        seq_printf(s, "IPU_PM: %s\n", (char *) v);
+        return 0;
+}
+static const struct seq_operations ipu_pm_seq_ops = {
+        .start = ipu_pm_seq_start,
+        .next = ipu_pm_seq_next,
+        .stop = ipu_pm_seq_stop,
+        .show = ipu_pm_seq_show,
+};
+static int ipu_pm_proc_open(struct inode *inode, struct file *file)
+{
+        return seq_open(file, &ipu_pm_seq_ops);
+}
+
+static const struct file_operations ipu_pm_proc_ops = {
+                .owner  = THIS_MODULE,
+                .open   = ipu_pm_proc_open,
+                .read   = seq_read,
+                .llseek = seq_lseek,
+                .release = seq_release,
+};
+
+static void _suspend_stub(void)
+{
+        pr_info("Suspend IOCTL received\n");
+}
+
+static void _resume_stub(void)
+{
+        pr_info("Resume IOCTL received!\n");
+}
+
+/* arg should encode the IPU-managed HWMOD
+ * to be suspended, 0 for system wide
+ */
+static int ipu_pm_ioctl(struct inode *inode, struct file *filp,
+                                        unsigned int cmd, unsigned long arg)
+{
+        int ret = 0;
+        /* struct omap_ipu_pm *ipu_pm = filp->private_data; */
+
+        /* FIXME: check for ipu_pm when requested */
+
+        if (_IOC_TYPE(cmd) != IPU_PM_IOC_MAGIC)
+                return -ENOTTY;
+        if (_IOC_NR(cmd)   >  IPU_PM_IOC_MAXNR)
+                return -ENOTTY;
+
+        /* FIXME:not using the next two yet, since no args */
+        if (_IOC_DIR(cmd) & _IOC_READ) {
+                if (!access_ok(VERIFY_WRITE,
+                              (void __user *)arg,
+                              _IOC_SIZE(cmd)))
+                        return -EFAULT;
+        } else if (_IOC_DIR(cmd) & _IOC_WRITE) {
+                if (!access_ok(VERIFY_READ, (void __user *)arg, _IOC_SIZE(cmd)))
+                        return -EFAULT;
+        }
+
+        switch (cmd) {
+        case IPU_PM_IOC_SUSPEND:
+                _suspend_stub();
+                break;
+        case IPU_PM_IOC_RESUME:
+                _resume_stub();
+                break;
+
+        default:
+                return -ENOTTY;
+        }
+
+        return ret;
+}
+
+
+#ifdef ZERO
+static const struct sysfs_ops {
+        ssize_t (*show)(struct kobject *, struct attribute *, char *);
+        ssize_t (*store)(struct kobject *, struct attribute *, const char *,
+                                                                        size_t);
+};
+#endif
+
+static int is_driver_init;
+
+static const struct file_operations ipm_pm_fops = {
+                .owner = THIS_MODULE,
+                .ioctl = ipu_pm_ioctl,
+                .open  = NULL,
+};
+
+static struct ipu_pm_dev ipu_pm_dev;
+
+static int __devinit ipu_pm_probe(struct platform_device *pdev)
+{
+        /* FIXME: get pdata */
+        /* struct ipu_pm_platform_data *pdata = pdev->dev.platform_data; */
+        /* int id = pdev->id; */
+        /* ivahd.pdev = pdev; */
+
+        if (!is_driver_init) {
+                is_driver_init = 1;
+                /* FIXME: maybe needed for multiple dev */
+                /* spin_lock_init(&ipu_pm_lock); */
+        }
+        /* FIXME: add kobjects to kset */
+
+        return 0;
+}
+
+static int ipu_pm_drv_suspend(struct device *dev)
+{
+        struct platform_device *pdev = to_platform_device(dev);
+        int retval = 0;
+
+        if (pdev->id == ipu_pm_first_dev) {
+                pr_debug("%s.%d ASKED TO SUSPEND", pdev->name, pdev->id);
+                /* save any local context,
+                 * BIOS timers could be saved locally or on Ducati
+                 */
+
+                /* call our notification function */
+                retval = ipu_pm_notifications(PM_SUSPEND, NULL);
+
+                /* FIXME: Currently sending SUSPEND is enough to send
+                 * Ducati to hibernate, save ctx can be called at this
+                 * point to save ctx and reset remote procs
+                 * Currently the save ctx process can be called using
+                 * which ever proc_id, maybe this will change when
+                 * Tesla support is added.
+                 */
+                /* sysm3 is handling hibernation of ducati currently */
+                ipu_pm_save_ctx(SYS_M3);
+
+                /* return result, should be zero if all Ducati clients
+                 * returned zero else fail code
+                 */
+        }
+
+        return retval;
+}
+
+static int ipu_pm_drv_resume(struct device *dev)
+{
+        struct platform_device *pdev = to_platform_device(dev);
+        int retval = 0;
+
+        if (pdev->id == ipu_pm_first_dev) {
+                pr_debug("%s.%d ASKED TO RESUME", pdev->name, pdev->id);
+                /* restore any local context,
+                 * BIOS timers could be restored locally or on Ducati
+                 */
+
+                /* call our notification function */
+                retval = ipu_pm_notifications(PM_RESUME, NULL);
+
+                /* return result, should be zero if all Ducati clients
+                 * returned zero else fail code
+                 */
+        }
+
+        return retval;
+}
+
+static const struct dev_pm_ops ipu_pm_ops = {
+        .suspend = ipu_pm_drv_suspend,
+        .resume  = ipu_pm_drv_resume,
+};
+
+static struct platform_driver ipu_pm_driver = {
+        .probe          = ipu_pm_probe,
+        /*.remove                       = ipu_pm_remove, */
+        .driver         = {
+                .name   = IPU_DRIVER_NAME,
+                .owner = THIS_MODULE,
+                .pm = &ipu_pm_ops,
+        },
+};
+
+static int __init ipu_pm_init(void)
+{
+        int ret;
+        struct device *tmpdev;
+
+        if (!is_driver_init) {
+                is_driver_init = 1;
+                /* FIXME: maybe needed for multiple dev */
+                /* spin_lock_init(&ipu_pm_lock); */
+        }
+
+        ret = alloc_chrdev_region(&omap_ipu_pm_dev, 0, 2, IPU_CLASS_NAME);
+        if (ret) {
+                pr_err("%s: alloc_chrdev_region failed: %d\n", __func__, ret);
+                return ret;
+        }
+
+        /* create device class */
+        omap_ipu_pm_class = class_create(THIS_MODULE, IPU_CLASS_NAME);
+        if (IS_ERR(omap_ipu_pm_class)) {
+                ret = PTR_ERR(omap_ipu_pm_class);
+                pr_err("%s: class_create failed: %d\n", __func__, ret);
+                return ret;
+        }
+
+        /* create an instance of this device class */
+        cdev_init(&ipu_pm_dev.cdev, &ipm_pm_fops);
+        ipu_pm_dev.cdev.owner = THIS_MODULE;
+        ipu_pm_dev.cdev.ops = &ipm_pm_fops;
+        ret = cdev_add(&ipu_pm_dev.cdev, omap_ipu_pm_dev, 1);
+        if (ret)
+                pr_err("%s: cdev_add failed: %d\n", __func__, omap_ipu_pm_dev);
+
+        tmpdev = device_create(omap_ipu_pm_class, NULL,
+                                omap_ipu_pm_dev,
+                                NULL,
+                                "ipu%d",
+                                MINOR(omap_ipu_pm_dev));
+
+        if (IS_ERR(tmpdev)) {
+                ret = PTR_ERR(tmpdev);
+                pr_err("%s: device_create failed: %d\n", __func__, ret);
+                /* FIXME: add clean_cdev when error */
+                /*goto clean_cdev;*/
+        }
+        dev_info(tmpdev, "Test of writing to the device message log,"
+                         "done from %s\n", __func__);
+
+        pr_info("%s initialized %s, major: %d, minor: %d\n",
+                        IPU_CLASS_NAME,
+                        /*pdata->name,*/
+                        "ipu",
+                        MAJOR(omap_ipu_pm_dev),
+                        MINOR(omap_ipu_pm_dev));
+
+        /* FIXME:add a kset pointing to this new class */
+        /* omap_ipu_pm_class->dev_kobj */
+
+        /* add proc interface */
+        ipu_pm_proc_entry = create_proc_entry("ipu_proc_loads", 0, NULL);
+        if (ipu_pm_proc_entry)
+                ipu_pm_proc_entry->proc_fops = &ipu_pm_proc_ops;
+        else
+                pr_err("%s: proc entry create failed for: %s\n",
+                                                __func__, IPU_CLASS_NAME);
+
+        return platform_driver_register(&ipu_pm_driver);
+}
+
+static void __exit ipu_pm_exit(void)
+{
+        platform_driver_unregister(&ipu_pm_driver);
+}
+
+/* early_platform_init("earlytimer", &ipu_pm_driver); */
+module_init(ipu_pm_init);
+module_exit(ipu_pm_exit);
+
+MODULE_DESCRIPTION("OMAP IMAGE PROCESSING UNIT POWER MGMT DRIVER");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:" IPU_CLASS_NAME);
+MODULE_AUTHOR("Texas Instruments Inc");
diff --git a/arch/arm/mach-omap2/ipu_utility.c b/arch/arm/mach-omap2/ipu_utility.c
new file mode 100644
index 00000000000..b16b5ad891d
--- /dev/null
+++ b/arch/arm/mach-omap2/ipu_utility.c
@@ -0,0 +1,69 @@
+/*
+ * OMAP IPU_PM utility
+ *
+ * Copyright (C) 2010 Texas Instruments Inc.
+ *
+ * Written by Paul Hunt <hunt@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/io.h>
+#include <asm/io.h>
+#include <plat/io.h>
+
+#define ICONT1_ITCM_BASE        0x5A008000
+#define ICONT2_ITCM_BASE        0x5A018000
+
+static void __iomem *icont_itcm_ptr;
+
+/* Op-codes for simple boot sequence ending in WFI */
+static const u32 ICONT_Boot_WFI[] = {
+        0xEA000006,
+        0xEAFFFFFE,
+        0xEAFFFFFE,
+        0xEAFFFFFE,
+        0xEAFFFFFE,
+        0xEAFFFFFE,
+        0xEAFFFFFE,
+        0xEAFFFFFE,
+        0xE3A00000,
+        0xEE070F9A,
+        0xEE070F90,
+        0xE3A00000,
+        0xEAFFFFFE,
+        0xEAFFFFF1,
+};
+
+static const u32 ICONT_Boot_WFI_length = ARRAY_SIZE(ICONT_Boot_WFI);
+
+static void load_ivahd_idle_boot_code(void)
+{
+        int i;
+
+        icont_itcm_ptr = ioremap((u32) ICONT1_ITCM_BASE, 0x1000);
+        for (i = 0; i < ICONT_Boot_WFI_length; i++)
+                __raw_writel(ICONT_Boot_WFI[i], (icont_itcm_ptr + i));
+        iounmap(icont_itcm_ptr);
+
+        icont_itcm_ptr = ioremap((u32) ICONT2_ITCM_BASE, 0x1000);
+        for (i = 0; i < ICONT_Boot_WFI_length; i++)
+                __raw_writel(ICONT_Boot_WFI[i], (icont_itcm_ptr + i));
+        iounmap(icont_itcm_ptr);
+}
+EXPORT_SYMBOL(load_ivahd_idle_boot_code);
diff --git a/arch/arm/plat-omap/include/plat/ipu_dev.h b/arch/arm/plat-omap/include/plat/ipu_dev.h
new file mode 100644
index 00000000000..c7b7959c38b
--- /dev/null
+++ b/arch/arm/plat-omap/include/plat/ipu_dev.h
@@ -0,0 +1,107 @@
+/*
+ * OMAP IPU_PM driver
+ *
+ * Copyright (C) 2010 Texas Instruments Inc.
+ *
+ * Written by Paul Hunt <hunt@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+
+#ifndef IPU_PM_H
+#define IPU_PM_H
+
+#include <linux/ioctl.h>
+#include <linux/cdev.h>
+
+#include "../../../drivers/dsp/syslink/ipu_pm/ipu_pm.h"
+
+#define IPU_PM_IOC_MAGIC                (0xDB)
+
+/* magic char is irrelevant until trying to upstream
+ * except for reducing exposure to misdirected ioctls
+ * see Documentation/ioctl/ioctl-number.txt
+ */
+#define IPU_PM_IOC_SUSPEND      _IOW(IPU_PM_IOC_MAGIC, 0, int)
+#define IPU_PM_IOC_RESUME       _IOW(IPU_PM_IOC_MAGIC, 1, int)
+
+#define IPU_PM_IOC_MAXNR                3
+
+#define IPUPM_CAPS_START_BIT            0
+#define IPUPM_CAPS_STOP_BIT             1
+#define IPUPM_CAPS_PERF_BIT             2
+#define IPUPM_CAPS_LAT_BIT              3
+#define IPUPM_CAPS_BDW_BIT              4
+/* omap_device built elsewhere */
+#define IPUPM_CAPS_EXTINIT_BIT          5
+#define IPUPM_CAPS_START                (1 << IPUPM_CAPS_START_BIT)
+#define IPUPM_CAPS_STOP                 (1 << IPUPM_CAPS_STOP_BIT)
+#define IPUPM_CAPS_PERF                 (1 << IPUPM_CAPS_PERF_BIT)
+#define IPUPM_CAPS_LAT                  (1 << IPUPM_CAPS_LAT_BIT)
+#define IPUPM_CAPS_BDW                  (1 << IPUPM_CAPS_BDW_BIT)
+#define IPUPM_CAPS_EXTINIT              (1 << IPUPM_CAPS_EXTINIT_BIT)
+
+#define IPU_PM_SELF                     100
+#define IPU_PM_MPU                      101
+#define IPU_PM_CORE                     102
+
+struct omap_ipupm_mod;
+
+struct omap_ipupm_mod_ops {
+        int (*start)(enum res_type ipupm_modnum);
+        int (*stop)(enum res_type ipupm_modnum);
+};
+
+struct omap_ipupm_mod_platform_data {
+        struct platform_device *pdev;
+        struct device *dev;
+        char *name;
+        char *oh_name;
+        struct omap_hwmod *oh;
+        struct kobject kobj;
+        u32 caps;
+        struct pm_qos_request_list *qos_request;
+        struct omap_ipupm_mod_ops *ops;
+};
+
+struct omap_ipupm_mod {
+        struct device *dev;
+        struct cdev cdev;
+        atomic_t count;
+        int state;
+        int minor;
+};
+
+struct ipu_pm_dev {
+        /* FIXME: maybe more is needed */
+        struct cdev cdev;
+};
+
+extern int ipu_pm_first_dev;
+
+extern int ipu_pm_module_start(unsigned rsrc);
+extern int ipu_pm_module_stop(unsigned rsrc);
+extern int ipu_pm_module_set_rate(unsigned rsrc,
+                                  unsigned target_rsrc,
+                                  unsigned rate);
+extern int ipu_pm_module_set_latency(unsigned rsrc,
+                                     unsigned target_rsrc,
+                                     int latency);
+extern int ipu_pm_module_set_bandwidth(unsigned rsrc,
+                                       unsigned target_rsrc,
+                                       int bandwidth);
+
+#endif /* IPU_PM_H */