omap-hwmod: Add hwmod definitions for SysLink related devices

This patch adds hwmod definitions for all devices that are used/
requested by Syslink/ipu-pm.
The devices are:
		--sl2if iss ipu mailbox hwspinlock fdif

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Miguel Vadillo <vadillo@ti.com>
Signed-off-by: Simon Que <sque@ti.com>
Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>

3 files changed, 154 insertions, 3 deletions

diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index c07e0db479a..37d4effbb12 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -49,6 +49,7 @@ static struct omap_hwmod omap44xx_dmm_hwmod;
 static struct omap_hwmod omap44xx_dsp_hwmod;
 static struct omap_hwmod omap44xx_dss_hwmod;
 static struct omap_hwmod omap44xx_emif_fw_hwmod;
+static struct omap_hwmod omap44xx_fdif_hwmod;
 static struct omap_hwmod omap44xx_hsi_hwmod;
 static struct omap_hwmod omap44xx_ipu_hwmod;
 static struct omap_hwmod omap44xx_iss_hwmod;
@@ -65,6 +66,7 @@ static struct omap_hwmod omap44xx_l4_wkup_hwmod;
 static struct omap_hwmod omap44xx_mmc1_hwmod;
 static struct omap_hwmod omap44xx_mmc2_hwmod;
 static struct omap_hwmod omap44xx_mpu_hwmod;
+static struct omap_hwmod omap44xx_sl2if_hwmod;
 static struct omap_hwmod omap44xx_mpu_private_hwmod;
 static struct omap_hwmod omap44xx_usb_otg_hs_hwmod;
 
@@ -319,6 +321,14 @@ static struct omap_hwmod_ocp_if omap44xx_dma_system__l3_main_2 = {
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
+/* fdif -> l3_main_2 */
+static struct omap_hwmod_ocp_if omap44xx_fdif__l3_main_2 = {
+        .master         = &omap44xx_fdif_hwmod,
+        .slave          = &omap44xx_l3_main_2_hwmod,
+        .clk            = "l3_div_ck",
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
 /* hsi -> l3_main_2 */
 static struct omap_hwmod_ocp_if omap44xx_hsi__l3_main_2 = {
         .master         = &omap44xx_hsi_hwmod,
@@ -396,6 +406,7 @@ static struct omap_hwmod_ocp_if omap44xx_usb_otg_hs__l3_main_2 = {
 /* l3_main_2 slave ports */
 static struct omap_hwmod_ocp_if *omap44xx_l3_main_2_slaves[] = {
         &omap44xx_dma_system__l3_main_2,
+        &omap44xx_fdif__l3_main_2,
         &omap44xx_hsi__l3_main_2,
         &omap44xx_ipu__l3_main_2,
         &omap44xx_iss__l3_main_2,
@@ -639,7 +650,6 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod = {
  *  elm
  *  emif1
  *  emif2
- *  fdif
  *  gpmc
  *  gpu
  *  hdq1w
@@ -650,7 +660,6 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod = {
  *  prcm_mpu
  *  prm
  *  scrm
- *  sl2if
  *  slimbus1
  *  slimbus2
  *  usb_host_fs
@@ -1113,10 +1122,25 @@ static struct omap_hwmod_ocp_if omap44xx_dsp__iva = {
 };
 
 /* dsp master ports */
+/* dsp -> sl2if */
+static struct omap_hwmod_ocp_if omap44xx_dsp__sl2if = {
+        .master         = &omap44xx_dsp_hwmod,
+        .slave          = &omap44xx_sl2if_hwmod,
+        .clk            = "dpll_iva_m5x2_ck",
+};
+
 static struct omap_hwmod_ocp_if *omap44xx_dsp_masters[] = {
         &omap44xx_dsp__l3_main_1,
         &omap44xx_dsp__l4_abe,
         &omap44xx_dsp__iva,
+        &omap44xx_dsp__sl2if,
+};
+
+/* iva -> sl2if */
+static struct omap_hwmod_ocp_if omap44xx_iva__sl2if = {
+        .master         = &omap44xx_iva_hwmod,
+        .slave          = &omap44xx_sl2if_hwmod,
+        .clk            = "dpll_iva_m5x2_ck",
 };
 
 /* l4_cfg -> dsp */
@@ -1686,6 +1710,45 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = {
 };
 
 /*
+ * 'sl2if' class
+ * shared level 2 memory interface
+ */
+
+static struct omap_hwmod_class omap44xx_sl2if_hwmod_class = {
+        .name = "sl2if",
+};
+
+/* sl2if */
+/* l3_main_2 -> sl2if */
+static struct omap_hwmod_ocp_if omap44xx_l3_main_2__sl2if = {
+        .master         = &omap44xx_l3_main_2_hwmod,
+        .slave          = &omap44xx_sl2if_hwmod,
+        .clk            = "l3_div_ck",
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* sl2if slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_sl2if_slaves[] = {
+        &omap44xx_l3_main_2__sl2if,
+        &omap44xx_iva__sl2if,
+        &omap44xx_dsp__sl2if,
+};
+
+static struct omap_hwmod omap44xx_sl2if_hwmod = {
+        .name           = "sl2if",
+        .class          = &omap44xx_sl2if_hwmod_class,
+        .main_clk       = "sl2if_ick",
+        .prcm = {
+                .omap4 = {
+                        .clkctrl_reg = OMAP4430_CM_IVAHD_SL2_CLKCTRL,
+                },
+        },
+        .slaves         = omap44xx_sl2if_slaves,
+        .slaves_cnt     = ARRAY_SIZE(omap44xx_sl2if_slaves),
+        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/*
  * 'venc' class
  * video encoder
  */
@@ -2298,6 +2361,82 @@ static struct omap_hwmod_dma_info omap44xx_i2c1_sdma_reqs[] = {
         { .name = "rx", .dma_req = 27 + OMAP44XX_DMA_REQ_START },
 };
 
+/*
+ * 'fdif' class
+ * face detection hw accelerator module
+ */
+
+/* static struct omap_hwmod_class_sysconfig omap44xx_fdif_sysc = {
+ *      .rev_offs       = 0x0000,
+ *      .sysc_offs      = 0x0010,
+ *      .sysc_flags     = (SYSC_HAS_MIDLEMODE | SYSC_HAS_RESET_STATUS |
+ *                         SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
+ *      .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
+ *                         MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
+ *      .sysc_fields    = &omap_hwmod_sysc_type2,
+ *};
+ */
+
+static struct omap_hwmod_class omap44xx_fdif_hwmod_class = {
+        .name = "fdif",
+        /* .sysc = &omap44xx_fdif_sysc, */
+};
+
+/* fdif */
+static struct omap_hwmod_irq_info omap44xx_fdif_irqs[] = {
+        { .irq = 69 + OMAP44XX_IRQ_GIC_START },
+};
+
+/* fdif master ports */
+static struct omap_hwmod_ocp_if *omap44xx_fdif_masters[] = {
+        &omap44xx_fdif__l3_main_2,
+};
+
+static struct omap_hwmod_addr_space omap44xx_fdif_addrs[] = {
+        {
+                .pa_start       = 0x4a10a000,
+                .pa_end         = 0x4a10a1ff,
+                .flags          = ADDR_TYPE_RT
+        },
+};
+
+/* l4_cfg -> fdif */
+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__fdif = {
+        .master         = &omap44xx_l4_cfg_hwmod,
+        .slave          = &omap44xx_fdif_hwmod,
+        .clk            = "l4_div_ck",
+        .addr           = omap44xx_fdif_addrs,
+        .addr_cnt       = ARRAY_SIZE(omap44xx_fdif_addrs),
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* fdif slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_fdif_slaves[] = {
+        &omap44xx_l4_cfg__fdif,
+};
+
+static struct omap_hwmod omap44xx_fdif_hwmod = {
+        .name           = "fdif",
+        .class          = &omap44xx_fdif_hwmod_class,
+        .flags          = HWMOD_INIT_NO_RESET,
+        .mpu_irqs       = omap44xx_fdif_irqs,
+        .mpu_irqs_cnt   = ARRAY_SIZE(omap44xx_fdif_irqs),
+        .main_clk       = "fdif_fck",
+        .vdd_name       = "core",
+        .prcm = {
+                .omap4 = {
+                        .clkctrl_reg = OMAP4430_CM_CAM_FDIF_CLKCTRL,
+                },
+        },
+        .slaves         = omap44xx_fdif_slaves,
+        .slaves_cnt     = ARRAY_SIZE(omap44xx_fdif_slaves),
+        .masters        = omap44xx_fdif_masters,
+        .masters_cnt    = ARRAY_SIZE(omap44xx_fdif_masters),
+        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+
+
 static struct omap_hwmod_addr_space omap44xx_i2c1_addrs[] = {
         {
                 .pa_start       = 0x48070000,
@@ -2711,6 +2850,7 @@ static struct omap_hwmod_rst_info omap44xx_iva_seq1_resets[] = {
 
 /* iva master ports */
 static struct omap_hwmod_ocp_if *omap44xx_iva_masters[] = {
+        &omap44xx_iva__sl2if,
         &omap44xx_iva__l3_main_2,
         &omap44xx_iva__l3_instr,
 };
@@ -5239,6 +5379,9 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
         &omap44xx_dss_rfbi_hwmod,
         &omap44xx_dss_venc_hwmod,
 
+        /* fdif class */
+        &omap44xx_fdif_hwmod,
+
         /* gpio class */
         &omap443x_gpio1_hwmod,
         &omap446x_gpio1_hwmod,
@@ -5303,6 +5446,8 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
 
         /* mpu class */
         &omap44xx_mpu_hwmod,
+        /* sl2if class */
+        &omap44xx_sl2if_hwmod,
 
         /* smartreflex class */
         &omap44xx_smartreflex_core_hwmod,
diff --git a/arch/arm/plat-omap/include/plat/omap44xx.h b/arch/arm/plat-omap/include/plat/omap44xx.h
index 722c5b54a26..92cec5083b8 100644
--- a/arch/arm/plat-omap/include/plat/omap44xx.h
+++ b/arch/arm/plat-omap/include/plat/omap44xx.h
@@ -22,6 +22,9 @@
 #define L4_PER_44XX_BASE                0x48000000
 #define L4_EMU_44XX_BASE                0x54000000
 #define L3_44XX_BASE                    0x44000000
+#define L3_44XX_BASE_CLK1               L3_44XX_BASE
+#define L3_44XX_BASE_CLK2               0x44800000
+#define L3_44XX_BASE_CLK3               0x45000000
 #define OMAP44XX_EMIF1_BASE             0x4c000000
 #define OMAP44XX_EMIF2_BASE             0x4d000000
 #define OMAP44XX_DMM_BASE               0x4e000000
@@ -54,6 +57,7 @@
 #define OMAP4_MMU1_BASE                 0x55082000
 #define OMAP4_MMU2_BASE                 0x4A066000
 
+#define OMAP44XX_SPINLOCK_BASE          (L4_44XX_BASE + 0xF6000)
 #define OMAP44XX_USBTLL_BASE            (L4_44XX_BASE + 0x62000)
 #define OMAP44XX_UHH_CONFIG_BASE        (L4_44XX_BASE + 0x64000)
 #define OMAP44XX_HSUSB_OHCI_BASE        (L4_44XX_BASE + 0x64800)
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 1adea9c6298..5fa9b43e3e1 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -430,6 +430,7 @@ struct omap_hwmod_omap4_prcm {
 #define _HWMOD_STATE_ENABLED                    4
 #define _HWMOD_STATE_IDLE                       5
 #define _HWMOD_STATE_DISABLED                   6
+#define _HWMOD_STATE_LAST                       _HWMOD_STATE_DISABLED
 
 /**
  * struct omap_hwmod_class - the type of an IP block
@@ -459,7 +460,8 @@ struct omap_hwmod_class {
         const char                              *name;
         struct omap_hwmod_class_sysconfig       *sysc;
         u32                                     rev;
-        int                                     (*pre_shutdown)(struct omap_hwmod *oh);
+        int                                     (*pre_shutdown)
+                                                (struct omap_hwmod *oh);
         int                                     (*reset)(struct omap_hwmod *oh);
 };