diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-15 15:33:40 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-15 15:33:40 -0500 |
commit | 16c1020362083b320868c0deef492249089c3cd3 (patch) | |
tree | ff200df3502e6010745713275d69fd0a07e399cf /arch/arm/mach-netx/generic.c | |
parent | 65e5d002b5ad220db2bf9557f53de5a98f7dab86 (diff) | |
parent | bbba75606963c82febf7bd2761ea848ac5d1a1bb (diff) |
Merge branch 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm: (161 commits)
ARM: pxa: fix building issue of missing physmap.h
ARM: mmp: PXA910 drive strength FAST using wrong value
ARM: mmp: MMP2 drive strength FAST using wrong value
ARM: pxa: fix recursive calls in pxa_low_gpio_chip
AT91: Support for gsia18s board
AT91: Acme Systems FOX Board G20 board files
AT91: board-sam9m10g45ek.c: Remove duplicate inclusion of mach/hardware.h
ARM: pxa: fix suspend/resume array index miscalculation
ARM: pxa: use cpu_has_ipr() consistently in irq.c
ARM: pxa: remove unused variable in clock-pxa3xx.c
ARM: pxa: fix warning in zeus.c
ARM: sa1111: fix typo in sa1111_retrigger_lowirq()
ARM mxs: clkdev related compile fixes
ARM i.MX mx31_3ds: Fix MC13783 regulator names
ARM: plat-stmp3xxx: irq_data conversion.
ARM: plat-spear: irq_data conversion.
ARM: plat-orion: irq_data conversion.
ARM: plat-omap: irq_data conversion.
ARM: plat-nomadik: irq_data conversion.
ARM: plat-mxc: irq_data conversion.
...
Fix up trivial conflict in arch/arm/plat-omap/gpio.c (Lennert
Buytenhek's irq_data conversion clashing with some omap irq updates)
Diffstat (limited to 'arch/arm/mach-netx/generic.c')
-rw-r--r-- | arch/arm/mach-netx/generic.c | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c index 43da8bb4926..29ffa750fbe 100644 --- a/arch/arm/mach-netx/generic.c +++ b/arch/arm/mach-netx/generic.c | |||
@@ -88,13 +88,13 @@ netx_hif_demux_handler(unsigned int irq_unused, struct irq_desc *desc) | |||
88 | } | 88 | } |
89 | 89 | ||
90 | static int | 90 | static int |
91 | netx_hif_irq_type(unsigned int _irq, unsigned int type) | 91 | netx_hif_irq_type(struct irq_data *d, unsigned int type) |
92 | { | 92 | { |
93 | unsigned int val, irq; | 93 | unsigned int val, irq; |
94 | 94 | ||
95 | val = readl(NETX_DPMAS_IF_CONF1); | 95 | val = readl(NETX_DPMAS_IF_CONF1); |
96 | 96 | ||
97 | irq = _irq - NETX_IRQ_HIF_CHAINED(0); | 97 | irq = d->irq - NETX_IRQ_HIF_CHAINED(0); |
98 | 98 | ||
99 | if (type & IRQ_TYPE_EDGE_RISING) { | 99 | if (type & IRQ_TYPE_EDGE_RISING) { |
100 | DEBUG_IRQ("rising edges\n"); | 100 | DEBUG_IRQ("rising edges\n"); |
@@ -119,49 +119,49 @@ netx_hif_irq_type(unsigned int _irq, unsigned int type) | |||
119 | } | 119 | } |
120 | 120 | ||
121 | static void | 121 | static void |
122 | netx_hif_ack_irq(unsigned int _irq) | 122 | netx_hif_ack_irq(struct irq_data *d) |
123 | { | 123 | { |
124 | unsigned int val, irq; | 124 | unsigned int val, irq; |
125 | 125 | ||
126 | irq = _irq - NETX_IRQ_HIF_CHAINED(0); | 126 | irq = d->irq - NETX_IRQ_HIF_CHAINED(0); |
127 | writel((1 << 24) << irq, NETX_DPMAS_INT_STAT); | 127 | writel((1 << 24) << irq, NETX_DPMAS_INT_STAT); |
128 | 128 | ||
129 | val = readl(NETX_DPMAS_INT_EN); | 129 | val = readl(NETX_DPMAS_INT_EN); |
130 | val &= ~((1 << 24) << irq); | 130 | val &= ~((1 << 24) << irq); |
131 | writel(val, NETX_DPMAS_INT_EN); | 131 | writel(val, NETX_DPMAS_INT_EN); |
132 | 132 | ||
133 | DEBUG_IRQ("%s: irq %d\n", __func__, _irq); | 133 | DEBUG_IRQ("%s: irq %d\n", __func__, d->irq); |
134 | } | 134 | } |
135 | 135 | ||
136 | static void | 136 | static void |
137 | netx_hif_mask_irq(unsigned int _irq) | 137 | netx_hif_mask_irq(struct irq_data *d) |
138 | { | 138 | { |
139 | unsigned int val, irq; | 139 | unsigned int val, irq; |
140 | 140 | ||
141 | irq = _irq - NETX_IRQ_HIF_CHAINED(0); | 141 | irq = d->irq - NETX_IRQ_HIF_CHAINED(0); |
142 | val = readl(NETX_DPMAS_INT_EN); | 142 | val = readl(NETX_DPMAS_INT_EN); |
143 | val &= ~((1 << 24) << irq); | 143 | val &= ~((1 << 24) << irq); |
144 | writel(val, NETX_DPMAS_INT_EN); | 144 | writel(val, NETX_DPMAS_INT_EN); |
145 | DEBUG_IRQ("%s: irq %d\n", __func__, _irq); | 145 | DEBUG_IRQ("%s: irq %d\n", __func__, d->irq); |
146 | } | 146 | } |
147 | 147 | ||
148 | static void | 148 | static void |
149 | netx_hif_unmask_irq(unsigned int _irq) | 149 | netx_hif_unmask_irq(struct irq_data *d) |
150 | { | 150 | { |
151 | unsigned int val, irq; | 151 | unsigned int val, irq; |
152 | 152 | ||
153 | irq = _irq - NETX_IRQ_HIF_CHAINED(0); | 153 | irq = d->irq - NETX_IRQ_HIF_CHAINED(0); |
154 | val = readl(NETX_DPMAS_INT_EN); | 154 | val = readl(NETX_DPMAS_INT_EN); |
155 | val |= (1 << 24) << irq; | 155 | val |= (1 << 24) << irq; |
156 | writel(val, NETX_DPMAS_INT_EN); | 156 | writel(val, NETX_DPMAS_INT_EN); |
157 | DEBUG_IRQ("%s: irq %d\n", __func__, _irq); | 157 | DEBUG_IRQ("%s: irq %d\n", __func__, d->irq); |
158 | } | 158 | } |
159 | 159 | ||
160 | static struct irq_chip netx_hif_chip = { | 160 | static struct irq_chip netx_hif_chip = { |
161 | .ack = netx_hif_ack_irq, | 161 | .irq_ack = netx_hif_ack_irq, |
162 | .mask = netx_hif_mask_irq, | 162 | .irq_mask = netx_hif_mask_irq, |
163 | .unmask = netx_hif_unmask_irq, | 163 | .irq_unmask = netx_hif_unmask_irq, |
164 | .set_type = netx_hif_irq_type, | 164 | .irq_set_type = netx_hif_irq_type, |
165 | }; | 165 | }; |
166 | 166 | ||
167 | void __init netx_init_irq(void) | 167 | void __init netx_init_irq(void) |