OMAP4460: L2X0: Temporary work-around for stability.

OMAP4460 ES1.0 seems to suffer from stability with L2 cache enabled.
The root-cause analysis is ongoing but in meantime this chabe is
to enable a software WA with L2 cache enabled build. The WA consist
of locking certain cache ways based on their positions on the
physical memory layout.

Downside of this WA is that effective L2 cache size will be 512 KB
instead of 1 MB.

Of course this is temporary WA and needs to removed once the root
cause and the right fix is found.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>

1 files changed, 4 insertions, 2 deletions

diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h
index bfa706ffd96..f5ef5fc2092 100644
--- a/arch/arm/include/asm/hardware/cache-l2x0.h
+++ b/arch/arm/include/asm/hardware/cache-l2x0.h
@@ -45,8 +45,10 @@
 #define L2X0_CLEAN_INV_LINE_PA          0x7F0
 #define L2X0_CLEAN_INV_LINE_IDX         0x7F8
 #define L2X0_CLEAN_INV_WAY              0x7FC
-#define L2X0_LOCKDOWN_WAY_D             0x900
-#define L2X0_LOCKDOWN_WAY_I             0x904
+#define L2X0_LOCKDOWN_WAY_D0            0x900
+#define L2X0_LOCKDOWN_WAY_D1            0x908
+#define L2X0_LOCKDOWN_WAY_I0            0x904
+#define L2X0_LOCKDOWN_WAY_I1            0x90C
 #define L2X0_TEST_OPERATION             0xF00
 #define L2X0_LINE_DATA                  0xF10
 #define L2X0_LINE_TAG                   0xF30