diff options
| author | Thomas Gleixner <tglx@linutronix.de> | 2011-02-06 09:32:23 -0500 |
|---|---|---|
| committer | Matt Turner <mattst88@gmail.com> | 2011-03-02 14:57:55 -0500 |
| commit | 592924c7741377790866ee4bd7e6f214b1aeaade (patch) | |
| tree | 82cf8ce567a3b7fbe7f1ba0279dc3a74005b1d2b /arch/alpha | |
| parent | 0c7a720bd1c9059fe7b869bc5feeba738d6ce799 (diff) | |
alpha: Pyxis convert irq_chip functions
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Matt Turner <mattst88@gmail.com>
Diffstat (limited to 'arch/alpha')
| -rw-r--r-- | arch/alpha/kernel/irq_pyxis.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/alpha/kernel/irq_pyxis.c b/arch/alpha/kernel/irq_pyxis.c index 2863458c853..b30227fa7f5 100644 --- a/arch/alpha/kernel/irq_pyxis.c +++ b/arch/alpha/kernel/irq_pyxis.c | |||
| @@ -29,21 +29,21 @@ pyxis_update_irq_hw(unsigned long mask) | |||
| 29 | } | 29 | } |
| 30 | 30 | ||
| 31 | static inline void | 31 | static inline void |
| 32 | pyxis_enable_irq(unsigned int irq) | 32 | pyxis_enable_irq(struct irq_data *d) |
| 33 | { | 33 | { |
| 34 | pyxis_update_irq_hw(cached_irq_mask |= 1UL << (irq - 16)); | 34 | pyxis_update_irq_hw(cached_irq_mask |= 1UL << (d->irq - 16)); |
| 35 | } | 35 | } |
| 36 | 36 | ||
| 37 | static void | 37 | static void |
| 38 | pyxis_disable_irq(unsigned int irq) | 38 | pyxis_disable_irq(struct irq_data *d) |
| 39 | { | 39 | { |
| 40 | pyxis_update_irq_hw(cached_irq_mask &= ~(1UL << (irq - 16))); | 40 | pyxis_update_irq_hw(cached_irq_mask &= ~(1UL << (d->irq - 16))); |
| 41 | } | 41 | } |
| 42 | 42 | ||
| 43 | static void | 43 | static void |
| 44 | pyxis_mask_and_ack_irq(unsigned int irq) | 44 | pyxis_mask_and_ack_irq(struct irq_data *d) |
| 45 | { | 45 | { |
| 46 | unsigned long bit = 1UL << (irq - 16); | 46 | unsigned long bit = 1UL << (d->irq - 16); |
| 47 | unsigned long mask = cached_irq_mask &= ~bit; | 47 | unsigned long mask = cached_irq_mask &= ~bit; |
| 48 | 48 | ||
| 49 | /* Disable the interrupt. */ | 49 | /* Disable the interrupt. */ |
| @@ -58,9 +58,9 @@ pyxis_mask_and_ack_irq(unsigned int irq) | |||
| 58 | 58 | ||
| 59 | static struct irq_chip pyxis_irq_type = { | 59 | static struct irq_chip pyxis_irq_type = { |
| 60 | .name = "PYXIS", | 60 | .name = "PYXIS", |
| 61 | .mask_ack = pyxis_mask_and_ack_irq, | 61 | .irq_mask_ack = pyxis_mask_and_ack_irq, |
| 62 | .mask = pyxis_disable_irq, | 62 | .irq_mask = pyxis_disable_irq, |
| 63 | .unmask = pyxis_enable_irq, | 63 | .irq_unmask = pyxis_enable_irq, |
| 64 | }; | 64 | }; |
| 65 | 65 | ||
| 66 | void | 66 | void |
| @@ -103,7 +103,7 @@ init_pyxis_irqs(unsigned long ignore_mask) | |||
| 103 | if ((ignore_mask >> i) & 1) | 103 | if ((ignore_mask >> i) & 1) |
| 104 | continue; | 104 | continue; |
| 105 | set_irq_chip_and_handler(i, &pyxis_irq_type, handle_level_irq); | 105 | set_irq_chip_and_handler(i, &pyxis_irq_type, handle_level_irq); |
| 106 | irq_to_desc(i)->status |= IRQ_LEVEL; | 106 | irq_set_status_flags(i, IRQ_LEVEL); |
| 107 | } | 107 | } |
| 108 | 108 | ||
| 109 | setup_irq(16+7, &isa_cascade_irqaction); | 109 | setup_irq(16+7, &isa_cascade_irqaction); |
