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authorWu Zhangjin <wuzhangjin@gmail.com>2009-11-22 21:28:24 -0500
committerGreg Kroah-Hartman <gregkh@suse.de>2009-12-23 14:27:44 -0500
commitd7edf47947f9d921be6ca5fc8e83049124466f98 (patch)
treea3147efcb4fa14252ace21f139769fa7c07d5e85
parent193cb93e5a5f32c0520eed17e87135d20594d1e1 (diff)
Staging: sm7xx: add a new framebuffer driver
Yeeloong netbook has a sm712 video card, need this driver, but it is not ready to upstream yet, so, go to drivers/staing at first. This source code is originally from Silicon Motion Technology Corp, and maintained at http://dev.lemote.com/code/linux_loongson for YeeLoong netbook. I have done a lot of cleanups for it and merged it into my git repository at http://dev.lemote.com/code/rt4ls. Thanks to Simon for testing it on a little-endian x86 platform. Thanks to Olivier Croset <olivier.croset@actis-computer.com> for reporting the problem about __BIG_ENDIAN compiling problem and send a relative patch. The suspend/resume and blank support are contributed by Jason from Silicon Motion Technology. Tested-by: Simon Braunschmidt <sbraun@emlix.com> Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat
-rw-r--r--drivers/staging/Kconfig2
-rw-r--r--drivers/staging/Makefile1
-rw-r--r--drivers/staging/sm7xx/Kconfig15
-rw-r--r--drivers/staging/sm7xx/Makefile3
-rw-r--r--drivers/staging/sm7xx/TODO10
-rw-r--r--drivers/staging/sm7xx/smtc2d.c979
-rw-r--r--drivers/staging/sm7xx/smtc2d.h530
-rw-r--r--drivers/staging/sm7xx/smtcfb.c1253
-rw-r--r--drivers/staging/sm7xx/smtcfb.h793
9 files changed, 3586 insertions, 0 deletions
diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig
index 093f57af32d..db0de940949 100644
--- a/drivers/staging/Kconfig
+++ b/drivers/staging/Kconfig
@@ -145,5 +145,7 @@ source "drivers/staging/wavelan/Kconfig"
145 145
146source "drivers/staging/netwave/Kconfig" 146source "drivers/staging/netwave/Kconfig"
147 147
148source "drivers/staging/sm7xx/Kconfig"
149
148endif # !STAGING_EXCLUDE_BUILD 150endif # !STAGING_EXCLUDE_BUILD
149endif # STAGING 151endif # STAGING
diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile
index 069864f4391..73c6a71155e 100644
--- a/drivers/staging/Makefile
+++ b/drivers/staging/Makefile
@@ -53,3 +53,4 @@ obj-$(CONFIG_ARLAN) += arlan/
53obj-$(CONFIG_WAVELAN) += wavelan/ 53obj-$(CONFIG_WAVELAN) += wavelan/
54obj-$(CONFIG_PCMCIA_WAVELAN) += wavelan/ 54obj-$(CONFIG_PCMCIA_WAVELAN) += wavelan/
55obj-$(CONFIG_PCMCIA_NETWAVE) += netwave/ 55obj-$(CONFIG_PCMCIA_NETWAVE) += netwave/
56obj-$(CONFIG_FB_SM7XX) += sm7xx/
diff --git a/drivers/staging/sm7xx/Kconfig b/drivers/staging/sm7xx/Kconfig
new file mode 100644
index 00000000000..204dbfc3c38
--- /dev/null
+++ b/drivers/staging/sm7xx/Kconfig
@@ -0,0 +1,15 @@
1config FB_SM7XX
2 tristate "Silicon Motion SM7XX Frame Buffer Support"
3 depends on FB
4 select FB_CFB_FILLRECT
5 select FB_CFB_COPYAREA
6 select FB_CFB_IMAGEBLIT
7 help
8 Frame Buffer driver for the Silicon Motion SM7XX serial graphic card.
9
10config FB_SM7XX_ACCEL
11 bool "Siliconmotion Acceleration functions (EXPERIMENTAL)"
12 depends on FB_SM7XX && EXPERIMENTAL
13 help
14 This will compile the Trident frame buffer device with
15 acceleration functions.
diff --git a/drivers/staging/sm7xx/Makefile b/drivers/staging/sm7xx/Makefile
new file mode 100644
index 00000000000..f43cb910630
--- /dev/null
+++ b/drivers/staging/sm7xx/Makefile
@@ -0,0 +1,3 @@
1obj-$(CONFIG_FB_SM7XX) += sm7xx.o
2
3sm7xx-y := smtcfb.o
diff --git a/drivers/staging/sm7xx/TODO b/drivers/staging/sm7xx/TODO
new file mode 100644
index 00000000000..1f61f5e11cf
--- /dev/null
+++ b/drivers/staging/sm7xx/TODO
@@ -0,0 +1,10 @@
1TODO:
2- Dual head support
3- use kernel coding style
4- checkpatch.pl clean
5- refine the code and remove unused code
6- use kernel framebuffer mode setting instead of hard code
7- move it to drivers/video/sm7xx/ or make it be drivers/video/sm7xxfb.c
8
9Please send any patches to Greg Kroah-Hartman <greg@kroah.com> and
10Teddy Wang <teddy.wang@siliconmotion.com.cn>.
diff --git a/drivers/staging/sm7xx/smtc2d.c b/drivers/staging/sm7xx/smtc2d.c
new file mode 100644
index 00000000000..133b86c6a67
--- /dev/null
+++ b/drivers/staging/sm7xx/smtc2d.c
@@ -0,0 +1,979 @@
1/*
2 * Silicon Motion SM7XX 2D drawing engine functions.
3 *
4 * Copyright (C) 2006 Silicon Motion Technology Corp.
5 * Author: Boyod boyod.yang@siliconmotion.com.cn
6 *
7 * Copyright (C) 2009 Lemote, Inc.
8 * Author: Wu Zhangjin, wuzj@lemote.com
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file COPYING in the main directory of this archive for
12 * more details.
13 *
14 * Version 0.10.26192.21.01
15 * - Add PowerPC support
16 * - Add 2D support for Lynx -
17 * Verified on 2.6.19.2
18 * Boyod.yang <boyod.yang@siliconmotion.com.cn>
19 */
20
21unsigned char smtc_de_busy;
22
23void SMTC_write2Dreg(unsigned long nOffset, unsigned long nData)
24{
25 writel(nData, smtc_2DBaseAddress + nOffset);
26}
27
28unsigned long SMTC_read2Dreg(unsigned long nOffset)
29{
30 return readl(smtc_2DBaseAddress + nOffset);
31}
32
33void SMTC_write2Ddataport(unsigned long nOffset, unsigned long nData)
34{
35 writel(nData, smtc_2Ddataport + nOffset);
36}
37
38/**********************************************************************
39 *
40 * deInit
41 *
42 * Purpose
43 * Drawing engine initialization.
44 *
45 **********************************************************************/
46
47void deInit(unsigned int nModeWidth, unsigned int nModeHeight,
48 unsigned int bpp)
49{
50 /* Get current power configuration. */
51 unsigned char clock;
52 clock = smtc_seqr(0x21);
53
54 /* initialize global 'mutex lock' variable */
55 smtc_de_busy = 0;
56
57 /* Enable 2D Drawing Engine */
58 smtc_seqw(0x21, clock & 0xF8);
59
60 SMTC_write2Dreg(DE_CLIP_TL,
61 FIELD_VALUE(0, DE_CLIP_TL, TOP, 0) |
62 FIELD_SET(0, DE_CLIP_TL, STATUS, DISABLE) |
63 FIELD_SET(0, DE_CLIP_TL, INHIBIT, OUTSIDE) |
64 FIELD_VALUE(0, DE_CLIP_TL, LEFT, 0));
65
66 if (bpp >= 24) {
67 SMTC_write2Dreg(DE_PITCH,
68 FIELD_VALUE(0, DE_PITCH, DESTINATION,
69 nModeWidth * 3) | FIELD_VALUE(0,
70 DE_PITCH,
71 SOURCE,
72 nModeWidth
73 * 3));
74 } else {
75 SMTC_write2Dreg(DE_PITCH,
76 FIELD_VALUE(0, DE_PITCH, DESTINATION,
77 nModeWidth) | FIELD_VALUE(0,
78 DE_PITCH,
79 SOURCE,
80 nModeWidth));
81 }
82
83 SMTC_write2Dreg(DE_WINDOW_WIDTH,
84 FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
85 nModeWidth) | FIELD_VALUE(0,
86 DE_WINDOW_WIDTH,
87 SOURCE,
88 nModeWidth));
89
90 switch (bpp) {
91 case 8:
92 SMTC_write2Dreg(DE_STRETCH_FORMAT,
93 FIELD_SET(0, DE_STRETCH_FORMAT, PATTERN_XY,
94 NORMAL) | FIELD_VALUE(0,
95 DE_STRETCH_FORMAT,
96 PATTERN_Y,
97 0) |
98 FIELD_VALUE(0, DE_STRETCH_FORMAT, PATTERN_X,
99 0) | FIELD_SET(0, DE_STRETCH_FORMAT,
100 PIXEL_FORMAT,
101 8) | FIELD_SET(0,
102 DE_STRETCH_FORMAT,
103 ADDRESSING,
104 XY) |
105 FIELD_VALUE(0, DE_STRETCH_FORMAT,
106 SOURCE_HEIGHT, 3));
107 break;
108 case 24:
109 SMTC_write2Dreg(DE_STRETCH_FORMAT,
110 FIELD_SET(0, DE_STRETCH_FORMAT, PATTERN_XY,
111 NORMAL) | FIELD_VALUE(0,
112 DE_STRETCH_FORMAT,
113 PATTERN_Y,
114 0) |
115 FIELD_VALUE(0, DE_STRETCH_FORMAT, PATTERN_X,
116 0) | FIELD_SET(0, DE_STRETCH_FORMAT,
117 PIXEL_FORMAT,
118 24) | FIELD_SET(0,
119 DE_STRETCH_FORMAT,
120 ADDRESSING,
121 XY) |
122 FIELD_VALUE(0, DE_STRETCH_FORMAT,
123 SOURCE_HEIGHT, 3));
124 break;
125 case 16:
126 default:
127 SMTC_write2Dreg(DE_STRETCH_FORMAT,
128 FIELD_SET(0, DE_STRETCH_FORMAT, PATTERN_XY,
129 NORMAL) | FIELD_VALUE(0,
130 DE_STRETCH_FORMAT,
131 PATTERN_Y,
132 0) |
133 FIELD_VALUE(0, DE_STRETCH_FORMAT, PATTERN_X,
134 0) | FIELD_SET(0, DE_STRETCH_FORMAT,
135 PIXEL_FORMAT,
136 16) | FIELD_SET(0,
137 DE_STRETCH_FORMAT,
138 ADDRESSING,
139 XY) |
140 FIELD_VALUE(0, DE_STRETCH_FORMAT,
141 SOURCE_HEIGHT, 3));
142 break;
143 }
144
145 SMTC_write2Dreg(DE_MASKS,
146 FIELD_VALUE(0, DE_MASKS, BYTE_MASK, 0xFFFF) |
147 FIELD_VALUE(0, DE_MASKS, BIT_MASK, 0xFFFF));
148 SMTC_write2Dreg(DE_COLOR_COMPARE_MASK,
149 FIELD_VALUE(0, DE_COLOR_COMPARE_MASK, MASKS, \
150 0xFFFFFF));
151 SMTC_write2Dreg(DE_COLOR_COMPARE,
152 FIELD_VALUE(0, DE_COLOR_COMPARE, COLOR, 0xFFFFFF));
153}
154
155void deVerticalLine(unsigned long dst_base,
156 unsigned long dst_pitch,
157 unsigned long nX,
158 unsigned long nY,
159 unsigned long dst_height, unsigned long nColor)
160{
161 deWaitForNotBusy();
162
163 SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE,
164 FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS,
165 dst_base));
166
167 SMTC_write2Dreg(DE_PITCH,
168 FIELD_VALUE(0, DE_PITCH, DESTINATION, dst_pitch) |
169 FIELD_VALUE(0, DE_PITCH, SOURCE, dst_pitch));
170
171 SMTC_write2Dreg(DE_WINDOW_WIDTH,
172 FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
173 dst_pitch) | FIELD_VALUE(0, DE_WINDOW_WIDTH,
174 SOURCE,
175 dst_pitch));
176
177 SMTC_write2Dreg(DE_FOREGROUND,
178 FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor));
179
180 SMTC_write2Dreg(DE_DESTINATION,
181 FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) |
182 FIELD_VALUE(0, DE_DESTINATION, X, nX) |
183 FIELD_VALUE(0, DE_DESTINATION, Y, nY));
184
185 SMTC_write2Dreg(DE_DIMENSION,
186 FIELD_VALUE(0, DE_DIMENSION, X, 1) |
187 FIELD_VALUE(0, DE_DIMENSION, Y_ET, dst_height));
188
189 SMTC_write2Dreg(DE_CONTROL,
190 FIELD_SET(0, DE_CONTROL, STATUS, START) |
191 FIELD_SET(0, DE_CONTROL, DIRECTION, LEFT_TO_RIGHT) |
192 FIELD_SET(0, DE_CONTROL, MAJOR, Y) |
193 FIELD_SET(0, DE_CONTROL, STEP_X, NEGATIVE) |
194 FIELD_SET(0, DE_CONTROL, STEP_Y, POSITIVE) |
195 FIELD_SET(0, DE_CONTROL, LAST_PIXEL, OFF) |
196 FIELD_SET(0, DE_CONTROL, COMMAND, SHORT_STROKE) |
197 FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
198 FIELD_VALUE(0, DE_CONTROL, ROP, 0x0C));
199
200 smtc_de_busy = 1;
201}
202
203void deHorizontalLine(unsigned long dst_base,
204 unsigned long dst_pitch,
205 unsigned long nX,
206 unsigned long nY,
207 unsigned long dst_width, unsigned long nColor)
208{
209 deWaitForNotBusy();
210
211 SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE,
212 FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS,
213 dst_base));
214
215 SMTC_write2Dreg(DE_PITCH,
216 FIELD_VALUE(0, DE_PITCH, DESTINATION, dst_pitch) |
217 FIELD_VALUE(0, DE_PITCH, SOURCE, dst_pitch));
218
219 SMTC_write2Dreg(DE_WINDOW_WIDTH,
220 FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
221 dst_pitch) | FIELD_VALUE(0, DE_WINDOW_WIDTH,
222 SOURCE,
223 dst_pitch));
224 SMTC_write2Dreg(DE_FOREGROUND,
225 FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor));
226 SMTC_write2Dreg(DE_DESTINATION,
227 FIELD_SET(0, DE_DESTINATION, WRAP,
228 DISABLE) | FIELD_VALUE(0, DE_DESTINATION, X,
229 nX) | FIELD_VALUE(0,
230 DE_DESTINATION,
231 Y,
232 nY));
233 SMTC_write2Dreg(DE_DIMENSION,
234 FIELD_VALUE(0, DE_DIMENSION, X,
235 dst_width) | FIELD_VALUE(0, DE_DIMENSION,
236 Y_ET, 1));
237 SMTC_write2Dreg(DE_CONTROL,
238 FIELD_SET(0, DE_CONTROL, STATUS, START) | FIELD_SET(0,
239 DE_CONTROL,
240 DIRECTION,
241 RIGHT_TO_LEFT)
242 | FIELD_SET(0, DE_CONTROL, MAJOR, X) | FIELD_SET(0,
243 DE_CONTROL,
244 STEP_X,
245 POSITIVE)
246 | FIELD_SET(0, DE_CONTROL, STEP_Y,
247 NEGATIVE) | FIELD_SET(0, DE_CONTROL,
248 LAST_PIXEL,
249 OFF) | FIELD_SET(0,
250 DE_CONTROL,
251 COMMAND,
252 SHORT_STROKE)
253 | FIELD_SET(0, DE_CONTROL, ROP_SELECT,
254 ROP2) | FIELD_VALUE(0, DE_CONTROL, ROP,
255 0x0C));
256
257 smtc_de_busy = 1;
258}
259
260void deLine(unsigned long dst_base,
261 unsigned long dst_pitch,
262 unsigned long nX1,
263 unsigned long nY1,
264 unsigned long nX2, unsigned long nY2, unsigned long nColor)
265{
266 unsigned long nCommand =
267 FIELD_SET(0, DE_CONTROL, STATUS, START) |
268 FIELD_SET(0, DE_CONTROL, DIRECTION, LEFT_TO_RIGHT) |
269 FIELD_SET(0, DE_CONTROL, MAJOR, X) |
270 FIELD_SET(0, DE_CONTROL, STEP_X, POSITIVE) |
271 FIELD_SET(0, DE_CONTROL, STEP_Y, POSITIVE) |
272 FIELD_SET(0, DE_CONTROL, LAST_PIXEL, OFF) |
273 FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
274 FIELD_VALUE(0, DE_CONTROL, ROP, 0x0C);
275 unsigned long DeltaX;
276 unsigned long DeltaY;
277
278 /* Calculate delta X */
279 if (nX1 <= nX2)
280 DeltaX = nX2 - nX1;
281 else {
282 DeltaX = nX1 - nX2;
283 nCommand = FIELD_SET(nCommand, DE_CONTROL, STEP_X, NEGATIVE);
284 }
285
286 /* Calculate delta Y */
287 if (nY1 <= nY2)
288 DeltaY = nY2 - nY1;
289 else {
290 DeltaY = nY1 - nY2;
291 nCommand = FIELD_SET(nCommand, DE_CONTROL, STEP_Y, NEGATIVE);
292 }
293
294 /* Determine the major axis */
295 if (DeltaX < DeltaY)
296 nCommand = FIELD_SET(nCommand, DE_CONTROL, MAJOR, Y);
297
298 /* Vertical line? */
299 if (nX1 == nX2)
300 deVerticalLine(dst_base, dst_pitch, nX1, nY1, DeltaY, nColor);
301
302 /* Horizontal line? */
303 else if (nY1 == nY2)
304 deHorizontalLine(dst_base, dst_pitch, nX1, nY1, \
305 DeltaX, nColor);
306
307 /* Diagonal line? */
308 else if (DeltaX == DeltaY) {
309 deWaitForNotBusy();
310
311 SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE,
312 FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE,
313 ADDRESS, dst_base));
314
315 SMTC_write2Dreg(DE_PITCH,
316 FIELD_VALUE(0, DE_PITCH, DESTINATION,
317 dst_pitch) | FIELD_VALUE(0,
318 DE_PITCH,
319 SOURCE,
320 dst_pitch));
321
322 SMTC_write2Dreg(DE_WINDOW_WIDTH,
323 FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
324 dst_pitch) | FIELD_VALUE(0,
325 DE_WINDOW_WIDTH,
326 SOURCE,
327 dst_pitch));
328
329 SMTC_write2Dreg(DE_FOREGROUND,
330 FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor));
331
332 SMTC_write2Dreg(DE_DESTINATION,
333 FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) |
334 FIELD_VALUE(0, DE_DESTINATION, X, 1) |
335 FIELD_VALUE(0, DE_DESTINATION, Y, nY1));
336
337 SMTC_write2Dreg(DE_DIMENSION,
338 FIELD_VALUE(0, DE_DIMENSION, X, 1) |
339 FIELD_VALUE(0, DE_DIMENSION, Y_ET, DeltaX));
340
341 SMTC_write2Dreg(DE_CONTROL,
342 FIELD_SET(nCommand, DE_CONTROL, COMMAND,
343 SHORT_STROKE));
344 }
345
346 /* Generic line */
347 else {
348 unsigned int k1, k2, et, w;
349 if (DeltaX < DeltaY) {
350 k1 = 2 * DeltaX;
351 et = k1 - DeltaY;
352 k2 = et - DeltaY;
353 w = DeltaY + 1;
354 } else {
355 k1 = 2 * DeltaY;
356 et = k1 - DeltaX;
357 k2 = et - DeltaX;
358 w = DeltaX + 1;
359 }
360
361 deWaitForNotBusy();
362
363 SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE,
364 FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE,
365 ADDRESS, dst_base));
366
367 SMTC_write2Dreg(DE_PITCH,
368 FIELD_VALUE(0, DE_PITCH, DESTINATION,
369 dst_pitch) | FIELD_VALUE(0,
370 DE_PITCH,
371 SOURCE,
372 dst_pitch));
373
374 SMTC_write2Dreg(DE_WINDOW_WIDTH,
375 FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
376 dst_pitch) | FIELD_VALUE(0,
377 DE_WINDOW_WIDTH,
378 SOURCE,
379 dst_pitch));
380
381 SMTC_write2Dreg(DE_FOREGROUND,
382 FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor));
383
384 SMTC_write2Dreg(DE_SOURCE,
385 FIELD_SET(0, DE_SOURCE, WRAP, DISABLE) |
386 FIELD_VALUE(0, DE_SOURCE, X_K1, k1) |
387 FIELD_VALUE(0, DE_SOURCE, Y_K2, k2));
388
389 SMTC_write2Dreg(DE_DESTINATION,
390 FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) |
391 FIELD_VALUE(0, DE_DESTINATION, X, nX1) |
392 FIELD_VALUE(0, DE_DESTINATION, Y, nY1));
393
394 SMTC_write2Dreg(DE_DIMENSION,
395 FIELD_VALUE(0, DE_DIMENSION, X, w) |
396 FIELD_VALUE(0, DE_DIMENSION, Y_ET, et));
397
398 SMTC_write2Dreg(DE_CONTROL,
399 FIELD_SET(nCommand, DE_CONTROL, COMMAND,
400 LINE_DRAW));
401 }
402
403 smtc_de_busy = 1;
404}
405
406void deFillRect(unsigned long dst_base,
407 unsigned long dst_pitch,
408 unsigned long dst_X,
409 unsigned long dst_Y,
410 unsigned long dst_width,
411 unsigned long dst_height, unsigned long nColor)
412{
413 deWaitForNotBusy();
414
415 SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE,
416 FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS,
417 dst_base));
418
419 if (dst_pitch) {
420 SMTC_write2Dreg(DE_PITCH,
421 FIELD_VALUE(0, DE_PITCH, DESTINATION,
422 dst_pitch) | FIELD_VALUE(0,
423 DE_PITCH,
424 SOURCE,
425 dst_pitch));
426
427 SMTC_write2Dreg(DE_WINDOW_WIDTH,
428 FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
429 dst_pitch) | FIELD_VALUE(0,
430 DE_WINDOW_WIDTH,
431 SOURCE,
432 dst_pitch));
433 }
434
435 SMTC_write2Dreg(DE_FOREGROUND,
436 FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor));
437
438 SMTC_write2Dreg(DE_DESTINATION,
439 FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) |
440 FIELD_VALUE(0, DE_DESTINATION, X, dst_X) |
441 FIELD_VALUE(0, DE_DESTINATION, Y, dst_Y));
442
443 SMTC_write2Dreg(DE_DIMENSION,
444 FIELD_VALUE(0, DE_DIMENSION, X, dst_width) |
445 FIELD_VALUE(0, DE_DIMENSION, Y_ET, dst_height));
446
447 SMTC_write2Dreg(DE_CONTROL,
448 FIELD_SET(0, DE_CONTROL, STATUS, START) |
449 FIELD_SET(0, DE_CONTROL, DIRECTION, LEFT_TO_RIGHT) |
450 FIELD_SET(0, DE_CONTROL, LAST_PIXEL, OFF) |
451 FIELD_SET(0, DE_CONTROL, COMMAND, RECTANGLE_FILL) |
452 FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
453 FIELD_VALUE(0, DE_CONTROL, ROP, 0x0C));
454
455 smtc_de_busy = 1;
456}
457
458/**********************************************************************
459 *
460 * deRotatePattern
461 *
462 * Purpose
463 * Rotate the given pattern if necessary
464 *
465 * Parameters
466 * [in]
467 * pPattern - Pointer to DE_SURFACE structure containing
468 * pattern attributes
469 * patternX - X position (0-7) of pattern origin
470 * patternY - Y position (0-7) of pattern origin
471 *
472 * [out]
473 * pattern_dstaddr - Pointer to pre-allocated buffer containing
474 * rotated pattern
475 *
476 **********************************************************************/
477void deRotatePattern(unsigned char *pattern_dstaddr,
478 unsigned long pattern_src_addr,
479 unsigned long pattern_BPP,
480 unsigned long pattern_stride, int patternX, int patternY)
481{
482 unsigned int i;
483 unsigned long pattern[PATTERN_WIDTH * PATTERN_HEIGHT];
484 unsigned int x, y;
485 unsigned char *pjPatByte;
486
487 if (pattern_dstaddr != NULL) {
488 deWaitForNotBusy();
489
490 if (patternX || patternY) {
491 /* Rotate pattern */
492 pjPatByte = (unsigned char *)pattern;
493
494 switch (pattern_BPP) {
495 case 8:
496 {
497 for (y = 0; y < 8; y++) {
498 unsigned char *pjBuffer =
499 pattern_dstaddr +
500 ((patternY + y) & 7) * 8;
501 for (x = 0; x < 8; x++) {
502 pjBuffer[(patternX +
503 x) & 7] =
504 pjPatByte[x];
505 }
506 pjPatByte += pattern_stride;
507 }
508 break;
509 }
510
511 case 16:
512 {
513 for (y = 0; y < 8; y++) {
514 unsigned short *pjBuffer =
515 (unsigned short *)
516 pattern_dstaddr +
517 ((patternY + y) & 7) * 8;
518 for (x = 0; x < 8; x++) {
519 pjBuffer[(patternX +
520 x) & 7] =
521 ((unsigned short *)
522 pjPatByte)[x];
523 }
524 pjPatByte += pattern_stride;
525 }
526 break;
527 }
528
529 case 32:
530 {
531 for (y = 0; y < 8; y++) {
532 unsigned long *pjBuffer =
533 (unsigned long *)
534 pattern_dstaddr +
535 ((patternY + y) & 7) * 8;
536 for (x = 0; x < 8; x++) {
537 pjBuffer[(patternX +
538 x) & 7] =
539 ((unsigned long *)
540 pjPatByte)[x];
541 }
542 pjPatByte += pattern_stride;
543 }
544 break;
545 }
546 }
547 } else {
548 /*Don't rotate,just copy pattern into pattern_dstaddr*/
549 for (i = 0; i < (pattern_BPP * 2); i++) {
550 ((unsigned long *)pattern_dstaddr)[i] =
551 pattern[i];
552 }
553 }
554
555 }
556}
557
558/**********************************************************************
559 *
560 * deCopy
561 *
562 * Purpose
563 * Copy a rectangular area of the source surface to a destination surface
564 *
565 * Remarks
566 * Source bitmap must have the same color depth (BPP) as the destination
567 * bitmap.
568 *
569**********************************************************************/
570void deCopy(unsigned long dst_base,
571 unsigned long dst_pitch,
572 unsigned long dst_BPP,
573 unsigned long dst_X,
574 unsigned long dst_Y,
575 unsigned long dst_width,
576 unsigned long dst_height,
577 unsigned long src_base,
578 unsigned long src_pitch,
579 unsigned long src_X,
580 unsigned long src_Y, pTransparent pTransp, unsigned char nROP2)
581{
582 unsigned long nDirection = 0;
583 unsigned long nTransparent = 0;
584 /* Direction of ROP2 operation:
585 * 1 = Left to Right,
586 * (-1) = Right to Left
587 */
588 unsigned long opSign = 1;
589 /* xWidth is in pixels */
590 unsigned long xWidth = 192 / (dst_BPP / 8);
591 unsigned long de_ctrl = 0;
592
593 deWaitForNotBusy();
594
595 SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE,
596 FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS,
597 dst_base));
598
599 SMTC_write2Dreg(DE_WINDOW_SOURCE_BASE,
600 FIELD_VALUE(0, DE_WINDOW_SOURCE_BASE, ADDRESS,
601 src_base));
602
603 if (dst_pitch && src_pitch) {
604 SMTC_write2Dreg(DE_PITCH,
605 FIELD_VALUE(0, DE_PITCH, DESTINATION,
606 dst_pitch) | FIELD_VALUE(0,
607 DE_PITCH,
608 SOURCE,
609 src_pitch));
610
611 SMTC_write2Dreg(DE_WINDOW_WIDTH,
612 FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
613 dst_pitch) | FIELD_VALUE(0,
614 DE_WINDOW_WIDTH,
615 SOURCE,
616 src_pitch));
617 }
618
619 /* Set transparent bits if necessary */
620 if (pTransp != NULL) {
621 nTransparent =
622 pTransp->match | pTransp->select | pTransp->control;
623
624 /* Set color compare register */
625 SMTC_write2Dreg(DE_COLOR_COMPARE,
626 FIELD_VALUE(0, DE_COLOR_COMPARE, COLOR,
627 pTransp->color));
628 }
629
630 /* Determine direction of operation */
631 if (src_Y < dst_Y) {
632 /* +----------+
633 |S |
634 | +----------+
635 | | | |
636 | | | |
637 +---|------+ |
638 | D |
639 +----------+ */
640
641 nDirection = BOTTOM_TO_TOP;
642 } else if (src_Y > dst_Y) {
643 /* +----------+
644 |D |
645 | +----------+
646 | | | |
647 | | | |
648 +---|------+ |
649 | S |
650 +----------+ */
651
652 nDirection = TOP_TO_BOTTOM;
653 } else {
654 /* src_Y == dst_Y */
655
656 if (src_X <= dst_X) {
657 /* +------+---+------+
658 |S | | D|
659 | | | |
660 | | | |
661 | | | |
662 +------+---+------+ */
663
664 nDirection = RIGHT_TO_LEFT;
665 } else {
666 /* src_X > dst_X */
667
668 /* +------+---+------+
669 |D | | S|
670 | | | |
671 | | | |
672 | | | |
673 +------+---+------+ */
674
675 nDirection = LEFT_TO_RIGHT;
676 }
677 }
678
679 if ((nDirection == BOTTOM_TO_TOP) || (nDirection == RIGHT_TO_LEFT)) {
680 src_X += dst_width - 1;
681 src_Y += dst_height - 1;
682 dst_X += dst_width - 1;
683 dst_Y += dst_height - 1;
684 opSign = (-1);
685 }
686
687 if (dst_BPP >= 24) {
688 src_X *= 3;
689 src_Y *= 3;
690 dst_X *= 3;
691 dst_Y *= 3;
692 dst_width *= 3;
693 if ((nDirection == BOTTOM_TO_TOP)
694 || (nDirection == RIGHT_TO_LEFT)) {
695 src_X += 2;
696 dst_X += 2;
697 }
698 }
699
700 /* Workaround for 192 byte hw bug */
701 if ((nROP2 != 0x0C) && ((dst_width * (dst_BPP / 8)) >= 192)) {
702 /*
703 * Perform the ROP2 operation in chunks of (xWidth *
704 * dst_height)
705 */
706 while (1) {
707 deWaitForNotBusy();
708
709 SMTC_write2Dreg(DE_SOURCE,
710 FIELD_SET(0, DE_SOURCE, WRAP, DISABLE) |
711 FIELD_VALUE(0, DE_SOURCE, X_K1, src_X) |
712 FIELD_VALUE(0, DE_SOURCE, Y_K2, src_Y));
713
714 SMTC_write2Dreg(DE_DESTINATION,
715 FIELD_SET(0, DE_DESTINATION, WRAP,
716 DISABLE) | FIELD_VALUE(0,
717 DE_DESTINATION,
718 X,
719 dst_X)
720 | FIELD_VALUE(0, DE_DESTINATION, Y,
721 dst_Y));
722
723 SMTC_write2Dreg(DE_DIMENSION,
724 FIELD_VALUE(0, DE_DIMENSION, X,
725 xWidth) | FIELD_VALUE(0,
726 DE_DIMENSION,
727 Y_ET,
728 dst_height));
729
730 de_ctrl =
731 FIELD_VALUE(0, DE_CONTROL, ROP,
732 nROP2) | nTransparent | FIELD_SET(0,
733 DE_CONTROL,
734 ROP_SELECT,
735 ROP2)
736 | FIELD_SET(0, DE_CONTROL, COMMAND,
737 BITBLT) | ((nDirection ==
738 1) ? FIELD_SET(0,
739 DE_CONTROL,
740 DIRECTION,
741 RIGHT_TO_LEFT)
742 : FIELD_SET(0, DE_CONTROL,
743 DIRECTION,
744 LEFT_TO_RIGHT)) |
745 FIELD_SET(0, DE_CONTROL, STATUS, START);
746
747 SMTC_write2Dreg(DE_CONTROL, de_ctrl);
748
749 src_X += (opSign * xWidth);
750 dst_X += (opSign * xWidth);
751 dst_width -= xWidth;
752
753 if (dst_width <= 0) {
754 /* ROP2 operation is complete */
755 break;
756 }
757
758 if (xWidth > dst_width)
759 xWidth = dst_width;
760 }
761 } else {
762 deWaitForNotBusy();
763 SMTC_write2Dreg(DE_SOURCE,
764 FIELD_SET(0, DE_SOURCE, WRAP, DISABLE) |
765 FIELD_VALUE(0, DE_SOURCE, X_K1, src_X) |
766 FIELD_VALUE(0, DE_SOURCE, Y_K2, src_Y));
767
768 SMTC_write2Dreg(DE_DESTINATION,
769 FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) |
770 FIELD_VALUE(0, DE_DESTINATION, X, dst_X) |
771 FIELD_VALUE(0, DE_DESTINATION, Y, dst_Y));
772
773 SMTC_write2Dreg(DE_DIMENSION,
774 FIELD_VALUE(0, DE_DIMENSION, X, dst_width) |
775 FIELD_VALUE(0, DE_DIMENSION, Y_ET, dst_height));
776
777 de_ctrl = FIELD_VALUE(0, DE_CONTROL, ROP, nROP2) |
778 nTransparent |
779 FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
780 FIELD_SET(0, DE_CONTROL, COMMAND, BITBLT) |
781 ((nDirection == 1) ? FIELD_SET(0, DE_CONTROL, DIRECTION,
782 RIGHT_TO_LEFT)
783 : FIELD_SET(0, DE_CONTROL, DIRECTION,
784 LEFT_TO_RIGHT)) | FIELD_SET(0, DE_CONTROL,
785 STATUS, START);
786 SMTC_write2Dreg(DE_CONTROL, de_ctrl);
787 }
788
789 smtc_de_busy = 1;
790}
791
792/*
793 * This function sets the pixel format that will apply to the 2D Engine.
794 */
795void deSetPixelFormat(unsigned long bpp)
796{
797 unsigned long de_format;
798
799 de_format = SMTC_read2Dreg(DE_STRETCH_FORMAT);
800
801 switch (bpp) {
802 case 8:
803 de_format =
804 FIELD_SET(de_format, DE_STRETCH_FORMAT, PIXEL_FORMAT, 8);
805 break;
806 default:
807 case 16:
808 de_format =
809 FIELD_SET(de_format, DE_STRETCH_FORMAT, PIXEL_FORMAT, 16);
810 break;
811 case 32:
812 de_format =
813 FIELD_SET(de_format, DE_STRETCH_FORMAT, PIXEL_FORMAT, 32);
814 break;
815 }
816
817 SMTC_write2Dreg(DE_STRETCH_FORMAT, de_format);
818}
819
820/*
821 * System memory to Video memory monochrome expansion.
822 *
823 * Source is monochrome image in system memory. This function expands the
824 * monochrome data to color image in video memory.
825 */
826
827long deSystemMem2VideoMemMonoBlt(const char *pSrcbuf,
828 long srcDelta,
829 unsigned long startBit,
830 unsigned long dBase,
831 unsigned long dPitch,
832 unsigned long bpp,
833 unsigned long dx, unsigned long dy,
834 unsigned long width, unsigned long height,
835 unsigned long fColor,
836 unsigned long bColor,
837 unsigned long rop2) {
838 unsigned long bytePerPixel;
839 unsigned long ulBytesPerScan;
840 unsigned long ul4BytesPerScan;
841 unsigned long ulBytesRemain;
842 unsigned long de_ctrl = 0;
843 unsigned char ajRemain[4];
844 long i, j;
845
846 bytePerPixel = bpp / 8;
847
848 /* Just make sure the start bit is within legal range */
849 startBit &= 7;
850
851 ulBytesPerScan = (width + startBit + 7) / 8;
852 ul4BytesPerScan = ulBytesPerScan & ~3;
853 ulBytesRemain = ulBytesPerScan & 3;
854
855 if (smtc_de_busy)
856 deWaitForNotBusy();
857
858 /*
859 * 2D Source Base. Use 0 for HOST Blt.
860 */
861
862 SMTC_write2Dreg(DE_WINDOW_SOURCE_BASE, 0);
863
864 /*
865 * 2D Destination Base.
866 *
867 * It is an address offset (128 bit aligned) from the beginning of
868 * frame buffer.
869 */
870
871 SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE, dBase);
872
873 if (dPitch) {
874
875 /*
876 * Program pitch (distance between the 1st points of two
877 * adjacent lines).
878 *
879 * Note that input pitch is BYTE value, but the 2D Pitch
880 * register uses pixel values. Need Byte to pixel convertion.
881 */
882
883 SMTC_write2Dreg(DE_PITCH,
884 FIELD_VALUE(0, DE_PITCH, DESTINATION,
885 dPitch /
886 bytePerPixel) | FIELD_VALUE(0,
887 DE_PITCH,
888 SOURCE,
889 dPitch /
890 bytePerPixel));
891
892 /* Screen Window width in Pixels.
893 *
894 * 2D engine uses this value to calculate the linear address in
895 * frame buffer for a given point.
896 */
897
898 SMTC_write2Dreg(DE_WINDOW_WIDTH,
899 FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
900 (dPitch /
901 bytePerPixel)) | FIELD_VALUE(0,
902 DE_WINDOW_WIDTH,
903 SOURCE,
904 (dPitch
905 /
906 bytePerPixel)));
907 }
908 /* Note: For 2D Source in Host Write, only X_K1 field is needed, and
909 * Y_K2 field is not used. For mono bitmap, use startBit for X_K1.
910 */
911
912 SMTC_write2Dreg(DE_SOURCE,
913 FIELD_SET(0, DE_SOURCE, WRAP, DISABLE) |
914 FIELD_VALUE(0, DE_SOURCE, X_K1, startBit) |
915 FIELD_VALUE(0, DE_SOURCE, Y_K2, 0));
916
917 SMTC_write2Dreg(DE_DESTINATION,
918 FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) |
919 FIELD_VALUE(0, DE_DESTINATION, X, dx) |
920 FIELD_VALUE(0, DE_DESTINATION, Y, dy));
921
922 SMTC_write2Dreg(DE_DIMENSION,
923 FIELD_VALUE(0, DE_DIMENSION, X, width) |
924 FIELD_VALUE(0, DE_DIMENSION, Y_ET, height));
925
926 SMTC_write2Dreg(DE_FOREGROUND, fColor);
927 SMTC_write2Dreg(DE_BACKGROUND, bColor);
928
929 if (bpp)
930 deSetPixelFormat(bpp);
931 /* Set the pixel format of the destination */
932
933 de_ctrl = FIELD_VALUE(0, DE_CONTROL, ROP, rop2) |
934 FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
935 FIELD_SET(0, DE_CONTROL, COMMAND, HOST_WRITE) |
936 FIELD_SET(0, DE_CONTROL, HOST, MONO) |
937 FIELD_SET(0, DE_CONTROL, STATUS, START);
938
939 SMTC_write2Dreg(DE_CONTROL, de_ctrl | deGetTransparency());
940
941 /* Write MONO data (line by line) to 2D Engine data port */
942 for (i = 0; i < height; i++) {
943 /* For each line, send the data in chunks of 4 bytes */
944 for (j = 0; j < (ul4BytesPerScan / 4); j++)
945 SMTC_write2Ddataport(0,
946 *(unsigned long *)(pSrcbuf +
947 (j * 4)));
948
949 if (ulBytesRemain) {
950 memcpy(ajRemain, pSrcbuf + ul4BytesPerScan,
951 ulBytesRemain);
952 SMTC_write2Ddataport(0, *(unsigned long *)ajRemain);
953 }
954
955 pSrcbuf += srcDelta;
956 }
957 smtc_de_busy = 1;
958
959 return 0;
960}
961
962/*
963 * This function gets the transparency status from DE_CONTROL register.
964 * It returns a double word with the transparent fields properly set,
965 * while other fields are 0.
966 */
967unsigned long deGetTransparency(void)
968{
969 unsigned long de_ctrl;
970
971 de_ctrl = SMTC_read2Dreg(DE_CONTROL);
972
973 de_ctrl &=
974 FIELD_MASK(DE_CONTROL_TRANSPARENCY_MATCH) |
975 FIELD_MASK(DE_CONTROL_TRANSPARENCY_SELECT) |
976 FIELD_MASK(DE_CONTROL_TRANSPARENCY);
977
978 return de_ctrl;
979}
diff --git a/drivers/staging/sm7xx/smtc2d.h b/drivers/staging/sm7xx/smtc2d.h
new file mode 100644
index 00000000000..38d0c335322
--- /dev/null
+++ b/drivers/staging/sm7xx/smtc2d.h
@@ -0,0 +1,530 @@
1/*
2 * Silicon Motion SM712 2D drawing engine functions.
3 *
4 * Copyright (C) 2006 Silicon Motion Technology Corp.
5 * Author: Ge Wang, gewang@siliconmotion.com
6 *
7 * Copyright (C) 2009 Lemote, Inc.
8 * Author: Wu Zhangjin, wuzj@lemote.com
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file COPYING in the main directory of this archive for
12 * more details.
13 */
14
15#ifndef NULL
16#define NULL 0
17#endif
18
19/* Internal macros */
20
21#define _F_START(f) (0 ? f)
22#define _F_END(f) (1 ? f)
23#define _F_SIZE(f) (1 + _F_END(f) - _F_START(f))
24#define _F_MASK(f) (((1ULL << _F_SIZE(f)) - 1) << _F_START(f))
25#define _F_NORMALIZE(v, f) (((v) & _F_MASK(f)) >> _F_START(f))
26#define _F_DENORMALIZE(v, f) (((v) << _F_START(f)) & _F_MASK(f))
27
28/* Global macros */
29
30#define FIELD_GET(x, reg, field) \
31( \
32 _F_NORMALIZE((x), reg ## _ ## field) \
33)
34
35#define FIELD_SET(x, reg, field, value) \
36( \
37 (x & ~_F_MASK(reg ## _ ## field)) \
38 | _F_DENORMALIZE(reg ## _ ## field ## _ ## value, reg ## _ ## field) \
39)
40
41#define FIELD_VALUE(x, reg, field, value) \
42( \
43 (x & ~_F_MASK(reg ## _ ## field)) \
44 | _F_DENORMALIZE(value, reg ## _ ## field) \
45)
46
47#define FIELD_CLEAR(reg, field) \
48( \
49 ~_F_MASK(reg ## _ ## field) \
50)
51
52/* Field Macros */
53
54#define FIELD_START(field) (0 ? field)
55#define FIELD_END(field) (1 ? field)
56#define FIELD_SIZE(field) \
57 (1 + FIELD_END(field) - FIELD_START(field))
58
59#define FIELD_MASK(field) \
60 (((1 << (FIELD_SIZE(field)-1)) \
61 | ((1 << (FIELD_SIZE(field)-1)) - 1)) \
62 << FIELD_START(field))
63
64#define FIELD_NORMALIZE(reg, field) \
65 (((reg) & FIELD_MASK(field)) >> FIELD_START(field))
66
67#define FIELD_DENORMALIZE(field, value) \
68 (((value) << FIELD_START(field)) & FIELD_MASK(field))
69
70#define FIELD_INIT(reg, field, value) \
71 FIELD_DENORMALIZE(reg ## _ ## field, \
72 reg ## _ ## field ## _ ## value)
73
74#define FIELD_INIT_VAL(reg, field, value) \
75 (FIELD_DENORMALIZE(reg ## _ ## field, value))
76
77#define FIELD_VAL_SET(x, r, f, v) ({ \
78 x = (x & ~FIELD_MASK(r ## _ ## f)) \
79 | FIELD_DENORMALIZE(r ## _ ## f, r ## _ ## f ## _ ## v) \
80})
81
82#define RGB(r, g, b) ((unsigned long)(((r) << 16) | ((g) << 8) | (b)))
83
84/* Transparent info definition */
85typedef struct {
86 unsigned long match; /* Matching pixel is OPAQUE/TRANSPARENT */
87 unsigned long select; /* Transparency controlled by SRC/DST */
88 unsigned long control; /* ENABLE/DISABLE transparency */
89 unsigned long color; /* Transparent color */
90} Transparent, *pTransparent;
91
92#define PIXEL_DEPTH_1_BP 0 /* 1 bit per pixel */
93#define PIXEL_DEPTH_8_BPP 1 /* 8 bits per pixel */
94#define PIXEL_DEPTH_16_BPP 2 /* 16 bits per pixel */
95#define PIXEL_DEPTH_32_BPP 3 /* 32 bits per pixel */
96#define PIXEL_DEPTH_YUV422 8 /* 16 bits per pixel YUV422 */
97#define PIXEL_DEPTH_YUV420 9 /* 16 bits per pixel YUV420 */
98
99#define PATTERN_WIDTH 8
100#define PATTERN_HEIGHT 8
101
102#define TOP_TO_BOTTOM 0
103#define BOTTOM_TO_TOP 1
104#define RIGHT_TO_LEFT BOTTOM_TO_TOP
105#define LEFT_TO_RIGHT TOP_TO_BOTTOM
106
107/* Constants used in Transparent structure */
108#define MATCH_OPAQUE 0x00000000
109#define MATCH_TRANSPARENT 0x00000400
110#define SOURCE 0x00000000
111#define DESTINATION 0x00000200
112
113/* 2D registers. */
114
115#define DE_SOURCE 0x000000
116#define DE_SOURCE_WRAP 31 : 31
117#define DE_SOURCE_WRAP_DISABLE 0
118#define DE_SOURCE_WRAP_ENABLE 1
119#define DE_SOURCE_X_K1 29 : 16
120#define DE_SOURCE_Y_K2 15 : 0
121
122#define DE_DESTINATION 0x000004
123#define DE_DESTINATION_WRAP 31 : 31
124#define DE_DESTINATION_WRAP_DISABLE 0
125#define DE_DESTINATION_WRAP_ENABLE 1
126#define DE_DESTINATION_X 28 : 16
127#define DE_DESTINATION_Y 15 : 0
128
129#define DE_DIMENSION 0x000008
130#define DE_DIMENSION_X 28 : 16
131#define DE_DIMENSION_Y_ET 15 : 0
132
133#define DE_CONTROL 0x00000C
134#define DE_CONTROL_STATUS 31 : 31
135#define DE_CONTROL_STATUS_STOP 0
136#define DE_CONTROL_STATUS_START 1
137#define DE_CONTROL_PATTERN 30 : 30
138#define DE_CONTROL_PATTERN_MONO 0
139#define DE_CONTROL_PATTERN_COLOR 1
140#define DE_CONTROL_UPDATE_DESTINATION_X 29 : 29
141#define DE_CONTROL_UPDATE_DESTINATION_X_DISABLE 0
142#define DE_CONTROL_UPDATE_DESTINATION_X_ENABLE 1
143#define DE_CONTROL_QUICK_START 28 : 28
144#define DE_CONTROL_QUICK_START_DISABLE 0
145#define DE_CONTROL_QUICK_START_ENABLE 1
146#define DE_CONTROL_DIRECTION 27 : 27
147#define DE_CONTROL_DIRECTION_LEFT_TO_RIGHT 0
148#define DE_CONTROL_DIRECTION_RIGHT_TO_LEFT 1
149#define DE_CONTROL_MAJOR 26 : 26
150#define DE_CONTROL_MAJOR_X 0
151#define DE_CONTROL_MAJOR_Y 1
152#define DE_CONTROL_STEP_X 25 : 25
153#define DE_CONTROL_STEP_X_POSITIVE 1
154#define DE_CONTROL_STEP_X_NEGATIVE 0
155#define DE_CONTROL_STEP_Y 24 : 24
156#define DE_CONTROL_STEP_Y_POSITIVE 1
157#define DE_CONTROL_STEP_Y_NEGATIVE 0
158#define DE_CONTROL_STRETCH 23 : 23
159#define DE_CONTROL_STRETCH_DISABLE 0
160#define DE_CONTROL_STRETCH_ENABLE 1
161#define DE_CONTROL_HOST 22 : 22
162#define DE_CONTROL_HOST_COLOR 0
163#define DE_CONTROL_HOST_MONO 1
164#define DE_CONTROL_LAST_PIXEL 21 : 21
165#define DE_CONTROL_LAST_PIXEL_OFF 0
166#define DE_CONTROL_LAST_PIXEL_ON 1
167#define DE_CONTROL_COMMAND 20 : 16
168#define DE_CONTROL_COMMAND_BITBLT 0
169#define DE_CONTROL_COMMAND_RECTANGLE_FILL 1
170#define DE_CONTROL_COMMAND_DE_TILE 2
171#define DE_CONTROL_COMMAND_TRAPEZOID_FILL 3
172#define DE_CONTROL_COMMAND_ALPHA_BLEND 4
173#define DE_CONTROL_COMMAND_RLE_STRIP 5
174#define DE_CONTROL_COMMAND_SHORT_STROKE 6
175#define DE_CONTROL_COMMAND_LINE_DRAW 7
176#define DE_CONTROL_COMMAND_HOST_WRITE 8
177#define DE_CONTROL_COMMAND_HOST_READ 9
178#define DE_CONTROL_COMMAND_HOST_WRITE_BOTTOM_UP 10
179#define DE_CONTROL_COMMAND_ROTATE 11
180#define DE_CONTROL_COMMAND_FONT 12
181#define DE_CONTROL_COMMAND_TEXTURE_LOAD 15
182#define DE_CONTROL_ROP_SELECT 15 : 15
183#define DE_CONTROL_ROP_SELECT_ROP3 0
184#define DE_CONTROL_ROP_SELECT_ROP2 1
185#define DE_CONTROL_ROP2_SOURCE 14 : 14
186#define DE_CONTROL_ROP2_SOURCE_BITMAP 0
187#define DE_CONTROL_ROP2_SOURCE_PATTERN 1
188#define DE_CONTROL_MONO_DATA 13 : 12
189#define DE_CONTROL_MONO_DATA_NOT_PACKED 0
190#define DE_CONTROL_MONO_DATA_8_PACKED 1
191#define DE_CONTROL_MONO_DATA_16_PACKED 2
192#define DE_CONTROL_MONO_DATA_32_PACKED 3
193#define DE_CONTROL_REPEAT_ROTATE 11 : 11
194#define DE_CONTROL_REPEAT_ROTATE_DISABLE 0
195#define DE_CONTROL_REPEAT_ROTATE_ENABLE 1
196#define DE_CONTROL_TRANSPARENCY_MATCH 10 : 10
197#define DE_CONTROL_TRANSPARENCY_MATCH_OPAQUE 0
198#define DE_CONTROL_TRANSPARENCY_MATCH_TRANSPARENT 1
199#define DE_CONTROL_TRANSPARENCY_SELECT 9 : 9
200#define DE_CONTROL_TRANSPARENCY_SELECT_SOURCE 0
201#define DE_CONTROL_TRANSPARENCY_SELECT_DESTINATION 1
202#define DE_CONTROL_TRANSPARENCY 8 : 8
203#define DE_CONTROL_TRANSPARENCY_DISABLE 0
204#define DE_CONTROL_TRANSPARENCY_ENABLE 1
205#define DE_CONTROL_ROP 7 : 0
206
207/* Pseudo fields. */
208
209#define DE_CONTROL_SHORT_STROKE_DIR 27 : 24
210#define DE_CONTROL_SHORT_STROKE_DIR_225 0
211#define DE_CONTROL_SHORT_STROKE_DIR_135 1
212#define DE_CONTROL_SHORT_STROKE_DIR_315 2
213#define DE_CONTROL_SHORT_STROKE_DIR_45 3
214#define DE_CONTROL_SHORT_STROKE_DIR_270 4
215#define DE_CONTROL_SHORT_STROKE_DIR_90 5
216#define DE_CONTROL_SHORT_STROKE_DIR_180 8
217#define DE_CONTROL_SHORT_STROKE_DIR_0 10
218#define DE_CONTROL_ROTATION 25 : 24
219#define DE_CONTROL_ROTATION_0 0
220#define DE_CONTROL_ROTATION_270 1
221#define DE_CONTROL_ROTATION_90 2
222#define DE_CONTROL_ROTATION_180 3
223
224#define DE_PITCH 0x000010
225#define DE_PITCH_DESTINATION 28 : 16
226#define DE_PITCH_SOURCE 12 : 0
227
228#define DE_FOREGROUND 0x000014
229#define DE_FOREGROUND_COLOR 31 : 0
230
231#define DE_BACKGROUND 0x000018
232#define DE_BACKGROUND_COLOR 31 : 0
233
234#define DE_STRETCH_FORMAT 0x00001C
235#define DE_STRETCH_FORMAT_PATTERN_XY 30 : 30
236#define DE_STRETCH_FORMAT_PATTERN_XY_NORMAL 0
237#define DE_STRETCH_FORMAT_PATTERN_XY_OVERWRITE 1
238#define DE_STRETCH_FORMAT_PATTERN_Y 29 : 27
239#define DE_STRETCH_FORMAT_PATTERN_X 25 : 23
240#define DE_STRETCH_FORMAT_PIXEL_FORMAT 21 : 20
241#define DE_STRETCH_FORMAT_PIXEL_FORMAT_8 0
242#define DE_STRETCH_FORMAT_PIXEL_FORMAT_16 1
243#define DE_STRETCH_FORMAT_PIXEL_FORMAT_24 3
244#define DE_STRETCH_FORMAT_PIXEL_FORMAT_32 2
245#define DE_STRETCH_FORMAT_ADDRESSING 19 : 16
246#define DE_STRETCH_FORMAT_ADDRESSING_XY 0
247#define DE_STRETCH_FORMAT_ADDRESSING_LINEAR 15
248#define DE_STRETCH_FORMAT_SOURCE_HEIGHT 11 : 0
249
250#define DE_COLOR_COMPARE 0x000020
251#define DE_COLOR_COMPARE_COLOR 23 : 0
252
253#define DE_COLOR_COMPARE_MASK 0x000024
254#define DE_COLOR_COMPARE_MASK_MASKS 23 : 0
255
256#define DE_MASKS 0x000028
257#define DE_MASKS_BYTE_MASK 31 : 16
258#define DE_MASKS_BIT_MASK 15 : 0
259
260#define DE_CLIP_TL 0x00002C
261#define DE_CLIP_TL_TOP 31 : 16
262#define DE_CLIP_TL_STATUS 13 : 13
263#define DE_CLIP_TL_STATUS_DISABLE 0
264#define DE_CLIP_TL_STATUS_ENABLE 1
265#define DE_CLIP_TL_INHIBIT 12 : 12
266#define DE_CLIP_TL_INHIBIT_OUTSIDE 0
267#define DE_CLIP_TL_INHIBIT_INSIDE 1
268#define DE_CLIP_TL_LEFT 11 : 0
269
270#define DE_CLIP_BR 0x000030
271#define DE_CLIP_BR_BOTTOM 31 : 16
272#define DE_CLIP_BR_RIGHT 12 : 0
273
274#define DE_MONO_PATTERN_LOW 0x000034
275#define DE_MONO_PATTERN_LOW_PATTERN 31 : 0
276
277#define DE_MONO_PATTERN_HIGH 0x000038
278#define DE_MONO_PATTERN_HIGH_PATTERN 31 : 0
279
280#define DE_WINDOW_WIDTH 0x00003C
281#define DE_WINDOW_WIDTH_DESTINATION 28 : 16
282#define DE_WINDOW_WIDTH_SOURCE 12 : 0
283
284#define DE_WINDOW_SOURCE_BASE 0x000040
285#define DE_WINDOW_SOURCE_BASE_EXT 27 : 27
286#define DE_WINDOW_SOURCE_BASE_EXT_LOCAL 0
287#define DE_WINDOW_SOURCE_BASE_EXT_EXTERNAL 1
288#define DE_WINDOW_SOURCE_BASE_CS 26 : 26
289#define DE_WINDOW_SOURCE_BASE_CS_0 0
290#define DE_WINDOW_SOURCE_BASE_CS_1 1
291#define DE_WINDOW_SOURCE_BASE_ADDRESS 25 : 0
292
293#define DE_WINDOW_DESTINATION_BASE 0x000044
294#define DE_WINDOW_DESTINATION_BASE_EXT 27 : 27
295#define DE_WINDOW_DESTINATION_BASE_EXT_LOCAL 0
296#define DE_WINDOW_DESTINATION_BASE_EXT_EXTERNAL 1
297#define DE_WINDOW_DESTINATION_BASE_CS 26 : 26
298#define DE_WINDOW_DESTINATION_BASE_CS_0 0
299#define DE_WINDOW_DESTINATION_BASE_CS_1 1
300#define DE_WINDOW_DESTINATION_BASE_ADDRESS 25 : 0
301
302#define DE_ALPHA 0x000048
303#define DE_ALPHA_VALUE 7 : 0
304
305#define DE_WRAP 0x00004C
306#define DE_WRAP_X 31 : 16
307#define DE_WRAP_Y 15 : 0
308
309#define DE_STATUS 0x000050
310#define DE_STATUS_CSC 1 : 1
311#define DE_STATUS_CSC_CLEAR 0
312#define DE_STATUS_CSC_NOT_ACTIVE 0
313#define DE_STATUS_CSC_ACTIVE 1
314#define DE_STATUS_2D 0 : 0
315#define DE_STATUS_2D_CLEAR 0
316#define DE_STATUS_2D_NOT_ACTIVE 0
317#define DE_STATUS_2D_ACTIVE 1
318
319/* Color Space Conversion registers. */
320
321#define CSC_Y_SOURCE_BASE 0x0000C8
322#define CSC_Y_SOURCE_BASE_EXT 27 : 27
323#define CSC_Y_SOURCE_BASE_EXT_LOCAL 0
324#define CSC_Y_SOURCE_BASE_EXT_EXTERNAL 1
325#define CSC_Y_SOURCE_BASE_CS 26 : 26
326#define CSC_Y_SOURCE_BASE_CS_0 0
327#define CSC_Y_SOURCE_BASE_CS_1 1
328#define CSC_Y_SOURCE_BASE_ADDRESS 25 : 0
329
330#define CSC_CONSTANTS 0x0000CC
331#define CSC_CONSTANTS_Y 31 : 24
332#define CSC_CONSTANTS_R 23 : 16
333#define CSC_CONSTANTS_G 15 : 8
334#define CSC_CONSTANTS_B 7 : 0
335
336#define CSC_Y_SOURCE_X 0x0000D0
337#define CSC_Y_SOURCE_X_INTEGER 26 : 16
338#define CSC_Y_SOURCE_X_FRACTION 15 : 3
339
340#define CSC_Y_SOURCE_Y 0x0000D4
341#define CSC_Y_SOURCE_Y_INTEGER 27 : 16
342#define CSC_Y_SOURCE_Y_FRACTION 15 : 3
343
344#define CSC_U_SOURCE_BASE 0x0000D8
345#define CSC_U_SOURCE_BASE_EXT 27 : 27
346#define CSC_U_SOURCE_BASE_EXT_LOCAL 0
347#define CSC_U_SOURCE_BASE_EXT_EXTERNAL 1
348#define CSC_U_SOURCE_BASE_CS 26 : 26
349#define CSC_U_SOURCE_BASE_CS_0 0
350#define CSC_U_SOURCE_BASE_CS_1 1
351#define CSC_U_SOURCE_BASE_ADDRESS 25 : 0
352
353#define CSC_V_SOURCE_BASE 0x0000DC
354#define CSC_V_SOURCE_BASE_EXT 27 : 27
355#define CSC_V_SOURCE_BASE_EXT_LOCAL 0
356#define CSC_V_SOURCE_BASE_EXT_EXTERNAL 1
357#define CSC_V_SOURCE_BASE_CS 26 : 26
358#define CSC_V_SOURCE_BASE_CS_0 0
359#define CSC_V_SOURCE_BASE_CS_1 1
360#define CSC_V_SOURCE_BASE_ADDRESS 25 : 0
361
362#define CSC_SOURCE_DIMENSION 0x0000E0
363#define CSC_SOURCE_DIMENSION_X 31 : 16
364#define CSC_SOURCE_DIMENSION_Y 15 : 0
365
366#define CSC_SOURCE_PITCH 0x0000E4
367#define CSC_SOURCE_PITCH_Y 31 : 16
368#define CSC_SOURCE_PITCH_UV 15 : 0
369
370#define CSC_DESTINATION 0x0000E8
371#define CSC_DESTINATION_WRAP 31 : 31
372#define CSC_DESTINATION_WRAP_DISABLE 0
373#define CSC_DESTINATION_WRAP_ENABLE 1
374#define CSC_DESTINATION_X 27 : 16
375#define CSC_DESTINATION_Y 11 : 0
376
377#define CSC_DESTINATION_DIMENSION 0x0000EC
378#define CSC_DESTINATION_DIMENSION_X 31 : 16
379#define CSC_DESTINATION_DIMENSION_Y 15 : 0
380
381#define CSC_DESTINATION_PITCH 0x0000F0
382#define CSC_DESTINATION_PITCH_X 31 : 16
383#define CSC_DESTINATION_PITCH_Y 15 : 0
384
385#define CSC_SCALE_FACTOR 0x0000F4
386#define CSC_SCALE_FACTOR_HORIZONTAL 31 : 16
387#define CSC_SCALE_FACTOR_VERTICAL 15 : 0
388
389#define CSC_DESTINATION_BASE 0x0000F8
390#define CSC_DESTINATION_BASE_EXT 27 : 27
391#define CSC_DESTINATION_BASE_EXT_LOCAL 0
392#define CSC_DESTINATION_BASE_EXT_EXTERNAL 1
393#define CSC_DESTINATION_BASE_CS 26 : 26
394#define CSC_DESTINATION_BASE_CS_0 0
395#define CSC_DESTINATION_BASE_CS_1 1
396#define CSC_DESTINATION_BASE_ADDRESS 25 : 0
397
398#define CSC_CONTROL 0x0000FC
399#define CSC_CONTROL_STATUS 31 : 31
400#define CSC_CONTROL_STATUS_STOP 0
401#define CSC_CONTROL_STATUS_START 1
402#define CSC_CONTROL_SOURCE_FORMAT 30 : 28
403#define CSC_CONTROL_SOURCE_FORMAT_YUV422 0
404#define CSC_CONTROL_SOURCE_FORMAT_YUV420I 1
405#define CSC_CONTROL_SOURCE_FORMAT_YUV420 2
406#define CSC_CONTROL_SOURCE_FORMAT_YVU9 3
407#define CSC_CONTROL_SOURCE_FORMAT_IYU1 4
408#define CSC_CONTROL_SOURCE_FORMAT_IYU2 5
409#define CSC_CONTROL_SOURCE_FORMAT_RGB565 6
410#define CSC_CONTROL_SOURCE_FORMAT_RGB8888 7
411#define CSC_CONTROL_DESTINATION_FORMAT 27 : 26
412#define CSC_CONTROL_DESTINATION_FORMAT_RGB565 0
413#define CSC_CONTROL_DESTINATION_FORMAT_RGB8888 1
414#define CSC_CONTROL_HORIZONTAL_FILTER 25 : 25
415#define CSC_CONTROL_HORIZONTAL_FILTER_DISABLE 0
416#define CSC_CONTROL_HORIZONTAL_FILTER_ENABLE 1
417#define CSC_CONTROL_VERTICAL_FILTER 24 : 24
418#define CSC_CONTROL_VERTICAL_FILTER_DISABLE 0
419#define CSC_CONTROL_VERTICAL_FILTER_ENABLE 1
420#define CSC_CONTROL_BYTE_ORDER 23 : 23
421#define CSC_CONTROL_BYTE_ORDER_YUYV 0
422#define CSC_CONTROL_BYTE_ORDER_UYVY 1
423
424#define DE_DATA_PORT_501 0x110000
425#define DE_DATA_PORT_712 0x400000
426#define DE_DATA_PORT_722 0x6000
427
428/* point to virtual Memory Map IO starting address */
429extern char *smtc_RegBaseAddress;
430/* point to virtual video memory starting address */
431extern char *smtc_VRAMBaseAddress;
432extern unsigned char smtc_de_busy;
433
434extern unsigned long memRead32(unsigned long nOffset);
435extern void memWrite32(unsigned long nOffset, unsigned long nData);
436extern unsigned long SMTC_read2Dreg(unsigned long nOffset);
437
438/* 2D functions */
439extern void deInit(unsigned int nModeWidth, unsigned int nModeHeight,
440 unsigned int bpp);
441
442extern void deWaitForNotBusy(void);
443
444extern void deVerticalLine(unsigned long dst_base,
445 unsigned long dst_pitch,
446 unsigned long nX,
447 unsigned long nY,
448 unsigned long dst_height,
449 unsigned long nColor);
450
451extern void deHorizontalLine(unsigned long dst_base,
452 unsigned long dst_pitch,
453 unsigned long nX,
454 unsigned long nY,
455 unsigned long dst_width,
456 unsigned long nColor);
457
458extern void deLine(unsigned long dst_base,
459 unsigned long dst_pitch,
460 unsigned long nX1,
461 unsigned long nY1,
462 unsigned long nX2,
463 unsigned long nY2,
464 unsigned long nColor);
465
466extern void deFillRect(unsigned long dst_base,
467 unsigned long dst_pitch,
468 unsigned long dst_X,
469 unsigned long dst_Y,
470 unsigned long dst_width,
471 unsigned long dst_height,
472 unsigned long nColor);
473
474extern void deRotatePattern(unsigned char *pattern_dstaddr,
475 unsigned long pattern_src_addr,
476 unsigned long pattern_BPP,
477 unsigned long pattern_stride,
478 int patternX,
479 int patternY);
480
481extern void deCopy(unsigned long dst_base,
482 unsigned long dst_pitch,
483 unsigned long dst_BPP,
484 unsigned long dst_X,
485 unsigned long dst_Y,
486 unsigned long dst_width,
487 unsigned long dst_height,
488 unsigned long src_base,
489 unsigned long src_pitch,
490 unsigned long src_X,
491 unsigned long src_Y,
492 pTransparent pTransp,
493 unsigned char nROP2);
494
495/*
496 * System memory to Video memory monochrome expansion.
497 *
498 * Source is monochrome image in system memory. This function expands the
499 * monochrome data to color image in video memory.
500 *
501 * @pSrcbuf: pointer to start of source buffer in system memory
502 * @srcDelta: Pitch value (in bytes) of the source buffer, +ive means top
503 * down and -ive mean button up
504 * @startBit: Mono data can start at any bit in a byte, this value should
505 * be 0 to 7
506 * @dBase: Address of destination : offset in frame buffer
507 * @dPitch: Pitch value of destination surface in BYTE
508 * @bpp: Color depth of destination surface
509 * @dx, dy: Starting coordinate of destination surface
510 * @width, height: width and height of rectange in pixel value
511 * @fColor,bColor: Foreground, Background color (corresponding to a 1, 0 in
512 * the monochrome data)
513 * @rop2: ROP value
514 */
515
516extern long deSystemMem2VideoMemMonoBlt(
517 const char *pSrcbuf,
518 long srcDelta,
519 unsigned long startBit,
520 unsigned long dBase,
521 unsigned long dPitch,
522 unsigned long bpp,
523 unsigned long dx, unsigned long dy,
524 unsigned long width, unsigned long height,
525 unsigned long fColor,
526 unsigned long bColor,
527 unsigned long rop2);
528
529extern unsigned long deGetTransparency(void);
530extern void deSetPixelFormat(unsigned long bpp);
diff --git a/drivers/staging/sm7xx/smtcfb.c b/drivers/staging/sm7xx/smtcfb.c
new file mode 100644
index 00000000000..161dbc9c139
--- /dev/null
+++ b/drivers/staging/sm7xx/smtcfb.c
@@ -0,0 +1,1253 @@
1/*
2 * Silicon Motion SM7XX frame buffer device
3 *
4 * Copyright (C) 2006 Silicon Motion Technology Corp.
5 * Authors: Ge Wang, gewang@siliconmotion.com
6 * Boyod boyod.yang@siliconmotion.com.cn
7 *
8 * Copyright (C) 2009 Lemote, Inc.
9 * Author: Wu Zhangjin, wuzj@lemote.com
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file COPYING in the main directory of this archive for
13 * more details.
14 *
15 * Version 0.10.26192.21.01
16 * - Add PowerPC/Big endian support
17 * - Add 2D support for Lynx
18 * - Verified on2.6.19.2 Boyod.yang <boyod.yang@siliconmotion.com.cn>
19 *
20 * Version 0.09.2621.00.01
21 * - Only support Linux Kernel's version 2.6.21.
22 * Boyod.yang <boyod.yang@siliconmotion.com.cn>
23 *
24 * Version 0.09
25 * - Only support Linux Kernel's version 2.6.12.
26 * Boyod.yang <boyod.yang@siliconmotion.com.cn>
27 */
28
29#ifndef __KERNEL__
30#define __KERNEL__
31#endif
32
33#include <linux/io.h>
34#include <linux/fb.h>
35#include <linux/pci.h>
36#include <linux/init.h>
37#include <linux/uaccess.h>
38#include <linux/console.h>
39#include <linux/screen_info.h>
40
41#ifdef CONFIG_PM
42#include <linux/pm.h>
43#endif
44
45struct screen_info smtc_screen_info;
46
47#include "smtcfb.h"
48#include "smtc2d.h"
49
50#ifdef DEBUG
51#define smdbg(format, arg...) printk(KERN_DEBUG format , ## arg)
52#else
53#define smdbg(format, arg...)
54#endif
55
56/*
57* Private structure
58*/
59struct smtcfb_info {
60 /*
61 * The following is a pointer to be passed into the
62 * functions below. The modules outside the main
63 * voyager.c driver have no knowledge as to what
64 * is within this structure.
65 */
66 struct fb_info fb;
67 struct display_switch *dispsw;
68 struct pci_dev *dev;
69 signed int currcon;
70
71 struct {
72 u8 red, green, blue;
73 } palette[NR_RGB];
74
75 u_int palette_size;
76};
77
78struct par_info {
79 /*
80 * Hardware
81 */
82 u16 chipID;
83 unsigned char __iomem *m_pMMIO;
84 char __iomem *m_pLFB;
85 char *m_pDPR;
86 char *m_pVPR;
87 char *m_pCPR;
88
89 u_int width;
90 u_int height;
91 u_int hz;
92 u_long BaseAddressInVRAM;
93 u8 chipRevID;
94};
95
96struct vesa_mode_table {
97 char mode_index[6];
98 u16 lfb_width;
99 u16 lfb_height;
100 u16 lfb_depth;
101};
102
103static struct vesa_mode_table vesa_mode[] = {
104 {"0x301", 640, 480, 8},
105 {"0x303", 800, 600, 8},
106 {"0x305", 1024, 768, 8},
107 {"0x307", 1280, 1024, 8},
108
109 {"0x311", 640, 480, 16},
110 {"0x314", 800, 600, 16},
111 {"0x317", 1024, 768, 16},
112 {"0x31A", 1280, 1024, 16},
113
114 {"0x312", 640, 480, 24},
115 {"0x315", 800, 600, 24},
116 {"0x318", 1024, 768, 24},
117 {"0x31B", 1280, 1024, 24},
118};
119
120char __iomem *smtc_RegBaseAddress; /* Memory Map IO starting address */
121char __iomem *smtc_VRAMBaseAddress; /* video memory starting address */
122
123char *smtc_2DBaseAddress; /* 2D engine starting address */
124char *smtc_2Ddataport; /* 2D data port offset */
125short smtc_2Dacceleration;
126
127static u32 colreg[17];
128static struct par_info hw; /* hardware information */
129
130u16 smtc_ChipIDs[] = {
131 0x710,
132 0x712,
133 0x720
134};
135
136#define numSMTCchipIDs (sizeof(smtc_ChipIDs) / sizeof(u16))
137
138void deWaitForNotBusy(void)
139{
140 unsigned long i = 0x1000000;
141 while (i--) {
142 if ((smtc_seqr(0x16) & 0x18) == 0x10)
143 break;
144 }
145 smtc_de_busy = 0;
146}
147
148static void sm712_set_timing(struct smtcfb_info *sfb,
149 struct par_info *ppar_info)
150{
151 int i = 0, j = 0;
152 u32 m_nScreenStride;
153
154 smdbg("\nppar_info->width = %d ppar_info->height = %d"
155 "sfb->fb.var.bits_per_pixel = %d ppar_info->hz = %d\n",
156 ppar_info->width, ppar_info->height,
157 sfb->fb.var.bits_per_pixel, ppar_info->hz);
158
159 for (j = 0; j < numVGAModes; j++) {
160 if (VGAMode[j].mmSizeX == ppar_info->width &&
161 VGAMode[j].mmSizeY == ppar_info->height &&
162 VGAMode[j].bpp == sfb->fb.var.bits_per_pixel &&
163 VGAMode[j].hz == ppar_info->hz) {
164
165 smdbg("\nVGAMode[j].mmSizeX = %d VGAMode[j].mmSizeY ="
166 "%d VGAMode[j].bpp = %d"
167 "VGAMode[j].hz=%d\n",
168 VGAMode[j].mmSizeX, VGAMode[j].mmSizeY,
169 VGAMode[j].bpp, VGAMode[j].hz);
170
171 smdbg("VGAMode index=%d\n", j);
172
173 smtc_mmiowb(0x0, 0x3c6);
174
175 smtc_seqw(0, 0x1);
176
177 smtc_mmiowb(VGAMode[j].Init_MISC, 0x3c2);
178
179 /* init SEQ register SR00 - SR04 */
180 for (i = 0; i < SIZE_SR00_SR04; i++)
181 smtc_seqw(i, VGAMode[j].Init_SR00_SR04[i]);
182
183 /* init SEQ register SR10 - SR24 */
184 for (i = 0; i < SIZE_SR10_SR24; i++)
185 smtc_seqw(i + 0x10,
186 VGAMode[j].Init_SR10_SR24[i]);
187
188 /* init SEQ register SR30 - SR75 */
189 for (i = 0; i < SIZE_SR30_SR75; i++)
190 if (((i + 0x30) != 0x62) \
191 && ((i + 0x30) != 0x6a) \
192 && ((i + 0x30) != 0x6b))
193 smtc_seqw(i + 0x30,
194 VGAMode[j].Init_SR30_SR75[i]);
195
196 /* init SEQ register SR80 - SR93 */
197 for (i = 0; i < SIZE_SR80_SR93; i++)
198 smtc_seqw(i + 0x80,
199 VGAMode[j].Init_SR80_SR93[i]);
200
201 /* init SEQ register SRA0 - SRAF */
202 for (i = 0; i < SIZE_SRA0_SRAF; i++)
203 smtc_seqw(i + 0xa0,
204 VGAMode[j].Init_SRA0_SRAF[i]);
205
206 /* init Graphic register GR00 - GR08 */
207 for (i = 0; i < SIZE_GR00_GR08; i++)
208 smtc_grphw(i, VGAMode[j].Init_GR00_GR08[i]);
209
210 /* init Attribute register AR00 - AR14 */
211 for (i = 0; i < SIZE_AR00_AR14; i++)
212 smtc_attrw(i, VGAMode[j].Init_AR00_AR14[i]);
213
214 /* init CRTC register CR00 - CR18 */
215 for (i = 0; i < SIZE_CR00_CR18; i++)
216 smtc_crtcw(i, VGAMode[j].Init_CR00_CR18[i]);
217
218 /* init CRTC register CR30 - CR4D */
219 for (i = 0; i < SIZE_CR30_CR4D; i++)
220 smtc_crtcw(i + 0x30,
221 VGAMode[j].Init_CR30_CR4D[i]);
222
223 /* init CRTC register CR90 - CRA7 */
224 for (i = 0; i < SIZE_CR90_CRA7; i++)
225 smtc_crtcw(i + 0x90,
226 VGAMode[j].Init_CR90_CRA7[i]);
227 }
228 }
229 smtc_mmiowb(0x67, 0x3c2);
230
231 /* set VPR registers */
232 writel(0x0, ppar_info->m_pVPR + 0x0C);
233 writel(0x0, ppar_info->m_pVPR + 0x40);
234
235 /* set data width */
236 m_nScreenStride =
237 (ppar_info->width * sfb->fb.var.bits_per_pixel) / 64;
238 switch (sfb->fb.var.bits_per_pixel) {
239 case 8:
240 writel(0x0, ppar_info->m_pVPR + 0x0);
241 break;
242 case 16:
243 writel(0x00020000, ppar_info->m_pVPR + 0x0);
244 break;
245 case 24:
246 writel(0x00040000, ppar_info->m_pVPR + 0x0);
247 break;
248 case 32:
249 writel(0x00030000, ppar_info->m_pVPR + 0x0);
250 break;
251 }
252 writel((u32) (((m_nScreenStride + 2) << 16) | m_nScreenStride),
253 ppar_info->m_pVPR + 0x10);
254
255}
256
257static void sm712_setpalette(int regno, unsigned red, unsigned green,
258 unsigned blue, struct fb_info *info)
259{
260 struct par_info *cur_par = (struct par_info *)info->par;
261
262 if (cur_par->BaseAddressInVRAM)
263 /*
264 * second display palette for dual head. Enable CRT RAM, 6-bit
265 * RAM
266 */
267 smtc_seqw(0x66, (smtc_seqr(0x66) & 0xC3) | 0x20);
268 else
269 /* primary display palette. Enable LCD RAM only, 6-bit RAM */
270 smtc_seqw(0x66, (smtc_seqr(0x66) & 0xC3) | 0x10);
271 smtc_mmiowb(regno, dac_reg);
272 smtc_mmiowb(red >> 10, dac_val);
273 smtc_mmiowb(green >> 10, dac_val);
274 smtc_mmiowb(blue >> 10, dac_val);
275}
276
277static void smtc_set_timing(struct smtcfb_info *sfb, struct par_info
278 *ppar_info)
279{
280 switch (ppar_info->chipID) {
281 case 0x710:
282 case 0x712:
283 case 0x720:
284 sm712_set_timing(sfb, ppar_info);
285 break;
286 }
287}
288
289static struct fb_var_screeninfo smtcfb_var = {
290 .xres = 1024,
291 .yres = 600,
292 .xres_virtual = 1024,
293 .yres_virtual = 600,
294 .bits_per_pixel = 16,
295 .red = {16, 8, 0},
296 .green = {8, 8, 0},
297 .blue = {0, 8, 0},
298 .activate = FB_ACTIVATE_NOW,
299 .height = -1,
300 .width = -1,
301 .vmode = FB_VMODE_NONINTERLACED,
302};
303
304static struct fb_fix_screeninfo smtcfb_fix = {
305 .id = "sm712fb",
306 .type = FB_TYPE_PACKED_PIXELS,
307 .visual = FB_VISUAL_TRUECOLOR,
308 .line_length = 800 * 3,
309 .accel = FB_ACCEL_SMI_LYNX,
310};
311
312/* chan_to_field
313 *
314 * convert a colour value into a field position
315 *
316 * from pxafb.c
317 */
318
319static inline unsigned int chan_to_field(unsigned int chan,
320 struct fb_bitfield *bf)
321{
322 chan &= 0xffff;
323 chan >>= 16 - bf->length;
324 return chan << bf->offset;
325}
326
327static int smtcfb_blank(int blank_mode, struct fb_info *info)
328{
329 /* clear DPMS setting */
330 switch (blank_mode) {
331 case FB_BLANK_UNBLANK:
332 /* Screen On: HSync: On, VSync : On */
333 smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
334 smtc_seqw(0x6a, 0x16);
335 smtc_seqw(0x6b, 0x02);
336 smtc_seqw(0x21, (smtc_seqr(0x21) & 0x77));
337 smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
338 smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
339 smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
340 smtc_seqw(0x31, (smtc_seqr(0x31) | 0x03));
341 break;
342 case FB_BLANK_NORMAL:
343 /* Screen Off: HSync: On, VSync : On Soft blank */
344 smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
345 smtc_seqw(0x6a, 0x16);
346 smtc_seqw(0x6b, 0x02);
347 smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
348 smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
349 smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
350 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
351 break;
352 case FB_BLANK_VSYNC_SUSPEND:
353 /* Screen On: HSync: On, VSync : Off */
354 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
355 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
356 smtc_seqw(0x6a, 0x0c);
357 smtc_seqw(0x6b, 0x02);
358 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
359 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x20));
360 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0x20));
361 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
362 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
363 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
364 break;
365 case FB_BLANK_HSYNC_SUSPEND:
366 /* Screen On: HSync: Off, VSync : On */
367 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
368 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
369 smtc_seqw(0x6a, 0x0c);
370 smtc_seqw(0x6b, 0x02);
371 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
372 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x10));
373 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
374 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
375 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
376 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
377 break;
378 case FB_BLANK_POWERDOWN:
379 /* Screen On: HSync: Off, VSync : Off */
380 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
381 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
382 smtc_seqw(0x6a, 0x0c);
383 smtc_seqw(0x6b, 0x02);
384 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
385 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x30));
386 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
387 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
388 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
389 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
390 break;
391 default:
392 return -EINVAL;
393 }
394
395 return 0;
396}
397
398static int smtc_setcolreg(unsigned regno, unsigned red, unsigned green,
399 unsigned blue, unsigned trans, struct fb_info *info)
400{
401 struct smtcfb_info *sfb = (struct smtcfb_info *)info;
402 u32 val;
403
404 if (regno > 255)
405 return 1;
406
407 switch (sfb->fb.fix.visual) {
408 case FB_VISUAL_DIRECTCOLOR:
409 case FB_VISUAL_TRUECOLOR:
410 /*
411 * 16/32 bit true-colour, use pseuo-palette for 16 base color
412 */
413 if (regno < 16) {
414 if (sfb->fb.var.bits_per_pixel == 16) {
415 u32 *pal = sfb->fb.pseudo_palette;
416 val = chan_to_field(red, &sfb->fb.var.red);
417 val |= chan_to_field(green, \
418 &sfb->fb.var.green);
419 val |= chan_to_field(blue, &sfb->fb.var.blue);
420#ifdef __BIG_ENDIAN
421 pal[regno] =
422 ((red & 0xf800) >> 8) |
423 ((green & 0xe000) >> 13) |
424 ((green & 0x1c00) << 3) |
425 ((blue & 0xf800) >> 3);
426#else
427 pal[regno] = val;
428#endif
429 } else {
430 u32 *pal = sfb->fb.pseudo_palette;
431 val = chan_to_field(red, &sfb->fb.var.red);
432 val |= chan_to_field(green, \
433 &sfb->fb.var.green);
434 val |= chan_to_field(blue, &sfb->fb.var.blue);
435#ifdef __BIG_ENDIAN
436 val =
437 (val & 0xff00ff00 >> 8) |
438 (val & 0x00ff00ff << 8);
439#endif
440 pal[regno] = val;
441 }
442 }
443 break;
444
445 case FB_VISUAL_PSEUDOCOLOR:
446 /* color depth 8 bit */
447 sm712_setpalette(regno, red, green, blue, info);
448 break;
449
450 default:
451 return 1; /* unknown type */
452 }
453
454 return 0;
455
456}
457
458#ifdef __BIG_ENDIAN
459static ssize_t smtcfb_read(struct fb_info *info, char __user * buf, size_t
460 count, loff_t *ppos)
461{
462 unsigned long p = *ppos;
463
464 u32 *buffer, *dst;
465 u32 __iomem *src;
466 int c, i, cnt = 0, err = 0;
467 unsigned long total_size;
468
469 if (!info || !info->screen_base)
470 return -ENODEV;
471
472 if (info->state != FBINFO_STATE_RUNNING)
473 return -EPERM;
474
475 total_size = info->screen_size;
476
477 if (total_size == 0)
478 total_size = info->fix.smem_len;
479
480 if (p >= total_size)
481 return 0;
482
483 if (count >= total_size)
484 count = total_size;
485
486 if (count + p > total_size)
487 count = total_size - p;
488
489 buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
490 if (!buffer)
491 return -ENOMEM;
492
493 src = (u32 __iomem *) (info->screen_base + p);
494
495 if (info->fbops->fb_sync)
496 info->fbops->fb_sync(info);
497
498 while (count) {
499 c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
500 dst = buffer;
501 for (i = c >> 2; i--;) {
502 *dst = fb_readl(src++);
503 *dst =
504 (*dst & 0xff00ff00 >> 8) |
505 (*dst & 0x00ff00ff << 8);
506 dst++;
507 }
508 if (c & 3) {
509 u8 *dst8 = (u8 *) dst;
510 u8 __iomem *src8 = (u8 __iomem *) src;
511
512 for (i = c & 3; i--;) {
513 if (i & 1) {
514 *dst8++ = fb_readb(++src8);
515 } else {
516 *dst8++ = fb_readb(--src8);
517 src8 += 2;
518 }
519 }
520 src = (u32 __iomem *) src8;
521 }
522
523 if (copy_to_user(buf, buffer, c)) {
524 err = -EFAULT;
525 break;
526 }
527 *ppos += c;
528 buf += c;
529 cnt += c;
530 count -= c;
531 }
532
533 kfree(buffer);
534
535 return (err) ? err : cnt;
536}
537
538static ssize_t
539smtcfb_write(struct fb_info *info, const char __user *buf, size_t count,
540 loff_t *ppos)
541{
542 unsigned long p = *ppos;
543
544 u32 *buffer, *src;
545 u32 __iomem *dst;
546 int c, i, cnt = 0, err = 0;
547 unsigned long total_size;
548
549 if (!info || !info->screen_base)
550 return -ENODEV;
551
552 if (info->state != FBINFO_STATE_RUNNING)
553 return -EPERM;
554
555 total_size = info->screen_size;
556
557 if (total_size == 0)
558 total_size = info->fix.smem_len;
559
560 if (p > total_size)
561 return -EFBIG;
562
563 if (count > total_size) {
564 err = -EFBIG;
565 count = total_size;
566 }
567
568 if (count + p > total_size) {
569 if (!err)
570 err = -ENOSPC;
571
572 count = total_size - p;
573 }
574
575 buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
576 if (!buffer)
577 return -ENOMEM;
578
579 dst = (u32 __iomem *) (info->screen_base + p);
580
581 if (info->fbops->fb_sync)
582 info->fbops->fb_sync(info);
583
584 while (count) {
585 c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
586 src = buffer;
587
588 if (copy_from_user(src, buf, c)) {
589 err = -EFAULT;
590 break;
591 }
592
593 for (i = c >> 2; i--;) {
594 fb_writel((*src & 0xff00ff00 >> 8) |
595 (*src & 0x00ff00ff << 8), dst++);
596 src++;
597 }
598 if (c & 3) {
599 u8 *src8 = (u8 *) src;
600 u8 __iomem *dst8 = (u8 __iomem *) dst;
601
602 for (i = c & 3; i--;) {
603 if (i & 1) {
604 fb_writeb(*src8++, ++dst8);
605 } else {
606 fb_writeb(*src8++, --dst8);
607 dst8 += 2;
608 }
609 }
610 dst = (u32 __iomem *) dst8;
611 }
612
613 *ppos += c;
614 buf += c;
615 cnt += c;
616 count -= c;
617 }
618
619 kfree(buffer);
620
621 return (cnt) ? cnt : err;
622}
623#endif /* ! __BIG_ENDIAN */
624
625#include "smtc2d.c"
626
627void smtcfb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
628{
629 struct par_info *p = (struct par_info *)info->par;
630
631 if (smtc_2Dacceleration) {
632 if (!area->width || !area->height)
633 return;
634
635 deCopy(p->BaseAddressInVRAM, 0, info->var.bits_per_pixel,
636 area->dx, area->dy, area->width, area->height,
637 p->BaseAddressInVRAM, 0, area->sx, area->sy, 0, 0xC);
638
639 } else
640 cfb_copyarea(info, area);
641}
642
643void smtcfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
644{
645 struct par_info *p = (struct par_info *)info->par;
646
647 if (smtc_2Dacceleration) {
648 if (!rect->width || !rect->height)
649 return;
650 if (info->var.bits_per_pixel >= 24)
651 deFillRect(p->BaseAddressInVRAM, 0, rect->dx * 3,
652 rect->dy * 3, rect->width * 3, rect->height,
653 rect->color);
654 else
655 deFillRect(p->BaseAddressInVRAM, 0, rect->dx, rect->dy,
656 rect->width, rect->height, rect->color);
657 } else
658 cfb_fillrect(info, rect);
659}
660
661void smtcfb_imageblit(struct fb_info *info, const struct fb_image *image)
662{
663 struct par_info *p = (struct par_info *)info->par;
664 u32 bg_col = 0, fg_col = 0;
665
666 if ((smtc_2Dacceleration) && (image->depth == 1)) {
667 if (smtc_de_busy)
668 deWaitForNotBusy();
669
670 switch (info->var.bits_per_pixel) {
671 case 8:
672 bg_col = image->bg_color;
673 fg_col = image->fg_color;
674 break;
675 case 16:
676 bg_col =
677 ((u32 *) (info->pseudo_palette))[image->bg_color];
678 fg_col =
679 ((u32 *) (info->pseudo_palette))[image->fg_color];
680 break;
681 case 32:
682 bg_col =
683 ((u32 *) (info->pseudo_palette))[image->bg_color];
684 fg_col =
685 ((u32 *) (info->pseudo_palette))[image->fg_color];
686 break;
687 }
688
689 deSystemMem2VideoMemMonoBlt(
690 image->data,
691 image->width / 8,
692 0,
693 p->BaseAddressInVRAM,
694 0,
695 0,
696 image->dx, image->dy,
697 image->width, image->height,
698 fg_col, bg_col,
699 0x0C);
700
701 } else
702 cfb_imageblit(info, image);
703}
704
705static struct fb_ops smtcfb_ops = {
706 .owner = THIS_MODULE,
707 .fb_setcolreg = smtc_setcolreg,
708 .fb_blank = smtcfb_blank,
709 .fb_fillrect = smtcfb_fillrect,
710 .fb_imageblit = smtcfb_imageblit,
711 .fb_copyarea = smtcfb_copyarea,
712#ifdef __BIG_ENDIAN
713 .fb_read = smtcfb_read,
714 .fb_write = smtcfb_write,
715#endif
716
717};
718
719void smtcfb_setmode(struct smtcfb_info *sfb)
720{
721 switch (sfb->fb.var.bits_per_pixel) {
722 case 32:
723 sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
724 sfb->fb.fix.line_length = sfb->fb.var.xres * 4;
725 sfb->fb.var.red.length = 8;
726 sfb->fb.var.green.length = 8;
727 sfb->fb.var.blue.length = 8;
728 sfb->fb.var.red.offset = 16;
729 sfb->fb.var.green.offset = 8;
730 sfb->fb.var.blue.offset = 0;
731
732 break;
733 case 8:
734 sfb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
735 sfb->fb.fix.line_length = sfb->fb.var.xres;
736 sfb->fb.var.red.offset = 5;
737 sfb->fb.var.red.length = 3;
738 sfb->fb.var.green.offset = 2;
739 sfb->fb.var.green.length = 3;
740 sfb->fb.var.blue.offset = 0;
741 sfb->fb.var.blue.length = 2;
742 break;
743 case 24:
744 sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
745 sfb->fb.fix.line_length = sfb->fb.var.xres * 3;
746 sfb->fb.var.red.length = 8;
747 sfb->fb.var.green.length = 8;
748 sfb->fb.var.blue.length = 8;
749
750 sfb->fb.var.red.offset = 16;
751 sfb->fb.var.green.offset = 8;
752 sfb->fb.var.blue.offset = 0;
753
754 break;
755 case 16:
756 default:
757 sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
758 sfb->fb.fix.line_length = sfb->fb.var.xres * 2;
759
760 sfb->fb.var.red.length = 5;
761 sfb->fb.var.green.length = 6;
762 sfb->fb.var.blue.length = 5;
763
764 sfb->fb.var.red.offset = 11;
765 sfb->fb.var.green.offset = 5;
766 sfb->fb.var.blue.offset = 0;
767
768 break;
769 }
770
771 hw.width = sfb->fb.var.xres;
772 hw.height = sfb->fb.var.yres;
773 hw.hz = 60;
774 smtc_set_timing(sfb, &hw);
775 if (smtc_2Dacceleration) {
776 printk("2D acceleration enabled!\n");
777 /* Init smtc drawing engine */
778 deInit(sfb->fb.var.xres, sfb->fb.var.yres,
779 sfb->fb.var.bits_per_pixel);
780 }
781}
782
783/*
784 * Alloc struct smtcfb_info and assign the default value
785 */
786static struct smtcfb_info *smtc_alloc_fb_info(struct pci_dev *dev,
787 char *name)
788{
789 struct smtcfb_info *sfb;
790
791 sfb = kmalloc(sizeof(struct smtcfb_info), GFP_KERNEL);
792
793 if (!sfb)
794 return NULL;
795
796 memset(sfb, 0, sizeof(struct smtcfb_info));
797
798 sfb->currcon = -1;
799 sfb->dev = dev;
800
801 /*** Init sfb->fb with default value ***/
802 sfb->fb.flags = FBINFO_FLAG_DEFAULT;
803 sfb->fb.fbops = &smtcfb_ops;
804 sfb->fb.var = smtcfb_var;
805 sfb->fb.fix = smtcfb_fix;
806
807 strcpy(sfb->fb.fix.id, name);
808
809 sfb->fb.fix.type = FB_TYPE_PACKED_PIXELS;
810 sfb->fb.fix.type_aux = 0;
811 sfb->fb.fix.xpanstep = 0;
812 sfb->fb.fix.ypanstep = 0;
813 sfb->fb.fix.ywrapstep = 0;
814 sfb->fb.fix.accel = FB_ACCEL_SMI_LYNX;
815
816 sfb->fb.var.nonstd = 0;
817 sfb->fb.var.activate = FB_ACTIVATE_NOW;
818 sfb->fb.var.height = -1;
819 sfb->fb.var.width = -1;
820 /* text mode acceleration */
821 sfb->fb.var.accel_flags = FB_ACCELF_TEXT;
822 sfb->fb.var.vmode = FB_VMODE_NONINTERLACED;
823 sfb->fb.par = &hw;
824 sfb->fb.pseudo_palette = colreg;
825
826 return sfb;
827}
828
829/*
830 * Unmap in the memory mapped IO registers
831 */
832
833static void smtc_unmap_mmio(struct smtcfb_info *sfb)
834{
835 if (sfb && smtc_RegBaseAddress)
836 smtc_RegBaseAddress = NULL;
837}
838
839/*
840 * Map in the screen memory
841 */
842
843static int smtc_map_smem(struct smtcfb_info *sfb,
844 struct pci_dev *dev, u_long smem_len)
845{
846 if (sfb->fb.var.bits_per_pixel == 32) {
847#ifdef __BIG_ENDIAN
848 sfb->fb.fix.smem_start = pci_resource_start(dev, 0)
849 + 0x800000;
850#else
851 sfb->fb.fix.smem_start = pci_resource_start(dev, 0);
852#endif
853 } else {
854 sfb->fb.fix.smem_start = pci_resource_start(dev, 0);
855 }
856
857 sfb->fb.fix.smem_len = smem_len;
858
859 sfb->fb.screen_base = smtc_VRAMBaseAddress;
860
861 if (!sfb->fb.screen_base) {
862 printk(KERN_INFO "%s: unable to map screen memory\n",
863 sfb->fb.fix.id);
864 return -ENOMEM;
865 }
866
867 return 0;
868}
869
870/*
871 * Unmap in the screen memory
872 *
873 */
874static void smtc_unmap_smem(struct smtcfb_info *sfb)
875{
876 if (sfb && sfb->fb.screen_base) {
877 iounmap(sfb->fb.screen_base);
878 sfb->fb.screen_base = NULL;
879 }
880}
881
882/*
883 * We need to wake up the LynxEM+, and make sure its in linear memory mode.
884 */
885static inline void sm7xx_init_hw(void)
886{
887 outb_p(0x18, 0x3c4);
888 outb_p(0x11, 0x3c5);
889}
890
891static void smtc_free_fb_info(struct smtcfb_info *sfb)
892{
893 if (sfb) {
894 fb_alloc_cmap(&sfb->fb.cmap, 0, 0);
895 kfree(sfb);
896 }
897}
898
899/*
900 * sm712vga_setup - process command line options, get vga parameter
901 * @options: string of options
902 * Returns zero.
903 *
904 */
905static int __init __maybe_unused sm712vga_setup(char *options)
906{
907 int index;
908
909 if (!options || !*options) {
910 smdbg("\n No vga parameter\n");
911 return -EINVAL;
912 }
913
914 smtc_screen_info.lfb_width = 0;
915 smtc_screen_info.lfb_height = 0;
916 smtc_screen_info.lfb_depth = 0;
917
918 smdbg("\nsm712vga_setup = %s\n", options);
919
920 for (index = 0;
921 index < (sizeof(vesa_mode) / sizeof(struct vesa_mode_table));
922 index++) {
923 if (strstr(options, vesa_mode[index].mode_index)) {
924 smtc_screen_info.lfb_width = vesa_mode[index].lfb_width;
925 smtc_screen_info.lfb_height =
926 vesa_mode[index].lfb_height;
927 smtc_screen_info.lfb_depth = vesa_mode[index].lfb_depth;
928 return 0;
929 }
930 }
931
932 return -1;
933}
934__setup("vga=", sm712vga_setup);
935
936/* Jason (08/13/2009)
937 * Original init function changed to probe method to be used by pci_drv
938 * process used to detect chips replaced with kernel process in pci_drv
939 */
940static int __init smtcfb_pci_probe(struct pci_dev *pdev,
941 const struct pci_device_id *ent)
942{
943 struct smtcfb_info *sfb;
944 u_long smem_size = 0x00800000; /* default 8MB */
945 char name[16];
946 int err;
947 unsigned long pFramebufferPhysical;
948
949 printk(KERN_INFO
950 "Silicon Motion display driver " SMTC_LINUX_FB_VERSION "\n");
951
952 err = pci_enable_device(pdev); /* enable SMTC chip */
953
954 if (err)
955 return err;
956 err = -ENOMEM;
957
958 hw.chipID = ent->device;
959 sprintf(name, "sm%Xfb", hw.chipID);
960
961 sfb = smtc_alloc_fb_info(pdev, name);
962
963 if (!sfb)
964 goto failed;
965 /* Jason (08/13/2009)
966 * Store fb_info to be further used when suspending and resuming
967 */
968 pci_set_drvdata(pdev, sfb);
969
970 sm7xx_init_hw();
971
972 /*get mode parameter from smtc_screen_info */
973 if (smtc_screen_info.lfb_width != 0) {
974 sfb->fb.var.xres = smtc_screen_info.lfb_width;
975 sfb->fb.var.yres = smtc_screen_info.lfb_height;
976 sfb->fb.var.bits_per_pixel = smtc_screen_info.lfb_depth;
977 } else {
978 /* default resolution 1024x600 16bit mode */
979 sfb->fb.var.xres = SCREEN_X_RES;
980 sfb->fb.var.yres = SCREEN_Y_RES;
981 sfb->fb.var.bits_per_pixel = SCREEN_BPP;
982 }
983
984#ifdef __BIG_ENDIAN
985 if (sfb->fb.var.bits_per_pixel == 24)
986 sfb->fb.var.bits_per_pixel = (smtc_screen_info.lfb_depth = 32);
987#endif
988 /* Map address and memory detection */
989 pFramebufferPhysical = pci_resource_start(pdev, 0);
990 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw.chipRevID);
991
992 switch (hw.chipID) {
993 case 0x710:
994 case 0x712:
995 sfb->fb.fix.mmio_start = pFramebufferPhysical + 0x00400000;
996 sfb->fb.fix.mmio_len = 0x00400000;
997 smem_size = SM712_VIDEOMEMORYSIZE;
998#ifdef __BIG_ENDIAN
999 hw.m_pLFB = (smtc_VRAMBaseAddress =
1000 ioremap(pFramebufferPhysical, 0x00c00000));
1001#else
1002 hw.m_pLFB = (smtc_VRAMBaseAddress =
1003 ioremap(pFramebufferPhysical, 0x00800000));
1004#endif
1005 hw.m_pMMIO = (smtc_RegBaseAddress =
1006 smtc_VRAMBaseAddress + 0x00700000);
1007 smtc_2DBaseAddress = (hw.m_pDPR =
1008 smtc_VRAMBaseAddress + 0x00408000);
1009 smtc_2Ddataport = smtc_VRAMBaseAddress + DE_DATA_PORT_712;
1010 hw.m_pVPR = hw.m_pLFB + 0x0040c000;
1011#ifdef __BIG_ENDIAN
1012 if (sfb->fb.var.bits_per_pixel == 32) {
1013 smtc_VRAMBaseAddress += 0x800000;
1014 hw.m_pLFB += 0x800000;
1015 printk(KERN_INFO
1016 "\nsmtc_VRAMBaseAddress=%p hw.m_pLFB=%p\n",
1017 smtc_VRAMBaseAddress, hw.m_pLFB);
1018 }
1019#endif
1020 if (!smtc_RegBaseAddress) {
1021 printk(KERN_INFO
1022 "%s: unable to map memory mapped IO\n",
1023 sfb->fb.fix.id);
1024 return -ENOMEM;
1025 }
1026
1027 /* set MCLK = 14.31818 * (0x16 / 0x2) */
1028 smtc_seqw(0x6a, 0x16);
1029 smtc_seqw(0x6b, 0x02);
1030 smtc_seqw(0x62, 0x3e);
1031 /* enable PCI burst */
1032 smtc_seqw(0x17, 0x20);
1033 /* enable word swap */
1034#ifdef __BIG_ENDIAN
1035 if (sfb->fb.var.bits_per_pixel == 32)
1036 smtc_seqw(0x17, 0x30);
1037#endif
1038#ifdef CONFIG_FB_SM7XX_ACCEL
1039 smtc_2Dacceleration = 1;
1040#endif
1041 break;
1042 case 0x720:
1043 sfb->fb.fix.mmio_start = pFramebufferPhysical;
1044 sfb->fb.fix.mmio_len = 0x00200000;
1045 smem_size = SM722_VIDEOMEMORYSIZE;
1046 smtc_2DBaseAddress = (hw.m_pDPR =
1047 ioremap(pFramebufferPhysical, 0x00a00000));
1048 hw.m_pLFB = (smtc_VRAMBaseAddress =
1049 smtc_2DBaseAddress + 0x00200000);
1050 hw.m_pMMIO = (smtc_RegBaseAddress =
1051 smtc_2DBaseAddress + 0x000c0000);
1052 smtc_2Ddataport = smtc_2DBaseAddress + DE_DATA_PORT_722;
1053 hw.m_pVPR = smtc_2DBaseAddress + 0x800;
1054
1055 smtc_seqw(0x62, 0xff);
1056 smtc_seqw(0x6a, 0x0d);
1057 smtc_seqw(0x6b, 0x02);
1058 smtc_2Dacceleration = 0;
1059 break;
1060 default:
1061 printk(KERN_INFO
1062 "No valid Silicon Motion display chip was detected!\n");
1063
1064 smtc_free_fb_info(sfb);
1065 return err;
1066 }
1067
1068 /* can support 32 bpp */
1069 if (15 == sfb->fb.var.bits_per_pixel)
1070 sfb->fb.var.bits_per_pixel = 16;
1071
1072 sfb->fb.var.xres_virtual = sfb->fb.var.xres;
1073 sfb->fb.var.yres_virtual = sfb->fb.var.yres;
1074 err = smtc_map_smem(sfb, pdev, smem_size);
1075 if (err)
1076 goto failed;
1077
1078 smtcfb_setmode(sfb);
1079 /* Primary display starting from 0 postion */
1080 hw.BaseAddressInVRAM = 0;
1081 sfb->fb.par = &hw;
1082
1083 err = register_framebuffer(&sfb->fb);
1084 if (err < 0)
1085 goto failed;
1086
1087 printk(KERN_INFO "Silicon Motion SM%X Rev%X primary display mode"
1088 "%dx%d-%d Init Complete.\n", hw.chipID, hw.chipRevID,
1089 sfb->fb.var.xres, sfb->fb.var.yres,
1090 sfb->fb.var.bits_per_pixel);
1091
1092 return 0;
1093
1094 failed:
1095 printk(KERN_INFO "Silicon Motion, Inc. primary display init fail\n");
1096
1097 smtc_unmap_smem(sfb);
1098 smtc_unmap_mmio(sfb);
1099 smtc_free_fb_info(sfb);
1100
1101 return err;
1102}
1103
1104
1105/* Jason (08/11/2009) PCI_DRV wrapper essential structs */
1106static struct pci_device_id smtcfb_pci_table[] = {
1107 {0x126f, 0x710, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1108 {0x126f, 0x712, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1109 {0x126f, 0x720, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1110 {0,}
1111};
1112
1113
1114/* Jason (08/14/2009)
1115 * do some clean up when the driver module is removed
1116 */
1117static void __devexit smtcfb_pci_remove(struct pci_dev *pdev)
1118{
1119 struct smtcfb_info *sfb;
1120
1121 sfb = pci_get_drvdata(pdev);
1122 pci_set_drvdata(pdev, NULL);
1123 smtc_unmap_smem(sfb);
1124 smtc_unmap_mmio(sfb);
1125 unregister_framebuffer(&sfb->fb);
1126 smtc_free_fb_info(sfb);
1127}
1128
1129/* Jason (08/14/2009)
1130 * suspend function, called when the suspend event is triggered
1131 */
1132static int __maybe_unused smtcfb_suspend(struct pci_dev *pdev, pm_message_t msg)
1133{
1134 struct smtcfb_info *sfb;
1135 int retv;
1136
1137 sfb = pci_get_drvdata(pdev);
1138
1139 /* set the hw in sleep mode use externel clock and self memory refresh
1140 * so that we can turn off internal PLLs later on
1141 */
1142 smtc_seqw(0x20, (smtc_seqr(0x20) | 0xc0));
1143 smtc_seqw(0x69, (smtc_seqr(0x69) & 0xf7));
1144
1145 switch (msg.event) {
1146 case PM_EVENT_FREEZE:
1147 case PM_EVENT_PRETHAW:
1148 pdev->dev.power.power_state = msg;
1149 return 0;
1150 }
1151
1152 /* when doing suspend, call fb apis and pci apis */
1153 if (msg.event == PM_EVENT_SUSPEND) {
1154 acquire_console_sem();
1155 fb_set_suspend(&sfb->fb, 1);
1156 release_console_sem();
1157 retv = pci_save_state(pdev);
1158 pci_disable_device(pdev);
1159 retv = pci_choose_state(pdev, msg);
1160 retv = pci_set_power_state(pdev, retv);
1161 }
1162
1163 pdev->dev.power.power_state = msg;
1164
1165 /* additionaly turn off all function blocks including internal PLLs */
1166 smtc_seqw(0x21, 0xff);
1167
1168 return 0;
1169}
1170
1171static int __maybe_unused smtcfb_resume(struct pci_dev *pdev)
1172{
1173 struct smtcfb_info *sfb;
1174 int retv;
1175
1176 sfb = pci_get_drvdata(pdev);
1177
1178 /* when resuming, restore pci data and fb cursor */
1179 if (pdev->dev.power.power_state.event != PM_EVENT_FREEZE) {
1180 retv = pci_set_power_state(pdev, PCI_D0);
1181 retv = pci_restore_state(pdev);
1182 if (pci_enable_device(pdev))
1183 return -1;
1184 pci_set_master(pdev);
1185 }
1186
1187 /* reinit hardware */
1188 sm7xx_init_hw();
1189 switch (hw.chipID) {
1190 case 0x710:
1191 case 0x712:
1192 /* set MCLK = 14.31818 * (0x16 / 0x2) */
1193 smtc_seqw(0x6a, 0x16);
1194 smtc_seqw(0x6b, 0x02);
1195 smtc_seqw(0x62, 0x3e);
1196 /* enable PCI burst */
1197 smtc_seqw(0x17, 0x20);
1198#ifdef __BIG_ENDIAN
1199 if (sfb->fb.var.bits_per_pixel == 32)
1200 smtc_seqw(0x17, 0x30);
1201#endif
1202 break;
1203 case 0x720:
1204 smtc_seqw(0x62, 0xff);
1205 smtc_seqw(0x6a, 0x0d);
1206 smtc_seqw(0x6b, 0x02);
1207 break;
1208 }
1209
1210 smtc_seqw(0x34, (smtc_seqr(0x34) | 0xc0));
1211 smtc_seqw(0x33, ((smtc_seqr(0x33) | 0x08) & 0xfb));
1212
1213 smtcfb_setmode(sfb);
1214
1215 acquire_console_sem();
1216 fb_set_suspend(&sfb->fb, 0);
1217 release_console_sem();
1218
1219 return 0;
1220}
1221
1222/* Jason (08/13/2009)
1223 * pci_driver struct used to wrap the original driver
1224 * so that it can be registered into the kernel and
1225 * the proper method would be called when suspending and resuming
1226 */
1227static struct pci_driver smtcfb_driver = {
1228 .name = "smtcfb",
1229 .id_table = smtcfb_pci_table,
1230 .probe = smtcfb_pci_probe,
1231 .remove = __devexit_p(smtcfb_pci_remove),
1232#ifdef CONFIG_PM
1233 .suspend = smtcfb_suspend,
1234 .resume = smtcfb_resume,
1235#endif
1236};
1237
1238static int __init smtcfb_init(void)
1239{
1240 return pci_register_driver(&smtcfb_driver);
1241}
1242
1243static void __exit smtcfb_exit(void)
1244{
1245 pci_unregister_driver(&smtcfb_driver);
1246}
1247
1248module_init(smtcfb_init);
1249module_exit(smtcfb_exit);
1250
1251MODULE_AUTHOR("Siliconmotion ");
1252MODULE_DESCRIPTION("Framebuffer driver for SMI Graphic Cards");
1253MODULE_LICENSE("GPL");
diff --git a/drivers/staging/sm7xx/smtcfb.h b/drivers/staging/sm7xx/smtcfb.h
new file mode 100644
index 00000000000..7f2c3413821
--- /dev/null
+++ b/drivers/staging/sm7xx/smtcfb.h
@@ -0,0 +1,793 @@
1/*
2 * Silicon Motion SM712 frame buffer device
3 *
4 * Copyright (C) 2006 Silicon Motion Technology Corp.
5 * Authors: Ge Wang, gewang@siliconmotion.com
6 * Boyod boyod.yang@siliconmotion.com.cn
7 *
8 * Copyright (C) 2009 Lemote, Inc.
9 * Author: Wu Zhangjin, wuzj@lemote.com
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file COPYING in the main directory of this archive for
13 * more details.
14 */
15
16#define SMTC_LINUX_FB_VERSION "version 0.11.2619.21.01 July 27, 2008"
17
18#define NR_PALETTE 256
19#define NR_RGB 2
20
21#define FB_ACCEL_SMI_LYNX 88
22
23#ifdef __BIG_ENDIAN
24#define PC_VGA 0
25#else
26#define PC_VGA 1
27#endif
28
29#define SCREEN_X_RES 1024
30#define SCREEN_Y_RES 600
31#define SCREEN_BPP 16
32
33#ifndef FIELD_OFFSET
34#define FIELD_OFSFET(type, field) \
35 ((unsigned long) (PUCHAR) & (((type *)0)->field))
36#endif
37
38/*Assume SM712 graphics chip has 4MB VRAM */
39#define SM712_VIDEOMEMORYSIZE 0x00400000
40/*Assume SM722 graphics chip has 8MB VRAM */
41#define SM722_VIDEOMEMORYSIZE 0x00800000
42
43#define dac_reg (0x3c8)
44#define dac_val (0x3c9)
45
46extern char *smtc_RegBaseAddress;
47#define smtc_mmiowb(dat, reg) writeb(dat, smtc_RegBaseAddress + reg)
48#define smtc_mmioww(dat, reg) writew(dat, smtc_RegBaseAddress + reg)
49#define smtc_mmiowl(dat, reg) writel(dat, smtc_RegBaseAddress + reg)
50
51#define smtc_mmiorb(reg) readb(smtc_RegBaseAddress + reg)
52#define smtc_mmiorw(reg) readw(smtc_RegBaseAddress + reg)
53#define smtc_mmiorl(reg) readl(smtc_RegBaseAddress + reg)
54
55#define SIZE_SR00_SR04 (0x04 - 0x00 + 1)
56#define SIZE_SR10_SR24 (0x24 - 0x10 + 1)
57#define SIZE_SR30_SR75 (0x75 - 0x30 + 1)
58#define SIZE_SR80_SR93 (0x93 - 0x80 + 1)
59#define SIZE_SRA0_SRAF (0xAF - 0xA0 + 1)
60#define SIZE_GR00_GR08 (0x08 - 0x00 + 1)
61#define SIZE_AR00_AR14 (0x14 - 0x00 + 1)
62#define SIZE_CR00_CR18 (0x18 - 0x00 + 1)
63#define SIZE_CR30_CR4D (0x4D - 0x30 + 1)
64#define SIZE_CR90_CRA7 (0xA7 - 0x90 + 1)
65#define SIZE_VPR (0x6C + 1)
66#define SIZE_DPR (0x44 + 1)
67
68static inline void smtc_crtcw(int reg, int val)
69{
70 smtc_mmiowb(reg, 0x3d4);
71 smtc_mmiowb(val, 0x3d5);
72}
73
74static inline unsigned int smtc_crtcr(int reg)
75{
76 smtc_mmiowb(reg, 0x3d4);
77 return smtc_mmiorb(0x3d5);
78}
79
80static inline void smtc_grphw(int reg, int val)
81{
82 smtc_mmiowb(reg, 0x3ce);
83 smtc_mmiowb(val, 0x3cf);
84}
85
86static inline unsigned int smtc_grphr(int reg)
87{
88 smtc_mmiowb(reg, 0x3ce);
89 return smtc_mmiorb(0x3cf);
90}
91
92static inline void smtc_attrw(int reg, int val)
93{
94 smtc_mmiorb(0x3da);
95 smtc_mmiowb(reg, 0x3c0);
96 smtc_mmiorb(0x3c1);
97 smtc_mmiowb(val, 0x3c0);
98}
99
100static inline void smtc_seqw(int reg, int val)
101{
102 smtc_mmiowb(reg, 0x3c4);
103 smtc_mmiowb(val, 0x3c5);
104}
105
106static inline unsigned int smtc_seqr(int reg)
107{
108 smtc_mmiowb(reg, 0x3c4);
109 return smtc_mmiorb(0x3c5);
110}
111
112/* The next structure holds all information relevant for a specific video mode.
113 */
114
115struct ModeInit {
116 int mmSizeX;
117 int mmSizeY;
118 int bpp;
119 int hz;
120 unsigned char Init_MISC;
121 unsigned char Init_SR00_SR04[SIZE_SR00_SR04];
122 unsigned char Init_SR10_SR24[SIZE_SR10_SR24];
123 unsigned char Init_SR30_SR75[SIZE_SR30_SR75];
124 unsigned char Init_SR80_SR93[SIZE_SR80_SR93];
125 unsigned char Init_SRA0_SRAF[SIZE_SRA0_SRAF];
126 unsigned char Init_GR00_GR08[SIZE_GR00_GR08];
127 unsigned char Init_AR00_AR14[SIZE_AR00_AR14];
128 unsigned char Init_CR00_CR18[SIZE_CR00_CR18];
129 unsigned char Init_CR30_CR4D[SIZE_CR30_CR4D];
130 unsigned char Init_CR90_CRA7[SIZE_CR90_CRA7];
131};
132
133/**********************************************************************
134 SM712 Mode table.
135 **********************************************************************/
136struct ModeInit VGAMode[] = {
137 {
138 /* mode#0: 640 x 480 16Bpp 60Hz */
139 640, 480, 16, 60,
140 /* Init_MISC */
141 0xE3,
142 { /* Init_SR0_SR4 */
143 0x03, 0x01, 0x0F, 0x00, 0x0E,
144 },
145 { /* Init_SR10_SR24 */
146 0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
147 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
148 0xC4, 0x30, 0x02, 0x01, 0x01,
149 },
150 { /* Init_SR30_SR75 */
151 0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
152 0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
153 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
154 0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
155 0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
156 0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
157 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
158 0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
159 0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
160 },
161 { /* Init_SR80_SR93 */
162 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
163 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
164 0x00, 0x00, 0x00, 0x00,
165 },
166 { /* Init_SRA0_SRAF */
167 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
168 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
169 },
170 { /* Init_GR00_GR08 */
171 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
172 0xFF,
173 },
174 { /* Init_AR00_AR14 */
175 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
176 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
177 0x41, 0x00, 0x0F, 0x00, 0x00,
178 },
179 { /* Init_CR00_CR18 */
180 0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
181 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
182 0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
183 0xFF,
184 },
185 { /* Init_CR30_CR4D */
186 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
187 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
188 0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
189 0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
190 },
191 { /* Init_CR90_CRA7 */
192 0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
193 0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
194 0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
195 },
196 },
197 {
198 /* mode#1: 640 x 480 24Bpp 60Hz */
199 640, 480, 24, 60,
200 /* Init_MISC */
201 0xE3,
202 { /* Init_SR0_SR4 */
203 0x03, 0x01, 0x0F, 0x00, 0x0E,
204 },
205 { /* Init_SR10_SR24 */
206 0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
207 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
208 0xC4, 0x30, 0x02, 0x01, 0x01,
209 },
210 { /* Init_SR30_SR75 */
211 0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
212 0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
213 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
214 0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
215 0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
216 0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
217 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
218 0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
219 0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
220 },
221 { /* Init_SR80_SR93 */
222 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
223 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
224 0x00, 0x00, 0x00, 0x00,
225 },
226 { /* Init_SRA0_SRAF */
227 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
228 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
229 },
230 { /* Init_GR00_GR08 */
231 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
232 0xFF,
233 },
234 { /* Init_AR00_AR14 */
235 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
236 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
237 0x41, 0x00, 0x0F, 0x00, 0x00,
238 },
239 { /* Init_CR00_CR18 */
240 0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
241 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
242 0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
243 0xFF,
244 },
245 { /* Init_CR30_CR4D */
246 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
247 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
248 0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
249 0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
250 },
251 { /* Init_CR90_CRA7 */
252 0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
253 0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
254 0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
255 },
256 },
257 {
258 /* mode#0: 640 x 480 32Bpp 60Hz */
259 640, 480, 32, 60,
260 /* Init_MISC */
261 0xE3,
262 { /* Init_SR0_SR4 */
263 0x03, 0x01, 0x0F, 0x00, 0x0E,
264 },
265 { /* Init_SR10_SR24 */
266 0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
267 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
268 0xC4, 0x30, 0x02, 0x01, 0x01,
269 },
270 { /* Init_SR30_SR75 */
271 0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
272 0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
273 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
274 0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
275 0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
276 0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
277 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
278 0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
279 0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
280 },
281 { /* Init_SR80_SR93 */
282 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
283 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
284 0x00, 0x00, 0x00, 0x00,
285 },
286 { /* Init_SRA0_SRAF */
287 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
288 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
289 },
290 { /* Init_GR00_GR08 */
291 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
292 0xFF,
293 },
294 { /* Init_AR00_AR14 */
295 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
296 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
297 0x41, 0x00, 0x0F, 0x00, 0x00,
298 },
299 { /* Init_CR00_CR18 */
300 0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
301 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
302 0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
303 0xFF,
304 },
305 { /* Init_CR30_CR4D */
306 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
307 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
308 0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
309 0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
310 },
311 { /* Init_CR90_CRA7 */
312 0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
313 0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
314 0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
315 },
316 },
317
318 { /* mode#2: 800 x 600 16Bpp 60Hz */
319 800, 600, 16, 60,
320 /* Init_MISC */
321 0x2B,
322 { /* Init_SR0_SR4 */
323 0x03, 0x01, 0x0F, 0x03, 0x0E,
324 },
325 { /* Init_SR10_SR24 */
326 0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
327 0x99, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
328 0xC4, 0x30, 0x02, 0x01, 0x01,
329 },
330 { /* Init_SR30_SR75 */
331 0x34, 0x03, 0x20, 0x09, 0xC0, 0x24, 0x24, 0x24,
332 0x24, 0x24, 0x24, 0x24, 0x00, 0x00, 0x03, 0xFF,
333 0x00, 0xFC, 0x00, 0x00, 0x20, 0x38, 0x00, 0xFC,
334 0x20, 0x0C, 0x44, 0x20, 0x00, 0x24, 0x24, 0x24,
335 0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
336 0x04, 0x55, 0x59, 0x24, 0x24, 0x00, 0x00, 0x24,
337 0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
338 0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
339 0x02, 0x45, 0x30, 0x35, 0x40, 0x20,
340 },
341 { /* Init_SR80_SR93 */
342 0x00, 0x00, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x24,
343 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x24, 0x24,
344 0x00, 0x00, 0x00, 0x00,
345 },
346 { /* Init_SRA0_SRAF */
347 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
348 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
349 },
350 { /* Init_GR00_GR08 */
351 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
352 0xFF,
353 },
354 { /* Init_AR00_AR14 */
355 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
356 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
357 0x41, 0x00, 0x0F, 0x00, 0x00,
358 },
359 { /* Init_CR00_CR18 */
360 0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
361 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
362 0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
363 0xFF,
364 },
365 { /* Init_CR30_CR4D */
366 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
367 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
368 0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
369 0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
370 },
371 { /* Init_CR90_CRA7 */
372 0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
373 0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
374 0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
375 },
376 },
377 { /* mode#3: 800 x 600 24Bpp 60Hz */
378 800, 600, 24, 60,
379 0x2B,
380 { /* Init_SR0_SR4 */
381 0x03, 0x01, 0x0F, 0x03, 0x0E,
382 },
383 { /* Init_SR10_SR24 */
384 0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
385 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
386 0xC4, 0x30, 0x02, 0x01, 0x01,
387 },
388 { /* Init_SR30_SR75 */
389 0x36, 0x03, 0x20, 0x09, 0xC0, 0x36, 0x36, 0x36,
390 0x36, 0x36, 0x36, 0x36, 0x00, 0x00, 0x03, 0xFF,
391 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
392 0x20, 0x0C, 0x44, 0x20, 0x00, 0x36, 0x36, 0x36,
393 0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
394 0x04, 0x55, 0x59, 0x36, 0x36, 0x00, 0x00, 0x36,
395 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
396 0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
397 0x02, 0x45, 0x30, 0x30, 0x40, 0x20,
398 },
399 { /* Init_SR80_SR93 */
400 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x36,
401 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x36, 0x36,
402 0x00, 0x00, 0x00, 0x00,
403 },
404 { /* Init_SRA0_SRAF */
405 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
406 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
407 },
408 { /* Init_GR00_GR08 */
409 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
410 0xFF,
411 },
412 { /* Init_AR00_AR14 */
413 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
414 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
415 0x41, 0x00, 0x0F, 0x00, 0x00,
416 },
417 { /* Init_CR00_CR18 */
418 0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
419 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
420 0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
421 0xFF,
422 },
423 { /* Init_CR30_CR4D */
424 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
425 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
426 0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
427 0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
428 },
429 { /* Init_CR90_CRA7 */
430 0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
431 0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
432 0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
433 },
434 },
435 { /* mode#7: 800 x 600 32Bpp 60Hz */
436 800, 600, 32, 60,
437 /* Init_MISC */
438 0x2B,
439 { /* Init_SR0_SR4 */
440 0x03, 0x01, 0x0F, 0x03, 0x0E,
441 },
442 { /* Init_SR10_SR24 */
443 0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
444 0x99, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
445 0xC4, 0x30, 0x02, 0x01, 0x01,
446 },
447 { /* Init_SR30_SR75 */
448 0x34, 0x03, 0x20, 0x09, 0xC0, 0x24, 0x24, 0x24,
449 0x24, 0x24, 0x24, 0x24, 0x00, 0x00, 0x03, 0xFF,
450 0x00, 0xFC, 0x00, 0x00, 0x20, 0x38, 0x00, 0xFC,
451 0x20, 0x0C, 0x44, 0x20, 0x00, 0x24, 0x24, 0x24,
452 0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
453 0x04, 0x55, 0x59, 0x24, 0x24, 0x00, 0x00, 0x24,
454 0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
455 0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
456 0x02, 0x45, 0x30, 0x35, 0x40, 0x20,
457 },
458 { /* Init_SR80_SR93 */
459 0x00, 0x00, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x24,
460 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x24, 0x24,
461 0x00, 0x00, 0x00, 0x00,
462 },
463 { /* Init_SRA0_SRAF */
464 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
465 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
466 },
467 { /* Init_GR00_GR08 */
468 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
469 0xFF,
470 },
471 { /* Init_AR00_AR14 */
472 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
473 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
474 0x41, 0x00, 0x0F, 0x00, 0x00,
475 },
476 { /* Init_CR00_CR18 */
477 0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
478 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
479 0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
480 0xFF,
481 },
482 { /* Init_CR30_CR4D */
483 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
484 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
485 0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
486 0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
487 },
488 { /* Init_CR90_CRA7 */
489 0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
490 0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
491 0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
492 },
493 },
494 /* We use 1024x768 table to light 1024x600 panel for lemote */
495 { /* mode#4: 1024 x 600 16Bpp 60Hz */
496 1024, 600, 16, 60,
497 /* Init_MISC */
498 0xEB,
499 { /* Init_SR0_SR4 */
500 0x03, 0x01, 0x0F, 0x00, 0x0E,
501 },
502 { /* Init_SR10_SR24 */
503 0xC8, 0x40, 0x14, 0x60, 0x00, 0x0A, 0x17, 0x20,
504 0x51, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
505 0xC4, 0x30, 0x02, 0x00, 0x01,
506 },
507 { /* Init_SR30_SR75 */
508 0x22, 0x03, 0x24, 0x09, 0xC0, 0x22, 0x22, 0x22,
509 0x22, 0x22, 0x22, 0x22, 0x00, 0x00, 0x03, 0xFF,
510 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
511 0x20, 0x0C, 0x44, 0x20, 0x00, 0x22, 0x22, 0x22,
512 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
513 0x00, 0x60, 0x59, 0x22, 0x22, 0x00, 0x00, 0x22,
514 0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
515 0x50, 0x03, 0x16, 0x02, 0x0D, 0x82, 0x09, 0x02,
516 0x04, 0x45, 0x3F, 0x30, 0x40, 0x20,
517 },
518 { /* Init_SR80_SR93 */
519 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
520 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
521 0x00, 0x00, 0x00, 0x00,
522 },
523 { /* Init_SRA0_SRAF */
524 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
525 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
526 },
527 { /* Init_GR00_GR08 */
528 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
529 0xFF,
530 },
531 { /* Init_AR00_AR14 */
532 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
533 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
534 0x41, 0x00, 0x0F, 0x00, 0x00,
535 },
536 { /* Init_CR00_CR18 */
537 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
538 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
539 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
540 0xFF,
541 },
542 { /* Init_CR30_CR4D */
543 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
544 0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
545 0xA3, 0x7F, 0x00, 0x82, 0x0b, 0x6f, 0x57, 0x00,
546 0x5c, 0x0f, 0xE0, 0xe0, 0x7F, 0x57,
547 },
548 { /* Init_CR90_CRA7 */
549 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
550 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
551 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
552 },
553 },
554 { /* mode#5: 1024 x 768 24Bpp 60Hz */
555 1024, 768, 24, 60,
556 /* Init_MISC */
557 0xEB,
558 { /* Init_SR0_SR4 */
559 0x03, 0x01, 0x0F, 0x03, 0x0E,
560 },
561 { /* Init_SR10_SR24 */
562 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
563 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
564 0xC4, 0x30, 0x02, 0x01, 0x01,
565 },
566 { /* Init_SR30_SR75 */
567 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
568 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
569 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
570 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
571 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
572 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
573 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
574 0x50, 0x03, 0x74, 0x14, 0x3B, 0x0D, 0x09, 0x02,
575 0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
576 },
577 { /* Init_SR80_SR93 */
578 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
579 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
580 0x00, 0x00, 0x00, 0x00,
581 },
582 { /* Init_SRA0_SRAF */
583 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
584 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
585 },
586 { /* Init_GR00_GR08 */
587 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
588 0xFF,
589 },
590 { /* Init_AR00_AR14 */
591 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
592 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
593 0x41, 0x00, 0x0F, 0x00, 0x00,
594 },
595 { /* Init_CR00_CR18 */
596 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
597 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
598 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
599 0xFF,
600 },
601 { /* Init_CR30_CR4D */
602 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
603 0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
604 0xA3, 0x7F, 0x00, 0x86, 0x15, 0x24, 0xFF, 0x00,
605 0x01, 0x07, 0xE5, 0x20, 0x7F, 0xFF,
606 },
607 { /* Init_CR90_CRA7 */
608 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
609 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
610 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
611 },
612 },
613 { /* mode#4: 1024 x 768 32Bpp 60Hz */
614 1024, 768, 32, 60,
615 /* Init_MISC */
616 0xEB,
617 { /* Init_SR0_SR4 */
618 0x03, 0x01, 0x0F, 0x03, 0x0E,
619 },
620 { /* Init_SR10_SR24 */
621 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
622 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
623 0xC4, 0x32, 0x02, 0x01, 0x01,
624 },
625 { /* Init_SR30_SR75 */
626 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
627 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
628 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
629 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
630 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
631 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
632 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
633 0x50, 0x03, 0x74, 0x14, 0x3B, 0x0D, 0x09, 0x02,
634 0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
635 },
636 { /* Init_SR80_SR93 */
637 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
638 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
639 0x00, 0x00, 0x00, 0x00,
640 },
641 { /* Init_SRA0_SRAF */
642 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
643 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
644 },
645 { /* Init_GR00_GR08 */
646 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
647 0xFF,
648 },
649 { /* Init_AR00_AR14 */
650 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
651 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
652 0x41, 0x00, 0x0F, 0x00, 0x00,
653 },
654 { /* Init_CR00_CR18 */
655 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
656 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
657 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
658 0xFF,
659 },
660 { /* Init_CR30_CR4D */
661 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
662 0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
663 0xA3, 0x7F, 0x00, 0x86, 0x15, 0x24, 0xFF, 0x00,
664 0x01, 0x07, 0xE5, 0x20, 0x7F, 0xFF,
665 },
666 { /* Init_CR90_CRA7 */
667 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
668 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
669 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
670 },
671 },
672 { /* mode#6: 320 x 240 16Bpp 60Hz */
673 320, 240, 16, 60,
674 /* Init_MISC */
675 0xEB,
676 { /* Init_SR0_SR4 */
677 0x03, 0x01, 0x0F, 0x03, 0x0E,
678 },
679 { /* Init_SR10_SR24 */
680 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
681 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
682 0xC4, 0x32, 0x02, 0x01, 0x01,
683 },
684 { /* Init_SR30_SR75 */
685 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
686 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
687 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
688 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
689 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
690 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
691 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
692 0x50, 0x03, 0x74, 0x14, 0x08, 0x43, 0x08, 0x43,
693 0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
694 },
695 { /* Init_SR80_SR93 */
696 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
697 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
698 0x00, 0x00, 0x00, 0x00,
699 },
700 { /* Init_SRA0_SRAF */
701 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
702 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
703 },
704 { /* Init_GR00_GR08 */
705 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
706 0xFF,
707 },
708 { /* Init_AR00_AR14 */
709 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
710 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
711 0x41, 0x00, 0x0F, 0x00, 0x00,
712 },
713 { /* Init_CR00_CR18 */
714 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
715 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
716 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
717 0xFF,
718 },
719 { /* Init_CR30_CR4D */
720 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
721 0x00, 0x00, 0x30, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
722 0x2E, 0x27, 0x00, 0x2b, 0x0c, 0x0F, 0xEF, 0x00,
723 0xFe, 0x0f, 0x01, 0xC0, 0x27, 0xEF,
724 },
725 { /* Init_CR90_CRA7 */
726 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
727 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
728 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
729 },
730 },
731
732 { /* mode#8: 320 x 240 32Bpp 60Hz */
733 320, 240, 32, 60,
734 /* Init_MISC */
735 0xEB,
736 { /* Init_SR0_SR4 */
737 0x03, 0x01, 0x0F, 0x03, 0x0E,
738 },
739 { /* Init_SR10_SR24 */
740 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
741 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
742 0xC4, 0x32, 0x02, 0x01, 0x01,
743 },
744 { /* Init_SR30_SR75 */
745 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
746 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
747 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
748 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
749 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
750 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
751 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
752 0x50, 0x03, 0x74, 0x14, 0x08, 0x43, 0x08, 0x43,
753 0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
754 },
755 { /* Init_SR80_SR93 */
756 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
757 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
758 0x00, 0x00, 0x00, 0x00,
759 },
760 { /* Init_SRA0_SRAF */
761 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
762 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
763 },
764 { /* Init_GR00_GR08 */
765 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
766 0xFF,
767 },
768 { /* Init_AR00_AR14 */
769 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
770 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
771 0x41, 0x00, 0x0F, 0x00, 0x00,
772 },
773 { /* Init_CR00_CR18 */
774 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
775 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
776 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
777 0xFF,
778 },
779 { /* Init_CR30_CR4D */
780 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
781 0x00, 0x00, 0x30, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
782 0x2E, 0x27, 0x00, 0x2b, 0x0c, 0x0F, 0xEF, 0x00,
783 0xFe, 0x0f, 0x01, 0xC0, 0x27, 0xEF,
784 },
785 { /* Init_CR90_CRA7 */
786 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
787 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
788 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
789 },
790 },
791};
792
793#define numVGAModes (sizeof(VGAMode) / sizeof(struct ModeInit))
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-24 04:59:12 -0400