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authorAndy Green <andy.green@linaro.org>2011-07-24 15:59:38 -0400
committerPaolo Pisati <paolo.pisati@canonical.com>2012-08-17 04:18:22 -0400
commitc21ba296482e71ff1bf2af1afe361a1ca25c7ea9 (patch)
tree6bff0cc4210c4690b44df96884f360658c14fdac
parent1e59991833588e0fd12e0832374534fbab920f5a (diff)
Subject: [PATCH 057/104] mfd: twl - twl6030 enable all irq sources (temp fix)
This patch enables all twl6030 interrupt sources by default, allowing boards seeing a marginal overcurrent to acknowledge it. The correct solution is to find the cause of high current from one of the regulators seen on all Panda boards probably and reduce the load, but this patch will get around the spontaneous OFF seen on Panda for now. Signed-off-by: Andy Green <andy.green@linaro.org>
-rw-r--r--drivers/mfd/twl6030-irq.c12
1 files changed, 9 insertions, 3 deletions
diff --git a/drivers/mfd/twl6030-irq.c b/drivers/mfd/twl6030-irq.c
index b0563b66d10..8d212a78ac1 100644
--- a/drivers/mfd/twl6030-irq.c
+++ b/drivers/mfd/twl6030-irq.c
@@ -127,6 +127,7 @@ static int twl6030_irq_thread(void *data)
127 127
128 128
129 sts.bytes[3] = 0; /* Only 24 bits are valid*/ 129 sts.bytes[3] = 0; /* Only 24 bits are valid*/
130 pr_info("twl6030: Interrupt status 0x%06x\n", sts.int_sts);
130 131
131 /* 132 /*
132 * Since VBUS status bit is not reliable for VBUS disconnect 133 * Since VBUS status bit is not reliable for VBUS disconnect
@@ -309,13 +310,18 @@ int twl6030_init_irq(int irq_num, unsigned irq_base, unsigned irq_end)
309 u8 mask[4]; 310 u8 mask[4];
310 311
311 static struct irq_chip twl6030_irq_chip; 312 static struct irq_chip twl6030_irq_chip;
312 mask[1] = 0xFF; 313 mask[1] = 0;
313 mask[2] = 0xFF; 314 mask[2] = 0;
314 mask[3] = 0xFF; 315 mask[3] = 0;
315 ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0], 316 ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
316 REG_INT_MSK_LINE_A, 3); /* MASK ALL INT LINES */ 317 REG_INT_MSK_LINE_A, 3); /* MASK ALL INT LINES */
317 ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0], 318 ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
318 REG_INT_MSK_STS_A, 3); /* MASK ALL INT STS */ 319 REG_INT_MSK_STS_A, 3); /* MASK ALL INT STS */
320
321 mask[1] = 0xFF;
322 mask[2] = 0xFF;
323 mask[3] = 0xFF;
324
319 ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0], 325 ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
320 REG_INT_STS_A, 3); /* clear INT_STS_A,B,C */ 326 REG_INT_STS_A, 3); /* clear INT_STS_A,B,C */
321 327