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authorGirish K S <girish.shivananjappa@linaro.org>2011-08-26 05:28:18 -0400
committerHerton Ronaldo Krzesinski <herton.krzesinski@canonical.com>2011-10-17 13:32:38 -0400
commita3b17b001ec6a4da8ffff2ffeef96d56a6af11cb (patch)
treef780b312914f8c2c1446daae35bfe9dcb531a006
parentb16fb071498fd8e6b8016cba5aefa43c0ee6c8f3 (diff)
mmc: sdhci-s3c: Fix mmc card I/O problem
BugLink: http://bugs.launchpad.net/bugs/868628 commit 49bb1e619568ec84785ceb366f07db2a6f0b64cc upstream. This patch fixes the problem in sdhci-s3c host driver for Samsung Soc's. During the card identification stage the mmc core driver enumerates for the best bus width in combination with the highest available data rate. It starts enumerating from the highest bus width (8) to lowest width (1). In case of few MMC cards the 4-bit bus enumeration fails and tries the 1-bit bus enumeration. When switched to 1-bit bus mode the host driver has to clear the previous bus width setting and apply the new setting. The current patch will clear the previous bus mode and apply the new mode setting. Signed-off-by: Girish K S <girish.shivananjappa@linaro.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-rw-r--r--drivers/mmc/host/sdhci-s3c.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
index 69e3ee321eb..8cd999f4af5 100644
--- a/drivers/mmc/host/sdhci-s3c.c
+++ b/drivers/mmc/host/sdhci-s3c.c
@@ -301,6 +301,8 @@ static int sdhci_s3c_platform_8bit_width(struct sdhci_host *host, int width)
301 ctrl &= ~SDHCI_CTRL_8BITBUS; 301 ctrl &= ~SDHCI_CTRL_8BITBUS;
302 break; 302 break;
303 default: 303 default:
304 ctrl &= ~SDHCI_CTRL_4BITBUS;
305 ctrl &= ~SDHCI_CTRL_8BITBUS;
304 break; 306 break;
305 } 307 }
306 308