diff options
| author | Sreedhara DS <sreedhara.ds@intel.com> | 2010-07-26 05:03:10 -0400 |
|---|---|---|
| committer | Matthew Garrett <mjg@redhat.com> | 2010-08-03 09:50:30 -0400 |
| commit | 804f8681a99da2aa49bd7f0dab3750848d1ab1bc (patch) | |
| tree | 76bfafe233b4fd93682bbd0a467cce9afc2c7e8f | |
| parent | e3359fd5d2d97f4d3bca5778e35427b07a2b1060 (diff) | |
Remove indirect read write api support.
The firmware of production devices does not support this interface so this
is dead code.
Signed-off-by: Sreedhara DS <sreedhara.ds@intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Matthew Garrett <mjg@redhat.com>
| -rw-r--r-- | arch/x86/include/asm/intel_scu_ipc.h | 14 | ||||
| -rw-r--r-- | drivers/platform/x86/intel_scu_ipc.c | 82 |
2 files changed, 0 insertions, 96 deletions
diff --git a/arch/x86/include/asm/intel_scu_ipc.h b/arch/x86/include/asm/intel_scu_ipc.h index 03200452069..29f66793cc5 100644 --- a/arch/x86/include/asm/intel_scu_ipc.h +++ b/arch/x86/include/asm/intel_scu_ipc.h | |||
| @@ -34,20 +34,6 @@ int intel_scu_ipc_writev(u16 *addr, u8 *data, int len); | |||
| 34 | /* Update single register based on the mask */ | 34 | /* Update single register based on the mask */ |
| 35 | int intel_scu_ipc_update_register(u16 addr, u8 data, u8 mask); | 35 | int intel_scu_ipc_update_register(u16 addr, u8 data, u8 mask); |
| 36 | 36 | ||
| 37 | /* | ||
| 38 | * Indirect register read | ||
| 39 | * Can be used when SCCB(System Controller Configuration Block) register | ||
| 40 | * HRIM(Honor Restricted IPC Messages) is set (bit 23) | ||
| 41 | */ | ||
| 42 | int intel_scu_ipc_register_read(u32 addr, u32 *data); | ||
| 43 | |||
| 44 | /* | ||
| 45 | * Indirect register write | ||
| 46 | * Can be used when SCCB(System Controller Configuration Block) register | ||
| 47 | * HRIM(Honor Restricted IPC Messages) is set (bit 23) | ||
| 48 | */ | ||
| 49 | int intel_scu_ipc_register_write(u32 addr, u32 data); | ||
| 50 | |||
| 51 | /* Issue commands to the SCU with or without data */ | 37 | /* Issue commands to the SCU with or without data */ |
| 52 | int intel_scu_ipc_simple_command(int cmd, int sub); | 38 | int intel_scu_ipc_simple_command(int cmd, int sub); |
| 53 | int intel_scu_ipc_command(int cmd, int sub, u32 *in, int inlen, | 39 | int intel_scu_ipc_command(int cmd, int sub, u32 *in, int inlen, |
diff --git a/drivers/platform/x86/intel_scu_ipc.c b/drivers/platform/x86/intel_scu_ipc.c index a0dc41e2773..fd78386cd04 100644 --- a/drivers/platform/x86/intel_scu_ipc.c +++ b/drivers/platform/x86/intel_scu_ipc.c | |||
| @@ -116,24 +116,6 @@ static inline void ipc_data_writel(u32 data, u32 offset) /* Write ipc data */ | |||
| 116 | } | 116 | } |
| 117 | 117 | ||
| 118 | /* | 118 | /* |
| 119 | * IPC destination Pointer (Write Only): | ||
| 120 | * Use content as pointer for destination write | ||
| 121 | */ | ||
| 122 | static inline void ipc_write_dptr(u32 data) /* Write dptr data */ | ||
| 123 | { | ||
| 124 | writel(data, ipcdev.ipc_base + 0x0C); | ||
| 125 | } | ||
| 126 | |||
| 127 | /* | ||
| 128 | * IPC Source Pointer (Write Only): | ||
| 129 | * Use content as pointer for read location | ||
| 130 | */ | ||
| 131 | static inline void ipc_write_sptr(u32 data) /* Write dptr data */ | ||
| 132 | { | ||
| 133 | writel(data, ipcdev.ipc_base + 0x08); | ||
| 134 | } | ||
| 135 | |||
| 136 | /* | ||
| 137 | * Status Register (Read Only): | 119 | * Status Register (Read Only): |
| 138 | * Driver will read this register to get the ready/busy status of the IPC | 120 | * Driver will read this register to get the ready/busy status of the IPC |
| 139 | * block and error status of the IPC command that was just processed by SCU | 121 | * block and error status of the IPC command that was just processed by SCU |
| @@ -414,70 +396,6 @@ int intel_scu_ipc_update_register(u16 addr, u8 bits, u8 mask) | |||
| 414 | EXPORT_SYMBOL(intel_scu_ipc_update_register); | 396 | EXPORT_SYMBOL(intel_scu_ipc_update_register); |
| 415 | 397 | ||
| 416 | /** | 398 | /** |
| 417 | * intel_scu_ipc_register_read - 32bit indirect read | ||
| 418 | * @addr: register address | ||
| 419 | * @value: 32bit value return | ||
| 420 | * | ||
| 421 | * Performs IA 32 bit indirect read, returns 0 on success, or an | ||
| 422 | * error code. | ||
| 423 | * | ||
| 424 | * Can be used when SCCB(System Controller Configuration Block) register | ||
| 425 | * HRIM(Honor Restricted IPC Messages) is set (bit 23) | ||
| 426 | * | ||
| 427 | * This function may sleep. Locking for SCU accesses is handled for | ||
| 428 | * the caller. | ||
| 429 | */ | ||
| 430 | int intel_scu_ipc_register_read(u32 addr, u32 *value) | ||
| 431 | { | ||
| 432 | u32 err = 0; | ||
| 433 | |||
| 434 | mutex_lock(&ipclock); | ||
| 435 | if (ipcdev.pdev == NULL) { | ||
| 436 | mutex_unlock(&ipclock); | ||
| 437 | return -ENODEV; | ||
| 438 | } | ||
| 439 | ipc_write_sptr(addr); | ||
| 440 | ipc_command(4 << 16 | IPC_CMD_INDIRECT_RD); | ||
| 441 | err = busy_loop(); | ||
| 442 | *value = ipc_data_readl(0); | ||
| 443 | mutex_unlock(&ipclock); | ||
| 444 | return err; | ||
| 445 | } | ||
| 446 | EXPORT_SYMBOL(intel_scu_ipc_register_read); | ||
| 447 | |||
| 448 | /** | ||
| 449 | * intel_scu_ipc_register_write - 32bit indirect write | ||
| 450 | * @addr: register address | ||
| 451 | * @value: 32bit value to write | ||
| 452 | * | ||
| 453 | * Performs IA 32 bit indirect write, returns 0 on success, or an | ||
| 454 | * error code. | ||
| 455 | * | ||
| 456 | * Can be used when SCCB(System Controller Configuration Block) register | ||
| 457 | * HRIM(Honor Restricted IPC Messages) is set (bit 23) | ||
| 458 | * | ||
| 459 | * This function may sleep. Locking for SCU accesses is handled for | ||
| 460 | * the caller. | ||
| 461 | */ | ||
| 462 | int intel_scu_ipc_register_write(u32 addr, u32 value) | ||
| 463 | { | ||
| 464 | u32 err = 0; | ||
| 465 | |||
| 466 | mutex_lock(&ipclock); | ||
| 467 | if (ipcdev.pdev == NULL) { | ||
| 468 | mutex_unlock(&ipclock); | ||
| 469 | return -ENODEV; | ||
| 470 | } | ||
| 471 | ipc_write_dptr(addr); | ||
| 472 | ipc_data_writel(value, 0); | ||
| 473 | ipc_command(4 << 16 | IPC_CMD_INDIRECT_WR); | ||
| 474 | err = busy_loop(); | ||
| 475 | mutex_unlock(&ipclock); | ||
| 476 | return err; | ||
| 477 | } | ||
| 478 | EXPORT_SYMBOL(intel_scu_ipc_register_write); | ||
| 479 | |||
| 480 | /** | ||
| 481 | * intel_scu_ipc_simple_command - send a simple command | 399 | * intel_scu_ipc_simple_command - send a simple command |
| 482 | * @cmd: command | 400 | * @cmd: command |
| 483 | * @sub: sub type | 401 | * @sub: sub type |
