powerpc/8xx: Add missing Guarded setting in DTLB Error.

only DTLB Miss did set this bit, DTLB Error needs too otherwise
the setting is lost when the page becomes dirty.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

1 files changed, 10 insertions, 3 deletions

diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index c00120d56f8..1a28ee8ca31 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -552,9 +552,16 @@ DARFixed:/* Return from dcbx instruction bug workaround, r10 holds value of DAR
          */
         ori     r11, r11, 1             /* Set valid bit in physical L2 page */
         DO_8xx_CPU6(0x3b80, r3)
-        mtspr   SPRN_MD_TWC, r11                /* Load pte table base address */
-        mfspr   r11, SPRN_MD_TWC                /* ....and get the pte address */
-        lwz     r10, 0(r11)             /* Get the pte */
+        mtspr   SPRN_MD_TWC, r11        /* Load pte table base address */
+        mfspr   r10, SPRN_MD_TWC        /* ....and get the pte address */
+        lwz     r10, 0(r10)             /* Get the pte */
+        /* Insert the Guarded flag into the TWC from the Linux PTE.
+         * It is bit 27 of both the Linux PTE and the TWC
+         */
+        rlwimi  r11, r10, 0, 27, 27
+        DO_8xx_CPU6(0x3b80, r3)
+        mtspr   SPRN_MD_TWC, r11
+        mfspr   r11, SPRN_MD_TWC        /* get the pte address again */
 
         ori     r10, r10, _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_HWWRITE
         stw     r10, 0(r11)             /* and update pte in table */