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authorLinus Torvalds <torvalds@linux-foundation.org>2011-03-19 01:31:05 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2011-03-19 01:31:05 -0400
commit2c1d2470c0c0992fae2cc0e04921f9e02a670a00 (patch)
tree7401f45d206c4173c34dc3b0ecce839e06da2c71
parent664322a4475236bd9900f2853a9b981a4377493f (diff)
parentddb7d1e975d224885397c002512ded987be3c3bc (diff)
Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-2.6-mn10300
* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-2.6-mn10300: MN10300: Clear ASB2364 peripheral interrupt masks before enabling interrupts MN10300: Fix the ASB2364 gdbport UART register defs MN10300: Fix ASB2364 FPGA register defs MN10300: Select GENERIC_HARDIRQS_NO_DEPRECATED MN10300: Select HAVE_GENERIC_HARDIRQS rather than GENERIC_HARDIRQS MN10300: Convert ASB2364 FPGA irq_chip to new functions MN10300: Convert ipi irq_chip to new functions MN10300: Convert serial irq_chip to new functions MN10300: Convert cpu irq_chips to new functions MN10300: Remove unused mn10300_intc_* functions MN10300: Remove stale irq_chip.end - V2 MN10300: Use clockevents_calc_mult_shift() MN10300: Use clocksource_register_hz() MN10300: Remove stale code
Diffstat
-rw-r--r--arch/mn10300/Kconfig18
-rw-r--r--arch/mn10300/include/asm/intctl-regs.h5
-rw-r--r--arch/mn10300/kernel/Makefile5
-rw-r--r--arch/mn10300/kernel/cevt-mn10300.c11
-rw-r--r--arch/mn10300/kernel/csrc-mn10300.c3
-rw-r--r--arch/mn10300/kernel/internal.h10
-rw-r--r--arch/mn10300/kernel/irq.c91
-rw-r--r--arch/mn10300/kernel/mn10300-serial.c16
-rw-r--r--arch/mn10300/kernel/smp.c30
-rw-r--r--arch/mn10300/kernel/time.c82
-rw-r--r--arch/mn10300/unit-asb2364/include/unit/fpga-regs.h2
-rw-r--r--arch/mn10300/unit-asb2364/include/unit/serial.h24
-rw-r--r--arch/mn10300/unit-asb2364/irq-fpga.c37
-rw-r--r--arch/mn10300/unit-asb2364/unit-init.c44
14 files changed, 159 insertions, 219 deletions
diff --git a/arch/mn10300/Kconfig b/arch/mn10300/Kconfig
index 243bfa23fd5..10971be4306 100644
--- a/arch/mn10300/Kconfig
+++ b/arch/mn10300/Kconfig
@@ -1,7 +1,8 @@
1config MN10300 1config MN10300
2 def_bool y 2 def_bool y
3 select HAVE_OPROFILE 3 select HAVE_OPROFILE
4 select GENERIC_HARDIRQS 4 select HAVE_GENERIC_HARDIRQS
5 select GENERIC_HARDIRQS_NO_DEPRECATED
5 6
6config AM33_2 7config AM33_2
7 def_bool n 8 def_bool n
@@ -53,21 +54,6 @@ config GENERIC_TIME
53config GENERIC_CLOCKEVENTS 54config GENERIC_CLOCKEVENTS
54 def_bool y 55 def_bool y
55 56
56config GENERIC_CLOCKEVENTS_BUILD
57 def_bool y
58 depends on GENERIC_CLOCKEVENTS
59
60config GENERIC_CLOCKEVENTS_BROADCAST
61 bool
62
63config CEVT_MN10300
64 def_bool y
65 depends on GENERIC_CLOCKEVENTS
66
67config CSRC_MN10300
68 def_bool y
69 depends on GENERIC_TIME
70
71config GENERIC_BUG 57config GENERIC_BUG
72 def_bool y 58 def_bool y
73 59
diff --git a/arch/mn10300/include/asm/intctl-regs.h b/arch/mn10300/include/asm/intctl-regs.h
index 585b708c2bc..d65bbeebe50 100644
--- a/arch/mn10300/include/asm/intctl-regs.h
+++ b/arch/mn10300/include/asm/intctl-regs.h
@@ -60,11 +60,6 @@
60 60
61#ifndef __ASSEMBLY__ 61#ifndef __ASSEMBLY__
62extern void set_intr_level(int irq, u16 level); 62extern void set_intr_level(int irq, u16 level);
63extern void mn10300_intc_set_level(unsigned int irq, unsigned int level);
64extern void mn10300_intc_clear(unsigned int irq);
65extern void mn10300_intc_set(unsigned int irq);
66extern void mn10300_intc_enable(unsigned int irq);
67extern void mn10300_intc_disable(unsigned int irq);
68extern void mn10300_set_lateack_irq_type(int irq); 63extern void mn10300_set_lateack_irq_type(int irq);
69#endif 64#endif
70 65
diff --git a/arch/mn10300/kernel/Makefile b/arch/mn10300/kernel/Makefile
index 8f5f1e81baf..a06a2e10051 100644
--- a/arch/mn10300/kernel/Makefile
+++ b/arch/mn10300/kernel/Makefile
@@ -8,7 +8,8 @@ fpu-obj-$(CONFIG_FPU) := fpu.o fpu-low.o
8 8
9obj-y := process.o signal.o entry.o traps.o irq.o \ 9obj-y := process.o signal.o entry.o traps.o irq.o \
10 ptrace.o setup.o time.o sys_mn10300.o io.o kthread.o \ 10 ptrace.o setup.o time.o sys_mn10300.o io.o kthread.o \
11 switch_to.o mn10300_ksyms.o kernel_execve.o $(fpu-obj-y) 11 switch_to.o mn10300_ksyms.o kernel_execve.o $(fpu-obj-y) \
12 csrc-mn10300.o cevt-mn10300.o
12 13
13obj-$(CONFIG_SMP) += smp.o smp-low.o 14obj-$(CONFIG_SMP) += smp.o smp-low.o
14 15
@@ -28,5 +29,3 @@ obj-$(CONFIG_MN10300_RTC) += rtc.o
28obj-$(CONFIG_PROFILE) += profile.o profile-low.o 29obj-$(CONFIG_PROFILE) += profile.o profile-low.o
29obj-$(CONFIG_MODULES) += module.o 30obj-$(CONFIG_MODULES) += module.o
30obj-$(CONFIG_KPROBES) += kprobes.o 31obj-$(CONFIG_KPROBES) += kprobes.o
31obj-$(CONFIG_CSRC_MN10300) += csrc-mn10300.o
32obj-$(CONFIG_CEVT_MN10300) += cevt-mn10300.o
diff --git a/arch/mn10300/kernel/cevt-mn10300.c b/arch/mn10300/kernel/cevt-mn10300.c
index d4cb535bf78..69cae026078 100644
--- a/arch/mn10300/kernel/cevt-mn10300.c
+++ b/arch/mn10300/kernel/cevt-mn10300.c
@@ -89,9 +89,10 @@ int __init init_clockevents(void)
89 cd->name = "Timestamp"; 89 cd->name = "Timestamp";
90 cd->features = CLOCK_EVT_FEAT_ONESHOT; 90 cd->features = CLOCK_EVT_FEAT_ONESHOT;
91 91
92 /* Calculate the min / max delta */ 92 /* Calculate shift/mult. We want to spawn at least 1 second */
93 clockevent_set_clock(cd, MN10300_JCCLK); 93 clockevents_calc_mult_shift(cd, MN10300_JCCLK, 1);
94 94
95 /* Calculate the min / max delta */
95 cd->max_delta_ns = clockevent_delta2ns(TMJCBR_MAX, cd); 96 cd->max_delta_ns = clockevent_delta2ns(TMJCBR_MAX, cd);
96 cd->min_delta_ns = clockevent_delta2ns(100, cd); 97 cd->min_delta_ns = clockevent_delta2ns(100, cd);
97 98
@@ -110,9 +111,9 @@ int __init init_clockevents(void)
110#if defined(CONFIG_SMP) && !defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) 111#if defined(CONFIG_SMP) && !defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
111 /* setup timer irq affinity so it only runs on this cpu */ 112 /* setup timer irq affinity so it only runs on this cpu */
112 { 113 {
113 struct irq_desc *desc; 114 struct irq_data *data;
114 desc = irq_to_desc(cd->irq); 115 data = irq_get_irq_data(cd->irq);
115 cpumask_copy(desc->affinity, cpumask_of(cpu)); 116 cpumask_copy(data->affinity, cpumask_of(cpu));
116 iact->flags |= IRQF_NOBALANCING; 117 iact->flags |= IRQF_NOBALANCING;
117 } 118 }
118#endif 119#endif
diff --git a/arch/mn10300/kernel/csrc-mn10300.c b/arch/mn10300/kernel/csrc-mn10300.c
index ba2f0c4d6e0..45644cf18c4 100644
--- a/arch/mn10300/kernel/csrc-mn10300.c
+++ b/arch/mn10300/kernel/csrc-mn10300.c
@@ -29,7 +29,6 @@ static struct clocksource clocksource_mn10300 = {
29int __init init_clocksource(void) 29int __init init_clocksource(void)
30{ 30{
31 startup_timestamp_counter(); 31 startup_timestamp_counter();
32 clocksource_set_clock(&clocksource_mn10300, MN10300_TSCCLK); 32 clocksource_register_hz(&clocksource_mn10300, MN10300_TSCCLK);
33 clocksource_register(&clocksource_mn10300);
34 return 0; 33 return 0;
35} 34}
diff --git a/arch/mn10300/kernel/internal.h b/arch/mn10300/kernel/internal.h
index 6a064ab5af0..ea946613f46 100644
--- a/arch/mn10300/kernel/internal.h
+++ b/arch/mn10300/kernel/internal.h
@@ -33,13 +33,3 @@ extern void mn10300_low_ipi_handler(void);
33 * time.c 33 * time.c
34 */ 34 */
35extern irqreturn_t local_timer_interrupt(void); 35extern irqreturn_t local_timer_interrupt(void);
36
37/*
38 * time.c
39 */
40#ifdef CONFIG_CEVT_MN10300
41extern void clockevent_set_clock(struct clock_event_device *, unsigned int);
42#endif
43#ifdef CONFIG_CSRC_MN10300
44extern void clocksource_set_clock(struct clocksource *, unsigned int);
45#endif
diff --git a/arch/mn10300/kernel/irq.c b/arch/mn10300/kernel/irq.c
index ac11754ecec..f09fed5e6af 100644
--- a/arch/mn10300/kernel/irq.c
+++ b/arch/mn10300/kernel/irq.c
@@ -37,8 +37,9 @@ atomic_t irq_err_count;
37/* 37/*
38 * MN10300 interrupt controller operations 38 * MN10300 interrupt controller operations
39 */ 39 */
40static void mn10300_cpupic_ack(unsigned int irq) 40static void mn10300_cpupic_ack(struct irq_data *d)
41{ 41{
42 unsigned int irq = d->irq;
42 unsigned long flags; 43 unsigned long flags;
43 u16 tmp; 44 u16 tmp;
44 45
@@ -61,13 +62,14 @@ static void __mask_and_set_icr(unsigned int irq,
61 arch_local_irq_restore(flags); 62 arch_local_irq_restore(flags);
62} 63}
63 64
64static void mn10300_cpupic_mask(unsigned int irq) 65static void mn10300_cpupic_mask(struct irq_data *d)
65{ 66{
66 __mask_and_set_icr(irq, GxICR_LEVEL, 0); 67 __mask_and_set_icr(d->irq, GxICR_LEVEL, 0);
67} 68}
68 69
69static void mn10300_cpupic_mask_ack(unsigned int irq) 70static void mn10300_cpupic_mask_ack(struct irq_data *d)
70{ 71{
72 unsigned int irq = d->irq;
71#ifdef CONFIG_SMP 73#ifdef CONFIG_SMP
72 unsigned long flags; 74 unsigned long flags;
73 u16 tmp; 75 u16 tmp;
@@ -85,7 +87,7 @@ static void mn10300_cpupic_mask_ack(unsigned int irq)
85 tmp2 = GxICR(irq); 87 tmp2 = GxICR(irq);
86 88
87 irq_affinity_online[irq] = 89 irq_affinity_online[irq] =
88 any_online_cpu(*irq_desc[irq].affinity); 90 any_online_cpu(*d->affinity);
89 CROSS_GxICR(irq, irq_affinity_online[irq]) = 91 CROSS_GxICR(irq, irq_affinity_online[irq]) =
90 (tmp & (GxICR_LEVEL | GxICR_ENABLE)) | GxICR_DETECT; 92 (tmp & (GxICR_LEVEL | GxICR_ENABLE)) | GxICR_DETECT;
91 tmp = CROSS_GxICR(irq, irq_affinity_online[irq]); 93 tmp = CROSS_GxICR(irq, irq_affinity_online[irq]);
@@ -97,13 +99,14 @@ static void mn10300_cpupic_mask_ack(unsigned int irq)
97#endif /* CONFIG_SMP */ 99#endif /* CONFIG_SMP */
98} 100}
99 101
100static void mn10300_cpupic_unmask(unsigned int irq) 102static void mn10300_cpupic_unmask(struct irq_data *d)
101{ 103{
102 __mask_and_set_icr(irq, GxICR_LEVEL, GxICR_ENABLE); 104 __mask_and_set_icr(d->irq, GxICR_LEVEL, GxICR_ENABLE);
103} 105}
104 106
105static void mn10300_cpupic_unmask_clear(unsigned int irq) 107static void mn10300_cpupic_unmask_clear(struct irq_data *d)
106{ 108{
109 unsigned int irq = d->irq;
107 /* the MN10300 PIC latches its interrupt request bit, even after the 110 /* the MN10300 PIC latches its interrupt request bit, even after the
108 * device has ceased to assert its interrupt line and the interrupt 111 * device has ceased to assert its interrupt line and the interrupt
109 * channel has been disabled in the PIC, so for level-triggered 112 * channel has been disabled in the PIC, so for level-triggered
@@ -121,7 +124,7 @@ static void mn10300_cpupic_unmask_clear(unsigned int irq)
121 } else { 124 } else {
122 tmp = GxICR(irq); 125 tmp = GxICR(irq);
123 126
124 irq_affinity_online[irq] = any_online_cpu(*irq_desc[irq].affinity); 127 irq_affinity_online[irq] = any_online_cpu(*d->affinity);
125 CROSS_GxICR(irq, irq_affinity_online[irq]) = (tmp & GxICR_LEVEL) | GxICR_ENABLE | GxICR_DETECT; 128 CROSS_GxICR(irq, irq_affinity_online[irq]) = (tmp & GxICR_LEVEL) | GxICR_ENABLE | GxICR_DETECT;
126 tmp = CROSS_GxICR(irq, irq_affinity_online[irq]); 129 tmp = CROSS_GxICR(irq, irq_affinity_online[irq]);
127 } 130 }
@@ -134,7 +137,8 @@ static void mn10300_cpupic_unmask_clear(unsigned int irq)
134 137
135#ifdef CONFIG_SMP 138#ifdef CONFIG_SMP
136static int 139static int
137mn10300_cpupic_setaffinity(unsigned int irq, const struct cpumask *mask) 140mn10300_cpupic_setaffinity(struct irq_data *d, const struct cpumask *mask,
141 bool force)
138{ 142{
139 unsigned long flags; 143 unsigned long flags;
140 int err; 144 int err;
@@ -142,7 +146,7 @@ mn10300_cpupic_setaffinity(unsigned int irq, const struct cpumask *mask)
142 flags = arch_local_cli_save(); 146 flags = arch_local_cli_save();
143 147
144 /* check irq no */ 148 /* check irq no */
145 switch (irq) { 149 switch (d->irq) {
146 case TMJCIRQ: 150 case TMJCIRQ:
147 case RESCHEDULE_IPI: 151 case RESCHEDULE_IPI:
148 case CALL_FUNC_SINGLE_IPI: 152 case CALL_FUNC_SINGLE_IPI:
@@ -181,7 +185,7 @@ mn10300_cpupic_setaffinity(unsigned int irq, const struct cpumask *mask)
181 break; 185 break;
182 186
183 default: 187 default:
184 set_bit(irq, irq_affinity_request); 188 set_bit(d->irq, irq_affinity_request);
185 err = 0; 189 err = 0;
186 break; 190 break;
187 } 191 }
@@ -202,15 +206,15 @@ mn10300_cpupic_setaffinity(unsigned int irq, const struct cpumask *mask)
202 * mask_ack() is provided), and mask_ack() just masks. 206 * mask_ack() is provided), and mask_ack() just masks.
203 */ 207 */
204static struct irq_chip mn10300_cpu_pic_level = { 208static struct irq_chip mn10300_cpu_pic_level = {
205 .name = "cpu_l", 209 .name = "cpu_l",
206 .disable = mn10300_cpupic_mask, 210 .irq_disable = mn10300_cpupic_mask,
207 .enable = mn10300_cpupic_unmask_clear, 211 .irq_enable = mn10300_cpupic_unmask_clear,
208 .ack = NULL, 212 .irq_ack = NULL,
209 .mask = mn10300_cpupic_mask, 213 .irq_mask = mn10300_cpupic_mask,
210 .mask_ack = mn10300_cpupic_mask, 214 .irq_mask_ack = mn10300_cpupic_mask,
211 .unmask = mn10300_cpupic_unmask_clear, 215 .irq_unmask = mn10300_cpupic_unmask_clear,
212#ifdef CONFIG_SMP 216#ifdef CONFIG_SMP
213 .set_affinity = mn10300_cpupic_setaffinity, 217 .irq_set_affinity = mn10300_cpupic_setaffinity,
214#endif 218#endif
215}; 219};
216 220
@@ -220,15 +224,15 @@ static struct irq_chip mn10300_cpu_pic_level = {
220 * We use the latch clearing function of the PIC as the 'ACK' function. 224 * We use the latch clearing function of the PIC as the 'ACK' function.
221 */ 225 */
222static struct irq_chip mn10300_cpu_pic_edge = { 226static struct irq_chip mn10300_cpu_pic_edge = {
223 .name = "cpu_e", 227 .name = "cpu_e",
224 .disable = mn10300_cpupic_mask, 228 .irq_disable = mn10300_cpupic_mask,
225 .enable = mn10300_cpupic_unmask, 229 .irq_enable = mn10300_cpupic_unmask,
226 .ack = mn10300_cpupic_ack, 230 .irq_ack = mn10300_cpupic_ack,
227 .mask = mn10300_cpupic_mask, 231 .irq_mask = mn10300_cpupic_mask,
228 .mask_ack = mn10300_cpupic_mask_ack, 232 .irq_mask_ack = mn10300_cpupic_mask_ack,
229 .unmask = mn10300_cpupic_unmask, 233 .irq_unmask = mn10300_cpupic_unmask,
230#ifdef CONFIG_SMP 234#ifdef CONFIG_SMP
231 .set_affinity = mn10300_cpupic_setaffinity, 235 .irq_set_affinity = mn10300_cpupic_setaffinity,
232#endif 236#endif
233}; 237};
234 238
@@ -252,31 +256,6 @@ void set_intr_level(int irq, u16 level)
252 __mask_and_set_icr(irq, GxICR_ENABLE, level); 256 __mask_and_set_icr(irq, GxICR_ENABLE, level);
253} 257}
254 258
255void mn10300_intc_set_level(unsigned int irq, unsigned int level)
256{
257 set_intr_level(irq, NUM2GxICR_LEVEL(level) & GxICR_LEVEL);
258}
259
260void mn10300_intc_clear(unsigned int irq)
261{
262 __mask_and_set_icr(irq, GxICR_LEVEL | GxICR_ENABLE, GxICR_DETECT);
263}
264
265void mn10300_intc_set(unsigned int irq)
266{
267 __mask_and_set_icr(irq, 0, GxICR_REQUEST | GxICR_DETECT);
268}
269
270void mn10300_intc_enable(unsigned int irq)
271{
272 mn10300_cpupic_unmask(irq);
273}
274
275void mn10300_intc_disable(unsigned int irq)
276{
277 mn10300_cpupic_mask(irq);
278}
279
280/* 259/*
281 * mark an interrupt to be ACK'd after interrupt handlers have been run rather 260 * mark an interrupt to be ACK'd after interrupt handlers have been run rather
282 * than before 261 * than before
@@ -296,7 +275,7 @@ void __init init_IRQ(void)
296 int irq; 275 int irq;
297 276
298 for (irq = 0; irq < NR_IRQS; irq++) 277 for (irq = 0; irq < NR_IRQS; irq++)
299 if (irq_desc[irq].chip == &no_irq_chip) 278 if (get_irq_chip(irq) == &no_irq_chip)
300 /* due to the PIC latching interrupt requests, even 279 /* due to the PIC latching interrupt requests, even
301 * when the IRQ is disabled, IRQ_PENDING is superfluous 280 * when the IRQ is disabled, IRQ_PENDING is superfluous
302 * and we can use handle_level_irq() for edge-triggered 281 * and we can use handle_level_irq() for edge-triggered
@@ -384,12 +363,12 @@ int show_interrupts(struct seq_file *p, void *v)
384 363
385 if (i < NR_CPU_IRQS) 364 if (i < NR_CPU_IRQS)
386 seq_printf(p, " %14s.%u", 365 seq_printf(p, " %14s.%u",
387 irq_desc[i].chip->name, 366 irq_desc[i].irq_data.chip->name,
388 (GxICR(i) & GxICR_LEVEL) >> 367 (GxICR(i) & GxICR_LEVEL) >>
389 GxICR_LEVEL_SHIFT); 368 GxICR_LEVEL_SHIFT);
390 else 369 else
391 seq_printf(p, " %14s", 370 seq_printf(p, " %14s",
392 irq_desc[i].chip->name); 371 irq_desc[i].irq_data.chip->name);
393 372
394 seq_printf(p, " %s", action->name); 373 seq_printf(p, " %s", action->name);
395 374
diff --git a/arch/mn10300/kernel/mn10300-serial.c b/arch/mn10300/kernel/mn10300-serial.c
index 996384dba45..93c53739cfc 100644
--- a/arch/mn10300/kernel/mn10300-serial.c
+++ b/arch/mn10300/kernel/mn10300-serial.c
@@ -384,17 +384,21 @@ static void mn10300_serial_mask_ack(unsigned int irq)
384 arch_local_irq_restore(flags); 384 arch_local_irq_restore(flags);
385} 385}
386 386
387static void mn10300_serial_nop(unsigned int irq) 387static void mn10300_serial_chip_mask_ack(struct irq_data *d)
388{
389 mn10300_serial_mask_ack(d->irq);
390}
391
392static void mn10300_serial_nop(struct irq_data *d)
388{ 393{
389} 394}
390 395
391static struct irq_chip mn10300_serial_pic = { 396static struct irq_chip mn10300_serial_pic = {
392 .name = "mnserial", 397 .name = "mnserial",
393 .ack = mn10300_serial_mask_ack, 398 .irq_ack = mn10300_serial_chip_mask_ack,
394 .mask = mn10300_serial_mask_ack, 399 .irq_mask = mn10300_serial_chip_mask_ack,
395 .mask_ack = mn10300_serial_mask_ack, 400 .irq_mask_ack = mn10300_serial_chip_mask_ack,
396 .unmask = mn10300_serial_nop, 401 .irq_unmask = mn10300_serial_nop,
397 .end = mn10300_serial_nop,
398}; 402};
399 403
400 404
diff --git a/arch/mn10300/kernel/smp.c b/arch/mn10300/kernel/smp.c
index 0dcd1c686ba..1ebb79f1650 100644
--- a/arch/mn10300/kernel/smp.c
+++ b/arch/mn10300/kernel/smp.c
@@ -113,15 +113,17 @@ static void init_ipi(void);
113 */ 113 */
114static void mn10300_ipi_disable(unsigned int irq); 114static void mn10300_ipi_disable(unsigned int irq);
115static void mn10300_ipi_enable(unsigned int irq); 115static void mn10300_ipi_enable(unsigned int irq);
116static void mn10300_ipi_ack(unsigned int irq); 116static void mn10300_ipi_chip_disable(struct irq_data *d);
117static void mn10300_ipi_nop(unsigned int irq); 117static void mn10300_ipi_chip_enable(struct irq_data *d);
118static void mn10300_ipi_ack(struct irq_data *d);
119static void mn10300_ipi_nop(struct irq_data *d);
118 120
119static struct irq_chip mn10300_ipi_type = { 121static struct irq_chip mn10300_ipi_type = {
120 .name = "cpu_ipi", 122 .name = "cpu_ipi",
121 .disable = mn10300_ipi_disable, 123 .irq_disable = mn10300_ipi_chip_disable,
122 .enable = mn10300_ipi_enable, 124 .irq_enable = mn10300_ipi_chip_enable,
123 .ack = mn10300_ipi_ack, 125 .irq_ack = mn10300_ipi_ack,
124 .eoi = mn10300_ipi_nop 126 .irq_eoi = mn10300_ipi_nop
125}; 127};
126 128
127static irqreturn_t smp_reschedule_interrupt(int irq, void *dev_id); 129static irqreturn_t smp_reschedule_interrupt(int irq, void *dev_id);
@@ -236,6 +238,11 @@ static void mn10300_ipi_enable(unsigned int irq)
236 arch_local_irq_restore(flags); 238 arch_local_irq_restore(flags);
237} 239}
238 240
241static void mn10300_ipi_chip_enable(struct irq_data *d)
242{
243 mn10300_ipi_enable(d->irq);
244}
245
239/** 246/**
240 * mn10300_ipi_disable - Disable an IPI 247 * mn10300_ipi_disable - Disable an IPI
241 * @irq: The IPI to be disabled. 248 * @irq: The IPI to be disabled.
@@ -254,6 +261,12 @@ static void mn10300_ipi_disable(unsigned int irq)
254 arch_local_irq_restore(flags); 261 arch_local_irq_restore(flags);
255} 262}
256 263
264static void mn10300_ipi_chip_disable(struct irq_data *d)
265{
266 mn10300_ipi_disable(d->irq);
267}
268
269
257/** 270/**
258 * mn10300_ipi_ack - Acknowledge an IPI interrupt in the PIC 271 * mn10300_ipi_ack - Acknowledge an IPI interrupt in the PIC
259 * @irq: The IPI to be acknowledged. 272 * @irq: The IPI to be acknowledged.
@@ -261,8 +274,9 @@ static void mn10300_ipi_disable(unsigned int irq)
261 * Clear the interrupt detection flag for the IPI on the appropriate interrupt 274 * Clear the interrupt detection flag for the IPI on the appropriate interrupt
262 * channel in the PIC. 275 * channel in the PIC.
263 */ 276 */
264static void mn10300_ipi_ack(unsigned int irq) 277static void mn10300_ipi_ack(struct irq_data *d)
265{ 278{
279 unsigned int irq = d->irq;
266 unsigned long flags; 280 unsigned long flags;
267 u16 tmp; 281 u16 tmp;
268 282
@@ -276,7 +290,7 @@ static void mn10300_ipi_ack(unsigned int irq)
276 * mn10300_ipi_nop - Dummy IPI action 290 * mn10300_ipi_nop - Dummy IPI action
277 * @irq: The IPI to be acted upon. 291 * @irq: The IPI to be acted upon.
278 */ 292 */
279static void mn10300_ipi_nop(unsigned int irq) 293static void mn10300_ipi_nop(struct irq_data *d)
280{ 294{
281} 295}
282 296
diff --git a/arch/mn10300/kernel/time.c b/arch/mn10300/kernel/time.c
index 5b955000626..67c6416a58f 100644
--- a/arch/mn10300/kernel/time.c
+++ b/arch/mn10300/kernel/time.c
@@ -93,79 +93,6 @@ irqreturn_t local_timer_interrupt(void)
93 return IRQ_HANDLED; 93 return IRQ_HANDLED;
94} 94}
95 95
96#ifndef CONFIG_GENERIC_TIME
97/*
98 * advance the kernel's time keeping clocks (xtime and jiffies)
99 * - we use Timer 0 & 1 cascaded as a clock to nudge us the next time
100 * there's a need to update
101 */
102static irqreturn_t timer_interrupt(int irq, void *dev_id)
103{
104 unsigned tsc, elapse;
105 irqreturn_t ret;
106
107 while (tsc = get_cycles(),
108 elapse = tsc - mn10300_last_tsc, /* time elapsed since last
109 * tick */
110 elapse > MN10300_TSC_PER_HZ
111 ) {
112 mn10300_last_tsc += MN10300_TSC_PER_HZ;
113
114 /* advance the kernel's time tracking system */
115 xtime_update(1);
116 }
117
118 ret = local_timer_interrupt();
119#ifdef CONFIG_SMP
120 send_IPI_allbutself(LOCAL_TIMER_IPI);
121#endif
122 return ret;
123}
124
125static struct irqaction timer_irq = {
126 .handler = timer_interrupt,
127 .flags = IRQF_DISABLED | IRQF_SHARED | IRQF_TIMER,
128 .name = "timer",
129};
130#endif /* CONFIG_GENERIC_TIME */
131
132#ifdef CONFIG_CSRC_MN10300
133void __init clocksource_set_clock(struct clocksource *cs, unsigned int clock)
134{
135 u64 temp;
136 u32 shift;
137
138 /* Find a shift value */
139 for (shift = 32; shift > 0; shift--) {
140 temp = (u64) NSEC_PER_SEC << shift;
141 do_div(temp, clock);
142 if ((temp >> 32) == 0)
143 break;
144 }
145 cs->shift = shift;
146 cs->mult = (u32) temp;
147}
148#endif
149
150#if CONFIG_CEVT_MN10300
151void __cpuinit clockevent_set_clock(struct clock_event_device *cd,
152 unsigned int clock)
153{
154 u64 temp;
155 u32 shift;
156
157 /* Find a shift value */
158 for (shift = 32; shift > 0; shift--) {
159 temp = (u64) clock << shift;
160 do_div(temp, NSEC_PER_SEC);
161 if ((temp >> 32) == 0)
162 break;
163 }
164 cd->shift = shift;
165 cd->mult = (u32) temp;
166}
167#endif
168
169/* 96/*
170 * initialise the various timers used by the main part of the kernel 97 * initialise the various timers used by the main part of the kernel
171 */ 98 */
@@ -177,11 +104,7 @@ void __init time_init(void)
177 */ 104 */
178 TMPSCNT |= TMPSCNT_ENABLE; 105 TMPSCNT |= TMPSCNT_ENABLE;
179 106
180#ifdef CONFIG_GENERIC_TIME
181 init_clocksource(); 107 init_clocksource();
182#else
183 startup_timestamp_counter();
184#endif
185 108
186 printk(KERN_INFO 109 printk(KERN_INFO
187 "timestamp counter I/O clock running at %lu.%02lu" 110 "timestamp counter I/O clock running at %lu.%02lu"
@@ -190,12 +113,7 @@ void __init time_init(void)
190 113
191 mn10300_last_tsc = read_timestamp_counter(); 114 mn10300_last_tsc = read_timestamp_counter();
192 115
193#ifdef CONFIG_GENERIC_CLOCKEVENTS
194 init_clockevents(); 116 init_clockevents();
195#else
196 reload_jiffies_counter(MN10300_JC_PER_HZ - 1);
197 setup_jiffies_interrupt(TMJCIRQ, &timer_irq, CONFIG_TIMER_IRQ_LEVEL);
198#endif
199 117
200#ifdef CONFIG_MN10300_WD_TIMER 118#ifdef CONFIG_MN10300_WD_TIMER
201 /* start the watchdog timer */ 119 /* start the watchdog timer */
diff --git a/arch/mn10300/unit-asb2364/include/unit/fpga-regs.h b/arch/mn10300/unit-asb2364/include/unit/fpga-regs.h
index 7cf12054db6..33f100f9b46 100644
--- a/arch/mn10300/unit-asb2364/include/unit/fpga-regs.h
+++ b/arch/mn10300/unit-asb2364/include/unit/fpga-regs.h
@@ -14,7 +14,7 @@
14#define ASB2364_FPGA_REG_RESET_USB __SYSREG(0xa900130c, u16) 14#define ASB2364_FPGA_REG_RESET_USB __SYSREG(0xa900130c, u16)
15#define ASB2364_FPGA_REG_RESET_AV __SYSREG(0xa9001310, u16) 15#define ASB2364_FPGA_REG_RESET_AV __SYSREG(0xa9001310, u16)
16 16
17#define ASB2364_FPGA_REG_IRQ(X) __SYSREG(0xa9001590+((X)*4), u16) 17#define ASB2364_FPGA_REG_IRQ(X) __SYSREG(0xa9001510+((X)*4), u16)
18#define ASB2364_FPGA_REG_IRQ_LAN ASB2364_FPGA_REG_IRQ(0) 18#define ASB2364_FPGA_REG_IRQ_LAN ASB2364_FPGA_REG_IRQ(0)
19#define ASB2364_FPGA_REG_IRQ_UART ASB2364_FPGA_REG_IRQ(1) 19#define ASB2364_FPGA_REG_IRQ_UART ASB2364_FPGA_REG_IRQ(1)
20#define ASB2364_FPGA_REG_IRQ_I2C ASB2364_FPGA_REG_IRQ(2) 20#define ASB2364_FPGA_REG_IRQ_I2C ASB2364_FPGA_REG_IRQ(2)
diff --git a/arch/mn10300/unit-asb2364/include/unit/serial.h b/arch/mn10300/unit-asb2364/include/unit/serial.h
index 7f048bbfdfd..92f224a97ef 100644
--- a/arch/mn10300/unit-asb2364/include/unit/serial.h
+++ b/arch/mn10300/unit-asb2364/include/unit/serial.h
@@ -59,18 +59,18 @@ static inline void __debug_to_serial(const char *p, int n)
59#define SERIAL_PORT_DFNS /* stolen by gdb-stub */ 59#define SERIAL_PORT_DFNS /* stolen by gdb-stub */
60 60
61#if defined(CONFIG_GDBSTUB_ON_TTYS0) 61#if defined(CONFIG_GDBSTUB_ON_TTYS0)
62#define GDBPORT_SERIAL_RX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_RX * 4, u8) 62#define GDBPORT_SERIAL_RX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_RX * 2, u8)
63#define GDBPORT_SERIAL_TX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX * 4, u8) 63#define GDBPORT_SERIAL_TX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX * 2, u8)
64#define GDBPORT_SERIAL_DLL __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLL * 4, u8) 64#define GDBPORT_SERIAL_DLL __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLL * 2, u8)
65#define GDBPORT_SERIAL_DLM __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLM * 4, u8) 65#define GDBPORT_SERIAL_DLM __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLM * 2, u8)
66#define GDBPORT_SERIAL_IER __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IER * 4, u8) 66#define GDBPORT_SERIAL_IER __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IER * 2, u8)
67#define GDBPORT_SERIAL_IIR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IIR * 4, u8) 67#define GDBPORT_SERIAL_IIR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IIR * 2, u8)
68#define GDBPORT_SERIAL_FCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_FCR * 4, u8) 68#define GDBPORT_SERIAL_FCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_FCR * 2, u8)
69#define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LCR * 4, u8) 69#define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LCR * 2, u8)
70#define GDBPORT_SERIAL_MCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MCR * 4, u8) 70#define GDBPORT_SERIAL_MCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MCR * 2, u8)
71#define GDBPORT_SERIAL_LSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LSR * 4, u8) 71#define GDBPORT_SERIAL_LSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LSR * 2, u8)
72#define GDBPORT_SERIAL_MSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MSR * 4, u8) 72#define GDBPORT_SERIAL_MSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MSR * 2, u8)
73#define GDBPORT_SERIAL_SCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_SCR * 4, u8) 73#define GDBPORT_SERIAL_SCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_SCR * 2, u8)
74#define GDBPORT_SERIAL_IRQ SERIAL_IRQ 74#define GDBPORT_SERIAL_IRQ SERIAL_IRQ
75 75
76#elif defined(CONFIG_GDBSTUB_ON_TTYS1) 76#elif defined(CONFIG_GDBSTUB_ON_TTYS1)
diff --git a/arch/mn10300/unit-asb2364/irq-fpga.c b/arch/mn10300/unit-asb2364/irq-fpga.c
index fcf29754e4d..ee84e62b16e 100644
--- a/arch/mn10300/unit-asb2364/irq-fpga.c
+++ b/arch/mn10300/unit-asb2364/irq-fpga.c
@@ -17,38 +17,38 @@
17/* 17/*
18 * FPGA PIC operations 18 * FPGA PIC operations
19 */ 19 */
20static void asb2364_fpga_mask(unsigned int irq) 20static void asb2364_fpga_mask(struct irq_data *d)
21{ 21{
22 ASB2364_FPGA_REG_MASK(irq - NR_CPU_IRQS) = 0x0001; 22 ASB2364_FPGA_REG_MASK(d->irq - NR_CPU_IRQS) = 0x0001;
23 SyncExBus(); 23 SyncExBus();
24} 24}
25 25
26static void asb2364_fpga_ack(unsigned int irq) 26static void asb2364_fpga_ack(struct irq_data *d)
27{ 27{
28 ASB2364_FPGA_REG_IRQ(irq - NR_CPU_IRQS) = 0x0001; 28 ASB2364_FPGA_REG_IRQ(d->irq - NR_CPU_IRQS) = 0x0001;
29 SyncExBus(); 29 SyncExBus();
30} 30}
31 31
32static void asb2364_fpga_mask_ack(unsigned int irq) 32static void asb2364_fpga_mask_ack(struct irq_data *d)
33{ 33{
34 ASB2364_FPGA_REG_MASK(irq - NR_CPU_IRQS) = 0x0001; 34 ASB2364_FPGA_REG_MASK(d->irq - NR_CPU_IRQS) = 0x0001;
35 SyncExBus(); 35 SyncExBus();
36 ASB2364_FPGA_REG_IRQ(irq - NR_CPU_IRQS) = 0x0001; 36 ASB2364_FPGA_REG_IRQ(d->irq - NR_CPU_IRQS) = 0x0001;
37 SyncExBus(); 37 SyncExBus();
38} 38}
39 39
40static void asb2364_fpga_unmask(unsigned int irq) 40static void asb2364_fpga_unmask(struct irq_data *d)
41{ 41{
42 ASB2364_FPGA_REG_MASK(irq - NR_CPU_IRQS) = 0x0000; 42 ASB2364_FPGA_REG_MASK(d->irq - NR_CPU_IRQS) = 0x0000;
43 SyncExBus(); 43 SyncExBus();
44} 44}
45 45
46static struct irq_chip asb2364_fpga_pic = { 46static struct irq_chip asb2364_fpga_pic = {
47 .name = "fpga", 47 .name = "fpga",
48 .ack = asb2364_fpga_ack, 48 .irq_ack = asb2364_fpga_ack,
49 .mask = asb2364_fpga_mask, 49 .irq_mask = asb2364_fpga_mask,
50 .mask_ack = asb2364_fpga_mask_ack, 50 .irq_mask_ack = asb2364_fpga_mask_ack,
51 .unmask = asb2364_fpga_unmask, 51 .irq_unmask = asb2364_fpga_unmask,
52}; 52};
53 53
54/* 54/*
@@ -88,6 +88,17 @@ void __init irq_fpga_init(void)
88{ 88{
89 int irq; 89 int irq;
90 90
91 ASB2364_FPGA_REG_MASK_LAN = 0x0001;
92 SyncExBus();
93 ASB2364_FPGA_REG_MASK_UART = 0x0001;
94 SyncExBus();
95 ASB2364_FPGA_REG_MASK_I2C = 0x0001;
96 SyncExBus();
97 ASB2364_FPGA_REG_MASK_USB = 0x0001;
98 SyncExBus();
99 ASB2364_FPGA_REG_MASK_FPGA = 0x0001;
100 SyncExBus();
101
91 for (irq = NR_CPU_IRQS; irq < NR_IRQS; irq++) 102 for (irq = NR_CPU_IRQS; irq < NR_IRQS; irq++)
92 set_irq_chip_and_handler(irq, &asb2364_fpga_pic, handle_level_irq); 103 set_irq_chip_and_handler(irq, &asb2364_fpga_pic, handle_level_irq);
93 104
diff --git a/arch/mn10300/unit-asb2364/unit-init.c b/arch/mn10300/unit-asb2364/unit-init.c
index 11440803db1..6359b41ce7e 100644
--- a/arch/mn10300/unit-asb2364/unit-init.c
+++ b/arch/mn10300/unit-asb2364/unit-init.c
@@ -20,13 +20,41 @@
20#include <asm/processor.h> 20#include <asm/processor.h>
21#include <asm/irq.h> 21#include <asm/irq.h>
22#include <asm/intctl-regs.h> 22#include <asm/intctl-regs.h>
23#include <asm/serial-regs.h>
23#include <unit/fpga-regs.h> 24#include <unit/fpga-regs.h>
25#include <unit/serial.h>
26#include <unit/smsc911x.h>
27
28#define TTYS0_SERIAL_IER __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IER * 2, u8)
29#define LAN_IRQ_CFG __SYSREG(SMSC911X_BASE + 0x54, u32)
30#define LAN_INT_EN __SYSREG(SMSC911X_BASE + 0x5c, u32)
24 31
25/* 32/*
26 * initialise some of the unit hardware before gdbstub is set up 33 * initialise some of the unit hardware before gdbstub is set up
27 */ 34 */
28asmlinkage void __init unit_init(void) 35asmlinkage void __init unit_init(void)
29{ 36{
37 /* Make sure we aren't going to get unexpected interrupts */
38 TTYS0_SERIAL_IER = 0;
39 SC0RXICR = 0;
40 SC0TXICR = 0;
41 SC1RXICR = 0;
42 SC1TXICR = 0;
43 SC2RXICR = 0;
44 SC2TXICR = 0;
45
46 /* Attempt to reset the FPGA attached peripherals */
47 ASB2364_FPGA_REG_RESET_LAN = 0x0000;
48 SyncExBus();
49 ASB2364_FPGA_REG_RESET_UART = 0x0000;
50 SyncExBus();
51 ASB2364_FPGA_REG_RESET_I2C = 0x0000;
52 SyncExBus();
53 ASB2364_FPGA_REG_RESET_USB = 0x0000;
54 SyncExBus();
55 ASB2364_FPGA_REG_RESET_AV = 0x0000;
56 SyncExBus();
57
30 /* set up the external interrupts */ 58 /* set up the external interrupts */
31 59
32 /* XIRQ[0]: NAND RXBY */ 60 /* XIRQ[0]: NAND RXBY */
@@ -56,7 +84,23 @@ asmlinkage void __init unit_init(void)
56 */ 84 */
57asmlinkage void __init unit_setup(void) 85asmlinkage void __init unit_setup(void)
58{ 86{
87 /* Release the reset on the SMSC911X so that it is ready by the time we
88 * need it */
89 ASB2364_FPGA_REG_RESET_LAN = 0x0001;
90 SyncExBus();
91 ASB2364_FPGA_REG_RESET_UART = 0x0001;
92 SyncExBus();
93 ASB2364_FPGA_REG_RESET_I2C = 0x0001;
94 SyncExBus();
95 ASB2364_FPGA_REG_RESET_USB = 0x0001;
96 SyncExBus();
97 ASB2364_FPGA_REG_RESET_AV = 0x0001;
98 SyncExBus();
59 99
100 /* Make sure the ethernet chipset isn't going to give us an interrupt
101 * storm from stuff it was doing pre-reset */
102 LAN_IRQ_CFG = 0;
103 LAN_INT_EN = 0;
60} 104}
61 105
62/* 106/*
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-28 03:08:00 -0400