blob: 6865eb8d00957d5c6feb283af3b17f11368776e3 (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
|
/* linux/include/media/s5k4ecgx_platform.h
*
* Copyright (c) 2012 Hardkernel Co., Ltd.
* http://www.hardkernel.com/
*
* Driver for S5K4EAGX from Samsung Electronics
* CMOS Image Sensor SoC with an Embedded Image Processor
* supporting PVI
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
//#include <linux/device.h>
//#include <media/v4l2-mediabus.h>
#define DEFAULT_PIX_FMT V4L2_PIX_FMT_UYVY /* YUV422 */
#define DEFAULT_MCLK 24000000
#define S5K5CCGX_STREAMOFF_DELAY 120
#define S5K4ECGX_DRIVER_NAME "S5K4ECGX"
enum {
S5K4ECGX_FLASH_MODE_NORMAL,
S5K4ECGX_FLASH_MODE_MOVIE,
S5K4ECGX_FLASH_MODE_MAX,
};
enum {
S5K4ECGX_FLASH_OFF = 0,
S5K4ECGX_FLASH_ON = 1,
};
/* Define debug level */
#define CAMDBG_LEVEL_ERR (1 << 0)
#define CAMDBG_LEVEL_WARN (1 << 1)
#define CAMDBG_LEVEL_INFO (1 << 2)
#define CAMDBG_LEVEL_DEBUG (1 << 3)
#define CAMDBG_LEVEL_TRACE (1 << 4)
#define CAMDBG_LEVEL_DEFAULT \
(CAMDBG_LEVEL_ERR | CAMDBG_LEVEL_WARN | CAMDBG_LEVEL_INFO)
#if 0
struct s5k4ecgx_mbus_platform_data {
int id;
struct v4l2_mbus_framefmt fmt;
unsigned long clk_rate; /* master clock frequency in Hz */
int (*set_power)(int on);
int (*set_clock)(struct device *dev, int on);
};
#endif
struct s5k4ecgx_platform_data {
u32 default_width;
u32 default_height;
u32 pixelformat;
u32 freq; /* MCLK in Hz */
/* This SoC supports Parallel & CSI-2 */
u32 is_mipi; /* set to 1 if mipi */
s32 streamoff_delay; /* ms, type is signed */
/* ISP interrupt */
/* int (*config_isp_irq)(void);*/
//#define S5K5CCGX_SUPPORT_FLASH
int (*flash_en)(u32 mode, u32 onoff);
int (*is_flash_on)(void);
u8 dbg_level;
};
|
