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LITMUS^RT and MC^2 V0 support for the ODROID-X dev board
Christopher Joseph Kenna
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include
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asm-mips
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mipsregs.h
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Author
Age
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[MIPS] Change names of local variables to silence sparse (part 2)
Atsushi Nemoto
2007-07-12
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[MIPS] PMC MSP71xx mips common
Marc St-Jean
2007-07-10
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[MIPS] Enable support for the userlocal hardware register
Ralf Baechle
2007-07-10
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[MIPS] Fix scheduling latency issue on 24K, 34K and 74K cores
Ralf Baechle
2007-07-06
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[MIPS] Remove unused R10000 performance counter definitions.
Ralf Baechle
2006-11-29
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[MIPS] vr41xx: Replace magic number for P4K bit with symbol.
Yoichi Yuasa
2006-07-13
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[MIPS] TRACE_IRQFLAGS_SUPPORT support.
Ralf Baechle
2006-07-13
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[MIPS] VR41xx: Set VR41_CONF_BP only for PrId 0x0c80.
Yoichi Yuasa
2006-07-13
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[MIPS] Fix use of ehb instruction for non-R2 configurations.
Ralf Baechle
2006-06-29
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Merge git://git.infradead.org/hdrcleanup-2.6
Linus Torvalds
2006-06-20
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Don't include linux/config.h from anywhere else in include/
David Woodhouse
2006-04-26
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[MIPS] Cleanup __emt() a bit.
Ralf Baechle
2006-06-19
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[MIPS] DSP and MDMX share the same config flag bit.
Thiemo Seufer
2006-05-31
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/
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[MIPS] MT: Improved multithreading support.
Ralf Baechle
2006-04-18
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[MIPS] Provide access functions for c0_badvaddr.
Ralf Baechle
2006-04-18
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MIPS: DSP: Put mask field into the right place.
Ralf Baechle
2006-01-10
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Virtual SMP support for the 34K.
Ralf Baechle
2005-10-29
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Fix parenthesis in macros.
Ralf Baechle
2005-10-29
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Philips PNX8550 support: MIPS32-like core with 2 Trimedias on it.
Pete Popov
2005-10-29
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Detect the MIPS R2 vectored interrupt, external interrupt controller
Ralf Baechle
2005-10-29
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Macros to access the register of processors using the new MIPS
Ralf Baechle
2005-10-29
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A few more macros to access MIPS R2 architecture registers.
Ralf Baechle
2005-10-29
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Get the thing to compile again ...
Ralf Baechle
2005-10-29
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Use macros for the RM7k cp0.config bits instead of magic numbers.
Maciej W. Rozycki
2005-10-29
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Remove dead code which was causing warnings.
Ralf Baechle
2005-10-29
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Support the MIPS32 / MIPS64 DSP ASE.
Ralf Baechle
2005-10-29
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Cleanup decoding of MIPSxx config registers.
Ralf Baechle
2005-10-29
*
Better interface to run uncached cache setup code.
Thiemo Seufer
2005-10-29
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Provide functions to access cop0 config4-7 registers
Ralf Baechle
2005-10-29
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Linux-2.6.12-rc2
Linus Torvalds
2005-04-16