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-rw-r--r--sound/oss/msnd_pinnacle.c1922
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diff --git a/sound/oss/msnd_pinnacle.c b/sound/oss/msnd_pinnacle.c
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1/*********************************************************************
2 *
3 * Turtle Beach MultiSound Sound Card Driver for Linux
4 * Linux 2.0/2.2 Version
5 *
6 * msnd_pinnacle.c / msnd_classic.c
7 *
8 * -- If MSND_CLASSIC is defined:
9 *
10 * -> driver for Turtle Beach Classic/Monterey/Tahiti
11 *
12 * -- Else
13 *
14 * -> driver for Turtle Beach Pinnacle/Fiji
15 *
16 * Copyright (C) 1998 Andrew Veliath
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31 *
32 * $Id: msnd_pinnacle.c,v 1.8 2000/12/30 00:33:21 sycamore Exp $
33 *
34 * 12-3-2000 Modified IO port validation Steve Sycamore
35 *
36 *
37 * $$$: msnd_pinnacle.c,v 1.75 1999/03/21 16:50:09 andrewtv $$$ $
38 *
39 ********************************************************************/
40
41#include <linux/kernel.h>
42#include <linux/config.h>
43#include <linux/module.h>
44#include <linux/slab.h>
45#include <linux/types.h>
46#include <linux/delay.h>
47#include <linux/init.h>
48#include <linux/interrupt.h>
49#include <linux/smp_lock.h>
50#include <asm/irq.h>
51#include <asm/io.h>
52#include "sound_config.h"
53#include "sound_firmware.h"
54#ifdef MSND_CLASSIC
55# ifndef __alpha__
56# define SLOWIO
57# endif
58#endif
59#include "msnd.h"
60#ifdef MSND_CLASSIC
61# ifdef CONFIG_MSNDCLAS_HAVE_BOOT
62# define HAVE_DSPCODEH
63# endif
64# include "msnd_classic.h"
65# define LOGNAME "msnd_classic"
66#else
67# ifdef CONFIG_MSNDPIN_HAVE_BOOT
68# define HAVE_DSPCODEH
69# endif
70# include "msnd_pinnacle.h"
71# define LOGNAME "msnd_pinnacle"
72#endif
73
74#ifndef CONFIG_MSND_WRITE_NDELAY
75# define CONFIG_MSND_WRITE_NDELAY 1
76#endif
77
78#define get_play_delay_jiffies(size) ((size) * HZ * \
79 dev.play_sample_size / 8 / \
80 dev.play_sample_rate / \
81 dev.play_channels)
82
83#define get_rec_delay_jiffies(size) ((size) * HZ * \
84 dev.rec_sample_size / 8 / \
85 dev.rec_sample_rate / \
86 dev.rec_channels)
87
88static multisound_dev_t dev;
89
90#ifndef HAVE_DSPCODEH
91static char *dspini, *permini;
92static int sizeof_dspini, sizeof_permini;
93#endif
94
95static int dsp_full_reset(void);
96static void dsp_write_flush(void);
97
98static __inline__ int chk_send_dsp_cmd(multisound_dev_t *dev, register BYTE cmd)
99{
100 if (msnd_send_dsp_cmd(dev, cmd) == 0)
101 return 0;
102 dsp_full_reset();
103 return msnd_send_dsp_cmd(dev, cmd);
104}
105
106static void reset_play_queue(void)
107{
108 int n;
109 LPDAQD lpDAQ;
110
111 dev.last_playbank = -1;
112 writew(PCTODSP_OFFSET(0 * DAQDS__size), dev.DAPQ + JQS_wHead);
113 writew(PCTODSP_OFFSET(0 * DAQDS__size), dev.DAPQ + JQS_wTail);
114
115 for (n = 0, lpDAQ = dev.base + DAPQ_DATA_BUFF; n < 3; ++n, lpDAQ += DAQDS__size) {
116 writew(PCTODSP_BASED((DWORD)(DAP_BUFF_SIZE * n)), lpDAQ + DAQDS_wStart);
117 writew(0, lpDAQ + DAQDS_wSize);
118 writew(1, lpDAQ + DAQDS_wFormat);
119 writew(dev.play_sample_size, lpDAQ + DAQDS_wSampleSize);
120 writew(dev.play_channels, lpDAQ + DAQDS_wChannels);
121 writew(dev.play_sample_rate, lpDAQ + DAQDS_wSampleRate);
122 writew(HIMT_PLAY_DONE * 0x100 + n, lpDAQ + DAQDS_wIntMsg);
123 writew(n, lpDAQ + DAQDS_wFlags);
124 }
125}
126
127static void reset_record_queue(void)
128{
129 int n;
130 LPDAQD lpDAQ;
131 unsigned long flags;
132
133 dev.last_recbank = 2;
134 writew(PCTODSP_OFFSET(0 * DAQDS__size), dev.DARQ + JQS_wHead);
135 writew(PCTODSP_OFFSET(dev.last_recbank * DAQDS__size), dev.DARQ + JQS_wTail);
136
137 /* Critical section: bank 1 access */
138 spin_lock_irqsave(&dev.lock, flags);
139 msnd_outb(HPBLKSEL_1, dev.io + HP_BLKS);
140 memset_io(dev.base, 0, DAR_BUFF_SIZE * 3);
141 msnd_outb(HPBLKSEL_0, dev.io + HP_BLKS);
142 spin_unlock_irqrestore(&dev.lock, flags);
143
144 for (n = 0, lpDAQ = dev.base + DARQ_DATA_BUFF; n < 3; ++n, lpDAQ += DAQDS__size) {
145 writew(PCTODSP_BASED((DWORD)(DAR_BUFF_SIZE * n)) + 0x4000, lpDAQ + DAQDS_wStart);
146 writew(DAR_BUFF_SIZE, lpDAQ + DAQDS_wSize);
147 writew(1, lpDAQ + DAQDS_wFormat);
148 writew(dev.rec_sample_size, lpDAQ + DAQDS_wSampleSize);
149 writew(dev.rec_channels, lpDAQ + DAQDS_wChannels);
150 writew(dev.rec_sample_rate, lpDAQ + DAQDS_wSampleRate);
151 writew(HIMT_RECORD_DONE * 0x100 + n, lpDAQ + DAQDS_wIntMsg);
152 writew(n, lpDAQ + DAQDS_wFlags);
153 }
154}
155
156static void reset_queues(void)
157{
158 if (dev.mode & FMODE_WRITE) {
159 msnd_fifo_make_empty(&dev.DAPF);
160 reset_play_queue();
161 }
162 if (dev.mode & FMODE_READ) {
163 msnd_fifo_make_empty(&dev.DARF);
164 reset_record_queue();
165 }
166}
167
168static int dsp_set_format(struct file *file, int val)
169{
170 int data, i;
171 LPDAQD lpDAQ, lpDARQ;
172
173 lpDAQ = dev.base + DAPQ_DATA_BUFF;
174 lpDARQ = dev.base + DARQ_DATA_BUFF;
175
176 switch (val) {
177 case AFMT_U8:
178 case AFMT_S16_LE:
179 data = val;
180 break;
181 default:
182 data = DEFSAMPLESIZE;
183 break;
184 }
185
186 for (i = 0; i < 3; ++i, lpDAQ += DAQDS__size, lpDARQ += DAQDS__size) {
187 if (file->f_mode & FMODE_WRITE)
188 writew(data, lpDAQ + DAQDS_wSampleSize);
189 if (file->f_mode & FMODE_READ)
190 writew(data, lpDARQ + DAQDS_wSampleSize);
191 }
192 if (file->f_mode & FMODE_WRITE)
193 dev.play_sample_size = data;
194 if (file->f_mode & FMODE_READ)
195 dev.rec_sample_size = data;
196
197 return data;
198}
199
200static int dsp_get_frag_size(void)
201{
202 int size;
203 size = dev.fifosize / 4;
204 if (size > 32 * 1024)
205 size = 32 * 1024;
206 return size;
207}
208
209static int dsp_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
210{
211 int val, i, data, tmp;
212 LPDAQD lpDAQ, lpDARQ;
213 audio_buf_info abinfo;
214 unsigned long flags;
215 int __user *p = (int __user *)arg;
216
217 lpDAQ = dev.base + DAPQ_DATA_BUFF;
218 lpDARQ = dev.base + DARQ_DATA_BUFF;
219
220 switch (cmd) {
221 case SNDCTL_DSP_SUBDIVIDE:
222 case SNDCTL_DSP_SETFRAGMENT:
223 case SNDCTL_DSP_SETDUPLEX:
224 case SNDCTL_DSP_POST:
225 return 0;
226
227 case SNDCTL_DSP_GETIPTR:
228 case SNDCTL_DSP_GETOPTR:
229 case SNDCTL_DSP_MAPINBUF:
230 case SNDCTL_DSP_MAPOUTBUF:
231 return -EINVAL;
232
233 case SNDCTL_DSP_GETOSPACE:
234 if (!(file->f_mode & FMODE_WRITE))
235 return -EINVAL;
236 spin_lock_irqsave(&dev.lock, flags);
237 abinfo.fragsize = dsp_get_frag_size();
238 abinfo.bytes = dev.DAPF.n - dev.DAPF.len;
239 abinfo.fragstotal = dev.DAPF.n / abinfo.fragsize;
240 abinfo.fragments = abinfo.bytes / abinfo.fragsize;
241 spin_unlock_irqrestore(&dev.lock, flags);
242 return copy_to_user((void __user *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
243
244 case SNDCTL_DSP_GETISPACE:
245 if (!(file->f_mode & FMODE_READ))
246 return -EINVAL;
247 spin_lock_irqsave(&dev.lock, flags);
248 abinfo.fragsize = dsp_get_frag_size();
249 abinfo.bytes = dev.DARF.n - dev.DARF.len;
250 abinfo.fragstotal = dev.DARF.n / abinfo.fragsize;
251 abinfo.fragments = abinfo.bytes / abinfo.fragsize;
252 spin_unlock_irqrestore(&dev.lock, flags);
253 return copy_to_user((void __user *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
254
255 case SNDCTL_DSP_RESET:
256 dev.nresets = 0;
257 reset_queues();
258 return 0;
259
260 case SNDCTL_DSP_SYNC:
261 dsp_write_flush();
262 return 0;
263
264 case SNDCTL_DSP_GETBLKSIZE:
265 tmp = dsp_get_frag_size();
266 if (put_user(tmp, p))
267 return -EFAULT;
268 return 0;
269
270 case SNDCTL_DSP_GETFMTS:
271 val = AFMT_S16_LE | AFMT_U8;
272 if (put_user(val, p))
273 return -EFAULT;
274 return 0;
275
276 case SNDCTL_DSP_SETFMT:
277 if (get_user(val, p))
278 return -EFAULT;
279
280 if (file->f_mode & FMODE_WRITE)
281 data = val == AFMT_QUERY
282 ? dev.play_sample_size
283 : dsp_set_format(file, val);
284 else
285 data = val == AFMT_QUERY
286 ? dev.rec_sample_size
287 : dsp_set_format(file, val);
288
289 if (put_user(data, p))
290 return -EFAULT;
291 return 0;
292
293 case SNDCTL_DSP_NONBLOCK:
294 if (!test_bit(F_DISABLE_WRITE_NDELAY, &dev.flags) &&
295 file->f_mode & FMODE_WRITE)
296 dev.play_ndelay = 1;
297 if (file->f_mode & FMODE_READ)
298 dev.rec_ndelay = 1;
299 return 0;
300
301 case SNDCTL_DSP_GETCAPS:
302 val = DSP_CAP_DUPLEX | DSP_CAP_BATCH;
303 if (put_user(val, p))
304 return -EFAULT;
305 return 0;
306
307 case SNDCTL_DSP_SPEED:
308 if (get_user(val, p))
309 return -EFAULT;
310
311 if (val < 8000)
312 val = 8000;
313
314 if (val > 48000)
315 val = 48000;
316
317 data = val;
318
319 for (i = 0; i < 3; ++i, lpDAQ += DAQDS__size, lpDARQ += DAQDS__size) {
320 if (file->f_mode & FMODE_WRITE)
321 writew(data, lpDAQ + DAQDS_wSampleRate);
322 if (file->f_mode & FMODE_READ)
323 writew(data, lpDARQ + DAQDS_wSampleRate);
324 }
325 if (file->f_mode & FMODE_WRITE)
326 dev.play_sample_rate = data;
327 if (file->f_mode & FMODE_READ)
328 dev.rec_sample_rate = data;
329
330 if (put_user(data, p))
331 return -EFAULT;
332 return 0;
333
334 case SNDCTL_DSP_CHANNELS:
335 case SNDCTL_DSP_STEREO:
336 if (get_user(val, p))
337 return -EFAULT;
338
339 if (cmd == SNDCTL_DSP_CHANNELS) {
340 switch (val) {
341 case 1:
342 case 2:
343 data = val;
344 break;
345 default:
346 val = data = 2;
347 break;
348 }
349 } else {
350 switch (val) {
351 case 0:
352 data = 1;
353 break;
354 default:
355 val = 1;
356 case 1:
357 data = 2;
358 break;
359 }
360 }
361
362 for (i = 0; i < 3; ++i, lpDAQ += DAQDS__size, lpDARQ += DAQDS__size) {
363 if (file->f_mode & FMODE_WRITE)
364 writew(data, lpDAQ + DAQDS_wChannels);
365 if (file->f_mode & FMODE_READ)
366 writew(data, lpDARQ + DAQDS_wChannels);
367 }
368 if (file->f_mode & FMODE_WRITE)
369 dev.play_channels = data;
370 if (file->f_mode & FMODE_READ)
371 dev.rec_channels = data;
372
373 if (put_user(val, p))
374 return -EFAULT;
375 return 0;
376 }
377
378 return -EINVAL;
379}
380
381static int mixer_get(int d)
382{
383 if (d > 31)
384 return -EINVAL;
385
386 switch (d) {
387 case SOUND_MIXER_VOLUME:
388 case SOUND_MIXER_PCM:
389 case SOUND_MIXER_LINE:
390 case SOUND_MIXER_IMIX:
391 case SOUND_MIXER_LINE1:
392#ifndef MSND_CLASSIC
393 case SOUND_MIXER_MIC:
394 case SOUND_MIXER_SYNTH:
395#endif
396 return (dev.left_levels[d] >> 8) * 100 / 0xff |
397 (((dev.right_levels[d] >> 8) * 100 / 0xff) << 8);
398 default:
399 return 0;
400 }
401}
402
403#define update_volm(a,b) \
404 writew((dev.left_levels[a] >> 1) * \
405 readw(dev.SMA + SMA_wCurrMastVolLeft) / 0xffff, \
406 dev.SMA + SMA_##b##Left); \
407 writew((dev.right_levels[a] >> 1) * \
408 readw(dev.SMA + SMA_wCurrMastVolRight) / 0xffff, \
409 dev.SMA + SMA_##b##Right);
410
411#define update_potm(d,s,ar) \
412 writeb((dev.left_levels[d] >> 8) * \
413 readw(dev.SMA + SMA_wCurrMastVolLeft) / 0xffff, \
414 dev.SMA + SMA_##s##Left); \
415 writeb((dev.right_levels[d] >> 8) * \
416 readw(dev.SMA + SMA_wCurrMastVolRight) / 0xffff, \
417 dev.SMA + SMA_##s##Right); \
418 if (msnd_send_word(&dev, 0, 0, ar) == 0) \
419 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
420
421#define update_pot(d,s,ar) \
422 writeb(dev.left_levels[d] >> 8, \
423 dev.SMA + SMA_##s##Left); \
424 writeb(dev.right_levels[d] >> 8, \
425 dev.SMA + SMA_##s##Right); \
426 if (msnd_send_word(&dev, 0, 0, ar) == 0) \
427 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
428
429static int mixer_set(int d, int value)
430{
431 int left = value & 0x000000ff;
432 int right = (value & 0x0000ff00) >> 8;
433 int bLeft, bRight;
434 int wLeft, wRight;
435 int updatemaster = 0;
436
437 if (d > 31)
438 return -EINVAL;
439
440 bLeft = left * 0xff / 100;
441 wLeft = left * 0xffff / 100;
442
443 bRight = right * 0xff / 100;
444 wRight = right * 0xffff / 100;
445
446 dev.left_levels[d] = wLeft;
447 dev.right_levels[d] = wRight;
448
449 switch (d) {
450 /* master volume unscaled controls */
451 case SOUND_MIXER_LINE: /* line pot control */
452 /* scaled by IMIX in digital mix */
453 writeb(bLeft, dev.SMA + SMA_bInPotPosLeft);
454 writeb(bRight, dev.SMA + SMA_bInPotPosRight);
455 if (msnd_send_word(&dev, 0, 0, HDEXAR_IN_SET_POTS) == 0)
456 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
457 break;
458#ifndef MSND_CLASSIC
459 case SOUND_MIXER_MIC: /* mic pot control */
460 /* scaled by IMIX in digital mix */
461 writeb(bLeft, dev.SMA + SMA_bMicPotPosLeft);
462 writeb(bRight, dev.SMA + SMA_bMicPotPosRight);
463 if (msnd_send_word(&dev, 0, 0, HDEXAR_MIC_SET_POTS) == 0)
464 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
465 break;
466#endif
467 case SOUND_MIXER_VOLUME: /* master volume */
468 writew(wLeft, dev.SMA + SMA_wCurrMastVolLeft);
469 writew(wRight, dev.SMA + SMA_wCurrMastVolRight);
470 /* fall through */
471
472 case SOUND_MIXER_LINE1: /* aux pot control */
473 /* scaled by master volume */
474 /* fall through */
475
476 /* digital controls */
477 case SOUND_MIXER_SYNTH: /* synth vol (dsp mix) */
478 case SOUND_MIXER_PCM: /* pcm vol (dsp mix) */
479 case SOUND_MIXER_IMIX: /* input monitor (dsp mix) */
480 /* scaled by master volume */
481 updatemaster = 1;
482 break;
483
484 default:
485 return 0;
486 }
487
488 if (updatemaster) {
489 /* update master volume scaled controls */
490 update_volm(SOUND_MIXER_PCM, wCurrPlayVol);
491 update_volm(SOUND_MIXER_IMIX, wCurrInVol);
492#ifndef MSND_CLASSIC
493 update_volm(SOUND_MIXER_SYNTH, wCurrMHdrVol);
494#endif
495 update_potm(SOUND_MIXER_LINE1, bAuxPotPos, HDEXAR_AUX_SET_POTS);
496 }
497
498 return mixer_get(d);
499}
500
501static void mixer_setup(void)
502{
503 update_pot(SOUND_MIXER_LINE, bInPotPos, HDEXAR_IN_SET_POTS);
504 update_potm(SOUND_MIXER_LINE1, bAuxPotPos, HDEXAR_AUX_SET_POTS);
505 update_volm(SOUND_MIXER_PCM, wCurrPlayVol);
506 update_volm(SOUND_MIXER_IMIX, wCurrInVol);
507#ifndef MSND_CLASSIC
508 update_pot(SOUND_MIXER_MIC, bMicPotPos, HDEXAR_MIC_SET_POTS);
509 update_volm(SOUND_MIXER_SYNTH, wCurrMHdrVol);
510#endif
511}
512
513static unsigned long set_recsrc(unsigned long recsrc)
514{
515 if (dev.recsrc == recsrc)
516 return dev.recsrc;
517#ifdef HAVE_NORECSRC
518 else if (recsrc == 0)
519 dev.recsrc = 0;
520#endif
521 else
522 dev.recsrc ^= recsrc;
523
524#ifndef MSND_CLASSIC
525 if (dev.recsrc & SOUND_MASK_IMIX) {
526 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_ANA_IN) == 0)
527 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
528 }
529 else if (dev.recsrc & SOUND_MASK_SYNTH) {
530 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_SYNTH_IN) == 0)
531 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
532 }
533 else if ((dev.recsrc & SOUND_MASK_DIGITAL1) && test_bit(F_HAVEDIGITAL, &dev.flags)) {
534 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_DAT_IN) == 0)
535 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
536 }
537 else {
538#ifdef HAVE_NORECSRC
539 /* Select no input (?) */
540 dev.recsrc = 0;
541#else
542 dev.recsrc = SOUND_MASK_IMIX;
543 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_ANA_IN) == 0)
544 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
545#endif
546 }
547#endif /* MSND_CLASSIC */
548
549 return dev.recsrc;
550}
551
552static unsigned long force_recsrc(unsigned long recsrc)
553{
554 dev.recsrc = 0;
555 return set_recsrc(recsrc);
556}
557
558#define set_mixer_info() \
559 memset(&info, 0, sizeof(info)); \
560 strlcpy(info.id, "MSNDMIXER", sizeof(info.id)); \
561 strlcpy(info.name, "MultiSound Mixer", sizeof(info.name));
562
563static int mixer_ioctl(unsigned int cmd, unsigned long arg)
564{
565 if (cmd == SOUND_MIXER_INFO) {
566 mixer_info info;
567 set_mixer_info();
568 info.modify_counter = dev.mixer_mod_count;
569 if (copy_to_user((void __user *)arg, &info, sizeof(info)))
570 return -EFAULT;
571 return 0;
572 } else if (cmd == SOUND_OLD_MIXER_INFO) {
573 _old_mixer_info info;
574 set_mixer_info();
575 if (copy_to_user((void __user *)arg, &info, sizeof(info)))
576 return -EFAULT;
577 return 0;
578 } else if (cmd == SOUND_MIXER_PRIVATE1) {
579 dev.nresets = 0;
580 dsp_full_reset();
581 return 0;
582 } else if (((cmd >> 8) & 0xff) == 'M') {
583 int val = 0;
584
585 if (_SIOC_DIR(cmd) & _SIOC_WRITE) {
586 switch (cmd & 0xff) {
587 case SOUND_MIXER_RECSRC:
588 if (get_user(val, (int __user *)arg))
589 return -EFAULT;
590 val = set_recsrc(val);
591 break;
592
593 default:
594 if (get_user(val, (int __user *)arg))
595 return -EFAULT;
596 val = mixer_set(cmd & 0xff, val);
597 break;
598 }
599 ++dev.mixer_mod_count;
600 return put_user(val, (int __user *)arg);
601 } else {
602 switch (cmd & 0xff) {
603 case SOUND_MIXER_RECSRC:
604 val = dev.recsrc;
605 break;
606
607 case SOUND_MIXER_DEVMASK:
608 case SOUND_MIXER_STEREODEVS:
609 val = SOUND_MASK_PCM |
610 SOUND_MASK_LINE |
611 SOUND_MASK_IMIX |
612 SOUND_MASK_LINE1 |
613#ifndef MSND_CLASSIC
614 SOUND_MASK_MIC |
615 SOUND_MASK_SYNTH |
616#endif
617 SOUND_MASK_VOLUME;
618 break;
619
620 case SOUND_MIXER_RECMASK:
621#ifdef MSND_CLASSIC
622 val = 0;
623#else
624 val = SOUND_MASK_IMIX |
625 SOUND_MASK_SYNTH;
626 if (test_bit(F_HAVEDIGITAL, &dev.flags))
627 val |= SOUND_MASK_DIGITAL1;
628#endif
629 break;
630
631 case SOUND_MIXER_CAPS:
632 val = SOUND_CAP_EXCL_INPUT;
633 break;
634
635 default:
636 if ((val = mixer_get(cmd & 0xff)) < 0)
637 return -EINVAL;
638 break;
639 }
640 }
641
642 return put_user(val, (int __user *)arg);
643 }
644
645 return -EINVAL;
646}
647
648static int dev_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
649{
650 int minor = iminor(inode);
651
652 if (cmd == OSS_GETVERSION) {
653 int sound_version = SOUND_VERSION;
654 return put_user(sound_version, (int __user *)arg);
655 }
656
657 if (minor == dev.dsp_minor)
658 return dsp_ioctl(file, cmd, arg);
659 else if (minor == dev.mixer_minor)
660 return mixer_ioctl(cmd, arg);
661
662 return -EINVAL;
663}
664
665static void dsp_write_flush(void)
666{
667 if (!(dev.mode & FMODE_WRITE) || !test_bit(F_WRITING, &dev.flags))
668 return;
669 set_bit(F_WRITEFLUSH, &dev.flags);
670 interruptible_sleep_on_timeout(
671 &dev.writeflush,
672 get_play_delay_jiffies(dev.DAPF.len));
673 clear_bit(F_WRITEFLUSH, &dev.flags);
674 if (!signal_pending(current)) {
675 current->state = TASK_INTERRUPTIBLE;
676 schedule_timeout(get_play_delay_jiffies(DAP_BUFF_SIZE));
677 }
678 clear_bit(F_WRITING, &dev.flags);
679}
680
681static void dsp_halt(struct file *file)
682{
683 if ((file ? file->f_mode : dev.mode) & FMODE_READ) {
684 clear_bit(F_READING, &dev.flags);
685 chk_send_dsp_cmd(&dev, HDEX_RECORD_STOP);
686 msnd_disable_irq(&dev);
687 if (file) {
688 printk(KERN_DEBUG LOGNAME ": Stopping read for %p\n", file);
689 dev.mode &= ~FMODE_READ;
690 }
691 clear_bit(F_AUDIO_READ_INUSE, &dev.flags);
692 }
693 if ((file ? file->f_mode : dev.mode) & FMODE_WRITE) {
694 if (test_bit(F_WRITING, &dev.flags)) {
695 dsp_write_flush();
696 chk_send_dsp_cmd(&dev, HDEX_PLAY_STOP);
697 }
698 msnd_disable_irq(&dev);
699 if (file) {
700 printk(KERN_DEBUG LOGNAME ": Stopping write for %p\n", file);
701 dev.mode &= ~FMODE_WRITE;
702 }
703 clear_bit(F_AUDIO_WRITE_INUSE, &dev.flags);
704 }
705}
706
707static int dsp_release(struct file *file)
708{
709 dsp_halt(file);
710 return 0;
711}
712
713static int dsp_open(struct file *file)
714{
715 if ((file ? file->f_mode : dev.mode) & FMODE_WRITE) {
716 set_bit(F_AUDIO_WRITE_INUSE, &dev.flags);
717 clear_bit(F_WRITING, &dev.flags);
718 msnd_fifo_make_empty(&dev.DAPF);
719 reset_play_queue();
720 if (file) {
721 printk(KERN_DEBUG LOGNAME ": Starting write for %p\n", file);
722 dev.mode |= FMODE_WRITE;
723 }
724 msnd_enable_irq(&dev);
725 }
726 if ((file ? file->f_mode : dev.mode) & FMODE_READ) {
727 set_bit(F_AUDIO_READ_INUSE, &dev.flags);
728 clear_bit(F_READING, &dev.flags);
729 msnd_fifo_make_empty(&dev.DARF);
730 reset_record_queue();
731 if (file) {
732 printk(KERN_DEBUG LOGNAME ": Starting read for %p\n", file);
733 dev.mode |= FMODE_READ;
734 }
735 msnd_enable_irq(&dev);
736 }
737 return 0;
738}
739
740static void set_default_play_audio_parameters(void)
741{
742 dev.play_sample_size = DEFSAMPLESIZE;
743 dev.play_sample_rate = DEFSAMPLERATE;
744 dev.play_channels = DEFCHANNELS;
745}
746
747static void set_default_rec_audio_parameters(void)
748{
749 dev.rec_sample_size = DEFSAMPLESIZE;
750 dev.rec_sample_rate = DEFSAMPLERATE;
751 dev.rec_channels = DEFCHANNELS;
752}
753
754static void set_default_audio_parameters(void)
755{
756 set_default_play_audio_parameters();
757 set_default_rec_audio_parameters();
758}
759
760static int dev_open(struct inode *inode, struct file *file)
761{
762 int minor = iminor(inode);
763 int err = 0;
764
765 if (minor == dev.dsp_minor) {
766 if ((file->f_mode & FMODE_WRITE &&
767 test_bit(F_AUDIO_WRITE_INUSE, &dev.flags)) ||
768 (file->f_mode & FMODE_READ &&
769 test_bit(F_AUDIO_READ_INUSE, &dev.flags)))
770 return -EBUSY;
771
772 if ((err = dsp_open(file)) >= 0) {
773 dev.nresets = 0;
774 if (file->f_mode & FMODE_WRITE) {
775 set_default_play_audio_parameters();
776 if (!test_bit(F_DISABLE_WRITE_NDELAY, &dev.flags))
777 dev.play_ndelay = (file->f_flags & O_NDELAY) ? 1 : 0;
778 else
779 dev.play_ndelay = 0;
780 }
781 if (file->f_mode & FMODE_READ) {
782 set_default_rec_audio_parameters();
783 dev.rec_ndelay = (file->f_flags & O_NDELAY) ? 1 : 0;
784 }
785 }
786 }
787 else if (minor == dev.mixer_minor) {
788 /* nothing */
789 } else
790 err = -EINVAL;
791
792 return err;
793}
794
795static int dev_release(struct inode *inode, struct file *file)
796{
797 int minor = iminor(inode);
798 int err = 0;
799
800 lock_kernel();
801 if (minor == dev.dsp_minor)
802 err = dsp_release(file);
803 else if (minor == dev.mixer_minor) {
804 /* nothing */
805 } else
806 err = -EINVAL;
807 unlock_kernel();
808 return err;
809}
810
811static __inline__ int pack_DARQ_to_DARF(register int bank)
812{
813 register int size, timeout = 3;
814 register WORD wTmp;
815 LPDAQD DAQD;
816
817 /* Increment the tail and check for queue wrap */
818 wTmp = readw(dev.DARQ + JQS_wTail) + PCTODSP_OFFSET(DAQDS__size);
819 if (wTmp > readw(dev.DARQ + JQS_wSize))
820 wTmp = 0;
821 while (wTmp == readw(dev.DARQ + JQS_wHead) && timeout--)
822 udelay(1);
823 writew(wTmp, dev.DARQ + JQS_wTail);
824
825 /* Get our digital audio queue struct */
826 DAQD = bank * DAQDS__size + dev.base + DARQ_DATA_BUFF;
827
828 /* Get length of data */
829 size = readw(DAQD + DAQDS_wSize);
830
831 /* Read data from the head (unprotected bank 1 access okay
832 since this is only called inside an interrupt) */
833 msnd_outb(HPBLKSEL_1, dev.io + HP_BLKS);
834 msnd_fifo_write_io(
835 &dev.DARF,
836 dev.base + bank * DAR_BUFF_SIZE,
837 size);
838 msnd_outb(HPBLKSEL_0, dev.io + HP_BLKS);
839
840 return 1;
841}
842
843static __inline__ int pack_DAPF_to_DAPQ(register int start)
844{
845 register WORD DAPQ_tail;
846 register int protect = start, nbanks = 0;
847 LPDAQD DAQD;
848
849 DAPQ_tail = readw(dev.DAPQ + JQS_wTail);
850 while (DAPQ_tail != readw(dev.DAPQ + JQS_wHead) || start) {
851 register int bank_num = DAPQ_tail / PCTODSP_OFFSET(DAQDS__size);
852 register int n;
853 unsigned long flags;
854
855 /* Write the data to the new tail */
856 if (protect) {
857 /* Critical section: protect fifo in non-interrupt */
858 spin_lock_irqsave(&dev.lock, flags);
859 n = msnd_fifo_read_io(
860 &dev.DAPF,
861 dev.base + bank_num * DAP_BUFF_SIZE,
862 DAP_BUFF_SIZE);
863 spin_unlock_irqrestore(&dev.lock, flags);
864 } else {
865 n = msnd_fifo_read_io(
866 &dev.DAPF,
867 dev.base + bank_num * DAP_BUFF_SIZE,
868 DAP_BUFF_SIZE);
869 }
870 if (!n)
871 break;
872
873 if (start)
874 start = 0;
875
876 /* Get our digital audio queue struct */
877 DAQD = bank_num * DAQDS__size + dev.base + DAPQ_DATA_BUFF;
878
879 /* Write size of this bank */
880 writew(n, DAQD + DAQDS_wSize);
881 ++nbanks;
882
883 /* Then advance the tail */
884 DAPQ_tail = (++bank_num % 3) * PCTODSP_OFFSET(DAQDS__size);
885 writew(DAPQ_tail, dev.DAPQ + JQS_wTail);
886 /* Tell the DSP to play the bank */
887 msnd_send_dsp_cmd(&dev, HDEX_PLAY_START);
888 }
889 return nbanks;
890}
891
892static int dsp_read(char __user *buf, size_t len)
893{
894 int count = len;
895 char *page = (char *)__get_free_page(PAGE_SIZE);
896
897 if (!page)
898 return -ENOMEM;
899
900 while (count > 0) {
901 int n, k;
902 unsigned long flags;
903
904 k = PAGE_SIZE;
905 if (k > count)
906 k = count;
907
908 /* Critical section: protect fifo in non-interrupt */
909 spin_lock_irqsave(&dev.lock, flags);
910 n = msnd_fifo_read(&dev.DARF, page, k);
911 spin_unlock_irqrestore(&dev.lock, flags);
912 if (copy_to_user(buf, page, n)) {
913 free_page((unsigned long)page);
914 return -EFAULT;
915 }
916 buf += n;
917 count -= n;
918
919 if (n == k && count)
920 continue;
921
922 if (!test_bit(F_READING, &dev.flags) && dev.mode & FMODE_READ) {
923 dev.last_recbank = -1;
924 if (chk_send_dsp_cmd(&dev, HDEX_RECORD_START) == 0)
925 set_bit(F_READING, &dev.flags);
926 }
927
928 if (dev.rec_ndelay) {
929 free_page((unsigned long)page);
930 return count == len ? -EAGAIN : len - count;
931 }
932
933 if (count > 0) {
934 set_bit(F_READBLOCK, &dev.flags);
935 if (!interruptible_sleep_on_timeout(
936 &dev.readblock,
937 get_rec_delay_jiffies(DAR_BUFF_SIZE)))
938 clear_bit(F_READING, &dev.flags);
939 clear_bit(F_READBLOCK, &dev.flags);
940 if (signal_pending(current)) {
941 free_page((unsigned long)page);
942 return -EINTR;
943 }
944 }
945 }
946 free_page((unsigned long)page);
947 return len - count;
948}
949
950static int dsp_write(const char __user *buf, size_t len)
951{
952 int count = len;
953 char *page = (char *)__get_free_page(GFP_KERNEL);
954
955 if (!page)
956 return -ENOMEM;
957
958 while (count > 0) {
959 int n, k;
960 unsigned long flags;
961
962 k = PAGE_SIZE;
963 if (k > count)
964 k = count;
965
966 if (copy_from_user(page, buf, k)) {
967 free_page((unsigned long)page);
968 return -EFAULT;
969 }
970
971 /* Critical section: protect fifo in non-interrupt */
972 spin_lock_irqsave(&dev.lock, flags);
973 n = msnd_fifo_write(&dev.DAPF, page, k);
974 spin_unlock_irqrestore(&dev.lock, flags);
975 buf += n;
976 count -= n;
977
978 if (count && n == k)
979 continue;
980
981 if (!test_bit(F_WRITING, &dev.flags) && (dev.mode & FMODE_WRITE)) {
982 dev.last_playbank = -1;
983 if (pack_DAPF_to_DAPQ(1) > 0)
984 set_bit(F_WRITING, &dev.flags);
985 }
986
987 if (dev.play_ndelay) {
988 free_page((unsigned long)page);
989 return count == len ? -EAGAIN : len - count;
990 }
991
992 if (count > 0) {
993 set_bit(F_WRITEBLOCK, &dev.flags);
994 interruptible_sleep_on_timeout(
995 &dev.writeblock,
996 get_play_delay_jiffies(DAP_BUFF_SIZE));
997 clear_bit(F_WRITEBLOCK, &dev.flags);
998 if (signal_pending(current)) {
999 free_page((unsigned long)page);
1000 return -EINTR;
1001 }
1002 }
1003 }
1004
1005 free_page((unsigned long)page);
1006 return len - count;
1007}
1008
1009static ssize_t dev_read(struct file *file, char __user *buf, size_t count, loff_t *off)
1010{
1011 int minor = iminor(file->f_dentry->d_inode);
1012 if (minor == dev.dsp_minor)
1013 return dsp_read(buf, count);
1014 else
1015 return -EINVAL;
1016}
1017
1018static ssize_t dev_write(struct file *file, const char __user *buf, size_t count, loff_t *off)
1019{
1020 int minor = iminor(file->f_dentry->d_inode);
1021 if (minor == dev.dsp_minor)
1022 return dsp_write(buf, count);
1023 else
1024 return -EINVAL;
1025}
1026
1027static __inline__ void eval_dsp_msg(register WORD wMessage)
1028{
1029 switch (HIBYTE(wMessage)) {
1030 case HIMT_PLAY_DONE:
1031 if (dev.last_playbank == LOBYTE(wMessage) || !test_bit(F_WRITING, &dev.flags))
1032 break;
1033 dev.last_playbank = LOBYTE(wMessage);
1034
1035 if (pack_DAPF_to_DAPQ(0) <= 0) {
1036 if (!test_bit(F_WRITEBLOCK, &dev.flags)) {
1037 if (test_and_clear_bit(F_WRITEFLUSH, &dev.flags))
1038 wake_up_interruptible(&dev.writeflush);
1039 }
1040 clear_bit(F_WRITING, &dev.flags);
1041 }
1042
1043 if (test_bit(F_WRITEBLOCK, &dev.flags))
1044 wake_up_interruptible(&dev.writeblock);
1045 break;
1046
1047 case HIMT_RECORD_DONE:
1048 if (dev.last_recbank == LOBYTE(wMessage))
1049 break;
1050 dev.last_recbank = LOBYTE(wMessage);
1051
1052 pack_DARQ_to_DARF(dev.last_recbank);
1053
1054 if (test_bit(F_READBLOCK, &dev.flags))
1055 wake_up_interruptible(&dev.readblock);
1056 break;
1057
1058 case HIMT_DSP:
1059 switch (LOBYTE(wMessage)) {
1060#ifndef MSND_CLASSIC
1061 case HIDSP_PLAY_UNDER:
1062#endif
1063 case HIDSP_INT_PLAY_UNDER:
1064/* printk(KERN_DEBUG LOGNAME ": Play underflow\n"); */
1065 clear_bit(F_WRITING, &dev.flags);
1066 break;
1067
1068 case HIDSP_INT_RECORD_OVER:
1069/* printk(KERN_DEBUG LOGNAME ": Record overflow\n"); */
1070 clear_bit(F_READING, &dev.flags);
1071 break;
1072
1073 default:
1074/* printk(KERN_DEBUG LOGNAME ": DSP message %d 0x%02x\n",
1075 LOBYTE(wMessage), LOBYTE(wMessage)); */
1076 break;
1077 }
1078 break;
1079
1080 case HIMT_MIDI_IN_UCHAR:
1081 if (dev.midi_in_interrupt)
1082 (*dev.midi_in_interrupt)(&dev);
1083 break;
1084
1085 default:
1086/* printk(KERN_DEBUG LOGNAME ": HIMT message %d 0x%02x\n", HIBYTE(wMessage), HIBYTE(wMessage)); */
1087 break;
1088 }
1089}
1090
1091static irqreturn_t intr(int irq, void *dev_id, struct pt_regs *regs)
1092{
1093 /* Send ack to DSP */
1094 msnd_inb(dev.io + HP_RXL);
1095
1096 /* Evaluate queued DSP messages */
1097 while (readw(dev.DSPQ + JQS_wTail) != readw(dev.DSPQ + JQS_wHead)) {
1098 register WORD wTmp;
1099
1100 eval_dsp_msg(readw(dev.pwDSPQData + 2*readw(dev.DSPQ + JQS_wHead)));
1101
1102 if ((wTmp = readw(dev.DSPQ + JQS_wHead) + 1) > readw(dev.DSPQ + JQS_wSize))
1103 writew(0, dev.DSPQ + JQS_wHead);
1104 else
1105 writew(wTmp, dev.DSPQ + JQS_wHead);
1106 }
1107 return IRQ_HANDLED;
1108}
1109
1110static struct file_operations dev_fileops = {
1111 .owner = THIS_MODULE,
1112 .read = dev_read,
1113 .write = dev_write,
1114 .ioctl = dev_ioctl,
1115 .open = dev_open,
1116 .release = dev_release,
1117};
1118
1119static int reset_dsp(void)
1120{
1121 int timeout = 100;
1122
1123 msnd_outb(HPDSPRESET_ON, dev.io + HP_DSPR);
1124 mdelay(1);
1125#ifndef MSND_CLASSIC
1126 dev.info = msnd_inb(dev.io + HP_INFO);
1127#endif
1128 msnd_outb(HPDSPRESET_OFF, dev.io + HP_DSPR);
1129 mdelay(1);
1130 while (timeout-- > 0) {
1131 if (msnd_inb(dev.io + HP_CVR) == HP_CVR_DEF)
1132 return 0;
1133 mdelay(1);
1134 }
1135 printk(KERN_ERR LOGNAME ": Cannot reset DSP\n");
1136
1137 return -EIO;
1138}
1139
1140static int __init probe_multisound(void)
1141{
1142#ifndef MSND_CLASSIC
1143 char *xv, *rev = NULL;
1144 char *pin = "Pinnacle", *fiji = "Fiji";
1145 char *pinfiji = "Pinnacle/Fiji";
1146#endif
1147
1148 if (!request_region(dev.io, dev.numio, "probing")) {
1149 printk(KERN_ERR LOGNAME ": I/O port conflict\n");
1150 return -ENODEV;
1151 }
1152
1153 if (reset_dsp() < 0) {
1154 release_region(dev.io, dev.numio);
1155 return -ENODEV;
1156 }
1157
1158#ifdef MSND_CLASSIC
1159 dev.name = "Classic/Tahiti/Monterey";
1160 printk(KERN_INFO LOGNAME ": %s, "
1161#else
1162 switch (dev.info >> 4) {
1163 case 0xf: xv = "<= 1.15"; break;
1164 case 0x1: xv = "1.18/1.2"; break;
1165 case 0x2: xv = "1.3"; break;
1166 case 0x3: xv = "1.4"; break;
1167 default: xv = "unknown"; break;
1168 }
1169
1170 switch (dev.info & 0x7) {
1171 case 0x0: rev = "I"; dev.name = pin; break;
1172 case 0x1: rev = "F"; dev.name = pin; break;
1173 case 0x2: rev = "G"; dev.name = pin; break;
1174 case 0x3: rev = "H"; dev.name = pin; break;
1175 case 0x4: rev = "E"; dev.name = fiji; break;
1176 case 0x5: rev = "C"; dev.name = fiji; break;
1177 case 0x6: rev = "D"; dev.name = fiji; break;
1178 case 0x7:
1179 rev = "A-B (Fiji) or A-E (Pinnacle)";
1180 dev.name = pinfiji;
1181 break;
1182 }
1183 printk(KERN_INFO LOGNAME ": %s revision %s, Xilinx version %s, "
1184#endif /* MSND_CLASSIC */
1185 "I/O 0x%x-0x%x, IRQ %d, memory mapped to %p-%p\n",
1186 dev.name,
1187#ifndef MSND_CLASSIC
1188 rev, xv,
1189#endif
1190 dev.io, dev.io + dev.numio - 1,
1191 dev.irq,
1192 dev.base, dev.base + 0x7fff);
1193
1194 release_region(dev.io, dev.numio);
1195 return 0;
1196}
1197
1198static int init_sma(void)
1199{
1200 static int initted;
1201 WORD mastVolLeft, mastVolRight;
1202 unsigned long flags;
1203
1204#ifdef MSND_CLASSIC
1205 msnd_outb(dev.memid, dev.io + HP_MEMM);
1206#endif
1207 msnd_outb(HPBLKSEL_0, dev.io + HP_BLKS);
1208 if (initted) {
1209 mastVolLeft = readw(dev.SMA + SMA_wCurrMastVolLeft);
1210 mastVolRight = readw(dev.SMA + SMA_wCurrMastVolRight);
1211 } else
1212 mastVolLeft = mastVolRight = 0;
1213 memset_io(dev.base, 0, 0x8000);
1214
1215 /* Critical section: bank 1 access */
1216 spin_lock_irqsave(&dev.lock, flags);
1217 msnd_outb(HPBLKSEL_1, dev.io + HP_BLKS);
1218 memset_io(dev.base, 0, 0x8000);
1219 msnd_outb(HPBLKSEL_0, dev.io + HP_BLKS);
1220 spin_unlock_irqrestore(&dev.lock, flags);
1221
1222 dev.pwDSPQData = (dev.base + DSPQ_DATA_BUFF);
1223 dev.pwMODQData = (dev.base + MODQ_DATA_BUFF);
1224 dev.pwMIDQData = (dev.base + MIDQ_DATA_BUFF);
1225
1226 /* Motorola 56k shared memory base */
1227 dev.SMA = dev.base + SMA_STRUCT_START;
1228
1229 /* Digital audio play queue */
1230 dev.DAPQ = dev.base + DAPQ_OFFSET;
1231 msnd_init_queue(dev.DAPQ, DAPQ_DATA_BUFF, DAPQ_BUFF_SIZE);
1232
1233 /* Digital audio record queue */
1234 dev.DARQ = dev.base + DARQ_OFFSET;
1235 msnd_init_queue(dev.DARQ, DARQ_DATA_BUFF, DARQ_BUFF_SIZE);
1236
1237 /* MIDI out queue */
1238 dev.MODQ = dev.base + MODQ_OFFSET;
1239 msnd_init_queue(dev.MODQ, MODQ_DATA_BUFF, MODQ_BUFF_SIZE);
1240
1241 /* MIDI in queue */
1242 dev.MIDQ = dev.base + MIDQ_OFFSET;
1243 msnd_init_queue(dev.MIDQ, MIDQ_DATA_BUFF, MIDQ_BUFF_SIZE);
1244
1245 /* DSP -> host message queue */
1246 dev.DSPQ = dev.base + DSPQ_OFFSET;
1247 msnd_init_queue(dev.DSPQ, DSPQ_DATA_BUFF, DSPQ_BUFF_SIZE);
1248
1249 /* Setup some DSP values */
1250#ifndef MSND_CLASSIC
1251 writew(1, dev.SMA + SMA_wCurrPlayFormat);
1252 writew(dev.play_sample_size, dev.SMA + SMA_wCurrPlaySampleSize);
1253 writew(dev.play_channels, dev.SMA + SMA_wCurrPlayChannels);
1254 writew(dev.play_sample_rate, dev.SMA + SMA_wCurrPlaySampleRate);
1255#endif
1256 writew(dev.play_sample_rate, dev.SMA + SMA_wCalFreqAtoD);
1257 writew(mastVolLeft, dev.SMA + SMA_wCurrMastVolLeft);
1258 writew(mastVolRight, dev.SMA + SMA_wCurrMastVolRight);
1259#ifndef MSND_CLASSIC
1260 writel(0x00010000, dev.SMA + SMA_dwCurrPlayPitch);
1261 writel(0x00000001, dev.SMA + SMA_dwCurrPlayRate);
1262#endif
1263 writew(0x303, dev.SMA + SMA_wCurrInputTagBits);
1264
1265 initted = 1;
1266
1267 return 0;
1268}
1269
1270static int __init calibrate_adc(WORD srate)
1271{
1272 writew(srate, dev.SMA + SMA_wCalFreqAtoD);
1273 if (dev.calibrate_signal == 0)
1274 writew(readw(dev.SMA + SMA_wCurrHostStatusFlags)
1275 | 0x0001, dev.SMA + SMA_wCurrHostStatusFlags);
1276 else
1277 writew(readw(dev.SMA + SMA_wCurrHostStatusFlags)
1278 & ~0x0001, dev.SMA + SMA_wCurrHostStatusFlags);
1279 if (msnd_send_word(&dev, 0, 0, HDEXAR_CAL_A_TO_D) == 0 &&
1280 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ) == 0) {
1281 current->state = TASK_INTERRUPTIBLE;
1282 schedule_timeout(HZ / 3);
1283 return 0;
1284 }
1285 printk(KERN_WARNING LOGNAME ": ADC calibration failed\n");
1286
1287 return -EIO;
1288}
1289
1290static int upload_dsp_code(void)
1291{
1292 msnd_outb(HPBLKSEL_0, dev.io + HP_BLKS);
1293#ifndef HAVE_DSPCODEH
1294 INITCODESIZE = mod_firmware_load(INITCODEFILE, &INITCODE);
1295 if (!INITCODE) {
1296 printk(KERN_ERR LOGNAME ": Error loading " INITCODEFILE);
1297 return -EBUSY;
1298 }
1299
1300 PERMCODESIZE = mod_firmware_load(PERMCODEFILE, &PERMCODE);
1301 if (!PERMCODE) {
1302 printk(KERN_ERR LOGNAME ": Error loading " PERMCODEFILE);
1303 vfree(INITCODE);
1304 return -EBUSY;
1305 }
1306#endif
1307 memcpy_toio(dev.base, PERMCODE, PERMCODESIZE);
1308 if (msnd_upload_host(&dev, INITCODE, INITCODESIZE) < 0) {
1309 printk(KERN_WARNING LOGNAME ": Error uploading to DSP\n");
1310 return -ENODEV;
1311 }
1312#ifdef HAVE_DSPCODEH
1313 printk(KERN_INFO LOGNAME ": DSP firmware uploaded (resident)\n");
1314#else
1315 printk(KERN_INFO LOGNAME ": DSP firmware uploaded\n");
1316#endif
1317
1318#ifndef HAVE_DSPCODEH
1319 vfree(INITCODE);
1320 vfree(PERMCODE);
1321#endif
1322
1323 return 0;
1324}
1325
1326#ifdef MSND_CLASSIC
1327static void reset_proteus(void)
1328{
1329 msnd_outb(HPPRORESET_ON, dev.io + HP_PROR);
1330 mdelay(TIME_PRO_RESET);
1331 msnd_outb(HPPRORESET_OFF, dev.io + HP_PROR);
1332 mdelay(TIME_PRO_RESET_DONE);
1333}
1334#endif
1335
1336static int initialize(void)
1337{
1338 int err, timeout;
1339
1340#ifdef MSND_CLASSIC
1341 msnd_outb(HPWAITSTATE_0, dev.io + HP_WAIT);
1342 msnd_outb(HPBITMODE_16, dev.io + HP_BITM);
1343
1344 reset_proteus();
1345#endif
1346 if ((err = init_sma()) < 0) {
1347 printk(KERN_WARNING LOGNAME ": Cannot initialize SMA\n");
1348 return err;
1349 }
1350
1351 if ((err = reset_dsp()) < 0)
1352 return err;
1353
1354 if ((err = upload_dsp_code()) < 0) {
1355 printk(KERN_WARNING LOGNAME ": Cannot upload DSP code\n");
1356 return err;
1357 }
1358
1359 timeout = 200;
1360 while (readw(dev.base)) {
1361 mdelay(1);
1362 if (!timeout--) {
1363 printk(KERN_DEBUG LOGNAME ": DSP reset timeout\n");
1364 return -EIO;
1365 }
1366 }
1367
1368 mixer_setup();
1369
1370 return 0;
1371}
1372
1373static int dsp_full_reset(void)
1374{
1375 int rv;
1376
1377 if (test_bit(F_RESETTING, &dev.flags) || ++dev.nresets > 10)
1378 return 0;
1379
1380 set_bit(F_RESETTING, &dev.flags);
1381 printk(KERN_INFO LOGNAME ": DSP reset\n");
1382 dsp_halt(NULL); /* Unconditionally halt */
1383 if ((rv = initialize()))
1384 printk(KERN_WARNING LOGNAME ": DSP reset failed\n");
1385 force_recsrc(dev.recsrc);
1386 dsp_open(NULL);
1387 clear_bit(F_RESETTING, &dev.flags);
1388
1389 return rv;
1390}
1391
1392static int __init attach_multisound(void)
1393{
1394 int err;
1395
1396 if ((err = request_irq(dev.irq, intr, 0, dev.name, &dev)) < 0) {
1397 printk(KERN_ERR LOGNAME ": Couldn't grab IRQ %d\n", dev.irq);
1398 return err;
1399 }
1400 request_region(dev.io, dev.numio, dev.name);
1401
1402 if ((err = dsp_full_reset()) < 0) {
1403 release_region(dev.io, dev.numio);
1404 free_irq(dev.irq, &dev);
1405 return err;
1406 }
1407
1408 if ((err = msnd_register(&dev)) < 0) {
1409 printk(KERN_ERR LOGNAME ": Unable to register MultiSound\n");
1410 release_region(dev.io, dev.numio);
1411 free_irq(dev.irq, &dev);
1412 return err;
1413 }
1414
1415 if ((dev.dsp_minor = register_sound_dsp(&dev_fileops, -1)) < 0) {
1416 printk(KERN_ERR LOGNAME ": Unable to register DSP operations\n");
1417 msnd_unregister(&dev);
1418 release_region(dev.io, dev.numio);
1419 free_irq(dev.irq, &dev);
1420 return dev.dsp_minor;
1421 }
1422
1423 if ((dev.mixer_minor = register_sound_mixer(&dev_fileops, -1)) < 0) {
1424 printk(KERN_ERR LOGNAME ": Unable to register mixer operations\n");
1425 unregister_sound_mixer(dev.mixer_minor);
1426 msnd_unregister(&dev);
1427 release_region(dev.io, dev.numio);
1428 free_irq(dev.irq, &dev);
1429 return dev.mixer_minor;
1430 }
1431
1432 dev.ext_midi_dev = dev.hdr_midi_dev = -1;
1433
1434 disable_irq(dev.irq);
1435 calibrate_adc(dev.play_sample_rate);
1436#ifndef MSND_CLASSIC
1437 force_recsrc(SOUND_MASK_IMIX);
1438#endif
1439
1440 return 0;
1441}
1442
1443static void __exit unload_multisound(void)
1444{
1445 release_region(dev.io, dev.numio);
1446 free_irq(dev.irq, &dev);
1447 unregister_sound_mixer(dev.mixer_minor);
1448 unregister_sound_dsp(dev.dsp_minor);
1449 msnd_unregister(&dev);
1450}
1451
1452#ifndef MSND_CLASSIC
1453
1454/* Pinnacle/Fiji Logical Device Configuration */
1455
1456static int __init msnd_write_cfg(int cfg, int reg, int value)
1457{
1458 msnd_outb(reg, cfg);
1459 msnd_outb(value, cfg + 1);
1460 if (value != msnd_inb(cfg + 1)) {
1461 printk(KERN_ERR LOGNAME ": msnd_write_cfg: I/O error\n");
1462 return -EIO;
1463 }
1464 return 0;
1465}
1466
1467static int __init msnd_write_cfg_io0(int cfg, int num, WORD io)
1468{
1469 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1470 return -EIO;
1471 if (msnd_write_cfg(cfg, IREG_IO0_BASEHI, HIBYTE(io)))
1472 return -EIO;
1473 if (msnd_write_cfg(cfg, IREG_IO0_BASELO, LOBYTE(io)))
1474 return -EIO;
1475 return 0;
1476}
1477
1478static int __init msnd_write_cfg_io1(int cfg, int num, WORD io)
1479{
1480 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1481 return -EIO;
1482 if (msnd_write_cfg(cfg, IREG_IO1_BASEHI, HIBYTE(io)))
1483 return -EIO;
1484 if (msnd_write_cfg(cfg, IREG_IO1_BASELO, LOBYTE(io)))
1485 return -EIO;
1486 return 0;
1487}
1488
1489static int __init msnd_write_cfg_irq(int cfg, int num, WORD irq)
1490{
1491 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1492 return -EIO;
1493 if (msnd_write_cfg(cfg, IREG_IRQ_NUMBER, LOBYTE(irq)))
1494 return -EIO;
1495 if (msnd_write_cfg(cfg, IREG_IRQ_TYPE, IRQTYPE_EDGE))
1496 return -EIO;
1497 return 0;
1498}
1499
1500static int __init msnd_write_cfg_mem(int cfg, int num, int mem)
1501{
1502 WORD wmem;
1503
1504 mem >>= 8;
1505 mem &= 0xfff;
1506 wmem = (WORD)mem;
1507 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1508 return -EIO;
1509 if (msnd_write_cfg(cfg, IREG_MEMBASEHI, HIBYTE(wmem)))
1510 return -EIO;
1511 if (msnd_write_cfg(cfg, IREG_MEMBASELO, LOBYTE(wmem)))
1512 return -EIO;
1513 if (wmem && msnd_write_cfg(cfg, IREG_MEMCONTROL, (MEMTYPE_HIADDR | MEMTYPE_16BIT)))
1514 return -EIO;
1515 return 0;
1516}
1517
1518static int __init msnd_activate_logical(int cfg, int num)
1519{
1520 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1521 return -EIO;
1522 if (msnd_write_cfg(cfg, IREG_ACTIVATE, LD_ACTIVATE))
1523 return -EIO;
1524 return 0;
1525}
1526
1527static int __init msnd_write_cfg_logical(int cfg, int num, WORD io0, WORD io1, WORD irq, int mem)
1528{
1529 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1530 return -EIO;
1531 if (msnd_write_cfg_io0(cfg, num, io0))
1532 return -EIO;
1533 if (msnd_write_cfg_io1(cfg, num, io1))
1534 return -EIO;
1535 if (msnd_write_cfg_irq(cfg, num, irq))
1536 return -EIO;
1537 if (msnd_write_cfg_mem(cfg, num, mem))
1538 return -EIO;
1539 if (msnd_activate_logical(cfg, num))
1540 return -EIO;
1541 return 0;
1542}
1543
1544typedef struct msnd_pinnacle_cfg_device {
1545 WORD io0, io1, irq;
1546 int mem;
1547} msnd_pinnacle_cfg_t[4];
1548
1549static int __init msnd_pinnacle_cfg_devices(int cfg, int reset, msnd_pinnacle_cfg_t device)
1550{
1551 int i;
1552
1553 /* Reset devices if told to */
1554 if (reset) {
1555 printk(KERN_INFO LOGNAME ": Resetting all devices\n");
1556 for (i = 0; i < 4; ++i)
1557 if (msnd_write_cfg_logical(cfg, i, 0, 0, 0, 0))
1558 return -EIO;
1559 }
1560
1561 /* Configure specified devices */
1562 for (i = 0; i < 4; ++i) {
1563
1564 switch (i) {
1565 case 0: /* DSP */
1566 if (!(device[i].io0 && device[i].irq && device[i].mem))
1567 continue;
1568 break;
1569 case 1: /* MPU */
1570 if (!(device[i].io0 && device[i].irq))
1571 continue;
1572 printk(KERN_INFO LOGNAME
1573 ": Configuring MPU to I/O 0x%x IRQ %d\n",
1574 device[i].io0, device[i].irq);
1575 break;
1576 case 2: /* IDE */
1577 if (!(device[i].io0 && device[i].io1 && device[i].irq))
1578 continue;
1579 printk(KERN_INFO LOGNAME
1580 ": Configuring IDE to I/O 0x%x, 0x%x IRQ %d\n",
1581 device[i].io0, device[i].io1, device[i].irq);
1582 break;
1583 case 3: /* Joystick */
1584 if (!(device[i].io0))
1585 continue;
1586 printk(KERN_INFO LOGNAME
1587 ": Configuring joystick to I/O 0x%x\n",
1588 device[i].io0);
1589 break;
1590 }
1591
1592 /* Configure the device */
1593 if (msnd_write_cfg_logical(cfg, i, device[i].io0, device[i].io1, device[i].irq, device[i].mem))
1594 return -EIO;
1595 }
1596
1597 return 0;
1598}
1599#endif
1600
1601#ifdef MODULE
1602MODULE_AUTHOR ("Andrew Veliath <andrewtv@usa.net>");
1603MODULE_DESCRIPTION ("Turtle Beach " LONGNAME " Linux Driver");
1604MODULE_LICENSE("GPL");
1605
1606static int io __initdata = -1;
1607static int irq __initdata = -1;
1608static int mem __initdata = -1;
1609static int write_ndelay __initdata = -1;
1610
1611#ifndef MSND_CLASSIC
1612/* Pinnacle/Fiji non-PnP Config Port */
1613static int cfg __initdata = -1;
1614
1615/* Extra Peripheral Configuration */
1616static int reset __initdata = 0;
1617static int mpu_io __initdata = 0;
1618static int mpu_irq __initdata = 0;
1619static int ide_io0 __initdata = 0;
1620static int ide_io1 __initdata = 0;
1621static int ide_irq __initdata = 0;
1622static int joystick_io __initdata = 0;
1623
1624/* If we have the digital daugherboard... */
1625static int digital __initdata = 0;
1626#endif
1627
1628static int fifosize __initdata = DEFFIFOSIZE;
1629static int calibrate_signal __initdata = 0;
1630
1631#else /* not a module */
1632
1633static int write_ndelay __initdata = -1;
1634
1635#ifdef MSND_CLASSIC
1636static int io __initdata = CONFIG_MSNDCLAS_IO;
1637static int irq __initdata = CONFIG_MSNDCLAS_IRQ;
1638static int mem __initdata = CONFIG_MSNDCLAS_MEM;
1639#else /* Pinnacle/Fiji */
1640
1641static int io __initdata = CONFIG_MSNDPIN_IO;
1642static int irq __initdata = CONFIG_MSNDPIN_IRQ;
1643static int mem __initdata = CONFIG_MSNDPIN_MEM;
1644
1645/* Pinnacle/Fiji non-PnP Config Port */
1646#ifdef CONFIG_MSNDPIN_NONPNP
1647# ifndef CONFIG_MSNDPIN_CFG
1648# define CONFIG_MSNDPIN_CFG 0x250
1649# endif
1650#else
1651# ifdef CONFIG_MSNDPIN_CFG
1652# undef CONFIG_MSNDPIN_CFG
1653# endif
1654# define CONFIG_MSNDPIN_CFG -1
1655#endif
1656static int cfg __initdata = CONFIG_MSNDPIN_CFG;
1657/* If not a module, we don't need to bother with reset=1 */
1658static int reset;
1659
1660/* Extra Peripheral Configuration (Default: Disable) */
1661#ifndef CONFIG_MSNDPIN_MPU_IO
1662# define CONFIG_MSNDPIN_MPU_IO 0
1663#endif
1664static int mpu_io __initdata = CONFIG_MSNDPIN_MPU_IO;
1665
1666#ifndef CONFIG_MSNDPIN_MPU_IRQ
1667# define CONFIG_MSNDPIN_MPU_IRQ 0
1668#endif
1669static int mpu_irq __initdata = CONFIG_MSNDPIN_MPU_IRQ;
1670
1671#ifndef CONFIG_MSNDPIN_IDE_IO0
1672# define CONFIG_MSNDPIN_IDE_IO0 0
1673#endif
1674static int ide_io0 __initdata = CONFIG_MSNDPIN_IDE_IO0;
1675
1676#ifndef CONFIG_MSNDPIN_IDE_IO1
1677# define CONFIG_MSNDPIN_IDE_IO1 0
1678#endif
1679static int ide_io1 __initdata = CONFIG_MSNDPIN_IDE_IO1;
1680
1681#ifndef CONFIG_MSNDPIN_IDE_IRQ
1682# define CONFIG_MSNDPIN_IDE_IRQ 0
1683#endif
1684static int ide_irq __initdata = CONFIG_MSNDPIN_IDE_IRQ;
1685
1686#ifndef CONFIG_MSNDPIN_JOYSTICK_IO
1687# define CONFIG_MSNDPIN_JOYSTICK_IO 0
1688#endif
1689static int joystick_io __initdata = CONFIG_MSNDPIN_JOYSTICK_IO;
1690
1691/* Have SPDIF (Digital) Daughterboard */
1692#ifndef CONFIG_MSNDPIN_DIGITAL
1693# define CONFIG_MSNDPIN_DIGITAL 0
1694#endif
1695static int digital __initdata = CONFIG_MSNDPIN_DIGITAL;
1696
1697#endif /* MSND_CLASSIC */
1698
1699#ifndef CONFIG_MSND_FIFOSIZE
1700# define CONFIG_MSND_FIFOSIZE DEFFIFOSIZE
1701#endif
1702static int fifosize __initdata = CONFIG_MSND_FIFOSIZE;
1703
1704#ifndef CONFIG_MSND_CALSIGNAL
1705# define CONFIG_MSND_CALSIGNAL 0
1706#endif
1707static int
1708calibrate_signal __initdata = CONFIG_MSND_CALSIGNAL;
1709#endif /* MODULE */
1710
1711module_param (io, int, 0);
1712module_param (irq, int, 0);
1713module_param (mem, int, 0);
1714module_param (write_ndelay, int, 0);
1715module_param (fifosize, int, 0);
1716module_param (calibrate_signal, int, 0);
1717#ifndef MSND_CLASSIC
1718module_param (digital, bool, 0);
1719module_param (cfg, int, 0);
1720module_param (reset, int, 0);
1721module_param (mpu_io, int, 0);
1722module_param (mpu_irq, int, 0);
1723module_param (ide_io0, int, 0);
1724module_param (ide_io1, int, 0);
1725module_param (ide_irq, int, 0);
1726module_param (joystick_io, int, 0);
1727#endif
1728
1729static int __init msnd_init(void)
1730{
1731 int err;
1732#ifndef MSND_CLASSIC
1733 static msnd_pinnacle_cfg_t pinnacle_devs;
1734#endif /* MSND_CLASSIC */
1735
1736 printk(KERN_INFO LOGNAME ": Turtle Beach " LONGNAME " Linux Driver Version "
1737 VERSION ", Copyright (C) 1998 Andrew Veliath\n");
1738
1739 if (io == -1 || irq == -1 || mem == -1)
1740 printk(KERN_WARNING LOGNAME ": io, irq and mem must be set\n");
1741
1742#ifdef MSND_CLASSIC
1743 if (io == -1 ||
1744 !(io == 0x290 ||
1745 io == 0x260 ||
1746 io == 0x250 ||
1747 io == 0x240 ||
1748 io == 0x230 ||
1749 io == 0x220 ||
1750 io == 0x210 ||
1751 io == 0x3e0)) {
1752 printk(KERN_ERR LOGNAME ": \"io\" - DSP I/O base must be set to 0x210, 0x220, 0x230, 0x240, 0x250, 0x260, 0x290, or 0x3E0\n");
1753 return -EINVAL;
1754 }
1755#else
1756 if (io == -1 ||
1757 io < 0x100 ||
1758 io > 0x3e0 ||
1759 (io % 0x10) != 0) {
1760 printk(KERN_ERR LOGNAME ": \"io\" - DSP I/O base must within the range 0x100 to 0x3E0 and must be evenly divisible by 0x10\n");
1761 return -EINVAL;
1762 }
1763#endif /* MSND_CLASSIC */
1764
1765 if (irq == -1 ||
1766 !(irq == 5 ||
1767 irq == 7 ||
1768 irq == 9 ||
1769 irq == 10 ||
1770 irq == 11 ||
1771 irq == 12)) {
1772 printk(KERN_ERR LOGNAME ": \"irq\" - must be set to 5, 7, 9, 10, 11 or 12\n");
1773 return -EINVAL;
1774 }
1775
1776 if (mem == -1 ||
1777 !(mem == 0xb0000 ||
1778 mem == 0xc8000 ||
1779 mem == 0xd0000 ||
1780 mem == 0xd8000 ||
1781 mem == 0xe0000 ||
1782 mem == 0xe8000)) {
1783 printk(KERN_ERR LOGNAME ": \"mem\" - must be set to "
1784 "0xb0000, 0xc8000, 0xd0000, 0xd8000, 0xe0000 or 0xe8000\n");
1785 return -EINVAL;
1786 }
1787
1788#ifdef MSND_CLASSIC
1789 switch (irq) {
1790 case 5: dev.irqid = HPIRQ_5; break;
1791 case 7: dev.irqid = HPIRQ_7; break;
1792 case 9: dev.irqid = HPIRQ_9; break;
1793 case 10: dev.irqid = HPIRQ_10; break;
1794 case 11: dev.irqid = HPIRQ_11; break;
1795 case 12: dev.irqid = HPIRQ_12; break;
1796 }
1797
1798 switch (mem) {
1799 case 0xb0000: dev.memid = HPMEM_B000; break;
1800 case 0xc8000: dev.memid = HPMEM_C800; break;
1801 case 0xd0000: dev.memid = HPMEM_D000; break;
1802 case 0xd8000: dev.memid = HPMEM_D800; break;
1803 case 0xe0000: dev.memid = HPMEM_E000; break;
1804 case 0xe8000: dev.memid = HPMEM_E800; break;
1805 }
1806#else
1807 if (cfg == -1) {
1808 printk(KERN_INFO LOGNAME ": Assuming PnP mode\n");
1809 } else if (cfg != 0x250 && cfg != 0x260 && cfg != 0x270) {
1810 printk(KERN_INFO LOGNAME ": Config port must be 0x250, 0x260 or 0x270 (or unspecified for PnP mode)\n");
1811 return -EINVAL;
1812 } else {
1813 printk(KERN_INFO LOGNAME ": Non-PnP mode: configuring at port 0x%x\n", cfg);
1814
1815 /* DSP */
1816 pinnacle_devs[0].io0 = io;
1817 pinnacle_devs[0].irq = irq;
1818 pinnacle_devs[0].mem = mem;
1819
1820 /* The following are Pinnacle specific */
1821
1822 /* MPU */
1823 pinnacle_devs[1].io0 = mpu_io;
1824 pinnacle_devs[1].irq = mpu_irq;
1825
1826 /* IDE */
1827 pinnacle_devs[2].io0 = ide_io0;
1828 pinnacle_devs[2].io1 = ide_io1;
1829 pinnacle_devs[2].irq = ide_irq;
1830
1831 /* Joystick */
1832 pinnacle_devs[3].io0 = joystick_io;
1833
1834 if (!request_region(cfg, 2, "Pinnacle/Fiji Config")) {
1835 printk(KERN_ERR LOGNAME ": Config port 0x%x conflict\n", cfg);
1836 return -EIO;
1837 }
1838
1839 if (msnd_pinnacle_cfg_devices(cfg, reset, pinnacle_devs)) {
1840 printk(KERN_ERR LOGNAME ": Device configuration error\n");
1841 release_region(cfg, 2);
1842 return -EIO;
1843 }
1844 release_region(cfg, 2);
1845 }
1846#endif /* MSND_CLASSIC */
1847
1848 if (fifosize < 16)
1849 fifosize = 16;
1850
1851 if (fifosize > 1024)
1852 fifosize = 1024;
1853
1854 set_default_audio_parameters();
1855#ifdef MSND_CLASSIC
1856 dev.type = msndClassic;
1857#else
1858 dev.type = msndPinnacle;
1859#endif
1860 dev.io = io;
1861 dev.numio = DSP_NUMIO;
1862 dev.irq = irq;
1863 dev.base = ioremap(mem, 0x8000);
1864 dev.fifosize = fifosize * 1024;
1865 dev.calibrate_signal = calibrate_signal ? 1 : 0;
1866 dev.recsrc = 0;
1867 dev.dspq_data_buff = DSPQ_DATA_BUFF;
1868 dev.dspq_buff_size = DSPQ_BUFF_SIZE;
1869 if (write_ndelay == -1)
1870 write_ndelay = CONFIG_MSND_WRITE_NDELAY;
1871 if (write_ndelay)
1872 clear_bit(F_DISABLE_WRITE_NDELAY, &dev.flags);
1873 else
1874 set_bit(F_DISABLE_WRITE_NDELAY, &dev.flags);
1875#ifndef MSND_CLASSIC
1876 if (digital)
1877 set_bit(F_HAVEDIGITAL, &dev.flags);
1878#endif
1879 init_waitqueue_head(&dev.writeblock);
1880 init_waitqueue_head(&dev.readblock);
1881 init_waitqueue_head(&dev.writeflush);
1882 msnd_fifo_init(&dev.DAPF);
1883 msnd_fifo_init(&dev.DARF);
1884 spin_lock_init(&dev.lock);
1885 printk(KERN_INFO LOGNAME ": %u byte audio FIFOs (x2)\n", dev.fifosize);
1886 if ((err = msnd_fifo_alloc(&dev.DAPF, dev.fifosize)) < 0) {
1887 printk(KERN_ERR LOGNAME ": Couldn't allocate write FIFO\n");
1888 return err;
1889 }
1890
1891 if ((err = msnd_fifo_alloc(&dev.DARF, dev.fifosize)) < 0) {
1892 printk(KERN_ERR LOGNAME ": Couldn't allocate read FIFO\n");
1893 msnd_fifo_free(&dev.DAPF);
1894 return err;
1895 }
1896
1897 if ((err = probe_multisound()) < 0) {
1898 printk(KERN_ERR LOGNAME ": Probe failed\n");
1899 msnd_fifo_free(&dev.DAPF);
1900 msnd_fifo_free(&dev.DARF);
1901 return err;
1902 }
1903
1904 if ((err = attach_multisound()) < 0) {
1905 printk(KERN_ERR LOGNAME ": Attach failed\n");
1906 msnd_fifo_free(&dev.DAPF);
1907 msnd_fifo_free(&dev.DARF);
1908 return err;
1909 }
1910
1911 return 0;
1912}
1913
1914static void __exit msdn_cleanup(void)
1915{
1916 unload_multisound();
1917 msnd_fifo_free(&dev.DAPF);
1918 msnd_fifo_free(&dev.DARF);
1919}
1920
1921module_init(msnd_init);
1922module_exit(msdn_cleanup);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-24 14:47:00 -0500