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Diffstat (limited to 'include/asm-arm/hardware/iop3xx-adma.h')
-rw-r--r--include/asm-arm/hardware/iop3xx-adma.h30
1 files changed, 17 insertions, 13 deletions
diff --git a/include/asm-arm/hardware/iop3xx-adma.h b/include/asm-arm/hardware/iop3xx-adma.h
index 10834b54f68..5c529e6a5e3 100644
--- a/include/asm-arm/hardware/iop3xx-adma.h
+++ b/include/asm-arm/hardware/iop3xx-adma.h
@@ -414,7 +414,7 @@ static inline void iop3xx_aau_desc_set_src_addr(struct iop3xx_desc_aau *hw_desc,
414} 414}
415 415
416static inline void 416static inline void
417iop_desc_init_memcpy(struct iop_adma_desc_slot *desc, int int_en) 417iop_desc_init_memcpy(struct iop_adma_desc_slot *desc, unsigned long flags)
418{ 418{
419 struct iop3xx_desc_dma *hw_desc = desc->hw_desc; 419 struct iop3xx_desc_dma *hw_desc = desc->hw_desc;
420 union { 420 union {
@@ -425,14 +425,14 @@ iop_desc_init_memcpy(struct iop_adma_desc_slot *desc, int int_en)
425 u_desc_ctrl.value = 0; 425 u_desc_ctrl.value = 0;
426 u_desc_ctrl.field.mem_to_mem_en = 1; 426 u_desc_ctrl.field.mem_to_mem_en = 1;
427 u_desc_ctrl.field.pci_transaction = 0xe; /* memory read block */ 427 u_desc_ctrl.field.pci_transaction = 0xe; /* memory read block */
428 u_desc_ctrl.field.int_en = int_en; 428 u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT;
429 hw_desc->desc_ctrl = u_desc_ctrl.value; 429 hw_desc->desc_ctrl = u_desc_ctrl.value;
430 hw_desc->upper_pci_src_addr = 0; 430 hw_desc->upper_pci_src_addr = 0;
431 hw_desc->crc_addr = 0; 431 hw_desc->crc_addr = 0;
432} 432}
433 433
434static inline void 434static inline void
435iop_desc_init_memset(struct iop_adma_desc_slot *desc, int int_en) 435iop_desc_init_memset(struct iop_adma_desc_slot *desc, unsigned long flags)
436{ 436{
437 struct iop3xx_desc_aau *hw_desc = desc->hw_desc; 437 struct iop3xx_desc_aau *hw_desc = desc->hw_desc;
438 union { 438 union {
@@ -443,12 +443,13 @@ iop_desc_init_memset(struct iop_adma_desc_slot *desc, int int_en)
443 u_desc_ctrl.value = 0; 443 u_desc_ctrl.value = 0;
444 u_desc_ctrl.field.blk1_cmd_ctrl = 0x2; /* memory block fill */ 444 u_desc_ctrl.field.blk1_cmd_ctrl = 0x2; /* memory block fill */
445 u_desc_ctrl.field.dest_write_en = 1; 445 u_desc_ctrl.field.dest_write_en = 1;
446 u_desc_ctrl.field.int_en = int_en; 446 u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT;
447 hw_desc->desc_ctrl = u_desc_ctrl.value; 447 hw_desc->desc_ctrl = u_desc_ctrl.value;
448} 448}
449 449
450static inline u32 450static inline u32
451iop3xx_desc_init_xor(struct iop3xx_desc_aau *hw_desc, int src_cnt, int int_en) 451iop3xx_desc_init_xor(struct iop3xx_desc_aau *hw_desc, int src_cnt,
452 unsigned long flags)
452{ 453{
453 int i, shift; 454 int i, shift;
454 u32 edcr; 455 u32 edcr;
@@ -509,21 +510,23 @@ iop3xx_desc_init_xor(struct iop3xx_desc_aau *hw_desc, int src_cnt, int int_en)
509 510
510 u_desc_ctrl.field.dest_write_en = 1; 511 u_desc_ctrl.field.dest_write_en = 1;
511 u_desc_ctrl.field.blk1_cmd_ctrl = 0x7; /* direct fill */ 512 u_desc_ctrl.field.blk1_cmd_ctrl = 0x7; /* direct fill */
512 u_desc_ctrl.field.int_en = int_en; 513 u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT;
513 hw_desc->desc_ctrl = u_desc_ctrl.value; 514 hw_desc->desc_ctrl = u_desc_ctrl.value;
514 515
515 return u_desc_ctrl.value; 516 return u_desc_ctrl.value;
516} 517}
517 518
518static inline void 519static inline void
519iop_desc_init_xor(struct iop_adma_desc_slot *desc, int src_cnt, int int_en) 520iop_desc_init_xor(struct iop_adma_desc_slot *desc, int src_cnt,
521 unsigned long flags)
520{ 522{
521 iop3xx_desc_init_xor(desc->hw_desc, src_cnt, int_en); 523 iop3xx_desc_init_xor(desc->hw_desc, src_cnt, flags);
522} 524}
523 525
524/* return the number of operations */ 526/* return the number of operations */
525static inline int 527static inline int
526iop_desc_init_zero_sum(struct iop_adma_desc_slot *desc, int src_cnt, int int_en) 528iop_desc_init_zero_sum(struct iop_adma_desc_slot *desc, int src_cnt,
529 unsigned long flags)
527{ 530{
528 int slot_cnt = desc->slot_cnt, slots_per_op = desc->slots_per_op; 531 int slot_cnt = desc->slot_cnt, slots_per_op = desc->slots_per_op;
529 struct iop3xx_desc_aau *hw_desc, *prev_hw_desc, *iter; 532 struct iop3xx_desc_aau *hw_desc, *prev_hw_desc, *iter;
@@ -538,10 +541,10 @@ iop_desc_init_zero_sum(struct iop_adma_desc_slot *desc, int src_cnt, int int_en)
538 for (i = 0, j = 0; (slot_cnt -= slots_per_op) >= 0; 541 for (i = 0, j = 0; (slot_cnt -= slots_per_op) >= 0;
539 i += slots_per_op, j++) { 542 i += slots_per_op, j++) {
540 iter = iop_hw_desc_slot_idx(hw_desc, i); 543 iter = iop_hw_desc_slot_idx(hw_desc, i);
541 u_desc_ctrl.value = iop3xx_desc_init_xor(iter, src_cnt, int_en); 544 u_desc_ctrl.value = iop3xx_desc_init_xor(iter, src_cnt, flags);
542 u_desc_ctrl.field.dest_write_en = 0; 545 u_desc_ctrl.field.dest_write_en = 0;
543 u_desc_ctrl.field.zero_result_en = 1; 546 u_desc_ctrl.field.zero_result_en = 1;
544 u_desc_ctrl.field.int_en = int_en; 547 u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT;
545 iter->desc_ctrl = u_desc_ctrl.value; 548 iter->desc_ctrl = u_desc_ctrl.value;
546 549
547 /* for the subsequent descriptors preserve the store queue 550 /* for the subsequent descriptors preserve the store queue
@@ -559,7 +562,8 @@ iop_desc_init_zero_sum(struct iop_adma_desc_slot *desc, int src_cnt, int int_en)
559} 562}
560 563
561static inline void 564static inline void
562iop_desc_init_null_xor(struct iop_adma_desc_slot *desc, int src_cnt, int int_en) 565iop_desc_init_null_xor(struct iop_adma_desc_slot *desc, int src_cnt,
566 unsigned long flags)
563{ 567{
564 struct iop3xx_desc_aau *hw_desc = desc->hw_desc; 568 struct iop3xx_desc_aau *hw_desc = desc->hw_desc;
565 union { 569 union {
@@ -591,7 +595,7 @@ iop_desc_init_null_xor(struct iop_adma_desc_slot *desc, int src_cnt, int int_en)
591 } 595 }
592 596
593 u_desc_ctrl.field.dest_write_en = 0; 597 u_desc_ctrl.field.dest_write_en = 0;
594 u_desc_ctrl.field.int_en = int_en; 598 u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT;
595 hw_desc->desc_ctrl = u_desc_ctrl.value; 599 hw_desc->desc_ctrl = u_desc_ctrl.value;
596} 600}
597 601